Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2011 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
Shawn Guo | 36dffd8 | 2013-04-07 10:49:34 +0800 | [diff] [blame] | 13 | #include "skeleton.dtsi" |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 14 | |
| 15 | / { |
| 16 | aliases { |
Lothar Waßmann | 5f8fbc2 | 2013-12-12 14:27:57 +0100 | [diff] [blame] | 17 | can0 = &can1; |
| 18 | can1 = &can2; |
Shawn Guo | 5230f8f | 2012-08-05 14:01:28 +0800 | [diff] [blame] | 19 | gpio0 = &gpio1; |
| 20 | gpio1 = &gpio2; |
| 21 | gpio2 = &gpio3; |
| 22 | gpio3 = &gpio4; |
| 23 | gpio4 = &gpio5; |
| 24 | gpio5 = &gpio6; |
| 25 | gpio6 = &gpio7; |
Sascha Hauer | 80fa058 | 2013-06-25 15:51:57 +0200 | [diff] [blame] | 26 | i2c0 = &i2c1; |
| 27 | i2c1 = &i2c2; |
| 28 | i2c2 = &i2c3; |
Sascha Hauer | fb06d65 | 2014-01-16 13:44:20 +0100 | [diff] [blame] | 29 | mmc0 = &usdhc1; |
| 30 | mmc1 = &usdhc2; |
| 31 | mmc2 = &usdhc3; |
| 32 | mmc3 = &usdhc4; |
Sascha Hauer | 80fa058 | 2013-06-25 15:51:57 +0200 | [diff] [blame] | 33 | serial0 = &uart1; |
| 34 | serial1 = &uart2; |
| 35 | serial2 = &uart3; |
| 36 | serial3 = &uart4; |
| 37 | serial4 = &uart5; |
| 38 | spi0 = &ecspi1; |
| 39 | spi1 = &ecspi2; |
| 40 | spi2 = &ecspi3; |
| 41 | spi3 = &ecspi4; |
Peter Chen | 8189c51 | 2013-12-20 15:52:05 +0800 | [diff] [blame] | 42 | usbphy0 = &usbphy1; |
| 43 | usbphy1 = &usbphy2; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 44 | }; |
| 45 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 46 | intc: interrupt-controller@00a01000 { |
| 47 | compatible = "arm,cortex-a9-gic"; |
| 48 | #interrupt-cells = <3>; |
| 49 | #address-cells = <1>; |
| 50 | #size-cells = <1>; |
| 51 | interrupt-controller; |
| 52 | reg = <0x00a01000 0x1000>, |
| 53 | <0x00a00100 0x100>; |
| 54 | }; |
| 55 | |
| 56 | clocks { |
| 57 | #address-cells = <1>; |
| 58 | #size-cells = <0>; |
| 59 | |
| 60 | ckil { |
| 61 | compatible = "fsl,imx-ckil", "fixed-clock"; |
| 62 | clock-frequency = <32768>; |
| 63 | }; |
| 64 | |
| 65 | ckih1 { |
| 66 | compatible = "fsl,imx-ckih1", "fixed-clock"; |
| 67 | clock-frequency = <0>; |
| 68 | }; |
| 69 | |
| 70 | osc { |
| 71 | compatible = "fsl,imx-osc", "fixed-clock"; |
| 72 | clock-frequency = <24000000>; |
| 73 | }; |
| 74 | }; |
| 75 | |
| 76 | soc { |
| 77 | #address-cells = <1>; |
| 78 | #size-cells = <1>; |
| 79 | compatible = "simple-bus"; |
| 80 | interrupt-parent = <&intc>; |
| 81 | ranges; |
| 82 | |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 83 | dma_apbh: dma-apbh@00110000 { |
Huang Shijie | e5d0f9f | 2012-06-06 21:22:57 -0400 | [diff] [blame] | 84 | compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; |
| 85 | reg = <0x00110000 0x2000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 86 | interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>, |
| 87 | <0 13 IRQ_TYPE_LEVEL_HIGH>, |
| 88 | <0 13 IRQ_TYPE_LEVEL_HIGH>, |
| 89 | <0 13 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 90 | interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; |
| 91 | #dma-cells = <1>; |
| 92 | dma-channels = <4>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 93 | clocks = <&clks 106>; |
Huang Shijie | e5d0f9f | 2012-06-06 21:22:57 -0400 | [diff] [blame] | 94 | }; |
| 95 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 96 | gpmi: gpmi-nand@00112000 { |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 97 | compatible = "fsl,imx6q-gpmi-nand"; |
| 98 | #address-cells = <1>; |
| 99 | #size-cells = <1>; |
| 100 | reg = <0x00112000 0x2000>, <0x00114000 0x2000>; |
| 101 | reg-names = "gpmi-nand", "bch"; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 102 | interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | c7aa12a | 2013-07-16 17:13:00 +0800 | [diff] [blame] | 103 | interrupt-names = "bch"; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 104 | clocks = <&clks 152>, <&clks 153>, <&clks 151>, |
| 105 | <&clks 150>, <&clks 149>; |
| 106 | clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", |
| 107 | "gpmi_bch_apb", "per1_bch"; |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 108 | dmas = <&dma_apbh 0>; |
| 109 | dma-names = "rx-tx"; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 110 | status = "disabled"; |
Huang Shijie | cf922fa | 2012-07-01 23:38:46 -0400 | [diff] [blame] | 111 | }; |
| 112 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 113 | timer@00a00600 { |
Marc Zyngier | 58458e0 | 2012-01-10 19:44:19 +0000 | [diff] [blame] | 114 | compatible = "arm,cortex-a9-twd-timer"; |
| 115 | reg = <0x00a00600 0x20>; |
| 116 | interrupts = <1 13 0xf01>; |
Shawn Guo | 2bb4b70 | 2013-04-03 23:50:09 +0800 | [diff] [blame] | 117 | clocks = <&clks 15>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 118 | }; |
| 119 | |
| 120 | L2: l2-cache@00a02000 { |
| 121 | compatible = "arm,pl310-cache"; |
| 122 | reg = <0x00a02000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 123 | interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 124 | cache-unified; |
| 125 | cache-level = <2>; |
Dirk Behme | 5a5ca56 | 2013-04-26 10:13:55 +0200 | [diff] [blame] | 126 | arm,tag-latency = <4 2 3>; |
| 127 | arm,data-latency = <4 2 3>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 128 | }; |
| 129 | |
Sean Cross | 3a57291 | 2013-09-26 10:51:09 +0800 | [diff] [blame] | 130 | pcie: pcie@0x01000000 { |
| 131 | compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; |
| 132 | reg = <0x01ffc000 0x4000>; /* DBI */ |
| 133 | #address-cells = <3>; |
| 134 | #size-cells = <2>; |
| 135 | device_type = "pci"; |
| 136 | ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */ |
| 137 | 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ |
| 138 | 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ |
| 139 | num-lanes = <1>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 140 | interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>; |
Sean Cross | 3a57291 | 2013-09-26 10:51:09 +0800 | [diff] [blame] | 141 | clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; |
| 142 | clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; |
| 143 | status = "disabled"; |
| 144 | }; |
| 145 | |
Dirk Behme | 218abe6 | 2013-02-15 15:10:01 +0100 | [diff] [blame] | 146 | pmu { |
| 147 | compatible = "arm,cortex-a9-pmu"; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 148 | interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; |
Dirk Behme | 218abe6 | 2013-02-15 15:10:01 +0100 | [diff] [blame] | 149 | }; |
| 150 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 151 | aips-bus@02000000 { /* AIPS1 */ |
| 152 | compatible = "fsl,aips-bus", "simple-bus"; |
| 153 | #address-cells = <1>; |
| 154 | #size-cells = <1>; |
| 155 | reg = <0x02000000 0x100000>; |
| 156 | ranges; |
| 157 | |
| 158 | spba-bus@02000000 { |
| 159 | compatible = "fsl,spba-bus", "simple-bus"; |
| 160 | #address-cells = <1>; |
| 161 | #size-cells = <1>; |
| 162 | reg = <0x02000000 0x40000>; |
| 163 | ranges; |
| 164 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 165 | spdif: spdif@02004000 { |
Fabio Estevam | c9d96df | 2013-09-02 23:51:41 -0300 | [diff] [blame] | 166 | compatible = "fsl,imx35-spdif"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 167 | reg = <0x02004000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 168 | interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; |
Fabio Estevam | c9d96df | 2013-09-02 23:51:41 -0300 | [diff] [blame] | 169 | dmas = <&sdma 14 18 0>, |
| 170 | <&sdma 15 18 0>; |
| 171 | dma-names = "rx", "tx"; |
| 172 | clocks = <&clks 197>, <&clks 3>, |
| 173 | <&clks 197>, <&clks 107>, |
| 174 | <&clks 0>, <&clks 118>, |
Shawn Guo | 793b4b1 | 2013-11-16 22:38:29 +0800 | [diff] [blame] | 175 | <&clks 0>, <&clks 139>, |
Fabio Estevam | c9d96df | 2013-09-02 23:51:41 -0300 | [diff] [blame] | 176 | <&clks 0>; |
| 177 | clock-names = "core", "rxtx0", |
| 178 | "rxtx1", "rxtx2", |
| 179 | "rxtx3", "rxtx4", |
| 180 | "rxtx5", "rxtx6", |
| 181 | "rxtx7"; |
| 182 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 183 | }; |
| 184 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 185 | ecspi1: ecspi@02008000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 186 | #address-cells = <1>; |
| 187 | #size-cells = <0>; |
| 188 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 189 | reg = <0x02008000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 190 | interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 191 | clocks = <&clks 112>, <&clks 112>; |
| 192 | clock-names = "ipg", "per"; |
Frank Li | b3810c3 | 2014-01-04 06:53:52 +0800 | [diff] [blame] | 193 | dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; |
| 194 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 195 | status = "disabled"; |
| 196 | }; |
| 197 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 198 | ecspi2: ecspi@0200c000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 199 | #address-cells = <1>; |
| 200 | #size-cells = <0>; |
| 201 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 202 | reg = <0x0200c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 203 | interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 204 | clocks = <&clks 113>, <&clks 113>; |
| 205 | clock-names = "ipg", "per"; |
Frank Li | b3810c3 | 2014-01-04 06:53:52 +0800 | [diff] [blame] | 206 | dmas = <&sdma 5 7 1>, <&sdma 6 7 2>; |
| 207 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 208 | status = "disabled"; |
| 209 | }; |
| 210 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 211 | ecspi3: ecspi@02010000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 212 | #address-cells = <1>; |
| 213 | #size-cells = <0>; |
| 214 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 215 | reg = <0x02010000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 216 | interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 217 | clocks = <&clks 114>, <&clks 114>; |
| 218 | clock-names = "ipg", "per"; |
Frank Li | b3810c3 | 2014-01-04 06:53:52 +0800 | [diff] [blame] | 219 | dmas = <&sdma 7 7 1>, <&sdma 8 7 2>; |
| 220 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 221 | status = "disabled"; |
| 222 | }; |
| 223 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 224 | ecspi4: ecspi@02014000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 225 | #address-cells = <1>; |
| 226 | #size-cells = <0>; |
| 227 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 228 | reg = <0x02014000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 229 | interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 230 | clocks = <&clks 115>, <&clks 115>; |
| 231 | clock-names = "ipg", "per"; |
Frank Li | b3810c3 | 2014-01-04 06:53:52 +0800 | [diff] [blame] | 232 | dmas = <&sdma 9 7 1>, <&sdma 10 7 2>; |
| 233 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 234 | status = "disabled"; |
| 235 | }; |
| 236 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 237 | uart1: serial@02020000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 238 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 239 | reg = <0x02020000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 240 | interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 241 | clocks = <&clks 160>, <&clks 161>; |
| 242 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 243 | dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; |
| 244 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 245 | status = "disabled"; |
| 246 | }; |
| 247 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 248 | esai: esai@02024000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 249 | reg = <0x02024000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 250 | interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 251 | }; |
| 252 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 253 | ssi1: ssi@02028000 { |
Markus Pargmann | 98ea6ad | 2014-01-17 10:07:42 +0100 | [diff] [blame^] | 254 | compatible = "fsl,imx6q-ssi", |
| 255 | "fsl,imx51-ssi", |
| 256 | "fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 257 | reg = <0x02028000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 258 | interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 259 | clocks = <&clks 178>; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 260 | dmas = <&sdma 37 1 0>, |
| 261 | <&sdma 38 1 0>; |
| 262 | dma-names = "rx", "tx"; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 263 | fsl,fifo-depth = <15>; |
| 264 | fsl,ssi-dma-events = <38 37>; |
| 265 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 266 | }; |
| 267 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 268 | ssi2: ssi@0202c000 { |
Markus Pargmann | 98ea6ad | 2014-01-17 10:07:42 +0100 | [diff] [blame^] | 269 | compatible = "fsl,imx6q-ssi", |
| 270 | "fsl,imx51-ssi", |
| 271 | "fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 272 | reg = <0x0202c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 273 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 274 | clocks = <&clks 179>; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 275 | dmas = <&sdma 41 1 0>, |
| 276 | <&sdma 42 1 0>; |
| 277 | dma-names = "rx", "tx"; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 278 | fsl,fifo-depth = <15>; |
| 279 | fsl,ssi-dma-events = <42 41>; |
| 280 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 281 | }; |
| 282 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 283 | ssi3: ssi@02030000 { |
Markus Pargmann | 98ea6ad | 2014-01-17 10:07:42 +0100 | [diff] [blame^] | 284 | compatible = "fsl,imx6q-ssi", |
| 285 | "fsl,imx51-ssi", |
| 286 | "fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 287 | reg = <0x02030000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 288 | interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 289 | clocks = <&clks 180>; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 290 | dmas = <&sdma 45 1 0>, |
| 291 | <&sdma 46 1 0>; |
| 292 | dma-names = "rx", "tx"; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 293 | fsl,fifo-depth = <15>; |
| 294 | fsl,ssi-dma-events = <46 45>; |
| 295 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 296 | }; |
| 297 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 298 | asrc: asrc@02034000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 299 | reg = <0x02034000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 300 | interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 301 | }; |
| 302 | |
| 303 | spba@0203c000 { |
| 304 | reg = <0x0203c000 0x4000>; |
| 305 | }; |
| 306 | }; |
| 307 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 308 | vpu: vpu@02040000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 309 | reg = <0x02040000 0x3c000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 310 | interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>, |
| 311 | <0 12 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 312 | }; |
| 313 | |
| 314 | aipstz@0207c000 { /* AIPSTZ1 */ |
| 315 | reg = <0x0207c000 0x4000>; |
| 316 | }; |
| 317 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 318 | pwm1: pwm@02080000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 319 | #pwm-cells = <2>; |
| 320 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 321 | reg = <0x02080000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 322 | interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 323 | clocks = <&clks 62>, <&clks 145>; |
| 324 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 325 | }; |
| 326 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 327 | pwm2: pwm@02084000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 328 | #pwm-cells = <2>; |
| 329 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 330 | reg = <0x02084000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 331 | interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 332 | clocks = <&clks 62>, <&clks 146>; |
| 333 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 334 | }; |
| 335 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 336 | pwm3: pwm@02088000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 337 | #pwm-cells = <2>; |
| 338 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 339 | reg = <0x02088000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 340 | interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 341 | clocks = <&clks 62>, <&clks 147>; |
| 342 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 343 | }; |
| 344 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 345 | pwm4: pwm@0208c000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 346 | #pwm-cells = <2>; |
| 347 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 348 | reg = <0x0208c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 349 | interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 350 | clocks = <&clks 62>, <&clks 148>; |
| 351 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 352 | }; |
| 353 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 354 | can1: flexcan@02090000 { |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 355 | compatible = "fsl,imx6q-flexcan"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 356 | reg = <0x02090000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 357 | interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 358 | clocks = <&clks 108>, <&clks 109>; |
| 359 | clock-names = "ipg", "per"; |
Tim Harvey | a113533 | 2013-10-22 21:51:27 -0700 | [diff] [blame] | 360 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 361 | }; |
| 362 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 363 | can2: flexcan@02094000 { |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 364 | compatible = "fsl,imx6q-flexcan"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 365 | reg = <0x02094000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 366 | interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 367 | clocks = <&clks 110>, <&clks 111>; |
| 368 | clock-names = "ipg", "per"; |
Tim Harvey | a113533 | 2013-10-22 21:51:27 -0700 | [diff] [blame] | 369 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 370 | }; |
| 371 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 372 | gpt: gpt@02098000 { |
Sascha Hauer | 97b108f | 2013-06-25 15:51:47 +0200 | [diff] [blame] | 373 | compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 374 | reg = <0x02098000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 375 | interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 4efccad | 2013-03-14 13:09:01 +0100 | [diff] [blame] | 376 | clocks = <&clks 119>, <&clks 120>; |
| 377 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 378 | }; |
| 379 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 380 | gpio1: gpio@0209c000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 381 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 382 | reg = <0x0209c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 383 | interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>, |
| 384 | <0 67 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 385 | gpio-controller; |
| 386 | #gpio-cells = <2>; |
| 387 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 388 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 389 | }; |
| 390 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 391 | gpio2: gpio@020a0000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 392 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 393 | reg = <0x020a0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 394 | interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>, |
| 395 | <0 69 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 396 | gpio-controller; |
| 397 | #gpio-cells = <2>; |
| 398 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 399 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 400 | }; |
| 401 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 402 | gpio3: gpio@020a4000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 403 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 404 | reg = <0x020a4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 405 | interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>, |
| 406 | <0 71 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 407 | gpio-controller; |
| 408 | #gpio-cells = <2>; |
| 409 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 410 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 411 | }; |
| 412 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 413 | gpio4: gpio@020a8000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 414 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 415 | reg = <0x020a8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 416 | interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>, |
| 417 | <0 73 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 418 | gpio-controller; |
| 419 | #gpio-cells = <2>; |
| 420 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 421 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 422 | }; |
| 423 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 424 | gpio5: gpio@020ac000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 425 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 426 | reg = <0x020ac000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 427 | interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>, |
| 428 | <0 75 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 429 | gpio-controller; |
| 430 | #gpio-cells = <2>; |
| 431 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 432 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 433 | }; |
| 434 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 435 | gpio6: gpio@020b0000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 436 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 437 | reg = <0x020b0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 438 | interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>, |
| 439 | <0 77 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 440 | gpio-controller; |
| 441 | #gpio-cells = <2>; |
| 442 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 443 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 444 | }; |
| 445 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 446 | gpio7: gpio@020b4000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 447 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 448 | reg = <0x020b4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 449 | interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>, |
| 450 | <0 79 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 451 | gpio-controller; |
| 452 | #gpio-cells = <2>; |
| 453 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 454 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 455 | }; |
| 456 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 457 | kpp: kpp@020b8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 458 | reg = <0x020b8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 459 | interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 460 | }; |
| 461 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 462 | wdog1: wdog@020bc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 463 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
| 464 | reg = <0x020bc000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 465 | interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 466 | clocks = <&clks 0>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 467 | }; |
| 468 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 469 | wdog2: wdog@020c0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 470 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
| 471 | reg = <0x020c0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 472 | interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 473 | clocks = <&clks 0>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 474 | status = "disabled"; |
| 475 | }; |
| 476 | |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 477 | clks: ccm@020c4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 478 | compatible = "fsl,imx6q-ccm"; |
| 479 | reg = <0x020c4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 480 | interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>, |
| 481 | <0 88 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 482 | #clock-cells = <1>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 483 | }; |
| 484 | |
Dong Aisheng | baa6415 | 2012-09-05 10:57:15 +0800 | [diff] [blame] | 485 | anatop: anatop@020c8000 { |
| 486 | compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 487 | reg = <0x020c8000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 488 | interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, |
| 489 | <0 54 IRQ_TYPE_LEVEL_HIGH>, |
| 490 | <0 127 IRQ_TYPE_LEVEL_HIGH>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 491 | |
| 492 | regulator-1p1@110 { |
| 493 | compatible = "fsl,anatop-regulator"; |
| 494 | regulator-name = "vdd1p1"; |
| 495 | regulator-min-microvolt = <800000>; |
| 496 | regulator-max-microvolt = <1375000>; |
| 497 | regulator-always-on; |
| 498 | anatop-reg-offset = <0x110>; |
| 499 | anatop-vol-bit-shift = <8>; |
| 500 | anatop-vol-bit-width = <5>; |
| 501 | anatop-min-bit-val = <4>; |
| 502 | anatop-min-voltage = <800000>; |
| 503 | anatop-max-voltage = <1375000>; |
| 504 | }; |
| 505 | |
| 506 | regulator-3p0@120 { |
| 507 | compatible = "fsl,anatop-regulator"; |
| 508 | regulator-name = "vdd3p0"; |
| 509 | regulator-min-microvolt = <2800000>; |
| 510 | regulator-max-microvolt = <3150000>; |
| 511 | regulator-always-on; |
| 512 | anatop-reg-offset = <0x120>; |
| 513 | anatop-vol-bit-shift = <8>; |
| 514 | anatop-vol-bit-width = <5>; |
| 515 | anatop-min-bit-val = <0>; |
| 516 | anatop-min-voltage = <2625000>; |
| 517 | anatop-max-voltage = <3400000>; |
| 518 | }; |
| 519 | |
| 520 | regulator-2p5@130 { |
| 521 | compatible = "fsl,anatop-regulator"; |
| 522 | regulator-name = "vdd2p5"; |
| 523 | regulator-min-microvolt = <2000000>; |
| 524 | regulator-max-microvolt = <2750000>; |
| 525 | regulator-always-on; |
| 526 | anatop-reg-offset = <0x130>; |
| 527 | anatop-vol-bit-shift = <8>; |
| 528 | anatop-vol-bit-width = <5>; |
| 529 | anatop-min-bit-val = <0>; |
| 530 | anatop-min-voltage = <2000000>; |
| 531 | anatop-max-voltage = <2750000>; |
| 532 | }; |
| 533 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 534 | reg_arm: regulator-vddcore@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 535 | compatible = "fsl,anatop-regulator"; |
Fabio Estevam | 118c98a | 2013-12-19 21:08:52 -0200 | [diff] [blame] | 536 | regulator-name = "vddarm"; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 537 | regulator-min-microvolt = <725000>; |
| 538 | regulator-max-microvolt = <1450000>; |
| 539 | regulator-always-on; |
| 540 | anatop-reg-offset = <0x140>; |
| 541 | anatop-vol-bit-shift = <0>; |
| 542 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 543 | anatop-delay-reg-offset = <0x170>; |
| 544 | anatop-delay-bit-shift = <24>; |
| 545 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 546 | anatop-min-bit-val = <1>; |
| 547 | anatop-min-voltage = <725000>; |
| 548 | anatop-max-voltage = <1450000>; |
| 549 | }; |
| 550 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 551 | reg_pu: regulator-vddpu@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 552 | compatible = "fsl,anatop-regulator"; |
| 553 | regulator-name = "vddpu"; |
| 554 | regulator-min-microvolt = <725000>; |
| 555 | regulator-max-microvolt = <1450000>; |
| 556 | regulator-always-on; |
| 557 | anatop-reg-offset = <0x140>; |
| 558 | anatop-vol-bit-shift = <9>; |
| 559 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 560 | anatop-delay-reg-offset = <0x170>; |
| 561 | anatop-delay-bit-shift = <26>; |
| 562 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 563 | anatop-min-bit-val = <1>; |
| 564 | anatop-min-voltage = <725000>; |
| 565 | anatop-max-voltage = <1450000>; |
| 566 | }; |
| 567 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 568 | reg_soc: regulator-vddsoc@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 569 | compatible = "fsl,anatop-regulator"; |
| 570 | regulator-name = "vddsoc"; |
| 571 | regulator-min-microvolt = <725000>; |
| 572 | regulator-max-microvolt = <1450000>; |
| 573 | regulator-always-on; |
| 574 | anatop-reg-offset = <0x140>; |
| 575 | anatop-vol-bit-shift = <18>; |
| 576 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 577 | anatop-delay-reg-offset = <0x170>; |
| 578 | anatop-delay-bit-shift = <28>; |
| 579 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 580 | anatop-min-bit-val = <1>; |
| 581 | anatop-min-voltage = <725000>; |
| 582 | anatop-max-voltage = <1450000>; |
| 583 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 584 | }; |
| 585 | |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 586 | tempmon: tempmon { |
| 587 | compatible = "fsl,imx6q-tempmon"; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 588 | interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 589 | fsl,tempmon = <&anatop>; |
| 590 | fsl,tempmon-data = <&ocotp>; |
Anson Huang | f430d19 | 2013-12-19 13:17:23 -0500 | [diff] [blame] | 591 | clocks = <&clks 172>; |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 592 | }; |
| 593 | |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 594 | usbphy1: usbphy@020c9000 { |
| 595 | compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 596 | reg = <0x020c9000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 597 | interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 598 | clocks = <&clks 182>; |
Peter Chen | 76a3885 | 2013-12-20 15:52:01 +0800 | [diff] [blame] | 599 | fsl,anatop = <&anatop>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 600 | }; |
| 601 | |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 602 | usbphy2: usbphy@020ca000 { |
| 603 | compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 604 | reg = <0x020ca000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 605 | interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 606 | clocks = <&clks 183>; |
Peter Chen | 76a3885 | 2013-12-20 15:52:01 +0800 | [diff] [blame] | 607 | fsl,anatop = <&anatop>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 608 | }; |
| 609 | |
| 610 | snvs@020cc000 { |
Shawn Guo | c925038 | 2012-07-02 20:13:03 +0800 | [diff] [blame] | 611 | compatible = "fsl,sec-v4.0-mon", "simple-bus"; |
| 612 | #address-cells = <1>; |
| 613 | #size-cells = <1>; |
| 614 | ranges = <0 0x020cc000 0x4000>; |
| 615 | |
| 616 | snvs-rtc-lp@34 { |
| 617 | compatible = "fsl,sec-v4.0-mon-rtc-lp"; |
| 618 | reg = <0x34 0x58>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 619 | interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>, |
| 620 | <0 20 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | c925038 | 2012-07-02 20:13:03 +0800 | [diff] [blame] | 621 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 622 | }; |
| 623 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 624 | epit1: epit@020d0000 { /* EPIT1 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 625 | reg = <0x020d0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 626 | interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 627 | }; |
| 628 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 629 | epit2: epit@020d4000 { /* EPIT2 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 630 | reg = <0x020d4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 631 | interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 632 | }; |
| 633 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 634 | src: src@020d8000 { |
Philipp Zabel | bd3d924 | 2013-03-28 17:35:22 +0100 | [diff] [blame] | 635 | compatible = "fsl,imx6q-src", "fsl,imx51-src"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 636 | reg = <0x020d8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 637 | interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>, |
| 638 | <0 96 IRQ_TYPE_LEVEL_HIGH>; |
Philipp Zabel | 09ebf36 | 2013-03-28 17:35:20 +0100 | [diff] [blame] | 639 | #reset-cells = <1>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 640 | }; |
| 641 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 642 | gpc: gpc@020dc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 643 | compatible = "fsl,imx6q-gpc"; |
| 644 | reg = <0x020dc000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 645 | interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, |
| 646 | <0 90 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 647 | }; |
| 648 | |
Dong Aisheng | df37e0c | 2012-09-05 10:57:14 +0800 | [diff] [blame] | 649 | gpr: iomuxc-gpr@020e0000 { |
| 650 | compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; |
| 651 | reg = <0x020e0000 0x38>; |
| 652 | }; |
| 653 | |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 654 | iomuxc: iomuxc@020e0000 { |
| 655 | compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; |
| 656 | reg = <0x020e0000 0x4000>; |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 657 | }; |
| 658 | |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 659 | ldb: ldb@020e0008 { |
| 660 | #address-cells = <1>; |
| 661 | #size-cells = <0>; |
| 662 | compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb"; |
| 663 | gpr = <&gpr>; |
| 664 | status = "disabled"; |
| 665 | |
| 666 | lvds-channel@0 { |
| 667 | reg = <0>; |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 668 | status = "disabled"; |
| 669 | }; |
| 670 | |
| 671 | lvds-channel@1 { |
| 672 | reg = <1>; |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 673 | status = "disabled"; |
| 674 | }; |
| 675 | }; |
| 676 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 677 | dcic1: dcic@020e4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 678 | reg = <0x020e4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 679 | interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 680 | }; |
| 681 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 682 | dcic2: dcic@020e8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 683 | reg = <0x020e8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 684 | interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 685 | }; |
| 686 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 687 | sdma: sdma@020ec000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 688 | compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; |
| 689 | reg = <0x020ec000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 690 | interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 691 | clocks = <&clks 155>, <&clks 155>; |
| 692 | clock-names = "ipg", "ahb"; |
Huang Shijie | fb72bb2 | 2013-07-02 10:15:29 +0800 | [diff] [blame] | 693 | #dma-cells = <3>; |
Fabio Estevam | d6b9c59 | 2013-01-17 12:13:25 -0200 | [diff] [blame] | 694 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 695 | }; |
| 696 | }; |
| 697 | |
| 698 | aips-bus@02100000 { /* AIPS2 */ |
| 699 | compatible = "fsl,aips-bus", "simple-bus"; |
| 700 | #address-cells = <1>; |
| 701 | #size-cells = <1>; |
| 702 | reg = <0x02100000 0x100000>; |
| 703 | ranges; |
| 704 | |
| 705 | caam@02100000 { |
| 706 | reg = <0x02100000 0x40000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 707 | interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>, |
| 708 | <0 106 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 709 | }; |
| 710 | |
| 711 | aipstz@0217c000 { /* AIPSTZ2 */ |
| 712 | reg = <0x0217c000 0x4000>; |
| 713 | }; |
| 714 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 715 | usbotg: usb@02184000 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 716 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 717 | reg = <0x02184000 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 718 | interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 719 | clocks = <&clks 162>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 720 | fsl,usbphy = <&usbphy1>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 721 | fsl,usbmisc = <&usbmisc 0>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 722 | status = "disabled"; |
| 723 | }; |
| 724 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 725 | usbh1: usb@02184200 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 726 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 727 | reg = <0x02184200 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 728 | interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 729 | clocks = <&clks 162>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 730 | fsl,usbphy = <&usbphy2>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 731 | fsl,usbmisc = <&usbmisc 1>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 732 | status = "disabled"; |
| 733 | }; |
| 734 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 735 | usbh2: usb@02184400 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 736 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 737 | reg = <0x02184400 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 738 | interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 739 | clocks = <&clks 162>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 740 | fsl,usbmisc = <&usbmisc 2>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 741 | status = "disabled"; |
| 742 | }; |
| 743 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 744 | usbh3: usb@02184600 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 745 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 746 | reg = <0x02184600 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 747 | interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 748 | clocks = <&clks 162>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 749 | fsl,usbmisc = <&usbmisc 3>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 750 | status = "disabled"; |
| 751 | }; |
| 752 | |
Shawn Guo | 60984bd | 2013-04-28 09:59:54 +0800 | [diff] [blame] | 753 | usbmisc: usbmisc@02184800 { |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 754 | #index-cells = <1>; |
| 755 | compatible = "fsl,imx6q-usbmisc"; |
| 756 | reg = <0x02184800 0x200>; |
| 757 | clocks = <&clks 162>; |
| 758 | }; |
| 759 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 760 | fec: ethernet@02188000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 761 | compatible = "fsl,imx6q-fec"; |
| 762 | reg = <0x02188000 0x4000>; |
Troy Kisky | 454cf8f | 2013-12-20 11:47:10 -0700 | [diff] [blame] | 763 | interrupts-extended = |
| 764 | <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>, |
| 765 | <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; |
Frank Li | 8dd5c66 | 2013-02-05 14:21:06 +0800 | [diff] [blame] | 766 | clocks = <&clks 117>, <&clks 117>, <&clks 190>; |
Frank Li | 7629838 | 2012-10-30 18:24:57 +0000 | [diff] [blame] | 767 | clock-names = "ipg", "ahb", "ptp"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 768 | status = "disabled"; |
| 769 | }; |
| 770 | |
| 771 | mlb@0218c000 { |
| 772 | reg = <0x0218c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 773 | interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>, |
| 774 | <0 117 IRQ_TYPE_LEVEL_HIGH>, |
| 775 | <0 126 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 776 | }; |
| 777 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 778 | usdhc1: usdhc@02190000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 779 | compatible = "fsl,imx6q-usdhc"; |
| 780 | reg = <0x02190000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 781 | interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 782 | clocks = <&clks 163>, <&clks 163>, <&clks 163>; |
| 783 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 784 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 785 | status = "disabled"; |
| 786 | }; |
| 787 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 788 | usdhc2: usdhc@02194000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 789 | compatible = "fsl,imx6q-usdhc"; |
| 790 | reg = <0x02194000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 791 | interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 792 | clocks = <&clks 164>, <&clks 164>, <&clks 164>; |
| 793 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 794 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 795 | status = "disabled"; |
| 796 | }; |
| 797 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 798 | usdhc3: usdhc@02198000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 799 | compatible = "fsl,imx6q-usdhc"; |
| 800 | reg = <0x02198000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 801 | interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 802 | clocks = <&clks 165>, <&clks 165>, <&clks 165>; |
| 803 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 804 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 805 | status = "disabled"; |
| 806 | }; |
| 807 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 808 | usdhc4: usdhc@0219c000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 809 | compatible = "fsl,imx6q-usdhc"; |
| 810 | reg = <0x0219c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 811 | interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 812 | clocks = <&clks 166>, <&clks 166>, <&clks 166>; |
| 813 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 814 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 815 | status = "disabled"; |
| 816 | }; |
| 817 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 818 | i2c1: i2c@021a0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 819 | #address-cells = <1>; |
| 820 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 821 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 822 | reg = <0x021a0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 823 | interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 824 | clocks = <&clks 125>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 825 | status = "disabled"; |
| 826 | }; |
| 827 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 828 | i2c2: i2c@021a4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 829 | #address-cells = <1>; |
| 830 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 831 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 832 | reg = <0x021a4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 833 | interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 834 | clocks = <&clks 126>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 835 | status = "disabled"; |
| 836 | }; |
| 837 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 838 | i2c3: i2c@021a8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 839 | #address-cells = <1>; |
| 840 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 841 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 842 | reg = <0x021a8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 843 | interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 844 | clocks = <&clks 127>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 845 | status = "disabled"; |
| 846 | }; |
| 847 | |
| 848 | romcp@021ac000 { |
| 849 | reg = <0x021ac000 0x4000>; |
| 850 | }; |
| 851 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 852 | mmdc0: mmdc@021b0000 { /* MMDC0 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 853 | compatible = "fsl,imx6q-mmdc"; |
| 854 | reg = <0x021b0000 0x4000>; |
| 855 | }; |
| 856 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 857 | mmdc1: mmdc@021b4000 { /* MMDC1 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 858 | reg = <0x021b4000 0x4000>; |
| 859 | }; |
| 860 | |
Huang Shijie | 05e3f8e | 2013-05-28 14:20:09 +0800 | [diff] [blame] | 861 | weim: weim@021b8000 { |
| 862 | compatible = "fsl,imx6q-weim"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 863 | reg = <0x021b8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 864 | interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; |
Huang Shijie | 05e3f8e | 2013-05-28 14:20:09 +0800 | [diff] [blame] | 865 | clocks = <&clks 196>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 866 | }; |
| 867 | |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 868 | ocotp: ocotp@021bc000 { |
| 869 | compatible = "fsl,imx6q-ocotp", "syscon"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 870 | reg = <0x021bc000 0x4000>; |
| 871 | }; |
| 872 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 873 | tzasc@021d0000 { /* TZASC1 */ |
| 874 | reg = <0x021d0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 875 | interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 876 | }; |
| 877 | |
| 878 | tzasc@021d4000 { /* TZASC2 */ |
| 879 | reg = <0x021d4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 880 | interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 881 | }; |
| 882 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 883 | audmux: audmux@021d8000 { |
Richard Zhao | f965cd5 | 2012-05-02 10:32:26 +0800 | [diff] [blame] | 884 | compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 885 | reg = <0x021d8000 0x4000>; |
Richard Zhao | f965cd5 | 2012-05-02 10:32:26 +0800 | [diff] [blame] | 886 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 887 | }; |
| 888 | |
Troy Kisky | 5e0c7cd | 2013-11-14 14:02:08 -0700 | [diff] [blame] | 889 | mipi_csi: mipi@021dc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 890 | reg = <0x021dc000 0x4000>; |
| 891 | }; |
| 892 | |
| 893 | mipi@021e0000 { /* MIPI-DSI */ |
| 894 | reg = <0x021e0000 0x4000>; |
| 895 | }; |
| 896 | |
| 897 | vdoa@021e4000 { |
| 898 | reg = <0x021e4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 899 | interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 900 | }; |
| 901 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 902 | uart2: serial@021e8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 903 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 904 | reg = <0x021e8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 905 | interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 906 | clocks = <&clks 160>, <&clks 161>; |
| 907 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 908 | dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; |
| 909 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 910 | status = "disabled"; |
| 911 | }; |
| 912 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 913 | uart3: serial@021ec000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 914 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 915 | reg = <0x021ec000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 916 | interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 917 | clocks = <&clks 160>, <&clks 161>; |
| 918 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 919 | dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; |
| 920 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 921 | status = "disabled"; |
| 922 | }; |
| 923 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 924 | uart4: serial@021f0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 925 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 926 | reg = <0x021f0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 927 | interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 928 | clocks = <&clks 160>, <&clks 161>; |
| 929 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 930 | dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; |
| 931 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 932 | status = "disabled"; |
| 933 | }; |
| 934 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 935 | uart5: serial@021f4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 936 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 937 | reg = <0x021f4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 938 | interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 939 | clocks = <&clks 160>, <&clks 161>; |
| 940 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 941 | dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; |
| 942 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 943 | status = "disabled"; |
| 944 | }; |
| 945 | }; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 946 | |
| 947 | ipu1: ipu@02400000 { |
| 948 | #crtc-cells = <1>; |
| 949 | compatible = "fsl,imx6q-ipu"; |
| 950 | reg = <0x02400000 0x400000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 951 | interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>, |
| 952 | <0 5 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 953 | clocks = <&clks 130>, <&clks 131>, <&clks 132>; |
| 954 | clock-names = "bus", "di0", "di1"; |
Philipp Zabel | 09ebf36 | 2013-03-28 17:35:20 +0100 | [diff] [blame] | 955 | resets = <&src 2>; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 956 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 957 | }; |
| 958 | }; |