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gerrit-public.fairphone.software / kernel / msm-4.9 / bdc72433ca8be2abfef2c8d843b98e703941d944 / . / arch / arm64 / boot / dts / qcom / sdm845-v2.dtsi
blob: eb5d9e283d3451205d29947656e082240140a235 [file] [log] [blame]
Channagoud Kadabi459f0112017-03-20 12:42:15 -0700[diff] [blame]1/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include "sdm845.dtsi"
Soundrapandian Jeyaprakash3cc03bb2017-08-09 15:16:41 -0700[diff] [blame]14#include "sdm845-v2-camera.dtsi"
Channagoud Kadabi459f0112017-03-20 12:42:15 -0700[diff] [blame]15
16/ {
17 model = "Qualcomm Technologies, Inc. SDM845 V2";
18 qcom,msm-id = <321 0x20000>;
19};
David Collins36050182017-04-26 11:41:22 -0700[diff] [blame]20
Subhash Jadavani0842b272017-07-19 17:05:13 -0700[diff] [blame]21&sdhc_2 {
Subhash Jadavani3497a962017-07-31 13:57:47 -0700[diff] [blame]22 /delete-property/ qcom,sdr104-wa;
Subhash Jadavani0842b272017-07-19 17:05:13 -0700[diff] [blame]23};
24
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]25/delete-node/ &apc0_cpr;
26/delete-node/ &apc1_cpr;
27
Lina Iyerc1e83dc2017-09-27 21:52:38 +0000[diff] [blame]28&tlmm {
29 compatible = "qcom,sdm845-pinctrl-v2";
30};
31
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]32&soc {
33 /* CPR controller regulators */
34 apc0_cpr: cprh-ctrl@17dc0000 {
35 compatible = "qcom,cprh-sdm845-v2-kbss-regulator";
36 reg = <0x17dc0000 0x4000>,
37 <0x00784000 0x1000>,
38 <0x17840000 0x1000>;
39 reg-names = "cpr_ctrl", "fuse_base", "saw";
40 clocks = <&clock_gcc GCC_CPUSS_RBCPR_CLK>;
41 clock-names = "core_clk";
42 qcom,cpr-ctrl-name = "apc0";
43 qcom,cpr-controller-id = <0>;
44
45 qcom,cpr-sensor-time = <1000>;
46 qcom,cpr-loop-time = <5000000>;
47 qcom,cpr-idle-cycles = <15>;
48 qcom,cpr-up-down-delay-time = <3000>;
49 qcom,cpr-step-quot-init-min = <11>;
50 qcom,cpr-step-quot-init-max = <12>;
51 qcom,cpr-count-mode = <0>; /* All at once */
52 qcom,cpr-count-repeat = <20>;
53 qcom,cpr-down-error-step-limit = <1>;
54 qcom,cpr-up-error-step-limit = <1>;
55 qcom,cpr-corner-switch-delay-time = <1042>;
56 qcom,cpr-voltage-settling-time = <1760>;
57 qcom,cpr-reset-step-quot-loop-en;
58
59 qcom,voltage-step = <4000>;
60 qcom,voltage-base = <352000>;
61 qcom,cpr-saw-use-unit-mV;
62
63 qcom,saw-avs-ctrl = <0x101C031>;
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]64 qcom,saw-avs-limit = <0x3E803E8>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]65
66 qcom,cpr-enable;
67 qcom,cpr-hw-closed-loop;
68
69 qcom,cpr-panic-reg-addr-list =
70 <0x17dc3a84 0x17dc3a88 0x17840c18>;
71 qcom,cpr-panic-reg-name-list =
72 "APSS_SILVER_CPRH_STATUS_0",
73 "APSS_SILVER_CPRH_STATUS_1",
74 "SILVER_SAW4_PMIC_STS";
75
David Collinsfc666ff2017-08-31 10:46:18 -0700[diff] [blame]76 qcom,cpr-aging-ref-voltage = <1000000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]77 vdd-supply = <&pm8998_s13>;
78
79 thread@0 {
80 qcom,cpr-thread-id = <0>;
81 qcom,cpr-consecutive-up = <0>;
82 qcom,cpr-consecutive-down = <0>;
83 qcom,cpr-up-threshold = <2>;
84 qcom,cpr-down-threshold = <2>;
85
86 apc0_pwrcl_vreg: regulator {
87 regulator-name = "apc0_pwrcl_corner";
88 regulator-min-microvolt = <1>;
89 regulator-max-microvolt = <18>;
90
91 qcom,cpr-fuse-corners = <4>;
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]92 qcom,cpr-fuse-combos = <24>;
93 qcom,cpr-speed-bins = <3>;
94 qcom,cpr-speed-bin-corners = <18 18 18>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]95 qcom,cpr-corners = <18>;
96
97 qcom,cpr-corner-fmax-map = <6 12 15 18>;
98
99 qcom,cpr-voltage-ceiling =
100 <828000 828000 828000 828000 828000
101 828000 828000 828000 828000 828000
102 828000 828000 828000 828000 828000
David Collins4d7ab0e2017-08-22 14:23:47 -0700[diff] [blame]103 932000 1000000 1000000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]104
105 qcom,cpr-voltage-floor =
106 <568000 568000 568000 568000 568000
107 568000 568000 568000 568000 568000
108 568000 568000 568000 568000 568000
109 568000 568000 568000>;
110
111 qcom,cpr-floor-to-ceiling-max-range =
112 <32000 32000 32000 32000 32000
113 32000 32000 32000 32000 32000
114 32000 32000 32000 32000 32000
115 32000 40000 40000>;
116
117 qcom,corner-frequencies =
118 <300000000 403200000 480000000
119 576000000 652800000 748800000
120 825600000 902400000 979200000
121 1056000000 1132800000 1228800000
122 1324800000 1420800000 1516800000
123 1612800000 1689600000 1766400000>;
124
125 qcom,cpr-ro-scaling-factor =
126 <2594 2795 2576 2761 2469 2673 2198
127 2553 3188 3255 3191 2962 3055 2984
128 2043 2947>,
129 <2594 2795 2576 2761 2469 2673 2198
130 2553 3188 3255 3191 2962 3055 2984
131 2043 2947>,
132 <2259 2389 2387 2531 2294 2464 2218
133 2476 2525 2855 2817 2836 2740 2490
134 1950 2632>,
135 <2259 2389 2387 2531 2294 2464 2218
136 2476 2525 2855 2817 2836 2740 2490
137 1950 2632>;
138
139 qcom,cpr-open-loop-voltage-fuse-adjustment =
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]140 /* Speed bin 0 */
141 < 0 0 12000 12000>,
142 <(-15000) (-15000) (-3000) (-3000)>,
143 <(-15000) (-15000) (-3000) (-3000)>,
144 <(-15000) (-15000) (-3000) (-3000)>,
145 <(-15000) (-15000) (-3000) (-3000)>,
146 <(-15000) (-15000) (-3000) (-3000)>,
147 <(-15000) (-15000) (-3000) (-3000)>,
148 <(-15000) (-15000) (-3000) (-3000)>,
149 /* Speed bin 1 */
150 < 0 0 12000 12000>,
151 <(-15000) (-15000) (-3000) (-3000)>,
152 <(-15000) (-15000) (-3000) (-3000)>,
153 <(-15000) (-15000) (-3000) (-3000)>,
154 <(-15000) (-15000) (-3000) (-3000)>,
155 <(-15000) (-15000) (-3000) (-3000)>,
156 <(-15000) (-15000) (-3000) (-3000)>,
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]157 <(-15000) (-15000) (-3000) (-3000)>,
158 /* Speed bin 2 */
159 < 0 0 12000 12000>,
160 <(-15000) (-15000) (-3000) (-3000)>,
161 <(-15000) (-15000) (-3000) (-3000)>,
162 <(-15000) (-15000) (-3000) (-3000)>,
163 <(-15000) (-15000) (-3000) (-3000)>,
164 <(-15000) (-15000) (-3000) (-3000)>,
165 <(-15000) (-15000) (-3000) (-3000)>,
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]166 <(-15000) (-15000) (-3000) (-3000)>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]167
168 qcom,cpr-closed-loop-voltage-fuse-adjustment =
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]169 /* Speed bin 0 */
170 < 0 0 12000 10000>,
171 <(-15000) (-15000) (-3000) (-5000)>,
172 <(-15000) (-15000) (-3000) (-5000)>,
173 <(-15000) (-15000) (-3000) (-5000)>,
174 <(-15000) (-15000) (-3000) (-5000)>,
175 <(-15000) (-15000) (-3000) (-5000)>,
176 <(-15000) (-15000) (-3000) (-5000)>,
177 <(-15000) (-15000) (-3000) (-5000)>,
178 /* Speed bin 1 */
179 < 0 0 12000 10000>,
180 <(-15000) (-15000) (-3000) (-5000)>,
181 <(-15000) (-15000) (-3000) (-5000)>,
182 <(-15000) (-15000) (-3000) (-5000)>,
183 <(-15000) (-15000) (-3000) (-5000)>,
184 <(-15000) (-15000) (-3000) (-5000)>,
185 <(-15000) (-15000) (-3000) (-5000)>,
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]186 <(-15000) (-15000) (-3000) (-5000)>,
187 /* Speed bin 2 */
188 < 0 0 12000 10000>,
189 <(-15000) (-15000) (-3000) (-5000)>,
190 <(-15000) (-15000) (-3000) (-5000)>,
191 <(-15000) (-15000) (-3000) (-5000)>,
192 <(-15000) (-15000) (-3000) (-5000)>,
193 <(-15000) (-15000) (-3000) (-5000)>,
194 <(-15000) (-15000) (-3000) (-5000)>,
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]195 <(-15000) (-15000) (-3000) (-5000)>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]196
197 qcom,allow-voltage-interpolation;
198 qcom,allow-quotient-interpolation;
199 qcom,cpr-scaled-open-loop-voltage-as-ceiling;
200
201 qcom,cpr-aging-max-voltage-adjustment = <15000>;
202 qcom,cpr-aging-ref-corner = <18>;
203 qcom,cpr-aging-ro-scaling-factor = <1620>;
204 qcom,allow-aging-voltage-adjustment =
205 /* Speed bin 0 */
206 <0 1 1 1 1 1 1 1>,
207 /* Speed bin 1 */
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]208 <0 1 1 1 1 1 1 1>,
209 /* Speed bin 2 */
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]210 <0 1 1 1 1 1 1 1>;
211 qcom,allow-aging-open-loop-voltage-adjustment =
212 <1>;
213 };
214 };
215
216 thread@1 {
217 qcom,cpr-thread-id = <1>;
218 qcom,cpr-consecutive-up = <0>;
219 qcom,cpr-consecutive-down = <0>;
220 qcom,cpr-up-threshold = <2>;
221 qcom,cpr-down-threshold = <2>;
222
223 apc0_l3_vreg: regulator {
224 regulator-name = "apc0_l3_corner";
225 regulator-min-microvolt = <1>;
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]226 regulator-max-microvolt = <15>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]227
228 qcom,cpr-fuse-corners = <4>;
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]229 qcom,cpr-fuse-combos = <24>;
230 qcom,cpr-speed-bins = <3>;
231 qcom,cpr-speed-bin-corners = <14 15 15>;
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]232 qcom,cpr-corners =
233 /* Speed bin 0 */
234 <14 14 14 14 14 14 14 14>,
235 /* Speed bin 1 */
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]236 <15 15 15 15 15 15 15 15>,
237 /* Speed bin 2 */
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]238 <15 15 15 15 15 15 15 15>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]239
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]240 qcom,cpr-corner-fmax-map =
241 /* Speed bin 0 */
242 <4 8 11 14>,
243 /* Speed bin 1 */
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]244 <4 8 11 15>,
245 /* Speed bin 2 */
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]246 <4 8 11 15>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]247
248 qcom,cpr-voltage-ceiling =
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]249 /* Speed bin 0 */
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]250 <828000 828000 828000 828000 828000
251 828000 828000 828000 828000 828000
David Collins4d7ab0e2017-08-22 14:23:47 -0700[diff] [blame]252 828000 932000 932000 1000000>,
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]253 /* Speed bin 1 */
254 <828000 828000 828000 828000 828000
255 828000 828000 828000 828000 828000
David Collins4d7ab0e2017-08-22 14:23:47 -0700[diff] [blame]256 828000 932000 932000 1000000
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]257 1000000>,
258 /* Speed bin 2 */
259 <828000 828000 828000 828000 828000
260 828000 828000 828000 828000 828000
261 828000 932000 932000 1000000
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]262 1000000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]263
264 qcom,cpr-voltage-floor =
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]265 /* Speed bin 0 */
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]266 <568000 568000 568000 568000 568000
267 568000 568000 568000 568000 568000
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]268 568000 568000 568000 568000>,
269 /* Speed bin 1 */
270 <568000 568000 568000 568000 568000
271 568000 568000 568000 568000 568000
272 568000 568000 568000 568000
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]273 568000>,
274 /* Speed bin 2 */
275 <568000 568000 568000 568000 568000
276 568000 568000 568000 568000 568000
277 568000 568000 568000 568000
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]278 568000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]279
280 qcom,cpr-floor-to-ceiling-max-range =
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]281 /* Speed bin 0 */
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]282 <32000 32000 32000 32000 32000
283 32000 32000 32000 32000 32000
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]284 32000 32000 32000 40000>,
285 /* Speed bin 1 */
286 <32000 32000 32000 32000 32000
287 32000 32000 32000 32000 32000
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]288 32000 32000 32000 40000 40000>,
289 /* Speed bin 2 */
290 <32000 32000 32000 32000 32000
291 32000 32000 32000 32000 32000
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]292 32000 32000 32000 40000 40000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]293
294 qcom,corner-frequencies =
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]295 /* Speed bin 0 */
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]296 <300000000 403200000 480000000
297 576000000 652800000 748800000
298 844800000 940800000 1036800000
299 1132800000 1209600000 1305600000
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]300 1401600000 1478400000>,
301 /* Speed bin 1 */
302 <300000000 403200000 480000000
303 576000000 652800000 748800000
304 844800000 940800000 1036800000
305 1132800000 1209600000 1305600000
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]306 1401600000 1497600000 1593600000>,
307 /* Speed bin 2 */
308 <300000000 403200000 480000000
309 576000000 652800000 748800000
310 844800000 940800000 1036800000
311 1132800000 1209600000 1305600000
David Collinsb7d8a0a2017-08-10 17:54:03 -0700[diff] [blame]312 1401600000 1497600000 1593600000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]313
314 qcom,cpr-ro-scaling-factor =
315 <2857 3056 2828 2952 2699 2796 2447
316 2631 2630 2579 2244 3343 3287 3137
317 3164 2656>,
318 <2857 3056 2828 2952 2699 2796 2447
319 2631 2630 2579 2244 3343 3287 3137
320 3164 2656>,
321 <2439 2577 2552 2667 2461 2577 2394
322 2536 2132 2307 2191 2903 2838 2912
323 2501 2095>,
324 <2439 2577 2552 2667 2461 2577 2394
325 2536 2132 2307 2191 2903 2838 2912
326 2501 2095>;
327
328 qcom,cpr-open-loop-voltage-fuse-adjustment =
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]329 /* Speed bin 0 */
330 < 8000 16000 16000 12000>,
331 < (-7000) 1000 1000 (-3000)>,
332 < (-7000) 1000 1000 (-3000)>,
333 < (-7000) 1000 1000 (-3000)>,
334 < (-7000) 1000 1000 (-3000)>,
335 < (-7000) 1000 1000 (-3000)>,
336 < (-7000) 1000 1000 (-3000)>,
337 < (-7000) 1000 1000 (-3000)>,
338 /* Speed bin 1 */
339 < 8000 16000 16000 12000>,
340 < (-7000) 1000 1000 (-3000)>,
341 < (-7000) 1000 1000 (-3000)>,
342 < (-7000) 1000 1000 (-3000)>,
343 < (-7000) 1000 1000 (-3000)>,
344 < (-7000) 1000 1000 (-3000)>,
345 < (-7000) 1000 1000 (-3000)>,
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]346 < (-7000) 1000 1000 (-3000)>,
347 /* Speed bin 2 */
348 < 8000 16000 16000 12000>,
349 < (-7000) 1000 1000 (-3000)>,
350 < (-7000) 1000 1000 (-3000)>,
351 < (-7000) 1000 1000 (-3000)>,
352 < (-7000) 1000 1000 (-3000)>,
353 < (-7000) 1000 1000 (-3000)>,
354 < (-7000) 1000 1000 (-3000)>,
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]355 < (-7000) 1000 1000 (-3000)>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]356
357 qcom,cpr-closed-loop-voltage-fuse-adjustment =
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]358 /* Speed bin 0 */
359 < 6000 14000 16000 12000>,
360 < (-9000) (-1000) 1000 (-3000)>,
361 < (-9000) (-1000) 1000 (-3000)>,
362 < (-9000) (-1000) 1000 (-3000)>,
363 < (-9000) (-1000) 1000 (-3000)>,
364 < (-9000) (-1000) 1000 (-3000)>,
365 < (-9000) (-1000) 1000 (-3000)>,
366 < (-9000) (-1000) 1000 (-3000)>,
367 /* Speed bin 1 */
368 < 6000 14000 16000 12000>,
369 < (-9000) (-1000) 1000 (-3000)>,
370 < (-9000) (-1000) 1000 (-3000)>,
371 < (-9000) (-1000) 1000 (-3000)>,
372 < (-9000) (-1000) 1000 (-3000)>,
373 < (-9000) (-1000) 1000 (-3000)>,
374 < (-9000) (-1000) 1000 (-3000)>,
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]375 < (-9000) (-1000) 1000 (-3000)>,
376 /* Speed bin 2 */
377 < 6000 14000 16000 12000>,
378 < (-9000) (-1000) 1000 (-3000)>,
379 < (-9000) (-1000) 1000 (-3000)>,
380 < (-9000) (-1000) 1000 (-3000)>,
381 < (-9000) (-1000) 1000 (-3000)>,
382 < (-9000) (-1000) 1000 (-3000)>,
383 < (-9000) (-1000) 1000 (-3000)>,
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]384 < (-9000) (-1000) 1000 (-3000)>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]385
386 qcom,allow-voltage-interpolation;
387 qcom,allow-quotient-interpolation;
388 qcom,cpr-scaled-open-loop-voltage-as-ceiling;
389
390 qcom,cpr-aging-max-voltage-adjustment = <15000>;
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]391 qcom,cpr-aging-ref-corner = <14 15 15>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]392 qcom,cpr-aging-ro-scaling-factor = <1620>;
393 qcom,allow-aging-voltage-adjustment =
394 /* Speed bin 0 */
395 <0 1 1 1 1 1 1 1>,
396 /* Speed bin 1 */
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]397 <0 1 1 1 1 1 1 1>,
398 /* Speed bin 2 */
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]399 <0 1 1 1 1 1 1 1>;
400 qcom,allow-aging-open-loop-voltage-adjustment =
401 <1>;
402 };
403 };
404 };
405
406 apc1_cpr: cprh-ctrl@17db0000 {
407 compatible = "qcom,cprh-sdm845-v2-kbss-regulator";
408 reg = <0x17db0000 0x4000>,
409 <0x00784000 0x1000>,
410 <0x17830000 0x1000>;
411 reg-names = "cpr_ctrl", "fuse_base", "saw";
412 clocks = <&clock_gcc GCC_CPUSS_RBCPR_CLK>;
413 clock-names = "core_clk";
414 qcom,cpr-ctrl-name = "apc1";
415 qcom,cpr-controller-id = <1>;
416
417 qcom,cpr-sensor-time = <1000>;
418 qcom,cpr-loop-time = <5000000>;
419 qcom,cpr-idle-cycles = <15>;
420 qcom,cpr-up-down-delay-time = <3000>;
421 qcom,cpr-step-quot-init-min = <9>;
422 qcom,cpr-step-quot-init-max = <14>;
423 qcom,cpr-count-mode = <0>; /* All at once */
424 qcom,cpr-count-repeat = <20>;
425 qcom,cpr-down-error-step-limit = <1>;
426 qcom,cpr-up-error-step-limit = <1>;
427 qcom,cpr-corner-switch-delay-time = <1042>;
428 qcom,cpr-voltage-settling-time = <1760>;
429 qcom,cpr-reset-step-quot-loop-en;
430
431 qcom,apm-threshold-voltage = <800000>;
432 qcom,apm-crossover-voltage = <880000>;
433 qcom,mem-acc-threshold-voltage = <852000>;
434 qcom,mem-acc-crossover-voltage = <852000>;
435
436 qcom,voltage-step = <4000>;
437 qcom,voltage-base = <352000>;
438 qcom,cpr-saw-use-unit-mV;
439
440 qcom,saw-avs-ctrl = <0x101C031>;
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]441 qcom,saw-avs-limit = <0x4880488>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]442
443 qcom,cpr-enable;
444 qcom,cpr-hw-closed-loop;
445
446 qcom,cpr-panic-reg-addr-list =
447 <0x17db3a84 0x17830c18>;
448 qcom,cpr-panic-reg-name-list =
449 "APSS_GOLD_CPRH_STATUS_0", "GOLD_SAW4_PMIC_STS";
450
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]451 qcom,cpr-aging-ref-voltage = <1160000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]452 vdd-supply = <&pm8998_s12>;
453
454 thread@0 {
455 qcom,cpr-thread-id = <0>;
456 qcom,cpr-consecutive-up = <0>;
457 qcom,cpr-consecutive-down = <0>;
458 qcom,cpr-up-threshold = <2>;
459 qcom,cpr-down-threshold = <2>;
460
461 apc1_perfcl_vreg: regulator {
462 regulator-name = "apc1_perfcl_corner";
463 regulator-min-microvolt = <1>;
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]464 regulator-max-microvolt = <35>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]465
466 qcom,cpr-fuse-corners = <5>;
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]467 qcom,cpr-fuse-combos = <24>;
468 qcom,cpr-speed-bins = <3>;
469 qcom,cpr-speed-bin-corners = <28 31 33>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]470 qcom,cpr-corners =
471 /* Speed bin 0 */
472 <28 28 28 28 28 28 28 28>,
473 /* Speed bin 1 */
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]474 <31 31 31 31 31 31 31 31>,
475 /* Speed bin 2 */
476 <33 33 33 33 33 33 33 33>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]477
478 qcom,cpr-corner-fmax-map =
479 /* Speed bin 0 */
480 <7 14 22 27 28>,
481 /* Speed bin 1 */
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]482 <7 14 22 27 31>,
483 /* Speed bin 2 */
484 <7 14 22 30 33>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]485
486 qcom,cpr-voltage-ceiling =
487 /* Speed bin 0 */
488 <828000 828000 828000 828000 828000
489 828000 828000 828000 828000 828000
490 828000 828000 828000 828000 828000
David Collins4d7ab0e2017-08-22 14:23:47 -0700[diff] [blame]491 828000 828000 828000 932000 932000
492 932000 932000 1104000 1104000 1104000
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]493 1104000 1160000 1160000>,
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]494 /* Speed bin 1 */
495 <828000 828000 828000 828000 828000
496 828000 828000 828000 828000 828000
497 828000 828000 828000 828000 828000
David Collins4d7ab0e2017-08-22 14:23:47 -0700[diff] [blame]498 828000 828000 828000 932000 932000
499 932000 932000 1104000 1104000 1104000
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]500 1104000 1160000 1160000 1160000 1160000
501 1160000>,
502 /* Speed bin 2 */
503 <828000 828000 828000 828000 828000
504 828000 828000 828000 828000 828000
505 828000 828000 828000 828000 828000
506 828000 828000 828000 932000 932000
507 932000 932000 1104000 1104000 1104000
508 1104000 1160000 1160000 1160000 1160000
509 1160000 1160000 1160000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]510
511 qcom,cpr-voltage-floor =
512 /* Speed bin 0 */
513 <568000 568000 568000 568000 568000
514 568000 568000 568000 568000 568000
515 568000 568000 568000 568000 568000
516 568000 568000 568000 568000 568000
517 568000 568000 568000 568000 568000
518 568000 568000 568000>,
519 /* Speed bin 1 */
520 <568000 568000 568000 568000 568000
521 568000 568000 568000 568000 568000
522 568000 568000 568000 568000 568000
523 568000 568000 568000 568000 568000
524 568000 568000 568000 568000 568000
525 568000 568000 568000 568000 568000
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]526 568000>,
527 /* Speed bin 2 */
528 <568000 568000 568000 568000 568000
529 568000 568000 568000 568000 568000
530 568000 568000 568000 568000 568000
531 568000 568000 568000 568000 568000
532 568000 568000 568000 568000 568000
533 568000 568000 568000 568000 568000
534 568000 568000 568000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]535
536 qcom,cpr-floor-to-ceiling-max-range =
537 /* Speed bin 0 */
538 <32000 32000 32000 32000 32000
539 32000 32000 32000 32000 32000
540 32000 32000 32000 32000 32000
541 32000 32000 32000 32000 32000
542 32000 32000 32000 32000 32000
543 32000 32000 32000>,
544 /* Speed bin 1 */
545 <32000 32000 32000 32000 32000
546 32000 32000 32000 32000 32000
547 32000 32000 32000 32000 32000
548 32000 32000 32000 32000 32000
549 32000 32000 32000 32000 32000
550 32000 32000 40000 40000 40000
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]551 40000>,
552 /* Speed bin 2 */
553 <32000 32000 32000 32000 32000
554 32000 32000 32000 32000 32000
555 32000 32000 32000 32000 32000
556 32000 32000 32000 32000 32000
557 32000 32000 32000 32000 32000
558 32000 32000 40000 40000 40000
559 40000 40000 40000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]560
561 qcom,corner-frequencies =
562 /* Speed bin 0 */
563 <300000000 403200000 480000000
564 576000000 652800000 748800000
565 825600000 902400000 979200000
566 1056000000 1132800000 1209600000
567 1286400000 1363200000 1459200000
568 1536000000 1612800000 1689600000
569 1766400000 1843200000 1920000000
570 1996800000 2092800000 2169600000
571 2246400000 2323200000 2400000000
572 2400000000>,
573 /* Speed bin 1 */
574 <300000000 403200000 480000000
575 576000000 652800000 748800000
576 825600000 902400000 979200000
577 1056000000 1132800000 1209600000
578 1286400000 1363200000 1459200000
579 1536000000 1612800000 1689600000
580 1766400000 1843200000 1920000000
581 1996800000 2092800000 2169600000
582 2246400000 2323200000 2400000000
David Collinsae2591d2017-08-22 14:15:14 -0700[diff] [blame]583 2476800000 2553600000 2649600000
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]584 2707200000>,
585 /* Speed bin 2 */
586 <300000000 403200000 480000000
587 576000000 652800000 748800000
588 825600000 902400000 979200000
589 1056000000 1132800000 1209600000
590 1286400000 1363200000 1459200000
591 1536000000 1612800000 1689600000
592 1766400000 1843200000 1920000000
593 1996800000 2092800000 2169600000
594 2246400000 2323200000 2400000000
595 2476800000 2553600000 2649600000
596 2707200000 2726400000 2745600000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]597
598 qcom,cpr-ro-scaling-factor =
599 <2857 3056 2828 2952 2699 2796 2447
600 2631 2630 2579 2244 3343 3287 3137
601 3164 2656>,
602 <2857 3056 2828 2952 2699 2796 2447
603 2631 2630 2579 2244 3343 3287 3137
604 3164 2656>,
605 <2086 2208 2273 2408 2203 2327 2213
606 2340 1755 2039 2049 2474 2437 2618
607 2003 1675>,
608 <2086 2208 2273 2408 2203 2327 2213
609 2340 1755 2039 2049 2474 2437 2618
610 2003 1675>,
611 <2086 2208 2273 2408 2203 2327 2213
612 2340 1755 2039 2049 2474 2437 2618
613 2003 1675>;
614
615 qcom,cpr-open-loop-voltage-fuse-adjustment =
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]616 /* Speed bin 0 */
617 < 8000 8000 8000 0 0>,
618 < (-7000) (-7000) (-7000) (-15000) (-15000)>,
619 < (-7000) (-7000) (-7000) (-15000) (-15000)>,
620 < (-7000) (-7000) (-7000) (-15000) (-15000)>,
621 < (-7000) (-7000) (-7000) (-15000) (-15000)>,
622 < (-7000) (-7000) (-7000) (-15000) (-15000)>,
623 < (-7000) (-7000) (-7000) (-15000) (-15000)>,
624 < (-7000) (-7000) (-7000) (-15000) (-15000)>,
625 /* Speed bin 1 */
626 < 8000 8000 8000 0 16000>,
627 < (-7000) (-7000) (-7000) (-15000) 1000>,
628 < (-7000) (-7000) (-7000) (-15000) 1000>,
629 < (-7000) (-7000) (-7000) (-15000) 1000>,
630 < (-7000) (-7000) (-7000) (-15000) 1000>,
631 < (-7000) (-7000) (-7000) (-15000) 1000>,
632 < (-7000) (-7000) (-7000) (-15000) 1000>,
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]633 < (-7000) (-7000) (-7000) (-15000) 1000>,
634 /* Speed bin 2 */
635 < 8000 8000 8000 0 16000>,
636 < (-7000) (-7000) (-7000) (-15000) 1000>,
637 < (-7000) (-7000) (-7000) (-15000) 1000>,
638 < (-7000) (-7000) (-7000) (-15000) 1000>,
639 < (-7000) (-7000) (-7000) (-15000) 1000>,
640 < (-7000) (-7000) (-7000) (-15000) 1000>,
641 < (-7000) (-7000) (-7000) (-15000) 1000>,
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]642 < (-7000) (-7000) (-7000) (-15000) 1000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]643
644 qcom,cpr-closed-loop-voltage-fuse-adjustment =
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]645 /* Speed bin 0 */
646 < 6000 6000 8000 0 0>,
647 < (-9000) (-9000) (-7000) (-15000) (-15000)>,
648 < (-9000) (-9000) (-7000) (-15000) (-15000)>,
649 < (-9000) (-9000) (-7000) (-15000) (-15000)>,
650 < (-9000) (-9000) (-7000) (-15000) (-15000)>,
651 < (-9000) (-9000) (-7000) (-15000) (-15000)>,
652 < (-9000) (-9000) (-7000) (-15000) (-15000)>,
653 < (-9000) (-9000) (-7000) (-15000) (-15000)>,
654 /* Speed bin 1 */
655 < 6000 6000 8000 0 16000>,
656 < (-9000) (-9000) (-7000) (-15000) 1000>,
657 < (-9000) (-9000) (-7000) (-15000) 1000>,
658 < (-9000) (-9000) (-7000) (-15000) 1000>,
659 < (-9000) (-9000) (-7000) (-15000) 1000>,
660 < (-9000) (-9000) (-7000) (-15000) 1000>,
661 < (-9000) (-9000) (-7000) (-15000) 1000>,
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]662 < (-9000) (-9000) (-7000) (-15000) 1000>,
663 /* Speed bin 2 */
664 < 6000 6000 8000 0 16000>,
665 < (-9000) (-9000) (-7000) (-15000) 1000>,
666 < (-9000) (-9000) (-7000) (-15000) 1000>,
667 < (-9000) (-9000) (-7000) (-15000) 1000>,
668 < (-9000) (-9000) (-7000) (-15000) 1000>,
669 < (-9000) (-9000) (-7000) (-15000) 1000>,
670 < (-9000) (-9000) (-7000) (-15000) 1000>,
David Collins85d44cb2017-09-11 17:45:16 -0700[diff] [blame]671 < (-9000) (-9000) (-7000) (-15000) 1000>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]672
673 qcom,allow-voltage-interpolation;
674 qcom,allow-quotient-interpolation;
675 qcom,cpr-scaled-open-loop-voltage-as-ceiling;
676
677 qcom,cpr-aging-max-voltage-adjustment = <15000>;
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]678 qcom,cpr-aging-ref-corner = <27 31 33>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]679 qcom,cpr-aging-ro-scaling-factor = <1700>;
680 qcom,allow-aging-voltage-adjustment =
681 /* Speed bin 0 */
682 <0 1 1 1 1 1 1 1>,
683 /* Speed bin 1 */
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]684 <0 1 1 1 1 1 1 1>,
685 /* Speed bin 2 */
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]686 <0 1 1 1 1 1 1 1>;
687 qcom,allow-aging-open-loop-voltage-adjustment =
688 <1>;
689 };
690 };
691 };
Vicky Wallaceddf4fad2017-08-03 20:15:55 -0700[diff] [blame]692
693 gpu_gx_domain_addr: syscon@0x5091508 {
694 compatible = "syscon";
695 reg = <0x5091508 0x4>;
696 };
697
698 gpu_gx_sw_reset: syscon@0x5091008 {
699 compatible = "syscon";
700 reg = <0x5091008 0x4>;
701 };
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]702};
703
Kyle Yanf248e352017-09-14 11:15:58 -0700[diff] [blame]704&pil_modem {
705 qcom,mss_pdc_offset = <9>;
706};
707
David Collinsfc666ff2017-08-31 10:46:18 -0700[diff] [blame]708/* VDD_APC0 */
709&pm8998_s13 {
710 regulator-min-microvolt = <568000>;
711 regulator-max-microvolt = <1000000>;
712};
713
714/* VDD_APC1 */
715&pm8998_s12 {
716 regulator-min-microvolt = <568000>;
David Collinsd6f48992017-09-12 15:52:19 -0700[diff] [blame]717 regulator-max-microvolt = <1160000>;
David Collinsfc666ff2017-08-31 10:46:18 -0700[diff] [blame]718};
719
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]720&clock_cpucc {
Deepak Katragaddaa442baa2017-07-11 12:27:06 -0700[diff] [blame]721 compatible = "qcom,clk-cpu-osm-v2";
722
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]723 vdd-l3-supply = <&apc0_l3_vreg>;
724 vdd-pwrcl-supply = <&apc0_pwrcl_vreg>;
Deepak Katragaddaa442baa2017-07-11 12:27:06 -0700[diff] [blame]725 vdd-perfcl-supply = <&apc1_perfcl_vreg>;
726
727 qcom,l3-speedbin0-v0 =
728 < 300000000 0x000c000f 0x00002020 0x1 1 >,
729 < 403200000 0x500c0115 0x00002020 0x1 2 >,
730 < 480000000 0x50140219 0x00002020 0x1 3 >,
731 < 576000000 0x5014031e 0x00002020 0x1 4 >,
732 < 652800000 0x401c0422 0x00002020 0x1 5 >,
733 < 748800000 0x401c0527 0x00002020 0x1 6 >,
734 < 844800000 0x4024062c 0x00002323 0x2 7 >,
735 < 940800000 0x40240731 0x00002727 0x2 8 >,
736 < 1036800000 0x40240836 0x00002b2b 0x2 9 >,
737 < 1132800000 0x402c093b 0x00002f2f 0x2 10 >,
738 < 1209600000 0x402c0a3f 0x00003232 0x2 11 >,
739 < 1305600000 0x40340b44 0x00003636 0x2 12 >,
740 < 1401600000 0x40340c49 0x00003a3a 0x2 13 >,
741 < 1478400000 0x403c0d4d 0x00003e3e 0x2 14 >;
742
Deepak Katragadda288d2b52017-08-11 10:13:59 -0700[diff] [blame]743 qcom,l3-speedbin1-v0 =
744 < 300000000 0x000c000f 0x00002020 0x1 1 >,
745 < 403200000 0x500c0115 0x00002020 0x1 2 >,
746 < 480000000 0x50140219 0x00002020 0x1 3 >,
747 < 576000000 0x5014031e 0x00002020 0x1 4 >,
748 < 652800000 0x401c0422 0x00002020 0x1 5 >,
749 < 748800000 0x401c0527 0x00002020 0x1 6 >,
750 < 844800000 0x4024062c 0x00002323 0x2 7 >,
751 < 940800000 0x40240731 0x00002727 0x2 8 >,
752 < 1036800000 0x40240836 0x00002b2b 0x2 9 >,
753 < 1132800000 0x402c093b 0x00002f2f 0x2 10 >,
754 < 1209600000 0x402c0a3f 0x00003232 0x2 11 >,
755 < 1305600000 0x40340b44 0x00003636 0x2 12 >,
756 < 1401600000 0x40340c49 0x00003a3a 0x2 13 >,
757 < 1497600000 0x403c0d4e 0x00003e3e 0x2 14 >,
758 < 1593600000 0x403c0e53 0x00004242 0x2 15 >;
759
Deepak Katragadda97c8e6a2017-09-12 12:19:50 -0700[diff] [blame]760 qcom,l3-speedbin2-v0 =
761 < 300000000 0x000c000f 0x00002020 0x1 1 >,
762 < 403200000 0x500c0115 0x00002020 0x1 2 >,
763 < 480000000 0x50140219 0x00002020 0x1 3 >,
764 < 576000000 0x5014031e 0x00002020 0x1 4 >,
765 < 652800000 0x401c0422 0x00002020 0x1 5 >,
766 < 748800000 0x401c0527 0x00002020 0x1 6 >,
767 < 844800000 0x4024062c 0x00002323 0x2 7 >,
768 < 940800000 0x40240731 0x00002727 0x2 8 >,
769 < 1036800000 0x40240836 0x00002b2b 0x2 9 >,
770 < 1132800000 0x402c093b 0x00002f2f 0x2 10 >,
771 < 1209600000 0x402c0a3f 0x00003232 0x2 11 >,
772 < 1305600000 0x40340b44 0x00003636 0x2 12 >,
773 < 1401600000 0x40340c49 0x00003a3a 0x2 13 >,
774 < 1497600000 0x403c0d4e 0x00003e3e 0x2 14 >,
775 < 1593600000 0x403c0e53 0x00004242 0x2 15 >;
776
Deepak Katragaddaa442baa2017-07-11 12:27:06 -0700[diff] [blame]777 qcom,pwrcl-speedbin0-v0 =
778 < 300000000 0x000c000f 0x00002020 0x1 1 >,
779 < 403200000 0x500c0115 0x00002020 0x1 2 >,
780 < 480000000 0x50140219 0x00002020 0x1 3 >,
781 < 576000000 0x5014031e 0x00002020 0x1 4 >,
782 < 652800000 0x401c0422 0x00002020 0x1 5 >,
783 < 748800000 0x401c0527 0x00002020 0x1 6 >,
784 < 825600000 0x401c062b 0x00002222 0x1 7 >,
785 < 902400000 0x4024072f 0x00002626 0x1 8 >,
786 < 979200000 0x40240833 0x00002929 0x1 9 >,
787 < 1056000000 0x402c0937 0x00002c2c 0x2 10 >,
788 < 1132800000 0x402c0a3b 0x00002f2f 0x2 11 >,
789 < 1228800000 0x402c0b40 0x00003333 0x2 12 >,
790 < 1324800000 0x40340c45 0x00003737 0x2 13 >,
791 < 1420800000 0x40340d4a 0x00003b3b 0x2 14 >,
792 < 1516800000 0x403c0e4f 0x00003f3f 0x2 15 >,
793 < 1612800000 0x403c0f54 0x00004343 0x2 16 >,
794 < 1689600000 0x40441058 0x00004646 0x2 17 >,
795 < 1766400000 0x4044115c 0x00004a4a 0x2 18 >;
796
Deepak Katragadda401fcb92017-08-21 16:30:15 -0700[diff] [blame]797 qcom,pwrcl-speedbin1-v0 =
798 < 300000000 0x000c000f 0x00002020 0x1 1 >,
799 < 403200000 0x500c0115 0x00002020 0x1 2 >,
800 < 480000000 0x50140219 0x00002020 0x1 3 >,
801 < 576000000 0x5014031e 0x00002020 0x1 4 >,
802 < 652800000 0x401c0422 0x00002020 0x1 5 >,
803 < 748800000 0x401c0527 0x00002020 0x1 6 >,
804 < 825600000 0x401c062b 0x00002222 0x1 7 >,
805 < 902400000 0x4024072f 0x00002626 0x1 8 >,
806 < 979200000 0x40240833 0x00002929 0x1 9 >,
807 < 1056000000 0x402c0937 0x00002c2c 0x2 10 >,
808 < 1132800000 0x402c0a3b 0x00002f2f 0x2 11 >,
809 < 1228800000 0x402c0b40 0x00003333 0x2 12 >,
810 < 1324800000 0x40340c45 0x00003737 0x2 13 >,
811 < 1420800000 0x40340d4a 0x00003b3b 0x2 14 >,
812 < 1516800000 0x403c0e4f 0x00003f3f 0x2 15 >,
813 < 1612800000 0x403c0f54 0x00004343 0x2 16 >,
814 < 1689600000 0x40441058 0x00004646 0x2 17 >,
815 < 1766400000 0x4044115c 0x00004a4a 0x2 18 >;
816
Deepak Katragadda97c8e6a2017-09-12 12:19:50 -0700[diff] [blame]817 qcom,pwrcl-speedbin2-v0 =
818 < 300000000 0x000c000f 0x00002020 0x1 1 >,
819 < 403200000 0x500c0115 0x00002020 0x1 2 >,
820 < 480000000 0x50140219 0x00002020 0x1 3 >,
821 < 576000000 0x5014031e 0x00002020 0x1 4 >,
822 < 652800000 0x401c0422 0x00002020 0x1 5 >,
823 < 748800000 0x401c0527 0x00002020 0x1 6 >,
824 < 825600000 0x401c062b 0x00002222 0x1 7 >,
825 < 902400000 0x4024072f 0x00002626 0x1 8 >,
826 < 979200000 0x40240833 0x00002929 0x1 9 >,
827 < 1056000000 0x402c0937 0x00002c2c 0x2 10 >,
828 < 1132800000 0x402c0a3b 0x00002f2f 0x2 11 >,
829 < 1228800000 0x402c0b40 0x00003333 0x2 12 >,
830 < 1324800000 0x40340c45 0x00003737 0x2 13 >,
831 < 1420800000 0x40340d4a 0x00003b3b 0x2 14 >,
832 < 1516800000 0x403c0e4f 0x00003f3f 0x2 15 >,
833 < 1612800000 0x403c0f54 0x00004343 0x2 16 >,
834 < 1689600000 0x40441058 0x00004646 0x2 17 >,
835 < 1766400000 0x4044115c 0x00004a4a 0x2 18 >;
836
Deepak Katragaddaa442baa2017-07-11 12:27:06 -0700[diff] [blame]837 qcom,perfcl-speedbin0-v0 =
838 < 300000000 0x000c000f 0x00002020 0x1 1 >,
839 < 403200000 0x500c0115 0x00002020 0x1 2 >,
840 < 480000000 0x50140219 0x00002020 0x1 3 >,
841 < 576000000 0x5014031e 0x00002020 0x1 4 >,
842 < 652800000 0x401c0422 0x00002020 0x1 5 >,
843 < 748800000 0x401c0527 0x00002020 0x1 6 >,
844 < 825600000 0x401c062b 0x00002222 0x1 7 >,
845 < 902400000 0x4024072f 0x00002626 0x1 8 >,
846 < 979200000 0x40240833 0x00002929 0x1 9 >,
847 < 1056000000 0x402c0937 0x00002c2c 0x1 10 >,
848 < 1132800000 0x402c0a3b 0x00002f2f 0x1 11 >,
849 < 1209600000 0x402c0b3f 0x00003232 0x2 12 >,
850 < 1286400000 0x40340c43 0x00003636 0x2 13 >,
851 < 1363200000 0x40340d47 0x00003939 0x2 14 >,
852 < 1459200000 0x403c0e4c 0x00003d3d 0x2 15 >,
853 < 1536000000 0x403c0f50 0x00004040 0x2 16 >,
854 < 1612800000 0x403c1054 0x00004343 0x2 17 >,
855 < 1689600000 0x40441158 0x00004646 0x2 18 >,
856 < 1766400000 0x4044125c 0x00004a4a 0x2 19 >,
857 < 1843200000 0x40441360 0x00004d4d 0x2 20 >,
858 < 1920000000 0x404c1464 0x00005050 0x2 21 >,
859 < 1996800000 0x404c1568 0x00005353 0x2 22 >,
860 < 2092800000 0x4054166d 0x00005757 0x2 23 >,
861 < 2169600000 0x40541771 0x00005a5a 0x2 24 >,
862 < 2246400000 0x40541875 0x00005e5e 0x2 25 >,
863 < 2323200000 0x40541979 0x00006161 0x2 26 >,
864 < 2400000000 0x40541a7d 0x00006464 0x2 27 >;
865
866 qcom,perfcl-speedbin1-v0 =
867 < 300000000 0x000c000f 0x00002020 0x1 1 >,
868 < 403200000 0x500c0115 0x00002020 0x1 2 >,
869 < 480000000 0x50140219 0x00002020 0x1 3 >,
870 < 576000000 0x5014031e 0x00002020 0x1 4 >,
871 < 652800000 0x401c0422 0x00002020 0x1 5 >,
872 < 748800000 0x401c0527 0x00002020 0x1 6 >,
873 < 825600000 0x401c062b 0x00002222 0x1 7 >,
874 < 902400000 0x4024072f 0x00002626 0x1 8 >,
875 < 979200000 0x40240833 0x00002929 0x1 9 >,
876 < 1056000000 0x402c0937 0x00002c2c 0x1 10 >,
877 < 1132800000 0x402c0a3b 0x00002f2f 0x1 11 >,
878 < 1209600000 0x402c0b3f 0x00003232 0x2 12 >,
879 < 1286400000 0x40340c43 0x00003636 0x2 13 >,
880 < 1363200000 0x40340d47 0x00003939 0x2 14 >,
881 < 1459200000 0x403c0e4c 0x00003d3d 0x2 15 >,
882 < 1536000000 0x403c0f50 0x00004040 0x2 16 >,
883 < 1612800000 0x403c1054 0x00004343 0x2 17 >,
884 < 1689600000 0x40441158 0x00004646 0x2 18 >,
885 < 1766400000 0x4044125c 0x00004a4a 0x2 19 >,
886 < 1843200000 0x40441360 0x00004d4d 0x2 20 >,
887 < 1920000000 0x404c1464 0x00005050 0x2 21 >,
888 < 1996800000 0x404c1568 0x00005353 0x2 22 >,
889 < 2092800000 0x4054166d 0x00005757 0x2 23 >,
890 < 2169600000 0x40541771 0x00005a5a 0x2 24 >,
891 < 2246400000 0x40541875 0x00005e5e 0x2 25 >,
892 < 2323200000 0x40541979 0x00006161 0x2 26 >,
893 < 2400000000 0x40541a7d 0x00006464 0x2 27 >,
894 < 2476800000 0x40541b81 0x00006767 0x2 28 >,
895 < 2553600000 0x40541c85 0x00006a6a 0x2 29 >,
Deepak Katragadda1a183252017-08-21 12:44:34 -0700[diff] [blame]896 < 2649600000 0x40541d8a 0x00006e6e 0x2 30 >,
897 < 2745600000 0x40511e8f 0x00007272 0x2 31 >;
Deepak Katragadda30d72dd2017-08-01 13:56:00 -0700[diff] [blame]898
Deepak Katragadda97c8e6a2017-09-12 12:19:50 -0700[diff] [blame]899 qcom,perfcl-speedbin2-v0 =
900 < 300000000 0x000c000f 0x00002020 0x1 1 >,
901 < 403200000 0x500c0115 0x00002020 0x1 2 >,
902 < 480000000 0x50140219 0x00002020 0x1 3 >,
903 < 576000000 0x5014031e 0x00002020 0x1 4 >,
904 < 652800000 0x401c0422 0x00002020 0x1 5 >,
905 < 748800000 0x401c0527 0x00002020 0x1 6 >,
906 < 825600000 0x401c062b 0x00002222 0x1 7 >,
907 < 902400000 0x4024072f 0x00002626 0x1 8 >,
908 < 979200000 0x40240833 0x00002929 0x1 9 >,
909 < 1056000000 0x402c0937 0x00002c2c 0x1 10 >,
910 < 1132800000 0x402c0a3b 0x00002f2f 0x1 11 >,
911 < 1209600000 0x402c0b3f 0x00003232 0x2 12 >,
912 < 1286400000 0x40340c43 0x00003636 0x2 13 >,
913 < 1363200000 0x40340d47 0x00003939 0x2 14 >,
914 < 1459200000 0x403c0e4c 0x00003d3d 0x2 15 >,
915 < 1536000000 0x403c0f50 0x00004040 0x2 16 >,
916 < 1612800000 0x403c1054 0x00004343 0x2 17 >,
917 < 1689600000 0x40441158 0x00004646 0x2 18 >,
918 < 1766400000 0x4044125c 0x00004a4a 0x2 19 >,
919 < 1843200000 0x40441360 0x00004d4d 0x2 20 >,
920 < 1920000000 0x404c1464 0x00005050 0x2 21 >,
921 < 1996800000 0x404c1568 0x00005353 0x2 22 >,
922 < 2092800000 0x4054166d 0x00005757 0x2 23 >,
923 < 2169600000 0x40541771 0x00005a5a 0x2 24 >,
924 < 2246400000 0x40541875 0x00005e5e 0x2 25 >,
925 < 2323200000 0x40541979 0x00006161 0x2 26 >,
926 < 2400000000 0x40541a7d 0x00006464 0x2 27 >,
927 < 2476800000 0x40541b81 0x00006767 0x2 28 >,
928 < 2553600000 0x40541c85 0x00006a6a 0x2 29 >,
929 < 2649600000 0x40541d8a 0x00006e6e 0x2 30 >,
930 < 2707200000 0x40511e8d 0x00007171 0x2 30 >,
931 < 2764800000 0x40511f90 0x00007373 0x2 31 >,
932 < 2784000000 0x40512091 0x00007474 0x2 32 >,
933 < 2803200000 0x40512192 0x00007575 0x2 33 >;
934
Deepak Katragadda30d72dd2017-08-01 13:56:00 -0700[diff] [blame]935 qcom,l3-memacc-level-vc-bin0 = <8 13>;
Deepak Katragadda288d2b52017-08-11 10:13:59 -0700[diff] [blame]936 qcom,l3-memacc-level-vc-bin1 = <8 13>;
Deepak Katragadda97c8e6a2017-09-12 12:19:50 -0700[diff] [blame]937 qcom,l3-memacc-level-vc-bin2 = <8 13>;
Deepak Katragadda30d72dd2017-08-01 13:56:00 -0700[diff] [blame]938
939 qcom,pwrcl-memacc-level-vc-bin0 = <12 16>;
Deepak Katragadda401fcb92017-08-21 16:30:15 -0700[diff] [blame]940 qcom,pwrcl-memacc-level-vc-bin1 = <12 16>;
Deepak Katragadda97c8e6a2017-09-12 12:19:50 -0700[diff] [blame]941 qcom,pwrcl-memacc-level-vc-bin2 = <12 16>;
Deepak Katragadda30d72dd2017-08-01 13:56:00 -0700[diff] [blame]942
943 qcom,perfcl-memacc-level-vc-bin0 = <14 22>;
944 qcom,perfcl-memacc-level-vc-bin1 = <14 22>;
Deepak Katragadda97c8e6a2017-09-12 12:19:50 -0700[diff] [blame]945 qcom,perfcl-memacc-level-vc-bin2 = <14 22>;
David Collinsf5764762017-07-20 16:42:42 -0700[diff] [blame]946};
947
Tony Truong80258d62017-08-16 11:41:33 -0700[diff] [blame]948&pcie1 {
949 qcom,phy-sequence = <0x1804 0x03 0x0
950 0x00dc 0x27 0x0
951 0x0014 0x01 0x0
952 0x0020 0x31 0x0
953 0x0024 0x01 0x0
954 0x0028 0xde 0x0
955 0x002c 0x07 0x0
956 0x0034 0x4c 0x0
957 0x0038 0x06 0x0
958 0x0054 0x18 0x0
959 0x0058 0xb0 0x0
960 0x006c 0x8c 0x0
961 0x0070 0x20 0x0
962 0x0078 0x14 0x0
963 0x007c 0x34 0x0
964 0x00b4 0x06 0x0
965 0x00b8 0x06 0x0
966 0x00c0 0x16 0x0
967 0x00c4 0x16 0x0
968 0x00cc 0x36 0x0
969 0x00d0 0x36 0x0
970 0x00f0 0x05 0x0
971 0x00f8 0x42 0x0
972 0x0100 0x82 0x0
973 0x0108 0x68 0x0
974 0x011c 0x55 0x0
975 0x0120 0x55 0x0
976 0x0124 0x03 0x0
977 0x0128 0xab 0x0
978 0x012c 0xaa 0x0
979 0x0130 0x02 0x0
980 0x0150 0x3f 0x0
981 0x0158 0x3f 0x0
982 0x0178 0x10 0x0
983 0x01cc 0x04 0x0
984 0x01d0 0x30 0x0
985 0x01e0 0x04 0x0
986 0x01e8 0x73 0x0
987 0x01f0 0x1c 0x0
988 0x01fc 0x15 0x0
989 0x021c 0x04 0x0
990 0x0224 0x01 0x0
991 0x0228 0x22 0x0
992 0x022c 0x00 0x0
993 0x0098 0x05 0x0
994 0x080c 0x00 0x0
995 0x0818 0x0d 0x0
996 0x0860 0x01 0x0
997 0x0864 0x3a 0x0
998 0x087c 0x2f 0x0
999 0x08c0 0x09 0x0
1000 0x08c4 0x09 0x0
1001 0x08c8 0x1a 0x0
1002 0x08d0 0x01 0x0
1003 0x08d4 0x07 0x0
1004 0x08d8 0x31 0x0
1005 0x08dc 0x31 0x0
1006 0x08e0 0x03 0x0
1007 0x08fc 0x02 0x0
1008 0x0900 0x01 0x0
1009 0x0908 0x12 0x0
1010 0x0914 0x25 0x0
1011 0x0918 0x00 0x0
1012 0x091c 0x05 0x0
1013 0x0920 0x01 0x0
1014 0x0924 0x26 0x0
1015 0x0928 0x12 0x0
1016 0x0930 0x04 0x0
1017 0x0934 0x04 0x0
1018 0x0938 0x09 0x0
1019 0x0954 0x15 0x0
1020 0x0960 0x32 0x0
1021 0x0968 0x7f 0x0
1022 0x096c 0x07 0x0
1023 0x0978 0x04 0x0
1024 0x0980 0x70 0x0
1025 0x0984 0x8b 0x0
1026 0x0988 0x08 0x0
1027 0x098c 0x09 0x0
1028 0x0990 0x03 0x0
1029 0x0994 0x04 0x0
1030 0x0998 0x02 0x0
1031 0x099c 0x0c 0x0
1032 0x09a4 0x02 0x0
1033 0x09c0 0x5c 0x0
1034 0x09c4 0x3e 0x0
1035 0x09c8 0x3f 0x0
1036 0x0a30 0x01 0x0
1037 0x0a34 0xa0 0x0
1038 0x0a38 0x08 0x0
1039 0x0aa4 0x01 0x0
1040 0x0aac 0xc3 0x0
1041 0x0ab0 0x00 0x0
1042 0x0ab8 0x8c 0x0
1043 0x0ac0 0x7f 0x0
1044 0x0ac4 0x2a 0x0
1045 0x0810 0x0c 0x0
1046 0x0814 0x00 0x0
1047 0x0acc 0x04 0x0
1048 0x093c 0x20 0x0
1049 0x100c 0x00 0x0
1050 0x1018 0x0d 0x0
1051 0x1060 0x01 0x0
1052 0x1064 0x3a 0x0
1053 0x107c 0x2f 0x0
1054 0x10c0 0x09 0x0
1055 0x10c4 0x09 0x0
1056 0x10c8 0x1a 0x0
1057 0x10d0 0x01 0x0
1058 0x10d4 0x07 0x0
1059 0x10d8 0x31 0x0
1060 0x10dc 0x31 0x0
1061 0x10e0 0x03 0x0
1062 0x10fc 0x02 0x0
1063 0x1100 0x01 0x0
1064 0x1108 0x12 0x0
1065 0x1114 0x25 0x0
1066 0x1118 0x00 0x0
1067 0x111c 0x05 0x0
1068 0x1120 0x01 0x0
1069 0x1124 0x26 0x0
1070 0x1128 0x12 0x0
1071 0x1130 0x04 0x0
1072 0x1134 0x04 0x0
1073 0x1138 0x09 0x0
1074 0x1154 0x15 0x0
1075 0x1160 0x32 0x0
1076 0x1168 0x7f 0x0
1077 0x116c 0x07 0x0
1078 0x1178 0x04 0x0
1079 0x1180 0x70 0x0
1080 0x1184 0x8b 0x0
1081 0x1188 0x08 0x0
1082 0x118c 0x09 0x0
1083 0x1190 0x03 0x0
1084 0x1194 0x04 0x0
1085 0x1198 0x02 0x0
1086 0x119c 0x0c 0x0
1087 0x11a4 0x02 0x0
1088 0x11c0 0x5c 0x0
1089 0x11c4 0x3e 0x0
1090 0x11c8 0x3f 0x0
1091 0x1230 0x01 0x0
1092 0x1234 0xa0 0x0
1093 0x1238 0x08 0x0
1094 0x12a4 0x01 0x0
1095 0x12ac 0xc3 0x0
1096 0x12b0 0x00 0x0
1097 0x12b8 0x8c 0x0
1098 0x12c0 0x7f 0x0
1099 0x12c4 0x2a 0x0
1100 0x1010 0x0c 0x0
1101 0x1014 0x0f 0x0
1102 0x12cc 0x04 0x0
1103 0x113c 0x20 0x0
1104 0x195c 0x3f 0x0
1105 0x1974 0x50 0x0
1106 0x196c 0x9f 0x0
1107 0x182c 0x19 0x0
1108 0x1840 0x07 0x0
1109 0x1854 0x17 0x0
1110 0x1868 0x09 0x0
1111 0x1800 0x00 0x0
1112 0x0aa8 0x01 0x0
1113 0x12a8 0x01 0x0
1114 0x1808 0x01 0x0>;
1115};
1116
Jonathan Avila29bc1972017-08-24 16:49:18 -0700[diff] [blame]1117&devfreq_l3lat_0 {
1118 qcom,core-dev-table =
1119 < 300000 300000000 >,
1120 < 480000 403200000 >,
1121 < 652800 480000000 >,
1122 < 748800 576000000 >,
1123 < 902400 652800000 >,
1124 < 979200 748800000 >,
1125 < 1132800 844800000 >,
1126 < 1228800 940800000 >,
1127 < 1324800 1036800000 >,
1128 < 1420800 1132800000 >,
1129 < 1516800 1209600000 >,
1130 < 1612800 1401600000 >,
1131 < 1689600 1497600000 >,
1132 < 1766400 1593600000 >;
1133};
1134
1135&devfreq_l3lat_4 {
1136 qcom,core-dev-table =
1137 < 300000 300000000 >,
1138 < 825600 576000000 >,
1139 < 1132800 748800000 >,
1140 < 1363200 940800000 >,
1141 < 1689600 1209600000 >,
1142 < 1996800 1401600000 >,
1143 < 2400000 1593600000 >;
1144};
1145
Stephen Boydcbe46a02017-08-02 13:59:31 -0700[diff] [blame]1146&bwmon {
1147 qcom,count-unit = <0x10000>;
1148};
1149
Stephen Boyd31aac5f2017-09-01 09:16:06 -0700[diff] [blame]1150&cpubw {
1151 qcom,bw-tbl =
1152 < MHZ_TO_MBPS(150, 16) >, /* 2288 MB/s */
1153 < MHZ_TO_MBPS(300, 16) >, /* 4577 MB/s */
1154 < MHZ_TO_MBPS(426, 16) >, /* 6500 MB/s */
1155 < MHZ_TO_MBPS(533, 16) >, /* 8132 MB/s */
1156 < MHZ_TO_MBPS(600, 16) >, /* 9155 MB/s */
1157 < MHZ_TO_MBPS(806, 16) >, /* 12298 MB/s */
1158 < MHZ_TO_MBPS(933, 16) >; /* 14236 MB/s */
1159};
1160
1161&devfreq_cpufreq {
1162 mincpubw-cpufreq {
1163 cpu-to-dev-map-4 =
1164 < 1881600 MHZ_TO_MBPS(200, 4) >,
1165 < 2400000 MHZ_TO_MBPS(681, 4) >;
1166 };
1167};
1168
Deepak Katragaddada47ee92017-06-07 14:15:09 -0700[diff] [blame]1169&clock_gcc {
Deepak Katragadda3f120bb2017-08-09 14:49:49 -0700[diff] [blame]1170 compatible = "qcom,gcc-sdm845-v2", "syscon";
Deepak Katragaddada47ee92017-06-07 14:15:09 -0700[diff] [blame]1171};
1172
1173&clock_camcc {
Deepak Katragadda3f120bb2017-08-09 14:49:49 -0700[diff] [blame]1174 compatible = "qcom,cam_cc-sdm845-v2", "syscon";
Jigarkumar Zala9e214912017-09-14 16:40:03 -0700[diff] [blame]1175 qcom,cam_cc_csi3phytimer_clk_src-opp-handle = <&cam_csiphy3>;
Deepak Katragaddada47ee92017-06-07 14:15:09 -0700[diff] [blame]1176};
1177
1178&clock_dispcc {
Deepak Katragadda3f120bb2017-08-09 14:49:49 -0700[diff] [blame]1179 compatible = "qcom,dispcc-sdm845-v2", "syscon";
Deepak Katragaddada47ee92017-06-07 14:15:09 -0700[diff] [blame]1180};
1181
Vicky Wallace1762ab32017-07-12 19:00:04 -0700[diff] [blame]1182&clock_gpucc {
Deepak Katragadda3f120bb2017-08-09 14:49:49 -0700[diff] [blame]1183 compatible = "qcom,gpucc-sdm845-v2", "syscon";
Vicky Wallace1762ab32017-07-12 19:00:04 -0700[diff] [blame]1184};
1185
1186&clock_gfx {
1187 compatible = "qcom,gfxcc-sdm845-v2";
1188};
1189
Deepak Katragaddada47ee92017-06-07 14:15:09 -0700[diff] [blame]1190&clock_videocc {
Deepak Katragadda3f120bb2017-08-09 14:49:49 -0700[diff] [blame]1191 compatible = "qcom,video_cc-sdm845-v2", "syscon";
Deepak Katragaddada47ee92017-06-07 14:15:09 -0700[diff] [blame]1192};
Praneeth Paladugu55381212017-07-05 15:02:44 -0700[diff] [blame]1193
1194&msm_vidc {
1195 qcom,allowed-clock-rates = <100000000 200000000 330000000
1196 404000000 444000000 533000000>;
1197};
Reut Zysman861fd6c2017-07-30 15:39:13 +0300[diff] [blame]1198
David Collins113cc2772017-06-27 17:26:54 -0700[diff] [blame]1199&refgen {
1200 status = "ok";
David Collinsd388dd82017-08-15 16:23:21 -0700[diff] [blame]1201 regulator-always-on;
David Collins113cc2772017-06-27 17:26:54 -0700[diff] [blame]1202};
1203
Reut Zysman861fd6c2017-07-30 15:39:13 +0300[diff] [blame]1204&spss_utils {
1205 qcom,spss-dev-firmware-name = "spss2d"; /* 8 chars max */
1206 qcom,spss-test-firmware-name = "spss2t"; /* 8 chars max */
1207 qcom,spss-prod-firmware-name = "spss2p"; /* 8 chars max */
1208};
Narendra Muppalla4efd3442017-07-24 17:36:15 -0700[diff] [blame]1209
1210&mdss_mdp {
1211 clock-max-rate = <0 0 0 0 430000000 19200000 0>;
Narendra Muppalla86a46a02017-08-17 11:14:37 -0700[diff] [blame]1212 qcom,sde-min-core-ib-kbps = <4800000>;
Ingrid Gallardobdc72432017-10-16 14:44:47 -0700[diff] [blame^]1213 qcom,sde-max-bw-low-kbps = <9600000>;
1214 qcom,sde-max-bw-high-kbps = <9600000>;
Narendra Muppalla4efd3442017-07-24 17:36:15 -0700[diff] [blame]1215};
Joonwoo Parkf3f7dac2017-08-17 16:02:29 -0700[diff] [blame]1216
Ingrid Gallardoe38166e2017-09-06 17:01:00 -0700[diff] [blame]1217&mdss_dsi0 {
1218 qcom,core-supply-entries {
1219 #address-cells = <1>;
1220 #size-cells = <0>;
1221
1222 qcom,core-supply-entry@0 {
1223 reg = <0>;
1224 qcom,supply-name = "refgen";
1225 qcom,supply-min-voltage = <0>;
1226 qcom,supply-max-voltage = <0>;
1227 qcom,supply-enable-load = <0>;
1228 qcom,supply-disable-load = <0>;
1229 };
1230 };
1231};
1232
1233&mdss_dsi1 {
1234 qcom,core-supply-entries {
1235 #address-cells = <1>;
1236 #size-cells = <0>;
1237
1238 qcom,core-supply-entry@0 {
1239 reg = <0>;
1240 qcom,supply-name = "refgen";
1241 qcom,supply-min-voltage = <0>;
1242 qcom,supply-max-voltage = <0>;
1243 qcom,supply-enable-load = <0>;
1244 qcom,supply-disable-load = <0>;
1245 };
1246 };
1247};
1248
1249&sde_dp {
1250 qcom,core-supply-entries {
1251 #address-cells = <1>;
1252 #size-cells = <0>;
1253
1254 qcom,core-supply-entry@0 {
1255 reg = <0>;
1256 qcom,supply-name = "refgen";
1257 qcom,supply-min-voltage = <0>;
1258 qcom,supply-max-voltage = <0>;
1259 qcom,supply-enable-load = <0>;
1260 qcom,supply-disable-load = <0>;
1261 };
1262 };
1263};
1264
Joonwoo Parkf3f7dac2017-08-17 16:02:29 -0700[diff] [blame]1265&energy_costs {
1266 CPU_COST_0: core-cost0 {
1267 busy-cost-data = <
Puja Gupta346e399c2017-09-06 14:32:42 -0700[diff] [blame]1268 300000 12
Joonwoo Parkf3f7dac2017-08-17 16:02:29 -0700[diff] [blame]1269 403200 17
1270 480000 21
Puja Gupta346e399c2017-09-06 14:32:42 -0700[diff] [blame]1271 576000 27
Joonwoo Parkf3f7dac2017-08-17 16:02:29 -0700[diff] [blame]1272 652800 31
1273 748800 37
1274 825600 42
1275 902400 47
1276 979200 52
1277 1056000 57
1278 1132800 62
Puja Gupta346e399c2017-09-06 14:32:42 -0700[diff] [blame]1279 1228800 70
Joonwoo Parkf3f7dac2017-08-17 16:02:29 -0700[diff] [blame]1280 1324800 78
1281 1420800 89
1282 1516800 103
1283 1612800 122
Puja Gupta346e399c2017-09-06 14:32:42 -0700[diff] [blame]1284 1689600 141
1285 1766400 160
Joonwoo Parkf3f7dac2017-08-17 16:02:29 -0700[diff] [blame]1286 >;
1287 idle-cost-data = <
1288 22 18 14 12
1289 >;
1290 };
1291 CPU_COST_1: core-cost1 {
1292 busy-cost-data = <
Puja Gupta346e399c2017-09-06 14:32:42 -0700[diff] [blame]1293 300000 189
1294 403200 523
1295 480000 763
1296 576000 1052
1297 652800 1273
1298 748800 1536
1299 825600 1736
1300 902400 1926
1301 979200 2108
1302 1056000 2284
1303 1132800 2456
1304 1209600 2628
1305 1286400 2804
1306 1363200 2992
1307 1459200 3255
1308 1536000 3499
1309 1612800 3786
1310 1689600 4128
1311 1766400 4535
1312 1843200 5019
1313 1920000 5583
1314 1996800 6226
Joonwoo Parkf3f7dac2017-08-17 16:02:29 -0700[diff] [blame]1315 2092800 7120
Puja Gupta346e399c2017-09-06 14:32:42 -0700[diff] [blame]1316 2169600 7876
1317 2246400 8628
1318 2323200 9344
Joonwoo Parkf3f7dac2017-08-17 16:02:29 -0700[diff] [blame]1319 2400000 10030
Puja Gupta346e399c2017-09-06 14:32:42 -0700[diff] [blame]1320 2476800 10806
1321 2553600 12045
1322 2649600 15686
1323 2745600 25586
Joonwoo Parkf3f7dac2017-08-17 16:02:29 -0700[diff] [blame]1324 >;
1325 idle-cost-data = <
1326 100 80 60 40
1327 >;
1328 };
1329 CLUSTER_COST_0: cluster-cost0 {
1330 busy-cost-data = <
1331 300000 3
1332 403200 4
1333 480000 4
1334 576000 4
1335 652800 5
1336 748800 5
1337 825600 6
1338 902400 7
1339 979200 7
1340 1056000 8
1341 1132800 9
1342 1228800 9
1343 1324800 10
1344 1420800 11
1345 1516800 12
1346 1612800 13
1347 1689600 15
1348 1766400 17
1349 >;
1350 idle-cost-data = <
1351 4 3 2 1
1352 >;
1353 };
1354 CLUSTER_COST_1: cluster-cost1 {
1355 busy-cost-data = <
1356 300000 24
1357 403200 24
1358 480000 25
1359 576000 25
1360 652800 26
1361 748800 27
1362 825600 28
1363 902400 29
1364 979200 30
1365 1056000 32
1366 1132800 34
1367 1209600 37
1368 1286400 40
1369 1363200 45
1370 1459200 50
1371 1536000 57
1372 1612800 64
1373 1689600 74
1374 1766400 84
1375 1843200 96
1376 1920000 106
1377 1996800 113
1378 2092800 120
1379 2169600 125
1380 2246400 127
1381 2323200 130
1382 2400000 135
1383 2476800 140
1384 2553600 145
Puja Gupta346e399c2017-09-06 14:32:42 -0700[diff] [blame]1385 2649600 150
1386 2745600 155
Joonwoo Parkf3f7dac2017-08-17 16:02:29 -0700[diff] [blame]1387 >;
1388 idle-cost-data = <
1389 4 3 2 1
1390 >;
1391 };
1392};
Vicky Wallaceddf4fad2017-08-03 20:15:55 -0700[diff] [blame]1393
1394&gpu_gx_gdsc {
1395 domain-addr = <&gpu_gx_domain_addr>;
1396 sw-reset = <&gpu_gx_sw_reset>;
1397 qcom,reset-aon-logic;
1398};
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1399
1400/* GPU overrides */
1401&msm_gpu {
1402 /* Updated chip ID */
1403 qcom,chipid = <0x06030001>;
Lynus Vaze6565532017-09-14 10:25:34 +0530[diff] [blame]1404 qcom,initial-pwrlevel = <6>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1405
1406 qcom,gpu-pwrlevels {
1407 #address-cells = <1>;
1408 #size-cells = <0>;
1409
1410 compatible = "qcom,gpu-pwrlevels";
1411
1412 qcom,gpu-pwrlevel@0 {
1413 reg = <0>;
Lynus Vaze6565532017-09-14 10:25:34 +0530[diff] [blame]1414 qcom,gpu-freq = <710000000>;
1415 qcom,bus-freq = <12>;
1416 qcom,bus-min = <12>;
1417 qcom,bus-max = <12>;
1418 };
1419
1420 qcom,gpu-pwrlevel@1 {
1421 reg = <1>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1422 qcom,gpu-freq = <675000000>;
1423 qcom,bus-freq = <12>;
1424 qcom,bus-min = <10>;
1425 qcom,bus-max = <12>;
1426 };
1427
Lynus Vaze6565532017-09-14 10:25:34 +0530[diff] [blame]1428 qcom,gpu-pwrlevel@2 {
1429 reg = <2>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1430 qcom,gpu-freq = <596000000>;
1431 qcom,bus-freq = <10>;
1432 qcom,bus-min = <9>;
Lynus Vaze6565532017-09-14 10:25:34 +0530[diff] [blame]1433 qcom,bus-max = <12>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1434 };
1435
Lynus Vaze6565532017-09-14 10:25:34 +0530[diff] [blame]1436 qcom,gpu-pwrlevel@3 {
1437 reg = <3>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1438 qcom,gpu-freq = <520000000>;
1439 qcom,bus-freq = <9>;
1440 qcom,bus-min = <8>;
1441 qcom,bus-max = <10>;
1442 };
1443
Lynus Vaze6565532017-09-14 10:25:34 +0530[diff] [blame]1444 qcom,gpu-pwrlevel@4 {
1445 reg = <4>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1446 qcom,gpu-freq = <414000000>;
1447 qcom,bus-freq = <8>;
1448 qcom,bus-min = <7>;
1449 qcom,bus-max = <9>;
1450 };
1451
Lynus Vaze6565532017-09-14 10:25:34 +0530[diff] [blame]1452 qcom,gpu-pwrlevel@5 {
1453 reg = <5>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1454 qcom,gpu-freq = <342000000>;
1455 qcom,bus-freq = <6>;
1456 qcom,bus-min = <5>;
1457 qcom,bus-max = <7>;
1458 };
1459
Lynus Vaze6565532017-09-14 10:25:34 +0530[diff] [blame]1460 qcom,gpu-pwrlevel@6 {
1461 reg = <6>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1462 qcom,gpu-freq = <257000000>;
1463 qcom,bus-freq = <4>;
1464 qcom,bus-min = <3>;
1465 qcom,bus-max = <5>;
1466 };
1467
Lynus Vaze6565532017-09-14 10:25:34 +0530[diff] [blame]1468 qcom,gpu-pwrlevel@7 {
1469 reg = <7>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1470 qcom,gpu-freq = <0>;
1471 qcom,bus-freq = <0>;
1472 qcom,bus-min = <0>;
1473 qcom,bus-max = <0>;
1474 };
1475 };
1476};
1477
1478&gmu {
1479 qcom,gmu-pwrlevels {
1480 #address-cells = <1>;
1481 #size-cells = <0>;
1482
1483 compatible = "qcom,gmu-pwrlevels";
1484
Kyle Piefer33bec862017-08-14 16:26:53 -0700[diff] [blame]1485 /* GMU power levels must go from lowest to highest */
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1486 qcom,gmu-pwrlevel@0 {
1487 reg = <0>;
Kyle Piefer33bec862017-08-14 16:26:53 -0700[diff] [blame]1488 qcom,gmu-freq = <0>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1489 };
1490
1491 qcom,gmu-pwrlevel@1 {
1492 reg = <1>;
1493 qcom,gmu-freq = <200000000>;
1494 };
1495
1496 qcom,gmu-pwrlevel@2 {
1497 reg = <2>;
Kyle Piefer33bec862017-08-14 16:26:53 -0700[diff] [blame]1498 qcom,gmu-freq = <500000000>;
Lokesh Batra835f0162017-08-01 11:55:53 -0700[diff] [blame]1499 };
1500 };
1501};
Mayank Ranaf1137ef2017-09-26 09:30:26 -0700[diff] [blame]1502
1503&qusb_phy0 {
1504 qcom,qusb-phy-init-seq =
1505 /* <value reg_offset> */
1506 <0x23 0x210 /* PWR_CTRL1 */
1507 0x03 0x04 /* PLL_ANALOG_CONTROLS_TWO */
1508 0x7c 0x18c /* PLL_CLOCK_INVERTERS */
1509 0x80 0x2c /* PLL_CMODE */
1510 0x0a 0x184 /* PLL_LOCK_DELAY */
1511 0x19 0xb4 /* PLL_DIGITAL_TIMERS_TWO */
1512 0x40 0x194 /* PLL_BIAS_CONTROL_1 */
1513 0x20 0x198 /* PLL_BIAS_CONTROL_2 */
1514 0x21 0x214 /* PWR_CTRL2 */
Mayank Rana43343b82017-10-03 15:26:53 -0700[diff] [blame]1515 0x07 0x220 /* IMP_CTRL1 */
Mayank Ranaf1137ef2017-09-26 09:30:26 -0700[diff] [blame]1516 0x58 0x224 /* IMP_CTRL2 */
1517 0x45 0x240 /* TUNE1 */
1518 0x29 0x244 /* TUNE2 */
1519 0xca 0x248 /* TUNE3 */
1520 0x04 0x24c /* TUNE4 */
1521 0x03 0x250 /* TUNE5 */
1522 0x00 0x23c /* CHG_CTRL2 */
1523 0x22 0x210>; /* PWR_CTRL1 */
1524};