blob: 2207001846dc26c917198edaa422cd2cc9f09629 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020062#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020063#include "core.h"
64#include "reg.h"
65#include "port.h"
66#include "trap.h"
67#include "txheader.h"
68
69static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
70static const char mlxsw_sp_driver_version[] = "1.0";
71
72/* tx_hdr_version
73 * Tx header version.
74 * Must be set to 1.
75 */
76MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
77
78/* tx_hdr_ctl
79 * Packet control type.
80 * 0 - Ethernet control (e.g. EMADs, LACP)
81 * 1 - Ethernet data
82 */
83MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
84
85/* tx_hdr_proto
86 * Packet protocol type. Must be set to 1 (Ethernet).
87 */
88MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
89
90/* tx_hdr_rx_is_router
91 * Packet is sent from the router. Valid for data packets only.
92 */
93MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
94
95/* tx_hdr_fid_valid
96 * Indicates if the 'fid' field is valid and should be used for
97 * forwarding lookup. Valid for data packets only.
98 */
99MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
100
101/* tx_hdr_swid
102 * Switch partition ID. Must be set to 0.
103 */
104MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
105
106/* tx_hdr_control_tclass
107 * Indicates if the packet should use the control TClass and not one
108 * of the data TClasses.
109 */
110MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
111
112/* tx_hdr_etclass
113 * Egress TClass to be used on the egress device on the egress port.
114 */
115MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
116
117/* tx_hdr_port_mid
118 * Destination local port for unicast packets.
119 * Destination multicast ID for multicast packets.
120 *
121 * Control packets are directed to a specific egress port, while data
122 * packets are transmitted through the CPU port (0) into the switch partition,
123 * where forwarding rules are applied.
124 */
125MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
126
127/* tx_hdr_fid
128 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
129 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
130 * Valid for data packets only.
131 */
132MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
133
134/* tx_hdr_type
135 * 0 - Data packets
136 * 6 - Control packets
137 */
138MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
139
Yotam Gigi763b4b72016-07-21 12:03:17 +0200140static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
141
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200142static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
143 const struct mlxsw_tx_info *tx_info)
144{
145 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
146
147 memset(txhdr, 0, MLXSW_TXHDR_LEN);
148
149 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
150 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
151 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
152 mlxsw_tx_hdr_swid_set(txhdr, 0);
153 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
154 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
155 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
156}
157
158static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
159{
Elad Raz5b090742016-10-28 21:35:46 +0200160 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200161 int err;
162
163 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
164 if (err)
165 return err;
166 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
167 return 0;
168}
169
Yotam Gigi763b4b72016-07-21 12:03:17 +0200170static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
171{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200172 int i;
173
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200174 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200175 return -EIO;
176
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200177 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
178 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
Yotam Gigi2d644d42016-11-11 16:34:25 +0100234 span_entry->ref_count = 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200251static struct mlxsw_sp_span_entry *
252mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200253{
254 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
255 int i;
256
257 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
258 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
259
260 if (curr->used && curr->local_port == port->local_port)
261 return curr;
262 }
263 return NULL;
264}
265
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200266static struct mlxsw_sp_span_entry
267*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200268{
269 struct mlxsw_sp_span_entry *span_entry;
270
271 span_entry = mlxsw_sp_span_entry_find(port);
272 if (span_entry) {
Yotam Gigi2d644d42016-11-11 16:34:25 +0100273 /* Already exists, just take a reference */
Yotam Gigi763b4b72016-07-21 12:03:17 +0200274 span_entry->ref_count++;
275 return span_entry;
276 }
277
278 return mlxsw_sp_span_entry_create(port);
279}
280
281static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
282 struct mlxsw_sp_span_entry *span_entry)
283{
Yotam Gigi2d644d42016-11-11 16:34:25 +0100284 WARN_ON(!span_entry->ref_count);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200285 if (--span_entry->ref_count == 0)
286 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
287 return 0;
288}
289
290static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
291{
292 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
293 struct mlxsw_sp_span_inspected_port *p;
294 int i;
295
296 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
297 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
298
299 list_for_each_entry(p, &curr->bound_ports_list, list)
300 if (p->local_port == port->local_port &&
301 p->type == MLXSW_SP_SPAN_EGRESS)
302 return true;
303 }
304
305 return false;
306}
307
308static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
309{
310 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
311}
312
313static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
314{
315 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
316 char sbib_pl[MLXSW_REG_SBIB_LEN];
317 int err;
318
319 /* If port is egress mirrored, the shared buffer size should be
320 * updated according to the mtu value
321 */
322 if (mlxsw_sp_span_is_egress_mirror(port)) {
323 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
324 mlxsw_sp_span_mtu_to_buffsize(mtu));
325 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
326 if (err) {
327 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
328 return err;
329 }
330 }
331
332 return 0;
333}
334
335static struct mlxsw_sp_span_inspected_port *
336mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
337 struct mlxsw_sp_span_entry *span_entry)
338{
339 struct mlxsw_sp_span_inspected_port *p;
340
341 list_for_each_entry(p, &span_entry->bound_ports_list, list)
342 if (port->local_port == p->local_port)
343 return p;
344 return NULL;
345}
346
347static int
348mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
349 struct mlxsw_sp_span_entry *span_entry,
350 enum mlxsw_sp_span_type type)
351{
352 struct mlxsw_sp_span_inspected_port *inspected_port;
353 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
354 char mpar_pl[MLXSW_REG_MPAR_LEN];
355 char sbib_pl[MLXSW_REG_SBIB_LEN];
356 int pa_id = span_entry->id;
357 int err;
358
359 /* if it is an egress SPAN, bind a shared buffer to it */
360 if (type == MLXSW_SP_SPAN_EGRESS) {
361 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
362 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
363 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
364 if (err) {
365 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
366 return err;
367 }
368 }
369
370 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200371 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
372 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200373 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
374 if (err)
375 goto err_mpar_reg_write;
376
377 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
378 if (!inspected_port) {
379 err = -ENOMEM;
380 goto err_inspected_port_alloc;
381 }
382 inspected_port->local_port = port->local_port;
383 inspected_port->type = type;
384 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
385
386 return 0;
387
388err_mpar_reg_write:
389err_inspected_port_alloc:
390 if (type == MLXSW_SP_SPAN_EGRESS) {
391 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
392 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
393 }
394 return err;
395}
396
397static void
398mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
399 struct mlxsw_sp_span_entry *span_entry,
400 enum mlxsw_sp_span_type type)
401{
402 struct mlxsw_sp_span_inspected_port *inspected_port;
403 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
404 char mpar_pl[MLXSW_REG_MPAR_LEN];
405 char sbib_pl[MLXSW_REG_SBIB_LEN];
406 int pa_id = span_entry->id;
407
408 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
409 if (!inspected_port)
410 return;
411
412 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200413 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
414 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200415 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
416
417 /* remove the SBIB buffer if it was egress SPAN */
418 if (type == MLXSW_SP_SPAN_EGRESS) {
419 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
420 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
421 }
422
423 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
424
425 list_del(&inspected_port->list);
426 kfree(inspected_port);
427}
428
429static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
430 struct mlxsw_sp_port *to,
431 enum mlxsw_sp_span_type type)
432{
433 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
434 struct mlxsw_sp_span_entry *span_entry;
435 int err;
436
437 span_entry = mlxsw_sp_span_entry_get(to);
438 if (!span_entry)
439 return -ENOENT;
440
441 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
442 span_entry->id);
443
444 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
445 if (err)
446 goto err_port_bind;
447
448 return 0;
449
450err_port_bind:
451 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
452 return err;
453}
454
455static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
456 struct mlxsw_sp_port *to,
457 enum mlxsw_sp_span_type type)
458{
459 struct mlxsw_sp_span_entry *span_entry;
460
461 span_entry = mlxsw_sp_span_entry_find(to);
462 if (!span_entry) {
463 netdev_err(from->dev, "no span entry found\n");
464 return;
465 }
466
467 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
468 span_entry->id);
469 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
470}
471
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200472static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
473 bool is_up)
474{
475 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
476 char paos_pl[MLXSW_REG_PAOS_LEN];
477
478 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
479 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
480 MLXSW_PORT_ADMIN_STATUS_DOWN);
481 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
482}
483
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200484static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
485 unsigned char *addr)
486{
487 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
488 char ppad_pl[MLXSW_REG_PPAD_LEN];
489
490 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
491 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
492 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
493}
494
495static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
496{
497 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
498 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
499
500 ether_addr_copy(addr, mlxsw_sp->base_mac);
501 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
502 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
503}
504
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200505static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
506{
507 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
508 char pmtu_pl[MLXSW_REG_PMTU_LEN];
509 int max_mtu;
510 int err;
511
512 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
513 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
514 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
515 if (err)
516 return err;
517 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
518
519 if (mtu > max_mtu)
520 return -EINVAL;
521
522 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
523 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
524}
525
Ido Schimmelbe945352016-06-09 09:51:39 +0200526static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
527 u8 swid)
528{
529 char pspa_pl[MLXSW_REG_PSPA_LEN];
530
531 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
532 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
533}
534
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200535static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
536{
537 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200538
Ido Schimmelbe945352016-06-09 09:51:39 +0200539 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
540 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200541}
542
543static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
544 bool enable)
545{
546 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
547 char svpe_pl[MLXSW_REG_SVPE_LEN];
548
549 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
550 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
551}
552
553int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
554 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
555 u16 vid)
556{
557 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
558 char svfa_pl[MLXSW_REG_SVFA_LEN];
559
560 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
561 fid, vid);
562 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
563}
564
Ido Schimmel584d73d2016-08-24 12:00:26 +0200565int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
566 u16 vid_begin, u16 vid_end,
567 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200568{
569 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
570 char *spvmlr_pl;
571 int err;
572
573 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
574 if (!spvmlr_pl)
575 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200576 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
577 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200578 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
579 kfree(spvmlr_pl);
580 return err;
581}
582
Ido Schimmel584d73d2016-08-24 12:00:26 +0200583static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
584 u16 vid, bool learn_enable)
585{
586 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
587 learn_enable);
588}
589
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200590static int
591mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
592{
593 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
594 char sspr_pl[MLXSW_REG_SSPR_LEN];
595
596 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
597 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
598}
599
Ido Schimmeld664b412016-06-09 09:51:40 +0200600static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
601 u8 local_port, u8 *p_module,
602 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200603{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200604 char pmlp_pl[MLXSW_REG_PMLP_LEN];
605 int err;
606
Ido Schimmel558c2d52016-02-26 17:32:29 +0100607 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200608 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
609 if (err)
610 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100611 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
612 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200613 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200614 return 0;
615}
616
Ido Schimmel18f1e702016-02-26 17:32:31 +0100617static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
618 u8 module, u8 width, u8 lane)
619{
620 char pmlp_pl[MLXSW_REG_PMLP_LEN];
621 int i;
622
623 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
624 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
625 for (i = 0; i < width; i++) {
626 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
627 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
628 }
629
630 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
631}
632
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100633static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
634{
635 char pmlp_pl[MLXSW_REG_PMLP_LEN];
636
637 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
638 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
639 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
640}
641
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200642static int mlxsw_sp_port_open(struct net_device *dev)
643{
644 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
645 int err;
646
647 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
648 if (err)
649 return err;
650 netif_start_queue(dev);
651 return 0;
652}
653
654static int mlxsw_sp_port_stop(struct net_device *dev)
655{
656 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
657
658 netif_stop_queue(dev);
659 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
660}
661
662static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
663 struct net_device *dev)
664{
665 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
666 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
667 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
668 const struct mlxsw_tx_info tx_info = {
669 .local_port = mlxsw_sp_port->local_port,
670 .is_emad = false,
671 };
672 u64 len;
673 int err;
674
Jiri Pirko307c2432016-04-08 19:11:22 +0200675 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200676 return NETDEV_TX_BUSY;
677
678 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
679 struct sk_buff *skb_orig = skb;
680
681 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
682 if (!skb) {
683 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
684 dev_kfree_skb_any(skb_orig);
685 return NETDEV_TX_OK;
686 }
687 }
688
689 if (eth_skb_pad(skb)) {
690 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
691 return NETDEV_TX_OK;
692 }
693
694 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200695 /* TX header is consumed by HW on the way so we shouldn't count its
696 * bytes as being sent.
697 */
698 len = skb->len - MLXSW_TXHDR_LEN;
699
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200700 /* Due to a race we might fail here because of a full queue. In that
701 * unlikely case we simply drop the packet.
702 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200703 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200704
705 if (!err) {
706 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
707 u64_stats_update_begin(&pcpu_stats->syncp);
708 pcpu_stats->tx_packets++;
709 pcpu_stats->tx_bytes += len;
710 u64_stats_update_end(&pcpu_stats->syncp);
711 } else {
712 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
713 dev_kfree_skb_any(skb);
714 }
715 return NETDEV_TX_OK;
716}
717
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100718static void mlxsw_sp_set_rx_mode(struct net_device *dev)
719{
720}
721
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200722static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
723{
724 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
725 struct sockaddr *addr = p;
726 int err;
727
728 if (!is_valid_ether_addr(addr->sa_data))
729 return -EADDRNOTAVAIL;
730
731 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
732 if (err)
733 return err;
734 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
735 return 0;
736}
737
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200738static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200739 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200740{
741 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
742
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200743 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
744 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200745
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200746 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200747 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200748 pg_size + delay, pg_size);
749 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200750 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200751}
752
753int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200754 u8 *prio_tc, bool pause_en,
755 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200756{
757 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200758 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
759 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200760 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200762
763 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
764 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
765 if (err)
766 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200767
768 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
769 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200770 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200771
772 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
773 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200774 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200775 configure = true;
776 break;
777 }
778 }
779
780 if (!configure)
781 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200782 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200783 }
784
Ido Schimmelff6551e2016-04-06 17:10:03 +0200785 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
786}
787
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200788static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200789 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200790{
791 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
792 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200793 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200794 u8 *prio_tc;
795
796 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200797 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200798
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200799 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200800 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200801}
802
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200803static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
804{
805 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200806 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200807 int err;
808
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200809 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200810 if (err)
811 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200812 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
813 if (err)
814 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200815 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
816 if (err)
817 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200818 dev->mtu = mtu;
819 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200820
821err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200822 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
823err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200824 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200825 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200826}
827
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300828static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200829mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
830 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200831{
832 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
833 struct mlxsw_sp_port_pcpu_stats *p;
834 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
835 u32 tx_dropped = 0;
836 unsigned int start;
837 int i;
838
839 for_each_possible_cpu(i) {
840 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
841 do {
842 start = u64_stats_fetch_begin_irq(&p->syncp);
843 rx_packets = p->rx_packets;
844 rx_bytes = p->rx_bytes;
845 tx_packets = p->tx_packets;
846 tx_bytes = p->tx_bytes;
847 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
848
849 stats->rx_packets += rx_packets;
850 stats->rx_bytes += rx_bytes;
851 stats->tx_packets += tx_packets;
852 stats->tx_bytes += tx_bytes;
853 /* tx_dropped is u32, updated without syncp protection. */
854 tx_dropped += p->tx_dropped;
855 }
856 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200857 return 0;
858}
859
Or Gerlitz3df5b3c2016-11-22 23:09:54 +0200860static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200861{
862 switch (attr_id) {
863 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
864 return true;
865 }
866
867 return false;
868}
869
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300870static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
871 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200872{
873 switch (attr_id) {
874 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
875 return mlxsw_sp_port_get_sw_stats64(dev, sp);
876 }
877
878 return -EINVAL;
879}
880
881static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
882 int prio, char *ppcnt_pl)
883{
884 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
885 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
886
887 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
888 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
889}
890
891static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
892 struct rtnl_link_stats64 *stats)
893{
894 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
895 int err;
896
897 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
898 0, ppcnt_pl);
899 if (err)
900 goto out;
901
902 stats->tx_packets =
903 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
904 stats->rx_packets =
905 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
906 stats->tx_bytes =
907 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
908 stats->rx_bytes =
909 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
910 stats->multicast =
911 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
912
913 stats->rx_crc_errors =
914 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
915 stats->rx_frame_errors =
916 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
917
918 stats->rx_length_errors = (
919 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
920 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
921 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
922
923 stats->rx_errors = (stats->rx_crc_errors +
924 stats->rx_frame_errors + stats->rx_length_errors);
925
926out:
927 return err;
928}
929
930static void update_stats_cache(struct work_struct *work)
931{
932 struct mlxsw_sp_port *mlxsw_sp_port =
933 container_of(work, struct mlxsw_sp_port,
934 hw_stats.update_dw.work);
935
936 if (!netif_carrier_ok(mlxsw_sp_port->dev))
937 goto out;
938
939 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
940 mlxsw_sp_port->hw_stats.cache);
941
942out:
943 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
944 MLXSW_HW_STATS_UPDATE_TIME);
945}
946
947/* Return the stats from a cache that is updated periodically,
948 * as this function might get called in an atomic context.
949 */
950static struct rtnl_link_stats64 *
951mlxsw_sp_port_get_stats64(struct net_device *dev,
952 struct rtnl_link_stats64 *stats)
953{
954 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
955
956 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
957
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200958 return stats;
959}
960
961int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
962 u16 vid_end, bool is_member, bool untagged)
963{
964 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
965 char *spvm_pl;
966 int err;
967
968 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
969 if (!spvm_pl)
970 return -ENOMEM;
971
972 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
973 vid_end, is_member, untagged);
974 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
975 kfree(spvm_pl);
976 return err;
977}
978
979static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
980{
981 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
982 u16 vid, last_visited_vid;
983 int err;
984
985 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
986 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
987 vid);
988 if (err) {
989 last_visited_vid = vid;
990 goto err_port_vid_to_fid_set;
991 }
992 }
993
994 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
995 if (err) {
996 last_visited_vid = VLAN_N_VID;
997 goto err_port_vid_to_fid_set;
998 }
999
1000 return 0;
1001
1002err_port_vid_to_fid_set:
1003 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1004 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1005 vid);
1006 return err;
1007}
1008
1009static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1010{
1011 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1012 u16 vid;
1013 int err;
1014
1015 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1016 if (err)
1017 return err;
1018
1019 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1020 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1021 vid, vid);
1022 if (err)
1023 return err;
1024 }
1025
1026 return 0;
1027}
1028
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001029static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001030mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001031{
1032 struct mlxsw_sp_port *mlxsw_sp_vport;
1033
1034 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1035 if (!mlxsw_sp_vport)
1036 return NULL;
1037
1038 /* dev will be set correctly after the VLAN device is linked
1039 * with the real device. In case of bridge SELF invocation, dev
1040 * will remain as is.
1041 */
1042 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1043 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1044 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1045 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001046 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1047 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001048 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001049
1050 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1051
1052 return mlxsw_sp_vport;
1053}
1054
1055static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1056{
1057 list_del(&mlxsw_sp_vport->vport.list);
1058 kfree(mlxsw_sp_vport);
1059}
1060
Ido Schimmel05978482016-08-17 16:39:30 +02001061static int mlxsw_sp_port_add_vid(struct net_device *dev,
1062 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001063{
1064 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001065 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001066 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001067 int err;
1068
1069 /* VLAN 0 is added to HW filter when device goes up, but it is
1070 * reserved in our case, so simply return.
1071 */
1072 if (!vid)
1073 return 0;
1074
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001075 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001076 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001077
Ido Schimmel0355b592016-06-20 23:04:13 +02001078 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001079 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001080 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001081
1082 /* When adding the first VLAN interface on a bridged port we need to
1083 * transition all the active 802.1Q bridge VLANs to use explicit
1084 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1085 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001086 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001087 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001088 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001089 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001090 }
1091
Ido Schimmel52697a92016-07-02 11:00:09 +02001092 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001093 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001094 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001095
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001096 return 0;
1097
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001098err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001099 if (list_is_singular(&mlxsw_sp_port->vports_list))
1100 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1101err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001102 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001103 return err;
1104}
1105
Ido Schimmel32d863f2016-07-02 11:00:10 +02001106static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1107 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001108{
1109 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001110 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001111 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001112
1113 /* VLAN 0 is removed from HW filter when device goes down, but
1114 * it is reserved in our case, so simply return.
1115 */
1116 if (!vid)
1117 return 0;
1118
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001119 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001120 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001121 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001122
Ido Schimmel7a355832016-08-17 16:39:28 +02001123 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001124
Ido Schimmel1c800752016-06-20 23:04:20 +02001125 /* Drop FID reference. If this was the last reference the
1126 * resources will be freed.
1127 */
1128 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1129 if (f && !WARN_ON(!f->leave))
1130 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001131
1132 /* When removing the last VLAN interface on a bridged port we need to
1133 * transition all active 802.1Q bridge VLANs to use VID to FID
1134 * mappings and set port's mode to VLAN mode.
1135 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001136 if (list_is_singular(&mlxsw_sp_port->vports_list))
1137 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001138
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001139 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1140
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001141 return 0;
1142}
1143
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001144static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1145 size_t len)
1146{
1147 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001148 u8 module = mlxsw_sp_port->mapping.module;
1149 u8 width = mlxsw_sp_port->mapping.width;
1150 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001151 int err;
1152
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001153 if (!mlxsw_sp_port->split)
1154 err = snprintf(name, len, "p%d", module + 1);
1155 else
1156 err = snprintf(name, len, "p%ds%d", module + 1,
1157 lane / width);
1158
1159 if (err >= len)
1160 return -EINVAL;
1161
1162 return 0;
1163}
1164
Yotam Gigi763b4b72016-07-21 12:03:17 +02001165static struct mlxsw_sp_port_mall_tc_entry *
1166mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1167 unsigned long cookie) {
1168 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1169
1170 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1171 if (mall_tc_entry->cookie == cookie)
1172 return mall_tc_entry;
1173
1174 return NULL;
1175}
1176
1177static int
1178mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1179 struct tc_cls_matchall_offload *cls,
1180 const struct tc_action *a,
1181 bool ingress)
1182{
1183 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1184 struct net *net = dev_net(mlxsw_sp_port->dev);
1185 enum mlxsw_sp_span_type span_type;
1186 struct mlxsw_sp_port *to_port;
1187 struct net_device *to_dev;
1188 int ifindex;
1189 int err;
1190
1191 ifindex = tcf_mirred_ifindex(a);
1192 to_dev = __dev_get_by_index(net, ifindex);
1193 if (!to_dev) {
1194 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1195 return -EINVAL;
1196 }
1197
1198 if (!mlxsw_sp_port_dev_check(to_dev)) {
1199 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1200 return -ENOTSUPP;
1201 }
1202 to_port = netdev_priv(to_dev);
1203
1204 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1205 if (!mall_tc_entry)
1206 return -ENOMEM;
1207
1208 mall_tc_entry->cookie = cls->cookie;
1209 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1210 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1211 mall_tc_entry->mirror.ingress = ingress;
1212 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1213
1214 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1215 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1216 if (err)
1217 goto err_mirror_add;
1218 return 0;
1219
1220err_mirror_add:
1221 list_del(&mall_tc_entry->list);
1222 kfree(mall_tc_entry);
1223 return err;
1224}
1225
1226static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1227 __be16 protocol,
1228 struct tc_cls_matchall_offload *cls,
1229 bool ingress)
1230{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001231 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001232 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001233 int err;
1234
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001235 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001236 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1237 return -ENOTSUPP;
1238 }
1239
WANG Cong22dc13c2016-08-13 22:35:00 -07001240 tcf_exts_to_list(cls->exts, &actions);
1241 list_for_each_entry(a, &actions, list) {
Shmulik Ladkani5724b8b2016-10-13 09:06:43 +03001242 if (!is_tcf_mirred_egress_mirror(a) ||
1243 protocol != htons(ETH_P_ALL)) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001244 return -ENOTSUPP;
Shmulik Ladkani5724b8b2016-10-13 09:06:43 +03001245 }
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001246
Yotam Gigi763b4b72016-07-21 12:03:17 +02001247 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1248 a, ingress);
1249 if (err)
1250 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001251 }
1252
1253 return 0;
1254}
1255
1256static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1257 struct tc_cls_matchall_offload *cls)
1258{
1259 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1260 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1261 enum mlxsw_sp_span_type span_type;
1262 struct mlxsw_sp_port *to_port;
1263
1264 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1265 cls->cookie);
1266 if (!mall_tc_entry) {
1267 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1268 return;
1269 }
1270
1271 switch (mall_tc_entry->type) {
1272 case MLXSW_SP_PORT_MALL_MIRROR:
1273 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1274 span_type = mall_tc_entry->mirror.ingress ?
1275 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1276
1277 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1278 break;
1279 default:
1280 WARN_ON(1);
1281 }
1282
1283 list_del(&mall_tc_entry->list);
1284 kfree(mall_tc_entry);
1285}
1286
1287static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1288 __be16 proto, struct tc_to_netdev *tc)
1289{
1290 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1291 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1292
1293 if (tc->type == TC_SETUP_MATCHALL) {
1294 switch (tc->cls_mall->command) {
1295 case TC_CLSMATCHALL_REPLACE:
1296 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1297 proto,
1298 tc->cls_mall,
1299 ingress);
1300 case TC_CLSMATCHALL_DESTROY:
1301 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1302 tc->cls_mall);
1303 return 0;
1304 default:
1305 return -EINVAL;
1306 }
1307 }
1308
1309 return -ENOTSUPP;
1310}
1311
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001312static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1313 .ndo_open = mlxsw_sp_port_open,
1314 .ndo_stop = mlxsw_sp_port_stop,
1315 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001316 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001317 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001318 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1319 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1320 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001321 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1322 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001323 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1324 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001325 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1326 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001327 .ndo_fdb_add = switchdev_port_fdb_add,
1328 .ndo_fdb_del = switchdev_port_fdb_del,
1329 .ndo_fdb_dump = switchdev_port_fdb_dump,
1330 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1331 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1332 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001333 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001334};
1335
1336static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1337 struct ethtool_drvinfo *drvinfo)
1338{
1339 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1340 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1341
1342 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1343 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1344 sizeof(drvinfo->version));
1345 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1346 "%d.%d.%d",
1347 mlxsw_sp->bus_info->fw_rev.major,
1348 mlxsw_sp->bus_info->fw_rev.minor,
1349 mlxsw_sp->bus_info->fw_rev.subminor);
1350 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1351 sizeof(drvinfo->bus_info));
1352}
1353
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001354static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1355 struct ethtool_pauseparam *pause)
1356{
1357 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1358
1359 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1360 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1361}
1362
1363static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1364 struct ethtool_pauseparam *pause)
1365{
1366 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1367
1368 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1369 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1370 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1371
1372 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1373 pfcc_pl);
1374}
1375
1376static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1377 struct ethtool_pauseparam *pause)
1378{
1379 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1380 bool pause_en = pause->tx_pause || pause->rx_pause;
1381 int err;
1382
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001383 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1384 netdev_err(dev, "PFC already enabled on port\n");
1385 return -EINVAL;
1386 }
1387
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001388 if (pause->autoneg) {
1389 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1390 return -EINVAL;
1391 }
1392
1393 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1394 if (err) {
1395 netdev_err(dev, "Failed to configure port's headroom\n");
1396 return err;
1397 }
1398
1399 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1400 if (err) {
1401 netdev_err(dev, "Failed to set PAUSE parameters\n");
1402 goto err_port_pause_configure;
1403 }
1404
1405 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1406 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1407
1408 return 0;
1409
1410err_port_pause_configure:
1411 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1412 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1413 return err;
1414}
1415
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001416struct mlxsw_sp_port_hw_stats {
1417 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001418 u64 (*getter)(const char *payload);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001419};
1420
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001421static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001422 {
1423 .str = "a_frames_transmitted_ok",
1424 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1425 },
1426 {
1427 .str = "a_frames_received_ok",
1428 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1429 },
1430 {
1431 .str = "a_frame_check_sequence_errors",
1432 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1433 },
1434 {
1435 .str = "a_alignment_errors",
1436 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1437 },
1438 {
1439 .str = "a_octets_transmitted_ok",
1440 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1441 },
1442 {
1443 .str = "a_octets_received_ok",
1444 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1445 },
1446 {
1447 .str = "a_multicast_frames_xmitted_ok",
1448 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1449 },
1450 {
1451 .str = "a_broadcast_frames_xmitted_ok",
1452 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1453 },
1454 {
1455 .str = "a_multicast_frames_received_ok",
1456 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1457 },
1458 {
1459 .str = "a_broadcast_frames_received_ok",
1460 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1461 },
1462 {
1463 .str = "a_in_range_length_errors",
1464 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1465 },
1466 {
1467 .str = "a_out_of_range_length_field",
1468 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1469 },
1470 {
1471 .str = "a_frame_too_long_errors",
1472 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1473 },
1474 {
1475 .str = "a_symbol_error_during_carrier",
1476 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1477 },
1478 {
1479 .str = "a_mac_control_frames_transmitted",
1480 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1481 },
1482 {
1483 .str = "a_mac_control_frames_received",
1484 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1485 },
1486 {
1487 .str = "a_unsupported_opcodes_received",
1488 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1489 },
1490 {
1491 .str = "a_pause_mac_ctrl_frames_received",
1492 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1493 },
1494 {
1495 .str = "a_pause_mac_ctrl_frames_xmitted",
1496 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1497 },
1498};
1499
1500#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1501
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001502static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1503 {
1504 .str = "rx_octets_prio",
1505 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1506 },
1507 {
1508 .str = "rx_frames_prio",
1509 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1510 },
1511 {
1512 .str = "tx_octets_prio",
1513 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1514 },
1515 {
1516 .str = "tx_frames_prio",
1517 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1518 },
1519 {
1520 .str = "rx_pause_prio",
1521 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1522 },
1523 {
1524 .str = "rx_pause_duration_prio",
1525 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1526 },
1527 {
1528 .str = "tx_pause_prio",
1529 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1530 },
1531 {
1532 .str = "tx_pause_duration_prio",
1533 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1534 },
1535};
1536
1537#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1538
Jiri Pirko412791d2016-10-21 16:07:19 +02001539static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001540{
1541 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1542
1543 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1544}
1545
1546static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1547 {
1548 .str = "tc_transmit_queue_tc",
1549 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1550 },
1551 {
1552 .str = "tc_no_buffer_discard_uc_tc",
1553 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1554 },
1555};
1556
1557#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1558
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001559#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001560 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1561 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001562 IEEE_8021QAZ_MAX_TCS)
1563
1564static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1565{
1566 int i;
1567
1568 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1569 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1570 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1571 *p += ETH_GSTRING_LEN;
1572 }
1573}
1574
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001575static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1576{
1577 int i;
1578
1579 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1580 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1581 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1582 *p += ETH_GSTRING_LEN;
1583 }
1584}
1585
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001586static void mlxsw_sp_port_get_strings(struct net_device *dev,
1587 u32 stringset, u8 *data)
1588{
1589 u8 *p = data;
1590 int i;
1591
1592 switch (stringset) {
1593 case ETH_SS_STATS:
1594 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1595 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1596 ETH_GSTRING_LEN);
1597 p += ETH_GSTRING_LEN;
1598 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001599
1600 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1601 mlxsw_sp_port_get_prio_strings(&p, i);
1602
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001603 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1604 mlxsw_sp_port_get_tc_strings(&p, i);
1605
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001606 break;
1607 }
1608}
1609
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001610static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1611 enum ethtool_phys_id_state state)
1612{
1613 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1614 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1615 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1616 bool active;
1617
1618 switch (state) {
1619 case ETHTOOL_ID_ACTIVE:
1620 active = true;
1621 break;
1622 case ETHTOOL_ID_INACTIVE:
1623 active = false;
1624 break;
1625 default:
1626 return -EOPNOTSUPP;
1627 }
1628
1629 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1630 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1631}
1632
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001633static int
1634mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1635 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1636{
1637 switch (grp) {
1638 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1639 *p_hw_stats = mlxsw_sp_port_hw_stats;
1640 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1641 break;
1642 case MLXSW_REG_PPCNT_PRIO_CNT:
1643 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1644 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1645 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001646 case MLXSW_REG_PPCNT_TC_CNT:
1647 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1648 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1649 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001650 default:
1651 WARN_ON(1);
1652 return -ENOTSUPP;
1653 }
1654 return 0;
1655}
1656
1657static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1658 enum mlxsw_reg_ppcnt_grp grp, int prio,
1659 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001660{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001661 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001662 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001663 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001664 int err;
1665
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001666 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1667 if (err)
1668 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001669 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001670 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001671 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001672}
1673
1674static void mlxsw_sp_port_get_stats(struct net_device *dev,
1675 struct ethtool_stats *stats, u64 *data)
1676{
1677 int i, data_index = 0;
1678
1679 /* IEEE 802.3 Counters */
1680 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1681 data, data_index);
1682 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1683
1684 /* Per-Priority Counters */
1685 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1686 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1687 data, data_index);
1688 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1689 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001690
1691 /* Per-TC Counters */
1692 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1693 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1694 data, data_index);
1695 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1696 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001697}
1698
1699static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1700{
1701 switch (sset) {
1702 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001703 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001704 default:
1705 return -EOPNOTSUPP;
1706 }
1707}
1708
1709struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001710 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001711 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001712 u32 speed;
1713};
1714
1715static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1716 {
1717 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001718 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1719 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001720 },
1721 {
1722 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1723 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001724 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1725 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001726 },
1727 {
1728 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001729 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1730 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001731 },
1732 {
1733 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1734 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001735 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1736 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001737 },
1738 {
1739 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1740 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1741 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1742 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001743 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1744 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001745 },
1746 {
1747 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001748 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1749 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001750 },
1751 {
1752 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001753 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1754 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001755 },
1756 {
1757 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001758 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1759 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001760 },
1761 {
1762 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001763 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1764 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001765 },
1766 {
1767 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001768 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1769 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001770 },
1771 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001772 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1773 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1774 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001775 },
1776 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001777 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1778 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1779 .speed = SPEED_25000,
1780 },
1781 {
1782 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1783 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1784 .speed = SPEED_25000,
1785 },
1786 {
1787 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1788 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1789 .speed = SPEED_25000,
1790 },
1791 {
1792 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1793 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1794 .speed = SPEED_50000,
1795 },
1796 {
1797 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1798 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1799 .speed = SPEED_50000,
1800 },
1801 {
1802 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1803 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1804 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001805 },
1806 {
1807 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001808 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1809 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001810 },
1811 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001812 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1813 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1814 .speed = SPEED_56000,
1815 },
1816 {
1817 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1818 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1819 .speed = SPEED_56000,
1820 },
1821 {
1822 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1823 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1824 .speed = SPEED_56000,
1825 },
1826 {
1827 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1828 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1829 .speed = SPEED_100000,
1830 },
1831 {
1832 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1833 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1834 .speed = SPEED_100000,
1835 },
1836 {
1837 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1838 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1839 .speed = SPEED_100000,
1840 },
1841 {
1842 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1843 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1844 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001845 },
1846};
1847
1848#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1849
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001850static void
1851mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1852 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001853{
1854 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1855 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1856 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1857 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1858 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1859 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001860 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001861
1862 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1863 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1864 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1865 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1866 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001867 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001868}
1869
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001870static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001871{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001872 int i;
1873
1874 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1875 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001876 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1877 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001878 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001879}
1880
1881static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001882 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001883{
1884 u32 speed = SPEED_UNKNOWN;
1885 u8 duplex = DUPLEX_UNKNOWN;
1886 int i;
1887
1888 if (!carrier_ok)
1889 goto out;
1890
1891 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1892 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1893 speed = mlxsw_sp_port_link_mode[i].speed;
1894 duplex = DUPLEX_FULL;
1895 break;
1896 }
1897 }
1898out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001899 cmd->base.speed = speed;
1900 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001901}
1902
1903static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1904{
1905 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1906 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1907 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1908 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1909 return PORT_FIBRE;
1910
1911 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1912 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1913 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1914 return PORT_DA;
1915
1916 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1917 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1918 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1919 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1920 return PORT_NONE;
1921
1922 return PORT_OTHER;
1923}
1924
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001925static u32
1926mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001927{
1928 u32 ptys_proto = 0;
1929 int i;
1930
1931 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001932 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1933 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001934 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1935 }
1936 return ptys_proto;
1937}
1938
1939static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1940{
1941 u32 ptys_proto = 0;
1942 int i;
1943
1944 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1945 if (speed == mlxsw_sp_port_link_mode[i].speed)
1946 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1947 }
1948 return ptys_proto;
1949}
1950
Ido Schimmel18f1e702016-02-26 17:32:31 +01001951static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1952{
1953 u32 ptys_proto = 0;
1954 int i;
1955
1956 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1957 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1958 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1959 }
1960 return ptys_proto;
1961}
1962
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001963static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1964 struct ethtool_link_ksettings *cmd)
1965{
1966 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1967 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1968 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1969
1970 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1971 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1972}
1973
1974static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1975 struct ethtool_link_ksettings *cmd)
1976{
1977 if (!autoneg)
1978 return;
1979
1980 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1981 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1982}
1983
1984static void
1985mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1986 struct ethtool_link_ksettings *cmd)
1987{
1988 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1989 return;
1990
1991 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1992 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1993}
1994
1995static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
1996 struct ethtool_link_ksettings *cmd)
1997{
1998 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
1999 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2000 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2001 char ptys_pl[MLXSW_REG_PTYS_LEN];
2002 u8 autoneg_status;
2003 bool autoneg;
2004 int err;
2005
2006 autoneg = mlxsw_sp_port->link.autoneg;
Elad Raz401c8b42016-10-28 21:35:52 +02002007 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002008 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2009 if (err)
2010 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002011 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2012 &eth_proto_oper);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002013
2014 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2015
2016 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2017
2018 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2019 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2020 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2021
2022 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2023 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2024 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2025 cmd);
2026
2027 return 0;
2028}
2029
2030static int
2031mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2032 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002033{
2034 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2035 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2036 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002037 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002038 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002039 int err;
2040
Elad Raz401c8b42016-10-28 21:35:52 +02002041 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002042 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002043 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002044 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002045 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002046
2047 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2048 eth_proto_new = autoneg ?
2049 mlxsw_sp_to_ptys_advert_link(cmd) :
2050 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002051
2052 eth_proto_new = eth_proto_new & eth_proto_cap;
2053 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002054 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002055 return -EINVAL;
2056 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002057
Elad Raz401c8b42016-10-28 21:35:52 +02002058 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2059 eth_proto_new);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002060 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002061 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002062 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002063
Ido Schimmel6277d462016-07-15 11:14:58 +02002064 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002065 return 0;
2066
Ido Schimmel0c83f882016-09-12 13:26:23 +02002067 mlxsw_sp_port->link.autoneg = autoneg;
2068
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002069 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2070 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002071
2072 return 0;
2073}
2074
2075static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2076 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2077 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002078 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2079 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002080 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002081 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002082 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2083 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002084 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2085 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002086};
2087
Ido Schimmel18f1e702016-02-26 17:32:31 +01002088static int
2089mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2090{
2091 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2092 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2093 char ptys_pl[MLXSW_REG_PTYS_LEN];
2094 u32 eth_proto_admin;
2095
2096 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
Elad Raz401c8b42016-10-28 21:35:52 +02002097 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2098 eth_proto_admin);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002099 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2100}
2101
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002102int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2103 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2104 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002105{
2106 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2107 char qeec_pl[MLXSW_REG_QEEC_LEN];
2108
2109 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2110 next_index);
2111 mlxsw_reg_qeec_de_set(qeec_pl, true);
2112 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2113 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2114 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2115}
2116
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002117int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2118 enum mlxsw_reg_qeec_hr hr, u8 index,
2119 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002120{
2121 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2122 char qeec_pl[MLXSW_REG_QEEC_LEN];
2123
2124 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2125 next_index);
2126 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2127 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2128 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2129}
2130
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002131int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2132 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002133{
2134 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2135 char qtct_pl[MLXSW_REG_QTCT_LEN];
2136
2137 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2138 tclass);
2139 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2140}
2141
2142static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2143{
2144 int err, i;
2145
2146 /* Setup the elements hierarcy, so that each TC is linked to
2147 * one subgroup, which are all member in the same group.
2148 */
2149 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2150 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2151 0);
2152 if (err)
2153 return err;
2154 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2155 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2156 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2157 0, false, 0);
2158 if (err)
2159 return err;
2160 }
2161 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2162 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2163 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2164 false, 0);
2165 if (err)
2166 return err;
2167 }
2168
2169 /* Make sure the max shaper is disabled in all hierarcies that
2170 * support it.
2171 */
2172 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2173 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2174 MLXSW_REG_QEEC_MAS_DIS);
2175 if (err)
2176 return err;
2177 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2178 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2179 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2180 i, 0,
2181 MLXSW_REG_QEEC_MAS_DIS);
2182 if (err)
2183 return err;
2184 }
2185 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2186 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2187 MLXSW_REG_QEEC_HIERARCY_TC,
2188 i, i,
2189 MLXSW_REG_QEEC_MAS_DIS);
2190 if (err)
2191 return err;
2192 }
2193
2194 /* Map all priorities to traffic class 0. */
2195 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2196 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2197 if (err)
2198 return err;
2199 }
2200
2201 return 0;
2202}
2203
Ido Schimmel05978482016-08-17 16:39:30 +02002204static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2205{
2206 mlxsw_sp_port->pvid = 1;
2207
2208 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2209}
2210
2211static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2212{
2213 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2214}
2215
Jiri Pirko67963a32016-10-28 21:35:55 +02002216static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2217 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002218{
2219 struct mlxsw_sp_port *mlxsw_sp_port;
2220 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002221 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002222 int err;
2223
2224 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2225 if (!dev)
2226 return -ENOMEM;
Jiri Pirkof20a91f2016-10-27 15:13:00 +02002227 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002228 mlxsw_sp_port = netdev_priv(dev);
2229 mlxsw_sp_port->dev = dev;
2230 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2231 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002232 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002233 mlxsw_sp_port->mapping.module = module;
2234 mlxsw_sp_port->mapping.width = width;
2235 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002236 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002237 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2238 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2239 if (!mlxsw_sp_port->active_vlans) {
2240 err = -ENOMEM;
2241 goto err_port_active_vlans_alloc;
2242 }
Elad Razfc1273a2016-01-06 13:01:11 +01002243 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2244 if (!mlxsw_sp_port->untagged_vlans) {
2245 err = -ENOMEM;
2246 goto err_port_untagged_vlans_alloc;
2247 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002248 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002249 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002250
2251 mlxsw_sp_port->pcpu_stats =
2252 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2253 if (!mlxsw_sp_port->pcpu_stats) {
2254 err = -ENOMEM;
2255 goto err_alloc_stats;
2256 }
2257
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002258 mlxsw_sp_port->hw_stats.cache =
2259 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2260
2261 if (!mlxsw_sp_port->hw_stats.cache) {
2262 err = -ENOMEM;
2263 goto err_alloc_hw_stats;
2264 }
2265 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2266 &update_stats_cache);
2267
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002268 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2269 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2270
Ido Schimmel3247ff22016-09-08 08:16:02 +02002271 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2272 if (err) {
2273 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2274 mlxsw_sp_port->local_port);
2275 goto err_port_swid_set;
2276 }
2277
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002278 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2279 if (err) {
2280 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2281 mlxsw_sp_port->local_port);
2282 goto err_dev_addr_init;
2283 }
2284
2285 netif_carrier_off(dev);
2286
2287 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002288 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2289 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002290
Jarod Wilsond894be52016-10-20 13:55:16 -04002291 dev->min_mtu = 0;
2292 dev->max_mtu = ETH_MAX_MTU;
2293
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002294 /* Each packet needs to have a Tx header (metadata) on top all other
2295 * headers.
2296 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002297 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002298
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002299 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2300 if (err) {
2301 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2302 mlxsw_sp_port->local_port);
2303 goto err_port_system_port_mapping_set;
2304 }
2305
Ido Schimmel18f1e702016-02-26 17:32:31 +01002306 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2307 if (err) {
2308 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2309 mlxsw_sp_port->local_port);
2310 goto err_port_speed_by_width_set;
2311 }
2312
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002313 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2314 if (err) {
2315 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2316 mlxsw_sp_port->local_port);
2317 goto err_port_mtu_set;
2318 }
2319
2320 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2321 if (err)
2322 goto err_port_admin_status_set;
2323
2324 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2325 if (err) {
2326 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2327 mlxsw_sp_port->local_port);
2328 goto err_port_buffers_init;
2329 }
2330
Ido Schimmel90183b92016-04-06 17:10:08 +02002331 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2332 if (err) {
2333 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2334 mlxsw_sp_port->local_port);
2335 goto err_port_ets_init;
2336 }
2337
Ido Schimmelf00817d2016-04-06 17:10:09 +02002338 /* ETS and buffers must be initialized before DCB. */
2339 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2340 if (err) {
2341 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2342 mlxsw_sp_port->local_port);
2343 goto err_port_dcb_init;
2344 }
2345
Ido Schimmel05978482016-08-17 16:39:30 +02002346 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2347 if (err) {
2348 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2349 mlxsw_sp_port->local_port);
2350 goto err_port_pvid_vport_create;
2351 }
2352
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002353 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002354 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002355 err = register_netdev(dev);
2356 if (err) {
2357 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2358 mlxsw_sp_port->local_port);
2359 goto err_register_netdev;
2360 }
2361
Elad Razd808c7e2016-10-28 21:35:57 +02002362 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2363 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2364 module);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002365 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002366 return 0;
2367
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002368err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002369 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002370 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002371 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2372err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002373 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002374err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002375err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002376err_port_buffers_init:
2377err_port_admin_status_set:
2378err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002379err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002380err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002381err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002382 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2383err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002384 kfree(mlxsw_sp_port->hw_stats.cache);
2385err_alloc_hw_stats:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002386 free_percpu(mlxsw_sp_port->pcpu_stats);
2387err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002388 kfree(mlxsw_sp_port->untagged_vlans);
2389err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002390 kfree(mlxsw_sp_port->active_vlans);
2391err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002392 free_netdev(dev);
2393 return err;
2394}
2395
Jiri Pirko67963a32016-10-28 21:35:55 +02002396static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2397 bool split, u8 module, u8 width, u8 lane)
2398{
2399 int err;
2400
2401 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2402 if (err) {
2403 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2404 local_port);
2405 return err;
2406 }
2407 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, false,
2408 module, width, lane);
2409 if (err)
2410 goto err_port_create;
2411 return 0;
2412
2413err_port_create:
2414 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2415 return err;
2416}
2417
2418static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002419{
2420 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2421
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002422 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko67963a32016-10-28 21:35:55 +02002423 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002424 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002425 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002426 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002427 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002428 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002429 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2430 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002431 free_percpu(mlxsw_sp_port->pcpu_stats);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002432 kfree(mlxsw_sp_port->hw_stats.cache);
Elad Razfc1273a2016-01-06 13:01:11 +01002433 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002434 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002435 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002436 free_netdev(mlxsw_sp_port->dev);
2437}
2438
Jiri Pirko67963a32016-10-28 21:35:55 +02002439static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2440{
2441 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2442 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2443}
2444
Jiri Pirkof83e2102016-10-28 21:35:49 +02002445static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2446{
2447 return mlxsw_sp->ports[local_port] != NULL;
2448}
2449
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002450static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2451{
2452 int i;
2453
2454 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002455 if (mlxsw_sp_port_created(mlxsw_sp, i))
2456 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002457 kfree(mlxsw_sp->ports);
2458}
2459
2460static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2461{
Ido Schimmeld664b412016-06-09 09:51:40 +02002462 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002463 size_t alloc_size;
2464 int i;
2465 int err;
2466
2467 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2468 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2469 if (!mlxsw_sp->ports)
2470 return -ENOMEM;
2471
2472 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002473 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002474 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002475 if (err)
2476 goto err_port_module_info_get;
2477 if (!width)
2478 continue;
2479 mlxsw_sp->port_to_module[i] = module;
Jiri Pirko67963a32016-10-28 21:35:55 +02002480 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2481 module, width, lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002482 if (err)
2483 goto err_port_create;
2484 }
2485 return 0;
2486
2487err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002488err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002489 for (i--; i >= 1; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002490 if (mlxsw_sp_port_created(mlxsw_sp, i))
2491 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002492 kfree(mlxsw_sp->ports);
2493 return err;
2494}
2495
Ido Schimmel18f1e702016-02-26 17:32:31 +01002496static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2497{
2498 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2499
2500 return local_port - offset;
2501}
2502
Ido Schimmelbe945352016-06-09 09:51:39 +02002503static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2504 u8 module, unsigned int count)
2505{
2506 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2507 int err, i;
2508
2509 for (i = 0; i < count; i++) {
2510 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2511 width, i * width);
2512 if (err)
2513 goto err_port_module_map;
2514 }
2515
2516 for (i = 0; i < count; i++) {
2517 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2518 if (err)
2519 goto err_port_swid_set;
2520 }
2521
2522 for (i = 0; i < count; i++) {
2523 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002524 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002525 if (err)
2526 goto err_port_create;
2527 }
2528
2529 return 0;
2530
2531err_port_create:
2532 for (i--; i >= 0; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002533 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2534 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmelbe945352016-06-09 09:51:39 +02002535 i = count;
2536err_port_swid_set:
2537 for (i--; i >= 0; i--)
2538 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2539 MLXSW_PORT_SWID_DISABLED_PORT);
2540 i = count;
2541err_port_module_map:
2542 for (i--; i >= 0; i--)
2543 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2544 return err;
2545}
2546
2547static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2548 u8 base_port, unsigned int count)
2549{
2550 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2551 int i;
2552
2553 /* Split by four means we need to re-create two ports, otherwise
2554 * only one.
2555 */
2556 count = count / 2;
2557
2558 for (i = 0; i < count; i++) {
2559 local_port = base_port + i * 2;
2560 module = mlxsw_sp->port_to_module[local_port];
2561
2562 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2563 0);
2564 }
2565
2566 for (i = 0; i < count; i++)
2567 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2568
2569 for (i = 0; i < count; i++) {
2570 local_port = base_port + i * 2;
2571 module = mlxsw_sp->port_to_module[local_port];
2572
2573 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002574 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002575 }
2576}
2577
Jiri Pirkob2f10572016-04-08 19:11:23 +02002578static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2579 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002580{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002581 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002582 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002583 u8 module, cur_width, base_port;
2584 int i;
2585 int err;
2586
2587 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2588 if (!mlxsw_sp_port) {
2589 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2590 local_port);
2591 return -EINVAL;
2592 }
2593
Ido Schimmeld664b412016-06-09 09:51:40 +02002594 module = mlxsw_sp_port->mapping.module;
2595 cur_width = mlxsw_sp_port->mapping.width;
2596
Ido Schimmel18f1e702016-02-26 17:32:31 +01002597 if (count != 2 && count != 4) {
2598 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2599 return -EINVAL;
2600 }
2601
Ido Schimmel18f1e702016-02-26 17:32:31 +01002602 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2603 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2604 return -EINVAL;
2605 }
2606
2607 /* Make sure we have enough slave (even) ports for the split. */
2608 if (count == 2) {
2609 base_port = local_port;
2610 if (mlxsw_sp->ports[base_port + 1]) {
2611 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2612 return -EINVAL;
2613 }
2614 } else {
2615 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2616 if (mlxsw_sp->ports[base_port + 1] ||
2617 mlxsw_sp->ports[base_port + 3]) {
2618 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2619 return -EINVAL;
2620 }
2621 }
2622
2623 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002624 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2625 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002626
Ido Schimmelbe945352016-06-09 09:51:39 +02002627 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2628 if (err) {
2629 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2630 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002631 }
2632
2633 return 0;
2634
Ido Schimmelbe945352016-06-09 09:51:39 +02002635err_port_split_create:
2636 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002637 return err;
2638}
2639
Jiri Pirkob2f10572016-04-08 19:11:23 +02002640static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002641{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002642 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002643 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002644 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002645 unsigned int count;
2646 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002647
2648 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2649 if (!mlxsw_sp_port) {
2650 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2651 local_port);
2652 return -EINVAL;
2653 }
2654
2655 if (!mlxsw_sp_port->split) {
2656 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2657 return -EINVAL;
2658 }
2659
Ido Schimmeld664b412016-06-09 09:51:40 +02002660 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002661 count = cur_width == 1 ? 4 : 2;
2662
2663 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2664
2665 /* Determine which ports to remove. */
2666 if (count == 2 && local_port >= base_port + 2)
2667 base_port = base_port + 2;
2668
2669 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002670 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2671 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002672
Ido Schimmelbe945352016-06-09 09:51:39 +02002673 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002674
2675 return 0;
2676}
2677
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002678static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2679 char *pude_pl, void *priv)
2680{
2681 struct mlxsw_sp *mlxsw_sp = priv;
2682 struct mlxsw_sp_port *mlxsw_sp_port;
2683 enum mlxsw_reg_pude_oper_status status;
2684 u8 local_port;
2685
2686 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2687 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002688 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002689 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002690
2691 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2692 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2693 netdev_info(mlxsw_sp_port->dev, "link up\n");
2694 netif_carrier_on(mlxsw_sp_port->dev);
2695 } else {
2696 netdev_info(mlxsw_sp_port->dev, "link down\n");
2697 netif_carrier_off(mlxsw_sp_port->dev);
2698 }
2699}
2700
Nogah Frankel14eeda92016-11-25 10:33:32 +01002701static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
2702 u8 local_port, void *priv)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002703{
2704 struct mlxsw_sp *mlxsw_sp = priv;
2705 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2706 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2707
2708 if (unlikely(!mlxsw_sp_port)) {
2709 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2710 local_port);
2711 return;
2712 }
2713
2714 skb->dev = mlxsw_sp_port->dev;
2715
2716 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2717 u64_stats_update_begin(&pcpu_stats->syncp);
2718 pcpu_stats->rx_packets++;
2719 pcpu_stats->rx_bytes += skb->len;
2720 u64_stats_update_end(&pcpu_stats->syncp);
2721
2722 skb->protocol = eth_type_trans(skb, skb->dev);
2723 netif_receive_skb(skb);
2724}
2725
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002726static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2727 void *priv)
2728{
2729 skb->offload_fwd_mark = 1;
Nogah Frankel14eeda92016-11-25 10:33:32 +01002730 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002731}
2732
Nogah Frankel117b0da2016-11-25 10:33:44 +01002733#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel0fb78a42016-11-25 10:33:39 +01002734 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002735 _is_ctrl, SP_##_trap_group, DISCARD)
Ido Schimmel93393b32016-08-25 18:42:38 +02002736
Nogah Frankel117b0da2016-11-25 10:33:44 +01002737#define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel14eeda92016-11-25 10:33:32 +01002738 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002739 _is_ctrl, SP_##_trap_group, DISCARD)
2740
2741#define MLXSW_SP_EVENTL(_func, _trap_id) \
2742 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
Nogah Frankel14eeda92016-11-25 10:33:32 +01002743
Nogah Frankel45449132016-11-25 10:33:35 +01002744static const struct mlxsw_listener mlxsw_sp_listener[] = {
2745 /* Events */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002746 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
Nogah Frankelee4a60d2016-11-25 10:33:29 +01002747 /* L2 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002748 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
2749 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
2750 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
2751 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
2752 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
2753 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
2754 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
2755 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
2756 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
2757 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
2758 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
Ido Schimmel93393b32016-08-25 18:42:38 +02002759 /* L3 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002760 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2761 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2762 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2763 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
2764 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
2765 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
2766 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
2767 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002768};
2769
Nogah Frankel579c82e2016-11-25 10:33:42 +01002770static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002771{
2772 char htgt_pl[MLXSW_REG_HTGT_LEN];
Nogah Frankel117b0da2016-11-25 10:33:44 +01002773 enum mlxsw_reg_htgt_trap_group i;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002774 int max_trap_groups;
2775 u8 priority, tc;
Nogah Frankel117b0da2016-11-25 10:33:44 +01002776 int err;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002777
2778 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
2779 return -EIO;
2780
2781 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
2782
2783 for (i = 0; i < max_trap_groups; i++) {
2784 switch (i) {
Nogah Frankel117b0da2016-11-25 10:33:44 +01002785 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2786 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2787 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2788 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2789 priority = 5;
2790 tc = 5;
2791 break;
2792 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2793 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2794 priority = 4;
2795 tc = 4;
2796 break;
2797 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2798 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2799 priority = 3;
2800 tc = 3;
2801 break;
2802 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2803 priority = 2;
2804 tc = 2;
2805 break;
2806 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2807 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2808 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2809 priority = 1;
2810 tc = 1;
2811 break;
2812 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
Nogah Frankel579c82e2016-11-25 10:33:42 +01002813 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
2814 tc = MLXSW_REG_HTGT_DEFAULT_TC;
2815 break;
2816 default:
2817 continue;
2818 }
Nogah Frankel117b0da2016-11-25 10:33:44 +01002819
Nogah Frankel579c82e2016-11-25 10:33:42 +01002820 mlxsw_reg_htgt_pack(htgt_pl, i, MLXSW_REG_HTGT_INVALID_POLICER,
2821 priority, tc);
2822 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
2823 if (err)
2824 return err;
2825 }
2826
2827 return 0;
2828}
2829
2830static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2831{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002832 int i;
2833 int err;
2834
Nogah Frankel579c82e2016-11-25 10:33:42 +01002835 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002836 if (err)
2837 return err;
2838
Nogah Frankel45449132016-11-25 10:33:35 +01002839 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01002840 err = mlxsw_core_trap_register(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01002841 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01002842 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002843 if (err)
Nogah Frankel45449132016-11-25 10:33:35 +01002844 goto err_listener_register;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002845
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002846 }
2847 return 0;
2848
Nogah Frankel45449132016-11-25 10:33:35 +01002849err_listener_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002850 for (i--; i >= 0; i--) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01002851 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01002852 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01002853 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002854 }
2855 return err;
2856}
2857
2858static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2859{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002860 int i;
2861
Nogah Frankel45449132016-11-25 10:33:35 +01002862 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01002863 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01002864 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01002865 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002866 }
2867}
2868
2869static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2870 enum mlxsw_reg_sfgc_type type,
2871 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2872{
2873 enum mlxsw_flood_table_type table_type;
2874 enum mlxsw_sp_flood_table flood_table;
2875 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2876
Ido Schimmel19ae6122015-12-15 16:03:39 +01002877 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002878 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002879 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002880 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002881
2882 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2883 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2884 else
2885 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002886
2887 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2888 flood_table);
2889 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2890}
2891
2892static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2893{
2894 int type, err;
2895
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002896 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2897 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2898 continue;
2899
2900 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2901 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2902 if (err)
2903 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002904
2905 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2906 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2907 if (err)
2908 return err;
2909 }
2910
2911 return 0;
2912}
2913
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002914static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2915{
2916 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002917 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002918
2919 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2920 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2921 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2922 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2923 MLXSW_REG_SLCR_LAG_HASH_SIP |
2924 MLXSW_REG_SLCR_LAG_HASH_DIP |
2925 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2926 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2927 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002928 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2929 if (err)
2930 return err;
2931
Jiri Pirkoc1a38312016-10-21 16:07:23 +02002932 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
2933 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002934 return -EIO;
2935
Jiri Pirkoc1a38312016-10-21 16:07:23 +02002936 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002937 sizeof(struct mlxsw_sp_upper),
2938 GFP_KERNEL);
2939 if (!mlxsw_sp->lags)
2940 return -ENOMEM;
2941
2942 return 0;
2943}
2944
2945static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
2946{
2947 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002948}
2949
Nogah Frankel9d87fce2016-11-25 10:33:40 +01002950static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
2951{
2952 char htgt_pl[MLXSW_REG_HTGT_LEN];
2953
Nogah Frankel579c82e2016-11-25 10:33:42 +01002954 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
2955 MLXSW_REG_HTGT_INVALID_POLICER,
2956 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
2957 MLXSW_REG_HTGT_DEFAULT_TC);
Nogah Frankel9d87fce2016-11-25 10:33:40 +01002958 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
2959}
2960
Jiri Pirkob2f10572016-04-08 19:11:23 +02002961static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002962 const struct mlxsw_bus_info *mlxsw_bus_info)
2963{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002964 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002965 int err;
2966
2967 mlxsw_sp->core = mlxsw_core;
2968 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002969 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002970 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002971 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002972
2973 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2974 if (err) {
2975 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2976 return err;
2977 }
2978
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002979 err = mlxsw_sp_traps_init(mlxsw_sp);
2980 if (err) {
Nogah Frankel45449132016-11-25 10:33:35 +01002981 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
2982 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002983 }
2984
2985 err = mlxsw_sp_flood_init(mlxsw_sp);
2986 if (err) {
2987 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2988 goto err_flood_init;
2989 }
2990
2991 err = mlxsw_sp_buffers_init(mlxsw_sp);
2992 if (err) {
2993 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2994 goto err_buffers_init;
2995 }
2996
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002997 err = mlxsw_sp_lag_init(mlxsw_sp);
2998 if (err) {
2999 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3000 goto err_lag_init;
3001 }
3002
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003003 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3004 if (err) {
3005 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3006 goto err_switchdev_init;
3007 }
3008
Ido Schimmel464dce12016-07-02 11:00:15 +02003009 err = mlxsw_sp_router_init(mlxsw_sp);
3010 if (err) {
3011 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3012 goto err_router_init;
3013 }
3014
Yotam Gigi763b4b72016-07-21 12:03:17 +02003015 err = mlxsw_sp_span_init(mlxsw_sp);
3016 if (err) {
3017 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3018 goto err_span_init;
3019 }
3020
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003021 err = mlxsw_sp_ports_create(mlxsw_sp);
3022 if (err) {
3023 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3024 goto err_ports_create;
3025 }
3026
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003027 return 0;
3028
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003029err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003030 mlxsw_sp_span_fini(mlxsw_sp);
3031err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003032 mlxsw_sp_router_fini(mlxsw_sp);
3033err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003034 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003035err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003036 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003037err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003038 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003039err_buffers_init:
3040err_flood_init:
3041 mlxsw_sp_traps_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003042 return err;
3043}
3044
Jiri Pirkob2f10572016-04-08 19:11:23 +02003045static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003046{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003047 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003048
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003049 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003050 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003051 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003052 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003053 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003054 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003055 mlxsw_sp_traps_fini(mlxsw_sp);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003056 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003057 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003058}
3059
3060static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3061 .used_max_vepa_channels = 1,
3062 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003063 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003064 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003065 .used_max_pgt = 1,
3066 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003067 .used_flood_tables = 1,
3068 .used_flood_mode = 1,
3069 .flood_mode = 3,
3070 .max_fid_offset_flood_tables = 2,
3071 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003072 .max_fid_flood_tables = 2,
3073 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003074 .used_max_ib_mc = 1,
3075 .max_ib_mc = 0,
3076 .used_max_pkey = 1,
3077 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003078 .used_kvd_split_data = 1,
3079 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3080 .kvd_hash_single_parts = 2,
3081 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003082 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003083 .swid_config = {
3084 {
3085 .used_type = 1,
3086 .type = MLXSW_PORT_SWID_TYPE_ETH,
3087 }
3088 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003089 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003090};
3091
3092static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003093 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003094 .priv_size = sizeof(struct mlxsw_sp),
3095 .init = mlxsw_sp_init,
3096 .fini = mlxsw_sp_fini,
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003097 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003098 .port_split = mlxsw_sp_port_split,
3099 .port_unsplit = mlxsw_sp_port_unsplit,
3100 .sb_pool_get = mlxsw_sp_sb_pool_get,
3101 .sb_pool_set = mlxsw_sp_sb_pool_set,
3102 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3103 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3104 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3105 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3106 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3107 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3108 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3109 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3110 .txhdr_construct = mlxsw_sp_txhdr_construct,
3111 .txhdr_len = MLXSW_TXHDR_LEN,
3112 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003113};
3114
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003115static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3116{
3117 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3118}
3119
David Aherndd823642016-10-17 19:15:49 -07003120static int mlxsw_lower_dev_walk(struct net_device *lower_dev, void *data)
3121{
3122 struct mlxsw_sp_port **port = data;
3123 int ret = 0;
3124
3125 if (mlxsw_sp_port_dev_check(lower_dev)) {
3126 *port = netdev_priv(lower_dev);
3127 ret = 1;
3128 }
3129
3130 return ret;
3131}
3132
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003133static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3134{
David Aherndd823642016-10-17 19:15:49 -07003135 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003136
3137 if (mlxsw_sp_port_dev_check(dev))
3138 return netdev_priv(dev);
3139
David Aherndd823642016-10-17 19:15:49 -07003140 port = NULL;
3141 netdev_walk_all_lower_dev(dev, mlxsw_lower_dev_walk, &port);
3142
3143 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003144}
3145
3146static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3147{
3148 struct mlxsw_sp_port *mlxsw_sp_port;
3149
3150 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3151 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3152}
3153
3154static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3155{
David Aherndd823642016-10-17 19:15:49 -07003156 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003157
3158 if (mlxsw_sp_port_dev_check(dev))
3159 return netdev_priv(dev);
3160
David Aherndd823642016-10-17 19:15:49 -07003161 port = NULL;
3162 netdev_walk_all_lower_dev_rcu(dev, mlxsw_lower_dev_walk, &port);
3163
3164 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003165}
3166
3167struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3168{
3169 struct mlxsw_sp_port *mlxsw_sp_port;
3170
3171 rcu_read_lock();
3172 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3173 if (mlxsw_sp_port)
3174 dev_hold(mlxsw_sp_port->dev);
3175 rcu_read_unlock();
3176 return mlxsw_sp_port;
3177}
3178
3179void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3180{
3181 dev_put(mlxsw_sp_port->dev);
3182}
3183
Ido Schimmel99724c12016-07-04 08:23:14 +02003184static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3185 unsigned long event)
3186{
3187 switch (event) {
3188 case NETDEV_UP:
3189 if (!r)
3190 return true;
3191 r->ref_count++;
3192 return false;
3193 case NETDEV_DOWN:
3194 if (r && --r->ref_count == 0)
3195 return true;
3196 /* It is possible we already removed the RIF ourselves
3197 * if it was assigned to a netdev that is now a bridge
3198 * or LAG slave.
3199 */
3200 return false;
3201 }
3202
3203 return false;
3204}
3205
3206static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3207{
3208 int i;
3209
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003210 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
Ido Schimmel99724c12016-07-04 08:23:14 +02003211 if (!mlxsw_sp->rifs[i])
3212 return i;
3213
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003214 return MLXSW_SP_INVALID_RIF;
Ido Schimmel99724c12016-07-04 08:23:14 +02003215}
3216
3217static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3218 bool *p_lagged, u16 *p_system_port)
3219{
3220 u8 local_port = mlxsw_sp_vport->local_port;
3221
3222 *p_lagged = mlxsw_sp_vport->lagged;
3223 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3224}
3225
3226static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3227 struct net_device *l3_dev, u16 rif,
3228 bool create)
3229{
3230 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3231 bool lagged = mlxsw_sp_vport->lagged;
3232 char ritr_pl[MLXSW_REG_RITR_LEN];
3233 u16 system_port;
3234
3235 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3236 l3_dev->mtu, l3_dev->dev_addr);
3237
3238 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3239 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3240 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3241
3242 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3243}
3244
3245static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3246
3247static struct mlxsw_sp_fid *
3248mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3249{
3250 struct mlxsw_sp_fid *f;
3251
3252 f = kzalloc(sizeof(*f), GFP_KERNEL);
3253 if (!f)
3254 return NULL;
3255
3256 f->leave = mlxsw_sp_vport_rif_sp_leave;
3257 f->ref_count = 0;
3258 f->dev = l3_dev;
3259 f->fid = fid;
3260
3261 return f;
3262}
3263
3264static struct mlxsw_sp_rif *
3265mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3266{
3267 struct mlxsw_sp_rif *r;
3268
3269 r = kzalloc(sizeof(*r), GFP_KERNEL);
3270 if (!r)
3271 return NULL;
3272
3273 ether_addr_copy(r->addr, l3_dev->dev_addr);
3274 r->mtu = l3_dev->mtu;
3275 r->ref_count = 1;
3276 r->dev = l3_dev;
3277 r->rif = rif;
3278 r->f = f;
3279
3280 return r;
3281}
3282
3283static struct mlxsw_sp_rif *
3284mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3285 struct net_device *l3_dev)
3286{
3287 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3288 struct mlxsw_sp_fid *f;
3289 struct mlxsw_sp_rif *r;
3290 u16 fid, rif;
3291 int err;
3292
3293 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003294 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99724c12016-07-04 08:23:14 +02003295 return ERR_PTR(-ERANGE);
3296
3297 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3298 if (err)
3299 return ERR_PTR(err);
3300
3301 fid = mlxsw_sp_rif_sp_to_fid(rif);
3302 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3303 if (err)
3304 goto err_rif_fdb_op;
3305
3306 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3307 if (!f) {
3308 err = -ENOMEM;
3309 goto err_rfid_alloc;
3310 }
3311
3312 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3313 if (!r) {
3314 err = -ENOMEM;
3315 goto err_rif_alloc;
3316 }
3317
3318 f->r = r;
3319 mlxsw_sp->rifs[rif] = r;
3320
3321 return r;
3322
3323err_rif_alloc:
3324 kfree(f);
3325err_rfid_alloc:
3326 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3327err_rif_fdb_op:
3328 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3329 return ERR_PTR(err);
3330}
3331
3332static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3333 struct mlxsw_sp_rif *r)
3334{
3335 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3336 struct net_device *l3_dev = r->dev;
3337 struct mlxsw_sp_fid *f = r->f;
3338 u16 fid = f->fid;
3339 u16 rif = r->rif;
3340
3341 mlxsw_sp->rifs[rif] = NULL;
3342 f->r = NULL;
3343
3344 kfree(r);
3345
3346 kfree(f);
3347
3348 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3349
3350 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3351}
3352
3353static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3354 struct net_device *l3_dev)
3355{
3356 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3357 struct mlxsw_sp_rif *r;
3358
3359 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3360 if (!r) {
3361 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3362 if (IS_ERR(r))
3363 return PTR_ERR(r);
3364 }
3365
3366 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3367 r->f->ref_count++;
3368
3369 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3370
3371 return 0;
3372}
3373
3374static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3375{
3376 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3377
3378 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3379
3380 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3381 if (--f->ref_count == 0)
3382 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3383}
3384
3385static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3386 struct net_device *port_dev,
3387 unsigned long event, u16 vid)
3388{
3389 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3390 struct mlxsw_sp_port *mlxsw_sp_vport;
3391
3392 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3393 if (WARN_ON(!mlxsw_sp_vport))
3394 return -EINVAL;
3395
3396 switch (event) {
3397 case NETDEV_UP:
3398 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3399 case NETDEV_DOWN:
3400 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3401 break;
3402 }
3403
3404 return 0;
3405}
3406
3407static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3408 unsigned long event)
3409{
3410 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3411 return 0;
3412
3413 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3414}
3415
3416static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3417 struct net_device *lag_dev,
3418 unsigned long event, u16 vid)
3419{
3420 struct net_device *port_dev;
3421 struct list_head *iter;
3422 int err;
3423
3424 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3425 if (mlxsw_sp_port_dev_check(port_dev)) {
3426 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3427 event, vid);
3428 if (err)
3429 return err;
3430 }
3431 }
3432
3433 return 0;
3434}
3435
3436static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3437 unsigned long event)
3438{
3439 if (netif_is_bridge_port(lag_dev))
3440 return 0;
3441
3442 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3443}
3444
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003445static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3446 struct net_device *l3_dev)
3447{
3448 u16 fid;
3449
3450 if (is_vlan_dev(l3_dev))
3451 fid = vlan_dev_vlan_id(l3_dev);
3452 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3453 fid = 1;
3454 else
3455 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3456
3457 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3458}
3459
Ido Schimmelf888f582016-08-24 11:18:51 +02003460static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3461{
3462 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3463 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3464}
3465
3466static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3467{
3468 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3469}
3470
3471static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3472 bool set)
3473{
3474 enum mlxsw_flood_table_type table_type;
3475 char *sftr_pl;
3476 u16 index;
3477 int err;
3478
3479 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3480 if (!sftr_pl)
3481 return -ENOMEM;
3482
3483 table_type = mlxsw_sp_flood_table_type_get(fid);
3484 index = mlxsw_sp_flood_table_index_get(fid);
3485 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3486 1, MLXSW_PORT_ROUTER_PORT, set);
3487 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3488
3489 kfree(sftr_pl);
3490 return err;
3491}
3492
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003493static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3494{
3495 if (mlxsw_sp_fid_is_vfid(fid))
3496 return MLXSW_REG_RITR_FID_IF;
3497 else
3498 return MLXSW_REG_RITR_VLAN_IF;
3499}
3500
3501static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3502 struct net_device *l3_dev,
3503 u16 fid, u16 rif,
3504 bool create)
3505{
3506 enum mlxsw_reg_ritr_if_type rif_type;
3507 char ritr_pl[MLXSW_REG_RITR_LEN];
3508
3509 rif_type = mlxsw_sp_rif_type_get(fid);
3510 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3511 l3_dev->dev_addr);
3512 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3513
3514 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3515}
3516
3517static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3518 struct net_device *l3_dev,
3519 struct mlxsw_sp_fid *f)
3520{
3521 struct mlxsw_sp_rif *r;
3522 u16 rif;
3523 int err;
3524
3525 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003526 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003527 return -ERANGE;
3528
Ido Schimmelf888f582016-08-24 11:18:51 +02003529 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003530 if (err)
3531 return err;
3532
Ido Schimmelf888f582016-08-24 11:18:51 +02003533 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3534 if (err)
3535 goto err_rif_bridge_op;
3536
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003537 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3538 if (err)
3539 goto err_rif_fdb_op;
3540
3541 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3542 if (!r) {
3543 err = -ENOMEM;
3544 goto err_rif_alloc;
3545 }
3546
3547 f->r = r;
3548 mlxsw_sp->rifs[rif] = r;
3549
3550 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3551
3552 return 0;
3553
3554err_rif_alloc:
3555 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3556err_rif_fdb_op:
3557 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003558err_rif_bridge_op:
3559 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003560 return err;
3561}
3562
3563void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3564 struct mlxsw_sp_rif *r)
3565{
3566 struct net_device *l3_dev = r->dev;
3567 struct mlxsw_sp_fid *f = r->f;
3568 u16 rif = r->rif;
3569
3570 mlxsw_sp->rifs[rif] = NULL;
3571 f->r = NULL;
3572
3573 kfree(r);
3574
3575 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3576
3577 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3578
Ido Schimmelf888f582016-08-24 11:18:51 +02003579 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3580
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003581 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3582}
3583
3584static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3585 struct net_device *br_dev,
3586 unsigned long event)
3587{
3588 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3589 struct mlxsw_sp_fid *f;
3590
3591 /* FID can either be an actual FID if the L3 device is the
3592 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3593 * L3 device is a VLAN-unaware bridge and we get a vFID.
3594 */
3595 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3596 if (WARN_ON(!f))
3597 return -EINVAL;
3598
3599 switch (event) {
3600 case NETDEV_UP:
3601 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3602 case NETDEV_DOWN:
3603 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3604 break;
3605 }
3606
3607 return 0;
3608}
3609
Ido Schimmel99724c12016-07-04 08:23:14 +02003610static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3611 unsigned long event)
3612{
3613 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003614 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003615 u16 vid = vlan_dev_vlan_id(vlan_dev);
3616
3617 if (mlxsw_sp_port_dev_check(real_dev))
3618 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3619 vid);
3620 else if (netif_is_lag_master(real_dev))
3621 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3622 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003623 else if (netif_is_bridge_master(real_dev) &&
3624 mlxsw_sp->master_bridge.dev == real_dev)
3625 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3626 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003627
3628 return 0;
3629}
3630
3631static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3632 unsigned long event, void *ptr)
3633{
3634 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3635 struct net_device *dev = ifa->ifa_dev->dev;
3636 struct mlxsw_sp *mlxsw_sp;
3637 struct mlxsw_sp_rif *r;
3638 int err = 0;
3639
3640 mlxsw_sp = mlxsw_sp_lower_get(dev);
3641 if (!mlxsw_sp)
3642 goto out;
3643
3644 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3645 if (!mlxsw_sp_rif_should_config(r, event))
3646 goto out;
3647
3648 if (mlxsw_sp_port_dev_check(dev))
3649 err = mlxsw_sp_inetaddr_port_event(dev, event);
3650 else if (netif_is_lag_master(dev))
3651 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003652 else if (netif_is_bridge_master(dev))
3653 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003654 else if (is_vlan_dev(dev))
3655 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3656
3657out:
3658 return notifier_from_errno(err);
3659}
3660
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003661static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3662 const char *mac, int mtu)
3663{
3664 char ritr_pl[MLXSW_REG_RITR_LEN];
3665 int err;
3666
3667 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3668 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3669 if (err)
3670 return err;
3671
3672 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3673 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3674 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3675 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3676}
3677
3678static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3679{
3680 struct mlxsw_sp *mlxsw_sp;
3681 struct mlxsw_sp_rif *r;
3682 int err;
3683
3684 mlxsw_sp = mlxsw_sp_lower_get(dev);
3685 if (!mlxsw_sp)
3686 return 0;
3687
3688 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3689 if (!r)
3690 return 0;
3691
3692 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3693 if (err)
3694 return err;
3695
3696 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3697 if (err)
3698 goto err_rif_edit;
3699
3700 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3701 if (err)
3702 goto err_rif_fdb_op;
3703
3704 ether_addr_copy(r->addr, dev->dev_addr);
3705 r->mtu = dev->mtu;
3706
3707 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3708
3709 return 0;
3710
3711err_rif_fdb_op:
3712 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3713err_rif_edit:
3714 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3715 return err;
3716}
3717
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003718static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3719 u16 fid)
3720{
3721 if (mlxsw_sp_fid_is_vfid(fid))
3722 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3723 else
3724 return test_bit(fid, lag_port->active_vlans);
3725}
3726
3727static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3728 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003729{
3730 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003731 u8 local_port = mlxsw_sp_port->local_port;
3732 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003733 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003734 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003735
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003736 if (!mlxsw_sp_port->lagged)
3737 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003738
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003739 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3740 MAX_LAG_MEMBERS);
3741 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003742 struct mlxsw_sp_port *lag_port;
3743
3744 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3745 if (!lag_port || lag_port->local_port == local_port)
3746 continue;
3747 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3748 count++;
3749 }
3750
3751 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003752}
3753
3754static int
3755mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3756 u16 fid)
3757{
3758 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3759 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3760
3761 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3762 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3763 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3764 mlxsw_sp_port->local_port);
3765
Ido Schimmel22305372016-06-20 23:04:21 +02003766 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3767 mlxsw_sp_port->local_port, fid);
3768
Ido Schimmel039c49a2016-01-27 15:20:18 +01003769 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3770}
3771
3772static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003773mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3774 u16 fid)
3775{
3776 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3777 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3778
3779 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3780 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3781 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3782
Ido Schimmel22305372016-06-20 23:04:21 +02003783 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3784 mlxsw_sp_port->lag_id, fid);
3785
Ido Schimmel039c49a2016-01-27 15:20:18 +01003786 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3787}
3788
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003789int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003790{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003791 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3792 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003793
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003794 if (mlxsw_sp_port->lagged)
3795 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003796 fid);
3797 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003798 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003799}
3800
Ido Schimmel701b1862016-07-04 08:23:16 +02003801static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3802{
3803 struct mlxsw_sp_fid *f, *tmp;
3804
3805 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3806 if (--f->ref_count == 0)
3807 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3808 else
3809 WARN_ON_ONCE(1);
3810}
3811
Ido Schimmel7117a572016-06-20 23:04:06 +02003812static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3813 struct net_device *br_dev)
3814{
3815 return !mlxsw_sp->master_bridge.dev ||
3816 mlxsw_sp->master_bridge.dev == br_dev;
3817}
3818
3819static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3820 struct net_device *br_dev)
3821{
3822 mlxsw_sp->master_bridge.dev = br_dev;
3823 mlxsw_sp->master_bridge.ref_count++;
3824}
3825
3826static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3827{
Ido Schimmel701b1862016-07-04 08:23:16 +02003828 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003829 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003830 /* It's possible upper VLAN devices are still holding
3831 * references to underlying FIDs. Drop the reference
3832 * and release the resources if it was the last one.
3833 * If it wasn't, then something bad happened.
3834 */
3835 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3836 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003837}
3838
3839static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3840 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003841{
3842 struct net_device *dev = mlxsw_sp_port->dev;
3843 int err;
3844
3845 /* When port is not bridged untagged packets are tagged with
3846 * PVID=VID=1, thereby creating an implicit VLAN interface in
3847 * the device. Remove it and let bridge code take care of its
3848 * own VLANs.
3849 */
3850 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003851 if (err)
3852 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003853
Ido Schimmel7117a572016-06-20 23:04:06 +02003854 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3855
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003856 mlxsw_sp_port->learning = 1;
3857 mlxsw_sp_port->learning_sync = 1;
3858 mlxsw_sp_port->uc_flood = 1;
3859 mlxsw_sp_port->bridged = 1;
3860
3861 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003862}
3863
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003864static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003865{
3866 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003867
Ido Schimmel28a01d22016-02-18 11:30:02 +01003868 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3869
Ido Schimmel7117a572016-06-20 23:04:06 +02003870 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3871
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003872 mlxsw_sp_port->learning = 0;
3873 mlxsw_sp_port->learning_sync = 0;
3874 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003875 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003876
3877 /* Add implicit VLAN interface in the device, so that untagged
3878 * packets will be classified to the default vFID.
3879 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003880 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003881}
3882
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003883static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003884{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003885 char sldr_pl[MLXSW_REG_SLDR_LEN];
3886
3887 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3888 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3889}
3890
3891static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3892{
3893 char sldr_pl[MLXSW_REG_SLDR_LEN];
3894
3895 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3896 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3897}
3898
3899static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3900 u16 lag_id, u8 port_index)
3901{
3902 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3903 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3904
3905 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3906 lag_id, port_index);
3907 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3908}
3909
3910static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3911 u16 lag_id)
3912{
3913 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3914 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3915
3916 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3917 lag_id);
3918 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3919}
3920
3921static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3922 u16 lag_id)
3923{
3924 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3925 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3926
3927 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3928 lag_id);
3929 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3930}
3931
3932static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3933 u16 lag_id)
3934{
3935 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3936 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3937
3938 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3939 lag_id);
3940 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3941}
3942
3943static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3944 struct net_device *lag_dev,
3945 u16 *p_lag_id)
3946{
3947 struct mlxsw_sp_upper *lag;
3948 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003949 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003950 int i;
3951
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003952 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
3953 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003954 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3955 if (lag->ref_count) {
3956 if (lag->dev == lag_dev) {
3957 *p_lag_id = i;
3958 return 0;
3959 }
3960 } else if (free_lag_id < 0) {
3961 free_lag_id = i;
3962 }
3963 }
3964 if (free_lag_id < 0)
3965 return -EBUSY;
3966 *p_lag_id = free_lag_id;
3967 return 0;
3968}
3969
3970static bool
3971mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3972 struct net_device *lag_dev,
3973 struct netdev_lag_upper_info *lag_upper_info)
3974{
3975 u16 lag_id;
3976
3977 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3978 return false;
3979 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3980 return false;
3981 return true;
3982}
3983
3984static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3985 u16 lag_id, u8 *p_port_index)
3986{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003987 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003988 int i;
3989
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003990 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3991 MAX_LAG_MEMBERS);
3992 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003993 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3994 *p_port_index = i;
3995 return 0;
3996 }
3997 }
3998 return -EBUSY;
3999}
4000
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004001static void
4002mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4003 u16 lag_id)
4004{
4005 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004006 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004007
4008 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4009 if (WARN_ON(!mlxsw_sp_vport))
4010 return;
4011
Ido Schimmel11943ff2016-07-02 11:00:12 +02004012 /* If vPort is assigned a RIF, then leave it since it's no
4013 * longer valid.
4014 */
4015 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4016 if (f)
4017 f->leave(mlxsw_sp_vport);
4018
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004019 mlxsw_sp_vport->lag_id = lag_id;
4020 mlxsw_sp_vport->lagged = 1;
4021}
4022
4023static void
4024mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4025{
4026 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004027 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004028
4029 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4030 if (WARN_ON(!mlxsw_sp_vport))
4031 return;
4032
Ido Schimmel11943ff2016-07-02 11:00:12 +02004033 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4034 if (f)
4035 f->leave(mlxsw_sp_vport);
4036
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004037 mlxsw_sp_vport->lagged = 0;
4038}
4039
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004040static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4041 struct net_device *lag_dev)
4042{
4043 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4044 struct mlxsw_sp_upper *lag;
4045 u16 lag_id;
4046 u8 port_index;
4047 int err;
4048
4049 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4050 if (err)
4051 return err;
4052 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4053 if (!lag->ref_count) {
4054 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4055 if (err)
4056 return err;
4057 lag->dev = lag_dev;
4058 }
4059
4060 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4061 if (err)
4062 return err;
4063 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4064 if (err)
4065 goto err_col_port_add;
4066 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4067 if (err)
4068 goto err_col_port_enable;
4069
4070 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4071 mlxsw_sp_port->local_port);
4072 mlxsw_sp_port->lag_id = lag_id;
4073 mlxsw_sp_port->lagged = 1;
4074 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004075
4076 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4077
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004078 return 0;
4079
Ido Schimmel51554db2016-05-06 22:18:39 +02004080err_col_port_enable:
4081 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004082err_col_port_add:
4083 if (!lag->ref_count)
4084 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004085 return err;
4086}
4087
Ido Schimmel82e6db02016-06-20 23:04:04 +02004088static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4089 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004090{
4091 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004092 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004093 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004094
4095 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004096 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004097 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4098 WARN_ON(lag->ref_count == 0);
4099
Ido Schimmel82e6db02016-06-20 23:04:04 +02004100 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4101 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004102
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004103 if (mlxsw_sp_port->bridged) {
4104 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004105 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004106 }
4107
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004108 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004109 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004110
4111 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4112 mlxsw_sp_port->local_port);
4113 mlxsw_sp_port->lagged = 0;
4114 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004115
4116 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004117}
4118
Jiri Pirko74581202015-12-03 12:12:30 +01004119static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4120 u16 lag_id)
4121{
4122 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4123 char sldr_pl[MLXSW_REG_SLDR_LEN];
4124
4125 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4126 mlxsw_sp_port->local_port);
4127 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4128}
4129
4130static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4131 u16 lag_id)
4132{
4133 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4134 char sldr_pl[MLXSW_REG_SLDR_LEN];
4135
4136 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4137 mlxsw_sp_port->local_port);
4138 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4139}
4140
4141static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4142 bool lag_tx_enabled)
4143{
4144 if (lag_tx_enabled)
4145 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4146 mlxsw_sp_port->lag_id);
4147 else
4148 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4149 mlxsw_sp_port->lag_id);
4150}
4151
4152static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4153 struct netdev_lag_lower_state_info *info)
4154{
4155 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4156}
4157
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004158static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4159 struct net_device *vlan_dev)
4160{
4161 struct mlxsw_sp_port *mlxsw_sp_vport;
4162 u16 vid = vlan_dev_vlan_id(vlan_dev);
4163
4164 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004165 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004166 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004167
4168 mlxsw_sp_vport->dev = vlan_dev;
4169
4170 return 0;
4171}
4172
Ido Schimmel82e6db02016-06-20 23:04:04 +02004173static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4174 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004175{
4176 struct mlxsw_sp_port *mlxsw_sp_vport;
4177 u16 vid = vlan_dev_vlan_id(vlan_dev);
4178
4179 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004180 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004181 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004182
4183 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004184}
4185
Jiri Pirko74581202015-12-03 12:12:30 +01004186static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4187 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004188{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004189 struct netdev_notifier_changeupper_info *info;
4190 struct mlxsw_sp_port *mlxsw_sp_port;
4191 struct net_device *upper_dev;
4192 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004193 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004194
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004195 mlxsw_sp_port = netdev_priv(dev);
4196 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4197 info = ptr;
4198
4199 switch (event) {
4200 case NETDEV_PRECHANGEUPPER:
4201 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004202 if (!is_vlan_dev(upper_dev) &&
4203 !netif_is_lag_master(upper_dev) &&
4204 !netif_is_bridge_master(upper_dev))
4205 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004206 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004207 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004208 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004209 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004210 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004211 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004212 if (netif_is_lag_master(upper_dev) &&
4213 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4214 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004215 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004216 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4217 return -EINVAL;
4218 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4219 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4220 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004221 break;
4222 case NETDEV_CHANGEUPPER:
4223 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004224 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004225 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004226 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4227 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004228 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004229 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4230 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004231 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004232 if (info->linking)
4233 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4234 upper_dev);
4235 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004236 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004237 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004238 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004239 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4240 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004241 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004242 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4243 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004244 } else {
4245 err = -EINVAL;
4246 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004247 }
4248 break;
4249 }
4250
Ido Schimmel80bedf12016-06-20 23:03:59 +02004251 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004252}
4253
Jiri Pirko74581202015-12-03 12:12:30 +01004254static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4255 unsigned long event, void *ptr)
4256{
4257 struct netdev_notifier_changelowerstate_info *info;
4258 struct mlxsw_sp_port *mlxsw_sp_port;
4259 int err;
4260
4261 mlxsw_sp_port = netdev_priv(dev);
4262 info = ptr;
4263
4264 switch (event) {
4265 case NETDEV_CHANGELOWERSTATE:
4266 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4267 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4268 info->lower_state_info);
4269 if (err)
4270 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4271 }
4272 break;
4273 }
4274
Ido Schimmel80bedf12016-06-20 23:03:59 +02004275 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004276}
4277
4278static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4279 unsigned long event, void *ptr)
4280{
4281 switch (event) {
4282 case NETDEV_PRECHANGEUPPER:
4283 case NETDEV_CHANGEUPPER:
4284 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4285 case NETDEV_CHANGELOWERSTATE:
4286 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4287 }
4288
Ido Schimmel80bedf12016-06-20 23:03:59 +02004289 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004290}
4291
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004292static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4293 unsigned long event, void *ptr)
4294{
4295 struct net_device *dev;
4296 struct list_head *iter;
4297 int ret;
4298
4299 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4300 if (mlxsw_sp_port_dev_check(dev)) {
4301 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004302 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004303 return ret;
4304 }
4305 }
4306
Ido Schimmel80bedf12016-06-20 23:03:59 +02004307 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004308}
4309
Ido Schimmel701b1862016-07-04 08:23:16 +02004310static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4311 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004312{
Ido Schimmel701b1862016-07-04 08:23:16 +02004313 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004314 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004315
Ido Schimmel701b1862016-07-04 08:23:16 +02004316 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4317 if (!f) {
4318 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4319 if (IS_ERR(f))
4320 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004321 }
4322
Ido Schimmel701b1862016-07-04 08:23:16 +02004323 f->ref_count++;
4324
4325 return 0;
4326}
4327
4328static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4329 struct net_device *vlan_dev)
4330{
4331 u16 fid = vlan_dev_vlan_id(vlan_dev);
4332 struct mlxsw_sp_fid *f;
4333
4334 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004335 if (f && f->r)
4336 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004337 if (f && --f->ref_count == 0)
4338 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4339}
4340
4341static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4342 unsigned long event, void *ptr)
4343{
4344 struct netdev_notifier_changeupper_info *info;
4345 struct net_device *upper_dev;
4346 struct mlxsw_sp *mlxsw_sp;
4347 int err;
4348
4349 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4350 if (!mlxsw_sp)
4351 return 0;
4352 if (br_dev != mlxsw_sp->master_bridge.dev)
4353 return 0;
4354
4355 info = ptr;
4356
4357 switch (event) {
4358 case NETDEV_CHANGEUPPER:
4359 upper_dev = info->upper_dev;
4360 if (!is_vlan_dev(upper_dev))
4361 break;
4362 if (info->linking) {
4363 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4364 upper_dev);
4365 if (err)
4366 return err;
4367 } else {
4368 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4369 }
4370 break;
4371 }
4372
4373 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004374}
4375
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004376static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004377{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004378 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004379 MLXSW_SP_VFID_MAX);
4380}
4381
4382static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4383{
4384 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4385
4386 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4387 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004388}
4389
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004390static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004391
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004392static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4393 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004394{
4395 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004396 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004397 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004398 int err;
4399
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004400 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004401 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004402 dev_err(dev, "No available vFIDs\n");
4403 return ERR_PTR(-ERANGE);
4404 }
4405
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004406 fid = mlxsw_sp_vfid_to_fid(vfid);
4407 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004408 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004409 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004410 return ERR_PTR(err);
4411 }
4412
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004413 f = kzalloc(sizeof(*f), GFP_KERNEL);
4414 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004415 goto err_allocate_vfid;
4416
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004417 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004418 f->fid = fid;
4419 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004420
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004421 list_add(&f->list, &mlxsw_sp->vfids.list);
4422 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004423
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004424 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004425
4426err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004427 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004428 return ERR_PTR(-ENOMEM);
4429}
4430
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004431static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4432 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004433{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004434 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004435 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004436
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004437 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004438 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004439
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004440 if (f->r)
4441 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004442
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004443 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004444
4445 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004446}
4447
Ido Schimmel99724c12016-07-04 08:23:14 +02004448static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4449 bool valid)
4450{
4451 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4452 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4453
4454 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4455 vid);
4456}
4457
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004458static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4459 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004460{
Ido Schimmel0355b592016-06-20 23:04:13 +02004461 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004462 int err;
4463
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004464 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004465 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004466 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004467 if (IS_ERR(f))
4468 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004469 }
4470
Ido Schimmel0355b592016-06-20 23:04:13 +02004471 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4472 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004473 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004474
Ido Schimmel0355b592016-06-20 23:04:13 +02004475 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4476 if (err)
4477 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004478
Ido Schimmel41b996c2016-06-20 23:04:17 +02004479 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004480 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004481
Ido Schimmel22305372016-06-20 23:04:21 +02004482 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4483
Ido Schimmel0355b592016-06-20 23:04:13 +02004484 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004485
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004486err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004487 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4488err_vport_flood_set:
4489 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004490 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004491 return err;
4492}
4493
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004494static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004495{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004496 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004497
Ido Schimmel22305372016-06-20 23:04:21 +02004498 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4499
Ido Schimmel0355b592016-06-20 23:04:13 +02004500 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4501
4502 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4503
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004504 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4505
Ido Schimmel41b996c2016-06-20 23:04:17 +02004506 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004507 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004508 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004509}
4510
4511static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4512 struct net_device *br_dev)
4513{
Ido Schimmel99724c12016-07-04 08:23:14 +02004514 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004515 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4516 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004517 int err;
4518
Ido Schimmel99724c12016-07-04 08:23:14 +02004519 if (f && !WARN_ON(!f->leave))
4520 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004521
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004522 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004523 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004524 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004525 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004526 }
4527
4528 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4529 if (err) {
4530 netdev_err(dev, "Failed to enable learning\n");
4531 goto err_port_vid_learning_set;
4532 }
4533
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004534 mlxsw_sp_vport->learning = 1;
4535 mlxsw_sp_vport->learning_sync = 1;
4536 mlxsw_sp_vport->uc_flood = 1;
4537 mlxsw_sp_vport->bridged = 1;
4538
4539 return 0;
4540
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004541err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004542 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004543 return err;
4544}
4545
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004546static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004547{
4548 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004549
4550 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4551
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004552 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004553
Ido Schimmel0355b592016-06-20 23:04:13 +02004554 mlxsw_sp_vport->learning = 0;
4555 mlxsw_sp_vport->learning_sync = 0;
4556 mlxsw_sp_vport->uc_flood = 0;
4557 mlxsw_sp_vport->bridged = 0;
4558}
4559
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004560static bool
4561mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4562 const struct net_device *br_dev)
4563{
4564 struct mlxsw_sp_port *mlxsw_sp_vport;
4565
4566 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4567 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004568 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004569
4570 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004571 return false;
4572 }
4573
4574 return true;
4575}
4576
4577static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4578 unsigned long event, void *ptr,
4579 u16 vid)
4580{
4581 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4582 struct netdev_notifier_changeupper_info *info = ptr;
4583 struct mlxsw_sp_port *mlxsw_sp_vport;
4584 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004585 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004586
4587 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4588
4589 switch (event) {
4590 case NETDEV_PRECHANGEUPPER:
4591 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004592 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004593 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004594 if (!info->linking)
4595 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004596 /* We can't have multiple VLAN interfaces configured on
4597 * the same port and being members in the same bridge.
4598 */
4599 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4600 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004601 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004602 break;
4603 case NETDEV_CHANGEUPPER:
4604 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004605 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004606 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004607 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004608 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4609 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004610 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004611 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004612 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004613 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004614 }
4615 }
4616
Ido Schimmel80bedf12016-06-20 23:03:59 +02004617 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004618}
4619
Ido Schimmel272c4472015-12-15 16:03:47 +01004620static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4621 unsigned long event, void *ptr,
4622 u16 vid)
4623{
4624 struct net_device *dev;
4625 struct list_head *iter;
4626 int ret;
4627
4628 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4629 if (mlxsw_sp_port_dev_check(dev)) {
4630 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4631 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004632 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004633 return ret;
4634 }
4635 }
4636
Ido Schimmel80bedf12016-06-20 23:03:59 +02004637 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004638}
4639
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004640static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4641 unsigned long event, void *ptr)
4642{
4643 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4644 u16 vid = vlan_dev_vlan_id(vlan_dev);
4645
Ido Schimmel272c4472015-12-15 16:03:47 +01004646 if (mlxsw_sp_port_dev_check(real_dev))
4647 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4648 vid);
4649 else if (netif_is_lag_master(real_dev))
4650 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4651 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004652
Ido Schimmel80bedf12016-06-20 23:03:59 +02004653 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004654}
4655
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004656static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4657 unsigned long event, void *ptr)
4658{
4659 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004660 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004661
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004662 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4663 err = mlxsw_sp_netdevice_router_port_event(dev);
4664 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004665 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4666 else if (netif_is_lag_master(dev))
4667 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004668 else if (netif_is_bridge_master(dev))
4669 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004670 else if (is_vlan_dev(dev))
4671 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004672
Ido Schimmel80bedf12016-06-20 23:03:59 +02004673 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004674}
4675
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004676static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4677 .notifier_call = mlxsw_sp_netdevice_event,
4678};
4679
Ido Schimmel99724c12016-07-04 08:23:14 +02004680static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4681 .notifier_call = mlxsw_sp_inetaddr_event,
4682 .priority = 10, /* Must be called before FIB notifier block */
4683};
4684
Jiri Pirkoe7322632016-09-01 10:37:43 +02004685static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4686 .notifier_call = mlxsw_sp_router_netevent_event,
4687};
4688
Jiri Pirko1d20d232016-10-27 15:12:59 +02004689static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4690 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4691 {0, },
4692};
4693
4694static struct pci_driver mlxsw_sp_pci_driver = {
4695 .name = mlxsw_sp_driver_name,
4696 .id_table = mlxsw_sp_pci_id_table,
4697};
4698
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004699static int __init mlxsw_sp_module_init(void)
4700{
4701 int err;
4702
4703 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004704 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004705 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4706
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004707 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4708 if (err)
4709 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004710
4711 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4712 if (err)
4713 goto err_pci_driver_register;
4714
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004715 return 0;
4716
Jiri Pirko1d20d232016-10-27 15:12:59 +02004717err_pci_driver_register:
4718 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004719err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004720 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004721 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004722 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4723 return err;
4724}
4725
4726static void __exit mlxsw_sp_module_exit(void)
4727{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004728 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004729 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004730 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004731 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004732 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4733}
4734
4735module_init(mlxsw_sp_module_init);
4736module_exit(mlxsw_sp_module_exit);
4737
4738MODULE_LICENSE("Dual BSD/GPL");
4739MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4740MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004741MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);