blob: 64d6fc98c9445e16622562a916a8cee0b05bca34 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
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484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
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Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhan047b6202021-05-11 20:32:25 -0700500 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
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510 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
511 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
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513 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
514 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
515 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
516 "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c",
517 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700524 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700525 "src/qs8-requantization/precise-scalar-signed64.c",
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Marat Dukhand481c282021-05-11 23:48:31 -0700528 "src/qs8-vadd/gen/minmax-scalar-x1.c",
529 "src/qs8-vadd/gen/minmax-scalar-x2.c",
530 "src/qs8-vadd/gen/minmax-scalar-x4.c",
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533 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700534 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
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536 "src/qu8-dwconv/up1x9-minmax-scalar.c",
537 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
538 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700539 "src/qu8-gemm/2x2-minmax-scalar.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700540 "src/qu8-igemm/2x2-minmax-scalar.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700541 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700543 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700544 "src/qu8-requantization/precise-scalar-signed64.c",
545 "src/qu8-requantization/precise-scalar-unsigned32.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -0700547 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700548 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700549 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700550 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700551 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700552 "src/x8-lut/scalar.c",
553 "src/x8-zip/x2-scalar.c",
554 "src/x8-zip/x3-scalar.c",
555 "src/x8-zip/x4-scalar.c",
556 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800557 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700558 "src/x32-fill/scalar-float.c",
559 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700560 "src/x32-packx/x2-scalar.c",
561 "src/x32-packx/x3-scalar.c",
562 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700563 "src/x32-pad/scalar-float.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700564 "src/x32-pad/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700565 "src/x32-unpool/scalar.c",
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567 "src/x32-zip/x3-scalar.c",
568 "src/x32-zip/x4-scalar.c",
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572
Marat Dukhan436ebe62019-12-04 15:10:12 -0800573WASM_UKERNELS = [
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001355 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07001381 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
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Marat Dukhande390d42020-11-29 19:32:18 -08001389 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
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1391 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001393 "src/math/roundd-wasmsimd-addsub.c",
1394 "src/math/roundd-wasmsimd-cvt.c",
1395 "src/math/roundne-wasmsimd-addsub.c",
1396 "src/math/roundu-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-cvt.c",
1398 "src/math/roundz-wasmsimd-addsub.c",
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1400 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
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Marat Dukhane1ff2482021-05-24 17:48:47 -07001402 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1404 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
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Marat Dukhanb5e3d172020-08-06 13:29:53 -07001408 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001429 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001430 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001431 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1432 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -07001440 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001441 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001442 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001443 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001444 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001445 "src/x32-zip/x2-wasmsimd.c",
1446 "src/x32-zip/x3-wasmsimd.c",
1447 "src/x32-zip/x4-wasmsimd.c",
1448 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001449]
1450
Marat Dukhan08c4a432019-10-03 09:29:21 -07001451# ISA-specific micro-kernels
1452NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001453 "src/f32-argmaxpool/4x-neon-c4.c",
1454 "src/f32-argmaxpool/9p8x-neon-c4.c",
1455 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001456 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1457 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001458 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001462 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001466 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001467 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001469 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001471 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1473 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1475 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001477 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001479 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001489 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001497 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001510 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001520 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001521 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1522 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001523 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1525 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001526 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1530 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1531 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001532 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001536 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1537 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001538 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1539 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1540 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1541 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1542 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1546 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1547 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1548 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1552 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1553 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001554 "src/f32-ibilinear-chw/gen/neon-p4.c",
1555 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001556 "src/f32-ibilinear/gen/neon-c4.c",
1557 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001558 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001560 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001561 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1562 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001563 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1565 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1567 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001568 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001570 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001572 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1573 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001574 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1575 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001577 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1578 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001579 "src/f32-prelu/gen/neon-1x4.c",
1580 "src/f32-prelu/gen/neon-1x8.c",
1581 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001582 "src/f32-prelu/gen/neon-2x4.c",
1583 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001584 "src/f32-prelu/gen/neon-2x16.c",
1585 "src/f32-prelu/gen/neon-4x4.c",
1586 "src/f32-prelu/gen/neon-4x8.c",
1587 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001588 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1600 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001612 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001613 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1614 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon.c",
1616 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon.c",
1619 "src/f32-spmm/gen/12x1-minmax-neon.c",
1620 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon.c",
1623 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001626 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1627 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1628 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001630 "src/f32-vbinary/gen/vmax-neon-x4.c",
1631 "src/f32-vbinary/gen/vmax-neon-x8.c",
1632 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1634 "src/f32-vbinary/gen/vmin-neon-x4.c",
1635 "src/f32-vbinary/gen/vmin-neon-x8.c",
1636 "src/f32-vbinary/gen/vminc-neon-x4.c",
1637 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001638 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1639 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1640 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1642 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001644 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1645 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1646 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001648 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1649 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1650 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001652 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1653 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001654 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1660 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001666 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1667 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001669 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1670 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001671 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1672 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001673 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1674 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001675 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1676 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001677 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1678 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1679 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1681 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001683 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001701 "src/f32-vunary/gen/vabs-neon-x4.c",
1702 "src/f32-vunary/gen/vabs-neon-x8.c",
1703 "src/f32-vunary/gen/vneg-neon-x4.c",
1704 "src/f32-vunary/gen/vneg-neon-x8.c",
1705 "src/f32-vunary/gen/vsqr-neon-x4.c",
1706 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001707 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1708 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001709 "src/math/roundd-neon-addsub.c",
1710 "src/math/roundd-neon-cvt.c",
1711 "src/math/roundne-neon-addsub.c",
1712 "src/math/roundu-neon-addsub.c",
1713 "src/math/roundu-neon-cvt.c",
1714 "src/math/roundz-neon-addsub.c",
1715 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001716 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1717 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1719 "src/math/sqrt-neon-nr1rsqrts.c",
1720 "src/math/sqrt-neon-nr2rsqrts.c",
1721 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001722 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
1723 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
1724 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
1725 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
1726 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
1727 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
1728 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
1729 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001730 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1731 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1732 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1733 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001734 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1735 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1736 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1737 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001738 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1739 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1740 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1741 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1742 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1743 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1744 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1745 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1746 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1747 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1748 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1749 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1750 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1751 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1752 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1753 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1754 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1755 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1756 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1757 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1758 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1759 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1760 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1761 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1762 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1763 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1764 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1765 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1766 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1767 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1768 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1769 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1770 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1771 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1772 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1773 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1774 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1775 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1776 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1777 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1778 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1779 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1780 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1781 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1782 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1783 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1784 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1785 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1786 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1787 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1788 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1789 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1790 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1791 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1792 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1793 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1794 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1795 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1796 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1797 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1798 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1799 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1800 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1801 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1802 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1803 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1804 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1805 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1806 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1807 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1808 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1809 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1810 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1811 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1812 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1813 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1814 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1815 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1816 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1817 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1818 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1819 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1820 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1821 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1822 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1823 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1824 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1825 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1826 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1827 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1828 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1829 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1830 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1831 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1832 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1833 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1834 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1835 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1836 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1837 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1838 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1839 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1840 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1841 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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1843 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
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1845 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
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1847 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
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1849 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1850 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1851 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1852 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1853 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1854 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1855 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1856 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1857 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1858 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1859 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1860 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1861 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1862 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1863 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1864 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1865 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1866 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1867 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1868 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1869 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1870 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1871 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1872 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1873 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001874 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001875 "src/qs8-requantization/gemmlowp-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001876 "src/qs8-requantization/precise-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001877 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1878 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1879 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1880 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1881 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1882 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1883 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1884 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001885 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1886 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1887 "src/qu8-dwconv/up8x9-minmax-neon.c",
1888 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1889 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1890 "src/qu8-gemm/4x8-minmax-neon.c",
1891 "src/qu8-gemm/8x8-minmax-neon.c",
1892 "src/qu8-igemm/4x8-minmax-neon.c",
1893 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001894 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001895 "src/qu8-requantization/gemmlowp-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001896 "src/qu8-requantization/precise-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001897 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001898 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001899 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001900 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001901 "src/x8-zip/x2-neon.c",
1902 "src/x8-zip/x3-neon.c",
1903 "src/x8-zip/x4-neon.c",
1904 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001905 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001906 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001907 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001908 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001909 "src/x32-zip/x2-neon.c",
1910 "src/x32-zip/x3-neon.c",
1911 "src/x32-zip/x4-neon.c",
1912 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001913]
1914
1915NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001916 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1917 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1918 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1919 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1920 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1921 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1922 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1923 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1924 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1925 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1926 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1927 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1928 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1929 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1930 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1931 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1932 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1933 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1934 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1935 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1936 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1937 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1938 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1939 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1940 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1941 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1942 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1943 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1944 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1945 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001946 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1947 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001948 "src/f32-ibilinear/gen/neonfma-c4.c",
1949 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001950 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001951 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001952 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001953 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1954 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001955 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1956 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001957 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1958 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001959 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1960 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001961 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001962 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001963 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001964 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1965 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001966 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001967 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1968 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001969 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001970 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1971 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001972 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1973 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1974 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1975 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1976 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1977 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1978 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1979 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1980 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1981 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1982 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1984 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08001985 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1986 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
1987 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1988 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1989 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
1990 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1991 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1992 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1993 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
1994 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1995 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
1996 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
1997 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001998 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
1999 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2000 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2001 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2002 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2003 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2004 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2005 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2006 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2007 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2008 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2009 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002010 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2011 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002012 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2013 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2014 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2015 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2016 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2017 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2018 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2019 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2020 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2021 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2022 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2023 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2024 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2025 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2026 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2027 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2028 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2029 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002066 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2067 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2068 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2069 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2070 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2071 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2072 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2073 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2074 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2075 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2076 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2077 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2078 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2079 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2080 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2081 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2082 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2083 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2084 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2085 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002086 "src/math/exp-neonfma-rr2-lut64-p2.c",
2087 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002088 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2089 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002090 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2091 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2092 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002093 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2094 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2095 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002096 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2097 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2098 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002099 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2100 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2101 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002102 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2103 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2104 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002105 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2106 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2107 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002108 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2109 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2110 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002111 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002112 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002113 "src/math/sqrt-neonfma-nr2fma.c",
2114 "src/math/sqrt-neonfma-nr2fma1adj.c",
2115 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002116]
2117
2118AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002119 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002120 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002121 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
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Marat Dukhan56b10cd2020-05-18 09:35:49 -07002123 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002124 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002125 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
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Marat Dukhan1f29b802020-05-15 23:46:39 -07002127 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002128 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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2130 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002131 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
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Marat Dukhan1268a242020-10-24 00:36:32 -07002133 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2136 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2137 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002138 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
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2140 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002141 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002142 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002143 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
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Marat Dukhan149f0ea2020-10-26 12:50:33 -07002146 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002150 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002151 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002154 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002155 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002156 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002159 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002167 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002169 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
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2175 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2176 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2177 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2178 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2179 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2180 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2181 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2182 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2183 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2184 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2185 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2186 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2187 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2188 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002189 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2190 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002191 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2192 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002193 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2194 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2196 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002197 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2198 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002199 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
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2203 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2204 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002205 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2206 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
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2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002223 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2224 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002225 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002226 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002227 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002228 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002229 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002230 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002231]
2232
Marat Dukhan8853b822020-05-07 12:19:01 -07002233NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002234 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2235 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002236 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2237 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2238 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
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2241 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002242 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002243 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002244 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002245 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002246]
2247
Marat Dukhan08c4a432019-10-03 09:29:21 -07002248AARCH64_NEONFP16ARITH_UKERNELS = [
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2252 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002253 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2254 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2255 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2256 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2257 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2258 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2259 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
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Frank Barchard0bb49a72020-06-04 11:35:11 -07002261 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002263 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
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2265 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2266 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2267 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2268 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
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2271 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2272 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2273 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2274 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2275 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2276 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2277 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2278 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002279 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2280 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2281 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2282 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2283 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2284 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2285 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2286 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002287 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002288 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002289 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002290 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002291 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002292 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002293 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002294 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002295 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002296 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2297 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2298 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2299 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2300 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2301 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2302 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2303 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2304 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2305 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2306 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2307 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2308 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2309 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2310 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2311 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2312 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2313 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2314 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2315 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2316 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2317 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2318 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2319 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2320 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2321 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2322 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2323 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2324 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002325 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2326 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002327 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2328 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002329 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2330 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002331 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2332 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002333]
2334
Benoit Jacoba9644732020-08-13 12:48:55 -07002335NEONDOT_UKERNELS = [
Marat Dukhand65d20e2021-05-24 16:59:51 -07002336 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
2337 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
2338 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
2339 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
2340 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
2341 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
2342 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
2343 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
2344 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
2345 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
2346 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
2347 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
2348 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
2349 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
2350 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
2351 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002352]
2353
Marat Dukhan08c4a432019-10-03 09:29:21 -07002354SSE_UKERNELS = [
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Erich Elsenb1233402020-06-08 15:53:15 -07002357 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
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2361 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002363 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002365 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2366 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2367 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2368 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002369 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2370 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002371 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
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Marat Dukhan470078a2020-10-23 22:36:52 -07002374 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002375 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
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2378 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2379 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
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Marat Dukhan0ff97182020-10-25 19:14:03 -07002381 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002384 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002385 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002386 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
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2388 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002389 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
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2391 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2392 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2393 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2394 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2395 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2396 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2397 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2398 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2399 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2400 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2401 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002402 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2403 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2404 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2405 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2406 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2407 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
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2409 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002410 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
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2417 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
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2420 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002421 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
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Marat Dukhan802fcae2020-12-11 14:37:25 -08002424 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
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2426 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002427 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
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2429 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002430 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002433 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
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Marat Dukhan802fcae2020-12-11 14:37:25 -08002437 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
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Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002440 "src/f32-ibilinear-chw/gen/sse-p4.c",
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2446 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002447 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
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2449 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
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2452 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
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Marat Dukhan802fcae2020-12-11 14:37:25 -08002454 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
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2456 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002457 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
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2459 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002460 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002461 "src/f32-prelu/gen/sse-2x4.c",
2462 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002463 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002464 "src/f32-spmm/gen/4x1-minmax-sse.c",
2465 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002466 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002467 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002468 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2469 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2470 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2471 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2472 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2473 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2474 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2475 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002476 "src/f32-vbinary/gen/vmax-sse-x4.c",
2477 "src/f32-vbinary/gen/vmax-sse-x8.c",
2478 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2479 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2480 "src/f32-vbinary/gen/vmin-sse-x4.c",
2481 "src/f32-vbinary/gen/vmin-sse-x8.c",
2482 "src/f32-vbinary/gen/vminc-sse-x4.c",
2483 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002484 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2485 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2486 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2487 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2488 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2489 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2490 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2491 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002492 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2493 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2494 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2495 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002496 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2497 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2498 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2499 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002500 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2501 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002502 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2503 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002504 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2505 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002506 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2507 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002508 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2509 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002510 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2511 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002512 "src/f32-vunary/gen/vabs-sse-x4.c",
2513 "src/f32-vunary/gen/vabs-sse-x8.c",
2514 "src/f32-vunary/gen/vneg-sse-x4.c",
2515 "src/f32-vunary/gen/vneg-sse-x8.c",
2516 "src/f32-vunary/gen/vsqr-sse-x4.c",
2517 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002518 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002519 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002520 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002521 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002522 "src/math/sqrt-sse-hh1mac.c",
2523 "src/math/sqrt-sse-nr1mac.c",
2524 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002525 "src/x32-fill/sse.c",
2526 "src/x32-packx/x4-sse.c",
2527 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002528]
2529
2530SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002531 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002532 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002533 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002534 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2535 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2536 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2537 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2538 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2539 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2540 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2541 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2542 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2543 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2544 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2545 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002546 "src/f32-prelu/gen/sse2-2x4.c",
2547 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002548 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002549 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002550 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002551 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2552 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002553 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002554 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2555 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002556 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002557 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2558 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002559 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002560 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2561 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2562 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2563 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2564 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2565 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2566 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2567 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2568 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2569 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2570 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2571 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002572 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2573 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002574 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2575 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002576 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2577 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2578 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2579 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2580 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2581 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002582 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2583 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2584 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2585 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2586 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2587 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2588 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2589 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2590 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2591 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2592 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2593 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002594 "src/math/exp-sse2-rr2-lut64-p2.c",
2595 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002596 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002597 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002598 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002599 "src/math/roundd-sse2-cvt.c",
2600 "src/math/roundne-sse2-cvt.c",
2601 "src/math/roundu-sse2-cvt.c",
2602 "src/math/roundz-sse2-cvt.c",
2603 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2604 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2605 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2606 "src/math/sigmoid-sse2-rr2-p5-div.c",
2607 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2608 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002609 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
2610 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2611 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2612 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2613 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2614 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002615 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2616 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2617 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002618 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2619 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2620 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002621 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
2622 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
2623 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
2624 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
2625 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
2626 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
2627 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
2628 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
2629 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
2630 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
2631 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
2632 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
2633 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
2634 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
2635 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
2636 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
2637 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
2638 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
2639 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
2640 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
2641 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
2642 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
2643 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
2644 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
2645 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
2646 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
2647 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
2648 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
2649 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
2650 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
2651 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
2652 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
2653 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
2654 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
2655 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002656 "src/qs8-requantization/fp32-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002657 "src/qs8-requantization/precise-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002658 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002659 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2660 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2661 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2662 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002663 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2664 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2665 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2666 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002667 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2668 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002669 "src/qu8-dwconv/up8x9-minmax-sse2.c",
2670 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2671 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
2672 "src/qu8-gemm/2x4c8-minmax-sse2.c",
2673 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002674 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002675 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002676 "src/qu8-requantization/gemmlowp-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002677 "src/qu8-requantization/precise-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002678 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002679 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002680 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002681 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002682 "src/x8-zip/x2-sse2.c",
2683 "src/x8-zip/x3-sse2.c",
2684 "src/x8-zip/x4-sse2.c",
2685 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002686 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002687 "src/x32-zip/x2-sse2.c",
2688 "src/x32-zip/x3-sse2.c",
2689 "src/x32-zip/x4-sse2.c",
2690 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07002691]
2692
2693SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07002694 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
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Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002697 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
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Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002699 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
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Marat Dukhane1ff2482021-05-24 17:48:47 -07002704 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
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2707 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
2708 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
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Marat Dukhan159688f2020-08-06 10:34:29 -07002710 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002713 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002716 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
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2718 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
2719 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
2720 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
2721 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
2722 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
2723 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
2724 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
2725 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
2726 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
2727 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
2728 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
2729 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
2730 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
2731 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
2732 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
2733 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
2734 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
2735 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
2736 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
2737 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
2738 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
2739 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
2740 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
2741 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
2742 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
2743 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
2744 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
2745 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
2746 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
2747 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
2748 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
2749 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
2750 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002751 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002752 "src/qs8-requantization/precise-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002753 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002754 "src/qu8-requantization/precise-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002755]
2756
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002757SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08002758 "src/f32-prelu/gen/sse41-2x4.c",
2759 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002760 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
2761 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
2762 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
2763 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
2764 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
2765 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
2766 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
2767 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
2768 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
2769 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
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2771 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002772 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
2773 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002774 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2775 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002776 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
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2778 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
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2780 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07002782 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
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2788 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
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2793 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002794 "src/math/roundd-sse41.c",
2795 "src/math/roundne-sse41.c",
2796 "src/math/roundu-sse41.c",
2797 "src/math/roundz-sse41.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002798 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
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2800 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
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2802 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2803 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2804 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2805 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
2806 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2807 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2808 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
2809 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002810 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002813 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002816 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
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2818 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
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2821 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
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2828 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
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2841 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002851 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002852 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002853 "src/qs8-requantization/precise-sse4.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002854 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
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2856 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
2857 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07002858 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07002862 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
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2865 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07002866 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
2867 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
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2869 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002870 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002871 "src/qu8-requantization/precise-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002872]
2873
Marat Dukhan08c4a432019-10-03 09:29:21 -07002874AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07002875 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002877 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002879 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002881 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
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2883 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
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2885 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002887 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002888 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002890 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002891 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002892 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002893 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002894 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
2895 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
2896 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
2897 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
2898 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
2899 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
2900 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
2901 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
2902 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
2903 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
2904 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002905 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002906 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
2907 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002908 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002909 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002910 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002911 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002912 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
2913 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07002914 "src/f32-prelu/gen/avx-2x8.c",
2915 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002916 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002917 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
2918 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
2919 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
2920 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
2921 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
2922 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
2923 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
2924 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08002925 "src/f32-vbinary/gen/vmax-avx-x8.c",
2926 "src/f32-vbinary/gen/vmax-avx-x16.c",
2927 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
2928 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
2929 "src/f32-vbinary/gen/vmin-avx-x8.c",
2930 "src/f32-vbinary/gen/vmin-avx-x16.c",
2931 "src/f32-vbinary/gen/vminc-avx-x8.c",
2932 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002933 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
2934 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
2935 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
2936 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
2937 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
2938 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
2939 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
2940 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002941 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
2942 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
2943 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
2944 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002945 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
2946 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
2947 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
2948 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002949 "src/f32-vclamp/gen/vclamp-avx-x8.c",
2950 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002951 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
2952 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
2953 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
2954 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
2955 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
2956 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
2957 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
2958 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
2959 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
2960 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
2961 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
2962 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
2963 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
2964 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
2965 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
2966 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
2967 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
2968 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002969 "src/f32-vhswish/gen/vhswish-avx-x8.c",
2970 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002971 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
2972 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002973 "src/f32-vrelu/gen/vrelu-avx-x8.c",
2974 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002975 "src/f32-vrnd/gen/vrndd-avx-x8.c",
2976 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002977 "src/f32-vrnd/gen/vrndne-avx-x8.c",
2978 "src/f32-vrnd/gen/vrndne-avx-x16.c",
2979 "src/f32-vrnd/gen/vrndu-avx-x8.c",
2980 "src/f32-vrnd/gen/vrndu-avx-x16.c",
2981 "src/f32-vrnd/gen/vrndz-avx-x8.c",
2982 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002983 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002984 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
2985 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
2986 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
2987 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
2988 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
2989 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
2990 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
2991 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
2992 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
2993 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
2994 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
2995 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
2996 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
2997 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
2998 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
2999 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3000 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3001 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3002 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3003 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003004 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3005 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003006 "src/f32-vunary/gen/vabs-avx-x8.c",
3007 "src/f32-vunary/gen/vabs-avx-x16.c",
3008 "src/f32-vunary/gen/vneg-avx-x8.c",
3009 "src/f32-vunary/gen/vneg-avx-x16.c",
3010 "src/f32-vunary/gen/vsqr-avx-x8.c",
3011 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003012 "src/math/exp-avx-rr2-p5.c",
3013 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3014 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3015 "src/math/expm1minus-avx-rr2-p6.c",
3016 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3017 "src/math/sigmoid-avx-rr2-p5-div.c",
3018 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3019 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003020 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3021 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
3022 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3023 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3024 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3025 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3026 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3027 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3028 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3029 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3030 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3031 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003032 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3033 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
3034 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
3035 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3036 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
3037 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
3038 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3039 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
3040 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
3041 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3042 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
3043 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
3044 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3045 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
3046 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
3047 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3048 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
3049 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
3050 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
3051 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
3052 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
3053 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3054 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
3055 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3056 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
3057 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3058 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
3059 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3060 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
3061 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3062 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
3063 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3064 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
3065 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
3066 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003067 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3068 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3069 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3070 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3071 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3072 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3073 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3074 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3075 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3076 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3077 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3078 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3079 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3080 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3081 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3082 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003083]
3084
Marat Dukhan1566fee2020-08-02 21:55:41 -07003085XOP_UKERNELS = [
Marat Dukhane1ff2482021-05-24 17:48:47 -07003086 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
3087 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3088 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3089 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3090 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3091 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003092 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
3093 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld128.c",
3094 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
3095 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
3096 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
3097 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
3098 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
3099 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
3100 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
3101 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
3102 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
3103 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
3104 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
3105 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
3106 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
3107 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
3108 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
3109 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
3110 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
3111 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
3112 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
3113 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
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3115 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
3116 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
3117 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
3118 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
3119 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
3120 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
3121 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
3122 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
3123 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
3124 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
3125 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
3126 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003127 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3128 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3129 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3130 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3131 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3132 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3133 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3134 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003135]
3136
Marat Dukhanfda12b82019-11-21 12:27:59 -08003137FMA3_UKERNELS = [
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Marat Dukhan1c587112020-04-08 20:04:28 -07003140 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003142 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
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3148 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3149 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003155 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003158 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003159 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003161 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003164 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3165 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3166 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3167 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3168 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3169 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3170 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3171 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3172 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3173 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3174 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3175 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3176 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3177 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003178 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003179 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3180 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3181 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3182 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003183 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003184 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3185 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003186 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003187 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3188 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003189 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3190 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3191 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003192 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3193 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003194 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3195 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3196 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3197 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3198 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3199 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3200 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3201 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003202 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003203 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003204 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003205]
3206
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003207AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003208 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
3209 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003210 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003211 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003212 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003213 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
3214 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003215 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003216 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
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3218 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003219 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003220 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
3221 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003222 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003223 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003224 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003225 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3226 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003227 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003228 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3229 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3230 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003231 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003232 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3233 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003234 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003235 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003236 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003237 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3238 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003239 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003240 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3241 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3242 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003243 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003244 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3245 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3246 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3247 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3248 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3249 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
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3251 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3252 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3253 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3254 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3255 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3256 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3257 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3258 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3259 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3260 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3261 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3262 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3263 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3264 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3265 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3266 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3267 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3268 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3269 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3270 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3271 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3272 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3273 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3274 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3275 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3276 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3277 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3278 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3279 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3280 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3281 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3282 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3283 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003284 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3285 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3286 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3287 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3288 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3289 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3290 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3291 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3292 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3293 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3294 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3295 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3296 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3297 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3298 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3299 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3300 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3301 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3302 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3303 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3304 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3305 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3306 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3307 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003308 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3309 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3310 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3311 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3312 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3313 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3314 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3315 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3316 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3317 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3318 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3319 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3320 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3321 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3322 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3323 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3324 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3325 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3326 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3327 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3328 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3329 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3330 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3331 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3332 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3333 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3334 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3335 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3336 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3337 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003338 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3339 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3340 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003341 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3342 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3343 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3344 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003345 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003346 "src/math/extexp-avx2-p5.c",
3347 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3348 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3349 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3350 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3351 "src/math/sigmoid-avx2-rr1-p5-div.c",
3352 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3353 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3354 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3355 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3356 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3357 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3358 "src/math/sigmoid-avx2-rr2-p5-div.c",
3359 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3360 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003361 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003362 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003363 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003364 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003365 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003366 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003367 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003368 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003369 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003370 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003371 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003372 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003373 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003374 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003375 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003376 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003377 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003378 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003379 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003380 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003381 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003382 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003383 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003384 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003385 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003386 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003387 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
3388 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003389 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003390 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
3391 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003392 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003393 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
3394 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003395 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003396 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003397 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003398 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003399 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003400 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3401 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3402 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3403 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3404 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3405 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3406 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3407 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003408]
3409
Marat Dukhan08c4a432019-10-03 09:29:21 -07003410AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003411 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3412 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003413 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3414 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003415 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3416 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003417 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3418 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3419 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3420 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3421 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3422 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003423 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3424 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3425 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3426 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3427 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3428 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003429 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3430 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3431 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3432 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3433 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3434 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003435 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3436 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3437 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3438 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3439 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3440 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003441 "src/f32-prelu/gen/avx512f-2x16.c",
3442 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003443 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3444 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003445 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003446 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003447 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003448 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3449 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003450 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003451 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3452 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3453 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003454 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003455 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3456 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003457 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003458 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003459 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003460 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3461 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003462 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003463 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3464 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3465 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003466 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003467 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3468 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003469 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003470 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003471 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003472 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3473 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003474 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003475 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3476 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3477 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003478 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003479 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003480 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3481 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3482 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3483 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3484 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3485 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3486 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3487 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003488 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3489 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3490 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3491 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3492 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3493 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3494 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3495 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003496 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3497 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3498 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3499 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3500 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3501 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3502 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3503 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003504 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3505 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3506 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3507 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003508 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3509 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3510 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3511 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003512 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3513 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003514 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3515 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3516 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3517 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3518 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3519 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3520 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3521 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3522 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3523 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3524 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3525 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3526 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3527 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3528 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3529 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003530 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3531 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003532 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3533 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003534 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3535 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003536 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3537 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3538 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3539 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3540 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3541 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3542 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3543 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003544 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003545 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3546 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3547 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3548 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3549 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3550 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3551 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3552 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3553 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3554 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3555 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3556 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3557 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3558 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3559 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3560 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3561 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3562 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3563 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3564 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3565 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3566 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3567 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3568 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003569 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3570 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3571 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3572 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3573 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3574 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3575 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3576 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3577 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3578 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3579 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3580 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3581 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3582 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3583 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3584 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3585 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3586 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3587 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3588 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3589 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3590 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3591 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3592 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3593 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3594 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3595 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3596 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3597 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3598 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3599 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3600 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3601 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3602 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3603 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3604 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3605 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3606 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3607 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3608 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3609 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3610 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3611 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3612 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3613 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
3614 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
3615 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
3616 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003617 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
3618 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
3619 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
3620 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
3621 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
3622 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
3623 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
3624 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003625 "src/f32-vunary/gen/vabs-avx512f-x16.c",
3626 "src/f32-vunary/gen/vabs-avx512f-x32.c",
3627 "src/f32-vunary/gen/vneg-avx512f-x16.c",
3628 "src/f32-vunary/gen/vneg-avx512f-x32.c",
3629 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
3630 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003631 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
3632 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
3633 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
3634 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
3635 "src/math/exp-avx512f-rr2-p5-scalef.c",
3636 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003637 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
3638 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07003639 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003640 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003641 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003642 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003643 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003644 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003645 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003646 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003647 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003648 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
3649 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
3650 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
3651 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
3652 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
3653 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
3654 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
3655 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
3656 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
3657 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003658 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003659 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003660 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
3661 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
3662 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
3663 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003664 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003665 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003666 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003667]
3668
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003669AVX512SKX_UKERNELS = [
Marat Dukhane1ff2482021-05-24 17:48:47 -07003670 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
3671 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
3672 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
3673 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003674 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
3675 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
3676 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
3677 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
3678 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
3679 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
3680 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
3681 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003682]
3683
Frank Barchardbcedc082020-08-17 18:00:51 -07003684WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07003685 "src/f32-vrelu/wasm_shr_x1.S",
3686 "src/f32-vrelu/wasm_shr_x2.S",
3687 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07003688]
3689
Marat Dukhan08c4a432019-10-03 09:29:21 -07003690AARCH32_ASM_UKERNELS = [
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Marat Dukhan3b98f6b2020-05-17 10:09:22 -07003692 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003693 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
3694 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003695 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003696 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07003697 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003698 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003699 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
3700 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003701 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
3702 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
3703 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
3704 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003705]
3706
3707AARCH64_ASM_UKERNELS = [
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Frank Barchard04336c12020-10-22 16:48:55 -07003709 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003710 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003711 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003712 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003713 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -07003714 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003715 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
3716 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
3717 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
3718 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
3719 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
3720 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
3721 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003722 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
3723 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003724 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3725 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3726 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003727 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
3728 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003729 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3730 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
3731 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3732 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003733 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003734 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
3735 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003736 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3737 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
3738 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3739 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003740 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003741 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003742 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003743 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003744 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
3745 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
3746 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
3747 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
3748 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
3749 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
3750 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
3751 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
3752 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
3753 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
3754 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
3755 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
3756 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
3757 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
3758 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
3759 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
3760 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
3761 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
3762 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
3763 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
3764 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
3765 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003766 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003767 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003768 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
3769 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003770 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
3771 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
3772 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
3773 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
3774 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
3775 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003776 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
3777 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
3778 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
3779 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003780 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
3781 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003782 "src/qs8-gemm/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3783 "src/qs8-gemm/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
3784 "src/qs8-gemm/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
3785 "src/qs8-gemm/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3786 "src/qs8-gemm/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
3787 "src/qs8-gemm/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3788 "src/qs8-gemm/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
3789 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3790 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3791 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3792 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3793 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3794 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3795 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3796 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3797 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
3798 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
3799 "src/qs8-igemm/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3800 "src/qs8-igemm/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
3801 "src/qs8-igemm/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
3802 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3803 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3804 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3805 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3806 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3807 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3808 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3809 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3810 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
3811 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003812]
3813
Marat Dukhan1b354632020-03-23 12:50:22 -07003814INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003815 "src/xnnpack/argmaxpool.h",
3816 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003817 "src/xnnpack/common.h",
3818 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08003819 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003820 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07003821 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003822 "src/xnnpack/gavgpool.h",
3823 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07003824 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003825 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08003826 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003827 "src/xnnpack/lut.h",
3828 "src/xnnpack/math.h",
3829 "src/xnnpack/maxpool.h",
3830 "src/xnnpack/packx.h",
3831 "src/xnnpack/pad.h",
3832 "src/xnnpack/params.h",
3833 "src/xnnpack/pavgpool.h",
3834 "src/xnnpack/ppmm.h",
3835 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07003836 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07003837 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07003838 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003839 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003840 "src/xnnpack/spmm.h",
3841 "src/xnnpack/unpool.h",
3842 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08003843 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003844 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07003845 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07003846 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07003847 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08003848 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003849 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07003850]
3851
3852INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003853 "include/xnnpack.h",
3854 "src/xnnpack/allocator.h",
3855 "src/xnnpack/compute.h",
3856 "src/xnnpack/im2col.h",
3857 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003858 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07003859 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003860 "src/xnnpack/operator.h",
3861 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07003862 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003863 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003864 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08003865 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003866]
3867
Marat Dukhan1b354632020-03-23 12:50:22 -07003868ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003869 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003870]
3871
Marat Dukhan1b354632020-03-23 12:50:22 -07003872MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003873 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07003874 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003875]
3876
Marat Dukhan1b354632020-03-23 12:50:22 -07003877MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07003878 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003879 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07003880 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003881 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003882]
3883
3884OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003885 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07003886 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003887]
3888
3889WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003890 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07003891 "src/xnnpack/operator.h",
3892 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003893]
3894
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07003895LOGGING_COPTS = select({
3896 # No logging in optimized mode
3897 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
3898 # Full logging in debug mode
3899 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
3900 # Error-only logging in default (fastbuild) mode
3901 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
3902})
3903
Marat Dukhan3b59de22020-06-03 20:15:19 -07003904LOGGING_SRCS = select({
3905 # No logging in optimized mode
3906 ":optimized_build": [],
3907 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07003908 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07003909 "src/operator-strings.c",
3910 "src/subgraph-strings.c",
3911 ],
3912})
3913
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07003914LOGGING_HDRS = [
3915 "src/xnnpack/log.h",
3916]
3917
Marat Dukhan08c4a432019-10-03 09:29:21 -07003918xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003919 name = "tables",
3920 srcs = TABLE_SRCS,
3921 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07003922 gcc_copts = xnnpack_gcc_std_copts(),
3923 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003924)
3925
3926xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07003927 name = "scalar_ukernels",
3928 srcs = SCALAR_UKERNELS,
3929 hdrs = INTERNAL_HDRS,
3930 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07003931 gcc_copts = xnnpack_gcc_std_copts(),
3932 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07003933 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003934 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003935 "@FP16",
3936 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08003937 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003938 ],
3939)
3940
3941xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07003942 name = "scalar_ukernels_test_mode",
3943 srcs = SCALAR_UKERNELS,
3944 hdrs = INTERNAL_HDRS,
3945 aarch32_copts = ["-marm"],
3946 copts = [
3947 "-UNDEBUG",
3948 "-DXNN_TEST_MODE=1",
3949 ],
3950 gcc_copts = xnnpack_gcc_std_copts(),
3951 msvc_copts = xnnpack_msvc_std_copts(),
3952 deps = [
3953 ":tables",
3954 "@FP16",
3955 "@FXdiv",
3956 "@pthreadpool",
3957 ],
3958)
3959
3960xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08003961 name = "wasm_ukernels",
3962 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07003963 gcc_copts = xnnpack_gcc_std_copts(),
3964 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08003965 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07003966 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08003967 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003968 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08003969 "@FP16",
3970 "@FXdiv",
3971 "@pthreadpool",
3972 ],
3973)
3974
3975xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07003976 name = "wasm_ukernels_test_mode",
3977 hdrs = INTERNAL_HDRS,
3978 copts = [
3979 "-UNDEBUG",
3980 "-DXNN_TEST_MODE=1",
3981 ],
3982 gcc_copts = xnnpack_gcc_std_copts(),
3983 msvc_copts = xnnpack_msvc_std_copts(),
3984 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07003985 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07003986 deps = [
3987 ":tables",
3988 "@FP16",
3989 "@FXdiv",
3990 "@pthreadpool",
3991 ],
3992)
3993
3994xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07003995 name = "neon_ukernels",
3996 hdrs = INTERNAL_HDRS,
3997 aarch32_copts = [
3998 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07003999 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004000 "-mfpu=neon",
4001 ],
4002 aarch32_srcs = NEON_UKERNELS,
4003 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004004 gcc_copts = xnnpack_gcc_std_copts(),
4005 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004006 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004007 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004008 "@FP16",
4009 "@pthreadpool",
4010 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004011)
4012
4013xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004014 name = "neon_ukernels_test_mode",
4015 hdrs = INTERNAL_HDRS,
4016 aarch32_copts = [
4017 "-marm",
4018 "-march=armv7-a",
4019 "-mfpu=neon",
4020 ],
4021 aarch32_srcs = NEON_UKERNELS,
4022 aarch64_srcs = NEON_UKERNELS,
4023 copts = [
4024 "-UNDEBUG",
4025 "-DXNN_TEST_MODE=1",
4026 ],
4027 gcc_copts = xnnpack_gcc_std_copts(),
4028 msvc_copts = xnnpack_msvc_std_copts(),
4029 deps = [
4030 ":tables",
4031 "@FP16",
4032 "@pthreadpool",
4033 ],
4034)
4035
4036xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004037 name = "neonfma_ukernels",
4038 hdrs = INTERNAL_HDRS,
4039 aarch32_copts = [
4040 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004041 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004042 "-mfpu=neon-vfpv4",
4043 ],
4044 aarch32_srcs = NEONFMA_UKERNELS,
4045 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004046 apple_aarch32_copts = [
4047 "-mcpu=swift",
4048 "-mtune=generic",
4049 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004050 gcc_copts = xnnpack_gcc_std_copts(),
4051 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004052 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004053 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004054 "@FP16",
4055 "@pthreadpool",
4056 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004057)
4058
4059xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004060 name = "neonfma_ukernels_test_mode",
4061 hdrs = INTERNAL_HDRS,
4062 aarch32_copts = [
4063 "-marm",
4064 "-march=armv7-a",
4065 "-mfpu=neon-vfpv4",
4066 ],
4067 aarch32_srcs = NEONFMA_UKERNELS,
4068 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004069 apple_aarch32_copts = [
4070 "-mcpu=swift",
4071 "-mtune=generic",
4072 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004073 copts = [
4074 "-UNDEBUG",
4075 "-DXNN_TEST_MODE=1",
4076 ],
4077 gcc_copts = xnnpack_gcc_std_copts(),
4078 msvc_copts = xnnpack_msvc_std_copts(),
4079 deps = [
4080 ":tables",
4081 "@FP16",
4082 "@pthreadpool",
4083 ],
4084)
4085
4086xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004087 name = "neonv8_ukernels",
4088 hdrs = INTERNAL_HDRS,
4089 aarch32_copts = [
4090 "-marm",
4091 "-march=armv8-a",
4092 "-mfpu=neon-fp-armv8",
4093 ],
4094 aarch32_srcs = NEONV8_UKERNELS,
4095 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004096 apple_aarch32_copts = [
4097 "-mcpu=cyclone",
4098 "-mtune=generic",
4099 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004100 gcc_copts = xnnpack_gcc_std_copts(),
4101 msvc_copts = xnnpack_msvc_std_copts(),
4102 deps = [
4103 ":tables",
4104 "@FP16",
4105 "@pthreadpool",
4106 ],
4107)
4108
4109xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004110 name = "neonv8_ukernels_test_mode",
4111 hdrs = INTERNAL_HDRS,
4112 aarch32_copts = [
4113 "-marm",
4114 "-march=armv8-a",
4115 "-mfpu=neon-fp-armv8",
4116 ],
4117 aarch32_srcs = NEONV8_UKERNELS,
4118 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004119 apple_aarch32_copts = [
4120 "-mcpu=cyclone",
4121 "-mtune=generic",
4122 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004123 copts = [
4124 "-UNDEBUG",
4125 "-DXNN_TEST_MODE=1",
4126 ],
4127 gcc_copts = xnnpack_gcc_std_copts(),
4128 msvc_copts = xnnpack_msvc_std_copts(),
4129 deps = [
4130 ":tables",
4131 "@FP16",
4132 "@pthreadpool",
4133 ],
4134)
4135
4136xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004137 name = "neonfp16arith_ukernels",
4138 hdrs = INTERNAL_HDRS,
4139 aarch64_copts = ["-march=armv8.2-a+fp16"],
4140 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004141 gcc_copts = xnnpack_gcc_std_copts(),
4142 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004143 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004144 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004145 "@FP16",
4146 "@pthreadpool",
4147 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004148)
4149
4150xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004151 name = "neonfp16arith_ukernels_test_mode",
4152 hdrs = INTERNAL_HDRS,
4153 aarch64_copts = ["-march=armv8.2-a+fp16"],
4154 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4155 copts = [
4156 "-UNDEBUG",
4157 "-DXNN_TEST_MODE=1",
4158 ],
4159 gcc_copts = xnnpack_gcc_std_copts(),
4160 msvc_copts = xnnpack_msvc_std_copts(),
4161 deps = [
4162 ":tables",
4163 "@FP16",
4164 "@pthreadpool",
4165 ],
4166)
4167
4168xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004169 name = "neondot_ukernels",
4170 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004171 aarch32_copts = [
4172 "-marm",
4173 "-march=armv8.2-a+dotprod",
4174 "-mfpu=neon-fp-armv8",
4175 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004176 aarch32_srcs = NEONDOT_UKERNELS,
4177 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4178 aarch64_srcs = NEONDOT_UKERNELS,
4179 gcc_copts = xnnpack_gcc_std_copts(),
4180 msvc_copts = xnnpack_msvc_std_copts(),
4181 deps = [
4182 ":tables",
4183 "@FP16",
4184 "@pthreadpool",
4185 ],
4186)
4187
4188xnnpack_cc_library(
4189 name = "neondot_ukernels_test_mode",
4190 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004191 aarch32_copts = [
4192 "-marm",
4193 "-march=armv8.2-a+dotprod",
4194 "-mfpu=neon-fp-armv8",
4195 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004196 aarch32_srcs = NEONDOT_UKERNELS,
4197 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4198 aarch64_srcs = NEONDOT_UKERNELS,
4199 copts = [
4200 "-UNDEBUG",
4201 "-DXNN_TEST_MODE=1",
4202 ],
4203 gcc_copts = xnnpack_gcc_std_copts(),
4204 msvc_copts = xnnpack_msvc_std_copts(),
4205 deps = [
4206 ":tables",
4207 "@FP16",
4208 "@pthreadpool",
4209 ],
4210)
4211
4212xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004213 name = "sse2_ukernels",
4214 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004215 gcc_copts = xnnpack_gcc_std_copts(),
4216 gcc_x86_copts = ["-msse2"],
4217 msvc_copts = xnnpack_msvc_std_copts(),
4218 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004219 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004220 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004221 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004222 "@FP16",
4223 "@pthreadpool",
4224 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004225)
4226
4227xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004228 name = "sse2_ukernels_test_mode",
4229 hdrs = INTERNAL_HDRS,
4230 copts = [
4231 "-UNDEBUG",
4232 "-DXNN_TEST_MODE=1",
4233 ],
4234 gcc_copts = xnnpack_gcc_std_copts(),
4235 gcc_x86_copts = ["-msse2"],
4236 msvc_copts = xnnpack_msvc_std_copts(),
4237 msvc_x86_32_copts = ["/arch:SSE2"],
4238 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4239 deps = [
4240 ":tables",
4241 "@FP16",
4242 "@pthreadpool",
4243 ],
4244)
4245
4246xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004247 name = "ssse3_ukernels",
4248 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004249 gcc_copts = xnnpack_gcc_std_copts(),
4250 gcc_x86_copts = ["-mssse3"],
4251 msvc_copts = xnnpack_msvc_std_copts(),
4252 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004253 x86_srcs = SSSE3_UKERNELS,
4254 deps = [
4255 ":tables",
4256 "@FP16",
4257 "@pthreadpool",
4258 ],
4259)
4260
4261xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004262 name = "ssse3_ukernels_test_mode",
4263 hdrs = INTERNAL_HDRS,
4264 copts = [
4265 "-UNDEBUG",
4266 "-DXNN_TEST_MODE=1",
4267 ],
4268 gcc_copts = xnnpack_gcc_std_copts(),
4269 gcc_x86_copts = ["-mssse3"],
4270 msvc_copts = xnnpack_msvc_std_copts(),
4271 msvc_x86_32_copts = ["/arch:SSE2"],
4272 x86_srcs = SSSE3_UKERNELS,
4273 deps = [
4274 ":tables",
4275 "@FP16",
4276 "@pthreadpool",
4277 ],
4278)
4279
4280xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004281 name = "sse41_ukernels",
4282 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004283 gcc_copts = xnnpack_gcc_std_copts(),
4284 gcc_x86_copts = ["-msse4.1"],
4285 msvc_copts = xnnpack_msvc_std_copts(),
4286 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004287 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004288 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004289 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004290 "@FP16",
4291 "@pthreadpool",
4292 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004293)
4294
4295xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004296 name = "sse41_ukernels_test_mode",
4297 hdrs = INTERNAL_HDRS,
4298 copts = [
4299 "-UNDEBUG",
4300 "-DXNN_TEST_MODE=1",
4301 ],
4302 gcc_copts = xnnpack_gcc_std_copts(),
4303 gcc_x86_copts = ["-msse4.1"],
4304 msvc_copts = xnnpack_msvc_std_copts(),
4305 msvc_x86_32_copts = ["/arch:SSE2"],
4306 x86_srcs = SSE41_UKERNELS,
4307 deps = [
4308 ":tables",
4309 "@FP16",
4310 "@pthreadpool",
4311 ],
4312)
4313
4314xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004315 name = "avx_ukernels",
4316 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004317 gcc_copts = xnnpack_gcc_std_copts(),
4318 gcc_x86_copts = ["-mavx"],
4319 msvc_copts = xnnpack_msvc_std_copts(),
4320 msvc_x86_32_copts = ["/arch:AVX"],
4321 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004322 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004323 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004324 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004325 "@FP16",
4326 "@pthreadpool",
4327 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004328)
4329
4330xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004331 name = "avx_ukernels_test_mode",
4332 hdrs = INTERNAL_HDRS,
4333 copts = [
4334 "-UNDEBUG",
4335 "-DXNN_TEST_MODE=1",
4336 ],
4337 gcc_copts = xnnpack_gcc_std_copts(),
4338 gcc_x86_copts = ["-mavx"],
4339 msvc_copts = xnnpack_msvc_std_copts(),
4340 msvc_x86_32_copts = ["/arch:AVX"],
4341 msvc_x86_64_copts = ["/arch:AVX"],
4342 x86_srcs = AVX_UKERNELS,
4343 deps = [
4344 ":tables",
4345 "@FP16",
4346 "@pthreadpool",
4347 ],
4348)
4349
4350xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004351 name = "xop_ukernels",
4352 hdrs = INTERNAL_HDRS,
4353 gcc_copts = xnnpack_gcc_std_copts(),
4354 gcc_x86_copts = ["-mxop"],
4355 msvc_copts = xnnpack_msvc_std_copts(),
4356 msvc_x86_32_copts = ["/arch:AVX"],
4357 msvc_x86_64_copts = ["/arch:AVX"],
4358 x86_srcs = XOP_UKERNELS,
4359 deps = [
4360 ":tables",
4361 "@FP16",
4362 "@pthreadpool",
4363 ],
4364)
4365
4366xnnpack_cc_library(
4367 name = "xop_ukernels_test_mode",
4368 hdrs = INTERNAL_HDRS,
4369 copts = [
4370 "-UNDEBUG",
4371 "-DXNN_TEST_MODE=1",
4372 ],
4373 gcc_copts = xnnpack_gcc_std_copts(),
4374 gcc_x86_copts = ["-mxop"],
4375 msvc_copts = xnnpack_msvc_std_copts(),
4376 msvc_x86_32_copts = ["/arch:AVX"],
4377 msvc_x86_64_copts = ["/arch:AVX"],
4378 x86_srcs = XOP_UKERNELS,
4379 deps = [
4380 ":tables",
4381 "@FP16",
4382 "@pthreadpool",
4383 ],
4384)
4385
4386xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004387 name = "fma3_ukernels",
4388 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004389 gcc_copts = xnnpack_gcc_std_copts(),
4390 gcc_x86_copts = ["-mfma"],
4391 msvc_copts = xnnpack_msvc_std_copts(),
4392 msvc_x86_32_copts = ["/arch:AVX"],
4393 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004394 x86_srcs = FMA3_UKERNELS,
4395 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004396 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004397 "@FP16",
4398 "@pthreadpool",
4399 ],
4400)
4401
4402xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004403 name = "fma3_ukernels_test_mode",
4404 hdrs = INTERNAL_HDRS,
4405 copts = [
4406 "-UNDEBUG",
4407 "-DXNN_TEST_MODE=1",
4408 ],
4409 gcc_copts = xnnpack_gcc_std_copts(),
4410 gcc_x86_copts = ["-mfma"],
4411 msvc_copts = xnnpack_msvc_std_copts(),
4412 msvc_x86_32_copts = ["/arch:AVX"],
4413 msvc_x86_64_copts = ["/arch:AVX"],
4414 x86_srcs = FMA3_UKERNELS,
4415 deps = [
4416 ":tables",
4417 "@FP16",
4418 "@pthreadpool",
4419 ],
4420)
4421
4422xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004423 name = "avx2_ukernels",
4424 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004425 gcc_copts = xnnpack_gcc_std_copts(),
4426 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004427 "-mfma",
4428 "-mavx2",
4429 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004430 msvc_copts = xnnpack_msvc_std_copts(),
4431 msvc_x86_32_copts = ["/arch:AVX2"],
4432 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004433 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004434 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004435 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004436 "@FP16",
4437 "@pthreadpool",
4438 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004439)
4440
4441xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004442 name = "avx2_ukernels_test_mode",
4443 hdrs = INTERNAL_HDRS,
4444 copts = [
4445 "-UNDEBUG",
4446 "-DXNN_TEST_MODE=1",
4447 ],
4448 gcc_copts = xnnpack_gcc_std_copts(),
4449 gcc_x86_copts = [
4450 "-mfma",
4451 "-mavx2",
4452 ],
4453 msvc_copts = xnnpack_msvc_std_copts(),
4454 msvc_x86_32_copts = ["/arch:AVX2"],
4455 msvc_x86_64_copts = ["/arch:AVX2"],
4456 x86_srcs = AVX2_UKERNELS,
4457 deps = [
4458 ":tables",
4459 "@FP16",
4460 "@pthreadpool",
4461 ],
4462)
4463
4464xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004465 name = "avx512f_ukernels",
4466 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004467 gcc_copts = xnnpack_gcc_std_copts(),
4468 gcc_x86_copts = ["-mavx512f"],
4469 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4470 msvc_copts = xnnpack_msvc_std_copts(),
4471 msvc_x86_32_copts = ["/arch:AVX512"],
4472 msvc_x86_64_copts = ["/arch:AVX512"],
4473 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004474 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004475 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004476 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004477 "@FP16",
4478 "@pthreadpool",
4479 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004480)
4481
4482xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004483 name = "avx512f_ukernels_test_mode",
4484 hdrs = INTERNAL_HDRS,
4485 copts = [
4486 "-UNDEBUG",
4487 "-DXNN_TEST_MODE=1",
4488 ],
4489 gcc_copts = xnnpack_gcc_std_copts(),
4490 gcc_x86_copts = ["-mavx512f"],
4491 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4492 msvc_copts = xnnpack_msvc_std_copts(),
4493 msvc_x86_32_copts = ["/arch:AVX512"],
4494 msvc_x86_64_copts = ["/arch:AVX512"],
4495 msys_copts = ["-fno-asynchronous-unwind-tables"],
4496 x86_srcs = AVX512F_UKERNELS,
4497 deps = [
4498 ":tables",
4499 "@FP16",
4500 "@pthreadpool",
4501 ],
4502)
4503
4504xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004505 name = "avx512skx_ukernels",
4506 hdrs = INTERNAL_HDRS,
4507 gcc_copts = xnnpack_gcc_std_copts(),
4508 gcc_x86_copts = [
4509 "-mavx512f",
4510 "-mavx512cd",
4511 "-mavx512bw",
4512 "-mavx512dq",
4513 "-mavx512vl",
4514 ],
4515 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4516 msvc_copts = xnnpack_msvc_std_copts(),
4517 msvc_x86_32_copts = ["/arch:AVX512"],
4518 msvc_x86_64_copts = ["/arch:AVX512"],
4519 msys_copts = ["-fno-asynchronous-unwind-tables"],
4520 x86_srcs = AVX512SKX_UKERNELS,
4521 deps = [
4522 ":tables",
4523 "@FP16",
4524 "@pthreadpool",
4525 ],
4526)
4527
4528xnnpack_cc_library(
4529 name = "avx512skx_ukernels_test_mode",
4530 hdrs = INTERNAL_HDRS,
4531 copts = [
4532 "-UNDEBUG",
4533 "-DXNN_TEST_MODE=1",
4534 ],
4535 gcc_copts = xnnpack_gcc_std_copts(),
4536 gcc_x86_copts = [
4537 "-mavx512f",
4538 "-mavx512cd",
4539 "-mavx512bw",
4540 "-mavx512dq",
4541 "-mavx512vl",
4542 ],
4543 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4544 msvc_copts = xnnpack_msvc_std_copts(),
4545 msvc_x86_32_copts = ["/arch:AVX512"],
4546 msvc_x86_64_copts = ["/arch:AVX512"],
4547 msys_copts = ["-fno-asynchronous-unwind-tables"],
4548 x86_srcs = AVX512SKX_UKERNELS,
4549 deps = [
4550 ":tables",
4551 "@FP16",
4552 "@pthreadpool",
4553 ],
4554)
4555
4556xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004557 name = "asm_ukernels",
4558 hdrs = ["src/xnnpack/assembly.h"],
4559 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004560 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004561 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004562 wasm_srcs = WASM32_ASM_UKERNELS,
4563 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004564)
4565
Marat Dukhan3b59de22020-06-03 20:15:19 -07004566xnnpack_cc_library(
4567 name = "logging_utils",
4568 srcs = LOGGING_SRCS,
4569 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4570 copts = LOGGING_COPTS + [
4571 "-Isrc",
4572 "-Iinclude",
4573 ] + select({
4574 ":debug_build": [],
4575 "//conditions:default": xnnpack_min_size_copts(),
4576 }),
4577 gcc_copts = xnnpack_gcc_std_copts(),
4578 msvc_copts = xnnpack_msvc_std_copts(),
4579 visibility = xnnpack_visibility(),
4580 deps = [
4581 "@FP16",
4582 "@clog",
4583 "@pthreadpool",
4584 ],
4585)
4586
Marat Dukhan08c4a432019-10-03 09:29:21 -07004587xnnpack_aggregate_library(
4588 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004589 aarch32_ios_deps = [
4590 ":neon_ukernels",
4591 ":neonfma_ukernels",
4592 ":neonv8_ukernels",
4593 ":asm_ukernels",
4594 ],
4595 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004596 ":neon_ukernels",
4597 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004598 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004599 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004600 ":asm_ukernels",
4601 ],
4602 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004603 ":neon_ukernels",
4604 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004605 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004606 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004607 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004608 ":asm_ukernels",
4609 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004610 generic_deps = [
4611 ":scalar_ukernels",
4612 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004613 wasm_deps = [
4614 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004615 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004616 ],
4617 wasmsimd_deps = [
4618 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004619 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004620 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004621 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004622 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004623 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004624 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004625 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004626 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004627 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004628 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004629 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004630 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004631 ],
4632)
4633
Marat Dukhan33fcf782020-05-24 14:27:15 -07004634xnnpack_aggregate_library(
4635 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004636 aarch32_ios_deps = [
4637 ":neon_ukernels_test_mode",
4638 ":neonfma_ukernels_test_mode",
4639 ":neonv8_ukernels_test_mode",
4640 ":asm_ukernels",
4641 ],
4642 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07004643 ":neon_ukernels_test_mode",
4644 ":neonfma_ukernels_test_mode",
4645 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004646 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004647 ":asm_ukernels",
4648 ],
4649 aarch64_deps = [
4650 ":neon_ukernels_test_mode",
4651 ":neonfma_ukernels_test_mode",
4652 ":neonv8_ukernels_test_mode",
4653 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004654 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004655 ":asm_ukernels",
4656 ],
4657 generic_deps = [
4658 ":scalar_ukernels_test_mode",
4659 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004660 wasm_deps = [
4661 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004662 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004663 ],
4664 wasmsimd_deps = [
4665 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004666 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004667 ],
4668 x86_deps = [
4669 ":sse2_ukernels_test_mode",
4670 ":ssse3_ukernels_test_mode",
4671 ":sse41_ukernels_test_mode",
4672 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004673 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004674 ":fma3_ukernels_test_mode",
4675 ":avx2_ukernels_test_mode",
4676 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004677 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004678 ],
4679)
4680
Marat Dukhan08c4a432019-10-03 09:29:21 -07004681xnnpack_cc_library(
4682 name = "im2col",
4683 srcs = ["src/im2col.c"],
4684 hdrs = [
4685 "src/xnnpack/common.h",
4686 "src/xnnpack/im2col.h",
4687 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004688 gcc_copts = xnnpack_gcc_std_copts(),
4689 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004690)
4691
4692xnnpack_cc_library(
4693 name = "indirection",
4694 srcs = ["src/indirection.c"],
4695 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004696 gcc_copts = xnnpack_gcc_std_copts(),
4697 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004698 deps = [
4699 "@FP16",
4700 "@FXdiv",
4701 "@pthreadpool",
4702 ],
4703)
4704
4705xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004706 name = "indirection_test_mode",
4707 srcs = ["src/indirection.c"],
4708 hdrs = INTERNAL_HDRS,
4709 copts = [
4710 "-UNDEBUG",
4711 "-DXNN_TEST_MODE=1",
4712 ],
4713 gcc_copts = xnnpack_gcc_std_copts(),
4714 msvc_copts = xnnpack_msvc_std_copts(),
4715 deps = [
4716 "@FP16",
4717 "@FXdiv",
4718 "@pthreadpool",
4719 ],
4720)
4721
4722xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07004723 name = "packing",
4724 srcs = ["src/packing.c"],
4725 hdrs = INTERNAL_HDRS,
4726 gcc_copts = xnnpack_gcc_std_copts(),
4727 msvc_copts = xnnpack_msvc_std_copts(),
4728 deps = [
4729 "@FP16",
4730 "@FXdiv",
4731 "@pthreadpool",
4732 ],
4733)
4734
4735xnnpack_cc_library(
4736 name = "packing_test_mode",
4737 srcs = ["src/packing.c"],
4738 hdrs = INTERNAL_HDRS,
4739 copts = [
4740 "-UNDEBUG",
4741 "-DXNN_TEST_MODE=1",
4742 ],
4743 gcc_copts = xnnpack_gcc_std_copts(),
4744 msvc_copts = xnnpack_msvc_std_copts(),
4745 deps = [
4746 "@FP16",
4747 "@FXdiv",
4748 "@pthreadpool",
4749 ],
4750)
4751
4752xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004753 name = "operator_run",
4754 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004755 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004756 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07004757 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4758 "//conditions:default": [],
4759 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004760 gcc_copts = xnnpack_gcc_std_copts(),
4761 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004762 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004763 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004764 "@FP16",
4765 "@FXdiv",
4766 "@clog",
4767 "@pthreadpool",
4768 ],
4769)
4770
Chao Mei6ddfc602020-05-13 22:29:36 -07004771xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004772 name = "operator_run_test_mode",
4773 srcs = ["src/operator-run.c"],
4774 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4775 copts = LOGGING_COPTS + [
4776 "-UNDEBUG",
4777 "-DXNN_TEST_MODE=1",
4778 ] + select({
4779 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4780 "//conditions:default": [],
4781 }),
4782 gcc_copts = xnnpack_gcc_std_copts(),
4783 msvc_copts = xnnpack_msvc_std_copts(),
4784 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004785 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004786 "@FP16",
4787 "@FXdiv",
4788 "@clog",
4789 "@pthreadpool",
4790 ],
4791)
4792
4793xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07004794 name = "memory_planner",
4795 srcs = ["src/memory-planner.c"],
4796 hdrs = INTERNAL_HDRS,
4797 defines = select({
4798 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
4799 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
4800 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
4801 }),
4802 gcc_copts = xnnpack_gcc_std_copts(),
4803 msvc_copts = xnnpack_msvc_std_copts(),
4804 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004805 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07004806 "@pthreadpool",
4807 ],
4808)
4809
Marat Dukhan33fcf782020-05-24 14:27:15 -07004810xnnpack_cc_library(
4811 name = "memory_planner_test_mode",
4812 srcs = ["src/memory-planner.c"],
4813 hdrs = INTERNAL_HDRS,
4814 copts = [
4815 "-UNDEBUG",
4816 "-DXNN_TEST_MODE=1",
4817 ],
4818 defines = select({
4819 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
4820 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
4821 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
4822 }),
4823 gcc_copts = xnnpack_gcc_std_copts(),
4824 msvc_copts = xnnpack_msvc_std_copts(),
4825 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004826 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004827 "@pthreadpool",
4828 ],
4829)
4830
Marat Dukhan08c4a432019-10-03 09:29:21 -07004831cc_library(
4832 name = "enable_assembly",
4833 defines = select({
4834 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
4835 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07004836 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004837 }),
4838)
4839
Marat Dukhan9de90e02020-06-18 16:04:12 -07004840cc_library(
4841 name = "enable_sparse",
4842 defines = select({
4843 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
4844 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08004845 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07004846 }),
4847)
4848
Marat Dukhancf056b22019-10-07 10:26:29 -07004849xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004850 name = "operators",
4851 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07004852 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004853 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07004854 ],
4855 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004856 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004857 "-Isrc",
4858 "-Iinclude",
4859 ] + select({
4860 ":debug_build": [],
4861 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07004862 }) + select({
4863 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4864 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004865 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004866 gcc_copts = xnnpack_gcc_std_copts(),
4867 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004868 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004869 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004870 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07004871 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004872 "@FP16",
4873 "@FXdiv",
4874 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004875 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004876 ],
4877)
4878
Marat Dukhan10a38082020-04-17 03:58:35 -07004879xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004880 name = "operators_test_mode",
4881 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07004882 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004883 "src/operator-delete.c",
4884 ],
4885 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4886 copts = LOGGING_COPTS + [
4887 "-Isrc",
4888 "-Iinclude",
4889 "-UNDEBUG",
4890 "-DXNN_TEST_MODE=1",
4891 ] + select({
4892 ":debug_build": [],
4893 "//conditions:default": xnnpack_min_size_copts(),
4894 }) + select({
4895 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4896 "//conditions:default": [],
4897 }),
4898 gcc_copts = xnnpack_gcc_std_copts(),
4899 msvc_copts = xnnpack_msvc_std_copts(),
4900 deps = [
4901 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004902 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07004903 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004904 "@FP16",
4905 "@FXdiv",
4906 "@clog",
4907 "@pthreadpool",
4908 ],
4909)
4910
4911xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004912 name = "XNNPACK",
4913 srcs = [
4914 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08004915 "src/runtime.c",
4916 "src/subgraph.c",
4917 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07004918 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004919 hdrs = ["include/xnnpack.h"],
4920 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004921 "-Isrc",
4922 "-Iinclude",
4923 ] + select({
4924 ":debug_build": [],
4925 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07004926 }) + select({
4927 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4928 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004929 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004930 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004931 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004932 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004933 visibility = xnnpack_visibility(),
4934 deps = [
4935 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07004936 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004937 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07004938 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004939 ":operator_run",
4940 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004941 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004942 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07004943 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004944 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07004945 ] + select({
4946 ":emscripten": [],
4947 "//conditions:default": ["@cpuinfo"],
4948 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004949)
4950
Marat Dukhan10a38082020-04-17 03:58:35 -07004951xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004952 name = "XNNPACK_test_mode",
4953 srcs = [
4954 "src/init.c",
4955 "src/runtime.c",
4956 "src/subgraph.c",
4957 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07004958 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004959 hdrs = ["include/xnnpack.h"],
4960 copts = LOGGING_COPTS + [
4961 "-Isrc",
4962 "-Iinclude",
4963 "-UNDEBUG",
4964 "-DXNN_TEST_MODE=1",
4965 ] + select({
4966 ":debug_build": [],
4967 "//conditions:default": xnnpack_min_size_copts(),
4968 }) + select({
4969 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4970 "//conditions:default": [],
4971 }),
4972 gcc_copts = xnnpack_gcc_std_copts(),
4973 includes = ["include"],
4974 msvc_copts = xnnpack_msvc_std_copts(),
4975 visibility = xnnpack_visibility(),
4976 deps = [
4977 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07004978 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004979 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004980 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004981 ":operator_run_test_mode",
4982 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004983 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004984 "@clog",
4985 "@FP16",
4986 "@pthreadpool",
4987 ] + select({
4988 ":emscripten": [],
4989 "//conditions:default": ["@cpuinfo"],
4990 }),
4991)
4992
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07004993# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
4994# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07004995xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07004996 name = "xnnpack_for_tflite",
4997 srcs = [
4998 "src/init.c",
4999 "src/runtime.c",
5000 "src/subgraph.c",
5001 "src/tensor.c",
5002 ] + SUBGRAPH_SRCS,
5003 hdrs = ["include/xnnpack.h"],
5004 copts = LOGGING_COPTS + [
5005 "-Isrc",
5006 "-Iinclude",
5007 ] + select({
5008 ":debug_build": [],
5009 "//conditions:default": xnnpack_min_size_copts(),
5010 }) + select({
5011 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5012 "//conditions:default": [],
5013 }),
5014 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005015 "XNN_NO_QU8_OPERATORS",
5016 "XNN_NO_U8_OPERATORS",
5017 "XNN_NO_X8_OPERATORS",
5018 "XNN_NO_F16_OPERATORS",
5019 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005020 ] + select({
5021 ":xnn_enable_qs8_explicit_true": [],
5022 ":xnn_enable_qs8_explicit_false": ["XNN_NO_QS8_OPERATORS"],
5023 "//conditions:default": ["XNN_NO_QS8_OPERATORS"],
5024 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005025 gcc_copts = xnnpack_gcc_std_copts(),
5026 includes = ["include"],
5027 msvc_copts = xnnpack_msvc_std_copts(),
5028 visibility = xnnpack_visibility(),
5029 deps = [
5030 ":enable_assembly",
5031 ":enable_sparse",
5032 ":logging_utils",
5033 ":memory_planner",
5034 ":operator_run",
5035 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005036 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005037 "@clog",
5038 "@FP16",
5039 "@pthreadpool",
5040 ] + select({
5041 ":emscripten": [],
5042 "//conditions:default": ["@cpuinfo"],
5043 }),
5044)
5045
5046# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5047# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5048xnnpack_cc_library(
5049 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005050 srcs = [
5051 "src/init.c",
5052 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005053 hdrs = ["include/xnnpack.h"],
5054 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005055 "-Isrc",
5056 "-Iinclude",
5057 ] + select({
5058 ":debug_build": [],
5059 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005060 }) + select({
5061 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5062 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005063 }),
5064 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005065 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005066 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005067 "XNN_NO_U8_OPERATORS",
5068 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005069 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005070 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005071 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005072 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005073 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005074 visibility = xnnpack_visibility(),
5075 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005076 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005077 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005078 ":operator_run",
5079 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005080 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005081 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005082 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005083 ] + select({
5084 ":emscripten": [],
5085 "//conditions:default": ["@cpuinfo"],
5086 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005087)
5088
Marat Dukhancf056b22019-10-07 10:26:29 -07005089xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005090 name = "bench_utils",
5091 srcs = ["bench/utils.cc"],
5092 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005093 deps = [
5094 "@com_google_benchmark//:benchmark",
5095 "@cpuinfo",
5096 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005097)
5098
Frank Barchard7e955972019-10-11 10:34:25 -07005099######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005100
5101xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005102 name = "qs8_gemm_bench",
5103 srcs = [
5104 "bench/gemm.h",
5105 "bench/qs8-gemm.cc",
5106 "src/xnnpack/AlignedAllocator.h",
5107 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005108 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5109 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005110)
5111
5112xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005113 name = "qs8_requantization_bench",
5114 srcs = [
5115 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005116 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005117 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005118 ] + MICROKERNEL_BENCHMARK_HDRS,
5119 deps = MICROKERNEL_BENCHMARK_DEPS,
5120)
5121
5122xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005123 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005124 srcs = [
5125 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005126 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005127 "src/xnnpack/AlignedAllocator.h",
5128 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005129 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005130 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005131)
5132
5133xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005134 name = "qu8_requantization_bench",
5135 srcs = [
5136 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005137 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005138 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005139 ] + MICROKERNEL_BENCHMARK_HDRS,
5140 deps = MICROKERNEL_BENCHMARK_DEPS,
5141)
5142
5143xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005144 name = "f16_igemm_bench",
5145 srcs = [
5146 "bench/f16-igemm.cc",
5147 "bench/conv.h",
5148 "bench/google/conv.h",
5149 "src/xnnpack/AlignedAllocator.h",
5150 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005151 deps = MICROKERNEL_BENCHMARK_DEPS + [
5152 ":indirection",
5153 ":packing",
5154 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005155)
5156
5157xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005158 name = "f16_gemm_bench",
5159 srcs = [
5160 "bench/f16-gemm.cc",
5161 "bench/gemm.h",
5162 "src/xnnpack/AlignedAllocator.h",
5163 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005164 deps = MICROKERNEL_BENCHMARK_DEPS + [
5165 ":packing",
5166 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005167)
5168
5169xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005170 name = "f16_spmm_bench",
5171 srcs = [
5172 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005173 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005174 "src/xnnpack/AlignedAllocator.h",
5175 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005176 deps = MICROKERNEL_BENCHMARK_DEPS,
5177)
5178
5179xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005180 name = "f16_vrelu_bench",
5181 srcs = [
5182 "bench/f16-vrelu.cc",
5183 "src/xnnpack/AlignedAllocator.h",
5184 ] + MICROKERNEL_BENCHMARK_HDRS,
5185 deps = MICROKERNEL_BENCHMARK_DEPS,
5186)
5187
5188xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005189 name = "f32_igemm_bench",
5190 srcs = [
5191 "bench/f32-igemm.cc",
5192 "bench/conv.h",
5193 "src/xnnpack/AlignedAllocator.h",
5194 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005195 deps = MICROKERNEL_BENCHMARK_DEPS + [
5196 ":indirection",
5197 ":packing",
5198 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005199)
5200
5201xnnpack_benchmark(
5202 name = "f32_conv_hwc_bench",
5203 srcs = [
5204 "bench/f32-conv-hwc.cc",
5205 "bench/dconv.h",
5206 "src/xnnpack/AlignedAllocator.h",
5207 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005208 deps = MICROKERNEL_BENCHMARK_DEPS + [
5209 ":packing",
5210 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005211)
5212
5213xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005214 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005215 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005216 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005217 "bench/dconv.h",
5218 "src/xnnpack/AlignedAllocator.h",
5219 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005220 deps = MICROKERNEL_BENCHMARK_DEPS + [
5221 ":packing",
5222 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005223)
5224
5225xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005226 name = "f16_dwconv_bench",
5227 srcs = [
5228 "bench/f16-dwconv.cc",
5229 "bench/dwconv.h",
5230 "bench/google/dwconv.h",
5231 "src/xnnpack/AlignedAllocator.h",
5232 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005233 deps = MICROKERNEL_BENCHMARK_DEPS + [
5234 ":indirection",
5235 ":packing",
5236 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005237)
5238
5239xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005240 name = "f32_dwconv_bench",
5241 srcs = [
5242 "bench/f32-dwconv.cc",
5243 "bench/dwconv.h",
5244 "src/xnnpack/AlignedAllocator.h",
5245 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005246 deps = MICROKERNEL_BENCHMARK_DEPS + [
5247 ":indirection",
5248 ":packing",
5249 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005250)
5251
5252xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005253 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005254 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005255 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005256 "bench/dwconv.h",
5257 "src/xnnpack/AlignedAllocator.h",
5258 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005259 deps = MICROKERNEL_BENCHMARK_DEPS + [
5260 ":indirection",
5261 ":packing",
5262 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005263)
5264
5265xnnpack_benchmark(
5266 name = "f32_gemm_bench",
5267 srcs = [
5268 "bench/f32-gemm.cc",
5269 "bench/gemm.h",
5270 "src/xnnpack/AlignedAllocator.h",
5271 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005272 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005273 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005274)
5275
5276xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005277 name = "f32_raddexpminusmax_bench",
5278 srcs = [
5279 "bench/f32-raddexpminusmax.cc",
5280 "src/xnnpack/AlignedAllocator.h",
5281 ] + MICROKERNEL_BENCHMARK_HDRS,
5282 deps = MICROKERNEL_BENCHMARK_DEPS,
5283)
5284
5285xnnpack_benchmark(
5286 name = "f32_raddextexp_bench",
5287 srcs = [
5288 "bench/f32-raddextexp.cc",
5289 "src/xnnpack/AlignedAllocator.h",
5290 ] + MICROKERNEL_BENCHMARK_HDRS,
5291 deps = MICROKERNEL_BENCHMARK_DEPS,
5292)
5293
5294xnnpack_benchmark(
5295 name = "f32_raddstoreexpminusmax_bench",
5296 srcs = [
5297 "bench/f32-raddstoreexpminusmax.cc",
5298 "src/xnnpack/AlignedAllocator.h",
5299 ] + MICROKERNEL_BENCHMARK_HDRS,
5300 deps = MICROKERNEL_BENCHMARK_DEPS,
5301)
5302
5303xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005304 name = "f32_rmax_bench",
5305 srcs = [
5306 "bench/f32-rmax.cc",
5307 "src/xnnpack/AlignedAllocator.h",
5308 ] + MICROKERNEL_BENCHMARK_HDRS,
5309 deps = MICROKERNEL_BENCHMARK_DEPS,
5310)
5311
5312xnnpack_benchmark(
5313 name = "f32_spmm_bench",
5314 srcs = [
5315 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005316 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005317 "src/xnnpack/AlignedAllocator.h",
5318 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005319 deps = MICROKERNEL_BENCHMARK_DEPS,
5320)
5321
5322xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005323 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005324 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005325 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005326 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005327 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005328 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005329)
5330
5331xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005332 name = "f32_velu_bench",
5333 srcs = [
5334 "bench/f32-velu.cc",
5335 "src/xnnpack/AlignedAllocator.h",
5336 ] + MICROKERNEL_BENCHMARK_HDRS,
5337 deps = MICROKERNEL_BENCHMARK_DEPS,
5338)
5339
5340xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005341 name = "f32_vhswish_bench",
5342 srcs = [
5343 "bench/f32-vhswish.cc",
5344 "src/xnnpack/AlignedAllocator.h",
5345 ] + MICROKERNEL_BENCHMARK_HDRS,
5346 deps = MICROKERNEL_BENCHMARK_DEPS,
5347)
5348
5349xnnpack_benchmark(
5350 name = "f32_vrelu_bench",
5351 srcs = [
5352 "bench/f32-vrelu.cc",
5353 "src/xnnpack/AlignedAllocator.h",
5354 ] + MICROKERNEL_BENCHMARK_HDRS,
5355 deps = MICROKERNEL_BENCHMARK_DEPS,
5356)
5357
5358xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005359 name = "f32_vscaleexpminusmax_bench",
5360 srcs = [
5361 "bench/f32-vscaleexpminusmax.cc",
5362 "src/xnnpack/AlignedAllocator.h",
5363 ] + MICROKERNEL_BENCHMARK_HDRS,
5364 deps = MICROKERNEL_BENCHMARK_DEPS,
5365)
5366
5367xnnpack_benchmark(
5368 name = "f32_vscaleextexp_bench",
5369 srcs = [
5370 "bench/f32-vscaleextexp.cc",
5371 "src/xnnpack/AlignedAllocator.h",
5372 ] + MICROKERNEL_BENCHMARK_HDRS,
5373 deps = MICROKERNEL_BENCHMARK_DEPS,
5374)
5375
5376xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005377 name = "f32_vsigmoid_bench",
5378 srcs = [
5379 "bench/f32-vsigmoid.cc",
5380 "src/xnnpack/AlignedAllocator.h",
5381 ] + MICROKERNEL_BENCHMARK_HDRS,
5382 deps = MICROKERNEL_BENCHMARK_DEPS,
5383)
5384
5385xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005386 name = "f32_vsqrt_bench",
5387 srcs = [
5388 "bench/f32-vsqrt.cc",
5389 "src/xnnpack/AlignedAllocator.h",
5390 ] + MICROKERNEL_BENCHMARK_HDRS,
5391 deps = MICROKERNEL_BENCHMARK_DEPS,
5392)
5393
5394xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005395 name = "f32_im2col_gemm_bench",
5396 srcs = [
5397 "bench/f32-im2col-gemm.cc",
5398 "bench/conv.h",
5399 "src/xnnpack/AlignedAllocator.h",
5400 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005401 deps = MICROKERNEL_BENCHMARK_DEPS + [
5402 ":im2col",
5403 ":packing",
5404 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005405)
5406
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005407xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005408 name = "rounding_bench",
5409 srcs = [
5410 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005411 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005412 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005413 ] + MICROKERNEL_BENCHMARK_HDRS,
5414 deps = MICROKERNEL_BENCHMARK_DEPS,
5415)
5416
Marat Dukhan08c4a432019-10-03 09:29:21 -07005417########################### Benchmarks for operators ###########################
5418
5419xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005420 name = "average_pooling_bench",
5421 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005422 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005423 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005424 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005425)
5426
5427xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005428 name = "bankers_rounding_bench",
5429 srcs = ["bench/bankers-rounding.cc"],
5430 copts = xnnpack_optional_tflite_copts(),
5431 tags = ["nowin32"],
5432 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5433)
5434
5435xnnpack_benchmark(
5436 name = "ceiling_bench",
5437 srcs = ["bench/ceiling.cc"],
5438 copts = xnnpack_optional_tflite_copts(),
5439 tags = ["nowin32"],
5440 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5441)
5442
5443xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005444 name = "channel_shuffle_bench",
5445 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005446 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005447)
5448
5449xnnpack_benchmark(
5450 name = "convolution_bench",
5451 srcs = ["bench/convolution.cc"],
5452 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005453 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005454 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005455)
5456
5457xnnpack_benchmark(
5458 name = "deconvolution_bench",
5459 srcs = ["bench/deconvolution.cc"],
5460 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005461 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005462 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005463)
5464
5465xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005466 name = "elu_bench",
5467 srcs = ["bench/elu.cc"],
5468 copts = xnnpack_optional_tflite_copts(),
5469 tags = ["nowin32"],
5470 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5471)
5472
5473xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005474 name = "floor_bench",
5475 srcs = ["bench/floor.cc"],
5476 copts = xnnpack_optional_tflite_copts(),
5477 tags = ["nowin32"],
5478 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5479)
5480
5481xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005482 name = "global_average_pooling_bench",
5483 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005484 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005485)
5486
5487xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005488 name = "hardswish_bench",
5489 srcs = ["bench/hardswish.cc"],
5490 copts = xnnpack_optional_tflite_copts(),
5491 tags = ["nowin32"],
5492 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5493)
5494
5495xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005496 name = "max_pooling_bench",
5497 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005498 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005499)
5500
5501xnnpack_benchmark(
5502 name = "sigmoid_bench",
5503 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005504 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005505 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005506 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005507)
5508
5509xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005510 name = "prelu_bench",
5511 srcs = ["bench/prelu.cc"],
5512 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005513 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005514 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005515)
5516
5517xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005518 name = "softmax_bench",
5519 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005520 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005521 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005522 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005523)
5524
Marat Dukhan87727142020-06-24 15:24:10 -07005525xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005526 name = "square_root_bench",
5527 srcs = ["bench/square-root.cc"],
5528 copts = xnnpack_optional_tflite_copts(),
5529 tags = ["nowin32"],
5530 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5531)
5532
5533xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005534 name = "truncation_bench",
5535 srcs = ["bench/truncation.cc"],
5536 deps = OPERATOR_BENCHMARK_DEPS,
5537)
5538
Marat Dukhanc068bb62019-10-04 13:24:39 -07005539############################# End-to-end benchmarks ############################
5540
5541cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005542 name = "fp32_mobilenet_v1",
5543 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005544 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005545 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005546 linkstatic = True,
5547 deps = [
5548 ":XNNPACK",
5549 "@pthreadpool",
5550 ],
5551)
5552
5553cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005554 name = "fp32_sparse_mobilenet_v1",
5555 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5556 hdrs = ["models/models.h"],
5557 copts = xnnpack_std_cxxopts(),
5558 linkstatic = True,
5559 deps = [
5560 ":XNNPACK",
5561 "@pthreadpool",
5562 ],
5563)
5564
5565cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005566 name = "fp16_mobilenet_v1",
5567 srcs = ["models/fp16-mobilenet-v1.cc"],
5568 hdrs = ["models/models.h"],
5569 copts = xnnpack_std_cxxopts(),
5570 linkstatic = True,
5571 deps = [
5572 ":XNNPACK",
5573 "@FP16",
5574 "@pthreadpool",
5575 ],
5576)
5577
5578cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005579 name = "qs8_mobilenet_v1",
5580 srcs = ["models/qs8-mobilenet-v1.cc"],
5581 hdrs = ["models/models.h"],
5582 copts = xnnpack_std_cxxopts(),
5583 linkstatic = True,
5584 deps = [
5585 ":XNNPACK",
5586 "@pthreadpool",
5587 ],
5588)
5589
5590cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07005591 name = "qs8_mobilenet_v2",
5592 srcs = ["models/qs8-mobilenet-v2.cc"],
5593 hdrs = ["models/models.h"],
5594 copts = xnnpack_std_cxxopts(),
5595 linkstatic = True,
5596 deps = [
5597 ":XNNPACK",
5598 "@pthreadpool",
5599 ],
5600)
5601
5602cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005603 name = "qu8_mobilenet_v1",
5604 srcs = ["models/qu8-mobilenet-v1.cc"],
5605 hdrs = ["models/models.h"],
5606 copts = xnnpack_std_cxxopts(),
5607 linkstatic = True,
5608 deps = [
5609 ":XNNPACK",
5610 "@pthreadpool",
5611 ],
5612)
5613
5614cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005615 name = "fp32_mobilenet_v2",
5616 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005617 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005618 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005619 linkstatic = True,
5620 deps = [
5621 ":XNNPACK",
5622 "@pthreadpool",
5623 ],
5624)
5625
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005626cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005627 name = "fp32_sparse_mobilenet_v2",
5628 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
5629 hdrs = ["models/models.h"],
5630 copts = xnnpack_std_cxxopts(),
5631 linkstatic = True,
5632 deps = [
5633 ":XNNPACK",
5634 "@pthreadpool",
5635 ],
5636)
5637
5638cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005639 name = "fp16_mobilenet_v2",
5640 srcs = ["models/fp16-mobilenet-v2.cc"],
5641 hdrs = ["models/models.h"],
5642 copts = xnnpack_std_cxxopts(),
5643 linkstatic = True,
5644 deps = [
5645 ":XNNPACK",
5646 "@FP16",
5647 "@pthreadpool",
5648 ],
5649)
5650
5651cc_library(
5652 name = "fp32_mobilenet_v3_large",
5653 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005654 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005655 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005656 linkstatic = True,
5657 deps = [
5658 ":XNNPACK",
5659 "@pthreadpool",
5660 ],
5661)
5662
5663cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005664 name = "fp32_sparse_mobilenet_v3_large",
5665 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
5666 hdrs = ["models/models.h"],
5667 copts = xnnpack_std_cxxopts(),
5668 linkstatic = True,
5669 deps = [
5670 ":XNNPACK",
5671 "@pthreadpool",
5672 ],
5673)
5674
5675cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005676 name = "fp16_mobilenet_v3_large",
5677 srcs = ["models/fp16-mobilenet-v3-large.cc"],
5678 hdrs = ["models/models.h"],
5679 copts = xnnpack_std_cxxopts(),
5680 linkstatic = True,
5681 deps = [
5682 ":XNNPACK",
5683 "@FP16",
5684 "@pthreadpool",
5685 ],
5686)
5687
5688cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005689 name = "fp32_mobilenet_v3_small",
5690 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005691 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005692 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005693 linkstatic = True,
5694 deps = [
5695 ":XNNPACK",
5696 "@pthreadpool",
5697 ],
5698)
5699
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005700cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005701 name = "fp32_sparse_mobilenet_v3_small",
5702 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
5703 hdrs = ["models/models.h"],
5704 copts = xnnpack_std_cxxopts(),
5705 linkstatic = True,
5706 deps = [
5707 ":XNNPACK",
5708 "@pthreadpool",
5709 ],
5710)
5711
5712cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005713 name = "fp16_mobilenet_v3_small",
5714 srcs = ["models/fp16-mobilenet-v3-small.cc"],
5715 hdrs = ["models/models.h"],
5716 copts = xnnpack_std_cxxopts(),
5717 linkstatic = True,
5718 deps = [
5719 ":XNNPACK",
5720 "@FP16",
5721 "@pthreadpool",
5722 ],
5723)
5724
Marat Dukhanc068bb62019-10-04 13:24:39 -07005725xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07005726 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005727 srcs = [
5728 "bench/f32-dwconv-e2e.cc",
5729 "bench/end2end.h",
5730 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07005731 deps = MICROKERNEL_BENCHMARK_DEPS + [
5732 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005733 ":fp32_mobilenet_v1",
5734 ":fp32_mobilenet_v2",
5735 ":fp32_mobilenet_v3_large",
5736 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07005737 ],
5738)
5739
5740xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07005741 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005742 srcs = [
5743 "bench/f32-gemm-e2e.cc",
5744 "bench/end2end.h",
5745 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07005746 deps = MICROKERNEL_BENCHMARK_DEPS + [
5747 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005748 ":fp32_mobilenet_v1",
5749 ":fp32_mobilenet_v2",
5750 ":fp32_mobilenet_v3_large",
5751 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07005752 ],
5753)
5754
5755xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08005756 name = "qs8_gemm_e2e_bench",
5757 srcs = [
5758 "bench/qs8-gemm-e2e.cc",
5759 "bench/end2end.h",
5760 ] + MICROKERNEL_BENCHMARK_HDRS,
5761 deps = MICROKERNEL_BENCHMARK_DEPS + [
5762 ":XNNPACK",
5763 ":qs8_mobilenet_v1",
5764 ":qs8_mobilenet_v2",
5765 ],
5766)
5767
5768xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07005769 name = "end2end_bench",
5770 srcs = ["bench/end2end.cc"],
5771 deps = [
5772 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07005773 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005774 ":fp16_mobilenet_v1",
5775 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005776 ":fp16_mobilenet_v3_large",
5777 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005778 ":fp32_mobilenet_v1",
5779 ":fp32_mobilenet_v2",
5780 ":fp32_mobilenet_v3_large",
5781 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08005782 ":fp32_sparse_mobilenet_v1",
5783 ":fp32_sparse_mobilenet_v2",
5784 ":fp32_sparse_mobilenet_v3_large",
5785 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005786 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07005787 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005788 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07005789 "@pthreadpool",
5790 ],
5791)
5792
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005793#################### Accuracy evaluation for math functions ####################
5794
5795xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005796 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005797 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005798 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005799 "src/xnnpack/AlignedAllocator.h",
5800 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08005801 deps = ACCURACY_EVAL_DEPS + [
5802 ":bench_utils",
5803 "@cpuinfo",
5804 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005805)
5806
Marat Dukhan515c9772019-10-17 18:07:57 -07005807xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005808 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07005809 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005810 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07005811 "src/xnnpack/AlignedAllocator.h",
5812 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08005813 deps = ACCURACY_EVAL_DEPS + [
5814 ":bench_utils",
5815 "@cpuinfo",
5816 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07005817)
5818
Marat Dukhan98ba4412019-10-23 02:14:28 -07005819xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005820 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08005821 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005822 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08005823 "src/xnnpack/AlignedAllocator.h",
5824 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08005825 deps = ACCURACY_EVAL_DEPS + [
5826 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08005827 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08005828 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08005829)
5830
5831xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005832 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07005833 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005834 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07005835 "src/xnnpack/AlignedAllocator.h",
5836 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08005837 deps = ACCURACY_EVAL_DEPS + [
5838 ":bench_utils",
5839 "@cpuinfo",
5840 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07005841)
5842
Marat Dukhanf44f0222020-12-14 11:53:27 -08005843xnnpack_benchmark(
5844 name = "f32_sigmoid_ulp_eval",
5845 srcs = [
5846 "eval/f32-sigmoid-ulp.cc",
5847 "src/xnnpack/AlignedAllocator.h",
5848 ] + ACCURACY_EVAL_HDRS,
5849 deps = ACCURACY_EVAL_DEPS + [
5850 ":bench_utils",
5851 "@cpuinfo",
5852 ],
5853)
5854
5855xnnpack_benchmark(
5856 name = "f32_sqrt_ulp_eval",
5857 srcs = [
5858 "eval/f32-sqrt-ulp.cc",
5859 "src/xnnpack/AlignedAllocator.h",
5860 ] + ACCURACY_EVAL_HDRS,
5861 deps = ACCURACY_EVAL_DEPS + [
5862 ":bench_utils",
5863 "@cpuinfo",
5864 ],
5865)
5866
5867################### Accuracy verification for math functions ##################
5868
5869xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08005870 name = "f32_exp_eval",
5871 srcs = [
5872 "eval/f32-exp.cc",
5873 "src/xnnpack/AlignedAllocator.h",
5874 "src/xnnpack/math-stubs.h",
5875 ] + MICROKERNEL_TEST_HDRS,
5876 automatic = False,
5877 deps = MICROKERNEL_TEST_DEPS,
5878)
5879
5880xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08005881 name = "f32_expm1minus_eval",
5882 srcs = [
5883 "eval/f32-expm1minus.cc",
5884 "src/xnnpack/AlignedAllocator.h",
5885 "src/xnnpack/math-stubs.h",
5886 ] + MICROKERNEL_TEST_HDRS,
5887 automatic = False,
5888 deps = MICROKERNEL_TEST_DEPS,
5889)
5890
Marat Dukhan8853b822020-05-07 12:19:01 -07005891xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08005892 name = "f32_expminus_eval",
5893 srcs = [
5894 "eval/f32-expminus.cc",
5895 "src/xnnpack/AlignedAllocator.h",
5896 "src/xnnpack/math-stubs.h",
5897 ] + MICROKERNEL_TEST_HDRS,
5898 automatic = False,
5899 deps = MICROKERNEL_TEST_DEPS,
5900)
5901
5902xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07005903 name = "f32_roundne_eval",
5904 srcs = [
5905 "eval/f32-roundne.cc",
5906 "src/xnnpack/AlignedAllocator.h",
5907 "src/xnnpack/math-stubs.h",
5908 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07005909 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07005910 deps = MICROKERNEL_TEST_DEPS,
5911)
5912
Marat Dukhan2dbb9442020-05-12 20:43:43 -07005913xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07005914 name = "f32_roundd_eval",
5915 srcs = [
5916 "eval/f32-roundd.cc",
5917 "src/xnnpack/AlignedAllocator.h",
5918 "src/xnnpack/math-stubs.h",
5919 ] + MICROKERNEL_TEST_HDRS,
5920 automatic = False,
5921 deps = MICROKERNEL_TEST_DEPS,
5922)
5923
5924xnnpack_unit_test(
5925 name = "f32_roundu_eval",
5926 srcs = [
5927 "eval/f32-roundu.cc",
5928 "src/xnnpack/AlignedAllocator.h",
5929 "src/xnnpack/math-stubs.h",
5930 ] + MICROKERNEL_TEST_HDRS,
5931 automatic = False,
5932 deps = MICROKERNEL_TEST_DEPS,
5933)
5934
5935xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07005936 name = "f32_roundz_eval",
5937 srcs = [
5938 "eval/f32-roundz.cc",
5939 "src/xnnpack/AlignedAllocator.h",
5940 "src/xnnpack/math-stubs.h",
5941 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07005942 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07005943 deps = MICROKERNEL_TEST_DEPS,
5944)
5945
Marat Dukhan08c4a432019-10-03 09:29:21 -07005946######################### Unit tests for micro-kernels #########################
5947
5948xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07005949 name = "f16_dwconv_minmax_test",
5950 srcs = [
5951 "test/f16-dwconv-minmax.cc",
5952 "test/dwconv-microkernel-tester.h",
5953 "src/xnnpack/AlignedAllocator.h",
5954 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
5955 deps = MICROKERNEL_TEST_DEPS + [":packing"],
5956)
5957
5958xnnpack_unit_test(
5959 name = "f16_gavgpool_minmax_test",
5960 srcs = [
5961 "test/f16-gavgpool-minmax.cc",
5962 "test/gavgpool-microkernel-tester.h",
5963 "src/xnnpack/AlignedAllocator.h",
5964 ] + MICROKERNEL_TEST_HDRS,
5965 deps = MICROKERNEL_TEST_DEPS,
5966)
5967
5968xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07005969 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005970 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07005971 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005972 "test/gemm-microkernel-tester.h",
5973 "src/xnnpack/AlignedAllocator.h",
5974 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005975 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005976)
5977
5978xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07005979 name = "f16_igemm_minmax_test",
5980 srcs = [
5981 "test/f16-igemm-minmax.cc",
5982 "test/gemm-microkernel-tester.h",
5983 "src/xnnpack/AlignedAllocator.h",
5984 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
5985 deps = MICROKERNEL_TEST_DEPS + [":packing"],
5986)
5987
5988xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07005989 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005990 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07005991 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005992 "test/spmm-microkernel-tester.h",
5993 "src/xnnpack/AlignedAllocator.h",
5994 ] + MICROKERNEL_TEST_HDRS,
5995 deps = MICROKERNEL_TEST_DEPS,
5996)
5997
5998xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07005999 name = "f16_vadd_minmax_test",
6000 srcs = [
6001 "test/f16-vadd-minmax.cc",
6002 "test/vbinary-microkernel-tester.h",
6003 ] + MICROKERNEL_TEST_HDRS,
6004 deps = MICROKERNEL_TEST_DEPS,
6005)
6006
6007xnnpack_unit_test(
6008 name = "f16_vaddc_minmax_test",
6009 srcs = [
6010 "test/f16-vaddc-minmax.cc",
6011 "test/vbinaryc-microkernel-tester.h",
6012 ] + MICROKERNEL_TEST_HDRS,
6013 deps = MICROKERNEL_TEST_DEPS,
6014)
6015
6016xnnpack_unit_test(
6017 name = "f16_vclamp_test",
6018 srcs = [
6019 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006020 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006021 ] + MICROKERNEL_TEST_HDRS,
6022 deps = MICROKERNEL_TEST_DEPS,
6023)
6024
6025xnnpack_unit_test(
6026 name = "f16_vdiv_minmax_test",
6027 srcs = [
6028 "test/f16-vdiv-minmax.cc",
6029 "test/vbinary-microkernel-tester.h",
6030 ] + MICROKERNEL_TEST_HDRS,
6031 deps = MICROKERNEL_TEST_DEPS,
6032)
6033
6034xnnpack_unit_test(
6035 name = "f16_vdivc_minmax_test",
6036 srcs = [
6037 "test/f16-vdivc-minmax.cc",
6038 "test/vbinaryc-microkernel-tester.h",
6039 ] + MICROKERNEL_TEST_HDRS,
6040 deps = MICROKERNEL_TEST_DEPS,
6041)
6042
6043xnnpack_unit_test(
6044 name = "f16_vrdivc_minmax_test",
6045 srcs = [
6046 "test/f16-vrdivc-minmax.cc",
6047 "test/vbinaryc-microkernel-tester.h",
6048 ] + MICROKERNEL_TEST_HDRS,
6049 deps = MICROKERNEL_TEST_DEPS,
6050)
6051
6052xnnpack_unit_test(
6053 name = "f16_vhswish_test",
6054 srcs = [
6055 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006056 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006057 ] + MICROKERNEL_TEST_HDRS,
6058 deps = MICROKERNEL_TEST_DEPS,
6059)
6060
6061xnnpack_unit_test(
6062 name = "f16_vmax_test",
6063 srcs = [
6064 "test/f16-vmax.cc",
6065 "test/vbinary-microkernel-tester.h",
6066 ] + MICROKERNEL_TEST_HDRS,
6067 deps = MICROKERNEL_TEST_DEPS,
6068)
6069
6070xnnpack_unit_test(
6071 name = "f16_vmaxc_test",
6072 srcs = [
6073 "test/f16-vmaxc.cc",
6074 "test/vbinaryc-microkernel-tester.h",
6075 ] + MICROKERNEL_TEST_HDRS,
6076 deps = MICROKERNEL_TEST_DEPS,
6077)
6078
6079xnnpack_unit_test(
6080 name = "f16_vmin_test",
6081 srcs = [
6082 "test/f16-vmin.cc",
6083 "test/vbinary-microkernel-tester.h",
6084 ] + MICROKERNEL_TEST_HDRS,
6085 deps = MICROKERNEL_TEST_DEPS,
6086)
6087
6088xnnpack_unit_test(
6089 name = "f16_vminc_test",
6090 srcs = [
6091 "test/f16-vminc.cc",
6092 "test/vbinaryc-microkernel-tester.h",
6093 ] + MICROKERNEL_TEST_HDRS,
6094 deps = MICROKERNEL_TEST_DEPS,
6095)
6096
6097xnnpack_unit_test(
6098 name = "f16_vmul_minmax_test",
6099 srcs = [
6100 "test/f16-vmul-minmax.cc",
6101 "test/vbinary-microkernel-tester.h",
6102 ] + MICROKERNEL_TEST_HDRS,
6103 deps = MICROKERNEL_TEST_DEPS,
6104)
6105
6106xnnpack_unit_test(
6107 name = "f16_vmulc_minmax_test",
6108 srcs = [
6109 "test/f16-vmulc-minmax.cc",
6110 "test/vbinaryc-microkernel-tester.h",
6111 ] + MICROKERNEL_TEST_HDRS,
6112 deps = MICROKERNEL_TEST_DEPS,
6113)
6114
6115xnnpack_unit_test(
6116 name = "f16_vmulcaddc_minmax_test",
6117 srcs = [
6118 "test/f16-vmulcaddc-minmax.cc",
6119 "test/vmulcaddc-microkernel-tester.h",
6120 "src/xnnpack/AlignedAllocator.h",
6121 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6122 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6123)
6124
6125xnnpack_unit_test(
6126 name = "f16_vsub_minmax_test",
6127 srcs = [
6128 "test/f16-vsub-minmax.cc",
6129 "test/vbinary-microkernel-tester.h",
6130 ] + MICROKERNEL_TEST_HDRS,
6131 deps = MICROKERNEL_TEST_DEPS,
6132)
6133
6134xnnpack_unit_test(
6135 name = "f16_vsubc_minmax_test",
6136 srcs = [
6137 "test/f16-vsubc-minmax.cc",
6138 "test/vbinaryc-microkernel-tester.h",
6139 ] + MICROKERNEL_TEST_HDRS,
6140 deps = MICROKERNEL_TEST_DEPS,
6141)
6142
6143xnnpack_unit_test(
6144 name = "f16_vrsubc_minmax_test",
6145 srcs = [
6146 "test/f16-vrsubc-minmax.cc",
6147 "test/vbinaryc-microkernel-tester.h",
6148 ] + MICROKERNEL_TEST_HDRS,
6149 deps = MICROKERNEL_TEST_DEPS,
6150)
6151
6152xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006153 name = "f32_argmaxpool_test",
6154 srcs = [
6155 "test/f32-argmaxpool.cc",
6156 "test/argmaxpool-microkernel-tester.h",
6157 "src/xnnpack/AlignedAllocator.h",
6158 ] + MICROKERNEL_TEST_HDRS,
6159 deps = MICROKERNEL_TEST_DEPS,
6160)
6161
6162xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006163 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006164 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006165 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006166 "test/avgpool-microkernel-tester.h",
6167 "src/xnnpack/AlignedAllocator.h",
6168 ] + MICROKERNEL_TEST_HDRS,
6169 deps = MICROKERNEL_TEST_DEPS,
6170)
6171
6172xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006173 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006174 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006175 "test/f32-ibilinear.cc",
6176 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006177 "src/xnnpack/AlignedAllocator.h",
6178 ] + MICROKERNEL_TEST_HDRS,
6179 deps = MICROKERNEL_TEST_DEPS,
6180)
6181
6182xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006183 name = "f32_ibilinear_chw_test",
6184 srcs = [
6185 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006186 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006187 "src/xnnpack/AlignedAllocator.h",
6188 ] + MICROKERNEL_TEST_HDRS,
6189 deps = MICROKERNEL_TEST_DEPS,
6190)
6191
6192xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006193 name = "f32_igemm_test",
6194 srcs = [
6195 "test/f32-igemm.cc",
6196 "test/gemm-microkernel-tester.h",
6197 "src/xnnpack/AlignedAllocator.h",
6198 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006199 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006200)
6201
6202xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006203 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006204 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006205 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006206 "test/gemm-microkernel-tester.h",
6207 "src/xnnpack/AlignedAllocator.h",
6208 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006209 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006210)
6211
6212xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006213 name = "f32_igemm_minmax_test",
6214 srcs = [
6215 "test/f32-igemm-minmax.cc",
6216 "test/gemm-microkernel-tester.h",
6217 "src/xnnpack/AlignedAllocator.h",
6218 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006219 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006220)
6221
6222xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006223 name = "f32_conv_hwc_test",
6224 srcs = [
6225 "test/f32-conv-hwc.cc",
6226 "test/conv-hwc-microkernel-tester.h",
6227 "src/xnnpack/AlignedAllocator.h",
6228 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006229 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006230)
6231
6232xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006233 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006234 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006235 "test/f32-conv-hwc2chw.cc",
6236 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006237 "src/xnnpack/AlignedAllocator.h",
6238 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006239 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006240)
6241
6242xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006243 name = "f32_dwconv_test",
6244 srcs = [
6245 "test/f32-dwconv.cc",
6246 "test/dwconv-microkernel-tester.h",
6247 "src/xnnpack/AlignedAllocator.h",
6248 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006249 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006250)
6251
6252xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006253 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006254 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006255 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006256 "test/dwconv-microkernel-tester.h",
6257 "src/xnnpack/AlignedAllocator.h",
6258 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006259 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006260)
6261
6262xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006263 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006264 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006265 "test/f32-dwconv2d-chw.cc",
6266 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006267 "src/xnnpack/AlignedAllocator.h",
6268 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006269 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006270)
6271
6272xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006273 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006274 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006275 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006276 "test/gavgpool-microkernel-tester.h",
6277 "src/xnnpack/AlignedAllocator.h",
6278 ] + MICROKERNEL_TEST_HDRS,
6279 deps = MICROKERNEL_TEST_DEPS,
6280)
6281
6282xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006283 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006284 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006285 "test/f32-gavgpool-cw.cc",
6286 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006287 "src/xnnpack/AlignedAllocator.h",
6288 ] + MICROKERNEL_TEST_HDRS,
6289 deps = MICROKERNEL_TEST_DEPS,
6290)
6291
6292xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006293 name = "f32_gemm_test",
6294 srcs = [
6295 "test/f32-gemm.cc",
6296 "test/gemm-microkernel-tester.h",
6297 "src/xnnpack/AlignedAllocator.h",
6298 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006299 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006300)
6301
6302xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006303 name = "f32_gemm_relu_test",
6304 srcs = [
6305 "test/f32-gemm-relu.cc",
6306 "test/gemm-microkernel-tester.h",
6307 "src/xnnpack/AlignedAllocator.h",
6308 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006309 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006310)
6311
6312xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006313 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006314 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006315 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006316 "test/gemm-microkernel-tester.h",
6317 "src/xnnpack/AlignedAllocator.h",
6318 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006319 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006320)
6321
6322xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006323 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006324 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006325 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006326 "test/gemm-microkernel-tester.h",
6327 "src/xnnpack/AlignedAllocator.h",
6328 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006329 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006330)
6331
6332xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006333 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006334 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006335 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006336 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006337 ] + MICROKERNEL_TEST_HDRS,
6338 deps = MICROKERNEL_TEST_DEPS,
6339)
6340
6341xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006342 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006343 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006344 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006345 "test/maxpool-microkernel-tester.h",
6346 ] + MICROKERNEL_TEST_HDRS,
6347 deps = MICROKERNEL_TEST_DEPS,
6348)
6349
6350xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006351 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006352 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006353 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006354 "test/avgpool-microkernel-tester.h",
6355 "src/xnnpack/AlignedAllocator.h",
6356 ] + MICROKERNEL_TEST_HDRS,
6357 deps = MICROKERNEL_TEST_DEPS,
6358)
6359
6360xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006361 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006362 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006363 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006364 "test/gemm-microkernel-tester.h",
6365 "src/xnnpack/AlignedAllocator.h",
6366 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006367 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006368)
6369
6370xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006371 name = "f16_prelu_test",
6372 srcs = [
6373 "test/f16-prelu.cc",
6374 "test/prelu-microkernel-tester.h",
6375 "src/xnnpack/AlignedAllocator.h",
6376 ] + MICROKERNEL_TEST_HDRS,
6377 deps = MICROKERNEL_TEST_DEPS,
6378)
6379
6380xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006381 name = "f32_prelu_test",
6382 srcs = [
6383 "test/f32-prelu.cc",
6384 "test/prelu-microkernel-tester.h",
6385 "src/xnnpack/AlignedAllocator.h",
6386 ] + MICROKERNEL_TEST_HDRS,
6387 deps = MICROKERNEL_TEST_DEPS,
6388)
6389
6390xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006391 name = "f32_raddexpminusmax_test",
6392 srcs = [
6393 "test/f32-raddexpminusmax.cc",
6394 "test/raddexpminusmax-microkernel-tester.h",
6395 ] + MICROKERNEL_TEST_HDRS,
6396 deps = MICROKERNEL_TEST_DEPS,
6397)
6398
6399xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006400 name = "f32_raddextexp_test",
6401 srcs = [
6402 "test/f32-raddextexp.cc",
6403 "test/raddextexp-microkernel-tester.h",
6404 ] + MICROKERNEL_TEST_HDRS,
6405 deps = MICROKERNEL_TEST_DEPS,
6406)
6407
6408xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006409 name = "f32_raddstoreexpminusmax_test",
6410 srcs = [
6411 "test/f32-raddstoreexpminusmax.cc",
6412 "test/raddstoreexpminusmax-microkernel-tester.h",
6413 ] + MICROKERNEL_TEST_HDRS,
6414 deps = MICROKERNEL_TEST_DEPS,
6415)
6416
6417xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006418 name = "f32_rmax_test",
6419 srcs = [
6420 "test/f32-rmax.cc",
6421 "test/rmax-microkernel-tester.h",
6422 ] + MICROKERNEL_TEST_HDRS,
6423 deps = MICROKERNEL_TEST_DEPS,
6424)
6425
6426xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006427 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006428 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006429 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006430 "test/spmm-microkernel-tester.h",
6431 "src/xnnpack/AlignedAllocator.h",
6432 ] + MICROKERNEL_TEST_HDRS,
6433 deps = MICROKERNEL_TEST_DEPS,
6434)
6435
6436xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006437 name = "f32_vabs_test",
6438 srcs = [
6439 "test/f32-vabs.cc",
6440 "test/vunary-microkernel-tester.h",
6441 ] + MICROKERNEL_TEST_HDRS,
6442 deps = MICROKERNEL_TEST_DEPS,
6443)
6444
6445xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006446 name = "f32_vadd_test",
6447 srcs = [
6448 "test/f32-vadd.cc",
6449 "test/vbinary-microkernel-tester.h",
6450 ] + MICROKERNEL_TEST_HDRS,
6451 deps = MICROKERNEL_TEST_DEPS,
6452)
6453
6454xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006455 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006456 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006457 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006458 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006459 ] + MICROKERNEL_TEST_HDRS,
6460 deps = MICROKERNEL_TEST_DEPS,
6461)
6462
6463xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006464 name = "f32_vadd_relu_test",
6465 srcs = [
6466 "test/f32-vadd-relu.cc",
6467 "test/vbinary-microkernel-tester.h",
6468 ] + MICROKERNEL_TEST_HDRS,
6469 deps = MICROKERNEL_TEST_DEPS,
6470)
6471
6472xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006473 name = "f32_vaddc_test",
6474 srcs = [
6475 "test/f32-vaddc.cc",
6476 "test/vbinaryc-microkernel-tester.h",
6477 ] + MICROKERNEL_TEST_HDRS,
6478 deps = MICROKERNEL_TEST_DEPS,
6479)
6480
6481xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006482 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006483 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006484 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006485 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006486 ] + MICROKERNEL_TEST_HDRS,
6487 deps = MICROKERNEL_TEST_DEPS,
6488)
6489
6490xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006491 name = "f32_vaddc_relu_test",
6492 srcs = [
6493 "test/f32-vaddc-relu.cc",
6494 "test/vbinaryc-microkernel-tester.h",
6495 ] + MICROKERNEL_TEST_HDRS,
6496 deps = MICROKERNEL_TEST_DEPS,
6497)
6498
6499xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006500 name = "f32_vclamp_test",
6501 srcs = [
6502 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006503 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006504 ] + MICROKERNEL_TEST_HDRS,
6505 deps = MICROKERNEL_TEST_DEPS,
6506)
6507
6508xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006509 name = "f32_vdiv_test",
6510 srcs = [
6511 "test/f32-vdiv.cc",
6512 "test/vbinary-microkernel-tester.h",
6513 ] + MICROKERNEL_TEST_HDRS,
6514 deps = MICROKERNEL_TEST_DEPS,
6515)
6516
6517xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006518 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006519 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006520 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006521 "test/vbinary-microkernel-tester.h",
6522 ] + MICROKERNEL_TEST_HDRS,
6523 deps = MICROKERNEL_TEST_DEPS,
6524)
6525
6526xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006527 name = "f32_vdiv_relu_test",
6528 srcs = [
6529 "test/f32-vdiv-relu.cc",
6530 "test/vbinary-microkernel-tester.h",
6531 ] + MICROKERNEL_TEST_HDRS,
6532 deps = MICROKERNEL_TEST_DEPS,
6533)
6534
6535xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006536 name = "f32_vdivc_test",
6537 srcs = [
6538 "test/f32-vdivc.cc",
6539 "test/vbinaryc-microkernel-tester.h",
6540 ] + MICROKERNEL_TEST_HDRS,
6541 deps = MICROKERNEL_TEST_DEPS,
6542)
6543
6544xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006545 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006546 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006547 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006548 "test/vbinaryc-microkernel-tester.h",
6549 ] + MICROKERNEL_TEST_HDRS,
6550 deps = MICROKERNEL_TEST_DEPS,
6551)
6552
6553xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006554 name = "f32_vdivc_relu_test",
6555 srcs = [
6556 "test/f32-vdivc-relu.cc",
6557 "test/vbinaryc-microkernel-tester.h",
6558 ] + MICROKERNEL_TEST_HDRS,
6559 deps = MICROKERNEL_TEST_DEPS,
6560)
6561
6562xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006563 name = "f32_vrdivc_test",
6564 srcs = [
6565 "test/f32-vrdivc.cc",
6566 "test/vbinaryc-microkernel-tester.h",
6567 ] + MICROKERNEL_TEST_HDRS,
6568 deps = MICROKERNEL_TEST_DEPS,
6569)
6570
6571xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006572 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006573 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006574 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006575 "test/vbinaryc-microkernel-tester.h",
6576 ] + MICROKERNEL_TEST_HDRS,
6577 deps = MICROKERNEL_TEST_DEPS,
6578)
6579
6580xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006581 name = "f32_vrdivc_relu_test",
6582 srcs = [
6583 "test/f32-vrdivc-relu.cc",
6584 "test/vbinaryc-microkernel-tester.h",
6585 ] + MICROKERNEL_TEST_HDRS,
6586 deps = MICROKERNEL_TEST_DEPS,
6587)
6588
6589xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006590 name = "f32_velu_test",
6591 srcs = [
6592 "test/f32-velu.cc",
6593 "test/vunary-microkernel-tester.h",
6594 ] + MICROKERNEL_TEST_HDRS,
6595 deps = MICROKERNEL_TEST_DEPS,
6596)
6597
6598xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08006599 name = "f32_vmax_test",
6600 srcs = [
6601 "test/f32-vmax.cc",
6602 "test/vbinary-microkernel-tester.h",
6603 ] + MICROKERNEL_TEST_HDRS,
6604 deps = MICROKERNEL_TEST_DEPS,
6605)
6606
6607xnnpack_unit_test(
6608 name = "f32_vmaxc_test",
6609 srcs = [
6610 "test/f32-vmaxc.cc",
6611 "test/vbinaryc-microkernel-tester.h",
6612 ] + MICROKERNEL_TEST_HDRS,
6613 deps = MICROKERNEL_TEST_DEPS,
6614)
6615
6616xnnpack_unit_test(
6617 name = "f32_vmin_test",
6618 srcs = [
6619 "test/f32-vmin.cc",
6620 "test/vbinary-microkernel-tester.h",
6621 ] + MICROKERNEL_TEST_HDRS,
6622 deps = MICROKERNEL_TEST_DEPS,
6623)
6624
6625xnnpack_unit_test(
6626 name = "f32_vminc_test",
6627 srcs = [
6628 "test/f32-vminc.cc",
6629 "test/vbinaryc-microkernel-tester.h",
6630 ] + MICROKERNEL_TEST_HDRS,
6631 deps = MICROKERNEL_TEST_DEPS,
6632)
6633
6634xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006635 name = "f32_vmul_test",
6636 srcs = [
6637 "test/f32-vmul.cc",
6638 "test/vbinary-microkernel-tester.h",
6639 ] + MICROKERNEL_TEST_HDRS,
6640 deps = MICROKERNEL_TEST_DEPS,
6641)
6642
6643xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006644 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006645 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006646 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006647 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006648 ] + MICROKERNEL_TEST_HDRS,
6649 deps = MICROKERNEL_TEST_DEPS,
6650)
6651
6652xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006653 name = "f32_vmul_relu_test",
6654 srcs = [
6655 "test/f32-vmul-relu.cc",
6656 "test/vbinary-microkernel-tester.h",
6657 ] + MICROKERNEL_TEST_HDRS,
6658 deps = MICROKERNEL_TEST_DEPS,
6659)
6660
6661xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006662 name = "f32_vmulc_test",
6663 srcs = [
6664 "test/f32-vmulc.cc",
6665 "test/vbinaryc-microkernel-tester.h",
6666 ] + MICROKERNEL_TEST_HDRS,
6667 deps = MICROKERNEL_TEST_DEPS,
6668)
6669
6670xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006671 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006672 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006673 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006674 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006675 ] + MICROKERNEL_TEST_HDRS,
6676 deps = MICROKERNEL_TEST_DEPS,
6677)
6678
6679xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006680 name = "f32_vmulc_relu_test",
6681 srcs = [
6682 "test/f32-vmulc-relu.cc",
6683 "test/vbinaryc-microkernel-tester.h",
6684 ] + MICROKERNEL_TEST_HDRS,
6685 deps = MICROKERNEL_TEST_DEPS,
6686)
6687
6688xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006689 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006690 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006691 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006692 "test/vmulcaddc-microkernel-tester.h",
6693 "src/xnnpack/AlignedAllocator.h",
6694 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006695 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006696)
6697
6698xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07006699 name = "f32_vlrelu_test",
6700 srcs = [
6701 "test/f32-vlrelu.cc",
6702 "test/vunary-microkernel-tester.h",
6703 ] + MICROKERNEL_TEST_HDRS,
6704 deps = MICROKERNEL_TEST_DEPS,
6705)
6706
6707xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006708 name = "f32_vneg_test",
6709 srcs = [
6710 "test/f32-vneg.cc",
6711 "test/vunary-microkernel-tester.h",
6712 ] + MICROKERNEL_TEST_HDRS,
6713 deps = MICROKERNEL_TEST_DEPS,
6714)
6715
6716xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006717 name = "f32_vrelu_test",
6718 srcs = [
6719 "test/f32-vrelu.cc",
6720 "test/vunary-microkernel-tester.h",
6721 ] + MICROKERNEL_TEST_HDRS,
6722 deps = MICROKERNEL_TEST_DEPS,
6723)
6724
6725xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07006726 name = "f32_vrndne_test",
6727 srcs = [
6728 "test/f32-vrndne.cc",
6729 "test/vunary-microkernel-tester.h",
6730 ] + MICROKERNEL_TEST_HDRS,
6731 deps = MICROKERNEL_TEST_DEPS,
6732)
6733
6734xnnpack_unit_test(
6735 name = "f32_vrndz_test",
6736 srcs = [
6737 "test/f32-vrndz.cc",
6738 "test/vunary-microkernel-tester.h",
6739 ] + MICROKERNEL_TEST_HDRS,
6740 deps = MICROKERNEL_TEST_DEPS,
6741)
6742
6743xnnpack_unit_test(
6744 name = "f32_vrndu_test",
6745 srcs = [
6746 "test/f32-vrndu.cc",
6747 "test/vunary-microkernel-tester.h",
6748 ] + MICROKERNEL_TEST_HDRS,
6749 deps = MICROKERNEL_TEST_DEPS,
6750)
6751
6752xnnpack_unit_test(
6753 name = "f32_vrndd_test",
6754 srcs = [
6755 "test/f32-vrndd.cc",
6756 "test/vunary-microkernel-tester.h",
6757 ] + MICROKERNEL_TEST_HDRS,
6758 deps = MICROKERNEL_TEST_DEPS,
6759)
6760
6761xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07006762 name = "f32_vscale_test",
6763 srcs = [
6764 "test/f32-vscale.cc",
6765 "test/vscale-microkernel-tester.h",
6766 ] + MICROKERNEL_TEST_HDRS,
6767 deps = MICROKERNEL_TEST_DEPS,
6768)
6769
6770xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006771 name = "f32_vscaleexpminusmax_test",
6772 srcs = [
6773 "test/f32-vscaleexpminusmax.cc",
6774 "test/vscaleexpminusmax-microkernel-tester.h",
6775 ] + MICROKERNEL_TEST_HDRS,
6776 deps = MICROKERNEL_TEST_DEPS,
6777)
6778
6779xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006780 name = "f32_vscaleextexp_test",
6781 srcs = [
6782 "test/f32-vscaleextexp.cc",
6783 "test/vscaleextexp-microkernel-tester.h",
6784 ] + MICROKERNEL_TEST_HDRS,
6785 deps = MICROKERNEL_TEST_DEPS,
6786)
6787
6788xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006789 name = "f32_vsigmoid_test",
6790 srcs = [
6791 "test/f32-vsigmoid.cc",
6792 "test/vunary-microkernel-tester.h",
6793 ] + MICROKERNEL_TEST_HDRS,
6794 deps = MICROKERNEL_TEST_DEPS,
6795)
6796
6797xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006798 name = "f32_vsqr_test",
6799 srcs = [
6800 "test/f32-vsqr.cc",
6801 "test/vunary-microkernel-tester.h",
6802 ] + MICROKERNEL_TEST_HDRS,
6803 deps = MICROKERNEL_TEST_DEPS,
6804)
6805
6806xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07006807 name = "f32_vsqrdiff_test",
6808 srcs = [
6809 "test/f32-vsqrdiff.cc",
6810 "test/vbinary-microkernel-tester.h",
6811 ] + MICROKERNEL_TEST_HDRS,
6812 deps = MICROKERNEL_TEST_DEPS,
6813)
6814
6815xnnpack_unit_test(
6816 name = "f32_vsqrdiffc_test",
6817 srcs = [
6818 "test/f32-vsqrdiffc.cc",
6819 "test/vbinaryc-microkernel-tester.h",
6820 ] + MICROKERNEL_TEST_HDRS,
6821 deps = MICROKERNEL_TEST_DEPS,
6822)
6823
6824xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006825 name = "f32_vsqrt_test",
6826 srcs = [
6827 "test/f32-vsqrt.cc",
6828 "test/vunary-microkernel-tester.h",
6829 ] + MICROKERNEL_TEST_HDRS,
6830 deps = MICROKERNEL_TEST_DEPS,
6831)
6832
6833xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006834 name = "f32_vsub_test",
6835 srcs = [
6836 "test/f32-vsub.cc",
6837 "test/vbinary-microkernel-tester.h",
6838 ] + MICROKERNEL_TEST_HDRS,
6839 deps = MICROKERNEL_TEST_DEPS,
6840)
6841
6842xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006843 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07006844 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006845 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006846 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006847 ] + MICROKERNEL_TEST_HDRS,
6848 deps = MICROKERNEL_TEST_DEPS,
6849)
6850
6851xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006852 name = "f32_vsub_relu_test",
6853 srcs = [
6854 "test/f32-vsub-relu.cc",
6855 "test/vbinary-microkernel-tester.h",
6856 ] + MICROKERNEL_TEST_HDRS,
6857 deps = MICROKERNEL_TEST_DEPS,
6858)
6859
6860xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006861 name = "f32_vsubc_test",
6862 srcs = [
6863 "test/f32-vsubc.cc",
6864 "test/vbinaryc-microkernel-tester.h",
6865 ] + MICROKERNEL_TEST_HDRS,
6866 deps = MICROKERNEL_TEST_DEPS,
6867)
6868
6869xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006870 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006871 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006872 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006873 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006874 ] + MICROKERNEL_TEST_HDRS,
6875 deps = MICROKERNEL_TEST_DEPS,
6876)
6877
6878xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006879 name = "f32_vsubc_relu_test",
6880 srcs = [
6881 "test/f32-vsubc-relu.cc",
6882 "test/vbinaryc-microkernel-tester.h",
6883 ] + MICROKERNEL_TEST_HDRS,
6884 deps = MICROKERNEL_TEST_DEPS,
6885)
6886
6887xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006888 name = "f32_vrsubc_test",
6889 srcs = [
6890 "test/f32-vrsubc.cc",
6891 "test/vbinaryc-microkernel-tester.h",
6892 ] + MICROKERNEL_TEST_HDRS,
6893 deps = MICROKERNEL_TEST_DEPS,
6894)
6895
6896xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006897 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006898 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006899 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006900 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07006901 ] + MICROKERNEL_TEST_HDRS,
6902 deps = MICROKERNEL_TEST_DEPS,
6903)
6904
6905xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006906 name = "f32_vrsubc_relu_test",
6907 srcs = [
6908 "test/f32-vrsubc-relu.cc",
6909 "test/vbinaryc-microkernel-tester.h",
6910 ] + MICROKERNEL_TEST_HDRS,
6911 deps = MICROKERNEL_TEST_DEPS,
6912)
6913
6914xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006915 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07006916 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006917 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07006918 "test/dwconv-microkernel-tester.h",
6919 "src/xnnpack/AlignedAllocator.h",
6920 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6921 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6922)
6923
6924xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07006925 name = "qs8_dwconv_minmax_fp32_test",
6926 srcs = [
6927 "test/qs8-dwconv-minmax-fp32.cc",
6928 "test/dwconv-microkernel-tester.h",
6929 "src/xnnpack/AlignedAllocator.h",
6930 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6931 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6932)
6933
6934xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07006935 name = "qs8_gavgpool_minmax_test",
6936 srcs = [
6937 "test/qs8-gavgpool-minmax.cc",
6938 "test/gavgpool-microkernel-tester.h",
6939 "src/xnnpack/AlignedAllocator.h",
6940 ] + MICROKERNEL_TEST_HDRS,
6941 deps = MICROKERNEL_TEST_DEPS,
6942)
6943
6944xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006945 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07006946 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07006947 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006948 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07006949 "test/gemm-microkernel-tester.h",
6950 "src/xnnpack/AlignedAllocator.h",
6951 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6952 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6953)
6954
6955xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07006956 name = "qs8_gemm_minmax_fp32_test",
6957 timeout = "moderate",
6958 srcs = [
6959 "test/qs8-gemm-minmax-fp32.cc",
6960 "test/gemm-microkernel-tester.h",
6961 "src/xnnpack/AlignedAllocator.h",
6962 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6963 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6964)
6965
6966xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006967 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07006968 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07006969 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006970 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07006971 "test/gemm-microkernel-tester.h",
6972 "src/xnnpack/AlignedAllocator.h",
6973 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6974 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6975)
6976
6977xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07006978 name = "qs8_igemm_minmax_fp32_test",
6979 timeout = "moderate",
6980 srcs = [
6981 "test/qs8-igemm-minmax-fp32.cc",
6982 "test/gemm-microkernel-tester.h",
6983 "src/xnnpack/AlignedAllocator.h",
6984 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6985 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6986)
6987
6988xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07006989 name = "qs8_requantization_test",
6990 srcs = [
6991 "src/xnnpack/requantization-stubs.h",
6992 "test/qs8-requantization.cc",
6993 "test/requantization-tester.h",
6994 ] + MICROKERNEL_TEST_HDRS,
6995 deps = MICROKERNEL_TEST_DEPS,
6996)
6997
6998xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07006999 name = "qs8_vadd_minmax_test",
7000 srcs = [
7001 "test/qs8-vadd-minmax.cc",
7002 "test/vadd-microkernel-tester.h",
7003 ] + MICROKERNEL_TEST_HDRS,
7004 deps = MICROKERNEL_TEST_DEPS,
7005)
7006
7007xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007008 name = "qs8_vaddc_minmax_test",
7009 srcs = [
7010 "test/qs8-vaddc-minmax.cc",
7011 "test/vaddc-microkernel-tester.h",
7012 ] + MICROKERNEL_TEST_HDRS,
7013 deps = MICROKERNEL_TEST_DEPS,
7014)
7015
7016xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007017 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007018 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007019 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007020 "test/avgpool-microkernel-tester.h",
7021 "src/xnnpack/AlignedAllocator.h",
7022 ] + MICROKERNEL_TEST_HDRS,
7023 deps = MICROKERNEL_TEST_DEPS,
7024)
7025
7026xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007027 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007028 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007029 "test/qu8-dwconv-minmax.cc",
7030 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007031 "src/xnnpack/AlignedAllocator.h",
7032 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007033 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007034)
7035
7036xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007037 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007038 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007039 "test/qu8-igemm-minmax.cc",
7040 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007041 "src/xnnpack/AlignedAllocator.h",
7042 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007043 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007044)
7045
7046xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007047 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007048 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007049 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007050 "test/gavgpool-microkernel-tester.h",
7051 "src/xnnpack/AlignedAllocator.h",
7052 ] + MICROKERNEL_TEST_HDRS,
7053 deps = MICROKERNEL_TEST_DEPS,
7054)
7055
7056xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007057 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007058 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007059 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007060 "test/gemm-microkernel-tester.h",
7061 "src/xnnpack/AlignedAllocator.h",
7062 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007063 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007064)
7065
7066xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007067 name = "qu8_requantization_test",
7068 srcs = [
7069 "src/xnnpack/requantization-stubs.h",
7070 "test/qu8-requantization.cc",
7071 "test/requantization-tester.h",
7072 ] + MICROKERNEL_TEST_HDRS,
7073 deps = MICROKERNEL_TEST_DEPS,
7074)
7075
7076xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007077 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007078 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007079 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007080 "test/vadd-microkernel-tester.h",
7081 ] + MICROKERNEL_TEST_HDRS,
7082 deps = MICROKERNEL_TEST_DEPS,
7083)
7084
7085xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007086 name = "u8_lut32norm_test",
7087 srcs = [
7088 "test/u8-lut32norm.cc",
7089 "test/lut-norm-microkernel-tester.h",
7090 ] + MICROKERNEL_TEST_HDRS,
7091 deps = MICROKERNEL_TEST_DEPS,
7092)
7093
7094xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007095 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007096 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007097 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007098 "test/maxpool-microkernel-tester.h",
7099 ] + MICROKERNEL_TEST_HDRS,
7100 deps = MICROKERNEL_TEST_DEPS,
7101)
7102
7103xnnpack_unit_test(
7104 name = "u8_rmax_test",
7105 srcs = [
7106 "test/u8-rmax.cc",
7107 "test/rmax-microkernel-tester.h",
7108 ] + MICROKERNEL_TEST_HDRS,
7109 deps = MICROKERNEL_TEST_DEPS,
7110)
7111
7112xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007113 name = "u8_vclamp_test",
7114 srcs = [
7115 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007116 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007117 ] + MICROKERNEL_TEST_HDRS,
7118 deps = MICROKERNEL_TEST_DEPS,
7119)
7120
7121xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007122 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007123 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007124 "test/x32-depthtospace2d-chw2hwc.cc",
7125 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007126 ] + MICROKERNEL_TEST_HDRS,
7127 deps = MICROKERNEL_TEST_DEPS,
7128)
7129
7130xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007131 name = "x32_fill_test",
7132 srcs = [
7133 "test/x32-fill.cc",
7134 "test/fill-microkernel-tester.h",
7135 ] + MICROKERNEL_TEST_HDRS,
7136 deps = MICROKERNEL_TEST_DEPS,
7137)
7138
7139xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007140 name = "x32_packx_test",
7141 srcs = [
7142 "test/x32-packx.cc",
7143 "test/pack-microkernel-tester.h",
7144 "src/xnnpack/AlignedAllocator.h",
7145 ] + MICROKERNEL_TEST_HDRS,
7146 deps = MICROKERNEL_TEST_DEPS,
7147)
7148
7149xnnpack_unit_test(
7150 name = "x32_pad_test",
7151 srcs = [
7152 "test/x32-pad.cc",
7153 "test/pad-microkernel-tester.h",
7154 ] + MICROKERNEL_TEST_HDRS,
7155 deps = MICROKERNEL_TEST_DEPS,
7156)
7157
7158xnnpack_unit_test(
7159 name = "x32_unpool_test",
7160 srcs = [
7161 "test/x32-unpool.cc",
7162 "test/unpool-microkernel-tester.h",
7163 ] + MICROKERNEL_TEST_HDRS,
7164 deps = MICROKERNEL_TEST_DEPS,
7165)
7166
7167xnnpack_unit_test(
7168 name = "x32_zip_test",
7169 srcs = [
7170 "test/x32-zip.cc",
7171 "test/zip-microkernel-tester.h",
7172 ] + MICROKERNEL_TEST_HDRS,
7173 deps = MICROKERNEL_TEST_DEPS,
7174)
7175
7176xnnpack_unit_test(
7177 name = "x8_lut_test",
7178 srcs = [
7179 "test/x8-lut.cc",
7180 "test/lut-microkernel-tester.h",
7181 ] + MICROKERNEL_TEST_HDRS,
7182 deps = MICROKERNEL_TEST_DEPS,
7183)
7184
7185xnnpack_unit_test(
7186 name = "x8_zip_test",
7187 srcs = [
7188 "test/x8-zip.cc",
7189 "test/zip-microkernel-tester.h",
7190 ] + MICROKERNEL_TEST_HDRS,
7191 deps = MICROKERNEL_TEST_DEPS,
7192)
7193
Marat Dukhan20c3b922020-03-10 03:45:06 -07007194########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007195
7196xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007197 name = "operator_size_test",
7198 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007199 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007200)
7201
Marat Dukhan20c3b922020-03-10 03:45:06 -07007202xnnpack_binary(
7203 name = "subgraph_size_test",
7204 srcs = ["test/subgraph-size.c"],
7205 deps = [":XNNPACK"],
7206)
7207
7208########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007209
7210xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007211 name = "abs_nc_test",
7212 srcs = [
7213 "test/abs-nc.cc",
7214 "test/abs-operator-tester.h",
7215 ],
7216 deps = OPERATOR_TEST_DEPS,
7217)
7218
7219xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007220 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007221 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007222 srcs = [
7223 "test/add-nd.cc",
7224 "test/binary-elementwise-operator-tester.h",
7225 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007226 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007227)
7228
7229xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007230 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007231 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007232 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007233 "test/argmax-pooling-operator-tester.h",
7234 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007235 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007236)
7237
7238xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007239 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007240 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007241 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007242 "test/average-pooling-operator-tester.h",
7243 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007244 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007245)
7246
7247xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007248 name = "bankers_rounding_nc_test",
7249 srcs = [
7250 "test/bankers-rounding-nc.cc",
7251 "test/bankers-rounding-operator-tester.h",
7252 ],
7253 deps = OPERATOR_TEST_DEPS,
7254)
7255
7256xnnpack_unit_test(
7257 name = "ceiling_nc_test",
7258 srcs = [
7259 "test/ceiling-nc.cc",
7260 "test/ceiling-operator-tester.h",
7261 ],
7262 deps = OPERATOR_TEST_DEPS,
7263)
7264
7265xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007266 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007267 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007268 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007269 "test/channel-shuffle-operator-tester.h",
7270 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007271 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007272)
7273
7274xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007275 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007276 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007277 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007278 "test/clamp-operator-tester.h",
7279 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007280 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007281)
7282
7283xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007284 name = "constant_pad_nd_test",
7285 srcs = [
7286 "test/constant-pad-nd.cc",
7287 "test/constant-pad-operator-tester.h",
7288 ],
7289 deps = OPERATOR_TEST_DEPS,
7290)
7291
7292xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007293 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007294 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007295 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007296 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007297 "test/convolution-operator-tester.h",
7298 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007299 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007300)
7301
7302xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007303 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007304 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007305 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007306 "test/convolution-nchw.cc",
7307 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007308 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007309 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007310)
7311
7312xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007313 name = "copy_nc_test",
7314 srcs = [
7315 "test/copy-nc.cc",
7316 "test/copy-operator-tester.h",
7317 ],
7318 deps = OPERATOR_TEST_DEPS,
7319)
7320
7321xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007322 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007323 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007324 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007325 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007326 "test/deconvolution-operator-tester.h",
7327 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007328 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007329)
7330
7331xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007332 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007333 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007334 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007335 "test/depth-to-space-operator-tester.h",
7336 ] + OPERATOR_TEST_PARAMS_HDRS,
7337 deps = OPERATOR_TEST_DEPS,
7338)
7339
7340xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007341 name = "depth_to_space_nhwc_test",
7342 srcs = [
7343 "test/depth-to-space-nhwc.cc",
7344 "test/depth-to-space-operator-tester.h",
7345 ] + OPERATOR_TEST_PARAMS_HDRS,
7346 deps = OPERATOR_TEST_DEPS,
7347)
7348
7349xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007350 name = "divide_nd_test",
7351 srcs = [
7352 "test/binary-elementwise-operator-tester.h",
7353 "test/divide-nd.cc",
7354 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007355 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007356)
7357
7358xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007359 name = "elu_nc_test",
7360 srcs = [
7361 "test/elu-nc.cc",
7362 "test/elu-operator-tester.h",
7363 ],
7364 deps = OPERATOR_TEST_DEPS,
7365)
7366
7367xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007368 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007369 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007370 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007371 "test/fully-connected-operator-tester.h",
7372 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007373 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007374)
7375
7376xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007377 name = "floor_nc_test",
7378 srcs = [
7379 "test/floor-nc.cc",
7380 "test/floor-operator-tester.h",
7381 ],
7382 deps = OPERATOR_TEST_DEPS,
7383)
7384
7385xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007386 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007387 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007388 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007389 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007390 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007391 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007392)
7393
7394xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007395 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007396 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007397 "test/global-average-pooling-ncw.cc",
7398 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007399 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007400 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007401)
7402
7403xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007404 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007405 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007406 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007407 "test/hardswish-operator-tester.h",
7408 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007409 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007410)
7411
7412xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007413 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007414 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007415 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007416 "test/leaky-relu-operator-tester.h",
7417 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007418 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007419)
7420
7421xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007422 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007423 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007424 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007425 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007426 "test/max-pooling-operator-tester.h",
7427 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007428 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007429)
7430
7431xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007432 name = "maximum_nd_test",
7433 srcs = [
7434 "test/binary-elementwise-operator-tester.h",
7435 "test/maximum-nd.cc",
7436 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007437 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007438)
7439
7440xnnpack_unit_test(
7441 name = "minimum_nd_test",
7442 srcs = [
7443 "test/binary-elementwise-operator-tester.h",
7444 "test/minimum-nd.cc",
7445 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007446 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007447)
7448
7449xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007450 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007451 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007452 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007453 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007454 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007455 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007456)
7457
7458xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007459 name = "negate_nc_test",
7460 srcs = [
7461 "test/negate-nc.cc",
7462 "test/negate-operator-tester.h",
7463 ],
7464 deps = OPERATOR_TEST_DEPS,
7465)
7466
7467xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007468 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007469 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007470 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007471 "test/prelu-operator-tester.h",
7472 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007473 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007474)
7475
7476xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007477 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007478 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007479 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007480 "test/resize-bilinear-operator-tester.h",
7481 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007482 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007483)
7484
7485xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007486 name = "resize_bilinear_nchw_test",
7487 srcs = [
7488 "test/resize-bilinear-nchw.cc",
7489 "test/resize-bilinear-operator-tester.h",
7490 ] + OPERATOR_TEST_PARAMS_HDRS,
7491 deps = OPERATOR_TEST_DEPS,
7492)
7493
7494xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007495 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007496 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007497 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007498 "test/sigmoid-operator-tester.h",
7499 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007500 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007501)
7502
7503xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007504 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007505 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007506 "test/softmax-nc.cc",
7507 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007508 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007509 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007510)
7511
7512xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007513 name = "square_nc_test",
7514 srcs = [
7515 "test/square-nc.cc",
7516 "test/square-operator-tester.h",
7517 ],
7518 deps = OPERATOR_TEST_DEPS,
7519)
7520
7521xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007522 name = "square_root_nc_test",
7523 srcs = [
7524 "test/square-root-nc.cc",
7525 "test/square-root-operator-tester.h",
7526 ],
7527 deps = OPERATOR_TEST_DEPS,
7528)
7529
7530xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007531 name = "squared_difference_nd_test",
7532 srcs = [
7533 "test/binary-elementwise-operator-tester.h",
7534 "test/squared-difference-nd.cc",
7535 ],
7536 deps = OPERATOR_TEST_DEPS,
7537)
7538
7539xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007540 name = "subtract_nd_test",
7541 srcs = [
7542 "test/binary-elementwise-operator-tester.h",
7543 "test/subtract-nd.cc",
7544 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007545 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007546)
7547
7548xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007549 name = "truncation_nc_test",
7550 srcs = [
7551 "test/truncation-nc.cc",
7552 "test/truncation-operator-tester.h",
7553 ],
7554 deps = OPERATOR_TEST_DEPS,
7555)
7556
7557xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007558 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007559 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007560 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007561 "test/unpooling-operator-tester.h",
7562 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007563 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007564)
7565
Chao Mei6ddfc602020-05-13 22:29:36 -07007566############################### Misc unit tests ###############################
7567
7568xnnpack_unit_test(
7569 name = "memory_planner_test",
7570 srcs = [
7571 "test/memory-planner-test.cc",
7572 ],
7573 deps = [
7574 ":XNNPACK",
7575 ":memory_planner",
7576 ],
7577)
7578
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07007579xnnpack_unit_test(
7580 name = "subgraph_nchw_test",
7581 srcs = [
7582 "src/xnnpack/subgraph.h",
7583 "test/subgraph-nchw.cc",
7584 "test/subgraph-tester.h",
7585 ],
7586 deps = [
7587 ":XNNPACK",
7588 ],
7589)
7590
Marat Dukhan08c4a432019-10-03 09:29:21 -07007591############################# Build configurations #############################
7592
Marat Dukhanb8642352019-10-30 15:43:02 -07007593# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07007594config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007595 name = "xnn_enable_assembly_explicit_true",
7596 define_values = {"xnn_enable_assembly": "true"},
7597)
7598
7599# Disables usage of assembly kernels.
7600config_setting(
7601 name = "xnn_enable_assembly_explicit_false",
7602 define_values = {"xnn_enable_assembly": "false"},
7603)
7604
Marat Dukhan9de90e02020-06-18 16:04:12 -07007605# Enables usage of sparse inference.
7606config_setting(
7607 name = "xnn_enable_sparse_explicit_true",
7608 define_values = {"xnn_enable_sparse": "true"},
7609)
7610
7611# Disables usage of sparse inference.
7612config_setting(
7613 name = "xnn_enable_sparse_explicit_false",
7614 define_values = {"xnn_enable_sparse": "false"},
7615)
7616
Marat Dukhan05702cf2020-03-26 15:41:33 -07007617# Disables usage of HMP-aware optimizations.
7618config_setting(
7619 name = "xnn_enable_hmp_explicit_false",
7620 define_values = {"xnn_enable_hmp": "false"},
7621)
7622
Chao Mei6ddfc602020-05-13 22:29:36 -07007623# Enable usage of optimized memory allocation
7624config_setting(
7625 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07007626 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007627)
7628
7629# Disable usage of optimized memory allocation
7630config_setting(
7631 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07007632 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007633)
7634
Marat Dukhanb939cdb2021-03-30 18:51:51 -07007635# Enable QS8 inference in TFLite-specific version
7636config_setting(
7637 name = "xnn_enable_qs8_explicit_true",
7638 define_values = {"xnn_enable_qs8": "true"},
7639)
7640
7641# Disable QS8 inference in TFLite-specific version
7642config_setting(
7643 name = "xnn_enable_qs8_explicit_false",
7644 define_values = {"xnn_enable_qs8": "false"},
7645)
7646
Marat Dukhanb8642352019-10-30 15:43:02 -07007647# Builds with -c dbg
7648config_setting(
7649 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007650 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07007651 "compilation_mode": "dbg",
7652 },
7653)
7654
7655# Builds with -c opt
7656config_setting(
7657 name = "optimized_build",
7658 values = {
7659 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007660 },
7661)
7662
7663config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007664 name = "linux_k8",
7665 values = {"cpu": "k8"},
7666)
7667
7668config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007669 name = "linux_arm",
7670 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07007671)
7672
7673config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07007674 name = "linux_armeabi",
7675 values = {"cpu": "armeabi"},
7676)
7677
7678config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07007679 name = "linux_armhf",
7680 values = {"cpu": "armhf"},
7681)
7682
7683config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07007684 name = "linux_armv7a",
7685 values = {"cpu": "armv7a"},
7686)
7687
7688config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007689 name = "linux_aarch64",
7690 values = {"cpu": "aarch64"},
7691)
7692
7693config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007694 name = "android",
7695 values = {"crosstool_top": "//external:android/crosstool"},
7696)
7697
7698config_setting(
7699 name = "android_armv7",
7700 values = {
7701 "crosstool_top": "//external:android/crosstool",
7702 "cpu": "armeabi-v7a",
7703 },
7704)
7705
7706config_setting(
7707 name = "android_arm64",
7708 values = {
7709 "crosstool_top": "//external:android/crosstool",
7710 "cpu": "arm64-v8a",
7711 },
7712)
7713
7714config_setting(
7715 name = "android_x86",
7716 values = {
7717 "crosstool_top": "//external:android/crosstool",
7718 "cpu": "x86",
7719 },
7720)
7721
7722config_setting(
7723 name = "android_x86_64",
7724 values = {
7725 "crosstool_top": "//external:android/crosstool",
7726 "cpu": "x86_64",
7727 },
7728)
7729
7730config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007731 name = "windows_x86_64",
7732 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007733)
7734
7735config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007736 name = "windows_x86_64_clang",
7737 values = {
7738 "compiler": "clang-cl",
7739 "cpu": "x64_windows",
7740 },
7741)
7742
7743config_setting(
7744 name = "windows_x86_64_mingw",
7745 values = {
7746 "compiler": "mingw-gcc",
7747 "cpu": "x64_windows",
7748 },
7749)
7750
7751config_setting(
7752 name = "windows_x86_64_msys",
7753 values = {
7754 "compiler": "msys-gcc",
7755 "cpu": "x64_windows",
7756 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007757)
7758
7759config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07007760 name = "macos_x86_64",
7761 values = {
7762 "apple_platform_type": "macos",
7763 "cpu": "darwin",
7764 },
7765)
7766
7767config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01007768 name = "macos_arm64",
7769 values = {
7770 "apple_platform_type": "macos",
7771 "cpu": "darwin_arm64",
7772 },
7773)
7774
7775config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007776 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007777 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07007778)
7779
7780config_setting(
7781 name = "emscripten_wasm",
7782 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007783 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007784 "cpu": "wasm",
7785 },
7786)
7787
7788config_setting(
7789 name = "emscripten_wasmsimd",
7790 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007791 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007792 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07007793 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007794 },
7795)
7796
7797config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007798 name = "ios_armv7",
7799 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007800 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007801 "cpu": "ios_armv7",
7802 },
7803)
7804
7805config_setting(
7806 name = "ios_arm64",
7807 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007808 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007809 "cpu": "ios_arm64",
7810 },
7811)
7812
7813config_setting(
7814 name = "ios_arm64e",
7815 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007816 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007817 "cpu": "ios_arm64e",
7818 },
7819)
7820
7821config_setting(
7822 name = "ios_x86",
7823 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007824 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007825 "cpu": "ios_i386",
7826 },
7827)
7828
7829config_setting(
7830 name = "ios_x86_64",
7831 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007832 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007833 "cpu": "ios_x86_64",
7834 },
7835)
7836
7837config_setting(
7838 name = "watchos_armv7k",
7839 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007840 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007841 "cpu": "watchos_armv7k",
7842 },
7843)
7844
7845config_setting(
7846 name = "watchos_arm64_32",
7847 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007848 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007849 "cpu": "watchos_arm64_32",
7850 },
7851)
7852
7853config_setting(
7854 name = "watchos_x86",
7855 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007856 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007857 "cpu": "watchos_i386",
7858 },
7859)
7860
7861config_setting(
7862 name = "watchos_x86_64",
7863 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007864 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007865 "cpu": "watchos_x86_64",
7866 },
7867)
7868
7869config_setting(
7870 name = "tvos_arm64",
7871 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007872 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007873 "cpu": "tvos_arm64",
7874 },
7875)
7876
7877config_setting(
7878 name = "tvos_x86_64",
7879 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007880 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007881 "cpu": "tvos_x86_64",
7882 },
7883)