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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
sewardj2019a972011-03-07 16:04:07 +000037#include "libvex.h" /* needed for bb_to_IR.h */
florian933065d2011-07-11 01:48:02 +000038#include "libvex_s390x_common.h"
sewardj2019a972011-03-07 16:04:07 +000039#include "main_util.h" /* vassert */
40#include "main_globals.h" /* vex_traceflags */
41#include "guest_generic_bb_to_IR.h" /* DisResult */
42#include "guest_s390_defs.h" /* prototypes for this file's functions */
43#include "host_s390_disasm.h"
44#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
45
sewardj2019a972011-03-07 16:04:07 +000046
47/*------------------------------------------------------------*/
florianb4df7682011-07-05 02:09:01 +000048/*--- Forward declarations ---*/
49/*------------------------------------------------------------*/
50static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
florianb0bf6602012-05-05 00:01:16 +000051static void s390_irgen_xonc(IROp, IRTemp, IRTemp, IRTemp);
florian79e839e2012-05-05 02:20:30 +000052static void s390_irgen_CLC_EX(IRTemp, IRTemp, IRTemp);
florianb4df7682011-07-05 02:09:01 +000053
54
55/*------------------------------------------------------------*/
sewardj2019a972011-03-07 16:04:07 +000056/*--- Globals ---*/
57/*------------------------------------------------------------*/
58
59/* The IRSB* into which we're generating code. */
60static IRSB *irsb;
61
62/* The guest address for the instruction currently being
63 translated. */
64static Addr64 guest_IA_curr_instr;
65
66/* The guest address for the instruction following the current instruction. */
67static Addr64 guest_IA_next_instr;
68
69/* Result of disassembly step. */
70static DisResult *dis_res;
71
floriana64c2432011-07-16 02:11:50 +000072/* Resteer function and callback data */
73static Bool (*resteer_fn)(void *, Addr64);
74static void *resteer_data;
75
sewardj2019a972011-03-07 16:04:07 +000076/* The last seen execute target instruction */
77ULong last_execute_target;
78
79/* The possible outcomes of a decoding operation */
80typedef enum {
81 S390_DECODE_OK,
82 S390_DECODE_UNKNOWN_INSN,
83 S390_DECODE_UNIMPLEMENTED_INSN,
84 S390_DECODE_UNKNOWN_SPECIAL_INSN,
85 S390_DECODE_ERROR
86} s390_decode_t;
87
florian428dfdd2012-03-27 03:09:49 +000088
sewardj2019a972011-03-07 16:04:07 +000089/*------------------------------------------------------------*/
90/*--- Helpers for constructing IR. ---*/
91/*------------------------------------------------------------*/
92
93/* Sign extend a value with the given number of bits. This is a
94 macro because it allows us to overload the type of the value.
95 Note that VALUE must have a signed type! */
96#undef sign_extend
97#define sign_extend(value,num_bits) \
98(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
99 (sizeof(__typeof__(value)) * 8 - (num_bits)))
100
101
102/* Add a statement to the current irsb. */
103static __inline__ void
104stmt(IRStmt *st)
105{
106 addStmtToIRSB(irsb, st);
107}
108
109/* Allocate a new temporary of the given type. */
110static __inline__ IRTemp
111newTemp(IRType type)
112{
113 vassert(isPlausibleIRType(type));
114
115 return newIRTemp(irsb->tyenv, type);
116}
117
118/* Create an expression node for a temporary */
119static __inline__ IRExpr *
120mkexpr(IRTemp tmp)
121{
122 return IRExpr_RdTmp(tmp);
123}
124
florian8844a632012-04-13 04:04:06 +0000125/* Generate an expression node for an address. */
126static __inline__ IRExpr *
127mkaddr_expr(Addr64 addr)
128{
129 return IRExpr_Const(IRConst_U64(addr));
130}
131
sewardj2019a972011-03-07 16:04:07 +0000132/* Add a statement that assigns to a temporary */
133static __inline__ void
134assign(IRTemp dst, IRExpr *expr)
135{
136 stmt(IRStmt_WrTmp(dst, expr));
137}
138
florian8844a632012-04-13 04:04:06 +0000139/* Write an address into the guest_IA */
140static __inline__ void
141put_IA(IRExpr *address)
142{
143 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IA), address));
144}
145
146/* Add a dummy put to the guest_IA to satisfy an assert in bb_to_IR
147 that wants the last statement in an IRSB to be a put to the guest_IA.
148 Mostly used for insns that use the "counter" pseudo guest reg. */
149static __inline__ void
150dummy_put_IA(void)
151{
152 put_IA(IRExpr_Get(S390X_GUEST_OFFSET(guest_IA), Ity_I64));
153}
154
sewardj2019a972011-03-07 16:04:07 +0000155/* Create a temporary of the given type and assign the expression to it */
156static __inline__ IRTemp
157mktemp(IRType type, IRExpr *expr)
158{
159 IRTemp temp = newTemp(type);
160
161 assign(temp, expr);
162
163 return temp;
164}
165
166/* Create a unary expression */
167static __inline__ IRExpr *
168unop(IROp kind, IRExpr *op)
169{
170 return IRExpr_Unop(kind, op);
171}
172
173/* Create a binary expression */
174static __inline__ IRExpr *
175binop(IROp kind, IRExpr *op1, IRExpr *op2)
176{
177 return IRExpr_Binop(kind, op1, op2);
178}
179
180/* Create a ternary expression */
181static __inline__ IRExpr *
182triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
183{
184 return IRExpr_Triop(kind, op1, op2, op3);
185}
186
187/* Create a quaternary expression */
188static __inline__ IRExpr *
189qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
190{
191 return IRExpr_Qop(kind, op1, op2, op3, op4);
192}
193
194/* Create an expression node for an 8-bit integer constant */
195static __inline__ IRExpr *
196mkU8(UInt value)
197{
198 vassert(value < 256);
199
200 return IRExpr_Const(IRConst_U8((UChar)value));
201}
202
203/* Create an expression node for a 16-bit integer constant */
204static __inline__ IRExpr *
205mkU16(UInt value)
206{
207 vassert(value < 65536);
208
209 return IRExpr_Const(IRConst_U16((UShort)value));
210}
211
212/* Create an expression node for a 32-bit integer constant */
213static __inline__ IRExpr *
214mkU32(UInt value)
215{
216 return IRExpr_Const(IRConst_U32(value));
217}
218
219/* Create an expression node for a 64-bit integer constant */
220static __inline__ IRExpr *
221mkU64(ULong value)
222{
223 return IRExpr_Const(IRConst_U64(value));
224}
225
226/* Create an expression node for a 32-bit floating point constant
227 whose value is given by a bit pattern. */
228static __inline__ IRExpr *
229mkF32i(UInt value)
230{
231 return IRExpr_Const(IRConst_F32i(value));
232}
233
234/* Create an expression node for a 32-bit floating point constant
235 whose value is given by a bit pattern. */
236static __inline__ IRExpr *
237mkF64i(ULong value)
238{
239 return IRExpr_Const(IRConst_F64i(value));
240}
241
242/* Little helper function for my sanity. ITE = if-then-else */
243static IRExpr *
244mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
245{
246 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
247
248 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
249}
250
251/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
252static void __inline__
253store(IRExpr *addr, IRExpr *data)
254{
255 stmt(IRStmt_Store(Iend_BE, addr, data));
256}
257
258/* Create an expression that loads a TYPE sized value from ADDR.
259 This is a big-endian machine. */
260static __inline__ IRExpr *
261load(IRType type, IRExpr *addr)
262{
263 return IRExpr_Load(Iend_BE, type, addr);
264}
265
266/* Function call */
267static void
268call_function(IRExpr *callee_address)
269{
florian8844a632012-04-13 04:04:06 +0000270 put_IA(callee_address);
sewardj2019a972011-03-07 16:04:07 +0000271
florian8844a632012-04-13 04:04:06 +0000272 dis_res->whatNext = Dis_StopHere;
273 dis_res->jk_StopHere = Ijk_Call;
sewardj2019a972011-03-07 16:04:07 +0000274}
275
floriana64c2432011-07-16 02:11:50 +0000276/* Function call with known target. */
277static void
278call_function_and_chase(Addr64 callee_address)
279{
280 if (resteer_fn(resteer_data, callee_address)) {
281 dis_res->whatNext = Dis_ResteerU;
282 dis_res->continueAt = callee_address;
283 } else {
florian8844a632012-04-13 04:04:06 +0000284 put_IA(mkaddr_expr(callee_address));
285
floriana64c2432011-07-16 02:11:50 +0000286 dis_res->whatNext = Dis_StopHere;
florian8844a632012-04-13 04:04:06 +0000287 dis_res->jk_StopHere = Ijk_Call;
floriana64c2432011-07-16 02:11:50 +0000288 }
289}
290
sewardj2019a972011-03-07 16:04:07 +0000291/* Function return sequence */
292static void
293return_from_function(IRExpr *return_address)
294{
florian8844a632012-04-13 04:04:06 +0000295 put_IA(return_address);
sewardj2019a972011-03-07 16:04:07 +0000296
florian8844a632012-04-13 04:04:06 +0000297 dis_res->whatNext = Dis_StopHere;
298 dis_res->jk_StopHere = Ijk_Ret;
sewardj2019a972011-03-07 16:04:07 +0000299}
300
301/* A conditional branch whose target is not known at instrumentation time.
302
303 if (condition) goto computed_target;
304
305 Needs to be represented as:
306
307 if (! condition) goto next_instruction;
308 goto computed_target;
309
310 This inversion is being handled at code generation time. So we just
311 take the condition here as is.
312*/
313static void
314if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
315{
316 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
317
florian8844a632012-04-13 04:04:06 +0000318 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr),
319 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +0000320
florian8844a632012-04-13 04:04:06 +0000321 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000322
florian8844a632012-04-13 04:04:06 +0000323 dis_res->whatNext = Dis_StopHere;
324 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000325}
326
327/* A conditional branch whose target is known at instrumentation time. */
328static void
329if_condition_goto(IRExpr *condition, Addr64 target)
330{
331 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
332
florian8844a632012-04-13 04:04:06 +0000333 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target),
334 S390X_GUEST_OFFSET(guest_IA)));
335
florian7346c7a2012-04-13 21:14:24 +0000336 put_IA(mkaddr_expr(guest_IA_next_instr));
florian8844a632012-04-13 04:04:06 +0000337
338 dis_res->whatNext = Dis_StopHere;
339 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000340}
341
342/* An unconditional branch. Target may or may not be known at instrumentation
343 time. */
344static void
345always_goto(IRExpr *target)
346{
florian8844a632012-04-13 04:04:06 +0000347 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000348
florian8844a632012-04-13 04:04:06 +0000349 dis_res->whatNext = Dis_StopHere;
350 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000351}
352
florian8844a632012-04-13 04:04:06 +0000353
floriana64c2432011-07-16 02:11:50 +0000354/* An unconditional branch to a known target. */
355static void
356always_goto_and_chase(Addr64 target)
357{
358 if (resteer_fn(resteer_data, target)) {
florian8844a632012-04-13 04:04:06 +0000359 /* Follow into the target */
floriana64c2432011-07-16 02:11:50 +0000360 dis_res->whatNext = Dis_ResteerU;
361 dis_res->continueAt = target;
362 } else {
florian8844a632012-04-13 04:04:06 +0000363 put_IA(mkaddr_expr(target));
364
365 dis_res->whatNext = Dis_StopHere;
366 dis_res->jk_StopHere = Ijk_Boring;
floriana64c2432011-07-16 02:11:50 +0000367 }
368}
369
sewardj2019a972011-03-07 16:04:07 +0000370/* A system call */
371static void
372system_call(IRExpr *sysno)
373{
374 /* Store the system call number in the pseudo register. */
florian428dfdd2012-03-27 03:09:49 +0000375 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_SYSNO), sysno));
sewardj2019a972011-03-07 16:04:07 +0000376
sewardj69007022011-04-28 20:13:45 +0000377 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
florian428dfdd2012-03-27 03:09:49 +0000378 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IP_AT_SYSCALL),
379 mkU64(guest_IA_curr_instr)));
sewardj2019a972011-03-07 16:04:07 +0000380
florian8844a632012-04-13 04:04:06 +0000381 put_IA(mkaddr_expr(guest_IA_next_instr));
382
sewardj2019a972011-03-07 16:04:07 +0000383 /* It's important that all ArchRegs carry their up-to-date value
384 at this point. So we declare an end-of-block here, which
385 forces any TempRegs caching ArchRegs to be flushed. */
florian8844a632012-04-13 04:04:06 +0000386 dis_res->whatNext = Dis_StopHere;
387 dis_res->jk_StopHere = Ijk_Sys_syscall;
sewardj2019a972011-03-07 16:04:07 +0000388}
389
390/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
391 instructions to VEX's IRRoundingMode. */
392static IRRoundingMode
393encode_rounding_mode(UChar mode)
394{
395 switch (mode) {
396 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
397 case S390_ROUND_ZERO: return Irrm_ZERO;
398 case S390_ROUND_POSINF: return Irrm_PosINF;
399 case S390_ROUND_NEGINF: return Irrm_NegINF;
400 }
401 vpanic("encode_rounding_mode");
402}
403
404static __inline__ IRExpr *get_fpr_dw0(UInt);
405static __inline__ void put_fpr_dw0(UInt, IRExpr *);
406
407/* Read a floating point register pair and combine their contents into a
408 128-bit value */
409static IRExpr *
410get_fpr_pair(UInt archreg)
411{
412 IRExpr *high = get_fpr_dw0(archreg);
413 IRExpr *low = get_fpr_dw0(archreg + 2);
414
415 return binop(Iop_F64HLtoF128, high, low);
416}
417
418/* Write a 128-bit floating point value into a register pair. */
419static void
420put_fpr_pair(UInt archreg, IRExpr *expr)
421{
422 IRExpr *high = unop(Iop_F128HItoF64, expr);
423 IRExpr *low = unop(Iop_F128LOtoF64, expr);
424
425 put_fpr_dw0(archreg, high);
426 put_fpr_dw0(archreg + 2, low);
427}
428
429
sewardj2019a972011-03-07 16:04:07 +0000430/*------------------------------------------------------------*/
431/*--- Build the flags thunk. ---*/
432/*------------------------------------------------------------*/
433
434/* Completely fill the flags thunk. We're always filling all fields.
435 Apparently, that is better for redundant PUT elimination. */
436static void
437s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
438{
439 UInt op_off, dep1_off, dep2_off, ndep_off;
440
florian428dfdd2012-03-27 03:09:49 +0000441 op_off = S390X_GUEST_OFFSET(guest_CC_OP);
442 dep1_off = S390X_GUEST_OFFSET(guest_CC_DEP1);
443 dep2_off = S390X_GUEST_OFFSET(guest_CC_DEP2);
444 ndep_off = S390X_GUEST_OFFSET(guest_CC_NDEP);
sewardj2019a972011-03-07 16:04:07 +0000445
446 stmt(IRStmt_Put(op_off, op));
447 stmt(IRStmt_Put(dep1_off, dep1));
448 stmt(IRStmt_Put(dep2_off, dep2));
449 stmt(IRStmt_Put(ndep_off, ndep));
450}
451
452
453/* Create an expression for V and widen the result to 64 bit. */
454static IRExpr *
455s390_cc_widen(IRTemp v, Bool sign_extend)
456{
457 IRExpr *expr;
458
459 expr = mkexpr(v);
460
461 switch (typeOfIRTemp(irsb->tyenv, v)) {
462 case Ity_I64:
463 break;
464 case Ity_I32:
465 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
466 break;
467 case Ity_I16:
468 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
469 break;
470 case Ity_I8:
471 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
472 break;
473 default:
474 vpanic("s390_cc_widen");
475 }
476
477 return expr;
478}
479
480static void
481s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
482{
483 IRExpr *op, *dep1, *dep2, *ndep;
484
485 op = mkU64(opc);
486 dep1 = s390_cc_widen(d1, sign_extend);
487 dep2 = mkU64(0);
488 ndep = mkU64(0);
489
490 s390_cc_thunk_fill(op, dep1, dep2, ndep);
491}
492
493
494static void
495s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
496{
497 IRExpr *op, *dep1, *dep2, *ndep;
498
499 op = mkU64(opc);
500 dep1 = s390_cc_widen(d1, sign_extend);
501 dep2 = s390_cc_widen(d2, sign_extend);
502 ndep = mkU64(0);
503
504 s390_cc_thunk_fill(op, dep1, dep2, ndep);
505}
506
507
508/* memcheck believes that the NDEP field in the flags thunk is always
509 defined. But for some flag computations (e.g. add with carry) that is
510 just not true. We therefore need to convey to memcheck that the value
511 of the ndep field does matter and therefore we make the DEP2 field
512 depend on it:
513
514 DEP2 = original_DEP2 ^ NDEP
515
516 In s390_calculate_cc we exploit that (a^b)^b == a
517 I.e. we xor the DEP2 value with the NDEP value to recover the
518 original_DEP2 value. */
519static void
520s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
521{
522 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
523
524 op = mkU64(opc);
525 dep1 = s390_cc_widen(d1, sign_extend);
526 dep2 = s390_cc_widen(d2, sign_extend);
527 ndep = s390_cc_widen(nd, sign_extend);
528
529 dep2x = binop(Iop_Xor64, dep2, ndep);
530
531 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
532}
533
534
535/* Write one floating point value into the flags thunk */
536static void
537s390_cc_thunk_put1f(UInt opc, IRTemp d1)
538{
539 IRExpr *op, *dep1, *dep2, *ndep;
540
541 op = mkU64(opc);
542 dep1 = mkexpr(d1);
543 dep2 = mkU64(0);
544 ndep = mkU64(0);
545
546 s390_cc_thunk_fill(op, dep1, dep2, ndep);
547}
548
549
550/* Write a floating point value and an integer into the flags thunk. The
551 integer value is zero-extended first. */
552static void
553s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
554{
555 IRExpr *op, *dep1, *dep2, *ndep;
556
557 op = mkU64(opc);
558 dep1 = mkexpr(d1);
559 dep2 = s390_cc_widen(d2, False);
560 ndep = mkU64(0);
561
562 s390_cc_thunk_fill(op, dep1, dep2, ndep);
563}
564
565
566/* Write a 128-bit floating point value into the flags thunk. This is
567 done by splitting the value into two 64-bits values. */
568static void
569s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
570{
571 IRExpr *op, *hi, *lo, *ndep;
572
573 op = mkU64(opc);
574 hi = unop(Iop_F128HItoF64, mkexpr(d1));
575 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
576 ndep = mkU64(0);
577
578 s390_cc_thunk_fill(op, hi, lo, ndep);
579}
580
581
582/* Write a 128-bit floating point value and an integer into the flags thunk.
583 The integer value is zero-extended first. */
584static void
585s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
586{
587 IRExpr *op, *hi, *lo, *lox, *ndep;
588
589 op = mkU64(opc);
590 hi = unop(Iop_F128HItoF64, mkexpr(d1));
591 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
592 ndep = s390_cc_widen(nd, False);
593
594 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
595
596 s390_cc_thunk_fill(op, hi, lox, ndep);
597}
598
599
600static void
601s390_cc_set(UInt val)
602{
603 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
604 mkU64(val), mkU64(0), mkU64(0));
605}
606
607/* Build IR to calculate the condition code from flags thunk.
608 Returns an expression of type Ity_I32 */
609static IRExpr *
610s390_call_calculate_cc(void)
611{
612 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
613
florian428dfdd2012-03-27 03:09:49 +0000614 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
615 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
616 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
617 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000618
619 args = mkIRExprVec_4(op, dep1, dep2, ndep);
620 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
621 "s390_calculate_cc", &s390_calculate_cc, args);
622
623 /* Exclude OP and NDEP from definedness checking. We're only
624 interested in DEP1 and DEP2. */
625 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
626
627 return call;
628}
629
630/* Build IR to calculate the internal condition code for a "compare and branch"
631 insn. Returns an expression of type Ity_I32 */
632static IRExpr *
florianff9613f2012-05-12 15:26:44 +0000633s390_call_calculate_icc(UInt m, UInt opc, IRTemp op1, IRTemp op2)
sewardj2019a972011-03-07 16:04:07 +0000634{
florianff9613f2012-05-12 15:26:44 +0000635 IRExpr **args, *call, *op, *dep1, *dep2, *mask;
sewardj2019a972011-03-07 16:04:07 +0000636
florianff9613f2012-05-12 15:26:44 +0000637 switch (opc) {
638 case S390_CC_OP_SIGNED_COMPARE:
639 dep1 = s390_cc_widen(op1, True);
640 dep2 = s390_cc_widen(op2, True);
641 break;
642
643 case S390_CC_OP_UNSIGNED_COMPARE:
644 dep1 = s390_cc_widen(op1, False);
645 dep2 = s390_cc_widen(op2, False);
646 break;
647
648 default:
649 vpanic("s390_call_calculate_icc");
650 }
651
652 mask = mkU64(m);
sewardj2019a972011-03-07 16:04:07 +0000653 op = mkU64(opc);
sewardj2019a972011-03-07 16:04:07 +0000654
florianff9613f2012-05-12 15:26:44 +0000655 args = mkIRExprVec_5(mask, op, dep1, dep2, mkU64(0) /* unused */);
sewardj2019a972011-03-07 16:04:07 +0000656 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
florianff9613f2012-05-12 15:26:44 +0000657 "s390_calculate_cond", &s390_calculate_cond, args);
sewardj2019a972011-03-07 16:04:07 +0000658
florianff9613f2012-05-12 15:26:44 +0000659 /* Exclude the requested condition, OP and NDEP from definedness
660 checking. We're only interested in DEP1 and DEP2. */
661 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
sewardj2019a972011-03-07 16:04:07 +0000662
663 return call;
664}
665
666/* Build IR to calculate the condition code from flags thunk.
667 Returns an expression of type Ity_I32 */
668static IRExpr *
669s390_call_calculate_cond(UInt m)
670{
671 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
672
673 mask = mkU64(m);
florian428dfdd2012-03-27 03:09:49 +0000674 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
675 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
676 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
677 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000678
679 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
680 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
681 "s390_calculate_cond", &s390_calculate_cond, args);
682
683 /* Exclude the requested condition, OP and NDEP from definedness
684 checking. We're only interested in DEP1 and DEP2. */
685 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
686
687 return call;
688}
689
690#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
691#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
692#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
693#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
694#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
695#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
696#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
697 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
698#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
699 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
sewardj2019a972011-03-07 16:04:07 +0000700
701
sewardj2019a972011-03-07 16:04:07 +0000702
703
704/*------------------------------------------------------------*/
705/*--- Guest register access ---*/
706/*------------------------------------------------------------*/
707
708
709/*------------------------------------------------------------*/
710/*--- ar registers ---*/
711/*------------------------------------------------------------*/
712
713/* Return the guest state offset of a ar register. */
714static UInt
715ar_offset(UInt archreg)
716{
717 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000718 S390X_GUEST_OFFSET(guest_a0),
719 S390X_GUEST_OFFSET(guest_a1),
720 S390X_GUEST_OFFSET(guest_a2),
721 S390X_GUEST_OFFSET(guest_a3),
722 S390X_GUEST_OFFSET(guest_a4),
723 S390X_GUEST_OFFSET(guest_a5),
724 S390X_GUEST_OFFSET(guest_a6),
725 S390X_GUEST_OFFSET(guest_a7),
726 S390X_GUEST_OFFSET(guest_a8),
727 S390X_GUEST_OFFSET(guest_a9),
728 S390X_GUEST_OFFSET(guest_a10),
729 S390X_GUEST_OFFSET(guest_a11),
730 S390X_GUEST_OFFSET(guest_a12),
731 S390X_GUEST_OFFSET(guest_a13),
732 S390X_GUEST_OFFSET(guest_a14),
733 S390X_GUEST_OFFSET(guest_a15),
sewardj2019a972011-03-07 16:04:07 +0000734 };
735
736 vassert(archreg < 16);
737
738 return offset[archreg];
739}
740
741
742/* Return the guest state offset of word #0 of a ar register. */
743static __inline__ UInt
744ar_w0_offset(UInt archreg)
745{
746 return ar_offset(archreg) + 0;
747}
748
749/* Write word #0 of a ar to the guest state. */
750static __inline__ void
751put_ar_w0(UInt archreg, IRExpr *expr)
752{
753 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
754
755 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
756}
757
758/* Read word #0 of a ar register. */
759static __inline__ IRExpr *
760get_ar_w0(UInt archreg)
761{
762 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
763}
764
765
766/*------------------------------------------------------------*/
767/*--- fpr registers ---*/
768/*------------------------------------------------------------*/
769
770/* Return the guest state offset of a fpr register. */
771static UInt
772fpr_offset(UInt archreg)
773{
774 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000775 S390X_GUEST_OFFSET(guest_f0),
776 S390X_GUEST_OFFSET(guest_f1),
777 S390X_GUEST_OFFSET(guest_f2),
778 S390X_GUEST_OFFSET(guest_f3),
779 S390X_GUEST_OFFSET(guest_f4),
780 S390X_GUEST_OFFSET(guest_f5),
781 S390X_GUEST_OFFSET(guest_f6),
782 S390X_GUEST_OFFSET(guest_f7),
783 S390X_GUEST_OFFSET(guest_f8),
784 S390X_GUEST_OFFSET(guest_f9),
785 S390X_GUEST_OFFSET(guest_f10),
786 S390X_GUEST_OFFSET(guest_f11),
787 S390X_GUEST_OFFSET(guest_f12),
788 S390X_GUEST_OFFSET(guest_f13),
789 S390X_GUEST_OFFSET(guest_f14),
790 S390X_GUEST_OFFSET(guest_f15),
sewardj2019a972011-03-07 16:04:07 +0000791 };
792
793 vassert(archreg < 16);
794
795 return offset[archreg];
796}
797
798
799/* Return the guest state offset of word #0 of a fpr register. */
800static __inline__ UInt
801fpr_w0_offset(UInt archreg)
802{
803 return fpr_offset(archreg) + 0;
804}
805
806/* Write word #0 of a fpr to the guest state. */
807static __inline__ void
808put_fpr_w0(UInt archreg, IRExpr *expr)
809{
810 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
811
812 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
813}
814
815/* Read word #0 of a fpr register. */
816static __inline__ IRExpr *
817get_fpr_w0(UInt archreg)
818{
819 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
820}
821
822/* Return the guest state offset of double word #0 of a fpr register. */
823static __inline__ UInt
824fpr_dw0_offset(UInt archreg)
825{
826 return fpr_offset(archreg) + 0;
827}
828
829/* Write double word #0 of a fpr to the guest state. */
830static __inline__ void
831put_fpr_dw0(UInt archreg, IRExpr *expr)
832{
833 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
834
835 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
836}
837
838/* Read double word #0 of a fpr register. */
839static __inline__ IRExpr *
840get_fpr_dw0(UInt archreg)
841{
842 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
843}
844
845
846/*------------------------------------------------------------*/
847/*--- gpr registers ---*/
848/*------------------------------------------------------------*/
849
850/* Return the guest state offset of a gpr register. */
851static UInt
852gpr_offset(UInt archreg)
853{
854 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000855 S390X_GUEST_OFFSET(guest_r0),
856 S390X_GUEST_OFFSET(guest_r1),
857 S390X_GUEST_OFFSET(guest_r2),
858 S390X_GUEST_OFFSET(guest_r3),
859 S390X_GUEST_OFFSET(guest_r4),
860 S390X_GUEST_OFFSET(guest_r5),
861 S390X_GUEST_OFFSET(guest_r6),
862 S390X_GUEST_OFFSET(guest_r7),
863 S390X_GUEST_OFFSET(guest_r8),
864 S390X_GUEST_OFFSET(guest_r9),
865 S390X_GUEST_OFFSET(guest_r10),
866 S390X_GUEST_OFFSET(guest_r11),
867 S390X_GUEST_OFFSET(guest_r12),
868 S390X_GUEST_OFFSET(guest_r13),
869 S390X_GUEST_OFFSET(guest_r14),
870 S390X_GUEST_OFFSET(guest_r15),
sewardj2019a972011-03-07 16:04:07 +0000871 };
872
873 vassert(archreg < 16);
874
875 return offset[archreg];
876}
877
878
879/* Return the guest state offset of word #0 of a gpr register. */
880static __inline__ UInt
881gpr_w0_offset(UInt archreg)
882{
883 return gpr_offset(archreg) + 0;
884}
885
886/* Write word #0 of a gpr to the guest state. */
887static __inline__ void
888put_gpr_w0(UInt archreg, IRExpr *expr)
889{
890 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
891
892 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
893}
894
895/* Read word #0 of a gpr register. */
896static __inline__ IRExpr *
897get_gpr_w0(UInt archreg)
898{
899 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
900}
901
902/* Return the guest state offset of double word #0 of a gpr register. */
903static __inline__ UInt
904gpr_dw0_offset(UInt archreg)
905{
906 return gpr_offset(archreg) + 0;
907}
908
909/* Write double word #0 of a gpr to the guest state. */
910static __inline__ void
911put_gpr_dw0(UInt archreg, IRExpr *expr)
912{
913 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
914
915 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
916}
917
918/* Read double word #0 of a gpr register. */
919static __inline__ IRExpr *
920get_gpr_dw0(UInt archreg)
921{
922 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
923}
924
925/* Return the guest state offset of half word #1 of a gpr register. */
926static __inline__ UInt
927gpr_hw1_offset(UInt archreg)
928{
929 return gpr_offset(archreg) + 2;
930}
931
932/* Write half word #1 of a gpr to the guest state. */
933static __inline__ void
934put_gpr_hw1(UInt archreg, IRExpr *expr)
935{
936 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
937
938 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
939}
940
941/* Read half word #1 of a gpr register. */
942static __inline__ IRExpr *
943get_gpr_hw1(UInt archreg)
944{
945 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
946}
947
948/* Return the guest state offset of byte #6 of a gpr register. */
949static __inline__ UInt
950gpr_b6_offset(UInt archreg)
951{
952 return gpr_offset(archreg) + 6;
953}
954
955/* Write byte #6 of a gpr to the guest state. */
956static __inline__ void
957put_gpr_b6(UInt archreg, IRExpr *expr)
958{
959 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
960
961 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
962}
963
964/* Read byte #6 of a gpr register. */
965static __inline__ IRExpr *
966get_gpr_b6(UInt archreg)
967{
968 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
969}
970
971/* Return the guest state offset of byte #3 of a gpr register. */
972static __inline__ UInt
973gpr_b3_offset(UInt archreg)
974{
975 return gpr_offset(archreg) + 3;
976}
977
978/* Write byte #3 of a gpr to the guest state. */
979static __inline__ void
980put_gpr_b3(UInt archreg, IRExpr *expr)
981{
982 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
983
984 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
985}
986
987/* Read byte #3 of a gpr register. */
988static __inline__ IRExpr *
989get_gpr_b3(UInt archreg)
990{
991 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
992}
993
994/* Return the guest state offset of byte #0 of a gpr register. */
995static __inline__ UInt
996gpr_b0_offset(UInt archreg)
997{
998 return gpr_offset(archreg) + 0;
999}
1000
1001/* Write byte #0 of a gpr to the guest state. */
1002static __inline__ void
1003put_gpr_b0(UInt archreg, IRExpr *expr)
1004{
1005 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1006
1007 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
1008}
1009
1010/* Read byte #0 of a gpr register. */
1011static __inline__ IRExpr *
1012get_gpr_b0(UInt archreg)
1013{
1014 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
1015}
1016
1017/* Return the guest state offset of word #1 of a gpr register. */
1018static __inline__ UInt
1019gpr_w1_offset(UInt archreg)
1020{
1021 return gpr_offset(archreg) + 4;
1022}
1023
1024/* Write word #1 of a gpr to the guest state. */
1025static __inline__ void
1026put_gpr_w1(UInt archreg, IRExpr *expr)
1027{
1028 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1029
1030 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
1031}
1032
1033/* Read word #1 of a gpr register. */
1034static __inline__ IRExpr *
1035get_gpr_w1(UInt archreg)
1036{
1037 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
1038}
1039
1040/* Return the guest state offset of half word #3 of a gpr register. */
1041static __inline__ UInt
1042gpr_hw3_offset(UInt archreg)
1043{
1044 return gpr_offset(archreg) + 6;
1045}
1046
1047/* Write half word #3 of a gpr to the guest state. */
1048static __inline__ void
1049put_gpr_hw3(UInt archreg, IRExpr *expr)
1050{
1051 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1052
1053 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
1054}
1055
1056/* Read half word #3 of a gpr register. */
1057static __inline__ IRExpr *
1058get_gpr_hw3(UInt archreg)
1059{
1060 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
1061}
1062
1063/* Return the guest state offset of byte #7 of a gpr register. */
1064static __inline__ UInt
1065gpr_b7_offset(UInt archreg)
1066{
1067 return gpr_offset(archreg) + 7;
1068}
1069
1070/* Write byte #7 of a gpr to the guest state. */
1071static __inline__ void
1072put_gpr_b7(UInt archreg, IRExpr *expr)
1073{
1074 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1075
1076 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1077}
1078
1079/* Read byte #7 of a gpr register. */
1080static __inline__ IRExpr *
1081get_gpr_b7(UInt archreg)
1082{
1083 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1084}
1085
1086/* Return the guest state offset of half word #0 of a gpr register. */
1087static __inline__ UInt
1088gpr_hw0_offset(UInt archreg)
1089{
1090 return gpr_offset(archreg) + 0;
1091}
1092
1093/* Write half word #0 of a gpr to the guest state. */
1094static __inline__ void
1095put_gpr_hw0(UInt archreg, IRExpr *expr)
1096{
1097 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1098
1099 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1100}
1101
1102/* Read half word #0 of a gpr register. */
1103static __inline__ IRExpr *
1104get_gpr_hw0(UInt archreg)
1105{
1106 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1107}
1108
1109/* Return the guest state offset of byte #4 of a gpr register. */
1110static __inline__ UInt
1111gpr_b4_offset(UInt archreg)
1112{
1113 return gpr_offset(archreg) + 4;
1114}
1115
1116/* Write byte #4 of a gpr to the guest state. */
1117static __inline__ void
1118put_gpr_b4(UInt archreg, IRExpr *expr)
1119{
1120 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1121
1122 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1123}
1124
1125/* Read byte #4 of a gpr register. */
1126static __inline__ IRExpr *
1127get_gpr_b4(UInt archreg)
1128{
1129 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1130}
1131
1132/* Return the guest state offset of byte #1 of a gpr register. */
1133static __inline__ UInt
1134gpr_b1_offset(UInt archreg)
1135{
1136 return gpr_offset(archreg) + 1;
1137}
1138
1139/* Write byte #1 of a gpr to the guest state. */
1140static __inline__ void
1141put_gpr_b1(UInt archreg, IRExpr *expr)
1142{
1143 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1144
1145 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1146}
1147
1148/* Read byte #1 of a gpr register. */
1149static __inline__ IRExpr *
1150get_gpr_b1(UInt archreg)
1151{
1152 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1153}
1154
1155/* Return the guest state offset of half word #2 of a gpr register. */
1156static __inline__ UInt
1157gpr_hw2_offset(UInt archreg)
1158{
1159 return gpr_offset(archreg) + 4;
1160}
1161
1162/* Write half word #2 of a gpr to the guest state. */
1163static __inline__ void
1164put_gpr_hw2(UInt archreg, IRExpr *expr)
1165{
1166 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1167
1168 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1169}
1170
1171/* Read half word #2 of a gpr register. */
1172static __inline__ IRExpr *
1173get_gpr_hw2(UInt archreg)
1174{
1175 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1176}
1177
1178/* Return the guest state offset of byte #5 of a gpr register. */
1179static __inline__ UInt
1180gpr_b5_offset(UInt archreg)
1181{
1182 return gpr_offset(archreg) + 5;
1183}
1184
1185/* Write byte #5 of a gpr to the guest state. */
1186static __inline__ void
1187put_gpr_b5(UInt archreg, IRExpr *expr)
1188{
1189 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1190
1191 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1192}
1193
1194/* Read byte #5 of a gpr register. */
1195static __inline__ IRExpr *
1196get_gpr_b5(UInt archreg)
1197{
1198 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1199}
1200
1201/* Return the guest state offset of byte #2 of a gpr register. */
1202static __inline__ UInt
1203gpr_b2_offset(UInt archreg)
1204{
1205 return gpr_offset(archreg) + 2;
1206}
1207
1208/* Write byte #2 of a gpr to the guest state. */
1209static __inline__ void
1210put_gpr_b2(UInt archreg, IRExpr *expr)
1211{
1212 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1213
1214 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1215}
1216
1217/* Read byte #2 of a gpr register. */
1218static __inline__ IRExpr *
1219get_gpr_b2(UInt archreg)
1220{
1221 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1222}
1223
1224/* Return the guest state offset of the counter register. */
1225static UInt
1226counter_offset(void)
1227{
floriane88b3c92011-07-05 02:48:39 +00001228 return S390X_GUEST_OFFSET(guest_counter);
sewardj2019a972011-03-07 16:04:07 +00001229}
1230
1231/* Return the guest state offset of double word #0 of the counter register. */
1232static __inline__ UInt
1233counter_dw0_offset(void)
1234{
1235 return counter_offset() + 0;
1236}
1237
1238/* Write double word #0 of the counter to the guest state. */
1239static __inline__ void
1240put_counter_dw0(IRExpr *expr)
1241{
1242 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1243
1244 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1245}
1246
1247/* Read double word #0 of the counter register. */
1248static __inline__ IRExpr *
1249get_counter_dw0(void)
1250{
1251 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1252}
1253
1254/* Return the guest state offset of word #0 of the counter register. */
1255static __inline__ UInt
1256counter_w0_offset(void)
1257{
1258 return counter_offset() + 0;
1259}
1260
1261/* Return the guest state offset of word #1 of the counter register. */
1262static __inline__ UInt
1263counter_w1_offset(void)
1264{
1265 return counter_offset() + 4;
1266}
1267
1268/* Write word #0 of the counter to the guest state. */
1269static __inline__ void
1270put_counter_w0(IRExpr *expr)
1271{
1272 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1273
1274 stmt(IRStmt_Put(counter_w0_offset(), expr));
1275}
1276
1277/* Read word #0 of the counter register. */
1278static __inline__ IRExpr *
1279get_counter_w0(void)
1280{
1281 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1282}
1283
1284/* Write word #1 of the counter to the guest state. */
1285static __inline__ void
1286put_counter_w1(IRExpr *expr)
1287{
1288 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1289
1290 stmt(IRStmt_Put(counter_w1_offset(), expr));
1291}
1292
1293/* Read word #1 of the counter register. */
1294static __inline__ IRExpr *
1295get_counter_w1(void)
1296{
1297 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1298}
1299
1300/* Return the guest state offset of the fpc register. */
1301static UInt
1302fpc_offset(void)
1303{
floriane88b3c92011-07-05 02:48:39 +00001304 return S390X_GUEST_OFFSET(guest_fpc);
sewardj2019a972011-03-07 16:04:07 +00001305}
1306
1307/* Return the guest state offset of word #0 of the fpc register. */
1308static __inline__ UInt
1309fpc_w0_offset(void)
1310{
1311 return fpc_offset() + 0;
1312}
1313
1314/* Write word #0 of the fpc to the guest state. */
1315static __inline__ void
1316put_fpc_w0(IRExpr *expr)
1317{
1318 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1319
1320 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1321}
1322
1323/* Read word #0 of the fpc register. */
1324static __inline__ IRExpr *
1325get_fpc_w0(void)
1326{
1327 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1328}
1329
1330
1331/*------------------------------------------------------------*/
1332/*--- Build IR for formats ---*/
1333/*------------------------------------------------------------*/
1334static void
1335s390_format_I(HChar *(*irgen)(UChar i),
1336 UChar i)
1337{
1338 HChar *mnm = irgen(i);
1339
sewardj7ee97522011-05-09 21:45:04 +00001340 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001341 s390_disasm(ENC2(MNM, UINT), mnm, i);
1342}
1343
1344static void
1345s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1346 UChar r1, UShort i2)
1347{
1348 irgen(r1, i2);
1349}
1350
1351static void
1352s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1353 UChar r1, UShort i2)
1354{
1355 HChar *mnm = irgen(r1, i2);
1356
sewardj7ee97522011-05-09 21:45:04 +00001357 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001358 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1359}
1360
1361static void
1362s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1363 UChar r1, UShort i2)
1364{
1365 HChar *mnm = irgen(r1, i2);
1366
sewardj7ee97522011-05-09 21:45:04 +00001367 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001368 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1369}
1370
1371static void
1372s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1373 UChar r1, UShort i2)
1374{
1375 HChar *mnm = irgen(r1, i2);
1376
sewardj7ee97522011-05-09 21:45:04 +00001377 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001378 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1379}
1380
1381static void
1382s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1383 UChar r1, UChar r3, UShort i2)
1384{
1385 HChar *mnm = irgen(r1, r3, i2);
1386
sewardj7ee97522011-05-09 21:45:04 +00001387 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001388 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1389}
1390
1391static void
1392s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1393 UChar r1, UChar r3, UShort i2)
1394{
1395 HChar *mnm = irgen(r1, r3, i2);
1396
sewardj7ee97522011-05-09 21:45:04 +00001397 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001398 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1399}
1400
1401static void
1402s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1403 UChar i5),
1404 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1405{
1406 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1407
sewardj7ee97522011-05-09 21:45:04 +00001408 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001409 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1410 i5);
1411}
1412
1413static void
1414s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1415 UChar r1, UChar r2, UShort i4, UChar m3)
1416{
1417 HChar *mnm = irgen(r1, r2, i4, m3);
1418
sewardj7ee97522011-05-09 21:45:04 +00001419 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001420 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1421 r2, m3, (Int)(Short)i4);
1422}
1423
1424static void
1425s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1426 UChar r1, UChar m3, UShort i4, UChar i2)
1427{
1428 HChar *mnm = irgen(r1, m3, i4, i2);
1429
sewardj7ee97522011-05-09 21:45:04 +00001430 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001431 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1432 r1, i2, m3, (Int)(Short)i4);
1433}
1434
1435static void
1436s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1437 UChar r1, UChar m3, UShort i4, UChar i2)
1438{
1439 HChar *mnm = irgen(r1, m3, i4, i2);
1440
sewardj7ee97522011-05-09 21:45:04 +00001441 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001442 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1443 (Int)(Char)i2, m3, (Int)(Short)i4);
1444}
1445
1446static void
1447s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1448 UChar r1, UInt i2)
1449{
1450 irgen(r1, i2);
1451}
1452
1453static void
1454s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1455 UChar r1, UInt i2)
1456{
1457 HChar *mnm = irgen(r1, i2);
1458
sewardj7ee97522011-05-09 21:45:04 +00001459 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001460 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1461}
1462
1463static void
1464s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1465 UChar r1, UInt i2)
1466{
1467 HChar *mnm = irgen(r1, i2);
1468
sewardj7ee97522011-05-09 21:45:04 +00001469 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001470 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1471}
1472
1473static void
1474s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1475 UChar r1, UInt i2)
1476{
1477 HChar *mnm = irgen(r1, i2);
1478
sewardj7ee97522011-05-09 21:45:04 +00001479 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001480 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1481}
1482
1483static void
1484s390_format_RIL_UP(HChar *(*irgen)(void),
1485 UChar r1, UInt i2)
1486{
1487 HChar *mnm = irgen();
1488
sewardj7ee97522011-05-09 21:45:04 +00001489 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001490 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1491}
1492
1493static void
1494s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1495 IRTemp op4addr),
1496 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1497{
1498 HChar *mnm;
1499 IRTemp op4addr = newTemp(Ity_I64);
1500
1501 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1502 mkU64(0)));
1503
1504 mnm = irgen(r1, m3, i2, op4addr);
1505
sewardj7ee97522011-05-09 21:45:04 +00001506 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001507 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1508 (Int)(Char)i2, m3, d4, 0, b4);
1509}
1510
1511static void
1512s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1513 IRTemp op4addr),
1514 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1515{
1516 HChar *mnm;
1517 IRTemp op4addr = newTemp(Ity_I64);
1518
1519 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1520 mkU64(0)));
1521
1522 mnm = irgen(r1, m3, i2, op4addr);
1523
sewardj7ee97522011-05-09 21:45:04 +00001524 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001525 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1526 i2, m3, d4, 0, b4);
1527}
1528
1529static void
1530s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1531 UChar r1, UChar r2)
1532{
1533 irgen(r1, r2);
1534}
1535
1536static void
1537s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1538 UChar r1, UChar r2)
1539{
1540 HChar *mnm = irgen(r1, r2);
1541
sewardj7ee97522011-05-09 21:45:04 +00001542 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001543 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1544}
1545
1546static void
1547s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1548 UChar r1, UChar r2)
1549{
1550 HChar *mnm = irgen(r1, r2);
1551
sewardj7ee97522011-05-09 21:45:04 +00001552 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001553 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1554}
1555
1556static void
1557s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1558 UChar r1, UChar r2)
1559{
1560 irgen(r1, r2);
1561}
1562
1563static void
1564s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1565 UChar r1, UChar r2)
1566{
1567 HChar *mnm = irgen(r1, r2);
1568
sewardj7ee97522011-05-09 21:45:04 +00001569 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001570 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1571}
1572
1573static void
1574s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1575 UChar r1, UChar r2)
1576{
1577 HChar *mnm = irgen(r1, r2);
1578
sewardj7ee97522011-05-09 21:45:04 +00001579 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001580 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1581}
1582
1583static void
1584s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1585 UChar r1, UChar r2)
1586{
1587 HChar *mnm = irgen(r1, r2);
1588
sewardj7ee97522011-05-09 21:45:04 +00001589 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001590 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1591}
1592
1593static void
1594s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1595 UChar r1, UChar r2)
1596{
1597 HChar *mnm = irgen(r1, r2);
1598
sewardj7ee97522011-05-09 21:45:04 +00001599 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001600 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1601}
1602
1603static void
1604s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1605 UChar r1)
1606{
1607 HChar *mnm = irgen(r1);
1608
sewardj7ee97522011-05-09 21:45:04 +00001609 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001610 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1611}
1612
1613static void
1614s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1615 UChar r1)
1616{
1617 HChar *mnm = irgen(r1);
1618
sewardj7ee97522011-05-09 21:45:04 +00001619 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001620 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1621}
1622
1623static void
florian9af37692012-01-15 21:01:16 +00001624s390_format_RRF_M0RERE(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1625 UChar m3, UChar r1, UChar r2)
1626{
1627 irgen(m3, r1, r2);
1628
1629 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
1630 s390_disasm(ENC3(MNM, GPR, GPR), m3, r1, r2);
1631}
1632
1633static void
sewardj2019a972011-03-07 16:04:07 +00001634s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1635 UChar r1, UChar r3, UChar r2)
1636{
1637 HChar *mnm = irgen(r1, r3, r2);
1638
sewardj7ee97522011-05-09 21:45:04 +00001639 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001640 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1641}
1642
1643static void
sewardjd7bde722011-04-05 13:19:33 +00001644s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1645 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1646{
1647 irgen(m3, r1, r2);
1648
sewardj7ee97522011-05-09 21:45:04 +00001649 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001650 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1651}
1652
1653static void
sewardj2019a972011-03-07 16:04:07 +00001654s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1655 UChar r3, UChar r1, UChar r2)
1656{
1657 HChar *mnm = irgen(r3, r1, r2);
1658
sewardj7ee97522011-05-09 21:45:04 +00001659 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001660 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1661}
1662
1663static void
1664s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1665 UChar r3, UChar r1, UChar r2)
1666{
1667 HChar *mnm = irgen(r3, r1, r2);
1668
sewardj7ee97522011-05-09 21:45:04 +00001669 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001670 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1671}
1672
1673static void
1674s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1675 UChar r3, UChar r1, UChar r2)
1676{
1677 HChar *mnm = irgen(r3, r1, r2);
1678
sewardj7ee97522011-05-09 21:45:04 +00001679 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001680 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1681}
1682
1683static void
1684s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1685 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1686{
1687 HChar *mnm;
1688 IRTemp op4addr = newTemp(Ity_I64);
1689
1690 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1691 mkU64(0)));
1692
1693 mnm = irgen(r1, r2, m3, op4addr);
1694
sewardj7ee97522011-05-09 21:45:04 +00001695 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001696 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1697 r2, m3, d4, 0, b4);
1698}
1699
1700static void
1701s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1702 UChar r1, UChar b2, UShort d2)
1703{
1704 HChar *mnm;
1705 IRTemp op2addr = newTemp(Ity_I64);
1706
1707 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1708 mkU64(0)));
1709
1710 mnm = irgen(r1, op2addr);
1711
sewardj7ee97522011-05-09 21:45:04 +00001712 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001713 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1714}
1715
1716static void
1717s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1718 UChar r1, UChar r3, UChar b2, UShort d2)
1719{
1720 HChar *mnm;
1721 IRTemp op2addr = newTemp(Ity_I64);
1722
1723 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1724 mkU64(0)));
1725
1726 mnm = irgen(r1, r3, op2addr);
1727
sewardj7ee97522011-05-09 21:45:04 +00001728 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001729 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1730}
1731
1732static void
1733s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1734 UChar r1, UChar r3, UChar b2, UShort d2)
1735{
1736 HChar *mnm;
1737 IRTemp op2addr = newTemp(Ity_I64);
1738
1739 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1740 mkU64(0)));
1741
1742 mnm = irgen(r1, r3, op2addr);
1743
sewardj7ee97522011-05-09 21:45:04 +00001744 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001745 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1746}
1747
1748static void
1749s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1750 UChar r1, UChar r3, UChar b2, UShort d2)
1751{
1752 HChar *mnm;
1753 IRTemp op2addr = newTemp(Ity_I64);
1754
1755 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1756 mkU64(0)));
1757
1758 mnm = irgen(r1, r3, op2addr);
1759
sewardj7ee97522011-05-09 21:45:04 +00001760 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001761 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1762}
1763
1764static void
1765s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1766 UChar r1, UChar r3, UShort i2)
1767{
1768 HChar *mnm = irgen(r1, r3, i2);
1769
sewardj7ee97522011-05-09 21:45:04 +00001770 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001771 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1772}
1773
1774static void
1775s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1776 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1777{
1778 HChar *mnm;
1779 IRTemp op2addr = newTemp(Ity_I64);
1780 IRTemp d2 = newTemp(Ity_I64);
1781
1782 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1783 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1784 mkU64(0)));
1785
1786 mnm = irgen(r1, r3, op2addr);
1787
sewardj7ee97522011-05-09 21:45:04 +00001788 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001789 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1790}
1791
1792static void
1793s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1794 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1795{
1796 HChar *mnm;
1797 IRTemp op2addr = newTemp(Ity_I64);
1798 IRTemp d2 = newTemp(Ity_I64);
1799
1800 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1801 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1802 mkU64(0)));
1803
1804 mnm = irgen(r1, r3, op2addr);
1805
sewardj7ee97522011-05-09 21:45:04 +00001806 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001807 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1808}
1809
1810static void
1811s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1812 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1813{
1814 HChar *mnm;
1815 IRTemp op2addr = newTemp(Ity_I64);
1816 IRTemp d2 = newTemp(Ity_I64);
1817
1818 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1819 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1820 mkU64(0)));
1821
1822 mnm = irgen(r1, r3, op2addr);
1823
sewardj7ee97522011-05-09 21:45:04 +00001824 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001825 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1826}
1827
1828static void
sewardjd7bde722011-04-05 13:19:33 +00001829s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1830 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1831 Int xmnm_kind)
1832{
1833 IRTemp op2addr = newTemp(Ity_I64);
1834 IRTemp d2 = newTemp(Ity_I64);
1835
1836 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1837 guest_IA_next_instr);
1838 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1839 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1840 mkU64(0)));
1841
1842 irgen(r1, op2addr);
florianf9e1ed72012-04-17 02:41:56 +00001843 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00001844
sewardj7ee97522011-05-09 21:45:04 +00001845 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001846 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1847}
1848
1849static void
sewardj2019a972011-03-07 16:04:07 +00001850s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1851 IRTemp op2addr),
1852 UChar r1, UChar x2, UChar b2, UShort d2)
1853{
1854 IRTemp op2addr = newTemp(Ity_I64);
1855
1856 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1857 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1858 mkU64(0)));
1859
1860 irgen(r1, x2, b2, d2, op2addr);
1861}
1862
1863static void
1864s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1865 UChar r1, UChar x2, UChar b2, UShort d2)
1866{
1867 HChar *mnm;
1868 IRTemp op2addr = newTemp(Ity_I64);
1869
1870 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1871 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1872 mkU64(0)));
1873
1874 mnm = irgen(r1, op2addr);
1875
sewardj7ee97522011-05-09 21:45:04 +00001876 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001877 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1878}
1879
1880static void
1881s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1882 UChar r1, UChar x2, UChar b2, UShort d2)
1883{
1884 HChar *mnm;
1885 IRTemp op2addr = newTemp(Ity_I64);
1886
1887 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1888 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1889 mkU64(0)));
1890
1891 mnm = irgen(r1, op2addr);
1892
sewardj7ee97522011-05-09 21:45:04 +00001893 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001894 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1895}
1896
1897static void
1898s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1899 UChar r1, UChar x2, UChar b2, UShort d2)
1900{
1901 HChar *mnm;
1902 IRTemp op2addr = newTemp(Ity_I64);
1903
1904 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1905 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1906 mkU64(0)));
1907
1908 mnm = irgen(r1, op2addr);
1909
sewardj7ee97522011-05-09 21:45:04 +00001910 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001911 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1912}
1913
1914static void
1915s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1916 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1917{
1918 HChar *mnm;
1919 IRTemp op2addr = newTemp(Ity_I64);
1920
1921 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1922 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1923 mkU64(0)));
1924
1925 mnm = irgen(r3, op2addr, r1);
1926
sewardj7ee97522011-05-09 21:45:04 +00001927 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001928 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1929}
1930
1931static void
1932s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1933 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1934{
1935 HChar *mnm;
1936 IRTemp op2addr = newTemp(Ity_I64);
1937 IRTemp d2 = newTemp(Ity_I64);
1938
1939 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1940 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1941 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1942 mkU64(0)));
1943
1944 mnm = irgen(r1, op2addr);
1945
sewardj7ee97522011-05-09 21:45:04 +00001946 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001947 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1948}
1949
1950static void
1951s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1952 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1953{
1954 HChar *mnm;
1955 IRTemp op2addr = newTemp(Ity_I64);
1956 IRTemp d2 = newTemp(Ity_I64);
1957
1958 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1959 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1960 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1961 mkU64(0)));
1962
1963 mnm = irgen(r1, op2addr);
1964
sewardj7ee97522011-05-09 21:45:04 +00001965 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001966 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1967}
1968
1969static void
1970s390_format_RXY_URRD(HChar *(*irgen)(void),
1971 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1972{
1973 HChar *mnm;
1974 IRTemp op2addr = newTemp(Ity_I64);
1975 IRTemp d2 = newTemp(Ity_I64);
1976
1977 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1978 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1979 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1980 mkU64(0)));
1981
1982 mnm = irgen();
1983
sewardj7ee97522011-05-09 21:45:04 +00001984 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001985 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1986}
1987
1988static void
1989s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1990 UChar b2, UShort d2)
1991{
1992 HChar *mnm;
1993 IRTemp op2addr = newTemp(Ity_I64);
1994
1995 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1996 mkU64(0)));
1997
1998 mnm = irgen(op2addr);
1999
sewardj7ee97522011-05-09 21:45:04 +00002000 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002001 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
2002}
2003
2004static void
2005s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2006 UChar i2, UChar b1, UShort d1)
2007{
2008 HChar *mnm;
2009 IRTemp op1addr = newTemp(Ity_I64);
2010
2011 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2012 mkU64(0)));
2013
2014 mnm = irgen(i2, op1addr);
2015
sewardj7ee97522011-05-09 21:45:04 +00002016 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002017 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2018}
2019
2020static void
2021s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2022 UChar i2, UChar b1, UShort dl1, UChar dh1)
2023{
2024 HChar *mnm;
2025 IRTemp op1addr = newTemp(Ity_I64);
2026 IRTemp d1 = newTemp(Ity_I64);
2027
2028 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2029 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2030 mkU64(0)));
2031
2032 mnm = irgen(i2, op1addr);
2033
sewardj7ee97522011-05-09 21:45:04 +00002034 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002035 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
2036}
2037
2038static void
2039s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2040 UChar i2, UChar b1, UShort dl1, UChar dh1)
2041{
2042 HChar *mnm;
2043 IRTemp op1addr = newTemp(Ity_I64);
2044 IRTemp d1 = newTemp(Ity_I64);
2045
2046 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2047 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2048 mkU64(0)));
2049
2050 mnm = irgen(i2, op1addr);
2051
sewardj7ee97522011-05-09 21:45:04 +00002052 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002053 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
2054}
2055
2056static void
2057s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
2058 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
2059{
2060 HChar *mnm;
2061 IRTemp op1addr = newTemp(Ity_I64);
2062 IRTemp op2addr = newTemp(Ity_I64);
2063
2064 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2065 mkU64(0)));
2066 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
2067 mkU64(0)));
2068
2069 mnm = irgen(l, op1addr, op2addr);
2070
sewardj7ee97522011-05-09 21:45:04 +00002071 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002072 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
2073}
2074
2075static void
2076s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2077 UChar b1, UShort d1, UShort i2)
2078{
2079 HChar *mnm;
2080 IRTemp op1addr = newTemp(Ity_I64);
2081
2082 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2083 mkU64(0)));
2084
2085 mnm = irgen(i2, op1addr);
2086
sewardj7ee97522011-05-09 21:45:04 +00002087 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002088 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2089}
2090
2091static void
2092s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2093 UChar b1, UShort d1, UShort i2)
2094{
2095 HChar *mnm;
2096 IRTemp op1addr = newTemp(Ity_I64);
2097
2098 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2099 mkU64(0)));
2100
2101 mnm = irgen(i2, op1addr);
2102
sewardj7ee97522011-05-09 21:45:04 +00002103 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002104 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2105}
2106
2107
2108
2109/*------------------------------------------------------------*/
2110/*--- Build IR for opcodes ---*/
2111/*------------------------------------------------------------*/
2112
2113static HChar *
florian30e89012011-08-08 18:22:58 +00002114s390_irgen_00(UChar r1 __attribute__((unused)),
2115 UChar r2 __attribute__((unused)))
2116{
2117 IRDirty *d;
2118
2119 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00,
2120 mkIRExprVec_0());
2121 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
2122
2123 d->fxState[0].fx = Ifx_Modify; /* read then write */
2124 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA);
2125 d->fxState[0].size = sizeof(ULong);
2126 d->nFxState = 1;
2127
2128 stmt(IRStmt_Dirty(d));
2129
2130 return "00";
2131}
2132
2133static HChar *
sewardj2019a972011-03-07 16:04:07 +00002134s390_irgen_AR(UChar r1, UChar r2)
2135{
2136 IRTemp op1 = newTemp(Ity_I32);
2137 IRTemp op2 = newTemp(Ity_I32);
2138 IRTemp result = newTemp(Ity_I32);
2139
2140 assign(op1, get_gpr_w1(r1));
2141 assign(op2, get_gpr_w1(r2));
2142 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2143 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2144 put_gpr_w1(r1, mkexpr(result));
2145
2146 return "ar";
2147}
2148
2149static HChar *
2150s390_irgen_AGR(UChar r1, UChar r2)
2151{
2152 IRTemp op1 = newTemp(Ity_I64);
2153 IRTemp op2 = newTemp(Ity_I64);
2154 IRTemp result = newTemp(Ity_I64);
2155
2156 assign(op1, get_gpr_dw0(r1));
2157 assign(op2, get_gpr_dw0(r2));
2158 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2159 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2160 put_gpr_dw0(r1, mkexpr(result));
2161
2162 return "agr";
2163}
2164
2165static HChar *
2166s390_irgen_AGFR(UChar r1, UChar r2)
2167{
2168 IRTemp op1 = newTemp(Ity_I64);
2169 IRTemp op2 = newTemp(Ity_I64);
2170 IRTemp result = newTemp(Ity_I64);
2171
2172 assign(op1, get_gpr_dw0(r1));
2173 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2174 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2175 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2176 put_gpr_dw0(r1, mkexpr(result));
2177
2178 return "agfr";
2179}
2180
2181static HChar *
2182s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2183{
2184 IRTemp op2 = newTemp(Ity_I32);
2185 IRTemp op3 = newTemp(Ity_I32);
2186 IRTemp result = newTemp(Ity_I32);
2187
2188 assign(op2, get_gpr_w1(r2));
2189 assign(op3, get_gpr_w1(r3));
2190 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2191 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2192 put_gpr_w1(r1, mkexpr(result));
2193
2194 return "ark";
2195}
2196
2197static HChar *
2198s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2199{
2200 IRTemp op2 = newTemp(Ity_I64);
2201 IRTemp op3 = newTemp(Ity_I64);
2202 IRTemp result = newTemp(Ity_I64);
2203
2204 assign(op2, get_gpr_dw0(r2));
2205 assign(op3, get_gpr_dw0(r3));
2206 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2207 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2208 put_gpr_dw0(r1, mkexpr(result));
2209
2210 return "agrk";
2211}
2212
2213static HChar *
2214s390_irgen_A(UChar r1, IRTemp op2addr)
2215{
2216 IRTemp op1 = newTemp(Ity_I32);
2217 IRTemp op2 = newTemp(Ity_I32);
2218 IRTemp result = newTemp(Ity_I32);
2219
2220 assign(op1, get_gpr_w1(r1));
2221 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2222 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2223 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2224 put_gpr_w1(r1, mkexpr(result));
2225
2226 return "a";
2227}
2228
2229static HChar *
2230s390_irgen_AY(UChar r1, IRTemp op2addr)
2231{
2232 IRTemp op1 = newTemp(Ity_I32);
2233 IRTemp op2 = newTemp(Ity_I32);
2234 IRTemp result = newTemp(Ity_I32);
2235
2236 assign(op1, get_gpr_w1(r1));
2237 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2238 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2239 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2240 put_gpr_w1(r1, mkexpr(result));
2241
2242 return "ay";
2243}
2244
2245static HChar *
2246s390_irgen_AG(UChar r1, IRTemp op2addr)
2247{
2248 IRTemp op1 = newTemp(Ity_I64);
2249 IRTemp op2 = newTemp(Ity_I64);
2250 IRTemp result = newTemp(Ity_I64);
2251
2252 assign(op1, get_gpr_dw0(r1));
2253 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2254 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2255 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2256 put_gpr_dw0(r1, mkexpr(result));
2257
2258 return "ag";
2259}
2260
2261static HChar *
2262s390_irgen_AGF(UChar r1, IRTemp op2addr)
2263{
2264 IRTemp op1 = newTemp(Ity_I64);
2265 IRTemp op2 = newTemp(Ity_I64);
2266 IRTemp result = newTemp(Ity_I64);
2267
2268 assign(op1, get_gpr_dw0(r1));
2269 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2270 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2271 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2272 put_gpr_dw0(r1, mkexpr(result));
2273
2274 return "agf";
2275}
2276
2277static HChar *
2278s390_irgen_AFI(UChar r1, UInt i2)
2279{
2280 IRTemp op1 = newTemp(Ity_I32);
2281 Int op2;
2282 IRTemp result = newTemp(Ity_I32);
2283
2284 assign(op1, get_gpr_w1(r1));
2285 op2 = (Int)i2;
2286 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2287 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2288 mkU32((UInt)op2)));
2289 put_gpr_w1(r1, mkexpr(result));
2290
2291 return "afi";
2292}
2293
2294static HChar *
2295s390_irgen_AGFI(UChar r1, UInt i2)
2296{
2297 IRTemp op1 = newTemp(Ity_I64);
2298 Long op2;
2299 IRTemp result = newTemp(Ity_I64);
2300
2301 assign(op1, get_gpr_dw0(r1));
2302 op2 = (Long)(Int)i2;
2303 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2304 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2305 mkU64((ULong)op2)));
2306 put_gpr_dw0(r1, mkexpr(result));
2307
2308 return "agfi";
2309}
2310
2311static HChar *
2312s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2313{
2314 Int op2;
2315 IRTemp op3 = newTemp(Ity_I32);
2316 IRTemp result = newTemp(Ity_I32);
2317
2318 op2 = (Int)(Short)i2;
2319 assign(op3, get_gpr_w1(r3));
2320 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2321 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2322 op2)), op3);
2323 put_gpr_w1(r1, mkexpr(result));
2324
2325 return "ahik";
2326}
2327
2328static HChar *
2329s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2330{
2331 Long op2;
2332 IRTemp op3 = newTemp(Ity_I64);
2333 IRTemp result = newTemp(Ity_I64);
2334
2335 op2 = (Long)(Short)i2;
2336 assign(op3, get_gpr_dw0(r3));
2337 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2338 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2339 op2)), op3);
2340 put_gpr_dw0(r1, mkexpr(result));
2341
2342 return "aghik";
2343}
2344
2345static HChar *
2346s390_irgen_ASI(UChar i2, IRTemp op1addr)
2347{
2348 IRTemp op1 = newTemp(Ity_I32);
2349 Int op2;
2350 IRTemp result = newTemp(Ity_I32);
2351
2352 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2353 op2 = (Int)(Char)i2;
2354 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2355 store(mkexpr(op1addr), mkexpr(result));
2356 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2357 mkU32((UInt)op2)));
2358
2359 return "asi";
2360}
2361
2362static HChar *
2363s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2364{
2365 IRTemp op1 = newTemp(Ity_I64);
2366 Long op2;
2367 IRTemp result = newTemp(Ity_I64);
2368
2369 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2370 op2 = (Long)(Char)i2;
2371 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2372 store(mkexpr(op1addr), mkexpr(result));
2373 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2374 mkU64((ULong)op2)));
2375
2376 return "agsi";
2377}
2378
2379static HChar *
2380s390_irgen_AH(UChar r1, IRTemp op2addr)
2381{
2382 IRTemp op1 = newTemp(Ity_I32);
2383 IRTemp op2 = newTemp(Ity_I32);
2384 IRTemp result = newTemp(Ity_I32);
2385
2386 assign(op1, get_gpr_w1(r1));
2387 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2388 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2389 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2390 put_gpr_w1(r1, mkexpr(result));
2391
2392 return "ah";
2393}
2394
2395static HChar *
2396s390_irgen_AHY(UChar r1, IRTemp op2addr)
2397{
2398 IRTemp op1 = newTemp(Ity_I32);
2399 IRTemp op2 = newTemp(Ity_I32);
2400 IRTemp result = newTemp(Ity_I32);
2401
2402 assign(op1, get_gpr_w1(r1));
2403 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2404 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2405 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2406 put_gpr_w1(r1, mkexpr(result));
2407
2408 return "ahy";
2409}
2410
2411static HChar *
2412s390_irgen_AHI(UChar r1, UShort i2)
2413{
2414 IRTemp op1 = newTemp(Ity_I32);
2415 Int op2;
2416 IRTemp result = newTemp(Ity_I32);
2417
2418 assign(op1, get_gpr_w1(r1));
2419 op2 = (Int)(Short)i2;
2420 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2421 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2422 mkU32((UInt)op2)));
2423 put_gpr_w1(r1, mkexpr(result));
2424
2425 return "ahi";
2426}
2427
2428static HChar *
2429s390_irgen_AGHI(UChar r1, UShort i2)
2430{
2431 IRTemp op1 = newTemp(Ity_I64);
2432 Long op2;
2433 IRTemp result = newTemp(Ity_I64);
2434
2435 assign(op1, get_gpr_dw0(r1));
2436 op2 = (Long)(Short)i2;
2437 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2438 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2439 mkU64((ULong)op2)));
2440 put_gpr_dw0(r1, mkexpr(result));
2441
2442 return "aghi";
2443}
2444
2445static HChar *
2446s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2447{
2448 IRTemp op2 = newTemp(Ity_I32);
2449 IRTemp op3 = newTemp(Ity_I32);
2450 IRTemp result = newTemp(Ity_I32);
2451
2452 assign(op2, get_gpr_w0(r2));
2453 assign(op3, get_gpr_w0(r3));
2454 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2455 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2456 put_gpr_w0(r1, mkexpr(result));
2457
2458 return "ahhhr";
2459}
2460
2461static HChar *
2462s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2463{
2464 IRTemp op2 = newTemp(Ity_I32);
2465 IRTemp op3 = newTemp(Ity_I32);
2466 IRTemp result = newTemp(Ity_I32);
2467
2468 assign(op2, get_gpr_w0(r2));
2469 assign(op3, get_gpr_w1(r3));
2470 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2471 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2472 put_gpr_w0(r1, mkexpr(result));
2473
2474 return "ahhlr";
2475}
2476
2477static HChar *
2478s390_irgen_AIH(UChar r1, UInt i2)
2479{
2480 IRTemp op1 = newTemp(Ity_I32);
2481 Int op2;
2482 IRTemp result = newTemp(Ity_I32);
2483
2484 assign(op1, get_gpr_w0(r1));
2485 op2 = (Int)i2;
2486 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2487 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2488 mkU32((UInt)op2)));
2489 put_gpr_w0(r1, mkexpr(result));
2490
2491 return "aih";
2492}
2493
2494static HChar *
2495s390_irgen_ALR(UChar r1, UChar r2)
2496{
2497 IRTemp op1 = newTemp(Ity_I32);
2498 IRTemp op2 = newTemp(Ity_I32);
2499 IRTemp result = newTemp(Ity_I32);
2500
2501 assign(op1, get_gpr_w1(r1));
2502 assign(op2, get_gpr_w1(r2));
2503 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2504 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2505 put_gpr_w1(r1, mkexpr(result));
2506
2507 return "alr";
2508}
2509
2510static HChar *
2511s390_irgen_ALGR(UChar r1, UChar r2)
2512{
2513 IRTemp op1 = newTemp(Ity_I64);
2514 IRTemp op2 = newTemp(Ity_I64);
2515 IRTemp result = newTemp(Ity_I64);
2516
2517 assign(op1, get_gpr_dw0(r1));
2518 assign(op2, get_gpr_dw0(r2));
2519 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2520 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2521 put_gpr_dw0(r1, mkexpr(result));
2522
2523 return "algr";
2524}
2525
2526static HChar *
2527s390_irgen_ALGFR(UChar r1, UChar r2)
2528{
2529 IRTemp op1 = newTemp(Ity_I64);
2530 IRTemp op2 = newTemp(Ity_I64);
2531 IRTemp result = newTemp(Ity_I64);
2532
2533 assign(op1, get_gpr_dw0(r1));
2534 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2535 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2536 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2537 put_gpr_dw0(r1, mkexpr(result));
2538
2539 return "algfr";
2540}
2541
2542static HChar *
2543s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2544{
2545 IRTemp op2 = newTemp(Ity_I32);
2546 IRTemp op3 = newTemp(Ity_I32);
2547 IRTemp result = newTemp(Ity_I32);
2548
2549 assign(op2, get_gpr_w1(r2));
2550 assign(op3, get_gpr_w1(r3));
2551 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2552 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2553 put_gpr_w1(r1, mkexpr(result));
2554
2555 return "alrk";
2556}
2557
2558static HChar *
2559s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2560{
2561 IRTemp op2 = newTemp(Ity_I64);
2562 IRTemp op3 = newTemp(Ity_I64);
2563 IRTemp result = newTemp(Ity_I64);
2564
2565 assign(op2, get_gpr_dw0(r2));
2566 assign(op3, get_gpr_dw0(r3));
2567 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2568 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2569 put_gpr_dw0(r1, mkexpr(result));
2570
2571 return "algrk";
2572}
2573
2574static HChar *
2575s390_irgen_AL(UChar r1, IRTemp op2addr)
2576{
2577 IRTemp op1 = newTemp(Ity_I32);
2578 IRTemp op2 = newTemp(Ity_I32);
2579 IRTemp result = newTemp(Ity_I32);
2580
2581 assign(op1, get_gpr_w1(r1));
2582 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2583 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2584 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2585 put_gpr_w1(r1, mkexpr(result));
2586
2587 return "al";
2588}
2589
2590static HChar *
2591s390_irgen_ALY(UChar r1, IRTemp op2addr)
2592{
2593 IRTemp op1 = newTemp(Ity_I32);
2594 IRTemp op2 = newTemp(Ity_I32);
2595 IRTemp result = newTemp(Ity_I32);
2596
2597 assign(op1, get_gpr_w1(r1));
2598 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2599 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2600 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2601 put_gpr_w1(r1, mkexpr(result));
2602
2603 return "aly";
2604}
2605
2606static HChar *
2607s390_irgen_ALG(UChar r1, IRTemp op2addr)
2608{
2609 IRTemp op1 = newTemp(Ity_I64);
2610 IRTemp op2 = newTemp(Ity_I64);
2611 IRTemp result = newTemp(Ity_I64);
2612
2613 assign(op1, get_gpr_dw0(r1));
2614 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2615 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2616 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2617 put_gpr_dw0(r1, mkexpr(result));
2618
2619 return "alg";
2620}
2621
2622static HChar *
2623s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2624{
2625 IRTemp op1 = newTemp(Ity_I64);
2626 IRTemp op2 = newTemp(Ity_I64);
2627 IRTemp result = newTemp(Ity_I64);
2628
2629 assign(op1, get_gpr_dw0(r1));
2630 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2631 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2632 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2633 put_gpr_dw0(r1, mkexpr(result));
2634
2635 return "algf";
2636}
2637
2638static HChar *
2639s390_irgen_ALFI(UChar r1, UInt i2)
2640{
2641 IRTemp op1 = newTemp(Ity_I32);
2642 UInt op2;
2643 IRTemp result = newTemp(Ity_I32);
2644
2645 assign(op1, get_gpr_w1(r1));
2646 op2 = i2;
2647 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2648 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2649 mkU32(op2)));
2650 put_gpr_w1(r1, mkexpr(result));
2651
2652 return "alfi";
2653}
2654
2655static HChar *
2656s390_irgen_ALGFI(UChar r1, UInt i2)
2657{
2658 IRTemp op1 = newTemp(Ity_I64);
2659 ULong op2;
2660 IRTemp result = newTemp(Ity_I64);
2661
2662 assign(op1, get_gpr_dw0(r1));
2663 op2 = (ULong)i2;
2664 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2665 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2666 mkU64(op2)));
2667 put_gpr_dw0(r1, mkexpr(result));
2668
2669 return "algfi";
2670}
2671
2672static HChar *
2673s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2674{
2675 IRTemp op2 = newTemp(Ity_I32);
2676 IRTemp op3 = newTemp(Ity_I32);
2677 IRTemp result = newTemp(Ity_I32);
2678
2679 assign(op2, get_gpr_w0(r2));
2680 assign(op3, get_gpr_w0(r3));
2681 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2682 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2683 put_gpr_w0(r1, mkexpr(result));
2684
2685 return "alhhhr";
2686}
2687
2688static HChar *
2689s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2690{
2691 IRTemp op2 = newTemp(Ity_I32);
2692 IRTemp op3 = newTemp(Ity_I32);
2693 IRTemp result = newTemp(Ity_I32);
2694
2695 assign(op2, get_gpr_w0(r2));
2696 assign(op3, get_gpr_w1(r3));
2697 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2698 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2699 put_gpr_w0(r1, mkexpr(result));
2700
2701 return "alhhlr";
2702}
2703
2704static HChar *
2705s390_irgen_ALCR(UChar r1, UChar r2)
2706{
2707 IRTemp op1 = newTemp(Ity_I32);
2708 IRTemp op2 = newTemp(Ity_I32);
2709 IRTemp result = newTemp(Ity_I32);
2710 IRTemp carry_in = newTemp(Ity_I32);
2711
2712 assign(op1, get_gpr_w1(r1));
2713 assign(op2, get_gpr_w1(r2));
2714 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2715 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2716 mkexpr(carry_in)));
2717 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2718 put_gpr_w1(r1, mkexpr(result));
2719
2720 return "alcr";
2721}
2722
2723static HChar *
2724s390_irgen_ALCGR(UChar r1, UChar r2)
2725{
2726 IRTemp op1 = newTemp(Ity_I64);
2727 IRTemp op2 = newTemp(Ity_I64);
2728 IRTemp result = newTemp(Ity_I64);
2729 IRTemp carry_in = newTemp(Ity_I64);
2730
2731 assign(op1, get_gpr_dw0(r1));
2732 assign(op2, get_gpr_dw0(r2));
2733 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2734 mkU8(1))));
2735 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2736 mkexpr(carry_in)));
2737 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2738 put_gpr_dw0(r1, mkexpr(result));
2739
2740 return "alcgr";
2741}
2742
2743static HChar *
2744s390_irgen_ALC(UChar r1, IRTemp op2addr)
2745{
2746 IRTemp op1 = newTemp(Ity_I32);
2747 IRTemp op2 = newTemp(Ity_I32);
2748 IRTemp result = newTemp(Ity_I32);
2749 IRTemp carry_in = newTemp(Ity_I32);
2750
2751 assign(op1, get_gpr_w1(r1));
2752 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2753 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2754 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2755 mkexpr(carry_in)));
2756 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2757 put_gpr_w1(r1, mkexpr(result));
2758
2759 return "alc";
2760}
2761
2762static HChar *
2763s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2764{
2765 IRTemp op1 = newTemp(Ity_I64);
2766 IRTemp op2 = newTemp(Ity_I64);
2767 IRTemp result = newTemp(Ity_I64);
2768 IRTemp carry_in = newTemp(Ity_I64);
2769
2770 assign(op1, get_gpr_dw0(r1));
2771 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2772 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2773 mkU8(1))));
2774 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2775 mkexpr(carry_in)));
2776 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2777 put_gpr_dw0(r1, mkexpr(result));
2778
2779 return "alcg";
2780}
2781
2782static HChar *
2783s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2784{
2785 IRTemp op1 = newTemp(Ity_I32);
2786 UInt op2;
2787 IRTemp result = newTemp(Ity_I32);
2788
2789 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2790 op2 = (UInt)(Int)(Char)i2;
2791 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2792 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2793 mkU32(op2)));
2794 store(mkexpr(op1addr), mkexpr(result));
2795
2796 return "alsi";
2797}
2798
2799static HChar *
2800s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2801{
2802 IRTemp op1 = newTemp(Ity_I64);
2803 ULong op2;
2804 IRTemp result = newTemp(Ity_I64);
2805
2806 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2807 op2 = (ULong)(Long)(Char)i2;
2808 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2809 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2810 mkU64(op2)));
2811 store(mkexpr(op1addr), mkexpr(result));
2812
2813 return "algsi";
2814}
2815
2816static HChar *
2817s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2818{
2819 UInt op2;
2820 IRTemp op3 = newTemp(Ity_I32);
2821 IRTemp result = newTemp(Ity_I32);
2822
2823 op2 = (UInt)(Int)(Short)i2;
2824 assign(op3, get_gpr_w1(r3));
2825 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2826 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2827 op3);
2828 put_gpr_w1(r1, mkexpr(result));
2829
2830 return "alhsik";
2831}
2832
2833static HChar *
2834s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2835{
2836 ULong op2;
2837 IRTemp op3 = newTemp(Ity_I64);
2838 IRTemp result = newTemp(Ity_I64);
2839
2840 op2 = (ULong)(Long)(Short)i2;
2841 assign(op3, get_gpr_dw0(r3));
2842 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2843 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2844 op3);
2845 put_gpr_dw0(r1, mkexpr(result));
2846
2847 return "alghsik";
2848}
2849
2850static HChar *
2851s390_irgen_ALSIH(UChar r1, UInt i2)
2852{
2853 IRTemp op1 = newTemp(Ity_I32);
2854 UInt op2;
2855 IRTemp result = newTemp(Ity_I32);
2856
2857 assign(op1, get_gpr_w0(r1));
2858 op2 = i2;
2859 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2860 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2861 mkU32(op2)));
2862 put_gpr_w0(r1, mkexpr(result));
2863
2864 return "alsih";
2865}
2866
2867static HChar *
2868s390_irgen_ALSIHN(UChar r1, UInt i2)
2869{
2870 IRTemp op1 = newTemp(Ity_I32);
2871 UInt op2;
2872 IRTemp result = newTemp(Ity_I32);
2873
2874 assign(op1, get_gpr_w0(r1));
2875 op2 = i2;
2876 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2877 put_gpr_w0(r1, mkexpr(result));
2878
2879 return "alsihn";
2880}
2881
2882static HChar *
2883s390_irgen_NR(UChar r1, UChar r2)
2884{
2885 IRTemp op1 = newTemp(Ity_I32);
2886 IRTemp op2 = newTemp(Ity_I32);
2887 IRTemp result = newTemp(Ity_I32);
2888
2889 assign(op1, get_gpr_w1(r1));
2890 assign(op2, get_gpr_w1(r2));
2891 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2892 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2893 put_gpr_w1(r1, mkexpr(result));
2894
2895 return "nr";
2896}
2897
2898static HChar *
2899s390_irgen_NGR(UChar r1, UChar r2)
2900{
2901 IRTemp op1 = newTemp(Ity_I64);
2902 IRTemp op2 = newTemp(Ity_I64);
2903 IRTemp result = newTemp(Ity_I64);
2904
2905 assign(op1, get_gpr_dw0(r1));
2906 assign(op2, get_gpr_dw0(r2));
2907 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2908 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2909 put_gpr_dw0(r1, mkexpr(result));
2910
2911 return "ngr";
2912}
2913
2914static HChar *
2915s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2916{
2917 IRTemp op2 = newTemp(Ity_I32);
2918 IRTemp op3 = newTemp(Ity_I32);
2919 IRTemp result = newTemp(Ity_I32);
2920
2921 assign(op2, get_gpr_w1(r2));
2922 assign(op3, get_gpr_w1(r3));
2923 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2924 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2925 put_gpr_w1(r1, mkexpr(result));
2926
2927 return "nrk";
2928}
2929
2930static HChar *
2931s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2932{
2933 IRTemp op2 = newTemp(Ity_I64);
2934 IRTemp op3 = newTemp(Ity_I64);
2935 IRTemp result = newTemp(Ity_I64);
2936
2937 assign(op2, get_gpr_dw0(r2));
2938 assign(op3, get_gpr_dw0(r3));
2939 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2940 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2941 put_gpr_dw0(r1, mkexpr(result));
2942
2943 return "ngrk";
2944}
2945
2946static HChar *
2947s390_irgen_N(UChar r1, IRTemp op2addr)
2948{
2949 IRTemp op1 = newTemp(Ity_I32);
2950 IRTemp op2 = newTemp(Ity_I32);
2951 IRTemp result = newTemp(Ity_I32);
2952
2953 assign(op1, get_gpr_w1(r1));
2954 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2955 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2956 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2957 put_gpr_w1(r1, mkexpr(result));
2958
2959 return "n";
2960}
2961
2962static HChar *
2963s390_irgen_NY(UChar r1, IRTemp op2addr)
2964{
2965 IRTemp op1 = newTemp(Ity_I32);
2966 IRTemp op2 = newTemp(Ity_I32);
2967 IRTemp result = newTemp(Ity_I32);
2968
2969 assign(op1, get_gpr_w1(r1));
2970 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2971 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2972 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2973 put_gpr_w1(r1, mkexpr(result));
2974
2975 return "ny";
2976}
2977
2978static HChar *
2979s390_irgen_NG(UChar r1, IRTemp op2addr)
2980{
2981 IRTemp op1 = newTemp(Ity_I64);
2982 IRTemp op2 = newTemp(Ity_I64);
2983 IRTemp result = newTemp(Ity_I64);
2984
2985 assign(op1, get_gpr_dw0(r1));
2986 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2987 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2988 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2989 put_gpr_dw0(r1, mkexpr(result));
2990
2991 return "ng";
2992}
2993
2994static HChar *
2995s390_irgen_NI(UChar i2, IRTemp op1addr)
2996{
2997 IRTemp op1 = newTemp(Ity_I8);
2998 UChar op2;
2999 IRTemp result = newTemp(Ity_I8);
3000
3001 assign(op1, load(Ity_I8, mkexpr(op1addr)));
3002 op2 = i2;
3003 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
3004 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3005 store(mkexpr(op1addr), mkexpr(result));
3006
3007 return "ni";
3008}
3009
3010static HChar *
3011s390_irgen_NIY(UChar i2, IRTemp op1addr)
3012{
3013 IRTemp op1 = newTemp(Ity_I8);
3014 UChar op2;
3015 IRTemp result = newTemp(Ity_I8);
3016
3017 assign(op1, load(Ity_I8, mkexpr(op1addr)));
3018 op2 = i2;
3019 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
3020 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3021 store(mkexpr(op1addr), mkexpr(result));
3022
3023 return "niy";
3024}
3025
3026static HChar *
3027s390_irgen_NIHF(UChar r1, UInt i2)
3028{
3029 IRTemp op1 = newTemp(Ity_I32);
3030 UInt op2;
3031 IRTemp result = newTemp(Ity_I32);
3032
3033 assign(op1, get_gpr_w0(r1));
3034 op2 = i2;
3035 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3036 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3037 put_gpr_w0(r1, mkexpr(result));
3038
3039 return "nihf";
3040}
3041
3042static HChar *
3043s390_irgen_NIHH(UChar r1, UShort i2)
3044{
3045 IRTemp op1 = newTemp(Ity_I16);
3046 UShort op2;
3047 IRTemp result = newTemp(Ity_I16);
3048
3049 assign(op1, get_gpr_hw0(r1));
3050 op2 = i2;
3051 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3052 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3053 put_gpr_hw0(r1, mkexpr(result));
3054
3055 return "nihh";
3056}
3057
3058static HChar *
3059s390_irgen_NIHL(UChar r1, UShort i2)
3060{
3061 IRTemp op1 = newTemp(Ity_I16);
3062 UShort op2;
3063 IRTemp result = newTemp(Ity_I16);
3064
3065 assign(op1, get_gpr_hw1(r1));
3066 op2 = i2;
3067 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3068 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3069 put_gpr_hw1(r1, mkexpr(result));
3070
3071 return "nihl";
3072}
3073
3074static HChar *
3075s390_irgen_NILF(UChar r1, UInt i2)
3076{
3077 IRTemp op1 = newTemp(Ity_I32);
3078 UInt op2;
3079 IRTemp result = newTemp(Ity_I32);
3080
3081 assign(op1, get_gpr_w1(r1));
3082 op2 = i2;
3083 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3084 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3085 put_gpr_w1(r1, mkexpr(result));
3086
3087 return "nilf";
3088}
3089
3090static HChar *
3091s390_irgen_NILH(UChar r1, UShort i2)
3092{
3093 IRTemp op1 = newTemp(Ity_I16);
3094 UShort op2;
3095 IRTemp result = newTemp(Ity_I16);
3096
3097 assign(op1, get_gpr_hw2(r1));
3098 op2 = i2;
3099 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3100 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3101 put_gpr_hw2(r1, mkexpr(result));
3102
3103 return "nilh";
3104}
3105
3106static HChar *
3107s390_irgen_NILL(UChar r1, UShort i2)
3108{
3109 IRTemp op1 = newTemp(Ity_I16);
3110 UShort op2;
3111 IRTemp result = newTemp(Ity_I16);
3112
3113 assign(op1, get_gpr_hw3(r1));
3114 op2 = i2;
3115 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3116 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3117 put_gpr_hw3(r1, mkexpr(result));
3118
3119 return "nill";
3120}
3121
3122static HChar *
3123s390_irgen_BASR(UChar r1, UChar r2)
3124{
3125 IRTemp target = newTemp(Ity_I64);
3126
3127 if (r2 == 0) {
3128 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3129 } else {
3130 if (r1 != r2) {
3131 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3132 call_function(get_gpr_dw0(r2));
3133 } else {
3134 assign(target, get_gpr_dw0(r2));
3135 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3136 call_function(mkexpr(target));
3137 }
3138 }
3139
3140 return "basr";
3141}
3142
3143static HChar *
3144s390_irgen_BAS(UChar r1, IRTemp op2addr)
3145{
3146 IRTemp target = newTemp(Ity_I64);
3147
3148 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3149 assign(target, mkexpr(op2addr));
3150 call_function(mkexpr(target));
3151
3152 return "bas";
3153}
3154
3155static HChar *
3156s390_irgen_BCR(UChar r1, UChar r2)
3157{
3158 IRTemp cond = newTemp(Ity_I32);
3159
sewardja52e37e2011-04-28 18:48:06 +00003160 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3161 stmt(IRStmt_MBE(Imbe_Fence));
3162 }
3163
sewardj2019a972011-03-07 16:04:07 +00003164 if ((r2 == 0) || (r1 == 0)) {
3165 } else {
3166 if (r1 == 15) {
3167 return_from_function(get_gpr_dw0(r2));
3168 } else {
3169 assign(cond, s390_call_calculate_cond(r1));
3170 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3171 mkU32(0)), get_gpr_dw0(r2));
3172 }
3173 }
sewardj7ee97522011-05-09 21:45:04 +00003174 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003175 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3176
3177 return "bcr";
3178}
3179
3180static HChar *
3181s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3182{
3183 IRTemp cond = newTemp(Ity_I32);
3184
3185 if (r1 == 0) {
3186 } else {
3187 if (r1 == 15) {
3188 always_goto(mkexpr(op2addr));
3189 } else {
3190 assign(cond, s390_call_calculate_cond(r1));
3191 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3192 mkU32(0)), mkexpr(op2addr));
3193 }
3194 }
sewardj7ee97522011-05-09 21:45:04 +00003195 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003196 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3197
3198 return "bc";
3199}
3200
3201static HChar *
3202s390_irgen_BCTR(UChar r1, UChar r2)
3203{
3204 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3205 if (r2 != 0) {
3206 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3207 ), get_gpr_dw0(r2));
3208 }
3209
3210 return "bctr";
3211}
3212
3213static HChar *
3214s390_irgen_BCTGR(UChar r1, UChar r2)
3215{
3216 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3217 if (r2 != 0) {
3218 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3219 mkU64(0)), get_gpr_dw0(r2));
3220 }
3221
3222 return "bctgr";
3223}
3224
3225static HChar *
3226s390_irgen_BCT(UChar r1, IRTemp op2addr)
3227{
3228 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3229 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3230 mkexpr(op2addr));
3231
3232 return "bct";
3233}
3234
3235static HChar *
3236s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3237{
3238 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3239 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3240 mkexpr(op2addr));
3241
3242 return "bctg";
3243}
3244
3245static HChar *
3246s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3247{
3248 IRTemp value = newTemp(Ity_I32);
3249
3250 assign(value, get_gpr_w1(r3 | 1));
3251 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3252 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3253 mkexpr(value)), mkexpr(op2addr));
3254
3255 return "bxh";
3256}
3257
3258static HChar *
3259s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3260{
3261 IRTemp value = newTemp(Ity_I64);
3262
3263 assign(value, get_gpr_dw0(r3 | 1));
3264 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3265 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3266 mkexpr(value)), mkexpr(op2addr));
3267
3268 return "bxhg";
3269}
3270
3271static HChar *
3272s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3273{
3274 IRTemp value = newTemp(Ity_I32);
3275
3276 assign(value, get_gpr_w1(r3 | 1));
3277 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3278 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3279 get_gpr_w1(r1)), mkexpr(op2addr));
3280
3281 return "bxle";
3282}
3283
3284static HChar *
3285s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3286{
3287 IRTemp value = newTemp(Ity_I64);
3288
3289 assign(value, get_gpr_dw0(r3 | 1));
3290 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3291 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3292 get_gpr_dw0(r1)), mkexpr(op2addr));
3293
3294 return "bxleg";
3295}
3296
3297static HChar *
3298s390_irgen_BRAS(UChar r1, UShort i2)
3299{
3300 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
floriana64c2432011-07-16 02:11:50 +00003301 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003302
3303 return "bras";
3304}
3305
3306static HChar *
3307s390_irgen_BRASL(UChar r1, UInt i2)
3308{
3309 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
floriana64c2432011-07-16 02:11:50 +00003310 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003311
3312 return "brasl";
3313}
3314
3315static HChar *
3316s390_irgen_BRC(UChar r1, UShort i2)
3317{
3318 IRTemp cond = newTemp(Ity_I32);
3319
3320 if (r1 == 0) {
3321 } else {
3322 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003323 always_goto_and_chase(
3324 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003325 } else {
3326 assign(cond, s390_call_calculate_cond(r1));
3327 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3328 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3329
3330 }
3331 }
sewardj7ee97522011-05-09 21:45:04 +00003332 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003333 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3334
3335 return "brc";
3336}
3337
3338static HChar *
3339s390_irgen_BRCL(UChar r1, UInt i2)
3340{
3341 IRTemp cond = newTemp(Ity_I32);
3342
3343 if (r1 == 0) {
3344 } else {
3345 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003346 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003347 } else {
3348 assign(cond, s390_call_calculate_cond(r1));
3349 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3350 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3351 }
3352 }
sewardj7ee97522011-05-09 21:45:04 +00003353 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003354 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3355
3356 return "brcl";
3357}
3358
3359static HChar *
3360s390_irgen_BRCT(UChar r1, UShort i2)
3361{
3362 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3363 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3364 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3365
3366 return "brct";
3367}
3368
3369static HChar *
3370s390_irgen_BRCTG(UChar r1, UShort i2)
3371{
3372 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3373 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3374 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3375
3376 return "brctg";
3377}
3378
3379static HChar *
3380s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3381{
3382 IRTemp value = newTemp(Ity_I32);
3383
3384 assign(value, get_gpr_w1(r3 | 1));
3385 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3386 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3387 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3388
3389 return "brxh";
3390}
3391
3392static HChar *
3393s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3394{
3395 IRTemp value = newTemp(Ity_I64);
3396
3397 assign(value, get_gpr_dw0(r3 | 1));
3398 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3399 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3400 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3401
3402 return "brxhg";
3403}
3404
3405static HChar *
3406s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3407{
3408 IRTemp value = newTemp(Ity_I32);
3409
3410 assign(value, get_gpr_w1(r3 | 1));
3411 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3412 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3413 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3414
3415 return "brxle";
3416}
3417
3418static HChar *
3419s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3420{
3421 IRTemp value = newTemp(Ity_I64);
3422
3423 assign(value, get_gpr_dw0(r3 | 1));
3424 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3425 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3426 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3427
3428 return "brxlg";
3429}
3430
3431static HChar *
3432s390_irgen_CR(UChar r1, UChar r2)
3433{
3434 IRTemp op1 = newTemp(Ity_I32);
3435 IRTemp op2 = newTemp(Ity_I32);
3436
3437 assign(op1, get_gpr_w1(r1));
3438 assign(op2, get_gpr_w1(r2));
3439 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3440
3441 return "cr";
3442}
3443
3444static HChar *
3445s390_irgen_CGR(UChar r1, UChar r2)
3446{
3447 IRTemp op1 = newTemp(Ity_I64);
3448 IRTemp op2 = newTemp(Ity_I64);
3449
3450 assign(op1, get_gpr_dw0(r1));
3451 assign(op2, get_gpr_dw0(r2));
3452 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3453
3454 return "cgr";
3455}
3456
3457static HChar *
3458s390_irgen_CGFR(UChar r1, UChar r2)
3459{
3460 IRTemp op1 = newTemp(Ity_I64);
3461 IRTemp op2 = newTemp(Ity_I64);
3462
3463 assign(op1, get_gpr_dw0(r1));
3464 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3465 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3466
3467 return "cgfr";
3468}
3469
3470static HChar *
3471s390_irgen_C(UChar r1, IRTemp op2addr)
3472{
3473 IRTemp op1 = newTemp(Ity_I32);
3474 IRTemp op2 = newTemp(Ity_I32);
3475
3476 assign(op1, get_gpr_w1(r1));
3477 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3478 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3479
3480 return "c";
3481}
3482
3483static HChar *
3484s390_irgen_CY(UChar r1, IRTemp op2addr)
3485{
3486 IRTemp op1 = newTemp(Ity_I32);
3487 IRTemp op2 = newTemp(Ity_I32);
3488
3489 assign(op1, get_gpr_w1(r1));
3490 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3491 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3492
3493 return "cy";
3494}
3495
3496static HChar *
3497s390_irgen_CG(UChar r1, IRTemp op2addr)
3498{
3499 IRTemp op1 = newTemp(Ity_I64);
3500 IRTemp op2 = newTemp(Ity_I64);
3501
3502 assign(op1, get_gpr_dw0(r1));
3503 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3504 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3505
3506 return "cg";
3507}
3508
3509static HChar *
3510s390_irgen_CGF(UChar r1, IRTemp op2addr)
3511{
3512 IRTemp op1 = newTemp(Ity_I64);
3513 IRTemp op2 = newTemp(Ity_I64);
3514
3515 assign(op1, get_gpr_dw0(r1));
3516 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3517 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3518
3519 return "cgf";
3520}
3521
3522static HChar *
3523s390_irgen_CFI(UChar r1, UInt i2)
3524{
3525 IRTemp op1 = newTemp(Ity_I32);
3526 Int op2;
3527
3528 assign(op1, get_gpr_w1(r1));
3529 op2 = (Int)i2;
3530 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3531 mkU32((UInt)op2)));
3532
3533 return "cfi";
3534}
3535
3536static HChar *
3537s390_irgen_CGFI(UChar r1, UInt i2)
3538{
3539 IRTemp op1 = newTemp(Ity_I64);
3540 Long op2;
3541
3542 assign(op1, get_gpr_dw0(r1));
3543 op2 = (Long)(Int)i2;
3544 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3545 mkU64((ULong)op2)));
3546
3547 return "cgfi";
3548}
3549
3550static HChar *
3551s390_irgen_CRL(UChar r1, UInt i2)
3552{
3553 IRTemp op1 = newTemp(Ity_I32);
3554 IRTemp op2 = newTemp(Ity_I32);
3555
3556 assign(op1, get_gpr_w1(r1));
3557 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3558 i2 << 1))));
3559 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3560
3561 return "crl";
3562}
3563
3564static HChar *
3565s390_irgen_CGRL(UChar r1, UInt i2)
3566{
3567 IRTemp op1 = newTemp(Ity_I64);
3568 IRTemp op2 = newTemp(Ity_I64);
3569
3570 assign(op1, get_gpr_dw0(r1));
3571 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3572 i2 << 1))));
3573 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3574
3575 return "cgrl";
3576}
3577
3578static HChar *
3579s390_irgen_CGFRL(UChar r1, UInt i2)
3580{
3581 IRTemp op1 = newTemp(Ity_I64);
3582 IRTemp op2 = newTemp(Ity_I64);
3583
3584 assign(op1, get_gpr_dw0(r1));
3585 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3586 ((ULong)(Long)(Int)i2 << 1)))));
3587 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3588
3589 return "cgfrl";
3590}
3591
3592static HChar *
3593s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3594{
3595 IRTemp op1 = newTemp(Ity_I32);
3596 IRTemp op2 = newTemp(Ity_I32);
sewardj2019a972011-03-07 16:04:07 +00003597 IRTemp cond = newTemp(Ity_I32);
3598
3599 if (m3 == 0) {
3600 } else {
3601 if (m3 == 14) {
3602 always_goto(mkexpr(op4addr));
3603 } else {
3604 assign(op1, get_gpr_w1(r1));
3605 assign(op2, get_gpr_w1(r2));
florianff9613f2012-05-12 15:26:44 +00003606 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE,
3607 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00003608 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3609 mkU32(0)), mkexpr(op4addr));
3610 }
3611 }
3612
3613 return "crb";
3614}
3615
3616static HChar *
3617s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3618{
3619 IRTemp op1 = newTemp(Ity_I64);
3620 IRTemp op2 = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00003621 IRTemp cond = newTemp(Ity_I32);
3622
3623 if (m3 == 0) {
3624 } else {
3625 if (m3 == 14) {
3626 always_goto(mkexpr(op4addr));
3627 } else {
3628 assign(op1, get_gpr_dw0(r1));
3629 assign(op2, get_gpr_dw0(r2));
florianff9613f2012-05-12 15:26:44 +00003630 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE,
3631 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00003632 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3633 mkU32(0)), mkexpr(op4addr));
3634 }
3635 }
3636
3637 return "cgrb";
3638}
3639
3640static HChar *
3641s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3642{
3643 IRTemp op1 = newTemp(Ity_I32);
3644 IRTemp op2 = newTemp(Ity_I32);
sewardj2019a972011-03-07 16:04:07 +00003645 IRTemp cond = newTemp(Ity_I32);
3646
3647 if (m3 == 0) {
3648 } else {
3649 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003650 always_goto_and_chase(
3651 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003652 } else {
3653 assign(op1, get_gpr_w1(r1));
3654 assign(op2, get_gpr_w1(r2));
florianff9613f2012-05-12 15:26:44 +00003655 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE,
3656 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00003657 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3658 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3659
3660 }
3661 }
3662
3663 return "crj";
3664}
3665
3666static HChar *
3667s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3668{
3669 IRTemp op1 = newTemp(Ity_I64);
3670 IRTemp op2 = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00003671 IRTemp cond = newTemp(Ity_I32);
3672
3673 if (m3 == 0) {
3674 } else {
3675 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003676 always_goto_and_chase(
3677 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003678 } else {
3679 assign(op1, get_gpr_dw0(r1));
3680 assign(op2, get_gpr_dw0(r2));
florianff9613f2012-05-12 15:26:44 +00003681 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE,
3682 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00003683 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3684 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3685
3686 }
3687 }
3688
3689 return "cgrj";
3690}
3691
3692static HChar *
3693s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3694{
3695 IRTemp op1 = newTemp(Ity_I32);
3696 Int op2;
sewardj2019a972011-03-07 16:04:07 +00003697 IRTemp cond = newTemp(Ity_I32);
3698
3699 if (m3 == 0) {
3700 } else {
3701 if (m3 == 14) {
3702 always_goto(mkexpr(op4addr));
3703 } else {
3704 assign(op1, get_gpr_w1(r1));
3705 op2 = (Int)(Char)i2;
florianff9613f2012-05-12 15:26:44 +00003706 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1,
3707 mktemp(Ity_I32, mkU32((UInt)op2))));
sewardj2019a972011-03-07 16:04:07 +00003708 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3709 mkU32(0)), mkexpr(op4addr));
3710 }
3711 }
3712
3713 return "cib";
3714}
3715
3716static HChar *
3717s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3718{
3719 IRTemp op1 = newTemp(Ity_I64);
3720 Long op2;
sewardj2019a972011-03-07 16:04:07 +00003721 IRTemp cond = newTemp(Ity_I32);
3722
3723 if (m3 == 0) {
3724 } else {
3725 if (m3 == 14) {
3726 always_goto(mkexpr(op4addr));
3727 } else {
3728 assign(op1, get_gpr_dw0(r1));
3729 op2 = (Long)(Char)i2;
florianff9613f2012-05-12 15:26:44 +00003730 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1,
3731 mktemp(Ity_I64, mkU64((ULong)op2))));
sewardj2019a972011-03-07 16:04:07 +00003732 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3733 mkU32(0)), mkexpr(op4addr));
3734 }
3735 }
3736
3737 return "cgib";
3738}
3739
3740static HChar *
3741s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3742{
3743 IRTemp op1 = newTemp(Ity_I32);
3744 Int op2;
sewardj2019a972011-03-07 16:04:07 +00003745 IRTemp cond = newTemp(Ity_I32);
3746
3747 if (m3 == 0) {
3748 } else {
3749 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003750 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003751 } else {
3752 assign(op1, get_gpr_w1(r1));
3753 op2 = (Int)(Char)i2;
florianff9613f2012-05-12 15:26:44 +00003754 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1,
3755 mktemp(Ity_I32, mkU32((UInt)op2))));
sewardj2019a972011-03-07 16:04:07 +00003756 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3757 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3758
3759 }
3760 }
3761
3762 return "cij";
3763}
3764
3765static HChar *
3766s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3767{
3768 IRTemp op1 = newTemp(Ity_I64);
3769 Long op2;
sewardj2019a972011-03-07 16:04:07 +00003770 IRTemp cond = newTemp(Ity_I32);
3771
3772 if (m3 == 0) {
3773 } else {
3774 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003775 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003776 } else {
3777 assign(op1, get_gpr_dw0(r1));
3778 op2 = (Long)(Char)i2;
florianff9613f2012-05-12 15:26:44 +00003779 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1,
3780 mktemp(Ity_I64, mkU64((ULong)op2))));
sewardj2019a972011-03-07 16:04:07 +00003781 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3782 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3783
3784 }
3785 }
3786
3787 return "cgij";
3788}
3789
3790static HChar *
3791s390_irgen_CH(UChar r1, IRTemp op2addr)
3792{
3793 IRTemp op1 = newTemp(Ity_I32);
3794 IRTemp op2 = newTemp(Ity_I32);
3795
3796 assign(op1, get_gpr_w1(r1));
3797 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3798 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3799
3800 return "ch";
3801}
3802
3803static HChar *
3804s390_irgen_CHY(UChar r1, IRTemp op2addr)
3805{
3806 IRTemp op1 = newTemp(Ity_I32);
3807 IRTemp op2 = newTemp(Ity_I32);
3808
3809 assign(op1, get_gpr_w1(r1));
3810 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3811 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3812
3813 return "chy";
3814}
3815
3816static HChar *
3817s390_irgen_CGH(UChar r1, IRTemp op2addr)
3818{
3819 IRTemp op1 = newTemp(Ity_I64);
3820 IRTemp op2 = newTemp(Ity_I64);
3821
3822 assign(op1, get_gpr_dw0(r1));
3823 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3824 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3825
3826 return "cgh";
3827}
3828
3829static HChar *
3830s390_irgen_CHI(UChar r1, UShort i2)
3831{
3832 IRTemp op1 = newTemp(Ity_I32);
3833 Int op2;
3834
3835 assign(op1, get_gpr_w1(r1));
3836 op2 = (Int)(Short)i2;
3837 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3838 mkU32((UInt)op2)));
3839
3840 return "chi";
3841}
3842
3843static HChar *
3844s390_irgen_CGHI(UChar r1, UShort i2)
3845{
3846 IRTemp op1 = newTemp(Ity_I64);
3847 Long op2;
3848
3849 assign(op1, get_gpr_dw0(r1));
3850 op2 = (Long)(Short)i2;
3851 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3852 mkU64((ULong)op2)));
3853
3854 return "cghi";
3855}
3856
3857static HChar *
3858s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3859{
3860 IRTemp op1 = newTemp(Ity_I16);
3861 Short op2;
3862
3863 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3864 op2 = (Short)i2;
3865 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3866 mkU16((UShort)op2)));
3867
3868 return "chhsi";
3869}
3870
3871static HChar *
3872s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3873{
3874 IRTemp op1 = newTemp(Ity_I32);
3875 Int op2;
3876
3877 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3878 op2 = (Int)(Short)i2;
3879 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3880 mkU32((UInt)op2)));
3881
3882 return "chsi";
3883}
3884
3885static HChar *
3886s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3887{
3888 IRTemp op1 = newTemp(Ity_I64);
3889 Long op2;
3890
3891 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3892 op2 = (Long)(Short)i2;
3893 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3894 mkU64((ULong)op2)));
3895
3896 return "cghsi";
3897}
3898
3899static HChar *
3900s390_irgen_CHRL(UChar r1, UInt i2)
3901{
3902 IRTemp op1 = newTemp(Ity_I32);
3903 IRTemp op2 = newTemp(Ity_I32);
3904
3905 assign(op1, get_gpr_w1(r1));
3906 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3907 ((ULong)(Long)(Int)i2 << 1)))));
3908 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3909
3910 return "chrl";
3911}
3912
3913static HChar *
3914s390_irgen_CGHRL(UChar r1, UInt i2)
3915{
3916 IRTemp op1 = newTemp(Ity_I64);
3917 IRTemp op2 = newTemp(Ity_I64);
3918
3919 assign(op1, get_gpr_dw0(r1));
3920 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3921 ((ULong)(Long)(Int)i2 << 1)))));
3922 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3923
3924 return "cghrl";
3925}
3926
3927static HChar *
3928s390_irgen_CHHR(UChar r1, UChar r2)
3929{
3930 IRTemp op1 = newTemp(Ity_I32);
3931 IRTemp op2 = newTemp(Ity_I32);
3932
3933 assign(op1, get_gpr_w0(r1));
3934 assign(op2, get_gpr_w0(r2));
3935 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3936
3937 return "chhr";
3938}
3939
3940static HChar *
3941s390_irgen_CHLR(UChar r1, UChar r2)
3942{
3943 IRTemp op1 = newTemp(Ity_I32);
3944 IRTemp op2 = newTemp(Ity_I32);
3945
3946 assign(op1, get_gpr_w0(r1));
3947 assign(op2, get_gpr_w1(r2));
3948 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3949
3950 return "chlr";
3951}
3952
3953static HChar *
3954s390_irgen_CHF(UChar r1, IRTemp op2addr)
3955{
3956 IRTemp op1 = newTemp(Ity_I32);
3957 IRTemp op2 = newTemp(Ity_I32);
3958
3959 assign(op1, get_gpr_w0(r1));
3960 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3961 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3962
3963 return "chf";
3964}
3965
3966static HChar *
3967s390_irgen_CIH(UChar r1, UInt i2)
3968{
3969 IRTemp op1 = newTemp(Ity_I32);
3970 Int op2;
3971
3972 assign(op1, get_gpr_w0(r1));
3973 op2 = (Int)i2;
3974 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3975 mkU32((UInt)op2)));
3976
3977 return "cih";
3978}
3979
3980static HChar *
3981s390_irgen_CLR(UChar r1, UChar r2)
3982{
3983 IRTemp op1 = newTemp(Ity_I32);
3984 IRTemp op2 = newTemp(Ity_I32);
3985
3986 assign(op1, get_gpr_w1(r1));
3987 assign(op2, get_gpr_w1(r2));
3988 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3989
3990 return "clr";
3991}
3992
3993static HChar *
3994s390_irgen_CLGR(UChar r1, UChar r2)
3995{
3996 IRTemp op1 = newTemp(Ity_I64);
3997 IRTemp op2 = newTemp(Ity_I64);
3998
3999 assign(op1, get_gpr_dw0(r1));
4000 assign(op2, get_gpr_dw0(r2));
4001 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4002
4003 return "clgr";
4004}
4005
4006static HChar *
4007s390_irgen_CLGFR(UChar r1, UChar r2)
4008{
4009 IRTemp op1 = newTemp(Ity_I64);
4010 IRTemp op2 = newTemp(Ity_I64);
4011
4012 assign(op1, get_gpr_dw0(r1));
4013 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
4014 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4015
4016 return "clgfr";
4017}
4018
4019static HChar *
4020s390_irgen_CL(UChar r1, IRTemp op2addr)
4021{
4022 IRTemp op1 = newTemp(Ity_I32);
4023 IRTemp op2 = newTemp(Ity_I32);
4024
4025 assign(op1, get_gpr_w1(r1));
4026 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4027 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4028
4029 return "cl";
4030}
4031
4032static HChar *
4033s390_irgen_CLY(UChar r1, IRTemp op2addr)
4034{
4035 IRTemp op1 = newTemp(Ity_I32);
4036 IRTemp op2 = newTemp(Ity_I32);
4037
4038 assign(op1, get_gpr_w1(r1));
4039 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4040 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4041
4042 return "cly";
4043}
4044
4045static HChar *
4046s390_irgen_CLG(UChar r1, IRTemp op2addr)
4047{
4048 IRTemp op1 = newTemp(Ity_I64);
4049 IRTemp op2 = newTemp(Ity_I64);
4050
4051 assign(op1, get_gpr_dw0(r1));
4052 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4053 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4054
4055 return "clg";
4056}
4057
4058static HChar *
4059s390_irgen_CLGF(UChar r1, IRTemp op2addr)
4060{
4061 IRTemp op1 = newTemp(Ity_I64);
4062 IRTemp op2 = newTemp(Ity_I64);
4063
4064 assign(op1, get_gpr_dw0(r1));
4065 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
4066 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4067
4068 return "clgf";
4069}
4070
4071static HChar *
4072s390_irgen_CLFI(UChar r1, UInt i2)
4073{
4074 IRTemp op1 = newTemp(Ity_I32);
4075 UInt op2;
4076
4077 assign(op1, get_gpr_w1(r1));
4078 op2 = i2;
4079 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4080 mkU32(op2)));
4081
4082 return "clfi";
4083}
4084
4085static HChar *
4086s390_irgen_CLGFI(UChar r1, UInt i2)
4087{
4088 IRTemp op1 = newTemp(Ity_I64);
4089 ULong op2;
4090
4091 assign(op1, get_gpr_dw0(r1));
4092 op2 = (ULong)i2;
4093 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4094 mkU64(op2)));
4095
4096 return "clgfi";
4097}
4098
4099static HChar *
4100s390_irgen_CLI(UChar i2, IRTemp op1addr)
4101{
4102 IRTemp op1 = newTemp(Ity_I8);
4103 UChar op2;
4104
4105 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4106 op2 = i2;
4107 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4108 mkU8(op2)));
4109
4110 return "cli";
4111}
4112
4113static HChar *
4114s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4115{
4116 IRTemp op1 = newTemp(Ity_I8);
4117 UChar op2;
4118
4119 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4120 op2 = i2;
4121 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4122 mkU8(op2)));
4123
4124 return "cliy";
4125}
4126
4127static HChar *
4128s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4129{
4130 IRTemp op1 = newTemp(Ity_I32);
4131 UInt op2;
4132
4133 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4134 op2 = (UInt)i2;
4135 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4136 mkU32(op2)));
4137
4138 return "clfhsi";
4139}
4140
4141static HChar *
4142s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4143{
4144 IRTemp op1 = newTemp(Ity_I64);
4145 ULong op2;
4146
4147 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4148 op2 = (ULong)i2;
4149 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4150 mkU64(op2)));
4151
4152 return "clghsi";
4153}
4154
4155static HChar *
4156s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4157{
4158 IRTemp op1 = newTemp(Ity_I16);
4159 UShort op2;
4160
4161 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4162 op2 = i2;
4163 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4164 mkU16(op2)));
4165
4166 return "clhhsi";
4167}
4168
4169static HChar *
4170s390_irgen_CLRL(UChar r1, UInt i2)
4171{
4172 IRTemp op1 = newTemp(Ity_I32);
4173 IRTemp op2 = newTemp(Ity_I32);
4174
4175 assign(op1, get_gpr_w1(r1));
4176 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4177 i2 << 1))));
4178 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4179
4180 return "clrl";
4181}
4182
4183static HChar *
4184s390_irgen_CLGRL(UChar r1, UInt i2)
4185{
4186 IRTemp op1 = newTemp(Ity_I64);
4187 IRTemp op2 = newTemp(Ity_I64);
4188
4189 assign(op1, get_gpr_dw0(r1));
4190 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4191 i2 << 1))));
4192 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4193
4194 return "clgrl";
4195}
4196
4197static HChar *
4198s390_irgen_CLGFRL(UChar r1, UInt i2)
4199{
4200 IRTemp op1 = newTemp(Ity_I64);
4201 IRTemp op2 = newTemp(Ity_I64);
4202
4203 assign(op1, get_gpr_dw0(r1));
4204 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4205 ((ULong)(Long)(Int)i2 << 1)))));
4206 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4207
4208 return "clgfrl";
4209}
4210
4211static HChar *
4212s390_irgen_CLHRL(UChar r1, UInt i2)
4213{
4214 IRTemp op1 = newTemp(Ity_I32);
4215 IRTemp op2 = newTemp(Ity_I32);
4216
4217 assign(op1, get_gpr_w1(r1));
4218 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4219 ((ULong)(Long)(Int)i2 << 1)))));
4220 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4221
4222 return "clhrl";
4223}
4224
4225static HChar *
4226s390_irgen_CLGHRL(UChar r1, UInt i2)
4227{
4228 IRTemp op1 = newTemp(Ity_I64);
4229 IRTemp op2 = newTemp(Ity_I64);
4230
4231 assign(op1, get_gpr_dw0(r1));
4232 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4233 ((ULong)(Long)(Int)i2 << 1)))));
4234 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4235
4236 return "clghrl";
4237}
4238
4239static HChar *
4240s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4241{
4242 IRTemp op1 = newTemp(Ity_I32);
4243 IRTemp op2 = newTemp(Ity_I32);
sewardj2019a972011-03-07 16:04:07 +00004244 IRTemp cond = newTemp(Ity_I32);
4245
4246 if (m3 == 0) {
4247 } else {
4248 if (m3 == 14) {
4249 always_goto(mkexpr(op4addr));
4250 } else {
4251 assign(op1, get_gpr_w1(r1));
4252 assign(op2, get_gpr_w1(r2));
florianff9613f2012-05-12 15:26:44 +00004253 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE,
4254 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00004255 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4256 mkU32(0)), mkexpr(op4addr));
4257 }
4258 }
4259
4260 return "clrb";
4261}
4262
4263static HChar *
4264s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4265{
4266 IRTemp op1 = newTemp(Ity_I64);
4267 IRTemp op2 = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00004268 IRTemp cond = newTemp(Ity_I32);
4269
4270 if (m3 == 0) {
4271 } else {
4272 if (m3 == 14) {
4273 always_goto(mkexpr(op4addr));
4274 } else {
4275 assign(op1, get_gpr_dw0(r1));
4276 assign(op2, get_gpr_dw0(r2));
florianff9613f2012-05-12 15:26:44 +00004277 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE,
4278 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00004279 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4280 mkU32(0)), mkexpr(op4addr));
4281 }
4282 }
4283
4284 return "clgrb";
4285}
4286
4287static HChar *
4288s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4289{
4290 IRTemp op1 = newTemp(Ity_I32);
4291 IRTemp op2 = newTemp(Ity_I32);
sewardj2019a972011-03-07 16:04:07 +00004292 IRTemp cond = newTemp(Ity_I32);
4293
4294 if (m3 == 0) {
4295 } else {
4296 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004297 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004298 } else {
4299 assign(op1, get_gpr_w1(r1));
4300 assign(op2, get_gpr_w1(r2));
florianff9613f2012-05-12 15:26:44 +00004301 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE,
4302 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00004303 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4304 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4305
4306 }
4307 }
4308
4309 return "clrj";
4310}
4311
4312static HChar *
4313s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4314{
4315 IRTemp op1 = newTemp(Ity_I64);
4316 IRTemp op2 = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00004317 IRTemp cond = newTemp(Ity_I32);
4318
4319 if (m3 == 0) {
4320 } else {
4321 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004322 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004323 } else {
4324 assign(op1, get_gpr_dw0(r1));
4325 assign(op2, get_gpr_dw0(r2));
florianff9613f2012-05-12 15:26:44 +00004326 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE,
4327 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00004328 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4329 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4330
4331 }
4332 }
4333
4334 return "clgrj";
4335}
4336
4337static HChar *
4338s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4339{
4340 IRTemp op1 = newTemp(Ity_I32);
4341 UInt op2;
sewardj2019a972011-03-07 16:04:07 +00004342 IRTemp cond = newTemp(Ity_I32);
4343
4344 if (m3 == 0) {
4345 } else {
4346 if (m3 == 14) {
4347 always_goto(mkexpr(op4addr));
4348 } else {
4349 assign(op1, get_gpr_w1(r1));
4350 op2 = (UInt)i2;
florianff9613f2012-05-12 15:26:44 +00004351 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1,
4352 mktemp(Ity_I32, mkU32(op2))));
sewardj2019a972011-03-07 16:04:07 +00004353 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4354 mkU32(0)), mkexpr(op4addr));
4355 }
4356 }
4357
4358 return "clib";
4359}
4360
4361static HChar *
4362s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4363{
4364 IRTemp op1 = newTemp(Ity_I64);
4365 ULong op2;
sewardj2019a972011-03-07 16:04:07 +00004366 IRTemp cond = newTemp(Ity_I32);
4367
4368 if (m3 == 0) {
4369 } else {
4370 if (m3 == 14) {
4371 always_goto(mkexpr(op4addr));
4372 } else {
4373 assign(op1, get_gpr_dw0(r1));
4374 op2 = (ULong)i2;
florianff9613f2012-05-12 15:26:44 +00004375 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1,
4376 mktemp(Ity_I64, mkU64(op2))));
sewardj2019a972011-03-07 16:04:07 +00004377 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4378 mkU32(0)), mkexpr(op4addr));
4379 }
4380 }
4381
4382 return "clgib";
4383}
4384
4385static HChar *
4386s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4387{
4388 IRTemp op1 = newTemp(Ity_I32);
4389 UInt op2;
sewardj2019a972011-03-07 16:04:07 +00004390 IRTemp cond = newTemp(Ity_I32);
4391
4392 if (m3 == 0) {
4393 } else {
4394 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004395 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004396 } else {
4397 assign(op1, get_gpr_w1(r1));
4398 op2 = (UInt)i2;
florianff9613f2012-05-12 15:26:44 +00004399 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1,
4400 mktemp(Ity_I32, mkU32(op2))));
sewardj2019a972011-03-07 16:04:07 +00004401 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4402 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4403
4404 }
4405 }
4406
4407 return "clij";
4408}
4409
4410static HChar *
4411s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4412{
4413 IRTemp op1 = newTemp(Ity_I64);
4414 ULong op2;
sewardj2019a972011-03-07 16:04:07 +00004415 IRTemp cond = newTemp(Ity_I32);
4416
4417 if (m3 == 0) {
4418 } else {
4419 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004420 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004421 } else {
4422 assign(op1, get_gpr_dw0(r1));
4423 op2 = (ULong)i2;
florianff9613f2012-05-12 15:26:44 +00004424 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1,
4425 mktemp(Ity_I64, mkU64(op2))));
sewardj2019a972011-03-07 16:04:07 +00004426 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4427 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4428
4429 }
4430 }
4431
4432 return "clgij";
4433}
4434
4435static HChar *
4436s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4437{
4438 IRTemp op1 = newTemp(Ity_I32);
4439 IRTemp op2 = newTemp(Ity_I32);
4440 IRTemp b0 = newTemp(Ity_I32);
4441 IRTemp b1 = newTemp(Ity_I32);
4442 IRTemp b2 = newTemp(Ity_I32);
4443 IRTemp b3 = newTemp(Ity_I32);
4444 IRTemp c0 = newTemp(Ity_I32);
4445 IRTemp c1 = newTemp(Ity_I32);
4446 IRTemp c2 = newTemp(Ity_I32);
4447 IRTemp c3 = newTemp(Ity_I32);
4448 UChar n;
4449
4450 n = 0;
4451 if ((r3 & 8) != 0) {
4452 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4453 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4454 n = n + 1;
4455 } else {
4456 assign(b0, mkU32(0));
4457 assign(c0, mkU32(0));
4458 }
4459 if ((r3 & 4) != 0) {
4460 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4461 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4462 mkU64(n)))));
4463 n = n + 1;
4464 } else {
4465 assign(b1, mkU32(0));
4466 assign(c1, mkU32(0));
4467 }
4468 if ((r3 & 2) != 0) {
4469 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4470 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4471 mkU64(n)))));
4472 n = n + 1;
4473 } else {
4474 assign(b2, mkU32(0));
4475 assign(c2, mkU32(0));
4476 }
4477 if ((r3 & 1) != 0) {
4478 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4479 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4480 mkU64(n)))));
4481 n = n + 1;
4482 } else {
4483 assign(b3, mkU32(0));
4484 assign(c3, mkU32(0));
4485 }
4486 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4487 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4488 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4489 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4490 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4491 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4492 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4493
4494 return "clm";
4495}
4496
4497static HChar *
4498s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4499{
4500 IRTemp op1 = newTemp(Ity_I32);
4501 IRTemp op2 = newTemp(Ity_I32);
4502 IRTemp b0 = newTemp(Ity_I32);
4503 IRTemp b1 = newTemp(Ity_I32);
4504 IRTemp b2 = newTemp(Ity_I32);
4505 IRTemp b3 = newTemp(Ity_I32);
4506 IRTemp c0 = newTemp(Ity_I32);
4507 IRTemp c1 = newTemp(Ity_I32);
4508 IRTemp c2 = newTemp(Ity_I32);
4509 IRTemp c3 = newTemp(Ity_I32);
4510 UChar n;
4511
4512 n = 0;
4513 if ((r3 & 8) != 0) {
4514 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4515 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4516 n = n + 1;
4517 } else {
4518 assign(b0, mkU32(0));
4519 assign(c0, mkU32(0));
4520 }
4521 if ((r3 & 4) != 0) {
4522 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4523 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4524 mkU64(n)))));
4525 n = n + 1;
4526 } else {
4527 assign(b1, mkU32(0));
4528 assign(c1, mkU32(0));
4529 }
4530 if ((r3 & 2) != 0) {
4531 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4532 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4533 mkU64(n)))));
4534 n = n + 1;
4535 } else {
4536 assign(b2, mkU32(0));
4537 assign(c2, mkU32(0));
4538 }
4539 if ((r3 & 1) != 0) {
4540 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4541 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4542 mkU64(n)))));
4543 n = n + 1;
4544 } else {
4545 assign(b3, mkU32(0));
4546 assign(c3, mkU32(0));
4547 }
4548 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4549 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4550 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4551 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4552 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4553 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4554 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4555
4556 return "clmy";
4557}
4558
4559static HChar *
4560s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4561{
4562 IRTemp op1 = newTemp(Ity_I32);
4563 IRTemp op2 = newTemp(Ity_I32);
4564 IRTemp b0 = newTemp(Ity_I32);
4565 IRTemp b1 = newTemp(Ity_I32);
4566 IRTemp b2 = newTemp(Ity_I32);
4567 IRTemp b3 = newTemp(Ity_I32);
4568 IRTemp c0 = newTemp(Ity_I32);
4569 IRTemp c1 = newTemp(Ity_I32);
4570 IRTemp c2 = newTemp(Ity_I32);
4571 IRTemp c3 = newTemp(Ity_I32);
4572 UChar n;
4573
4574 n = 0;
4575 if ((r3 & 8) != 0) {
4576 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4577 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4578 n = n + 1;
4579 } else {
4580 assign(b0, mkU32(0));
4581 assign(c0, mkU32(0));
4582 }
4583 if ((r3 & 4) != 0) {
4584 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4585 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4586 mkU64(n)))));
4587 n = n + 1;
4588 } else {
4589 assign(b1, mkU32(0));
4590 assign(c1, mkU32(0));
4591 }
4592 if ((r3 & 2) != 0) {
4593 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4594 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4595 mkU64(n)))));
4596 n = n + 1;
4597 } else {
4598 assign(b2, mkU32(0));
4599 assign(c2, mkU32(0));
4600 }
4601 if ((r3 & 1) != 0) {
4602 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4603 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4604 mkU64(n)))));
4605 n = n + 1;
4606 } else {
4607 assign(b3, mkU32(0));
4608 assign(c3, mkU32(0));
4609 }
4610 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4611 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4612 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4613 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4614 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4615 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4616 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4617
4618 return "clmh";
4619}
4620
4621static HChar *
4622s390_irgen_CLHHR(UChar r1, UChar r2)
4623{
4624 IRTemp op1 = newTemp(Ity_I32);
4625 IRTemp op2 = newTemp(Ity_I32);
4626
4627 assign(op1, get_gpr_w0(r1));
4628 assign(op2, get_gpr_w0(r2));
4629 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4630
4631 return "clhhr";
4632}
4633
4634static HChar *
4635s390_irgen_CLHLR(UChar r1, UChar r2)
4636{
4637 IRTemp op1 = newTemp(Ity_I32);
4638 IRTemp op2 = newTemp(Ity_I32);
4639
4640 assign(op1, get_gpr_w0(r1));
4641 assign(op2, get_gpr_w1(r2));
4642 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4643
4644 return "clhlr";
4645}
4646
4647static HChar *
4648s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4649{
4650 IRTemp op1 = newTemp(Ity_I32);
4651 IRTemp op2 = newTemp(Ity_I32);
4652
4653 assign(op1, get_gpr_w0(r1));
4654 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4655 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4656
4657 return "clhf";
4658}
4659
4660static HChar *
4661s390_irgen_CLIH(UChar r1, UInt i2)
4662{
4663 IRTemp op1 = newTemp(Ity_I32);
4664 UInt op2;
4665
4666 assign(op1, get_gpr_w0(r1));
4667 op2 = i2;
4668 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4669 mkU32(op2)));
4670
4671 return "clih";
4672}
4673
4674static HChar *
4675s390_irgen_CPYA(UChar r1, UChar r2)
4676{
4677 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004678 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004679 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4680
4681 return "cpya";
4682}
4683
4684static HChar *
4685s390_irgen_XR(UChar r1, UChar r2)
4686{
4687 IRTemp op1 = newTemp(Ity_I32);
4688 IRTemp op2 = newTemp(Ity_I32);
4689 IRTemp result = newTemp(Ity_I32);
4690
4691 if (r1 == r2) {
4692 assign(result, mkU32(0));
4693 } else {
4694 assign(op1, get_gpr_w1(r1));
4695 assign(op2, get_gpr_w1(r2));
4696 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4697 }
4698 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4699 put_gpr_w1(r1, mkexpr(result));
4700
4701 return "xr";
4702}
4703
4704static HChar *
4705s390_irgen_XGR(UChar r1, UChar r2)
4706{
4707 IRTemp op1 = newTemp(Ity_I64);
4708 IRTemp op2 = newTemp(Ity_I64);
4709 IRTemp result = newTemp(Ity_I64);
4710
4711 if (r1 == r2) {
4712 assign(result, mkU64(0));
4713 } else {
4714 assign(op1, get_gpr_dw0(r1));
4715 assign(op2, get_gpr_dw0(r2));
4716 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4717 }
4718 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4719 put_gpr_dw0(r1, mkexpr(result));
4720
4721 return "xgr";
4722}
4723
4724static HChar *
4725s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4726{
4727 IRTemp op2 = newTemp(Ity_I32);
4728 IRTemp op3 = newTemp(Ity_I32);
4729 IRTemp result = newTemp(Ity_I32);
4730
4731 assign(op2, get_gpr_w1(r2));
4732 assign(op3, get_gpr_w1(r3));
4733 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4734 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4735 put_gpr_w1(r1, mkexpr(result));
4736
4737 return "xrk";
4738}
4739
4740static HChar *
4741s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4742{
4743 IRTemp op2 = newTemp(Ity_I64);
4744 IRTemp op3 = newTemp(Ity_I64);
4745 IRTemp result = newTemp(Ity_I64);
4746
4747 assign(op2, get_gpr_dw0(r2));
4748 assign(op3, get_gpr_dw0(r3));
4749 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4750 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4751 put_gpr_dw0(r1, mkexpr(result));
4752
4753 return "xgrk";
4754}
4755
4756static HChar *
4757s390_irgen_X(UChar r1, IRTemp op2addr)
4758{
4759 IRTemp op1 = newTemp(Ity_I32);
4760 IRTemp op2 = newTemp(Ity_I32);
4761 IRTemp result = newTemp(Ity_I32);
4762
4763 assign(op1, get_gpr_w1(r1));
4764 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4765 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4766 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4767 put_gpr_w1(r1, mkexpr(result));
4768
4769 return "x";
4770}
4771
4772static HChar *
4773s390_irgen_XY(UChar r1, IRTemp op2addr)
4774{
4775 IRTemp op1 = newTemp(Ity_I32);
4776 IRTemp op2 = newTemp(Ity_I32);
4777 IRTemp result = newTemp(Ity_I32);
4778
4779 assign(op1, get_gpr_w1(r1));
4780 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4781 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4782 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4783 put_gpr_w1(r1, mkexpr(result));
4784
4785 return "xy";
4786}
4787
4788static HChar *
4789s390_irgen_XG(UChar r1, IRTemp op2addr)
4790{
4791 IRTemp op1 = newTemp(Ity_I64);
4792 IRTemp op2 = newTemp(Ity_I64);
4793 IRTemp result = newTemp(Ity_I64);
4794
4795 assign(op1, get_gpr_dw0(r1));
4796 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4797 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4798 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4799 put_gpr_dw0(r1, mkexpr(result));
4800
4801 return "xg";
4802}
4803
4804static HChar *
4805s390_irgen_XI(UChar i2, IRTemp op1addr)
4806{
4807 IRTemp op1 = newTemp(Ity_I8);
4808 UChar op2;
4809 IRTemp result = newTemp(Ity_I8);
4810
4811 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4812 op2 = i2;
4813 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4814 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4815 store(mkexpr(op1addr), mkexpr(result));
4816
4817 return "xi";
4818}
4819
4820static HChar *
4821s390_irgen_XIY(UChar i2, IRTemp op1addr)
4822{
4823 IRTemp op1 = newTemp(Ity_I8);
4824 UChar op2;
4825 IRTemp result = newTemp(Ity_I8);
4826
4827 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4828 op2 = i2;
4829 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4830 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4831 store(mkexpr(op1addr), mkexpr(result));
4832
4833 return "xiy";
4834}
4835
4836static HChar *
4837s390_irgen_XIHF(UChar r1, UInt i2)
4838{
4839 IRTemp op1 = newTemp(Ity_I32);
4840 UInt op2;
4841 IRTemp result = newTemp(Ity_I32);
4842
4843 assign(op1, get_gpr_w0(r1));
4844 op2 = i2;
4845 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4846 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4847 put_gpr_w0(r1, mkexpr(result));
4848
4849 return "xihf";
4850}
4851
4852static HChar *
4853s390_irgen_XILF(UChar r1, UInt i2)
4854{
4855 IRTemp op1 = newTemp(Ity_I32);
4856 UInt op2;
4857 IRTemp result = newTemp(Ity_I32);
4858
4859 assign(op1, get_gpr_w1(r1));
4860 op2 = i2;
4861 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4862 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4863 put_gpr_w1(r1, mkexpr(result));
4864
4865 return "xilf";
4866}
4867
4868static HChar *
4869s390_irgen_EAR(UChar r1, UChar r2)
4870{
4871 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004872 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004873 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4874
4875 return "ear";
4876}
4877
4878static HChar *
4879s390_irgen_IC(UChar r1, IRTemp op2addr)
4880{
4881 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4882
4883 return "ic";
4884}
4885
4886static HChar *
4887s390_irgen_ICY(UChar r1, IRTemp op2addr)
4888{
4889 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4890
4891 return "icy";
4892}
4893
4894static HChar *
4895s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4896{
4897 UChar n;
4898 IRTemp result = newTemp(Ity_I32);
4899 UInt mask;
4900
4901 n = 0;
4902 mask = (UInt)r3;
4903 if ((mask & 8) != 0) {
4904 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4905 n = n + 1;
4906 }
4907 if ((mask & 4) != 0) {
4908 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4909
4910 n = n + 1;
4911 }
4912 if ((mask & 2) != 0) {
4913 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4914
4915 n = n + 1;
4916 }
4917 if ((mask & 1) != 0) {
4918 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4919
4920 n = n + 1;
4921 }
4922 assign(result, get_gpr_w1(r1));
4923 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4924 mkU32(mask)));
4925
4926 return "icm";
4927}
4928
4929static HChar *
4930s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4931{
4932 UChar n;
4933 IRTemp result = newTemp(Ity_I32);
4934 UInt mask;
4935
4936 n = 0;
4937 mask = (UInt)r3;
4938 if ((mask & 8) != 0) {
4939 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4940 n = n + 1;
4941 }
4942 if ((mask & 4) != 0) {
4943 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4944
4945 n = n + 1;
4946 }
4947 if ((mask & 2) != 0) {
4948 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4949
4950 n = n + 1;
4951 }
4952 if ((mask & 1) != 0) {
4953 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4954
4955 n = n + 1;
4956 }
4957 assign(result, get_gpr_w1(r1));
4958 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4959 mkU32(mask)));
4960
4961 return "icmy";
4962}
4963
4964static HChar *
4965s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
4966{
4967 UChar n;
4968 IRTemp result = newTemp(Ity_I32);
4969 UInt mask;
4970
4971 n = 0;
4972 mask = (UInt)r3;
4973 if ((mask & 8) != 0) {
4974 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
4975 n = n + 1;
4976 }
4977 if ((mask & 4) != 0) {
4978 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4979
4980 n = n + 1;
4981 }
4982 if ((mask & 2) != 0) {
4983 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4984
4985 n = n + 1;
4986 }
4987 if ((mask & 1) != 0) {
4988 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4989
4990 n = n + 1;
4991 }
4992 assign(result, get_gpr_w0(r1));
4993 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4994 mkU32(mask)));
4995
4996 return "icmh";
4997}
4998
4999static HChar *
5000s390_irgen_IIHF(UChar r1, UInt i2)
5001{
5002 put_gpr_w0(r1, mkU32(i2));
5003
5004 return "iihf";
5005}
5006
5007static HChar *
5008s390_irgen_IIHH(UChar r1, UShort i2)
5009{
5010 put_gpr_hw0(r1, mkU16(i2));
5011
5012 return "iihh";
5013}
5014
5015static HChar *
5016s390_irgen_IIHL(UChar r1, UShort i2)
5017{
5018 put_gpr_hw1(r1, mkU16(i2));
5019
5020 return "iihl";
5021}
5022
5023static HChar *
5024s390_irgen_IILF(UChar r1, UInt i2)
5025{
5026 put_gpr_w1(r1, mkU32(i2));
5027
5028 return "iilf";
5029}
5030
5031static HChar *
5032s390_irgen_IILH(UChar r1, UShort i2)
5033{
5034 put_gpr_hw2(r1, mkU16(i2));
5035
5036 return "iilh";
5037}
5038
5039static HChar *
5040s390_irgen_IILL(UChar r1, UShort i2)
5041{
5042 put_gpr_hw3(r1, mkU16(i2));
5043
5044 return "iill";
5045}
5046
5047static HChar *
5048s390_irgen_LR(UChar r1, UChar r2)
5049{
5050 put_gpr_w1(r1, get_gpr_w1(r2));
5051
5052 return "lr";
5053}
5054
5055static HChar *
5056s390_irgen_LGR(UChar r1, UChar r2)
5057{
5058 put_gpr_dw0(r1, get_gpr_dw0(r2));
5059
5060 return "lgr";
5061}
5062
5063static HChar *
5064s390_irgen_LGFR(UChar r1, UChar r2)
5065{
5066 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5067
5068 return "lgfr";
5069}
5070
5071static HChar *
5072s390_irgen_L(UChar r1, IRTemp op2addr)
5073{
5074 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5075
5076 return "l";
5077}
5078
5079static HChar *
5080s390_irgen_LY(UChar r1, IRTemp op2addr)
5081{
5082 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5083
5084 return "ly";
5085}
5086
5087static HChar *
5088s390_irgen_LG(UChar r1, IRTemp op2addr)
5089{
5090 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5091
5092 return "lg";
5093}
5094
5095static HChar *
5096s390_irgen_LGF(UChar r1, IRTemp op2addr)
5097{
5098 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5099
5100 return "lgf";
5101}
5102
5103static HChar *
5104s390_irgen_LGFI(UChar r1, UInt i2)
5105{
5106 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5107
5108 return "lgfi";
5109}
5110
5111static HChar *
5112s390_irgen_LRL(UChar r1, UInt i2)
5113{
5114 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5115 i2 << 1))));
5116
5117 return "lrl";
5118}
5119
5120static HChar *
5121s390_irgen_LGRL(UChar r1, UInt i2)
5122{
5123 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5124 i2 << 1))));
5125
5126 return "lgrl";
5127}
5128
5129static HChar *
5130s390_irgen_LGFRL(UChar r1, UInt i2)
5131{
5132 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5133 ((ULong)(Long)(Int)i2 << 1)))));
5134
5135 return "lgfrl";
5136}
5137
5138static HChar *
5139s390_irgen_LA(UChar r1, IRTemp op2addr)
5140{
5141 put_gpr_dw0(r1, mkexpr(op2addr));
5142
5143 return "la";
5144}
5145
5146static HChar *
5147s390_irgen_LAY(UChar r1, IRTemp op2addr)
5148{
5149 put_gpr_dw0(r1, mkexpr(op2addr));
5150
5151 return "lay";
5152}
5153
5154static HChar *
5155s390_irgen_LAE(UChar r1, IRTemp op2addr)
5156{
5157 put_gpr_dw0(r1, mkexpr(op2addr));
5158
5159 return "lae";
5160}
5161
5162static HChar *
5163s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5164{
5165 put_gpr_dw0(r1, mkexpr(op2addr));
5166
5167 return "laey";
5168}
5169
5170static HChar *
5171s390_irgen_LARL(UChar r1, UInt i2)
5172{
5173 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5174
5175 return "larl";
5176}
5177
5178static HChar *
5179s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5180{
5181 IRTemp op2 = newTemp(Ity_I32);
5182 IRTemp op3 = newTemp(Ity_I32);
5183 IRTemp result = newTemp(Ity_I32);
5184
5185 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5186 assign(op3, get_gpr_w1(r3));
5187 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5188 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5189 store(mkexpr(op2addr), mkexpr(result));
5190 put_gpr_w1(r1, mkexpr(op2));
5191
5192 return "laa";
5193}
5194
5195static HChar *
5196s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5197{
5198 IRTemp op2 = newTemp(Ity_I64);
5199 IRTemp op3 = newTemp(Ity_I64);
5200 IRTemp result = newTemp(Ity_I64);
5201
5202 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5203 assign(op3, get_gpr_dw0(r3));
5204 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5205 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5206 store(mkexpr(op2addr), mkexpr(result));
5207 put_gpr_dw0(r1, mkexpr(op2));
5208
5209 return "laag";
5210}
5211
5212static HChar *
5213s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5214{
5215 IRTemp op2 = newTemp(Ity_I32);
5216 IRTemp op3 = newTemp(Ity_I32);
5217 IRTemp result = newTemp(Ity_I32);
5218
5219 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5220 assign(op3, get_gpr_w1(r3));
5221 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5222 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5223 store(mkexpr(op2addr), mkexpr(result));
5224 put_gpr_w1(r1, mkexpr(op2));
5225
5226 return "laal";
5227}
5228
5229static HChar *
5230s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5231{
5232 IRTemp op2 = newTemp(Ity_I64);
5233 IRTemp op3 = newTemp(Ity_I64);
5234 IRTemp result = newTemp(Ity_I64);
5235
5236 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5237 assign(op3, get_gpr_dw0(r3));
5238 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5239 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5240 store(mkexpr(op2addr), mkexpr(result));
5241 put_gpr_dw0(r1, mkexpr(op2));
5242
5243 return "laalg";
5244}
5245
5246static HChar *
5247s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5248{
5249 IRTemp op2 = newTemp(Ity_I32);
5250 IRTemp op3 = newTemp(Ity_I32);
5251 IRTemp result = newTemp(Ity_I32);
5252
5253 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5254 assign(op3, get_gpr_w1(r3));
5255 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5256 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5257 store(mkexpr(op2addr), mkexpr(result));
5258 put_gpr_w1(r1, mkexpr(op2));
5259
5260 return "lan";
5261}
5262
5263static HChar *
5264s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5265{
5266 IRTemp op2 = newTemp(Ity_I64);
5267 IRTemp op3 = newTemp(Ity_I64);
5268 IRTemp result = newTemp(Ity_I64);
5269
5270 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5271 assign(op3, get_gpr_dw0(r3));
5272 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5273 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5274 store(mkexpr(op2addr), mkexpr(result));
5275 put_gpr_dw0(r1, mkexpr(op2));
5276
5277 return "lang";
5278}
5279
5280static HChar *
5281s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5282{
5283 IRTemp op2 = newTemp(Ity_I32);
5284 IRTemp op3 = newTemp(Ity_I32);
5285 IRTemp result = newTemp(Ity_I32);
5286
5287 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5288 assign(op3, get_gpr_w1(r3));
5289 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5290 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5291 store(mkexpr(op2addr), mkexpr(result));
5292 put_gpr_w1(r1, mkexpr(op2));
5293
5294 return "lax";
5295}
5296
5297static HChar *
5298s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5299{
5300 IRTemp op2 = newTemp(Ity_I64);
5301 IRTemp op3 = newTemp(Ity_I64);
5302 IRTemp result = newTemp(Ity_I64);
5303
5304 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5305 assign(op3, get_gpr_dw0(r3));
5306 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5307 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5308 store(mkexpr(op2addr), mkexpr(result));
5309 put_gpr_dw0(r1, mkexpr(op2));
5310
5311 return "laxg";
5312}
5313
5314static HChar *
5315s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5316{
5317 IRTemp op2 = newTemp(Ity_I32);
5318 IRTemp op3 = newTemp(Ity_I32);
5319 IRTemp result = newTemp(Ity_I32);
5320
5321 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5322 assign(op3, get_gpr_w1(r3));
5323 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5324 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5325 store(mkexpr(op2addr), mkexpr(result));
5326 put_gpr_w1(r1, mkexpr(op2));
5327
5328 return "lao";
5329}
5330
5331static HChar *
5332s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5333{
5334 IRTemp op2 = newTemp(Ity_I64);
5335 IRTemp op3 = newTemp(Ity_I64);
5336 IRTemp result = newTemp(Ity_I64);
5337
5338 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5339 assign(op3, get_gpr_dw0(r3));
5340 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5341 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5342 store(mkexpr(op2addr), mkexpr(result));
5343 put_gpr_dw0(r1, mkexpr(op2));
5344
5345 return "laog";
5346}
5347
5348static HChar *
5349s390_irgen_LTR(UChar r1, UChar r2)
5350{
5351 IRTemp op2 = newTemp(Ity_I32);
5352
5353 assign(op2, get_gpr_w1(r2));
5354 put_gpr_w1(r1, mkexpr(op2));
5355 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5356
5357 return "ltr";
5358}
5359
5360static HChar *
5361s390_irgen_LTGR(UChar r1, UChar r2)
5362{
5363 IRTemp op2 = newTemp(Ity_I64);
5364
5365 assign(op2, get_gpr_dw0(r2));
5366 put_gpr_dw0(r1, mkexpr(op2));
5367 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5368
5369 return "ltgr";
5370}
5371
5372static HChar *
5373s390_irgen_LTGFR(UChar r1, UChar r2)
5374{
5375 IRTemp op2 = newTemp(Ity_I64);
5376
5377 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5378 put_gpr_dw0(r1, mkexpr(op2));
5379 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5380
5381 return "ltgfr";
5382}
5383
5384static HChar *
5385s390_irgen_LT(UChar r1, IRTemp op2addr)
5386{
5387 IRTemp op2 = newTemp(Ity_I32);
5388
5389 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5390 put_gpr_w1(r1, mkexpr(op2));
5391 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5392
5393 return "lt";
5394}
5395
5396static HChar *
5397s390_irgen_LTG(UChar r1, IRTemp op2addr)
5398{
5399 IRTemp op2 = newTemp(Ity_I64);
5400
5401 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5402 put_gpr_dw0(r1, mkexpr(op2));
5403 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5404
5405 return "ltg";
5406}
5407
5408static HChar *
5409s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5410{
5411 IRTemp op2 = newTemp(Ity_I64);
5412
5413 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5414 put_gpr_dw0(r1, mkexpr(op2));
5415 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5416
5417 return "ltgf";
5418}
5419
5420static HChar *
5421s390_irgen_LBR(UChar r1, UChar r2)
5422{
5423 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5424
5425 return "lbr";
5426}
5427
5428static HChar *
5429s390_irgen_LGBR(UChar r1, UChar r2)
5430{
5431 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5432
5433 return "lgbr";
5434}
5435
5436static HChar *
5437s390_irgen_LB(UChar r1, IRTemp op2addr)
5438{
5439 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5440
5441 return "lb";
5442}
5443
5444static HChar *
5445s390_irgen_LGB(UChar r1, IRTemp op2addr)
5446{
5447 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5448
5449 return "lgb";
5450}
5451
5452static HChar *
5453s390_irgen_LBH(UChar r1, IRTemp op2addr)
5454{
5455 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5456
5457 return "lbh";
5458}
5459
5460static HChar *
5461s390_irgen_LCR(UChar r1, UChar r2)
5462{
5463 Int op1;
5464 IRTemp op2 = newTemp(Ity_I32);
5465 IRTemp result = newTemp(Ity_I32);
5466
5467 op1 = 0;
5468 assign(op2, get_gpr_w1(r2));
5469 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5470 put_gpr_w1(r1, mkexpr(result));
5471 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5472 op1)), op2);
5473
5474 return "lcr";
5475}
5476
5477static HChar *
5478s390_irgen_LCGR(UChar r1, UChar r2)
5479{
5480 Long op1;
5481 IRTemp op2 = newTemp(Ity_I64);
5482 IRTemp result = newTemp(Ity_I64);
5483
5484 op1 = 0ULL;
5485 assign(op2, get_gpr_dw0(r2));
5486 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5487 put_gpr_dw0(r1, mkexpr(result));
5488 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5489 op1)), op2);
5490
5491 return "lcgr";
5492}
5493
5494static HChar *
5495s390_irgen_LCGFR(UChar r1, UChar r2)
5496{
5497 Long op1;
5498 IRTemp op2 = newTemp(Ity_I64);
5499 IRTemp result = newTemp(Ity_I64);
5500
5501 op1 = 0ULL;
5502 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5503 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5504 put_gpr_dw0(r1, mkexpr(result));
5505 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5506 op1)), op2);
5507
5508 return "lcgfr";
5509}
5510
5511static HChar *
5512s390_irgen_LHR(UChar r1, UChar r2)
5513{
5514 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5515
5516 return "lhr";
5517}
5518
5519static HChar *
5520s390_irgen_LGHR(UChar r1, UChar r2)
5521{
5522 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5523
5524 return "lghr";
5525}
5526
5527static HChar *
5528s390_irgen_LH(UChar r1, IRTemp op2addr)
5529{
5530 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5531
5532 return "lh";
5533}
5534
5535static HChar *
5536s390_irgen_LHY(UChar r1, IRTemp op2addr)
5537{
5538 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5539
5540 return "lhy";
5541}
5542
5543static HChar *
5544s390_irgen_LGH(UChar r1, IRTemp op2addr)
5545{
5546 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5547
5548 return "lgh";
5549}
5550
5551static HChar *
5552s390_irgen_LHI(UChar r1, UShort i2)
5553{
5554 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5555
5556 return "lhi";
5557}
5558
5559static HChar *
5560s390_irgen_LGHI(UChar r1, UShort i2)
5561{
5562 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5563
5564 return "lghi";
5565}
5566
5567static HChar *
5568s390_irgen_LHRL(UChar r1, UInt i2)
5569{
5570 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5571 ((ULong)(Long)(Int)i2 << 1)))));
5572
5573 return "lhrl";
5574}
5575
5576static HChar *
5577s390_irgen_LGHRL(UChar r1, UInt i2)
5578{
5579 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5580 ((ULong)(Long)(Int)i2 << 1)))));
5581
5582 return "lghrl";
5583}
5584
5585static HChar *
5586s390_irgen_LHH(UChar r1, IRTemp op2addr)
5587{
5588 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5589
5590 return "lhh";
5591}
5592
5593static HChar *
5594s390_irgen_LFH(UChar r1, IRTemp op2addr)
5595{
5596 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5597
5598 return "lfh";
5599}
5600
5601static HChar *
5602s390_irgen_LLGFR(UChar r1, UChar r2)
5603{
5604 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5605
5606 return "llgfr";
5607}
5608
5609static HChar *
5610s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5611{
5612 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5613
5614 return "llgf";
5615}
5616
5617static HChar *
5618s390_irgen_LLGFRL(UChar r1, UInt i2)
5619{
5620 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5621 ((ULong)(Long)(Int)i2 << 1)))));
5622
5623 return "llgfrl";
5624}
5625
5626static HChar *
5627s390_irgen_LLCR(UChar r1, UChar r2)
5628{
5629 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5630
5631 return "llcr";
5632}
5633
5634static HChar *
5635s390_irgen_LLGCR(UChar r1, UChar r2)
5636{
5637 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5638
5639 return "llgcr";
5640}
5641
5642static HChar *
5643s390_irgen_LLC(UChar r1, IRTemp op2addr)
5644{
5645 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5646
5647 return "llc";
5648}
5649
5650static HChar *
5651s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5652{
5653 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5654
5655 return "llgc";
5656}
5657
5658static HChar *
5659s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5660{
5661 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5662
5663 return "llch";
5664}
5665
5666static HChar *
5667s390_irgen_LLHR(UChar r1, UChar r2)
5668{
5669 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5670
5671 return "llhr";
5672}
5673
5674static HChar *
5675s390_irgen_LLGHR(UChar r1, UChar r2)
5676{
5677 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5678
5679 return "llghr";
5680}
5681
5682static HChar *
5683s390_irgen_LLH(UChar r1, IRTemp op2addr)
5684{
5685 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5686
5687 return "llh";
5688}
5689
5690static HChar *
5691s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5692{
5693 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5694
5695 return "llgh";
5696}
5697
5698static HChar *
5699s390_irgen_LLHRL(UChar r1, UInt i2)
5700{
5701 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5702 ((ULong)(Long)(Int)i2 << 1)))));
5703
5704 return "llhrl";
5705}
5706
5707static HChar *
5708s390_irgen_LLGHRL(UChar r1, UInt i2)
5709{
5710 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5711 ((ULong)(Long)(Int)i2 << 1)))));
5712
5713 return "llghrl";
5714}
5715
5716static HChar *
5717s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5718{
5719 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5720
5721 return "llhh";
5722}
5723
5724static HChar *
5725s390_irgen_LLIHF(UChar r1, UInt i2)
5726{
5727 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5728
5729 return "llihf";
5730}
5731
5732static HChar *
5733s390_irgen_LLIHH(UChar r1, UShort i2)
5734{
5735 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5736
5737 return "llihh";
5738}
5739
5740static HChar *
5741s390_irgen_LLIHL(UChar r1, UShort i2)
5742{
5743 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5744
5745 return "llihl";
5746}
5747
5748static HChar *
5749s390_irgen_LLILF(UChar r1, UInt i2)
5750{
5751 put_gpr_dw0(r1, mkU64(i2));
5752
5753 return "llilf";
5754}
5755
5756static HChar *
5757s390_irgen_LLILH(UChar r1, UShort i2)
5758{
5759 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5760
5761 return "llilh";
5762}
5763
5764static HChar *
5765s390_irgen_LLILL(UChar r1, UShort i2)
5766{
5767 put_gpr_dw0(r1, mkU64(i2));
5768
5769 return "llill";
5770}
5771
5772static HChar *
5773s390_irgen_LLGTR(UChar r1, UChar r2)
5774{
5775 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5776 mkU32(2147483647))));
5777
5778 return "llgtr";
5779}
5780
5781static HChar *
5782s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5783{
5784 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5785 mkexpr(op2addr)), mkU32(2147483647))));
5786
5787 return "llgt";
5788}
5789
5790static HChar *
5791s390_irgen_LNR(UChar r1, UChar r2)
5792{
5793 IRTemp op2 = newTemp(Ity_I32);
5794 IRTemp result = newTemp(Ity_I32);
5795
5796 assign(op2, get_gpr_w1(r2));
5797 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5798 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5799 put_gpr_w1(r1, mkexpr(result));
5800 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5801
5802 return "lnr";
5803}
5804
5805static HChar *
5806s390_irgen_LNGR(UChar r1, UChar r2)
5807{
5808 IRTemp op2 = newTemp(Ity_I64);
5809 IRTemp result = newTemp(Ity_I64);
5810
5811 assign(op2, get_gpr_dw0(r2));
5812 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5813 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5814 put_gpr_dw0(r1, mkexpr(result));
5815 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5816
5817 return "lngr";
5818}
5819
5820static HChar *
5821s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5822{
5823 IRTemp op2 = newTemp(Ity_I64);
5824 IRTemp result = newTemp(Ity_I64);
5825
5826 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5827 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5828 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5829 put_gpr_dw0(r1, mkexpr(result));
5830 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5831
5832 return "lngfr";
5833}
5834
5835static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005836s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5837{
5838 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5839 guest_IA_next_instr);
5840 put_gpr_w1(r1, get_gpr_w1(r2));
florianf9e1ed72012-04-17 02:41:56 +00005841 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00005842
5843 return "locr";
5844}
5845
5846static HChar *
5847s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5848{
5849 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5850 guest_IA_next_instr);
5851 put_gpr_dw0(r1, get_gpr_dw0(r2));
florianf9e1ed72012-04-17 02:41:56 +00005852 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00005853
5854 return "locgr";
5855}
5856
5857static HChar *
5858s390_irgen_LOC(UChar r1, IRTemp op2addr)
5859{
5860 /* condition is checked in format handler */
5861 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5862
5863 return "loc";
5864}
5865
5866static HChar *
5867s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5868{
5869 /* condition is checked in format handler */
5870 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5871
5872 return "locg";
5873}
5874
5875static HChar *
sewardj2019a972011-03-07 16:04:07 +00005876s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5877{
5878 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5879 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5880 ));
5881
5882 return "lpq";
5883}
5884
5885static HChar *
5886s390_irgen_LPR(UChar r1, UChar r2)
5887{
5888 IRTemp op2 = newTemp(Ity_I32);
5889 IRTemp result = newTemp(Ity_I32);
5890
5891 assign(op2, get_gpr_w1(r2));
5892 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5893 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5894 put_gpr_w1(r1, mkexpr(result));
5895 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5896
5897 return "lpr";
5898}
5899
5900static HChar *
5901s390_irgen_LPGR(UChar r1, UChar r2)
5902{
5903 IRTemp op2 = newTemp(Ity_I64);
5904 IRTemp result = newTemp(Ity_I64);
5905
5906 assign(op2, get_gpr_dw0(r2));
5907 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5908 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5909 put_gpr_dw0(r1, mkexpr(result));
5910 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5911
5912 return "lpgr";
5913}
5914
5915static HChar *
5916s390_irgen_LPGFR(UChar r1, UChar r2)
5917{
5918 IRTemp op2 = newTemp(Ity_I64);
5919 IRTemp result = newTemp(Ity_I64);
5920
5921 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5922 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5923 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5924 put_gpr_dw0(r1, mkexpr(result));
5925 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5926
5927 return "lpgfr";
5928}
5929
5930static HChar *
5931s390_irgen_LRVR(UChar r1, UChar r2)
5932{
5933 IRTemp b0 = newTemp(Ity_I8);
5934 IRTemp b1 = newTemp(Ity_I8);
5935 IRTemp b2 = newTemp(Ity_I8);
5936 IRTemp b3 = newTemp(Ity_I8);
5937
5938 assign(b3, get_gpr_b7(r2));
5939 assign(b2, get_gpr_b6(r2));
5940 assign(b1, get_gpr_b5(r2));
5941 assign(b0, get_gpr_b4(r2));
5942 put_gpr_b4(r1, mkexpr(b3));
5943 put_gpr_b5(r1, mkexpr(b2));
5944 put_gpr_b6(r1, mkexpr(b1));
5945 put_gpr_b7(r1, mkexpr(b0));
5946
5947 return "lrvr";
5948}
5949
5950static HChar *
5951s390_irgen_LRVGR(UChar r1, UChar r2)
5952{
5953 IRTemp b0 = newTemp(Ity_I8);
5954 IRTemp b1 = newTemp(Ity_I8);
5955 IRTemp b2 = newTemp(Ity_I8);
5956 IRTemp b3 = newTemp(Ity_I8);
5957 IRTemp b4 = newTemp(Ity_I8);
5958 IRTemp b5 = newTemp(Ity_I8);
5959 IRTemp b6 = newTemp(Ity_I8);
5960 IRTemp b7 = newTemp(Ity_I8);
5961
5962 assign(b7, get_gpr_b7(r2));
5963 assign(b6, get_gpr_b6(r2));
5964 assign(b5, get_gpr_b5(r2));
5965 assign(b4, get_gpr_b4(r2));
5966 assign(b3, get_gpr_b3(r2));
5967 assign(b2, get_gpr_b2(r2));
5968 assign(b1, get_gpr_b1(r2));
5969 assign(b0, get_gpr_b0(r2));
5970 put_gpr_b0(r1, mkexpr(b7));
5971 put_gpr_b1(r1, mkexpr(b6));
5972 put_gpr_b2(r1, mkexpr(b5));
5973 put_gpr_b3(r1, mkexpr(b4));
5974 put_gpr_b4(r1, mkexpr(b3));
5975 put_gpr_b5(r1, mkexpr(b2));
5976 put_gpr_b6(r1, mkexpr(b1));
5977 put_gpr_b7(r1, mkexpr(b0));
5978
5979 return "lrvgr";
5980}
5981
5982static HChar *
5983s390_irgen_LRVH(UChar r1, IRTemp op2addr)
5984{
5985 IRTemp op2 = newTemp(Ity_I16);
5986
5987 assign(op2, load(Ity_I16, mkexpr(op2addr)));
5988 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
5989 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
5990
5991 return "lrvh";
5992}
5993
5994static HChar *
5995s390_irgen_LRV(UChar r1, IRTemp op2addr)
5996{
5997 IRTemp op2 = newTemp(Ity_I32);
5998
5999 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6000 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
6001 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6002 mkU8(8)), mkU32(255))));
6003 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6004 mkU8(16)), mkU32(255))));
6005 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6006 mkU8(24)), mkU32(255))));
6007
6008 return "lrv";
6009}
6010
6011static HChar *
6012s390_irgen_LRVG(UChar r1, IRTemp op2addr)
6013{
6014 IRTemp op2 = newTemp(Ity_I64);
6015
6016 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6017 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
6018 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6019 mkU8(8)), mkU64(255))));
6020 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6021 mkU8(16)), mkU64(255))));
6022 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6023 mkU8(24)), mkU64(255))));
6024 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6025 mkU8(32)), mkU64(255))));
6026 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6027 mkU8(40)), mkU64(255))));
6028 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6029 mkU8(48)), mkU64(255))));
6030 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6031 mkU8(56)), mkU64(255))));
6032
6033 return "lrvg";
6034}
6035
6036static HChar *
6037s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
6038{
6039 store(mkexpr(op1addr), mkU16(i2));
6040
6041 return "mvhhi";
6042}
6043
6044static HChar *
6045s390_irgen_MVHI(UShort i2, IRTemp op1addr)
6046{
6047 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6048
6049 return "mvhi";
6050}
6051
6052static HChar *
6053s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6054{
6055 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6056
6057 return "mvghi";
6058}
6059
6060static HChar *
6061s390_irgen_MVI(UChar i2, IRTemp op1addr)
6062{
6063 store(mkexpr(op1addr), mkU8(i2));
6064
6065 return "mvi";
6066}
6067
6068static HChar *
6069s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6070{
6071 store(mkexpr(op1addr), mkU8(i2));
6072
6073 return "mviy";
6074}
6075
6076static HChar *
6077s390_irgen_MR(UChar r1, UChar r2)
6078{
6079 IRTemp op1 = newTemp(Ity_I32);
6080 IRTemp op2 = newTemp(Ity_I32);
6081 IRTemp result = newTemp(Ity_I64);
6082
6083 assign(op1, get_gpr_w1(r1 + 1));
6084 assign(op2, get_gpr_w1(r2));
6085 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6086 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6087 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6088
6089 return "mr";
6090}
6091
6092static HChar *
6093s390_irgen_M(UChar r1, IRTemp op2addr)
6094{
6095 IRTemp op1 = newTemp(Ity_I32);
6096 IRTemp op2 = newTemp(Ity_I32);
6097 IRTemp result = newTemp(Ity_I64);
6098
6099 assign(op1, get_gpr_w1(r1 + 1));
6100 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6101 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6102 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6103 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6104
6105 return "m";
6106}
6107
6108static HChar *
6109s390_irgen_MFY(UChar r1, IRTemp op2addr)
6110{
6111 IRTemp op1 = newTemp(Ity_I32);
6112 IRTemp op2 = newTemp(Ity_I32);
6113 IRTemp result = newTemp(Ity_I64);
6114
6115 assign(op1, get_gpr_w1(r1 + 1));
6116 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6117 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6118 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6119 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6120
6121 return "mfy";
6122}
6123
6124static HChar *
6125s390_irgen_MH(UChar r1, IRTemp op2addr)
6126{
6127 IRTemp op1 = newTemp(Ity_I32);
6128 IRTemp op2 = newTemp(Ity_I16);
6129 IRTemp result = newTemp(Ity_I64);
6130
6131 assign(op1, get_gpr_w1(r1));
6132 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6133 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6134 ));
6135 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6136
6137 return "mh";
6138}
6139
6140static HChar *
6141s390_irgen_MHY(UChar r1, IRTemp op2addr)
6142{
6143 IRTemp op1 = newTemp(Ity_I32);
6144 IRTemp op2 = newTemp(Ity_I16);
6145 IRTemp result = newTemp(Ity_I64);
6146
6147 assign(op1, get_gpr_w1(r1));
6148 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6149 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6150 ));
6151 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6152
6153 return "mhy";
6154}
6155
6156static HChar *
6157s390_irgen_MHI(UChar r1, UShort i2)
6158{
6159 IRTemp op1 = newTemp(Ity_I32);
6160 Short op2;
6161 IRTemp result = newTemp(Ity_I64);
6162
6163 assign(op1, get_gpr_w1(r1));
6164 op2 = (Short)i2;
6165 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6166 mkU16((UShort)op2))));
6167 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6168
6169 return "mhi";
6170}
6171
6172static HChar *
6173s390_irgen_MGHI(UChar r1, UShort i2)
6174{
6175 IRTemp op1 = newTemp(Ity_I64);
6176 Short op2;
6177 IRTemp result = newTemp(Ity_I128);
6178
6179 assign(op1, get_gpr_dw0(r1));
6180 op2 = (Short)i2;
6181 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6182 mkU16((UShort)op2))));
6183 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6184
6185 return "mghi";
6186}
6187
6188static HChar *
6189s390_irgen_MLR(UChar r1, UChar r2)
6190{
6191 IRTemp op1 = newTemp(Ity_I32);
6192 IRTemp op2 = newTemp(Ity_I32);
6193 IRTemp result = newTemp(Ity_I64);
6194
6195 assign(op1, get_gpr_w1(r1 + 1));
6196 assign(op2, get_gpr_w1(r2));
6197 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6198 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6199 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6200
6201 return "mlr";
6202}
6203
6204static HChar *
6205s390_irgen_MLGR(UChar r1, UChar r2)
6206{
6207 IRTemp op1 = newTemp(Ity_I64);
6208 IRTemp op2 = newTemp(Ity_I64);
6209 IRTemp result = newTemp(Ity_I128);
6210
6211 assign(op1, get_gpr_dw0(r1 + 1));
6212 assign(op2, get_gpr_dw0(r2));
6213 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6214 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6215 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6216
6217 return "mlgr";
6218}
6219
6220static HChar *
6221s390_irgen_ML(UChar r1, IRTemp op2addr)
6222{
6223 IRTemp op1 = newTemp(Ity_I32);
6224 IRTemp op2 = newTemp(Ity_I32);
6225 IRTemp result = newTemp(Ity_I64);
6226
6227 assign(op1, get_gpr_w1(r1 + 1));
6228 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6229 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6230 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6231 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6232
6233 return "ml";
6234}
6235
6236static HChar *
6237s390_irgen_MLG(UChar r1, IRTemp op2addr)
6238{
6239 IRTemp op1 = newTemp(Ity_I64);
6240 IRTemp op2 = newTemp(Ity_I64);
6241 IRTemp result = newTemp(Ity_I128);
6242
6243 assign(op1, get_gpr_dw0(r1 + 1));
6244 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6245 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6246 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6247 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6248
6249 return "mlg";
6250}
6251
6252static HChar *
6253s390_irgen_MSR(UChar r1, UChar r2)
6254{
6255 IRTemp op1 = newTemp(Ity_I32);
6256 IRTemp op2 = newTemp(Ity_I32);
6257 IRTemp result = newTemp(Ity_I64);
6258
6259 assign(op1, get_gpr_w1(r1));
6260 assign(op2, get_gpr_w1(r2));
6261 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6262 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6263
6264 return "msr";
6265}
6266
6267static HChar *
6268s390_irgen_MSGR(UChar r1, UChar r2)
6269{
6270 IRTemp op1 = newTemp(Ity_I64);
6271 IRTemp op2 = newTemp(Ity_I64);
6272 IRTemp result = newTemp(Ity_I128);
6273
6274 assign(op1, get_gpr_dw0(r1));
6275 assign(op2, get_gpr_dw0(r2));
6276 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6277 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6278
6279 return "msgr";
6280}
6281
6282static HChar *
6283s390_irgen_MSGFR(UChar r1, UChar r2)
6284{
6285 IRTemp op1 = newTemp(Ity_I64);
6286 IRTemp op2 = newTemp(Ity_I32);
6287 IRTemp result = newTemp(Ity_I128);
6288
6289 assign(op1, get_gpr_dw0(r1));
6290 assign(op2, get_gpr_w1(r2));
6291 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6292 ));
6293 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6294
6295 return "msgfr";
6296}
6297
6298static HChar *
6299s390_irgen_MS(UChar r1, IRTemp op2addr)
6300{
6301 IRTemp op1 = newTemp(Ity_I32);
6302 IRTemp op2 = newTemp(Ity_I32);
6303 IRTemp result = newTemp(Ity_I64);
6304
6305 assign(op1, get_gpr_w1(r1));
6306 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6307 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6308 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6309
6310 return "ms";
6311}
6312
6313static HChar *
6314s390_irgen_MSY(UChar r1, IRTemp op2addr)
6315{
6316 IRTemp op1 = newTemp(Ity_I32);
6317 IRTemp op2 = newTemp(Ity_I32);
6318 IRTemp result = newTemp(Ity_I64);
6319
6320 assign(op1, get_gpr_w1(r1));
6321 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6322 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6323 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6324
6325 return "msy";
6326}
6327
6328static HChar *
6329s390_irgen_MSG(UChar r1, IRTemp op2addr)
6330{
6331 IRTemp op1 = newTemp(Ity_I64);
6332 IRTemp op2 = newTemp(Ity_I64);
6333 IRTemp result = newTemp(Ity_I128);
6334
6335 assign(op1, get_gpr_dw0(r1));
6336 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6337 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6338 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6339
6340 return "msg";
6341}
6342
6343static HChar *
6344s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6345{
6346 IRTemp op1 = newTemp(Ity_I64);
6347 IRTemp op2 = newTemp(Ity_I32);
6348 IRTemp result = newTemp(Ity_I128);
6349
6350 assign(op1, get_gpr_dw0(r1));
6351 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6352 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6353 ));
6354 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6355
6356 return "msgf";
6357}
6358
6359static HChar *
6360s390_irgen_MSFI(UChar r1, UInt i2)
6361{
6362 IRTemp op1 = newTemp(Ity_I32);
6363 Int op2;
6364 IRTemp result = newTemp(Ity_I64);
6365
6366 assign(op1, get_gpr_w1(r1));
6367 op2 = (Int)i2;
6368 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6369 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6370
6371 return "msfi";
6372}
6373
6374static HChar *
6375s390_irgen_MSGFI(UChar r1, UInt i2)
6376{
6377 IRTemp op1 = newTemp(Ity_I64);
6378 Int op2;
6379 IRTemp result = newTemp(Ity_I128);
6380
6381 assign(op1, get_gpr_dw0(r1));
6382 op2 = (Int)i2;
6383 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6384 op2))));
6385 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6386
6387 return "msgfi";
6388}
6389
6390static HChar *
6391s390_irgen_OR(UChar r1, UChar r2)
6392{
6393 IRTemp op1 = newTemp(Ity_I32);
6394 IRTemp op2 = newTemp(Ity_I32);
6395 IRTemp result = newTemp(Ity_I32);
6396
6397 assign(op1, get_gpr_w1(r1));
6398 assign(op2, get_gpr_w1(r2));
6399 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6400 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6401 put_gpr_w1(r1, mkexpr(result));
6402
6403 return "or";
6404}
6405
6406static HChar *
6407s390_irgen_OGR(UChar r1, UChar r2)
6408{
6409 IRTemp op1 = newTemp(Ity_I64);
6410 IRTemp op2 = newTemp(Ity_I64);
6411 IRTemp result = newTemp(Ity_I64);
6412
6413 assign(op1, get_gpr_dw0(r1));
6414 assign(op2, get_gpr_dw0(r2));
6415 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6416 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6417 put_gpr_dw0(r1, mkexpr(result));
6418
6419 return "ogr";
6420}
6421
6422static HChar *
6423s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6424{
6425 IRTemp op2 = newTemp(Ity_I32);
6426 IRTemp op3 = newTemp(Ity_I32);
6427 IRTemp result = newTemp(Ity_I32);
6428
6429 assign(op2, get_gpr_w1(r2));
6430 assign(op3, get_gpr_w1(r3));
6431 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6432 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6433 put_gpr_w1(r1, mkexpr(result));
6434
6435 return "ork";
6436}
6437
6438static HChar *
6439s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6440{
6441 IRTemp op2 = newTemp(Ity_I64);
6442 IRTemp op3 = newTemp(Ity_I64);
6443 IRTemp result = newTemp(Ity_I64);
6444
6445 assign(op2, get_gpr_dw0(r2));
6446 assign(op3, get_gpr_dw0(r3));
6447 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6448 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6449 put_gpr_dw0(r1, mkexpr(result));
6450
6451 return "ogrk";
6452}
6453
6454static HChar *
6455s390_irgen_O(UChar r1, IRTemp op2addr)
6456{
6457 IRTemp op1 = newTemp(Ity_I32);
6458 IRTemp op2 = newTemp(Ity_I32);
6459 IRTemp result = newTemp(Ity_I32);
6460
6461 assign(op1, get_gpr_w1(r1));
6462 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6463 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6464 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6465 put_gpr_w1(r1, mkexpr(result));
6466
6467 return "o";
6468}
6469
6470static HChar *
6471s390_irgen_OY(UChar r1, IRTemp op2addr)
6472{
6473 IRTemp op1 = newTemp(Ity_I32);
6474 IRTemp op2 = newTemp(Ity_I32);
6475 IRTemp result = newTemp(Ity_I32);
6476
6477 assign(op1, get_gpr_w1(r1));
6478 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6479 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6480 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6481 put_gpr_w1(r1, mkexpr(result));
6482
6483 return "oy";
6484}
6485
6486static HChar *
6487s390_irgen_OG(UChar r1, IRTemp op2addr)
6488{
6489 IRTemp op1 = newTemp(Ity_I64);
6490 IRTemp op2 = newTemp(Ity_I64);
6491 IRTemp result = newTemp(Ity_I64);
6492
6493 assign(op1, get_gpr_dw0(r1));
6494 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6495 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6496 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6497 put_gpr_dw0(r1, mkexpr(result));
6498
6499 return "og";
6500}
6501
6502static HChar *
6503s390_irgen_OI(UChar i2, IRTemp op1addr)
6504{
6505 IRTemp op1 = newTemp(Ity_I8);
6506 UChar op2;
6507 IRTemp result = newTemp(Ity_I8);
6508
6509 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6510 op2 = i2;
6511 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6512 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6513 store(mkexpr(op1addr), mkexpr(result));
6514
6515 return "oi";
6516}
6517
6518static HChar *
6519s390_irgen_OIY(UChar i2, IRTemp op1addr)
6520{
6521 IRTemp op1 = newTemp(Ity_I8);
6522 UChar op2;
6523 IRTemp result = newTemp(Ity_I8);
6524
6525 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6526 op2 = i2;
6527 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6528 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6529 store(mkexpr(op1addr), mkexpr(result));
6530
6531 return "oiy";
6532}
6533
6534static HChar *
6535s390_irgen_OIHF(UChar r1, UInt i2)
6536{
6537 IRTemp op1 = newTemp(Ity_I32);
6538 UInt op2;
6539 IRTemp result = newTemp(Ity_I32);
6540
6541 assign(op1, get_gpr_w0(r1));
6542 op2 = i2;
6543 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6544 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6545 put_gpr_w0(r1, mkexpr(result));
6546
6547 return "oihf";
6548}
6549
6550static HChar *
6551s390_irgen_OIHH(UChar r1, UShort i2)
6552{
6553 IRTemp op1 = newTemp(Ity_I16);
6554 UShort op2;
6555 IRTemp result = newTemp(Ity_I16);
6556
6557 assign(op1, get_gpr_hw0(r1));
6558 op2 = i2;
6559 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6560 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6561 put_gpr_hw0(r1, mkexpr(result));
6562
6563 return "oihh";
6564}
6565
6566static HChar *
6567s390_irgen_OIHL(UChar r1, UShort i2)
6568{
6569 IRTemp op1 = newTemp(Ity_I16);
6570 UShort op2;
6571 IRTemp result = newTemp(Ity_I16);
6572
6573 assign(op1, get_gpr_hw1(r1));
6574 op2 = i2;
6575 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6576 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6577 put_gpr_hw1(r1, mkexpr(result));
6578
6579 return "oihl";
6580}
6581
6582static HChar *
6583s390_irgen_OILF(UChar r1, UInt i2)
6584{
6585 IRTemp op1 = newTemp(Ity_I32);
6586 UInt op2;
6587 IRTemp result = newTemp(Ity_I32);
6588
6589 assign(op1, get_gpr_w1(r1));
6590 op2 = i2;
6591 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6592 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6593 put_gpr_w1(r1, mkexpr(result));
6594
6595 return "oilf";
6596}
6597
6598static HChar *
6599s390_irgen_OILH(UChar r1, UShort i2)
6600{
6601 IRTemp op1 = newTemp(Ity_I16);
6602 UShort op2;
6603 IRTemp result = newTemp(Ity_I16);
6604
6605 assign(op1, get_gpr_hw2(r1));
6606 op2 = i2;
6607 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6608 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6609 put_gpr_hw2(r1, mkexpr(result));
6610
6611 return "oilh";
6612}
6613
6614static HChar *
6615s390_irgen_OILL(UChar r1, UShort i2)
6616{
6617 IRTemp op1 = newTemp(Ity_I16);
6618 UShort op2;
6619 IRTemp result = newTemp(Ity_I16);
6620
6621 assign(op1, get_gpr_hw3(r1));
6622 op2 = i2;
6623 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6624 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6625 put_gpr_hw3(r1, mkexpr(result));
6626
6627 return "oill";
6628}
6629
6630static HChar *
6631s390_irgen_PFD(void)
6632{
6633
6634 return "pfd";
6635}
6636
6637static HChar *
6638s390_irgen_PFDRL(void)
6639{
6640
6641 return "pfdrl";
6642}
6643
6644static HChar *
6645s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6646{
6647 IRTemp amount = newTemp(Ity_I64);
6648 IRTemp op = newTemp(Ity_I32);
6649
6650 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6651 assign(op, get_gpr_w1(r3));
6652 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6653 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6654 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6655
6656 return "rll";
6657}
6658
6659static HChar *
6660s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6661{
6662 IRTemp amount = newTemp(Ity_I64);
6663 IRTemp op = newTemp(Ity_I64);
6664
6665 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6666 assign(op, get_gpr_dw0(r3));
6667 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6668 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6669 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6670
6671 return "rllg";
6672}
6673
6674static HChar *
6675s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6676{
6677 UChar from;
6678 UChar to;
6679 UChar rot;
6680 UChar t_bit;
6681 ULong mask;
6682 ULong maskc;
6683 IRTemp result = newTemp(Ity_I64);
6684 IRTemp op2 = newTemp(Ity_I64);
6685
6686 from = i3 & 63;
6687 to = i4 & 63;
6688 rot = i5 & 63;
6689 t_bit = i3 & 128;
6690 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6691 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6692 mkU8(64 - rot))));
6693 if (from <= to) {
6694 mask = ~0ULL;
6695 mask = (mask >> from) & (mask << (63 - to));
6696 maskc = ~mask;
6697 } else {
6698 maskc = ~0ULL;
6699 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6700 mask = ~maskc;
6701 }
6702 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6703 ), mkU64(mask)));
6704 if (t_bit == 0) {
6705 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6706 mkU64(maskc)), mkexpr(result)));
6707 }
6708 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6709
6710 return "rnsbg";
6711}
6712
6713static HChar *
6714s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6715{
6716 UChar from;
6717 UChar to;
6718 UChar rot;
6719 UChar t_bit;
6720 ULong mask;
6721 ULong maskc;
6722 IRTemp result = newTemp(Ity_I64);
6723 IRTemp op2 = newTemp(Ity_I64);
6724
6725 from = i3 & 63;
6726 to = i4 & 63;
6727 rot = i5 & 63;
6728 t_bit = i3 & 128;
6729 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6730 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6731 mkU8(64 - rot))));
6732 if (from <= to) {
6733 mask = ~0ULL;
6734 mask = (mask >> from) & (mask << (63 - to));
6735 maskc = ~mask;
6736 } else {
6737 maskc = ~0ULL;
6738 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6739 mask = ~maskc;
6740 }
6741 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6742 ), mkU64(mask)));
6743 if (t_bit == 0) {
6744 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6745 mkU64(maskc)), mkexpr(result)));
6746 }
6747 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6748
6749 return "rxsbg";
6750}
6751
6752static HChar *
6753s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6754{
6755 UChar from;
6756 UChar to;
6757 UChar rot;
6758 UChar t_bit;
6759 ULong mask;
6760 ULong maskc;
6761 IRTemp result = newTemp(Ity_I64);
6762 IRTemp op2 = newTemp(Ity_I64);
6763
6764 from = i3 & 63;
6765 to = i4 & 63;
6766 rot = i5 & 63;
6767 t_bit = i3 & 128;
6768 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6769 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6770 mkU8(64 - rot))));
6771 if (from <= to) {
6772 mask = ~0ULL;
6773 mask = (mask >> from) & (mask << (63 - to));
6774 maskc = ~mask;
6775 } else {
6776 maskc = ~0ULL;
6777 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6778 mask = ~maskc;
6779 }
6780 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6781 ), mkU64(mask)));
6782 if (t_bit == 0) {
6783 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6784 mkU64(maskc)), mkexpr(result)));
6785 }
6786 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6787
6788 return "rosbg";
6789}
6790
6791static HChar *
6792s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6793{
6794 UChar from;
6795 UChar to;
6796 UChar rot;
6797 UChar z_bit;
6798 ULong mask;
6799 ULong maskc;
6800 IRTemp op2 = newTemp(Ity_I64);
6801 IRTemp result = newTemp(Ity_I64);
6802
6803 from = i3 & 63;
6804 to = i4 & 63;
6805 rot = i5 & 63;
6806 z_bit = i4 & 128;
6807 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6808 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6809 mkU8(64 - rot))));
6810 if (from <= to) {
6811 mask = ~0ULL;
6812 mask = (mask >> from) & (mask << (63 - to));
6813 maskc = ~mask;
6814 } else {
6815 maskc = ~0ULL;
6816 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6817 mask = ~maskc;
6818 }
6819 if (z_bit == 0) {
6820 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6821 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6822 } else {
6823 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6824 }
6825 assign(result, get_gpr_dw0(r1));
6826 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6827
6828 return "risbg";
6829}
6830
6831static HChar *
6832s390_irgen_SAR(UChar r1, UChar r2)
6833{
6834 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006835 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006836 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6837
6838 return "sar";
6839}
6840
6841static HChar *
6842s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6843{
6844 IRTemp p1 = newTemp(Ity_I64);
6845 IRTemp p2 = newTemp(Ity_I64);
6846 IRTemp op = newTemp(Ity_I64);
6847 IRTemp result = newTemp(Ity_I64);
6848 Long sign_mask;
6849 IRTemp shift_amount = newTemp(Ity_I64);
6850
6851 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6852 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6853 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6854 ));
6855 sign_mask = 1ULL << 63;
6856 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6857 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6858 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6859 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6860 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6861 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6862 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6863
6864 return "slda";
6865}
6866
6867static HChar *
6868s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6869{
6870 IRTemp p1 = newTemp(Ity_I64);
6871 IRTemp p2 = newTemp(Ity_I64);
6872 IRTemp result = newTemp(Ity_I64);
6873
6874 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6875 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6876 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6877 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6878 mkexpr(op2addr), mkU64(63)))));
6879 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6880 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6881
6882 return "sldl";
6883}
6884
6885static HChar *
6886s390_irgen_SLA(UChar r1, IRTemp op2addr)
6887{
6888 IRTemp uop = newTemp(Ity_I32);
6889 IRTemp result = newTemp(Ity_I32);
6890 UInt sign_mask;
6891 IRTemp shift_amount = newTemp(Ity_I64);
6892 IRTemp op = newTemp(Ity_I32);
6893
6894 assign(op, get_gpr_w1(r1));
6895 assign(uop, get_gpr_w1(r1));
6896 sign_mask = 2147483648U;
6897 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6898 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6899 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6900 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6901 put_gpr_w1(r1, mkexpr(result));
6902 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6903
6904 return "sla";
6905}
6906
6907static HChar *
6908s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6909{
6910 IRTemp uop = newTemp(Ity_I32);
6911 IRTemp result = newTemp(Ity_I32);
6912 UInt sign_mask;
6913 IRTemp shift_amount = newTemp(Ity_I64);
6914 IRTemp op = newTemp(Ity_I32);
6915
6916 assign(op, get_gpr_w1(r3));
6917 assign(uop, get_gpr_w1(r3));
6918 sign_mask = 2147483648U;
6919 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6920 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6921 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6922 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6923 put_gpr_w1(r1, mkexpr(result));
6924 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6925
6926 return "slak";
6927}
6928
6929static HChar *
6930s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6931{
6932 IRTemp uop = newTemp(Ity_I64);
6933 IRTemp result = newTemp(Ity_I64);
6934 ULong sign_mask;
6935 IRTemp shift_amount = newTemp(Ity_I64);
6936 IRTemp op = newTemp(Ity_I64);
6937
6938 assign(op, get_gpr_dw0(r3));
6939 assign(uop, get_gpr_dw0(r3));
6940 sign_mask = 9223372036854775808ULL;
6941 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6942 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6943 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6944 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6945 put_gpr_dw0(r1, mkexpr(result));
6946 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6947
6948 return "slag";
6949}
6950
6951static HChar *
6952s390_irgen_SLL(UChar r1, IRTemp op2addr)
6953{
6954 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6955 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6956
6957 return "sll";
6958}
6959
6960static HChar *
6961s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6962{
6963 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6964 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6965
6966 return "sllk";
6967}
6968
6969static HChar *
6970s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
6971{
6972 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
6973 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6974
6975 return "sllg";
6976}
6977
6978static HChar *
6979s390_irgen_SRDA(UChar r1, IRTemp op2addr)
6980{
6981 IRTemp p1 = newTemp(Ity_I64);
6982 IRTemp p2 = newTemp(Ity_I64);
6983 IRTemp result = newTemp(Ity_I64);
6984
6985 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6986 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6987 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6988 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6989 mkexpr(op2addr), mkU64(63)))));
6990 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6991 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6992 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6993
6994 return "srda";
6995}
6996
6997static HChar *
6998s390_irgen_SRDL(UChar r1, IRTemp op2addr)
6999{
7000 IRTemp p1 = newTemp(Ity_I64);
7001 IRTemp p2 = newTemp(Ity_I64);
7002 IRTemp result = newTemp(Ity_I64);
7003
7004 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7005 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7006 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7007 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7008 mkexpr(op2addr), mkU64(63)))));
7009 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7010 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7011
7012 return "srdl";
7013}
7014
7015static HChar *
7016s390_irgen_SRA(UChar r1, IRTemp op2addr)
7017{
7018 IRTemp result = newTemp(Ity_I32);
7019 IRTemp op = newTemp(Ity_I32);
7020
7021 assign(op, get_gpr_w1(r1));
7022 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7023 mkexpr(op2addr), mkU64(63)))));
7024 put_gpr_w1(r1, mkexpr(result));
7025 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7026
7027 return "sra";
7028}
7029
7030static HChar *
7031s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
7032{
7033 IRTemp result = newTemp(Ity_I32);
7034 IRTemp op = newTemp(Ity_I32);
7035
7036 assign(op, get_gpr_w1(r3));
7037 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7038 mkexpr(op2addr), mkU64(63)))));
7039 put_gpr_w1(r1, mkexpr(result));
7040 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7041
7042 return "srak";
7043}
7044
7045static HChar *
7046s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7047{
7048 IRTemp result = newTemp(Ity_I64);
7049 IRTemp op = newTemp(Ity_I64);
7050
7051 assign(op, get_gpr_dw0(r3));
7052 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7053 mkexpr(op2addr), mkU64(63)))));
7054 put_gpr_dw0(r1, mkexpr(result));
7055 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7056
7057 return "srag";
7058}
7059
7060static HChar *
7061s390_irgen_SRL(UChar r1, IRTemp op2addr)
7062{
7063 IRTemp op = newTemp(Ity_I32);
7064
7065 assign(op, get_gpr_w1(r1));
7066 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7067 mkexpr(op2addr), mkU64(63)))));
7068
7069 return "srl";
7070}
7071
7072static HChar *
7073s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7074{
7075 IRTemp op = newTemp(Ity_I32);
7076
7077 assign(op, get_gpr_w1(r3));
7078 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7079 mkexpr(op2addr), mkU64(63)))));
7080
7081 return "srlk";
7082}
7083
7084static HChar *
7085s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7086{
7087 IRTemp op = newTemp(Ity_I64);
7088
7089 assign(op, get_gpr_dw0(r3));
7090 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7091 mkexpr(op2addr), mkU64(63)))));
7092
7093 return "srlg";
7094}
7095
7096static HChar *
7097s390_irgen_ST(UChar r1, IRTemp op2addr)
7098{
7099 store(mkexpr(op2addr), get_gpr_w1(r1));
7100
7101 return "st";
7102}
7103
7104static HChar *
7105s390_irgen_STY(UChar r1, IRTemp op2addr)
7106{
7107 store(mkexpr(op2addr), get_gpr_w1(r1));
7108
7109 return "sty";
7110}
7111
7112static HChar *
7113s390_irgen_STG(UChar r1, IRTemp op2addr)
7114{
7115 store(mkexpr(op2addr), get_gpr_dw0(r1));
7116
7117 return "stg";
7118}
7119
7120static HChar *
7121s390_irgen_STRL(UChar r1, UInt i2)
7122{
7123 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7124 get_gpr_w1(r1));
7125
7126 return "strl";
7127}
7128
7129static HChar *
7130s390_irgen_STGRL(UChar r1, UInt i2)
7131{
7132 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7133 get_gpr_dw0(r1));
7134
7135 return "stgrl";
7136}
7137
7138static HChar *
7139s390_irgen_STC(UChar r1, IRTemp op2addr)
7140{
7141 store(mkexpr(op2addr), get_gpr_b7(r1));
7142
7143 return "stc";
7144}
7145
7146static HChar *
7147s390_irgen_STCY(UChar r1, IRTemp op2addr)
7148{
7149 store(mkexpr(op2addr), get_gpr_b7(r1));
7150
7151 return "stcy";
7152}
7153
7154static HChar *
7155s390_irgen_STCH(UChar r1, IRTemp op2addr)
7156{
7157 store(mkexpr(op2addr), get_gpr_b3(r1));
7158
7159 return "stch";
7160}
7161
7162static HChar *
7163s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7164{
7165 UChar mask;
7166 UChar n;
7167
7168 mask = (UChar)r3;
7169 n = 0;
7170 if ((mask & 8) != 0) {
7171 store(mkexpr(op2addr), get_gpr_b4(r1));
7172 n = n + 1;
7173 }
7174 if ((mask & 4) != 0) {
7175 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7176 n = n + 1;
7177 }
7178 if ((mask & 2) != 0) {
7179 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7180 n = n + 1;
7181 }
7182 if ((mask & 1) != 0) {
7183 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7184 }
7185
7186 return "stcm";
7187}
7188
7189static HChar *
7190s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7191{
7192 UChar mask;
7193 UChar n;
7194
7195 mask = (UChar)r3;
7196 n = 0;
7197 if ((mask & 8) != 0) {
7198 store(mkexpr(op2addr), get_gpr_b4(r1));
7199 n = n + 1;
7200 }
7201 if ((mask & 4) != 0) {
7202 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7203 n = n + 1;
7204 }
7205 if ((mask & 2) != 0) {
7206 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7207 n = n + 1;
7208 }
7209 if ((mask & 1) != 0) {
7210 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7211 }
7212
7213 return "stcmy";
7214}
7215
7216static HChar *
7217s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7218{
7219 UChar mask;
7220 UChar n;
7221
7222 mask = (UChar)r3;
7223 n = 0;
7224 if ((mask & 8) != 0) {
7225 store(mkexpr(op2addr), get_gpr_b0(r1));
7226 n = n + 1;
7227 }
7228 if ((mask & 4) != 0) {
7229 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7230 n = n + 1;
7231 }
7232 if ((mask & 2) != 0) {
7233 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7234 n = n + 1;
7235 }
7236 if ((mask & 1) != 0) {
7237 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7238 }
7239
7240 return "stcmh";
7241}
7242
7243static HChar *
7244s390_irgen_STH(UChar r1, IRTemp op2addr)
7245{
7246 store(mkexpr(op2addr), get_gpr_hw3(r1));
7247
7248 return "sth";
7249}
7250
7251static HChar *
7252s390_irgen_STHY(UChar r1, IRTemp op2addr)
7253{
7254 store(mkexpr(op2addr), get_gpr_hw3(r1));
7255
7256 return "sthy";
7257}
7258
7259static HChar *
7260s390_irgen_STHRL(UChar r1, UInt i2)
7261{
7262 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7263 get_gpr_hw3(r1));
7264
7265 return "sthrl";
7266}
7267
7268static HChar *
7269s390_irgen_STHH(UChar r1, IRTemp op2addr)
7270{
7271 store(mkexpr(op2addr), get_gpr_hw1(r1));
7272
7273 return "sthh";
7274}
7275
7276static HChar *
7277s390_irgen_STFH(UChar r1, IRTemp op2addr)
7278{
7279 store(mkexpr(op2addr), get_gpr_w0(r1));
7280
7281 return "stfh";
7282}
7283
7284static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007285s390_irgen_STOC(UChar r1, IRTemp op2addr)
7286{
7287 /* condition is checked in format handler */
7288 store(mkexpr(op2addr), get_gpr_w1(r1));
7289
7290 return "stoc";
7291}
7292
7293static HChar *
7294s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7295{
7296 /* condition is checked in format handler */
7297 store(mkexpr(op2addr), get_gpr_dw0(r1));
7298
7299 return "stocg";
7300}
7301
7302static HChar *
sewardj2019a972011-03-07 16:04:07 +00007303s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7304{
7305 store(mkexpr(op2addr), get_gpr_dw0(r1));
7306 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7307
7308 return "stpq";
7309}
7310
7311static HChar *
7312s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7313{
7314 store(mkexpr(op2addr), get_gpr_b7(r1));
7315 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7316
7317 return "strvh";
7318}
7319
7320static HChar *
7321s390_irgen_STRV(UChar r1, IRTemp op2addr)
7322{
7323 store(mkexpr(op2addr), get_gpr_b7(r1));
7324 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7325 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7326 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7327
7328 return "strv";
7329}
7330
7331static HChar *
7332s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7333{
7334 store(mkexpr(op2addr), get_gpr_b7(r1));
7335 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7336 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7337 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7338 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7339 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7340 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7341 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7342
7343 return "strvg";
7344}
7345
7346static HChar *
7347s390_irgen_SR(UChar r1, UChar r2)
7348{
7349 IRTemp op1 = newTemp(Ity_I32);
7350 IRTemp op2 = newTemp(Ity_I32);
7351 IRTemp result = newTemp(Ity_I32);
7352
7353 assign(op1, get_gpr_w1(r1));
7354 assign(op2, get_gpr_w1(r2));
7355 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7356 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7357 put_gpr_w1(r1, mkexpr(result));
7358
7359 return "sr";
7360}
7361
7362static HChar *
7363s390_irgen_SGR(UChar r1, UChar r2)
7364{
7365 IRTemp op1 = newTemp(Ity_I64);
7366 IRTemp op2 = newTemp(Ity_I64);
7367 IRTemp result = newTemp(Ity_I64);
7368
7369 assign(op1, get_gpr_dw0(r1));
7370 assign(op2, get_gpr_dw0(r2));
7371 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7372 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7373 put_gpr_dw0(r1, mkexpr(result));
7374
7375 return "sgr";
7376}
7377
7378static HChar *
7379s390_irgen_SGFR(UChar r1, UChar r2)
7380{
7381 IRTemp op1 = newTemp(Ity_I64);
7382 IRTemp op2 = newTemp(Ity_I64);
7383 IRTemp result = newTemp(Ity_I64);
7384
7385 assign(op1, get_gpr_dw0(r1));
7386 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7387 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7388 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7389 put_gpr_dw0(r1, mkexpr(result));
7390
7391 return "sgfr";
7392}
7393
7394static HChar *
7395s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7396{
7397 IRTemp op2 = newTemp(Ity_I32);
7398 IRTemp op3 = newTemp(Ity_I32);
7399 IRTemp result = newTemp(Ity_I32);
7400
7401 assign(op2, get_gpr_w1(r2));
7402 assign(op3, get_gpr_w1(r3));
7403 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7404 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7405 put_gpr_w1(r1, mkexpr(result));
7406
7407 return "srk";
7408}
7409
7410static HChar *
7411s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7412{
7413 IRTemp op2 = newTemp(Ity_I64);
7414 IRTemp op3 = newTemp(Ity_I64);
7415 IRTemp result = newTemp(Ity_I64);
7416
7417 assign(op2, get_gpr_dw0(r2));
7418 assign(op3, get_gpr_dw0(r3));
7419 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7420 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7421 put_gpr_dw0(r1, mkexpr(result));
7422
7423 return "sgrk";
7424}
7425
7426static HChar *
7427s390_irgen_S(UChar r1, IRTemp op2addr)
7428{
7429 IRTemp op1 = newTemp(Ity_I32);
7430 IRTemp op2 = newTemp(Ity_I32);
7431 IRTemp result = newTemp(Ity_I32);
7432
7433 assign(op1, get_gpr_w1(r1));
7434 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7435 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7436 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7437 put_gpr_w1(r1, mkexpr(result));
7438
7439 return "s";
7440}
7441
7442static HChar *
7443s390_irgen_SY(UChar r1, IRTemp op2addr)
7444{
7445 IRTemp op1 = newTemp(Ity_I32);
7446 IRTemp op2 = newTemp(Ity_I32);
7447 IRTemp result = newTemp(Ity_I32);
7448
7449 assign(op1, get_gpr_w1(r1));
7450 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7451 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7452 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7453 put_gpr_w1(r1, mkexpr(result));
7454
7455 return "sy";
7456}
7457
7458static HChar *
7459s390_irgen_SG(UChar r1, IRTemp op2addr)
7460{
7461 IRTemp op1 = newTemp(Ity_I64);
7462 IRTemp op2 = newTemp(Ity_I64);
7463 IRTemp result = newTemp(Ity_I64);
7464
7465 assign(op1, get_gpr_dw0(r1));
7466 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7467 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7468 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7469 put_gpr_dw0(r1, mkexpr(result));
7470
7471 return "sg";
7472}
7473
7474static HChar *
7475s390_irgen_SGF(UChar r1, IRTemp op2addr)
7476{
7477 IRTemp op1 = newTemp(Ity_I64);
7478 IRTemp op2 = newTemp(Ity_I64);
7479 IRTemp result = newTemp(Ity_I64);
7480
7481 assign(op1, get_gpr_dw0(r1));
7482 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7483 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7484 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7485 put_gpr_dw0(r1, mkexpr(result));
7486
7487 return "sgf";
7488}
7489
7490static HChar *
7491s390_irgen_SH(UChar r1, IRTemp op2addr)
7492{
7493 IRTemp op1 = newTemp(Ity_I32);
7494 IRTemp op2 = newTemp(Ity_I32);
7495 IRTemp result = newTemp(Ity_I32);
7496
7497 assign(op1, get_gpr_w1(r1));
7498 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7499 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7500 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7501 put_gpr_w1(r1, mkexpr(result));
7502
7503 return "sh";
7504}
7505
7506static HChar *
7507s390_irgen_SHY(UChar r1, IRTemp op2addr)
7508{
7509 IRTemp op1 = newTemp(Ity_I32);
7510 IRTemp op2 = newTemp(Ity_I32);
7511 IRTemp result = newTemp(Ity_I32);
7512
7513 assign(op1, get_gpr_w1(r1));
7514 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7515 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7516 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7517 put_gpr_w1(r1, mkexpr(result));
7518
7519 return "shy";
7520}
7521
7522static HChar *
7523s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7524{
7525 IRTemp op2 = newTemp(Ity_I32);
7526 IRTemp op3 = newTemp(Ity_I32);
7527 IRTemp result = newTemp(Ity_I32);
7528
7529 assign(op2, get_gpr_w0(r1));
7530 assign(op3, get_gpr_w0(r2));
7531 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7532 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7533 put_gpr_w0(r1, mkexpr(result));
7534
7535 return "shhhr";
7536}
7537
7538static HChar *
7539s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7540{
7541 IRTemp op2 = newTemp(Ity_I32);
7542 IRTemp op3 = newTemp(Ity_I32);
7543 IRTemp result = newTemp(Ity_I32);
7544
7545 assign(op2, get_gpr_w0(r1));
7546 assign(op3, get_gpr_w1(r2));
7547 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7548 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7549 put_gpr_w0(r1, mkexpr(result));
7550
7551 return "shhlr";
7552}
7553
7554static HChar *
7555s390_irgen_SLR(UChar r1, UChar r2)
7556{
7557 IRTemp op1 = newTemp(Ity_I32);
7558 IRTemp op2 = newTemp(Ity_I32);
7559 IRTemp result = newTemp(Ity_I32);
7560
7561 assign(op1, get_gpr_w1(r1));
7562 assign(op2, get_gpr_w1(r2));
7563 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7564 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7565 put_gpr_w1(r1, mkexpr(result));
7566
7567 return "slr";
7568}
7569
7570static HChar *
7571s390_irgen_SLGR(UChar r1, UChar r2)
7572{
7573 IRTemp op1 = newTemp(Ity_I64);
7574 IRTemp op2 = newTemp(Ity_I64);
7575 IRTemp result = newTemp(Ity_I64);
7576
7577 assign(op1, get_gpr_dw0(r1));
7578 assign(op2, get_gpr_dw0(r2));
7579 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7580 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7581 put_gpr_dw0(r1, mkexpr(result));
7582
7583 return "slgr";
7584}
7585
7586static HChar *
7587s390_irgen_SLGFR(UChar r1, UChar r2)
7588{
7589 IRTemp op1 = newTemp(Ity_I64);
7590 IRTemp op2 = newTemp(Ity_I64);
7591 IRTemp result = newTemp(Ity_I64);
7592
7593 assign(op1, get_gpr_dw0(r1));
7594 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7595 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7596 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7597 put_gpr_dw0(r1, mkexpr(result));
7598
7599 return "slgfr";
7600}
7601
7602static HChar *
7603s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7604{
7605 IRTemp op2 = newTemp(Ity_I32);
7606 IRTemp op3 = newTemp(Ity_I32);
7607 IRTemp result = newTemp(Ity_I32);
7608
7609 assign(op2, get_gpr_w1(r2));
7610 assign(op3, get_gpr_w1(r3));
7611 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7612 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7613 put_gpr_w1(r1, mkexpr(result));
7614
7615 return "slrk";
7616}
7617
7618static HChar *
7619s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7620{
7621 IRTemp op2 = newTemp(Ity_I64);
7622 IRTemp op3 = newTemp(Ity_I64);
7623 IRTemp result = newTemp(Ity_I64);
7624
7625 assign(op2, get_gpr_dw0(r2));
7626 assign(op3, get_gpr_dw0(r3));
7627 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7628 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7629 put_gpr_dw0(r1, mkexpr(result));
7630
7631 return "slgrk";
7632}
7633
7634static HChar *
7635s390_irgen_SL(UChar r1, IRTemp op2addr)
7636{
7637 IRTemp op1 = newTemp(Ity_I32);
7638 IRTemp op2 = newTemp(Ity_I32);
7639 IRTemp result = newTemp(Ity_I32);
7640
7641 assign(op1, get_gpr_w1(r1));
7642 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7643 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7644 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7645 put_gpr_w1(r1, mkexpr(result));
7646
7647 return "sl";
7648}
7649
7650static HChar *
7651s390_irgen_SLY(UChar r1, IRTemp op2addr)
7652{
7653 IRTemp op1 = newTemp(Ity_I32);
7654 IRTemp op2 = newTemp(Ity_I32);
7655 IRTemp result = newTemp(Ity_I32);
7656
7657 assign(op1, get_gpr_w1(r1));
7658 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7659 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7660 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7661 put_gpr_w1(r1, mkexpr(result));
7662
7663 return "sly";
7664}
7665
7666static HChar *
7667s390_irgen_SLG(UChar r1, IRTemp op2addr)
7668{
7669 IRTemp op1 = newTemp(Ity_I64);
7670 IRTemp op2 = newTemp(Ity_I64);
7671 IRTemp result = newTemp(Ity_I64);
7672
7673 assign(op1, get_gpr_dw0(r1));
7674 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7675 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7676 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7677 put_gpr_dw0(r1, mkexpr(result));
7678
7679 return "slg";
7680}
7681
7682static HChar *
7683s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7684{
7685 IRTemp op1 = newTemp(Ity_I64);
7686 IRTemp op2 = newTemp(Ity_I64);
7687 IRTemp result = newTemp(Ity_I64);
7688
7689 assign(op1, get_gpr_dw0(r1));
7690 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7691 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7692 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7693 put_gpr_dw0(r1, mkexpr(result));
7694
7695 return "slgf";
7696}
7697
7698static HChar *
7699s390_irgen_SLFI(UChar r1, UInt i2)
7700{
7701 IRTemp op1 = newTemp(Ity_I32);
7702 UInt op2;
7703 IRTemp result = newTemp(Ity_I32);
7704
7705 assign(op1, get_gpr_w1(r1));
7706 op2 = i2;
7707 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7708 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7709 mkU32(op2)));
7710 put_gpr_w1(r1, mkexpr(result));
7711
7712 return "slfi";
7713}
7714
7715static HChar *
7716s390_irgen_SLGFI(UChar r1, UInt i2)
7717{
7718 IRTemp op1 = newTemp(Ity_I64);
7719 ULong op2;
7720 IRTemp result = newTemp(Ity_I64);
7721
7722 assign(op1, get_gpr_dw0(r1));
7723 op2 = (ULong)i2;
7724 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7725 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7726 mkU64(op2)));
7727 put_gpr_dw0(r1, mkexpr(result));
7728
7729 return "slgfi";
7730}
7731
7732static HChar *
7733s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7734{
7735 IRTemp op2 = newTemp(Ity_I32);
7736 IRTemp op3 = newTemp(Ity_I32);
7737 IRTemp result = newTemp(Ity_I32);
7738
7739 assign(op2, get_gpr_w0(r1));
7740 assign(op3, get_gpr_w0(r2));
7741 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7742 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7743 put_gpr_w0(r1, mkexpr(result));
7744
7745 return "slhhhr";
7746}
7747
7748static HChar *
7749s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7750{
7751 IRTemp op2 = newTemp(Ity_I32);
7752 IRTemp op3 = newTemp(Ity_I32);
7753 IRTemp result = newTemp(Ity_I32);
7754
7755 assign(op2, get_gpr_w0(r1));
7756 assign(op3, get_gpr_w1(r2));
7757 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7758 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7759 put_gpr_w0(r1, mkexpr(result));
7760
7761 return "slhhlr";
7762}
7763
7764static HChar *
7765s390_irgen_SLBR(UChar r1, UChar r2)
7766{
7767 IRTemp op1 = newTemp(Ity_I32);
7768 IRTemp op2 = newTemp(Ity_I32);
7769 IRTemp result = newTemp(Ity_I32);
7770 IRTemp borrow_in = newTemp(Ity_I32);
7771
7772 assign(op1, get_gpr_w1(r1));
7773 assign(op2, get_gpr_w1(r2));
7774 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7775 s390_call_calculate_cc(), mkU8(1))));
7776 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7777 mkexpr(borrow_in)));
7778 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7779 put_gpr_w1(r1, mkexpr(result));
7780
7781 return "slbr";
7782}
7783
7784static HChar *
7785s390_irgen_SLBGR(UChar r1, UChar r2)
7786{
7787 IRTemp op1 = newTemp(Ity_I64);
7788 IRTemp op2 = newTemp(Ity_I64);
7789 IRTemp result = newTemp(Ity_I64);
7790 IRTemp borrow_in = newTemp(Ity_I64);
7791
7792 assign(op1, get_gpr_dw0(r1));
7793 assign(op2, get_gpr_dw0(r2));
7794 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7795 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7796 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7797 mkexpr(borrow_in)));
7798 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7799 put_gpr_dw0(r1, mkexpr(result));
7800
7801 return "slbgr";
7802}
7803
7804static HChar *
7805s390_irgen_SLB(UChar r1, IRTemp op2addr)
7806{
7807 IRTemp op1 = newTemp(Ity_I32);
7808 IRTemp op2 = newTemp(Ity_I32);
7809 IRTemp result = newTemp(Ity_I32);
7810 IRTemp borrow_in = newTemp(Ity_I32);
7811
7812 assign(op1, get_gpr_w1(r1));
7813 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7814 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7815 s390_call_calculate_cc(), mkU8(1))));
7816 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7817 mkexpr(borrow_in)));
7818 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7819 put_gpr_w1(r1, mkexpr(result));
7820
7821 return "slb";
7822}
7823
7824static HChar *
7825s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7826{
7827 IRTemp op1 = newTemp(Ity_I64);
7828 IRTemp op2 = newTemp(Ity_I64);
7829 IRTemp result = newTemp(Ity_I64);
7830 IRTemp borrow_in = newTemp(Ity_I64);
7831
7832 assign(op1, get_gpr_dw0(r1));
7833 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7834 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7835 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7836 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7837 mkexpr(borrow_in)));
7838 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7839 put_gpr_dw0(r1, mkexpr(result));
7840
7841 return "slbg";
7842}
7843
7844static HChar *
7845s390_irgen_SVC(UChar i)
7846{
7847 IRTemp sysno = newTemp(Ity_I64);
7848
7849 if (i != 0) {
7850 assign(sysno, mkU64(i));
7851 } else {
7852 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7853 }
7854 system_call(mkexpr(sysno));
7855
7856 return "svc";
7857}
7858
7859static HChar *
sewardj2019a972011-03-07 16:04:07 +00007860s390_irgen_TM(UChar i2, IRTemp op1addr)
7861{
7862 UChar mask;
7863 IRTemp value = newTemp(Ity_I8);
7864
7865 mask = i2;
7866 assign(value, load(Ity_I8, mkexpr(op1addr)));
7867 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7868 mkU8(mask)));
7869
7870 return "tm";
7871}
7872
7873static HChar *
7874s390_irgen_TMY(UChar i2, IRTemp op1addr)
7875{
7876 UChar mask;
7877 IRTemp value = newTemp(Ity_I8);
7878
7879 mask = i2;
7880 assign(value, load(Ity_I8, mkexpr(op1addr)));
7881 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7882 mkU8(mask)));
7883
7884 return "tmy";
7885}
7886
7887static HChar *
7888s390_irgen_TMHH(UChar r1, UShort i2)
7889{
7890 UShort mask;
7891 IRTemp value = newTemp(Ity_I16);
7892
7893 mask = i2;
7894 assign(value, get_gpr_hw0(r1));
7895 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7896 mkU16(mask)));
7897
7898 return "tmhh";
7899}
7900
7901static HChar *
7902s390_irgen_TMHL(UChar r1, UShort i2)
7903{
7904 UShort mask;
7905 IRTemp value = newTemp(Ity_I16);
7906
7907 mask = i2;
7908 assign(value, get_gpr_hw1(r1));
7909 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7910 mkU16(mask)));
7911
7912 return "tmhl";
7913}
7914
7915static HChar *
7916s390_irgen_TMLH(UChar r1, UShort i2)
7917{
7918 UShort mask;
7919 IRTemp value = newTemp(Ity_I16);
7920
7921 mask = i2;
7922 assign(value, get_gpr_hw2(r1));
7923 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7924 mkU16(mask)));
7925
7926 return "tmlh";
7927}
7928
7929static HChar *
7930s390_irgen_TMLL(UChar r1, UShort i2)
7931{
7932 UShort mask;
7933 IRTemp value = newTemp(Ity_I16);
7934
7935 mask = i2;
7936 assign(value, get_gpr_hw3(r1));
7937 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7938 mkU16(mask)));
7939
7940 return "tmll";
7941}
7942
7943static HChar *
7944s390_irgen_EFPC(UChar r1)
7945{
7946 put_gpr_w1(r1, get_fpc_w0());
7947
7948 return "efpc";
7949}
7950
7951static HChar *
7952s390_irgen_LER(UChar r1, UChar r2)
7953{
7954 put_fpr_w0(r1, get_fpr_w0(r2));
7955
7956 return "ler";
7957}
7958
7959static HChar *
7960s390_irgen_LDR(UChar r1, UChar r2)
7961{
7962 put_fpr_dw0(r1, get_fpr_dw0(r2));
7963
7964 return "ldr";
7965}
7966
7967static HChar *
7968s390_irgen_LXR(UChar r1, UChar r2)
7969{
7970 put_fpr_dw0(r1, get_fpr_dw0(r2));
7971 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
7972
7973 return "lxr";
7974}
7975
7976static HChar *
7977s390_irgen_LE(UChar r1, IRTemp op2addr)
7978{
7979 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7980
7981 return "le";
7982}
7983
7984static HChar *
7985s390_irgen_LD(UChar r1, IRTemp op2addr)
7986{
7987 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7988
7989 return "ld";
7990}
7991
7992static HChar *
7993s390_irgen_LEY(UChar r1, IRTemp op2addr)
7994{
7995 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7996
7997 return "ley";
7998}
7999
8000static HChar *
8001s390_irgen_LDY(UChar r1, IRTemp op2addr)
8002{
8003 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8004
8005 return "ldy";
8006}
8007
8008static HChar *
8009s390_irgen_LFPC(IRTemp op2addr)
8010{
8011 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
8012
8013 return "lfpc";
8014}
8015
8016static HChar *
8017s390_irgen_LZER(UChar r1)
8018{
8019 put_fpr_w0(r1, mkF32i(0x0));
8020
8021 return "lzer";
8022}
8023
8024static HChar *
8025s390_irgen_LZDR(UChar r1)
8026{
8027 put_fpr_dw0(r1, mkF64i(0x0));
8028
8029 return "lzdr";
8030}
8031
8032static HChar *
8033s390_irgen_LZXR(UChar r1)
8034{
8035 put_fpr_dw0(r1, mkF64i(0x0));
8036 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8037
8038 return "lzxr";
8039}
8040
8041static HChar *
8042s390_irgen_SRNM(IRTemp op2addr)
8043{
8044 UInt mask;
8045
8046 mask = 3;
8047 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8048 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8049 );
8050
8051 return "srnm";
8052}
8053
8054static HChar *
8055s390_irgen_SFPC(UChar r1)
8056{
8057 put_fpc_w0(get_gpr_w1(r1));
8058
8059 return "sfpc";
8060}
8061
8062static HChar *
8063s390_irgen_STE(UChar r1, IRTemp op2addr)
8064{
8065 store(mkexpr(op2addr), get_fpr_w0(r1));
8066
8067 return "ste";
8068}
8069
8070static HChar *
8071s390_irgen_STD(UChar r1, IRTemp op2addr)
8072{
8073 store(mkexpr(op2addr), get_fpr_dw0(r1));
8074
8075 return "std";
8076}
8077
8078static HChar *
8079s390_irgen_STEY(UChar r1, IRTemp op2addr)
8080{
8081 store(mkexpr(op2addr), get_fpr_w0(r1));
8082
8083 return "stey";
8084}
8085
8086static HChar *
8087s390_irgen_STDY(UChar r1, IRTemp op2addr)
8088{
8089 store(mkexpr(op2addr), get_fpr_dw0(r1));
8090
8091 return "stdy";
8092}
8093
8094static HChar *
8095s390_irgen_STFPC(IRTemp op2addr)
8096{
8097 store(mkexpr(op2addr), get_fpc_w0());
8098
8099 return "stfpc";
8100}
8101
8102static HChar *
8103s390_irgen_AEBR(UChar r1, UChar r2)
8104{
8105 IRTemp op1 = newTemp(Ity_F32);
8106 IRTemp op2 = newTemp(Ity_F32);
8107 IRTemp result = newTemp(Ity_F32);
8108
8109 assign(op1, get_fpr_w0(r1));
8110 assign(op2, get_fpr_w0(r2));
8111 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8112 mkexpr(op2)));
8113 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8114 put_fpr_w0(r1, mkexpr(result));
8115
8116 return "aebr";
8117}
8118
8119static HChar *
8120s390_irgen_ADBR(UChar r1, UChar r2)
8121{
8122 IRTemp op1 = newTemp(Ity_F64);
8123 IRTemp op2 = newTemp(Ity_F64);
8124 IRTemp result = newTemp(Ity_F64);
8125
8126 assign(op1, get_fpr_dw0(r1));
8127 assign(op2, get_fpr_dw0(r2));
8128 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8129 mkexpr(op2)));
8130 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8131 put_fpr_dw0(r1, mkexpr(result));
8132
8133 return "adbr";
8134}
8135
8136static HChar *
8137s390_irgen_AEB(UChar r1, IRTemp op2addr)
8138{
8139 IRTemp op1 = newTemp(Ity_F32);
8140 IRTemp op2 = newTemp(Ity_F32);
8141 IRTemp result = newTemp(Ity_F32);
8142
8143 assign(op1, get_fpr_w0(r1));
8144 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8145 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8146 mkexpr(op2)));
8147 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8148 put_fpr_w0(r1, mkexpr(result));
8149
8150 return "aeb";
8151}
8152
8153static HChar *
8154s390_irgen_ADB(UChar r1, IRTemp op2addr)
8155{
8156 IRTemp op1 = newTemp(Ity_F64);
8157 IRTemp op2 = newTemp(Ity_F64);
8158 IRTemp result = newTemp(Ity_F64);
8159
8160 assign(op1, get_fpr_dw0(r1));
8161 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8162 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8163 mkexpr(op2)));
8164 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8165 put_fpr_dw0(r1, mkexpr(result));
8166
8167 return "adb";
8168}
8169
8170static HChar *
8171s390_irgen_CEFBR(UChar r1, UChar r2)
8172{
8173 IRTemp op2 = newTemp(Ity_I32);
8174
8175 assign(op2, get_gpr_w1(r2));
8176 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8177
8178 return "cefbr";
8179}
8180
8181static HChar *
8182s390_irgen_CDFBR(UChar r1, UChar r2)
8183{
8184 IRTemp op2 = newTemp(Ity_I32);
8185
8186 assign(op2, get_gpr_w1(r2));
8187 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8188
8189 return "cdfbr";
8190}
8191
8192static HChar *
8193s390_irgen_CEGBR(UChar r1, UChar r2)
8194{
8195 IRTemp op2 = newTemp(Ity_I64);
8196
8197 assign(op2, get_gpr_dw0(r2));
8198 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8199
8200 return "cegbr";
8201}
8202
8203static HChar *
8204s390_irgen_CDGBR(UChar r1, UChar r2)
8205{
8206 IRTemp op2 = newTemp(Ity_I64);
8207
8208 assign(op2, get_gpr_dw0(r2));
8209 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8210
8211 return "cdgbr";
8212}
8213
8214static HChar *
8215s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8216{
8217 IRTemp op = newTemp(Ity_F32);
8218 IRTemp result = newTemp(Ity_I32);
8219
8220 assign(op, get_fpr_w0(r2));
8221 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8222 mkexpr(op)));
8223 put_gpr_w1(r1, mkexpr(result));
8224 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8225
8226 return "cfebr";
8227}
8228
8229static HChar *
8230s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8231{
8232 IRTemp op = newTemp(Ity_F64);
8233 IRTemp result = newTemp(Ity_I32);
8234
8235 assign(op, get_fpr_dw0(r2));
8236 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8237 mkexpr(op)));
8238 put_gpr_w1(r1, mkexpr(result));
8239 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8240
8241 return "cfdbr";
8242}
8243
8244static HChar *
8245s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8246{
8247 IRTemp op = newTemp(Ity_F32);
8248 IRTemp result = newTemp(Ity_I64);
8249
8250 assign(op, get_fpr_w0(r2));
8251 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8252 mkexpr(op)));
8253 put_gpr_dw0(r1, mkexpr(result));
8254 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8255
8256 return "cgebr";
8257}
8258
8259static HChar *
8260s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8261{
8262 IRTemp op = newTemp(Ity_F64);
8263 IRTemp result = newTemp(Ity_I64);
8264
8265 assign(op, get_fpr_dw0(r2));
8266 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8267 mkexpr(op)));
8268 put_gpr_dw0(r1, mkexpr(result));
8269 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8270
8271 return "cgdbr";
8272}
8273
8274static HChar *
8275s390_irgen_DEBR(UChar r1, UChar r2)
8276{
8277 IRTemp op1 = newTemp(Ity_F32);
8278 IRTemp op2 = newTemp(Ity_F32);
8279 IRTemp result = newTemp(Ity_F32);
8280
8281 assign(op1, get_fpr_w0(r1));
8282 assign(op2, get_fpr_w0(r2));
8283 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8284 mkexpr(op2)));
8285 put_fpr_w0(r1, mkexpr(result));
8286
8287 return "debr";
8288}
8289
8290static HChar *
8291s390_irgen_DDBR(UChar r1, UChar r2)
8292{
8293 IRTemp op1 = newTemp(Ity_F64);
8294 IRTemp op2 = newTemp(Ity_F64);
8295 IRTemp result = newTemp(Ity_F64);
8296
8297 assign(op1, get_fpr_dw0(r1));
8298 assign(op2, get_fpr_dw0(r2));
8299 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8300 mkexpr(op2)));
8301 put_fpr_dw0(r1, mkexpr(result));
8302
8303 return "ddbr";
8304}
8305
8306static HChar *
8307s390_irgen_DEB(UChar r1, IRTemp op2addr)
8308{
8309 IRTemp op1 = newTemp(Ity_F32);
8310 IRTemp op2 = newTemp(Ity_F32);
8311 IRTemp result = newTemp(Ity_F32);
8312
8313 assign(op1, get_fpr_w0(r1));
8314 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8315 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8316 mkexpr(op2)));
8317 put_fpr_w0(r1, mkexpr(result));
8318
8319 return "deb";
8320}
8321
8322static HChar *
8323s390_irgen_DDB(UChar r1, IRTemp op2addr)
8324{
8325 IRTemp op1 = newTemp(Ity_F64);
8326 IRTemp op2 = newTemp(Ity_F64);
8327 IRTemp result = newTemp(Ity_F64);
8328
8329 assign(op1, get_fpr_dw0(r1));
8330 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8331 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8332 mkexpr(op2)));
8333 put_fpr_dw0(r1, mkexpr(result));
8334
8335 return "ddb";
8336}
8337
8338static HChar *
8339s390_irgen_LTEBR(UChar r1, UChar r2)
8340{
8341 IRTemp result = newTemp(Ity_F32);
8342
8343 assign(result, get_fpr_w0(r2));
8344 put_fpr_w0(r1, mkexpr(result));
8345 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8346
8347 return "ltebr";
8348}
8349
8350static HChar *
8351s390_irgen_LTDBR(UChar r1, UChar r2)
8352{
8353 IRTemp result = newTemp(Ity_F64);
8354
8355 assign(result, get_fpr_dw0(r2));
8356 put_fpr_dw0(r1, mkexpr(result));
8357 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8358
8359 return "ltdbr";
8360}
8361
8362static HChar *
8363s390_irgen_LCEBR(UChar r1, UChar r2)
8364{
8365 IRTemp result = newTemp(Ity_F32);
8366
8367 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8368 put_fpr_w0(r1, mkexpr(result));
8369 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8370
8371 return "lcebr";
8372}
8373
8374static HChar *
8375s390_irgen_LCDBR(UChar r1, UChar r2)
8376{
8377 IRTemp result = newTemp(Ity_F64);
8378
8379 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8380 put_fpr_dw0(r1, mkexpr(result));
8381 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8382
8383 return "lcdbr";
8384}
8385
8386static HChar *
8387s390_irgen_LDEBR(UChar r1, UChar r2)
8388{
8389 IRTemp op = newTemp(Ity_F32);
8390
8391 assign(op, get_fpr_w0(r2));
8392 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8393
8394 return "ldebr";
8395}
8396
8397static HChar *
8398s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8399{
8400 IRTemp op = newTemp(Ity_F32);
8401
8402 assign(op, load(Ity_F32, mkexpr(op2addr)));
8403 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8404
8405 return "ldeb";
8406}
8407
8408static HChar *
8409s390_irgen_LEDBR(UChar r1, UChar r2)
8410{
8411 IRTemp op = newTemp(Ity_F64);
8412
8413 assign(op, get_fpr_dw0(r2));
8414 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8415
8416 return "ledbr";
8417}
8418
8419static HChar *
8420s390_irgen_MEEBR(UChar r1, UChar r2)
8421{
8422 IRTemp op1 = newTemp(Ity_F32);
8423 IRTemp op2 = newTemp(Ity_F32);
8424 IRTemp result = newTemp(Ity_F32);
8425
8426 assign(op1, get_fpr_w0(r1));
8427 assign(op2, get_fpr_w0(r2));
8428 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8429 mkexpr(op2)));
8430 put_fpr_w0(r1, mkexpr(result));
8431
8432 return "meebr";
8433}
8434
8435static HChar *
8436s390_irgen_MDBR(UChar r1, UChar r2)
8437{
8438 IRTemp op1 = newTemp(Ity_F64);
8439 IRTemp op2 = newTemp(Ity_F64);
8440 IRTemp result = newTemp(Ity_F64);
8441
8442 assign(op1, get_fpr_dw0(r1));
8443 assign(op2, get_fpr_dw0(r2));
8444 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8445 mkexpr(op2)));
8446 put_fpr_dw0(r1, mkexpr(result));
8447
8448 return "mdbr";
8449}
8450
8451static HChar *
8452s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8453{
8454 IRTemp op1 = newTemp(Ity_F32);
8455 IRTemp op2 = newTemp(Ity_F32);
8456 IRTemp result = newTemp(Ity_F32);
8457
8458 assign(op1, get_fpr_w0(r1));
8459 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8460 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8461 mkexpr(op2)));
8462 put_fpr_w0(r1, mkexpr(result));
8463
8464 return "meeb";
8465}
8466
8467static HChar *
8468s390_irgen_MDB(UChar r1, IRTemp op2addr)
8469{
8470 IRTemp op1 = newTemp(Ity_F64);
8471 IRTemp op2 = newTemp(Ity_F64);
8472 IRTemp result = newTemp(Ity_F64);
8473
8474 assign(op1, get_fpr_dw0(r1));
8475 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8476 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8477 mkexpr(op2)));
8478 put_fpr_dw0(r1, mkexpr(result));
8479
8480 return "mdb";
8481}
8482
8483static HChar *
8484s390_irgen_SEBR(UChar r1, UChar r2)
8485{
8486 IRTemp op1 = newTemp(Ity_F32);
8487 IRTemp op2 = newTemp(Ity_F32);
8488 IRTemp result = newTemp(Ity_F32);
8489
8490 assign(op1, get_fpr_w0(r1));
8491 assign(op2, get_fpr_w0(r2));
8492 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8493 mkexpr(op2)));
8494 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8495 put_fpr_w0(r1, mkexpr(result));
8496
8497 return "sebr";
8498}
8499
8500static HChar *
8501s390_irgen_SDBR(UChar r1, UChar r2)
8502{
8503 IRTemp op1 = newTemp(Ity_F64);
8504 IRTemp op2 = newTemp(Ity_F64);
8505 IRTemp result = newTemp(Ity_F64);
8506
8507 assign(op1, get_fpr_dw0(r1));
8508 assign(op2, get_fpr_dw0(r2));
8509 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8510 mkexpr(op2)));
8511 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8512 put_fpr_dw0(r1, mkexpr(result));
8513
8514 return "sdbr";
8515}
8516
8517static HChar *
8518s390_irgen_SEB(UChar r1, IRTemp op2addr)
8519{
8520 IRTemp op1 = newTemp(Ity_F32);
8521 IRTemp op2 = newTemp(Ity_F32);
8522 IRTemp result = newTemp(Ity_F32);
8523
8524 assign(op1, get_fpr_w0(r1));
8525 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8526 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8527 mkexpr(op2)));
8528 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8529 put_fpr_w0(r1, mkexpr(result));
8530
8531 return "seb";
8532}
8533
8534static HChar *
8535s390_irgen_SDB(UChar r1, IRTemp op2addr)
8536{
8537 IRTemp op1 = newTemp(Ity_F64);
8538 IRTemp op2 = newTemp(Ity_F64);
8539 IRTemp result = newTemp(Ity_F64);
8540
8541 assign(op1, get_fpr_dw0(r1));
8542 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8543 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8544 mkexpr(op2)));
8545 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8546 put_fpr_dw0(r1, mkexpr(result));
8547
8548 return "sdb";
8549}
8550
8551
8552static HChar *
8553s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8554{
florian79e839e2012-05-05 02:20:30 +00008555 IRTemp len = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00008556
florian79e839e2012-05-05 02:20:30 +00008557 assign(len, mkU64(length));
8558 s390_irgen_CLC_EX(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00008559 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00008560
8561 return "clc";
8562}
8563
8564static HChar *
florianb0c9a132011-09-08 15:37:39 +00008565s390_irgen_CLCL(UChar r1, UChar r2)
8566{
8567 IRTemp addr1 = newTemp(Ity_I64);
8568 IRTemp addr2 = newTemp(Ity_I64);
8569 IRTemp addr1_load = newTemp(Ity_I64);
8570 IRTemp addr2_load = newTemp(Ity_I64);
8571 IRTemp len1 = newTemp(Ity_I32);
8572 IRTemp len2 = newTemp(Ity_I32);
8573 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
8574 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
8575 IRTemp single1 = newTemp(Ity_I8);
8576 IRTemp single2 = newTemp(Ity_I8);
8577 IRTemp pad = newTemp(Ity_I8);
8578
8579 assign(addr1, get_gpr_dw0(r1));
8580 assign(r1p1, get_gpr_w1(r1 + 1));
8581 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
8582 assign(addr2, get_gpr_dw0(r2));
8583 assign(r2p1, get_gpr_w1(r2 + 1));
8584 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
8585 assign(pad, get_gpr_b4(r2 + 1));
8586
8587 /* len1 == 0 and len2 == 0? Exit */
8588 s390_cc_set(0);
8589 if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1),
8590 mkexpr(len2)), mkU32(0)),
8591 guest_IA_next_instr);
8592
8593 /* Because mkite evaluates both the then-clause and the else-clause
8594 we cannot load directly from addr1 here. If len1 is 0, then adddr1
8595 may be NULL and loading from there would segfault. So we provide a
8596 valid dummy address in that case. Loading from there does no harm and
8597 the value will be discarded at runtime. */
8598 assign(addr1_load,
8599 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8600 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
8601 assign(single1,
8602 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8603 mkexpr(pad), load(Ity_I8, mkexpr(addr1_load))));
8604
8605 assign(addr2_load,
8606 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8607 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
8608 assign(single2,
8609 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8610 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
8611
8612 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False);
8613 /* Fields differ ? */
8614 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)),
8615 guest_IA_next_instr);
8616
8617 /* Update len1 and addr1, unless len1 == 0. */
8618 put_gpr_dw0(r1,
8619 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8620 mkexpr(addr1),
8621 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
8622
8623 /* When updating len1 we must not modify bits (r1+1)[0:39] */
8624 put_gpr_w1(r1 + 1,
8625 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8626 binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)),
8627 binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))));
8628
8629 /* Update len2 and addr2, unless len2 == 0. */
8630 put_gpr_dw0(r2,
8631 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8632 mkexpr(addr2),
8633 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
8634
8635 /* When updating len2 we must not modify bits (r2+1)[0:39] */
8636 put_gpr_w1(r2 + 1,
8637 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8638 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
8639 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
8640
8641 always_goto_and_chase(guest_IA_curr_instr);
8642
8643 return "clcl";
8644}
8645
8646static HChar *
sewardj2019a972011-03-07 16:04:07 +00008647s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8648{
8649 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8650
8651 addr1 = newTemp(Ity_I64);
8652 addr3 = newTemp(Ity_I64);
8653 addr1_load = newTemp(Ity_I64);
8654 addr3_load = newTemp(Ity_I64);
8655 len1 = newTemp(Ity_I64);
8656 len3 = newTemp(Ity_I64);
8657 single1 = newTemp(Ity_I8);
8658 single3 = newTemp(Ity_I8);
8659
8660 assign(addr1, get_gpr_dw0(r1));
8661 assign(len1, get_gpr_dw0(r1 + 1));
8662 assign(addr3, get_gpr_dw0(r3));
8663 assign(len3, get_gpr_dw0(r3 + 1));
8664
8665 /* len1 == 0 and len3 == 0? Exit */
8666 s390_cc_set(0);
8667 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8668 mkexpr(len3)), mkU64(0)),
8669 guest_IA_next_instr);
8670
8671 /* A mux requires both ways to be possible. This is a way to prevent clcle
8672 from reading from addr1 if it should read from the pad. Since the pad
8673 has no address, just read from the instruction, we discard that anyway */
8674 assign(addr1_load,
florian6ad49522011-09-09 02:38:55 +00008675 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8676 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
sewardj2019a972011-03-07 16:04:07 +00008677
8678 /* same for addr3 */
8679 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00008680 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8681 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00008682
8683 assign(single1,
florian6ad49522011-09-09 02:38:55 +00008684 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8685 unop(Iop_64to8, mkexpr(pad2)),
8686 load(Ity_I8, mkexpr(addr1_load))));
sewardj2019a972011-03-07 16:04:07 +00008687
8688 assign(single3,
florian6ad49522011-09-09 02:38:55 +00008689 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8690 unop(Iop_64to8, mkexpr(pad2)),
8691 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00008692
8693 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8694 /* Both fields differ ? */
8695 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8696 guest_IA_next_instr);
8697
8698 /* If a length in 0 we must not change this length and the address */
8699 put_gpr_dw0(r1,
florian6ad49522011-09-09 02:38:55 +00008700 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8701 mkexpr(addr1),
8702 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008703
8704 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +00008705 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8706 mkU64(0), binop(Iop_Sub64, mkexpr(len1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008707
8708 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00008709 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8710 mkexpr(addr3),
8711 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008712
8713 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00008714 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8715 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008716
8717 /* The architecture requires that we exit with CC3 after a machine specific
8718 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8719 s390_cc_set(3);
8720 if_condition_goto(binop(Iop_CmpEQ64,
8721 binop(Iop_And64,
8722 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8723 mkU64(0xfff)),
8724 mkU64(0)),
8725 guest_IA_next_instr);
8726
floriana64c2432011-07-16 02:11:50 +00008727 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00008728
8729 return "clcle";
8730}
floriana64c2432011-07-16 02:11:50 +00008731
florianb0bf6602012-05-05 00:01:16 +00008732
sewardj2019a972011-03-07 16:04:07 +00008733static void
8734s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8735{
florianb0bf6602012-05-05 00:01:16 +00008736 s390_irgen_xonc(Iop_Xor8, length, start1, start2);
8737}
sewardj2019a972011-03-07 16:04:07 +00008738
sewardj2019a972011-03-07 16:04:07 +00008739
florianb0bf6602012-05-05 00:01:16 +00008740static void
8741s390_irgen_NC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8742{
8743 s390_irgen_xonc(Iop_And8, length, start1, start2);
8744}
sewardj2019a972011-03-07 16:04:07 +00008745
sewardj2019a972011-03-07 16:04:07 +00008746
florianb0bf6602012-05-05 00:01:16 +00008747static void
8748s390_irgen_OC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8749{
8750 s390_irgen_xonc(Iop_Or8, length, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00008751}
8752
8753
8754static void
8755s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8756{
8757 IRTemp current1 = newTemp(Ity_I8);
8758 IRTemp current2 = newTemp(Ity_I8);
8759 IRTemp counter = newTemp(Ity_I64);
8760
8761 assign(counter, get_counter_dw0());
8762 put_counter_dw0(mkU64(0));
8763
8764 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8765 mkexpr(counter))));
8766 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8767 mkexpr(counter))));
8768 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8769 False);
8770
8771 /* Both fields differ ? */
8772 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8773 guest_IA_next_instr);
8774
8775 /* Check for end of field */
8776 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8777 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8778 guest_IA_curr_instr);
8779 put_counter_dw0(mkU64(0));
8780}
8781
8782static void
8783s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8784{
8785 IRTemp counter = newTemp(Ity_I64);
8786
8787 assign(counter, get_counter_dw0());
8788
8789 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8790 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8791
8792 /* Check for end of field */
8793 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8794 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8795 guest_IA_curr_instr);
8796 put_counter_dw0(mkU64(0));
8797}
8798
florianf87d4fb2012-05-05 02:55:24 +00008799static void
8800s390_irgen_TR_EX(IRTemp length, IRTemp start1, IRTemp start2)
8801{
8802 IRTemp op = newTemp(Ity_I8);
8803 IRTemp op1 = newTemp(Ity_I8);
8804 IRTemp result = newTemp(Ity_I64);
8805 IRTemp counter = newTemp(Ity_I64);
8806
8807 assign(counter, get_counter_dw0());
8808
8809 assign(op, load(Ity_I8, binop(Iop_Add64, mkexpr(start1), mkexpr(counter))));
8810
8811 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)), mkexpr(start2)));
8812
8813 assign(op1, load(Ity_I8, mkexpr(result)));
8814 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)), mkexpr(op1));
8815
8816 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8817 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8818 guest_IA_curr_instr);
8819 put_counter_dw0(mkU64(0));
8820}
sewardj2019a972011-03-07 16:04:07 +00008821
8822
8823static void
8824s390_irgen_EX_SS(UChar r, IRTemp addr2,
8825void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8826{
8827 struct SS {
8828 unsigned int op : 8;
8829 unsigned int l : 8;
8830 unsigned int b1 : 4;
8831 unsigned int d1 : 12;
8832 unsigned int b2 : 4;
8833 unsigned int d2 : 12;
8834 };
8835 union {
8836 struct SS dec;
8837 unsigned long bytes;
8838 } ss;
8839 IRTemp cond;
8840 IRDirty *d;
8841 IRTemp torun;
8842
8843 IRTemp start1 = newTemp(Ity_I64);
8844 IRTemp start2 = newTemp(Ity_I64);
8845 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8846 cond = newTemp(Ity_I1);
8847 torun = newTemp(Ity_I64);
8848
8849 assign(torun, load(Ity_I64, mkexpr(addr2)));
8850 /* Start with a check that the saved code is still correct */
8851 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8852 /* If not, save the new value */
8853 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8854 mkIRExprVec_1(mkexpr(torun)));
8855 d->guard = mkexpr(cond);
8856 stmt(IRStmt_Dirty(d));
8857
8858 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008859 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8860 mkU64(guest_IA_curr_instr)));
8861 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008862 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval, IRConst_U64(guest_IA_curr_instr),
8863 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008864
8865 ss.bytes = last_execute_target;
8866 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8867 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8868 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8869 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8870 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8871 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8872 irgen(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00008873 dummy_put_IA();
8874
sewardj2019a972011-03-07 16:04:07 +00008875 last_execute_target = 0;
8876}
8877
8878static HChar *
8879s390_irgen_EX(UChar r1, IRTemp addr2)
8880{
8881 switch(last_execute_target & 0xff00000000000000ULL) {
8882 case 0:
8883 {
8884 /* no code information yet */
8885 IRDirty *d;
8886
8887 /* so safe the code... */
8888 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8889 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8890 stmt(IRStmt_Dirty(d));
8891 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008892 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8893 mkU64(guest_IA_curr_instr)));
8894 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008895 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8896 IRConst_U64(guest_IA_curr_instr),
8897 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008898 /* we know that this will be invalidated */
florianf9e1ed72012-04-17 02:41:56 +00008899 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +00008900 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +00008901 dis_res->jk_StopHere = Ijk_TInval;
sewardj2019a972011-03-07 16:04:07 +00008902 break;
8903 }
8904
8905 case 0xd200000000000000ULL:
8906 /* special case MVC */
8907 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8908 return "mvc via ex";
8909
8910 case 0xd500000000000000ULL:
8911 /* special case CLC */
8912 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8913 return "clc via ex";
8914
8915 case 0xd700000000000000ULL:
8916 /* special case XC */
8917 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8918 return "xc via ex";
8919
florianb0bf6602012-05-05 00:01:16 +00008920 case 0xd600000000000000ULL:
8921 /* special case OC */
8922 s390_irgen_EX_SS(r1, addr2, s390_irgen_OC_EX, 32);
8923 return "oc via ex";
8924
8925 case 0xd400000000000000ULL:
8926 /* special case NC */
8927 s390_irgen_EX_SS(r1, addr2, s390_irgen_NC_EX, 32);
8928 return "nc via ex";
sewardj2019a972011-03-07 16:04:07 +00008929
florianf87d4fb2012-05-05 02:55:24 +00008930 case 0xdc00000000000000ULL:
8931 /* special case TR */
8932 s390_irgen_EX_SS(r1, addr2, s390_irgen_TR_EX, 64);
8933 return "tr via ex";
8934
sewardj2019a972011-03-07 16:04:07 +00008935 default:
8936 {
8937 /* everything else will get a self checking prefix that also checks the
8938 register content */
8939 IRDirty *d;
8940 UChar *bytes;
8941 IRTemp cond;
8942 IRTemp orperand;
8943 IRTemp torun;
8944
8945 cond = newTemp(Ity_I1);
8946 orperand = newTemp(Ity_I64);
8947 torun = newTemp(Ity_I64);
8948
8949 if (r1 == 0)
8950 assign(orperand, mkU64(0));
8951 else
8952 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8953 /* This code is going to be translated */
8954 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8955 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8956
8957 /* Start with a check that saved code is still correct */
8958 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8959 mkU64(last_execute_target)));
8960 /* If not, save the new value */
8961 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8962 mkIRExprVec_1(mkexpr(torun)));
8963 d->guard = mkexpr(cond);
8964 stmt(IRStmt_Dirty(d));
8965
8966 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008967 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART), mkU64(guest_IA_curr_instr)));
8968 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008969 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8970 IRConst_U64(guest_IA_curr_instr),
8971 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008972
8973 /* Now comes the actual translation */
8974 bytes = (UChar *) &last_execute_target;
8975 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
8976 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00008977 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00008978 vex_printf(" which was executed by\n");
8979 /* dont make useless translations in the next execute */
8980 last_execute_target = 0;
florianf9e1ed72012-04-17 02:41:56 +00008981 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00008982 }
8983 }
8984 return "ex";
8985}
8986
8987static HChar *
8988s390_irgen_EXRL(UChar r1, UInt offset)
8989{
8990 IRTemp addr = newTemp(Ity_I64);
8991 /* we might save one round trip because we know the target */
8992 if (!last_execute_target)
8993 last_execute_target = *(ULong *)(HWord)
8994 (guest_IA_curr_instr + offset * 2UL);
8995 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
8996 s390_irgen_EX(r1, addr);
8997 return "exrl";
8998}
8999
9000static HChar *
9001s390_irgen_IPM(UChar r1)
9002{
9003 // As long as we dont support SPM, lets just assume 0 as program mask
9004 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
9005 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
9006
9007 return "ipm";
9008}
9009
9010
9011static HChar *
9012s390_irgen_SRST(UChar r1, UChar r2)
9013{
9014 IRTemp address = newTemp(Ity_I64);
9015 IRTemp next = newTemp(Ity_I64);
9016 IRTemp delim = newTemp(Ity_I8);
9017 IRTemp counter = newTemp(Ity_I64);
9018 IRTemp byte = newTemp(Ity_I8);
9019
9020 assign(address, get_gpr_dw0(r2));
9021 assign(next, get_gpr_dw0(r1));
9022
9023 assign(counter, get_counter_dw0());
9024 put_counter_dw0(mkU64(0));
9025
9026 // start = next? CC=2 and out r1 and r2 unchanged
9027 s390_cc_set(2);
9028 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
9029 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
9030 guest_IA_next_instr);
9031
9032 assign(byte, load(Ity_I8, mkexpr(address)));
9033 assign(delim, get_gpr_b7(0));
9034
9035 // byte = delim? CC=1, R1=address
9036 s390_cc_set(1);
9037 put_gpr_dw0(r1, mkexpr(address));
9038 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
9039 guest_IA_next_instr);
9040
9041 // else: all equal, no end yet, loop
9042 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9043 put_gpr_dw0(r1, mkexpr(next));
9044 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
florian8844a632012-04-13 04:04:06 +00009045 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9046 Ijk_Boring, IRConst_U64(guest_IA_curr_instr),
9047 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009048 // >= 256 bytes done CC=3
9049 s390_cc_set(3);
9050 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009051 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009052
9053 return "srst";
9054}
9055
9056static HChar *
9057s390_irgen_CLST(UChar r1, UChar r2)
9058{
9059 IRTemp address1 = newTemp(Ity_I64);
9060 IRTemp address2 = newTemp(Ity_I64);
9061 IRTemp end = newTemp(Ity_I8);
9062 IRTemp counter = newTemp(Ity_I64);
9063 IRTemp byte1 = newTemp(Ity_I8);
9064 IRTemp byte2 = newTemp(Ity_I8);
9065
9066 assign(address1, get_gpr_dw0(r1));
9067 assign(address2, get_gpr_dw0(r2));
9068 assign(end, get_gpr_b7(0));
9069 assign(counter, get_counter_dw0());
9070 put_counter_dw0(mkU64(0));
9071 assign(byte1, load(Ity_I8, mkexpr(address1)));
9072 assign(byte2, load(Ity_I8, mkexpr(address2)));
9073
9074 // end in both? all equal, reset r1 and r2 to start values
9075 s390_cc_set(0);
9076 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
9077 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
9078 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
9079 binop(Iop_Or8,
9080 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
9081 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
9082 guest_IA_next_instr);
9083
9084 put_gpr_dw0(r1, mkexpr(address1));
9085 put_gpr_dw0(r2, mkexpr(address2));
9086
9087 // End found in string1
9088 s390_cc_set(1);
9089 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
9090 guest_IA_next_instr);
9091
9092 // End found in string2
9093 s390_cc_set(2);
9094 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
9095 guest_IA_next_instr);
9096
9097 // string1 < string2
9098 s390_cc_set(1);
9099 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
9100 unop(Iop_8Uto32, mkexpr(byte2))),
9101 guest_IA_next_instr);
9102
9103 // string2 < string1
9104 s390_cc_set(2);
9105 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
9106 unop(Iop_8Uto32, mkexpr(byte1))),
9107 guest_IA_next_instr);
9108
9109 // else: all equal, no end yet, loop
9110 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9111 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
9112 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
florian8844a632012-04-13 04:04:06 +00009113 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9114 Ijk_Boring, IRConst_U64(guest_IA_curr_instr),
9115 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009116 // >= 256 bytes done CC=3
9117 s390_cc_set(3);
9118 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009119 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009120
9121 return "clst";
9122}
9123
9124static void
9125s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9126{
9127 UChar reg;
9128 IRTemp addr = newTemp(Ity_I64);
9129
9130 assign(addr, mkexpr(op2addr));
9131 reg = r1;
9132 do {
9133 IRTemp old = addr;
9134
9135 reg %= 16;
9136 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9137 addr = newTemp(Ity_I64);
9138 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9139 reg++;
9140 } while (reg != (r3 + 1));
9141}
9142
9143static HChar *
9144s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9145{
9146 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9147
9148 return "lm";
9149}
9150
9151static HChar *
9152s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9153{
9154 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9155
9156 return "lmy";
9157}
9158
9159static HChar *
9160s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9161{
9162 UChar reg;
9163 IRTemp addr = newTemp(Ity_I64);
9164
9165 assign(addr, mkexpr(op2addr));
9166 reg = r1;
9167 do {
9168 IRTemp old = addr;
9169
9170 reg %= 16;
9171 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9172 addr = newTemp(Ity_I64);
9173 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9174 reg++;
9175 } while (reg != (r3 + 1));
9176
9177 return "lmh";
9178}
9179
9180static HChar *
9181s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9182{
9183 UChar reg;
9184 IRTemp addr = newTemp(Ity_I64);
9185
9186 assign(addr, mkexpr(op2addr));
9187 reg = r1;
9188 do {
9189 IRTemp old = addr;
9190
9191 reg %= 16;
9192 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9193 addr = newTemp(Ity_I64);
9194 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9195 reg++;
9196 } while (reg != (r3 + 1));
9197
9198 return "lmg";
9199}
9200
9201static void
9202s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9203{
9204 UChar reg;
9205 IRTemp addr = newTemp(Ity_I64);
9206
9207 assign(addr, mkexpr(op2addr));
9208 reg = r1;
9209 do {
9210 IRTemp old = addr;
9211
9212 reg %= 16;
9213 store(mkexpr(addr), get_gpr_w1(reg));
9214 addr = newTemp(Ity_I64);
9215 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9216 reg++;
9217 } while( reg != (r3 + 1));
9218}
9219
9220static HChar *
9221s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9222{
9223 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9224
9225 return "stm";
9226}
9227
9228static HChar *
9229s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9230{
9231 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9232
9233 return "stmy";
9234}
9235
9236static HChar *
9237s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9238{
9239 UChar reg;
9240 IRTemp addr = newTemp(Ity_I64);
9241
9242 assign(addr, mkexpr(op2addr));
9243 reg = r1;
9244 do {
9245 IRTemp old = addr;
9246
9247 reg %= 16;
9248 store(mkexpr(addr), get_gpr_w0(reg));
9249 addr = newTemp(Ity_I64);
9250 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9251 reg++;
9252 } while( reg != (r3 + 1));
9253
9254 return "stmh";
9255}
9256
9257static HChar *
9258s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9259{
9260 UChar reg;
9261 IRTemp addr = newTemp(Ity_I64);
9262
9263 assign(addr, mkexpr(op2addr));
9264 reg = r1;
9265 do {
9266 IRTemp old = addr;
9267
9268 reg %= 16;
9269 store(mkexpr(addr), get_gpr_dw0(reg));
9270 addr = newTemp(Ity_I64);
9271 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9272 reg++;
9273 } while( reg != (r3 + 1));
9274
9275 return "stmg";
9276}
9277
9278static void
florianb0bf6602012-05-05 00:01:16 +00009279s390_irgen_xonc(IROp op, IRTemp length, IRTemp start1, IRTemp start2)
sewardj2019a972011-03-07 16:04:07 +00009280{
9281 IRTemp old1 = newTemp(Ity_I8);
9282 IRTemp old2 = newTemp(Ity_I8);
9283 IRTemp new1 = newTemp(Ity_I8);
9284 IRTemp counter = newTemp(Ity_I32);
9285 IRTemp addr1 = newTemp(Ity_I64);
9286
9287 assign(counter, get_counter_w0());
9288
9289 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9290 unop(Iop_32Uto64, mkexpr(counter))));
9291
9292 assign(old1, load(Ity_I8, mkexpr(addr1)));
9293 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9294 unop(Iop_32Uto64,mkexpr(counter)))));
9295 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9296
9297 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009298 if (op == Iop_Xor8) {
9299 store(mkexpr(addr1),
florian6ad49522011-09-09 02:38:55 +00009300 mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
9301 mkU8(0), mkexpr(new1)));
sewardj2019a972011-03-07 16:04:07 +00009302 } else
9303 store(mkexpr(addr1), mkexpr(new1));
9304 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9305 get_counter_w1()));
9306
9307 /* Check for end of field */
9308 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
florianb0bf6602012-05-05 00:01:16 +00009309 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
sewardj2019a972011-03-07 16:04:07 +00009310 guest_IA_curr_instr);
9311 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9312 False);
9313 put_counter_dw0(mkU64(0));
9314}
9315
9316static HChar *
9317s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9318{
florianb0bf6602012-05-05 00:01:16 +00009319 IRTemp len = newTemp(Ity_I32);
9320
9321 assign(len, mkU32(length));
9322 s390_irgen_xonc(Iop_Xor8, len, start1, start2);
florian79e839e2012-05-05 02:20:30 +00009323 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009324
9325 return "xc";
9326}
9327
sewardjb63967e2011-03-24 08:50:04 +00009328static void
9329s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9330{
9331 IRTemp counter = newTemp(Ity_I32);
9332 IRTemp start = newTemp(Ity_I64);
9333 IRTemp addr = newTemp(Ity_I64);
9334
9335 assign(start,
9336 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9337
9338 if (length < 8) {
9339 UInt i;
9340
9341 for (i = 0; i <= length; ++i) {
9342 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9343 }
9344 } else {
9345 assign(counter, get_counter_w0());
9346
9347 assign(addr, binop(Iop_Add64, mkexpr(start),
9348 unop(Iop_32Uto64, mkexpr(counter))));
9349
9350 store(mkexpr(addr), mkU8(0));
9351
9352 /* Check for end of field */
9353 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9354 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9355 guest_IA_curr_instr);
9356
9357 /* Reset counter */
9358 put_counter_dw0(mkU64(0));
9359 }
9360
9361 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
florianf9e1ed72012-04-17 02:41:56 +00009362 dummy_put_IA();
sewardjb63967e2011-03-24 08:50:04 +00009363
sewardj7ee97522011-05-09 21:45:04 +00009364 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009365 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9366}
9367
sewardj2019a972011-03-07 16:04:07 +00009368static HChar *
9369s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9370{
florianb0bf6602012-05-05 00:01:16 +00009371 IRTemp len = newTemp(Ity_I32);
9372
9373 assign(len, mkU32(length));
9374 s390_irgen_xonc(Iop_And8, len, start1, start2);
florian79e839e2012-05-05 02:20:30 +00009375 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009376
9377 return "nc";
9378}
9379
9380static HChar *
9381s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9382{
florianb0bf6602012-05-05 00:01:16 +00009383 IRTemp len = newTemp(Ity_I32);
9384
9385 assign(len, mkU32(length));
9386 s390_irgen_xonc(Iop_Or8, len, start1, start2);
florian79e839e2012-05-05 02:20:30 +00009387 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009388
9389 return "oc";
9390}
9391
9392
9393static HChar *
9394s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9395{
florian79e839e2012-05-05 02:20:30 +00009396 IRTemp len = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00009397
florian79e839e2012-05-05 02:20:30 +00009398 assign(len, mkU64(length));
9399 s390_irgen_MVC_EX(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00009400 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009401
9402 return "mvc";
9403}
9404
9405static HChar *
florianb0c9a132011-09-08 15:37:39 +00009406s390_irgen_MVCL(UChar r1, UChar r2)
9407{
9408 IRTemp addr1 = newTemp(Ity_I64);
9409 IRTemp addr2 = newTemp(Ity_I64);
9410 IRTemp addr2_load = newTemp(Ity_I64);
9411 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
9412 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
9413 IRTemp len1 = newTemp(Ity_I32);
9414 IRTemp len2 = newTemp(Ity_I32);
9415 IRTemp pad = newTemp(Ity_I8);
9416 IRTemp single = newTemp(Ity_I8);
9417
9418 assign(addr1, get_gpr_dw0(r1));
9419 assign(r1p1, get_gpr_w1(r1 + 1));
9420 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
9421 assign(addr2, get_gpr_dw0(r2));
9422 assign(r2p1, get_gpr_w1(r2 + 1));
9423 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
9424 assign(pad, get_gpr_b4(r2 + 1));
9425
9426 /* len1 == 0 ? */
9427 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9428 if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
9429 guest_IA_next_instr);
9430
9431 /* Check for destructive overlap:
9432 addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */
9433 s390_cc_set(3);
9434 IRTemp cond1 = newTemp(Ity_I32);
9435 assign(cond1, unop(Iop_1Uto32,
9436 binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1))));
9437 IRTemp cond2 = newTemp(Ity_I32);
9438 assign(cond2, unop(Iop_1Uto32,
9439 binop(Iop_CmpLT64U, mkexpr(addr1),
9440 binop(Iop_Add64, mkexpr(addr2),
9441 unop(Iop_32Uto64, mkexpr(len1))))));
9442 IRTemp cond3 = newTemp(Ity_I32);
9443 assign(cond3, unop(Iop_1Uto32,
9444 binop(Iop_CmpLT64U,
9445 mkexpr(addr1),
9446 binop(Iop_Add64, mkexpr(addr2),
9447 unop(Iop_32Uto64, mkexpr(len2))))));
9448
9449 if_condition_goto(binop(Iop_CmpEQ32,
9450 binop(Iop_And32,
9451 binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)),
9452 mkexpr(cond3)),
9453 mkU32(1)),
9454 guest_IA_next_instr);
9455
9456 /* See s390_irgen_CLCL for explanation why we cannot load directly
9457 and need two steps. */
9458 assign(addr2_load,
9459 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9460 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
9461 assign(single,
9462 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9463 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
9464
9465 store(mkexpr(addr1), mkexpr(single));
9466
9467 /* Update addr1 and len1 */
9468 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9469 put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)));
9470
9471 /* Update addr2 and len2 */
9472 put_gpr_dw0(r2,
9473 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9474 mkexpr(addr2),
9475 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
9476
9477 /* When updating len2 we must not modify bits (r2+1)[0:39] */
9478 put_gpr_w1(r2 + 1,
9479 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9480 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
9481 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
9482
9483 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9484 if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)),
9485 guest_IA_curr_instr);
9486
9487 return "mvcl";
9488}
9489
9490
9491static HChar *
sewardj2019a972011-03-07 16:04:07 +00009492s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9493{
9494 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9495
9496 addr1 = newTemp(Ity_I64);
9497 addr3 = newTemp(Ity_I64);
9498 addr3_load = newTemp(Ity_I64);
9499 len1 = newTemp(Ity_I64);
9500 len3 = newTemp(Ity_I64);
9501 single = newTemp(Ity_I8);
9502
9503 assign(addr1, get_gpr_dw0(r1));
9504 assign(len1, get_gpr_dw0(r1 + 1));
9505 assign(addr3, get_gpr_dw0(r3));
9506 assign(len3, get_gpr_dw0(r3 + 1));
9507
9508 // len1 == 0 ?
9509 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9510 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9511 guest_IA_next_instr);
9512
9513 /* This is a hack to prevent mvcle from reading from addr3 if it
9514 should read from the pad. Since the pad has no address, just
9515 read from the instruction, we discard that anyway */
9516 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00009517 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9518 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00009519
9520 assign(single,
florian6ad49522011-09-09 02:38:55 +00009521 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9522 unop(Iop_64to8, mkexpr(pad2)),
9523 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00009524 store(mkexpr(addr1), mkexpr(single));
9525
9526 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9527
9528 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9529
9530 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00009531 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9532 mkexpr(addr3),
9533 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009534
9535 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00009536 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9537 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009538
9539 /* We should set CC=3 (faked by overflow add) and leave after
9540 a maximum of ~4096 bytes have been processed. This is simpler:
9541 we leave whenever (len1 % 4096) == 0 */
9542 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
sewardj2019a972011-03-07 16:04:07 +00009543 mktemp(Ity_I64, mkU64(-1ULL)), False);
9544 if_condition_goto(binop(Iop_CmpEQ64,
9545 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9546 mkU64(0)),
9547 guest_IA_next_instr);
9548
9549 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9550 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9551 guest_IA_curr_instr);
9552
9553 return "mvcle";
9554}
9555
9556static HChar *
9557s390_irgen_MVST(UChar r1, UChar r2)
9558{
9559 IRTemp addr1 = newTemp(Ity_I64);
9560 IRTemp addr2 = newTemp(Ity_I64);
9561 IRTemp end = newTemp(Ity_I8);
9562 IRTemp byte = newTemp(Ity_I8);
9563 IRTemp counter = newTemp(Ity_I64);
9564
9565 assign(addr1, get_gpr_dw0(r1));
9566 assign(addr2, get_gpr_dw0(r2));
9567 assign(counter, get_counter_dw0());
9568 assign(end, get_gpr_b7(0));
9569 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9570 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9571
9572 // We use unlimited as cpu-determined number
9573 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9574 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9575 guest_IA_curr_instr);
9576
9577 // and always set cc=1 at the end + update r1
9578 s390_cc_set(1);
9579 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9580 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009581 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009582
9583 return "mvst";
9584}
9585
9586static void
9587s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9588{
9589 IRTemp op1 = newTemp(Ity_I64);
9590 IRTemp result = newTemp(Ity_I64);
9591
9592 assign(op1, binop(Iop_32HLto64,
9593 get_gpr_w1(r1), // high 32 bits
9594 get_gpr_w1(r1 + 1))); // low 32 bits
9595 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9596 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9597 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9598}
9599
9600static void
9601s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9602{
9603 IRTemp op1 = newTemp(Ity_I128);
9604 IRTemp result = newTemp(Ity_I128);
9605
9606 assign(op1, binop(Iop_64HLto128,
9607 get_gpr_dw0(r1), // high 64 bits
9608 get_gpr_dw0(r1 + 1))); // low 64 bits
9609 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9610 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9611 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9612}
9613
9614static void
9615s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9616{
9617 IRTemp op1 = newTemp(Ity_I64);
9618 IRTemp result = newTemp(Ity_I128);
9619
9620 assign(op1, get_gpr_dw0(r1 + 1));
9621 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9622 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9623 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9624}
9625
9626static HChar *
9627s390_irgen_DR(UChar r1, UChar r2)
9628{
9629 IRTemp op2 = newTemp(Ity_I32);
9630
9631 assign(op2, get_gpr_w1(r2));
9632
9633 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9634
9635 return "dr";
9636}
9637
9638static HChar *
9639s390_irgen_D(UChar r1, IRTemp op2addr)
9640{
9641 IRTemp op2 = newTemp(Ity_I32);
9642
9643 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9644
9645 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9646
9647 return "d";
9648}
9649
9650static HChar *
9651s390_irgen_DLR(UChar r1, UChar r2)
9652{
9653 IRTemp op2 = newTemp(Ity_I32);
9654
9655 assign(op2, get_gpr_w1(r2));
9656
9657 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9658
9659 return "dr";
9660}
9661
9662static HChar *
9663s390_irgen_DL(UChar r1, IRTemp op2addr)
9664{
9665 IRTemp op2 = newTemp(Ity_I32);
9666
9667 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9668
9669 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9670
9671 return "dl";
9672}
9673
9674static HChar *
9675s390_irgen_DLG(UChar r1, IRTemp op2addr)
9676{
9677 IRTemp op2 = newTemp(Ity_I64);
9678
9679 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9680
9681 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9682
9683 return "dlg";
9684}
9685
9686static HChar *
9687s390_irgen_DLGR(UChar r1, UChar r2)
9688{
9689 IRTemp op2 = newTemp(Ity_I64);
9690
9691 assign(op2, get_gpr_dw0(r2));
9692
9693 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9694
9695 return "dlgr";
9696}
9697
9698static HChar *
9699s390_irgen_DSGR(UChar r1, UChar r2)
9700{
9701 IRTemp op2 = newTemp(Ity_I64);
9702
9703 assign(op2, get_gpr_dw0(r2));
9704
9705 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9706
9707 return "dsgr";
9708}
9709
9710static HChar *
9711s390_irgen_DSG(UChar r1, IRTemp op2addr)
9712{
9713 IRTemp op2 = newTemp(Ity_I64);
9714
9715 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9716
9717 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9718
9719 return "dsg";
9720}
9721
9722static HChar *
9723s390_irgen_DSGFR(UChar r1, UChar r2)
9724{
9725 IRTemp op2 = newTemp(Ity_I64);
9726
9727 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9728
9729 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9730
9731 return "dsgfr";
9732}
9733
9734static HChar *
9735s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9736{
9737 IRTemp op2 = newTemp(Ity_I64);
9738
9739 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9740
9741 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9742
9743 return "dsgf";
9744}
9745
9746static void
9747s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9748{
9749 UChar reg;
9750 IRTemp addr = newTemp(Ity_I64);
9751
9752 assign(addr, mkexpr(op2addr));
9753 reg = r1;
9754 do {
9755 IRTemp old = addr;
9756
9757 reg %= 16;
9758 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9759 addr = newTemp(Ity_I64);
9760 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9761 reg++;
9762 } while (reg != (r3 + 1));
9763}
9764
9765static HChar *
9766s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9767{
9768 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9769
9770 return "lam";
9771}
9772
9773static HChar *
9774s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9775{
9776 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9777
9778 return "lamy";
9779}
9780
9781static void
9782s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9783{
9784 UChar reg;
9785 IRTemp addr = newTemp(Ity_I64);
9786
9787 assign(addr, mkexpr(op2addr));
9788 reg = r1;
9789 do {
9790 IRTemp old = addr;
9791
9792 reg %= 16;
9793 store(mkexpr(addr), get_ar_w0(reg));
9794 addr = newTemp(Ity_I64);
9795 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9796 reg++;
9797 } while (reg != (r3 + 1));
9798}
9799
9800static HChar *
9801s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9802{
9803 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9804
9805 return "stam";
9806}
9807
9808static HChar *
9809s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9810{
9811 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9812
9813 return "stamy";
9814}
9815
9816
9817/* Implementation for 32-bit compare-and-swap */
9818static void
9819s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9820{
9821 IRCAS *cas;
9822 IRTemp op1 = newTemp(Ity_I32);
9823 IRTemp old_mem = newTemp(Ity_I32);
9824 IRTemp op3 = newTemp(Ity_I32);
9825 IRTemp result = newTemp(Ity_I32);
9826 IRTemp nequal = newTemp(Ity_I1);
9827
9828 assign(op1, get_gpr_w1(r1));
9829 assign(op3, get_gpr_w1(r3));
9830
9831 /* The first and second operands are compared. If they are equal,
9832 the third operand is stored at the second- operand location. */
9833 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9834 Iend_BE, mkexpr(op2addr),
9835 NULL, mkexpr(op1), /* expected value */
9836 NULL, mkexpr(op3) /* new value */);
9837 stmt(IRStmt_CAS(cas));
9838
9839 /* Set CC. Operands compared equal -> 0, else 1. */
9840 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9841 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9842
9843 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9844 Otherwise, store the old_value from memory in r1 and yield. */
9845 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9846 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009847 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9848 IRConst_U64(guest_IA_next_instr),
9849 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009850}
9851
9852static HChar *
9853s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9854{
9855 s390_irgen_cas_32(r1, r3, op2addr);
9856
9857 return "cs";
9858}
9859
9860static HChar *
9861s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9862{
9863 s390_irgen_cas_32(r1, r3, op2addr);
9864
9865 return "csy";
9866}
9867
9868static HChar *
9869s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9870{
9871 IRCAS *cas;
9872 IRTemp op1 = newTemp(Ity_I64);
9873 IRTemp old_mem = newTemp(Ity_I64);
9874 IRTemp op3 = newTemp(Ity_I64);
9875 IRTemp result = newTemp(Ity_I64);
9876 IRTemp nequal = newTemp(Ity_I1);
9877
9878 assign(op1, get_gpr_dw0(r1));
9879 assign(op3, get_gpr_dw0(r3));
9880
9881 /* The first and second operands are compared. If they are equal,
9882 the third operand is stored at the second- operand location. */
9883 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9884 Iend_BE, mkexpr(op2addr),
9885 NULL, mkexpr(op1), /* expected value */
9886 NULL, mkexpr(op3) /* new value */);
9887 stmt(IRStmt_CAS(cas));
9888
9889 /* Set CC. Operands compared equal -> 0, else 1. */
9890 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9891 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9892
9893 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9894 Otherwise, store the old_value from memory in r1 and yield. */
9895 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9896 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009897 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9898 IRConst_U64(guest_IA_next_instr),
9899 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009900
9901 return "csg";
9902}
9903
9904
9905/* Binary floating point */
9906
9907static HChar *
9908s390_irgen_AXBR(UChar r1, UChar r2)
9909{
9910 IRTemp op1 = newTemp(Ity_F128);
9911 IRTemp op2 = newTemp(Ity_F128);
9912 IRTemp result = newTemp(Ity_F128);
9913
9914 assign(op1, get_fpr_pair(r1));
9915 assign(op2, get_fpr_pair(r2));
9916 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9917 mkexpr(op2)));
9918 put_fpr_pair(r1, mkexpr(result));
9919
9920 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9921
9922 return "axbr";
9923}
9924
9925/* The result of a Iop_CmdFxx operation is a condition code. It is
9926 encoded using the values defined in type IRCmpFxxResult.
9927 Before we can store the condition code into the guest state (or do
9928 anything else with it for that matter) we need to convert it to
9929 the encoding that s390 uses. This is what this function does.
9930
9931 s390 VEX b6 b2 b0 cc.1 cc.0
9932 0 0x40 EQ 1 0 0 0 0
9933 1 0x01 LT 0 0 1 0 1
9934 2 0x00 GT 0 0 0 1 0
9935 3 0x45 Unordered 1 1 1 1 1
9936
9937 The following bits from the VEX encoding are interesting:
9938 b0, b2, b6 with b0 being the LSB. We observe:
9939
9940 cc.0 = b0;
9941 cc.1 = b2 | (~b0 & ~b6)
9942
9943 with cc being the s390 condition code.
9944*/
9945static IRExpr *
9946convert_vex_fpcc_to_s390(IRTemp vex_cc)
9947{
9948 IRTemp cc0 = newTemp(Ity_I32);
9949 IRTemp cc1 = newTemp(Ity_I32);
9950 IRTemp b0 = newTemp(Ity_I32);
9951 IRTemp b2 = newTemp(Ity_I32);
9952 IRTemp b6 = newTemp(Ity_I32);
9953
9954 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9955 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9956 mkU32(1)));
9957 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9958 mkU32(1)));
9959
9960 assign(cc0, mkexpr(b0));
9961 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9962 binop(Iop_And32,
9963 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9964 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9965 )));
9966
9967 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9968}
9969
9970static HChar *
9971s390_irgen_CEBR(UChar r1, UChar r2)
9972{
9973 IRTemp op1 = newTemp(Ity_F32);
9974 IRTemp op2 = newTemp(Ity_F32);
9975 IRTemp cc_vex = newTemp(Ity_I32);
9976 IRTemp cc_s390 = newTemp(Ity_I32);
9977
9978 assign(op1, get_fpr_w0(r1));
9979 assign(op2, get_fpr_w0(r2));
9980 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9981
9982 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9983 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9984
9985 return "cebr";
9986}
9987
9988static HChar *
9989s390_irgen_CDBR(UChar r1, UChar r2)
9990{
9991 IRTemp op1 = newTemp(Ity_F64);
9992 IRTemp op2 = newTemp(Ity_F64);
9993 IRTemp cc_vex = newTemp(Ity_I32);
9994 IRTemp cc_s390 = newTemp(Ity_I32);
9995
9996 assign(op1, get_fpr_dw0(r1));
9997 assign(op2, get_fpr_dw0(r2));
9998 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9999
10000 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10001 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10002
10003 return "cdbr";
10004}
10005
10006static HChar *
10007s390_irgen_CXBR(UChar r1, UChar r2)
10008{
10009 IRTemp op1 = newTemp(Ity_F128);
10010 IRTemp op2 = newTemp(Ity_F128);
10011 IRTemp cc_vex = newTemp(Ity_I32);
10012 IRTemp cc_s390 = newTemp(Ity_I32);
10013
10014 assign(op1, get_fpr_pair(r1));
10015 assign(op2, get_fpr_pair(r2));
10016 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
10017
10018 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10019 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10020
10021 return "cxbr";
10022}
10023
10024static HChar *
10025s390_irgen_CEB(UChar r1, IRTemp op2addr)
10026{
10027 IRTemp op1 = newTemp(Ity_F32);
10028 IRTemp op2 = newTemp(Ity_F32);
10029 IRTemp cc_vex = newTemp(Ity_I32);
10030 IRTemp cc_s390 = newTemp(Ity_I32);
10031
10032 assign(op1, get_fpr_w0(r1));
10033 assign(op2, load(Ity_F32, mkexpr(op2addr)));
10034 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10035
10036 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10037 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10038
10039 return "ceb";
10040}
10041
10042static HChar *
10043s390_irgen_CDB(UChar r1, IRTemp op2addr)
10044{
10045 IRTemp op1 = newTemp(Ity_F64);
10046 IRTemp op2 = newTemp(Ity_F64);
10047 IRTemp cc_vex = newTemp(Ity_I32);
10048 IRTemp cc_s390 = newTemp(Ity_I32);
10049
10050 assign(op1, get_fpr_dw0(r1));
10051 assign(op2, load(Ity_F64, mkexpr(op2addr)));
10052 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10053
10054 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10055 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10056
10057 return "cdb";
10058}
10059
10060static HChar *
10061s390_irgen_CXFBR(UChar r1, UChar r2)
10062{
10063 IRTemp op2 = newTemp(Ity_I32);
10064
10065 assign(op2, get_gpr_w1(r2));
10066 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
10067
10068 return "cxfbr";
10069}
10070
10071static HChar *
10072s390_irgen_CXGBR(UChar r1, UChar r2)
10073{
10074 IRTemp op2 = newTemp(Ity_I64);
10075
10076 assign(op2, get_gpr_dw0(r2));
10077 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
10078
10079 return "cxgbr";
10080}
10081
10082static HChar *
10083s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
10084{
10085 IRTemp op = newTemp(Ity_F128);
10086 IRTemp result = newTemp(Ity_I32);
10087
10088 assign(op, get_fpr_pair(r2));
10089 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
10090 mkexpr(op)));
10091 put_gpr_w1(r1, mkexpr(result));
10092 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
10093
10094 return "cfxbr";
10095}
10096
10097static HChar *
10098s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
10099{
10100 IRTemp op = newTemp(Ity_F128);
10101 IRTemp result = newTemp(Ity_I64);
10102
10103 assign(op, get_fpr_pair(r2));
10104 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
10105 mkexpr(op)));
10106 put_gpr_dw0(r1, mkexpr(result));
10107 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
10108
10109 return "cgxbr";
10110}
10111
10112static HChar *
10113s390_irgen_DXBR(UChar r1, UChar r2)
10114{
10115 IRTemp op1 = newTemp(Ity_F128);
10116 IRTemp op2 = newTemp(Ity_F128);
10117 IRTemp result = newTemp(Ity_F128);
10118
10119 assign(op1, get_fpr_pair(r1));
10120 assign(op2, get_fpr_pair(r2));
10121 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10122 mkexpr(op2)));
10123 put_fpr_pair(r1, mkexpr(result));
10124
10125 return "dxbr";
10126}
10127
10128static HChar *
10129s390_irgen_LTXBR(UChar r1, UChar r2)
10130{
10131 IRTemp result = newTemp(Ity_F128);
10132
10133 assign(result, get_fpr_pair(r2));
10134 put_fpr_pair(r1, mkexpr(result));
10135 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10136
10137 return "ltxbr";
10138}
10139
10140static HChar *
10141s390_irgen_LCXBR(UChar r1, UChar r2)
10142{
10143 IRTemp result = newTemp(Ity_F128);
10144
10145 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
10146 put_fpr_pair(r1, mkexpr(result));
10147 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10148
10149 return "lcxbr";
10150}
10151
10152static HChar *
10153s390_irgen_LXDBR(UChar r1, UChar r2)
10154{
10155 IRTemp op = newTemp(Ity_F64);
10156
10157 assign(op, get_fpr_dw0(r2));
10158 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10159
10160 return "lxdbr";
10161}
10162
10163static HChar *
10164s390_irgen_LXEBR(UChar r1, UChar r2)
10165{
10166 IRTemp op = newTemp(Ity_F32);
10167
10168 assign(op, get_fpr_w0(r2));
10169 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10170
10171 return "lxebr";
10172}
10173
10174static HChar *
10175s390_irgen_LXDB(UChar r1, IRTemp op2addr)
10176{
10177 IRTemp op = newTemp(Ity_F64);
10178
10179 assign(op, load(Ity_F64, mkexpr(op2addr)));
10180 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10181
10182 return "lxdb";
10183}
10184
10185static HChar *
10186s390_irgen_LXEB(UChar r1, IRTemp op2addr)
10187{
10188 IRTemp op = newTemp(Ity_F32);
10189
10190 assign(op, load(Ity_F32, mkexpr(op2addr)));
10191 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10192
10193 return "lxeb";
10194}
10195
10196static HChar *
10197s390_irgen_LNEBR(UChar r1, UChar r2)
10198{
10199 IRTemp result = newTemp(Ity_F32);
10200
10201 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
10202 put_fpr_w0(r1, mkexpr(result));
10203 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10204
10205 return "lnebr";
10206}
10207
10208static HChar *
10209s390_irgen_LNDBR(UChar r1, UChar r2)
10210{
10211 IRTemp result = newTemp(Ity_F64);
10212
10213 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10214 put_fpr_dw0(r1, mkexpr(result));
10215 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10216
10217 return "lndbr";
10218}
10219
10220static HChar *
10221s390_irgen_LNXBR(UChar r1, UChar r2)
10222{
10223 IRTemp result = newTemp(Ity_F128);
10224
10225 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10226 put_fpr_pair(r1, mkexpr(result));
10227 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10228
10229 return "lnxbr";
10230}
10231
10232static HChar *
10233s390_irgen_LPEBR(UChar r1, UChar r2)
10234{
10235 IRTemp result = newTemp(Ity_F32);
10236
10237 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10238 put_fpr_w0(r1, mkexpr(result));
10239 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10240
10241 return "lpebr";
10242}
10243
10244static HChar *
10245s390_irgen_LPDBR(UChar r1, UChar r2)
10246{
10247 IRTemp result = newTemp(Ity_F64);
10248
10249 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10250 put_fpr_dw0(r1, mkexpr(result));
10251 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10252
10253 return "lpdbr";
10254}
10255
10256static HChar *
10257s390_irgen_LPXBR(UChar r1, UChar r2)
10258{
10259 IRTemp result = newTemp(Ity_F128);
10260
10261 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10262 put_fpr_pair(r1, mkexpr(result));
10263 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10264
10265 return "lpxbr";
10266}
10267
10268static HChar *
10269s390_irgen_LDXBR(UChar r1, UChar r2)
10270{
10271 IRTemp result = newTemp(Ity_F64);
10272
10273 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10274 put_fpr_dw0(r1, mkexpr(result));
10275
10276 return "ldxbr";
10277}
10278
10279static HChar *
10280s390_irgen_LEXBR(UChar r1, UChar r2)
10281{
10282 IRTemp result = newTemp(Ity_F32);
10283
10284 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10285 put_fpr_w0(r1, mkexpr(result));
10286
10287 return "lexbr";
10288}
10289
10290static HChar *
10291s390_irgen_MXBR(UChar r1, UChar r2)
10292{
10293 IRTemp op1 = newTemp(Ity_F128);
10294 IRTemp op2 = newTemp(Ity_F128);
10295 IRTemp result = newTemp(Ity_F128);
10296
10297 assign(op1, get_fpr_pair(r1));
10298 assign(op2, get_fpr_pair(r2));
10299 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10300 mkexpr(op2)));
10301 put_fpr_pair(r1, mkexpr(result));
10302
10303 return "mxbr";
10304}
10305
10306static HChar *
10307s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10308{
10309 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10310 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10311
10312 return "maebr";
10313}
10314
10315static HChar *
10316s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10317{
10318 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10319 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10320
10321 return "madbr";
10322}
10323
10324static HChar *
10325s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10326{
10327 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10328
10329 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10330 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10331
10332 return "maeb";
10333}
10334
10335static HChar *
10336s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10337{
10338 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10339
10340 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10341 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10342
10343 return "madb";
10344}
10345
10346static HChar *
10347s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10348{
10349 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10350 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10351
10352 return "msebr";
10353}
10354
10355static HChar *
10356s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10357{
10358 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10359 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10360
10361 return "msdbr";
10362}
10363
10364static HChar *
10365s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10366{
10367 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10368
10369 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10370 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10371
10372 return "mseb";
10373}
10374
10375static HChar *
10376s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10377{
10378 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10379
10380 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10381 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10382
10383 return "msdb";
10384}
10385
10386static HChar *
10387s390_irgen_SQEBR(UChar r1, UChar r2)
10388{
10389 IRTemp result = newTemp(Ity_F32);
10390
10391 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10392 put_fpr_w0(r1, mkexpr(result));
10393
10394 return "sqebr";
10395}
10396
10397static HChar *
10398s390_irgen_SQDBR(UChar r1, UChar r2)
10399{
10400 IRTemp result = newTemp(Ity_F64);
10401
10402 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10403 put_fpr_dw0(r1, mkexpr(result));
10404
10405 return "sqdbr";
10406}
10407
10408static HChar *
10409s390_irgen_SQXBR(UChar r1, UChar r2)
10410{
10411 IRTemp result = newTemp(Ity_F128);
10412
10413 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10414 put_fpr_pair(r1, mkexpr(result));
10415
10416 return "sqxbr";
10417}
10418
10419static HChar *
10420s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10421{
10422 IRTemp op = newTemp(Ity_F32);
10423
10424 assign(op, load(Ity_F32, mkexpr(op2addr)));
10425 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10426
10427 return "sqeb";
10428}
10429
10430static HChar *
10431s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10432{
10433 IRTemp op = newTemp(Ity_F64);
10434
10435 assign(op, load(Ity_F64, mkexpr(op2addr)));
10436 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10437
10438 return "sqdb";
10439}
10440
10441static HChar *
10442s390_irgen_SXBR(UChar r1, UChar r2)
10443{
10444 IRTemp op1 = newTemp(Ity_F128);
10445 IRTemp op2 = newTemp(Ity_F128);
10446 IRTemp result = newTemp(Ity_F128);
10447
10448 assign(op1, get_fpr_pair(r1));
10449 assign(op2, get_fpr_pair(r2));
10450 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10451 mkexpr(op2)));
10452 put_fpr_pair(r1, mkexpr(result));
10453 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10454
10455 return "sxbr";
10456}
10457
10458static HChar *
10459s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10460{
10461 IRTemp value = newTemp(Ity_F32);
10462
10463 assign(value, get_fpr_w0(r1));
10464
10465 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10466
10467 return "tceb";
10468}
10469
10470static HChar *
10471s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10472{
10473 IRTemp value = newTemp(Ity_F64);
10474
10475 assign(value, get_fpr_dw0(r1));
10476
10477 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10478
10479 return "tcdb";
10480}
10481
10482static HChar *
10483s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10484{
10485 IRTemp value = newTemp(Ity_F128);
10486
10487 assign(value, get_fpr_pair(r1));
10488
10489 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10490
10491 return "tcxb";
10492}
10493
10494static HChar *
10495s390_irgen_LCDFR(UChar r1, UChar r2)
10496{
10497 IRTemp result = newTemp(Ity_F64);
10498
10499 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10500 put_fpr_dw0(r1, mkexpr(result));
10501
10502 return "lcdfr";
10503}
10504
10505static HChar *
10506s390_irgen_LNDFR(UChar r1, UChar r2)
10507{
10508 IRTemp result = newTemp(Ity_F64);
10509
10510 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10511 put_fpr_dw0(r1, mkexpr(result));
10512
10513 return "lndfr";
10514}
10515
10516static HChar *
10517s390_irgen_LPDFR(UChar r1, UChar r2)
10518{
10519 IRTemp result = newTemp(Ity_F64);
10520
10521 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10522 put_fpr_dw0(r1, mkexpr(result));
10523
10524 return "lpdfr";
10525}
10526
10527static HChar *
10528s390_irgen_LDGR(UChar r1, UChar r2)
10529{
10530 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10531
10532 return "ldgr";
10533}
10534
10535static HChar *
10536s390_irgen_LGDR(UChar r1, UChar r2)
10537{
10538 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10539
10540 return "lgdr";
10541}
10542
10543
10544static HChar *
10545s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10546{
10547 IRTemp sign = newTemp(Ity_I64);
10548 IRTemp value = newTemp(Ity_I64);
10549
10550 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10551 mkU64(1ULL << 63)));
10552 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10553 mkU64((1ULL << 63) - 1)));
10554 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10555 mkexpr(sign))));
10556
10557 return "cpsdr";
10558}
10559
10560
10561static UInt
10562s390_do_cvb(ULong decimal)
10563{
10564#if defined(VGA_s390x)
10565 UInt binary;
10566
10567 __asm__ volatile (
10568 "cvb %[result],%[input]\n\t"
10569 : [result] "=d"(binary)
10570 : [input] "m"(decimal)
10571 );
10572
10573 return binary;
10574#else
10575 return 0;
10576#endif
10577}
10578
10579static IRExpr *
10580s390_call_cvb(IRExpr *in)
10581{
10582 IRExpr **args, *call;
10583
10584 args = mkIRExprVec_1(in);
10585 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10586 "s390_do_cvb", &s390_do_cvb, args);
10587
10588 /* Nothing is excluded from definedness checking. */
10589 call->Iex.CCall.cee->mcx_mask = 0;
10590
10591 return call;
10592}
10593
10594static HChar *
10595s390_irgen_CVB(UChar r1, IRTemp op2addr)
10596{
10597 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10598
10599 return "cvb";
10600}
10601
10602static HChar *
10603s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10604{
10605 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10606
10607 return "cvby";
10608}
10609
10610
10611static ULong
10612s390_do_cvd(ULong binary_in)
10613{
10614#if defined(VGA_s390x)
10615 UInt binary = binary_in & 0xffffffffULL;
10616 ULong decimal;
10617
10618 __asm__ volatile (
10619 "cvd %[input],%[result]\n\t"
10620 : [result] "=m"(decimal)
10621 : [input] "d"(binary)
10622 );
10623
10624 return decimal;
10625#else
10626 return 0;
10627#endif
10628}
10629
10630static IRExpr *
10631s390_call_cvd(IRExpr *in)
10632{
10633 IRExpr **args, *call;
10634
10635 args = mkIRExprVec_1(in);
10636 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10637 "s390_do_cvd", &s390_do_cvd, args);
10638
10639 /* Nothing is excluded from definedness checking. */
10640 call->Iex.CCall.cee->mcx_mask = 0;
10641
10642 return call;
10643}
10644
10645static HChar *
10646s390_irgen_CVD(UChar r1, IRTemp op2addr)
10647{
10648 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10649
10650 return "cvd";
10651}
10652
10653static HChar *
10654s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10655{
10656 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10657
10658 return "cvdy";
10659}
10660
10661static HChar *
10662s390_irgen_FLOGR(UChar r1, UChar r2)
10663{
10664 IRTemp input = newTemp(Ity_I64);
10665 IRTemp not_zero = newTemp(Ity_I64);
10666 IRTemp tmpnum = newTemp(Ity_I64);
10667 IRTemp num = newTemp(Ity_I64);
10668 IRTemp shift_amount = newTemp(Ity_I8);
10669
10670 /* We use the "count leading zeroes" operator because the number of
10671 leading zeroes is identical with the bit position of the first '1' bit.
10672 However, that operator does not work when the input value is zero.
10673 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10674 the modified value. If input == 0, then the result is 64. Otherwise,
10675 the result of Clz64 is what we want. */
10676
10677 assign(input, get_gpr_dw0(r2));
10678 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10679 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10680
10681 /* num = (input == 0) ? 64 : tmpnum */
10682 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10683 /* == 0 */ mkU64(64),
10684 /* != 0 */ mkexpr(tmpnum)));
10685
10686 put_gpr_dw0(r1, mkexpr(num));
10687
10688 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10689 is to first shift the input value by NUM + 1 bits to the left which
10690 causes the leftmost '1' bit to disappear. Then we shift logically to
10691 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10692 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10693 the width of the value-to-be-shifted, we need to special case
10694 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10695 For both such INPUT values the result will be 0. */
10696
10697 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10698 mkU64(1))));
10699
10700 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +000010701 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10702 /* == 0 || == 1*/ mkU64(0),
10703 /* otherwise */
10704 binop(Iop_Shr64,
10705 binop(Iop_Shl64, mkexpr(input),
10706 mkexpr(shift_amount)),
10707 mkexpr(shift_amount))));
sewardj2019a972011-03-07 16:04:07 +000010708
10709 /* Compare the original value as an unsigned integer with 0. */
10710 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10711 mktemp(Ity_I64, mkU64(0)), False);
10712
10713 return "flogr";
10714}
10715
sewardj1e5fea62011-05-17 16:18:36 +000010716static HChar *
10717s390_irgen_STCK(IRTemp op2addr)
10718{
10719 IRDirty *d;
10720 IRTemp cc = newTemp(Ity_I64);
10721
10722 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10723 &s390x_dirtyhelper_STCK,
10724 mkIRExprVec_1(mkexpr(op2addr)));
10725 d->mFx = Ifx_Write;
10726 d->mAddr = mkexpr(op2addr);
10727 d->mSize = 8;
10728 stmt(IRStmt_Dirty(d));
10729 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10730 mkexpr(cc), mkU64(0), mkU64(0));
10731 return "stck";
10732}
10733
10734static HChar *
10735s390_irgen_STCKF(IRTemp op2addr)
10736{
10737 IRDirty *d;
10738 IRTemp cc = newTemp(Ity_I64);
10739
10740 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10741 &s390x_dirtyhelper_STCKF,
10742 mkIRExprVec_1(mkexpr(op2addr)));
10743 d->mFx = Ifx_Write;
10744 d->mAddr = mkexpr(op2addr);
10745 d->mSize = 8;
10746 stmt(IRStmt_Dirty(d));
10747 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10748 mkexpr(cc), mkU64(0), mkU64(0));
10749 return "stckf";
10750}
10751
10752static HChar *
10753s390_irgen_STCKE(IRTemp op2addr)
10754{
10755 IRDirty *d;
10756 IRTemp cc = newTemp(Ity_I64);
10757
10758 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10759 &s390x_dirtyhelper_STCKE,
10760 mkIRExprVec_1(mkexpr(op2addr)));
10761 d->mFx = Ifx_Write;
10762 d->mAddr = mkexpr(op2addr);
10763 d->mSize = 16;
10764 stmt(IRStmt_Dirty(d));
10765 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10766 mkexpr(cc), mkU64(0), mkU64(0));
10767 return "stcke";
10768}
10769
florian933065d2011-07-11 01:48:02 +000010770static HChar *
10771s390_irgen_STFLE(IRTemp op2addr)
10772{
10773 IRDirty *d;
10774 IRTemp cc = newTemp(Ity_I64);
10775
10776 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
10777 &s390x_dirtyhelper_STFLE,
10778 mkIRExprVec_1(mkexpr(op2addr)));
10779
10780 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
10781
10782 d->fxState[0].fx = Ifx_Modify; /* read then write */
10783 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
10784 d->fxState[0].size = sizeof(ULong);
10785 d->nFxState = 1;
10786
10787 d->mAddr = mkexpr(op2addr);
10788 /* Pretend all double words are written */
10789 d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
10790 d->mFx = Ifx_Write;
10791
10792 stmt(IRStmt_Dirty(d));
10793
10794 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
10795
10796 return "stfle";
10797}
10798
floriana4384a32011-08-11 16:58:45 +000010799static HChar *
10800s390_irgen_CKSM(UChar r1,UChar r2)
10801{
10802 IRTemp addr = newTemp(Ity_I64);
10803 IRTemp op = newTemp(Ity_I32);
10804 IRTemp len = newTemp(Ity_I64);
10805 IRTemp oldval = newTemp(Ity_I32);
10806 IRTemp mask = newTemp(Ity_I32);
10807 IRTemp newop = newTemp(Ity_I32);
10808 IRTemp result = newTemp(Ity_I32);
10809 IRTemp result1 = newTemp(Ity_I32);
10810 IRTemp inc = newTemp(Ity_I64);
10811
10812 assign(oldval, get_gpr_w1(r1));
10813 assign(addr, get_gpr_dw0(r2));
10814 assign(len, get_gpr_dw0(r2+1));
10815
10816 /* Condition code is always zero. */
10817 s390_cc_set(0);
10818
10819 /* If length is zero, there is no need to calculate the checksum */
10820 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)),
10821 guest_IA_next_instr);
10822
10823 /* Assiging the increment variable to adjust address and length
10824 later on. */
10825 assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10826 mkexpr(len), mkU64(4)));
10827
10828 /* If length < 4 the final 4-byte 2nd operand value is computed by
10829 appending the remaining bytes to the right with 0. This is done
10830 by AND'ing the 4 bytes loaded from memory with an appropriate
10831 mask. If length >= 4, that mask is simply 0xffffffff. */
10832
10833 assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10834 /* Mask computation when len < 4:
10835 0xffffffff << (32 - (len % 4)*8) */
10836 binop(Iop_Shl32, mkU32(0xffffffff),
10837 unop(Iop_32to8,
10838 binop(Iop_Sub32, mkU32(32),
10839 binop(Iop_Shl32,
10840 unop(Iop_64to32,
10841 binop(Iop_And64,
10842 mkexpr(len), mkU64(3))),
10843 mkU8(3))))),
10844 mkU32(0xffffffff)));
10845
10846 assign(op, load(Ity_I32, mkexpr(addr)));
10847 assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask)));
10848 assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval)));
10849
10850 /* Checking for carry */
10851 assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)),
10852 binop(Iop_Add32, mkexpr(result), mkU32(1)),
10853 mkexpr(result)));
10854
10855 put_gpr_w1(r1, mkexpr(result1));
10856 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc)));
10857 put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc)));
10858
10859 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)),
10860 guest_IA_curr_instr);
10861
10862 return "cksm";
10863}
10864
florian9af37692012-01-15 21:01:16 +000010865static HChar *
10866s390_irgen_TROO(UChar m3, UChar r1, UChar r2)
10867{
10868 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10869 src_addr = newTemp(Ity_I64);
10870 des_addr = newTemp(Ity_I64);
10871 tab_addr = newTemp(Ity_I64);
10872 test_byte = newTemp(Ity_I8);
10873 src_len = newTemp(Ity_I64);
10874
10875 assign(src_addr, get_gpr_dw0(r2));
10876 assign(des_addr, get_gpr_dw0(r1));
10877 assign(tab_addr, get_gpr_dw0(1));
florian53518532012-01-18 14:00:31 +000010878 assign(src_len, get_gpr_dw0(r1+1));
florian9af37692012-01-15 21:01:16 +000010879 assign(test_byte, get_gpr_b7(0));
10880
10881 IRTemp op = newTemp(Ity_I8);
10882 IRTemp op1 = newTemp(Ity_I8);
10883 IRTemp result = newTemp(Ity_I64);
10884
10885 /* End of source string? We're done; proceed to next insn */
10886 s390_cc_set(0);
10887 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10888 guest_IA_next_instr);
10889
10890 /* Load character from source string, index translation table and
10891 store translated character in op1. */
10892 assign(op, load(Ity_I8, mkexpr(src_addr)));
10893
10894 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
10895 mkexpr(tab_addr)));
10896 assign(op1, load(Ity_I8, mkexpr(result)));
10897
10898 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10899 s390_cc_set(1);
10900 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10901 guest_IA_next_instr);
10902 }
10903 store(get_gpr_dw0(r1), mkexpr(op1));
10904
10905 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10906 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
10907 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
10908
10909 always_goto_and_chase(guest_IA_curr_instr);
10910
10911 return "troo";
10912}
10913
florian730448f2012-02-04 17:07:07 +000010914static HChar *
10915s390_irgen_TRTO(UChar m3, UChar r1, UChar r2)
10916{
10917 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10918 src_addr = newTemp(Ity_I64);
10919 des_addr = newTemp(Ity_I64);
10920 tab_addr = newTemp(Ity_I64);
10921 test_byte = newTemp(Ity_I8);
10922 src_len = newTemp(Ity_I64);
10923
10924 assign(src_addr, get_gpr_dw0(r2));
10925 assign(des_addr, get_gpr_dw0(r1));
10926 assign(tab_addr, get_gpr_dw0(1));
10927 assign(src_len, get_gpr_dw0(r1+1));
10928 assign(test_byte, get_gpr_b7(0));
10929
10930 IRTemp op = newTemp(Ity_I16);
10931 IRTemp op1 = newTemp(Ity_I8);
10932 IRTemp result = newTemp(Ity_I64);
10933
10934 /* End of source string? We're done; proceed to next insn */
10935 s390_cc_set(0);
10936 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10937 guest_IA_next_instr);
10938
10939 /* Load character from source string, index translation table and
10940 store translated character in op1. */
10941 assign(op, load(Ity_I16, mkexpr(src_addr)));
10942
10943 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
10944 mkexpr(tab_addr)));
10945
10946 assign(op1, load(Ity_I8, mkexpr(result)));
10947
10948 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10949 s390_cc_set(1);
10950 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10951 guest_IA_next_instr);
10952 }
10953 store(get_gpr_dw0(r1), mkexpr(op1));
10954
10955 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
10956 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10957 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
10958
10959 always_goto_and_chase(guest_IA_curr_instr);
10960
10961 return "trto";
10962}
10963
10964static HChar *
10965s390_irgen_TROT(UChar m3, UChar r1, UChar r2)
10966{
10967 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10968 src_addr = newTemp(Ity_I64);
10969 des_addr = newTemp(Ity_I64);
10970 tab_addr = newTemp(Ity_I64);
10971 test_byte = newTemp(Ity_I16);
10972 src_len = newTemp(Ity_I64);
10973
10974 assign(src_addr, get_gpr_dw0(r2));
10975 assign(des_addr, get_gpr_dw0(r1));
10976 assign(tab_addr, get_gpr_dw0(1));
10977 assign(src_len, get_gpr_dw0(r1+1));
10978 assign(test_byte, get_gpr_hw3(0));
10979
10980 IRTemp op = newTemp(Ity_I8);
10981 IRTemp op1 = newTemp(Ity_I16);
10982 IRTemp result = newTemp(Ity_I64);
10983
10984 /* End of source string? We're done; proceed to next insn */
10985 s390_cc_set(0);
10986 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10987 guest_IA_next_instr);
10988
10989 /* Load character from source string, index translation table and
10990 store translated character in op1. */
10991 assign(op, binop(Iop_Shl8, load(Ity_I8, mkexpr(src_addr)), mkU8(1)));
10992
10993 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
10994 mkexpr(tab_addr)));
10995 assign(op1, load(Ity_I16, mkexpr(result)));
10996
10997 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10998 s390_cc_set(1);
10999 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11000 guest_IA_next_instr);
11001 }
11002 store(get_gpr_dw0(r1), mkexpr(op1));
11003
11004 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11005 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11006 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11007
11008 always_goto_and_chase(guest_IA_curr_instr);
11009
11010 return "trot";
11011}
11012
11013static HChar *
11014s390_irgen_TRTT(UChar m3, UChar r1, UChar r2)
11015{
11016 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
11017 src_addr = newTemp(Ity_I64);
11018 des_addr = newTemp(Ity_I64);
11019 tab_addr = newTemp(Ity_I64);
11020 test_byte = newTemp(Ity_I16);
11021 src_len = newTemp(Ity_I64);
11022
11023 assign(src_addr, get_gpr_dw0(r2));
11024 assign(des_addr, get_gpr_dw0(r1));
11025 assign(tab_addr, get_gpr_dw0(1));
11026 assign(src_len, get_gpr_dw0(r1+1));
11027 assign(test_byte, get_gpr_hw3(0));
11028
11029 IRTemp op = newTemp(Ity_I16);
11030 IRTemp op1 = newTemp(Ity_I16);
11031 IRTemp result = newTemp(Ity_I64);
11032
11033 /* End of source string? We're done; proceed to next insn */
11034 s390_cc_set(0);
11035 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11036 guest_IA_next_instr);
11037
11038 /* Load character from source string, index translation table and
11039 store translated character in op1. */
11040 assign(op, binop(Iop_Shl16, load(Ity_I16, mkexpr(src_addr)), mkU8(1)));
11041
11042 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
11043 mkexpr(tab_addr)));
11044 assign(op1, load(Ity_I16, mkexpr(result)));
11045
11046 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11047 s390_cc_set(1);
11048 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11049 guest_IA_next_instr);
11050 }
11051
11052 store(get_gpr_dw0(r1), mkexpr(op1));
11053
11054 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
11055 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11056 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
11057
11058 always_goto_and_chase(guest_IA_curr_instr);
11059
11060 return "trtt";
11061}
11062
11063static HChar *
11064s390_irgen_TR(UChar length, IRTemp start1, IRTemp start2)
11065{
florianf87d4fb2012-05-05 02:55:24 +000011066 IRTemp len = newTemp(Ity_I64);
florian730448f2012-02-04 17:07:07 +000011067
florianf87d4fb2012-05-05 02:55:24 +000011068 assign(len, mkU64(length));
11069 s390_irgen_TR_EX(len, start1, start2);
florian8844a632012-04-13 04:04:06 +000011070 dummy_put_IA();
florian730448f2012-02-04 17:07:07 +000011071
11072 return "tr";
11073}
11074
11075static HChar *
11076s390_irgen_TRE(UChar r1,UChar r2)
11077{
11078 IRTemp src_addr, tab_addr, src_len, test_byte;
11079 src_addr = newTemp(Ity_I64);
11080 tab_addr = newTemp(Ity_I64);
11081 src_len = newTemp(Ity_I64);
11082 test_byte = newTemp(Ity_I8);
11083
11084 assign(src_addr, get_gpr_dw0(r1));
11085 assign(src_len, get_gpr_dw0(r1+1));
11086 assign(tab_addr, get_gpr_dw0(r2));
11087 assign(test_byte, get_gpr_b7(0));
11088
11089 IRTemp op = newTemp(Ity_I8);
11090 IRTemp op1 = newTemp(Ity_I8);
11091 IRTemp result = newTemp(Ity_I64);
11092
11093 /* End of source string? We're done; proceed to next insn */
11094 s390_cc_set(0);
11095 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11096 guest_IA_next_instr);
11097
11098 /* Load character from source string and compare with test byte */
11099 assign(op, load(Ity_I8, mkexpr(src_addr)));
11100
11101 s390_cc_set(1);
11102 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op), mkexpr(test_byte)),
11103 guest_IA_next_instr);
11104
11105 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11106 mkexpr(tab_addr)));
11107
11108 assign(op1, load(Ity_I8, mkexpr(result)));
11109
11110 store(get_gpr_dw0(r1), mkexpr(op1));
11111 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11112 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11113
11114 always_goto(mkU64(guest_IA_curr_instr));
11115
11116 return "tre";
11117}
11118
floriana4384a32011-08-11 16:58:45 +000011119
sewardj2019a972011-03-07 16:04:07 +000011120/*------------------------------------------------------------*/
11121/*--- Build IR for special instructions ---*/
11122/*------------------------------------------------------------*/
11123
florianb4df7682011-07-05 02:09:01 +000011124static void
sewardj2019a972011-03-07 16:04:07 +000011125s390_irgen_client_request(void)
11126{
11127 if (0)
11128 vex_printf("%%R3 = client_request ( %%R2 )\n");
11129
florianf9e1ed72012-04-17 02:41:56 +000011130 Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE
11131 + S390_SPECIAL_OP_SIZE;
sewardj2019a972011-03-07 16:04:07 +000011132
florianf9e1ed72012-04-17 02:41:56 +000011133 dis_res->jk_StopHere = Ijk_ClientReq;
sewardj2019a972011-03-07 16:04:07 +000011134 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000011135
11136 put_IA(mkaddr_expr(next));
sewardj2019a972011-03-07 16:04:07 +000011137}
11138
florianb4df7682011-07-05 02:09:01 +000011139static void
sewardj2019a972011-03-07 16:04:07 +000011140s390_irgen_guest_NRADDR(void)
11141{
11142 if (0)
11143 vex_printf("%%R3 = guest_NRADDR\n");
11144
floriane88b3c92011-07-05 02:48:39 +000011145 put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
sewardj2019a972011-03-07 16:04:07 +000011146}
11147
florianb4df7682011-07-05 02:09:01 +000011148static void
sewardj2019a972011-03-07 16:04:07 +000011149s390_irgen_call_noredir(void)
11150{
florianf9e1ed72012-04-17 02:41:56 +000011151 Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE
11152 + S390_SPECIAL_OP_SIZE;
11153
sewardj2019a972011-03-07 16:04:07 +000011154 /* Continue after special op */
florianf9e1ed72012-04-17 02:41:56 +000011155 put_gpr_dw0(14, mkaddr_expr(next));
sewardj2019a972011-03-07 16:04:07 +000011156
11157 /* The address is in REG1, all parameters are in the right (guest) places */
florianf9e1ed72012-04-17 02:41:56 +000011158 put_IA(get_gpr_dw0(1));
sewardj2019a972011-03-07 16:04:07 +000011159
11160 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000011161 dis_res->jk_StopHere = Ijk_NoRedir;
sewardj2019a972011-03-07 16:04:07 +000011162}
11163
11164/* Force proper alignment for the structures below. */
11165#pragma pack(1)
11166
11167
11168static s390_decode_t
11169s390_decode_2byte_and_irgen(UChar *bytes)
11170{
11171 typedef union {
11172 struct {
11173 unsigned int op : 16;
11174 } E;
11175 struct {
11176 unsigned int op : 8;
11177 unsigned int i : 8;
11178 } I;
11179 struct {
11180 unsigned int op : 8;
11181 unsigned int r1 : 4;
11182 unsigned int r2 : 4;
11183 } RR;
11184 } formats;
11185 union {
11186 formats fmt;
11187 UShort value;
11188 } ovl;
11189
11190 vassert(sizeof(formats) == 2);
11191
11192 ((char *)(&ovl.value))[0] = bytes[0];
11193 ((char *)(&ovl.value))[1] = bytes[1];
11194
11195 switch (ovl.value & 0xffff) {
florian30e89012011-08-08 18:22:58 +000011196 case 0x0000: /* invalid opcode */
11197 s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011198 case 0x0101: /* PR */ goto unimplemented;
11199 case 0x0102: /* UPT */ goto unimplemented;
11200 case 0x0104: /* PTFF */ goto unimplemented;
11201 case 0x0107: /* SCKPF */ goto unimplemented;
11202 case 0x010a: /* PFPO */ goto unimplemented;
11203 case 0x010b: /* TAM */ goto unimplemented;
11204 case 0x010c: /* SAM24 */ goto unimplemented;
11205 case 0x010d: /* SAM31 */ goto unimplemented;
11206 case 0x010e: /* SAM64 */ goto unimplemented;
11207 case 0x01ff: /* TRAP2 */ goto unimplemented;
11208 }
11209
11210 switch ((ovl.value & 0xff00) >> 8) {
11211 case 0x04: /* SPM */ goto unimplemented;
11212 case 0x05: /* BALR */ goto unimplemented;
11213 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11214 goto ok;
11215 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11216 goto ok;
11217 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
11218 case 0x0b: /* BSM */ goto unimplemented;
11219 case 0x0c: /* BASSM */ goto unimplemented;
11220 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11221 goto ok;
florianb0c9a132011-09-08 15:37:39 +000011222 case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11223 goto ok;
11224 case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11225 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011226 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11227 goto ok;
11228 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11229 goto ok;
11230 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11231 goto ok;
11232 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11233 goto ok;
11234 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11235 goto ok;
11236 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11237 goto ok;
11238 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11239 goto ok;
11240 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11241 goto ok;
11242 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11243 goto ok;
11244 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11245 goto ok;
11246 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11247 goto ok;
11248 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11249 goto ok;
11250 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11251 goto ok;
11252 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11253 goto ok;
11254 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11255 goto ok;
11256 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11257 goto ok;
11258 case 0x20: /* LPDR */ goto unimplemented;
11259 case 0x21: /* LNDR */ goto unimplemented;
11260 case 0x22: /* LTDR */ goto unimplemented;
11261 case 0x23: /* LCDR */ goto unimplemented;
11262 case 0x24: /* HDR */ goto unimplemented;
11263 case 0x25: /* LDXR */ goto unimplemented;
11264 case 0x26: /* MXR */ goto unimplemented;
11265 case 0x27: /* MXDR */ goto unimplemented;
11266 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11267 goto ok;
11268 case 0x29: /* CDR */ goto unimplemented;
11269 case 0x2a: /* ADR */ goto unimplemented;
11270 case 0x2b: /* SDR */ goto unimplemented;
11271 case 0x2c: /* MDR */ goto unimplemented;
11272 case 0x2d: /* DDR */ goto unimplemented;
11273 case 0x2e: /* AWR */ goto unimplemented;
11274 case 0x2f: /* SWR */ goto unimplemented;
11275 case 0x30: /* LPER */ goto unimplemented;
11276 case 0x31: /* LNER */ goto unimplemented;
11277 case 0x32: /* LTER */ goto unimplemented;
11278 case 0x33: /* LCER */ goto unimplemented;
11279 case 0x34: /* HER */ goto unimplemented;
11280 case 0x35: /* LEDR */ goto unimplemented;
11281 case 0x36: /* AXR */ goto unimplemented;
11282 case 0x37: /* SXR */ goto unimplemented;
11283 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11284 goto ok;
11285 case 0x39: /* CER */ goto unimplemented;
11286 case 0x3a: /* AER */ goto unimplemented;
11287 case 0x3b: /* SER */ goto unimplemented;
11288 case 0x3c: /* MDER */ goto unimplemented;
11289 case 0x3d: /* DER */ goto unimplemented;
11290 case 0x3e: /* AUR */ goto unimplemented;
11291 case 0x3f: /* SUR */ goto unimplemented;
11292 }
11293
11294 return S390_DECODE_UNKNOWN_INSN;
11295
11296ok:
11297 return S390_DECODE_OK;
11298
11299unimplemented:
11300 return S390_DECODE_UNIMPLEMENTED_INSN;
11301}
11302
11303static s390_decode_t
11304s390_decode_4byte_and_irgen(UChar *bytes)
11305{
11306 typedef union {
11307 struct {
11308 unsigned int op1 : 8;
11309 unsigned int r1 : 4;
11310 unsigned int op2 : 4;
11311 unsigned int i2 : 16;
11312 } RI;
11313 struct {
11314 unsigned int op : 16;
11315 unsigned int : 8;
11316 unsigned int r1 : 4;
11317 unsigned int r2 : 4;
11318 } RRE;
11319 struct {
11320 unsigned int op : 16;
11321 unsigned int r1 : 4;
11322 unsigned int : 4;
11323 unsigned int r3 : 4;
11324 unsigned int r2 : 4;
11325 } RRF;
11326 struct {
11327 unsigned int op : 16;
11328 unsigned int r3 : 4;
11329 unsigned int m4 : 4;
11330 unsigned int r1 : 4;
11331 unsigned int r2 : 4;
11332 } RRF2;
11333 struct {
11334 unsigned int op : 16;
11335 unsigned int r3 : 4;
11336 unsigned int : 4;
11337 unsigned int r1 : 4;
11338 unsigned int r2 : 4;
11339 } RRF3;
11340 struct {
11341 unsigned int op : 16;
11342 unsigned int r3 : 4;
11343 unsigned int : 4;
11344 unsigned int r1 : 4;
11345 unsigned int r2 : 4;
11346 } RRR;
11347 struct {
11348 unsigned int op : 16;
11349 unsigned int r3 : 4;
11350 unsigned int : 4;
11351 unsigned int r1 : 4;
11352 unsigned int r2 : 4;
11353 } RRF4;
11354 struct {
11355 unsigned int op : 8;
11356 unsigned int r1 : 4;
11357 unsigned int r3 : 4;
11358 unsigned int b2 : 4;
11359 unsigned int d2 : 12;
11360 } RS;
11361 struct {
11362 unsigned int op : 8;
11363 unsigned int r1 : 4;
11364 unsigned int r3 : 4;
11365 unsigned int i2 : 16;
11366 } RSI;
11367 struct {
11368 unsigned int op : 8;
11369 unsigned int r1 : 4;
11370 unsigned int x2 : 4;
11371 unsigned int b2 : 4;
11372 unsigned int d2 : 12;
11373 } RX;
11374 struct {
11375 unsigned int op : 16;
11376 unsigned int b2 : 4;
11377 unsigned int d2 : 12;
11378 } S;
11379 struct {
11380 unsigned int op : 8;
11381 unsigned int i2 : 8;
11382 unsigned int b1 : 4;
11383 unsigned int d1 : 12;
11384 } SI;
11385 } formats;
11386 union {
11387 formats fmt;
11388 UInt value;
11389 } ovl;
11390
11391 vassert(sizeof(formats) == 4);
11392
11393 ((char *)(&ovl.value))[0] = bytes[0];
11394 ((char *)(&ovl.value))[1] = bytes[1];
11395 ((char *)(&ovl.value))[2] = bytes[2];
11396 ((char *)(&ovl.value))[3] = bytes[3];
11397
11398 switch ((ovl.value & 0xff0f0000) >> 16) {
11399 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
11400 ovl.fmt.RI.i2); goto ok;
11401 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
11402 ovl.fmt.RI.i2); goto ok;
11403 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
11404 ovl.fmt.RI.i2); goto ok;
11405 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
11406 ovl.fmt.RI.i2); goto ok;
11407 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
11408 ovl.fmt.RI.i2); goto ok;
11409 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
11410 ovl.fmt.RI.i2); goto ok;
11411 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
11412 ovl.fmt.RI.i2); goto ok;
11413 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
11414 ovl.fmt.RI.i2); goto ok;
11415 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
11416 ovl.fmt.RI.i2); goto ok;
11417 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
11418 ovl.fmt.RI.i2); goto ok;
11419 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
11420 ovl.fmt.RI.i2); goto ok;
11421 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
11422 ovl.fmt.RI.i2); goto ok;
11423 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
11424 ovl.fmt.RI.i2); goto ok;
11425 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
11426 ovl.fmt.RI.i2); goto ok;
11427 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
11428 ovl.fmt.RI.i2); goto ok;
11429 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
11430 ovl.fmt.RI.i2); goto ok;
11431 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
11432 ovl.fmt.RI.i2); goto ok;
11433 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
11434 ovl.fmt.RI.i2); goto ok;
11435 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
11436 ovl.fmt.RI.i2); goto ok;
11437 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
11438 ovl.fmt.RI.i2); goto ok;
11439 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11440 goto ok;
11441 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
11442 ovl.fmt.RI.i2); goto ok;
11443 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
11444 ovl.fmt.RI.i2); goto ok;
11445 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
11446 ovl.fmt.RI.i2); goto ok;
11447 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11448 goto ok;
11449 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
11450 ovl.fmt.RI.i2); goto ok;
11451 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11452 goto ok;
11453 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
11454 ovl.fmt.RI.i2); goto ok;
11455 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11456 goto ok;
11457 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
11458 ovl.fmt.RI.i2); goto ok;
11459 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11460 goto ok;
11461 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
11462 ovl.fmt.RI.i2); goto ok;
11463 }
11464
11465 switch ((ovl.value & 0xffff0000) >> 16) {
11466 case 0x8000: /* SSM */ goto unimplemented;
11467 case 0x8200: /* LPSW */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011468 case 0x9300: /* TS */ goto unimplemented;
sewardj2019a972011-03-07 16:04:07 +000011469 case 0xb202: /* STIDP */ goto unimplemented;
11470 case 0xb204: /* SCK */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011471 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);
11472 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011473 case 0xb206: /* SCKC */ goto unimplemented;
11474 case 0xb207: /* STCKC */ goto unimplemented;
11475 case 0xb208: /* SPT */ goto unimplemented;
11476 case 0xb209: /* STPT */ goto unimplemented;
11477 case 0xb20a: /* SPKA */ goto unimplemented;
11478 case 0xb20b: /* IPK */ goto unimplemented;
11479 case 0xb20d: /* PTLB */ goto unimplemented;
11480 case 0xb210: /* SPX */ goto unimplemented;
11481 case 0xb211: /* STPX */ goto unimplemented;
11482 case 0xb212: /* STAP */ goto unimplemented;
11483 case 0xb214: /* SIE */ goto unimplemented;
11484 case 0xb218: /* PC */ goto unimplemented;
11485 case 0xb219: /* SAC */ goto unimplemented;
11486 case 0xb21a: /* CFC */ goto unimplemented;
11487 case 0xb221: /* IPTE */ goto unimplemented;
11488 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
11489 case 0xb223: /* IVSK */ goto unimplemented;
11490 case 0xb224: /* IAC */ goto unimplemented;
11491 case 0xb225: /* SSAR */ goto unimplemented;
11492 case 0xb226: /* EPAR */ goto unimplemented;
11493 case 0xb227: /* ESAR */ goto unimplemented;
11494 case 0xb228: /* PT */ goto unimplemented;
11495 case 0xb229: /* ISKE */ goto unimplemented;
11496 case 0xb22a: /* RRBE */ goto unimplemented;
11497 case 0xb22b: /* SSKE */ goto unimplemented;
11498 case 0xb22c: /* TB */ goto unimplemented;
11499 case 0xb22d: /* DXR */ goto unimplemented;
11500 case 0xb22e: /* PGIN */ goto unimplemented;
11501 case 0xb22f: /* PGOUT */ goto unimplemented;
11502 case 0xb230: /* CSCH */ goto unimplemented;
11503 case 0xb231: /* HSCH */ goto unimplemented;
11504 case 0xb232: /* MSCH */ goto unimplemented;
11505 case 0xb233: /* SSCH */ goto unimplemented;
11506 case 0xb234: /* STSCH */ goto unimplemented;
11507 case 0xb235: /* TSCH */ goto unimplemented;
11508 case 0xb236: /* TPI */ goto unimplemented;
11509 case 0xb237: /* SAL */ goto unimplemented;
11510 case 0xb238: /* RSCH */ goto unimplemented;
11511 case 0xb239: /* STCRW */ goto unimplemented;
11512 case 0xb23a: /* STCPS */ goto unimplemented;
11513 case 0xb23b: /* RCHP */ goto unimplemented;
11514 case 0xb23c: /* SCHM */ goto unimplemented;
11515 case 0xb240: /* BAKR */ goto unimplemented;
floriana4384a32011-08-11 16:58:45 +000011516 case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1,
11517 ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011518 case 0xb244: /* SQDR */ goto unimplemented;
11519 case 0xb245: /* SQER */ goto unimplemented;
11520 case 0xb246: /* STURA */ goto unimplemented;
11521 case 0xb247: /* MSTA */ goto unimplemented;
11522 case 0xb248: /* PALB */ goto unimplemented;
11523 case 0xb249: /* EREG */ goto unimplemented;
11524 case 0xb24a: /* ESTA */ goto unimplemented;
11525 case 0xb24b: /* LURA */ goto unimplemented;
11526 case 0xb24c: /* TAR */ goto unimplemented;
11527 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
11528 ovl.fmt.RRE.r2); goto ok;
11529 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11530 goto ok;
11531 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11532 goto ok;
11533 case 0xb250: /* CSP */ goto unimplemented;
11534 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
11535 ovl.fmt.RRE.r2); goto ok;
11536 case 0xb254: /* MVPG */ goto unimplemented;
11537 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
11538 ovl.fmt.RRE.r2); goto ok;
11539 case 0xb257: /* CUSE */ goto unimplemented;
11540 case 0xb258: /* BSG */ goto unimplemented;
11541 case 0xb25a: /* BSA */ goto unimplemented;
11542 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
11543 ovl.fmt.RRE.r2); goto ok;
11544 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
11545 ovl.fmt.RRE.r2); goto ok;
11546 case 0xb263: /* CMPSC */ goto unimplemented;
11547 case 0xb274: /* SIGA */ goto unimplemented;
11548 case 0xb276: /* XSCH */ goto unimplemented;
11549 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011550 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011551 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011552 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011553 case 0xb27d: /* STSI */ goto unimplemented;
11554 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
11555 goto ok;
11556 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11557 goto ok;
11558 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11559 goto ok;
florian730448f2012-02-04 17:07:07 +000011560 case 0xb2a5: s390_format_RRE_FF(s390_irgen_TRE, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011561 case 0xb2a6: /* CU21 */ goto unimplemented;
11562 case 0xb2a7: /* CU12 */ goto unimplemented;
florian933065d2011-07-11 01:48:02 +000011563 case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
11564 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011565 case 0xb2b1: /* STFL */ goto unimplemented;
11566 case 0xb2b2: /* LPSWE */ goto unimplemented;
11567 case 0xb2b8: /* SRNMB */ goto unimplemented;
11568 case 0xb2b9: /* SRNMT */ goto unimplemented;
11569 case 0xb2bd: /* LFAS */ goto unimplemented;
11570 case 0xb2ff: /* TRAP4 */ goto unimplemented;
11571 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
11572 ovl.fmt.RRE.r2); goto ok;
11573 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11574 ovl.fmt.RRE.r2); goto ok;
11575 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11576 ovl.fmt.RRE.r2); goto ok;
11577 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11578 ovl.fmt.RRE.r2); goto ok;
11579 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11580 ovl.fmt.RRE.r2); goto ok;
11581 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11582 ovl.fmt.RRE.r2); goto ok;
11583 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11584 ovl.fmt.RRE.r2); goto ok;
11585 case 0xb307: /* MXDBR */ goto unimplemented;
11586 case 0xb308: /* KEBR */ goto unimplemented;
11587 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11588 ovl.fmt.RRE.r2); goto ok;
11589 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11590 ovl.fmt.RRE.r2); goto ok;
11591 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11592 ovl.fmt.RRE.r2); goto ok;
11593 case 0xb30c: /* MDEBR */ goto unimplemented;
11594 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11595 ovl.fmt.RRE.r2); goto ok;
11596 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11597 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11598 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11599 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11600 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11601 ovl.fmt.RRE.r2); goto ok;
11602 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11603 ovl.fmt.RRE.r2); goto ok;
11604 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11605 ovl.fmt.RRE.r2); goto ok;
11606 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11607 ovl.fmt.RRE.r2); goto ok;
11608 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11609 ovl.fmt.RRE.r2); goto ok;
11610 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11611 ovl.fmt.RRE.r2); goto ok;
11612 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11613 ovl.fmt.RRE.r2); goto ok;
11614 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11615 ovl.fmt.RRE.r2); goto ok;
11616 case 0xb318: /* KDBR */ goto unimplemented;
11617 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11618 ovl.fmt.RRE.r2); goto ok;
11619 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11620 ovl.fmt.RRE.r2); goto ok;
11621 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11622 ovl.fmt.RRE.r2); goto ok;
11623 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11624 ovl.fmt.RRE.r2); goto ok;
11625 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11626 ovl.fmt.RRE.r2); goto ok;
11627 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11628 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11629 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11630 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11631 case 0xb324: /* LDER */ goto unimplemented;
11632 case 0xb325: /* LXDR */ goto unimplemented;
11633 case 0xb326: /* LXER */ goto unimplemented;
11634 case 0xb32e: /* MAER */ goto unimplemented;
11635 case 0xb32f: /* MSER */ goto unimplemented;
11636 case 0xb336: /* SQXR */ goto unimplemented;
11637 case 0xb337: /* MEER */ goto unimplemented;
11638 case 0xb338: /* MAYLR */ goto unimplemented;
11639 case 0xb339: /* MYLR */ goto unimplemented;
11640 case 0xb33a: /* MAYR */ goto unimplemented;
11641 case 0xb33b: /* MYR */ goto unimplemented;
11642 case 0xb33c: /* MAYHR */ goto unimplemented;
11643 case 0xb33d: /* MYHR */ goto unimplemented;
11644 case 0xb33e: /* MADR */ goto unimplemented;
11645 case 0xb33f: /* MSDR */ goto unimplemented;
11646 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11647 ovl.fmt.RRE.r2); goto ok;
11648 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11649 ovl.fmt.RRE.r2); goto ok;
11650 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11651 ovl.fmt.RRE.r2); goto ok;
11652 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11653 ovl.fmt.RRE.r2); goto ok;
11654 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11655 ovl.fmt.RRE.r2); goto ok;
11656 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11657 ovl.fmt.RRE.r2); goto ok;
11658 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11659 ovl.fmt.RRE.r2); goto ok;
11660 case 0xb347: /* FIXBR */ goto unimplemented;
11661 case 0xb348: /* KXBR */ goto unimplemented;
11662 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11663 ovl.fmt.RRE.r2); goto ok;
11664 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11665 ovl.fmt.RRE.r2); goto ok;
11666 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11667 ovl.fmt.RRE.r2); goto ok;
11668 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11669 ovl.fmt.RRE.r2); goto ok;
11670 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11671 ovl.fmt.RRE.r2); goto ok;
11672 case 0xb350: /* TBEDR */ goto unimplemented;
11673 case 0xb351: /* TBDR */ goto unimplemented;
11674 case 0xb353: /* DIEBR */ goto unimplemented;
11675 case 0xb357: /* FIEBR */ goto unimplemented;
11676 case 0xb358: /* THDER */ goto unimplemented;
11677 case 0xb359: /* THDR */ goto unimplemented;
11678 case 0xb35b: /* DIDBR */ goto unimplemented;
11679 case 0xb35f: /* FIDBR */ goto unimplemented;
11680 case 0xb360: /* LPXR */ goto unimplemented;
11681 case 0xb361: /* LNXR */ goto unimplemented;
11682 case 0xb362: /* LTXR */ goto unimplemented;
11683 case 0xb363: /* LCXR */ goto unimplemented;
11684 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11685 ovl.fmt.RRE.r2); goto ok;
11686 case 0xb366: /* LEXR */ goto unimplemented;
11687 case 0xb367: /* FIXR */ goto unimplemented;
11688 case 0xb369: /* CXR */ goto unimplemented;
11689 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11690 ovl.fmt.RRE.r2); goto ok;
11691 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11692 ovl.fmt.RRE.r2); goto ok;
11693 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11694 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11695 goto ok;
11696 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11697 ovl.fmt.RRE.r2); goto ok;
11698 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11699 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11700 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11701 case 0xb377: /* FIER */ goto unimplemented;
11702 case 0xb37f: /* FIDR */ goto unimplemented;
11703 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11704 case 0xb385: /* SFASR */ goto unimplemented;
11705 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11706 case 0xb390: /* CELFBR */ goto unimplemented;
11707 case 0xb391: /* CDLFBR */ goto unimplemented;
11708 case 0xb392: /* CXLFBR */ goto unimplemented;
11709 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11710 ovl.fmt.RRE.r2); goto ok;
11711 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11712 ovl.fmt.RRE.r2); goto ok;
11713 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11714 ovl.fmt.RRE.r2); goto ok;
11715 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11716 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11717 goto ok;
11718 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11719 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11720 goto ok;
11721 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11722 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11723 goto ok;
11724 case 0xb3a0: /* CELGBR */ goto unimplemented;
11725 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11726 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11727 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11728 ovl.fmt.RRE.r2); goto ok;
11729 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11730 ovl.fmt.RRE.r2); goto ok;
11731 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11732 ovl.fmt.RRE.r2); goto ok;
11733 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11734 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11735 goto ok;
11736 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11737 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11738 goto ok;
11739 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11740 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11741 goto ok;
11742 case 0xb3b4: /* CEFR */ goto unimplemented;
11743 case 0xb3b5: /* CDFR */ goto unimplemented;
11744 case 0xb3b6: /* CXFR */ goto unimplemented;
11745 case 0xb3b8: /* CFER */ goto unimplemented;
11746 case 0xb3b9: /* CFDR */ goto unimplemented;
11747 case 0xb3ba: /* CFXR */ goto unimplemented;
11748 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11749 ovl.fmt.RRE.r2); goto ok;
11750 case 0xb3c4: /* CEGR */ goto unimplemented;
11751 case 0xb3c5: /* CDGR */ goto unimplemented;
11752 case 0xb3c6: /* CXGR */ goto unimplemented;
11753 case 0xb3c8: /* CGER */ goto unimplemented;
11754 case 0xb3c9: /* CGDR */ goto unimplemented;
11755 case 0xb3ca: /* CGXR */ goto unimplemented;
11756 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11757 ovl.fmt.RRE.r2); goto ok;
11758 case 0xb3d0: /* MDTR */ goto unimplemented;
11759 case 0xb3d1: /* DDTR */ goto unimplemented;
11760 case 0xb3d2: /* ADTR */ goto unimplemented;
11761 case 0xb3d3: /* SDTR */ goto unimplemented;
11762 case 0xb3d4: /* LDETR */ goto unimplemented;
11763 case 0xb3d5: /* LEDTR */ goto unimplemented;
11764 case 0xb3d6: /* LTDTR */ goto unimplemented;
11765 case 0xb3d7: /* FIDTR */ goto unimplemented;
11766 case 0xb3d8: /* MXTR */ goto unimplemented;
11767 case 0xb3d9: /* DXTR */ goto unimplemented;
11768 case 0xb3da: /* AXTR */ goto unimplemented;
11769 case 0xb3db: /* SXTR */ goto unimplemented;
11770 case 0xb3dc: /* LXDTR */ goto unimplemented;
11771 case 0xb3dd: /* LDXTR */ goto unimplemented;
11772 case 0xb3de: /* LTXTR */ goto unimplemented;
11773 case 0xb3df: /* FIXTR */ goto unimplemented;
11774 case 0xb3e0: /* KDTR */ goto unimplemented;
11775 case 0xb3e1: /* CGDTR */ goto unimplemented;
11776 case 0xb3e2: /* CUDTR */ goto unimplemented;
11777 case 0xb3e3: /* CSDTR */ goto unimplemented;
11778 case 0xb3e4: /* CDTR */ goto unimplemented;
11779 case 0xb3e5: /* EEDTR */ goto unimplemented;
11780 case 0xb3e7: /* ESDTR */ goto unimplemented;
11781 case 0xb3e8: /* KXTR */ goto unimplemented;
11782 case 0xb3e9: /* CGXTR */ goto unimplemented;
11783 case 0xb3ea: /* CUXTR */ goto unimplemented;
11784 case 0xb3eb: /* CSXTR */ goto unimplemented;
11785 case 0xb3ec: /* CXTR */ goto unimplemented;
11786 case 0xb3ed: /* EEXTR */ goto unimplemented;
11787 case 0xb3ef: /* ESXTR */ goto unimplemented;
11788 case 0xb3f1: /* CDGTR */ goto unimplemented;
11789 case 0xb3f2: /* CDUTR */ goto unimplemented;
11790 case 0xb3f3: /* CDSTR */ goto unimplemented;
11791 case 0xb3f4: /* CEDTR */ goto unimplemented;
11792 case 0xb3f5: /* QADTR */ goto unimplemented;
11793 case 0xb3f6: /* IEDTR */ goto unimplemented;
11794 case 0xb3f7: /* RRDTR */ goto unimplemented;
11795 case 0xb3f9: /* CXGTR */ goto unimplemented;
11796 case 0xb3fa: /* CXUTR */ goto unimplemented;
11797 case 0xb3fb: /* CXSTR */ goto unimplemented;
11798 case 0xb3fc: /* CEXTR */ goto unimplemented;
11799 case 0xb3fd: /* QAXTR */ goto unimplemented;
11800 case 0xb3fe: /* IEXTR */ goto unimplemented;
11801 case 0xb3ff: /* RRXTR */ goto unimplemented;
11802 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11803 ovl.fmt.RRE.r2); goto ok;
11804 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11805 ovl.fmt.RRE.r2); goto ok;
11806 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11807 ovl.fmt.RRE.r2); goto ok;
11808 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11809 ovl.fmt.RRE.r2); goto ok;
11810 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11811 ovl.fmt.RRE.r2); goto ok;
11812 case 0xb905: /* LURAG */ goto unimplemented;
11813 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11814 ovl.fmt.RRE.r2); goto ok;
11815 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11816 ovl.fmt.RRE.r2); goto ok;
11817 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11818 ovl.fmt.RRE.r2); goto ok;
11819 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11820 ovl.fmt.RRE.r2); goto ok;
11821 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11822 ovl.fmt.RRE.r2); goto ok;
11823 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11824 ovl.fmt.RRE.r2); goto ok;
11825 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11826 ovl.fmt.RRE.r2); goto ok;
11827 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11828 ovl.fmt.RRE.r2); goto ok;
11829 case 0xb90e: /* EREGG */ goto unimplemented;
11830 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11831 ovl.fmt.RRE.r2); goto ok;
11832 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11833 ovl.fmt.RRE.r2); goto ok;
11834 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11835 ovl.fmt.RRE.r2); goto ok;
11836 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11837 ovl.fmt.RRE.r2); goto ok;
11838 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11839 ovl.fmt.RRE.r2); goto ok;
11840 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11841 ovl.fmt.RRE.r2); goto ok;
11842 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11843 ovl.fmt.RRE.r2); goto ok;
11844 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11845 ovl.fmt.RRE.r2); goto ok;
11846 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11847 ovl.fmt.RRE.r2); goto ok;
11848 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11849 ovl.fmt.RRE.r2); goto ok;
11850 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11851 ovl.fmt.RRE.r2); goto ok;
11852 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11853 ovl.fmt.RRE.r2); goto ok;
11854 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11855 ovl.fmt.RRE.r2); goto ok;
11856 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11857 ovl.fmt.RRE.r2); goto ok;
11858 case 0xb91e: /* KMAC */ goto unimplemented;
11859 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11860 ovl.fmt.RRE.r2); goto ok;
11861 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11862 ovl.fmt.RRE.r2); goto ok;
11863 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11864 ovl.fmt.RRE.r2); goto ok;
11865 case 0xb925: /* STURG */ goto unimplemented;
11866 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11867 ovl.fmt.RRE.r2); goto ok;
11868 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11869 ovl.fmt.RRE.r2); goto ok;
11870 case 0xb928: /* PCKMO */ goto unimplemented;
11871 case 0xb92b: /* KMO */ goto unimplemented;
11872 case 0xb92c: /* PCC */ goto unimplemented;
11873 case 0xb92d: /* KMCTR */ goto unimplemented;
11874 case 0xb92e: /* KM */ goto unimplemented;
11875 case 0xb92f: /* KMC */ goto unimplemented;
11876 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11877 ovl.fmt.RRE.r2); goto ok;
11878 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11879 ovl.fmt.RRE.r2); goto ok;
11880 case 0xb93e: /* KIMD */ goto unimplemented;
11881 case 0xb93f: /* KLMD */ goto unimplemented;
11882 case 0xb941: /* CFDTR */ goto unimplemented;
11883 case 0xb942: /* CLGDTR */ goto unimplemented;
11884 case 0xb943: /* CLFDTR */ goto unimplemented;
11885 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11886 ovl.fmt.RRE.r2); goto ok;
11887 case 0xb949: /* CFXTR */ goto unimplemented;
11888 case 0xb94a: /* CLGXTR */ goto unimplemented;
11889 case 0xb94b: /* CLFXTR */ goto unimplemented;
11890 case 0xb951: /* CDFTR */ goto unimplemented;
11891 case 0xb952: /* CDLGTR */ goto unimplemented;
11892 case 0xb953: /* CDLFTR */ goto unimplemented;
11893 case 0xb959: /* CXFTR */ goto unimplemented;
11894 case 0xb95a: /* CXLGTR */ goto unimplemented;
11895 case 0xb95b: /* CXLFTR */ goto unimplemented;
11896 case 0xb960: /* CGRT */ goto unimplemented;
11897 case 0xb961: /* CLGRT */ goto unimplemented;
11898 case 0xb972: /* CRT */ goto unimplemented;
11899 case 0xb973: /* CLRT */ goto unimplemented;
11900 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11901 ovl.fmt.RRE.r2); goto ok;
11902 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11903 ovl.fmt.RRE.r2); goto ok;
11904 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11905 ovl.fmt.RRE.r2); goto ok;
11906 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11907 ovl.fmt.RRE.r2); goto ok;
11908 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11909 ovl.fmt.RRE.r2); goto ok;
11910 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11911 ovl.fmt.RRE.r2); goto ok;
11912 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11913 ovl.fmt.RRE.r2); goto ok;
11914 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11915 ovl.fmt.RRE.r2); goto ok;
11916 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11917 ovl.fmt.RRE.r2); goto ok;
11918 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11919 ovl.fmt.RRE.r2); goto ok;
11920 case 0xb98a: /* CSPG */ goto unimplemented;
11921 case 0xb98d: /* EPSW */ goto unimplemented;
11922 case 0xb98e: /* IDTE */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000011923 case 0xb990: s390_format_RRF_M0RERE(s390_irgen_TRTT, ovl.fmt.RRF3.r3,
11924 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
11925 case 0xb991: s390_format_RRF_M0RERE(s390_irgen_TRTO, ovl.fmt.RRF3.r3,
11926 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
11927 case 0xb992: s390_format_RRF_M0RERE(s390_irgen_TROT, ovl.fmt.RRF3.r3,
11928 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
florian9af37692012-01-15 21:01:16 +000011929 case 0xb993: s390_format_RRF_M0RERE(s390_irgen_TROO, ovl.fmt.RRF3.r3,
11930 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011931 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11932 ovl.fmt.RRE.r2); goto ok;
11933 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11934 ovl.fmt.RRE.r2); goto ok;
11935 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11936 ovl.fmt.RRE.r2); goto ok;
11937 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11938 ovl.fmt.RRE.r2); goto ok;
11939 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11940 ovl.fmt.RRE.r2); goto ok;
11941 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11942 ovl.fmt.RRE.r2); goto ok;
11943 case 0xb99a: /* EPAIR */ goto unimplemented;
11944 case 0xb99b: /* ESAIR */ goto unimplemented;
11945 case 0xb99d: /* ESEA */ goto unimplemented;
11946 case 0xb99e: /* PTI */ goto unimplemented;
11947 case 0xb99f: /* SSAIR */ goto unimplemented;
11948 case 0xb9a2: /* PTF */ goto unimplemented;
11949 case 0xb9aa: /* LPTEA */ goto unimplemented;
11950 case 0xb9ae: /* RRBM */ goto unimplemented;
11951 case 0xb9af: /* PFMF */ goto unimplemented;
11952 case 0xb9b0: /* CU14 */ goto unimplemented;
11953 case 0xb9b1: /* CU24 */ goto unimplemented;
11954 case 0xb9b2: /* CU41 */ goto unimplemented;
11955 case 0xb9b3: /* CU42 */ goto unimplemented;
11956 case 0xb9bd: /* TRTRE */ goto unimplemented;
11957 case 0xb9be: /* SRSTU */ goto unimplemented;
11958 case 0xb9bf: /* TRTE */ goto unimplemented;
11959 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11960 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11961 goto ok;
11962 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
11963 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11964 goto ok;
11965 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
11966 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11967 goto ok;
11968 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
11969 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11970 goto ok;
11971 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
11972 ovl.fmt.RRE.r2); goto ok;
11973 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
11974 ovl.fmt.RRE.r2); goto ok;
11975 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
11976 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11977 goto ok;
11978 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
11979 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11980 goto ok;
11981 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
11982 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11983 goto ok;
11984 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
11985 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11986 goto ok;
11987 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
11988 ovl.fmt.RRE.r2); goto ok;
11989 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
11990 ovl.fmt.RRE.r2); goto ok;
11991 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000011992 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
11993 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11994 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011995 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
11996 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11997 goto ok;
11998 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
11999 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12000 goto ok;
12001 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
12002 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12003 goto ok;
12004 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
12005 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12006 goto ok;
12007 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
12008 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12009 goto ok;
12010 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
12011 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12012 goto ok;
12013 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
12014 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12015 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012016 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
12017 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12018 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012019 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
12020 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12021 goto ok;
12022 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
12023 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12024 goto ok;
12025 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
12026 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12027 goto ok;
12028 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
12029 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12030 goto ok;
12031 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
12032 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12033 goto ok;
12034 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
12035 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12036 goto ok;
12037 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
12038 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12039 goto ok;
12040 }
12041
12042 switch ((ovl.value & 0xff000000) >> 24) {
12043 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12044 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12045 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12046 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12047 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12048 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12049 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12050 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12051 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12052 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12053 case 0x45: /* BAL */ goto unimplemented;
12054 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12055 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12056 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12057 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12058 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12059 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12060 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12061 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12062 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12063 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12064 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12065 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12066 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12067 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12068 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12069 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12070 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12071 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12072 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12073 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12074 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12075 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12076 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12077 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12078 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12079 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12080 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12081 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12082 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12083 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12084 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12085 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12086 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12087 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12088 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12089 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12090 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12091 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12092 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12093 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12094 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12095 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12096 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12097 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12098 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12099 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12100 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12101 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12102 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12103 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12104 case 0x67: /* MXD */ goto unimplemented;
12105 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12106 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12107 case 0x69: /* CD */ goto unimplemented;
12108 case 0x6a: /* AD */ goto unimplemented;
12109 case 0x6b: /* SD */ goto unimplemented;
12110 case 0x6c: /* MD */ goto unimplemented;
12111 case 0x6d: /* DD */ goto unimplemented;
12112 case 0x6e: /* AW */ goto unimplemented;
12113 case 0x6f: /* SW */ goto unimplemented;
12114 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12115 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12116 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12117 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12118 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12119 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12120 case 0x79: /* CE */ goto unimplemented;
12121 case 0x7a: /* AE */ goto unimplemented;
12122 case 0x7b: /* SE */ goto unimplemented;
12123 case 0x7c: /* MDE */ goto unimplemented;
12124 case 0x7d: /* DE */ goto unimplemented;
12125 case 0x7e: /* AU */ goto unimplemented;
12126 case 0x7f: /* SU */ goto unimplemented;
12127 case 0x83: /* DIAG */ goto unimplemented;
12128 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
12129 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12130 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
12131 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12132 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12133 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12134 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12135 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12136 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12137 ovl.fmt.RS.d2); goto ok;
12138 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12139 ovl.fmt.RS.d2); goto ok;
12140 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12141 ovl.fmt.RS.d2); goto ok;
12142 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12143 ovl.fmt.RS.d2); goto ok;
12144 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12145 ovl.fmt.RS.d2); goto ok;
12146 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12147 ovl.fmt.RS.d2); goto ok;
12148 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12149 ovl.fmt.RS.d2); goto ok;
12150 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12151 ovl.fmt.RS.d2); goto ok;
12152 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12153 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12154 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12155 ovl.fmt.SI.d1); goto ok;
12156 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12157 ovl.fmt.SI.d1); goto ok;
12158 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12159 ovl.fmt.SI.d1); goto ok;
12160 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12161 ovl.fmt.SI.d1); goto ok;
12162 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12163 ovl.fmt.SI.d1); goto ok;
12164 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12165 ovl.fmt.SI.d1); goto ok;
12166 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12167 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12168 case 0x99: /* TRACE */ goto unimplemented;
12169 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12170 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12171 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12172 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12173 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
12174 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12175 goto ok;
12176 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
12177 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12178 goto ok;
12179 case 0xac: /* STNSM */ goto unimplemented;
12180 case 0xad: /* STOSM */ goto unimplemented;
12181 case 0xae: /* SIGP */ goto unimplemented;
12182 case 0xaf: /* MC */ goto unimplemented;
12183 case 0xb1: /* LRA */ goto unimplemented;
12184 case 0xb6: /* STCTL */ goto unimplemented;
12185 case 0xb7: /* LCTL */ goto unimplemented;
12186 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12187 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12188 case 0xbb: /* CDS */ goto unimplemented;
12189 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12190 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12191 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12192 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12193 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12194 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12195 }
12196
12197 return S390_DECODE_UNKNOWN_INSN;
12198
12199ok:
12200 return S390_DECODE_OK;
12201
12202unimplemented:
12203 return S390_DECODE_UNIMPLEMENTED_INSN;
12204}
12205
12206static s390_decode_t
12207s390_decode_6byte_and_irgen(UChar *bytes)
12208{
12209 typedef union {
12210 struct {
12211 unsigned int op1 : 8;
12212 unsigned int r1 : 4;
12213 unsigned int r3 : 4;
12214 unsigned int i2 : 16;
12215 unsigned int : 8;
12216 unsigned int op2 : 8;
12217 } RIE;
12218 struct {
12219 unsigned int op1 : 8;
12220 unsigned int r1 : 4;
12221 unsigned int r2 : 4;
12222 unsigned int i3 : 8;
12223 unsigned int i4 : 8;
12224 unsigned int i5 : 8;
12225 unsigned int op2 : 8;
12226 } RIE_RRUUU;
12227 struct {
12228 unsigned int op1 : 8;
12229 unsigned int r1 : 4;
12230 unsigned int : 4;
12231 unsigned int i2 : 16;
12232 unsigned int m3 : 4;
12233 unsigned int : 4;
12234 unsigned int op2 : 8;
12235 } RIEv1;
12236 struct {
12237 unsigned int op1 : 8;
12238 unsigned int r1 : 4;
12239 unsigned int r2 : 4;
12240 unsigned int i4 : 16;
12241 unsigned int m3 : 4;
12242 unsigned int : 4;
12243 unsigned int op2 : 8;
12244 } RIE_RRPU;
12245 struct {
12246 unsigned int op1 : 8;
12247 unsigned int r1 : 4;
12248 unsigned int m3 : 4;
12249 unsigned int i4 : 16;
12250 unsigned int i2 : 8;
12251 unsigned int op2 : 8;
12252 } RIEv3;
12253 struct {
12254 unsigned int op1 : 8;
12255 unsigned int r1 : 4;
12256 unsigned int op2 : 4;
12257 unsigned int i2 : 32;
12258 } RIL;
12259 struct {
12260 unsigned int op1 : 8;
12261 unsigned int r1 : 4;
12262 unsigned int m3 : 4;
12263 unsigned int b4 : 4;
12264 unsigned int d4 : 12;
12265 unsigned int i2 : 8;
12266 unsigned int op2 : 8;
12267 } RIS;
12268 struct {
12269 unsigned int op1 : 8;
12270 unsigned int r1 : 4;
12271 unsigned int r2 : 4;
12272 unsigned int b4 : 4;
12273 unsigned int d4 : 12;
12274 unsigned int m3 : 4;
12275 unsigned int : 4;
12276 unsigned int op2 : 8;
12277 } RRS;
12278 struct {
12279 unsigned int op1 : 8;
12280 unsigned int l1 : 4;
12281 unsigned int : 4;
12282 unsigned int b1 : 4;
12283 unsigned int d1 : 12;
12284 unsigned int : 8;
12285 unsigned int op2 : 8;
12286 } RSL;
12287 struct {
12288 unsigned int op1 : 8;
12289 unsigned int r1 : 4;
12290 unsigned int r3 : 4;
12291 unsigned int b2 : 4;
12292 unsigned int dl2 : 12;
12293 unsigned int dh2 : 8;
12294 unsigned int op2 : 8;
12295 } RSY;
12296 struct {
12297 unsigned int op1 : 8;
12298 unsigned int r1 : 4;
12299 unsigned int x2 : 4;
12300 unsigned int b2 : 4;
12301 unsigned int d2 : 12;
12302 unsigned int : 8;
12303 unsigned int op2 : 8;
12304 } RXE;
12305 struct {
12306 unsigned int op1 : 8;
12307 unsigned int r3 : 4;
12308 unsigned int x2 : 4;
12309 unsigned int b2 : 4;
12310 unsigned int d2 : 12;
12311 unsigned int r1 : 4;
12312 unsigned int : 4;
12313 unsigned int op2 : 8;
12314 } RXF;
12315 struct {
12316 unsigned int op1 : 8;
12317 unsigned int r1 : 4;
12318 unsigned int x2 : 4;
12319 unsigned int b2 : 4;
12320 unsigned int dl2 : 12;
12321 unsigned int dh2 : 8;
12322 unsigned int op2 : 8;
12323 } RXY;
12324 struct {
12325 unsigned int op1 : 8;
12326 unsigned int i2 : 8;
12327 unsigned int b1 : 4;
12328 unsigned int dl1 : 12;
12329 unsigned int dh1 : 8;
12330 unsigned int op2 : 8;
12331 } SIY;
12332 struct {
12333 unsigned int op : 8;
12334 unsigned int l : 8;
12335 unsigned int b1 : 4;
12336 unsigned int d1 : 12;
12337 unsigned int b2 : 4;
12338 unsigned int d2 : 12;
12339 } SS;
12340 struct {
12341 unsigned int op : 8;
12342 unsigned int l1 : 4;
12343 unsigned int l2 : 4;
12344 unsigned int b1 : 4;
12345 unsigned int d1 : 12;
12346 unsigned int b2 : 4;
12347 unsigned int d2 : 12;
12348 } SS_LLRDRD;
12349 struct {
12350 unsigned int op : 8;
12351 unsigned int r1 : 4;
12352 unsigned int r3 : 4;
12353 unsigned int b2 : 4;
12354 unsigned int d2 : 12;
12355 unsigned int b4 : 4;
12356 unsigned int d4 : 12;
12357 } SS_RRRDRD2;
12358 struct {
12359 unsigned int op : 16;
12360 unsigned int b1 : 4;
12361 unsigned int d1 : 12;
12362 unsigned int b2 : 4;
12363 unsigned int d2 : 12;
12364 } SSE;
12365 struct {
12366 unsigned int op1 : 8;
12367 unsigned int r3 : 4;
12368 unsigned int op2 : 4;
12369 unsigned int b1 : 4;
12370 unsigned int d1 : 12;
12371 unsigned int b2 : 4;
12372 unsigned int d2 : 12;
12373 } SSF;
12374 struct {
12375 unsigned int op : 16;
12376 unsigned int b1 : 4;
12377 unsigned int d1 : 12;
12378 unsigned int i2 : 16;
12379 } SIL;
12380 } formats;
12381 union {
12382 formats fmt;
12383 ULong value;
12384 } ovl;
12385
12386 vassert(sizeof(formats) == 6);
12387
12388 ((char *)(&ovl.value))[0] = bytes[0];
12389 ((char *)(&ovl.value))[1] = bytes[1];
12390 ((char *)(&ovl.value))[2] = bytes[2];
12391 ((char *)(&ovl.value))[3] = bytes[3];
12392 ((char *)(&ovl.value))[4] = bytes[4];
12393 ((char *)(&ovl.value))[5] = bytes[5];
12394 ((char *)(&ovl.value))[6] = 0x0;
12395 ((char *)(&ovl.value))[7] = 0x0;
12396
12397 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
12398 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
12399 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12400 ovl.fmt.RXY.dl2,
12401 ovl.fmt.RXY.dh2); goto ok;
12402 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
12403 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
12404 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12405 ovl.fmt.RXY.dl2,
12406 ovl.fmt.RXY.dh2); goto ok;
12407 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
12408 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12409 ovl.fmt.RXY.dl2,
12410 ovl.fmt.RXY.dh2); goto ok;
12411 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
12412 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12413 ovl.fmt.RXY.dl2,
12414 ovl.fmt.RXY.dh2); goto ok;
12415 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
12416 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12417 ovl.fmt.RXY.dl2,
12418 ovl.fmt.RXY.dh2); goto ok;
12419 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
12420 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12421 ovl.fmt.RXY.dl2,
12422 ovl.fmt.RXY.dh2); goto ok;
12423 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
12424 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12425 ovl.fmt.RXY.dl2,
12426 ovl.fmt.RXY.dh2); goto ok;
12427 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
12428 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12429 ovl.fmt.RXY.dl2,
12430 ovl.fmt.RXY.dh2); goto ok;
12431 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
12432 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12433 ovl.fmt.RXY.dl2,
12434 ovl.fmt.RXY.dh2); goto ok;
12435 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
12436 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
12437 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12438 ovl.fmt.RXY.dl2,
12439 ovl.fmt.RXY.dh2); goto ok;
12440 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
12441 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12442 ovl.fmt.RXY.dl2,
12443 ovl.fmt.RXY.dh2); goto ok;
12444 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
12445 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
12446 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12447 ovl.fmt.RXY.dl2,
12448 ovl.fmt.RXY.dh2); goto ok;
12449 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
12450 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12451 ovl.fmt.RXY.dl2,
12452 ovl.fmt.RXY.dh2); goto ok;
12453 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
12454 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12455 ovl.fmt.RXY.dl2,
12456 ovl.fmt.RXY.dh2); goto ok;
12457 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
12458 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12459 ovl.fmt.RXY.dl2,
12460 ovl.fmt.RXY.dh2); goto ok;
12461 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
12462 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12463 ovl.fmt.RXY.dl2,
12464 ovl.fmt.RXY.dh2); goto ok;
12465 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
12466 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12467 ovl.fmt.RXY.dl2,
12468 ovl.fmt.RXY.dh2); goto ok;
12469 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
12470 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12471 ovl.fmt.RXY.dl2,
12472 ovl.fmt.RXY.dh2); goto ok;
12473 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
12474 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12475 ovl.fmt.RXY.dl2,
12476 ovl.fmt.RXY.dh2); goto ok;
12477 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
12478 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12479 ovl.fmt.RXY.dl2,
12480 ovl.fmt.RXY.dh2); goto ok;
12481 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
12482 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12483 ovl.fmt.RXY.dl2,
12484 ovl.fmt.RXY.dh2); goto ok;
12485 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
12486 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12487 ovl.fmt.RXY.dl2,
12488 ovl.fmt.RXY.dh2); goto ok;
12489 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
12490 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12491 ovl.fmt.RXY.dl2,
12492 ovl.fmt.RXY.dh2); goto ok;
12493 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
12494 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12495 ovl.fmt.RXY.dl2,
12496 ovl.fmt.RXY.dh2); goto ok;
12497 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
12498 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12499 ovl.fmt.RXY.dl2,
12500 ovl.fmt.RXY.dh2); goto ok;
12501 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
12502 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12503 ovl.fmt.RXY.dl2,
12504 ovl.fmt.RXY.dh2); goto ok;
12505 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
12506 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12507 ovl.fmt.RXY.dl2,
12508 ovl.fmt.RXY.dh2); goto ok;
12509 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
12510 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
12511 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12512 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12513 ovl.fmt.RXY.dh2); goto ok;
12514 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
12515 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12516 ovl.fmt.RXY.dl2,
12517 ovl.fmt.RXY.dh2); goto ok;
12518 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
12519 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12520 ovl.fmt.RXY.dl2,
12521 ovl.fmt.RXY.dh2); goto ok;
12522 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
12523 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12524 ovl.fmt.RXY.dl2,
12525 ovl.fmt.RXY.dh2); goto ok;
12526 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
12527 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12528 ovl.fmt.RXY.dl2,
12529 ovl.fmt.RXY.dh2); goto ok;
12530 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
12531 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12532 ovl.fmt.RXY.dl2,
12533 ovl.fmt.RXY.dh2); goto ok;
12534 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
12535 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12536 ovl.fmt.RXY.dl2,
12537 ovl.fmt.RXY.dh2); goto ok;
12538 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
12539 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12540 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12541 ovl.fmt.RXY.dh2); goto ok;
12542 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
12543 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12544 ovl.fmt.RXY.dl2,
12545 ovl.fmt.RXY.dh2); goto ok;
12546 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
12547 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12548 ovl.fmt.RXY.dl2,
12549 ovl.fmt.RXY.dh2); goto ok;
12550 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
12551 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12552 ovl.fmt.RXY.dl2,
12553 ovl.fmt.RXY.dh2); goto ok;
12554 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
12555 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12556 ovl.fmt.RXY.dl2,
12557 ovl.fmt.RXY.dh2); goto ok;
12558 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
12559 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12560 ovl.fmt.RXY.dl2,
12561 ovl.fmt.RXY.dh2); goto ok;
12562 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
12563 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12564 ovl.fmt.RXY.dl2,
12565 ovl.fmt.RXY.dh2); goto ok;
12566 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
12567 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12568 ovl.fmt.RXY.dl2,
12569 ovl.fmt.RXY.dh2); goto ok;
12570 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
12571 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12572 ovl.fmt.RXY.dl2,
12573 ovl.fmt.RXY.dh2); goto ok;
12574 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
12575 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12576 ovl.fmt.RXY.dl2,
12577 ovl.fmt.RXY.dh2); goto ok;
12578 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12579 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12580 ovl.fmt.RXY.dl2,
12581 ovl.fmt.RXY.dh2); goto ok;
12582 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12583 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12584 ovl.fmt.RXY.dl2,
12585 ovl.fmt.RXY.dh2); goto ok;
12586 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12587 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12588 ovl.fmt.RXY.dl2,
12589 ovl.fmt.RXY.dh2); goto ok;
12590 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12591 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12592 ovl.fmt.RXY.dl2,
12593 ovl.fmt.RXY.dh2); goto ok;
12594 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12595 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12596 ovl.fmt.RXY.dl2,
12597 ovl.fmt.RXY.dh2); goto ok;
12598 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12599 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12600 ovl.fmt.RXY.dl2,
12601 ovl.fmt.RXY.dh2); goto ok;
12602 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12603 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12604 ovl.fmt.RXY.dl2,
12605 ovl.fmt.RXY.dh2); goto ok;
12606 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12607 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12608 ovl.fmt.RXY.dl2,
12609 ovl.fmt.RXY.dh2); goto ok;
12610 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12611 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12612 ovl.fmt.RXY.dl2,
12613 ovl.fmt.RXY.dh2); goto ok;
12614 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12615 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12616 ovl.fmt.RXY.dl2,
12617 ovl.fmt.RXY.dh2); goto ok;
12618 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12619 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12620 ovl.fmt.RXY.dl2,
12621 ovl.fmt.RXY.dh2); goto ok;
12622 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12623 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12624 ovl.fmt.RXY.dl2,
12625 ovl.fmt.RXY.dh2); goto ok;
12626 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12627 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12628 ovl.fmt.RXY.dl2,
12629 ovl.fmt.RXY.dh2); goto ok;
12630 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12631 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12632 ovl.fmt.RXY.dl2,
12633 ovl.fmt.RXY.dh2); goto ok;
12634 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12635 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12636 ovl.fmt.RXY.dl2,
12637 ovl.fmt.RXY.dh2); goto ok;
12638 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12639 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12640 ovl.fmt.RXY.dl2,
12641 ovl.fmt.RXY.dh2); goto ok;
12642 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12643 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12644 ovl.fmt.RXY.dl2,
12645 ovl.fmt.RXY.dh2); goto ok;
12646 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12647 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12648 ovl.fmt.RXY.dl2,
12649 ovl.fmt.RXY.dh2); goto ok;
12650 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12651 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12652 ovl.fmt.RXY.dl2,
12653 ovl.fmt.RXY.dh2); goto ok;
12654 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12655 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12656 ovl.fmt.RXY.dl2,
12657 ovl.fmt.RXY.dh2); goto ok;
12658 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12659 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12660 ovl.fmt.RXY.dl2,
12661 ovl.fmt.RXY.dh2); goto ok;
12662 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12663 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12664 ovl.fmt.RXY.dl2,
12665 ovl.fmt.RXY.dh2); goto ok;
12666 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12667 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12668 ovl.fmt.RXY.dl2,
12669 ovl.fmt.RXY.dh2); goto ok;
12670 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12671 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12672 ovl.fmt.RXY.dl2,
12673 ovl.fmt.RXY.dh2); goto ok;
12674 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12675 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12676 ovl.fmt.RXY.dl2,
12677 ovl.fmt.RXY.dh2); goto ok;
12678 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12679 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12680 ovl.fmt.RXY.dl2,
12681 ovl.fmt.RXY.dh2); goto ok;
12682 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12683 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12684 ovl.fmt.RXY.dl2,
12685 ovl.fmt.RXY.dh2); goto ok;
12686 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12687 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12688 ovl.fmt.RXY.dl2,
12689 ovl.fmt.RXY.dh2); goto ok;
12690 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12691 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12692 ovl.fmt.RXY.dl2,
12693 ovl.fmt.RXY.dh2); goto ok;
12694 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12695 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12696 ovl.fmt.RXY.dl2,
12697 ovl.fmt.RXY.dh2); goto ok;
12698 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12699 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12700 ovl.fmt.RXY.dl2,
12701 ovl.fmt.RXY.dh2); goto ok;
12702 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12703 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12704 ovl.fmt.RXY.dl2,
12705 ovl.fmt.RXY.dh2); goto ok;
12706 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12707 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12708 ovl.fmt.RXY.dl2,
12709 ovl.fmt.RXY.dh2); goto ok;
12710 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12711 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12712 ovl.fmt.RXY.dl2,
12713 ovl.fmt.RXY.dh2); goto ok;
12714 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12715 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12716 ovl.fmt.RXY.dl2,
12717 ovl.fmt.RXY.dh2); goto ok;
12718 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12719 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12720 ovl.fmt.RXY.dl2,
12721 ovl.fmt.RXY.dh2); goto ok;
12722 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12723 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12724 ovl.fmt.RXY.dl2,
12725 ovl.fmt.RXY.dh2); goto ok;
12726 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12727 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12728 ovl.fmt.RXY.dl2,
12729 ovl.fmt.RXY.dh2); goto ok;
12730 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12731 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12732 ovl.fmt.RXY.dl2,
12733 ovl.fmt.RXY.dh2); goto ok;
12734 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12735 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12736 ovl.fmt.RXY.dl2,
12737 ovl.fmt.RXY.dh2); goto ok;
12738 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12739 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12740 ovl.fmt.RXY.dl2,
12741 ovl.fmt.RXY.dh2); goto ok;
12742 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12743 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12744 ovl.fmt.RXY.dl2,
12745 ovl.fmt.RXY.dh2); goto ok;
12746 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12747 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12748 ovl.fmt.RXY.dl2,
12749 ovl.fmt.RXY.dh2); goto ok;
12750 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12751 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12752 ovl.fmt.RXY.dl2,
12753 ovl.fmt.RXY.dh2); goto ok;
12754 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12755 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12756 ovl.fmt.RSY.dl2,
12757 ovl.fmt.RSY.dh2); goto ok;
12758 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12759 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12760 ovl.fmt.RSY.dl2,
12761 ovl.fmt.RSY.dh2); goto ok;
12762 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12763 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12764 ovl.fmt.RSY.dl2,
12765 ovl.fmt.RSY.dh2); goto ok;
12766 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12767 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12768 ovl.fmt.RSY.dl2,
12769 ovl.fmt.RSY.dh2); goto ok;
12770 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12771 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12772 ovl.fmt.RSY.dl2,
12773 ovl.fmt.RSY.dh2); goto ok;
12774 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12775 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12776 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12777 ovl.fmt.RSY.dl2,
12778 ovl.fmt.RSY.dh2); goto ok;
12779 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12780 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12781 ovl.fmt.RSY.dl2,
12782 ovl.fmt.RSY.dh2); goto ok;
12783 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12784 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12785 ovl.fmt.RSY.dl2,
12786 ovl.fmt.RSY.dh2); goto ok;
12787 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12788 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12789 ovl.fmt.RSY.dl2,
12790 ovl.fmt.RSY.dh2); goto ok;
12791 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12792 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12793 ovl.fmt.RSY.dl2,
12794 ovl.fmt.RSY.dh2); goto ok;
12795 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12796 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12797 ovl.fmt.RSY.dl2,
12798 ovl.fmt.RSY.dh2); goto ok;
12799 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12800 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12801 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12802 ovl.fmt.RSY.dl2,
12803 ovl.fmt.RSY.dh2); goto ok;
12804 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12805 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12806 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12807 ovl.fmt.RSY.dh2); goto ok;
12808 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12809 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12810 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12811 ovl.fmt.RSY.dh2); goto ok;
12812 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12813 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12814 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12815 ovl.fmt.RSY.dl2,
12816 ovl.fmt.RSY.dh2); goto ok;
12817 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12818 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12819 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12820 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12821 ovl.fmt.RSY.dl2,
12822 ovl.fmt.RSY.dh2); goto ok;
12823 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12824 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12825 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12826 ovl.fmt.RSY.dh2); goto ok;
12827 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12828 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12829 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12830 ovl.fmt.SIY.dh1); goto ok;
12831 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12832 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12833 ovl.fmt.SIY.dh1); goto ok;
12834 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12835 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12836 ovl.fmt.SIY.dh1); goto ok;
12837 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12838 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12839 ovl.fmt.SIY.dh1); goto ok;
12840 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12841 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12842 ovl.fmt.SIY.dh1); goto ok;
12843 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12844 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12845 ovl.fmt.SIY.dh1); goto ok;
12846 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12847 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12848 ovl.fmt.SIY.dh1); goto ok;
12849 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12850 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12851 ovl.fmt.SIY.dh1); goto ok;
12852 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12853 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12854 ovl.fmt.SIY.dh1); goto ok;
12855 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12856 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12857 ovl.fmt.SIY.dh1); goto ok;
12858 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12859 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12860 ovl.fmt.RSY.dl2,
12861 ovl.fmt.RSY.dh2); goto ok;
12862 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12863 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12864 ovl.fmt.RSY.dl2,
12865 ovl.fmt.RSY.dh2); goto ok;
12866 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12867 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12868 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12869 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12870 ovl.fmt.RSY.dl2,
12871 ovl.fmt.RSY.dh2); goto ok;
12872 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12873 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12874 ovl.fmt.RSY.dl2,
12875 ovl.fmt.RSY.dh2); goto ok;
12876 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12877 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12878 ovl.fmt.RSY.dl2,
12879 ovl.fmt.RSY.dh2); goto ok;
12880 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12881 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12882 ovl.fmt.RSY.dl2,
12883 ovl.fmt.RSY.dh2); goto ok;
12884 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12885 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12886 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12887 ovl.fmt.RSY.dh2); goto ok;
12888 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12889 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12890 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12891 ovl.fmt.RSY.dl2,
12892 ovl.fmt.RSY.dh2); goto ok;
12893 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12894 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12895 ovl.fmt.RSY.dl2,
12896 ovl.fmt.RSY.dh2); goto ok;
12897 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12898 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12899 ovl.fmt.RSY.dl2,
12900 ovl.fmt.RSY.dh2); goto ok;
12901 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12902 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12903 ovl.fmt.RSY.dl2,
12904 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012905 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12906 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12907 ovl.fmt.RSY.dl2,
12908 ovl.fmt.RSY.dh2,
12909 S390_XMNM_LOCG); goto ok;
12910 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12911 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12912 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12913 ovl.fmt.RSY.dh2,
12914 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012915 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12916 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12917 ovl.fmt.RSY.dl2,
12918 ovl.fmt.RSY.dh2); goto ok;
12919 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12920 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12921 ovl.fmt.RSY.dl2,
12922 ovl.fmt.RSY.dh2); goto ok;
12923 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12924 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12925 ovl.fmt.RSY.dl2,
12926 ovl.fmt.RSY.dh2); goto ok;
12927 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12928 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12929 ovl.fmt.RSY.dl2,
12930 ovl.fmt.RSY.dh2); goto ok;
12931 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12932 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12933 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12934 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012935 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12936 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12937 ovl.fmt.RSY.dl2,
12938 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12939 goto ok;
12940 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12941 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12942 ovl.fmt.RSY.dl2,
12943 ovl.fmt.RSY.dh2,
12944 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012945 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12946 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12947 ovl.fmt.RSY.dl2,
12948 ovl.fmt.RSY.dh2); goto ok;
12949 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12950 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12951 ovl.fmt.RSY.dl2,
12952 ovl.fmt.RSY.dh2); goto ok;
12953 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12954 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12955 ovl.fmt.RSY.dl2,
12956 ovl.fmt.RSY.dh2); goto ok;
12957 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12958 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12959 ovl.fmt.RSY.dl2,
12960 ovl.fmt.RSY.dh2); goto ok;
12961 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
12962 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12963 ovl.fmt.RSY.dl2,
12964 ovl.fmt.RSY.dh2); goto ok;
12965 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
12966 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12967 goto ok;
12968 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
12969 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12970 goto ok;
12971 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
12972 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
12973 ovl.fmt.RIE_RRUUU.r1,
12974 ovl.fmt.RIE_RRUUU.r2,
12975 ovl.fmt.RIE_RRUUU.i3,
12976 ovl.fmt.RIE_RRUUU.i4,
12977 ovl.fmt.RIE_RRUUU.i5);
12978 goto ok;
12979 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
12980 ovl.fmt.RIE_RRUUU.r1,
12981 ovl.fmt.RIE_RRUUU.r2,
12982 ovl.fmt.RIE_RRUUU.i3,
12983 ovl.fmt.RIE_RRUUU.i4,
12984 ovl.fmt.RIE_RRUUU.i5);
12985 goto ok;
12986 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
12987 ovl.fmt.RIE_RRUUU.r1,
12988 ovl.fmt.RIE_RRUUU.r2,
12989 ovl.fmt.RIE_RRUUU.i3,
12990 ovl.fmt.RIE_RRUUU.i4,
12991 ovl.fmt.RIE_RRUUU.i5);
12992 goto ok;
12993 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
12994 ovl.fmt.RIE_RRUUU.r1,
12995 ovl.fmt.RIE_RRUUU.r2,
12996 ovl.fmt.RIE_RRUUU.i3,
12997 ovl.fmt.RIE_RRUUU.i4,
12998 ovl.fmt.RIE_RRUUU.i5);
12999 goto ok;
13000 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
13001 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
13002 ovl.fmt.RIE_RRPU.r1,
13003 ovl.fmt.RIE_RRPU.r2,
13004 ovl.fmt.RIE_RRPU.i4,
13005 ovl.fmt.RIE_RRPU.m3); goto ok;
13006 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
13007 ovl.fmt.RIE_RRPU.r1,
13008 ovl.fmt.RIE_RRPU.r2,
13009 ovl.fmt.RIE_RRPU.i4,
13010 ovl.fmt.RIE_RRPU.m3); goto ok;
13011 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
13012 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
13013 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
13014 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
13015 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
13016 ovl.fmt.RIE_RRPU.r1,
13017 ovl.fmt.RIE_RRPU.r2,
13018 ovl.fmt.RIE_RRPU.i4,
13019 ovl.fmt.RIE_RRPU.m3); goto ok;
13020 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
13021 ovl.fmt.RIE_RRPU.r1,
13022 ovl.fmt.RIE_RRPU.r2,
13023 ovl.fmt.RIE_RRPU.i4,
13024 ovl.fmt.RIE_RRPU.m3); goto ok;
13025 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
13026 ovl.fmt.RIEv3.r1,
13027 ovl.fmt.RIEv3.m3,
13028 ovl.fmt.RIEv3.i4,
13029 ovl.fmt.RIEv3.i2); goto ok;
13030 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
13031 ovl.fmt.RIEv3.r1,
13032 ovl.fmt.RIEv3.m3,
13033 ovl.fmt.RIEv3.i4,
13034 ovl.fmt.RIEv3.i2); goto ok;
13035 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
13036 ovl.fmt.RIEv3.r1,
13037 ovl.fmt.RIEv3.m3,
13038 ovl.fmt.RIEv3.i4,
13039 ovl.fmt.RIEv3.i2); goto ok;
13040 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
13041 ovl.fmt.RIEv3.r1,
13042 ovl.fmt.RIEv3.m3,
13043 ovl.fmt.RIEv3.i4,
13044 ovl.fmt.RIEv3.i2); goto ok;
13045 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
13046 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13047 goto ok;
13048 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
13049 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13050 ovl.fmt.RIE.i2); goto ok;
13051 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
13052 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13053 ovl.fmt.RIE.i2); goto ok;
13054 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
13055 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13056 ovl.fmt.RIE.i2); goto ok;
13057 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
13058 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13059 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13060 goto ok;
13061 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
13062 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13063 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13064 goto ok;
13065 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
13066 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13067 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13068 goto ok;
13069 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
13070 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13071 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13072 goto ok;
13073 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
13074 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13075 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13076 ovl.fmt.RIS.i2); goto ok;
13077 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
13078 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13079 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13080 ovl.fmt.RIS.i2); goto ok;
13081 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
13082 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
13083 ovl.fmt.RIS.d4,
13084 ovl.fmt.RIS.i2); goto ok;
13085 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
13086 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13087 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13088 ovl.fmt.RIS.i2); goto ok;
13089 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
13090 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13091 ovl.fmt.RXE.d2); goto ok;
13092 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
13093 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13094 ovl.fmt.RXE.d2); goto ok;
13095 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
13096 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13097 ovl.fmt.RXE.d2); goto ok;
13098 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
13099 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
13100 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
13101 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13102 ovl.fmt.RXE.d2); goto ok;
13103 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
13104 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13105 ovl.fmt.RXE.d2); goto ok;
13106 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
13107 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13108 ovl.fmt.RXE.d2); goto ok;
13109 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
13110 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
13111 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13112 ovl.fmt.RXE.d2); goto ok;
13113 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
13114 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13115 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13116 ovl.fmt.RXF.r1); goto ok;
13117 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
13118 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13119 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13120 ovl.fmt.RXF.r1); goto ok;
13121 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
13122 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13123 ovl.fmt.RXE.d2); goto ok;
13124 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
13125 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13126 ovl.fmt.RXE.d2); goto ok;
13127 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
13128 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13129 ovl.fmt.RXE.d2); goto ok;
13130 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
13131 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13132 ovl.fmt.RXE.d2); goto ok;
13133 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
13134 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13135 ovl.fmt.RXE.d2); goto ok;
13136 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
13137 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13138 ovl.fmt.RXE.d2); goto ok;
13139 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
13140 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
13141 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13142 ovl.fmt.RXE.d2); goto ok;
13143 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
13144 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13145 ovl.fmt.RXE.d2); goto ok;
13146 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
13147 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13148 ovl.fmt.RXE.d2); goto ok;
13149 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
13150 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13151 ovl.fmt.RXE.d2); goto ok;
13152 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
13153 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13154 ovl.fmt.RXE.d2); goto ok;
13155 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
13156 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13157 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13158 ovl.fmt.RXF.r1); goto ok;
13159 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
13160 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13161 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13162 ovl.fmt.RXF.r1); goto ok;
13163 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
13164 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
13165 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
13166 case 0xed000000002eULL: /* MAE */ goto unimplemented;
13167 case 0xed000000002fULL: /* MSE */ goto unimplemented;
13168 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
13169 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
13170 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
13171 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
13172 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
13173 case 0xed000000003aULL: /* MAY */ goto unimplemented;
13174 case 0xed000000003bULL: /* MY */ goto unimplemented;
13175 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
13176 case 0xed000000003dULL: /* MYH */ goto unimplemented;
13177 case 0xed000000003eULL: /* MAD */ goto unimplemented;
13178 case 0xed000000003fULL: /* MSD */ goto unimplemented;
13179 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
13180 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
13181 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
13182 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
13183 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
13184 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
13185 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
13186 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
13187 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
13188 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
13189 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
13190 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13191 ovl.fmt.RXY.dl2,
13192 ovl.fmt.RXY.dh2); goto ok;
13193 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
13194 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13195 ovl.fmt.RXY.dl2,
13196 ovl.fmt.RXY.dh2); goto ok;
13197 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
13198 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13199 ovl.fmt.RXY.dl2,
13200 ovl.fmt.RXY.dh2); goto ok;
13201 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
13202 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13203 ovl.fmt.RXY.dl2,
13204 ovl.fmt.RXY.dh2); goto ok;
13205 }
13206
13207 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
13208 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
13209 ovl.fmt.RIL.i2); goto ok;
13210 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
13211 ovl.fmt.RIL.i2); goto ok;
13212 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
13213 ovl.fmt.RIL.i2); goto ok;
13214 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
13215 ovl.fmt.RIL.i2); goto ok;
13216 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
13217 ovl.fmt.RIL.i2); goto ok;
13218 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
13219 ovl.fmt.RIL.i2); goto ok;
13220 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
13221 ovl.fmt.RIL.i2); goto ok;
13222 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
13223 ovl.fmt.RIL.i2); goto ok;
13224 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
13225 ovl.fmt.RIL.i2); goto ok;
13226 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
13227 ovl.fmt.RIL.i2); goto ok;
13228 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
13229 ovl.fmt.RIL.i2); goto ok;
13230 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
13231 ovl.fmt.RIL.i2); goto ok;
13232 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
13233 ovl.fmt.RIL.i2); goto ok;
13234 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
13235 ovl.fmt.RIL.i2); goto ok;
13236 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
13237 ovl.fmt.RIL.i2); goto ok;
13238 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
13239 ovl.fmt.RIL.i2); goto ok;
13240 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
13241 ovl.fmt.RIL.i2); goto ok;
13242 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
13243 ovl.fmt.RIL.i2); goto ok;
13244 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
13245 ovl.fmt.RIL.i2); goto ok;
13246 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
13247 ovl.fmt.RIL.i2); goto ok;
13248 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
13249 ovl.fmt.RIL.i2); goto ok;
13250 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
13251 ovl.fmt.RIL.i2); goto ok;
13252 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
13253 ovl.fmt.RIL.i2); goto ok;
13254 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
13255 ovl.fmt.RIL.i2); goto ok;
13256 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
13257 ovl.fmt.RIL.i2); goto ok;
13258 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
13259 ovl.fmt.RIL.i2); goto ok;
13260 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
13261 ovl.fmt.RIL.i2); goto ok;
13262 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
13263 ovl.fmt.RIL.i2); goto ok;
13264 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
13265 ovl.fmt.RIL.i2); goto ok;
13266 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
13267 ovl.fmt.RIL.i2); goto ok;
13268 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
13269 ovl.fmt.RIL.i2); goto ok;
13270 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
13271 ovl.fmt.RIL.i2); goto ok;
13272 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
13273 ovl.fmt.RIL.i2); goto ok;
13274 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
13275 ovl.fmt.RIL.i2); goto ok;
13276 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
13277 ovl.fmt.RIL.i2); goto ok;
13278 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
13279 ovl.fmt.RIL.i2); goto ok;
13280 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
13281 ovl.fmt.RIL.i2); goto ok;
13282 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
13283 ovl.fmt.RIL.i2); goto ok;
13284 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
13285 ovl.fmt.RIL.i2); goto ok;
13286 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
13287 ovl.fmt.RIL.i2); goto ok;
13288 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
13289 ovl.fmt.RIL.i2); goto ok;
13290 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
13291 ovl.fmt.RIL.i2); goto ok;
13292 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
13293 ovl.fmt.RIL.i2); goto ok;
13294 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
13295 ovl.fmt.RIL.i2); goto ok;
13296 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
13297 ovl.fmt.RIL.i2); goto ok;
13298 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
13299 ovl.fmt.RIL.i2); goto ok;
13300 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
13301 ovl.fmt.RIL.i2); goto ok;
13302 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
13303 ovl.fmt.RIL.i2); goto ok;
13304 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
13305 ovl.fmt.RIL.i2); goto ok;
13306 case 0xc800ULL: /* MVCOS */ goto unimplemented;
13307 case 0xc801ULL: /* ECTG */ goto unimplemented;
13308 case 0xc802ULL: /* CSST */ goto unimplemented;
13309 case 0xc804ULL: /* LPD */ goto unimplemented;
13310 case 0xc805ULL: /* LPDG */ goto unimplemented;
13311 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
13312 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
13313 ovl.fmt.RIL.i2); goto ok;
13314 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
13315 ovl.fmt.RIL.i2); goto ok;
13316 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
13317 ovl.fmt.RIL.i2); goto ok;
13318 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
13319 ovl.fmt.RIL.i2); goto ok;
13320 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
13321 ovl.fmt.RIL.i2); goto ok;
13322 }
13323
13324 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
13325 case 0xd0ULL: /* TRTR */ goto unimplemented;
13326 case 0xd1ULL: /* MVN */ goto unimplemented;
13327 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
13328 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13329 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13330 case 0xd3ULL: /* MVZ */ goto unimplemented;
13331 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
13332 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13333 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13334 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
13335 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13336 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13337 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
13338 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13339 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000013340 case 0xd7ULL:
13341 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
13342 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
13343 else
13344 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
13345 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13346 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
13347 goto ok;
sewardj2019a972011-03-07 16:04:07 +000013348 case 0xd9ULL: /* MVCK */ goto unimplemented;
13349 case 0xdaULL: /* MVCP */ goto unimplemented;
13350 case 0xdbULL: /* MVCS */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000013351 case 0xdcULL: s390_format_SS_L0RDRD(s390_irgen_TR, ovl.fmt.SS.l,
13352 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13353 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000013354 case 0xddULL: /* TRT */ goto unimplemented;
13355 case 0xdeULL: /* ED */ goto unimplemented;
13356 case 0xdfULL: /* EDMK */ goto unimplemented;
13357 case 0xe1ULL: /* PKU */ goto unimplemented;
13358 case 0xe2ULL: /* UNPKU */ goto unimplemented;
13359 case 0xe8ULL: /* MVCIN */ goto unimplemented;
13360 case 0xe9ULL: /* PKA */ goto unimplemented;
13361 case 0xeaULL: /* UNPKA */ goto unimplemented;
13362 case 0xeeULL: /* PLO */ goto unimplemented;
13363 case 0xefULL: /* LMD */ goto unimplemented;
13364 case 0xf0ULL: /* SRP */ goto unimplemented;
13365 case 0xf1ULL: /* MVO */ goto unimplemented;
13366 case 0xf2ULL: /* PACK */ goto unimplemented;
13367 case 0xf3ULL: /* UNPK */ goto unimplemented;
13368 case 0xf8ULL: /* ZAP */ goto unimplemented;
13369 case 0xf9ULL: /* CP */ goto unimplemented;
13370 case 0xfaULL: /* AP */ goto unimplemented;
13371 case 0xfbULL: /* SP */ goto unimplemented;
13372 case 0xfcULL: /* MP */ goto unimplemented;
13373 case 0xfdULL: /* DP */ goto unimplemented;
13374 }
13375
13376 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
13377 case 0xe500ULL: /* LASP */ goto unimplemented;
13378 case 0xe501ULL: /* TPROT */ goto unimplemented;
13379 case 0xe502ULL: /* STRAG */ goto unimplemented;
13380 case 0xe50eULL: /* MVCSK */ goto unimplemented;
13381 case 0xe50fULL: /* MVCDK */ goto unimplemented;
13382 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
13383 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13384 goto ok;
13385 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
13386 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13387 goto ok;
13388 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
13389 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13390 goto ok;
13391 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
13392 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13393 goto ok;
13394 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
13395 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13396 goto ok;
13397 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
13398 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13399 goto ok;
13400 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
13401 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13402 goto ok;
13403 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
13404 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13405 goto ok;
13406 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
13407 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13408 goto ok;
13409 }
13410
13411 return S390_DECODE_UNKNOWN_INSN;
13412
13413ok:
13414 return S390_DECODE_OK;
13415
13416unimplemented:
13417 return S390_DECODE_UNIMPLEMENTED_INSN;
13418}
13419
13420/* Handle "special" instructions. */
13421static s390_decode_t
13422s390_decode_special_and_irgen(UChar *bytes)
13423{
13424 s390_decode_t status = S390_DECODE_OK;
13425
13426 /* Got a "Special" instruction preamble. Which one is it? */
13427 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
13428 s390_irgen_client_request();
13429 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
13430 s390_irgen_guest_NRADDR();
13431 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
13432 s390_irgen_call_noredir();
13433 } else {
13434 /* We don't know what it is. */
13435 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
13436 }
13437
13438 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13439
13440 return status;
13441}
13442
13443
13444/* Function returns # bytes that were decoded or 0 in case of failure */
florianb4df7682011-07-05 02:09:01 +000013445static UInt
sewardj2019a972011-03-07 16:04:07 +000013446s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
13447{
13448 s390_decode_t status;
13449
13450 dis_res = dres;
13451
13452 /* Spot the 8-byte preamble: 18ff lr r15,r15
13453 1811 lr r1,r1
13454 1822 lr r2,r2
13455 1833 lr r3,r3 */
13456 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
13457 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
13458 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
13459
13460 /* Handle special instruction that follows that preamble. */
13461 if (0) vex_printf("special function handling...\n");
florian2c8ed942011-08-01 22:07:51 +000013462
13463 insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13464 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13465
13466 status =
13467 s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE);
sewardj2019a972011-03-07 16:04:07 +000013468 } else {
13469 /* Handle normal instructions. */
13470 switch (insn_length) {
13471 case 2:
13472 status = s390_decode_2byte_and_irgen(bytes);
13473 break;
13474
13475 case 4:
13476 status = s390_decode_4byte_and_irgen(bytes);
13477 break;
13478
13479 case 6:
13480 status = s390_decode_6byte_and_irgen(bytes);
13481 break;
13482
13483 default:
13484 status = S390_DECODE_ERROR;
13485 break;
13486 }
13487 }
florian5fcbba22011-07-27 20:40:22 +000013488 /* If next instruction is execute, stop here */
florianf9e1ed72012-04-17 02:41:56 +000013489 if (dis_res->whatNext == Dis_Continue && bytes[insn_length] == 0x44) {
13490 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +000013491 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000013492 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +000013493 }
13494
13495 if (status == S390_DECODE_OK) return insn_length; /* OK */
13496
13497 /* Decoding failed somehow */
13498 vex_printf("vex s390->IR: ");
13499 switch (status) {
13500 case S390_DECODE_UNKNOWN_INSN:
13501 vex_printf("unknown insn: ");
13502 break;
13503
13504 case S390_DECODE_UNIMPLEMENTED_INSN:
13505 vex_printf("unimplemented insn: ");
13506 break;
13507
13508 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
13509 vex_printf("unimplemented special insn: ");
13510 break;
13511
13512 default:
13513 case S390_DECODE_ERROR:
13514 vex_printf("decoding error: ");
13515 break;
13516 }
13517
13518 vex_printf("%02x%02x", bytes[0], bytes[1]);
13519 if (insn_length > 2) {
13520 vex_printf(" %02x%02x", bytes[2], bytes[3]);
13521 }
13522 if (insn_length > 4) {
13523 vex_printf(" %02x%02x", bytes[4], bytes[5]);
13524 }
13525 vex_printf("\n");
13526
13527 return 0; /* Failed */
13528}
13529
13530
sewardj2019a972011-03-07 16:04:07 +000013531/* Disassemble a single instruction INSN into IR. */
13532static DisResult
florian420c5012011-07-22 02:12:28 +000013533disInstr_S390_WRK(UChar *insn)
sewardj2019a972011-03-07 16:04:07 +000013534{
13535 UChar byte;
13536 UInt insn_length;
13537 DisResult dres;
13538
13539 /* ---------------------------------------------------- */
13540 /* --- Compute instruction length -- */
13541 /* ---------------------------------------------------- */
13542
13543 /* Get the first byte of the insn. */
13544 byte = insn[0];
13545
13546 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
13547 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
13548 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
13549
13550 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13551
13552 /* ---------------------------------------------------- */
13553 /* --- Initialise the DisResult data -- */
13554 /* ---------------------------------------------------- */
13555 dres.whatNext = Dis_Continue;
13556 dres.len = insn_length;
13557 dres.continueAt = 0;
florian8844a632012-04-13 04:04:06 +000013558 dres.jk_StopHere = Ijk_INVALID;
sewardj2019a972011-03-07 16:04:07 +000013559
floriana99f20e2011-07-17 14:16:41 +000013560 /* fixs390: consider chasing of conditional jumps */
13561
sewardj2019a972011-03-07 16:04:07 +000013562 /* Normal and special instruction handling starts here. */
13563 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
13564 /* All decode failures end up here. The decoder has already issued an
13565 error message.
13566 Tell the dispatcher that this insn cannot be decoded, and so has
florian8844a632012-04-13 04:04:06 +000013567 not been executed, and (is currently) the next to be executed. */
florian65b5b3f2012-04-22 02:51:27 +000013568 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +000013569
florian8844a632012-04-13 04:04:06 +000013570 dres.whatNext = Dis_StopHere;
13571 dres.jk_StopHere = Ijk_NoDecode;
13572 dres.continueAt = 0;
13573 dres.len = 0;
13574 } else {
13575 /* Decode success */
13576 switch (dres.whatNext) {
13577 case Dis_Continue:
florian8559e412012-04-19 14:23:48 +000013578 put_IA(mkaddr_expr(guest_IA_next_instr));
florian8844a632012-04-13 04:04:06 +000013579 break;
13580 case Dis_ResteerU:
13581 case Dis_ResteerC:
13582 put_IA(mkaddr_expr(dres.continueAt));
13583 break;
13584 case Dis_StopHere:
13585 break;
13586 default:
13587 vassert(0);
13588 }
sewardj2019a972011-03-07 16:04:07 +000013589 }
13590
13591 return dres;
13592}
13593
13594
13595/*------------------------------------------------------------*/
13596/*--- Top-level fn ---*/
13597/*------------------------------------------------------------*/
13598
13599/* Disassemble a single instruction into IR. The instruction
13600 is located in host memory at &guest_code[delta]. */
13601
13602DisResult
13603disInstr_S390(IRSB *irsb_IN,
sewardj2019a972011-03-07 16:04:07 +000013604 Bool (*resteerOkFn)(void *, Addr64),
13605 Bool resteerCisOk,
13606 void *callback_opaque,
13607 UChar *guest_code,
13608 Long delta,
13609 Addr64 guest_IP,
13610 VexArch guest_arch,
13611 VexArchInfo *archinfo,
13612 VexAbiInfo *abiinfo,
13613 Bool host_bigendian)
13614{
13615 vassert(guest_arch == VexArchS390X);
13616
13617 /* The instruction decoder requires a big-endian machine. */
13618 vassert(host_bigendian == True);
13619
13620 /* Set globals (see top of this file) */
13621 guest_IA_curr_instr = guest_IP;
sewardj2019a972011-03-07 16:04:07 +000013622 irsb = irsb_IN;
florian420c5012011-07-22 02:12:28 +000013623 resteer_fn = resteerOkFn;
13624 resteer_data = callback_opaque;
sewardj2019a972011-03-07 16:04:07 +000013625
florian420c5012011-07-22 02:12:28 +000013626 return disInstr_S390_WRK(guest_code + delta);
sewardj2019a972011-03-07 16:04:07 +000013627}
13628
13629/*---------------------------------------------------------------*/
13630/*--- end guest_s390_toIR.c ---*/
13631/*---------------------------------------------------------------*/