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gerrit-public.fairphone.software / toolchain / llvm-project / cc6089d2e04339b8db4784582295b283c6b46398 / . / llvm / lib / Target / X86 / X86InstrFragmentsSIMD.td
blob: f65292e76029df6f36d59a43e03c7c4c16287101 [file] [log] [blame]
Jia Liue1d61962012-02-19 02:03:36 +0000[diff] [blame]1//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +0000[diff] [blame]7//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]8//===----------------------------------------------------------------------===//
9//
10// This file provides pattern fragments useful for SIMD instructions.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]15// MMX specific DAG Nodes.
16//===----------------------------------------------------------------------===//
17
18// Low word of MMX to GPR.
19def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,
20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
21
22//===----------------------------------------------------------------------===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]23// MMX Pattern Fragments
24//===----------------------------------------------------------------------===//
25
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]26def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>;
27def bc_mmx : PatFrag<(ops node:$in), (x86mmx (bitconvert node:$in))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]28
29//===----------------------------------------------------------------------===//
30// SSE specific DAG Nodes.
31//===----------------------------------------------------------------------===//
32
33def SDTX86FPShiftOp : SDTypeProfile<1, 2, [ SDTCisSameAs<0, 1>,
34 SDTCisFP<0>, SDTCisInt<2> ]>;
35def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]36 SDTCisFP<1>, SDTCisVT<3, i8>,
37 SDTCisVec<1>]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]38
Benjamin Kramer4669d182012-12-21 14:04:55 +0000[diff] [blame]39def X86umin : SDNode<"X86ISD::UMIN", SDTIntBinOp>;
40def X86umax : SDNode<"X86ISD::UMAX", SDTIntBinOp>;
41def X86smin : SDNode<"X86ISD::SMIN", SDTIntBinOp>;
42def X86smax : SDNode<"X86ISD::SMAX", SDTIntBinOp>;
43
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]44def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
45def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
Nadav Rotem178250a2012-08-19 13:06:16 +0000[diff] [blame]46
47// Commutative and Associative FMIN and FMAX.
48def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,
49 [SDNPCommutative, SDNPAssociative]>;
50def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,
51 [SDNPCommutative, SDNPAssociative]>;
52
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]53def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
54 [SDNPCommutative, SDNPAssociative]>;
55def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
56 [SDNPCommutative, SDNPAssociative]>;
57def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
58 [SDNPCommutative, SDNPAssociative]>;
Benjamin Kramer5bc180c2013-08-04 12:05:16 +0000[diff] [blame]59def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp,
60 [SDNPCommutative, SDNPAssociative]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]61def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
62def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
63def X86fsrl : SDNode<"X86ISD::FSRL", SDTX86FPShiftOp>;
Stuart Hastings9f208042011-06-01 04:39:42 +0000[diff] [blame]64def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>;
Duncan Sands0e4fcb82011-09-22 20:15:48 +0000[diff] [blame]65def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
66def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
Craig Topperf984efb2011-11-19 09:02:40 +0000[diff] [blame]67def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
68def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]69def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>;
70def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]71def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
72//def X86cmpsd : SDNode<"X86ISD::FSETCCsd", SDTX86Cmpsd>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]73def X86pshufb : SDNode<"X86ISD::PSHUFB",
Craig Topper78349002012-01-25 06:43:11 +0000[diff] [blame]74 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]75 SDTCisSameAs<0,2>]>>;
Bruno Cardoso Lopes7ba479d2011-07-13 21:36:47 +0000[diff] [blame]76def X86andnp : SDNode<"X86ISD::ANDNP",
Bruno Cardoso Lopes9613b642011-07-13 21:36:51 +0000[diff] [blame]77 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]78 SDTCisSameAs<0,2>]>>;
Craig Topper81390be2011-11-19 07:33:10 +0000[diff] [blame]79def X86psign : SDNode<"X86ISD::PSIGN",
Craig Topperde6b73b2011-11-19 07:07:26 +0000[diff] [blame]80 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]81 SDTCisSameAs<0,2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]82def X86pextrb : SDNode<"X86ISD::PEXTRB",
83 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
84def X86pextrw : SDNode<"X86ISD::PEXTRW",
85 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
86def X86pinsrb : SDNode<"X86ISD::PINSRB",
87 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
88 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
89def X86pinsrw : SDNode<"X86ISD::PINSRW",
90 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
91 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
Filipe Cabecinhas20352212014-04-21 20:07:29 +0000[diff] [blame]92def X86insertps : SDNode<"X86ISD::INSERTPS",
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]93 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]94 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]95def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
96 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>;
Elena Demikhovsky8d7e56c2012-04-22 09:39:03 +0000[diff] [blame]97
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]98def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
Chris Lattner54e53292010-09-22 00:34:38 +0000[diff] [blame]99 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]100
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]101def X86vzext : SDNode<"X86ISD::VZEXT",
102 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]103 SDTCisInt<0>, SDTCisInt<1>,
104 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]105
106def X86vsext : SDNode<"X86ISD::VSEXT",
107 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]108 SDTCisInt<0>, SDTCisInt<1>,
109 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]110
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]111def X86vtrunc : SDNode<"X86ISD::VTRUNC",
112 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]113 SDTCisInt<0>, SDTCisInt<1>,
114 SDTCisOpSmallerThanOp<0, 1>]>>;
Elena Demikhovskyc5f67262013-12-17 08:33:15 +0000[diff] [blame]115def X86trunc : SDNode<"X86ISD::TRUNC",
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]116 SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>,
117 SDTCisOpSmallerThanOp<0, 1>]>>;
118
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]119def X86vtruncm : SDNode<"X86ISD::VTRUNCM",
120 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
121 SDTCisInt<0>, SDTCisInt<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]122 SDTCisVec<2>, SDTCisInt<2>,
123 SDTCisOpSmallerThanOp<0, 2>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]124def X86vfpext : SDNode<"X86ISD::VFPEXT",
125 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]126 SDTCisFP<0>, SDTCisFP<1>,
127 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liaoe999b862012-10-10 16:53:28 +0000[diff] [blame]128def X86vfpround: SDNode<"X86ISD::VFPROUND",
129 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]130 SDTCisFP<0>, SDTCisFP<1>,
131 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]132
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]133def X86vshldq : SDNode<"X86ISD::VSHLDQ", SDTIntShiftOp>;
134def X86vshrdq : SDNode<"X86ISD::VSRLDQ", SDTIntShiftOp>;
Craig Topper0b7ad762012-01-22 23:36:02 +0000[diff] [blame]135def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>;
Craig Topperbd4884372012-01-22 22:42:16 +0000[diff] [blame]136def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;
137def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]138
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]139def X86IntCmpMask : SDTypeProfile<1, 2,
140 [SDTCisVec<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>]>;
141def X86pcmpeqm : SDNode<"X86ISD::PCMPEQM", X86IntCmpMask, [SDNPCommutative]>;
142def X86pcmpgtm : SDNode<"X86ISD::PCMPGTM", X86IntCmpMask>;
143
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]144def X86CmpMaskCC :
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]145 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisInt<0>, SDTCisVec<1>,
146 SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]147def X86CmpMaskCCScalar :
148 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
149
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]150def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>;
151def X86cmpmu : SDNode<"X86ISD::CMPMU", X86CmpMaskCC>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]152def X86cmpms : SDNode<"X86ISD::FSETCC", X86CmpMaskCCScalar>;
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]153
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]154def X86vshl : SDNode<"X86ISD::VSHL",
155 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
156 SDTCisVec<2>]>>;
157def X86vsrl : SDNode<"X86ISD::VSRL",
158 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
159 SDTCisVec<2>]>>;
160def X86vsra : SDNode<"X86ISD::VSRA",
161 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
162 SDTCisVec<2>]>>;
163
164def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;
165def X86vsrli : SDNode<"X86ISD::VSRLI", SDTIntShiftOp>;
166def X86vsrai : SDNode<"X86ISD::VSRAI", SDTIntShiftOp>;
167
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]168def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]169 SDTCisVec<1>,
170 SDTCisSameAs<2, 1>]>;
Benjamin Kramerb16ccde2012-12-15 16:47:44 +0000[diff] [blame]171def X86subus : SDNode<"X86ISD::SUBUS", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]172def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]173def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
Elena Demikhovsky40864b62013-08-05 08:52:21 +0000[diff] [blame]174def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]175def X86testm : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky33d447a2013-08-21 09:36:02 +0000[diff] [blame]176 SDTCisVec<1>,
177 SDTCisSameAs<2, 1>]>>;
Elena Demikhovskya30e4372014-02-05 07:05:03 +0000[diff] [blame]178def X86testnm : SDNode<"X86ISD::TESTNM", SDTypeProfile<1, 2, [SDTCisVec<0>,
179 SDTCisVec<1>,
180 SDTCisSameAs<2, 1>]>>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]181def X86select : SDNode<"X86ISD::SELECT" , SDTSelect>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]182
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]183def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
184 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
185 SDTCisSameAs<1,2>]>>;
Benjamin Kramer6d2dff62014-04-26 14:12:19 +0000[diff] [blame]186def X86pmuldq : SDNode<"X86ISD::PMULDQ",
187 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
188 SDTCisSameAs<1,2>]>>;
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]189
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]190// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
191// translated into one of the target nodes below during lowering.
192// Note: this is a work in progress...
193def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>;
194def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
195 SDTCisSameAs<0,2>]>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]196def SDTShuff3Op : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
197 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]198
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]199def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
200 SDTCisVec<2>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]201def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>,
202 SDTCisSameAs<0,1>, SDTCisInt<2>]>;
203def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
204 SDTCisSameAs<0,2>, SDTCisInt<3>]>;
205
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]206def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;
207def SDTVBroadcastm : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>]>;
208
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]209def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]210 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]211
212def SDTFma : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
213 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]214def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
215 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>, SDTCisInt<4>]>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]216def STDFp1SrcRm : SDTypeProfile<1, 2, [SDTCisSameAs<0,1>,
217 SDTCisVec<0>, SDTCisInt<2>]>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]218def STDFp2SrcRm : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
219 SDTCisVec<0>, SDTCisInt<3>]>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]220
Craig Topper8fb09f02013-01-28 06:48:25 +0000[diff] [blame]221def X86PAlignr : SDNode<"X86ISD::PALIGNR", SDTShuff3OpI>;
Adam Nemet2f10cc62014-08-05 17:22:55 +0000[diff] [blame]222def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]223
224def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>;
225def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>;
226def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>;
227
Craig Topper6e54ba72011-12-31 23:50:21 +0000[diff] [blame]228def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]229
230def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
231def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;
232def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;
233
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]234def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
235def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
236
237def X86Movlhps : SDNode<"X86ISD::MOVLHPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]238def X86Movlhpd : SDNode<"X86ISD::MOVLHPD", SDTShuff2Op>;
Bruno Cardoso Lopes03e4c352010-08-31 21:15:21 +0000[diff] [blame]239def X86Movhlps : SDNode<"X86ISD::MOVHLPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]240
Bruno Cardoso Lopesb3825212010-09-01 05:08:25 +0000[diff] [blame]241def X86Movlps : SDNode<"X86ISD::MOVLPS", SDTShuff2Op>;
242def X86Movlpd : SDNode<"X86ISD::MOVLPD", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]243
Chandler Carruth8366ceb2014-06-20 01:05:28 +0000[diff] [blame]244def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, SDTCisSameAs<2, 1>]>;
245def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
246def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>;
247
Craig Topper8d4ba192011-12-06 08:21:25 +0000[diff] [blame]248def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;
249def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]250
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]251def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>;
Chandler Carruthed5dfff2014-09-22 22:29:42 +0000[diff] [blame]252def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>;
253def X86VPermv : SDNode<"X86ISD::VPERMV", SDTShuff2Op>;
254def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;
255def X86VPermv3 : SDNode<"X86ISD::VPERMV3", SDTShuff3Op>;
Elena Demikhovskya5d38a32014-01-23 14:27:26 +0000[diff] [blame]256def X86VPermiv3 : SDNode<"X86ISD::VPERMIV3", SDTShuff3Op>;
Bruno Cardoso Lopesb878caa2011-07-21 01:55:47 +0000[diff] [blame]257
Craig Topper0a672ea2011-11-30 07:47:51 +0000[diff] [blame]258def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;
Bruno Cardoso Lopesf15dfe52011-08-12 21:48:26 +0000[diff] [blame]259
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]260def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>;
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]261def X86VBroadcastm : SDNode<"X86ISD::VBROADCASTM", SDTVBroadcastm>;
Elena Demikhovsky89529742013-09-12 08:55:00 +0000[diff] [blame]262def X86Vinsert : SDNode<"X86ISD::VINSERT", SDTypeProfile<1, 3,
263 [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
Elena Demikhovsky9f423d62014-02-10 07:02:39 +0000[diff] [blame]264def X86Vextract : SDNode<"X86ISD::VEXTRACT", SDTypeProfile<1, 2,
265 [SDTCisVec<1>, SDTCisPtrTy<2>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]266
Elena Demikhovskycd3c1c42012-12-05 09:24:57 +0000[diff] [blame]267def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>;
Chandler Carruth204ad4c2014-09-15 20:09:47 +0000[diff] [blame]268
269def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>;
270
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]271def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;
272def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
273def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFma>;
274def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFma>;
Craig Toppera999c662012-08-29 07:18:25 +0000[diff] [blame]275def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFma>;
276def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFma>;
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]277
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]278def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound>;
279def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound>;
280def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound>;
281def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound>;
282def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound>;
283def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound>;
284
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]285def X86rsqrt28 : SDNode<"X86ISD::RSQRT28", STDFp1SrcRm>;
286def X86rcp28 : SDNode<"X86ISD::RCP28", STDFp1SrcRm>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]287def X86exp2 : SDNode<"X86ISD::EXP2", STDFp1SrcRm>;
288
289def X86rsqrt28s : SDNode<"X86ISD::RSQRT28", STDFp2SrcRm>;
290def X86rcp28s : SDNode<"X86ISD::RCP28", STDFp2SrcRm>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]291
Craig Topperab47fe42012-08-06 06:22:36 +0000[diff] [blame]292def SDT_PCMPISTRI : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
293 SDTCisVT<2, v16i8>, SDTCisVT<3, v16i8>,
294 SDTCisVT<4, i8>]>;
295def SDT_PCMPESTRI : SDTypeProfile<2, 5, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
296 SDTCisVT<2, v16i8>, SDTCisVT<3, i32>,
297 SDTCisVT<4, v16i8>, SDTCisVT<5, i32>,
298 SDTCisVT<6, i8>]>;
299
300def X86pcmpistri : SDNode<"X86ISD::PCMPISTRI", SDT_PCMPISTRI>;
301def X86pcmpestri : SDNode<"X86ISD::PCMPESTRI", SDT_PCMPESTRI>;
302
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]303def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 3,
304 [SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>,
305 SDTCisVec<3>, SDTCisVec<1>, SDTCisInt<1>]>, []>;
Elena Demikhovsky72860c32014-12-15 10:03:52 +0000[diff] [blame]306def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 3,
307 [SDTCisSameAs<0, 3>,
308 SDTCisVec<3>, SDTCisVec<1>, SDTCisInt<1>]>, []>;
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]309
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]310//===----------------------------------------------------------------------===//
311// SSE Complex Patterns
312//===----------------------------------------------------------------------===//
313
314// These are 'extloads' from a scalar to the low element of a vector, zeroing
315// the top elements. These are used for the SSE 'ss' and 'sd' instruction
316// forms.
317def sse_load_f32 : ComplexPattern<v4f32, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]318 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
319 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]320def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]321 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
322 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]323
324def ssmem : Operand<v4f32> {
325 let PrintMethod = "printf32mem";
326 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]327 let ParserMatchClass = X86Mem32AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]328 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]329}
330def sdmem : Operand<v2f64> {
331 let PrintMethod = "printf64mem";
332 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]333 let ParserMatchClass = X86Mem64AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]334 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]335}
336
337//===----------------------------------------------------------------------===//
338// SSE pattern fragments
339//===----------------------------------------------------------------------===//
340
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]341// 128-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]342// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]343def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>;
344def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]345def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>;
346
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]347// 256-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]348// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]349def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>;
350def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]351def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>;
352
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]353// 512-bit load pattern fragments
354def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>;
355def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>;
Robert Khasanov7ca7df02014-08-04 14:35:15 +0000[diff] [blame]356def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>;
357def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>;
Elena Demikhovsky1f3ed412013-10-22 09:19:28 +0000[diff] [blame]358def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]359def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>;
360
361// 128-/256-/512-bit extload pattern fragments
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]362def extloadv2f32 : PatFrag<(ops node:$ptr), (v2f64 (extloadvf32 node:$ptr))>;
363def extloadv4f32 : PatFrag<(ops node:$ptr), (v4f64 (extloadvf32 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]364def extloadv8f32 : PatFrag<(ops node:$ptr), (v8f64 (extloadvf32 node:$ptr))>;
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]365
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]366// Like 'store', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]367def alignedstore : PatFrag<(ops node:$val, node:$ptr),
368 (store node:$val, node:$ptr), [{
369 return cast<StoreSDNode>(N)->getAlignment() >= 16;
370}]>;
371
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]372// Like 'store', but always requires 256-bit vector alignment.
373def alignedstore256 : PatFrag<(ops node:$val, node:$ptr),
374 (store node:$val, node:$ptr), [{
375 return cast<StoreSDNode>(N)->getAlignment() >= 32;
376}]>;
377
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]378// Like 'store', but always requires 512-bit vector alignment.
379def alignedstore512 : PatFrag<(ops node:$val, node:$ptr),
380 (store node:$val, node:$ptr), [{
381 return cast<StoreSDNode>(N)->getAlignment() >= 64;
382}]>;
383
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]384// Like 'load', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]385def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
386 return cast<LoadSDNode>(N)->getAlignment() >= 16;
387}]>;
388
Chad Rosiera281afc2012-03-09 02:00:48 +0000[diff] [blame]389// Like 'X86vzload', but always requires 128-bit vector alignment.
390def alignedX86vzload : PatFrag<(ops node:$ptr), (X86vzload node:$ptr), [{
391 return cast<MemSDNode>(N)->getAlignment() >= 16;
392}]>;
393
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]394// Like 'load', but always requires 256-bit vector alignment.
395def alignedload256 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
396 return cast<LoadSDNode>(N)->getAlignment() >= 32;
397}]>;
398
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]399// Like 'load', but always requires 512-bit vector alignment.
400def alignedload512 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
401 return cast<LoadSDNode>(N)->getAlignment() >= 64;
402}]>;
403
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]404def alignedloadfsf32 : PatFrag<(ops node:$ptr),
405 (f32 (alignedload node:$ptr))>;
406def alignedloadfsf64 : PatFrag<(ops node:$ptr),
407 (f64 (alignedload node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]408
409// 128-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]410// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]411def alignedloadv4f32 : PatFrag<(ops node:$ptr),
412 (v4f32 (alignedload node:$ptr))>;
413def alignedloadv2f64 : PatFrag<(ops node:$ptr),
414 (v2f64 (alignedload node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]415def alignedloadv2i64 : PatFrag<(ops node:$ptr),
416 (v2i64 (alignedload node:$ptr))>;
417
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]418// 256-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]419// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]420def alignedloadv8f32 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]421 (v8f32 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]422def alignedloadv4f64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]423 (v4f64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]424def alignedloadv4i64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]425 (v4i64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]426
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]427// 512-bit aligned load pattern fragments
428def alignedloadv16f32 : PatFrag<(ops node:$ptr),
429 (v16f32 (alignedload512 node:$ptr))>;
Elena Demikhovsky3ce8dbb2013-08-18 13:08:57 +0000[diff] [blame]430def alignedloadv16i32 : PatFrag<(ops node:$ptr),
431 (v16i32 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]432def alignedloadv8f64 : PatFrag<(ops node:$ptr),
433 (v8f64 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]434def alignedloadv8i64 : PatFrag<(ops node:$ptr),
435 (v8i64 (alignedload512 node:$ptr))>;
436
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]437// Like 'load', but uses special alignment checks suitable for use in
438// memory operands in most SSE instructions, which are required to
439// be naturally aligned on some targets but not on others. If the subtarget
440// allows unaligned accesses, match any load, though this may require
441// setting a feature bit in the processor (on startup, for example).
442// Opteron 10h and later implement such a feature.
443def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{
Sanjay Patelffd039b2015-02-03 17:13:04 +0000[diff] [blame]444 return Subtarget->hasSSEUnalignedMem()
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]445 || cast<LoadSDNode>(N)->getAlignment() >= 16;
446}]>;
447
448def memopfsf32 : PatFrag<(ops node:$ptr), (f32 (memop node:$ptr))>;
449def memopfsf64 : PatFrag<(ops node:$ptr), (f64 (memop node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]450
451// 128-bit memop pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]452// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]453def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;
454def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]455def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]456
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]457// 256-bit memop pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]458// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]459def memopv8f32 : PatFrag<(ops node:$ptr), (v8f32 (memop node:$ptr))>;
460def memopv4f64 : PatFrag<(ops node:$ptr), (v4f64 (memop node:$ptr))>;
Bruno Cardoso Lopes3d6a3a02010-08-06 20:03:27 +0000[diff] [blame]461def memopv4i64 : PatFrag<(ops node:$ptr), (v4i64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]462
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]463// 512-bit memop pattern fragments
Elena Demikhovskya79fc162014-12-16 09:10:08 +0000[diff] [blame]464def memopv16f32 : PatFrag<(ops node:$ptr), (v16f32 (memop node:$ptr))>;
465def memopv8f64 : PatFrag<(ops node:$ptr), (v8f64 (memop node:$ptr))>;
466def memopv16i32 : PatFrag<(ops node:$ptr), (v16i32 (memop node:$ptr))>;
467def memopv8i64 : PatFrag<(ops node:$ptr), (v8i64 (memop node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]468
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]469// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
470// 16-byte boundary.
471// FIXME: 8 byte alignment for mmx reads is not required
472def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
473 return cast<LoadSDNode>(N)->getAlignment() >= 8;
474}]>;
475
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]476def memopmmx : PatFrag<(ops node:$ptr), (x86mmx (memop64 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]477
478// MOVNT Support
479// Like 'store', but requires the non-temporal bit to be set
480def nontemporalstore : PatFrag<(ops node:$val, node:$ptr),
481 (st node:$val, node:$ptr), [{
482 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
483 return ST->isNonTemporal();
484 return false;
485}]>;
486
487def alignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]488 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]489 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
490 return ST->isNonTemporal() && !ST->isTruncatingStore() &&
491 ST->getAddressingMode() == ISD::UNINDEXED &&
492 ST->getAlignment() >= 16;
493 return false;
494}]>;
495
496def unalignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]497 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]498 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
499 return ST->isNonTemporal() &&
500 ST->getAlignment() < 16;
501 return false;
502}]>;
503
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]504// 128-bit bitconvert pattern fragments
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]505def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>;
506def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>;
507def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>;
508def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>;
509def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;
510def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;
511
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]512// 256-bit bitconvert pattern fragments
Craig Topper682b8502011-11-02 04:42:13 +0000[diff] [blame]513def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;
514def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]515def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;
Bruno Cardoso Lopes1021b4a2011-07-13 01:15:33 +0000[diff] [blame]516def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;
Elena Demikhovsky3629b4a2014-01-06 08:45:54 +0000[diff] [blame]517def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]518
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]519// 512-bit bitconvert pattern fragments
520def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>;
521def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]522def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;
523def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>;
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]524
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]525def vzmovl_v2i64 : PatFrag<(ops node:$src),
526 (bitconvert (v2i64 (X86vzmovl
527 (v2i64 (scalar_to_vector (loadi64 node:$src))))))>;
528def vzmovl_v4i32 : PatFrag<(ops node:$src),
529 (bitconvert (v4i32 (X86vzmovl
530 (v4i32 (scalar_to_vector (loadi32 node:$src))))))>;
531
532def vzload_v2i64 : PatFrag<(ops node:$src),
533 (bitconvert (v2i64 (X86vzload node:$src)))>;
534
535
536def fp32imm0 : PatLeaf<(f32 fpimm), [{
537 return N->isExactlyValue(+0.0);
538}]>;
539
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]540def I8Imm : SDNodeXForm<imm, [{
541 // Transformation function: get the low 8 bits.
542 return getI8Imm((uint8_t)N->getZExtValue());
543}]>;
544
545def FROUND_NO_EXC : ImmLeaf<i32, [{ return Imm == 8; }]>;
Adam Nemet50b83f02014-08-14 17:13:26 +0000[diff] [blame]546def FROUND_CURRENT : ImmLeaf<i32, [{
547 return Imm == X86::STATIC_ROUNDING::CUR_DIRECTION;
548}]>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]549
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]550// BYTE_imm - Transform bit immediates into byte immediates.
551def BYTE_imm : SDNodeXForm<imm, [{
552 // Transformation function: imm >> 3
553 return getI32Imm(N->getZExtValue() >> 3);
554}]>;
555
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]556// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index
557// to VEXTRACTF128/VEXTRACTI128 imm.
558def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{
559 return getI8Imm(X86::getExtractVEXTRACT128Immediate(N));
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]560}]>;
561
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]562// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to
563// VINSERTF128/VINSERTI128 imm.
564def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{
565 return getI8Imm(X86::getInsertVINSERT128Immediate(N));
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]566}]>;
567
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]568// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index
569// to VEXTRACTF64x4 imm.
570def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{
571 return getI8Imm(X86::getExtractVEXTRACT256Immediate(N));
572}]>;
573
574// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to
575// VINSERTF64x4 imm.
576def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{
577 return getI8Imm(X86::getInsertVINSERT256Immediate(N));
578}]>;
579
580def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index),
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]581 (extract_subvector node:$bigvec,
582 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]583 return X86::isVEXTRACT128Index(N);
584}], EXTRACT_get_vextract128_imm>;
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]585
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]586def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]587 node:$index),
588 (insert_subvector node:$bigvec, node:$smallvec,
589 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]590 return X86::isVINSERT128Index(N);
591}], INSERT_get_vinsert128_imm>;
592
593
594def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index),
595 (extract_subvector node:$bigvec,
596 node:$index), [{
597 return X86::isVEXTRACT256Index(N);
598}], EXTRACT_get_vextract256_imm>;
599
600def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
601 node:$index),
602 (insert_subvector node:$bigvec, node:$smallvec,
603 node:$index), [{
604 return X86::isVINSERT256Index(N);
605}], INSERT_get_vinsert256_imm>;
Bruno Cardoso Lopes123dff02011-07-25 23:05:25 +0000[diff] [blame]606