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gerrit-public.fairphone.software / fp2-dev / kernel / msm / 183b33d0164392b3687287252eb7c1299c27200f / . / arch / arm / boot / dts / msm8226.dtsi
blob: 30b06c60238ba6c5d0ec9dc31b823d00e10fba41 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]14
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]15/ {
16 model = "Qualcomm MSM 8226";
17 compatible = "qcom,msm8226";
18 interrupt-parent = <&intc>;
19
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]20 aliases {
21 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]22 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
23 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]24 sdhc3 = &sdhc_3; /* SDC3 SDIO slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]25 };
26
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]27 memory {
28 secure_mem: secure_region {
29 linux,contiguous-region;
Shalaj Jain5ce2fde2013-05-10 13:22:33 -0700[diff] [blame]30 reg = <0 0x6D00000>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]31 label = "secure_mem";
32 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]33
Krupal Divvela756ee0f2013-06-12 03:42:55 +0530[diff] [blame]34 adsp_mem: adsp_region {
35 linux,contiguous-region;
36 reg = <0 0x2000000>;
37 label = "adsp_mem";
38 };
39
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]40 qsecom_mem: qsecom_region {
41 linux,contiguous-region;
42 reg = <0 0x780000>;
43 label = "qsecom_mem";
44 };
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]45 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]46
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]47 soc: soc { };
48};
49
50/include/ "msm8226-ion.dtsi"
51/include/ "msm8226-camera.dtsi"
52/include/ "msm-gdsc.dtsi"
53/include/ "msm8226-iommu.dtsi"
54/include/ "msm8226-pm.dtsi"
55/include/ "msm8226-smp2p.dtsi"
56/include/ "msm8226-gpu.dtsi"
57/include/ "msm8226-bus.dtsi"
58/include/ "msm8226-mdss.dtsi"
59/include/ "msm8226-coresight.dtsi"
60/include/ "msm8226-iommu-domains.dtsi"
61
62&soc {
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges;
66
67 intc: interrupt-controller@f9000000 {
68 compatible = "qcom,msm-qgic2";
69 interrupt-controller;
70 #interrupt-cells = <3>;
71 reg = <0xF9000000 0x1000>,
72 <0xF9002000 0x1000>;
73 };
74
75 msmgpio: gpio@fd510000 {
76 compatible = "qcom,msm-gpio";
77 interrupt-controller;
78 #interrupt-cells = <2>;
79 reg = <0xfd510000 0x4000>;
80 gpio-controller;
81 #gpio-cells = <2>;
82 ngpio = <117>;
83 interrupts = <0 208 0>;
84 qcom,direct-connect-irqs = <8>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]85 };
86
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame]87 qcom,mpm2-sleep-counter@fc4a3000 {
88 compatible = "qcom,mpm2-sleep-counter";
89 reg = <0xfc4a3000 0x1000>;
90 clock-frequency = <32768>;
91 };
92
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]93 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]94 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]95 interrupts = <1 2 0 1 3 0>;
96 clock-frequency = <19200000>;
97 };
98
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]99 timer@f9020000 {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges;
103 compatible = "arm,armv7-timer-mem";
104 reg = <0xf9020000 0x1000>;
105 clock-frequency = <19200000>;
106
107 frame@f9021000 {
108 frame-number = <0>;
109 interrupts = <0 8 0x4>,
110 <0 7 0x4>;
111 reg = <0xf9021000 0x1000>,
112 <0xf9022000 0x1000>;
113 };
114
115 frame@f9023000 {
116 frame-number = <1>;
117 interrupts = <0 9 0x4>;
118 reg = <0xf9023000 0x1000>;
119 status = "disabled";
120 };
121
122 frame@f9024000 {
123 frame-number = <2>;
124 interrupts = <0 10 0x4>;
125 reg = <0xf9024000 0x1000>;
126 status = "disabled";
127 };
128
129 frame@f9025000 {
130 frame-number = <3>;
131 interrupts = <0 11 0x4>;
132 reg = <0xf9025000 0x1000>;
133 status = "disabled";
134 };
135
136 frame@f9026000 {
137 frame-number = <4>;
138 interrupts = <0 12 0x4>;
139 reg = <0xf9026000 0x1000>;
140 status = "disabled";
141 };
142
143 frame@f9027000 {
144 frame-number = <5>;
145 interrupts = <0 13 0x4>;
146 reg = <0xf9027000 0x1000>;
147 status = "disabled";
148 };
149
150 frame@f9028000 {
151 frame-number = <6>;
152 interrupts = <0 14 0x4>;
153 reg = <0xf9028000 0x1000>;
154 status = "disabled";
155 };
156 };
157
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]158 qcom,vidc@fdc00000 {
159 compatible = "qcom,msm-vidc";
160 reg = <0xfdc00000 0xff000>;
161 interrupts = <0 44 0>;
162 qcom,load-freq-tbl = <352800 160000000>,
163 <244800 133330000>,
164 <108000 66700000>;
165 qcom,hfi = "venus";
166 qcom,bus-ports = <1>;
167 qcom,reg-presets = <0xE0024 0x0>,
168 <0x80124 0x3>,
169 <0xE0020 0x5555556>,
170 <0x800B0 0x10101001>,
171 <0x800B4 0x00101010>,
172 <0x800C0 0x1010100f>,
173 <0x800C4 0x00101010>,
174 <0x800D0 0x00000010>,
175 <0x800D4 0x00000010>,
176 <0x800D8 0x00000707>;
177 qcom,enc-ddr-ab-ib = <0 0>,
178 <129000 142000>,
179 <384000 422000>,
180 <866000 953000>;
181 qcom,dec-ddr-ab-ib = <0 0>,
182 <103000 134000>,
183 <268000 348000>,
184 <505000 657000>;
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]185 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
Eric Hoa00e2da2013-06-20 17:41:57 -0700[diff] [blame]186 <0x2 0x2>,
187 <0x1f0 0x3>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]188 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Eric Hoa00e2da2013-06-20 17:41:57 -0700[diff] [blame]189 qcom,vidc-iommu-domains {
190 qcom,domain-ns {
191 qcom,vidc-domain-phandle = <&venus_domain_ns>;
192 qcom,vidc-partition-buffer-types = <0x1ff>,
193 <0x200>;
194 };
195
196 qcom,domain-cp {
197 qcom,vidc-domain-phandle = <&venus_domain_cp>;
198 qcom,vidc-partition-buffer-types = <0x2>,
199 <0x1f1>;
200 };
201 };
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]202 };
203
204 qcom,wfd {
205 compatible = "qcom,msm-wfd";
206 };
207
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]208 serial@f991f000 {
209 compatible = "qcom,msm-lsuart-v14";
210 reg = <0xf991f000 0x1000>;
211 interrupts = <0 109 0>;
212 status = "disabled";
213 };
214
215 serial@f995e000 {
216 compatible = "qcom,msm-lsuart-v14";
217 reg = <0xf995e000 0x1000>;
218 interrupts = <0 114 0>;
219 status = "disabled";
220 };
221
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]222 qcom,msm-imem@fe805000 {
223 compatible = "qcom,msm-imem";
224 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
225 };
226
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]227 qcom,sps@f9984000 {
228 compatible = "qcom,msm_sps";
229 reg = <0xf9984000 0x15000>,
230 <0xf9999000 0xb000>;
231 interrupts = <0 94 0>;
232 };
233
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]234 qcom,usbbam@f9a44000 {
235 compatible = "qcom,usb-bam-msm";
236 reg = <0xf9a44000 0x11000>;
237 reg-names = "hsusb";
238 interrupts = <0 135 0>;
239 interrupt-names = "hsusb";
240 qcom,usb-bam-num-pipes = <16>;
241 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
242 qcom,ignore-core-reset-ack;
243 qcom,disable-clk-gating;
244
245 qcom,pipe0 {
246 label = "hsusb-qdss-in-0";
247 qcom,usb-bam-mem-type = <3>;
248 qcom,bam-type = <1>;
249 qcom,dir = <1>;
250 qcom,pipe-num = <0>;
251 qcom,peer-bam = <1>;
252 qcom,src-bam-physical-address = <0xfc37c000>;
253 qcom,src-bam-pipe-index = <0>;
254 qcom,dst-bam-physical-address = <0xf9a44000>;
255 qcom,dst-bam-pipe-index = <2>;
256 qcom,data-fifo-offset = <0x0>;
257 qcom,data-fifo-size = <0x600>;
258 qcom,descriptor-fifo-offset = <0x600>;
259 qcom,descriptor-fifo-size = <0x200>;
260 };
261 };
262
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]263 usb_otg: usb@f9a55000 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]264 compatible = "qcom,hsusb-otg";
265 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]266 interrupts = <0 134 0>, <0 140 0>;
267 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]268 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]269 HSUSB_1p8-supply = <&pm8226_l10>;
270 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]271 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]272
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]273 qcom,hsusb-otg-phy-init-seq =
274 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]275 qcom,hsusb-otg-phy-type = <2>;
276 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]277 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]278 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]279 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]280
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]281 qcom,msm-bus,name = "usb";
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]282 qcom,msm-bus,num-cases = <3>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]283 qcom,msm-bus,num-paths = <1>;
284 qcom,msm-bus,vectors-KBps =
285 <87 512 0 0>,
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]286 <87 512 60000 960000>,
287 <87 512 6000 6000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]288 };
289
Mayank Ranaf8bfadb2013-07-25 12:01:25 +0530[diff] [blame]290 android_usb: android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]291 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]292 reg = <0xfe8050c8 0xc8>;
Manu Gautam1bdb7802013-05-22 12:48:35 +0530[diff] [blame]293 qcom,android-usb-swfi-latency = <1>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]294 };
295
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]296 wcd9xxx_intc: wcd9xxx-irq {
297 compatible = "qcom,wcd9xxx-irq";
298 interrupt-controller;
299 #interrupt-cells = <1>;
300 interrupt-parent = <&msmgpio>;
301 interrupts = <68 0>;
302 interrupt-names = "cdc-int";
303 };
304
Phani Kumar Uppalapati5f285bf2013-05-05 23:36:57 -0700[diff] [blame]305 slim_msm: slim@fe12f000 {
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]306 cell-index = <1>;
307 compatible = "qcom,slim-ngd";
308 reg = <0xfe12f000 0x35000>,
309 <0xfe104000 0x20000>;
310 reg-names = "slimbus_physical", "slimbus_bam_physical";
311 interrupts = <0 163 0>, <0 164 0>;
312 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]313
314 tapan_codec {
315 compatible = "qcom,tapan-slim-pgd";
316 elemental-addr = [00 01 E0 00 17 02];
317
318 interrupt-parent = <&wcd9xxx_intc>;
319 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
320 17 18 19 20 21 22 23 24 25 26 27 28>;
321 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
322
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]323 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare482ef672013-06-20 15:28:59 -0700[diff] [blame]324 qcom,cdc-vdd-buck-voltage = <1800000 2150000>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]325 qcom,cdc-vdd-buck-current = <650000>;
326
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]327 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]328 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
329 qcom,cdc-vdd-h-current = <25000>;
330
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]331 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]332 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
333 qcom,cdc-vdd-px-current = <25000>;
334
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]335 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]336 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
337 qcom,cdc-vdd-a-1p2v-current = <10000>;
338
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]339 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]340 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
341 qcom,cdc-vdd-cx-current = <10000>;
342
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]343 qcom,cdc-static-supplies = "cdc-vdd-buck",
344 "cdc-vdd-h",
345 "cdc-vdd-px",
346 "cdc-vdd-a-1p2v",
347 "cdc-vdd-cx";
348
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]349 qcom,cdc-micbias-ldoh-v = <0x3>;
350 qcom,cdc-micbias-cfilt1-mv = <1800>;
Phani Kumar Uppalapatiab0d98a2013-05-21 23:04:15 -0700[diff] [blame]351 qcom,cdc-micbias-cfilt2-mv = <2700>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]352 qcom,cdc-micbias-cfilt3-mv = <1800>;
353
354 qcom,cdc-micbias1-cfilt-sel = <0x0>;
355 qcom,cdc-micbias2-cfilt-sel = <0x1>;
356 qcom,cdc-micbias3-cfilt-sel = <0x2>;
357
358 qcom,cdc-mclk-clk-rate = <9600000>;
359 qcom,cdc-slim-ifd = "tapan-slim-ifd";
360 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
361 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]362 };
363
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]364 qcom,msm-adsp-loader {
365 compatible = "qcom,adsp-loader";
366 qcom,adsp-state = <0>;
367 };
368
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]369 sound {
370 compatible = "qcom,msm8226-audio-tapan";
371 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]372 qcom,tapan-mclk-clk-freq = <9600000>;
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]373 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
374 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
375 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
376 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
377 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]378 };
379
380 qcom,msm-pcm {
381 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]382 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]383 };
384
385 qcom,msm-pcm-routing {
386 compatible = "qcom,msm-pcm-routing";
387 };
388
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]389 qcom,msm-pcm-low-latency {
390 compatible = "qcom,msm-pcm-dsp";
391 qcom,msm-pcm-dsp-id = <1>;
392 qcom,msm-pcm-low-latency;
393 };
394
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]395 qcom,msm-pcm-lpa {
396 compatible = "qcom,msm-pcm-lpa";
397 };
398
399 qcom,msm-compr-dsp {
400 compatible = "qcom,msm-compr-dsp";
401 };
402
403 qcom,msm-voip-dsp {
404 compatible = "qcom,msm-voip-dsp";
405 };
406
407 qcom,msm-pcm-voice {
408 compatible = "qcom,msm-pcm-voice";
409 };
410
411 qcom,msm-stub-codec {
412 compatible = "qcom,msm-stub-codec";
413 };
414
415 qcom,msm-dai-fe {
416 compatible = "qcom,msm-dai-fe";
417 };
418
419 qcom,msm-pcm-afe {
420 compatible = "qcom,msm-pcm-afe";
421 };
422
423 qcom,msm-dai-q6-hdmi {
424 compatible = "qcom,msm-dai-q6-hdmi";
425 qcom,msm-dai-q6-dev-id = <8>;
426 };
427
428 qcom,msm-dai-q6 {
429 compatible = "qcom,msm-dai-q6";
430 qcom,msm-dai-q6-sb-0-rx {
431 compatible = "qcom,msm-dai-q6-dev";
432 qcom,msm-dai-q6-dev-id = <16384>;
433 };
434
435 qcom,msm-dai-q6-sb-0-tx {
436 compatible = "qcom,msm-dai-q6-dev";
437 qcom,msm-dai-q6-dev-id = <16385>;
438 };
439
440 qcom,msm-dai-q6-sb-1-rx {
441 compatible = "qcom,msm-dai-q6-dev";
442 qcom,msm-dai-q6-dev-id = <16386>;
443 };
444
445 qcom,msm-dai-q6-sb-1-tx {
446 compatible = "qcom,msm-dai-q6-dev";
447 qcom,msm-dai-q6-dev-id = <16387>;
448 };
449
450 qcom,msm-dai-q6-sb-3-rx {
451 compatible = "qcom,msm-dai-q6-dev";
452 qcom,msm-dai-q6-dev-id = <16390>;
453 };
454
455 qcom,msm-dai-q6-sb-3-tx {
456 compatible = "qcom,msm-dai-q6-dev";
457 qcom,msm-dai-q6-dev-id = <16391>;
458 };
459
460 qcom,msm-dai-q6-sb-4-rx {
461 compatible = "qcom,msm-dai-q6-dev";
462 qcom,msm-dai-q6-dev-id = <16392>;
463 };
464
465 qcom,msm-dai-q6-sb-4-tx {
466 compatible = "qcom,msm-dai-q6-dev";
467 qcom,msm-dai-q6-dev-id = <16393>;
468 };
469
470 qcom,msm-dai-q6-bt-sco-rx {
471 compatible = "qcom,msm-dai-q6-dev";
472 qcom,msm-dai-q6-dev-id = <12288>;
473 };
474
475 qcom,msm-dai-q6-bt-sco-tx {
476 compatible = "qcom,msm-dai-q6-dev";
477 qcom,msm-dai-q6-dev-id = <12289>;
478 };
479
480 qcom,msm-dai-q6-int-fm-rx {
481 compatible = "qcom,msm-dai-q6-dev";
482 qcom,msm-dai-q6-dev-id = <12292>;
483 };
484
485 qcom,msm-dai-q6-int-fm-tx {
486 compatible = "qcom,msm-dai-q6-dev";
487 qcom,msm-dai-q6-dev-id = <12293>;
488 };
489
490 qcom,msm-dai-q6-be-afe-pcm-rx {
491 compatible = "qcom,msm-dai-q6-dev";
492 qcom,msm-dai-q6-dev-id = <224>;
493 };
494
495 qcom,msm-dai-q6-be-afe-pcm-tx {
496 compatible = "qcom,msm-dai-q6-dev";
497 qcom,msm-dai-q6-dev-id = <225>;
498 };
499
500 qcom,msm-dai-q6-afe-proxy-rx {
501 compatible = "qcom,msm-dai-q6-dev";
502 qcom,msm-dai-q6-dev-id = <241>;
503 };
504
505 qcom,msm-dai-q6-afe-proxy-tx {
506 compatible = "qcom,msm-dai-q6-dev";
507 qcom,msm-dai-q6-dev-id = <240>;
508 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]509
510 qcom,msm-dai-q6-incall-record-rx {
511 compatible = "qcom,msm-dai-q6-dev";
512 qcom,msm-dai-q6-dev-id = <32771>;
513 };
514
515 qcom,msm-dai-q6-incall-record-tx {
516 compatible = "qcom,msm-dai-q6-dev";
517 qcom,msm-dai-q6-dev-id = <32772>;
518 };
519
520 qcom,msm-dai-q6-incall-music-rx {
521 compatible = "qcom,msm-dai-q6-dev";
522 qcom,msm-dai-q6-dev-id = <32773>;
523 };
Vicky Sehrawat5ac670f2013-05-17 16:32:13 -0700[diff] [blame]524
525 qcom,msm-dai-q6-incall-music-2-rx {
526 compatible = "qcom,msm-dai-q6-dev";
527 qcom,msm-dai-q6-dev-id = <32770>;
528 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]529 };
530
531 qcom,msm-pcm-hostless {
532 compatible = "qcom,msm-pcm-hostless";
533 };
534
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]535 qcom,msm-pri-auxpcm {
536 compatible = "qcom,msm-auxpcm-dev";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]537 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
538 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
539 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
540 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
541 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
542 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
543 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]544 qcom,msm-auxpcm-interface = "primary";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]545 };
546
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]547 qcom,wcnss-wlan@fb000000 {
548 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]549 reg = <0xfb000000 0x280000>,
550 <0xf9011008 0x04>;
551 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]552 interrupts = <0 145 0 0 146 0>;
553 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
554
555 qcom,pronto-vddmx-supply = <&pm8226_l3>;
556 qcom,pronto-vddcx-supply = <&pm8226_s1>;
557 qcom,pronto-vddpx-supply = <&pm8226_l6>;
558 qcom,iris-vddxo-supply = <&pm8226_l10>;
559 qcom,iris-vddrfa-supply = <&pm8226_l24>;
560 qcom,iris-vddpa-supply = <&pm8226_l16>;
561 qcom,iris-vdddig-supply = <&pm8226_l24>;
562
563 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700[diff] [blame]564 qcom,has-pronto-hw;
565 qcom,has-autodetect-xo;
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]566 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]567
568 qcom,msm-adsp-sensors {
569 compatible = "qcom,msm-adsp-sensors";
570 qcom,src-id = <11>;
571 qcom,dst-id = <604>;
572 qcom,ab = <32505856>;
573 qcom,ib = <32505856>;
574 };
575
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]576 qcom,wdt@f9017000 {
577 compatible = "qcom,msm-watchdog";
578 reg = <0xf9017000 0x1000>;
579 interrupts = <0 3 0>, <0 4 0>;
580 qcom,bark-time = <11000>;
581 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]582 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]583 };
584
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]585 qcom,smem@fa00000 {
586 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]587 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]588 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]589 <0xfc428000 0x4000>;
590 reg-names = "smem", "irq-reg-base", "aux-mem1";
591
592 qcom,smd-modem {
593 compatible = "qcom,smd";
594 qcom,smd-edge = <0>;
595 qcom,smd-irq-offset = <0x8>;
596 qcom,smd-irq-bitmask = <0x1000>;
597 qcom,pil-string = "modem";
598 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]599 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]600
601 qcom,smsm-modem {
602 compatible = "qcom,smsm";
603 qcom,smsm-edge = <0>;
604 qcom,smsm-irq-offset = <0x8>;
605 qcom,smsm-irq-bitmask = <0x2000>;
606 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]607 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]608
609 qcom,smd-adsp {
610 compatible = "qcom,smd";
611 qcom,smd-edge = <1>;
612 qcom,smd-irq-offset = <0x8>;
613 qcom,smd-irq-bitmask = <0x100>;
614 qcom,pil-string = "adsp";
615 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]616 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]617
618 qcom,smsm-adsp {
619 compatible = "qcom,smsm";
620 qcom,smsm-edge = <1>;
621 qcom,smsm-irq-offset = <0x8>;
622 qcom,smsm-irq-bitmask = <0x200>;
623 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]624 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]625
626 qcom,smd-wcnss {
627 compatible = "qcom,smd";
628 qcom,smd-edge = <6>;
629 qcom,smd-irq-offset = <0x8>;
630 qcom,smd-irq-bitmask = <0x20000>;
631 qcom,pil-string = "wcnss";
632 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]633 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]634
635 qcom,smsm-wcnss {
636 compatible = "qcom,smsm";
637 qcom,smsm-edge = <6>;
638 qcom,smsm-irq-offset = <0x8>;
639 qcom,smsm-irq-bitmask = <0x80000>;
640 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]641 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]642
643 qcom,smd-rpm {
644 compatible = "qcom,smd";
645 qcom,smd-edge = <15>;
646 qcom,smd-irq-offset = <0x8>;
647 qcom,smd-irq-bitmask = <0x1>;
648 interrupts = <0 168 1>;
649 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]650 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]651 };
652
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]653 rpm_bus: qcom,rpm-smd {
654 compatible = "qcom,rpm-smd";
655 rpm-channel-name = "rpm_requests";
656 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]657 };
658
Jennifer Liu86687d52013-05-29 15:51:40 -0700[diff] [blame]659 qcom,bcl {
660 compatible = "qcom,bcl";
661 };
662
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]663 sdcc1: qcom,sdcc@f9824000 {
664 cell-index = <1>; /* SDC1 eMMC slot */
665 compatible = "qcom,msm-sdcc";
666
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]667 reg = <0xf9824000 0x800>,
668 <0xf9824800 0x100>,
669 <0xf9804000 0x7000>;
670 reg-names = "core_mem", "dml_mem", "bam_mem";
671 interrupts = <0 123 0>, <0 137 0>;
672 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]673
674 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]675
676 qcom,msm-bus,name = "sdcc1";
677 qcom,msm-bus,num-cases = <8>;
678 qcom,msm-bus,num-paths = <1>;
679 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
680 <78 512 1600 3200>, /* 400 KB/s*/
681 <78 512 80000 160000>, /* 20 MB/s */
682 <78 512 100000 200000>, /* 25 MB/s */
683 <78 512 200000 400000>, /* 50 MB/s */
684 <78 512 400000 800000>, /* 100 MB/s */
685 <78 512 400000 800000>, /* 200 MB/s */
686 <78 512 2048000 4096000>; /* Max. bandwidth */
687 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
688 100000000 200000000 4294967295>;
689
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]690 status = "disabled";
691 };
692
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]693 sdhc_1: sdhci@f9824900 {
694 compatible = "qcom,sdhci-msm";
695 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
696 reg-names = "hc_mem", "core_mem";
697
698 interrupts = <0 123 0>, <0 138 0>;
699 interrupt-names = "hc_irq", "pwr_irq";
700
701 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]702
703 qcom,msm-bus,name = "sdhc1";
704 qcom,msm-bus,num-cases = <8>;
705 qcom,msm-bus,num-paths = <1>;
706 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
707 <78 512 1600 3200>, /* 400 KB/s*/
708 <78 512 80000 160000>, /* 20 MB/s */
709 <78 512 100000 200000>, /* 25 MB/s */
710 <78 512 200000 400000>, /* 50 MB/s */
711 <78 512 400000 800000>, /* 100 MB/s */
712 <78 512 400000 800000>, /* 200 MB/s */
713 <78 512 2048000 4096000>; /* Max. bandwidth */
714 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
715 100000000 200000000 4294967295>;
716
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]717 status = "disabled";
718 };
719
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]720 sdcc2: qcom,sdcc@f98a4000 {
721 cell-index = <2>; /* SDC2 SD card slot */
722 compatible = "qcom,msm-sdcc";
723
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]724 reg = <0xf98a4000 0x800>,
725 <0xf98a4800 0x100>,
726 <0xf9884000 0x7000>;
727 reg-names = "core_mem", "dml_mem", "bam_mem";
728 interrupts = <0 125 0>, <0 220 0>;
729 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]730
731 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]732
733 qcom,msm-bus,name = "sdcc2";
734 qcom,msm-bus,num-cases = <8>;
735 qcom,msm-bus,num-paths = <1>;
736 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
737 <81 512 1600 3200>, /* 400 KB/s*/
738 <81 512 80000 160000>, /* 20 MB/s */
739 <81 512 100000 200000>, /* 25 MB/s */
740 <81 512 200000 400000>, /* 50 MB/s */
741 <81 512 400000 800000>, /* 100 MB/s */
742 <81 512 400000 800000>, /* 200 MB/s */
743 <81 512 2048000 4096000>; /* Max. bandwidth */
744 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
745 100000000 200000000 4294967295>;
746
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]747 status = "disabled";
748 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]749
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]750 sdhc_2: sdhci@f98a4900 {
751 compatible = "qcom,sdhci-msm";
752 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
753 reg-names = "hc_mem", "core_mem";
754
755 interrupts = <0 125 0>, <0 221 0>;
756 interrupt-names = "hc_irq", "pwr_irq";
757
758 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]759
760 qcom,msm-bus,name = "sdhc2";
761 qcom,msm-bus,num-cases = <8>;
762 qcom,msm-bus,num-paths = <1>;
763 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
764 <81 512 1600 3200>, /* 400 KB/s*/
765 <81 512 80000 160000>, /* 20 MB/s */
766 <81 512 100000 200000>, /* 25 MB/s */
767 <81 512 200000 400000>, /* 50 MB/s */
768 <81 512 400000 800000>, /* 100 MB/s */
769 <81 512 400000 800000>, /* 200 MB/s */
770 <81 512 2048000 4096000>; /* Max. bandwidth */
771 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
772 100000000 200000000 4294967295>;
773
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]774 status = "disabled";
775 };
776
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]777 sdcc3: qcom,sdcc@f9864000 {
778 cell-index = <3>;
779 compatible = "qcom,msm-sdcc";
780 reg = <0xf9864000 0x800>,
781 <0xf9864800 0x100>,
782 <0xf9844000 0x7000>;
783 reg-names = "core_mem", "dml_mem", "bam_mem";
784
785 qcom,bus-width = <4>;
786 gpios = <&msmgpio 44 0>, /* CLK */
787 <&msmgpio 43 0>, /* CMD */
788 <&msmgpio 42 0>, /* DATA0 */
789 <&msmgpio 41 0>, /* DATA1 */
790 <&msmgpio 40 0>, /* DATA2 */
791 <&msmgpio 39 0>; /* DATA3 */
792 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
793
794 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
795
796 qcom,msm-bus,name = "sdcc3";
797 qcom,msm-bus,num-cases = <8>;
798 qcom,msm-bus,num-paths = <1>;
799 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
800 <79 512 1600 3200>, /* 400 KB/s*/
801 <79 512 80000 160000>, /* 20 MB/s */
802 <79 512 100000 200000>, /* 25 MB/s */
803 <79 512 200000 400000>, /* 50 MB/s */
804 <79 512 400000 800000>, /* 100 MB/s */
805 <79 512 400000 800000>, /* 200 MB/s */
806 <79 512 2048000 4096000>; /* Max. bandwidth */
807 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
808 100000000 200000000 4294967295>;
809
810 #address-cells = <0>;
811 interrupt-parent = <&sdcc3>;
812 interrupts = <0 1 2>;
813 #interrupt-cells = <1>;
814 interrupt-map-mask = <0xffffffff>;
815 interrupt-map = <0 &intc 0 127 0
816 1 &intc 0 223 0
817 2 &msmgpio 41 0x8>;
818 interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq";
819
820 status = "disabled";
821 };
822
823 sdhc_3: sdhci@f9864900 {
824 compatible = "qcom,sdhci-msm";
825 reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
826 reg-names = "hc_mem", "core_mem";
827
828 qcom,bus-width = <4>;
829 gpios = <&msmgpio 44 0>, /* CLK */
830 <&msmgpio 43 0>, /* CMD */
831 <&msmgpio 42 0>, /* DATA0 */
832 <&msmgpio 41 0>, /* DATA1 */
833 <&msmgpio 40 0>, /* DATA2 */
834 <&msmgpio 39 0>; /* DATA3 */
835 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
836
837 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
838
839 qcom,msm-bus,name = "sdhc3";
840 qcom,msm-bus,num-cases = <8>;
841 qcom,msm-bus,num-paths = <1>;
842 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
843 <79 512 1600 3200>, /* 400 KB/s*/
844 <79 512 80000 160000>, /* 20 MB/s */
845 <79 512 100000 200000>, /* 25 MB/s */
846 <79 512 200000 400000>, /* 50 MB/s */
847 <79 512 400000 800000>, /* 100 MB/s */
848 <79 512 400000 800000>, /* 200 MB/s */
849 <79 512 2048000 4096000>; /* Max. bandwidth */
850 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
851 100000000 200000000 4294967295>;
852
853 #address-cells = <0>;
854 interrupt-parent = <&sdhc_3>;
855 interrupts = <0 1 2>;
856 #interrupt-cells = <1>;
857 interrupt-map-mask = <0xffffffff>;
858 interrupt-map = <0 &intc 0 127 0
859 1 &intc 0 224 0
860 2 &msmgpio 41 0x8>;
861 interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";
862
863 status = "disabled";
864 };
865
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]866 spmi_bus: qcom,spmi@fc4c0000 {
867 cell-index = <0>;
868 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]869 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]870 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]871 <0Xfc4cb000 0x1000>,
872 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]873 /* 190,ee0_krait_hlos_spmi_periph_irq */
874 /* 187,channel_0_krait_hlos_trans_done_irq */
875 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]876 qcom,pmic-arb-ee = <0>;
877 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]878 };
879
Madan Mohan Koyyalamudi2d7c6f52013-06-19 17:49:45 -0700[diff] [blame]880 i2c@f9925000 { /* BLSP-1 QUP-3 */
881 cell-index = <2>;
882 compatible = "qcom,i2c-qup";
883 reg = <0xf9925000 0x1000>;
884 #address-cells = <1>;
885 #size-cells = <0>;
886 reg-names = "qup_phys_addr";
887 interrupts = <0 97 0>;
888 interrupt-names = "qup_err_intr";
889 qcom,i2c-bus-freq = <400000>;
890 qcom,i2c-src-freq = <19200000>;
891 };
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]892 i2c@f9926000 { /* BLSP-1 QUP-4 */
893 cell-index = <0>;
894 compatible = "qcom,i2c-qup";
895 reg = <0xf9926000 0x1000>;
896 #address-cells = <1>;
897 #size-cells = <0>;
898 reg-names = "qup_phys_addr";
899 interrupts = <0 98 0>;
900 interrupt-names = "qup_err_intr";
901 qcom,i2c-bus-freq = <100000>;
902 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]903
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]904 i2c@f9927000 { /* BLSP1 QUP5 */
905 cell-index = <5>;
906 compatible = "qcom,i2c-qup";
907 #address-cells = <1>;
908 #size-cells = <0>;
909 reg-names = "qup_phys_addr";
910 reg = <0xf9927000 0x1000>;
911 interrupt-names = "qup_err_intr";
912 interrupts = <0 99 0>;
Amy Maloche118e5d62013-05-01 14:53:35 -0700[diff] [blame]913 qcom,i2c-bus-freq = <384000>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]914 qcom,i2c-src-freq = <19200000>;
915 };
916
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]917 qcom,acpuclk@f9011050 {
918 compatible = "qcom,acpuclk-a7";
Patrick Daly4fd80f42013-06-18 11:09:15 -0700[diff] [blame]919 reg = <0xf9011050 0x8>;
920 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]921 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]922 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]923
924 qcom,ocmem@fdd00000 {
925 compatible = "qcom,msm-ocmem";
926 reg = <0xfdd00000 0x2000>,
927 <0xfdd02000 0x2000>,
928 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]929 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]930 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
931 interrupts = <0 76 0 0 77 0>;
932 interrupt-names = "ocmem_irq", "dm_irq";
933 qcom,ocmem-num-regions = <0x1>;
934 qcom,ocmem-num-macros = <0x2>;
935 qcom,resource-type = <0x706d636f>;
936 #address-cells = <1>;
937 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]938 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]939
940 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]941 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]942 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]943 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]944 };
945 };
946
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]947 qcom,venus@fdce0000 {
948 compatible = "qcom,pil-venus";
949 reg = <0xfdce0000 0x4000>,
950 <0xfdc80000 0x400>;
951 reg-names = "wrapper_base", "vbif_base";
952 vdd-supply = <&gdsc_venus>;
953
954 qcom,firmware-name = "venus";
955 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]956
957 qcom,pronto@fb21b000 {
958 compatible = "qcom,pil-pronto";
959 reg = <0xfb21b000 0x3000>,
960 <0xfc401700 0x4>,
961 <0xfd485300 0xc>;
962 reg-names = "pmu_base", "clk_base", "halt_base";
963 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]964 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]965
966 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]967
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]968 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]969 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700[diff] [blame]970 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]971 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]972
973 /* GPIO output to wcnss */
974 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]975 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]976
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]977 qcom,iris-fm {
978 compatible = "qcom,iris_fm";
979 };
980
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]981 qcom,lpass@fe200000 {
982 compatible = "qcom,pil-q6v5-lpass";
983 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]984 <0xfd485100 0x00010>,
985 <0xfc4016c0 0x00004>;
986 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]987 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]988 interrupts = <0 162 1>;
989
990 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]991
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]992 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]993 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]994 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700[diff] [blame]995 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]996
997 /* GPIO output to lpass */
998 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]999 };
1000
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1001 qcom,mss@fc880000 {
1002 compatible = "qcom,pil-q6v5-mss";
1003 reg = <0xfc880000 0x100>,
1004 <0xfd485000 0x400>,
1005 <0xfc820000 0x020>,
1006 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1007 <0xfd485194 0x4>;
1008 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]1009 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1010
1011 interrupts = <0 24 1>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1012 vdd_cx-supply = <&pm8226_s1_corner>;
1013 vdd_mx-supply = <&pm8226_l3>;
1014 vdd_pll-supply = <&pm8226_l8>;
1015 qcom,vdd_pll = <1800000>;
1016
1017 qcom,is-loadable;
1018 qcom,firmware-name = "mba";
1019 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1020
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1021 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1022 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800[diff] [blame]1023 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1024 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700[diff] [blame]1025 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1026
1027 /* GPIO output to mss */
1028 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1029 };
1030
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1031 qcom,msm-mem-hole {
1032 compatible = "qcom,msm-mem-hole";
Neeti Desai183b33d2013-08-09 14:58:38 -0700[diff] [blame^]1033 qcom,memblock-remove = <0x08400000 0x4000000
1034 0x0d200000 0x2300000
1035 0x0fa00000 0x500000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1036 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1037
1038 tsens: tsens@fc4a8000 {
1039 compatible = "qcom,msm-tsens";
1040 reg = <0xfc4a8000 0x2000>,
Siddartha Mohanadoss6ddc1922013-07-08 17:40:11 -0700[diff] [blame]1041 <0xfc4bc000 0x1000>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1042 reg-names = "tsens_physical", "tsens_eeprom_physical";
1043 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]1044 qcom,sensors = <4>;
1045 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1046 qcom,calib-mode = "fuse_map2";
1047 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1048
1049 qcom,msm-thermal {
1050 compatible = "qcom,msm-thermal";
1051 qcom,sensor-id = <0>;
1052 qcom,poll-ms = <250>;
1053 qcom,limit-temp = <60>;
1054 qcom,temp-hysteresis = <10>;
1055 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600[diff] [blame]1056 qcom,freq-control-mask = <0xf>;
Jennifer Liu003438d2013-06-21 11:24:20 -0700[diff] [blame]1057 qcom,core-limit-temp = <80>;
1058 qcom,core-temp-hysteresis = <10>;
1059 qcom,core-control-mask = <0xe>;
Jennifer Liu53bb5642013-06-26 10:42:42 -0700[diff] [blame]1060 qcom,vdd-restriction-temp = <5>;
1061 qcom,vdd-restriction-temp-hysteresis = <10>;
1062 vdd-dig-supply = <&pm8226_s1_floor_corner>;
1063
1064 qcom,vdd-dig-rstr{
1065 qcom,vdd-rstr-reg = "vdd-dig";
1066 qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
1067 qcom,min-level = <1>; /* No Request */
1068 };
1069
1070 qcom,vdd-apps-rstr{
1071 qcom,vdd-rstr-reg = "vdd-apps";
1072 qcom,levels = <600000 787200 998400>;
1073 qcom,freq-req;
1074 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1075 };
1076
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1077 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
1078 compatible = "qcom,spi-qup-v2";
1079 #address-cells = <1>;
1080 #size-cells = <0>;
1081 reg-names = "spi_physical", "spi_bam_physical";
1082 reg = <0xf9923000 0x1000>,
1083 <0xf9904000 0xF000>;
1084 interrupt-names = "spi_irq", "spi_bam_irq";
1085 interrupts = <0 95 0>, <0 238 0>;
1086 spi-max-frequency = <19200000>;
1087
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600[diff] [blame]1088 qcom,gpio-mosi = <&msmgpio 0 0>;
1089 qcom,gpio-miso = <&msmgpio 1 0>;
1090 qcom,gpio-clk = <&msmgpio 3 0>;
1091 qcom,gpio-cs0 = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1092
1093 qcom,infinite-mode = <0>;
1094 qcom,use-bam;
1095 qcom,ver-reg-exists;
1096 qcom,bam-consumer-pipe-index = <12>;
1097 qcom,bam-producer-pipe-index = <13>;
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600[diff] [blame]1098 qcom,master-id = <86>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1099 };
1100
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]1101 qcom,bam_dmux@fc834000 {
1102 compatible = "qcom,bam_dmux";
1103 reg = <0xfc834000 0x7000>;
1104 interrupts = <0 29 1>;
1105 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]1106
1107 qcom,msm-rtb {
1108 compatible = "qcom,msm-rtb";
1109 qcom,memory-reservation-type = "EBI1";
1110 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
1111 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1112
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1113 qcom,msm-rng@f9bff000 {
1114 compatible = "qcom,msm-rng";
1115 reg = <0xf9bff000 0x200>;
1116 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700[diff] [blame]1117 qcom,msm-bus,name = "msm-rng-noc";
1118 qcom,msm-bus,num-cases = <2>;
1119 qcom,msm-bus,num-paths = <1>;
1120 qcom,msm-bus,vectors-KBps =
1121 <1 618 0 0>,
1122 <1 618 0 800>;
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1123 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1124
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1125 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1126 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1127 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1128 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1129
Pratik Patelf2945ef2013-06-13 23:52:05 -0700[diff] [blame]1130 jtag_fuse: jtagfuse@fc4be024 {
1131 compatible = "qcom,jtag-fuse";
1132 reg = <0xfc4be024 0x8>;
1133 reg-names = "fuse-base";
1134 };
1135
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1136 jtag_mm0: jtagmm@fc33c000 {
1137 compatible = "qcom,jtag-mm";
1138 reg = <0xfc33c000 0x1000>,
1139 <0xfc330000 0x1000>;
1140 reg-names = "etm-base","debug-base";
1141 };
1142
1143 jtag_mm1: jtagmm@fc33d000 {
1144 compatible = "qcom,jtag-mm";
1145 reg = <0xfc33d000 0x1000>,
1146 <0xfc332000 0x1000>;
1147 reg-names = "etm-base","debug-base";
1148 };
1149
1150 jtag_mm2: jtagmm@fc33e000 {
1151 compatible = "qcom,jtag-mm";
1152 reg = <0xfc33e000 0x1000>,
1153 <0xfc334000 0x1000>;
1154 reg-names = "etm-base","debug-base";
1155 };
1156
1157 jtag_mm3: jtagmm@fc33f000 {
1158 compatible = "qcom,jtag-mm";
1159 reg = <0xfc33f000 0x1000>,
1160 <0xfc336000 0x1000>;
1161 reg-names = "etm-base","debug-base";
1162 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]1163
1164 qcom,ipc-spinlock@fd484000 {
1165 compatible = "qcom,ipc-spinlock-sfpb";
1166 reg = <0xfd484000 0x400>;
1167 qcom,num-locks = <8>;
1168 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]1169
1170 qcom,qseecom@d980000 {
1171 compatible = "qcom,qseecom";
1172 reg = <0xd980000 0x256000>;
1173 reg-names = "secapp-region";
1174 qcom,disk-encrypt-pipe-pair = <2>;
1175 qcom,hlos-ce-hw-instance = <0>;
1176 qcom,qsee-ce-hw-instance = <0>;
1177 qcom,msm-bus,name = "qseecom-noc";
1178 qcom,msm-bus,num-cases = <4>;
1179 qcom,msm-bus,active-only = <0>;
1180 qcom,msm-bus,num-paths = <1>;
1181 qcom,msm-bus,vectors-KBps =
1182 <55 512 0 0>,
1183 <55 512 3936000 393600>,
1184 <55 512 3936000 393600>,
1185 <55 512 3936000 393600>;
1186 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1187
1188 qcom,qcrypto@fd404000 {
1189 compatible = "qcom,qcrypto";
1190 reg = <0xfd400000 0x20000>,
1191 <0xfd404000 0x8000>;
1192 reg-names = "crypto-base","crypto-bam-base";
1193 interrupts = <0 207 0>;
1194 qcom,bam-pipe-pair = <2>;
1195 qcom,ce-hw-instance = <0>;
1196 qcom,ce-hw-shared;
1197 qcom,msm-bus,name = "qcrypto-noc";
1198 qcom,msm-bus,num-cases = <2>;
1199 qcom,msm-bus,active-only = <0>;
1200 qcom,msm-bus,num-paths = <1>;
1201 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1202 <55 512 0 0>,
1203 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1204 };
1205
1206 qcom,qcedev@fd400000 {
1207 compatible = "qcom,qcedev";
1208 reg = <0xfd400000 0x20000>,
1209 <0xfd404000 0x8000>;
1210 reg-names = "crypto-base","crypto-bam-base";
1211 interrupts = <0 207 0>;
1212 qcom,bam-pipe-pair = <1>;
1213 qcom,ce-hw-instance = <0>;
1214 qcom,ce-hw-shared;
1215 qcom,msm-bus,name = "qcedev-noc";
1216 qcom,msm-bus,num-cases = <2>;
1217 qcom,msm-bus,active-only = <0>;
1218 qcom,msm-bus,num-paths = <1>;
1219 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1220 <55 512 0 0>,
1221 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1222 };
Neil Leeder45fb9f62013-06-04 10:46:41 -0400[diff] [blame]1223
1224 cpu-pmu {
1225 compatible = "arm,cortex-a7-pmu";
1226 qcom,irq-is-percpu;
1227 interrupts = <1 7 0xf00>;
1228 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]1229};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]1230
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1231&gdsc_venus {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1232 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1233 status = "ok";
1234};
1235
1236&gdsc_mdss {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1237 qcom,clock-names = "core_clk", "lut_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1238 status = "ok";
1239};
1240
1241&gdsc_jpeg {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1242 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1243 status = "ok";
1244};
1245
1246&gdsc_vfe {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1247 qcom,clock-names = "core_clk", "csi_clk", "cpp_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1248 status = "ok";
1249};
1250
1251&gdsc_oxili_cx {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1252 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1253 status = "ok";
1254};
1255
1256&gdsc_usb_hsic {
1257 status = "ok";
1258};
1259
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]1260/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]1261/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]1262/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1263
1264&pm8226_vadc {
1265 chan@0 {
1266 label = "usb_in";
1267 reg = <0>;
1268 qcom,decimation = <0>;
1269 qcom,pre-div-channel-scaling = <4>;
1270 qcom,calibration-type = "absolute";
1271 qcom,scale-function = <0>;
1272 qcom,hw-settle-time = <0>;
1273 qcom,fast-avg-setup = <0>;
1274 };
1275
1276 chan@2 {
1277 label = "vchg_sns";
1278 reg = <2>;
1279 qcom,decimation = <0>;
1280 qcom,pre-div-channel-scaling = <3>;
1281 qcom,calibration-type = "absolute";
1282 qcom,scale-function = <0>;
1283 qcom,hw-settle-time = <0>;
1284 qcom,fast-avg-setup = <0>;
1285 };
1286
1287 chan@5 {
1288 label = "vcoin";
1289 reg = <5>;
1290 qcom,decimation = <0>;
1291 qcom,pre-div-channel-scaling = <1>;
1292 qcom,calibration-type = "absolute";
1293 qcom,scale-function = <0>;
1294 qcom,hw-settle-time = <0>;
1295 qcom,fast-avg-setup = <0>;
1296 };
1297
1298 chan@6 {
1299 label = "vbat_sns";
1300 reg = <6>;
1301 qcom,decimation = <0>;
1302 qcom,pre-div-channel-scaling = <1>;
1303 qcom,calibration-type = "absolute";
1304 qcom,scale-function = <0>;
1305 qcom,hw-settle-time = <0>;
1306 qcom,fast-avg-setup = <0>;
1307 };
1308
1309 chan@7 {
1310 label = "vph_pwr";
1311 reg = <7>;
1312 qcom,decimation = <0>;
1313 qcom,pre-div-channel-scaling = <1>;
1314 qcom,calibration-type = "absolute";
1315 qcom,scale-function = <0>;
1316 qcom,hw-settle-time = <0>;
1317 qcom,fast-avg-setup = <0>;
1318 };
1319
1320 chan@30 {
1321 label = "batt_therm";
1322 reg = <0x30>;
1323 qcom,decimation = <0>;
1324 qcom,pre-div-channel-scaling = <0>;
1325 qcom,calibration-type = "ratiometric";
1326 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1327 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1328 qcom,fast-avg-setup = <0>;
1329 };
1330
1331 chan@31 {
1332 label = "batt_id";
1333 reg = <0x31>;
1334 qcom,decimation = <0>;
1335 qcom,pre-div-channel-scaling = <0>;
1336 qcom,calibration-type = "ratiometric";
1337 qcom,scale-function = <0>;
1338 qcom,hw-settle-time = <2>;
1339 qcom,fast-avg-setup = <0>;
1340 };
1341
1342 chan@b2 {
1343 label = "xo_therm_pu2";
1344 reg = <0xb2>;
1345 qcom,decimation = <0>;
1346 qcom,pre-div-channel-scaling = <0>;
1347 qcom,calibration-type = "ratiometric";
1348 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1349 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1350 qcom,fast-avg-setup = <0>;
1351 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1352
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1353 chan@39 {
1354 label = "usb_id_nopull";
1355 reg = <0x39>;
1356 qcom,decimation = <0>;
1357 qcom,pre-div-channel-scaling = <0>;
1358 qcom,calibration-type = "ratiometric";
1359 qcom,scale-function = <0>;
1360 qcom,hw-settle-time = <2>;
1361 qcom,fast-avg-setup = <0>;
1362 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1363};
1364
Siddartha Mohanadoss8aea3172013-05-09 11:49:37 -0700[diff] [blame]1365&pm8226_adc_tm {
1366 /* Channel Node */
1367 chan@30 {
1368 label = "batt_therm";
1369 reg = <0x30>;
1370 qcom,decimation = <0>;
1371 qcom,pre-div-channel-scaling = <0>;
1372 qcom,calibration-type = "ratiometric";
1373 qcom,scale-function = <1>;
1374 qcom,hw-settle-time = <2>;
1375 qcom,fast-avg-setup = <3>;
1376 qcom,btm-channel-number = <0x48>;
1377 };
1378
1379 chan@8 {
1380 label = "die_temp";
1381 reg = <8>;
1382 qcom,decimation = <0>;
1383 qcom,pre-div-channel-scaling = <0>;
1384 qcom,calibration-type = "absolute";
1385 qcom,scale-function = <3>;
1386 qcom,hw-settle-time = <0>;
1387 qcom,fast-avg-setup = <3>;
1388 qcom,btm-channel-number = <0x68>;
1389 };
1390
1391 chan@6 {
1392 label = "vbat_sns";
1393 reg = <6>;
1394 qcom,decimation = <0>;
1395 qcom,pre-div-channel-scaling = <1>;
1396 qcom,calibration-type = "absolute";
1397 qcom,scale-function = <0>;
1398 qcom,hw-settle-time = <0>;
1399 qcom,fast-avg-setup = <3>;
1400 qcom,btm-channel-number = <0x70>;
1401 };
1402
1403 chan@14 {
1404 label = "pa_therm0";
1405 reg = <0x14>;
1406 qcom,decimation = <0>;
1407 qcom,pre-div-channel-scaling = <0>;
1408 qcom,calibration-type = "ratiometric";
1409 qcom,scale-function = <2>;
1410 qcom,hw-settle-time = <2>;
1411 qcom,fast-avg-setup = <0>;
1412 qcom,btm-channel-number = <0x78>;
1413 qcom,thermal-node;
1414 };
1415
1416 chan@17 {
1417 label = "pa_therm1";
1418 reg = <0x17>;
1419 qcom,decimation = <0>;
1420 qcom,pre-div-channel-scaling = <0>;
1421 qcom,calibration-type = "ratiometric";
1422 qcom,scale-function = <2>;
1423 qcom,hw-settle-time = <2>;
1424 qcom,fast-avg-setup = <0>;
1425 qcom,btm-channel-number = <0x80>;
1426 qcom,thermal-node;
1427 };
1428};
1429
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1430&pm8226_chg {
1431 status = "ok";
1432
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1433 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1434 status = "ok";
1435 };
1436
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1437 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1438 status = "ok";
1439 };
1440
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1441 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1442 status = "ok";
1443 };
1444
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1445 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1446 status = "ok";
1447 };
1448
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1449 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1450 status = "ok";
1451 };
1452
1453 qcom,chg-misc@1600 {
1454 status = "ok";
1455 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1456};