Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand.c |
| 3 | * |
| 4 | * Overview: |
| 5 | * This is the generic MTD driver for NAND flash devices. It should be |
| 6 | * capable of working with almost all NAND chips currently available. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 7 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | * Additional technical information is available on |
maximilian attems | 8b2b403 | 2007-07-28 13:07:16 +0200 | [diff] [blame] | 9 | * http://www.linux-mtd.infradead.org/doc/nand.html |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 10 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 12 | * 2002-2006 Thomas Gleixner (tglx@linutronix.de) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 14 | * Credits: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 15 | * David Woodhouse for adding multichip support |
| 16 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
| 18 | * rework for 2K page size chips |
| 19 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 20 | * TODO: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | * Enable cached programming for 2k page size chips |
| 22 | * Check, if mtd->ecctype should be set to MTD_ECC_HW |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 23 | * if we have HW ECC support. |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 24 | * BBT table is not serialized, has to be fixed |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | * This program is free software; you can redistribute it and/or modify |
| 27 | * it under the terms of the GNU General Public License version 2 as |
| 28 | * published by the Free Software Foundation. |
| 29 | * |
| 30 | */ |
| 31 | |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 32 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <linux/delay.h> |
| 34 | #include <linux/errno.h> |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 35 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include <linux/sched.h> |
| 37 | #include <linux/slab.h> |
| 38 | #include <linux/types.h> |
| 39 | #include <linux/mtd/mtd.h> |
| 40 | #include <linux/mtd/nand.h> |
| 41 | #include <linux/mtd/nand_ecc.h> |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 42 | #include <linux/mtd/nand_bch.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | #include <linux/interrupt.h> |
| 44 | #include <linux/bitops.h> |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 45 | #include <linux/leds.h> |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 46 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <linux/mtd/partitions.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | |
| 49 | /* Define default oob placement schemes for large and small page devices */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 50 | static struct nand_ecclayout nand_oob_8 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | .eccbytes = 3, |
| 52 | .eccpos = {0, 1, 2}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 53 | .oobfree = { |
| 54 | {.offset = 3, |
| 55 | .length = 2}, |
| 56 | {.offset = 6, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 57 | .length = 2} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 58 | }; |
| 59 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 60 | static struct nand_ecclayout nand_oob_16 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | .eccbytes = 6, |
| 62 | .eccpos = {0, 1, 2, 3, 6, 7}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 63 | .oobfree = { |
| 64 | {.offset = 8, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 65 | . length = 8} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | }; |
| 67 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 68 | static struct nand_ecclayout nand_oob_64 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | .eccbytes = 24, |
| 70 | .eccpos = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 71 | 40, 41, 42, 43, 44, 45, 46, 47, |
| 72 | 48, 49, 50, 51, 52, 53, 54, 55, |
| 73 | 56, 57, 58, 59, 60, 61, 62, 63}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 74 | .oobfree = { |
| 75 | {.offset = 2, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 76 | .length = 38} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | }; |
| 78 | |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 79 | static struct nand_ecclayout nand_oob_128 = { |
| 80 | .eccbytes = 48, |
| 81 | .eccpos = { |
| 82 | 80, 81, 82, 83, 84, 85, 86, 87, |
| 83 | 88, 89, 90, 91, 92, 93, 94, 95, |
| 84 | 96, 97, 98, 99, 100, 101, 102, 103, |
| 85 | 104, 105, 106, 107, 108, 109, 110, 111, |
| 86 | 112, 113, 114, 115, 116, 117, 118, 119, |
| 87 | 120, 121, 122, 123, 124, 125, 126, 127}, |
| 88 | .oobfree = { |
| 89 | {.offset = 2, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 90 | .length = 78} } |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 91 | }; |
| 92 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 93 | static int nand_get_device(struct mtd_info *mtd, int new_state); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 95 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 96 | struct mtd_oob_ops *ops); |
| 97 | |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 98 | /* |
Joe Perches | 8e87d78 | 2008-02-03 17:22:34 +0200 | [diff] [blame] | 99 | * For devices which display every fart in the system on a separate LED. Is |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 100 | * compiled away when LED support is disabled. |
| 101 | */ |
| 102 | DEFINE_LED_TRIGGER(nand_led_trigger); |
| 103 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 104 | static int check_offs_len(struct mtd_info *mtd, |
| 105 | loff_t ofs, uint64_t len) |
| 106 | { |
| 107 | struct nand_chip *chip = mtd->priv; |
| 108 | int ret = 0; |
| 109 | |
| 110 | /* Start address must align on block boundary */ |
| 111 | if (ofs & ((1 << chip->phys_erase_shift) - 1)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 112 | pr_debug("%s: unaligned address\n", __func__); |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 113 | ret = -EINVAL; |
| 114 | } |
| 115 | |
| 116 | /* Length must align on block boundary */ |
| 117 | if (len & ((1 << chip->phys_erase_shift) - 1)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 118 | pr_debug("%s: length not block aligned\n", __func__); |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 119 | ret = -EINVAL; |
| 120 | } |
| 121 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 122 | return ret; |
| 123 | } |
| 124 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | /** |
| 126 | * nand_release_device - [GENERIC] release chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 127 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 128 | * |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 129 | * Release chip lock and wake up anyone waiting on the device. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 131 | static void nand_release_device(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 133 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 135 | /* Release the controller and the chip */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 136 | spin_lock(&chip->controller->lock); |
| 137 | chip->controller->active = NULL; |
| 138 | chip->state = FL_READY; |
| 139 | wake_up(&chip->controller->wq); |
| 140 | spin_unlock(&chip->controller->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | } |
| 142 | |
| 143 | /** |
| 144 | * nand_read_byte - [DEFAULT] read one byte from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 145 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 147 | * Default read function for 8bit buswidth |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 149 | static uint8_t nand_read_byte(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 151 | struct nand_chip *chip = mtd->priv; |
| 152 | return readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | /** |
Masanari Iida | 064a769 | 2012-11-09 23:20:58 +0900 | [diff] [blame] | 156 | * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 157 | * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 158 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 160 | * Default read function for 16bit buswidth with endianness conversion. |
| 161 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 163 | static uint8_t nand_read_byte16(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 165 | struct nand_chip *chip = mtd->priv; |
| 166 | return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | } |
| 168 | |
| 169 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | * nand_read_word - [DEFAULT] read one word from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 171 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 173 | * Default read function for 16bit buswidth without endianness conversion. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | */ |
| 175 | static u16 nand_read_word(struct mtd_info *mtd) |
| 176 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 177 | struct nand_chip *chip = mtd->priv; |
| 178 | return readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | } |
| 180 | |
| 181 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | * nand_select_chip - [DEFAULT] control CE line |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 183 | * @mtd: MTD device structure |
| 184 | * @chipnr: chipnumber to select, -1 for deselect |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | * |
| 186 | * Default select function for 1 chip devices. |
| 187 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 188 | static void nand_select_chip(struct mtd_info *mtd, int chipnr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 190 | struct nand_chip *chip = mtd->priv; |
| 191 | |
| 192 | switch (chipnr) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | case -1: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 194 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | break; |
| 196 | case 0: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | break; |
| 198 | |
| 199 | default: |
| 200 | BUG(); |
| 201 | } |
| 202 | } |
| 203 | |
| 204 | /** |
| 205 | * nand_write_buf - [DEFAULT] write buffer to chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 206 | * @mtd: MTD device structure |
| 207 | * @buf: data buffer |
| 208 | * @len: number of bytes to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 210 | * Default write function for 8bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 212 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 213 | { |
| 214 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 215 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 216 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 217 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 218 | writeb(buf[i], chip->IO_ADDR_W); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 219 | } |
| 220 | |
| 221 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 222 | * nand_read_buf - [DEFAULT] read chip data into buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 223 | * @mtd: MTD device structure |
| 224 | * @buf: buffer to store date |
| 225 | * @len: number of bytes to read |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 227 | * Default read function for 8bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 228 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 229 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | { |
| 231 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 232 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 234 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 235 | buf[i] = readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 239 | * nand_write_buf16 - [DEFAULT] write buffer to chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 240 | * @mtd: MTD device structure |
| 241 | * @buf: data buffer |
| 242 | * @len: number of bytes to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 244 | * Default write function for 16bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 245 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 246 | static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 247 | { |
| 248 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 249 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | u16 *p = (u16 *) buf; |
| 251 | len >>= 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 252 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 253 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 254 | writew(p[i], chip->IO_ADDR_W); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 255 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | } |
| 257 | |
| 258 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 259 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 260 | * @mtd: MTD device structure |
| 261 | * @buf: buffer to store date |
| 262 | * @len: number of bytes to read |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 264 | * Default read function for 16bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 266 | static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | { |
| 268 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 269 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | u16 *p = (u16 *) buf; |
| 271 | len >>= 1; |
| 272 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 273 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 274 | p[i] = readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | } |
| 276 | |
| 277 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 279 | * @mtd: MTD device structure |
| 280 | * @ofs: offset from device start |
| 281 | * @getchip: 0, if the chip is already selected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 283 | * Check, if the block is bad. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | */ |
| 285 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) |
| 286 | { |
Brian Norris | cdbec05 | 2012-01-13 18:11:48 -0800 | [diff] [blame] | 287 | int page, chipnr, res = 0, i = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 288 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | u16 bad; |
| 290 | |
Brian Norris | 5fb1549 | 2011-05-31 16:31:21 -0700 | [diff] [blame] | 291 | if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) |
Kevin Cernekee | b60b08b | 2010-05-04 20:58:10 -0700 | [diff] [blame] | 292 | ofs += mtd->erasesize - mtd->writesize; |
| 293 | |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 294 | page = (int)(ofs >> chip->page_shift) & chip->pagemask; |
| 295 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 296 | if (getchip) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 297 | chipnr = (int)(ofs >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 298 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 299 | nand_get_device(mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 300 | |
| 301 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 302 | chip->select_chip(mtd, chipnr); |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 303 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | |
Brian Norris | cdbec05 | 2012-01-13 18:11:48 -0800 | [diff] [blame] | 305 | do { |
| 306 | if (chip->options & NAND_BUSWIDTH_16) { |
| 307 | chip->cmdfunc(mtd, NAND_CMD_READOOB, |
| 308 | chip->badblockpos & 0xFE, page); |
| 309 | bad = cpu_to_le16(chip->read_word(mtd)); |
| 310 | if (chip->badblockpos & 0x1) |
| 311 | bad >>= 8; |
| 312 | else |
| 313 | bad &= 0xFF; |
| 314 | } else { |
| 315 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, |
| 316 | page); |
| 317 | bad = chip->read_byte(mtd); |
| 318 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 319 | |
Brian Norris | cdbec05 | 2012-01-13 18:11:48 -0800 | [diff] [blame] | 320 | if (likely(chip->badblockbits == 8)) |
| 321 | res = bad != 0xFF; |
| 322 | else |
| 323 | res = hweight8(bad) < chip->badblockbits; |
| 324 | ofs += mtd->writesize; |
| 325 | page = (int)(ofs >> chip->page_shift) & chip->pagemask; |
| 326 | i++; |
| 327 | } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE)); |
Maxim Levitsky | e0b58d0 | 2010-02-22 20:39:38 +0200 | [diff] [blame] | 328 | |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 329 | if (getchip) { |
| 330 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 331 | nand_release_device(mtd); |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 332 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 333 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 334 | return res; |
| 335 | } |
| 336 | |
| 337 | /** |
| 338 | * nand_default_block_markbad - [DEFAULT] mark a block bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 339 | * @mtd: MTD device structure |
| 340 | * @ofs: offset from device start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 341 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 342 | * This is the default implementation, which can be overridden by a hardware |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 343 | * specific driver. We try operations in the following order, according to our |
| 344 | * bbt_options (NAND_BBT_NO_OOB_BBM and NAND_BBT_USE_FLASH): |
| 345 | * (1) erase the affected block, to allow OOB marker to be written cleanly |
| 346 | * (2) update in-memory BBT |
| 347 | * (3) write bad block marker to OOB area of affected block |
| 348 | * (4) update flash-based BBT |
| 349 | * Note that we retain the first error encountered in (3) or (4), finish the |
| 350 | * procedures, and dump the error in the end. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 351 | */ |
| 352 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) |
| 353 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 354 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 355 | uint8_t buf[2] = { 0, 0 }; |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 356 | int block, res, ret = 0, i = 0; |
| 357 | int write_oob = !(chip->bbt_options & NAND_BBT_NO_OOB_BBM); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 358 | |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 359 | if (write_oob) { |
Brian Norris | 0091842 | 2012-01-13 18:11:47 -0800 | [diff] [blame] | 360 | struct erase_info einfo; |
| 361 | |
| 362 | /* Attempt erase before marking OOB */ |
| 363 | memset(&einfo, 0, sizeof(einfo)); |
| 364 | einfo.mtd = mtd; |
| 365 | einfo.addr = ofs; |
| 366 | einfo.len = 1 << chip->phys_erase_shift; |
| 367 | nand_erase_nand(mtd, &einfo, 0); |
| 368 | } |
| 369 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | /* Get block number */ |
Andre Renaud | 4226b51 | 2007-04-17 13:50:59 -0400 | [diff] [blame] | 371 | block = (int)(ofs >> chip->bbt_erase_shift); |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 372 | /* Mark block bad in memory-based BBT */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 373 | if (chip->bbt) |
| 374 | chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 376 | /* Write bad block marker to OOB */ |
| 377 | if (write_oob) { |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 378 | struct mtd_oob_ops ops; |
Brian Norris | df69862 | 2012-01-20 20:38:03 -0800 | [diff] [blame] | 379 | loff_t wr_ofs = ofs; |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 380 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 381 | nand_get_device(mtd, FL_WRITING); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 382 | |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 383 | ops.datbuf = NULL; |
| 384 | ops.oobbuf = buf; |
Brian Norris | 8544331 | 2012-01-13 18:11:49 -0800 | [diff] [blame] | 385 | ops.ooboffs = chip->badblockpos; |
| 386 | if (chip->options & NAND_BUSWIDTH_16) { |
| 387 | ops.ooboffs &= ~0x01; |
| 388 | ops.len = ops.ooblen = 2; |
| 389 | } else { |
| 390 | ops.len = ops.ooblen = 1; |
| 391 | } |
Brian Norris | 23b1a99 | 2011-10-14 20:09:33 -0700 | [diff] [blame] | 392 | ops.mode = MTD_OPS_PLACE_OOB; |
Brian Norris | df69862 | 2012-01-20 20:38:03 -0800 | [diff] [blame] | 393 | |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 394 | /* Write to first/last page(s) if necessary */ |
Brian Norris | df69862 | 2012-01-20 20:38:03 -0800 | [diff] [blame] | 395 | if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) |
| 396 | wr_ofs += mtd->erasesize - mtd->writesize; |
Brian Norris | 02ed70b | 2010-07-21 16:53:47 -0700 | [diff] [blame] | 397 | do { |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 398 | res = nand_do_write_oob(mtd, wr_ofs, &ops); |
| 399 | if (!ret) |
| 400 | ret = res; |
Brian Norris | 02ed70b | 2010-07-21 16:53:47 -0700 | [diff] [blame] | 401 | |
Brian Norris | 02ed70b | 2010-07-21 16:53:47 -0700 | [diff] [blame] | 402 | i++; |
Brian Norris | df69862 | 2012-01-20 20:38:03 -0800 | [diff] [blame] | 403 | wr_ofs += mtd->writesize; |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 404 | } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2); |
Brian Norris | 02ed70b | 2010-07-21 16:53:47 -0700 | [diff] [blame] | 405 | |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 406 | nand_release_device(mtd); |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 407 | } |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 408 | |
| 409 | /* Update flash-based bad block table */ |
| 410 | if (chip->bbt_options & NAND_BBT_USE_FLASH) { |
| 411 | res = nand_update_bbt(mtd, ofs); |
| 412 | if (!ret) |
| 413 | ret = res; |
| 414 | } |
| 415 | |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 416 | if (!ret) |
| 417 | mtd->ecc_stats.badblocks++; |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 418 | |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 419 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 420 | } |
| 421 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 422 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | * nand_check_wp - [GENERIC] check if the chip is write protected |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 424 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 425 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 426 | * Check, if the device is write protected. The function expects, that the |
| 427 | * device is already selected. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 429 | static int nand_check_wp(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 430 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 431 | struct nand_chip *chip = mtd->priv; |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 432 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 433 | /* Broken xD cards report WP despite being writable */ |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 434 | if (chip->options & NAND_BROKEN_XD) |
| 435 | return 0; |
| 436 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 437 | /* Check the WP bit */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 438 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
| 439 | return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 440 | } |
| 441 | |
| 442 | /** |
| 443 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 444 | * @mtd: MTD device structure |
| 445 | * @ofs: offset from device start |
| 446 | * @getchip: 0, if the chip is already selected |
| 447 | * @allowbbt: 1, if its allowed to access the bbt area |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 448 | * |
| 449 | * Check, if the block is bad. Either by reading the bad block table or |
| 450 | * calling of the scan function. |
| 451 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 452 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, |
| 453 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 454 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 455 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 456 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 457 | if (!chip->bbt) |
| 458 | return chip->block_bad(mtd, ofs, getchip); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 459 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 460 | /* Return info from the table */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 461 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | } |
| 463 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 464 | /** |
| 465 | * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands. |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 466 | * @mtd: MTD device structure |
| 467 | * @timeo: Timeout |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 468 | * |
| 469 | * Helper function for nand_wait_ready used when needing to wait in interrupt |
| 470 | * context. |
| 471 | */ |
| 472 | static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo) |
| 473 | { |
| 474 | struct nand_chip *chip = mtd->priv; |
| 475 | int i; |
| 476 | |
| 477 | /* Wait for the device to get ready */ |
| 478 | for (i = 0; i < timeo; i++) { |
| 479 | if (chip->dev_ready(mtd)) |
| 480 | break; |
| 481 | touch_softlockup_watchdog(); |
| 482 | mdelay(1); |
| 483 | } |
| 484 | } |
| 485 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 486 | /* Wait for the ready pin, after a command. The timeout is caught later. */ |
David Woodhouse | 4b648b0 | 2006-09-25 17:05:24 +0100 | [diff] [blame] | 487 | void nand_wait_ready(struct mtd_info *mtd) |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 488 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 489 | struct nand_chip *chip = mtd->priv; |
Matthieu CASTET | ca6a248 | 2012-11-22 18:31:28 +0100 | [diff] [blame] | 490 | unsigned long timeo = jiffies + msecs_to_jiffies(20); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 491 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 492 | /* 400ms timeout */ |
| 493 | if (in_interrupt() || oops_in_progress) |
| 494 | return panic_nand_wait_ready(mtd, 400); |
| 495 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 496 | led_trigger_event(nand_led_trigger, LED_FULL); |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 497 | /* Wait until command is processed or timeout occurs */ |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 498 | do { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 499 | if (chip->dev_ready(mtd)) |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 500 | break; |
Ingo Molnar | 8446f1d | 2005-09-06 15:16:27 -0700 | [diff] [blame] | 501 | touch_softlockup_watchdog(); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 502 | } while (time_before(jiffies, timeo)); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 503 | led_trigger_event(nand_led_trigger, LED_OFF); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 504 | } |
David Woodhouse | 4b648b0 | 2006-09-25 17:05:24 +0100 | [diff] [blame] | 505 | EXPORT_SYMBOL_GPL(nand_wait_ready); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 506 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 507 | /** |
| 508 | * nand_command - [DEFAULT] Send command to NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 509 | * @mtd: MTD device structure |
| 510 | * @command: the command to be sent |
| 511 | * @column: the column address for this command, -1 if none |
| 512 | * @page_addr: the page address for this command, -1 if none |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 514 | * Send command to NAND device. This function is used for small page devices |
| 515 | * (256/512 Bytes per page). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 516 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 517 | static void nand_command(struct mtd_info *mtd, unsigned int command, |
| 518 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 519 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 520 | register struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 521 | int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 523 | /* Write out the command to the device */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | if (command == NAND_CMD_SEQIN) { |
| 525 | int readcmd; |
| 526 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 527 | if (column >= mtd->writesize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 528 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 529 | column -= mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 530 | readcmd = NAND_CMD_READOOB; |
| 531 | } else if (column < 256) { |
| 532 | /* First 256 bytes --> READ0 */ |
| 533 | readcmd = NAND_CMD_READ0; |
| 534 | } else { |
| 535 | column -= 256; |
| 536 | readcmd = NAND_CMD_READ1; |
| 537 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 538 | chip->cmd_ctrl(mtd, readcmd, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 539 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 540 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 541 | chip->cmd_ctrl(mtd, command, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 542 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 543 | /* Address cycle, when necessary */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 544 | ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE; |
| 545 | /* Serially input address */ |
| 546 | if (column != -1) { |
| 547 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 548 | if (chip->options & NAND_BUSWIDTH_16) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 549 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 550 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 551 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 552 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 553 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 554 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 555 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 556 | chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 557 | /* One more address cycle for devices > 32MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 558 | if (chip->chipsize > (32 << 20)) |
| 559 | chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 560 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 561 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 562 | |
| 563 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 564 | * Program and erase have their own busy handlers status and sequential |
| 565 | * in needs no delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 566 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 567 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 568 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | case NAND_CMD_PAGEPROG: |
| 570 | case NAND_CMD_ERASE1: |
| 571 | case NAND_CMD_ERASE2: |
| 572 | case NAND_CMD_SEQIN: |
| 573 | case NAND_CMD_STATUS: |
| 574 | return; |
| 575 | |
| 576 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 577 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 579 | udelay(chip->chip_delay); |
| 580 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 581 | NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 582 | chip->cmd_ctrl(mtd, |
| 583 | NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 584 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) |
| 585 | ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | return; |
| 587 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 588 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 590 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 591 | * If we don't have access to the busy pin, we apply the given |
| 592 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 593 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 594 | if (!chip->dev_ready) { |
| 595 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 596 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 597 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 598 | } |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 599 | /* |
| 600 | * Apply this short delay always to ensure that we do wait tWB in |
| 601 | * any case on any machine. |
| 602 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 603 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 604 | |
| 605 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 606 | } |
| 607 | |
| 608 | /** |
| 609 | * nand_command_lp - [DEFAULT] Send command to NAND large page device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 610 | * @mtd: MTD device structure |
| 611 | * @command: the command to be sent |
| 612 | * @column: the column address for this command, -1 if none |
| 613 | * @page_addr: the page address for this command, -1 if none |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | * |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 615 | * Send command to NAND device. This is the version for the new large page |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 616 | * devices. We don't have the separate regions as we have in the small page |
| 617 | * devices. We must emulate NAND_CMD_READOOB to keep the code compatible. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 618 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 619 | static void nand_command_lp(struct mtd_info *mtd, unsigned int command, |
| 620 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 621 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 622 | register struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | |
| 624 | /* Emulate NAND_CMD_READOOB */ |
| 625 | if (command == NAND_CMD_READOOB) { |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 626 | column += mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | command = NAND_CMD_READ0; |
| 628 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 629 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 630 | /* Command latch cycle */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 631 | chip->cmd_ctrl(mtd, command & 0xff, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 632 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 633 | |
| 634 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 635 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 636 | |
| 637 | /* Serially input address */ |
| 638 | if (column != -1) { |
| 639 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 640 | if (chip->options & NAND_BUSWIDTH_16) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 641 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 642 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 643 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 644 | chip->cmd_ctrl(mtd, column >> 8, ctrl); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 645 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 647 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
| 648 | chip->cmd_ctrl(mtd, page_addr >> 8, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 649 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 650 | /* One more address cycle for devices > 128MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 651 | if (chip->chipsize > (128 << 20)) |
| 652 | chip->cmd_ctrl(mtd, page_addr >> 16, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 653 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 656 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 657 | |
| 658 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 659 | * Program and erase have their own busy handlers status, sequential |
| 660 | * in, and deplete1 need no delay. |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 661 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 663 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | case NAND_CMD_CACHEDPROG: |
| 665 | case NAND_CMD_PAGEPROG: |
| 666 | case NAND_CMD_ERASE1: |
| 667 | case NAND_CMD_ERASE2: |
| 668 | case NAND_CMD_SEQIN: |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 669 | case NAND_CMD_RNDIN: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | case NAND_CMD_STATUS: |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 671 | case NAND_CMD_DEPLETE1: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | return; |
| 673 | |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 674 | case NAND_CMD_STATUS_ERROR: |
| 675 | case NAND_CMD_STATUS_ERROR0: |
| 676 | case NAND_CMD_STATUS_ERROR1: |
| 677 | case NAND_CMD_STATUS_ERROR2: |
| 678 | case NAND_CMD_STATUS_ERROR3: |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 679 | /* Read error status commands require only a short delay */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 680 | udelay(chip->chip_delay); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 681 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 682 | |
| 683 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 684 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 685 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 686 | udelay(chip->chip_delay); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 687 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
| 688 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 689 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 690 | NAND_NCE | NAND_CTRL_CHANGE); |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 691 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) |
| 692 | ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 693 | return; |
| 694 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 695 | case NAND_CMD_RNDOUT: |
| 696 | /* No ready / busy check necessary */ |
| 697 | chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART, |
| 698 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 699 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 700 | NAND_NCE | NAND_CTRL_CHANGE); |
| 701 | return; |
| 702 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 703 | case NAND_CMD_READ0: |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 704 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, |
| 705 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 706 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 707 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 708 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 709 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 710 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 711 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 712 | * If we don't have access to the busy pin, we apply the given |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 713 | * command delay. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 714 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 715 | if (!chip->dev_ready) { |
| 716 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 718 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 719 | } |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 720 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 721 | /* |
| 722 | * Apply this short delay always to ensure that we do wait tWB in |
| 723 | * any case on any machine. |
| 724 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 725 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 726 | |
| 727 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 728 | } |
| 729 | |
| 730 | /** |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 731 | * panic_nand_get_device - [GENERIC] Get chip for selected access |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 732 | * @chip: the nand chip descriptor |
| 733 | * @mtd: MTD device structure |
| 734 | * @new_state: the state which is requested |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 735 | * |
| 736 | * Used when in panic, no locks are taken. |
| 737 | */ |
| 738 | static void panic_nand_get_device(struct nand_chip *chip, |
| 739 | struct mtd_info *mtd, int new_state) |
| 740 | { |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 741 | /* Hardware controller shared among independent devices */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 742 | chip->controller->active = chip; |
| 743 | chip->state = new_state; |
| 744 | } |
| 745 | |
| 746 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 747 | * nand_get_device - [GENERIC] Get chip for selected access |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 748 | * @mtd: MTD device structure |
| 749 | * @new_state: the state which is requested |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 750 | * |
| 751 | * Get the device and lock it for exclusive access |
| 752 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 753 | static int |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 754 | nand_get_device(struct mtd_info *mtd, int new_state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 755 | { |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 756 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 757 | spinlock_t *lock = &chip->controller->lock; |
| 758 | wait_queue_head_t *wq = &chip->controller->wq; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 759 | DECLARE_WAITQUEUE(wait, current); |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 760 | retry: |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 761 | spin_lock(lock); |
| 762 | |
vimal singh | b8b3ee9 | 2009-07-09 20:41:22 +0530 | [diff] [blame] | 763 | /* Hardware controller shared among independent devices */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 764 | if (!chip->controller->active) |
| 765 | chip->controller->active = chip; |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 766 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 767 | if (chip->controller->active == chip && chip->state == FL_READY) { |
| 768 | chip->state = new_state; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 769 | spin_unlock(lock); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 770 | return 0; |
| 771 | } |
| 772 | if (new_state == FL_PM_SUSPENDED) { |
Li Yang | 6b0d9a8 | 2009-11-17 14:45:49 -0800 | [diff] [blame] | 773 | if (chip->controller->active->state == FL_PM_SUSPENDED) { |
| 774 | chip->state = FL_PM_SUSPENDED; |
| 775 | spin_unlock(lock); |
| 776 | return 0; |
Li Yang | 6b0d9a8 | 2009-11-17 14:45:49 -0800 | [diff] [blame] | 777 | } |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 778 | } |
| 779 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 780 | add_wait_queue(wq, &wait); |
| 781 | spin_unlock(lock); |
| 782 | schedule(); |
| 783 | remove_wait_queue(wq, &wait); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 784 | goto retry; |
| 785 | } |
| 786 | |
| 787 | /** |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 788 | * panic_nand_wait - [GENERIC] wait until the command is done |
| 789 | * @mtd: MTD device structure |
| 790 | * @chip: NAND chip structure |
| 791 | * @timeo: timeout |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 792 | * |
| 793 | * Wait for command done. This is a helper function for nand_wait used when |
| 794 | * we are in interrupt context. May happen when in panic and trying to write |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 795 | * an oops through mtdoops. |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 796 | */ |
| 797 | static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, |
| 798 | unsigned long timeo) |
| 799 | { |
| 800 | int i; |
| 801 | for (i = 0; i < timeo; i++) { |
| 802 | if (chip->dev_ready) { |
| 803 | if (chip->dev_ready(mtd)) |
| 804 | break; |
| 805 | } else { |
| 806 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
| 807 | break; |
| 808 | } |
| 809 | mdelay(1); |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 810 | } |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 811 | } |
| 812 | |
| 813 | /** |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 814 | * nand_wait - [DEFAULT] wait until the command is done |
| 815 | * @mtd: MTD device structure |
| 816 | * @chip: NAND chip structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 817 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 818 | * Wait for command done. This applies to erase and program only. Erase can |
| 819 | * take up to 400ms and program up to 20ms according to general NAND and |
| 820 | * SmartMedia specs. |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 821 | */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 822 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 823 | { |
| 824 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 825 | int status, state = chip->state; |
Huang Shijie | 6d2559f | 2013-01-30 10:03:56 +0800 | [diff] [blame] | 826 | unsigned long timeo = (state == FL_ERASING ? 400 : 20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 827 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 828 | led_trigger_event(nand_led_trigger, LED_FULL); |
| 829 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 830 | /* |
| 831 | * Apply this short delay always to ensure that we do wait tWB in any |
| 832 | * case on any machine. |
| 833 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 834 | ndelay(100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 835 | |
Artem Bityutskiy | 14c6578 | 2013-03-04 14:21:34 +0200 | [diff] [blame^] | 836 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 837 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 838 | if (in_interrupt() || oops_in_progress) |
| 839 | panic_nand_wait(mtd, chip, timeo); |
| 840 | else { |
Huang Shijie | 6d2559f | 2013-01-30 10:03:56 +0800 | [diff] [blame] | 841 | timeo = jiffies + msecs_to_jiffies(timeo); |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 842 | while (time_before(jiffies, timeo)) { |
| 843 | if (chip->dev_ready) { |
| 844 | if (chip->dev_ready(mtd)) |
| 845 | break; |
| 846 | } else { |
| 847 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
| 848 | break; |
| 849 | } |
| 850 | cond_resched(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 851 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 852 | } |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 853 | led_trigger_event(nand_led_trigger, LED_OFF); |
| 854 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 855 | status = (int)chip->read_byte(mtd); |
Matthieu CASTET | f251b8d | 2012-11-05 15:00:44 +0100 | [diff] [blame] | 856 | /* This can happen if in case of timeout or buggy dev_ready */ |
| 857 | WARN_ON(!(status & NAND_STATUS_READY)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 858 | return status; |
| 859 | } |
| 860 | |
| 861 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 862 | * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 863 | * @mtd: mtd info |
| 864 | * @ofs: offset to start unlock from |
| 865 | * @len: length to unlock |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 866 | * @invert: when = 0, unlock the range of blocks within the lower and |
| 867 | * upper boundary address |
| 868 | * when = 1, unlock the range of blocks outside the boundaries |
| 869 | * of the lower and upper boundary address |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 870 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 871 | * Returs unlock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 872 | */ |
| 873 | static int __nand_unlock(struct mtd_info *mtd, loff_t ofs, |
| 874 | uint64_t len, int invert) |
| 875 | { |
| 876 | int ret = 0; |
| 877 | int status, page; |
| 878 | struct nand_chip *chip = mtd->priv; |
| 879 | |
| 880 | /* Submit address of first page to unlock */ |
| 881 | page = ofs >> chip->page_shift; |
| 882 | chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask); |
| 883 | |
| 884 | /* Submit address of last page to unlock */ |
| 885 | page = (ofs + len) >> chip->page_shift; |
| 886 | chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1, |
| 887 | (page | invert) & chip->pagemask); |
| 888 | |
| 889 | /* Call wait ready function */ |
| 890 | status = chip->waitfunc(mtd, chip); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 891 | /* See if device thinks it succeeded */ |
Huang Shijie | 7483096 | 2012-10-14 23:47:24 -0400 | [diff] [blame] | 892 | if (status & NAND_STATUS_FAIL) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 893 | pr_debug("%s: error status = 0x%08x\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 894 | __func__, status); |
| 895 | ret = -EIO; |
| 896 | } |
| 897 | |
| 898 | return ret; |
| 899 | } |
| 900 | |
| 901 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 902 | * nand_unlock - [REPLACEABLE] unlocks specified locked blocks |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 903 | * @mtd: mtd info |
| 904 | * @ofs: offset to start unlock from |
| 905 | * @len: length to unlock |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 906 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 907 | * Returns unlock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 908 | */ |
| 909 | int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
| 910 | { |
| 911 | int ret = 0; |
| 912 | int chipnr; |
| 913 | struct nand_chip *chip = mtd->priv; |
| 914 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 915 | pr_debug("%s: start = 0x%012llx, len = %llu\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 916 | __func__, (unsigned long long)ofs, len); |
| 917 | |
| 918 | if (check_offs_len(mtd, ofs, len)) |
| 919 | ret = -EINVAL; |
| 920 | |
| 921 | /* Align to last block address if size addresses end of the device */ |
| 922 | if (ofs + len == mtd->size) |
| 923 | len -= mtd->erasesize; |
| 924 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 925 | nand_get_device(mtd, FL_UNLOCKING); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 926 | |
| 927 | /* Shift to get chip number */ |
| 928 | chipnr = ofs >> chip->chip_shift; |
| 929 | |
| 930 | chip->select_chip(mtd, chipnr); |
| 931 | |
| 932 | /* Check, if it is write protected */ |
| 933 | if (nand_check_wp(mtd)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 934 | pr_debug("%s: device is write protected!\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 935 | __func__); |
| 936 | ret = -EIO; |
| 937 | goto out; |
| 938 | } |
| 939 | |
| 940 | ret = __nand_unlock(mtd, ofs, len, 0); |
| 941 | |
| 942 | out: |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 943 | chip->select_chip(mtd, -1); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 944 | nand_release_device(mtd); |
| 945 | |
| 946 | return ret; |
| 947 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 948 | EXPORT_SYMBOL(nand_unlock); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 949 | |
| 950 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 951 | * nand_lock - [REPLACEABLE] locks all blocks present in the device |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 952 | * @mtd: mtd info |
| 953 | * @ofs: offset to start unlock from |
| 954 | * @len: length to unlock |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 955 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 956 | * This feature is not supported in many NAND parts. 'Micron' NAND parts do |
| 957 | * have this feature, but it allows only to lock all blocks, not for specified |
| 958 | * range for block. Implementing 'lock' feature by making use of 'unlock', for |
| 959 | * now. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 960 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 961 | * Returns lock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 962 | */ |
| 963 | int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
| 964 | { |
| 965 | int ret = 0; |
| 966 | int chipnr, status, page; |
| 967 | struct nand_chip *chip = mtd->priv; |
| 968 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 969 | pr_debug("%s: start = 0x%012llx, len = %llu\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 970 | __func__, (unsigned long long)ofs, len); |
| 971 | |
| 972 | if (check_offs_len(mtd, ofs, len)) |
| 973 | ret = -EINVAL; |
| 974 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 975 | nand_get_device(mtd, FL_LOCKING); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 976 | |
| 977 | /* Shift to get chip number */ |
| 978 | chipnr = ofs >> chip->chip_shift; |
| 979 | |
| 980 | chip->select_chip(mtd, chipnr); |
| 981 | |
| 982 | /* Check, if it is write protected */ |
| 983 | if (nand_check_wp(mtd)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 984 | pr_debug("%s: device is write protected!\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 985 | __func__); |
| 986 | status = MTD_ERASE_FAILED; |
| 987 | ret = -EIO; |
| 988 | goto out; |
| 989 | } |
| 990 | |
| 991 | /* Submit address of first page to lock */ |
| 992 | page = ofs >> chip->page_shift; |
| 993 | chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask); |
| 994 | |
| 995 | /* Call wait ready function */ |
| 996 | status = chip->waitfunc(mtd, chip); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 997 | /* See if device thinks it succeeded */ |
Huang Shijie | 7483096 | 2012-10-14 23:47:24 -0400 | [diff] [blame] | 998 | if (status & NAND_STATUS_FAIL) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 999 | pr_debug("%s: error status = 0x%08x\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1000 | __func__, status); |
| 1001 | ret = -EIO; |
| 1002 | goto out; |
| 1003 | } |
| 1004 | |
| 1005 | ret = __nand_unlock(mtd, ofs, len, 0x1); |
| 1006 | |
| 1007 | out: |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 1008 | chip->select_chip(mtd, -1); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1009 | nand_release_device(mtd); |
| 1010 | |
| 1011 | return ret; |
| 1012 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1013 | EXPORT_SYMBOL(nand_lock); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1014 | |
| 1015 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1016 | * nand_read_page_raw - [INTERN] read raw page data without ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1017 | * @mtd: mtd info structure |
| 1018 | * @chip: nand chip info structure |
| 1019 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1020 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1021 | * @page: page number to read |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1022 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1023 | * Not for syndrome calculating ECC controllers, which use a special oob layout. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1024 | */ |
| 1025 | static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1026 | uint8_t *buf, int oob_required, int page) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1027 | { |
| 1028 | chip->read_buf(mtd, buf, mtd->writesize); |
Brian Norris | 279f08d | 2012-05-02 10:15:03 -0700 | [diff] [blame] | 1029 | if (oob_required) |
| 1030 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1031 | return 0; |
| 1032 | } |
| 1033 | |
| 1034 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1035 | * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1036 | * @mtd: mtd info structure |
| 1037 | * @chip: nand chip info structure |
| 1038 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1039 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1040 | * @page: page number to read |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1041 | * |
| 1042 | * We need a special oob layout and handling even when OOB isn't used. |
| 1043 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1044 | static int nand_read_page_raw_syndrome(struct mtd_info *mtd, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1045 | struct nand_chip *chip, uint8_t *buf, |
| 1046 | int oob_required, int page) |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1047 | { |
| 1048 | int eccsize = chip->ecc.size; |
| 1049 | int eccbytes = chip->ecc.bytes; |
| 1050 | uint8_t *oob = chip->oob_poi; |
| 1051 | int steps, size; |
| 1052 | |
| 1053 | for (steps = chip->ecc.steps; steps > 0; steps--) { |
| 1054 | chip->read_buf(mtd, buf, eccsize); |
| 1055 | buf += eccsize; |
| 1056 | |
| 1057 | if (chip->ecc.prepad) { |
| 1058 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 1059 | oob += chip->ecc.prepad; |
| 1060 | } |
| 1061 | |
| 1062 | chip->read_buf(mtd, oob, eccbytes); |
| 1063 | oob += eccbytes; |
| 1064 | |
| 1065 | if (chip->ecc.postpad) { |
| 1066 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 1067 | oob += chip->ecc.postpad; |
| 1068 | } |
| 1069 | } |
| 1070 | |
| 1071 | size = mtd->oobsize - (oob - chip->oob_poi); |
| 1072 | if (size) |
| 1073 | chip->read_buf(mtd, oob, size); |
| 1074 | |
| 1075 | return 0; |
| 1076 | } |
| 1077 | |
| 1078 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1079 | * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1080 | * @mtd: mtd info structure |
| 1081 | * @chip: nand chip info structure |
| 1082 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1083 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1084 | * @page: page number to read |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1085 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1086 | static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1087 | uint8_t *buf, int oob_required, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1088 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1089 | int i, eccsize = chip->ecc.size; |
| 1090 | int eccbytes = chip->ecc.bytes; |
| 1091 | int eccsteps = chip->ecc.steps; |
| 1092 | uint8_t *p = buf; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1093 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 1094 | uint8_t *ecc_code = chip->buffers->ecccode; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1095 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1096 | unsigned int max_bitflips = 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1097 | |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1098 | chip->ecc.read_page_raw(mtd, chip, buf, 1, page); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1099 | |
| 1100 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 1101 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1102 | |
| 1103 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1104 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1105 | |
| 1106 | eccsteps = chip->ecc.steps; |
| 1107 | p = buf; |
| 1108 | |
| 1109 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1110 | int stat; |
| 1111 | |
| 1112 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1113 | if (stat < 0) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1114 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1115 | } else { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1116 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1117 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1118 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1119 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1120 | return max_bitflips; |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 1121 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1122 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1123 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1124 | * nand_read_subpage - [REPLACEABLE] software ECC based sub-page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1125 | * @mtd: mtd info structure |
| 1126 | * @chip: nand chip info structure |
| 1127 | * @data_offs: offset of requested data within the page |
| 1128 | * @readlen: data length |
| 1129 | * @bufpoi: buffer to store read data |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1130 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1131 | static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, |
| 1132 | uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1133 | { |
| 1134 | int start_step, end_step, num_steps; |
| 1135 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 1136 | uint8_t *p; |
| 1137 | int data_col_addr, i, gaps = 0; |
| 1138 | int datafrag_len, eccfrag_len, aligned_len, aligned_pos; |
| 1139 | int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1140 | int index = 0; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1141 | unsigned int max_bitflips = 0; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1142 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1143 | /* Column address within the page aligned to ECC size (256bytes) */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1144 | start_step = data_offs / chip->ecc.size; |
| 1145 | end_step = (data_offs + readlen - 1) / chip->ecc.size; |
| 1146 | num_steps = end_step - start_step + 1; |
| 1147 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1148 | /* Data size aligned to ECC ecc.size */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1149 | datafrag_len = num_steps * chip->ecc.size; |
| 1150 | eccfrag_len = num_steps * chip->ecc.bytes; |
| 1151 | |
| 1152 | data_col_addr = start_step * chip->ecc.size; |
| 1153 | /* If we read not a page aligned data */ |
| 1154 | if (data_col_addr != 0) |
| 1155 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); |
| 1156 | |
| 1157 | p = bufpoi + data_col_addr; |
| 1158 | chip->read_buf(mtd, p, datafrag_len); |
| 1159 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1160 | /* Calculate ECC */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1161 | for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) |
| 1162 | chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]); |
| 1163 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1164 | /* |
| 1165 | * The performance is faster if we position offsets according to |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1166 | * ecc.pos. Let's make sure that there are no gaps in ECC positions. |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1167 | */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1168 | for (i = 0; i < eccfrag_len - 1; i++) { |
| 1169 | if (eccpos[i + start_step * chip->ecc.bytes] + 1 != |
| 1170 | eccpos[i + start_step * chip->ecc.bytes + 1]) { |
| 1171 | gaps = 1; |
| 1172 | break; |
| 1173 | } |
| 1174 | } |
| 1175 | if (gaps) { |
| 1176 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1); |
| 1177 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1178 | } else { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1179 | /* |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1180 | * Send the command to read the particular ECC bytes take care |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1181 | * about buswidth alignment in read_buf. |
| 1182 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1183 | index = start_step * chip->ecc.bytes; |
| 1184 | |
| 1185 | aligned_pos = eccpos[index] & ~(busw - 1); |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1186 | aligned_len = eccfrag_len; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1187 | if (eccpos[index] & (busw - 1)) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1188 | aligned_len++; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1189 | if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1)) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1190 | aligned_len++; |
| 1191 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1192 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, |
| 1193 | mtd->writesize + aligned_pos, -1); |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1194 | chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len); |
| 1195 | } |
| 1196 | |
| 1197 | for (i = 0; i < eccfrag_len; i++) |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1198 | chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]]; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1199 | |
| 1200 | p = bufpoi + data_col_addr; |
| 1201 | for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { |
| 1202 | int stat; |
| 1203 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1204 | stat = chip->ecc.correct(mtd, p, |
| 1205 | &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]); |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1206 | if (stat < 0) { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1207 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1208 | } else { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1209 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1210 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1211 | } |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1212 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1213 | return max_bitflips; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1214 | } |
| 1215 | |
| 1216 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1217 | * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1218 | * @mtd: mtd info structure |
| 1219 | * @chip: nand chip info structure |
| 1220 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1221 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1222 | * @page: page number to read |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1223 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1224 | * Not for syndrome calculating ECC controllers which need a special oob layout. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1225 | */ |
| 1226 | static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1227 | uint8_t *buf, int oob_required, int page) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1228 | { |
| 1229 | int i, eccsize = chip->ecc.size; |
| 1230 | int eccbytes = chip->ecc.bytes; |
| 1231 | int eccsteps = chip->ecc.steps; |
| 1232 | uint8_t *p = buf; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1233 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 1234 | uint8_t *ecc_code = chip->buffers->ecccode; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1235 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1236 | unsigned int max_bitflips = 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1237 | |
| 1238 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1239 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1240 | chip->read_buf(mtd, p, eccsize); |
| 1241 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1242 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1243 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1244 | |
| 1245 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1246 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1247 | |
| 1248 | eccsteps = chip->ecc.steps; |
| 1249 | p = buf; |
| 1250 | |
| 1251 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1252 | int stat; |
| 1253 | |
| 1254 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1255 | if (stat < 0) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1256 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1257 | } else { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1258 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1259 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1260 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1261 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1262 | return max_bitflips; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1263 | } |
| 1264 | |
| 1265 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1266 | * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1267 | * @mtd: mtd info structure |
| 1268 | * @chip: nand chip info structure |
| 1269 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1270 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1271 | * @page: page number to read |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1272 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1273 | * Hardware ECC for large page chips, require OOB to be read first. For this |
| 1274 | * ECC mode, the write_page method is re-used from ECC_HW. These methods |
| 1275 | * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with |
| 1276 | * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from |
| 1277 | * the data area, by overwriting the NAND manufacturer bad block markings. |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1278 | */ |
| 1279 | static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1280 | struct nand_chip *chip, uint8_t *buf, int oob_required, int page) |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1281 | { |
| 1282 | int i, eccsize = chip->ecc.size; |
| 1283 | int eccbytes = chip->ecc.bytes; |
| 1284 | int eccsteps = chip->ecc.steps; |
| 1285 | uint8_t *p = buf; |
| 1286 | uint8_t *ecc_code = chip->buffers->ecccode; |
| 1287 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 1288 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1289 | unsigned int max_bitflips = 0; |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1290 | |
| 1291 | /* Read the OOB area first */ |
| 1292 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
| 1293 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1294 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
| 1295 | |
| 1296 | for (i = 0; i < chip->ecc.total; i++) |
| 1297 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
| 1298 | |
| 1299 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1300 | int stat; |
| 1301 | |
| 1302 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1303 | chip->read_buf(mtd, p, eccsize); |
| 1304 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1305 | |
| 1306 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1307 | if (stat < 0) { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1308 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1309 | } else { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1310 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1311 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1312 | } |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1313 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1314 | return max_bitflips; |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1315 | } |
| 1316 | |
| 1317 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1318 | * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1319 | * @mtd: mtd info structure |
| 1320 | * @chip: nand chip info structure |
| 1321 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1322 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1323 | * @page: page number to read |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1324 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1325 | * The hw generator calculates the error syndrome automatically. Therefore we |
| 1326 | * need a special oob layout and handling. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1327 | */ |
| 1328 | static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1329 | uint8_t *buf, int oob_required, int page) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1330 | { |
| 1331 | int i, eccsize = chip->ecc.size; |
| 1332 | int eccbytes = chip->ecc.bytes; |
| 1333 | int eccsteps = chip->ecc.steps; |
| 1334 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1335 | uint8_t *oob = chip->oob_poi; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1336 | unsigned int max_bitflips = 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1337 | |
| 1338 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1339 | int stat; |
| 1340 | |
| 1341 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1342 | chip->read_buf(mtd, p, eccsize); |
| 1343 | |
| 1344 | if (chip->ecc.prepad) { |
| 1345 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 1346 | oob += chip->ecc.prepad; |
| 1347 | } |
| 1348 | |
| 1349 | chip->ecc.hwctl(mtd, NAND_ECC_READSYN); |
| 1350 | chip->read_buf(mtd, oob, eccbytes); |
| 1351 | stat = chip->ecc.correct(mtd, p, oob, NULL); |
| 1352 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1353 | if (stat < 0) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1354 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1355 | } else { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1356 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1357 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1358 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1359 | |
| 1360 | oob += eccbytes; |
| 1361 | |
| 1362 | if (chip->ecc.postpad) { |
| 1363 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 1364 | oob += chip->ecc.postpad; |
| 1365 | } |
| 1366 | } |
| 1367 | |
| 1368 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 1369 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1370 | if (i) |
| 1371 | chip->read_buf(mtd, oob, i); |
| 1372 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1373 | return max_bitflips; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1374 | } |
| 1375 | |
| 1376 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1377 | * nand_transfer_oob - [INTERN] Transfer oob to client buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1378 | * @chip: nand chip structure |
| 1379 | * @oob: oob destination address |
| 1380 | * @ops: oob ops structure |
| 1381 | * @len: size of oob to transfer |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1382 | */ |
| 1383 | static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1384 | struct mtd_oob_ops *ops, size_t len) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1385 | { |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1386 | switch (ops->mode) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1387 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1388 | case MTD_OPS_PLACE_OOB: |
| 1389 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1390 | memcpy(oob, chip->oob_poi + ops->ooboffs, len); |
| 1391 | return oob + len; |
| 1392 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1393 | case MTD_OPS_AUTO_OOB: { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1394 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1395 | uint32_t boffs = 0, roffs = ops->ooboffs; |
| 1396 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1397 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1398 | for (; free->length && len; free++, len -= bytes) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1399 | /* Read request not from offset 0? */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1400 | if (unlikely(roffs)) { |
| 1401 | if (roffs >= free->length) { |
| 1402 | roffs -= free->length; |
| 1403 | continue; |
| 1404 | } |
| 1405 | boffs = free->offset + roffs; |
| 1406 | bytes = min_t(size_t, len, |
| 1407 | (free->length - roffs)); |
| 1408 | roffs = 0; |
| 1409 | } else { |
| 1410 | bytes = min_t(size_t, len, free->length); |
| 1411 | boffs = free->offset; |
| 1412 | } |
| 1413 | memcpy(oob, chip->oob_poi + boffs, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1414 | oob += bytes; |
| 1415 | } |
| 1416 | return oob; |
| 1417 | } |
| 1418 | default: |
| 1419 | BUG(); |
| 1420 | } |
| 1421 | return NULL; |
| 1422 | } |
| 1423 | |
| 1424 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1425 | * nand_do_read_ops - [INTERN] Read data with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1426 | * @mtd: MTD device structure |
| 1427 | * @from: offset to read from |
| 1428 | * @ops: oob ops structure |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1429 | * |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1430 | * Internal function. Called with chip held. |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1431 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1432 | static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, |
| 1433 | struct mtd_oob_ops *ops) |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1434 | { |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1435 | int chipnr, page, realpage, col, bytes, aligned, oob_required; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1436 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1437 | struct mtd_ecc_stats stats; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1438 | int ret = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1439 | uint32_t readlen = ops->len; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1440 | uint32_t oobreadlen = ops->ooblen; |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1441 | uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ? |
Maxim Levitsky | 9aca334 | 2010-02-22 20:39:35 +0200 | [diff] [blame] | 1442 | mtd->oobavail : mtd->oobsize; |
| 1443 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1444 | uint8_t *bufpoi, *oob, *buf; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1445 | unsigned int max_bitflips = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1446 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1447 | stats = mtd->ecc_stats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1448 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1449 | chipnr = (int)(from >> chip->chip_shift); |
| 1450 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1451 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1452 | realpage = (int)(from >> chip->page_shift); |
| 1453 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1454 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1455 | col = (int)(from & (mtd->writesize - 1)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1456 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1457 | buf = ops->datbuf; |
| 1458 | oob = ops->oobbuf; |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1459 | oob_required = oob ? 1 : 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1460 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1461 | while (1) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1462 | bytes = min(mtd->writesize - col, readlen); |
| 1463 | aligned = (bytes == mtd->writesize); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1464 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1465 | /* Is the current page in the buffer? */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1466 | if (realpage != chip->pagebuf || oob) { |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1467 | bufpoi = aligned ? buf : chip->buffers->databuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1468 | |
Brian Norris | c00a099 | 2012-05-01 17:12:54 -0700 | [diff] [blame] | 1469 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1470 | |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1471 | /* |
| 1472 | * Now read the page into the buffer. Absent an error, |
| 1473 | * the read methods return max bitflips per ecc step. |
| 1474 | */ |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1475 | if (unlikely(ops->mode == MTD_OPS_RAW)) |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1476 | ret = chip->ecc.read_page_raw(mtd, chip, bufpoi, |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1477 | oob_required, |
| 1478 | page); |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 1479 | else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) && |
| 1480 | !oob) |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1481 | ret = chip->ecc.read_subpage(mtd, chip, |
| 1482 | col, bytes, bufpoi); |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1483 | else |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 1484 | ret = chip->ecc.read_page(mtd, chip, bufpoi, |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1485 | oob_required, page); |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1486 | if (ret < 0) { |
| 1487 | if (!aligned) |
| 1488 | /* Invalidate page cache */ |
| 1489 | chip->pagebuf = -1; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1490 | break; |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1491 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1492 | |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1493 | max_bitflips = max_t(unsigned int, max_bitflips, ret); |
| 1494 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1495 | /* Transfer not aligned data */ |
| 1496 | if (!aligned) { |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 1497 | if (!NAND_HAS_SUBPAGE_READ(chip) && !oob && |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1498 | !(mtd->ecc_stats.failed - stats.failed) && |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1499 | (ops->mode != MTD_OPS_RAW)) { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1500 | chip->pagebuf = realpage; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1501 | chip->pagebuf_bitflips = ret; |
| 1502 | } else { |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1503 | /* Invalidate page cache */ |
| 1504 | chip->pagebuf = -1; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1505 | } |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1506 | memcpy(buf, chip->buffers->databuf + col, bytes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1507 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1508 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1509 | buf += bytes; |
| 1510 | |
| 1511 | if (unlikely(oob)) { |
Maxim Levitsky | b64d39d | 2010-02-22 20:39:37 +0200 | [diff] [blame] | 1512 | int toread = min(oobreadlen, max_oobsize); |
| 1513 | |
| 1514 | if (toread) { |
| 1515 | oob = nand_transfer_oob(chip, |
| 1516 | oob, ops, toread); |
| 1517 | oobreadlen -= toread; |
| 1518 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1519 | } |
Brian Norris | 5bc7c33 | 2013-03-13 09:51:31 -0700 | [diff] [blame] | 1520 | |
| 1521 | if (chip->options & NAND_NEED_READRDY) { |
| 1522 | /* Apply delay or wait for ready/busy pin */ |
| 1523 | if (!chip->dev_ready) |
| 1524 | udelay(chip->chip_delay); |
| 1525 | else |
| 1526 | nand_wait_ready(mtd); |
| 1527 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1528 | } else { |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1529 | memcpy(buf, chip->buffers->databuf + col, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1530 | buf += bytes; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1531 | max_bitflips = max_t(unsigned int, max_bitflips, |
| 1532 | chip->pagebuf_bitflips); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1533 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1534 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1535 | readlen -= bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1536 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1537 | if (!readlen) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1538 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1539 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1540 | /* For subsequent reads align to page boundary */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1541 | col = 0; |
| 1542 | /* Increment page address */ |
| 1543 | realpage++; |
| 1544 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1545 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1546 | /* Check, if we cross a chip boundary */ |
| 1547 | if (!page) { |
| 1548 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1549 | chip->select_chip(mtd, -1); |
| 1550 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1551 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1552 | } |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 1553 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1554 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1555 | ops->retlen = ops->len - (size_t) readlen; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1556 | if (oob) |
| 1557 | ops->oobretlen = ops->ooblen - oobreadlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1558 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1559 | if (ret < 0) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1560 | return ret; |
| 1561 | |
Thomas Gleixner | 9a1fcdf | 2006-05-29 14:56:39 +0200 | [diff] [blame] | 1562 | if (mtd->ecc_stats.failed - stats.failed) |
| 1563 | return -EBADMSG; |
| 1564 | |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1565 | return max_bitflips; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1566 | } |
| 1567 | |
| 1568 | /** |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1569 | * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1570 | * @mtd: MTD device structure |
| 1571 | * @from: offset to read from |
| 1572 | * @len: number of bytes to read |
| 1573 | * @retlen: pointer to variable to store the number of read bytes |
| 1574 | * @buf: the databuffer to put data |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1575 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1576 | * Get hold of the chip and call nand_do_read. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1577 | */ |
| 1578 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 1579 | size_t *retlen, uint8_t *buf) |
| 1580 | { |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1581 | struct mtd_oob_ops ops; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1582 | int ret; |
| 1583 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 1584 | nand_get_device(mtd, FL_READING); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1585 | ops.len = len; |
| 1586 | ops.datbuf = buf; |
| 1587 | ops.oobbuf = NULL; |
Huang Shijie | 11041ae | 2012-07-03 16:44:14 +0800 | [diff] [blame] | 1588 | ops.mode = MTD_OPS_PLACE_OOB; |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1589 | ret = nand_do_read_ops(mtd, from, &ops); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1590 | *retlen = ops.retlen; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1591 | nand_release_device(mtd); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1592 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1593 | } |
| 1594 | |
| 1595 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1596 | * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1597 | * @mtd: mtd info structure |
| 1598 | * @chip: nand chip info structure |
| 1599 | * @page: page number to read |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1600 | */ |
| 1601 | static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip, |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1602 | int page) |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1603 | { |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1604 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1605 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1606 | return 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1607 | } |
| 1608 | |
| 1609 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1610 | * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1611 | * with syndromes |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1612 | * @mtd: mtd info structure |
| 1613 | * @chip: nand chip info structure |
| 1614 | * @page: page number to read |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1615 | */ |
| 1616 | static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1617 | int page) |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1618 | { |
| 1619 | uint8_t *buf = chip->oob_poi; |
| 1620 | int length = mtd->oobsize; |
| 1621 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1622 | int eccsize = chip->ecc.size; |
| 1623 | uint8_t *bufpoi = buf; |
| 1624 | int i, toread, sndrnd = 0, pos; |
| 1625 | |
| 1626 | chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page); |
| 1627 | for (i = 0; i < chip->ecc.steps; i++) { |
| 1628 | if (sndrnd) { |
| 1629 | pos = eccsize + i * (eccsize + chunk); |
| 1630 | if (mtd->writesize > 512) |
| 1631 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1); |
| 1632 | else |
| 1633 | chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page); |
| 1634 | } else |
| 1635 | sndrnd = 1; |
| 1636 | toread = min_t(int, length, chunk); |
| 1637 | chip->read_buf(mtd, bufpoi, toread); |
| 1638 | bufpoi += toread; |
| 1639 | length -= toread; |
| 1640 | } |
| 1641 | if (length > 0) |
| 1642 | chip->read_buf(mtd, bufpoi, length); |
| 1643 | |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1644 | return 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1645 | } |
| 1646 | |
| 1647 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1648 | * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1649 | * @mtd: mtd info structure |
| 1650 | * @chip: nand chip info structure |
| 1651 | * @page: page number to write |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1652 | */ |
| 1653 | static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip, |
| 1654 | int page) |
| 1655 | { |
| 1656 | int status = 0; |
| 1657 | const uint8_t *buf = chip->oob_poi; |
| 1658 | int length = mtd->oobsize; |
| 1659 | |
| 1660 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); |
| 1661 | chip->write_buf(mtd, buf, length); |
| 1662 | /* Send command to program the OOB data */ |
| 1663 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1664 | |
| 1665 | status = chip->waitfunc(mtd, chip); |
| 1666 | |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1667 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1668 | } |
| 1669 | |
| 1670 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1671 | * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1672 | * with syndrome - only for large page flash |
| 1673 | * @mtd: mtd info structure |
| 1674 | * @chip: nand chip info structure |
| 1675 | * @page: page number to write |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1676 | */ |
| 1677 | static int nand_write_oob_syndrome(struct mtd_info *mtd, |
| 1678 | struct nand_chip *chip, int page) |
| 1679 | { |
| 1680 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1681 | int eccsize = chip->ecc.size, length = mtd->oobsize; |
| 1682 | int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps; |
| 1683 | const uint8_t *bufpoi = chip->oob_poi; |
| 1684 | |
| 1685 | /* |
| 1686 | * data-ecc-data-ecc ... ecc-oob |
| 1687 | * or |
| 1688 | * data-pad-ecc-pad-data-pad .... ecc-pad-oob |
| 1689 | */ |
| 1690 | if (!chip->ecc.prepad && !chip->ecc.postpad) { |
| 1691 | pos = steps * (eccsize + chunk); |
| 1692 | steps = 0; |
| 1693 | } else |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 1694 | pos = eccsize; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1695 | |
| 1696 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page); |
| 1697 | for (i = 0; i < steps; i++) { |
| 1698 | if (sndcmd) { |
| 1699 | if (mtd->writesize <= 512) { |
| 1700 | uint32_t fill = 0xFFFFFFFF; |
| 1701 | |
| 1702 | len = eccsize; |
| 1703 | while (len > 0) { |
| 1704 | int num = min_t(int, len, 4); |
| 1705 | chip->write_buf(mtd, (uint8_t *)&fill, |
| 1706 | num); |
| 1707 | len -= num; |
| 1708 | } |
| 1709 | } else { |
| 1710 | pos = eccsize + i * (eccsize + chunk); |
| 1711 | chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1); |
| 1712 | } |
| 1713 | } else |
| 1714 | sndcmd = 1; |
| 1715 | len = min_t(int, length, chunk); |
| 1716 | chip->write_buf(mtd, bufpoi, len); |
| 1717 | bufpoi += len; |
| 1718 | length -= len; |
| 1719 | } |
| 1720 | if (length > 0) |
| 1721 | chip->write_buf(mtd, bufpoi, length); |
| 1722 | |
| 1723 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1724 | status = chip->waitfunc(mtd, chip); |
| 1725 | |
| 1726 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
| 1727 | } |
| 1728 | |
| 1729 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1730 | * nand_do_read_oob - [INTERN] NAND read out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1731 | * @mtd: MTD device structure |
| 1732 | * @from: offset to read from |
| 1733 | * @ops: oob operations description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1734 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1735 | * NAND read out-of-band data from the spare area. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1736 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1737 | static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, |
| 1738 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1739 | { |
Brian Norris | c00a099 | 2012-05-01 17:12:54 -0700 | [diff] [blame] | 1740 | int page, realpage, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1741 | struct nand_chip *chip = mtd->priv; |
Brian Norris | 041e457 | 2011-06-23 16:45:24 -0700 | [diff] [blame] | 1742 | struct mtd_ecc_stats stats; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1743 | int readlen = ops->ooblen; |
| 1744 | int len; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1745 | uint8_t *buf = ops->oobbuf; |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 1746 | int ret = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1747 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1748 | pr_debug("%s: from = 0x%08Lx, len = %i\n", |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 1749 | __func__, (unsigned long long)from, readlen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1750 | |
Brian Norris | 041e457 | 2011-06-23 16:45:24 -0700 | [diff] [blame] | 1751 | stats = mtd->ecc_stats; |
| 1752 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1753 | if (ops->mode == MTD_OPS_AUTO_OOB) |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1754 | len = chip->ecc.layout->oobavail; |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1755 | else |
| 1756 | len = mtd->oobsize; |
| 1757 | |
| 1758 | if (unlikely(ops->ooboffs >= len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1759 | pr_debug("%s: attempt to start read outside oob\n", |
| 1760 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1761 | return -EINVAL; |
| 1762 | } |
| 1763 | |
| 1764 | /* Do not allow reads past end of device */ |
| 1765 | if (unlikely(from >= mtd->size || |
| 1766 | ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) - |
| 1767 | (from >> chip->page_shift)) * len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1768 | pr_debug("%s: attempt to read beyond end of device\n", |
| 1769 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1770 | return -EINVAL; |
| 1771 | } |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1772 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1773 | chipnr = (int)(from >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1774 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1775 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1776 | /* Shift to get page */ |
| 1777 | realpage = (int)(from >> chip->page_shift); |
| 1778 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1779 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1780 | while (1) { |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1781 | if (ops->mode == MTD_OPS_RAW) |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 1782 | ret = chip->ecc.read_oob_raw(mtd, chip, page); |
Brian Norris | c46f648 | 2011-08-30 18:45:38 -0700 | [diff] [blame] | 1783 | else |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 1784 | ret = chip->ecc.read_oob(mtd, chip, page); |
| 1785 | |
| 1786 | if (ret < 0) |
| 1787 | break; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1788 | |
| 1789 | len = min(len, readlen); |
| 1790 | buf = nand_transfer_oob(chip, buf, ops, len); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1791 | |
Brian Norris | 5bc7c33 | 2013-03-13 09:51:31 -0700 | [diff] [blame] | 1792 | if (chip->options & NAND_NEED_READRDY) { |
| 1793 | /* Apply delay or wait for ready/busy pin */ |
| 1794 | if (!chip->dev_ready) |
| 1795 | udelay(chip->chip_delay); |
| 1796 | else |
| 1797 | nand_wait_ready(mtd); |
| 1798 | } |
| 1799 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1800 | readlen -= len; |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1801 | if (!readlen) |
| 1802 | break; |
| 1803 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1804 | /* Increment page address */ |
| 1805 | realpage++; |
| 1806 | |
| 1807 | page = realpage & chip->pagemask; |
| 1808 | /* Check, if we cross a chip boundary */ |
| 1809 | if (!page) { |
| 1810 | chipnr++; |
| 1811 | chip->select_chip(mtd, -1); |
| 1812 | chip->select_chip(mtd, chipnr); |
| 1813 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1814 | } |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 1815 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1816 | |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 1817 | ops->oobretlen = ops->ooblen - readlen; |
| 1818 | |
| 1819 | if (ret < 0) |
| 1820 | return ret; |
Brian Norris | 041e457 | 2011-06-23 16:45:24 -0700 | [diff] [blame] | 1821 | |
| 1822 | if (mtd->ecc_stats.failed - stats.failed) |
| 1823 | return -EBADMSG; |
| 1824 | |
| 1825 | return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1826 | } |
| 1827 | |
| 1828 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1829 | * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1830 | * @mtd: MTD device structure |
| 1831 | * @from: offset to read from |
| 1832 | * @ops: oob operation description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1833 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1834 | * NAND read data and/or out-of-band data. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1835 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1836 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, |
| 1837 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1838 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1839 | int ret = -ENOTSUPP; |
| 1840 | |
| 1841 | ops->retlen = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1842 | |
| 1843 | /* Do not allow reads past end of device */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1844 | if (ops->datbuf && (from + ops->len) > mtd->size) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1845 | pr_debug("%s: attempt to read beyond end of device\n", |
| 1846 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1847 | return -EINVAL; |
| 1848 | } |
| 1849 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 1850 | nand_get_device(mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1851 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1852 | switch (ops->mode) { |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1853 | case MTD_OPS_PLACE_OOB: |
| 1854 | case MTD_OPS_AUTO_OOB: |
| 1855 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1856 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1857 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1858 | default: |
| 1859 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1860 | } |
| 1861 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1862 | if (!ops->datbuf) |
| 1863 | ret = nand_do_read_oob(mtd, from, ops); |
| 1864 | else |
| 1865 | ret = nand_do_read_ops(mtd, from, ops); |
| 1866 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1867 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1868 | nand_release_device(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1869 | return ret; |
| 1870 | } |
| 1871 | |
| 1872 | |
| 1873 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1874 | * nand_write_page_raw - [INTERN] raw page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1875 | * @mtd: mtd info structure |
| 1876 | * @chip: nand chip info structure |
| 1877 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1878 | * @oob_required: must write chip->oob_poi to OOB |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1879 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1880 | * Not for syndrome calculating ECC controllers, which use a special oob layout. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1881 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 1882 | static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1883 | const uint8_t *buf, int oob_required) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1884 | { |
| 1885 | chip->write_buf(mtd, buf, mtd->writesize); |
Brian Norris | 279f08d | 2012-05-02 10:15:03 -0700 | [diff] [blame] | 1886 | if (oob_required) |
| 1887 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 1888 | |
| 1889 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1890 | } |
| 1891 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1892 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1893 | * nand_write_page_raw_syndrome - [INTERN] raw page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1894 | * @mtd: mtd info structure |
| 1895 | * @chip: nand chip info structure |
| 1896 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1897 | * @oob_required: must write chip->oob_poi to OOB |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1898 | * |
| 1899 | * We need a special oob layout and handling even when ECC isn't checked. |
| 1900 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 1901 | static int nand_write_page_raw_syndrome(struct mtd_info *mtd, |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1902 | struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1903 | const uint8_t *buf, int oob_required) |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1904 | { |
| 1905 | int eccsize = chip->ecc.size; |
| 1906 | int eccbytes = chip->ecc.bytes; |
| 1907 | uint8_t *oob = chip->oob_poi; |
| 1908 | int steps, size; |
| 1909 | |
| 1910 | for (steps = chip->ecc.steps; steps > 0; steps--) { |
| 1911 | chip->write_buf(mtd, buf, eccsize); |
| 1912 | buf += eccsize; |
| 1913 | |
| 1914 | if (chip->ecc.prepad) { |
| 1915 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 1916 | oob += chip->ecc.prepad; |
| 1917 | } |
| 1918 | |
| 1919 | chip->read_buf(mtd, oob, eccbytes); |
| 1920 | oob += eccbytes; |
| 1921 | |
| 1922 | if (chip->ecc.postpad) { |
| 1923 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 1924 | oob += chip->ecc.postpad; |
| 1925 | } |
| 1926 | } |
| 1927 | |
| 1928 | size = mtd->oobsize - (oob - chip->oob_poi); |
| 1929 | if (size) |
| 1930 | chip->write_buf(mtd, oob, size); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 1931 | |
| 1932 | return 0; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1933 | } |
| 1934 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1935 | * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1936 | * @mtd: mtd info structure |
| 1937 | * @chip: nand chip info structure |
| 1938 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1939 | * @oob_required: must write chip->oob_poi to OOB |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1940 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 1941 | static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1942 | const uint8_t *buf, int oob_required) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1943 | { |
| 1944 | int i, eccsize = chip->ecc.size; |
| 1945 | int eccbytes = chip->ecc.bytes; |
| 1946 | int eccsteps = chip->ecc.steps; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1947 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1948 | const uint8_t *p = buf; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1949 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1950 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1951 | /* Software ECC calculation */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1952 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 1953 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1954 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1955 | for (i = 0; i < chip->ecc.total; i++) |
| 1956 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1957 | |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 1958 | return chip->ecc.write_page_raw(mtd, chip, buf, 1); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1959 | } |
| 1960 | |
| 1961 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1962 | * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1963 | * @mtd: mtd info structure |
| 1964 | * @chip: nand chip info structure |
| 1965 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1966 | * @oob_required: must write chip->oob_poi to OOB |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1967 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 1968 | static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1969 | const uint8_t *buf, int oob_required) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1970 | { |
| 1971 | int i, eccsize = chip->ecc.size; |
| 1972 | int eccbytes = chip->ecc.bytes; |
| 1973 | int eccsteps = chip->ecc.steps; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1974 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1975 | const uint8_t *p = buf; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1976 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1977 | |
| 1978 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1979 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
David Woodhouse | 29da9ce | 2006-05-26 23:05:44 +0100 | [diff] [blame] | 1980 | chip->write_buf(mtd, p, eccsize); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1981 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1982 | } |
| 1983 | |
| 1984 | for (i = 0; i < chip->ecc.total; i++) |
| 1985 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 1986 | |
| 1987 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 1988 | |
| 1989 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1990 | } |
| 1991 | |
| 1992 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1993 | * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1994 | * @mtd: mtd info structure |
| 1995 | * @chip: nand chip info structure |
| 1996 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1997 | * @oob_required: must write chip->oob_poi to OOB |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1998 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1999 | * The hw generator calculates the error syndrome automatically. Therefore we |
| 2000 | * need a special oob layout and handling. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2001 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2002 | static int nand_write_page_syndrome(struct mtd_info *mtd, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2003 | struct nand_chip *chip, |
| 2004 | const uint8_t *buf, int oob_required) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2005 | { |
| 2006 | int i, eccsize = chip->ecc.size; |
| 2007 | int eccbytes = chip->ecc.bytes; |
| 2008 | int eccsteps = chip->ecc.steps; |
| 2009 | const uint8_t *p = buf; |
| 2010 | uint8_t *oob = chip->oob_poi; |
| 2011 | |
| 2012 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 2013 | |
| 2014 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 2015 | chip->write_buf(mtd, p, eccsize); |
| 2016 | |
| 2017 | if (chip->ecc.prepad) { |
| 2018 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 2019 | oob += chip->ecc.prepad; |
| 2020 | } |
| 2021 | |
| 2022 | chip->ecc.calculate(mtd, p, oob); |
| 2023 | chip->write_buf(mtd, oob, eccbytes); |
| 2024 | oob += eccbytes; |
| 2025 | |
| 2026 | if (chip->ecc.postpad) { |
| 2027 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 2028 | oob += chip->ecc.postpad; |
| 2029 | } |
| 2030 | } |
| 2031 | |
| 2032 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 2033 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2034 | if (i) |
| 2035 | chip->write_buf(mtd, oob, i); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2036 | |
| 2037 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2038 | } |
| 2039 | |
| 2040 | /** |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2041 | * nand_write_page - [REPLACEABLE] write one page |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2042 | * @mtd: MTD device structure |
| 2043 | * @chip: NAND chip descriptor |
| 2044 | * @buf: the data to write |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2045 | * @oob_required: must write chip->oob_poi to OOB |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2046 | * @page: page number to write |
| 2047 | * @cached: cached programming |
| 2048 | * @raw: use _raw version of write_page |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2049 | */ |
| 2050 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2051 | const uint8_t *buf, int oob_required, int page, |
| 2052 | int cached, int raw) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2053 | { |
| 2054 | int status; |
| 2055 | |
| 2056 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
| 2057 | |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2058 | if (unlikely(raw)) |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2059 | status = chip->ecc.write_page_raw(mtd, chip, buf, oob_required); |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2060 | else |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2061 | status = chip->ecc.write_page(mtd, chip, buf, oob_required); |
| 2062 | |
| 2063 | if (status < 0) |
| 2064 | return status; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2065 | |
| 2066 | /* |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2067 | * Cached progamming disabled for now. Not sure if it's worth the |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2068 | * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s). |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2069 | */ |
| 2070 | cached = 0; |
| 2071 | |
| 2072 | if (!cached || !(chip->options & NAND_CACHEPRG)) { |
| 2073 | |
| 2074 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2075 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2076 | /* |
| 2077 | * See if operation failed and additional status checks are |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2078 | * available. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2079 | */ |
| 2080 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 2081 | status = chip->errstat(mtd, chip, FL_WRITING, status, |
| 2082 | page); |
| 2083 | |
| 2084 | if (status & NAND_STATUS_FAIL) |
| 2085 | return -EIO; |
| 2086 | } else { |
| 2087 | chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2088 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2089 | } |
| 2090 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2091 | return 0; |
| 2092 | } |
| 2093 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2094 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2095 | * nand_fill_oob - [INTERN] Transfer client buffer to oob |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2096 | * @mtd: MTD device structure |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2097 | * @oob: oob data buffer |
| 2098 | * @len: oob data write length |
| 2099 | * @ops: oob ops structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2100 | */ |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2101 | static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len, |
| 2102 | struct mtd_oob_ops *ops) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2103 | { |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2104 | struct nand_chip *chip = mtd->priv; |
| 2105 | |
| 2106 | /* |
| 2107 | * Initialise to all 0xFF, to avoid the possibility of left over OOB |
| 2108 | * data from a previous OOB read. |
| 2109 | */ |
| 2110 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
| 2111 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2112 | switch (ops->mode) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2113 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2114 | case MTD_OPS_PLACE_OOB: |
| 2115 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2116 | memcpy(chip->oob_poi + ops->ooboffs, oob, len); |
| 2117 | return oob + len; |
| 2118 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2119 | case MTD_OPS_AUTO_OOB: { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2120 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2121 | uint32_t boffs = 0, woffs = ops->ooboffs; |
| 2122 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2123 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2124 | for (; free->length && len; free++, len -= bytes) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2125 | /* Write request not from offset 0? */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2126 | if (unlikely(woffs)) { |
| 2127 | if (woffs >= free->length) { |
| 2128 | woffs -= free->length; |
| 2129 | continue; |
| 2130 | } |
| 2131 | boffs = free->offset + woffs; |
| 2132 | bytes = min_t(size_t, len, |
| 2133 | (free->length - woffs)); |
| 2134 | woffs = 0; |
| 2135 | } else { |
| 2136 | bytes = min_t(size_t, len, free->length); |
| 2137 | boffs = free->offset; |
| 2138 | } |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 2139 | memcpy(chip->oob_poi + boffs, oob, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2140 | oob += bytes; |
| 2141 | } |
| 2142 | return oob; |
| 2143 | } |
| 2144 | default: |
| 2145 | BUG(); |
| 2146 | } |
| 2147 | return NULL; |
| 2148 | } |
| 2149 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2150 | #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2151 | |
| 2152 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2153 | * nand_do_write_ops - [INTERN] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2154 | * @mtd: MTD device structure |
| 2155 | * @to: offset to write to |
| 2156 | * @ops: oob operations description structure |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2157 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2158 | * NAND write with ECC. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2159 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2160 | static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, |
| 2161 | struct mtd_oob_ops *ops) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2162 | { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2163 | int chipnr, realpage, page, blockmask, column; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2164 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2165 | uint32_t writelen = ops->len; |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2166 | |
| 2167 | uint32_t oobwritelen = ops->ooblen; |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2168 | uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ? |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2169 | mtd->oobavail : mtd->oobsize; |
| 2170 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2171 | uint8_t *oob = ops->oobbuf; |
| 2172 | uint8_t *buf = ops->datbuf; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2173 | int ret, subpage; |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 2174 | int oob_required = oob ? 1 : 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2175 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2176 | ops->retlen = 0; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2177 | if (!writelen) |
| 2178 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2179 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2180 | /* Reject writes, which are not page aligned */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2181 | if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 2182 | pr_notice("%s: attempt to write non page aligned data\n", |
| 2183 | __func__); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2184 | return -EINVAL; |
| 2185 | } |
| 2186 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2187 | column = to & (mtd->writesize - 1); |
| 2188 | subpage = column || (writelen & (mtd->writesize - 1)); |
| 2189 | |
| 2190 | if (subpage && oob) |
| 2191 | return -EINVAL; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2192 | |
Thomas Gleixner | 6a93096 | 2006-06-28 00:11:45 +0200 | [diff] [blame] | 2193 | chipnr = (int)(to >> chip->chip_shift); |
| 2194 | chip->select_chip(mtd, chipnr); |
| 2195 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2196 | /* Check, if it is write protected */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2197 | if (nand_check_wp(mtd)) { |
| 2198 | ret = -EIO; |
| 2199 | goto err_out; |
| 2200 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2201 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2202 | realpage = (int)(to >> chip->page_shift); |
| 2203 | page = realpage & chip->pagemask; |
| 2204 | blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 2205 | |
| 2206 | /* Invalidate the page cache, when we write to the cached page */ |
| 2207 | if (to <= (chip->pagebuf << chip->page_shift) && |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2208 | (chip->pagebuf << chip->page_shift) < (to + ops->len)) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2209 | chip->pagebuf = -1; |
| 2210 | |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2211 | /* Don't allow multipage oob writes with offset */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2212 | if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) { |
| 2213 | ret = -EINVAL; |
| 2214 | goto err_out; |
| 2215 | } |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2216 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2217 | while (1) { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2218 | int bytes = mtd->writesize; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2219 | int cached = writelen > bytes && page != blockmask; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2220 | uint8_t *wbuf = buf; |
| 2221 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2222 | /* Partial page write? */ |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2223 | if (unlikely(column || writelen < (mtd->writesize - 1))) { |
| 2224 | cached = 0; |
| 2225 | bytes = min_t(int, bytes - column, (int) writelen); |
| 2226 | chip->pagebuf = -1; |
| 2227 | memset(chip->buffers->databuf, 0xff, mtd->writesize); |
| 2228 | memcpy(&chip->buffers->databuf[column], buf, bytes); |
| 2229 | wbuf = chip->buffers->databuf; |
| 2230 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2231 | |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2232 | if (unlikely(oob)) { |
| 2233 | size_t len = min(oobwritelen, oobmaxlen); |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2234 | oob = nand_fill_oob(mtd, oob, len, ops); |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2235 | oobwritelen -= len; |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2236 | } else { |
| 2237 | /* We still need to erase leftover OOB data */ |
| 2238 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2239 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2240 | |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 2241 | ret = chip->write_page(mtd, chip, wbuf, oob_required, page, |
| 2242 | cached, (ops->mode == MTD_OPS_RAW)); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2243 | if (ret) |
| 2244 | break; |
| 2245 | |
| 2246 | writelen -= bytes; |
| 2247 | if (!writelen) |
| 2248 | break; |
| 2249 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2250 | column = 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2251 | buf += bytes; |
| 2252 | realpage++; |
| 2253 | |
| 2254 | page = realpage & chip->pagemask; |
| 2255 | /* Check, if we cross a chip boundary */ |
| 2256 | if (!page) { |
| 2257 | chipnr++; |
| 2258 | chip->select_chip(mtd, -1); |
| 2259 | chip->select_chip(mtd, chipnr); |
| 2260 | } |
| 2261 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2262 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2263 | ops->retlen = ops->len - writelen; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2264 | if (unlikely(oob)) |
| 2265 | ops->oobretlen = ops->ooblen; |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2266 | |
| 2267 | err_out: |
| 2268 | chip->select_chip(mtd, -1); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2269 | return ret; |
| 2270 | } |
| 2271 | |
| 2272 | /** |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2273 | * panic_nand_write - [MTD Interface] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2274 | * @mtd: MTD device structure |
| 2275 | * @to: offset to write to |
| 2276 | * @len: number of bytes to write |
| 2277 | * @retlen: pointer to variable to store the number of written bytes |
| 2278 | * @buf: the data to write |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2279 | * |
| 2280 | * NAND write with ECC. Used when performing writes in interrupt context, this |
| 2281 | * may for example be called by mtdoops when writing an oops while in panic. |
| 2282 | */ |
| 2283 | static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
| 2284 | size_t *retlen, const uint8_t *buf) |
| 2285 | { |
| 2286 | struct nand_chip *chip = mtd->priv; |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2287 | struct mtd_oob_ops ops; |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2288 | int ret; |
| 2289 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2290 | /* Wait for the device to get ready */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2291 | panic_nand_wait(mtd, chip, 400); |
| 2292 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2293 | /* Grab the device */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2294 | panic_nand_get_device(chip, mtd, FL_WRITING); |
| 2295 | |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2296 | ops.len = len; |
| 2297 | ops.datbuf = (uint8_t *)buf; |
| 2298 | ops.oobbuf = NULL; |
Huang Shijie | 11041ae | 2012-07-03 16:44:14 +0800 | [diff] [blame] | 2299 | ops.mode = MTD_OPS_PLACE_OOB; |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2300 | |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2301 | ret = nand_do_write_ops(mtd, to, &ops); |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2302 | |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2303 | *retlen = ops.retlen; |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2304 | return ret; |
| 2305 | } |
| 2306 | |
| 2307 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2308 | * nand_write - [MTD Interface] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2309 | * @mtd: MTD device structure |
| 2310 | * @to: offset to write to |
| 2311 | * @len: number of bytes to write |
| 2312 | * @retlen: pointer to variable to store the number of written bytes |
| 2313 | * @buf: the data to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2314 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2315 | * NAND write with ECC. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2316 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2317 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2318 | size_t *retlen, const uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2319 | { |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2320 | struct mtd_oob_ops ops; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2321 | int ret; |
| 2322 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2323 | nand_get_device(mtd, FL_WRITING); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2324 | ops.len = len; |
| 2325 | ops.datbuf = (uint8_t *)buf; |
| 2326 | ops.oobbuf = NULL; |
Huang Shijie | 11041ae | 2012-07-03 16:44:14 +0800 | [diff] [blame] | 2327 | ops.mode = MTD_OPS_PLACE_OOB; |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2328 | ret = nand_do_write_ops(mtd, to, &ops); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2329 | *retlen = ops.retlen; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2330 | nand_release_device(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2331 | return ret; |
| 2332 | } |
| 2333 | |
| 2334 | /** |
| 2335 | * nand_do_write_oob - [MTD Interface] NAND write out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2336 | * @mtd: MTD device structure |
| 2337 | * @to: offset to write to |
| 2338 | * @ops: oob operation description structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2339 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2340 | * NAND write out-of-band. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2341 | */ |
| 2342 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 2343 | struct mtd_oob_ops *ops) |
| 2344 | { |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2345 | int chipnr, page, status, len; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2346 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2347 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2348 | pr_debug("%s: to = 0x%08x, len = %i\n", |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2349 | __func__, (unsigned int)to, (int)ops->ooblen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2350 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2351 | if (ops->mode == MTD_OPS_AUTO_OOB) |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2352 | len = chip->ecc.layout->oobavail; |
| 2353 | else |
| 2354 | len = mtd->oobsize; |
| 2355 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2356 | /* Do not allow write past end of page */ |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2357 | if ((ops->ooboffs + ops->ooblen) > len) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2358 | pr_debug("%s: attempt to write past end of page\n", |
| 2359 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2360 | return -EINVAL; |
| 2361 | } |
| 2362 | |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2363 | if (unlikely(ops->ooboffs >= len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2364 | pr_debug("%s: attempt to start write outside oob\n", |
| 2365 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2366 | return -EINVAL; |
| 2367 | } |
| 2368 | |
Jason Liu | 775adc3 | 2011-02-25 13:06:18 +0800 | [diff] [blame] | 2369 | /* Do not allow write past end of device */ |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2370 | if (unlikely(to >= mtd->size || |
| 2371 | ops->ooboffs + ops->ooblen > |
| 2372 | ((mtd->size >> chip->page_shift) - |
| 2373 | (to >> chip->page_shift)) * len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2374 | pr_debug("%s: attempt to write beyond end of device\n", |
| 2375 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2376 | return -EINVAL; |
| 2377 | } |
| 2378 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2379 | chipnr = (int)(to >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2380 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2381 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2382 | /* Shift to get page */ |
| 2383 | page = (int)(to >> chip->page_shift); |
| 2384 | |
| 2385 | /* |
| 2386 | * Reset the chip. Some chips (like the Toshiba TC5832DC found in one |
| 2387 | * of my DiskOnChip 2000 test units) will clear the whole data page too |
| 2388 | * if we don't do this. I have no clue why, but I seem to have 'fixed' |
| 2389 | * it in the doc2000 driver in August 1999. dwmw2. |
| 2390 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2391 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2392 | |
| 2393 | /* Check, if it is write protected */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2394 | if (nand_check_wp(mtd)) { |
| 2395 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2396 | return -EROFS; |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2397 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2398 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2399 | /* Invalidate the page cache, if we write to the cached page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2400 | if (page == chip->pagebuf) |
| 2401 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2402 | |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2403 | nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops); |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 2404 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2405 | if (ops->mode == MTD_OPS_RAW) |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 2406 | status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask); |
| 2407 | else |
| 2408 | status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2409 | |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2410 | chip->select_chip(mtd, -1); |
| 2411 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2412 | if (status) |
| 2413 | return status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2414 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2415 | ops->oobretlen = ops->ooblen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2416 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2417 | return 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2418 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2419 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2420 | /** |
| 2421 | * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2422 | * @mtd: MTD device structure |
| 2423 | * @to: offset to write to |
| 2424 | * @ops: oob operation description structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2425 | */ |
| 2426 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, |
| 2427 | struct mtd_oob_ops *ops) |
| 2428 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2429 | int ret = -ENOTSUPP; |
| 2430 | |
| 2431 | ops->retlen = 0; |
| 2432 | |
| 2433 | /* Do not allow writes past end of device */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2434 | if (ops->datbuf && (to + ops->len) > mtd->size) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2435 | pr_debug("%s: attempt to write beyond end of device\n", |
| 2436 | __func__); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2437 | return -EINVAL; |
| 2438 | } |
| 2439 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2440 | nand_get_device(mtd, FL_WRITING); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2441 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2442 | switch (ops->mode) { |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2443 | case MTD_OPS_PLACE_OOB: |
| 2444 | case MTD_OPS_AUTO_OOB: |
| 2445 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2446 | break; |
| 2447 | |
| 2448 | default: |
| 2449 | goto out; |
| 2450 | } |
| 2451 | |
| 2452 | if (!ops->datbuf) |
| 2453 | ret = nand_do_write_oob(mtd, to, ops); |
| 2454 | else |
| 2455 | ret = nand_do_write_ops(mtd, to, ops); |
| 2456 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2457 | out: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2458 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2459 | return ret; |
| 2460 | } |
| 2461 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2462 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2463 | * single_erase_cmd - [GENERIC] NAND standard block erase command function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2464 | * @mtd: MTD device structure |
| 2465 | * @page: the page address of the block which will be erased |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2466 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2467 | * Standard erase command for NAND chips. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2468 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2469 | static void single_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2470 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2471 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2472 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2473 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 2474 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2475 | } |
| 2476 | |
| 2477 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2478 | * nand_erase - [MTD Interface] erase block(s) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2479 | * @mtd: MTD device structure |
| 2480 | * @instr: erase instruction |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2481 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2482 | * Erase one ore more blocks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2483 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2484 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2485 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2486 | return nand_erase_nand(mtd, instr, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2487 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2488 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2489 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2490 | * nand_erase_nand - [INTERN] erase block(s) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2491 | * @mtd: MTD device structure |
| 2492 | * @instr: erase instruction |
| 2493 | * @allowbbt: allow erasing the bbt area |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2494 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2495 | * Erase one ore more blocks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2496 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2497 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, |
| 2498 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2499 | { |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2500 | int page, status, pages_per_block, ret, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2501 | struct nand_chip *chip = mtd->priv; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2502 | loff_t len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2503 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2504 | pr_debug("%s: start = 0x%012llx, len = %llu\n", |
| 2505 | __func__, (unsigned long long)instr->addr, |
| 2506 | (unsigned long long)instr->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2507 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 2508 | if (check_offs_len(mtd, instr->addr, instr->len)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2509 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2510 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2511 | /* Grab the lock and see if the device is available */ |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2512 | nand_get_device(mtd, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2513 | |
| 2514 | /* Shift to get first page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2515 | page = (int)(instr->addr >> chip->page_shift); |
| 2516 | chipnr = (int)(instr->addr >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2517 | |
| 2518 | /* Calculate pages in each block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2519 | pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2520 | |
| 2521 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2522 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2523 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2524 | /* Check, if it is write protected */ |
| 2525 | if (nand_check_wp(mtd)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2526 | pr_debug("%s: device is write protected!\n", |
| 2527 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2528 | instr->state = MTD_ERASE_FAILED; |
| 2529 | goto erase_exit; |
| 2530 | } |
| 2531 | |
| 2532 | /* Loop through the pages */ |
| 2533 | len = instr->len; |
| 2534 | |
| 2535 | instr->state = MTD_ERASING; |
| 2536 | |
| 2537 | while (len) { |
Wolfram Sang | 12183a2 | 2011-12-21 23:01:20 +0100 | [diff] [blame] | 2538 | /* Check if we have a bad block, we do not erase bad blocks! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2539 | if (nand_block_checkbad(mtd, ((loff_t) page) << |
| 2540 | chip->page_shift, 0, allowbbt)) { |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 2541 | pr_warn("%s: attempt to erase a bad block at page 0x%08x\n", |
| 2542 | __func__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2543 | instr->state = MTD_ERASE_FAILED; |
| 2544 | goto erase_exit; |
| 2545 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2546 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2547 | /* |
| 2548 | * Invalidate the page cache, if we erase the block which |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2549 | * contains the current cached page. |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2550 | */ |
| 2551 | if (page <= chip->pagebuf && chip->pagebuf < |
| 2552 | (page + pages_per_block)) |
| 2553 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2554 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2555 | chip->erase_cmd(mtd, page & chip->pagemask); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2556 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2557 | status = chip->waitfunc(mtd, chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2558 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2559 | /* |
| 2560 | * See if operation failed and additional status checks are |
| 2561 | * available |
| 2562 | */ |
| 2563 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 2564 | status = chip->errstat(mtd, chip, FL_ERASING, |
| 2565 | status, page); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 2566 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2567 | /* See if block erase succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 2568 | if (status & NAND_STATUS_FAIL) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2569 | pr_debug("%s: failed erase, page 0x%08x\n", |
| 2570 | __func__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2571 | instr->state = MTD_ERASE_FAILED; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2572 | instr->fail_addr = |
| 2573 | ((loff_t)page << chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2574 | goto erase_exit; |
| 2575 | } |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2576 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2577 | /* Increment page address and decrement length */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2578 | len -= (1 << chip->phys_erase_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2579 | page += pages_per_block; |
| 2580 | |
| 2581 | /* Check, if we cross a chip boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2582 | if (len && !(page & chip->pagemask)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2583 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2584 | chip->select_chip(mtd, -1); |
| 2585 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2586 | } |
| 2587 | } |
| 2588 | instr->state = MTD_ERASE_DONE; |
| 2589 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2590 | erase_exit: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2591 | |
| 2592 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2593 | |
| 2594 | /* Deselect and wake up anyone waiting on the device */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2595 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2596 | nand_release_device(mtd); |
| 2597 | |
David Woodhouse | 49defc0 | 2007-10-06 15:01:59 -0400 | [diff] [blame] | 2598 | /* Do call back function */ |
| 2599 | if (!ret) |
| 2600 | mtd_erase_callback(instr); |
| 2601 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2602 | /* Return more or less happy */ |
| 2603 | return ret; |
| 2604 | } |
| 2605 | |
| 2606 | /** |
| 2607 | * nand_sync - [MTD Interface] sync |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2608 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2609 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2610 | * Sync is actually a wait for chip ready function. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2611 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2612 | static void nand_sync(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2613 | { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2614 | pr_debug("%s: called\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2615 | |
| 2616 | /* Grab the lock and see if the device is available */ |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2617 | nand_get_device(mtd, FL_SYNCING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2618 | /* Release it and go back */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2619 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2620 | } |
| 2621 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2622 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2623 | * nand_block_isbad - [MTD Interface] Check if block at offset is bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2624 | * @mtd: MTD device structure |
| 2625 | * @offs: offset relative to mtd start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2626 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2627 | static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2628 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2629 | return nand_block_checkbad(mtd, offs, 1, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2630 | } |
| 2631 | |
| 2632 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2633 | * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2634 | * @mtd: MTD device structure |
| 2635 | * @ofs: offset relative to mtd start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2636 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2637 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2638 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2639 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2640 | int ret; |
| 2641 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2642 | ret = nand_block_isbad(mtd, ofs); |
| 2643 | if (ret) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2644 | /* If it was bad already, return success and do nothing */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2645 | if (ret > 0) |
| 2646 | return 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2647 | return ret; |
| 2648 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2649 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2650 | return chip->block_markbad(mtd, ofs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2651 | } |
| 2652 | |
| 2653 | /** |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 2654 | * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand |
| 2655 | * @mtd: MTD device structure |
| 2656 | * @chip: nand chip info structure |
| 2657 | * @addr: feature address. |
| 2658 | * @subfeature_param: the subfeature parameters, a four bytes array. |
| 2659 | */ |
| 2660 | static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip, |
| 2661 | int addr, uint8_t *subfeature_param) |
| 2662 | { |
| 2663 | int status; |
| 2664 | |
| 2665 | if (!chip->onfi_version) |
| 2666 | return -EINVAL; |
| 2667 | |
| 2668 | chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1); |
| 2669 | chip->write_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN); |
| 2670 | status = chip->waitfunc(mtd, chip); |
| 2671 | if (status & NAND_STATUS_FAIL) |
| 2672 | return -EIO; |
| 2673 | return 0; |
| 2674 | } |
| 2675 | |
| 2676 | /** |
| 2677 | * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand |
| 2678 | * @mtd: MTD device structure |
| 2679 | * @chip: nand chip info structure |
| 2680 | * @addr: feature address. |
| 2681 | * @subfeature_param: the subfeature parameters, a four bytes array. |
| 2682 | */ |
| 2683 | static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip, |
| 2684 | int addr, uint8_t *subfeature_param) |
| 2685 | { |
| 2686 | if (!chip->onfi_version) |
| 2687 | return -EINVAL; |
| 2688 | |
| 2689 | /* clear the sub feature parameters */ |
| 2690 | memset(subfeature_param, 0, ONFI_SUBFEATURE_PARAM_LEN); |
| 2691 | |
| 2692 | chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1); |
| 2693 | chip->read_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN); |
| 2694 | return 0; |
| 2695 | } |
| 2696 | |
| 2697 | /** |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2698 | * nand_suspend - [MTD Interface] Suspend the NAND flash |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2699 | * @mtd: MTD device structure |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2700 | */ |
| 2701 | static int nand_suspend(struct mtd_info *mtd) |
| 2702 | { |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2703 | return nand_get_device(mtd, FL_PM_SUSPENDED); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2704 | } |
| 2705 | |
| 2706 | /** |
| 2707 | * nand_resume - [MTD Interface] Resume the NAND flash |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2708 | * @mtd: MTD device structure |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2709 | */ |
| 2710 | static void nand_resume(struct mtd_info *mtd) |
| 2711 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2712 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2713 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2714 | if (chip->state == FL_PM_SUSPENDED) |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2715 | nand_release_device(mtd); |
| 2716 | else |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 2717 | pr_err("%s called for a chip which is not in suspended state\n", |
| 2718 | __func__); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2719 | } |
| 2720 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2721 | /* Set default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2722 | static void nand_set_defaults(struct nand_chip *chip, int busw) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2723 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2724 | /* check for proper chip_delay setup, set 20us if not */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2725 | if (!chip->chip_delay) |
| 2726 | chip->chip_delay = 20; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2727 | |
| 2728 | /* check, if a user supplied command function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2729 | if (chip->cmdfunc == NULL) |
| 2730 | chip->cmdfunc = nand_command; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2731 | |
| 2732 | /* check, if a user supplied wait function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2733 | if (chip->waitfunc == NULL) |
| 2734 | chip->waitfunc = nand_wait; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2735 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2736 | if (!chip->select_chip) |
| 2737 | chip->select_chip = nand_select_chip; |
| 2738 | if (!chip->read_byte) |
| 2739 | chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; |
| 2740 | if (!chip->read_word) |
| 2741 | chip->read_word = nand_read_word; |
| 2742 | if (!chip->block_bad) |
| 2743 | chip->block_bad = nand_block_bad; |
| 2744 | if (!chip->block_markbad) |
| 2745 | chip->block_markbad = nand_default_block_markbad; |
| 2746 | if (!chip->write_buf) |
| 2747 | chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; |
| 2748 | if (!chip->read_buf) |
| 2749 | chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2750 | if (!chip->scan_bbt) |
| 2751 | chip->scan_bbt = nand_default_bbt; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2752 | |
| 2753 | if (!chip->controller) { |
| 2754 | chip->controller = &chip->hwcontrol; |
| 2755 | spin_lock_init(&chip->controller->lock); |
| 2756 | init_waitqueue_head(&chip->controller->wq); |
| 2757 | } |
| 2758 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2759 | } |
| 2760 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2761 | /* Sanitize ONFI strings so we can safely print them */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2762 | static void sanitize_string(uint8_t *s, size_t len) |
| 2763 | { |
| 2764 | ssize_t i; |
| 2765 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2766 | /* Null terminate */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2767 | s[len - 1] = 0; |
| 2768 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2769 | /* Remove non printable chars */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2770 | for (i = 0; i < len - 1; i++) { |
| 2771 | if (s[i] < ' ' || s[i] > 127) |
| 2772 | s[i] = '?'; |
| 2773 | } |
| 2774 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2775 | /* Remove trailing spaces */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 2776 | strim(s); |
| 2777 | } |
| 2778 | |
| 2779 | static u16 onfi_crc16(u16 crc, u8 const *p, size_t len) |
| 2780 | { |
| 2781 | int i; |
| 2782 | while (len--) { |
| 2783 | crc ^= *p++ << 8; |
| 2784 | for (i = 0; i < 8; i++) |
| 2785 | crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0); |
| 2786 | } |
| 2787 | |
| 2788 | return crc; |
| 2789 | } |
| 2790 | |
| 2791 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2792 | * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise. |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2793 | */ |
| 2794 | static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, |
Matthieu CASTET | 08c248f | 2011-06-26 18:26:55 +0200 | [diff] [blame] | 2795 | int *busw) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2796 | { |
| 2797 | struct nand_onfi_params *p = &chip->onfi_params; |
| 2798 | int i; |
| 2799 | int val; |
| 2800 | |
Matthieu CASTET | 0ce82b7 | 2013-01-16 15:25:45 +0100 | [diff] [blame] | 2801 | /* ONFI need to be probed in 8 bits mode, and 16 bits should be selected with NAND_BUSWIDTH_AUTO */ |
| 2802 | if (chip->options & NAND_BUSWIDTH_16) { |
| 2803 | pr_err("Trying ONFI probe in 16 bits mode, aborting !\n"); |
| 2804 | return 0; |
| 2805 | } |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2806 | /* Try ONFI for unknown chip or LP */ |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2807 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); |
| 2808 | if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || |
| 2809 | chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') |
| 2810 | return 0; |
| 2811 | |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2812 | chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); |
| 2813 | for (i = 0; i < 3; i++) { |
| 2814 | chip->read_buf(mtd, (uint8_t *)p, sizeof(*p)); |
| 2815 | if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) == |
| 2816 | le16_to_cpu(p->crc)) { |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 2817 | pr_info("ONFI param page %d valid\n", i); |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2818 | break; |
| 2819 | } |
| 2820 | } |
| 2821 | |
| 2822 | if (i == 3) |
| 2823 | return 0; |
| 2824 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2825 | /* Check version */ |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2826 | val = le16_to_cpu(p->revision); |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 2827 | if (val & (1 << 5)) |
| 2828 | chip->onfi_version = 23; |
| 2829 | else if (val & (1 << 4)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2830 | chip->onfi_version = 22; |
| 2831 | else if (val & (1 << 3)) |
| 2832 | chip->onfi_version = 21; |
| 2833 | else if (val & (1 << 2)) |
| 2834 | chip->onfi_version = 20; |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 2835 | else if (val & (1 << 1)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2836 | chip->onfi_version = 10; |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 2837 | else |
| 2838 | chip->onfi_version = 0; |
| 2839 | |
| 2840 | if (!chip->onfi_version) { |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 2841 | pr_info("%s: unsupported ONFI version: %d\n", __func__, val); |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 2842 | return 0; |
| 2843 | } |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2844 | |
| 2845 | sanitize_string(p->manufacturer, sizeof(p->manufacturer)); |
| 2846 | sanitize_string(p->model, sizeof(p->model)); |
| 2847 | if (!mtd->name) |
| 2848 | mtd->name = p->model; |
| 2849 | mtd->writesize = le32_to_cpu(p->byte_per_page); |
| 2850 | mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; |
| 2851 | mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); |
Matthieu CASTET | 6379575 | 2012-03-19 15:35:25 +0100 | [diff] [blame] | 2852 | chip->chipsize = le32_to_cpu(p->blocks_per_lun); |
| 2853 | chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; |
Matthieu CASTET | 08c248f | 2011-06-26 18:26:55 +0200 | [diff] [blame] | 2854 | *busw = 0; |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2855 | if (le16_to_cpu(p->features) & 1) |
Matthieu CASTET | 08c248f | 2011-06-26 18:26:55 +0200 | [diff] [blame] | 2856 | *busw = NAND_BUSWIDTH_16; |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2857 | |
Huang Shijie | d42b5de | 2012-02-17 11:22:37 +0800 | [diff] [blame] | 2858 | pr_info("ONFI flash detected\n"); |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 2859 | return 1; |
| 2860 | } |
| 2861 | |
| 2862 | /* |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 2863 | * nand_id_has_period - Check if an ID string has a given wraparound period |
| 2864 | * @id_data: the ID string |
| 2865 | * @arrlen: the length of the @id_data array |
| 2866 | * @period: the period of repitition |
| 2867 | * |
| 2868 | * Check if an ID string is repeated within a given sequence of bytes at |
| 2869 | * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a |
Brian Norris | d4d4f1b | 2012-11-14 21:54:20 -0800 | [diff] [blame] | 2870 | * period of 3). This is a helper function for nand_id_len(). Returns non-zero |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 2871 | * if the repetition has a period of @period; otherwise, returns zero. |
| 2872 | */ |
| 2873 | static int nand_id_has_period(u8 *id_data, int arrlen, int period) |
| 2874 | { |
| 2875 | int i, j; |
| 2876 | for (i = 0; i < period; i++) |
| 2877 | for (j = i + period; j < arrlen; j += period) |
| 2878 | if (id_data[i] != id_data[j]) |
| 2879 | return 0; |
| 2880 | return 1; |
| 2881 | } |
| 2882 | |
| 2883 | /* |
| 2884 | * nand_id_len - Get the length of an ID string returned by CMD_READID |
| 2885 | * @id_data: the ID string |
| 2886 | * @arrlen: the length of the @id_data array |
| 2887 | |
| 2888 | * Returns the length of the ID string, according to known wraparound/trailing |
| 2889 | * zero patterns. If no pattern exists, returns the length of the array. |
| 2890 | */ |
| 2891 | static int nand_id_len(u8 *id_data, int arrlen) |
| 2892 | { |
| 2893 | int last_nonzero, period; |
| 2894 | |
| 2895 | /* Find last non-zero byte */ |
| 2896 | for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--) |
| 2897 | if (id_data[last_nonzero]) |
| 2898 | break; |
| 2899 | |
| 2900 | /* All zeros */ |
| 2901 | if (last_nonzero < 0) |
| 2902 | return 0; |
| 2903 | |
| 2904 | /* Calculate wraparound period */ |
| 2905 | for (period = 1; period < arrlen; period++) |
| 2906 | if (nand_id_has_period(id_data, arrlen, period)) |
| 2907 | break; |
| 2908 | |
| 2909 | /* There's a repeated pattern */ |
| 2910 | if (period < arrlen) |
| 2911 | return period; |
| 2912 | |
| 2913 | /* There are trailing zeros */ |
| 2914 | if (last_nonzero < arrlen - 1) |
| 2915 | return last_nonzero + 1; |
| 2916 | |
| 2917 | /* No pattern detected */ |
| 2918 | return arrlen; |
| 2919 | } |
| 2920 | |
| 2921 | /* |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 2922 | * Many new NAND share similar device ID codes, which represent the size of the |
| 2923 | * chip. The rest of the parameters must be decoded according to generic or |
| 2924 | * manufacturer-specific "extended ID" decoding patterns. |
| 2925 | */ |
| 2926 | static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, |
| 2927 | u8 id_data[8], int *busw) |
| 2928 | { |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 2929 | int extid, id_len; |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 2930 | /* The 3rd id byte holds MLC / multichip data */ |
| 2931 | chip->cellinfo = id_data[2]; |
| 2932 | /* The 4th id byte is the important one */ |
| 2933 | extid = id_data[3]; |
| 2934 | |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 2935 | id_len = nand_id_len(id_data, 8); |
| 2936 | |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 2937 | /* |
| 2938 | * Field definitions are in the following datasheets: |
| 2939 | * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32) |
Brian Norris | af451af | 2012-10-09 23:26:06 -0700 | [diff] [blame] | 2940 | * New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44) |
Brian Norris | 73ca392 | 2012-09-24 20:40:54 -0700 | [diff] [blame] | 2941 | * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22) |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 2942 | * |
Brian Norris | af451af | 2012-10-09 23:26:06 -0700 | [diff] [blame] | 2943 | * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung |
| 2944 | * ID to decide what to do. |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 2945 | */ |
Brian Norris | af451af | 2012-10-09 23:26:06 -0700 | [diff] [blame] | 2946 | if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG && |
Brian Norris | 6924d99 | 2012-11-14 21:46:30 -0800 | [diff] [blame] | 2947 | (chip->cellinfo & NAND_CI_CELLTYPE_MSK) && |
Brian Norris | af451af | 2012-10-09 23:26:06 -0700 | [diff] [blame] | 2948 | id_data[5] != 0x00) { |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 2949 | /* Calc pagesize */ |
| 2950 | mtd->writesize = 2048 << (extid & 0x03); |
| 2951 | extid >>= 2; |
| 2952 | /* Calc oobsize */ |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 2953 | switch (((extid >> 2) & 0x04) | (extid & 0x03)) { |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 2954 | case 1: |
| 2955 | mtd->oobsize = 128; |
| 2956 | break; |
| 2957 | case 2: |
| 2958 | mtd->oobsize = 218; |
| 2959 | break; |
| 2960 | case 3: |
| 2961 | mtd->oobsize = 400; |
| 2962 | break; |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 2963 | case 4: |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 2964 | mtd->oobsize = 436; |
| 2965 | break; |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 2966 | case 5: |
| 2967 | mtd->oobsize = 512; |
| 2968 | break; |
| 2969 | case 6: |
| 2970 | default: /* Other cases are "reserved" (unknown) */ |
| 2971 | mtd->oobsize = 640; |
| 2972 | break; |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 2973 | } |
| 2974 | extid >>= 2; |
| 2975 | /* Calc blocksize */ |
| 2976 | mtd->erasesize = (128 * 1024) << |
| 2977 | (((extid >> 1) & 0x04) | (extid & 0x03)); |
| 2978 | *busw = 0; |
Brian Norris | 73ca392 | 2012-09-24 20:40:54 -0700 | [diff] [blame] | 2979 | } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX && |
| 2980 | (chip->cellinfo & NAND_CI_CELLTYPE_MSK)) { |
| 2981 | unsigned int tmp; |
| 2982 | |
| 2983 | /* Calc pagesize */ |
| 2984 | mtd->writesize = 2048 << (extid & 0x03); |
| 2985 | extid >>= 2; |
| 2986 | /* Calc oobsize */ |
| 2987 | switch (((extid >> 2) & 0x04) | (extid & 0x03)) { |
| 2988 | case 0: |
| 2989 | mtd->oobsize = 128; |
| 2990 | break; |
| 2991 | case 1: |
| 2992 | mtd->oobsize = 224; |
| 2993 | break; |
| 2994 | case 2: |
| 2995 | mtd->oobsize = 448; |
| 2996 | break; |
| 2997 | case 3: |
| 2998 | mtd->oobsize = 64; |
| 2999 | break; |
| 3000 | case 4: |
| 3001 | mtd->oobsize = 32; |
| 3002 | break; |
| 3003 | case 5: |
| 3004 | mtd->oobsize = 16; |
| 3005 | break; |
| 3006 | default: |
| 3007 | mtd->oobsize = 640; |
| 3008 | break; |
| 3009 | } |
| 3010 | extid >>= 2; |
| 3011 | /* Calc blocksize */ |
| 3012 | tmp = ((extid >> 1) & 0x04) | (extid & 0x03); |
| 3013 | if (tmp < 0x03) |
| 3014 | mtd->erasesize = (128 * 1024) << tmp; |
| 3015 | else if (tmp == 0x03) |
| 3016 | mtd->erasesize = 768 * 1024; |
| 3017 | else |
| 3018 | mtd->erasesize = (64 * 1024) << tmp; |
| 3019 | *busw = 0; |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3020 | } else { |
| 3021 | /* Calc pagesize */ |
| 3022 | mtd->writesize = 1024 << (extid & 0x03); |
| 3023 | extid >>= 2; |
| 3024 | /* Calc oobsize */ |
| 3025 | mtd->oobsize = (8 << (extid & 0x01)) * |
| 3026 | (mtd->writesize >> 9); |
| 3027 | extid >>= 2; |
| 3028 | /* Calc blocksize. Blocksize is multiples of 64KiB */ |
| 3029 | mtd->erasesize = (64 * 1024) << (extid & 0x03); |
| 3030 | extid >>= 2; |
| 3031 | /* Get buswidth information */ |
| 3032 | *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; |
| 3033 | } |
| 3034 | } |
| 3035 | |
| 3036 | /* |
Brian Norris | f23a481 | 2012-09-24 20:40:51 -0700 | [diff] [blame] | 3037 | * Old devices have chip data hardcoded in the device ID table. nand_decode_id |
| 3038 | * decodes a matching ID table entry and assigns the MTD size parameters for |
| 3039 | * the chip. |
| 3040 | */ |
| 3041 | static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip, |
| 3042 | struct nand_flash_dev *type, u8 id_data[8], |
| 3043 | int *busw) |
| 3044 | { |
| 3045 | int maf_id = id_data[0]; |
| 3046 | |
| 3047 | mtd->erasesize = type->erasesize; |
| 3048 | mtd->writesize = type->pagesize; |
| 3049 | mtd->oobsize = mtd->writesize / 32; |
| 3050 | *busw = type->options & NAND_BUSWIDTH_16; |
| 3051 | |
| 3052 | /* |
| 3053 | * Check for Spansion/AMD ID + repeating 5th, 6th byte since |
| 3054 | * some Spansion chips have erasesize that conflicts with size |
| 3055 | * listed in nand_ids table. |
| 3056 | * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) |
| 3057 | */ |
| 3058 | if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00 |
| 3059 | && id_data[6] == 0x00 && id_data[7] == 0x00 |
| 3060 | && mtd->writesize == 512) { |
| 3061 | mtd->erasesize = 128 * 1024; |
| 3062 | mtd->erasesize <<= ((id_data[3] & 0x03) << 1); |
| 3063 | } |
| 3064 | } |
| 3065 | |
| 3066 | /* |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3067 | * Set the bad block marker/indicator (BBM/BBI) patterns according to some |
| 3068 | * heuristic patterns using various detected parameters (e.g., manufacturer, |
| 3069 | * page size, cell-type information). |
| 3070 | */ |
| 3071 | static void nand_decode_bbm_options(struct mtd_info *mtd, |
| 3072 | struct nand_chip *chip, u8 id_data[8]) |
| 3073 | { |
| 3074 | int maf_id = id_data[0]; |
| 3075 | |
| 3076 | /* Set the bad block position */ |
| 3077 | if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16)) |
| 3078 | chip->badblockpos = NAND_LARGE_BADBLOCK_POS; |
| 3079 | else |
| 3080 | chip->badblockpos = NAND_SMALL_BADBLOCK_POS; |
| 3081 | |
| 3082 | /* |
| 3083 | * Bad block marker is stored in the last page of each block on Samsung |
| 3084 | * and Hynix MLC devices; stored in first two pages of each block on |
| 3085 | * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba, |
| 3086 | * AMD/Spansion, and Macronix. All others scan only the first page. |
| 3087 | */ |
| 3088 | if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) && |
| 3089 | (maf_id == NAND_MFR_SAMSUNG || |
| 3090 | maf_id == NAND_MFR_HYNIX)) |
| 3091 | chip->bbt_options |= NAND_BBT_SCANLASTPAGE; |
| 3092 | else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) && |
| 3093 | (maf_id == NAND_MFR_SAMSUNG || |
| 3094 | maf_id == NAND_MFR_HYNIX || |
| 3095 | maf_id == NAND_MFR_TOSHIBA || |
| 3096 | maf_id == NAND_MFR_AMD || |
| 3097 | maf_id == NAND_MFR_MACRONIX)) || |
| 3098 | (mtd->writesize == 2048 && |
| 3099 | maf_id == NAND_MFR_MICRON)) |
| 3100 | chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; |
| 3101 | } |
| 3102 | |
| 3103 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3104 | * Get the flash and manufacturer id and lookup if the type is supported. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3105 | */ |
| 3106 | static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3107 | struct nand_chip *chip, |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3108 | int busw, |
| 3109 | int *maf_id, int *dev_id, |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3110 | struct nand_flash_dev *type) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3111 | { |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3112 | int i, maf_idx; |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 3113 | u8 id_data[8]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3114 | |
| 3115 | /* Select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3116 | chip->select_chip(mtd, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3117 | |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 3118 | /* |
| 3119 | * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3120 | * after power-up. |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 3121 | */ |
| 3122 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
| 3123 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3124 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3125 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3126 | |
| 3127 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3128 | *maf_id = chip->read_byte(mtd); |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3129 | *dev_id = chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3130 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3131 | /* |
| 3132 | * Try again to make sure, as some systems the bus-hold or other |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 3133 | * interface concerns can cause random data which looks like a |
| 3134 | * possibly credible NAND flash to appear. If the two results do |
| 3135 | * not match, ignore the device completely. |
| 3136 | */ |
| 3137 | |
| 3138 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
| 3139 | |
Brian Norris | 4aef9b7 | 2012-09-24 20:40:48 -0700 | [diff] [blame] | 3140 | /* Read entire ID string */ |
| 3141 | for (i = 0; i < 8; i++) |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 3142 | id_data[i] = chip->read_byte(mtd); |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 3143 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3144 | if (id_data[0] != *maf_id || id_data[1] != *dev_id) { |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3145 | pr_info("%s: second ID read did not match " |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3146 | "%02x,%02x against %02x,%02x\n", __func__, |
| 3147 | *maf_id, *dev_id, id_data[0], id_data[1]); |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 3148 | return ERR_PTR(-ENODEV); |
| 3149 | } |
| 3150 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3151 | if (!type) |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3152 | type = nand_flash_ids; |
| 3153 | |
| 3154 | for (; type->name != NULL; type++) |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3155 | if (*dev_id == type->id) |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 3156 | break; |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3157 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3158 | chip->onfi_version = 0; |
| 3159 | if (!type->name || !type->pagesize) { |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3160 | /* Check is chip is ONFI compliant */ |
Brian Norris | 47450b3 | 2012-09-24 20:40:47 -0700 | [diff] [blame] | 3161 | if (nand_flash_detect_onfi(mtd, chip, &busw)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3162 | goto ident_done; |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3163 | } |
| 3164 | |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3165 | if (!type->name) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3166 | return ERR_PTR(-ENODEV); |
| 3167 | |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 3168 | if (!mtd->name) |
| 3169 | mtd->name = type->name; |
| 3170 | |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 3171 | chip->chipsize = (uint64_t)type->chipsize << 20; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3172 | |
Huang Shijie | 12a40a5 | 2010-09-27 10:43:53 +0800 | [diff] [blame] | 3173 | if (!type->pagesize && chip->init_size) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3174 | /* Set the pagesize, oobsize, erasesize by the driver */ |
Huang Shijie | 12a40a5 | 2010-09-27 10:43:53 +0800 | [diff] [blame] | 3175 | busw = chip->init_size(mtd, chip, id_data); |
| 3176 | } else if (!type->pagesize) { |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3177 | /* Decode parameters from extended ID */ |
| 3178 | nand_decode_ext_id(mtd, chip, id_data, &busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3179 | } else { |
Brian Norris | f23a481 | 2012-09-24 20:40:51 -0700 | [diff] [blame] | 3180 | nand_decode_id(mtd, chip, type, id_data, &busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3181 | } |
Brian Norris | bf7a01b | 2012-07-13 09:28:24 -0700 | [diff] [blame] | 3182 | /* Get chip options */ |
| 3183 | chip->options |= type->options; |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3184 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3185 | /* |
| 3186 | * Check if chip is not a Samsung device. Do not clear the |
| 3187 | * options for chips which do not have an extended id. |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3188 | */ |
| 3189 | if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) |
| 3190 | chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; |
| 3191 | ident_done: |
| 3192 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3193 | /* Try to identify manufacturer */ |
David Woodhouse | 9a90986 | 2006-07-15 13:26:18 +0100 | [diff] [blame] | 3194 | for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3195 | if (nand_manuf_ids[maf_idx].id == *maf_id) |
| 3196 | break; |
| 3197 | } |
| 3198 | |
Matthieu CASTET | 64b37b2 | 2012-11-06 11:51:44 +0100 | [diff] [blame] | 3199 | if (chip->options & NAND_BUSWIDTH_AUTO) { |
| 3200 | WARN_ON(chip->options & NAND_BUSWIDTH_16); |
| 3201 | chip->options |= busw; |
| 3202 | nand_set_defaults(chip, busw); |
| 3203 | } else if (busw != (chip->options & NAND_BUSWIDTH_16)) { |
| 3204 | /* |
| 3205 | * Check, if buswidth is correct. Hardware drivers should set |
| 3206 | * chip correct! |
| 3207 | */ |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3208 | pr_info("NAND device: Manufacturer ID:" |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3209 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, |
| 3210 | *dev_id, nand_manuf_ids[maf_idx].name, mtd->name); |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3211 | pr_warn("NAND bus width %d instead %d bit\n", |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3212 | (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, |
| 3213 | busw ? 16 : 8); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3214 | return ERR_PTR(-EINVAL); |
| 3215 | } |
| 3216 | |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3217 | nand_decode_bbm_options(mtd, chip, id_data); |
| 3218 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3219 | /* Calculate the address shift from the page size */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3220 | chip->page_shift = ffs(mtd->writesize) - 1; |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3221 | /* Convert chipsize to number of pages per chip -1 */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3222 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3223 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3224 | chip->bbt_erase_shift = chip->phys_erase_shift = |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3225 | ffs(mtd->erasesize) - 1; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 3226 | if (chip->chipsize & 0xffffffff) |
| 3227 | chip->chip_shift = ffs((unsigned)chip->chipsize) - 1; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3228 | else { |
| 3229 | chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)); |
| 3230 | chip->chip_shift += 32 - 1; |
| 3231 | } |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3232 | |
Artem Bityutskiy | 26d9be1 | 2011-04-28 20:26:59 +0300 | [diff] [blame] | 3233 | chip->badblockbits = 8; |
Artem Bityutskiy | 14c6578 | 2013-03-04 14:21:34 +0200 | [diff] [blame^] | 3234 | chip->erase_cmd = single_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3235 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3236 | /* Do not replace user supplied command function! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3237 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 3238 | chip->cmdfunc = nand_command_lp; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3239 | |
Huang Shijie | 886bd33 | 2012-04-09 11:41:37 +0800 | [diff] [blame] | 3240 | pr_info("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s)," |
Matthieu CASTET | 2fd71a2 | 2012-11-22 18:33:40 +0100 | [diff] [blame] | 3241 | " %dMiB, page size: %d, OOB size: %d\n", |
Huang Shijie | 886bd33 | 2012-04-09 11:41:37 +0800 | [diff] [blame] | 3242 | *maf_id, *dev_id, nand_manuf_ids[maf_idx].name, |
| 3243 | chip->onfi_version ? chip->onfi_params.model : type->name, |
Matthieu CASTET | 2fd71a2 | 2012-11-22 18:33:40 +0100 | [diff] [blame] | 3244 | (int)(chip->chipsize >> 20), mtd->writesize, mtd->oobsize); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3245 | |
| 3246 | return type; |
| 3247 | } |
| 3248 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3249 | /** |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3250 | * nand_scan_ident - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3251 | * @mtd: MTD device structure |
| 3252 | * @maxchips: number of chips to scan for |
| 3253 | * @table: alternative NAND ID table |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3254 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3255 | * This is the first phase of the normal nand_scan() function. It reads the |
| 3256 | * flash ID and sets up MTD fields accordingly. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3257 | * |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3258 | * The mtd->owner field must be set to the module of the caller. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3259 | */ |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3260 | int nand_scan_ident(struct mtd_info *mtd, int maxchips, |
| 3261 | struct nand_flash_dev *table) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3262 | { |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3263 | int i, busw, nand_maf_id, nand_dev_id; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3264 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3265 | struct nand_flash_dev *type; |
| 3266 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3267 | /* Get buswidth to select the correct functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3268 | busw = chip->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3269 | /* Set the default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3270 | nand_set_defaults(chip, busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3271 | |
| 3272 | /* Read the flash type */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3273 | type = nand_get_flash_type(mtd, chip, busw, |
| 3274 | &nand_maf_id, &nand_dev_id, table); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3275 | |
| 3276 | if (IS_ERR(type)) { |
Ben Dooks | b1c6e6d | 2009-11-02 18:12:33 +0000 | [diff] [blame] | 3277 | if (!(chip->options & NAND_SCAN_SILENT_NODEV)) |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3278 | pr_warn("No NAND device found\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3279 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3280 | return PTR_ERR(type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3281 | } |
| 3282 | |
Huang Shijie | 0730016 | 2012-11-09 16:23:45 +0800 | [diff] [blame] | 3283 | chip->select_chip(mtd, -1); |
| 3284 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3285 | /* Check for a chip array */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3286 | for (i = 1; i < maxchips; i++) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3287 | chip->select_chip(mtd, i); |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 3288 | /* See comment in nand_get_flash_type for reset */ |
| 3289 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3290 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3291 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3292 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3293 | if (nand_maf_id != chip->read_byte(mtd) || |
Huang Shijie | 0730016 | 2012-11-09 16:23:45 +0800 | [diff] [blame] | 3294 | nand_dev_id != chip->read_byte(mtd)) { |
| 3295 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3296 | break; |
Huang Shijie | 0730016 | 2012-11-09 16:23:45 +0800 | [diff] [blame] | 3297 | } |
| 3298 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3299 | } |
| 3300 | if (i > 1) |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3301 | pr_info("%d NAND chips detected\n", i); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3302 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3303 | /* Store the number of chips and calc total size for mtd */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3304 | chip->numchips = i; |
| 3305 | mtd->size = i * chip->chipsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3306 | |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3307 | return 0; |
| 3308 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3309 | EXPORT_SYMBOL(nand_scan_ident); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3310 | |
| 3311 | |
| 3312 | /** |
| 3313 | * nand_scan_tail - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3314 | * @mtd: MTD device structure |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3315 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3316 | * This is the second phase of the normal nand_scan() function. It fills out |
| 3317 | * all the uninitialized function pointers with the defaults and scans for a |
| 3318 | * bad block table if appropriate. |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3319 | */ |
| 3320 | int nand_scan_tail(struct mtd_info *mtd) |
| 3321 | { |
| 3322 | int i; |
| 3323 | struct nand_chip *chip = mtd->priv; |
| 3324 | |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 3325 | /* New bad blocks should be marked in OOB, flash-based BBT, or both */ |
| 3326 | BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && |
| 3327 | !(chip->bbt_options & NAND_BBT_USE_FLASH)); |
| 3328 | |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 3329 | if (!(chip->options & NAND_OWN_BUFFERS)) |
| 3330 | chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL); |
| 3331 | if (!chip->buffers) |
| 3332 | return -ENOMEM; |
| 3333 | |
David Woodhouse | 7dcdcbef | 2006-10-21 17:09:53 +0100 | [diff] [blame] | 3334 | /* Set the internal oob buffer location, just after the page data */ |
David Woodhouse | 784f4d5 | 2006-10-22 01:47:45 +0100 | [diff] [blame] | 3335 | chip->oob_poi = chip->buffers->databuf + mtd->writesize; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3336 | |
| 3337 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3338 | * If no default placement scheme is given, select an appropriate one. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3339 | */ |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3340 | if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3341 | switch (mtd->oobsize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3342 | case 8: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3343 | chip->ecc.layout = &nand_oob_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3344 | break; |
| 3345 | case 16: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3346 | chip->ecc.layout = &nand_oob_16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3347 | break; |
| 3348 | case 64: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3349 | chip->ecc.layout = &nand_oob_64; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3350 | break; |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 3351 | case 128: |
| 3352 | chip->ecc.layout = &nand_oob_128; |
| 3353 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3354 | default: |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3355 | pr_warn("No oob scheme defined for oobsize %d\n", |
| 3356 | mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3357 | BUG(); |
| 3358 | } |
| 3359 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3360 | |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 3361 | if (!chip->write_page) |
| 3362 | chip->write_page = nand_write_page; |
| 3363 | |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 3364 | /* set for ONFI nand */ |
| 3365 | if (!chip->onfi_set_features) |
| 3366 | chip->onfi_set_features = nand_onfi_set_features; |
| 3367 | if (!chip->onfi_get_features) |
| 3368 | chip->onfi_get_features = nand_onfi_get_features; |
| 3369 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3370 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3371 | * Check ECC mode, default to software if 3byte/512byte hardware ECC is |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3372 | * selected and we have 256 byte pagesize fallback to software ECC |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3373 | */ |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 3374 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3375 | switch (chip->ecc.mode) { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 3376 | case NAND_ECC_HW_OOB_FIRST: |
| 3377 | /* Similar to NAND_ECC_HW, but a separate read_page handle */ |
| 3378 | if (!chip->ecc.calculate || !chip->ecc.correct || |
| 3379 | !chip->ecc.hwctl) { |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3380 | pr_warn("No ECC functions supplied; " |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3381 | "hardware ECC not possible\n"); |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 3382 | BUG(); |
| 3383 | } |
| 3384 | if (!chip->ecc.read_page) |
| 3385 | chip->ecc.read_page = nand_read_page_hwecc_oob_first; |
| 3386 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3387 | case NAND_ECC_HW: |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3388 | /* Use standard hwecc read page function? */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3389 | if (!chip->ecc.read_page) |
| 3390 | chip->ecc.read_page = nand_read_page_hwecc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 3391 | if (!chip->ecc.write_page) |
| 3392 | chip->ecc.write_page = nand_write_page_hwecc; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 3393 | if (!chip->ecc.read_page_raw) |
| 3394 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 3395 | if (!chip->ecc.write_page_raw) |
| 3396 | chip->ecc.write_page_raw = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 3397 | if (!chip->ecc.read_oob) |
| 3398 | chip->ecc.read_oob = nand_read_oob_std; |
| 3399 | if (!chip->ecc.write_oob) |
| 3400 | chip->ecc.write_oob = nand_write_oob_std; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3401 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3402 | case NAND_ECC_HW_SYNDROME: |
Scott Wood | 78b6517 | 2007-12-13 11:15:28 -0600 | [diff] [blame] | 3403 | if ((!chip->ecc.calculate || !chip->ecc.correct || |
| 3404 | !chip->ecc.hwctl) && |
| 3405 | (!chip->ecc.read_page || |
Scott Wood | 1c45f60 | 2008-01-16 10:36:03 -0600 | [diff] [blame] | 3406 | chip->ecc.read_page == nand_read_page_hwecc || |
Scott Wood | 78b6517 | 2007-12-13 11:15:28 -0600 | [diff] [blame] | 3407 | !chip->ecc.write_page || |
Scott Wood | 1c45f60 | 2008-01-16 10:36:03 -0600 | [diff] [blame] | 3408 | chip->ecc.write_page == nand_write_page_hwecc)) { |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3409 | pr_warn("No ECC functions supplied; " |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3410 | "hardware ECC not possible\n"); |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3411 | BUG(); |
| 3412 | } |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3413 | /* Use standard syndrome read/write page function? */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3414 | if (!chip->ecc.read_page) |
| 3415 | chip->ecc.read_page = nand_read_page_syndrome; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 3416 | if (!chip->ecc.write_page) |
| 3417 | chip->ecc.write_page = nand_write_page_syndrome; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 3418 | if (!chip->ecc.read_page_raw) |
| 3419 | chip->ecc.read_page_raw = nand_read_page_raw_syndrome; |
| 3420 | if (!chip->ecc.write_page_raw) |
| 3421 | chip->ecc.write_page_raw = nand_write_page_raw_syndrome; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 3422 | if (!chip->ecc.read_oob) |
| 3423 | chip->ecc.read_oob = nand_read_oob_syndrome; |
| 3424 | if (!chip->ecc.write_oob) |
| 3425 | chip->ecc.write_oob = nand_write_oob_syndrome; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3426 | |
Mike Dunn | e2788c9 | 2012-04-25 12:06:10 -0700 | [diff] [blame] | 3427 | if (mtd->writesize >= chip->ecc.size) { |
| 3428 | if (!chip->ecc.strength) { |
| 3429 | pr_warn("Driver must set ecc.strength when using hardware ECC\n"); |
| 3430 | BUG(); |
| 3431 | } |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3432 | break; |
Mike Dunn | e2788c9 | 2012-04-25 12:06:10 -0700 | [diff] [blame] | 3433 | } |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3434 | pr_warn("%d byte HW ECC not possible on " |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3435 | "%d byte page size, fallback to SW ECC\n", |
| 3436 | chip->ecc.size, mtd->writesize); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3437 | chip->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3438 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3439 | case NAND_ECC_SOFT: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3440 | chip->ecc.calculate = nand_calculate_ecc; |
| 3441 | chip->ecc.correct = nand_correct_data; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3442 | chip->ecc.read_page = nand_read_page_swecc; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 3443 | chip->ecc.read_subpage = nand_read_subpage; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 3444 | chip->ecc.write_page = nand_write_page_swecc; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 3445 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 3446 | chip->ecc.write_page_raw = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 3447 | chip->ecc.read_oob = nand_read_oob_std; |
| 3448 | chip->ecc.write_oob = nand_write_oob_std; |
Singh, Vimal | 9a73290 | 2008-12-12 00:10:57 +0000 | [diff] [blame] | 3449 | if (!chip->ecc.size) |
| 3450 | chip->ecc.size = 256; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3451 | chip->ecc.bytes = 3; |
Mike Dunn | 6a918ba | 2012-03-11 14:21:11 -0700 | [diff] [blame] | 3452 | chip->ecc.strength = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3453 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3454 | |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3455 | case NAND_ECC_SOFT_BCH: |
| 3456 | if (!mtd_nand_has_bch()) { |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3457 | pr_warn("CONFIG_MTD_ECC_BCH not enabled\n"); |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3458 | BUG(); |
| 3459 | } |
| 3460 | chip->ecc.calculate = nand_bch_calculate_ecc; |
| 3461 | chip->ecc.correct = nand_bch_correct_data; |
| 3462 | chip->ecc.read_page = nand_read_page_swecc; |
| 3463 | chip->ecc.read_subpage = nand_read_subpage; |
| 3464 | chip->ecc.write_page = nand_write_page_swecc; |
| 3465 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 3466 | chip->ecc.write_page_raw = nand_write_page_raw; |
| 3467 | chip->ecc.read_oob = nand_read_oob_std; |
| 3468 | chip->ecc.write_oob = nand_write_oob_std; |
| 3469 | /* |
| 3470 | * Board driver should supply ecc.size and ecc.bytes values to |
| 3471 | * select how many bits are correctable; see nand_bch_init() |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3472 | * for details. Otherwise, default to 4 bits for large page |
| 3473 | * devices. |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3474 | */ |
| 3475 | if (!chip->ecc.size && (mtd->oobsize >= 64)) { |
| 3476 | chip->ecc.size = 512; |
| 3477 | chip->ecc.bytes = 7; |
| 3478 | } |
| 3479 | chip->ecc.priv = nand_bch_init(mtd, |
| 3480 | chip->ecc.size, |
| 3481 | chip->ecc.bytes, |
| 3482 | &chip->ecc.layout); |
| 3483 | if (!chip->ecc.priv) { |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3484 | pr_warn("BCH ECC initialization failed!\n"); |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3485 | BUG(); |
| 3486 | } |
Mike Dunn | 6a918ba | 2012-03-11 14:21:11 -0700 | [diff] [blame] | 3487 | chip->ecc.strength = |
Mike Dunn | e2788c9 | 2012-04-25 12:06:10 -0700 | [diff] [blame] | 3488 | chip->ecc.bytes * 8 / fls(8 * chip->ecc.size); |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3489 | break; |
| 3490 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3491 | case NAND_ECC_NONE: |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3492 | pr_warn("NAND_ECC_NONE selected by board driver. " |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3493 | "This is not recommended!\n"); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 3494 | chip->ecc.read_page = nand_read_page_raw; |
| 3495 | chip->ecc.write_page = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 3496 | chip->ecc.read_oob = nand_read_oob_std; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 3497 | chip->ecc.read_page_raw = nand_read_page_raw; |
| 3498 | chip->ecc.write_page_raw = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 3499 | chip->ecc.write_oob = nand_write_oob_std; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3500 | chip->ecc.size = mtd->writesize; |
| 3501 | chip->ecc.bytes = 0; |
Mike Dunn | 6a918ba | 2012-03-11 14:21:11 -0700 | [diff] [blame] | 3502 | chip->ecc.strength = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3503 | break; |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 3504 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3505 | default: |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3506 | pr_warn("Invalid NAND_ECC_MODE %d\n", chip->ecc.mode); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3507 | BUG(); |
| 3508 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3509 | |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 3510 | /* For many systems, the standard OOB write also works for raw */ |
Brian Norris | c46f648 | 2011-08-30 18:45:38 -0700 | [diff] [blame] | 3511 | if (!chip->ecc.read_oob_raw) |
| 3512 | chip->ecc.read_oob_raw = chip->ecc.read_oob; |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 3513 | if (!chip->ecc.write_oob_raw) |
| 3514 | chip->ecc.write_oob_raw = chip->ecc.write_oob; |
| 3515 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3516 | /* |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3517 | * The number of bytes available for a client to place data into |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3518 | * the out of band area. |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3519 | */ |
| 3520 | chip->ecc.layout->oobavail = 0; |
David Brownell | 81d19b0 | 2009-04-21 19:51:20 -0700 | [diff] [blame] | 3521 | for (i = 0; chip->ecc.layout->oobfree[i].length |
| 3522 | && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++) |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3523 | chip->ecc.layout->oobavail += |
| 3524 | chip->ecc.layout->oobfree[i].length; |
Vitaly Wool | 1f92267 | 2007-03-06 16:56:34 +0300 | [diff] [blame] | 3525 | mtd->oobavail = chip->ecc.layout->oobavail; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3526 | |
| 3527 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3528 | * Set the number of read / write steps for one page depending on ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3529 | * mode. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3530 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3531 | chip->ecc.steps = mtd->writesize / chip->ecc.size; |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 3532 | if (chip->ecc.steps * chip->ecc.size != mtd->writesize) { |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 3533 | pr_warn("Invalid ECC parameters\n"); |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 3534 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3535 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 3536 | chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3537 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3538 | /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 3539 | if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && |
| 3540 | !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) { |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 3541 | switch (chip->ecc.steps) { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 3542 | case 2: |
| 3543 | mtd->subpage_sft = 1; |
| 3544 | break; |
| 3545 | case 4: |
| 3546 | case 8: |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 3547 | case 16: |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 3548 | mtd->subpage_sft = 2; |
| 3549 | break; |
| 3550 | } |
| 3551 | } |
| 3552 | chip->subpagesize = mtd->writesize >> mtd->subpage_sft; |
| 3553 | |
Thomas Gleixner | 04bbd0e | 2006-05-25 09:45:29 +0200 | [diff] [blame] | 3554 | /* Initialize state */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3555 | chip->state = FL_READY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3556 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3557 | /* Invalidate the pagebuffer reference */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3558 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3559 | |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 3560 | /* Large page NAND with SOFT_ECC should support subpage reads */ |
| 3561 | if ((chip->ecc.mode == NAND_ECC_SOFT) && (chip->page_shift > 9)) |
| 3562 | chip->options |= NAND_SUBPAGE_READ; |
| 3563 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3564 | /* Fill in remaining MTD driver data */ |
| 3565 | mtd->type = MTD_NANDFLASH; |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 3566 | mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM : |
| 3567 | MTD_CAP_NANDFLASH; |
Artem Bityutskiy | 3c3c10b | 2012-01-30 14:58:32 +0200 | [diff] [blame] | 3568 | mtd->_erase = nand_erase; |
| 3569 | mtd->_point = NULL; |
| 3570 | mtd->_unpoint = NULL; |
| 3571 | mtd->_read = nand_read; |
| 3572 | mtd->_write = nand_write; |
| 3573 | mtd->_panic_write = panic_nand_write; |
| 3574 | mtd->_read_oob = nand_read_oob; |
| 3575 | mtd->_write_oob = nand_write_oob; |
| 3576 | mtd->_sync = nand_sync; |
| 3577 | mtd->_lock = NULL; |
| 3578 | mtd->_unlock = NULL; |
| 3579 | mtd->_suspend = nand_suspend; |
| 3580 | mtd->_resume = nand_resume; |
| 3581 | mtd->_block_isbad = nand_block_isbad; |
| 3582 | mtd->_block_markbad = nand_block_markbad; |
Anatolij Gustschin | cbcab65 | 2010-12-16 23:42:16 +0100 | [diff] [blame] | 3583 | mtd->writebufsize = mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3584 | |
Mike Dunn | 6a918ba | 2012-03-11 14:21:11 -0700 | [diff] [blame] | 3585 | /* propagate ecc info to mtd_info */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 3586 | mtd->ecclayout = chip->ecc.layout; |
Mike Dunn | 86c2072 | 2012-04-25 12:06:05 -0700 | [diff] [blame] | 3587 | mtd->ecc_strength = chip->ecc.strength; |
Shmulik Ladkani | ea3b2ea | 2012-06-08 18:29:06 +0300 | [diff] [blame] | 3588 | /* |
| 3589 | * Initialize bitflip_threshold to its default prior scan_bbt() call. |
| 3590 | * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be |
| 3591 | * properly set. |
| 3592 | */ |
| 3593 | if (!mtd->bitflip_threshold) |
| 3594 | mtd->bitflip_threshold = mtd->ecc_strength; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3595 | |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 3596 | /* Check, if we should skip the bad block table scan */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3597 | if (chip->options & NAND_SKIP_BBTSCAN) |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 3598 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3599 | |
| 3600 | /* Build bad block table */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3601 | return chip->scan_bbt(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3602 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3603 | EXPORT_SYMBOL(nand_scan_tail); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3604 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3605 | /* |
| 3606 | * is_module_text_address() isn't exported, and it's mostly a pointless |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3607 | * test if this is a module _anyway_ -- they'd have to try _really_ hard |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3608 | * to call us from in-kernel code if the core NAND support is modular. |
| 3609 | */ |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3610 | #ifdef MODULE |
| 3611 | #define caller_is_module() (1) |
| 3612 | #else |
| 3613 | #define caller_is_module() \ |
Rusty Russell | a6e6abd | 2009-03-31 13:05:31 -0600 | [diff] [blame] | 3614 | is_module_text_address((unsigned long)__builtin_return_address(0)) |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3615 | #endif |
| 3616 | |
| 3617 | /** |
| 3618 | * nand_scan - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3619 | * @mtd: MTD device structure |
| 3620 | * @maxchips: number of chips to scan for |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3621 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3622 | * This fills out all the uninitialized function pointers with the defaults. |
| 3623 | * The flash ID is read and the mtd/chip structures are filled with the |
| 3624 | * appropriate values. The mtd->owner field must be set to the module of the |
| 3625 | * caller. |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3626 | */ |
| 3627 | int nand_scan(struct mtd_info *mtd, int maxchips) |
| 3628 | { |
| 3629 | int ret; |
| 3630 | |
| 3631 | /* Many callers got this wrong, so check for it for a while... */ |
| 3632 | if (!mtd->owner && caller_is_module()) { |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3633 | pr_crit("%s called with NULL mtd->owner!\n", __func__); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3634 | BUG(); |
| 3635 | } |
| 3636 | |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3637 | ret = nand_scan_ident(mtd, maxchips, NULL); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3638 | if (!ret) |
| 3639 | ret = nand_scan_tail(mtd); |
| 3640 | return ret; |
| 3641 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3642 | EXPORT_SYMBOL(nand_scan); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3643 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3644 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3645 | * nand_release - [NAND Interface] Free resources held by the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3646 | * @mtd: MTD device structure |
| 3647 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3648 | void nand_release(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3649 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3650 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3651 | |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 3652 | if (chip->ecc.mode == NAND_ECC_SOFT_BCH) |
| 3653 | nand_bch_free((struct nand_bch_control *)chip->ecc.priv); |
| 3654 | |
Jamie Iles | 5ffcaf3 | 2011-05-23 10:22:46 +0100 | [diff] [blame] | 3655 | mtd_device_unregister(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3656 | |
Jesper Juhl | fa67164 | 2005-11-07 01:01:27 -0800 | [diff] [blame] | 3657 | /* Free bad block table memory */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3658 | kfree(chip->bbt); |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 3659 | if (!(chip->options & NAND_OWN_BUFFERS)) |
| 3660 | kfree(chip->buffers); |
Brian Norris | 58373ff | 2010-07-15 12:15:44 -0700 | [diff] [blame] | 3661 | |
| 3662 | /* Free bad block descriptor memory */ |
| 3663 | if (chip->badblock_pattern && chip->badblock_pattern->options |
| 3664 | & NAND_BBT_DYNAMICSTRUCT) |
| 3665 | kfree(chip->badblock_pattern); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3666 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3667 | EXPORT_SYMBOL_GPL(nand_release); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 3668 | |
| 3669 | static int __init nand_base_init(void) |
| 3670 | { |
| 3671 | led_trigger_register_simple("nand-disk", &nand_led_trigger); |
| 3672 | return 0; |
| 3673 | } |
| 3674 | |
| 3675 | static void __exit nand_base_exit(void) |
| 3676 | { |
| 3677 | led_trigger_unregister_simple(nand_led_trigger); |
| 3678 | } |
| 3679 | |
| 3680 | module_init(nand_base_init); |
| 3681 | module_exit(nand_base_exit); |
| 3682 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3683 | MODULE_LICENSE("GPL"); |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3684 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>"); |
| 3685 | MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>"); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3686 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |