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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00007 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 * Additional technical information is available on
maximilian attems8b2b4032007-07-28 13:07:16 +02009 * http://www.linux-mtd.infradead.org/doc/nand.html
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000010 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020012 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
Linus Torvalds1da177e2005-04-16 15:20:36 -070013 *
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020014 * Credits:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000015 * David Woodhouse for adding multichip support
16 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070017 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
18 * rework for 2K page size chips
19 *
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020020 * TODO:
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 * Enable cached programming for 2k page size chips
22 * Check, if mtd->ecctype should be set to MTD_ECC_HW
Brian Norris7854d3f2011-06-23 14:12:08 -070023 * if we have HW ECC support.
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +030024 * BBT table is not serialized, has to be fixed
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070026 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License version 2 as
28 * published by the Free Software Foundation.
29 *
30 */
31
David Woodhouse552d9202006-05-14 01:20:46 +010032#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/delay.h>
34#include <linux/errno.h>
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +020035#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036#include <linux/sched.h>
37#include <linux/slab.h>
38#include <linux/types.h>
39#include <linux/mtd/mtd.h>
40#include <linux/mtd/nand.h>
41#include <linux/mtd/nand_ecc.h>
Ivan Djelic193bd402011-03-11 11:05:33 +010042#include <linux/mtd/nand_bch.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043#include <linux/interrupt.h>
44#include <linux/bitops.h>
Richard Purdie8fe833c2006-03-31 02:31:14 -080045#include <linux/leds.h>
Florian Fainelli7351d3a2010-09-07 13:23:45 +020046#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <linux/mtd/partitions.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070048
49/* Define default oob placement schemes for large and small page devices */
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020050static struct nand_ecclayout nand_oob_8 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070051 .eccbytes = 3,
52 .eccpos = {0, 1, 2},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020053 .oobfree = {
54 {.offset = 3,
55 .length = 2},
56 {.offset = 6,
Florian Fainellif8ac0412010-09-07 13:23:43 +020057 .length = 2} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070058};
59
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020060static struct nand_ecclayout nand_oob_16 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 .eccbytes = 6,
62 .eccpos = {0, 1, 2, 3, 6, 7},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020063 .oobfree = {
64 {.offset = 8,
Florian Fainellif8ac0412010-09-07 13:23:43 +020065 . length = 8} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070066};
67
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020068static struct nand_ecclayout nand_oob_64 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070069 .eccbytes = 24,
70 .eccpos = {
David Woodhousee0c7d762006-05-13 18:07:53 +010071 40, 41, 42, 43, 44, 45, 46, 47,
72 48, 49, 50, 51, 52, 53, 54, 55,
73 56, 57, 58, 59, 60, 61, 62, 63},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020074 .oobfree = {
75 {.offset = 2,
Florian Fainellif8ac0412010-09-07 13:23:43 +020076 .length = 38} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070077};
78
Thomas Gleixner81ec5362007-12-12 17:27:03 +010079static struct nand_ecclayout nand_oob_128 = {
80 .eccbytes = 48,
81 .eccpos = {
82 80, 81, 82, 83, 84, 85, 86, 87,
83 88, 89, 90, 91, 92, 93, 94, 95,
84 96, 97, 98, 99, 100, 101, 102, 103,
85 104, 105, 106, 107, 108, 109, 110, 111,
86 112, 113, 114, 115, 116, 117, 118, 119,
87 120, 121, 122, 123, 124, 125, 126, 127},
88 .oobfree = {
89 {.offset = 2,
Florian Fainellif8ac0412010-09-07 13:23:43 +020090 .length = 78} }
Thomas Gleixner81ec5362007-12-12 17:27:03 +010091};
92
Huang Shijie6a8214a2012-11-19 14:43:30 +080093static int nand_get_device(struct mtd_info *mtd, int new_state);
Linus Torvalds1da177e2005-04-16 15:20:36 -070094
Thomas Gleixner8593fbc2006-05-29 03:26:58 +020095static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
96 struct mtd_oob_ops *ops);
97
Thomas Gleixnerd470a972006-05-23 23:48:57 +020098/*
Joe Perches8e87d782008-02-03 17:22:34 +020099 * For devices which display every fart in the system on a separate LED. Is
Thomas Gleixnerd470a972006-05-23 23:48:57 +0200100 * compiled away when LED support is disabled.
101 */
102DEFINE_LED_TRIGGER(nand_led_trigger);
103
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530104static int check_offs_len(struct mtd_info *mtd,
105 loff_t ofs, uint64_t len)
106{
107 struct nand_chip *chip = mtd->priv;
108 int ret = 0;
109
110 /* Start address must align on block boundary */
111 if (ofs & ((1 << chip->phys_erase_shift) - 1)) {
Brian Norris289c0522011-07-19 10:06:09 -0700112 pr_debug("%s: unaligned address\n", __func__);
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530113 ret = -EINVAL;
114 }
115
116 /* Length must align on block boundary */
117 if (len & ((1 << chip->phys_erase_shift) - 1)) {
Brian Norris289c0522011-07-19 10:06:09 -0700118 pr_debug("%s: length not block aligned\n", __func__);
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530119 ret = -EINVAL;
120 }
121
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530122 return ret;
123}
124
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125/**
126 * nand_release_device - [GENERIC] release chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700127 * @mtd: MTD device structure
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000128 *
Huang Shijieb0bb6902012-11-19 14:43:29 +0800129 * Release chip lock and wake up anyone waiting on the device.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100131static void nand_release_device(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200133 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134
Thomas Gleixnera36ed292006-05-23 11:37:03 +0200135 /* Release the controller and the chip */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200136 spin_lock(&chip->controller->lock);
137 chip->controller->active = NULL;
138 chip->state = FL_READY;
139 wake_up(&chip->controller->wq);
140 spin_unlock(&chip->controller->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141}
142
143/**
144 * nand_read_byte - [DEFAULT] read one byte from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700145 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700147 * Default read function for 8bit buswidth
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200149static uint8_t nand_read_byte(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200151 struct nand_chip *chip = mtd->priv;
152 return readb(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153}
154
155/**
Masanari Iida064a7692012-11-09 23:20:58 +0900156 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
Brian Norris7854d3f2011-06-23 14:12:08 -0700157 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700158 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700160 * Default read function for 16bit buswidth with endianness conversion.
161 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200163static uint8_t nand_read_byte16(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200165 struct nand_chip *chip = mtd->priv;
166 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167}
168
169/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170 * nand_read_word - [DEFAULT] read one word from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700171 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700173 * Default read function for 16bit buswidth without endianness conversion.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174 */
175static u16 nand_read_word(struct mtd_info *mtd)
176{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200177 struct nand_chip *chip = mtd->priv;
178 return readw(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179}
180
181/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 * nand_select_chip - [DEFAULT] control CE line
Brian Norris8b6e50c2011-05-25 14:59:01 -0700183 * @mtd: MTD device structure
184 * @chipnr: chipnumber to select, -1 for deselect
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 *
186 * Default select function for 1 chip devices.
187 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200188static void nand_select_chip(struct mtd_info *mtd, int chipnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200190 struct nand_chip *chip = mtd->priv;
191
192 switch (chipnr) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193 case -1:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200194 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195 break;
196 case 0:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 break;
198
199 default:
200 BUG();
201 }
202}
203
204/**
205 * nand_write_buf - [DEFAULT] write buffer to chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700206 * @mtd: MTD device structure
207 * @buf: data buffer
208 * @len: number of bytes to write
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700210 * Default write function for 8bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200212static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213{
214 int i;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200215 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216
David Woodhousee0c7d762006-05-13 18:07:53 +0100217 for (i = 0; i < len; i++)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200218 writeb(buf[i], chip->IO_ADDR_W);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219}
220
221/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000222 * nand_read_buf - [DEFAULT] read chip data into buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -0700223 * @mtd: MTD device structure
224 * @buf: buffer to store date
225 * @len: number of bytes to read
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700227 * Default read function for 8bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200229static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230{
231 int i;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200232 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233
David Woodhousee0c7d762006-05-13 18:07:53 +0100234 for (i = 0; i < len; i++)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200235 buf[i] = readb(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236}
237
238/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239 * nand_write_buf16 - [DEFAULT] write buffer to chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700240 * @mtd: MTD device structure
241 * @buf: data buffer
242 * @len: number of bytes to write
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700244 * Default write function for 16bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200246static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247{
248 int i;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200249 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250 u16 *p = (u16 *) buf;
251 len >>= 1;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000252
David Woodhousee0c7d762006-05-13 18:07:53 +0100253 for (i = 0; i < len; i++)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200254 writew(p[i], chip->IO_ADDR_W);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000255
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256}
257
258/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000259 * nand_read_buf16 - [DEFAULT] read chip data into buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -0700260 * @mtd: MTD device structure
261 * @buf: buffer to store date
262 * @len: number of bytes to read
Linus Torvalds1da177e2005-04-16 15:20:36 -0700263 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700264 * Default read function for 16bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200266static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267{
268 int i;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200269 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270 u16 *p = (u16 *) buf;
271 len >>= 1;
272
David Woodhousee0c7d762006-05-13 18:07:53 +0100273 for (i = 0; i < len; i++)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200274 p[i] = readw(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275}
276
277/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700279 * @mtd: MTD device structure
280 * @ofs: offset from device start
281 * @getchip: 0, if the chip is already selected
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000283 * Check, if the block is bad.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284 */
285static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
286{
Brian Norriscdbec052012-01-13 18:11:48 -0800287 int page, chipnr, res = 0, i = 0;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200288 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289 u16 bad;
290
Brian Norris5fb15492011-05-31 16:31:21 -0700291 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
Kevin Cernekeeb60b08b2010-05-04 20:58:10 -0700292 ofs += mtd->erasesize - mtd->writesize;
293
Thomas Knobloch1a12f462007-05-03 07:39:37 +0100294 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
295
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296 if (getchip) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200297 chipnr = (int)(ofs >> chip->chip_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298
Huang Shijie6a8214a2012-11-19 14:43:30 +0800299 nand_get_device(mtd, FL_READING);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300
301 /* Select the NAND device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200302 chip->select_chip(mtd, chipnr);
Thomas Knobloch1a12f462007-05-03 07:39:37 +0100303 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700304
Brian Norriscdbec052012-01-13 18:11:48 -0800305 do {
306 if (chip->options & NAND_BUSWIDTH_16) {
307 chip->cmdfunc(mtd, NAND_CMD_READOOB,
308 chip->badblockpos & 0xFE, page);
309 bad = cpu_to_le16(chip->read_word(mtd));
310 if (chip->badblockpos & 0x1)
311 bad >>= 8;
312 else
313 bad &= 0xFF;
314 } else {
315 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
316 page);
317 bad = chip->read_byte(mtd);
318 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000319
Brian Norriscdbec052012-01-13 18:11:48 -0800320 if (likely(chip->badblockbits == 8))
321 res = bad != 0xFF;
322 else
323 res = hweight8(bad) < chip->badblockbits;
324 ofs += mtd->writesize;
325 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
326 i++;
327 } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE));
Maxim Levitskye0b58d02010-02-22 20:39:38 +0200328
Huang Shijieb0bb6902012-11-19 14:43:29 +0800329 if (getchip) {
330 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331 nand_release_device(mtd);
Huang Shijieb0bb6902012-11-19 14:43:29 +0800332 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000333
Linus Torvalds1da177e2005-04-16 15:20:36 -0700334 return res;
335}
336
337/**
338 * nand_default_block_markbad - [DEFAULT] mark a block bad
Brian Norris8b6e50c2011-05-25 14:59:01 -0700339 * @mtd: MTD device structure
340 * @ofs: offset from device start
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700342 * This is the default implementation, which can be overridden by a hardware
Brian Norrise2414f42012-02-06 13:44:00 -0800343 * specific driver. We try operations in the following order, according to our
344 * bbt_options (NAND_BBT_NO_OOB_BBM and NAND_BBT_USE_FLASH):
345 * (1) erase the affected block, to allow OOB marker to be written cleanly
346 * (2) update in-memory BBT
347 * (3) write bad block marker to OOB area of affected block
348 * (4) update flash-based BBT
349 * Note that we retain the first error encountered in (3) or (4), finish the
350 * procedures, and dump the error in the end.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351*/
352static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
353{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200354 struct nand_chip *chip = mtd->priv;
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200355 uint8_t buf[2] = { 0, 0 };
Brian Norrise2414f42012-02-06 13:44:00 -0800356 int block, res, ret = 0, i = 0;
357 int write_oob = !(chip->bbt_options & NAND_BBT_NO_OOB_BBM);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000358
Brian Norrise2414f42012-02-06 13:44:00 -0800359 if (write_oob) {
Brian Norris00918422012-01-13 18:11:47 -0800360 struct erase_info einfo;
361
362 /* Attempt erase before marking OOB */
363 memset(&einfo, 0, sizeof(einfo));
364 einfo.mtd = mtd;
365 einfo.addr = ofs;
366 einfo.len = 1 << chip->phys_erase_shift;
367 nand_erase_nand(mtd, &einfo, 0);
368 }
369
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370 /* Get block number */
Andre Renaud4226b512007-04-17 13:50:59 -0400371 block = (int)(ofs >> chip->bbt_erase_shift);
Brian Norrise2414f42012-02-06 13:44:00 -0800372 /* Mark block bad in memory-based BBT */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200373 if (chip->bbt)
374 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375
Brian Norrise2414f42012-02-06 13:44:00 -0800376 /* Write bad block marker to OOB */
377 if (write_oob) {
Brian Norris4a89ff82011-08-30 18:45:45 -0700378 struct mtd_oob_ops ops;
Brian Norrisdf698622012-01-20 20:38:03 -0800379 loff_t wr_ofs = ofs;
Brian Norris4a89ff82011-08-30 18:45:45 -0700380
Huang Shijie6a8214a2012-11-19 14:43:30 +0800381 nand_get_device(mtd, FL_WRITING);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000382
Brian Norris4a89ff82011-08-30 18:45:45 -0700383 ops.datbuf = NULL;
384 ops.oobbuf = buf;
Brian Norris85443312012-01-13 18:11:49 -0800385 ops.ooboffs = chip->badblockpos;
386 if (chip->options & NAND_BUSWIDTH_16) {
387 ops.ooboffs &= ~0x01;
388 ops.len = ops.ooblen = 2;
389 } else {
390 ops.len = ops.ooblen = 1;
391 }
Brian Norris23b1a992011-10-14 20:09:33 -0700392 ops.mode = MTD_OPS_PLACE_OOB;
Brian Norrisdf698622012-01-20 20:38:03 -0800393
Brian Norrise2414f42012-02-06 13:44:00 -0800394 /* Write to first/last page(s) if necessary */
Brian Norrisdf698622012-01-20 20:38:03 -0800395 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
396 wr_ofs += mtd->erasesize - mtd->writesize;
Brian Norris02ed70b2010-07-21 16:53:47 -0700397 do {
Brian Norrise2414f42012-02-06 13:44:00 -0800398 res = nand_do_write_oob(mtd, wr_ofs, &ops);
399 if (!ret)
400 ret = res;
Brian Norris02ed70b2010-07-21 16:53:47 -0700401
Brian Norris02ed70b2010-07-21 16:53:47 -0700402 i++;
Brian Norrisdf698622012-01-20 20:38:03 -0800403 wr_ofs += mtd->writesize;
Brian Norrise2414f42012-02-06 13:44:00 -0800404 } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2);
Brian Norris02ed70b2010-07-21 16:53:47 -0700405
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +0300406 nand_release_device(mtd);
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200407 }
Brian Norrise2414f42012-02-06 13:44:00 -0800408
409 /* Update flash-based bad block table */
410 if (chip->bbt_options & NAND_BBT_USE_FLASH) {
411 res = nand_update_bbt(mtd, ofs);
412 if (!ret)
413 ret = res;
414 }
415
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200416 if (!ret)
417 mtd->ecc_stats.badblocks++;
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +0300418
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200419 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420}
421
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000422/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423 * nand_check_wp - [GENERIC] check if the chip is write protected
Brian Norris8b6e50c2011-05-25 14:59:01 -0700424 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700426 * Check, if the device is write protected. The function expects, that the
427 * device is already selected.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700428 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100429static int nand_check_wp(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200431 struct nand_chip *chip = mtd->priv;
Maxim Levitsky93edbad2010-02-22 20:39:40 +0200432
Brian Norris8b6e50c2011-05-25 14:59:01 -0700433 /* Broken xD cards report WP despite being writable */
Maxim Levitsky93edbad2010-02-22 20:39:40 +0200434 if (chip->options & NAND_BROKEN_XD)
435 return 0;
436
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437 /* Check the WP bit */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200438 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
439 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440}
441
442/**
443 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
Brian Norris8b6e50c2011-05-25 14:59:01 -0700444 * @mtd: MTD device structure
445 * @ofs: offset from device start
446 * @getchip: 0, if the chip is already selected
447 * @allowbbt: 1, if its allowed to access the bbt area
Linus Torvalds1da177e2005-04-16 15:20:36 -0700448 *
449 * Check, if the block is bad. Either by reading the bad block table or
450 * calling of the scan function.
451 */
Thomas Gleixner2c0a2be2006-05-23 11:50:56 +0200452static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
453 int allowbbt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200455 struct nand_chip *chip = mtd->priv;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000456
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200457 if (!chip->bbt)
458 return chip->block_bad(mtd, ofs, getchip);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000459
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460 /* Return info from the table */
David Woodhousee0c7d762006-05-13 18:07:53 +0100461 return nand_isbad_bbt(mtd, ofs, allowbbt);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700462}
463
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200464/**
465 * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
Brian Norris8b6e50c2011-05-25 14:59:01 -0700466 * @mtd: MTD device structure
467 * @timeo: Timeout
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200468 *
469 * Helper function for nand_wait_ready used when needing to wait in interrupt
470 * context.
471 */
472static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo)
473{
474 struct nand_chip *chip = mtd->priv;
475 int i;
476
477 /* Wait for the device to get ready */
478 for (i = 0; i < timeo; i++) {
479 if (chip->dev_ready(mtd))
480 break;
481 touch_softlockup_watchdog();
482 mdelay(1);
483 }
484}
485
Brian Norris7854d3f2011-06-23 14:12:08 -0700486/* Wait for the ready pin, after a command. The timeout is caught later. */
David Woodhouse4b648b02006-09-25 17:05:24 +0100487void nand_wait_ready(struct mtd_info *mtd)
Thomas Gleixner3b887752005-02-22 21:56:49 +0000488{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200489 struct nand_chip *chip = mtd->priv;
Matthieu CASTETca6a2482012-11-22 18:31:28 +0100490 unsigned long timeo = jiffies + msecs_to_jiffies(20);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000491
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200492 /* 400ms timeout */
493 if (in_interrupt() || oops_in_progress)
494 return panic_nand_wait_ready(mtd, 400);
495
Richard Purdie8fe833c2006-03-31 02:31:14 -0800496 led_trigger_event(nand_led_trigger, LED_FULL);
Brian Norris7854d3f2011-06-23 14:12:08 -0700497 /* Wait until command is processed or timeout occurs */
Thomas Gleixner3b887752005-02-22 21:56:49 +0000498 do {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200499 if (chip->dev_ready(mtd))
Richard Purdie8fe833c2006-03-31 02:31:14 -0800500 break;
Ingo Molnar8446f1d2005-09-06 15:16:27 -0700501 touch_softlockup_watchdog();
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000502 } while (time_before(jiffies, timeo));
Richard Purdie8fe833c2006-03-31 02:31:14 -0800503 led_trigger_event(nand_led_trigger, LED_OFF);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000504}
David Woodhouse4b648b02006-09-25 17:05:24 +0100505EXPORT_SYMBOL_GPL(nand_wait_ready);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000506
Linus Torvalds1da177e2005-04-16 15:20:36 -0700507/**
508 * nand_command - [DEFAULT] Send command to NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -0700509 * @mtd: MTD device structure
510 * @command: the command to be sent
511 * @column: the column address for this command, -1 if none
512 * @page_addr: the page address for this command, -1 if none
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700514 * Send command to NAND device. This function is used for small page devices
515 * (256/512 Bytes per page).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700516 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200517static void nand_command(struct mtd_info *mtd, unsigned int command,
518 int column, int page_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700519{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200520 register struct nand_chip *chip = mtd->priv;
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200521 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700522
Brian Norris8b6e50c2011-05-25 14:59:01 -0700523 /* Write out the command to the device */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524 if (command == NAND_CMD_SEQIN) {
525 int readcmd;
526
Joern Engel28318772006-05-22 23:18:05 +0200527 if (column >= mtd->writesize) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700528 /* OOB area */
Joern Engel28318772006-05-22 23:18:05 +0200529 column -= mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530 readcmd = NAND_CMD_READOOB;
531 } else if (column < 256) {
532 /* First 256 bytes --> READ0 */
533 readcmd = NAND_CMD_READ0;
534 } else {
535 column -= 256;
536 readcmd = NAND_CMD_READ1;
537 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200538 chip->cmd_ctrl(mtd, readcmd, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200539 ctrl &= ~NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200541 chip->cmd_ctrl(mtd, command, ctrl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542
Brian Norris8b6e50c2011-05-25 14:59:01 -0700543 /* Address cycle, when necessary */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200544 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
545 /* Serially input address */
546 if (column != -1) {
547 /* Adjust columns for 16 bit buswidth */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200548 if (chip->options & NAND_BUSWIDTH_16)
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200549 column >>= 1;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200550 chip->cmd_ctrl(mtd, column, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200551 ctrl &= ~NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552 }
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200553 if (page_addr != -1) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200554 chip->cmd_ctrl(mtd, page_addr, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200555 ctrl &= ~NAND_CTRL_CHANGE;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200556 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200557 /* One more address cycle for devices > 32MiB */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200558 if (chip->chipsize > (32 << 20))
559 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200560 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200561 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000562
563 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -0700564 * Program and erase have their own busy handlers status and sequential
565 * in needs no delay
David Woodhousee0c7d762006-05-13 18:07:53 +0100566 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700567 switch (command) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000568
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569 case NAND_CMD_PAGEPROG:
570 case NAND_CMD_ERASE1:
571 case NAND_CMD_ERASE2:
572 case NAND_CMD_SEQIN:
573 case NAND_CMD_STATUS:
574 return;
575
576 case NAND_CMD_RESET:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200577 if (chip->dev_ready)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700578 break;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200579 udelay(chip->chip_delay);
580 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200581 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200582 chip->cmd_ctrl(mtd,
583 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200584 while (!(chip->read_byte(mtd) & NAND_STATUS_READY))
585 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586 return;
587
David Woodhousee0c7d762006-05-13 18:07:53 +0100588 /* This applies to read commands */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700589 default:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000590 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700591 * If we don't have access to the busy pin, we apply the given
592 * command delay
David Woodhousee0c7d762006-05-13 18:07:53 +0100593 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200594 if (!chip->dev_ready) {
595 udelay(chip->chip_delay);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596 return;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000597 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598 }
Brian Norris8b6e50c2011-05-25 14:59:01 -0700599 /*
600 * Apply this short delay always to ensure that we do wait tWB in
601 * any case on any machine.
602 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100603 ndelay(100);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000604
605 nand_wait_ready(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606}
607
608/**
609 * nand_command_lp - [DEFAULT] Send command to NAND large page device
Brian Norris8b6e50c2011-05-25 14:59:01 -0700610 * @mtd: MTD device structure
611 * @command: the command to be sent
612 * @column: the column address for this command, -1 if none
613 * @page_addr: the page address for this command, -1 if none
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614 *
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200615 * Send command to NAND device. This is the version for the new large page
Brian Norris7854d3f2011-06-23 14:12:08 -0700616 * devices. We don't have the separate regions as we have in the small page
617 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200619static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
620 int column, int page_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700621{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200622 register struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623
624 /* Emulate NAND_CMD_READOOB */
625 if (command == NAND_CMD_READOOB) {
Joern Engel28318772006-05-22 23:18:05 +0200626 column += mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700627 command = NAND_CMD_READ0;
628 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000629
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200630 /* Command latch cycle */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200631 chip->cmd_ctrl(mtd, command & 0xff,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200632 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633
634 if (column != -1 || page_addr != -1) {
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200635 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700636
637 /* Serially input address */
638 if (column != -1) {
639 /* Adjust columns for 16 bit buswidth */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200640 if (chip->options & NAND_BUSWIDTH_16)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700641 column >>= 1;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200642 chip->cmd_ctrl(mtd, column, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200643 ctrl &= ~NAND_CTRL_CHANGE;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200644 chip->cmd_ctrl(mtd, column >> 8, ctrl);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000645 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646 if (page_addr != -1) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200647 chip->cmd_ctrl(mtd, page_addr, ctrl);
648 chip->cmd_ctrl(mtd, page_addr >> 8,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200649 NAND_NCE | NAND_ALE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650 /* One more address cycle for devices > 128MiB */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200651 if (chip->chipsize > (128 << 20))
652 chip->cmd_ctrl(mtd, page_addr >> 16,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200653 NAND_NCE | NAND_ALE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700654 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200656 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000657
658 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -0700659 * Program and erase have their own busy handlers status, sequential
660 * in, and deplete1 need no delay.
David A. Marlin30f464b2005-01-17 18:35:25 +0000661 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 switch (command) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000663
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664 case NAND_CMD_CACHEDPROG:
665 case NAND_CMD_PAGEPROG:
666 case NAND_CMD_ERASE1:
667 case NAND_CMD_ERASE2:
668 case NAND_CMD_SEQIN:
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200669 case NAND_CMD_RNDIN:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670 case NAND_CMD_STATUS:
David A. Marlin30f464b2005-01-17 18:35:25 +0000671 case NAND_CMD_DEPLETE1:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672 return;
673
David A. Marlin30f464b2005-01-17 18:35:25 +0000674 case NAND_CMD_STATUS_ERROR:
675 case NAND_CMD_STATUS_ERROR0:
676 case NAND_CMD_STATUS_ERROR1:
677 case NAND_CMD_STATUS_ERROR2:
678 case NAND_CMD_STATUS_ERROR3:
Brian Norris8b6e50c2011-05-25 14:59:01 -0700679 /* Read error status commands require only a short delay */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200680 udelay(chip->chip_delay);
David A. Marlin30f464b2005-01-17 18:35:25 +0000681 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700682
683 case NAND_CMD_RESET:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200684 if (chip->dev_ready)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700685 break;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200686 udelay(chip->chip_delay);
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200687 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
688 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
689 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
690 NAND_NCE | NAND_CTRL_CHANGE);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200691 while (!(chip->read_byte(mtd) & NAND_STATUS_READY))
692 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693 return;
694
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200695 case NAND_CMD_RNDOUT:
696 /* No ready / busy check necessary */
697 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
698 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
699 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
700 NAND_NCE | NAND_CTRL_CHANGE);
701 return;
702
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703 case NAND_CMD_READ0:
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200704 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
705 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
706 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
707 NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000708
David Woodhousee0c7d762006-05-13 18:07:53 +0100709 /* This applies to read commands */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700710 default:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000711 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700712 * If we don't have access to the busy pin, we apply the given
Brian Norris8b6e50c2011-05-25 14:59:01 -0700713 * command delay.
David Woodhousee0c7d762006-05-13 18:07:53 +0100714 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200715 if (!chip->dev_ready) {
716 udelay(chip->chip_delay);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700717 return;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000718 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719 }
Thomas Gleixner3b887752005-02-22 21:56:49 +0000720
Brian Norris8b6e50c2011-05-25 14:59:01 -0700721 /*
722 * Apply this short delay always to ensure that we do wait tWB in
723 * any case on any machine.
724 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100725 ndelay(100);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000726
727 nand_wait_ready(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700728}
729
730/**
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200731 * panic_nand_get_device - [GENERIC] Get chip for selected access
Brian Norris8b6e50c2011-05-25 14:59:01 -0700732 * @chip: the nand chip descriptor
733 * @mtd: MTD device structure
734 * @new_state: the state which is requested
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200735 *
736 * Used when in panic, no locks are taken.
737 */
738static void panic_nand_get_device(struct nand_chip *chip,
739 struct mtd_info *mtd, int new_state)
740{
Brian Norris7854d3f2011-06-23 14:12:08 -0700741 /* Hardware controller shared among independent devices */
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200742 chip->controller->active = chip;
743 chip->state = new_state;
744}
745
746/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747 * nand_get_device - [GENERIC] Get chip for selected access
Brian Norris8b6e50c2011-05-25 14:59:01 -0700748 * @mtd: MTD device structure
749 * @new_state: the state which is requested
Linus Torvalds1da177e2005-04-16 15:20:36 -0700750 *
751 * Get the device and lock it for exclusive access
752 */
Thomas Gleixner2c0a2be2006-05-23 11:50:56 +0200753static int
Huang Shijie6a8214a2012-11-19 14:43:30 +0800754nand_get_device(struct mtd_info *mtd, int new_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700755{
Huang Shijie6a8214a2012-11-19 14:43:30 +0800756 struct nand_chip *chip = mtd->priv;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200757 spinlock_t *lock = &chip->controller->lock;
758 wait_queue_head_t *wq = &chip->controller->wq;
David Woodhousee0c7d762006-05-13 18:07:53 +0100759 DECLARE_WAITQUEUE(wait, current);
Florian Fainelli7351d3a2010-09-07 13:23:45 +0200760retry:
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100761 spin_lock(lock);
762
vimal singhb8b3ee92009-07-09 20:41:22 +0530763 /* Hardware controller shared among independent devices */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200764 if (!chip->controller->active)
765 chip->controller->active = chip;
Thomas Gleixnera36ed292006-05-23 11:37:03 +0200766
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200767 if (chip->controller->active == chip && chip->state == FL_READY) {
768 chip->state = new_state;
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100769 spin_unlock(lock);
Vitaly Wool962034f2005-09-15 14:58:53 +0100770 return 0;
771 }
772 if (new_state == FL_PM_SUSPENDED) {
Li Yang6b0d9a82009-11-17 14:45:49 -0800773 if (chip->controller->active->state == FL_PM_SUSPENDED) {
774 chip->state = FL_PM_SUSPENDED;
775 spin_unlock(lock);
776 return 0;
Li Yang6b0d9a82009-11-17 14:45:49 -0800777 }
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100778 }
779 set_current_state(TASK_UNINTERRUPTIBLE);
780 add_wait_queue(wq, &wait);
781 spin_unlock(lock);
782 schedule();
783 remove_wait_queue(wq, &wait);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784 goto retry;
785}
786
787/**
Brian Norris8b6e50c2011-05-25 14:59:01 -0700788 * panic_nand_wait - [GENERIC] wait until the command is done
789 * @mtd: MTD device structure
790 * @chip: NAND chip structure
791 * @timeo: timeout
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200792 *
793 * Wait for command done. This is a helper function for nand_wait used when
794 * we are in interrupt context. May happen when in panic and trying to write
Uwe Kleine-Königb5950762010-11-01 15:38:34 -0400795 * an oops through mtdoops.
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200796 */
797static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
798 unsigned long timeo)
799{
800 int i;
801 for (i = 0; i < timeo; i++) {
802 if (chip->dev_ready) {
803 if (chip->dev_ready(mtd))
804 break;
805 } else {
806 if (chip->read_byte(mtd) & NAND_STATUS_READY)
807 break;
808 }
809 mdelay(1);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200810 }
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200811}
812
813/**
Brian Norris8b6e50c2011-05-25 14:59:01 -0700814 * nand_wait - [DEFAULT] wait until the command is done
815 * @mtd: MTD device structure
816 * @chip: NAND chip structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700817 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700818 * Wait for command done. This applies to erase and program only. Erase can
819 * take up to 400ms and program up to 20ms according to general NAND and
820 * SmartMedia specs.
Randy Dunlap844d3b42006-06-28 21:48:27 -0700821 */
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200822static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823{
824
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200825 int status, state = chip->state;
Huang Shijie6d2559f2013-01-30 10:03:56 +0800826 unsigned long timeo = (state == FL_ERASING ? 400 : 20);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700827
Richard Purdie8fe833c2006-03-31 02:31:14 -0800828 led_trigger_event(nand_led_trigger, LED_FULL);
829
Brian Norris8b6e50c2011-05-25 14:59:01 -0700830 /*
831 * Apply this short delay always to ensure that we do wait tWB in any
832 * case on any machine.
833 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100834 ndelay(100);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700835
Artem Bityutskiy14c65782013-03-04 14:21:34 +0200836 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200838 if (in_interrupt() || oops_in_progress)
839 panic_nand_wait(mtd, chip, timeo);
840 else {
Huang Shijie6d2559f2013-01-30 10:03:56 +0800841 timeo = jiffies + msecs_to_jiffies(timeo);
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200842 while (time_before(jiffies, timeo)) {
843 if (chip->dev_ready) {
844 if (chip->dev_ready(mtd))
845 break;
846 } else {
847 if (chip->read_byte(mtd) & NAND_STATUS_READY)
848 break;
849 }
850 cond_resched();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700851 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700852 }
Richard Purdie8fe833c2006-03-31 02:31:14 -0800853 led_trigger_event(nand_led_trigger, LED_OFF);
854
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200855 status = (int)chip->read_byte(mtd);
Matthieu CASTETf251b8d2012-11-05 15:00:44 +0100856 /* This can happen if in case of timeout or buggy dev_ready */
857 WARN_ON(!(status & NAND_STATUS_READY));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700858 return status;
859}
860
861/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700862 * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700863 * @mtd: mtd info
864 * @ofs: offset to start unlock from
865 * @len: length to unlock
Brian Norris8b6e50c2011-05-25 14:59:01 -0700866 * @invert: when = 0, unlock the range of blocks within the lower and
867 * upper boundary address
868 * when = 1, unlock the range of blocks outside the boundaries
869 * of the lower and upper boundary address
Vimal Singh7d70f332010-02-08 15:50:49 +0530870 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700871 * Returs unlock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530872 */
873static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,
874 uint64_t len, int invert)
875{
876 int ret = 0;
877 int status, page;
878 struct nand_chip *chip = mtd->priv;
879
880 /* Submit address of first page to unlock */
881 page = ofs >> chip->page_shift;
882 chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask);
883
884 /* Submit address of last page to unlock */
885 page = (ofs + len) >> chip->page_shift;
886 chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1,
887 (page | invert) & chip->pagemask);
888
889 /* Call wait ready function */
890 status = chip->waitfunc(mtd, chip);
Vimal Singh7d70f332010-02-08 15:50:49 +0530891 /* See if device thinks it succeeded */
Huang Shijie74830962012-10-14 23:47:24 -0400892 if (status & NAND_STATUS_FAIL) {
Brian Norris289c0522011-07-19 10:06:09 -0700893 pr_debug("%s: error status = 0x%08x\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530894 __func__, status);
895 ret = -EIO;
896 }
897
898 return ret;
899}
900
901/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700902 * nand_unlock - [REPLACEABLE] unlocks specified locked blocks
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700903 * @mtd: mtd info
904 * @ofs: offset to start unlock from
905 * @len: length to unlock
Vimal Singh7d70f332010-02-08 15:50:49 +0530906 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700907 * Returns unlock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530908 */
909int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
910{
911 int ret = 0;
912 int chipnr;
913 struct nand_chip *chip = mtd->priv;
914
Brian Norris289c0522011-07-19 10:06:09 -0700915 pr_debug("%s: start = 0x%012llx, len = %llu\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530916 __func__, (unsigned long long)ofs, len);
917
918 if (check_offs_len(mtd, ofs, len))
919 ret = -EINVAL;
920
921 /* Align to last block address if size addresses end of the device */
922 if (ofs + len == mtd->size)
923 len -= mtd->erasesize;
924
Huang Shijie6a8214a2012-11-19 14:43:30 +0800925 nand_get_device(mtd, FL_UNLOCKING);
Vimal Singh7d70f332010-02-08 15:50:49 +0530926
927 /* Shift to get chip number */
928 chipnr = ofs >> chip->chip_shift;
929
930 chip->select_chip(mtd, chipnr);
931
932 /* Check, if it is write protected */
933 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -0700934 pr_debug("%s: device is write protected!\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530935 __func__);
936 ret = -EIO;
937 goto out;
938 }
939
940 ret = __nand_unlock(mtd, ofs, len, 0);
941
942out:
Huang Shijieb0bb6902012-11-19 14:43:29 +0800943 chip->select_chip(mtd, -1);
Vimal Singh7d70f332010-02-08 15:50:49 +0530944 nand_release_device(mtd);
945
946 return ret;
947}
Florian Fainelli7351d3a2010-09-07 13:23:45 +0200948EXPORT_SYMBOL(nand_unlock);
Vimal Singh7d70f332010-02-08 15:50:49 +0530949
950/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700951 * nand_lock - [REPLACEABLE] locks all blocks present in the device
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700952 * @mtd: mtd info
953 * @ofs: offset to start unlock from
954 * @len: length to unlock
Vimal Singh7d70f332010-02-08 15:50:49 +0530955 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700956 * This feature is not supported in many NAND parts. 'Micron' NAND parts do
957 * have this feature, but it allows only to lock all blocks, not for specified
958 * range for block. Implementing 'lock' feature by making use of 'unlock', for
959 * now.
Vimal Singh7d70f332010-02-08 15:50:49 +0530960 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700961 * Returns lock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530962 */
963int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
964{
965 int ret = 0;
966 int chipnr, status, page;
967 struct nand_chip *chip = mtd->priv;
968
Brian Norris289c0522011-07-19 10:06:09 -0700969 pr_debug("%s: start = 0x%012llx, len = %llu\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530970 __func__, (unsigned long long)ofs, len);
971
972 if (check_offs_len(mtd, ofs, len))
973 ret = -EINVAL;
974
Huang Shijie6a8214a2012-11-19 14:43:30 +0800975 nand_get_device(mtd, FL_LOCKING);
Vimal Singh7d70f332010-02-08 15:50:49 +0530976
977 /* Shift to get chip number */
978 chipnr = ofs >> chip->chip_shift;
979
980 chip->select_chip(mtd, chipnr);
981
982 /* Check, if it is write protected */
983 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -0700984 pr_debug("%s: device is write protected!\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530985 __func__);
986 status = MTD_ERASE_FAILED;
987 ret = -EIO;
988 goto out;
989 }
990
991 /* Submit address of first page to lock */
992 page = ofs >> chip->page_shift;
993 chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask);
994
995 /* Call wait ready function */
996 status = chip->waitfunc(mtd, chip);
Vimal Singh7d70f332010-02-08 15:50:49 +0530997 /* See if device thinks it succeeded */
Huang Shijie74830962012-10-14 23:47:24 -0400998 if (status & NAND_STATUS_FAIL) {
Brian Norris289c0522011-07-19 10:06:09 -0700999 pr_debug("%s: error status = 0x%08x\n",
Vimal Singh7d70f332010-02-08 15:50:49 +05301000 __func__, status);
1001 ret = -EIO;
1002 goto out;
1003 }
1004
1005 ret = __nand_unlock(mtd, ofs, len, 0x1);
1006
1007out:
Huang Shijieb0bb6902012-11-19 14:43:29 +08001008 chip->select_chip(mtd, -1);
Vimal Singh7d70f332010-02-08 15:50:49 +05301009 nand_release_device(mtd);
1010
1011 return ret;
1012}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001013EXPORT_SYMBOL(nand_lock);
Vimal Singh7d70f332010-02-08 15:50:49 +05301014
1015/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001016 * nand_read_page_raw - [INTERN] read raw page data without ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001017 * @mtd: mtd info structure
1018 * @chip: nand chip info structure
1019 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001020 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001021 * @page: page number to read
David Brownell52ff49d2009-03-04 12:01:36 -08001022 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001023 * Not for syndrome calculating ECC controllers, which use a special oob layout.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001024 */
1025static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001026 uint8_t *buf, int oob_required, int page)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001027{
1028 chip->read_buf(mtd, buf, mtd->writesize);
Brian Norris279f08d2012-05-02 10:15:03 -07001029 if (oob_required)
1030 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001031 return 0;
1032}
1033
1034/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001035 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001036 * @mtd: mtd info structure
1037 * @chip: nand chip info structure
1038 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001039 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001040 * @page: page number to read
David Brownell52ff49d2009-03-04 12:01:36 -08001041 *
1042 * We need a special oob layout and handling even when OOB isn't used.
1043 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001044static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07001045 struct nand_chip *chip, uint8_t *buf,
1046 int oob_required, int page)
David Brownell52ff49d2009-03-04 12:01:36 -08001047{
1048 int eccsize = chip->ecc.size;
1049 int eccbytes = chip->ecc.bytes;
1050 uint8_t *oob = chip->oob_poi;
1051 int steps, size;
1052
1053 for (steps = chip->ecc.steps; steps > 0; steps--) {
1054 chip->read_buf(mtd, buf, eccsize);
1055 buf += eccsize;
1056
1057 if (chip->ecc.prepad) {
1058 chip->read_buf(mtd, oob, chip->ecc.prepad);
1059 oob += chip->ecc.prepad;
1060 }
1061
1062 chip->read_buf(mtd, oob, eccbytes);
1063 oob += eccbytes;
1064
1065 if (chip->ecc.postpad) {
1066 chip->read_buf(mtd, oob, chip->ecc.postpad);
1067 oob += chip->ecc.postpad;
1068 }
1069 }
1070
1071 size = mtd->oobsize - (oob - chip->oob_poi);
1072 if (size)
1073 chip->read_buf(mtd, oob, size);
1074
1075 return 0;
1076}
1077
1078/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001079 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001080 * @mtd: mtd info structure
1081 * @chip: nand chip info structure
1082 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001083 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001084 * @page: page number to read
David A. Marlin068e3c02005-01-24 03:07:46 +00001085 */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001086static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001087 uint8_t *buf, int oob_required, int page)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001088{
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001089 int i, eccsize = chip->ecc.size;
1090 int eccbytes = chip->ecc.bytes;
1091 int eccsteps = chip->ecc.steps;
1092 uint8_t *p = buf;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001093 uint8_t *ecc_calc = chip->buffers->ecccalc;
1094 uint8_t *ecc_code = chip->buffers->ecccode;
Ben Dooks8b099a32007-05-28 19:17:54 +01001095 uint32_t *eccpos = chip->ecc.layout->eccpos;
Mike Dunn3f91e942012-04-25 12:06:09 -07001096 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001097
Brian Norris1fbb9382012-05-02 10:14:55 -07001098 chip->ecc.read_page_raw(mtd, chip, buf, 1, page);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001099
1100 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1101 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1102
1103 for (i = 0; i < chip->ecc.total; i++)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001104 ecc_code[i] = chip->oob_poi[eccpos[i]];
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001105
1106 eccsteps = chip->ecc.steps;
1107 p = buf;
1108
1109 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1110 int stat;
1111
1112 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001113 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001114 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001115 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001116 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001117 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1118 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001119 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001120 return max_bitflips;
Thomas Gleixner22c60f52005-04-04 19:56:32 +01001121}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001122
Linus Torvalds1da177e2005-04-16 15:20:36 -07001123/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001124 * nand_read_subpage - [REPLACEABLE] software ECC based sub-page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001125 * @mtd: mtd info structure
1126 * @chip: nand chip info structure
1127 * @data_offs: offset of requested data within the page
1128 * @readlen: data length
1129 * @bufpoi: buffer to store read data
Alexey Korolev3d459552008-05-15 17:23:18 +01001130 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001131static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1132 uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
Alexey Korolev3d459552008-05-15 17:23:18 +01001133{
1134 int start_step, end_step, num_steps;
1135 uint32_t *eccpos = chip->ecc.layout->eccpos;
1136 uint8_t *p;
1137 int data_col_addr, i, gaps = 0;
1138 int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
1139 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001140 int index = 0;
Mike Dunn3f91e942012-04-25 12:06:09 -07001141 unsigned int max_bitflips = 0;
Alexey Korolev3d459552008-05-15 17:23:18 +01001142
Brian Norris7854d3f2011-06-23 14:12:08 -07001143 /* Column address within the page aligned to ECC size (256bytes) */
Alexey Korolev3d459552008-05-15 17:23:18 +01001144 start_step = data_offs / chip->ecc.size;
1145 end_step = (data_offs + readlen - 1) / chip->ecc.size;
1146 num_steps = end_step - start_step + 1;
1147
Brian Norris8b6e50c2011-05-25 14:59:01 -07001148 /* Data size aligned to ECC ecc.size */
Alexey Korolev3d459552008-05-15 17:23:18 +01001149 datafrag_len = num_steps * chip->ecc.size;
1150 eccfrag_len = num_steps * chip->ecc.bytes;
1151
1152 data_col_addr = start_step * chip->ecc.size;
1153 /* If we read not a page aligned data */
1154 if (data_col_addr != 0)
1155 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
1156
1157 p = bufpoi + data_col_addr;
1158 chip->read_buf(mtd, p, datafrag_len);
1159
Brian Norris8b6e50c2011-05-25 14:59:01 -07001160 /* Calculate ECC */
Alexey Korolev3d459552008-05-15 17:23:18 +01001161 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
1162 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
1163
Brian Norris8b6e50c2011-05-25 14:59:01 -07001164 /*
1165 * The performance is faster if we position offsets according to
Brian Norris7854d3f2011-06-23 14:12:08 -07001166 * ecc.pos. Let's make sure that there are no gaps in ECC positions.
Brian Norris8b6e50c2011-05-25 14:59:01 -07001167 */
Alexey Korolev3d459552008-05-15 17:23:18 +01001168 for (i = 0; i < eccfrag_len - 1; i++) {
1169 if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=
1170 eccpos[i + start_step * chip->ecc.bytes + 1]) {
1171 gaps = 1;
1172 break;
1173 }
1174 }
1175 if (gaps) {
1176 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
1177 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1178 } else {
Brian Norris8b6e50c2011-05-25 14:59:01 -07001179 /*
Brian Norris7854d3f2011-06-23 14:12:08 -07001180 * Send the command to read the particular ECC bytes take care
Brian Norris8b6e50c2011-05-25 14:59:01 -07001181 * about buswidth alignment in read_buf.
1182 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001183 index = start_step * chip->ecc.bytes;
1184
1185 aligned_pos = eccpos[index] & ~(busw - 1);
Alexey Korolev3d459552008-05-15 17:23:18 +01001186 aligned_len = eccfrag_len;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001187 if (eccpos[index] & (busw - 1))
Alexey Korolev3d459552008-05-15 17:23:18 +01001188 aligned_len++;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001189 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))
Alexey Korolev3d459552008-05-15 17:23:18 +01001190 aligned_len++;
1191
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001192 chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
1193 mtd->writesize + aligned_pos, -1);
Alexey Korolev3d459552008-05-15 17:23:18 +01001194 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);
1195 }
1196
1197 for (i = 0; i < eccfrag_len; i++)
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001198 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];
Alexey Korolev3d459552008-05-15 17:23:18 +01001199
1200 p = bufpoi + data_col_addr;
1201 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
1202 int stat;
1203
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001204 stat = chip->ecc.correct(mtd, p,
1205 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001206 if (stat < 0) {
Alexey Korolev3d459552008-05-15 17:23:18 +01001207 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001208 } else {
Alexey Korolev3d459552008-05-15 17:23:18 +01001209 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001210 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1211 }
Alexey Korolev3d459552008-05-15 17:23:18 +01001212 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001213 return max_bitflips;
Alexey Korolev3d459552008-05-15 17:23:18 +01001214}
1215
1216/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001217 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001218 * @mtd: mtd info structure
1219 * @chip: nand chip info structure
1220 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001221 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001222 * @page: page number to read
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001223 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001224 * Not for syndrome calculating ECC controllers which need a special oob layout.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001225 */
1226static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001227 uint8_t *buf, int oob_required, int page)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001228{
1229 int i, eccsize = chip->ecc.size;
1230 int eccbytes = chip->ecc.bytes;
1231 int eccsteps = chip->ecc.steps;
1232 uint8_t *p = buf;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001233 uint8_t *ecc_calc = chip->buffers->ecccalc;
1234 uint8_t *ecc_code = chip->buffers->ecccode;
Ben Dooks8b099a32007-05-28 19:17:54 +01001235 uint32_t *eccpos = chip->ecc.layout->eccpos;
Mike Dunn3f91e942012-04-25 12:06:09 -07001236 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001237
1238 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1239 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1240 chip->read_buf(mtd, p, eccsize);
1241 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1242 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001243 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001244
1245 for (i = 0; i < chip->ecc.total; i++)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001246 ecc_code[i] = chip->oob_poi[eccpos[i]];
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001247
1248 eccsteps = chip->ecc.steps;
1249 p = buf;
1250
1251 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1252 int stat;
1253
1254 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001255 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001256 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001257 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001258 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001259 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1260 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001261 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001262 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001263}
1264
1265/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001266 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
Brian Norris8b6e50c2011-05-25 14:59:01 -07001267 * @mtd: mtd info structure
1268 * @chip: nand chip info structure
1269 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001270 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001271 * @page: page number to read
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001272 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001273 * Hardware ECC for large page chips, require OOB to be read first. For this
1274 * ECC mode, the write_page method is re-used from ECC_HW. These methods
1275 * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
1276 * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
1277 * the data area, by overwriting the NAND manufacturer bad block markings.
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001278 */
1279static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07001280 struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001281{
1282 int i, eccsize = chip->ecc.size;
1283 int eccbytes = chip->ecc.bytes;
1284 int eccsteps = chip->ecc.steps;
1285 uint8_t *p = buf;
1286 uint8_t *ecc_code = chip->buffers->ecccode;
1287 uint32_t *eccpos = chip->ecc.layout->eccpos;
1288 uint8_t *ecc_calc = chip->buffers->ecccalc;
Mike Dunn3f91e942012-04-25 12:06:09 -07001289 unsigned int max_bitflips = 0;
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001290
1291 /* Read the OOB area first */
1292 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1293 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1294 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1295
1296 for (i = 0; i < chip->ecc.total; i++)
1297 ecc_code[i] = chip->oob_poi[eccpos[i]];
1298
1299 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1300 int stat;
1301
1302 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1303 chip->read_buf(mtd, p, eccsize);
1304 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1305
1306 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
Mike Dunn3f91e942012-04-25 12:06:09 -07001307 if (stat < 0) {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001308 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001309 } else {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001310 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001311 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1312 }
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001313 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001314 return max_bitflips;
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001315}
1316
1317/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001318 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
Brian Norris8b6e50c2011-05-25 14:59:01 -07001319 * @mtd: mtd info structure
1320 * @chip: nand chip info structure
1321 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001322 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001323 * @page: page number to read
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001324 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001325 * The hw generator calculates the error syndrome automatically. Therefore we
1326 * need a special oob layout and handling.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001327 */
1328static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001329 uint8_t *buf, int oob_required, int page)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001330{
1331 int i, eccsize = chip->ecc.size;
1332 int eccbytes = chip->ecc.bytes;
1333 int eccsteps = chip->ecc.steps;
1334 uint8_t *p = buf;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001335 uint8_t *oob = chip->oob_poi;
Mike Dunn3f91e942012-04-25 12:06:09 -07001336 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001337
1338 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1339 int stat;
1340
1341 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1342 chip->read_buf(mtd, p, eccsize);
1343
1344 if (chip->ecc.prepad) {
1345 chip->read_buf(mtd, oob, chip->ecc.prepad);
1346 oob += chip->ecc.prepad;
1347 }
1348
1349 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
1350 chip->read_buf(mtd, oob, eccbytes);
1351 stat = chip->ecc.correct(mtd, p, oob, NULL);
1352
Mike Dunn3f91e942012-04-25 12:06:09 -07001353 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001354 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001355 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001356 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001357 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1358 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001359
1360 oob += eccbytes;
1361
1362 if (chip->ecc.postpad) {
1363 chip->read_buf(mtd, oob, chip->ecc.postpad);
1364 oob += chip->ecc.postpad;
1365 }
1366 }
1367
1368 /* Calculate remaining oob bytes */
Vitaly Wool7e4178f2006-06-07 09:34:37 +04001369 i = mtd->oobsize - (oob - chip->oob_poi);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001370 if (i)
1371 chip->read_buf(mtd, oob, i);
1372
Mike Dunn3f91e942012-04-25 12:06:09 -07001373 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001374}
1375
1376/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001377 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -07001378 * @chip: nand chip structure
1379 * @oob: oob destination address
1380 * @ops: oob ops structure
1381 * @len: size of oob to transfer
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001382 */
1383static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
Vitaly Wool70145682006-11-03 18:20:38 +03001384 struct mtd_oob_ops *ops, size_t len)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001385{
Florian Fainellif8ac0412010-09-07 13:23:43 +02001386 switch (ops->mode) {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001387
Brian Norris0612b9d2011-08-30 18:45:40 -07001388 case MTD_OPS_PLACE_OOB:
1389 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001390 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
1391 return oob + len;
1392
Brian Norris0612b9d2011-08-30 18:45:40 -07001393 case MTD_OPS_AUTO_OOB: {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001394 struct nand_oobfree *free = chip->ecc.layout->oobfree;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001395 uint32_t boffs = 0, roffs = ops->ooboffs;
1396 size_t bytes = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001397
Florian Fainellif8ac0412010-09-07 13:23:43 +02001398 for (; free->length && len; free++, len -= bytes) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07001399 /* Read request not from offset 0? */
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001400 if (unlikely(roffs)) {
1401 if (roffs >= free->length) {
1402 roffs -= free->length;
1403 continue;
1404 }
1405 boffs = free->offset + roffs;
1406 bytes = min_t(size_t, len,
1407 (free->length - roffs));
1408 roffs = 0;
1409 } else {
1410 bytes = min_t(size_t, len, free->length);
1411 boffs = free->offset;
1412 }
1413 memcpy(oob, chip->oob_poi + boffs, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001414 oob += bytes;
1415 }
1416 return oob;
1417 }
1418 default:
1419 BUG();
1420 }
1421 return NULL;
1422}
1423
1424/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001425 * nand_do_read_ops - [INTERN] Read data with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07001426 * @mtd: MTD device structure
1427 * @from: offset to read from
1428 * @ops: oob ops structure
David A. Marlin068e3c02005-01-24 03:07:46 +00001429 *
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001430 * Internal function. Called with chip held.
David A. Marlin068e3c02005-01-24 03:07:46 +00001431 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001432static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1433 struct mtd_oob_ops *ops)
David A. Marlin068e3c02005-01-24 03:07:46 +00001434{
Brian Norrise47f3db2012-05-02 10:14:56 -07001435 int chipnr, page, realpage, col, bytes, aligned, oob_required;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001436 struct nand_chip *chip = mtd->priv;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001437 struct mtd_ecc_stats stats;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001438 int ret = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001439 uint32_t readlen = ops->len;
Vitaly Wool70145682006-11-03 18:20:38 +03001440 uint32_t oobreadlen = ops->ooblen;
Brian Norris0612b9d2011-08-30 18:45:40 -07001441 uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ?
Maxim Levitsky9aca3342010-02-22 20:39:35 +02001442 mtd->oobavail : mtd->oobsize;
1443
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001444 uint8_t *bufpoi, *oob, *buf;
Mike Dunnedbc45402012-04-25 12:06:11 -07001445 unsigned int max_bitflips = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001446
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001447 stats = mtd->ecc_stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001448
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001449 chipnr = (int)(from >> chip->chip_shift);
1450 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001451
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001452 realpage = (int)(from >> chip->page_shift);
1453 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001454
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001455 col = (int)(from & (mtd->writesize - 1));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001456
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001457 buf = ops->datbuf;
1458 oob = ops->oobbuf;
Brian Norrise47f3db2012-05-02 10:14:56 -07001459 oob_required = oob ? 1 : 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001460
Florian Fainellif8ac0412010-09-07 13:23:43 +02001461 while (1) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001462 bytes = min(mtd->writesize - col, readlen);
1463 aligned = (bytes == mtd->writesize);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001464
Brian Norris8b6e50c2011-05-25 14:59:01 -07001465 /* Is the current page in the buffer? */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001466 if (realpage != chip->pagebuf || oob) {
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001467 bufpoi = aligned ? buf : chip->buffers->databuf;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001468
Brian Norrisc00a0992012-05-01 17:12:54 -07001469 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001470
Mike Dunnedbc45402012-04-25 12:06:11 -07001471 /*
1472 * Now read the page into the buffer. Absent an error,
1473 * the read methods return max bitflips per ecc step.
1474 */
Brian Norris0612b9d2011-08-30 18:45:40 -07001475 if (unlikely(ops->mode == MTD_OPS_RAW))
Brian Norris1fbb9382012-05-02 10:14:55 -07001476 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,
Brian Norrise47f3db2012-05-02 10:14:56 -07001477 oob_required,
1478 page);
Jeff Westfahla5ff4f12012-08-13 16:35:30 -05001479 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
1480 !oob)
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001481 ret = chip->ecc.read_subpage(mtd, chip,
1482 col, bytes, bufpoi);
David Woodhouse956e9442006-09-25 17:12:39 +01001483 else
Sneha Narnakaje46a8cf22009-09-18 12:51:46 -07001484 ret = chip->ecc.read_page(mtd, chip, bufpoi,
Brian Norrise47f3db2012-05-02 10:14:56 -07001485 oob_required, page);
Brian Norris6d77b9d2011-09-07 13:13:40 -07001486 if (ret < 0) {
1487 if (!aligned)
1488 /* Invalidate page cache */
1489 chip->pagebuf = -1;
David Woodhousee0c7d762006-05-13 18:07:53 +01001490 break;
Brian Norris6d77b9d2011-09-07 13:13:40 -07001491 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001492
Mike Dunnedbc45402012-04-25 12:06:11 -07001493 max_bitflips = max_t(unsigned int, max_bitflips, ret);
1494
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001495 /* Transfer not aligned data */
1496 if (!aligned) {
Jeff Westfahla5ff4f12012-08-13 16:35:30 -05001497 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
Brian Norris6d77b9d2011-09-07 13:13:40 -07001498 !(mtd->ecc_stats.failed - stats.failed) &&
Mike Dunnedbc45402012-04-25 12:06:11 -07001499 (ops->mode != MTD_OPS_RAW)) {
Alexey Korolev3d459552008-05-15 17:23:18 +01001500 chip->pagebuf = realpage;
Mike Dunnedbc45402012-04-25 12:06:11 -07001501 chip->pagebuf_bitflips = ret;
1502 } else {
Brian Norris6d77b9d2011-09-07 13:13:40 -07001503 /* Invalidate page cache */
1504 chip->pagebuf = -1;
Mike Dunnedbc45402012-04-25 12:06:11 -07001505 }
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001506 memcpy(buf, chip->buffers->databuf + col, bytes);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001507 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001508
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001509 buf += bytes;
1510
1511 if (unlikely(oob)) {
Maxim Levitskyb64d39d2010-02-22 20:39:37 +02001512 int toread = min(oobreadlen, max_oobsize);
1513
1514 if (toread) {
1515 oob = nand_transfer_oob(chip,
1516 oob, ops, toread);
1517 oobreadlen -= toread;
1518 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001519 }
Brian Norris5bc7c332013-03-13 09:51:31 -07001520
1521 if (chip->options & NAND_NEED_READRDY) {
1522 /* Apply delay or wait for ready/busy pin */
1523 if (!chip->dev_ready)
1524 udelay(chip->chip_delay);
1525 else
1526 nand_wait_ready(mtd);
1527 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001528 } else {
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001529 memcpy(buf, chip->buffers->databuf + col, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001530 buf += bytes;
Mike Dunnedbc45402012-04-25 12:06:11 -07001531 max_bitflips = max_t(unsigned int, max_bitflips,
1532 chip->pagebuf_bitflips);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001533 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001534
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001535 readlen -= bytes;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001536
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001537 if (!readlen)
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001538 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001539
Brian Norris8b6e50c2011-05-25 14:59:01 -07001540 /* For subsequent reads align to page boundary */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001541 col = 0;
1542 /* Increment page address */
1543 realpage++;
1544
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001545 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001546 /* Check, if we cross a chip boundary */
1547 if (!page) {
1548 chipnr++;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001549 chip->select_chip(mtd, -1);
1550 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001551 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001552 }
Huang Shijieb0bb6902012-11-19 14:43:29 +08001553 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001554
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001555 ops->retlen = ops->len - (size_t) readlen;
Vitaly Wool70145682006-11-03 18:20:38 +03001556 if (oob)
1557 ops->oobretlen = ops->ooblen - oobreadlen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001558
Mike Dunn3f91e942012-04-25 12:06:09 -07001559 if (ret < 0)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001560 return ret;
1561
Thomas Gleixner9a1fcdf2006-05-29 14:56:39 +02001562 if (mtd->ecc_stats.failed - stats.failed)
1563 return -EBADMSG;
1564
Mike Dunnedbc45402012-04-25 12:06:11 -07001565 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001566}
1567
1568/**
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001569 * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001570 * @mtd: MTD device structure
1571 * @from: offset to read from
1572 * @len: number of bytes to read
1573 * @retlen: pointer to variable to store the number of read bytes
1574 * @buf: the databuffer to put data
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001575 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001576 * Get hold of the chip and call nand_do_read.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001577 */
1578static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1579 size_t *retlen, uint8_t *buf)
1580{
Brian Norris4a89ff82011-08-30 18:45:45 -07001581 struct mtd_oob_ops ops;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001582 int ret;
1583
Huang Shijie6a8214a2012-11-19 14:43:30 +08001584 nand_get_device(mtd, FL_READING);
Brian Norris4a89ff82011-08-30 18:45:45 -07001585 ops.len = len;
1586 ops.datbuf = buf;
1587 ops.oobbuf = NULL;
Huang Shijie11041ae2012-07-03 16:44:14 +08001588 ops.mode = MTD_OPS_PLACE_OOB;
Brian Norris4a89ff82011-08-30 18:45:45 -07001589 ret = nand_do_read_ops(mtd, from, &ops);
Brian Norris4a89ff82011-08-30 18:45:45 -07001590 *retlen = ops.retlen;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001591 nand_release_device(mtd);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001592 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001593}
1594
1595/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001596 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001597 * @mtd: mtd info structure
1598 * @chip: nand chip info structure
1599 * @page: page number to read
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001600 */
1601static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001602 int page)
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001603{
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001604 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001605 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001606 return 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001607}
1608
1609/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001610 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001611 * with syndromes
Brian Norris8b6e50c2011-05-25 14:59:01 -07001612 * @mtd: mtd info structure
1613 * @chip: nand chip info structure
1614 * @page: page number to read
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001615 */
1616static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001617 int page)
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001618{
1619 uint8_t *buf = chip->oob_poi;
1620 int length = mtd->oobsize;
1621 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1622 int eccsize = chip->ecc.size;
1623 uint8_t *bufpoi = buf;
1624 int i, toread, sndrnd = 0, pos;
1625
1626 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
1627 for (i = 0; i < chip->ecc.steps; i++) {
1628 if (sndrnd) {
1629 pos = eccsize + i * (eccsize + chunk);
1630 if (mtd->writesize > 512)
1631 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
1632 else
1633 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
1634 } else
1635 sndrnd = 1;
1636 toread = min_t(int, length, chunk);
1637 chip->read_buf(mtd, bufpoi, toread);
1638 bufpoi += toread;
1639 length -= toread;
1640 }
1641 if (length > 0)
1642 chip->read_buf(mtd, bufpoi, length);
1643
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001644 return 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001645}
1646
1647/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001648 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001649 * @mtd: mtd info structure
1650 * @chip: nand chip info structure
1651 * @page: page number to write
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001652 */
1653static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1654 int page)
1655{
1656 int status = 0;
1657 const uint8_t *buf = chip->oob_poi;
1658 int length = mtd->oobsize;
1659
1660 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
1661 chip->write_buf(mtd, buf, length);
1662 /* Send command to program the OOB data */
1663 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1664
1665 status = chip->waitfunc(mtd, chip);
1666
Savin Zlobec0d420f92006-06-21 11:51:20 +02001667 return status & NAND_STATUS_FAIL ? -EIO : 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001668}
1669
1670/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001671 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07001672 * with syndrome - only for large page flash
1673 * @mtd: mtd info structure
1674 * @chip: nand chip info structure
1675 * @page: page number to write
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001676 */
1677static int nand_write_oob_syndrome(struct mtd_info *mtd,
1678 struct nand_chip *chip, int page)
1679{
1680 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1681 int eccsize = chip->ecc.size, length = mtd->oobsize;
1682 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
1683 const uint8_t *bufpoi = chip->oob_poi;
1684
1685 /*
1686 * data-ecc-data-ecc ... ecc-oob
1687 * or
1688 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1689 */
1690 if (!chip->ecc.prepad && !chip->ecc.postpad) {
1691 pos = steps * (eccsize + chunk);
1692 steps = 0;
1693 } else
Vitaly Wool8b0036e2006-07-11 09:11:25 +02001694 pos = eccsize;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001695
1696 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
1697 for (i = 0; i < steps; i++) {
1698 if (sndcmd) {
1699 if (mtd->writesize <= 512) {
1700 uint32_t fill = 0xFFFFFFFF;
1701
1702 len = eccsize;
1703 while (len > 0) {
1704 int num = min_t(int, len, 4);
1705 chip->write_buf(mtd, (uint8_t *)&fill,
1706 num);
1707 len -= num;
1708 }
1709 } else {
1710 pos = eccsize + i * (eccsize + chunk);
1711 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
1712 }
1713 } else
1714 sndcmd = 1;
1715 len = min_t(int, length, chunk);
1716 chip->write_buf(mtd, bufpoi, len);
1717 bufpoi += len;
1718 length -= len;
1719 }
1720 if (length > 0)
1721 chip->write_buf(mtd, bufpoi, length);
1722
1723 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1724 status = chip->waitfunc(mtd, chip);
1725
1726 return status & NAND_STATUS_FAIL ? -EIO : 0;
1727}
1728
1729/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001730 * nand_do_read_oob - [INTERN] NAND read out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07001731 * @mtd: MTD device structure
1732 * @from: offset to read from
1733 * @ops: oob operations description structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07001734 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001735 * NAND read out-of-band data from the spare area.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001736 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001737static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1738 struct mtd_oob_ops *ops)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001739{
Brian Norrisc00a0992012-05-01 17:12:54 -07001740 int page, realpage, chipnr;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001741 struct nand_chip *chip = mtd->priv;
Brian Norris041e4572011-06-23 16:45:24 -07001742 struct mtd_ecc_stats stats;
Vitaly Wool70145682006-11-03 18:20:38 +03001743 int readlen = ops->ooblen;
1744 int len;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001745 uint8_t *buf = ops->oobbuf;
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001746 int ret = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001747
Brian Norris289c0522011-07-19 10:06:09 -07001748 pr_debug("%s: from = 0x%08Lx, len = %i\n",
vimal singh20d8e242009-07-07 15:49:49 +05301749 __func__, (unsigned long long)from, readlen);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001750
Brian Norris041e4572011-06-23 16:45:24 -07001751 stats = mtd->ecc_stats;
1752
Brian Norris0612b9d2011-08-30 18:45:40 -07001753 if (ops->mode == MTD_OPS_AUTO_OOB)
Vitaly Wool70145682006-11-03 18:20:38 +03001754 len = chip->ecc.layout->oobavail;
Adrian Hunter03736152007-01-31 17:58:29 +02001755 else
1756 len = mtd->oobsize;
1757
1758 if (unlikely(ops->ooboffs >= len)) {
Brian Norris289c0522011-07-19 10:06:09 -07001759 pr_debug("%s: attempt to start read outside oob\n",
1760 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02001761 return -EINVAL;
1762 }
1763
1764 /* Do not allow reads past end of device */
1765 if (unlikely(from >= mtd->size ||
1766 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
1767 (from >> chip->page_shift)) * len)) {
Brian Norris289c0522011-07-19 10:06:09 -07001768 pr_debug("%s: attempt to read beyond end of device\n",
1769 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02001770 return -EINVAL;
1771 }
Vitaly Wool70145682006-11-03 18:20:38 +03001772
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001773 chipnr = (int)(from >> chip->chip_shift);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001774 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001775
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001776 /* Shift to get page */
1777 realpage = (int)(from >> chip->page_shift);
1778 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001779
Florian Fainellif8ac0412010-09-07 13:23:43 +02001780 while (1) {
Brian Norris0612b9d2011-08-30 18:45:40 -07001781 if (ops->mode == MTD_OPS_RAW)
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001782 ret = chip->ecc.read_oob_raw(mtd, chip, page);
Brian Norrisc46f6482011-08-30 18:45:38 -07001783 else
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001784 ret = chip->ecc.read_oob(mtd, chip, page);
1785
1786 if (ret < 0)
1787 break;
Vitaly Wool70145682006-11-03 18:20:38 +03001788
1789 len = min(len, readlen);
1790 buf = nand_transfer_oob(chip, buf, ops, len);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001791
Brian Norris5bc7c332013-03-13 09:51:31 -07001792 if (chip->options & NAND_NEED_READRDY) {
1793 /* Apply delay or wait for ready/busy pin */
1794 if (!chip->dev_ready)
1795 udelay(chip->chip_delay);
1796 else
1797 nand_wait_ready(mtd);
1798 }
1799
Vitaly Wool70145682006-11-03 18:20:38 +03001800 readlen -= len;
Savin Zlobec0d420f92006-06-21 11:51:20 +02001801 if (!readlen)
1802 break;
1803
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001804 /* Increment page address */
1805 realpage++;
1806
1807 page = realpage & chip->pagemask;
1808 /* Check, if we cross a chip boundary */
1809 if (!page) {
1810 chipnr++;
1811 chip->select_chip(mtd, -1);
1812 chip->select_chip(mtd, chipnr);
1813 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001814 }
Huang Shijieb0bb6902012-11-19 14:43:29 +08001815 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001816
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001817 ops->oobretlen = ops->ooblen - readlen;
1818
1819 if (ret < 0)
1820 return ret;
Brian Norris041e4572011-06-23 16:45:24 -07001821
1822 if (mtd->ecc_stats.failed - stats.failed)
1823 return -EBADMSG;
1824
1825 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001826}
1827
1828/**
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001829 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07001830 * @mtd: MTD device structure
1831 * @from: offset to read from
1832 * @ops: oob operation description structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07001833 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001834 * NAND read data and/or out-of-band data.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001835 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001836static int nand_read_oob(struct mtd_info *mtd, loff_t from,
1837 struct mtd_oob_ops *ops)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001838{
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001839 int ret = -ENOTSUPP;
1840
1841 ops->retlen = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001842
1843 /* Do not allow reads past end of device */
Vitaly Wool70145682006-11-03 18:20:38 +03001844 if (ops->datbuf && (from + ops->len) > mtd->size) {
Brian Norris289c0522011-07-19 10:06:09 -07001845 pr_debug("%s: attempt to read beyond end of device\n",
1846 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001847 return -EINVAL;
1848 }
1849
Huang Shijie6a8214a2012-11-19 14:43:30 +08001850 nand_get_device(mtd, FL_READING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001851
Florian Fainellif8ac0412010-09-07 13:23:43 +02001852 switch (ops->mode) {
Brian Norris0612b9d2011-08-30 18:45:40 -07001853 case MTD_OPS_PLACE_OOB:
1854 case MTD_OPS_AUTO_OOB:
1855 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001856 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001857
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001858 default:
1859 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001860 }
1861
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001862 if (!ops->datbuf)
1863 ret = nand_do_read_oob(mtd, from, ops);
1864 else
1865 ret = nand_do_read_ops(mtd, from, ops);
1866
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001867out:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001868 nand_release_device(mtd);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001869 return ret;
1870}
1871
1872
1873/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001874 * nand_write_page_raw - [INTERN] raw page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001875 * @mtd: mtd info structure
1876 * @chip: nand chip info structure
1877 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001878 * @oob_required: must write chip->oob_poi to OOB
David Brownell52ff49d2009-03-04 12:01:36 -08001879 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001880 * Not for syndrome calculating ECC controllers, which use a special oob layout.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001881 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001882static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001883 const uint8_t *buf, int oob_required)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001884{
1885 chip->write_buf(mtd, buf, mtd->writesize);
Brian Norris279f08d2012-05-02 10:15:03 -07001886 if (oob_required)
1887 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
Josh Wufdbad98d2012-06-25 18:07:45 +08001888
1889 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001890}
1891
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001892/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001893 * nand_write_page_raw_syndrome - [INTERN] raw page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001894 * @mtd: mtd info structure
1895 * @chip: nand chip info structure
1896 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001897 * @oob_required: must write chip->oob_poi to OOB
David Brownell52ff49d2009-03-04 12:01:36 -08001898 *
1899 * We need a special oob layout and handling even when ECC isn't checked.
1900 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001901static int nand_write_page_raw_syndrome(struct mtd_info *mtd,
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001902 struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001903 const uint8_t *buf, int oob_required)
David Brownell52ff49d2009-03-04 12:01:36 -08001904{
1905 int eccsize = chip->ecc.size;
1906 int eccbytes = chip->ecc.bytes;
1907 uint8_t *oob = chip->oob_poi;
1908 int steps, size;
1909
1910 for (steps = chip->ecc.steps; steps > 0; steps--) {
1911 chip->write_buf(mtd, buf, eccsize);
1912 buf += eccsize;
1913
1914 if (chip->ecc.prepad) {
1915 chip->write_buf(mtd, oob, chip->ecc.prepad);
1916 oob += chip->ecc.prepad;
1917 }
1918
1919 chip->read_buf(mtd, oob, eccbytes);
1920 oob += eccbytes;
1921
1922 if (chip->ecc.postpad) {
1923 chip->write_buf(mtd, oob, chip->ecc.postpad);
1924 oob += chip->ecc.postpad;
1925 }
1926 }
1927
1928 size = mtd->oobsize - (oob - chip->oob_poi);
1929 if (size)
1930 chip->write_buf(mtd, oob, size);
Josh Wufdbad98d2012-06-25 18:07:45 +08001931
1932 return 0;
David Brownell52ff49d2009-03-04 12:01:36 -08001933}
1934/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001935 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001936 * @mtd: mtd info structure
1937 * @chip: nand chip info structure
1938 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001939 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001940 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001941static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001942 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001943{
1944 int i, eccsize = chip->ecc.size;
1945 int eccbytes = chip->ecc.bytes;
1946 int eccsteps = chip->ecc.steps;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001947 uint8_t *ecc_calc = chip->buffers->ecccalc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001948 const uint8_t *p = buf;
Ben Dooks8b099a32007-05-28 19:17:54 +01001949 uint32_t *eccpos = chip->ecc.layout->eccpos;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001950
Brian Norris7854d3f2011-06-23 14:12:08 -07001951 /* Software ECC calculation */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001952 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1953 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001954
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001955 for (i = 0; i < chip->ecc.total; i++)
1956 chip->oob_poi[eccpos[i]] = ecc_calc[i];
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001957
Josh Wufdbad98d2012-06-25 18:07:45 +08001958 return chip->ecc.write_page_raw(mtd, chip, buf, 1);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001959}
1960
1961/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001962 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001963 * @mtd: mtd info structure
1964 * @chip: nand chip info structure
1965 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001966 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001967 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001968static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001969 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001970{
1971 int i, eccsize = chip->ecc.size;
1972 int eccbytes = chip->ecc.bytes;
1973 int eccsteps = chip->ecc.steps;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001974 uint8_t *ecc_calc = chip->buffers->ecccalc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001975 const uint8_t *p = buf;
Ben Dooks8b099a32007-05-28 19:17:54 +01001976 uint32_t *eccpos = chip->ecc.layout->eccpos;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001977
1978 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1979 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
David Woodhouse29da9ce2006-05-26 23:05:44 +01001980 chip->write_buf(mtd, p, eccsize);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001981 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1982 }
1983
1984 for (i = 0; i < chip->ecc.total; i++)
1985 chip->oob_poi[eccpos[i]] = ecc_calc[i];
1986
1987 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
Josh Wufdbad98d2012-06-25 18:07:45 +08001988
1989 return 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001990}
1991
1992/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001993 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
Brian Norris8b6e50c2011-05-25 14:59:01 -07001994 * @mtd: mtd info structure
1995 * @chip: nand chip info structure
1996 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001997 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001998 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001999 * The hw generator calculates the error syndrome automatically. Therefore we
2000 * need a special oob layout and handling.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002001 */
Josh Wufdbad98d2012-06-25 18:07:45 +08002002static int nand_write_page_syndrome(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07002003 struct nand_chip *chip,
2004 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002005{
2006 int i, eccsize = chip->ecc.size;
2007 int eccbytes = chip->ecc.bytes;
2008 int eccsteps = chip->ecc.steps;
2009 const uint8_t *p = buf;
2010 uint8_t *oob = chip->oob_poi;
2011
2012 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2013
2014 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
2015 chip->write_buf(mtd, p, eccsize);
2016
2017 if (chip->ecc.prepad) {
2018 chip->write_buf(mtd, oob, chip->ecc.prepad);
2019 oob += chip->ecc.prepad;
2020 }
2021
2022 chip->ecc.calculate(mtd, p, oob);
2023 chip->write_buf(mtd, oob, eccbytes);
2024 oob += eccbytes;
2025
2026 if (chip->ecc.postpad) {
2027 chip->write_buf(mtd, oob, chip->ecc.postpad);
2028 oob += chip->ecc.postpad;
2029 }
2030 }
2031
2032 /* Calculate remaining oob bytes */
Vitaly Wool7e4178f2006-06-07 09:34:37 +04002033 i = mtd->oobsize - (oob - chip->oob_poi);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002034 if (i)
2035 chip->write_buf(mtd, oob, i);
Josh Wufdbad98d2012-06-25 18:07:45 +08002036
2037 return 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002038}
2039
2040/**
David Woodhouse956e9442006-09-25 17:12:39 +01002041 * nand_write_page - [REPLACEABLE] write one page
Brian Norris8b6e50c2011-05-25 14:59:01 -07002042 * @mtd: MTD device structure
2043 * @chip: NAND chip descriptor
2044 * @buf: the data to write
Brian Norris1fbb9382012-05-02 10:14:55 -07002045 * @oob_required: must write chip->oob_poi to OOB
Brian Norris8b6e50c2011-05-25 14:59:01 -07002046 * @page: page number to write
2047 * @cached: cached programming
2048 * @raw: use _raw version of write_page
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002049 */
2050static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07002051 const uint8_t *buf, int oob_required, int page,
2052 int cached, int raw)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002053{
2054 int status;
2055
2056 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
2057
David Woodhouse956e9442006-09-25 17:12:39 +01002058 if (unlikely(raw))
Josh Wufdbad98d2012-06-25 18:07:45 +08002059 status = chip->ecc.write_page_raw(mtd, chip, buf, oob_required);
David Woodhouse956e9442006-09-25 17:12:39 +01002060 else
Josh Wufdbad98d2012-06-25 18:07:45 +08002061 status = chip->ecc.write_page(mtd, chip, buf, oob_required);
2062
2063 if (status < 0)
2064 return status;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002065
2066 /*
Brian Norris7854d3f2011-06-23 14:12:08 -07002067 * Cached progamming disabled for now. Not sure if it's worth the
Brian Norris8b6e50c2011-05-25 14:59:01 -07002068 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s).
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002069 */
2070 cached = 0;
2071
2072 if (!cached || !(chip->options & NAND_CACHEPRG)) {
2073
2074 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002075 status = chip->waitfunc(mtd, chip);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002076 /*
2077 * See if operation failed and additional status checks are
Brian Norris8b6e50c2011-05-25 14:59:01 -07002078 * available.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002079 */
2080 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2081 status = chip->errstat(mtd, chip, FL_WRITING, status,
2082 page);
2083
2084 if (status & NAND_STATUS_FAIL)
2085 return -EIO;
2086 } else {
2087 chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002088 status = chip->waitfunc(mtd, chip);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002089 }
2090
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002091 return 0;
2092}
2093
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002094/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002095 * nand_fill_oob - [INTERN] Transfer client buffer to oob
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002096 * @mtd: MTD device structure
Brian Norris8b6e50c2011-05-25 14:59:01 -07002097 * @oob: oob data buffer
2098 * @len: oob data write length
2099 * @ops: oob ops structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002100 */
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002101static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,
2102 struct mtd_oob_ops *ops)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002103{
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002104 struct nand_chip *chip = mtd->priv;
2105
2106 /*
2107 * Initialise to all 0xFF, to avoid the possibility of left over OOB
2108 * data from a previous OOB read.
2109 */
2110 memset(chip->oob_poi, 0xff, mtd->oobsize);
2111
Florian Fainellif8ac0412010-09-07 13:23:43 +02002112 switch (ops->mode) {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002113
Brian Norris0612b9d2011-08-30 18:45:40 -07002114 case MTD_OPS_PLACE_OOB:
2115 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002116 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
2117 return oob + len;
2118
Brian Norris0612b9d2011-08-30 18:45:40 -07002119 case MTD_OPS_AUTO_OOB: {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002120 struct nand_oobfree *free = chip->ecc.layout->oobfree;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002121 uint32_t boffs = 0, woffs = ops->ooboffs;
2122 size_t bytes = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002123
Florian Fainellif8ac0412010-09-07 13:23:43 +02002124 for (; free->length && len; free++, len -= bytes) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07002125 /* Write request not from offset 0? */
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002126 if (unlikely(woffs)) {
2127 if (woffs >= free->length) {
2128 woffs -= free->length;
2129 continue;
2130 }
2131 boffs = free->offset + woffs;
2132 bytes = min_t(size_t, len,
2133 (free->length - woffs));
2134 woffs = 0;
2135 } else {
2136 bytes = min_t(size_t, len, free->length);
2137 boffs = free->offset;
2138 }
Vitaly Wool8b0036e2006-07-11 09:11:25 +02002139 memcpy(chip->oob_poi + boffs, oob, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002140 oob += bytes;
2141 }
2142 return oob;
2143 }
2144 default:
2145 BUG();
2146 }
2147 return NULL;
2148}
2149
Florian Fainellif8ac0412010-09-07 13:23:43 +02002150#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002151
2152/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002153 * nand_do_write_ops - [INTERN] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002154 * @mtd: MTD device structure
2155 * @to: offset to write to
2156 * @ops: oob operations description structure
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002157 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002158 * NAND write with ECC.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002159 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002160static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2161 struct mtd_oob_ops *ops)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002162{
Thomas Gleixner29072b92006-09-28 15:38:36 +02002163 int chipnr, realpage, page, blockmask, column;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002164 struct nand_chip *chip = mtd->priv;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002165 uint32_t writelen = ops->len;
Maxim Levitsky782ce792010-02-22 20:39:36 +02002166
2167 uint32_t oobwritelen = ops->ooblen;
Brian Norris0612b9d2011-08-30 18:45:40 -07002168 uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ?
Maxim Levitsky782ce792010-02-22 20:39:36 +02002169 mtd->oobavail : mtd->oobsize;
2170
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002171 uint8_t *oob = ops->oobbuf;
2172 uint8_t *buf = ops->datbuf;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002173 int ret, subpage;
Brian Norrise47f3db2012-05-02 10:14:56 -07002174 int oob_required = oob ? 1 : 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002175
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002176 ops->retlen = 0;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002177 if (!writelen)
2178 return 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002179
Brian Norris8b6e50c2011-05-25 14:59:01 -07002180 /* Reject writes, which are not page aligned */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002181 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
Brian Norrisd0370212011-07-19 10:06:08 -07002182 pr_notice("%s: attempt to write non page aligned data\n",
2183 __func__);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002184 return -EINVAL;
2185 }
2186
Thomas Gleixner29072b92006-09-28 15:38:36 +02002187 column = to & (mtd->writesize - 1);
2188 subpage = column || (writelen & (mtd->writesize - 1));
2189
2190 if (subpage && oob)
2191 return -EINVAL;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002192
Thomas Gleixner6a930962006-06-28 00:11:45 +02002193 chipnr = (int)(to >> chip->chip_shift);
2194 chip->select_chip(mtd, chipnr);
2195
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002196 /* Check, if it is write protected */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002197 if (nand_check_wp(mtd)) {
2198 ret = -EIO;
2199 goto err_out;
2200 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002201
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002202 realpage = (int)(to >> chip->page_shift);
2203 page = realpage & chip->pagemask;
2204 blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
2205
2206 /* Invalidate the page cache, when we write to the cached page */
2207 if (to <= (chip->pagebuf << chip->page_shift) &&
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002208 (chip->pagebuf << chip->page_shift) < (to + ops->len))
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002209 chip->pagebuf = -1;
2210
Maxim Levitsky782ce792010-02-22 20:39:36 +02002211 /* Don't allow multipage oob writes with offset */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002212 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {
2213 ret = -EINVAL;
2214 goto err_out;
2215 }
Maxim Levitsky782ce792010-02-22 20:39:36 +02002216
Florian Fainellif8ac0412010-09-07 13:23:43 +02002217 while (1) {
Thomas Gleixner29072b92006-09-28 15:38:36 +02002218 int bytes = mtd->writesize;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002219 int cached = writelen > bytes && page != blockmask;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002220 uint8_t *wbuf = buf;
2221
Brian Norris8b6e50c2011-05-25 14:59:01 -07002222 /* Partial page write? */
Thomas Gleixner29072b92006-09-28 15:38:36 +02002223 if (unlikely(column || writelen < (mtd->writesize - 1))) {
2224 cached = 0;
2225 bytes = min_t(int, bytes - column, (int) writelen);
2226 chip->pagebuf = -1;
2227 memset(chip->buffers->databuf, 0xff, mtd->writesize);
2228 memcpy(&chip->buffers->databuf[column], buf, bytes);
2229 wbuf = chip->buffers->databuf;
2230 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002231
Maxim Levitsky782ce792010-02-22 20:39:36 +02002232 if (unlikely(oob)) {
2233 size_t len = min(oobwritelen, oobmaxlen);
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002234 oob = nand_fill_oob(mtd, oob, len, ops);
Maxim Levitsky782ce792010-02-22 20:39:36 +02002235 oobwritelen -= len;
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002236 } else {
2237 /* We still need to erase leftover OOB data */
2238 memset(chip->oob_poi, 0xff, mtd->oobsize);
Maxim Levitsky782ce792010-02-22 20:39:36 +02002239 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002240
Brian Norrise47f3db2012-05-02 10:14:56 -07002241 ret = chip->write_page(mtd, chip, wbuf, oob_required, page,
2242 cached, (ops->mode == MTD_OPS_RAW));
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002243 if (ret)
2244 break;
2245
2246 writelen -= bytes;
2247 if (!writelen)
2248 break;
2249
Thomas Gleixner29072b92006-09-28 15:38:36 +02002250 column = 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002251 buf += bytes;
2252 realpage++;
2253
2254 page = realpage & chip->pagemask;
2255 /* Check, if we cross a chip boundary */
2256 if (!page) {
2257 chipnr++;
2258 chip->select_chip(mtd, -1);
2259 chip->select_chip(mtd, chipnr);
2260 }
2261 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002262
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002263 ops->retlen = ops->len - writelen;
Vitaly Wool70145682006-11-03 18:20:38 +03002264 if (unlikely(oob))
2265 ops->oobretlen = ops->ooblen;
Huang Shijieb0bb6902012-11-19 14:43:29 +08002266
2267err_out:
2268 chip->select_chip(mtd, -1);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002269 return ret;
2270}
2271
2272/**
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002273 * panic_nand_write - [MTD Interface] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002274 * @mtd: MTD device structure
2275 * @to: offset to write to
2276 * @len: number of bytes to write
2277 * @retlen: pointer to variable to store the number of written bytes
2278 * @buf: the data to write
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002279 *
2280 * NAND write with ECC. Used when performing writes in interrupt context, this
2281 * may for example be called by mtdoops when writing an oops while in panic.
2282 */
2283static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2284 size_t *retlen, const uint8_t *buf)
2285{
2286 struct nand_chip *chip = mtd->priv;
Brian Norris4a89ff82011-08-30 18:45:45 -07002287 struct mtd_oob_ops ops;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002288 int ret;
2289
Brian Norris8b6e50c2011-05-25 14:59:01 -07002290 /* Wait for the device to get ready */
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002291 panic_nand_wait(mtd, chip, 400);
2292
Brian Norris8b6e50c2011-05-25 14:59:01 -07002293 /* Grab the device */
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002294 panic_nand_get_device(chip, mtd, FL_WRITING);
2295
Brian Norris4a89ff82011-08-30 18:45:45 -07002296 ops.len = len;
2297 ops.datbuf = (uint8_t *)buf;
2298 ops.oobbuf = NULL;
Huang Shijie11041ae2012-07-03 16:44:14 +08002299 ops.mode = MTD_OPS_PLACE_OOB;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002300
Brian Norris4a89ff82011-08-30 18:45:45 -07002301 ret = nand_do_write_ops(mtd, to, &ops);
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002302
Brian Norris4a89ff82011-08-30 18:45:45 -07002303 *retlen = ops.retlen;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002304 return ret;
2305}
2306
2307/**
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002308 * nand_write - [MTD Interface] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002309 * @mtd: MTD device structure
2310 * @to: offset to write to
2311 * @len: number of bytes to write
2312 * @retlen: pointer to variable to store the number of written bytes
2313 * @buf: the data to write
Linus Torvalds1da177e2005-04-16 15:20:36 -07002314 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002315 * NAND write with ECC.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002316 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002317static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002318 size_t *retlen, const uint8_t *buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002319{
Brian Norris4a89ff82011-08-30 18:45:45 -07002320 struct mtd_oob_ops ops;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002321 int ret;
2322
Huang Shijie6a8214a2012-11-19 14:43:30 +08002323 nand_get_device(mtd, FL_WRITING);
Brian Norris4a89ff82011-08-30 18:45:45 -07002324 ops.len = len;
2325 ops.datbuf = (uint8_t *)buf;
2326 ops.oobbuf = NULL;
Huang Shijie11041ae2012-07-03 16:44:14 +08002327 ops.mode = MTD_OPS_PLACE_OOB;
Brian Norris4a89ff82011-08-30 18:45:45 -07002328 ret = nand_do_write_ops(mtd, to, &ops);
Brian Norris4a89ff82011-08-30 18:45:45 -07002329 *retlen = ops.retlen;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002330 nand_release_device(mtd);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002331 return ret;
2332}
2333
2334/**
2335 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07002336 * @mtd: MTD device structure
2337 * @to: offset to write to
2338 * @ops: oob operation description structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002339 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002340 * NAND write out-of-band.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002341 */
2342static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2343 struct mtd_oob_ops *ops)
2344{
Adrian Hunter03736152007-01-31 17:58:29 +02002345 int chipnr, page, status, len;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002346 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002347
Brian Norris289c0522011-07-19 10:06:09 -07002348 pr_debug("%s: to = 0x%08x, len = %i\n",
vimal singh20d8e242009-07-07 15:49:49 +05302349 __func__, (unsigned int)to, (int)ops->ooblen);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002350
Brian Norris0612b9d2011-08-30 18:45:40 -07002351 if (ops->mode == MTD_OPS_AUTO_OOB)
Adrian Hunter03736152007-01-31 17:58:29 +02002352 len = chip->ecc.layout->oobavail;
2353 else
2354 len = mtd->oobsize;
2355
Linus Torvalds1da177e2005-04-16 15:20:36 -07002356 /* Do not allow write past end of page */
Adrian Hunter03736152007-01-31 17:58:29 +02002357 if ((ops->ooboffs + ops->ooblen) > len) {
Brian Norris289c0522011-07-19 10:06:09 -07002358 pr_debug("%s: attempt to write past end of page\n",
2359 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002360 return -EINVAL;
2361 }
2362
Adrian Hunter03736152007-01-31 17:58:29 +02002363 if (unlikely(ops->ooboffs >= len)) {
Brian Norris289c0522011-07-19 10:06:09 -07002364 pr_debug("%s: attempt to start write outside oob\n",
2365 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02002366 return -EINVAL;
2367 }
2368
Jason Liu775adc32011-02-25 13:06:18 +08002369 /* Do not allow write past end of device */
Adrian Hunter03736152007-01-31 17:58:29 +02002370 if (unlikely(to >= mtd->size ||
2371 ops->ooboffs + ops->ooblen >
2372 ((mtd->size >> chip->page_shift) -
2373 (to >> chip->page_shift)) * len)) {
Brian Norris289c0522011-07-19 10:06:09 -07002374 pr_debug("%s: attempt to write beyond end of device\n",
2375 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02002376 return -EINVAL;
2377 }
2378
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002379 chipnr = (int)(to >> chip->chip_shift);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002380 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002381
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002382 /* Shift to get page */
2383 page = (int)(to >> chip->page_shift);
2384
2385 /*
2386 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
2387 * of my DiskOnChip 2000 test units) will clear the whole data page too
2388 * if we don't do this. I have no clue why, but I seem to have 'fixed'
2389 * it in the doc2000 driver in August 1999. dwmw2.
2390 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002391 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002392
2393 /* Check, if it is write protected */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002394 if (nand_check_wp(mtd)) {
2395 chip->select_chip(mtd, -1);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002396 return -EROFS;
Huang Shijieb0bb6902012-11-19 14:43:29 +08002397 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002398
Linus Torvalds1da177e2005-04-16 15:20:36 -07002399 /* Invalidate the page cache, if we write to the cached page */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002400 if (page == chip->pagebuf)
2401 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002402
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002403 nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);
Brian Norris9ce244b2011-08-30 18:45:37 -07002404
Brian Norris0612b9d2011-08-30 18:45:40 -07002405 if (ops->mode == MTD_OPS_RAW)
Brian Norris9ce244b2011-08-30 18:45:37 -07002406 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);
2407 else
2408 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002409
Huang Shijieb0bb6902012-11-19 14:43:29 +08002410 chip->select_chip(mtd, -1);
2411
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002412 if (status)
2413 return status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002414
Vitaly Wool70145682006-11-03 18:20:38 +03002415 ops->oobretlen = ops->ooblen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002416
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002417 return 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002418}
Linus Torvalds1da177e2005-04-16 15:20:36 -07002419
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002420/**
2421 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07002422 * @mtd: MTD device structure
2423 * @to: offset to write to
2424 * @ops: oob operation description structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002425 */
2426static int nand_write_oob(struct mtd_info *mtd, loff_t to,
2427 struct mtd_oob_ops *ops)
2428{
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002429 int ret = -ENOTSUPP;
2430
2431 ops->retlen = 0;
2432
2433 /* Do not allow writes past end of device */
Vitaly Wool70145682006-11-03 18:20:38 +03002434 if (ops->datbuf && (to + ops->len) > mtd->size) {
Brian Norris289c0522011-07-19 10:06:09 -07002435 pr_debug("%s: attempt to write beyond end of device\n",
2436 __func__);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002437 return -EINVAL;
2438 }
2439
Huang Shijie6a8214a2012-11-19 14:43:30 +08002440 nand_get_device(mtd, FL_WRITING);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002441
Florian Fainellif8ac0412010-09-07 13:23:43 +02002442 switch (ops->mode) {
Brian Norris0612b9d2011-08-30 18:45:40 -07002443 case MTD_OPS_PLACE_OOB:
2444 case MTD_OPS_AUTO_OOB:
2445 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002446 break;
2447
2448 default:
2449 goto out;
2450 }
2451
2452 if (!ops->datbuf)
2453 ret = nand_do_write_oob(mtd, to, ops);
2454 else
2455 ret = nand_do_write_ops(mtd, to, ops);
2456
Florian Fainelli7351d3a2010-09-07 13:23:45 +02002457out:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002458 nand_release_device(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002459 return ret;
2460}
2461
Linus Torvalds1da177e2005-04-16 15:20:36 -07002462/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002463 * single_erase_cmd - [GENERIC] NAND standard block erase command function
Brian Norris8b6e50c2011-05-25 14:59:01 -07002464 * @mtd: MTD device structure
2465 * @page: the page address of the block which will be erased
Linus Torvalds1da177e2005-04-16 15:20:36 -07002466 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002467 * Standard erase command for NAND chips.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002468 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002469static void single_erase_cmd(struct mtd_info *mtd, int page)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002470{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002471 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002472 /* Send commands to erase a block */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002473 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2474 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002475}
2476
2477/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07002478 * nand_erase - [MTD Interface] erase block(s)
Brian Norris8b6e50c2011-05-25 14:59:01 -07002479 * @mtd: MTD device structure
2480 * @instr: erase instruction
Linus Torvalds1da177e2005-04-16 15:20:36 -07002481 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002482 * Erase one ore more blocks.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002483 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002484static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002485{
David Woodhousee0c7d762006-05-13 18:07:53 +01002486 return nand_erase_nand(mtd, instr, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002487}
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002488
Linus Torvalds1da177e2005-04-16 15:20:36 -07002489/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002490 * nand_erase_nand - [INTERN] erase block(s)
Brian Norris8b6e50c2011-05-25 14:59:01 -07002491 * @mtd: MTD device structure
2492 * @instr: erase instruction
2493 * @allowbbt: allow erasing the bbt area
Linus Torvalds1da177e2005-04-16 15:20:36 -07002494 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002495 * Erase one ore more blocks.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002496 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002497int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2498 int allowbbt)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002499{
Adrian Hunter69423d92008-12-10 13:37:21 +00002500 int page, status, pages_per_block, ret, chipnr;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002501 struct nand_chip *chip = mtd->priv;
Adrian Hunter69423d92008-12-10 13:37:21 +00002502 loff_t len;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002503
Brian Norris289c0522011-07-19 10:06:09 -07002504 pr_debug("%s: start = 0x%012llx, len = %llu\n",
2505 __func__, (unsigned long long)instr->addr,
2506 (unsigned long long)instr->len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002507
Vimal Singh6fe5a6a2010-02-03 14:12:24 +05302508 if (check_offs_len(mtd, instr->addr, instr->len))
Linus Torvalds1da177e2005-04-16 15:20:36 -07002509 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002510
Linus Torvalds1da177e2005-04-16 15:20:36 -07002511 /* Grab the lock and see if the device is available */
Huang Shijie6a8214a2012-11-19 14:43:30 +08002512 nand_get_device(mtd, FL_ERASING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002513
2514 /* Shift to get first page */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002515 page = (int)(instr->addr >> chip->page_shift);
2516 chipnr = (int)(instr->addr >> chip->chip_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002517
2518 /* Calculate pages in each block */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002519 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002520
2521 /* Select the NAND device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002522 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002523
Linus Torvalds1da177e2005-04-16 15:20:36 -07002524 /* Check, if it is write protected */
2525 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -07002526 pr_debug("%s: device is write protected!\n",
2527 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002528 instr->state = MTD_ERASE_FAILED;
2529 goto erase_exit;
2530 }
2531
2532 /* Loop through the pages */
2533 len = instr->len;
2534
2535 instr->state = MTD_ERASING;
2536
2537 while (len) {
Wolfram Sang12183a22011-12-21 23:01:20 +01002538 /* Check if we have a bad block, we do not erase bad blocks! */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002539 if (nand_block_checkbad(mtd, ((loff_t) page) <<
2540 chip->page_shift, 0, allowbbt)) {
Brian Norrisd0370212011-07-19 10:06:08 -07002541 pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
2542 __func__, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002543 instr->state = MTD_ERASE_FAILED;
2544 goto erase_exit;
2545 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002546
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002547 /*
2548 * Invalidate the page cache, if we erase the block which
Brian Norris8b6e50c2011-05-25 14:59:01 -07002549 * contains the current cached page.
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002550 */
2551 if (page <= chip->pagebuf && chip->pagebuf <
2552 (page + pages_per_block))
2553 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002554
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002555 chip->erase_cmd(mtd, page & chip->pagemask);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002556
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002557 status = chip->waitfunc(mtd, chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002558
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002559 /*
2560 * See if operation failed and additional status checks are
2561 * available
2562 */
2563 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2564 status = chip->errstat(mtd, chip, FL_ERASING,
2565 status, page);
David A. Marlin068e3c02005-01-24 03:07:46 +00002566
Linus Torvalds1da177e2005-04-16 15:20:36 -07002567 /* See if block erase succeeded */
David A. Marlina4ab4c52005-01-23 18:30:53 +00002568 if (status & NAND_STATUS_FAIL) {
Brian Norris289c0522011-07-19 10:06:09 -07002569 pr_debug("%s: failed erase, page 0x%08x\n",
2570 __func__, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002571 instr->state = MTD_ERASE_FAILED;
Adrian Hunter69423d92008-12-10 13:37:21 +00002572 instr->fail_addr =
2573 ((loff_t)page << chip->page_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002574 goto erase_exit;
2575 }
David A. Marlin30f464b2005-01-17 18:35:25 +00002576
Linus Torvalds1da177e2005-04-16 15:20:36 -07002577 /* Increment page address and decrement length */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002578 len -= (1 << chip->phys_erase_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002579 page += pages_per_block;
2580
2581 /* Check, if we cross a chip boundary */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002582 if (len && !(page & chip->pagemask)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002583 chipnr++;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002584 chip->select_chip(mtd, -1);
2585 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002586 }
2587 }
2588 instr->state = MTD_ERASE_DONE;
2589
Florian Fainelli7351d3a2010-09-07 13:23:45 +02002590erase_exit:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002591
2592 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002593
2594 /* Deselect and wake up anyone waiting on the device */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002595 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002596 nand_release_device(mtd);
2597
David Woodhouse49defc02007-10-06 15:01:59 -04002598 /* Do call back function */
2599 if (!ret)
2600 mtd_erase_callback(instr);
2601
Linus Torvalds1da177e2005-04-16 15:20:36 -07002602 /* Return more or less happy */
2603 return ret;
2604}
2605
2606/**
2607 * nand_sync - [MTD Interface] sync
Brian Norris8b6e50c2011-05-25 14:59:01 -07002608 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07002609 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002610 * Sync is actually a wait for chip ready function.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002611 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002612static void nand_sync(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002613{
Brian Norris289c0522011-07-19 10:06:09 -07002614 pr_debug("%s: called\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002615
2616 /* Grab the lock and see if the device is available */
Huang Shijie6a8214a2012-11-19 14:43:30 +08002617 nand_get_device(mtd, FL_SYNCING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002618 /* Release it and go back */
David Woodhousee0c7d762006-05-13 18:07:53 +01002619 nand_release_device(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002620}
2621
Linus Torvalds1da177e2005-04-16 15:20:36 -07002622/**
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002623 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
Brian Norris8b6e50c2011-05-25 14:59:01 -07002624 * @mtd: MTD device structure
2625 * @offs: offset relative to mtd start
Linus Torvalds1da177e2005-04-16 15:20:36 -07002626 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002627static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002628{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002629 return nand_block_checkbad(mtd, offs, 1, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002630}
2631
2632/**
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002633 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
Brian Norris8b6e50c2011-05-25 14:59:01 -07002634 * @mtd: MTD device structure
2635 * @ofs: offset relative to mtd start
Linus Torvalds1da177e2005-04-16 15:20:36 -07002636 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002637static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002638{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002639 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002640 int ret;
2641
Florian Fainellif8ac0412010-09-07 13:23:43 +02002642 ret = nand_block_isbad(mtd, ofs);
2643 if (ret) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07002644 /* If it was bad already, return success and do nothing */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002645 if (ret > 0)
2646 return 0;
David Woodhousee0c7d762006-05-13 18:07:53 +01002647 return ret;
2648 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002649
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002650 return chip->block_markbad(mtd, ofs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002651}
2652
2653/**
Huang Shijie7db03ec2012-09-13 14:57:52 +08002654 * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand
2655 * @mtd: MTD device structure
2656 * @chip: nand chip info structure
2657 * @addr: feature address.
2658 * @subfeature_param: the subfeature parameters, a four bytes array.
2659 */
2660static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
2661 int addr, uint8_t *subfeature_param)
2662{
2663 int status;
2664
2665 if (!chip->onfi_version)
2666 return -EINVAL;
2667
2668 chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);
2669 chip->write_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
2670 status = chip->waitfunc(mtd, chip);
2671 if (status & NAND_STATUS_FAIL)
2672 return -EIO;
2673 return 0;
2674}
2675
2676/**
2677 * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand
2678 * @mtd: MTD device structure
2679 * @chip: nand chip info structure
2680 * @addr: feature address.
2681 * @subfeature_param: the subfeature parameters, a four bytes array.
2682 */
2683static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
2684 int addr, uint8_t *subfeature_param)
2685{
2686 if (!chip->onfi_version)
2687 return -EINVAL;
2688
2689 /* clear the sub feature parameters */
2690 memset(subfeature_param, 0, ONFI_SUBFEATURE_PARAM_LEN);
2691
2692 chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);
2693 chip->read_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
2694 return 0;
2695}
2696
2697/**
Vitaly Wool962034f2005-09-15 14:58:53 +01002698 * nand_suspend - [MTD Interface] Suspend the NAND flash
Brian Norris8b6e50c2011-05-25 14:59:01 -07002699 * @mtd: MTD device structure
Vitaly Wool962034f2005-09-15 14:58:53 +01002700 */
2701static int nand_suspend(struct mtd_info *mtd)
2702{
Huang Shijie6a8214a2012-11-19 14:43:30 +08002703 return nand_get_device(mtd, FL_PM_SUSPENDED);
Vitaly Wool962034f2005-09-15 14:58:53 +01002704}
2705
2706/**
2707 * nand_resume - [MTD Interface] Resume the NAND flash
Brian Norris8b6e50c2011-05-25 14:59:01 -07002708 * @mtd: MTD device structure
Vitaly Wool962034f2005-09-15 14:58:53 +01002709 */
2710static void nand_resume(struct mtd_info *mtd)
2711{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002712 struct nand_chip *chip = mtd->priv;
Vitaly Wool962034f2005-09-15 14:58:53 +01002713
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002714 if (chip->state == FL_PM_SUSPENDED)
Vitaly Wool962034f2005-09-15 14:58:53 +01002715 nand_release_device(mtd);
2716 else
Brian Norrisd0370212011-07-19 10:06:08 -07002717 pr_err("%s called for a chip which is not in suspended state\n",
2718 __func__);
Vitaly Wool962034f2005-09-15 14:58:53 +01002719}
2720
Brian Norris8b6e50c2011-05-25 14:59:01 -07002721/* Set default functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002722static void nand_set_defaults(struct nand_chip *chip, int busw)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002723{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002724 /* check for proper chip_delay setup, set 20us if not */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002725 if (!chip->chip_delay)
2726 chip->chip_delay = 20;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002727
2728 /* check, if a user supplied command function given */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002729 if (chip->cmdfunc == NULL)
2730 chip->cmdfunc = nand_command;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002731
2732 /* check, if a user supplied wait function given */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002733 if (chip->waitfunc == NULL)
2734 chip->waitfunc = nand_wait;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002735
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002736 if (!chip->select_chip)
2737 chip->select_chip = nand_select_chip;
2738 if (!chip->read_byte)
2739 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2740 if (!chip->read_word)
2741 chip->read_word = nand_read_word;
2742 if (!chip->block_bad)
2743 chip->block_bad = nand_block_bad;
2744 if (!chip->block_markbad)
2745 chip->block_markbad = nand_default_block_markbad;
2746 if (!chip->write_buf)
2747 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2748 if (!chip->read_buf)
2749 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002750 if (!chip->scan_bbt)
2751 chip->scan_bbt = nand_default_bbt;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002752
2753 if (!chip->controller) {
2754 chip->controller = &chip->hwcontrol;
2755 spin_lock_init(&chip->controller->lock);
2756 init_waitqueue_head(&chip->controller->wq);
2757 }
2758
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002759}
2760
Brian Norris8b6e50c2011-05-25 14:59:01 -07002761/* Sanitize ONFI strings so we can safely print them */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002762static void sanitize_string(uint8_t *s, size_t len)
2763{
2764 ssize_t i;
2765
Brian Norris8b6e50c2011-05-25 14:59:01 -07002766 /* Null terminate */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002767 s[len - 1] = 0;
2768
Brian Norris8b6e50c2011-05-25 14:59:01 -07002769 /* Remove non printable chars */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002770 for (i = 0; i < len - 1; i++) {
2771 if (s[i] < ' ' || s[i] > 127)
2772 s[i] = '?';
2773 }
2774
Brian Norris8b6e50c2011-05-25 14:59:01 -07002775 /* Remove trailing spaces */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002776 strim(s);
2777}
2778
2779static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
2780{
2781 int i;
2782 while (len--) {
2783 crc ^= *p++ << 8;
2784 for (i = 0; i < 8; i++)
2785 crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
2786 }
2787
2788 return crc;
2789}
2790
2791/*
Brian Norris8b6e50c2011-05-25 14:59:01 -07002792 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002793 */
2794static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002795 int *busw)
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002796{
2797 struct nand_onfi_params *p = &chip->onfi_params;
2798 int i;
2799 int val;
2800
Matthieu CASTET0ce82b72013-01-16 15:25:45 +01002801 /* ONFI need to be probed in 8 bits mode, and 16 bits should be selected with NAND_BUSWIDTH_AUTO */
2802 if (chip->options & NAND_BUSWIDTH_16) {
2803 pr_err("Trying ONFI probe in 16 bits mode, aborting !\n");
2804 return 0;
2805 }
Brian Norris7854d3f2011-06-23 14:12:08 -07002806 /* Try ONFI for unknown chip or LP */
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002807 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
2808 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
2809 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')
2810 return 0;
2811
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002812 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
2813 for (i = 0; i < 3; i++) {
2814 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
2815 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
2816 le16_to_cpu(p->crc)) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07002817 pr_info("ONFI param page %d valid\n", i);
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002818 break;
2819 }
2820 }
2821
2822 if (i == 3)
2823 return 0;
2824
Brian Norris8b6e50c2011-05-25 14:59:01 -07002825 /* Check version */
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002826 val = le16_to_cpu(p->revision);
Brian Norrisb7b1a292010-12-12 00:23:33 -08002827 if (val & (1 << 5))
2828 chip->onfi_version = 23;
2829 else if (val & (1 << 4))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002830 chip->onfi_version = 22;
2831 else if (val & (1 << 3))
2832 chip->onfi_version = 21;
2833 else if (val & (1 << 2))
2834 chip->onfi_version = 20;
Brian Norrisb7b1a292010-12-12 00:23:33 -08002835 else if (val & (1 << 1))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002836 chip->onfi_version = 10;
Brian Norrisb7b1a292010-12-12 00:23:33 -08002837 else
2838 chip->onfi_version = 0;
2839
2840 if (!chip->onfi_version) {
Brian Norrisd0370212011-07-19 10:06:08 -07002841 pr_info("%s: unsupported ONFI version: %d\n", __func__, val);
Brian Norrisb7b1a292010-12-12 00:23:33 -08002842 return 0;
2843 }
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002844
2845 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
2846 sanitize_string(p->model, sizeof(p->model));
2847 if (!mtd->name)
2848 mtd->name = p->model;
2849 mtd->writesize = le32_to_cpu(p->byte_per_page);
2850 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
2851 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
Matthieu CASTET63795752012-03-19 15:35:25 +01002852 chip->chipsize = le32_to_cpu(p->blocks_per_lun);
2853 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002854 *busw = 0;
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002855 if (le16_to_cpu(p->features) & 1)
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002856 *busw = NAND_BUSWIDTH_16;
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002857
Huang Shijied42b5de2012-02-17 11:22:37 +08002858 pr_info("ONFI flash detected\n");
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002859 return 1;
2860}
2861
2862/*
Brian Norrise3b88bd2012-09-24 20:40:52 -07002863 * nand_id_has_period - Check if an ID string has a given wraparound period
2864 * @id_data: the ID string
2865 * @arrlen: the length of the @id_data array
2866 * @period: the period of repitition
2867 *
2868 * Check if an ID string is repeated within a given sequence of bytes at
2869 * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a
Brian Norrisd4d4f1b2012-11-14 21:54:20 -08002870 * period of 3). This is a helper function for nand_id_len(). Returns non-zero
Brian Norrise3b88bd2012-09-24 20:40:52 -07002871 * if the repetition has a period of @period; otherwise, returns zero.
2872 */
2873static int nand_id_has_period(u8 *id_data, int arrlen, int period)
2874{
2875 int i, j;
2876 for (i = 0; i < period; i++)
2877 for (j = i + period; j < arrlen; j += period)
2878 if (id_data[i] != id_data[j])
2879 return 0;
2880 return 1;
2881}
2882
2883/*
2884 * nand_id_len - Get the length of an ID string returned by CMD_READID
2885 * @id_data: the ID string
2886 * @arrlen: the length of the @id_data array
2887
2888 * Returns the length of the ID string, according to known wraparound/trailing
2889 * zero patterns. If no pattern exists, returns the length of the array.
2890 */
2891static int nand_id_len(u8 *id_data, int arrlen)
2892{
2893 int last_nonzero, period;
2894
2895 /* Find last non-zero byte */
2896 for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)
2897 if (id_data[last_nonzero])
2898 break;
2899
2900 /* All zeros */
2901 if (last_nonzero < 0)
2902 return 0;
2903
2904 /* Calculate wraparound period */
2905 for (period = 1; period < arrlen; period++)
2906 if (nand_id_has_period(id_data, arrlen, period))
2907 break;
2908
2909 /* There's a repeated pattern */
2910 if (period < arrlen)
2911 return period;
2912
2913 /* There are trailing zeros */
2914 if (last_nonzero < arrlen - 1)
2915 return last_nonzero + 1;
2916
2917 /* No pattern detected */
2918 return arrlen;
2919}
2920
2921/*
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002922 * Many new NAND share similar device ID codes, which represent the size of the
2923 * chip. The rest of the parameters must be decoded according to generic or
2924 * manufacturer-specific "extended ID" decoding patterns.
2925 */
2926static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
2927 u8 id_data[8], int *busw)
2928{
Brian Norrise3b88bd2012-09-24 20:40:52 -07002929 int extid, id_len;
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002930 /* The 3rd id byte holds MLC / multichip data */
2931 chip->cellinfo = id_data[2];
2932 /* The 4th id byte is the important one */
2933 extid = id_data[3];
2934
Brian Norrise3b88bd2012-09-24 20:40:52 -07002935 id_len = nand_id_len(id_data, 8);
2936
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002937 /*
2938 * Field definitions are in the following datasheets:
2939 * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
Brian Norrisaf451af2012-10-09 23:26:06 -07002940 * New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44)
Brian Norris73ca3922012-09-24 20:40:54 -07002941 * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002942 *
Brian Norrisaf451af2012-10-09 23:26:06 -07002943 * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung
2944 * ID to decide what to do.
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002945 */
Brian Norrisaf451af2012-10-09 23:26:06 -07002946 if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG &&
Brian Norris6924d992012-11-14 21:46:30 -08002947 (chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
Brian Norrisaf451af2012-10-09 23:26:06 -07002948 id_data[5] != 0x00) {
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002949 /* Calc pagesize */
2950 mtd->writesize = 2048 << (extid & 0x03);
2951 extid >>= 2;
2952 /* Calc oobsize */
Brian Norrise2d3a352012-09-24 20:40:55 -07002953 switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002954 case 1:
2955 mtd->oobsize = 128;
2956 break;
2957 case 2:
2958 mtd->oobsize = 218;
2959 break;
2960 case 3:
2961 mtd->oobsize = 400;
2962 break;
Brian Norrise2d3a352012-09-24 20:40:55 -07002963 case 4:
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002964 mtd->oobsize = 436;
2965 break;
Brian Norrise2d3a352012-09-24 20:40:55 -07002966 case 5:
2967 mtd->oobsize = 512;
2968 break;
2969 case 6:
2970 default: /* Other cases are "reserved" (unknown) */
2971 mtd->oobsize = 640;
2972 break;
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002973 }
2974 extid >>= 2;
2975 /* Calc blocksize */
2976 mtd->erasesize = (128 * 1024) <<
2977 (((extid >> 1) & 0x04) | (extid & 0x03));
2978 *busw = 0;
Brian Norris73ca3922012-09-24 20:40:54 -07002979 } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
2980 (chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
2981 unsigned int tmp;
2982
2983 /* Calc pagesize */
2984 mtd->writesize = 2048 << (extid & 0x03);
2985 extid >>= 2;
2986 /* Calc oobsize */
2987 switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
2988 case 0:
2989 mtd->oobsize = 128;
2990 break;
2991 case 1:
2992 mtd->oobsize = 224;
2993 break;
2994 case 2:
2995 mtd->oobsize = 448;
2996 break;
2997 case 3:
2998 mtd->oobsize = 64;
2999 break;
3000 case 4:
3001 mtd->oobsize = 32;
3002 break;
3003 case 5:
3004 mtd->oobsize = 16;
3005 break;
3006 default:
3007 mtd->oobsize = 640;
3008 break;
3009 }
3010 extid >>= 2;
3011 /* Calc blocksize */
3012 tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
3013 if (tmp < 0x03)
3014 mtd->erasesize = (128 * 1024) << tmp;
3015 else if (tmp == 0x03)
3016 mtd->erasesize = 768 * 1024;
3017 else
3018 mtd->erasesize = (64 * 1024) << tmp;
3019 *busw = 0;
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003020 } else {
3021 /* Calc pagesize */
3022 mtd->writesize = 1024 << (extid & 0x03);
3023 extid >>= 2;
3024 /* Calc oobsize */
3025 mtd->oobsize = (8 << (extid & 0x01)) *
3026 (mtd->writesize >> 9);
3027 extid >>= 2;
3028 /* Calc blocksize. Blocksize is multiples of 64KiB */
3029 mtd->erasesize = (64 * 1024) << (extid & 0x03);
3030 extid >>= 2;
3031 /* Get buswidth information */
3032 *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
3033 }
3034}
3035
3036/*
Brian Norrisf23a4812012-09-24 20:40:51 -07003037 * Old devices have chip data hardcoded in the device ID table. nand_decode_id
3038 * decodes a matching ID table entry and assigns the MTD size parameters for
3039 * the chip.
3040 */
3041static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,
3042 struct nand_flash_dev *type, u8 id_data[8],
3043 int *busw)
3044{
3045 int maf_id = id_data[0];
3046
3047 mtd->erasesize = type->erasesize;
3048 mtd->writesize = type->pagesize;
3049 mtd->oobsize = mtd->writesize / 32;
3050 *busw = type->options & NAND_BUSWIDTH_16;
3051
3052 /*
3053 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
3054 * some Spansion chips have erasesize that conflicts with size
3055 * listed in nand_ids table.
3056 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
3057 */
3058 if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00
3059 && id_data[6] == 0x00 && id_data[7] == 0x00
3060 && mtd->writesize == 512) {
3061 mtd->erasesize = 128 * 1024;
3062 mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
3063 }
3064}
3065
3066/*
Brian Norris7e74c2d2012-09-24 20:40:49 -07003067 * Set the bad block marker/indicator (BBM/BBI) patterns according to some
3068 * heuristic patterns using various detected parameters (e.g., manufacturer,
3069 * page size, cell-type information).
3070 */
3071static void nand_decode_bbm_options(struct mtd_info *mtd,
3072 struct nand_chip *chip, u8 id_data[8])
3073{
3074 int maf_id = id_data[0];
3075
3076 /* Set the bad block position */
3077 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))
3078 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
3079 else
3080 chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
3081
3082 /*
3083 * Bad block marker is stored in the last page of each block on Samsung
3084 * and Hynix MLC devices; stored in first two pages of each block on
3085 * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
3086 * AMD/Spansion, and Macronix. All others scan only the first page.
3087 */
3088 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3089 (maf_id == NAND_MFR_SAMSUNG ||
3090 maf_id == NAND_MFR_HYNIX))
3091 chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
3092 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3093 (maf_id == NAND_MFR_SAMSUNG ||
3094 maf_id == NAND_MFR_HYNIX ||
3095 maf_id == NAND_MFR_TOSHIBA ||
3096 maf_id == NAND_MFR_AMD ||
3097 maf_id == NAND_MFR_MACRONIX)) ||
3098 (mtd->writesize == 2048 &&
3099 maf_id == NAND_MFR_MICRON))
3100 chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
3101}
3102
3103/*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003104 * Get the flash and manufacturer id and lookup if the type is supported.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003105 */
3106static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003107 struct nand_chip *chip,
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003108 int busw,
3109 int *maf_id, int *dev_id,
David Woodhouse5e81e882010-02-26 18:32:56 +00003110 struct nand_flash_dev *type)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003111{
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003112 int i, maf_idx;
Kevin Cernekee426c4572010-05-04 20:58:03 -07003113 u8 id_data[8];
Linus Torvalds1da177e2005-04-16 15:20:36 -07003114
3115 /* Select the device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003116 chip->select_chip(mtd, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003117
Karl Beldanef89a882008-09-15 14:37:29 +02003118 /*
3119 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
Brian Norris8b6e50c2011-05-25 14:59:01 -07003120 * after power-up.
Karl Beldanef89a882008-09-15 14:37:29 +02003121 */
3122 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
3123
Linus Torvalds1da177e2005-04-16 15:20:36 -07003124 /* Send the command for reading device ID */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003125 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003126
3127 /* Read manufacturer and device IDs */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003128 *maf_id = chip->read_byte(mtd);
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003129 *dev_id = chip->read_byte(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003130
Brian Norris8b6e50c2011-05-25 14:59:01 -07003131 /*
3132 * Try again to make sure, as some systems the bus-hold or other
Ben Dooksed8165c2008-04-14 14:58:58 +01003133 * interface concerns can cause random data which looks like a
3134 * possibly credible NAND flash to appear. If the two results do
3135 * not match, ignore the device completely.
3136 */
3137
3138 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
3139
Brian Norris4aef9b72012-09-24 20:40:48 -07003140 /* Read entire ID string */
3141 for (i = 0; i < 8; i++)
Kevin Cernekee426c4572010-05-04 20:58:03 -07003142 id_data[i] = chip->read_byte(mtd);
Ben Dooksed8165c2008-04-14 14:58:58 +01003143
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003144 if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003145 pr_info("%s: second ID read did not match "
Brian Norrisd0370212011-07-19 10:06:08 -07003146 "%02x,%02x against %02x,%02x\n", __func__,
3147 *maf_id, *dev_id, id_data[0], id_data[1]);
Ben Dooksed8165c2008-04-14 14:58:58 +01003148 return ERR_PTR(-ENODEV);
3149 }
3150
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003151 if (!type)
David Woodhouse5e81e882010-02-26 18:32:56 +00003152 type = nand_flash_ids;
3153
3154 for (; type->name != NULL; type++)
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003155 if (*dev_id == type->id)
Florian Fainellif8ac0412010-09-07 13:23:43 +02003156 break;
David Woodhouse5e81e882010-02-26 18:32:56 +00003157
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003158 chip->onfi_version = 0;
3159 if (!type->name || !type->pagesize) {
Florian Fainelli6fb277b2010-09-01 22:28:59 +02003160 /* Check is chip is ONFI compliant */
Brian Norris47450b32012-09-24 20:40:47 -07003161 if (nand_flash_detect_onfi(mtd, chip, &busw))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02003162 goto ident_done;
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003163 }
3164
David Woodhouse5e81e882010-02-26 18:32:56 +00003165 if (!type->name)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003166 return ERR_PTR(-ENODEV);
3167
Thomas Gleixnerba0251f2006-05-27 01:02:13 +02003168 if (!mtd->name)
3169 mtd->name = type->name;
3170
Adrian Hunter69423d92008-12-10 13:37:21 +00003171 chip->chipsize = (uint64_t)type->chipsize << 20;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003172
Huang Shijie12a40a52010-09-27 10:43:53 +08003173 if (!type->pagesize && chip->init_size) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07003174 /* Set the pagesize, oobsize, erasesize by the driver */
Huang Shijie12a40a52010-09-27 10:43:53 +08003175 busw = chip->init_size(mtd, chip, id_data);
3176 } else if (!type->pagesize) {
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003177 /* Decode parameters from extended ID */
3178 nand_decode_ext_id(mtd, chip, id_data, &busw);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003179 } else {
Brian Norrisf23a4812012-09-24 20:40:51 -07003180 nand_decode_id(mtd, chip, type, id_data, &busw);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003181 }
Brian Norrisbf7a01b2012-07-13 09:28:24 -07003182 /* Get chip options */
3183 chip->options |= type->options;
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003184
Brian Norris8b6e50c2011-05-25 14:59:01 -07003185 /*
3186 * Check if chip is not a Samsung device. Do not clear the
3187 * options for chips which do not have an extended id.
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003188 */
3189 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
3190 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
3191ident_done:
3192
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003193 /* Try to identify manufacturer */
David Woodhouse9a909862006-07-15 13:26:18 +01003194 for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003195 if (nand_manuf_ids[maf_idx].id == *maf_id)
3196 break;
3197 }
3198
Matthieu CASTET64b37b22012-11-06 11:51:44 +01003199 if (chip->options & NAND_BUSWIDTH_AUTO) {
3200 WARN_ON(chip->options & NAND_BUSWIDTH_16);
3201 chip->options |= busw;
3202 nand_set_defaults(chip, busw);
3203 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) {
3204 /*
3205 * Check, if buswidth is correct. Hardware drivers should set
3206 * chip correct!
3207 */
Brian Norris9a4d4d62011-07-19 10:06:07 -07003208 pr_info("NAND device: Manufacturer ID:"
Brian Norrisd0370212011-07-19 10:06:08 -07003209 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
3210 *dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
Brian Norris9a4d4d62011-07-19 10:06:07 -07003211 pr_warn("NAND bus width %d instead %d bit\n",
Brian Norrisd0370212011-07-19 10:06:08 -07003212 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
3213 busw ? 16 : 8);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003214 return ERR_PTR(-EINVAL);
3215 }
3216
Brian Norris7e74c2d2012-09-24 20:40:49 -07003217 nand_decode_bbm_options(mtd, chip, id_data);
3218
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003219 /* Calculate the address shift from the page size */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003220 chip->page_shift = ffs(mtd->writesize) - 1;
Brian Norris8b6e50c2011-05-25 14:59:01 -07003221 /* Convert chipsize to number of pages per chip -1 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003222 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003223
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003224 chip->bbt_erase_shift = chip->phys_erase_shift =
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003225 ffs(mtd->erasesize) - 1;
Adrian Hunter69423d92008-12-10 13:37:21 +00003226 if (chip->chipsize & 0xffffffff)
3227 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003228 else {
3229 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
3230 chip->chip_shift += 32 - 1;
3231 }
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003232
Artem Bityutskiy26d9be12011-04-28 20:26:59 +03003233 chip->badblockbits = 8;
Artem Bityutskiy14c65782013-03-04 14:21:34 +02003234 chip->erase_cmd = single_erase_cmd;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003235
Brian Norris8b6e50c2011-05-25 14:59:01 -07003236 /* Do not replace user supplied command function! */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003237 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
3238 chip->cmdfunc = nand_command_lp;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003239
Huang Shijie886bd332012-04-09 11:41:37 +08003240 pr_info("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s),"
Matthieu CASTET2fd71a22012-11-22 18:33:40 +01003241 " %dMiB, page size: %d, OOB size: %d\n",
Huang Shijie886bd332012-04-09 11:41:37 +08003242 *maf_id, *dev_id, nand_manuf_ids[maf_idx].name,
3243 chip->onfi_version ? chip->onfi_params.model : type->name,
Matthieu CASTET2fd71a22012-11-22 18:33:40 +01003244 (int)(chip->chipsize >> 20), mtd->writesize, mtd->oobsize);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003245
3246 return type;
3247}
3248
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003249/**
David Woodhouse3b85c322006-09-25 17:06:53 +01003250 * nand_scan_ident - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003251 * @mtd: MTD device structure
3252 * @maxchips: number of chips to scan for
3253 * @table: alternative NAND ID table
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003254 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003255 * This is the first phase of the normal nand_scan() function. It reads the
3256 * flash ID and sets up MTD fields accordingly.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003257 *
David Woodhouse3b85c322006-09-25 17:06:53 +01003258 * The mtd->owner field must be set to the module of the caller.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003259 */
David Woodhouse5e81e882010-02-26 18:32:56 +00003260int nand_scan_ident(struct mtd_info *mtd, int maxchips,
3261 struct nand_flash_dev *table)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003262{
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003263 int i, busw, nand_maf_id, nand_dev_id;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003264 struct nand_chip *chip = mtd->priv;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003265 struct nand_flash_dev *type;
3266
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003267 /* Get buswidth to select the correct functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003268 busw = chip->options & NAND_BUSWIDTH_16;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003269 /* Set the default functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003270 nand_set_defaults(chip, busw);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003271
3272 /* Read the flash type */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003273 type = nand_get_flash_type(mtd, chip, busw,
3274 &nand_maf_id, &nand_dev_id, table);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003275
3276 if (IS_ERR(type)) {
Ben Dooksb1c6e6d2009-11-02 18:12:33 +00003277 if (!(chip->options & NAND_SCAN_SILENT_NODEV))
Brian Norrisd0370212011-07-19 10:06:08 -07003278 pr_warn("No NAND device found\n");
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003279 chip->select_chip(mtd, -1);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003280 return PTR_ERR(type);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003281 }
3282
Huang Shijie07300162012-11-09 16:23:45 +08003283 chip->select_chip(mtd, -1);
3284
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003285 /* Check for a chip array */
David Woodhousee0c7d762006-05-13 18:07:53 +01003286 for (i = 1; i < maxchips; i++) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003287 chip->select_chip(mtd, i);
Karl Beldanef89a882008-09-15 14:37:29 +02003288 /* See comment in nand_get_flash_type for reset */
3289 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003290 /* Send the command for reading device ID */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003291 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003292 /* Read manufacturer and device IDs */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003293 if (nand_maf_id != chip->read_byte(mtd) ||
Huang Shijie07300162012-11-09 16:23:45 +08003294 nand_dev_id != chip->read_byte(mtd)) {
3295 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003296 break;
Huang Shijie07300162012-11-09 16:23:45 +08003297 }
3298 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003299 }
3300 if (i > 1)
Brian Norris9a4d4d62011-07-19 10:06:07 -07003301 pr_info("%d NAND chips detected\n", i);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003302
Linus Torvalds1da177e2005-04-16 15:20:36 -07003303 /* Store the number of chips and calc total size for mtd */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003304 chip->numchips = i;
3305 mtd->size = i * chip->chipsize;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003306
David Woodhouse3b85c322006-09-25 17:06:53 +01003307 return 0;
3308}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003309EXPORT_SYMBOL(nand_scan_ident);
David Woodhouse3b85c322006-09-25 17:06:53 +01003310
3311
3312/**
3313 * nand_scan_tail - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003314 * @mtd: MTD device structure
David Woodhouse3b85c322006-09-25 17:06:53 +01003315 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003316 * This is the second phase of the normal nand_scan() function. It fills out
3317 * all the uninitialized function pointers with the defaults and scans for a
3318 * bad block table if appropriate.
David Woodhouse3b85c322006-09-25 17:06:53 +01003319 */
3320int nand_scan_tail(struct mtd_info *mtd)
3321{
3322 int i;
3323 struct nand_chip *chip = mtd->priv;
3324
Brian Norrise2414f42012-02-06 13:44:00 -08003325 /* New bad blocks should be marked in OOB, flash-based BBT, or both */
3326 BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
3327 !(chip->bbt_options & NAND_BBT_USE_FLASH));
3328
David Woodhouse4bf63fc2006-09-25 17:08:04 +01003329 if (!(chip->options & NAND_OWN_BUFFERS))
3330 chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
3331 if (!chip->buffers)
3332 return -ENOMEM;
3333
David Woodhouse7dcdcbef2006-10-21 17:09:53 +01003334 /* Set the internal oob buffer location, just after the page data */
David Woodhouse784f4d52006-10-22 01:47:45 +01003335 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003336
3337 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003338 * If no default placement scheme is given, select an appropriate one.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003339 */
Ivan Djelic193bd402011-03-11 11:05:33 +01003340 if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003341 switch (mtd->oobsize) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003342 case 8:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003343 chip->ecc.layout = &nand_oob_8;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003344 break;
3345 case 16:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003346 chip->ecc.layout = &nand_oob_16;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003347 break;
3348 case 64:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003349 chip->ecc.layout = &nand_oob_64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003350 break;
Thomas Gleixner81ec5362007-12-12 17:27:03 +01003351 case 128:
3352 chip->ecc.layout = &nand_oob_128;
3353 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003354 default:
Brian Norrisd0370212011-07-19 10:06:08 -07003355 pr_warn("No oob scheme defined for oobsize %d\n",
3356 mtd->oobsize);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003357 BUG();
3358 }
3359 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003360
David Woodhouse956e9442006-09-25 17:12:39 +01003361 if (!chip->write_page)
3362 chip->write_page = nand_write_page;
3363
Huang Shijie7db03ec2012-09-13 14:57:52 +08003364 /* set for ONFI nand */
3365 if (!chip->onfi_set_features)
3366 chip->onfi_set_features = nand_onfi_set_features;
3367 if (!chip->onfi_get_features)
3368 chip->onfi_get_features = nand_onfi_get_features;
3369
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003370 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003371 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003372 * selected and we have 256 byte pagesize fallback to software ECC
David Woodhousee0c7d762006-05-13 18:07:53 +01003373 */
David Woodhouse956e9442006-09-25 17:12:39 +01003374
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003375 switch (chip->ecc.mode) {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07003376 case NAND_ECC_HW_OOB_FIRST:
3377 /* Similar to NAND_ECC_HW, but a separate read_page handle */
3378 if (!chip->ecc.calculate || !chip->ecc.correct ||
3379 !chip->ecc.hwctl) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003380 pr_warn("No ECC functions supplied; "
Brian Norrisd0370212011-07-19 10:06:08 -07003381 "hardware ECC not possible\n");
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07003382 BUG();
3383 }
3384 if (!chip->ecc.read_page)
3385 chip->ecc.read_page = nand_read_page_hwecc_oob_first;
3386
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003387 case NAND_ECC_HW:
Brian Norris8b6e50c2011-05-25 14:59:01 -07003388 /* Use standard hwecc read page function? */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003389 if (!chip->ecc.read_page)
3390 chip->ecc.read_page = nand_read_page_hwecc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003391 if (!chip->ecc.write_page)
3392 chip->ecc.write_page = nand_write_page_hwecc;
David Brownell52ff49d2009-03-04 12:01:36 -08003393 if (!chip->ecc.read_page_raw)
3394 chip->ecc.read_page_raw = nand_read_page_raw;
3395 if (!chip->ecc.write_page_raw)
3396 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003397 if (!chip->ecc.read_oob)
3398 chip->ecc.read_oob = nand_read_oob_std;
3399 if (!chip->ecc.write_oob)
3400 chip->ecc.write_oob = nand_write_oob_std;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003401
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003402 case NAND_ECC_HW_SYNDROME:
Scott Wood78b65172007-12-13 11:15:28 -06003403 if ((!chip->ecc.calculate || !chip->ecc.correct ||
3404 !chip->ecc.hwctl) &&
3405 (!chip->ecc.read_page ||
Scott Wood1c45f602008-01-16 10:36:03 -06003406 chip->ecc.read_page == nand_read_page_hwecc ||
Scott Wood78b65172007-12-13 11:15:28 -06003407 !chip->ecc.write_page ||
Scott Wood1c45f602008-01-16 10:36:03 -06003408 chip->ecc.write_page == nand_write_page_hwecc)) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003409 pr_warn("No ECC functions supplied; "
Brian Norrisd0370212011-07-19 10:06:08 -07003410 "hardware ECC not possible\n");
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003411 BUG();
3412 }
Brian Norris8b6e50c2011-05-25 14:59:01 -07003413 /* Use standard syndrome read/write page function? */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003414 if (!chip->ecc.read_page)
3415 chip->ecc.read_page = nand_read_page_syndrome;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003416 if (!chip->ecc.write_page)
3417 chip->ecc.write_page = nand_write_page_syndrome;
David Brownell52ff49d2009-03-04 12:01:36 -08003418 if (!chip->ecc.read_page_raw)
3419 chip->ecc.read_page_raw = nand_read_page_raw_syndrome;
3420 if (!chip->ecc.write_page_raw)
3421 chip->ecc.write_page_raw = nand_write_page_raw_syndrome;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003422 if (!chip->ecc.read_oob)
3423 chip->ecc.read_oob = nand_read_oob_syndrome;
3424 if (!chip->ecc.write_oob)
3425 chip->ecc.write_oob = nand_write_oob_syndrome;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003426
Mike Dunne2788c92012-04-25 12:06:10 -07003427 if (mtd->writesize >= chip->ecc.size) {
3428 if (!chip->ecc.strength) {
3429 pr_warn("Driver must set ecc.strength when using hardware ECC\n");
3430 BUG();
3431 }
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003432 break;
Mike Dunne2788c92012-04-25 12:06:10 -07003433 }
Brian Norris9a4d4d62011-07-19 10:06:07 -07003434 pr_warn("%d byte HW ECC not possible on "
Brian Norrisd0370212011-07-19 10:06:08 -07003435 "%d byte page size, fallback to SW ECC\n",
3436 chip->ecc.size, mtd->writesize);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003437 chip->ecc.mode = NAND_ECC_SOFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003438
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003439 case NAND_ECC_SOFT:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003440 chip->ecc.calculate = nand_calculate_ecc;
3441 chip->ecc.correct = nand_correct_data;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003442 chip->ecc.read_page = nand_read_page_swecc;
Alexey Korolev3d459552008-05-15 17:23:18 +01003443 chip->ecc.read_subpage = nand_read_subpage;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003444 chip->ecc.write_page = nand_write_page_swecc;
David Brownell52ff49d2009-03-04 12:01:36 -08003445 chip->ecc.read_page_raw = nand_read_page_raw;
3446 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003447 chip->ecc.read_oob = nand_read_oob_std;
3448 chip->ecc.write_oob = nand_write_oob_std;
Singh, Vimal9a732902008-12-12 00:10:57 +00003449 if (!chip->ecc.size)
3450 chip->ecc.size = 256;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003451 chip->ecc.bytes = 3;
Mike Dunn6a918ba2012-03-11 14:21:11 -07003452 chip->ecc.strength = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003453 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003454
Ivan Djelic193bd402011-03-11 11:05:33 +01003455 case NAND_ECC_SOFT_BCH:
3456 if (!mtd_nand_has_bch()) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003457 pr_warn("CONFIG_MTD_ECC_BCH not enabled\n");
Ivan Djelic193bd402011-03-11 11:05:33 +01003458 BUG();
3459 }
3460 chip->ecc.calculate = nand_bch_calculate_ecc;
3461 chip->ecc.correct = nand_bch_correct_data;
3462 chip->ecc.read_page = nand_read_page_swecc;
3463 chip->ecc.read_subpage = nand_read_subpage;
3464 chip->ecc.write_page = nand_write_page_swecc;
3465 chip->ecc.read_page_raw = nand_read_page_raw;
3466 chip->ecc.write_page_raw = nand_write_page_raw;
3467 chip->ecc.read_oob = nand_read_oob_std;
3468 chip->ecc.write_oob = nand_write_oob_std;
3469 /*
3470 * Board driver should supply ecc.size and ecc.bytes values to
3471 * select how many bits are correctable; see nand_bch_init()
Brian Norris8b6e50c2011-05-25 14:59:01 -07003472 * for details. Otherwise, default to 4 bits for large page
3473 * devices.
Ivan Djelic193bd402011-03-11 11:05:33 +01003474 */
3475 if (!chip->ecc.size && (mtd->oobsize >= 64)) {
3476 chip->ecc.size = 512;
3477 chip->ecc.bytes = 7;
3478 }
3479 chip->ecc.priv = nand_bch_init(mtd,
3480 chip->ecc.size,
3481 chip->ecc.bytes,
3482 &chip->ecc.layout);
3483 if (!chip->ecc.priv) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003484 pr_warn("BCH ECC initialization failed!\n");
Ivan Djelic193bd402011-03-11 11:05:33 +01003485 BUG();
3486 }
Mike Dunn6a918ba2012-03-11 14:21:11 -07003487 chip->ecc.strength =
Mike Dunne2788c92012-04-25 12:06:10 -07003488 chip->ecc.bytes * 8 / fls(8 * chip->ecc.size);
Ivan Djelic193bd402011-03-11 11:05:33 +01003489 break;
3490
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003491 case NAND_ECC_NONE:
Brian Norris9a4d4d62011-07-19 10:06:07 -07003492 pr_warn("NAND_ECC_NONE selected by board driver. "
Brian Norrisd0370212011-07-19 10:06:08 -07003493 "This is not recommended!\n");
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02003494 chip->ecc.read_page = nand_read_page_raw;
3495 chip->ecc.write_page = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003496 chip->ecc.read_oob = nand_read_oob_std;
David Brownell52ff49d2009-03-04 12:01:36 -08003497 chip->ecc.read_page_raw = nand_read_page_raw;
3498 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003499 chip->ecc.write_oob = nand_write_oob_std;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003500 chip->ecc.size = mtd->writesize;
3501 chip->ecc.bytes = 0;
Mike Dunn6a918ba2012-03-11 14:21:11 -07003502 chip->ecc.strength = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003503 break;
David Woodhouse956e9442006-09-25 17:12:39 +01003504
Linus Torvalds1da177e2005-04-16 15:20:36 -07003505 default:
Brian Norrisd0370212011-07-19 10:06:08 -07003506 pr_warn("Invalid NAND_ECC_MODE %d\n", chip->ecc.mode);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003507 BUG();
3508 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003509
Brian Norris9ce244b2011-08-30 18:45:37 -07003510 /* For many systems, the standard OOB write also works for raw */
Brian Norrisc46f6482011-08-30 18:45:38 -07003511 if (!chip->ecc.read_oob_raw)
3512 chip->ecc.read_oob_raw = chip->ecc.read_oob;
Brian Norris9ce244b2011-08-30 18:45:37 -07003513 if (!chip->ecc.write_oob_raw)
3514 chip->ecc.write_oob_raw = chip->ecc.write_oob;
3515
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003516 /*
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003517 * The number of bytes available for a client to place data into
Brian Norris8b6e50c2011-05-25 14:59:01 -07003518 * the out of band area.
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003519 */
3520 chip->ecc.layout->oobavail = 0;
David Brownell81d19b02009-04-21 19:51:20 -07003521 for (i = 0; chip->ecc.layout->oobfree[i].length
3522 && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++)
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003523 chip->ecc.layout->oobavail +=
3524 chip->ecc.layout->oobfree[i].length;
Vitaly Wool1f922672007-03-06 16:56:34 +03003525 mtd->oobavail = chip->ecc.layout->oobavail;
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003526
3527 /*
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003528 * Set the number of read / write steps for one page depending on ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07003529 * mode.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003530 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003531 chip->ecc.steps = mtd->writesize / chip->ecc.size;
Florian Fainellif8ac0412010-09-07 13:23:43 +02003532 if (chip->ecc.steps * chip->ecc.size != mtd->writesize) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003533 pr_warn("Invalid ECC parameters\n");
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003534 BUG();
Linus Torvalds1da177e2005-04-16 15:20:36 -07003535 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003536 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003537
Brian Norris8b6e50c2011-05-25 14:59:01 -07003538 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
Thomas Gleixner29072b92006-09-28 15:38:36 +02003539 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
3540 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
Florian Fainellif8ac0412010-09-07 13:23:43 +02003541 switch (chip->ecc.steps) {
Thomas Gleixner29072b92006-09-28 15:38:36 +02003542 case 2:
3543 mtd->subpage_sft = 1;
3544 break;
3545 case 4:
3546 case 8:
Thomas Gleixner81ec5362007-12-12 17:27:03 +01003547 case 16:
Thomas Gleixner29072b92006-09-28 15:38:36 +02003548 mtd->subpage_sft = 2;
3549 break;
3550 }
3551 }
3552 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
3553
Thomas Gleixner04bbd0e2006-05-25 09:45:29 +02003554 /* Initialize state */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003555 chip->state = FL_READY;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003556
Linus Torvalds1da177e2005-04-16 15:20:36 -07003557 /* Invalidate the pagebuffer reference */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003558 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003559
Jeff Westfahla5ff4f12012-08-13 16:35:30 -05003560 /* Large page NAND with SOFT_ECC should support subpage reads */
3561 if ((chip->ecc.mode == NAND_ECC_SOFT) && (chip->page_shift > 9))
3562 chip->options |= NAND_SUBPAGE_READ;
3563
Linus Torvalds1da177e2005-04-16 15:20:36 -07003564 /* Fill in remaining MTD driver data */
3565 mtd->type = MTD_NANDFLASH;
Maxim Levitsky93edbad2010-02-22 20:39:40 +02003566 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
3567 MTD_CAP_NANDFLASH;
Artem Bityutskiy3c3c10b2012-01-30 14:58:32 +02003568 mtd->_erase = nand_erase;
3569 mtd->_point = NULL;
3570 mtd->_unpoint = NULL;
3571 mtd->_read = nand_read;
3572 mtd->_write = nand_write;
3573 mtd->_panic_write = panic_nand_write;
3574 mtd->_read_oob = nand_read_oob;
3575 mtd->_write_oob = nand_write_oob;
3576 mtd->_sync = nand_sync;
3577 mtd->_lock = NULL;
3578 mtd->_unlock = NULL;
3579 mtd->_suspend = nand_suspend;
3580 mtd->_resume = nand_resume;
3581 mtd->_block_isbad = nand_block_isbad;
3582 mtd->_block_markbad = nand_block_markbad;
Anatolij Gustschincbcab652010-12-16 23:42:16 +01003583 mtd->writebufsize = mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003584
Mike Dunn6a918ba2012-03-11 14:21:11 -07003585 /* propagate ecc info to mtd_info */
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003586 mtd->ecclayout = chip->ecc.layout;
Mike Dunn86c20722012-04-25 12:06:05 -07003587 mtd->ecc_strength = chip->ecc.strength;
Shmulik Ladkaniea3b2ea2012-06-08 18:29:06 +03003588 /*
3589 * Initialize bitflip_threshold to its default prior scan_bbt() call.
3590 * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be
3591 * properly set.
3592 */
3593 if (!mtd->bitflip_threshold)
3594 mtd->bitflip_threshold = mtd->ecc_strength;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003595
Thomas Gleixner0040bf32005-02-09 12:20:00 +00003596 /* Check, if we should skip the bad block table scan */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003597 if (chip->options & NAND_SKIP_BBTSCAN)
Thomas Gleixner0040bf32005-02-09 12:20:00 +00003598 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003599
3600 /* Build bad block table */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003601 return chip->scan_bbt(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003602}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003603EXPORT_SYMBOL(nand_scan_tail);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003604
Brian Norris8b6e50c2011-05-25 14:59:01 -07003605/*
3606 * is_module_text_address() isn't exported, and it's mostly a pointless
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003607 * test if this is a module _anyway_ -- they'd have to try _really_ hard
Brian Norris8b6e50c2011-05-25 14:59:01 -07003608 * to call us from in-kernel code if the core NAND support is modular.
3609 */
David Woodhouse3b85c322006-09-25 17:06:53 +01003610#ifdef MODULE
3611#define caller_is_module() (1)
3612#else
3613#define caller_is_module() \
Rusty Russella6e6abd2009-03-31 13:05:31 -06003614 is_module_text_address((unsigned long)__builtin_return_address(0))
David Woodhouse3b85c322006-09-25 17:06:53 +01003615#endif
3616
3617/**
3618 * nand_scan - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003619 * @mtd: MTD device structure
3620 * @maxchips: number of chips to scan for
David Woodhouse3b85c322006-09-25 17:06:53 +01003621 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003622 * This fills out all the uninitialized function pointers with the defaults.
3623 * The flash ID is read and the mtd/chip structures are filled with the
3624 * appropriate values. The mtd->owner field must be set to the module of the
3625 * caller.
David Woodhouse3b85c322006-09-25 17:06:53 +01003626 */
3627int nand_scan(struct mtd_info *mtd, int maxchips)
3628{
3629 int ret;
3630
3631 /* Many callers got this wrong, so check for it for a while... */
3632 if (!mtd->owner && caller_is_module()) {
Brian Norrisd0370212011-07-19 10:06:08 -07003633 pr_crit("%s called with NULL mtd->owner!\n", __func__);
David Woodhouse3b85c322006-09-25 17:06:53 +01003634 BUG();
3635 }
3636
David Woodhouse5e81e882010-02-26 18:32:56 +00003637 ret = nand_scan_ident(mtd, maxchips, NULL);
David Woodhouse3b85c322006-09-25 17:06:53 +01003638 if (!ret)
3639 ret = nand_scan_tail(mtd);
3640 return ret;
3641}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003642EXPORT_SYMBOL(nand_scan);
David Woodhouse3b85c322006-09-25 17:06:53 +01003643
Linus Torvalds1da177e2005-04-16 15:20:36 -07003644/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003645 * nand_release - [NAND Interface] Free resources held by the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003646 * @mtd: MTD device structure
3647 */
David Woodhousee0c7d762006-05-13 18:07:53 +01003648void nand_release(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003649{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003650 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003651
Ivan Djelic193bd402011-03-11 11:05:33 +01003652 if (chip->ecc.mode == NAND_ECC_SOFT_BCH)
3653 nand_bch_free((struct nand_bch_control *)chip->ecc.priv);
3654
Jamie Iles5ffcaf32011-05-23 10:22:46 +01003655 mtd_device_unregister(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003656
Jesper Juhlfa671642005-11-07 01:01:27 -08003657 /* Free bad block table memory */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003658 kfree(chip->bbt);
David Woodhouse4bf63fc2006-09-25 17:08:04 +01003659 if (!(chip->options & NAND_OWN_BUFFERS))
3660 kfree(chip->buffers);
Brian Norris58373ff2010-07-15 12:15:44 -07003661
3662 /* Free bad block descriptor memory */
3663 if (chip->badblock_pattern && chip->badblock_pattern->options
3664 & NAND_BBT_DYNAMICSTRUCT)
3665 kfree(chip->badblock_pattern);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003666}
David Woodhousee0c7d762006-05-13 18:07:53 +01003667EXPORT_SYMBOL_GPL(nand_release);
Richard Purdie8fe833c2006-03-31 02:31:14 -08003668
3669static int __init nand_base_init(void)
3670{
3671 led_trigger_register_simple("nand-disk", &nand_led_trigger);
3672 return 0;
3673}
3674
3675static void __exit nand_base_exit(void)
3676{
3677 led_trigger_unregister_simple(nand_led_trigger);
3678}
3679
3680module_init(nand_base_init);
3681module_exit(nand_base_exit);
3682
David Woodhousee0c7d762006-05-13 18:07:53 +01003683MODULE_LICENSE("GPL");
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003684MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");
3685MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
David Woodhousee0c7d762006-05-13 18:07:53 +01003686MODULE_DESCRIPTION("Generic NAND flash driver code");