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Mark Brown2159ad92012-10-11 11:54:02 +09001/*
2 * wm_adsp.c -- Wolfson ADSP support
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/firmware.h>
Mark Browncf17c832013-01-30 14:37:23 +080018#include <linux/list.h>
Mark Brown2159ad92012-10-11 11:54:02 +090019#include <linux/pm.h>
20#include <linux/pm_runtime.h>
21#include <linux/regmap.h>
Mark Brown973838a2012-11-28 17:20:32 +000022#include <linux/regulator/consumer.h>
Mark Brown2159ad92012-10-11 11:54:02 +090023#include <linux/slab.h>
Charles Keepaxcdcd7f72014-11-14 15:40:45 +000024#include <linux/vmalloc.h>
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +010025#include <linux/workqueue.h>
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +010026#include <linux/debugfs.h>
Mark Brown2159ad92012-10-11 11:54:02 +090027#include <sound/core.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/soc.h>
31#include <sound/jack.h>
32#include <sound/initval.h>
33#include <sound/tlv.h>
34
Mark Brown2159ad92012-10-11 11:54:02 +090035#include "wm_adsp.h"
36
37#define adsp_crit(_dsp, fmt, ...) \
38 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
39#define adsp_err(_dsp, fmt, ...) \
40 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
41#define adsp_warn(_dsp, fmt, ...) \
42 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
43#define adsp_info(_dsp, fmt, ...) \
44 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
45#define adsp_dbg(_dsp, fmt, ...) \
46 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
47
48#define ADSP1_CONTROL_1 0x00
49#define ADSP1_CONTROL_2 0x02
50#define ADSP1_CONTROL_3 0x03
51#define ADSP1_CONTROL_4 0x04
52#define ADSP1_CONTROL_5 0x06
53#define ADSP1_CONTROL_6 0x07
54#define ADSP1_CONTROL_7 0x08
55#define ADSP1_CONTROL_8 0x09
56#define ADSP1_CONTROL_9 0x0A
57#define ADSP1_CONTROL_10 0x0B
58#define ADSP1_CONTROL_11 0x0C
59#define ADSP1_CONTROL_12 0x0D
60#define ADSP1_CONTROL_13 0x0F
61#define ADSP1_CONTROL_14 0x10
62#define ADSP1_CONTROL_15 0x11
63#define ADSP1_CONTROL_16 0x12
64#define ADSP1_CONTROL_17 0x13
65#define ADSP1_CONTROL_18 0x14
66#define ADSP1_CONTROL_19 0x16
67#define ADSP1_CONTROL_20 0x17
68#define ADSP1_CONTROL_21 0x18
69#define ADSP1_CONTROL_22 0x1A
70#define ADSP1_CONTROL_23 0x1B
71#define ADSP1_CONTROL_24 0x1C
72#define ADSP1_CONTROL_25 0x1E
73#define ADSP1_CONTROL_26 0x20
74#define ADSP1_CONTROL_27 0x21
75#define ADSP1_CONTROL_28 0x22
76#define ADSP1_CONTROL_29 0x23
77#define ADSP1_CONTROL_30 0x24
78#define ADSP1_CONTROL_31 0x26
79
80/*
81 * ADSP1 Control 19
82 */
83#define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
84#define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
85#define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
86
87
88/*
89 * ADSP1 Control 30
90 */
91#define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
92#define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
93#define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
94#define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
95#define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
96#define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
97#define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
98#define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
99#define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
100#define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
101#define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
102#define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
103#define ADSP1_START 0x0001 /* DSP1_START */
104#define ADSP1_START_MASK 0x0001 /* DSP1_START */
105#define ADSP1_START_SHIFT 0 /* DSP1_START */
106#define ADSP1_START_WIDTH 1 /* DSP1_START */
107
Chris Rattray94e205b2013-01-18 08:43:09 +0000108/*
109 * ADSP1 Control 31
110 */
111#define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
112#define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
113#define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
114
Mark Brown2d30b572013-01-28 20:18:17 +0800115#define ADSP2_CONTROL 0x0
116#define ADSP2_CLOCKING 0x1
117#define ADSP2_STATUS1 0x4
118#define ADSP2_WDMA_CONFIG_1 0x30
119#define ADSP2_WDMA_CONFIG_2 0x31
120#define ADSP2_RDMA_CONFIG_1 0x34
Mark Brown2159ad92012-10-11 11:54:02 +0900121
Richard Fitzgerald10337b02015-05-29 10:23:07 +0100122#define ADSP2_SCRATCH0 0x40
123#define ADSP2_SCRATCH1 0x41
124#define ADSP2_SCRATCH2 0x42
125#define ADSP2_SCRATCH3 0x43
126
Mark Brown2159ad92012-10-11 11:54:02 +0900127/*
128 * ADSP2 Control
129 */
130
131#define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
132#define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
133#define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
134#define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
135#define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
136#define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
137#define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
138#define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
139#define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
140#define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
141#define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
142#define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
143#define ADSP2_START 0x0001 /* DSP1_START */
144#define ADSP2_START_MASK 0x0001 /* DSP1_START */
145#define ADSP2_START_SHIFT 0 /* DSP1_START */
146#define ADSP2_START_WIDTH 1 /* DSP1_START */
147
148/*
Mark Brown973838a2012-11-28 17:20:32 +0000149 * ADSP2 clocking
150 */
151#define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
152#define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
153#define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
154
155/*
Mark Brown2159ad92012-10-11 11:54:02 +0900156 * ADSP2 Status 1
157 */
158#define ADSP2_RAM_RDY 0x0001
159#define ADSP2_RAM_RDY_MASK 0x0001
160#define ADSP2_RAM_RDY_SHIFT 0
161#define ADSP2_RAM_RDY_WIDTH 1
162
Charles Keepax9ee78752016-05-02 13:57:36 +0100163#define ADSP_MAX_STD_CTRL_SIZE 512
164
Mark Browncf17c832013-01-30 14:37:23 +0800165struct wm_adsp_buf {
166 struct list_head list;
167 void *buf;
168};
169
170static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
171 struct list_head *list)
172{
173 struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
174
175 if (buf == NULL)
176 return NULL;
177
Charles Keepaxcdcd7f72014-11-14 15:40:45 +0000178 buf->buf = vmalloc(len);
Mark Browncf17c832013-01-30 14:37:23 +0800179 if (!buf->buf) {
Charles Keepaxcdcd7f72014-11-14 15:40:45 +0000180 vfree(buf);
Mark Browncf17c832013-01-30 14:37:23 +0800181 return NULL;
182 }
Charles Keepaxcdcd7f72014-11-14 15:40:45 +0000183 memcpy(buf->buf, src, len);
Mark Browncf17c832013-01-30 14:37:23 +0800184
185 if (list)
186 list_add_tail(&buf->list, list);
187
188 return buf;
189}
190
191static void wm_adsp_buf_free(struct list_head *list)
192{
193 while (!list_empty(list)) {
194 struct wm_adsp_buf *buf = list_first_entry(list,
195 struct wm_adsp_buf,
196 list);
197 list_del(&buf->list);
Charles Keepaxcdcd7f72014-11-14 15:40:45 +0000198 vfree(buf->buf);
Mark Browncf17c832013-01-30 14:37:23 +0800199 kfree(buf);
200 }
201}
202
Charles Keepax04d13002015-11-26 14:01:52 +0000203#define WM_ADSP_FW_MBC_VSS 0
204#define WM_ADSP_FW_HIFI 1
205#define WM_ADSP_FW_TX 2
206#define WM_ADSP_FW_TX_SPK 3
207#define WM_ADSP_FW_RX 4
208#define WM_ADSP_FW_RX_ANC 5
209#define WM_ADSP_FW_CTRL 6
210#define WM_ADSP_FW_ASR 7
211#define WM_ADSP_FW_TRACE 8
212#define WM_ADSP_FW_SPK_PROT 9
213#define WM_ADSP_FW_MISC 10
Mark Brown1023dbd2013-01-11 22:58:28 +0000214
Charles Keepax04d13002015-11-26 14:01:52 +0000215#define WM_ADSP_NUM_FW 11
Mark Browndd84f922013-03-08 15:25:58 +0800216
Mark Brown1023dbd2013-01-11 22:58:28 +0000217static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
Charles Keepax04d13002015-11-26 14:01:52 +0000218 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
219 [WM_ADSP_FW_HIFI] = "MasterHiFi",
220 [WM_ADSP_FW_TX] = "Tx",
221 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
222 [WM_ADSP_FW_RX] = "Rx",
223 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
224 [WM_ADSP_FW_CTRL] = "Voice Ctrl",
225 [WM_ADSP_FW_ASR] = "ASR Assist",
226 [WM_ADSP_FW_TRACE] = "Dbg Trace",
227 [WM_ADSP_FW_SPK_PROT] = "Protection",
228 [WM_ADSP_FW_MISC] = "Misc",
Mark Brown1023dbd2013-01-11 22:58:28 +0000229};
230
Charles Keepax2cd19bd2015-12-15 11:29:46 +0000231struct wm_adsp_system_config_xm_hdr {
232 __be32 sys_enable;
233 __be32 fw_id;
234 __be32 fw_rev;
235 __be32 boot_status;
236 __be32 watchdog;
237 __be32 dma_buffer_size;
238 __be32 rdma[6];
239 __be32 wdma[8];
240 __be32 build_job_name[3];
241 __be32 build_job_number;
242};
243
244struct wm_adsp_alg_xm_struct {
245 __be32 magic;
246 __be32 smoothing;
247 __be32 threshold;
248 __be32 host_buf_ptr;
249 __be32 start_seq;
250 __be32 high_water_mark;
251 __be32 low_water_mark;
252 __be64 smoothed_power;
253};
254
255struct wm_adsp_buffer {
256 __be32 X_buf_base; /* XM base addr of first X area */
257 __be32 X_buf_size; /* Size of 1st X area in words */
258 __be32 X_buf_base2; /* XM base addr of 2nd X area */
259 __be32 X_buf_brk; /* Total X size in words */
260 __be32 Y_buf_base; /* YM base addr of Y area */
261 __be32 wrap; /* Total size X and Y in words */
262 __be32 high_water_mark; /* Point at which IRQ is asserted */
263 __be32 irq_count; /* bits 1-31 count IRQ assertions */
264 __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */
265 __be32 next_write_index; /* word index of next write */
266 __be32 next_read_index; /* word index of next read */
267 __be32 error; /* error if any */
268 __be32 oldest_block_index; /* word index of oldest surviving */
269 __be32 requested_rewind; /* how many blocks rewind was done */
270 __be32 reserved_space; /* internal */
271 __be32 min_free; /* min free space since stream start */
272 __be32 blocks_written[2]; /* total blocks written (64 bit) */
273 __be32 words_written[2]; /* total words written (64 bit) */
274};
275
Charles Keepax721be3b2016-05-04 17:11:56 +0100276struct wm_adsp_compr;
277
Charles Keepax2cd19bd2015-12-15 11:29:46 +0000278struct wm_adsp_compr_buf {
279 struct wm_adsp *dsp;
Charles Keepax721be3b2016-05-04 17:11:56 +0100280 struct wm_adsp_compr *compr;
Charles Keepax2cd19bd2015-12-15 11:29:46 +0000281
282 struct wm_adsp_buffer_region *regions;
283 u32 host_buf_ptr;
Charles Keepax565ace42016-01-06 12:33:18 +0000284
285 u32 error;
286 u32 irq_count;
287 int read_index;
288 int avail;
Charles Keepax2cd19bd2015-12-15 11:29:46 +0000289};
290
Charles Keepax406abc92015-12-15 11:29:45 +0000291struct wm_adsp_compr {
292 struct wm_adsp *dsp;
Charles Keepax95fe9592015-12-15 11:29:47 +0000293 struct wm_adsp_compr_buf *buf;
Charles Keepax406abc92015-12-15 11:29:45 +0000294
295 struct snd_compr_stream *stream;
296 struct snd_compressed_buffer size;
Charles Keepax565ace42016-01-06 12:33:18 +0000297
Charles Keepax83a40ce2016-01-06 12:33:19 +0000298 u32 *raw_buf;
Charles Keepax565ace42016-01-06 12:33:18 +0000299 unsigned int copied_total;
Charles Keepaxda2b3352016-02-02 16:41:36 +0000300
301 unsigned int sample_rate;
Charles Keepax406abc92015-12-15 11:29:45 +0000302};
303
304#define WM_ADSP_DATA_WORD_SIZE 3
305
306#define WM_ADSP_MIN_FRAGMENTS 1
307#define WM_ADSP_MAX_FRAGMENTS 256
308#define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE)
309#define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE)
310
Charles Keepax2cd19bd2015-12-15 11:29:46 +0000311#define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7
312
313#define HOST_BUFFER_FIELD(field) \
314 (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
315
316#define ALG_XM_FIELD(field) \
317 (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
318
319static int wm_adsp_buffer_init(struct wm_adsp *dsp);
320static int wm_adsp_buffer_free(struct wm_adsp *dsp);
321
322struct wm_adsp_buffer_region {
323 unsigned int offset;
324 unsigned int cumulative_size;
325 unsigned int mem_type;
326 unsigned int base_addr;
327};
328
329struct wm_adsp_buffer_region_def {
330 unsigned int mem_type;
331 unsigned int base_offset;
332 unsigned int size_offset;
333};
334
Charles Keepax3a9686c2016-02-01 15:22:34 +0000335static const struct wm_adsp_buffer_region_def default_regions[] = {
Charles Keepax2cd19bd2015-12-15 11:29:46 +0000336 {
337 .mem_type = WMFW_ADSP2_XM,
338 .base_offset = HOST_BUFFER_FIELD(X_buf_base),
339 .size_offset = HOST_BUFFER_FIELD(X_buf_size),
340 },
341 {
342 .mem_type = WMFW_ADSP2_XM,
343 .base_offset = HOST_BUFFER_FIELD(X_buf_base2),
344 .size_offset = HOST_BUFFER_FIELD(X_buf_brk),
345 },
346 {
347 .mem_type = WMFW_ADSP2_YM,
348 .base_offset = HOST_BUFFER_FIELD(Y_buf_base),
349 .size_offset = HOST_BUFFER_FIELD(wrap),
350 },
351};
352
Charles Keepax406abc92015-12-15 11:29:45 +0000353struct wm_adsp_fw_caps {
354 u32 id;
355 struct snd_codec_desc desc;
Charles Keepax2cd19bd2015-12-15 11:29:46 +0000356 int num_regions;
Charles Keepax3a9686c2016-02-01 15:22:34 +0000357 const struct wm_adsp_buffer_region_def *region_defs;
Charles Keepax406abc92015-12-15 11:29:45 +0000358};
359
Charles Keepaxe6d00f32016-01-21 17:52:58 +0000360static const struct wm_adsp_fw_caps ctrl_caps[] = {
Charles Keepax406abc92015-12-15 11:29:45 +0000361 {
362 .id = SND_AUDIOCODEC_BESPOKE,
363 .desc = {
364 .max_ch = 1,
365 .sample_rates = { 16000 },
366 .num_sample_rates = 1,
367 .formats = SNDRV_PCM_FMTBIT_S16_LE,
368 },
Charles Keepaxe6d00f32016-01-21 17:52:58 +0000369 .num_regions = ARRAY_SIZE(default_regions),
370 .region_defs = default_regions,
Charles Keepax406abc92015-12-15 11:29:45 +0000371 },
372};
373
Charles Keepax7ce42832016-01-21 17:52:59 +0000374static const struct wm_adsp_fw_caps trace_caps[] = {
375 {
376 .id = SND_AUDIOCODEC_BESPOKE,
377 .desc = {
378 .max_ch = 8,
379 .sample_rates = {
380 4000, 8000, 11025, 12000, 16000, 22050,
381 24000, 32000, 44100, 48000, 64000, 88200,
382 96000, 176400, 192000
383 },
384 .num_sample_rates = 15,
385 .formats = SNDRV_PCM_FMTBIT_S16_LE,
386 },
387 .num_regions = ARRAY_SIZE(default_regions),
388 .region_defs = default_regions,
Charles Keepax406abc92015-12-15 11:29:45 +0000389 },
390};
391
392static const struct {
Mark Brown1023dbd2013-01-11 22:58:28 +0000393 const char *file;
Charles Keepax406abc92015-12-15 11:29:45 +0000394 int compr_direction;
395 int num_caps;
396 const struct wm_adsp_fw_caps *caps;
Mark Brown1023dbd2013-01-11 22:58:28 +0000397} wm_adsp_fw[WM_ADSP_NUM_FW] = {
Charles Keepax04d13002015-11-26 14:01:52 +0000398 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
399 [WM_ADSP_FW_HIFI] = { .file = "hifi" },
400 [WM_ADSP_FW_TX] = { .file = "tx" },
401 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
402 [WM_ADSP_FW_RX] = { .file = "rx" },
403 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
Charles Keepax406abc92015-12-15 11:29:45 +0000404 [WM_ADSP_FW_CTRL] = {
405 .file = "ctrl",
406 .compr_direction = SND_COMPRESS_CAPTURE,
Charles Keepaxe6d00f32016-01-21 17:52:58 +0000407 .num_caps = ARRAY_SIZE(ctrl_caps),
408 .caps = ctrl_caps,
Charles Keepax406abc92015-12-15 11:29:45 +0000409 },
Charles Keepax04d13002015-11-26 14:01:52 +0000410 [WM_ADSP_FW_ASR] = { .file = "asr" },
Charles Keepax7ce42832016-01-21 17:52:59 +0000411 [WM_ADSP_FW_TRACE] = {
412 .file = "trace",
413 .compr_direction = SND_COMPRESS_CAPTURE,
414 .num_caps = ARRAY_SIZE(trace_caps),
415 .caps = trace_caps,
416 },
Charles Keepax04d13002015-11-26 14:01:52 +0000417 [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" },
418 [WM_ADSP_FW_MISC] = { .file = "misc" },
Mark Brown1023dbd2013-01-11 22:58:28 +0000419};
420
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100421struct wm_coeff_ctl_ops {
422 int (*xget)(struct snd_kcontrol *kcontrol,
423 struct snd_ctl_elem_value *ucontrol);
424 int (*xput)(struct snd_kcontrol *kcontrol,
425 struct snd_ctl_elem_value *ucontrol);
426 int (*xinfo)(struct snd_kcontrol *kcontrol,
427 struct snd_ctl_elem_info *uinfo);
428};
429
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100430struct wm_coeff_ctl {
431 const char *name;
Charles Keepax23237362015-04-13 13:28:02 +0100432 const char *fw_name;
Charles Keepax3809f002015-04-13 13:27:54 +0100433 struct wm_adsp_alg_region alg_region;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100434 struct wm_coeff_ctl_ops ops;
Charles Keepax3809f002015-04-13 13:27:54 +0100435 struct wm_adsp *dsp;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100436 unsigned int enabled:1;
437 struct list_head list;
438 void *cache;
Charles Keepax23237362015-04-13 13:28:02 +0100439 unsigned int offset;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100440 size_t len;
Dimitris Papastamos0c2e3f32013-05-28 12:01:50 +0100441 unsigned int set:1;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100442 struct snd_kcontrol *kcontrol;
Charles Keepax9ee78752016-05-02 13:57:36 +0100443 struct soc_bytes_ext bytes_ext;
Charles Keepax26c22a12015-04-20 13:52:45 +0100444 unsigned int flags;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100445};
446
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100447#ifdef CONFIG_DEBUG_FS
448static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s)
449{
450 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
451
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100452 kfree(dsp->wmfw_file_name);
453 dsp->wmfw_file_name = tmp;
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100454}
455
456static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s)
457{
458 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
459
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100460 kfree(dsp->bin_file_name);
461 dsp->bin_file_name = tmp;
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100462}
463
464static void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
465{
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100466 kfree(dsp->wmfw_file_name);
467 kfree(dsp->bin_file_name);
468 dsp->wmfw_file_name = NULL;
469 dsp->bin_file_name = NULL;
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100470}
471
472static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file,
473 char __user *user_buf,
474 size_t count, loff_t *ppos)
475{
476 struct wm_adsp *dsp = file->private_data;
477 ssize_t ret;
478
Charles Keepax078e7182015-12-08 16:08:26 +0000479 mutex_lock(&dsp->pwr_lock);
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100480
481 if (!dsp->wmfw_file_name || !dsp->running)
482 ret = 0;
483 else
484 ret = simple_read_from_buffer(user_buf, count, ppos,
485 dsp->wmfw_file_name,
486 strlen(dsp->wmfw_file_name));
487
Charles Keepax078e7182015-12-08 16:08:26 +0000488 mutex_unlock(&dsp->pwr_lock);
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100489 return ret;
490}
491
492static ssize_t wm_adsp_debugfs_bin_read(struct file *file,
493 char __user *user_buf,
494 size_t count, loff_t *ppos)
495{
496 struct wm_adsp *dsp = file->private_data;
497 ssize_t ret;
498
Charles Keepax078e7182015-12-08 16:08:26 +0000499 mutex_lock(&dsp->pwr_lock);
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100500
501 if (!dsp->bin_file_name || !dsp->running)
502 ret = 0;
503 else
504 ret = simple_read_from_buffer(user_buf, count, ppos,
505 dsp->bin_file_name,
506 strlen(dsp->bin_file_name));
507
Charles Keepax078e7182015-12-08 16:08:26 +0000508 mutex_unlock(&dsp->pwr_lock);
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +0100509 return ret;
510}
511
512static const struct {
513 const char *name;
514 const struct file_operations fops;
515} wm_adsp_debugfs_fops[] = {
516 {
517 .name = "wmfw_file_name",
518 .fops = {
519 .open = simple_open,
520 .read = wm_adsp_debugfs_wmfw_read,
521 },
522 },
523 {
524 .name = "bin_file_name",
525 .fops = {
526 .open = simple_open,
527 .read = wm_adsp_debugfs_bin_read,
528 },
529 },
530};
531
532static void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
533 struct snd_soc_codec *codec)
534{
535 struct dentry *root = NULL;
536 char *root_name;
537 int i;
538
539 if (!codec->component.debugfs_root) {
540 adsp_err(dsp, "No codec debugfs root\n");
541 goto err;
542 }
543
544 root_name = kmalloc(PAGE_SIZE, GFP_KERNEL);
545 if (!root_name)
546 goto err;
547
548 snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num);
549 root = debugfs_create_dir(root_name, codec->component.debugfs_root);
550 kfree(root_name);
551
552 if (!root)
553 goto err;
554
555 if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running))
556 goto err;
557
558 if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id))
559 goto err;
560
561 if (!debugfs_create_x32("fw_version", S_IRUGO, root,
562 &dsp->fw_id_version))
563 goto err;
564
565 for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) {
566 if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name,
567 S_IRUGO, root, dsp,
568 &wm_adsp_debugfs_fops[i].fops))
569 goto err;
570 }
571
572 dsp->debugfs_root = root;
573 return;
574
575err:
576 debugfs_remove_recursive(root);
577 adsp_err(dsp, "Failed to create debugfs\n");
578}
579
580static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
581{
582 wm_adsp_debugfs_clear(dsp);
583 debugfs_remove_recursive(dsp->debugfs_root);
584}
585#else
586static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
587 struct snd_soc_codec *codec)
588{
589}
590
591static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
592{
593}
594
595static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp,
596 const char *s)
597{
598}
599
600static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp,
601 const char *s)
602{
603}
604
605static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
606{
607}
608#endif
609
Mark Brown1023dbd2013-01-11 22:58:28 +0000610static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
611 struct snd_ctl_elem_value *ucontrol)
612{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100613 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Mark Brown1023dbd2013-01-11 22:58:28 +0000614 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
Charles Keepax3809f002015-04-13 13:27:54 +0100615 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
Mark Brown1023dbd2013-01-11 22:58:28 +0000616
Takashi Iwai15c66572016-02-29 18:01:18 +0100617 ucontrol->value.enumerated.item[0] = dsp[e->shift_l].fw;
Mark Brown1023dbd2013-01-11 22:58:28 +0000618
619 return 0;
620}
621
622static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
623 struct snd_ctl_elem_value *ucontrol)
624{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100625 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Mark Brown1023dbd2013-01-11 22:58:28 +0000626 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
Charles Keepax3809f002015-04-13 13:27:54 +0100627 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
Charles Keepaxd27c5e12015-12-08 16:08:28 +0000628 int ret = 0;
Mark Brown1023dbd2013-01-11 22:58:28 +0000629
Takashi Iwai15c66572016-02-29 18:01:18 +0100630 if (ucontrol->value.enumerated.item[0] == dsp[e->shift_l].fw)
Mark Brown1023dbd2013-01-11 22:58:28 +0000631 return 0;
632
Takashi Iwai15c66572016-02-29 18:01:18 +0100633 if (ucontrol->value.enumerated.item[0] >= WM_ADSP_NUM_FW)
Mark Brown1023dbd2013-01-11 22:58:28 +0000634 return -EINVAL;
635
Charles Keepaxd27c5e12015-12-08 16:08:28 +0000636 mutex_lock(&dsp[e->shift_l].pwr_lock);
637
Charles Keepax406abc92015-12-15 11:29:45 +0000638 if (dsp[e->shift_l].running || dsp[e->shift_l].compr)
Charles Keepaxd27c5e12015-12-08 16:08:28 +0000639 ret = -EBUSY;
640 else
Takashi Iwai15c66572016-02-29 18:01:18 +0100641 dsp[e->shift_l].fw = ucontrol->value.enumerated.item[0];
Mark Brown1023dbd2013-01-11 22:58:28 +0000642
Charles Keepaxd27c5e12015-12-08 16:08:28 +0000643 mutex_unlock(&dsp[e->shift_l].pwr_lock);
Mark Brown1023dbd2013-01-11 22:58:28 +0000644
Charles Keepaxd27c5e12015-12-08 16:08:28 +0000645 return ret;
Mark Brown1023dbd2013-01-11 22:58:28 +0000646}
647
648static const struct soc_enum wm_adsp_fw_enum[] = {
649 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
650 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
651 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
652 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
653};
654
Richard Fitzgerald336d0442015-06-18 13:43:19 +0100655const struct snd_kcontrol_new wm_adsp_fw_controls[] = {
Mark Brown1023dbd2013-01-11 22:58:28 +0000656 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
657 wm_adsp_fw_get, wm_adsp_fw_put),
658 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
659 wm_adsp_fw_get, wm_adsp_fw_put),
660 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
661 wm_adsp_fw_get, wm_adsp_fw_put),
Richard Fitzgerald336d0442015-06-18 13:43:19 +0100662 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
663 wm_adsp_fw_get, wm_adsp_fw_put),
Mark Brownb6ed61cf2013-03-29 18:00:24 +0000664};
Richard Fitzgerald336d0442015-06-18 13:43:19 +0100665EXPORT_SYMBOL_GPL(wm_adsp_fw_controls);
Mark Brown2159ad92012-10-11 11:54:02 +0900666
667static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
668 int type)
669{
670 int i;
671
672 for (i = 0; i < dsp->num_mems; i++)
673 if (dsp->mem[i].type == type)
674 return &dsp->mem[i];
675
676 return NULL;
677}
678
Charles Keepax3809f002015-04-13 13:27:54 +0100679static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem,
Mark Brown45b9ee72013-01-08 16:02:06 +0000680 unsigned int offset)
681{
Charles Keepax3809f002015-04-13 13:27:54 +0100682 if (WARN_ON(!mem))
Takashi Iwai6c452bd2013-11-05 18:40:00 +0100683 return offset;
Charles Keepax3809f002015-04-13 13:27:54 +0100684 switch (mem->type) {
Mark Brown45b9ee72013-01-08 16:02:06 +0000685 case WMFW_ADSP1_PM:
Charles Keepax3809f002015-04-13 13:27:54 +0100686 return mem->base + (offset * 3);
Mark Brown45b9ee72013-01-08 16:02:06 +0000687 case WMFW_ADSP1_DM:
Charles Keepax3809f002015-04-13 13:27:54 +0100688 return mem->base + (offset * 2);
Mark Brown45b9ee72013-01-08 16:02:06 +0000689 case WMFW_ADSP2_XM:
Charles Keepax3809f002015-04-13 13:27:54 +0100690 return mem->base + (offset * 2);
Mark Brown45b9ee72013-01-08 16:02:06 +0000691 case WMFW_ADSP2_YM:
Charles Keepax3809f002015-04-13 13:27:54 +0100692 return mem->base + (offset * 2);
Mark Brown45b9ee72013-01-08 16:02:06 +0000693 case WMFW_ADSP1_ZM:
Charles Keepax3809f002015-04-13 13:27:54 +0100694 return mem->base + (offset * 2);
Mark Brown45b9ee72013-01-08 16:02:06 +0000695 default:
Takashi Iwai6c452bd2013-11-05 18:40:00 +0100696 WARN(1, "Unknown memory region type");
Mark Brown45b9ee72013-01-08 16:02:06 +0000697 return offset;
698 }
699}
700
Richard Fitzgerald10337b02015-05-29 10:23:07 +0100701static void wm_adsp2_show_fw_status(struct wm_adsp *dsp)
702{
703 u16 scratch[4];
704 int ret;
705
706 ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0,
707 scratch, sizeof(scratch));
708 if (ret) {
709 adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret);
710 return;
711 }
712
713 adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
714 be16_to_cpu(scratch[0]),
715 be16_to_cpu(scratch[1]),
716 be16_to_cpu(scratch[2]),
717 be16_to_cpu(scratch[3]));
718}
719
Charles Keepax9ee78752016-05-02 13:57:36 +0100720static inline struct wm_coeff_ctl *bytes_ext_to_ctl(struct soc_bytes_ext *ext)
721{
722 return container_of(ext, struct wm_coeff_ctl, bytes_ext);
723}
724
Charles Keepax7585a5b2015-12-08 16:08:25 +0000725static int wm_coeff_info(struct snd_kcontrol *kctl,
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100726 struct snd_ctl_elem_info *uinfo)
727{
Charles Keepax9ee78752016-05-02 13:57:36 +0100728 struct soc_bytes_ext *bytes_ext =
729 (struct soc_bytes_ext *)kctl->private_value;
730 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100731
732 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
733 uinfo->count = ctl->len;
734 return 0;
735}
736
Charles Keepaxc9f8dd72015-04-13 13:27:58 +0100737static int wm_coeff_write_control(struct wm_coeff_ctl *ctl,
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100738 const void *buf, size_t len)
739{
Charles Keepax3809f002015-04-13 13:27:54 +0100740 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100741 const struct wm_adsp_region *mem;
Charles Keepax3809f002015-04-13 13:27:54 +0100742 struct wm_adsp *dsp = ctl->dsp;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100743 void *scratch;
744 int ret;
745 unsigned int reg;
746
Charles Keepax3809f002015-04-13 13:27:54 +0100747 mem = wm_adsp_find_region(dsp, alg_region->type);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100748 if (!mem) {
Charles Keepax3809f002015-04-13 13:27:54 +0100749 adsp_err(dsp, "No base for region %x\n",
750 alg_region->type);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100751 return -EINVAL;
752 }
753
Charles Keepax23237362015-04-13 13:28:02 +0100754 reg = ctl->alg_region.base + ctl->offset;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100755 reg = wm_adsp_region_to_reg(mem, reg);
756
Charles Keepax4f8ea6d2016-02-19 14:44:44 +0000757 scratch = kmemdup(buf, len, GFP_KERNEL | GFP_DMA);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100758 if (!scratch)
759 return -ENOMEM;
760
Charles Keepax3809f002015-04-13 13:27:54 +0100761 ret = regmap_raw_write(dsp->regmap, reg, scratch,
Charles Keepax4f8ea6d2016-02-19 14:44:44 +0000762 len);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100763 if (ret) {
Charles Keepax3809f002015-04-13 13:27:54 +0100764 adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n",
Charles Keepax4f8ea6d2016-02-19 14:44:44 +0000765 len, reg, ret);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100766 kfree(scratch);
767 return ret;
768 }
Charles Keepax4f8ea6d2016-02-19 14:44:44 +0000769 adsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100770
771 kfree(scratch);
772
773 return 0;
774}
775
Charles Keepax7585a5b2015-12-08 16:08:25 +0000776static int wm_coeff_put(struct snd_kcontrol *kctl,
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100777 struct snd_ctl_elem_value *ucontrol)
778{
Charles Keepax9ee78752016-05-02 13:57:36 +0100779 struct soc_bytes_ext *bytes_ext =
780 (struct soc_bytes_ext *)kctl->private_value;
781 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100782 char *p = ucontrol->value.bytes.data;
Charles Keepax168d10e2015-12-08 16:08:27 +0000783 int ret = 0;
784
785 mutex_lock(&ctl->dsp->pwr_lock);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100786
787 memcpy(ctl->cache, p, ctl->len);
788
Nikesh Oswal65d17a92015-02-16 15:25:48 +0000789 ctl->set = 1;
Charles Keepax168d10e2015-12-08 16:08:27 +0000790 if (ctl->enabled)
791 ret = wm_coeff_write_control(ctl, p, ctl->len);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100792
Charles Keepax168d10e2015-12-08 16:08:27 +0000793 mutex_unlock(&ctl->dsp->pwr_lock);
794
795 return ret;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100796}
797
Charles Keepax9ee78752016-05-02 13:57:36 +0100798static int wm_coeff_tlv_put(struct snd_kcontrol *kctl,
799 const unsigned int __user *bytes, unsigned int size)
800{
801 struct soc_bytes_ext *bytes_ext =
802 (struct soc_bytes_ext *)kctl->private_value;
803 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
804 int ret = 0;
805
806 mutex_lock(&ctl->dsp->pwr_lock);
807
808 if (copy_from_user(ctl->cache, bytes, size)) {
809 ret = -EFAULT;
810 } else {
811 ctl->set = 1;
812 if (ctl->enabled)
813 ret = wm_coeff_write_control(ctl, ctl->cache, size);
814 }
815
816 mutex_unlock(&ctl->dsp->pwr_lock);
817
818 return ret;
819}
820
Charles Keepaxc9f8dd72015-04-13 13:27:58 +0100821static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100822 void *buf, size_t len)
823{
Charles Keepax3809f002015-04-13 13:27:54 +0100824 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100825 const struct wm_adsp_region *mem;
Charles Keepax3809f002015-04-13 13:27:54 +0100826 struct wm_adsp *dsp = ctl->dsp;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100827 void *scratch;
828 int ret;
829 unsigned int reg;
830
Charles Keepax3809f002015-04-13 13:27:54 +0100831 mem = wm_adsp_find_region(dsp, alg_region->type);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100832 if (!mem) {
Charles Keepax3809f002015-04-13 13:27:54 +0100833 adsp_err(dsp, "No base for region %x\n",
834 alg_region->type);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100835 return -EINVAL;
836 }
837
Charles Keepax23237362015-04-13 13:28:02 +0100838 reg = ctl->alg_region.base + ctl->offset;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100839 reg = wm_adsp_region_to_reg(mem, reg);
840
Charles Keepax4f8ea6d2016-02-19 14:44:44 +0000841 scratch = kmalloc(len, GFP_KERNEL | GFP_DMA);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100842 if (!scratch)
843 return -ENOMEM;
844
Charles Keepax4f8ea6d2016-02-19 14:44:44 +0000845 ret = regmap_raw_read(dsp->regmap, reg, scratch, len);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100846 if (ret) {
Charles Keepax3809f002015-04-13 13:27:54 +0100847 adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n",
Charles Keepax5602a642016-03-10 10:46:07 +0000848 len, reg, ret);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100849 kfree(scratch);
850 return ret;
851 }
Charles Keepax4f8ea6d2016-02-19 14:44:44 +0000852 adsp_dbg(dsp, "Read %zu bytes from %x\n", len, reg);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100853
Charles Keepax4f8ea6d2016-02-19 14:44:44 +0000854 memcpy(buf, scratch, len);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100855 kfree(scratch);
856
857 return 0;
858}
859
Charles Keepax7585a5b2015-12-08 16:08:25 +0000860static int wm_coeff_get(struct snd_kcontrol *kctl,
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100861 struct snd_ctl_elem_value *ucontrol)
862{
Charles Keepax9ee78752016-05-02 13:57:36 +0100863 struct soc_bytes_ext *bytes_ext =
864 (struct soc_bytes_ext *)kctl->private_value;
865 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100866 char *p = ucontrol->value.bytes.data;
Charles Keepax168d10e2015-12-08 16:08:27 +0000867 int ret = 0;
868
869 mutex_lock(&ctl->dsp->pwr_lock);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100870
Charles Keepax26c22a12015-04-20 13:52:45 +0100871 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
872 if (ctl->enabled)
Charles Keepax168d10e2015-12-08 16:08:27 +0000873 ret = wm_coeff_read_control(ctl, p, ctl->len);
Charles Keepax26c22a12015-04-20 13:52:45 +0100874 else
Charles Keepax168d10e2015-12-08 16:08:27 +0000875 ret = -EPERM;
876 } else {
Charles Keepaxbc1765d2015-12-17 10:05:59 +0000877 if (!ctl->flags && ctl->enabled)
878 ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len);
879
Charles Keepax168d10e2015-12-08 16:08:27 +0000880 memcpy(p, ctl->cache, ctl->len);
Charles Keepax26c22a12015-04-20 13:52:45 +0100881 }
882
Charles Keepax168d10e2015-12-08 16:08:27 +0000883 mutex_unlock(&ctl->dsp->pwr_lock);
Charles Keepax26c22a12015-04-20 13:52:45 +0100884
Charles Keepax168d10e2015-12-08 16:08:27 +0000885 return ret;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100886}
887
Charles Keepax9ee78752016-05-02 13:57:36 +0100888static int wm_coeff_tlv_get(struct snd_kcontrol *kctl,
889 unsigned int __user *bytes, unsigned int size)
890{
891 struct soc_bytes_ext *bytes_ext =
892 (struct soc_bytes_ext *)kctl->private_value;
893 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
894 int ret = 0;
895
896 mutex_lock(&ctl->dsp->pwr_lock);
897
898 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
899 if (ctl->enabled)
900 ret = wm_coeff_read_control(ctl, ctl->cache, size);
901 else
902 ret = -EPERM;
903 } else {
904 if (!ctl->flags && ctl->enabled)
905 ret = wm_coeff_read_control(ctl, ctl->cache, size);
906 }
907
908 if (!ret && copy_to_user(bytes, ctl->cache, size))
909 ret = -EFAULT;
910
911 mutex_unlock(&ctl->dsp->pwr_lock);
912
913 return ret;
914}
915
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100916struct wmfw_ctl_work {
Charles Keepax3809f002015-04-13 13:27:54 +0100917 struct wm_adsp *dsp;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100918 struct wm_coeff_ctl *ctl;
919 struct work_struct work;
920};
921
Charles Keepax9ee78752016-05-02 13:57:36 +0100922static unsigned int wmfw_convert_flags(unsigned int in, unsigned int len)
923{
924 unsigned int out, rd, wr, vol;
925
926 if (len > ADSP_MAX_STD_CTRL_SIZE) {
927 rd = SNDRV_CTL_ELEM_ACCESS_TLV_READ;
928 wr = SNDRV_CTL_ELEM_ACCESS_TLV_WRITE;
929 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
930
931 out = SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
932 } else {
933 rd = SNDRV_CTL_ELEM_ACCESS_READ;
934 wr = SNDRV_CTL_ELEM_ACCESS_WRITE;
935 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
936
937 out = 0;
938 }
939
940 if (in) {
941 if (in & WMFW_CTL_FLAG_READABLE)
942 out |= rd;
943 if (in & WMFW_CTL_FLAG_WRITEABLE)
944 out |= wr;
945 if (in & WMFW_CTL_FLAG_VOLATILE)
946 out |= vol;
947 } else {
948 out |= rd | wr | vol;
949 }
950
951 return out;
952}
953
Charles Keepax3809f002015-04-13 13:27:54 +0100954static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100955{
956 struct snd_kcontrol_new *kcontrol;
957 int ret;
958
Dimitris Papastamos92bb4c32013-08-01 11:11:28 +0100959 if (!ctl || !ctl->name)
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100960 return -EINVAL;
961
962 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
963 if (!kcontrol)
964 return -ENOMEM;
965 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
966
967 kcontrol->name = ctl->name;
968 kcontrol->info = wm_coeff_info;
969 kcontrol->get = wm_coeff_get;
970 kcontrol->put = wm_coeff_put;
Charles Keepax9ee78752016-05-02 13:57:36 +0100971 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
972 kcontrol->tlv.c = snd_soc_bytes_tlv_callback;
973 kcontrol->private_value = (unsigned long)&ctl->bytes_ext;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100974
Charles Keepax9ee78752016-05-02 13:57:36 +0100975 ctl->bytes_ext.max = ctl->len;
976 ctl->bytes_ext.get = wm_coeff_tlv_get;
977 ctl->bytes_ext.put = wm_coeff_tlv_put;
978
979 kcontrol->access = wmfw_convert_flags(ctl->flags, ctl->len);
Charles Keepax26c22a12015-04-20 13:52:45 +0100980
Charles Keepax7d00cd92016-02-19 14:44:43 +0000981 ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100982 if (ret < 0)
983 goto err_kcontrol;
984
985 kfree(kcontrol);
986
Charles Keepax7d00cd92016-02-19 14:44:43 +0000987 ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card, ctl->name);
Dimitris Papastamos81ad93e2013-07-29 13:51:59 +0100988
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +0100989 return 0;
990
991err_kcontrol:
992 kfree(kcontrol);
993 return ret;
994}
995
Charles Keepaxb21acc12015-04-13 13:28:01 +0100996static int wm_coeff_init_control_caches(struct wm_adsp *dsp)
997{
998 struct wm_coeff_ctl *ctl;
999 int ret;
1000
1001 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1002 if (!ctl->enabled || ctl->set)
1003 continue;
Charles Keepax26c22a12015-04-20 13:52:45 +01001004 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
1005 continue;
1006
Charles Keepax7d00cd92016-02-19 14:44:43 +00001007 ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len);
Charles Keepaxb21acc12015-04-13 13:28:01 +01001008 if (ret < 0)
1009 return ret;
1010 }
1011
1012 return 0;
1013}
1014
1015static int wm_coeff_sync_controls(struct wm_adsp *dsp)
1016{
1017 struct wm_coeff_ctl *ctl;
1018 int ret;
1019
1020 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1021 if (!ctl->enabled)
1022 continue;
Charles Keepax26c22a12015-04-20 13:52:45 +01001023 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) {
Charles Keepax7d00cd92016-02-19 14:44:43 +00001024 ret = wm_coeff_write_control(ctl, ctl->cache, ctl->len);
Charles Keepaxb21acc12015-04-13 13:28:01 +01001025 if (ret < 0)
1026 return ret;
1027 }
1028 }
1029
1030 return 0;
1031}
1032
1033static void wm_adsp_ctl_work(struct work_struct *work)
1034{
1035 struct wmfw_ctl_work *ctl_work = container_of(work,
1036 struct wmfw_ctl_work,
1037 work);
1038
1039 wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl);
1040 kfree(ctl_work);
1041}
1042
Richard Fitzgerald66225e92016-04-27 14:58:27 +01001043static void wm_adsp_free_ctl_blk(struct wm_coeff_ctl *ctl)
1044{
1045 kfree(ctl->cache);
1046 kfree(ctl->name);
1047 kfree(ctl);
1048}
1049
Charles Keepaxb21acc12015-04-13 13:28:01 +01001050static int wm_adsp_create_control(struct wm_adsp *dsp,
1051 const struct wm_adsp_alg_region *alg_region,
Charles Keepax23237362015-04-13 13:28:02 +01001052 unsigned int offset, unsigned int len,
Charles Keepax26c22a12015-04-20 13:52:45 +01001053 const char *subname, unsigned int subname_len,
1054 unsigned int flags)
Charles Keepaxb21acc12015-04-13 13:28:01 +01001055{
1056 struct wm_coeff_ctl *ctl;
1057 struct wmfw_ctl_work *ctl_work;
1058 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
1059 char *region_name;
1060 int ret;
1061
Charles Keepax26c22a12015-04-20 13:52:45 +01001062 if (flags & WMFW_CTL_FLAG_SYS)
1063 return 0;
1064
Charles Keepaxb21acc12015-04-13 13:28:01 +01001065 switch (alg_region->type) {
1066 case WMFW_ADSP1_PM:
1067 region_name = "PM";
1068 break;
1069 case WMFW_ADSP1_DM:
1070 region_name = "DM";
1071 break;
1072 case WMFW_ADSP2_XM:
1073 region_name = "XM";
1074 break;
1075 case WMFW_ADSP2_YM:
1076 region_name = "YM";
1077 break;
1078 case WMFW_ADSP1_ZM:
1079 region_name = "ZM";
1080 break;
1081 default:
Charles Keepax23237362015-04-13 13:28:02 +01001082 adsp_err(dsp, "Unknown region type: %d\n", alg_region->type);
Charles Keepaxb21acc12015-04-13 13:28:01 +01001083 return -EINVAL;
1084 }
1085
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001086 switch (dsp->fw_ver) {
1087 case 0:
1088 case 1:
1089 snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x",
1090 dsp->num, region_name, alg_region->alg);
1091 break;
1092 default:
1093 ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
1094 "DSP%d%c %.12s %x", dsp->num, *region_name,
1095 wm_adsp_fw_text[dsp->fw], alg_region->alg);
1096
1097 /* Truncate the subname from the start if it is too long */
1098 if (subname) {
1099 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
1100 int skip = 0;
1101
1102 if (subname_len > avail)
1103 skip = subname_len - avail;
1104
1105 snprintf(name + ret,
1106 SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s",
1107 subname_len - skip, subname + skip);
1108 }
1109 break;
1110 }
Charles Keepaxb21acc12015-04-13 13:28:01 +01001111
Charles Keepax7585a5b2015-12-08 16:08:25 +00001112 list_for_each_entry(ctl, &dsp->ctl_list, list) {
Charles Keepaxb21acc12015-04-13 13:28:01 +01001113 if (!strcmp(ctl->name, name)) {
1114 if (!ctl->enabled)
1115 ctl->enabled = 1;
1116 return 0;
1117 }
1118 }
1119
1120 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
1121 if (!ctl)
1122 return -ENOMEM;
Charles Keepax23237362015-04-13 13:28:02 +01001123 ctl->fw_name = wm_adsp_fw_text[dsp->fw];
Charles Keepaxb21acc12015-04-13 13:28:01 +01001124 ctl->alg_region = *alg_region;
1125 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
1126 if (!ctl->name) {
1127 ret = -ENOMEM;
1128 goto err_ctl;
1129 }
1130 ctl->enabled = 1;
1131 ctl->set = 0;
1132 ctl->ops.xget = wm_coeff_get;
1133 ctl->ops.xput = wm_coeff_put;
1134 ctl->dsp = dsp;
1135
Charles Keepax26c22a12015-04-20 13:52:45 +01001136 ctl->flags = flags;
Charles Keepax23237362015-04-13 13:28:02 +01001137 ctl->offset = offset;
Charles Keepaxb21acc12015-04-13 13:28:01 +01001138 ctl->len = len;
1139 ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
1140 if (!ctl->cache) {
1141 ret = -ENOMEM;
1142 goto err_ctl_name;
1143 }
1144
Charles Keepax23237362015-04-13 13:28:02 +01001145 list_add(&ctl->list, &dsp->ctl_list);
1146
Charles Keepaxb21acc12015-04-13 13:28:01 +01001147 ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
1148 if (!ctl_work) {
1149 ret = -ENOMEM;
1150 goto err_ctl_cache;
1151 }
1152
1153 ctl_work->dsp = dsp;
1154 ctl_work->ctl = ctl;
1155 INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
1156 schedule_work(&ctl_work->work);
1157
1158 return 0;
1159
1160err_ctl_cache:
1161 kfree(ctl->cache);
1162err_ctl_name:
1163 kfree(ctl->name);
1164err_ctl:
1165 kfree(ctl);
1166
1167 return ret;
1168}
1169
Charles Keepax23237362015-04-13 13:28:02 +01001170struct wm_coeff_parsed_alg {
1171 int id;
1172 const u8 *name;
1173 int name_len;
1174 int ncoeff;
1175};
1176
1177struct wm_coeff_parsed_coeff {
1178 int offset;
1179 int mem_type;
1180 const u8 *name;
1181 int name_len;
1182 int ctl_type;
1183 int flags;
1184 int len;
1185};
1186
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001187static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str)
1188{
1189 int length;
1190
1191 switch (bytes) {
1192 case 1:
1193 length = **pos;
1194 break;
1195 case 2:
Charles Keepax8299ee82015-04-20 13:52:44 +01001196 length = le16_to_cpu(*((__le16 *)*pos));
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001197 break;
1198 default:
1199 return 0;
1200 }
1201
1202 if (str)
1203 *str = *pos + bytes;
1204
1205 *pos += ((length + bytes) + 3) & ~0x03;
1206
1207 return length;
1208}
1209
1210static int wm_coeff_parse_int(int bytes, const u8 **pos)
1211{
1212 int val = 0;
1213
1214 switch (bytes) {
1215 case 2:
Charles Keepax8299ee82015-04-20 13:52:44 +01001216 val = le16_to_cpu(*((__le16 *)*pos));
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001217 break;
1218 case 4:
Charles Keepax8299ee82015-04-20 13:52:44 +01001219 val = le32_to_cpu(*((__le32 *)*pos));
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001220 break;
1221 default:
1222 break;
1223 }
1224
1225 *pos += bytes;
1226
1227 return val;
1228}
1229
Charles Keepax23237362015-04-13 13:28:02 +01001230static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data,
1231 struct wm_coeff_parsed_alg *blk)
1232{
1233 const struct wmfw_adsp_alg_data *raw;
1234
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001235 switch (dsp->fw_ver) {
1236 case 0:
1237 case 1:
1238 raw = (const struct wmfw_adsp_alg_data *)*data;
1239 *data = raw->data;
Charles Keepax23237362015-04-13 13:28:02 +01001240
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001241 blk->id = le32_to_cpu(raw->id);
1242 blk->name = raw->name;
1243 blk->name_len = strlen(raw->name);
1244 blk->ncoeff = le32_to_cpu(raw->ncoeff);
1245 break;
1246 default:
1247 blk->id = wm_coeff_parse_int(sizeof(raw->id), data);
1248 blk->name_len = wm_coeff_parse_string(sizeof(u8), data,
1249 &blk->name);
1250 wm_coeff_parse_string(sizeof(u16), data, NULL);
1251 blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data);
1252 break;
1253 }
Charles Keepax23237362015-04-13 13:28:02 +01001254
1255 adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id);
1256 adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name);
1257 adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff);
1258}
1259
1260static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data,
1261 struct wm_coeff_parsed_coeff *blk)
1262{
1263 const struct wmfw_adsp_coeff_data *raw;
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001264 const u8 *tmp;
1265 int length;
Charles Keepax23237362015-04-13 13:28:02 +01001266
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001267 switch (dsp->fw_ver) {
1268 case 0:
1269 case 1:
1270 raw = (const struct wmfw_adsp_coeff_data *)*data;
1271 *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size);
Charles Keepax23237362015-04-13 13:28:02 +01001272
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001273 blk->offset = le16_to_cpu(raw->hdr.offset);
1274 blk->mem_type = le16_to_cpu(raw->hdr.type);
1275 blk->name = raw->name;
1276 blk->name_len = strlen(raw->name);
1277 blk->ctl_type = le16_to_cpu(raw->ctl_type);
1278 blk->flags = le16_to_cpu(raw->flags);
1279 blk->len = le32_to_cpu(raw->len);
1280 break;
1281 default:
1282 tmp = *data;
1283 blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp);
1284 blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp);
1285 length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp);
1286 blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp,
1287 &blk->name);
1288 wm_coeff_parse_string(sizeof(u8), &tmp, NULL);
1289 wm_coeff_parse_string(sizeof(u16), &tmp, NULL);
1290 blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp);
1291 blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp);
1292 blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp);
1293
1294 *data = *data + sizeof(raw->hdr) + length;
1295 break;
1296 }
Charles Keepax23237362015-04-13 13:28:02 +01001297
1298 adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type);
1299 adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset);
1300 adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name);
1301 adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags);
1302 adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type);
1303 adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len);
1304}
1305
1306static int wm_adsp_parse_coeff(struct wm_adsp *dsp,
1307 const struct wmfw_region *region)
1308{
1309 struct wm_adsp_alg_region alg_region = {};
1310 struct wm_coeff_parsed_alg alg_blk;
1311 struct wm_coeff_parsed_coeff coeff_blk;
1312 const u8 *data = region->data;
1313 int i, ret;
1314
1315 wm_coeff_parse_alg(dsp, &data, &alg_blk);
1316 for (i = 0; i < alg_blk.ncoeff; i++) {
1317 wm_coeff_parse_coeff(dsp, &data, &coeff_blk);
1318
1319 switch (coeff_blk.ctl_type) {
1320 case SNDRV_CTL_ELEM_TYPE_BYTES:
1321 break;
1322 default:
1323 adsp_err(dsp, "Unknown control type: %d\n",
1324 coeff_blk.ctl_type);
1325 return -EINVAL;
1326 }
1327
1328 alg_region.type = coeff_blk.mem_type;
1329 alg_region.alg = alg_blk.id;
1330
1331 ret = wm_adsp_create_control(dsp, &alg_region,
1332 coeff_blk.offset,
1333 coeff_blk.len,
1334 coeff_blk.name,
Charles Keepax26c22a12015-04-20 13:52:45 +01001335 coeff_blk.name_len,
1336 coeff_blk.flags);
Charles Keepax23237362015-04-13 13:28:02 +01001337 if (ret < 0)
1338 adsp_err(dsp, "Failed to create control: %.*s, %d\n",
1339 coeff_blk.name_len, coeff_blk.name, ret);
1340 }
1341
1342 return 0;
1343}
1344
Mark Brown2159ad92012-10-11 11:54:02 +09001345static int wm_adsp_load(struct wm_adsp *dsp)
1346{
Mark Browncf17c832013-01-30 14:37:23 +08001347 LIST_HEAD(buf_list);
Mark Brown2159ad92012-10-11 11:54:02 +09001348 const struct firmware *firmware;
1349 struct regmap *regmap = dsp->regmap;
1350 unsigned int pos = 0;
1351 const struct wmfw_header *header;
1352 const struct wmfw_adsp1_sizes *adsp1_sizes;
1353 const struct wmfw_adsp2_sizes *adsp2_sizes;
1354 const struct wmfw_footer *footer;
1355 const struct wmfw_region *region;
1356 const struct wm_adsp_region *mem;
1357 const char *region_name;
1358 char *file, *text;
Mark Browncf17c832013-01-30 14:37:23 +08001359 struct wm_adsp_buf *buf;
Mark Brown2159ad92012-10-11 11:54:02 +09001360 unsigned int reg;
1361 int regions = 0;
1362 int ret, offset, type, sizes;
1363
1364 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1365 if (file == NULL)
1366 return -ENOMEM;
1367
Mark Brown1023dbd2013-01-11 22:58:28 +00001368 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,
1369 wm_adsp_fw[dsp->fw].file);
Mark Brown2159ad92012-10-11 11:54:02 +09001370 file[PAGE_SIZE - 1] = '\0';
1371
1372 ret = request_firmware(&firmware, file, dsp->dev);
1373 if (ret != 0) {
1374 adsp_err(dsp, "Failed to request '%s'\n", file);
1375 goto out;
1376 }
1377 ret = -EINVAL;
1378
1379 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1380 if (pos >= firmware->size) {
1381 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1382 file, firmware->size);
1383 goto out_fw;
1384 }
1385
Charles Keepax7585a5b2015-12-08 16:08:25 +00001386 header = (void *)&firmware->data[0];
Mark Brown2159ad92012-10-11 11:54:02 +09001387
1388 if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
1389 adsp_err(dsp, "%s: invalid magic\n", file);
1390 goto out_fw;
1391 }
1392
Charles Keepax23237362015-04-13 13:28:02 +01001393 switch (header->ver) {
1394 case 0:
Charles Keepaxc61e59f2015-04-13 13:28:05 +01001395 adsp_warn(dsp, "%s: Depreciated file format %d\n",
1396 file, header->ver);
1397 break;
Charles Keepax23237362015-04-13 13:28:02 +01001398 case 1:
Charles Keepaxcb5b57a2015-04-13 13:28:04 +01001399 case 2:
Charles Keepax23237362015-04-13 13:28:02 +01001400 break;
1401 default:
Mark Brown2159ad92012-10-11 11:54:02 +09001402 adsp_err(dsp, "%s: unknown file format %d\n",
1403 file, header->ver);
1404 goto out_fw;
1405 }
Charles Keepax23237362015-04-13 13:28:02 +01001406
Dimitris Papastamos36269922013-11-01 15:56:57 +00001407 adsp_info(dsp, "Firmware version: %d\n", header->ver);
Charles Keepax23237362015-04-13 13:28:02 +01001408 dsp->fw_ver = header->ver;
Mark Brown2159ad92012-10-11 11:54:02 +09001409
1410 if (header->core != dsp->type) {
1411 adsp_err(dsp, "%s: invalid core %d != %d\n",
1412 file, header->core, dsp->type);
1413 goto out_fw;
1414 }
1415
1416 switch (dsp->type) {
1417 case WMFW_ADSP1:
1418 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1419 adsp1_sizes = (void *)&(header[1]);
1420 footer = (void *)&(adsp1_sizes[1]);
1421 sizes = sizeof(*adsp1_sizes);
1422
1423 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
1424 file, le32_to_cpu(adsp1_sizes->dm),
1425 le32_to_cpu(adsp1_sizes->pm),
1426 le32_to_cpu(adsp1_sizes->zm));
1427 break;
1428
1429 case WMFW_ADSP2:
1430 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
1431 adsp2_sizes = (void *)&(header[1]);
1432 footer = (void *)&(adsp2_sizes[1]);
1433 sizes = sizeof(*adsp2_sizes);
1434
1435 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
1436 file, le32_to_cpu(adsp2_sizes->xm),
1437 le32_to_cpu(adsp2_sizes->ym),
1438 le32_to_cpu(adsp2_sizes->pm),
1439 le32_to_cpu(adsp2_sizes->zm));
1440 break;
1441
1442 default:
Takashi Iwai6c452bd2013-11-05 18:40:00 +01001443 WARN(1, "Unknown DSP type");
Mark Brown2159ad92012-10-11 11:54:02 +09001444 goto out_fw;
1445 }
1446
1447 if (le32_to_cpu(header->len) != sizeof(*header) +
1448 sizes + sizeof(*footer)) {
1449 adsp_err(dsp, "%s: unexpected header length %d\n",
1450 file, le32_to_cpu(header->len));
1451 goto out_fw;
1452 }
1453
1454 adsp_dbg(dsp, "%s: timestamp %llu\n", file,
1455 le64_to_cpu(footer->timestamp));
1456
1457 while (pos < firmware->size &&
1458 pos - firmware->size > sizeof(*region)) {
1459 region = (void *)&(firmware->data[pos]);
1460 region_name = "Unknown";
1461 reg = 0;
1462 text = NULL;
1463 offset = le32_to_cpu(region->offset) & 0xffffff;
1464 type = be32_to_cpu(region->type) & 0xff;
1465 mem = wm_adsp_find_region(dsp, type);
Charles Keepax7585a5b2015-12-08 16:08:25 +00001466
Mark Brown2159ad92012-10-11 11:54:02 +09001467 switch (type) {
1468 case WMFW_NAME_TEXT:
1469 region_name = "Firmware name";
1470 text = kzalloc(le32_to_cpu(region->len) + 1,
1471 GFP_KERNEL);
1472 break;
Charles Keepax23237362015-04-13 13:28:02 +01001473 case WMFW_ALGORITHM_DATA:
1474 region_name = "Algorithm";
1475 ret = wm_adsp_parse_coeff(dsp, region);
1476 if (ret != 0)
1477 goto out_fw;
1478 break;
Mark Brown2159ad92012-10-11 11:54:02 +09001479 case WMFW_INFO_TEXT:
1480 region_name = "Information";
1481 text = kzalloc(le32_to_cpu(region->len) + 1,
1482 GFP_KERNEL);
1483 break;
1484 case WMFW_ABSOLUTE:
1485 region_name = "Absolute";
1486 reg = offset;
1487 break;
1488 case WMFW_ADSP1_PM:
Mark Brown2159ad92012-10-11 11:54:02 +09001489 region_name = "PM";
Mark Brown45b9ee72013-01-08 16:02:06 +00001490 reg = wm_adsp_region_to_reg(mem, offset);
Mark Brown2159ad92012-10-11 11:54:02 +09001491 break;
1492 case WMFW_ADSP1_DM:
Mark Brown2159ad92012-10-11 11:54:02 +09001493 region_name = "DM";
Mark Brown45b9ee72013-01-08 16:02:06 +00001494 reg = wm_adsp_region_to_reg(mem, offset);
Mark Brown2159ad92012-10-11 11:54:02 +09001495 break;
1496 case WMFW_ADSP2_XM:
Mark Brown2159ad92012-10-11 11:54:02 +09001497 region_name = "XM";
Mark Brown45b9ee72013-01-08 16:02:06 +00001498 reg = wm_adsp_region_to_reg(mem, offset);
Mark Brown2159ad92012-10-11 11:54:02 +09001499 break;
1500 case WMFW_ADSP2_YM:
Mark Brown2159ad92012-10-11 11:54:02 +09001501 region_name = "YM";
Mark Brown45b9ee72013-01-08 16:02:06 +00001502 reg = wm_adsp_region_to_reg(mem, offset);
Mark Brown2159ad92012-10-11 11:54:02 +09001503 break;
1504 case WMFW_ADSP1_ZM:
Mark Brown2159ad92012-10-11 11:54:02 +09001505 region_name = "ZM";
Mark Brown45b9ee72013-01-08 16:02:06 +00001506 reg = wm_adsp_region_to_reg(mem, offset);
Mark Brown2159ad92012-10-11 11:54:02 +09001507 break;
1508 default:
1509 adsp_warn(dsp,
1510 "%s.%d: Unknown region type %x at %d(%x)\n",
1511 file, regions, type, pos, pos);
1512 break;
1513 }
1514
1515 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
1516 regions, le32_to_cpu(region->len), offset,
1517 region_name);
1518
1519 if (text) {
1520 memcpy(text, region->data, le32_to_cpu(region->len));
1521 adsp_info(dsp, "%s: %s\n", file, text);
1522 kfree(text);
1523 }
1524
1525 if (reg) {
Charles Keepaxcdcd7f72014-11-14 15:40:45 +00001526 buf = wm_adsp_buf_alloc(region->data,
1527 le32_to_cpu(region->len),
1528 &buf_list);
1529 if (!buf) {
1530 adsp_err(dsp, "Out of memory\n");
1531 ret = -ENOMEM;
1532 goto out_fw;
1533 }
Mark Browna76fefa2013-01-07 19:03:17 +00001534
Charles Keepaxcdcd7f72014-11-14 15:40:45 +00001535 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1536 le32_to_cpu(region->len));
1537 if (ret != 0) {
1538 adsp_err(dsp,
1539 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1540 file, regions,
1541 le32_to_cpu(region->len), offset,
1542 region_name, ret);
1543 goto out_fw;
Mark Brown2159ad92012-10-11 11:54:02 +09001544 }
1545 }
1546
1547 pos += le32_to_cpu(region->len) + sizeof(*region);
1548 regions++;
1549 }
Mark Browncf17c832013-01-30 14:37:23 +08001550
1551 ret = regmap_async_complete(regmap);
1552 if (ret != 0) {
1553 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1554 goto out_fw;
1555 }
1556
Mark Brown2159ad92012-10-11 11:54:02 +09001557 if (pos > firmware->size)
1558 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1559 file, regions, pos - firmware->size);
1560
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +01001561 wm_adsp_debugfs_save_wmfwname(dsp, file);
1562
Mark Brown2159ad92012-10-11 11:54:02 +09001563out_fw:
Mark Browncf17c832013-01-30 14:37:23 +08001564 regmap_async_complete(regmap);
1565 wm_adsp_buf_free(&buf_list);
Mark Brown2159ad92012-10-11 11:54:02 +09001566 release_firmware(firmware);
1567out:
1568 kfree(file);
1569
1570 return ret;
1571}
1572
Charles Keepax23237362015-04-13 13:28:02 +01001573static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp,
1574 const struct wm_adsp_alg_region *alg_region)
1575{
1576 struct wm_coeff_ctl *ctl;
1577
1578 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1579 if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] &&
1580 alg_region->alg == ctl->alg_region.alg &&
1581 alg_region->type == ctl->alg_region.type) {
1582 ctl->alg_region.base = alg_region->base;
1583 }
1584 }
1585}
1586
Charles Keepax3809f002015-04-13 13:27:54 +01001587static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs,
Charles Keepaxb618a1852015-04-13 13:27:53 +01001588 unsigned int pos, unsigned int len)
Mark Browndb405172012-10-26 19:30:40 +01001589{
Charles Keepaxb618a1852015-04-13 13:27:53 +01001590 void *alg;
1591 int ret;
Mark Browndb405172012-10-26 19:30:40 +01001592 __be32 val;
Mark Browndb405172012-10-26 19:30:40 +01001593
Charles Keepax3809f002015-04-13 13:27:54 +01001594 if (n_algs == 0) {
Mark Browndb405172012-10-26 19:30:40 +01001595 adsp_err(dsp, "No algorithms\n");
Charles Keepaxb618a1852015-04-13 13:27:53 +01001596 return ERR_PTR(-EINVAL);
Mark Browndb405172012-10-26 19:30:40 +01001597 }
1598
Charles Keepax3809f002015-04-13 13:27:54 +01001599 if (n_algs > 1024) {
1600 adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001601 return ERR_PTR(-EINVAL);
Mark Brownd62f4bc2012-12-19 14:00:30 +00001602 }
1603
Mark Browndb405172012-10-26 19:30:40 +01001604 /* Read the terminator first to validate the length */
Charles Keepaxb618a1852015-04-13 13:27:53 +01001605 ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val));
Mark Browndb405172012-10-26 19:30:40 +01001606 if (ret != 0) {
1607 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1608 ret);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001609 return ERR_PTR(ret);
Mark Browndb405172012-10-26 19:30:40 +01001610 }
1611
1612 if (be32_to_cpu(val) != 0xbedead)
1613 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
Charles Keepaxb618a1852015-04-13 13:27:53 +01001614 pos + len, be32_to_cpu(val));
Mark Browndb405172012-10-26 19:30:40 +01001615
Charles Keepaxb618a1852015-04-13 13:27:53 +01001616 alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA);
Mark Browndb405172012-10-26 19:30:40 +01001617 if (!alg)
Charles Keepaxb618a1852015-04-13 13:27:53 +01001618 return ERR_PTR(-ENOMEM);
Mark Browndb405172012-10-26 19:30:40 +01001619
Charles Keepaxb618a1852015-04-13 13:27:53 +01001620 ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2);
Mark Browndb405172012-10-26 19:30:40 +01001621 if (ret != 0) {
Charles Keepax7d00cd92016-02-19 14:44:43 +00001622 adsp_err(dsp, "Failed to read algorithm list: %d\n", ret);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001623 kfree(alg);
1624 return ERR_PTR(ret);
Mark Browndb405172012-10-26 19:30:40 +01001625 }
1626
Charles Keepaxb618a1852015-04-13 13:27:53 +01001627 return alg;
1628}
1629
Charles Keepax14197092015-12-15 11:29:43 +00001630static struct wm_adsp_alg_region *
1631 wm_adsp_find_alg_region(struct wm_adsp *dsp, int type, unsigned int id)
1632{
1633 struct wm_adsp_alg_region *alg_region;
1634
1635 list_for_each_entry(alg_region, &dsp->alg_regions, list) {
1636 if (id == alg_region->alg && type == alg_region->type)
1637 return alg_region;
1638 }
1639
1640 return NULL;
1641}
1642
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001643static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp,
1644 int type, __be32 id,
1645 __be32 base)
1646{
1647 struct wm_adsp_alg_region *alg_region;
1648
1649 alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL);
1650 if (!alg_region)
1651 return ERR_PTR(-ENOMEM);
1652
1653 alg_region->type = type;
1654 alg_region->alg = be32_to_cpu(id);
1655 alg_region->base = be32_to_cpu(base);
1656
1657 list_add_tail(&alg_region->list, &dsp->alg_regions);
1658
Charles Keepax23237362015-04-13 13:28:02 +01001659 if (dsp->fw_ver > 0)
1660 wm_adsp_ctl_fixup_base(dsp, alg_region);
1661
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001662 return alg_region;
1663}
1664
Richard Fitzgerald56574d52016-04-27 14:58:29 +01001665static void wm_adsp_free_alg_regions(struct wm_adsp *dsp)
1666{
1667 struct wm_adsp_alg_region *alg_region;
1668
1669 while (!list_empty(&dsp->alg_regions)) {
1670 alg_region = list_first_entry(&dsp->alg_regions,
1671 struct wm_adsp_alg_region,
1672 list);
1673 list_del(&alg_region->list);
1674 kfree(alg_region);
1675 }
1676}
1677
Charles Keepaxb618a1852015-04-13 13:27:53 +01001678static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
1679{
1680 struct wmfw_adsp1_id_hdr adsp1_id;
1681 struct wmfw_adsp1_alg_hdr *adsp1_alg;
Charles Keepax3809f002015-04-13 13:27:54 +01001682 struct wm_adsp_alg_region *alg_region;
Charles Keepaxb618a1852015-04-13 13:27:53 +01001683 const struct wm_adsp_region *mem;
1684 unsigned int pos, len;
Charles Keepax3809f002015-04-13 13:27:54 +01001685 size_t n_algs;
Charles Keepaxb618a1852015-04-13 13:27:53 +01001686 int i, ret;
1687
1688 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
1689 if (WARN_ON(!mem))
1690 return -EINVAL;
1691
1692 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id,
1693 sizeof(adsp1_id));
1694 if (ret != 0) {
1695 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1696 ret);
1697 return ret;
1698 }
1699
Charles Keepax3809f002015-04-13 13:27:54 +01001700 n_algs = be32_to_cpu(adsp1_id.n_algs);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001701 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
1702 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1703 dsp->fw_id,
1704 (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
1705 (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
1706 be32_to_cpu(adsp1_id.fw.ver) & 0xff,
Charles Keepax3809f002015-04-13 13:27:54 +01001707 n_algs);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001708
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001709 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1710 adsp1_id.fw.id, adsp1_id.zm);
1711 if (IS_ERR(alg_region))
1712 return PTR_ERR(alg_region);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001713
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001714 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1715 adsp1_id.fw.id, adsp1_id.dm);
1716 if (IS_ERR(alg_region))
1717 return PTR_ERR(alg_region);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001718
1719 pos = sizeof(adsp1_id) / 2;
Charles Keepax3809f002015-04-13 13:27:54 +01001720 len = (sizeof(*adsp1_alg) * n_algs) / 2;
Charles Keepaxb618a1852015-04-13 13:27:53 +01001721
Charles Keepax3809f002015-04-13 13:27:54 +01001722 adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001723 if (IS_ERR(adsp1_alg))
1724 return PTR_ERR(adsp1_alg);
Mark Browndb405172012-10-26 19:30:40 +01001725
Charles Keepax3809f002015-04-13 13:27:54 +01001726 for (i = 0; i < n_algs; i++) {
Charles Keepaxb618a1852015-04-13 13:27:53 +01001727 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1728 i, be32_to_cpu(adsp1_alg[i].alg.id),
1729 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
1730 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
1731 be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
1732 be32_to_cpu(adsp1_alg[i].dm),
1733 be32_to_cpu(adsp1_alg[i].zm));
Mark Brown471f4882013-01-08 16:09:31 +00001734
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001735 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1736 adsp1_alg[i].alg.id,
1737 adsp1_alg[i].dm);
1738 if (IS_ERR(alg_region)) {
1739 ret = PTR_ERR(alg_region);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001740 goto out;
1741 }
Charles Keepax23237362015-04-13 13:28:02 +01001742 if (dsp->fw_ver == 0) {
1743 if (i + 1 < n_algs) {
1744 len = be32_to_cpu(adsp1_alg[i + 1].dm);
1745 len -= be32_to_cpu(adsp1_alg[i].dm);
1746 len *= 4;
1747 wm_adsp_create_control(dsp, alg_region, 0,
Charles Keepax26c22a12015-04-20 13:52:45 +01001748 len, NULL, 0, 0);
Charles Keepax23237362015-04-13 13:28:02 +01001749 } else {
1750 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
1751 be32_to_cpu(adsp1_alg[i].alg.id));
1752 }
Charles Keepaxb618a1852015-04-13 13:27:53 +01001753 }
Mark Brown471f4882013-01-08 16:09:31 +00001754
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001755 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1756 adsp1_alg[i].alg.id,
1757 adsp1_alg[i].zm);
1758 if (IS_ERR(alg_region)) {
1759 ret = PTR_ERR(alg_region);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001760 goto out;
1761 }
Charles Keepax23237362015-04-13 13:28:02 +01001762 if (dsp->fw_ver == 0) {
1763 if (i + 1 < n_algs) {
1764 len = be32_to_cpu(adsp1_alg[i + 1].zm);
1765 len -= be32_to_cpu(adsp1_alg[i].zm);
1766 len *= 4;
1767 wm_adsp_create_control(dsp, alg_region, 0,
Charles Keepax26c22a12015-04-20 13:52:45 +01001768 len, NULL, 0, 0);
Charles Keepax23237362015-04-13 13:28:02 +01001769 } else {
1770 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1771 be32_to_cpu(adsp1_alg[i].alg.id));
1772 }
Mark Browndb405172012-10-26 19:30:40 +01001773 }
1774 }
1775
1776out:
Charles Keepaxb618a1852015-04-13 13:27:53 +01001777 kfree(adsp1_alg);
1778 return ret;
1779}
1780
1781static int wm_adsp2_setup_algs(struct wm_adsp *dsp)
1782{
1783 struct wmfw_adsp2_id_hdr adsp2_id;
1784 struct wmfw_adsp2_alg_hdr *adsp2_alg;
Charles Keepax3809f002015-04-13 13:27:54 +01001785 struct wm_adsp_alg_region *alg_region;
Charles Keepaxb618a1852015-04-13 13:27:53 +01001786 const struct wm_adsp_region *mem;
1787 unsigned int pos, len;
Charles Keepax3809f002015-04-13 13:27:54 +01001788 size_t n_algs;
Charles Keepaxb618a1852015-04-13 13:27:53 +01001789 int i, ret;
1790
1791 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
1792 if (WARN_ON(!mem))
1793 return -EINVAL;
1794
1795 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id,
1796 sizeof(adsp2_id));
1797 if (ret != 0) {
1798 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1799 ret);
1800 return ret;
1801 }
1802
Charles Keepax3809f002015-04-13 13:27:54 +01001803 n_algs = be32_to_cpu(adsp2_id.n_algs);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001804 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +01001805 dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001806 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1807 dsp->fw_id,
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +01001808 (dsp->fw_id_version & 0xff0000) >> 16,
1809 (dsp->fw_id_version & 0xff00) >> 8,
1810 dsp->fw_id_version & 0xff,
Charles Keepax3809f002015-04-13 13:27:54 +01001811 n_algs);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001812
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001813 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1814 adsp2_id.fw.id, adsp2_id.xm);
1815 if (IS_ERR(alg_region))
1816 return PTR_ERR(alg_region);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001817
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001818 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1819 adsp2_id.fw.id, adsp2_id.ym);
1820 if (IS_ERR(alg_region))
1821 return PTR_ERR(alg_region);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001822
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001823 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1824 adsp2_id.fw.id, adsp2_id.zm);
1825 if (IS_ERR(alg_region))
1826 return PTR_ERR(alg_region);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001827
1828 pos = sizeof(adsp2_id) / 2;
Charles Keepax3809f002015-04-13 13:27:54 +01001829 len = (sizeof(*adsp2_alg) * n_algs) / 2;
Charles Keepaxb618a1852015-04-13 13:27:53 +01001830
Charles Keepax3809f002015-04-13 13:27:54 +01001831 adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001832 if (IS_ERR(adsp2_alg))
1833 return PTR_ERR(adsp2_alg);
1834
Charles Keepax3809f002015-04-13 13:27:54 +01001835 for (i = 0; i < n_algs; i++) {
Charles Keepaxb618a1852015-04-13 13:27:53 +01001836 adsp_info(dsp,
1837 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1838 i, be32_to_cpu(adsp2_alg[i].alg.id),
1839 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1840 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1841 be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1842 be32_to_cpu(adsp2_alg[i].xm),
1843 be32_to_cpu(adsp2_alg[i].ym),
1844 be32_to_cpu(adsp2_alg[i].zm));
1845
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001846 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1847 adsp2_alg[i].alg.id,
1848 adsp2_alg[i].xm);
1849 if (IS_ERR(alg_region)) {
1850 ret = PTR_ERR(alg_region);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001851 goto out;
1852 }
Charles Keepax23237362015-04-13 13:28:02 +01001853 if (dsp->fw_ver == 0) {
1854 if (i + 1 < n_algs) {
1855 len = be32_to_cpu(adsp2_alg[i + 1].xm);
1856 len -= be32_to_cpu(adsp2_alg[i].xm);
1857 len *= 4;
1858 wm_adsp_create_control(dsp, alg_region, 0,
Charles Keepax26c22a12015-04-20 13:52:45 +01001859 len, NULL, 0, 0);
Charles Keepax23237362015-04-13 13:28:02 +01001860 } else {
1861 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
1862 be32_to_cpu(adsp2_alg[i].alg.id));
1863 }
Charles Keepaxb618a1852015-04-13 13:27:53 +01001864 }
1865
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001866 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1867 adsp2_alg[i].alg.id,
1868 adsp2_alg[i].ym);
1869 if (IS_ERR(alg_region)) {
1870 ret = PTR_ERR(alg_region);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001871 goto out;
1872 }
Charles Keepax23237362015-04-13 13:28:02 +01001873 if (dsp->fw_ver == 0) {
1874 if (i + 1 < n_algs) {
1875 len = be32_to_cpu(adsp2_alg[i + 1].ym);
1876 len -= be32_to_cpu(adsp2_alg[i].ym);
1877 len *= 4;
1878 wm_adsp_create_control(dsp, alg_region, 0,
Charles Keepax26c22a12015-04-20 13:52:45 +01001879 len, NULL, 0, 0);
Charles Keepax23237362015-04-13 13:28:02 +01001880 } else {
1881 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
1882 be32_to_cpu(adsp2_alg[i].alg.id));
1883 }
Charles Keepaxb618a1852015-04-13 13:27:53 +01001884 }
1885
Charles Keepaxd9d20e12015-04-13 13:27:59 +01001886 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1887 adsp2_alg[i].alg.id,
1888 adsp2_alg[i].zm);
1889 if (IS_ERR(alg_region)) {
1890 ret = PTR_ERR(alg_region);
Charles Keepaxb618a1852015-04-13 13:27:53 +01001891 goto out;
1892 }
Charles Keepax23237362015-04-13 13:28:02 +01001893 if (dsp->fw_ver == 0) {
1894 if (i + 1 < n_algs) {
1895 len = be32_to_cpu(adsp2_alg[i + 1].zm);
1896 len -= be32_to_cpu(adsp2_alg[i].zm);
1897 len *= 4;
1898 wm_adsp_create_control(dsp, alg_region, 0,
Charles Keepax26c22a12015-04-20 13:52:45 +01001899 len, NULL, 0, 0);
Charles Keepax23237362015-04-13 13:28:02 +01001900 } else {
1901 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1902 be32_to_cpu(adsp2_alg[i].alg.id));
1903 }
Charles Keepaxb618a1852015-04-13 13:27:53 +01001904 }
1905 }
1906
1907out:
1908 kfree(adsp2_alg);
Mark Browndb405172012-10-26 19:30:40 +01001909 return ret;
1910}
1911
Mark Brown2159ad92012-10-11 11:54:02 +09001912static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1913{
Mark Browncf17c832013-01-30 14:37:23 +08001914 LIST_HEAD(buf_list);
Mark Brown2159ad92012-10-11 11:54:02 +09001915 struct regmap *regmap = dsp->regmap;
1916 struct wmfw_coeff_hdr *hdr;
1917 struct wmfw_coeff_item *blk;
1918 const struct firmware *firmware;
Mark Brown471f4882013-01-08 16:09:31 +00001919 const struct wm_adsp_region *mem;
1920 struct wm_adsp_alg_region *alg_region;
Mark Brown2159ad92012-10-11 11:54:02 +09001921 const char *region_name;
1922 int ret, pos, blocks, type, offset, reg;
1923 char *file;
Mark Browncf17c832013-01-30 14:37:23 +08001924 struct wm_adsp_buf *buf;
Mark Brown2159ad92012-10-11 11:54:02 +09001925
1926 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1927 if (file == NULL)
1928 return -ENOMEM;
1929
Mark Brown1023dbd2013-01-11 22:58:28 +00001930 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,
1931 wm_adsp_fw[dsp->fw].file);
Mark Brown2159ad92012-10-11 11:54:02 +09001932 file[PAGE_SIZE - 1] = '\0';
1933
1934 ret = request_firmware(&firmware, file, dsp->dev);
1935 if (ret != 0) {
1936 adsp_warn(dsp, "Failed to request '%s'\n", file);
1937 ret = 0;
1938 goto out;
1939 }
1940 ret = -EINVAL;
1941
1942 if (sizeof(*hdr) >= firmware->size) {
1943 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1944 file, firmware->size);
1945 goto out_fw;
1946 }
1947
Charles Keepax7585a5b2015-12-08 16:08:25 +00001948 hdr = (void *)&firmware->data[0];
Mark Brown2159ad92012-10-11 11:54:02 +09001949 if (memcmp(hdr->magic, "WMDR", 4) != 0) {
1950 adsp_err(dsp, "%s: invalid magic\n", file);
Charles Keepaxa4cdbec2013-01-21 09:02:31 +00001951 goto out_fw;
Mark Brown2159ad92012-10-11 11:54:02 +09001952 }
1953
Mark Brownc7123262013-01-16 16:59:04 +09001954 switch (be32_to_cpu(hdr->rev) & 0xff) {
1955 case 1:
1956 break;
1957 default:
1958 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
1959 file, be32_to_cpu(hdr->rev) & 0xff);
1960 ret = -EINVAL;
1961 goto out_fw;
1962 }
1963
Mark Brown2159ad92012-10-11 11:54:02 +09001964 adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
1965 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
1966 (le32_to_cpu(hdr->ver) >> 8) & 0xff,
1967 le32_to_cpu(hdr->ver) & 0xff);
1968
1969 pos = le32_to_cpu(hdr->len);
1970
1971 blocks = 0;
1972 while (pos < firmware->size &&
1973 pos - firmware->size > sizeof(*blk)) {
Charles Keepax7585a5b2015-12-08 16:08:25 +00001974 blk = (void *)(&firmware->data[pos]);
Mark Brown2159ad92012-10-11 11:54:02 +09001975
Mark Brownc7123262013-01-16 16:59:04 +09001976 type = le16_to_cpu(blk->type);
1977 offset = le16_to_cpu(blk->offset);
Mark Brown2159ad92012-10-11 11:54:02 +09001978
1979 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
1980 file, blocks, le32_to_cpu(blk->id),
1981 (le32_to_cpu(blk->ver) >> 16) & 0xff,
1982 (le32_to_cpu(blk->ver) >> 8) & 0xff,
1983 le32_to_cpu(blk->ver) & 0xff);
1984 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
1985 file, blocks, le32_to_cpu(blk->len), offset, type);
1986
1987 reg = 0;
1988 region_name = "Unknown";
1989 switch (type) {
Mark Brownc7123262013-01-16 16:59:04 +09001990 case (WMFW_NAME_TEXT << 8):
1991 case (WMFW_INFO_TEXT << 8):
Mark Brown2159ad92012-10-11 11:54:02 +09001992 break;
Mark Brownc7123262013-01-16 16:59:04 +09001993 case (WMFW_ABSOLUTE << 8):
Mark Brownf395a212013-03-05 22:39:54 +08001994 /*
1995 * Old files may use this for global
1996 * coefficients.
1997 */
1998 if (le32_to_cpu(blk->id) == dsp->fw_id &&
1999 offset == 0) {
2000 region_name = "global coefficients";
2001 mem = wm_adsp_find_region(dsp, type);
2002 if (!mem) {
2003 adsp_err(dsp, "No ZM\n");
2004 break;
2005 }
2006 reg = wm_adsp_region_to_reg(mem, 0);
2007
2008 } else {
2009 region_name = "register";
2010 reg = offset;
2011 }
Mark Brown2159ad92012-10-11 11:54:02 +09002012 break;
Mark Brown471f4882013-01-08 16:09:31 +00002013
2014 case WMFW_ADSP1_DM:
2015 case WMFW_ADSP1_ZM:
2016 case WMFW_ADSP2_XM:
2017 case WMFW_ADSP2_YM:
2018 adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
2019 file, blocks, le32_to_cpu(blk->len),
2020 type, le32_to_cpu(blk->id));
2021
2022 mem = wm_adsp_find_region(dsp, type);
2023 if (!mem) {
2024 adsp_err(dsp, "No base for region %x\n", type);
2025 break;
2026 }
2027
Charles Keepax14197092015-12-15 11:29:43 +00002028 alg_region = wm_adsp_find_alg_region(dsp, type,
2029 le32_to_cpu(blk->id));
2030 if (alg_region) {
2031 reg = alg_region->base;
2032 reg = wm_adsp_region_to_reg(mem, reg);
2033 reg += offset;
2034 } else {
Mark Brown471f4882013-01-08 16:09:31 +00002035 adsp_err(dsp, "No %x for algorithm %x\n",
2036 type, le32_to_cpu(blk->id));
Charles Keepax14197092015-12-15 11:29:43 +00002037 }
Mark Brown471f4882013-01-08 16:09:31 +00002038 break;
2039
Mark Brown2159ad92012-10-11 11:54:02 +09002040 default:
Mark Brown25c62f7e2013-01-20 19:02:19 +09002041 adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
2042 file, blocks, type, pos);
Mark Brown2159ad92012-10-11 11:54:02 +09002043 break;
2044 }
2045
2046 if (reg) {
Mark Browncf17c832013-01-30 14:37:23 +08002047 buf = wm_adsp_buf_alloc(blk->data,
2048 le32_to_cpu(blk->len),
2049 &buf_list);
Mark Browna76fefa2013-01-07 19:03:17 +00002050 if (!buf) {
2051 adsp_err(dsp, "Out of memory\n");
Wei Yongjunf4b82812013-03-12 00:23:15 +08002052 ret = -ENOMEM;
2053 goto out_fw;
Mark Browna76fefa2013-01-07 19:03:17 +00002054 }
2055
Mark Brown20da6d52013-01-12 19:58:17 +00002056 adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
2057 file, blocks, le32_to_cpu(blk->len),
2058 reg);
Mark Browncf17c832013-01-30 14:37:23 +08002059 ret = regmap_raw_write_async(regmap, reg, buf->buf,
2060 le32_to_cpu(blk->len));
Mark Brown2159ad92012-10-11 11:54:02 +09002061 if (ret != 0) {
2062 adsp_err(dsp,
Dimitris Papastamos43bc3bf2013-11-01 15:56:52 +00002063 "%s.%d: Failed to write to %x in %s: %d\n",
2064 file, blocks, reg, region_name, ret);
Mark Brown2159ad92012-10-11 11:54:02 +09002065 }
2066 }
2067
Charles Keepaxbe951012015-02-16 15:25:49 +00002068 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03;
Mark Brown2159ad92012-10-11 11:54:02 +09002069 blocks++;
2070 }
2071
Mark Browncf17c832013-01-30 14:37:23 +08002072 ret = regmap_async_complete(regmap);
2073 if (ret != 0)
2074 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
2075
Mark Brown2159ad92012-10-11 11:54:02 +09002076 if (pos > firmware->size)
2077 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
2078 file, blocks, pos - firmware->size);
2079
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +01002080 wm_adsp_debugfs_save_binname(dsp, file);
2081
Mark Brown2159ad92012-10-11 11:54:02 +09002082out_fw:
Charles Keepax9da7a5a2014-11-17 10:48:21 +00002083 regmap_async_complete(regmap);
Mark Brown2159ad92012-10-11 11:54:02 +09002084 release_firmware(firmware);
Mark Browncf17c832013-01-30 14:37:23 +08002085 wm_adsp_buf_free(&buf_list);
Mark Brown2159ad92012-10-11 11:54:02 +09002086out:
2087 kfree(file);
Wei Yongjunf4b82812013-03-12 00:23:15 +08002088 return ret;
Mark Brown2159ad92012-10-11 11:54:02 +09002089}
2090
Charles Keepax3809f002015-04-13 13:27:54 +01002091int wm_adsp1_init(struct wm_adsp *dsp)
Mark Brown5e7a7a22013-01-16 10:03:56 +09002092{
Charles Keepax3809f002015-04-13 13:27:54 +01002093 INIT_LIST_HEAD(&dsp->alg_regions);
Mark Brown5e7a7a22013-01-16 10:03:56 +09002094
Charles Keepax078e7182015-12-08 16:08:26 +00002095 mutex_init(&dsp->pwr_lock);
2096
Mark Brown5e7a7a22013-01-16 10:03:56 +09002097 return 0;
2098}
2099EXPORT_SYMBOL_GPL(wm_adsp1_init);
2100
Mark Brown2159ad92012-10-11 11:54:02 +09002101int wm_adsp1_event(struct snd_soc_dapm_widget *w,
2102 struct snd_kcontrol *kcontrol,
2103 int event)
2104{
Lars-Peter Clausen72718512015-01-13 10:27:34 +01002105 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Mark Brown2159ad92012-10-11 11:54:02 +09002106 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2107 struct wm_adsp *dsp = &dsps[w->shift];
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002108 struct wm_coeff_ctl *ctl;
Mark Brown2159ad92012-10-11 11:54:02 +09002109 int ret;
Charles Keepax7585a5b2015-12-08 16:08:25 +00002110 unsigned int val;
Mark Brown2159ad92012-10-11 11:54:02 +09002111
Lars-Peter Clausen00200102014-07-17 22:01:07 +02002112 dsp->card = codec->component.card;
Dimitris Papastamos92bb4c32013-08-01 11:11:28 +01002113
Charles Keepax078e7182015-12-08 16:08:26 +00002114 mutex_lock(&dsp->pwr_lock);
2115
Mark Brown2159ad92012-10-11 11:54:02 +09002116 switch (event) {
2117 case SND_SOC_DAPM_POST_PMU:
2118 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2119 ADSP1_SYS_ENA, ADSP1_SYS_ENA);
2120
Chris Rattray94e205b2013-01-18 08:43:09 +00002121 /*
2122 * For simplicity set the DSP clock rate to be the
2123 * SYSCLK rate rather than making it configurable.
2124 */
Charles Keepax7585a5b2015-12-08 16:08:25 +00002125 if (dsp->sysclk_reg) {
Chris Rattray94e205b2013-01-18 08:43:09 +00002126 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
2127 if (ret != 0) {
2128 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
2129 ret);
Charles Keepax078e7182015-12-08 16:08:26 +00002130 goto err_mutex;
Chris Rattray94e205b2013-01-18 08:43:09 +00002131 }
2132
Charles Keepax7d00cd92016-02-19 14:44:43 +00002133 val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift;
Chris Rattray94e205b2013-01-18 08:43:09 +00002134
2135 ret = regmap_update_bits(dsp->regmap,
2136 dsp->base + ADSP1_CONTROL_31,
2137 ADSP1_CLK_SEL_MASK, val);
2138 if (ret != 0) {
2139 adsp_err(dsp, "Failed to set clock rate: %d\n",
2140 ret);
Charles Keepax078e7182015-12-08 16:08:26 +00002141 goto err_mutex;
Chris Rattray94e205b2013-01-18 08:43:09 +00002142 }
2143 }
2144
Mark Brown2159ad92012-10-11 11:54:02 +09002145 ret = wm_adsp_load(dsp);
2146 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002147 goto err_ena;
Mark Brown2159ad92012-10-11 11:54:02 +09002148
Charles Keepaxb618a1852015-04-13 13:27:53 +01002149 ret = wm_adsp1_setup_algs(dsp);
Mark Browndb405172012-10-26 19:30:40 +01002150 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002151 goto err_ena;
Mark Browndb405172012-10-26 19:30:40 +01002152
Mark Brown2159ad92012-10-11 11:54:02 +09002153 ret = wm_adsp_load_coeff(dsp);
2154 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002155 goto err_ena;
Mark Brown2159ad92012-10-11 11:54:02 +09002156
Dimitris Papastamos0c2e3f32013-05-28 12:01:50 +01002157 /* Initialize caches for enabled and unset controls */
Dimitris Papastamos81ad93e2013-07-29 13:51:59 +01002158 ret = wm_coeff_init_control_caches(dsp);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002159 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002160 goto err_ena;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002161
Dimitris Papastamos0c2e3f32013-05-28 12:01:50 +01002162 /* Sync set controls */
Dimitris Papastamos81ad93e2013-07-29 13:51:59 +01002163 ret = wm_coeff_sync_controls(dsp);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002164 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002165 goto err_ena;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002166
Mark Brown2159ad92012-10-11 11:54:02 +09002167 /* Start the core running */
2168 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2169 ADSP1_CORE_ENA | ADSP1_START,
2170 ADSP1_CORE_ENA | ADSP1_START);
2171 break;
2172
2173 case SND_SOC_DAPM_PRE_PMD:
2174 /* Halt the core */
2175 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2176 ADSP1_CORE_ENA | ADSP1_START, 0);
2177
2178 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
2179 ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
2180
2181 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2182 ADSP1_SYS_ENA, 0);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002183
Dimitris Papastamos81ad93e2013-07-29 13:51:59 +01002184 list_for_each_entry(ctl, &dsp->ctl_list, list)
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002185 ctl->enabled = 0;
Dimitris Papastamosb0101b42013-11-01 15:56:56 +00002186
Richard Fitzgerald56574d52016-04-27 14:58:29 +01002187
2188 wm_adsp_free_alg_regions(dsp);
Mark Brown2159ad92012-10-11 11:54:02 +09002189 break;
2190
2191 default:
2192 break;
2193 }
2194
Charles Keepax078e7182015-12-08 16:08:26 +00002195 mutex_unlock(&dsp->pwr_lock);
2196
Mark Brown2159ad92012-10-11 11:54:02 +09002197 return 0;
2198
Charles Keepax078e7182015-12-08 16:08:26 +00002199err_ena:
Mark Brown2159ad92012-10-11 11:54:02 +09002200 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2201 ADSP1_SYS_ENA, 0);
Charles Keepax078e7182015-12-08 16:08:26 +00002202err_mutex:
2203 mutex_unlock(&dsp->pwr_lock);
2204
Mark Brown2159ad92012-10-11 11:54:02 +09002205 return ret;
2206}
2207EXPORT_SYMBOL_GPL(wm_adsp1_event);
2208
2209static int wm_adsp2_ena(struct wm_adsp *dsp)
2210{
2211 unsigned int val;
2212 int ret, count;
2213
Mark Brown1552c322013-11-28 18:11:38 +00002214 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
2215 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
Mark Brown2159ad92012-10-11 11:54:02 +09002216 if (ret != 0)
2217 return ret;
2218
2219 /* Wait for the RAM to start, should be near instantaneous */
Charles Keepax939fd1e2013-12-18 09:25:49 +00002220 for (count = 0; count < 10; ++count) {
Charles Keepax7d00cd92016-02-19 14:44:43 +00002221 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val);
Mark Brown2159ad92012-10-11 11:54:02 +09002222 if (ret != 0)
2223 return ret;
Charles Keepax939fd1e2013-12-18 09:25:49 +00002224
2225 if (val & ADSP2_RAM_RDY)
2226 break;
2227
2228 msleep(1);
2229 }
Mark Brown2159ad92012-10-11 11:54:02 +09002230
2231 if (!(val & ADSP2_RAM_RDY)) {
2232 adsp_err(dsp, "Failed to start DSP RAM\n");
2233 return -EBUSY;
2234 }
2235
2236 adsp_dbg(dsp, "RAM ready after %d polls\n", count);
Mark Brown2159ad92012-10-11 11:54:02 +09002237
2238 return 0;
2239}
2240
Charles Keepax18b1a902014-01-09 09:06:54 +00002241static void wm_adsp2_boot_work(struct work_struct *work)
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002242{
2243 struct wm_adsp *dsp = container_of(work,
2244 struct wm_adsp,
2245 boot_work);
2246 int ret;
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002247
Charles Keepax078e7182015-12-08 16:08:26 +00002248 mutex_lock(&dsp->pwr_lock);
2249
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002250 ret = wm_adsp2_ena(dsp);
2251 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002252 goto err_mutex;
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002253
2254 ret = wm_adsp_load(dsp);
2255 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002256 goto err_ena;
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002257
Charles Keepaxb618a1852015-04-13 13:27:53 +01002258 ret = wm_adsp2_setup_algs(dsp);
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002259 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002260 goto err_ena;
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002261
2262 ret = wm_adsp_load_coeff(dsp);
2263 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002264 goto err_ena;
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002265
2266 /* Initialize caches for enabled and unset controls */
2267 ret = wm_coeff_init_control_caches(dsp);
2268 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002269 goto err_ena;
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002270
2271 /* Sync set controls */
2272 ret = wm_coeff_sync_controls(dsp);
2273 if (ret != 0)
Charles Keepax078e7182015-12-08 16:08:26 +00002274 goto err_ena;
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002275
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002276 dsp->running = true;
2277
Charles Keepax078e7182015-12-08 16:08:26 +00002278 mutex_unlock(&dsp->pwr_lock);
2279
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002280 return;
2281
Charles Keepax078e7182015-12-08 16:08:26 +00002282err_ena:
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002283 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2284 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
Charles Keepax078e7182015-12-08 16:08:26 +00002285err_mutex:
2286 mutex_unlock(&dsp->pwr_lock);
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002287}
2288
Charles Keepaxd82d7672016-01-21 17:53:02 +00002289static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq)
2290{
2291 int ret;
2292
2293 ret = regmap_update_bits_async(dsp->regmap,
2294 dsp->base + ADSP2_CLOCKING,
2295 ADSP2_CLK_SEL_MASK,
2296 freq << ADSP2_CLK_SEL_SHIFT);
2297 if (ret != 0)
2298 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
2299}
2300
Charles Keepax12db5ed2014-01-08 17:42:19 +00002301int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
Charles Keepaxd82d7672016-01-21 17:53:02 +00002302 struct snd_kcontrol *kcontrol, int event,
2303 unsigned int freq)
Charles Keepax12db5ed2014-01-08 17:42:19 +00002304{
Lars-Peter Clausen72718512015-01-13 10:27:34 +01002305 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Charles Keepax12db5ed2014-01-08 17:42:19 +00002306 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2307 struct wm_adsp *dsp = &dsps[w->shift];
2308
Lars-Peter Clausen00200102014-07-17 22:01:07 +02002309 dsp->card = codec->component.card;
Charles Keepax12db5ed2014-01-08 17:42:19 +00002310
2311 switch (event) {
2312 case SND_SOC_DAPM_PRE_PMU:
Charles Keepaxd82d7672016-01-21 17:53:02 +00002313 wm_adsp2_set_dspclk(dsp, freq);
Charles Keepax12db5ed2014-01-08 17:42:19 +00002314 queue_work(system_unbound_wq, &dsp->boot_work);
2315 break;
2316 default:
2317 break;
Charles Keepaxcab27252014-04-17 13:42:54 +01002318 }
Charles Keepax12db5ed2014-01-08 17:42:19 +00002319
2320 return 0;
2321}
2322EXPORT_SYMBOL_GPL(wm_adsp2_early_event);
2323
Mark Brown2159ad92012-10-11 11:54:02 +09002324int wm_adsp2_event(struct snd_soc_dapm_widget *w,
2325 struct snd_kcontrol *kcontrol, int event)
2326{
Lars-Peter Clausen72718512015-01-13 10:27:34 +01002327 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Mark Brown2159ad92012-10-11 11:54:02 +09002328 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2329 struct wm_adsp *dsp = &dsps[w->shift];
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002330 struct wm_coeff_ctl *ctl;
Mark Brown2159ad92012-10-11 11:54:02 +09002331 int ret;
2332
2333 switch (event) {
2334 case SND_SOC_DAPM_POST_PMU:
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002335 flush_work(&dsp->boot_work);
Mark Browndd49e2c2012-12-02 21:50:46 +09002336
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002337 if (!dsp->running)
2338 return -EIO;
Mark Browndd49e2c2012-12-02 21:50:46 +09002339
Charles Keepaxd8a64d62014-01-08 17:42:18 +00002340 ret = regmap_update_bits(dsp->regmap,
2341 dsp->base + ADSP2_CONTROL,
Charles Keepax00e4c3b2014-11-18 16:25:27 +00002342 ADSP2_CORE_ENA | ADSP2_START,
2343 ADSP2_CORE_ENA | ADSP2_START);
Mark Brown2159ad92012-10-11 11:54:02 +09002344 if (ret != 0)
2345 goto err;
Charles Keepax2cd19bd2015-12-15 11:29:46 +00002346
Charles Keepax612047f2016-03-28 14:29:22 +01002347 mutex_lock(&dsp->pwr_lock);
2348
Charles Keepax2cd19bd2015-12-15 11:29:46 +00002349 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2350 ret = wm_adsp_buffer_init(dsp);
2351
Charles Keepax612047f2016-03-28 14:29:22 +01002352 mutex_unlock(&dsp->pwr_lock);
2353
Mark Brown2159ad92012-10-11 11:54:02 +09002354 break;
2355
2356 case SND_SOC_DAPM_PRE_PMD:
Richard Fitzgerald10337b02015-05-29 10:23:07 +01002357 /* Log firmware state, it can be useful for analysis */
2358 wm_adsp2_show_fw_status(dsp);
2359
Charles Keepax078e7182015-12-08 16:08:26 +00002360 mutex_lock(&dsp->pwr_lock);
2361
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +01002362 wm_adsp_debugfs_clear(dsp);
2363
2364 dsp->fw_id = 0;
2365 dsp->fw_id_version = 0;
Mark Brown1023dbd2013-01-11 22:58:28 +00002366 dsp->running = false;
2367
Mark Brown2159ad92012-10-11 11:54:02 +09002368 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
Simon Trimmer6facd2d2016-06-22 15:31:03 +01002369 ADSP2_CORE_ENA | ADSP2_START, 0);
Mark Brown973838a2012-11-28 17:20:32 +00002370
Mark Brown2d30b572013-01-28 20:18:17 +08002371 /* Make sure DMAs are quiesced */
Simon Trimmer6facd2d2016-06-22 15:31:03 +01002372 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
Mark Brown2d30b572013-01-28 20:18:17 +08002373 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
2374 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
Simon Trimmer6facd2d2016-06-22 15:31:03 +01002375
2376 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2377 ADSP2_SYS_ENA, 0);
Mark Brown2d30b572013-01-28 20:18:17 +08002378
Dimitris Papastamos81ad93e2013-07-29 13:51:59 +01002379 list_for_each_entry(ctl, &dsp->ctl_list, list)
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002380 ctl->enabled = 0;
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002381
Richard Fitzgerald56574d52016-04-27 14:58:29 +01002382 wm_adsp_free_alg_regions(dsp);
Charles Keepaxddbc5ef2014-01-22 10:09:11 +00002383
Charles Keepax2cd19bd2015-12-15 11:29:46 +00002384 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2385 wm_adsp_buffer_free(dsp);
2386
Charles Keepax078e7182015-12-08 16:08:26 +00002387 mutex_unlock(&dsp->pwr_lock);
2388
Charles Keepaxddbc5ef2014-01-22 10:09:11 +00002389 adsp_dbg(dsp, "Shutdown complete\n");
Mark Brown2159ad92012-10-11 11:54:02 +09002390 break;
2391
2392 default:
2393 break;
2394 }
2395
2396 return 0;
2397err:
2398 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
Mark Browna7f9be72012-11-28 19:53:59 +00002399 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
Mark Brown2159ad92012-10-11 11:54:02 +09002400 return ret;
2401}
2402EXPORT_SYMBOL_GPL(wm_adsp2_event);
Mark Brown973838a2012-11-28 17:20:32 +00002403
Richard Fitzgeraldf5e2ce92015-06-11 11:32:30 +01002404int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2405{
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +01002406 wm_adsp2_init_debugfs(dsp, codec);
2407
Richard Fitzgerald218e5082015-06-11 11:32:31 +01002408 return snd_soc_add_codec_controls(codec,
Richard Fitzgerald336d0442015-06-18 13:43:19 +01002409 &wm_adsp_fw_controls[dsp->num - 1],
2410 1);
Richard Fitzgeraldf5e2ce92015-06-11 11:32:30 +01002411}
2412EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe);
2413
2414int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2415{
Richard Fitzgeraldf9f55e32015-06-11 11:32:32 +01002416 wm_adsp2_cleanup_debugfs(dsp);
2417
Richard Fitzgeraldf5e2ce92015-06-11 11:32:30 +01002418 return 0;
2419}
2420EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove);
2421
Richard Fitzgerald81ac58b2015-06-02 11:53:34 +01002422int wm_adsp2_init(struct wm_adsp *dsp)
Mark Brown973838a2012-11-28 17:20:32 +00002423{
2424 int ret;
2425
Mark Brown10a2b662012-12-02 21:37:00 +09002426 /*
2427 * Disable the DSP memory by default when in reset for a small
2428 * power saving.
2429 */
Charles Keepax3809f002015-04-13 13:27:54 +01002430 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
Mark Brown10a2b662012-12-02 21:37:00 +09002431 ADSP2_MEM_ENA, 0);
2432 if (ret != 0) {
Charles Keepax3809f002015-04-13 13:27:54 +01002433 adsp_err(dsp, "Failed to clear memory retention: %d\n", ret);
Mark Brown10a2b662012-12-02 21:37:00 +09002434 return ret;
2435 }
2436
Charles Keepax3809f002015-04-13 13:27:54 +01002437 INIT_LIST_HEAD(&dsp->alg_regions);
2438 INIT_LIST_HEAD(&dsp->ctl_list);
2439 INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work);
Dimitris Papastamos6ab2b7b2013-05-08 14:15:35 +01002440
Charles Keepax078e7182015-12-08 16:08:26 +00002441 mutex_init(&dsp->pwr_lock);
2442
Mark Brown973838a2012-11-28 17:20:32 +00002443 return 0;
2444}
2445EXPORT_SYMBOL_GPL(wm_adsp2_init);
Praveen Diwakar0a37c6e2014-07-04 11:17:41 +05302446
Richard Fitzgerald66225e92016-04-27 14:58:27 +01002447void wm_adsp2_remove(struct wm_adsp *dsp)
2448{
2449 struct wm_coeff_ctl *ctl;
2450
2451 while (!list_empty(&dsp->ctl_list)) {
2452 ctl = list_first_entry(&dsp->ctl_list, struct wm_coeff_ctl,
2453 list);
2454 list_del(&ctl->list);
2455 wm_adsp_free_ctl_blk(ctl);
2456 }
2457}
2458EXPORT_SYMBOL_GPL(wm_adsp2_remove);
2459
Charles Keepaxedd71352016-05-04 17:11:55 +01002460static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
2461{
2462 return compr->buf != NULL;
2463}
2464
2465static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
2466{
2467 /*
2468 * Note this will be more complex once each DSP can support multiple
2469 * streams
2470 */
2471 if (!compr->dsp->buffer)
2472 return -EINVAL;
2473
2474 compr->buf = compr->dsp->buffer;
Charles Keepax721be3b2016-05-04 17:11:56 +01002475 compr->buf->compr = compr;
Charles Keepaxedd71352016-05-04 17:11:55 +01002476
2477 return 0;
2478}
2479
Charles Keepax721be3b2016-05-04 17:11:56 +01002480static void wm_adsp_compr_detach(struct wm_adsp_compr *compr)
2481{
2482 if (!compr)
2483 return;
2484
2485 /* Wake the poll so it can see buffer is no longer attached */
2486 if (compr->stream)
2487 snd_compr_fragment_elapsed(compr->stream);
2488
2489 if (wm_adsp_compr_attached(compr)) {
2490 compr->buf->compr = NULL;
2491 compr->buf = NULL;
2492 }
2493}
2494
Charles Keepax406abc92015-12-15 11:29:45 +00002495int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream)
2496{
2497 struct wm_adsp_compr *compr;
2498 int ret = 0;
2499
2500 mutex_lock(&dsp->pwr_lock);
2501
2502 if (wm_adsp_fw[dsp->fw].num_caps == 0) {
2503 adsp_err(dsp, "Firmware does not support compressed API\n");
2504 ret = -ENXIO;
2505 goto out;
2506 }
2507
2508 if (wm_adsp_fw[dsp->fw].compr_direction != stream->direction) {
2509 adsp_err(dsp, "Firmware does not support stream direction\n");
2510 ret = -EINVAL;
2511 goto out;
2512 }
2513
Charles Keepax95fe9592015-12-15 11:29:47 +00002514 if (dsp->compr) {
2515 /* It is expect this limitation will be removed in future */
2516 adsp_err(dsp, "Only a single stream supported per DSP\n");
2517 ret = -EBUSY;
2518 goto out;
2519 }
2520
Charles Keepax406abc92015-12-15 11:29:45 +00002521 compr = kzalloc(sizeof(*compr), GFP_KERNEL);
2522 if (!compr) {
2523 ret = -ENOMEM;
2524 goto out;
2525 }
2526
2527 compr->dsp = dsp;
2528 compr->stream = stream;
2529
2530 dsp->compr = compr;
2531
2532 stream->runtime->private_data = compr;
2533
2534out:
2535 mutex_unlock(&dsp->pwr_lock);
2536
2537 return ret;
2538}
2539EXPORT_SYMBOL_GPL(wm_adsp_compr_open);
2540
2541int wm_adsp_compr_free(struct snd_compr_stream *stream)
2542{
2543 struct wm_adsp_compr *compr = stream->runtime->private_data;
2544 struct wm_adsp *dsp = compr->dsp;
2545
2546 mutex_lock(&dsp->pwr_lock);
2547
Charles Keepax721be3b2016-05-04 17:11:56 +01002548 wm_adsp_compr_detach(compr);
Charles Keepax406abc92015-12-15 11:29:45 +00002549 dsp->compr = NULL;
2550
Charles Keepax83a40ce2016-01-06 12:33:19 +00002551 kfree(compr->raw_buf);
Charles Keepax406abc92015-12-15 11:29:45 +00002552 kfree(compr);
2553
2554 mutex_unlock(&dsp->pwr_lock);
2555
2556 return 0;
2557}
2558EXPORT_SYMBOL_GPL(wm_adsp_compr_free);
2559
2560static int wm_adsp_compr_check_params(struct snd_compr_stream *stream,
2561 struct snd_compr_params *params)
2562{
2563 struct wm_adsp_compr *compr = stream->runtime->private_data;
2564 struct wm_adsp *dsp = compr->dsp;
2565 const struct wm_adsp_fw_caps *caps;
2566 const struct snd_codec_desc *desc;
2567 int i, j;
2568
2569 if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE ||
2570 params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE ||
2571 params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS ||
2572 params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS ||
2573 params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) {
2574 adsp_err(dsp, "Invalid buffer fragsize=%d fragments=%d\n",
2575 params->buffer.fragment_size,
2576 params->buffer.fragments);
2577
2578 return -EINVAL;
2579 }
2580
2581 for (i = 0; i < wm_adsp_fw[dsp->fw].num_caps; i++) {
2582 caps = &wm_adsp_fw[dsp->fw].caps[i];
2583 desc = &caps->desc;
2584
2585 if (caps->id != params->codec.id)
2586 continue;
2587
2588 if (stream->direction == SND_COMPRESS_PLAYBACK) {
2589 if (desc->max_ch < params->codec.ch_out)
2590 continue;
2591 } else {
2592 if (desc->max_ch < params->codec.ch_in)
2593 continue;
2594 }
2595
2596 if (!(desc->formats & (1 << params->codec.format)))
2597 continue;
2598
2599 for (j = 0; j < desc->num_sample_rates; ++j)
2600 if (desc->sample_rates[j] == params->codec.sample_rate)
2601 return 0;
2602 }
2603
2604 adsp_err(dsp, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
2605 params->codec.id, params->codec.ch_in, params->codec.ch_out,
2606 params->codec.sample_rate, params->codec.format);
2607 return -EINVAL;
2608}
2609
Charles Keepax565ace42016-01-06 12:33:18 +00002610static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr)
2611{
2612 return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE;
2613}
2614
Charles Keepax406abc92015-12-15 11:29:45 +00002615int wm_adsp_compr_set_params(struct snd_compr_stream *stream,
2616 struct snd_compr_params *params)
2617{
2618 struct wm_adsp_compr *compr = stream->runtime->private_data;
Charles Keepax83a40ce2016-01-06 12:33:19 +00002619 unsigned int size;
Charles Keepax406abc92015-12-15 11:29:45 +00002620 int ret;
2621
2622 ret = wm_adsp_compr_check_params(stream, params);
2623 if (ret)
2624 return ret;
2625
2626 compr->size = params->buffer;
2627
2628 adsp_dbg(compr->dsp, "fragment_size=%d fragments=%d\n",
2629 compr->size.fragment_size, compr->size.fragments);
2630
Charles Keepax83a40ce2016-01-06 12:33:19 +00002631 size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf);
2632 compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL);
2633 if (!compr->raw_buf)
2634 return -ENOMEM;
2635
Charles Keepaxda2b3352016-02-02 16:41:36 +00002636 compr->sample_rate = params->codec.sample_rate;
2637
Charles Keepax406abc92015-12-15 11:29:45 +00002638 return 0;
2639}
2640EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params);
2641
2642int wm_adsp_compr_get_caps(struct snd_compr_stream *stream,
2643 struct snd_compr_caps *caps)
2644{
2645 struct wm_adsp_compr *compr = stream->runtime->private_data;
2646 int fw = compr->dsp->fw;
2647 int i;
2648
2649 if (wm_adsp_fw[fw].caps) {
2650 for (i = 0; i < wm_adsp_fw[fw].num_caps; i++)
2651 caps->codecs[i] = wm_adsp_fw[fw].caps[i].id;
2652
2653 caps->num_codecs = i;
2654 caps->direction = wm_adsp_fw[fw].compr_direction;
2655
2656 caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE;
2657 caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE;
2658 caps->min_fragments = WM_ADSP_MIN_FRAGMENTS;
2659 caps->max_fragments = WM_ADSP_MAX_FRAGMENTS;
2660 }
2661
2662 return 0;
2663}
2664EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps);
2665
Charles Keepax2cd19bd2015-12-15 11:29:46 +00002666static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type,
2667 unsigned int mem_addr,
2668 unsigned int num_words, u32 *data)
2669{
2670 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
2671 unsigned int i, reg;
2672 int ret;
2673
2674 if (!mem)
2675 return -EINVAL;
2676
2677 reg = wm_adsp_region_to_reg(mem, mem_addr);
2678
2679 ret = regmap_raw_read(dsp->regmap, reg, data,
2680 sizeof(*data) * num_words);
2681 if (ret < 0)
2682 return ret;
2683
2684 for (i = 0; i < num_words; ++i)
2685 data[i] = be32_to_cpu(data[i]) & 0x00ffffffu;
2686
2687 return 0;
2688}
2689
2690static inline int wm_adsp_read_data_word(struct wm_adsp *dsp, int mem_type,
2691 unsigned int mem_addr, u32 *data)
2692{
2693 return wm_adsp_read_data_block(dsp, mem_type, mem_addr, 1, data);
2694}
2695
2696static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type,
2697 unsigned int mem_addr, u32 data)
2698{
2699 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
2700 unsigned int reg;
2701
2702 if (!mem)
2703 return -EINVAL;
2704
2705 reg = wm_adsp_region_to_reg(mem, mem_addr);
2706
2707 data = cpu_to_be32(data & 0x00ffffffu);
2708
2709 return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data));
2710}
2711
2712static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf,
2713 unsigned int field_offset, u32 *data)
2714{
2715 return wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM,
2716 buf->host_buf_ptr + field_offset, data);
2717}
2718
2719static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf,
2720 unsigned int field_offset, u32 data)
2721{
2722 return wm_adsp_write_data_word(buf->dsp, WMFW_ADSP2_XM,
2723 buf->host_buf_ptr + field_offset, data);
2724}
2725
2726static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf *buf)
2727{
2728 struct wm_adsp_alg_region *alg_region;
2729 struct wm_adsp *dsp = buf->dsp;
2730 u32 xmalg, addr, magic;
2731 int i, ret;
2732
2733 alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id);
2734 xmalg = sizeof(struct wm_adsp_system_config_xm_hdr) / sizeof(__be32);
2735
2736 addr = alg_region->base + xmalg + ALG_XM_FIELD(magic);
2737 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic);
2738 if (ret < 0)
2739 return ret;
2740
2741 if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC)
2742 return -EINVAL;
2743
2744 addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr);
2745 for (i = 0; i < 5; ++i) {
2746 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr,
2747 &buf->host_buf_ptr);
2748 if (ret < 0)
2749 return ret;
2750
2751 if (buf->host_buf_ptr)
2752 break;
2753
2754 usleep_range(1000, 2000);
2755 }
2756
2757 if (!buf->host_buf_ptr)
2758 return -EIO;
2759
2760 adsp_dbg(dsp, "host_buf_ptr=%x\n", buf->host_buf_ptr);
2761
2762 return 0;
2763}
2764
2765static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf)
2766{
2767 const struct wm_adsp_fw_caps *caps = wm_adsp_fw[buf->dsp->fw].caps;
2768 struct wm_adsp_buffer_region *region;
2769 u32 offset = 0;
2770 int i, ret;
2771
2772 for (i = 0; i < caps->num_regions; ++i) {
2773 region = &buf->regions[i];
2774
2775 region->offset = offset;
2776 region->mem_type = caps->region_defs[i].mem_type;
2777
2778 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset,
2779 &region->base_addr);
2780 if (ret < 0)
2781 return ret;
2782
2783 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset,
2784 &offset);
2785 if (ret < 0)
2786 return ret;
2787
2788 region->cumulative_size = offset;
2789
2790 adsp_dbg(buf->dsp,
2791 "region=%d type=%d base=%04x off=%04x size=%04x\n",
2792 i, region->mem_type, region->base_addr,
2793 region->offset, region->cumulative_size);
2794 }
2795
2796 return 0;
2797}
2798
2799static int wm_adsp_buffer_init(struct wm_adsp *dsp)
2800{
2801 struct wm_adsp_compr_buf *buf;
2802 int ret;
2803
2804 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
2805 if (!buf)
2806 return -ENOMEM;
2807
2808 buf->dsp = dsp;
Charles Keepax565ace42016-01-06 12:33:18 +00002809 buf->read_index = -1;
2810 buf->irq_count = 0xFFFFFFFF;
Charles Keepax2cd19bd2015-12-15 11:29:46 +00002811
2812 ret = wm_adsp_buffer_locate(buf);
2813 if (ret < 0) {
2814 adsp_err(dsp, "Failed to acquire host buffer: %d\n", ret);
2815 goto err_buffer;
2816 }
2817
2818 buf->regions = kcalloc(wm_adsp_fw[dsp->fw].caps->num_regions,
2819 sizeof(*buf->regions), GFP_KERNEL);
2820 if (!buf->regions) {
2821 ret = -ENOMEM;
2822 goto err_buffer;
2823 }
2824
2825 ret = wm_adsp_buffer_populate(buf);
2826 if (ret < 0) {
2827 adsp_err(dsp, "Failed to populate host buffer: %d\n", ret);
2828 goto err_regions;
2829 }
2830
2831 dsp->buffer = buf;
2832
2833 return 0;
2834
2835err_regions:
2836 kfree(buf->regions);
2837err_buffer:
2838 kfree(buf);
2839 return ret;
2840}
2841
2842static int wm_adsp_buffer_free(struct wm_adsp *dsp)
2843{
2844 if (dsp->buffer) {
Charles Keepax721be3b2016-05-04 17:11:56 +01002845 wm_adsp_compr_detach(dsp->buffer->compr);
2846
Charles Keepax2cd19bd2015-12-15 11:29:46 +00002847 kfree(dsp->buffer->regions);
2848 kfree(dsp->buffer);
2849
2850 dsp->buffer = NULL;
2851 }
2852
2853 return 0;
2854}
2855
Charles Keepax95fe9592015-12-15 11:29:47 +00002856int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd)
2857{
2858 struct wm_adsp_compr *compr = stream->runtime->private_data;
2859 struct wm_adsp *dsp = compr->dsp;
2860 int ret = 0;
2861
2862 adsp_dbg(dsp, "Trigger: %d\n", cmd);
2863
2864 mutex_lock(&dsp->pwr_lock);
2865
2866 switch (cmd) {
2867 case SNDRV_PCM_TRIGGER_START:
2868 if (wm_adsp_compr_attached(compr))
2869 break;
2870
2871 ret = wm_adsp_compr_attach(compr);
2872 if (ret < 0) {
2873 adsp_err(dsp, "Failed to link buffer and stream: %d\n",
2874 ret);
2875 break;
2876 }
Charles Keepax565ace42016-01-06 12:33:18 +00002877
2878 /* Trigger the IRQ at one fragment of data */
2879 ret = wm_adsp_buffer_write(compr->buf,
2880 HOST_BUFFER_FIELD(high_water_mark),
2881 wm_adsp_compr_frag_words(compr));
2882 if (ret < 0) {
2883 adsp_err(dsp, "Failed to set high water mark: %d\n",
2884 ret);
2885 break;
2886 }
Charles Keepax95fe9592015-12-15 11:29:47 +00002887 break;
2888 case SNDRV_PCM_TRIGGER_STOP:
2889 break;
2890 default:
2891 ret = -EINVAL;
2892 break;
2893 }
2894
2895 mutex_unlock(&dsp->pwr_lock);
2896
2897 return ret;
2898}
2899EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger);
2900
Charles Keepax565ace42016-01-06 12:33:18 +00002901static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf)
2902{
2903 int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1;
2904
2905 return buf->regions[last_region].cumulative_size;
2906}
2907
2908static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf)
2909{
2910 u32 next_read_index, next_write_index;
2911 int write_index, read_index, avail;
2912 int ret;
2913
2914 /* Only sync read index if we haven't already read a valid index */
2915 if (buf->read_index < 0) {
2916 ret = wm_adsp_buffer_read(buf,
2917 HOST_BUFFER_FIELD(next_read_index),
2918 &next_read_index);
2919 if (ret < 0)
2920 return ret;
2921
2922 read_index = sign_extend32(next_read_index, 23);
2923
2924 if (read_index < 0) {
2925 adsp_dbg(buf->dsp, "Avail check on unstarted stream\n");
2926 return 0;
2927 }
2928
2929 buf->read_index = read_index;
2930 }
2931
2932 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index),
2933 &next_write_index);
2934 if (ret < 0)
2935 return ret;
2936
2937 write_index = sign_extend32(next_write_index, 23);
2938
2939 avail = write_index - buf->read_index;
2940 if (avail < 0)
2941 avail += wm_adsp_buffer_size(buf);
2942
2943 adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
Charles Keepax33d740e2016-03-28 14:29:21 +01002944 buf->read_index, write_index, avail * WM_ADSP_DATA_WORD_SIZE);
Charles Keepax565ace42016-01-06 12:33:18 +00002945
2946 buf->avail = avail;
2947
2948 return 0;
2949}
2950
Charles Keepax9771b182016-04-06 11:21:53 +01002951static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf *buf)
2952{
2953 int ret;
2954
2955 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);
2956 if (ret < 0) {
2957 adsp_err(buf->dsp, "Failed to check buffer error: %d\n", ret);
2958 return ret;
2959 }
2960 if (buf->error != 0) {
2961 adsp_err(buf->dsp, "Buffer error occurred: %d\n", buf->error);
2962 return -EIO;
2963 }
2964
2965 return 0;
2966}
2967
Charles Keepax565ace42016-01-06 12:33:18 +00002968int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)
2969{
Charles Keepax612047f2016-03-28 14:29:22 +01002970 struct wm_adsp_compr_buf *buf;
2971 struct wm_adsp_compr *compr;
Charles Keepax565ace42016-01-06 12:33:18 +00002972 int ret = 0;
2973
2974 mutex_lock(&dsp->pwr_lock);
2975
Charles Keepax612047f2016-03-28 14:29:22 +01002976 buf = dsp->buffer;
2977 compr = dsp->compr;
2978
Charles Keepax565ace42016-01-06 12:33:18 +00002979 if (!buf) {
Charles Keepax565ace42016-01-06 12:33:18 +00002980 ret = -ENODEV;
2981 goto out;
2982 }
2983
2984 adsp_dbg(dsp, "Handling buffer IRQ\n");
2985
Charles Keepax9771b182016-04-06 11:21:53 +01002986 ret = wm_adsp_buffer_get_error(buf);
2987 if (ret < 0)
Charles Keepax58476092016-04-06 11:21:54 +01002988 goto out_notify; /* Wake poll to report error */
Charles Keepax565ace42016-01-06 12:33:18 +00002989
2990 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),
2991 &buf->irq_count);
2992 if (ret < 0) {
2993 adsp_err(dsp, "Failed to get irq_count: %d\n", ret);
2994 goto out;
2995 }
2996
2997 ret = wm_adsp_buffer_update_avail(buf);
2998 if (ret < 0) {
2999 adsp_err(dsp, "Error reading avail: %d\n", ret);
3000 goto out;
3001 }
3002
Charles Keepax58476092016-04-06 11:21:54 +01003003out_notify:
Charles Keepaxc7dae7c2016-02-19 14:44:41 +00003004 if (compr && compr->stream)
Charles Keepax83a40ce2016-01-06 12:33:19 +00003005 snd_compr_fragment_elapsed(compr->stream);
3006
Charles Keepax565ace42016-01-06 12:33:18 +00003007out:
3008 mutex_unlock(&dsp->pwr_lock);
3009
3010 return ret;
3011}
3012EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq);
3013
3014static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf)
3015{
3016 if (buf->irq_count & 0x01)
3017 return 0;
3018
3019 adsp_dbg(buf->dsp, "Enable IRQ(0x%x) for next fragment\n",
3020 buf->irq_count);
3021
3022 buf->irq_count |= 0x01;
3023
3024 return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack),
3025 buf->irq_count);
3026}
3027
3028int wm_adsp_compr_pointer(struct snd_compr_stream *stream,
3029 struct snd_compr_tstamp *tstamp)
3030{
3031 struct wm_adsp_compr *compr = stream->runtime->private_data;
Charles Keepax565ace42016-01-06 12:33:18 +00003032 struct wm_adsp *dsp = compr->dsp;
Charles Keepax612047f2016-03-28 14:29:22 +01003033 struct wm_adsp_compr_buf *buf;
Charles Keepax565ace42016-01-06 12:33:18 +00003034 int ret = 0;
3035
3036 adsp_dbg(dsp, "Pointer request\n");
3037
3038 mutex_lock(&dsp->pwr_lock);
3039
Charles Keepax612047f2016-03-28 14:29:22 +01003040 buf = compr->buf;
3041
Charles Keepax28ee3d72016-06-13 14:17:12 +01003042 if (!compr->buf || compr->buf->error) {
Charles Keepax8d280662016-06-13 14:17:11 +01003043 snd_compr_stop_error(stream, SNDRV_PCM_STATE_XRUN);
Charles Keepax565ace42016-01-06 12:33:18 +00003044 ret = -EIO;
3045 goto out;
3046 }
3047
3048 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
3049 ret = wm_adsp_buffer_update_avail(buf);
3050 if (ret < 0) {
3051 adsp_err(dsp, "Error reading avail: %d\n", ret);
3052 goto out;
3053 }
3054
3055 /*
3056 * If we really have less than 1 fragment available tell the
3057 * DSP to inform us once a whole fragment is available.
3058 */
3059 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
Charles Keepax58476092016-04-06 11:21:54 +01003060 ret = wm_adsp_buffer_get_error(buf);
Charles Keepax8d280662016-06-13 14:17:11 +01003061 if (ret < 0) {
3062 if (compr->buf->error)
3063 snd_compr_stop_error(stream,
3064 SNDRV_PCM_STATE_XRUN);
Charles Keepax58476092016-04-06 11:21:54 +01003065 goto out;
Charles Keepax8d280662016-06-13 14:17:11 +01003066 }
Charles Keepax58476092016-04-06 11:21:54 +01003067
Charles Keepax565ace42016-01-06 12:33:18 +00003068 ret = wm_adsp_buffer_reenable_irq(buf);
3069 if (ret < 0) {
3070 adsp_err(dsp,
3071 "Failed to re-enable buffer IRQ: %d\n",
3072 ret);
3073 goto out;
3074 }
3075 }
3076 }
3077
3078 tstamp->copied_total = compr->copied_total;
3079 tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE;
Charles Keepaxda2b3352016-02-02 16:41:36 +00003080 tstamp->sampling_rate = compr->sample_rate;
Charles Keepax565ace42016-01-06 12:33:18 +00003081
3082out:
3083 mutex_unlock(&dsp->pwr_lock);
3084
3085 return ret;
3086}
3087EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer);
3088
Charles Keepax83a40ce2016-01-06 12:33:19 +00003089static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target)
3090{
3091 struct wm_adsp_compr_buf *buf = compr->buf;
3092 u8 *pack_in = (u8 *)compr->raw_buf;
3093 u8 *pack_out = (u8 *)compr->raw_buf;
3094 unsigned int adsp_addr;
3095 int mem_type, nwords, max_read;
3096 int i, j, ret;
3097
3098 /* Calculate read parameters */
3099 for (i = 0; i < wm_adsp_fw[buf->dsp->fw].caps->num_regions; ++i)
3100 if (buf->read_index < buf->regions[i].cumulative_size)
3101 break;
3102
3103 if (i == wm_adsp_fw[buf->dsp->fw].caps->num_regions)
3104 return -EINVAL;
3105
3106 mem_type = buf->regions[i].mem_type;
3107 adsp_addr = buf->regions[i].base_addr +
3108 (buf->read_index - buf->regions[i].offset);
3109
3110 max_read = wm_adsp_compr_frag_words(compr);
3111 nwords = buf->regions[i].cumulative_size - buf->read_index;
3112
3113 if (nwords > target)
3114 nwords = target;
3115 if (nwords > buf->avail)
3116 nwords = buf->avail;
3117 if (nwords > max_read)
3118 nwords = max_read;
3119 if (!nwords)
3120 return 0;
3121
3122 /* Read data from DSP */
3123 ret = wm_adsp_read_data_block(buf->dsp, mem_type, adsp_addr,
3124 nwords, compr->raw_buf);
3125 if (ret < 0)
3126 return ret;
3127
3128 /* Remove the padding bytes from the data read from the DSP */
3129 for (i = 0; i < nwords; i++) {
3130 for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++)
3131 *pack_out++ = *pack_in++;
3132
3133 pack_in += sizeof(*(compr->raw_buf)) - WM_ADSP_DATA_WORD_SIZE;
3134 }
3135
3136 /* update read index to account for words read */
3137 buf->read_index += nwords;
3138 if (buf->read_index == wm_adsp_buffer_size(buf))
3139 buf->read_index = 0;
3140
3141 ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index),
3142 buf->read_index);
3143 if (ret < 0)
3144 return ret;
3145
3146 /* update avail to account for words read */
3147 buf->avail -= nwords;
3148
3149 return nwords;
3150}
3151
3152static int wm_adsp_compr_read(struct wm_adsp_compr *compr,
3153 char __user *buf, size_t count)
3154{
3155 struct wm_adsp *dsp = compr->dsp;
3156 int ntotal = 0;
3157 int nwords, nbytes;
3158
3159 adsp_dbg(dsp, "Requested read of %zu bytes\n", count);
3160
Charles Keepax28ee3d72016-06-13 14:17:12 +01003161 if (!compr->buf || compr->buf->error) {
Charles Keepax8d280662016-06-13 14:17:11 +01003162 snd_compr_stop_error(compr->stream, SNDRV_PCM_STATE_XRUN);
Charles Keepax83a40ce2016-01-06 12:33:19 +00003163 return -EIO;
Charles Keepax8d280662016-06-13 14:17:11 +01003164 }
Charles Keepax83a40ce2016-01-06 12:33:19 +00003165
3166 count /= WM_ADSP_DATA_WORD_SIZE;
3167
3168 do {
3169 nwords = wm_adsp_buffer_capture_block(compr, count);
3170 if (nwords < 0) {
3171 adsp_err(dsp, "Failed to capture block: %d\n", nwords);
3172 return nwords;
3173 }
3174
3175 nbytes = nwords * WM_ADSP_DATA_WORD_SIZE;
3176
3177 adsp_dbg(dsp, "Read %d bytes\n", nbytes);
3178
3179 if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) {
3180 adsp_err(dsp, "Failed to copy data to user: %d, %d\n",
3181 ntotal, nbytes);
3182 return -EFAULT;
3183 }
3184
3185 count -= nwords;
3186 ntotal += nbytes;
3187 } while (nwords > 0 && count > 0);
3188
3189 compr->copied_total += ntotal;
3190
3191 return ntotal;
3192}
3193
3194int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf,
3195 size_t count)
3196{
3197 struct wm_adsp_compr *compr = stream->runtime->private_data;
3198 struct wm_adsp *dsp = compr->dsp;
3199 int ret;
3200
3201 mutex_lock(&dsp->pwr_lock);
3202
3203 if (stream->direction == SND_COMPRESS_CAPTURE)
3204 ret = wm_adsp_compr_read(compr, buf, count);
3205 else
3206 ret = -ENOTSUPP;
3207
3208 mutex_unlock(&dsp->pwr_lock);
3209
3210 return ret;
3211}
3212EXPORT_SYMBOL_GPL(wm_adsp_compr_copy);
3213
Praveen Diwakar0a37c6e2014-07-04 11:17:41 +05303214MODULE_LICENSE("GPL v2");