blob: 7d4d01786daa79c770f3dec44cd698d7cc0b42bd [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080032#include "drmP.h"
33#include "drm.h"
34#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080035#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010036#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drm.h"
38#include "i915_drv.h"
39#include "intel_sdvo_regs.h"
40
Zhenyu Wang14571b42010-03-30 14:06:33 +080041#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010044#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080045
46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040047 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080048
49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000050#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080051#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010052#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010053#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080054
Jesse Barnes79e53942008-11-07 14:24:08 -080055
Chris Wilson2e88e402010-08-07 11:01:27 +010056static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080057 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64};
65
66#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
Chris Wilsonea5b2132010-08-04 13:50:23 +010068struct intel_sdvo {
69 struct intel_encoder base;
70
Chris Wilsonf899fc62010-07-20 15:44:45 -070071 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070072 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073
Chris Wilsone957d772010-09-24 12:52:03 +010074 struct i2c_adapter ddc;
75
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010077 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080078
Jesse Barnese2f0ba92009-02-02 15:11:52 -080079 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080081
Jesse Barnese2f0ba92009-02-02 15:11:52 -080082 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
Jesse Barnes79e53942008-11-07 14:24:08 -080086 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080087
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080089 int pixel_clock_min, pixel_clock_max;
90
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080091 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
Simon Farnsworthcc68c812011-09-21 17:13:30 +010097 /*
98 * Hotplug activation bits for this device
99 */
100 uint8_t hotplug_active[2];
101
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800102 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
Daniel Vettereef4eac2012-03-23 23:43:35 +0100117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
Zhao Yakuice6feab2009-08-24 13:50:26 +0800120 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100121 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800129
Ma Ling7086c872009-05-13 11:20:06 +0800130 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800133 */
134 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800135
136 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800137 * This is sdvo fixed pannel mode pointer
138 */
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
140
Eric Anholtc751ce42010-03-25 11:48:48 -0700141 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800142 uint8_t ddc_bus;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800143};
144
145struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100146 struct intel_connector base;
147
Zhenyu Wang14571b42010-03-30 14:06:33 +0800148 /* Mark the type of connector */
149 uint16_t output_flag;
150
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100151 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100152
Zhenyu Wang14571b42010-03-30 14:06:33 +0800153 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100154 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800155 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100156 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800157
Zhao Yakuib9219c52009-09-10 15:45:46 +0800158 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100159 struct drm_property *left;
160 struct drm_property *right;
161 struct drm_property *top;
162 struct drm_property *bottom;
163 struct drm_property *hpos;
164 struct drm_property *vpos;
165 struct drm_property *contrast;
166 struct drm_property *saturation;
167 struct drm_property *hue;
168 struct drm_property *sharpness;
169 struct drm_property *flicker_filter;
170 struct drm_property *flicker_filter_adaptive;
171 struct drm_property *flicker_filter_2d;
172 struct drm_property *tv_chroma_filter;
173 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100174 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800175
176 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100177 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800178
179 /* Add variable to record current setting for the above property */
180 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100181
Zhao Yakuib9219c52009-09-10 15:45:46 +0800182 /* this is to get the range of margin.*/
183 u32 max_hscan, max_vscan;
184 u32 max_hpos, cur_hpos;
185 u32 max_vpos, cur_vpos;
186 u32 cur_brightness, max_brightness;
187 u32 cur_contrast, max_contrast;
188 u32 cur_saturation, max_saturation;
189 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100190 u32 cur_sharpness, max_sharpness;
191 u32 cur_flicker_filter, max_flicker_filter;
192 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
193 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
194 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
195 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100196 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800197};
198
Chris Wilson890f3352010-09-14 16:46:59 +0100199static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100200{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100201 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100202}
203
Chris Wilsondf0e9242010-09-09 16:20:55 +0100204static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
205{
206 return container_of(intel_attached_encoder(connector),
207 struct intel_sdvo, base);
208}
209
Chris Wilson615fb932010-08-04 13:50:24 +0100210static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
211{
212 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
213}
214
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800215static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100216intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100217static bool
218intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
219 struct intel_sdvo_connector *intel_sdvo_connector,
220 int type);
221static bool
222intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800224
Jesse Barnes79e53942008-11-07 14:24:08 -0800225/**
226 * Writes the SDVOB or SDVOC with the given value, but always writes both
227 * SDVOB and SDVOC to work around apparent hardware issues (according to
228 * comments in the BIOS).
229 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100230static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800231{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100232 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800233 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800234 u32 bval = val, cval = val;
235 int i;
236
Chris Wilsonea5b2132010-08-04 13:50:23 +0100237 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
238 I915_WRITE(intel_sdvo->sdvo_reg, val);
239 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800240 return;
241 }
242
Chris Wilsonea5b2132010-08-04 13:50:23 +0100243 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800244 cval = I915_READ(SDVOC);
245 } else {
246 bval = I915_READ(SDVOB);
247 }
248 /*
249 * Write the registers twice for luck. Sometimes,
250 * writing them only once doesn't appear to 'stick'.
251 * The BIOS does this too. Yay, magic
252 */
253 for (i = 0; i < 2; i++)
254 {
255 I915_WRITE(SDVOB, bval);
256 I915_READ(SDVOB);
257 I915_WRITE(SDVOC, cval);
258 I915_READ(SDVOC);
259 }
260}
261
Chris Wilson32aad862010-08-04 13:50:25 +0100262static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800263{
Jesse Barnes79e53942008-11-07 14:24:08 -0800264 struct i2c_msg msgs[] = {
265 {
Chris Wilsone957d772010-09-24 12:52:03 +0100266 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800267 .flags = 0,
268 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100269 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800270 },
271 {
Chris Wilsone957d772010-09-24 12:52:03 +0100272 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800273 .flags = I2C_M_RD,
274 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100275 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800276 }
277 };
Chris Wilson32aad862010-08-04 13:50:25 +0100278 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800279
Chris Wilsonf899fc62010-07-20 15:44:45 -0700280 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800281 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800282
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800283 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800284 return false;
285}
286
Jesse Barnes79e53942008-11-07 14:24:08 -0800287#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100289static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800290 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100291 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800292} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100336
Akshay Joshi0206e352011-08-16 15:34:10 -0400337 /* Add the op code for SDVO enhancements */
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100382
Akshay Joshi0206e352011-08-16 15:34:10 -0400383 /* HDMI op code */
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800404};
405
Daniel Vettereef4eac2012-03-23 23:43:35 +0100406#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800407
Chris Wilsonea5b2132010-08-04 13:50:23 +0100408static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100409 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800410{
Jesse Barnes79e53942008-11-07 14:24:08 -0800411 int i;
412
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800413 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100414 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800415 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800416 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800417 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800418 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400419 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800420 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800421 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800422 break;
423 }
424 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400425 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800426 DRM_LOG_KMS("(%02X)", cmd);
427 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800428}
Jesse Barnes79e53942008-11-07 14:24:08 -0800429
Jesse Barnes79e53942008-11-07 14:24:08 -0800430static const char *cmd_status_names[] = {
431 "Power on",
432 "Success",
433 "Not supported",
434 "Invalid arg",
435 "Pending",
436 "Target not specified",
437 "Scaling not supported"
438};
439
Chris Wilsone957d772010-09-24 12:52:03 +0100440static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
441 const void *args, int args_len)
442{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700443 u8 *buf, status;
444 struct i2c_msg *msgs;
445 int i, ret = true;
446
447 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
448 if (!buf)
449 return false;
450
451 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
452 if (!msgs)
453 return false;
Chris Wilsone957d772010-09-24 12:52:03 +0100454
455 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
456
457 for (i = 0; i < args_len; i++) {
458 msgs[i].addr = intel_sdvo->slave_addr;
459 msgs[i].flags = 0;
460 msgs[i].len = 2;
461 msgs[i].buf = buf + 2 *i;
462 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
463 buf[2*i + 1] = ((u8*)args)[i];
464 }
465 msgs[i].addr = intel_sdvo->slave_addr;
466 msgs[i].flags = 0;
467 msgs[i].len = 2;
468 msgs[i].buf = buf + 2*i;
469 buf[2*i + 0] = SDVO_I2C_OPCODE;
470 buf[2*i + 1] = cmd;
471
472 /* the following two are to read the response */
473 status = SDVO_I2C_CMD_STATUS;
474 msgs[i+1].addr = intel_sdvo->slave_addr;
475 msgs[i+1].flags = 0;
476 msgs[i+1].len = 1;
477 msgs[i+1].buf = &status;
478
479 msgs[i+2].addr = intel_sdvo->slave_addr;
480 msgs[i+2].flags = I2C_M_RD;
481 msgs[i+2].len = 1;
482 msgs[i+2].buf = &status;
483
484 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
485 if (ret < 0) {
486 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700487 ret = false;
488 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100489 }
490 if (ret != i+3) {
491 /* failure in I2C transfer */
492 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700493 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100494 }
495
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700496out:
497 kfree(msgs);
498 kfree(buf);
499 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100500}
501
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100502static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
503 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800504{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100505 u8 retry = 5;
506 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800507 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800508
Chris Wilsond121a5d2011-01-25 15:00:01 +0000509 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
510
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100511 /*
512 * The documentation states that all commands will be
513 * processed within 15µs, and that we need only poll
514 * the status byte a maximum of 3 times in order for the
515 * command to be complete.
516 *
517 * Check 5 times in case the hardware failed to read the docs.
518 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000519 if (!intel_sdvo_read_byte(intel_sdvo,
520 SDVO_I2C_CMD_STATUS,
521 &status))
522 goto log_fail;
523
524 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
525 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100526 if (!intel_sdvo_read_byte(intel_sdvo,
527 SDVO_I2C_CMD_STATUS,
528 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000529 goto log_fail;
530 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100531
Jesse Barnes79e53942008-11-07 14:24:08 -0800532 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800533 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800534 else
yakui_zhao342dc382009-06-02 14:12:00 +0800535 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800536
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100537 if (status != SDVO_CMD_STATUS_SUCCESS)
538 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800539
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100540 /* Read the command response */
541 for (i = 0; i < response_len; i++) {
542 if (!intel_sdvo_read_byte(intel_sdvo,
543 SDVO_I2C_RETURN_0 + i,
544 &((u8 *)response)[i]))
545 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100546 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800547 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100548 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100549 return true;
550
551log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000552 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100553 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800554}
555
Hannes Ederb358d0a2008-12-18 21:18:47 +0100556static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800557{
558 if (mode->clock >= 100000)
559 return 1;
560 else if (mode->clock >= 50000)
561 return 2;
562 else
563 return 4;
564}
565
Chris Wilsone957d772010-09-24 12:52:03 +0100566static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
567 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800568{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000569 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100570 return intel_sdvo_write_cmd(intel_sdvo,
571 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
572 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800573}
574
Chris Wilson32aad862010-08-04 13:50:25 +0100575static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
576{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000577 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
578 return false;
579
580 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100581}
582
583static bool
584intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
585{
586 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
587 return false;
588
589 return intel_sdvo_read_response(intel_sdvo, value, len);
590}
591
592static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800593{
594 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100595 return intel_sdvo_set_value(intel_sdvo,
596 SDVO_CMD_SET_TARGET_INPUT,
597 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800598}
599
600/**
601 * Return whether each input is trained.
602 *
603 * This function is making an assumption about the layout of the response,
604 * which should be checked against the docs.
605 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100606static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800607{
608 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800609
Chris Wilson1a3665c2011-01-25 13:59:37 +0000610 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100611 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
612 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800613 return false;
614
615 *input_1 = response.input0_trained;
616 *input_2 = response.input1_trained;
617 return true;
618}
619
Chris Wilsonea5b2132010-08-04 13:50:23 +0100620static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800621 u16 outputs)
622{
Chris Wilson32aad862010-08-04 13:50:25 +0100623 return intel_sdvo_set_value(intel_sdvo,
624 SDVO_CMD_SET_ACTIVE_OUTPUTS,
625 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800626}
627
Chris Wilsonea5b2132010-08-04 13:50:23 +0100628static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800629 int mode)
630{
Chris Wilson32aad862010-08-04 13:50:25 +0100631 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800632
633 switch (mode) {
634 case DRM_MODE_DPMS_ON:
635 state = SDVO_ENCODER_STATE_ON;
636 break;
637 case DRM_MODE_DPMS_STANDBY:
638 state = SDVO_ENCODER_STATE_STANDBY;
639 break;
640 case DRM_MODE_DPMS_SUSPEND:
641 state = SDVO_ENCODER_STATE_SUSPEND;
642 break;
643 case DRM_MODE_DPMS_OFF:
644 state = SDVO_ENCODER_STATE_OFF;
645 break;
646 }
647
Chris Wilson32aad862010-08-04 13:50:25 +0100648 return intel_sdvo_set_value(intel_sdvo,
649 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800650}
651
Chris Wilsonea5b2132010-08-04 13:50:23 +0100652static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800653 int *clock_min,
654 int *clock_max)
655{
656 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800657
Chris Wilson1a3665c2011-01-25 13:59:37 +0000658 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100659 if (!intel_sdvo_get_value(intel_sdvo,
660 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
661 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800662 return false;
663
664 /* Convert the values from units of 10 kHz to kHz. */
665 *clock_min = clocks.min * 10;
666 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800667 return true;
668}
669
Chris Wilsonea5b2132010-08-04 13:50:23 +0100670static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800671 u16 outputs)
672{
Chris Wilson32aad862010-08-04 13:50:25 +0100673 return intel_sdvo_set_value(intel_sdvo,
674 SDVO_CMD_SET_TARGET_OUTPUT,
675 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800676}
677
Chris Wilsonea5b2132010-08-04 13:50:23 +0100678static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800679 struct intel_sdvo_dtd *dtd)
680{
Chris Wilson32aad862010-08-04 13:50:25 +0100681 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
682 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800683}
684
Chris Wilsonea5b2132010-08-04 13:50:23 +0100685static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800686 struct intel_sdvo_dtd *dtd)
687{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100688 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800689 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
690}
691
Chris Wilsonea5b2132010-08-04 13:50:23 +0100692static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800693 struct intel_sdvo_dtd *dtd)
694{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100695 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800696 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
697}
698
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800699static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100700intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800701 uint16_t clock,
702 uint16_t width,
703 uint16_t height)
704{
705 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800706
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800707 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800708 args.clock = clock;
709 args.width = width;
710 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800711 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800712
Chris Wilsonea5b2132010-08-04 13:50:23 +0100713 if (intel_sdvo->is_lvds &&
714 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
715 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800716 args.scaled = 1;
717
Chris Wilson32aad862010-08-04 13:50:25 +0100718 return intel_sdvo_set_value(intel_sdvo,
719 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
720 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800721}
722
Chris Wilsonea5b2132010-08-04 13:50:23 +0100723static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800724 struct intel_sdvo_dtd *dtd)
725{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000726 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
727 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100728 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
729 &dtd->part1, sizeof(dtd->part1)) &&
730 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
731 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800732}
Jesse Barnes79e53942008-11-07 14:24:08 -0800733
Chris Wilsonea5b2132010-08-04 13:50:23 +0100734static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800735{
Chris Wilson32aad862010-08-04 13:50:25 +0100736 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800737}
738
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800739static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100740 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800741{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800742 uint16_t width, height;
743 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
744 uint16_t h_sync_offset, v_sync_offset;
Daniel Vetter66518192012-04-01 19:16:18 +0200745 int mode_clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800746
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200747 width = mode->hdisplay;
748 height = mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800749
750 /* do some mode translations */
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200751 h_blank_len = mode->htotal - mode->hdisplay;
752 h_sync_len = mode->hsync_end - mode->hsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800753
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200754 v_blank_len = mode->vtotal - mode->vdisplay;
755 v_sync_len = mode->vsync_end - mode->vsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800756
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200757 h_sync_offset = mode->hsync_start - mode->hdisplay;
758 v_sync_offset = mode->vsync_start - mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800759
Daniel Vetter66518192012-04-01 19:16:18 +0200760 mode_clock = mode->clock;
761 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
762 mode_clock /= 10;
763 dtd->part1.clock = mode_clock;
764
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800765 dtd->part1.h_active = width & 0xff;
766 dtd->part1.h_blank = h_blank_len & 0xff;
767 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800768 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800769 dtd->part1.v_active = height & 0xff;
770 dtd->part1.v_blank = v_blank_len & 0xff;
771 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800772 ((v_blank_len >> 8) & 0xf);
773
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800774 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800775 dtd->part2.h_sync_width = h_sync_len & 0xff;
776 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800777 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800778 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800779 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
780 ((v_sync_len & 0x30) >> 4);
781
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800782 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800783 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800784 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800785 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800786 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800787
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800788 dtd->part2.sdvo_flags = 0;
789 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
790 dtd->part2.reserved = 0;
791}
Jesse Barnes79e53942008-11-07 14:24:08 -0800792
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800793static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100794 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800795{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800796 mode->hdisplay = dtd->part1.h_active;
797 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
798 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800799 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800800 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
801 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
802 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
803 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
804
805 mode->vdisplay = dtd->part1.v_active;
806 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
807 mode->vsync_start = mode->vdisplay;
808 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800809 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800810 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
811 mode->vsync_end = mode->vsync_start +
812 (dtd->part2.v_sync_off_width & 0xf);
813 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
814 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
815 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
816
817 mode->clock = dtd->part1.clock * 10;
818
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800819 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800820 if (dtd->part2.dtd_flags & 0x2)
821 mode->flags |= DRM_MODE_FLAG_PHSYNC;
822 if (dtd->part2.dtd_flags & 0x4)
823 mode->flags |= DRM_MODE_FLAG_PVSYNC;
824}
825
Chris Wilsone27d8532010-10-22 09:15:22 +0100826static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800827{
Chris Wilsone27d8532010-10-22 09:15:22 +0100828 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800829
Chris Wilson1a3665c2011-01-25 13:59:37 +0000830 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100831 return intel_sdvo_get_value(intel_sdvo,
832 SDVO_CMD_GET_SUPP_ENCODE,
833 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800834}
835
Chris Wilsonea5b2132010-08-04 13:50:23 +0100836static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700837 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800838{
Chris Wilson32aad862010-08-04 13:50:25 +0100839 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800840}
841
Chris Wilsonea5b2132010-08-04 13:50:23 +0100842static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800843 uint8_t mode)
844{
Chris Wilson32aad862010-08-04 13:50:25 +0100845 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800846}
847
848#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100849static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800850{
851 int i, j;
852 uint8_t set_buf_index[2];
853 uint8_t av_split;
854 uint8_t buf_size;
855 uint8_t buf[48];
856 uint8_t *pos;
857
Chris Wilson32aad862010-08-04 13:50:25 +0100858 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800859
860 for (i = 0; i <= av_split; i++) {
861 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700862 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800863 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700864 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
865 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800866
867 pos = buf;
868 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700869 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800870 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700871 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800872 pos += 8;
873 }
874 }
875}
876#endif
877
David Härdeman3c17fe42010-09-24 21:44:32 +0200878static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800879{
880 struct dip_infoframe avi_if = {
881 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200882 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800883 .len = DIP_LEN_AVI,
884 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200885 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
886 uint8_t set_buf_index[2] = { 1, 0 };
Daniel Vetter81014b92012-05-12 20:22:00 +0200887 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
888 uint64_t *data = (uint64_t *)sdvo_data;
David Härdeman3c17fe42010-09-24 21:44:32 +0200889 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800890
David Härdeman3c17fe42010-09-24 21:44:32 +0200891 intel_dip_infoframe_csum(&avi_if);
892
Daniel Vetter81014b92012-05-12 20:22:00 +0200893 /* sdvo spec says that the ecc is handled by the hw, and it looks like
894 * we must not send the ecc field, either. */
895 memcpy(sdvo_data, &avi_if, 3);
896 sdvo_data[3] = avi_if.checksum;
897 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
898
Chris Wilsond121a5d2011-01-25 15:00:01 +0000899 if (!intel_sdvo_set_value(intel_sdvo,
900 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200901 set_buf_index, 2))
902 return false;
903
Daniel Vetter81014b92012-05-12 20:22:00 +0200904 for (i = 0; i < sizeof(sdvo_data); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000905 if (!intel_sdvo_set_value(intel_sdvo,
906 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200907 data, 8))
908 return false;
909 data++;
910 }
911
Chris Wilsond121a5d2011-01-25 15:00:01 +0000912 return intel_sdvo_set_value(intel_sdvo,
913 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200914 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800915}
916
Chris Wilson32aad862010-08-04 13:50:25 +0100917static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800918{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800919 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100920 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800921
Chris Wilson40039752010-08-04 13:50:26 +0100922 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800923 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100924 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800925
Chris Wilson32aad862010-08-04 13:50:25 +0100926 BUILD_BUG_ON(sizeof(format) != 6);
927 return intel_sdvo_set_value(intel_sdvo,
928 SDVO_CMD_SET_TV_FORMAT,
929 &format, sizeof(format));
930}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800931
Chris Wilson32aad862010-08-04 13:50:25 +0100932static bool
933intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
934 struct drm_display_mode *mode)
935{
936 struct intel_sdvo_dtd output_dtd;
937
938 if (!intel_sdvo_set_target_output(intel_sdvo,
939 intel_sdvo->attached_output))
940 return false;
941
942 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
943 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
944 return false;
945
946 return true;
947}
948
Daniel Vetterc9a29692012-04-10 13:55:47 +0200949/* Asks the sdvo controller for the preferred input mode given the output mode.
950 * Unfortunately we have to set up the full output mode to do that. */
Chris Wilson32aad862010-08-04 13:50:25 +0100951static bool
Daniel Vetterc9a29692012-04-10 13:55:47 +0200952intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
953 struct drm_display_mode *mode,
954 struct drm_display_mode *adjusted_mode)
Chris Wilson32aad862010-08-04 13:50:25 +0100955{
Daniel Vetterc9a29692012-04-10 13:55:47 +0200956 struct intel_sdvo_dtd input_dtd;
957
Chris Wilson32aad862010-08-04 13:50:25 +0100958 /* Reset the input timing to the screen. Assume always input 0. */
959 if (!intel_sdvo_set_target_input(intel_sdvo))
960 return false;
961
962 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
963 mode->clock / 10,
964 mode->hdisplay,
965 mode->vdisplay))
966 return false;
967
968 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Daniel Vetterc9a29692012-04-10 13:55:47 +0200969 &input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100970 return false;
971
Daniel Vetterc9a29692012-04-10 13:55:47 +0200972 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100973
Chris Wilson32aad862010-08-04 13:50:25 +0100974 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800975}
976
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800977static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
978 struct drm_display_mode *mode,
979 struct drm_display_mode *adjusted_mode)
980{
Chris Wilson890f3352010-09-14 16:46:59 +0100981 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100982 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800983
Chris Wilson32aad862010-08-04 13:50:25 +0100984 /* We need to construct preferred input timings based on our
985 * output timings. To do that, we have to set the output
986 * timings, even though this isn't really the right place in
987 * the sequence to do it. Oh well.
988 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100989 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100990 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800991 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100992
Daniel Vetterc9a29692012-04-10 13:55:47 +0200993 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
994 mode,
995 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100996 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100997 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100998 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800999 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001000
Daniel Vetterc9a29692012-04-10 13:55:47 +02001001 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1002 mode,
1003 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001004 }
Chris Wilson32aad862010-08-04 13:50:25 +01001005
1006 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +01001007 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +01001008 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001009 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1010 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +01001011
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001012 return true;
1013}
1014
1015static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1016 struct drm_display_mode *mode,
1017 struct drm_display_mode *adjusted_mode)
1018{
1019 struct drm_device *dev = encoder->dev;
1020 struct drm_i915_private *dev_priv = dev->dev_private;
1021 struct drm_crtc *crtc = encoder->crtc;
1022 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +01001023 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001024 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001025 struct intel_sdvo_in_out_map in_out;
Daniel Vetter66518192012-04-01 19:16:18 +02001026 struct intel_sdvo_dtd input_dtd, output_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001027 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1028 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001029
1030 if (!mode)
1031 return;
1032
1033 /* First, set the input mapping for the first input to our controlled
1034 * output. This is only correct if we're a single-input device, in
1035 * which case the first input is the output from the appropriate SDVO
1036 * channel on the motherboard. In a two-input device, the first input
1037 * will be SDVOB and the second SDVOC.
1038 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001039 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001040 in_out.in1 = 0;
1041
Pavel Roskinc74696b2010-09-02 14:46:34 -04001042 intel_sdvo_set_value(intel_sdvo,
1043 SDVO_CMD_SET_IN_OUT_MAP,
1044 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001045
Chris Wilson6c9547f2010-08-25 10:05:17 +01001046 /* Set the output timings to the screen */
1047 if (!intel_sdvo_set_target_output(intel_sdvo,
1048 intel_sdvo->attached_output))
1049 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001050
Daniel Vetter66518192012-04-01 19:16:18 +02001051 /* lvds has a special fixed output timing. */
1052 if (intel_sdvo->is_lvds)
1053 intel_sdvo_get_dtd_from_mode(&output_dtd,
1054 intel_sdvo->sdvo_lvds_fixed_mode);
1055 else
1056 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1057 (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001058
1059 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001060 if (!intel_sdvo_set_target_input(intel_sdvo))
1061 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001062
Chris Wilson97aaf912011-01-04 20:10:52 +00001063 if (intel_sdvo->has_hdmi_monitor) {
1064 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1065 intel_sdvo_set_colorimetry(intel_sdvo,
1066 SDVO_COLORIMETRY_RGB256);
1067 intel_sdvo_set_avi_infoframe(intel_sdvo);
1068 } else
1069 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001070
Chris Wilson6c9547f2010-08-25 10:05:17 +01001071 if (intel_sdvo->is_tv &&
1072 !intel_sdvo_set_tv_format(intel_sdvo))
1073 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001074
Daniel Vetter66518192012-04-01 19:16:18 +02001075 /* We have tried to get input timing in mode_fixup, and filled into
1076 * adjusted_mode.
1077 */
1078 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001079 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001080
Chris Wilson6c9547f2010-08-25 10:05:17 +01001081 switch (pixel_multiplier) {
1082 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001083 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1084 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1085 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001086 }
Chris Wilson32aad862010-08-04 13:50:25 +01001087 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1088 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001089
1090 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001091 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001092 /* The real mode polarity is set by the SDVO commands, using
1093 * struct intel_sdvo_dtd. */
1094 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Chris Wilsone953fd72011-02-21 22:23:52 +00001095 if (intel_sdvo->is_hdmi)
1096 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001097 if (INTEL_INFO(dev)->gen < 5)
1098 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001099 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001100 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001101 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001102 case SDVOB:
1103 sdvox &= SDVOB_PRESERVE_MASK;
1104 break;
1105 case SDVOC:
1106 sdvox &= SDVOC_PRESERVE_MASK;
1107 break;
1108 }
1109 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1110 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001111
1112 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1113 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1114 else
1115 sdvox |= TRANSCODER(intel_crtc->pipe);
1116
Chris Wilsonda79de92010-11-22 11:12:46 +00001117 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001118 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001119
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001120 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001121 /* done in crtc_mode_set as the dpll_md reg must be written early */
1122 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1123 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001124 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001125 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001126 }
1127
Chris Wilson6714afb2010-12-17 04:10:51 +00001128 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1129 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001130 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001131 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001132}
1133
1134static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1135{
1136 struct drm_device *dev = encoder->dev;
1137 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001138 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001139 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001140 u32 temp;
1141
1142 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001143 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001144 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001145 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001146
1147 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001148 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001149 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001150 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001151 }
1152 }
1153 } else {
1154 bool input1, input2;
1155 int i;
1156 u8 status;
1157
Chris Wilsonea5b2132010-08-04 13:50:23 +01001158 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001159 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001160 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001161 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001162 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001163
Chris Wilson32aad862010-08-04 13:50:25 +01001164 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001165 /* Warn if the device reported failure to sync.
1166 * A lot of SDVO devices fail to notify of sync, but it's
1167 * a given it the status is a success, we succeeded.
1168 */
1169 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001170 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001171 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001172 }
1173
1174 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001175 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1176 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001177 }
1178 return;
1179}
1180
Jesse Barnes79e53942008-11-07 14:24:08 -08001181static int intel_sdvo_mode_valid(struct drm_connector *connector,
1182 struct drm_display_mode *mode)
1183{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001184 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001185
1186 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1187 return MODE_NO_DBLESCAN;
1188
Chris Wilsonea5b2132010-08-04 13:50:23 +01001189 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001190 return MODE_CLOCK_LOW;
1191
Chris Wilsonea5b2132010-08-04 13:50:23 +01001192 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001193 return MODE_CLOCK_HIGH;
1194
Chris Wilson85454232010-08-08 14:28:23 +01001195 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001196 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001197 return MODE_PANEL;
1198
Chris Wilsonea5b2132010-08-04 13:50:23 +01001199 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001200 return MODE_PANEL;
1201 }
1202
Jesse Barnes79e53942008-11-07 14:24:08 -08001203 return MODE_OK;
1204}
1205
Chris Wilsonea5b2132010-08-04 13:50:23 +01001206static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001207{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001208 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001209 if (!intel_sdvo_get_value(intel_sdvo,
1210 SDVO_CMD_GET_DEVICE_CAPS,
1211 caps, sizeof(*caps)))
1212 return false;
1213
1214 DRM_DEBUG_KMS("SDVO capabilities:\n"
1215 " vendor_id: %d\n"
1216 " device_id: %d\n"
1217 " device_rev_id: %d\n"
1218 " sdvo_version_major: %d\n"
1219 " sdvo_version_minor: %d\n"
1220 " sdvo_inputs_mask: %d\n"
1221 " smooth_scaling: %d\n"
1222 " sharp_scaling: %d\n"
1223 " up_scaling: %d\n"
1224 " down_scaling: %d\n"
1225 " stall_support: %d\n"
1226 " output_flags: %d\n",
1227 caps->vendor_id,
1228 caps->device_id,
1229 caps->device_rev_id,
1230 caps->sdvo_version_major,
1231 caps->sdvo_version_minor,
1232 caps->sdvo_inputs_mask,
1233 caps->smooth_scaling,
1234 caps->sharp_scaling,
1235 caps->up_scaling,
1236 caps->down_scaling,
1237 caps->stall_support,
1238 caps->output_flags);
1239
1240 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001241}
1242
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001243static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001244{
1245 u8 response[2];
Jesse Barnes79e53942008-11-07 14:24:08 -08001246
Chris Wilson32aad862010-08-04 13:50:25 +01001247 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1248 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001249}
1250
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001251static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001252{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001253 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001254
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001255 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001256}
1257
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001258static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001259intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001260{
Chris Wilsonbc652122011-01-25 13:28:29 +00001261 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001262 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001263}
1264
Chris Wilsonf899fc62010-07-20 15:44:45 -07001265static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001266intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001267{
Chris Wilsone957d772010-09-24 12:52:03 +01001268 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1269 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001270}
1271
Chris Wilsonff482d82010-09-15 10:40:38 +01001272/* Mac mini hack -- use the same DDC as the analog connector */
1273static struct edid *
1274intel_sdvo_get_analog_edid(struct drm_connector *connector)
1275{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001276 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001277
Chris Wilson0c1dab82010-11-23 22:37:01 +00001278 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001279 intel_gmbus_get_adapter(dev_priv,
1280 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001281}
1282
Ben Widawskyc43b5632012-04-16 14:07:40 -07001283static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001284intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001285{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001286 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001287 enum drm_connector_status status;
1288 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001289
Chris Wilsone957d772010-09-24 12:52:03 +01001290 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001291
Chris Wilsonea5b2132010-08-04 13:50:23 +01001292 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001293 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001294
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001295 /*
1296 * Don't use the 1 as the argument of DDC bus switch to get
1297 * the EDID. It is used for SDVO SPD ROM.
1298 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001299 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001300 intel_sdvo->ddc_bus = ddc;
1301 edid = intel_sdvo_get_edid(connector);
1302 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001303 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001304 }
Chris Wilsone957d772010-09-24 12:52:03 +01001305 /*
1306 * If we found the EDID on the other bus,
1307 * assume that is the correct DDC bus.
1308 */
1309 if (edid == NULL)
1310 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001311 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001312
1313 /*
1314 * When there is no edid and no monitor is connected with VGA
1315 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001316 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001317 if (edid == NULL)
1318 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001319
Chris Wilson2f551c82010-09-15 10:42:50 +01001320 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001321 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001322 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001323 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1324 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001325 if (intel_sdvo->is_hdmi) {
1326 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1327 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1328 }
Chris Wilson139467432011-02-09 20:01:16 +00001329 } else
1330 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001331 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001332 kfree(edid);
1333 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001334
1335 if (status == connector_status_connected) {
1336 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001337 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1338 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001339 }
1340
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001341 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001342}
1343
Chris Wilson52220082011-06-20 14:45:50 +01001344static bool
1345intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1346 struct edid *edid)
1347{
1348 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1349 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1350
1351 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1352 connector_is_digital, monitor_is_digital);
1353 return connector_is_digital == monitor_is_digital;
1354}
1355
Chris Wilson7b334fc2010-09-09 23:51:02 +01001356static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001357intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001358{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001359 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001360 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001361 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001362 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001363
Chris Wilson32aad862010-08-04 13:50:25 +01001364 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001365 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001366 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001367
1368 /* add 30ms delay when the output type might be TV */
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01001369 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001370 mdelay(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001371
Chris Wilson32aad862010-08-04 13:50:25 +01001372 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1373 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001374
Chris Wilsone957d772010-09-24 12:52:03 +01001375 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1376 response & 0xff, response >> 8,
1377 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001378
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001379 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001380 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001381
Chris Wilsonea5b2132010-08-04 13:50:23 +01001382 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001383
Chris Wilson97aaf912011-01-04 20:10:52 +00001384 intel_sdvo->has_hdmi_monitor = false;
1385 intel_sdvo->has_hdmi_audio = false;
1386
Chris Wilson615fb932010-08-04 13:50:24 +01001387 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001388 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001389 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001390 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001391 else {
1392 struct edid *edid;
1393
1394 /* if we have an edid check it matches the connection */
1395 edid = intel_sdvo_get_edid(connector);
1396 if (edid == NULL)
1397 edid = intel_sdvo_get_analog_edid(connector);
1398 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001399 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1400 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001401 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001402 else
1403 ret = connector_status_disconnected;
1404
Chris Wilson139467432011-02-09 20:01:16 +00001405 connector->display_info.raw_edid = NULL;
1406 kfree(edid);
1407 } else
1408 ret = connector_status_connected;
1409 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001410
1411 /* May update encoder flag for like clock for SDVO TV, etc.*/
1412 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001413 intel_sdvo->is_tv = false;
1414 intel_sdvo->is_lvds = false;
1415 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001416
1417 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001418 intel_sdvo->is_tv = true;
1419 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001420 }
1421 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001422 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001423 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001424
1425 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001426}
1427
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001428static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001429{
Chris Wilsonff482d82010-09-15 10:40:38 +01001430 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001431
1432 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001433 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001434
Keith Packard57cdaf92009-09-04 13:07:54 +08001435 /*
1436 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1437 * link between analog and digital outputs. So, if the regular SDVO
1438 * DDC fails, check to see if the analog output is disconnected, in
1439 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001440 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001441 if (edid == NULL)
1442 edid = intel_sdvo_get_analog_edid(connector);
1443
Chris Wilsonff482d82010-09-15 10:40:38 +01001444 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001445 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1446 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001447 drm_mode_connector_update_edid_property(connector, edid);
1448 drm_add_edid_modes(connector, edid);
1449 }
Chris Wilson139467432011-02-09 20:01:16 +00001450
Chris Wilsonff482d82010-09-15 10:40:38 +01001451 connector->display_info.raw_edid = NULL;
1452 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001453 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001454}
1455
1456/*
1457 * Set of SDVO TV modes.
1458 * Note! This is in reply order (see loop in get_tv_modes).
1459 * XXX: all 60Hz refresh?
1460 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001461static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001462 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1463 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001465 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1466 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001468 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1469 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001471 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1472 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001473 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001474 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1475 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001476 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001477 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1478 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001479 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001480 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1481 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001482 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001483 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1484 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001486 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1487 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001489 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1490 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001492 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1493 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001495 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1496 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001498 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1499 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001501 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1502 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001504 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1505 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001507 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1508 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001510 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1511 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001513 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1514 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001516 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1517 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1519};
1520
1521static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1522{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001523 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001524 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001525 uint32_t reply = 0, format_map = 0;
1526 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001527
1528 /* Read the list of supported input resolutions for the selected TV
1529 * format.
1530 */
Chris Wilson40039752010-08-04 13:50:26 +01001531 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001532 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001533 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001534
Chris Wilson32aad862010-08-04 13:50:25 +01001535 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1536 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001537
Chris Wilson32aad862010-08-04 13:50:25 +01001538 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001539 if (!intel_sdvo_write_cmd(intel_sdvo,
1540 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001541 &tv_res, sizeof(tv_res)))
1542 return;
1543 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001544 return;
1545
1546 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001547 if (reply & (1 << i)) {
1548 struct drm_display_mode *nmode;
1549 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001550 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001551 if (nmode)
1552 drm_mode_probed_add(connector, nmode);
1553 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001554}
1555
Ma Ling7086c872009-05-13 11:20:06 +08001556static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1557{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001558 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001559 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001560 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001561
1562 /*
1563 * Attempt to get the mode list from DDC.
1564 * Assume that the preferred modes are
1565 * arranged in priority order.
1566 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001567 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001568 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001569 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001570
1571 /* Fetch modes from VBT */
1572 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001573 newmode = drm_mode_duplicate(connector->dev,
1574 dev_priv->sdvo_lvds_vbt_mode);
1575 if (newmode != NULL) {
1576 /* Guarantee the mode is preferred */
1577 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1578 DRM_MODE_TYPE_DRIVER);
1579 drm_mode_probed_add(connector, newmode);
1580 }
1581 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001582
1583end:
1584 list_for_each_entry(newmode, &connector->probed_modes, head) {
1585 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001586 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001587 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001588
Chris Wilson85454232010-08-08 14:28:23 +01001589 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001590 break;
1591 }
1592 }
1593
Ma Ling7086c872009-05-13 11:20:06 +08001594}
1595
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001596static int intel_sdvo_get_modes(struct drm_connector *connector)
1597{
Chris Wilson615fb932010-08-04 13:50:24 +01001598 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001599
Chris Wilson615fb932010-08-04 13:50:24 +01001600 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001601 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001602 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001603 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001604 else
1605 intel_sdvo_get_ddc_modes(connector);
1606
Chris Wilson32aad862010-08-04 13:50:25 +01001607 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001608}
1609
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001610static void
1611intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001612{
Chris Wilson615fb932010-08-04 13:50:24 +01001613 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001614 struct drm_device *dev = connector->dev;
1615
Chris Wilsonc5521702010-08-04 13:50:28 +01001616 if (intel_sdvo_connector->left)
1617 drm_property_destroy(dev, intel_sdvo_connector->left);
1618 if (intel_sdvo_connector->right)
1619 drm_property_destroy(dev, intel_sdvo_connector->right);
1620 if (intel_sdvo_connector->top)
1621 drm_property_destroy(dev, intel_sdvo_connector->top);
1622 if (intel_sdvo_connector->bottom)
1623 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1624 if (intel_sdvo_connector->hpos)
1625 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1626 if (intel_sdvo_connector->vpos)
1627 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1628 if (intel_sdvo_connector->saturation)
1629 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1630 if (intel_sdvo_connector->contrast)
1631 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1632 if (intel_sdvo_connector->hue)
1633 drm_property_destroy(dev, intel_sdvo_connector->hue);
1634 if (intel_sdvo_connector->sharpness)
1635 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1636 if (intel_sdvo_connector->flicker_filter)
1637 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1638 if (intel_sdvo_connector->flicker_filter_2d)
1639 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1640 if (intel_sdvo_connector->flicker_filter_adaptive)
1641 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1642 if (intel_sdvo_connector->tv_luma_filter)
1643 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1644 if (intel_sdvo_connector->tv_chroma_filter)
1645 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001646 if (intel_sdvo_connector->dot_crawl)
1647 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001648 if (intel_sdvo_connector->brightness)
1649 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001650}
1651
Jesse Barnes79e53942008-11-07 14:24:08 -08001652static void intel_sdvo_destroy(struct drm_connector *connector)
1653{
Chris Wilson615fb932010-08-04 13:50:24 +01001654 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001655
Chris Wilsonc5521702010-08-04 13:50:28 +01001656 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001657 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001658 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001659
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001660 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001661 drm_sysfs_connector_remove(connector);
1662 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001663 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001664}
1665
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001666static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1667{
1668 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1669 struct edid *edid;
1670 bool has_audio = false;
1671
1672 if (!intel_sdvo->is_hdmi)
1673 return false;
1674
1675 edid = intel_sdvo_get_edid(connector);
1676 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1677 has_audio = drm_detect_monitor_audio(edid);
1678
1679 return has_audio;
1680}
1681
Zhao Yakuice6feab2009-08-24 13:50:26 +08001682static int
1683intel_sdvo_set_property(struct drm_connector *connector,
1684 struct drm_property *property,
1685 uint64_t val)
1686{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001687 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001688 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001689 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001690 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001691 uint8_t cmd;
1692 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001693
1694 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001695 if (ret)
1696 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001697
Chris Wilson3f43c482011-05-12 22:17:24 +01001698 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001699 int i = val;
1700 bool has_audio;
1701
1702 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001703 return 0;
1704
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001705 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001706
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001707 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001708 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1709 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001710 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001711
1712 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001713 return 0;
1714
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001715 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001716 goto done;
1717 }
1718
Chris Wilsone953fd72011-02-21 22:23:52 +00001719 if (property == dev_priv->broadcast_rgb_property) {
1720 if (val == !!intel_sdvo->color_range)
1721 return 0;
1722
1723 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001724 goto done;
1725 }
1726
Chris Wilsonc5521702010-08-04 13:50:28 +01001727#define CHECK_PROPERTY(name, NAME) \
1728 if (intel_sdvo_connector->name == property) { \
1729 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1730 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1731 cmd = SDVO_CMD_SET_##NAME; \
1732 intel_sdvo_connector->cur_##name = temp_value; \
1733 goto set_value; \
1734 }
1735
1736 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001737 if (val >= TV_FORMAT_NUM)
1738 return -EINVAL;
1739
Chris Wilson40039752010-08-04 13:50:26 +01001740 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001741 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001742 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001743
Chris Wilson40039752010-08-04 13:50:26 +01001744 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001745 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001746 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001747 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001748 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001749 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001750 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001751 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001752 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001753
Chris Wilson615fb932010-08-04 13:50:24 +01001754 intel_sdvo_connector->left_margin = temp_value;
1755 intel_sdvo_connector->right_margin = temp_value;
1756 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001757 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001758 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001759 goto set_value;
1760 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001761 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001762 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001763 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001764 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001765
Chris Wilson615fb932010-08-04 13:50:24 +01001766 intel_sdvo_connector->left_margin = temp_value;
1767 intel_sdvo_connector->right_margin = temp_value;
1768 temp_value = intel_sdvo_connector->max_hscan -
1769 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001770 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001771 goto set_value;
1772 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001773 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001774 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001775 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001776 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001777
Chris Wilson615fb932010-08-04 13:50:24 +01001778 intel_sdvo_connector->top_margin = temp_value;
1779 intel_sdvo_connector->bottom_margin = temp_value;
1780 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001781 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001782 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001783 goto set_value;
1784 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001785 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001786 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001787 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001788 return 0;
1789
Chris Wilson615fb932010-08-04 13:50:24 +01001790 intel_sdvo_connector->top_margin = temp_value;
1791 intel_sdvo_connector->bottom_margin = temp_value;
1792 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001793 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001794 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001795 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001796 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001797 CHECK_PROPERTY(hpos, HPOS)
1798 CHECK_PROPERTY(vpos, VPOS)
1799 CHECK_PROPERTY(saturation, SATURATION)
1800 CHECK_PROPERTY(contrast, CONTRAST)
1801 CHECK_PROPERTY(hue, HUE)
1802 CHECK_PROPERTY(brightness, BRIGHTNESS)
1803 CHECK_PROPERTY(sharpness, SHARPNESS)
1804 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1805 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1806 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1807 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1808 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001809 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001810 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001811
1812 return -EINVAL; /* unknown property */
1813
1814set_value:
1815 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1816 return -EIO;
1817
1818
1819done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001820 if (intel_sdvo->base.base.crtc) {
1821 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001822 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001823 crtc->y, crtc->fb);
1824 }
1825
Chris Wilson32aad862010-08-04 13:50:25 +01001826 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001827#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001828}
1829
Jesse Barnes79e53942008-11-07 14:24:08 -08001830static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1831 .dpms = intel_sdvo_dpms,
1832 .mode_fixup = intel_sdvo_mode_fixup,
1833 .prepare = intel_encoder_prepare,
1834 .mode_set = intel_sdvo_mode_set,
1835 .commit = intel_encoder_commit,
1836};
1837
1838static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001839 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001840 .detect = intel_sdvo_detect,
1841 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001842 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001843 .destroy = intel_sdvo_destroy,
1844};
1845
1846static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1847 .get_modes = intel_sdvo_get_modes,
1848 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001849 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001850};
1851
Hannes Ederb358d0a2008-12-18 21:18:47 +01001852static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001853{
Chris Wilson890f3352010-09-14 16:46:59 +01001854 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001855
Chris Wilsonea5b2132010-08-04 13:50:23 +01001856 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001857 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001858 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001859
Chris Wilsone957d772010-09-24 12:52:03 +01001860 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001861 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001862}
1863
1864static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1865 .destroy = intel_sdvo_enc_destroy,
1866};
1867
Chris Wilsonb66d8422010-08-12 15:26:41 +01001868static void
1869intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1870{
1871 uint16_t mask = 0;
1872 unsigned int num_bits;
1873
1874 /* Make a mask of outputs less than or equal to our own priority in the
1875 * list.
1876 */
1877 switch (sdvo->controlled_output) {
1878 case SDVO_OUTPUT_LVDS1:
1879 mask |= SDVO_OUTPUT_LVDS1;
1880 case SDVO_OUTPUT_LVDS0:
1881 mask |= SDVO_OUTPUT_LVDS0;
1882 case SDVO_OUTPUT_TMDS1:
1883 mask |= SDVO_OUTPUT_TMDS1;
1884 case SDVO_OUTPUT_TMDS0:
1885 mask |= SDVO_OUTPUT_TMDS0;
1886 case SDVO_OUTPUT_RGB1:
1887 mask |= SDVO_OUTPUT_RGB1;
1888 case SDVO_OUTPUT_RGB0:
1889 mask |= SDVO_OUTPUT_RGB0;
1890 break;
1891 }
1892
1893 /* Count bits to find what number we are in the priority list. */
1894 mask &= sdvo->caps.output_flags;
1895 num_bits = hweight16(mask);
1896 /* If more than 3 outputs, default to DDC bus 3 for now. */
1897 if (num_bits > 3)
1898 num_bits = 3;
1899
1900 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1901 sdvo->ddc_bus = 1 << num_bits;
1902}
Jesse Barnes79e53942008-11-07 14:24:08 -08001903
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001904/**
1905 * Choose the appropriate DDC bus for control bus switch command for this
1906 * SDVO output based on the controlled output.
1907 *
1908 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1909 * outputs, then LVDS outputs.
1910 */
1911static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001912intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001913 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001914{
Adam Jacksonb1083332010-04-23 16:07:40 -04001915 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001916
Daniel Vettereef4eac2012-03-23 23:43:35 +01001917 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04001918 mapping = &(dev_priv->sdvo_mappings[0]);
1919 else
1920 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001921
Chris Wilsonb66d8422010-08-12 15:26:41 +01001922 if (mapping->initialized)
1923 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1924 else
1925 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001926}
1927
Chris Wilsone957d772010-09-24 12:52:03 +01001928static void
1929intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1930 struct intel_sdvo *sdvo, u32 reg)
1931{
1932 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04001933 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001934
Daniel Vettereef4eac2012-03-23 23:43:35 +01001935 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01001936 mapping = &dev_priv->sdvo_mappings[0];
1937 else
1938 mapping = &dev_priv->sdvo_mappings[1];
1939
1940 pin = GMBUS_PORT_DPB;
Adam Jackson46eb3032011-06-16 16:36:23 -04001941 if (mapping->initialized)
Chris Wilsone957d772010-09-24 12:52:03 +01001942 pin = mapping->i2c_pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001943
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001944 if (intel_gmbus_is_port_valid(pin)) {
1945 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
Adam Jacksond5090b92011-06-16 16:36:28 -04001946 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
Chris Wilson63abf3e2010-12-08 16:48:21 +00001947 intel_gmbus_force_bit(sdvo->i2c, true);
Adam Jackson46eb3032011-06-16 16:36:23 -04001948 } else {
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001949 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
Adam Jackson46eb3032011-06-16 16:36:23 -04001950 }
Chris Wilsone957d772010-09-24 12:52:03 +01001951}
1952
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001953static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001954intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001955{
Chris Wilson97aaf912011-01-04 20:10:52 +00001956 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001957}
1958
yakui_zhao714605e2009-05-31 17:18:07 +08001959static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01001960intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08001961{
1962 struct drm_i915_private *dev_priv = dev->dev_private;
1963 struct sdvo_device_mapping *my_mapping, *other_mapping;
1964
Daniel Vettereef4eac2012-03-23 23:43:35 +01001965 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08001966 my_mapping = &dev_priv->sdvo_mappings[0];
1967 other_mapping = &dev_priv->sdvo_mappings[1];
1968 } else {
1969 my_mapping = &dev_priv->sdvo_mappings[1];
1970 other_mapping = &dev_priv->sdvo_mappings[0];
1971 }
1972
1973 /* If the BIOS described our SDVO device, take advantage of it. */
1974 if (my_mapping->slave_addr)
1975 return my_mapping->slave_addr;
1976
1977 /* If the BIOS only described a different SDVO device, use the
1978 * address that it isn't using.
1979 */
1980 if (other_mapping->slave_addr) {
1981 if (other_mapping->slave_addr == 0x70)
1982 return 0x72;
1983 else
1984 return 0x70;
1985 }
1986
1987 /* No SDVO device info is found for another DVO port,
1988 * so use mapping assumption we had before BIOS parsing.
1989 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01001990 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08001991 return 0x70;
1992 else
1993 return 0x72;
1994}
1995
Zhenyu Wang14571b42010-03-30 14:06:33 +08001996static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01001997intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1998 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001999{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002000 drm_connector_init(encoder->base.base.dev,
2001 &connector->base.base,
2002 &intel_sdvo_connector_funcs,
2003 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002004
Chris Wilsondf0e9242010-09-09 16:20:55 +01002005 drm_connector_helper_add(&connector->base.base,
2006 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002007
Peter Ross8f4839e2012-01-28 14:49:25 +01002008 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002009 connector->base.base.doublescan_allowed = 0;
2010 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002011
Chris Wilsondf0e9242010-09-09 16:20:55 +01002012 intel_connector_attach_encoder(&connector->base, &encoder->base);
2013 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002014}
2015
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002016static void
2017intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2018{
2019 struct drm_device *dev = connector->base.base.dev;
2020
Chris Wilson3f43c482011-05-12 22:17:24 +01002021 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00002022 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2023 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002024}
2025
Zhenyu Wang14571b42010-03-30 14:06:33 +08002026static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002027intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002028{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002029 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002030 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002031 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002032 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002033 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002034
Chris Wilson615fb932010-08-04 13:50:24 +01002035 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2036 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002037 return false;
2038
Zhenyu Wang14571b42010-03-30 14:06:33 +08002039 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002040 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002041 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002042 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002043 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002044 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002045 }
2046
Chris Wilson615fb932010-08-04 13:50:24 +01002047 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002048 connector = &intel_connector->base;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002049 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2050 connector->polled = DRM_CONNECTOR_POLL_HPD;
2051 intel_sdvo->hotplug_active[0] |= 1 << device;
2052 /* Some SDVO devices have one-shot hotplug interrupts.
2053 * Ensure that they get re-enabled when an interrupt happens.
2054 */
2055 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2056 intel_sdvo_enable_hotplug(intel_encoder);
2057 }
2058 else
2059 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002060 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2061 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2062
Chris Wilsone27d8532010-10-22 09:15:22 +01002063 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002064 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002065 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002066 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002067 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2068 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002069
Chris Wilsondf0e9242010-09-09 16:20:55 +01002070 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002071 if (intel_sdvo->is_hdmi)
2072 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002073
2074 return true;
2075}
2076
2077static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002078intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002079{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002080 struct drm_encoder *encoder = &intel_sdvo->base.base;
2081 struct drm_connector *connector;
2082 struct intel_connector *intel_connector;
2083 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002084
Chris Wilson615fb932010-08-04 13:50:24 +01002085 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2086 if (!intel_sdvo_connector)
2087 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002088
Chris Wilson615fb932010-08-04 13:50:24 +01002089 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002090 connector = &intel_connector->base;
2091 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2092 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002093
Chris Wilson4ef69c72010-09-09 15:14:28 +01002094 intel_sdvo->controlled_output |= type;
2095 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002096
Chris Wilson4ef69c72010-09-09 15:14:28 +01002097 intel_sdvo->is_tv = true;
2098 intel_sdvo->base.needs_tv_clock = true;
2099 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002100
Chris Wilsondf0e9242010-09-09 16:20:55 +01002101 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002102
Chris Wilson4ef69c72010-09-09 15:14:28 +01002103 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002104 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002105
Chris Wilson4ef69c72010-09-09 15:14:28 +01002106 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002107 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002108
Chris Wilson4ef69c72010-09-09 15:14:28 +01002109 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002110
2111err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002112 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002113 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002114}
2115
2116static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002117intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002118{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002119 struct drm_encoder *encoder = &intel_sdvo->base.base;
2120 struct drm_connector *connector;
2121 struct intel_connector *intel_connector;
2122 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002123
Chris Wilson615fb932010-08-04 13:50:24 +01002124 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2125 if (!intel_sdvo_connector)
2126 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002127
Chris Wilson615fb932010-08-04 13:50:24 +01002128 intel_connector = &intel_sdvo_connector->base;
2129 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002130 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2131 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2132 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002133
Chris Wilson4ef69c72010-09-09 15:14:28 +01002134 if (device == 0) {
2135 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2136 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2137 } else if (device == 1) {
2138 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2139 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2140 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002141
Chris Wilson4ef69c72010-09-09 15:14:28 +01002142 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2143 (1 << INTEL_ANALOG_CLONE_BIT));
2144
Chris Wilsondf0e9242010-09-09 16:20:55 +01002145 intel_sdvo_connector_init(intel_sdvo_connector,
2146 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002147 return true;
2148}
2149
2150static bool
2151intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2152{
2153 struct drm_encoder *encoder = &intel_sdvo->base.base;
2154 struct drm_connector *connector;
2155 struct intel_connector *intel_connector;
2156 struct intel_sdvo_connector *intel_sdvo_connector;
2157
2158 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2159 if (!intel_sdvo_connector)
2160 return false;
2161
2162 intel_connector = &intel_sdvo_connector->base;
2163 connector = &intel_connector->base;
2164 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2165 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2166
2167 if (device == 0) {
2168 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2169 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2170 } else if (device == 1) {
2171 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2172 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2173 }
2174
2175 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002176 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002177
Chris Wilsondf0e9242010-09-09 16:20:55 +01002178 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002179 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002180 goto err;
2181
2182 return true;
2183
2184err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002185 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002186 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002187}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002188
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002189static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002190intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002191{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002192 intel_sdvo->is_tv = false;
2193 intel_sdvo->base.needs_tv_clock = false;
2194 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002195
Zhenyu Wang14571b42010-03-30 14:06:33 +08002196 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002197
Zhenyu Wang14571b42010-03-30 14:06:33 +08002198 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002199 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002200 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002201
Zhenyu Wang14571b42010-03-30 14:06:33 +08002202 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002203 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002204 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002205
Zhenyu Wang14571b42010-03-30 14:06:33 +08002206 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002207 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002208 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002209 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002210
Zhenyu Wang14571b42010-03-30 14:06:33 +08002211 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002212 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002213 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002214
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002215 if (flags & SDVO_OUTPUT_YPRPB0)
2216 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2217 return false;
2218
Zhenyu Wang14571b42010-03-30 14:06:33 +08002219 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002220 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002221 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002222
Zhenyu Wang14571b42010-03-30 14:06:33 +08002223 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002224 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002225 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002226
Zhenyu Wang14571b42010-03-30 14:06:33 +08002227 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002228 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002229 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002230
Zhenyu Wang14571b42010-03-30 14:06:33 +08002231 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002232 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002233 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002234
Zhenyu Wang14571b42010-03-30 14:06:33 +08002235 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002236 unsigned char bytes[2];
2237
Chris Wilsonea5b2132010-08-04 13:50:23 +01002238 intel_sdvo->controlled_output = 0;
2239 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002240 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002241 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002242 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002243 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002244 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002245 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002246
Zhenyu Wang14571b42010-03-30 14:06:33 +08002247 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002248}
2249
Chris Wilson32aad862010-08-04 13:50:25 +01002250static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2251 struct intel_sdvo_connector *intel_sdvo_connector,
2252 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002253{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002254 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002255 struct intel_sdvo_tv_format format;
2256 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002257
Chris Wilson32aad862010-08-04 13:50:25 +01002258 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2259 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002260
Chris Wilson1a3665c2011-01-25 13:59:37 +00002261 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002262 if (!intel_sdvo_get_value(intel_sdvo,
2263 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2264 &format, sizeof(format)))
2265 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002266
Chris Wilson32aad862010-08-04 13:50:25 +01002267 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002268
2269 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002270 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002271
Chris Wilson615fb932010-08-04 13:50:24 +01002272 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002273 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002274 if (format_map & (1 << i))
2275 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002276
2277
Chris Wilsonc5521702010-08-04 13:50:28 +01002278 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002279 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2280 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002281 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002282 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002283
Chris Wilson615fb932010-08-04 13:50:24 +01002284 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002285 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002286 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002287 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002288
Chris Wilson40039752010-08-04 13:50:26 +01002289 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002290 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002291 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002292 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002293
2294}
2295
Chris Wilsonc5521702010-08-04 13:50:28 +01002296#define ENHANCEMENT(name, NAME) do { \
2297 if (enhancements.name) { \
2298 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2299 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2300 return false; \
2301 intel_sdvo_connector->max_##name = data_value[0]; \
2302 intel_sdvo_connector->cur_##name = response; \
2303 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002304 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002305 if (!intel_sdvo_connector->name) return false; \
Chris Wilsonc5521702010-08-04 13:50:28 +01002306 drm_connector_attach_property(connector, \
2307 intel_sdvo_connector->name, \
2308 intel_sdvo_connector->cur_##name); \
2309 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2310 data_value[0], data_value[1], response); \
2311 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002312} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002313
2314static bool
2315intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2316 struct intel_sdvo_connector *intel_sdvo_connector,
2317 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002318{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002319 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002320 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002321 uint16_t response, data_value[2];
2322
Chris Wilsonc5521702010-08-04 13:50:28 +01002323 /* when horizontal overscan is supported, Add the left/right property */
2324 if (enhancements.overscan_h) {
2325 if (!intel_sdvo_get_value(intel_sdvo,
2326 SDVO_CMD_GET_MAX_OVERSCAN_H,
2327 &data_value, 4))
2328 return false;
2329
2330 if (!intel_sdvo_get_value(intel_sdvo,
2331 SDVO_CMD_GET_OVERSCAN_H,
2332 &response, 2))
2333 return false;
2334
2335 intel_sdvo_connector->max_hscan = data_value[0];
2336 intel_sdvo_connector->left_margin = data_value[0] - response;
2337 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2338 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002339 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002340 if (!intel_sdvo_connector->left)
2341 return false;
2342
Chris Wilsonc5521702010-08-04 13:50:28 +01002343 drm_connector_attach_property(connector,
2344 intel_sdvo_connector->left,
2345 intel_sdvo_connector->left_margin);
2346
2347 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002348 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002349 if (!intel_sdvo_connector->right)
2350 return false;
2351
Chris Wilsonc5521702010-08-04 13:50:28 +01002352 drm_connector_attach_property(connector,
2353 intel_sdvo_connector->right,
2354 intel_sdvo_connector->right_margin);
2355 DRM_DEBUG_KMS("h_overscan: max %d, "
2356 "default %d, current %d\n",
2357 data_value[0], data_value[1], response);
2358 }
2359
2360 if (enhancements.overscan_v) {
2361 if (!intel_sdvo_get_value(intel_sdvo,
2362 SDVO_CMD_GET_MAX_OVERSCAN_V,
2363 &data_value, 4))
2364 return false;
2365
2366 if (!intel_sdvo_get_value(intel_sdvo,
2367 SDVO_CMD_GET_OVERSCAN_V,
2368 &response, 2))
2369 return false;
2370
2371 intel_sdvo_connector->max_vscan = data_value[0];
2372 intel_sdvo_connector->top_margin = data_value[0] - response;
2373 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2374 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002375 drm_property_create_range(dev, 0,
2376 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002377 if (!intel_sdvo_connector->top)
2378 return false;
2379
Chris Wilsonc5521702010-08-04 13:50:28 +01002380 drm_connector_attach_property(connector,
2381 intel_sdvo_connector->top,
2382 intel_sdvo_connector->top_margin);
2383
2384 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002385 drm_property_create_range(dev, 0,
2386 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002387 if (!intel_sdvo_connector->bottom)
2388 return false;
2389
Chris Wilsonc5521702010-08-04 13:50:28 +01002390 drm_connector_attach_property(connector,
2391 intel_sdvo_connector->bottom,
2392 intel_sdvo_connector->bottom_margin);
2393 DRM_DEBUG_KMS("v_overscan: max %d, "
2394 "default %d, current %d\n",
2395 data_value[0], data_value[1], response);
2396 }
2397
2398 ENHANCEMENT(hpos, HPOS);
2399 ENHANCEMENT(vpos, VPOS);
2400 ENHANCEMENT(saturation, SATURATION);
2401 ENHANCEMENT(contrast, CONTRAST);
2402 ENHANCEMENT(hue, HUE);
2403 ENHANCEMENT(sharpness, SHARPNESS);
2404 ENHANCEMENT(brightness, BRIGHTNESS);
2405 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2406 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2407 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2408 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2409 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2410
Chris Wilsone0442182010-08-04 13:50:29 +01002411 if (enhancements.dot_crawl) {
2412 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2413 return false;
2414
2415 intel_sdvo_connector->max_dot_crawl = 1;
2416 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2417 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002418 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002419 if (!intel_sdvo_connector->dot_crawl)
2420 return false;
2421
Chris Wilsone0442182010-08-04 13:50:29 +01002422 drm_connector_attach_property(connector,
2423 intel_sdvo_connector->dot_crawl,
2424 intel_sdvo_connector->cur_dot_crawl);
2425 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2426 }
2427
Chris Wilsonc5521702010-08-04 13:50:28 +01002428 return true;
2429}
2430
2431static bool
2432intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2433 struct intel_sdvo_connector *intel_sdvo_connector,
2434 struct intel_sdvo_enhancements_reply enhancements)
2435{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002436 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002437 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2438 uint16_t response, data_value[2];
2439
2440 ENHANCEMENT(brightness, BRIGHTNESS);
2441
2442 return true;
2443}
2444#undef ENHANCEMENT
2445
2446static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2447 struct intel_sdvo_connector *intel_sdvo_connector)
2448{
2449 union {
2450 struct intel_sdvo_enhancements_reply reply;
2451 uint16_t response;
2452 } enhancements;
2453
Chris Wilson1a3665c2011-01-25 13:59:37 +00002454 BUILD_BUG_ON(sizeof(enhancements) != 2);
2455
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002456 enhancements.response = 0;
2457 intel_sdvo_get_value(intel_sdvo,
2458 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2459 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002460 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002461 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002462 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002463 }
Chris Wilson32aad862010-08-04 13:50:25 +01002464
Chris Wilsonc5521702010-08-04 13:50:28 +01002465 if (IS_TV(intel_sdvo_connector))
2466 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002467 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002468 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2469 else
2470 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002471}
Chris Wilson32aad862010-08-04 13:50:25 +01002472
Chris Wilsone957d772010-09-24 12:52:03 +01002473static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2474 struct i2c_msg *msgs,
2475 int num)
2476{
2477 struct intel_sdvo *sdvo = adapter->algo_data;
2478
2479 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2480 return -EIO;
2481
2482 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2483}
2484
2485static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2486{
2487 struct intel_sdvo *sdvo = adapter->algo_data;
2488 return sdvo->i2c->algo->functionality(sdvo->i2c);
2489}
2490
2491static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2492 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2493 .functionality = intel_sdvo_ddc_proxy_func
2494};
2495
2496static bool
2497intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2498 struct drm_device *dev)
2499{
2500 sdvo->ddc.owner = THIS_MODULE;
2501 sdvo->ddc.class = I2C_CLASS_DDC;
2502 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2503 sdvo->ddc.dev.parent = &dev->pdev->dev;
2504 sdvo->ddc.algo_data = sdvo;
2505 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2506
2507 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002508}
2509
Daniel Vettereef4eac2012-03-23 23:43:35 +01002510bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002511{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002512 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002513 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002514 struct intel_sdvo *intel_sdvo;
Chris Wilson084b6122012-05-11 18:01:33 +01002515 u32 hotplug_mask;
Jesse Barnes79e53942008-11-07 14:24:08 -08002516 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002517
Chris Wilsonea5b2132010-08-04 13:50:23 +01002518 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2519 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002520 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002521
Chris Wilson56184e32011-05-17 14:03:50 +01002522 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002523 intel_sdvo->is_sdvob = is_sdvob;
2524 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002525 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Chris Wilsone957d772010-09-24 12:52:03 +01002526 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2527 kfree(intel_sdvo);
2528 return false;
2529 }
2530
Chris Wilson56184e32011-05-17 14:03:50 +01002531 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002532 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002533 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002534 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002535
Jesse Barnes79e53942008-11-07 14:24:08 -08002536 /* Read the regs to test if we can talk to the device */
2537 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002538 u8 byte;
2539
2540 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002541 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2542 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002543 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002544 }
2545 }
2546
Chris Wilson084b6122012-05-11 18:01:33 +01002547 hotplug_mask = 0;
2548 if (IS_G4X(dev)) {
2549 hotplug_mask = intel_sdvo->is_sdvob ?
2550 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2551 } else if (IS_GEN4(dev)) {
2552 hotplug_mask = intel_sdvo->is_sdvob ?
2553 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2554 } else {
2555 hotplug_mask = intel_sdvo->is_sdvob ?
2556 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2557 }
2558 dev_priv->hotplug_supported_mask |= hotplug_mask;
Ma Ling619ac3b2009-05-18 16:12:46 +08002559
Chris Wilson4ef69c72010-09-09 15:14:28 +01002560 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002561
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002562 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002563 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002564 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002565
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002566 /* Set up hotplug command - note paranoia about contents of reply.
2567 * We assume that the hardware is in a sane state, and only touch
2568 * the bits we think we understand.
2569 */
2570 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2571 &intel_sdvo->hotplug_active, 2);
2572 intel_sdvo->hotplug_active[0] &= ~0x3;
2573
Chris Wilsonea5b2132010-08-04 13:50:23 +01002574 if (intel_sdvo_output_setup(intel_sdvo,
2575 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002576 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2577 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002578 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002579 }
2580
Chris Wilsonea5b2132010-08-04 13:50:23 +01002581 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002582
Jesse Barnes79e53942008-11-07 14:24:08 -08002583 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002584 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002585 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002586
Chris Wilson32aad862010-08-04 13:50:25 +01002587 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2588 &intel_sdvo->pixel_clock_min,
2589 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002590 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002591
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002592 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002593 "clock range %dMHz - %dMHz, "
2594 "input 1: %c, input 2: %c, "
2595 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002596 SDVO_NAME(intel_sdvo),
2597 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2598 intel_sdvo->caps.device_rev_id,
2599 intel_sdvo->pixel_clock_min / 1000,
2600 intel_sdvo->pixel_clock_max / 1000,
2601 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2602 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002603 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002604 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002605 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002606 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002607 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002608 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002609
Chris Wilsonf899fc62010-07-20 15:44:45 -07002610err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002611 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002612 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002613 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002614
Eric Anholt7d573822009-01-02 13:33:00 -08002615 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002616}