blob: 46c53a042e6b3429d1a0cb693bc5c0fa7a1ab855 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020062#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020063#include "core.h"
64#include "reg.h"
65#include "port.h"
66#include "trap.h"
67#include "txheader.h"
68
69static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
70static const char mlxsw_sp_driver_version[] = "1.0";
71
72/* tx_hdr_version
73 * Tx header version.
74 * Must be set to 1.
75 */
76MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
77
78/* tx_hdr_ctl
79 * Packet control type.
80 * 0 - Ethernet control (e.g. EMADs, LACP)
81 * 1 - Ethernet data
82 */
83MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
84
85/* tx_hdr_proto
86 * Packet protocol type. Must be set to 1 (Ethernet).
87 */
88MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
89
90/* tx_hdr_rx_is_router
91 * Packet is sent from the router. Valid for data packets only.
92 */
93MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
94
95/* tx_hdr_fid_valid
96 * Indicates if the 'fid' field is valid and should be used for
97 * forwarding lookup. Valid for data packets only.
98 */
99MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
100
101/* tx_hdr_swid
102 * Switch partition ID. Must be set to 0.
103 */
104MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
105
106/* tx_hdr_control_tclass
107 * Indicates if the packet should use the control TClass and not one
108 * of the data TClasses.
109 */
110MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
111
112/* tx_hdr_etclass
113 * Egress TClass to be used on the egress device on the egress port.
114 */
115MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
116
117/* tx_hdr_port_mid
118 * Destination local port for unicast packets.
119 * Destination multicast ID for multicast packets.
120 *
121 * Control packets are directed to a specific egress port, while data
122 * packets are transmitted through the CPU port (0) into the switch partition,
123 * where forwarding rules are applied.
124 */
125MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
126
127/* tx_hdr_fid
128 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
129 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
130 * Valid for data packets only.
131 */
132MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
133
134/* tx_hdr_type
135 * 0 - Data packets
136 * 6 - Control packets
137 */
138MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
139
Yotam Gigi763b4b72016-07-21 12:03:17 +0200140static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
141
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200142static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
143 const struct mlxsw_tx_info *tx_info)
144{
145 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
146
147 memset(txhdr, 0, MLXSW_TXHDR_LEN);
148
149 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
150 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
151 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
152 mlxsw_tx_hdr_swid_set(txhdr, 0);
153 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
154 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
155 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
156}
157
158static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
159{
Elad Raz5b090742016-10-28 21:35:46 +0200160 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200161 int err;
162
163 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
164 if (err)
165 return err;
166 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
167 return 0;
168}
169
Yotam Gigi763b4b72016-07-21 12:03:17 +0200170static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
171{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200172 int i;
173
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200174 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200175 return -EIO;
176
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200177 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
178 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
Yotam Gigi2d644d42016-11-11 16:34:25 +0100234 span_entry->ref_count = 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200251static struct mlxsw_sp_span_entry *
252mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200253{
254 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
255 int i;
256
257 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
258 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
259
260 if (curr->used && curr->local_port == port->local_port)
261 return curr;
262 }
263 return NULL;
264}
265
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200266static struct mlxsw_sp_span_entry
267*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200268{
269 struct mlxsw_sp_span_entry *span_entry;
270
271 span_entry = mlxsw_sp_span_entry_find(port);
272 if (span_entry) {
Yotam Gigi2d644d42016-11-11 16:34:25 +0100273 /* Already exists, just take a reference */
Yotam Gigi763b4b72016-07-21 12:03:17 +0200274 span_entry->ref_count++;
275 return span_entry;
276 }
277
278 return mlxsw_sp_span_entry_create(port);
279}
280
281static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
282 struct mlxsw_sp_span_entry *span_entry)
283{
Yotam Gigi2d644d42016-11-11 16:34:25 +0100284 WARN_ON(!span_entry->ref_count);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200285 if (--span_entry->ref_count == 0)
286 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
287 return 0;
288}
289
290static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
291{
292 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
293 struct mlxsw_sp_span_inspected_port *p;
294 int i;
295
296 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
297 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
298
299 list_for_each_entry(p, &curr->bound_ports_list, list)
300 if (p->local_port == port->local_port &&
301 p->type == MLXSW_SP_SPAN_EGRESS)
302 return true;
303 }
304
305 return false;
306}
307
308static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
309{
310 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
311}
312
313static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
314{
315 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
316 char sbib_pl[MLXSW_REG_SBIB_LEN];
317 int err;
318
319 /* If port is egress mirrored, the shared buffer size should be
320 * updated according to the mtu value
321 */
322 if (mlxsw_sp_span_is_egress_mirror(port)) {
323 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
324 mlxsw_sp_span_mtu_to_buffsize(mtu));
325 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
326 if (err) {
327 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
328 return err;
329 }
330 }
331
332 return 0;
333}
334
335static struct mlxsw_sp_span_inspected_port *
336mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
337 struct mlxsw_sp_span_entry *span_entry)
338{
339 struct mlxsw_sp_span_inspected_port *p;
340
341 list_for_each_entry(p, &span_entry->bound_ports_list, list)
342 if (port->local_port == p->local_port)
343 return p;
344 return NULL;
345}
346
347static int
348mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
349 struct mlxsw_sp_span_entry *span_entry,
350 enum mlxsw_sp_span_type type)
351{
352 struct mlxsw_sp_span_inspected_port *inspected_port;
353 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
354 char mpar_pl[MLXSW_REG_MPAR_LEN];
355 char sbib_pl[MLXSW_REG_SBIB_LEN];
356 int pa_id = span_entry->id;
357 int err;
358
359 /* if it is an egress SPAN, bind a shared buffer to it */
360 if (type == MLXSW_SP_SPAN_EGRESS) {
361 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
362 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
363 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
364 if (err) {
365 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
366 return err;
367 }
368 }
369
370 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200371 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
372 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200373 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
374 if (err)
375 goto err_mpar_reg_write;
376
377 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
378 if (!inspected_port) {
379 err = -ENOMEM;
380 goto err_inspected_port_alloc;
381 }
382 inspected_port->local_port = port->local_port;
383 inspected_port->type = type;
384 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
385
386 return 0;
387
388err_mpar_reg_write:
389err_inspected_port_alloc:
390 if (type == MLXSW_SP_SPAN_EGRESS) {
391 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
392 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
393 }
394 return err;
395}
396
397static void
398mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
399 struct mlxsw_sp_span_entry *span_entry,
400 enum mlxsw_sp_span_type type)
401{
402 struct mlxsw_sp_span_inspected_port *inspected_port;
403 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
404 char mpar_pl[MLXSW_REG_MPAR_LEN];
405 char sbib_pl[MLXSW_REG_SBIB_LEN];
406 int pa_id = span_entry->id;
407
408 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
409 if (!inspected_port)
410 return;
411
412 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200413 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
414 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200415 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
416
417 /* remove the SBIB buffer if it was egress SPAN */
418 if (type == MLXSW_SP_SPAN_EGRESS) {
419 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
420 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
421 }
422
423 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
424
425 list_del(&inspected_port->list);
426 kfree(inspected_port);
427}
428
429static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
430 struct mlxsw_sp_port *to,
431 enum mlxsw_sp_span_type type)
432{
433 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
434 struct mlxsw_sp_span_entry *span_entry;
435 int err;
436
437 span_entry = mlxsw_sp_span_entry_get(to);
438 if (!span_entry)
439 return -ENOENT;
440
441 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
442 span_entry->id);
443
444 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
445 if (err)
446 goto err_port_bind;
447
448 return 0;
449
450err_port_bind:
451 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
452 return err;
453}
454
455static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
456 struct mlxsw_sp_port *to,
457 enum mlxsw_sp_span_type type)
458{
459 struct mlxsw_sp_span_entry *span_entry;
460
461 span_entry = mlxsw_sp_span_entry_find(to);
462 if (!span_entry) {
463 netdev_err(from->dev, "no span entry found\n");
464 return;
465 }
466
467 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
468 span_entry->id);
469 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
470}
471
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200472static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
473 bool is_up)
474{
475 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
476 char paos_pl[MLXSW_REG_PAOS_LEN];
477
478 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
479 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
480 MLXSW_PORT_ADMIN_STATUS_DOWN);
481 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
482}
483
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200484static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
485 unsigned char *addr)
486{
487 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
488 char ppad_pl[MLXSW_REG_PPAD_LEN];
489
490 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
491 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
492 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
493}
494
495static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
496{
497 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
498 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
499
500 ether_addr_copy(addr, mlxsw_sp->base_mac);
501 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
502 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
503}
504
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200505static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
506{
507 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
508 char pmtu_pl[MLXSW_REG_PMTU_LEN];
509 int max_mtu;
510 int err;
511
512 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
513 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
514 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
515 if (err)
516 return err;
517 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
518
519 if (mtu > max_mtu)
520 return -EINVAL;
521
522 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
523 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
524}
525
Ido Schimmelbe945352016-06-09 09:51:39 +0200526static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
527 u8 swid)
528{
529 char pspa_pl[MLXSW_REG_PSPA_LEN];
530
531 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
532 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
533}
534
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200535static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
536{
537 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200538
Ido Schimmelbe945352016-06-09 09:51:39 +0200539 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
540 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200541}
542
543static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
544 bool enable)
545{
546 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
547 char svpe_pl[MLXSW_REG_SVPE_LEN];
548
549 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
550 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
551}
552
553int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
554 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
555 u16 vid)
556{
557 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
558 char svfa_pl[MLXSW_REG_SVFA_LEN];
559
560 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
561 fid, vid);
562 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
563}
564
Ido Schimmel584d73d2016-08-24 12:00:26 +0200565int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
566 u16 vid_begin, u16 vid_end,
567 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200568{
569 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
570 char *spvmlr_pl;
571 int err;
572
573 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
574 if (!spvmlr_pl)
575 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200576 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
577 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200578 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
579 kfree(spvmlr_pl);
580 return err;
581}
582
Ido Schimmel584d73d2016-08-24 12:00:26 +0200583static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
584 u16 vid, bool learn_enable)
585{
586 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
587 learn_enable);
588}
589
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200590static int
591mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
592{
593 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
594 char sspr_pl[MLXSW_REG_SSPR_LEN];
595
596 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
597 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
598}
599
Ido Schimmeld664b412016-06-09 09:51:40 +0200600static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
601 u8 local_port, u8 *p_module,
602 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200603{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200604 char pmlp_pl[MLXSW_REG_PMLP_LEN];
605 int err;
606
Ido Schimmel558c2d52016-02-26 17:32:29 +0100607 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200608 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
609 if (err)
610 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100611 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
612 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200613 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200614 return 0;
615}
616
Ido Schimmel18f1e702016-02-26 17:32:31 +0100617static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
618 u8 module, u8 width, u8 lane)
619{
620 char pmlp_pl[MLXSW_REG_PMLP_LEN];
621 int i;
622
623 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
624 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
625 for (i = 0; i < width; i++) {
626 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
627 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
628 }
629
630 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
631}
632
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100633static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
634{
635 char pmlp_pl[MLXSW_REG_PMLP_LEN];
636
637 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
638 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
639 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
640}
641
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200642static int mlxsw_sp_port_open(struct net_device *dev)
643{
644 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
645 int err;
646
647 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
648 if (err)
649 return err;
650 netif_start_queue(dev);
651 return 0;
652}
653
654static int mlxsw_sp_port_stop(struct net_device *dev)
655{
656 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
657
658 netif_stop_queue(dev);
659 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
660}
661
662static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
663 struct net_device *dev)
664{
665 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
666 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
667 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
668 const struct mlxsw_tx_info tx_info = {
669 .local_port = mlxsw_sp_port->local_port,
670 .is_emad = false,
671 };
672 u64 len;
673 int err;
674
Jiri Pirko307c2432016-04-08 19:11:22 +0200675 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200676 return NETDEV_TX_BUSY;
677
678 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
679 struct sk_buff *skb_orig = skb;
680
681 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
682 if (!skb) {
683 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
684 dev_kfree_skb_any(skb_orig);
685 return NETDEV_TX_OK;
686 }
687 }
688
689 if (eth_skb_pad(skb)) {
690 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
691 return NETDEV_TX_OK;
692 }
693
694 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200695 /* TX header is consumed by HW on the way so we shouldn't count its
696 * bytes as being sent.
697 */
698 len = skb->len - MLXSW_TXHDR_LEN;
699
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200700 /* Due to a race we might fail here because of a full queue. In that
701 * unlikely case we simply drop the packet.
702 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200703 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200704
705 if (!err) {
706 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
707 u64_stats_update_begin(&pcpu_stats->syncp);
708 pcpu_stats->tx_packets++;
709 pcpu_stats->tx_bytes += len;
710 u64_stats_update_end(&pcpu_stats->syncp);
711 } else {
712 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
713 dev_kfree_skb_any(skb);
714 }
715 return NETDEV_TX_OK;
716}
717
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100718static void mlxsw_sp_set_rx_mode(struct net_device *dev)
719{
720}
721
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200722static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
723{
724 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
725 struct sockaddr *addr = p;
726 int err;
727
728 if (!is_valid_ether_addr(addr->sa_data))
729 return -EADDRNOTAVAIL;
730
731 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
732 if (err)
733 return err;
734 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
735 return 0;
736}
737
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200738static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200739 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200740{
741 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
742
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200743 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
744 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200745
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200746 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200747 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200748 pg_size + delay, pg_size);
749 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200750 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200751}
752
753int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200754 u8 *prio_tc, bool pause_en,
755 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200756{
757 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200758 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
759 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200760 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200762
763 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
764 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
765 if (err)
766 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200767
768 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
769 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200770 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200771
772 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
773 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200774 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200775 configure = true;
776 break;
777 }
778 }
779
780 if (!configure)
781 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200782 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200783 }
784
Ido Schimmelff6551e2016-04-06 17:10:03 +0200785 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
786}
787
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200788static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200789 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200790{
791 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
792 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200793 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200794 u8 *prio_tc;
795
796 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200797 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200798
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200799 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200800 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200801}
802
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200803static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
804{
805 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200806 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200807 int err;
808
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200809 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200810 if (err)
811 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200812 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
813 if (err)
814 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200815 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
816 if (err)
817 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200818 dev->mtu = mtu;
819 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200820
821err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200822 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
823err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200824 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200825 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200826}
827
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300828static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200829mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
830 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200831{
832 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
833 struct mlxsw_sp_port_pcpu_stats *p;
834 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
835 u32 tx_dropped = 0;
836 unsigned int start;
837 int i;
838
839 for_each_possible_cpu(i) {
840 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
841 do {
842 start = u64_stats_fetch_begin_irq(&p->syncp);
843 rx_packets = p->rx_packets;
844 rx_bytes = p->rx_bytes;
845 tx_packets = p->tx_packets;
846 tx_bytes = p->tx_bytes;
847 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
848
849 stats->rx_packets += rx_packets;
850 stats->rx_bytes += rx_bytes;
851 stats->tx_packets += tx_packets;
852 stats->tx_bytes += tx_bytes;
853 /* tx_dropped is u32, updated without syncp protection. */
854 tx_dropped += p->tx_dropped;
855 }
856 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200857 return 0;
858}
859
Or Gerlitz3df5b3c2016-11-22 23:09:54 +0200860static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200861{
862 switch (attr_id) {
863 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
864 return true;
865 }
866
867 return false;
868}
869
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300870static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
871 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200872{
873 switch (attr_id) {
874 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
875 return mlxsw_sp_port_get_sw_stats64(dev, sp);
876 }
877
878 return -EINVAL;
879}
880
881static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
882 int prio, char *ppcnt_pl)
883{
884 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
885 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
886
887 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
888 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
889}
890
891static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
892 struct rtnl_link_stats64 *stats)
893{
894 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
895 int err;
896
897 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
898 0, ppcnt_pl);
899 if (err)
900 goto out;
901
902 stats->tx_packets =
903 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
904 stats->rx_packets =
905 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
906 stats->tx_bytes =
907 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
908 stats->rx_bytes =
909 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
910 stats->multicast =
911 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
912
913 stats->rx_crc_errors =
914 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
915 stats->rx_frame_errors =
916 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
917
918 stats->rx_length_errors = (
919 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
920 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
921 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
922
923 stats->rx_errors = (stats->rx_crc_errors +
924 stats->rx_frame_errors + stats->rx_length_errors);
925
926out:
927 return err;
928}
929
930static void update_stats_cache(struct work_struct *work)
931{
932 struct mlxsw_sp_port *mlxsw_sp_port =
933 container_of(work, struct mlxsw_sp_port,
934 hw_stats.update_dw.work);
935
936 if (!netif_carrier_ok(mlxsw_sp_port->dev))
937 goto out;
938
939 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
940 mlxsw_sp_port->hw_stats.cache);
941
942out:
943 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
944 MLXSW_HW_STATS_UPDATE_TIME);
945}
946
947/* Return the stats from a cache that is updated periodically,
948 * as this function might get called in an atomic context.
949 */
stephen hemmingerbc1f4472017-01-06 19:12:52 -0800950static void
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200951mlxsw_sp_port_get_stats64(struct net_device *dev,
952 struct rtnl_link_stats64 *stats)
953{
954 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
955
956 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200957}
958
959int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
960 u16 vid_end, bool is_member, bool untagged)
961{
962 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
963 char *spvm_pl;
964 int err;
965
966 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
967 if (!spvm_pl)
968 return -ENOMEM;
969
970 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
971 vid_end, is_member, untagged);
972 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
973 kfree(spvm_pl);
974 return err;
975}
976
977static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
978{
979 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
980 u16 vid, last_visited_vid;
981 int err;
982
983 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
984 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
985 vid);
986 if (err) {
987 last_visited_vid = vid;
988 goto err_port_vid_to_fid_set;
989 }
990 }
991
992 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
993 if (err) {
994 last_visited_vid = VLAN_N_VID;
995 goto err_port_vid_to_fid_set;
996 }
997
998 return 0;
999
1000err_port_vid_to_fid_set:
1001 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1002 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1003 vid);
1004 return err;
1005}
1006
1007static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1008{
1009 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1010 u16 vid;
1011 int err;
1012
1013 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1014 if (err)
1015 return err;
1016
1017 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1018 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1019 vid, vid);
1020 if (err)
1021 return err;
1022 }
1023
1024 return 0;
1025}
1026
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001027static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001028mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001029{
1030 struct mlxsw_sp_port *mlxsw_sp_vport;
1031
1032 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1033 if (!mlxsw_sp_vport)
1034 return NULL;
1035
1036 /* dev will be set correctly after the VLAN device is linked
1037 * with the real device. In case of bridge SELF invocation, dev
1038 * will remain as is.
1039 */
1040 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1041 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1042 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1043 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001044 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1045 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001046 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001047
1048 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1049
1050 return mlxsw_sp_vport;
1051}
1052
1053static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1054{
1055 list_del(&mlxsw_sp_vport->vport.list);
1056 kfree(mlxsw_sp_vport);
1057}
1058
Ido Schimmel05978482016-08-17 16:39:30 +02001059static int mlxsw_sp_port_add_vid(struct net_device *dev,
1060 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001061{
1062 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001063 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001064 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001065 int err;
1066
1067 /* VLAN 0 is added to HW filter when device goes up, but it is
1068 * reserved in our case, so simply return.
1069 */
1070 if (!vid)
1071 return 0;
1072
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001073 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001074 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001075
Ido Schimmel0355b592016-06-20 23:04:13 +02001076 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001077 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001078 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001079
1080 /* When adding the first VLAN interface on a bridged port we need to
1081 * transition all the active 802.1Q bridge VLANs to use explicit
1082 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1083 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001084 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001085 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001086 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001087 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001088 }
1089
Ido Schimmel52697a92016-07-02 11:00:09 +02001090 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001091 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001092 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001093
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001094 return 0;
1095
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001096err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001097 if (list_is_singular(&mlxsw_sp_port->vports_list))
1098 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1099err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001100 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001101 return err;
1102}
1103
Ido Schimmel32d863f2016-07-02 11:00:10 +02001104static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1105 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001106{
1107 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001108 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001109 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001110
1111 /* VLAN 0 is removed from HW filter when device goes down, but
1112 * it is reserved in our case, so simply return.
1113 */
1114 if (!vid)
1115 return 0;
1116
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001117 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001118 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001119 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001120
Ido Schimmel7a355832016-08-17 16:39:28 +02001121 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001122
Ido Schimmel1c800752016-06-20 23:04:20 +02001123 /* Drop FID reference. If this was the last reference the
1124 * resources will be freed.
1125 */
1126 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1127 if (f && !WARN_ON(!f->leave))
1128 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001129
1130 /* When removing the last VLAN interface on a bridged port we need to
1131 * transition all active 802.1Q bridge VLANs to use VID to FID
1132 * mappings and set port's mode to VLAN mode.
1133 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001134 if (list_is_singular(&mlxsw_sp_port->vports_list))
1135 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001136
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001137 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1138
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001139 return 0;
1140}
1141
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001142static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1143 size_t len)
1144{
1145 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001146 u8 module = mlxsw_sp_port->mapping.module;
1147 u8 width = mlxsw_sp_port->mapping.width;
1148 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001149 int err;
1150
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001151 if (!mlxsw_sp_port->split)
1152 err = snprintf(name, len, "p%d", module + 1);
1153 else
1154 err = snprintf(name, len, "p%ds%d", module + 1,
1155 lane / width);
1156
1157 if (err >= len)
1158 return -EINVAL;
1159
1160 return 0;
1161}
1162
Yotam Gigi763b4b72016-07-21 12:03:17 +02001163static struct mlxsw_sp_port_mall_tc_entry *
1164mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1165 unsigned long cookie) {
1166 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1167
1168 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1169 if (mall_tc_entry->cookie == cookie)
1170 return mall_tc_entry;
1171
1172 return NULL;
1173}
1174
1175static int
1176mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1177 struct tc_cls_matchall_offload *cls,
1178 const struct tc_action *a,
1179 bool ingress)
1180{
1181 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1182 struct net *net = dev_net(mlxsw_sp_port->dev);
1183 enum mlxsw_sp_span_type span_type;
1184 struct mlxsw_sp_port *to_port;
1185 struct net_device *to_dev;
1186 int ifindex;
1187 int err;
1188
1189 ifindex = tcf_mirred_ifindex(a);
1190 to_dev = __dev_get_by_index(net, ifindex);
1191 if (!to_dev) {
1192 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1193 return -EINVAL;
1194 }
1195
1196 if (!mlxsw_sp_port_dev_check(to_dev)) {
1197 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1198 return -ENOTSUPP;
1199 }
1200 to_port = netdev_priv(to_dev);
1201
1202 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1203 if (!mall_tc_entry)
1204 return -ENOMEM;
1205
1206 mall_tc_entry->cookie = cls->cookie;
1207 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1208 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1209 mall_tc_entry->mirror.ingress = ingress;
1210 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1211
1212 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1213 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1214 if (err)
1215 goto err_mirror_add;
1216 return 0;
1217
1218err_mirror_add:
1219 list_del(&mall_tc_entry->list);
1220 kfree(mall_tc_entry);
1221 return err;
1222}
1223
1224static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1225 __be16 protocol,
1226 struct tc_cls_matchall_offload *cls,
1227 bool ingress)
1228{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001229 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001230 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001231 int err;
1232
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001233 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001234 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1235 return -ENOTSUPP;
1236 }
1237
WANG Cong22dc13c2016-08-13 22:35:00 -07001238 tcf_exts_to_list(cls->exts, &actions);
1239 list_for_each_entry(a, &actions, list) {
Shmulik Ladkani5724b8b2016-10-13 09:06:43 +03001240 if (!is_tcf_mirred_egress_mirror(a) ||
1241 protocol != htons(ETH_P_ALL)) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001242 return -ENOTSUPP;
Shmulik Ladkani5724b8b2016-10-13 09:06:43 +03001243 }
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001244
Yotam Gigi763b4b72016-07-21 12:03:17 +02001245 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1246 a, ingress);
1247 if (err)
1248 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001249 }
1250
1251 return 0;
1252}
1253
1254static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1255 struct tc_cls_matchall_offload *cls)
1256{
1257 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1258 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1259 enum mlxsw_sp_span_type span_type;
1260 struct mlxsw_sp_port *to_port;
1261
1262 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1263 cls->cookie);
1264 if (!mall_tc_entry) {
1265 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1266 return;
1267 }
1268
1269 switch (mall_tc_entry->type) {
1270 case MLXSW_SP_PORT_MALL_MIRROR:
1271 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1272 span_type = mall_tc_entry->mirror.ingress ?
1273 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1274
1275 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1276 break;
1277 default:
1278 WARN_ON(1);
1279 }
1280
1281 list_del(&mall_tc_entry->list);
1282 kfree(mall_tc_entry);
1283}
1284
1285static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1286 __be16 proto, struct tc_to_netdev *tc)
1287{
1288 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1289 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1290
1291 if (tc->type == TC_SETUP_MATCHALL) {
1292 switch (tc->cls_mall->command) {
1293 case TC_CLSMATCHALL_REPLACE:
1294 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1295 proto,
1296 tc->cls_mall,
1297 ingress);
1298 case TC_CLSMATCHALL_DESTROY:
1299 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1300 tc->cls_mall);
1301 return 0;
1302 default:
1303 return -EINVAL;
1304 }
1305 }
1306
1307 return -ENOTSUPP;
1308}
1309
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001310static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1311 .ndo_open = mlxsw_sp_port_open,
1312 .ndo_stop = mlxsw_sp_port_stop,
1313 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001314 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001315 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001316 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1317 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1318 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001319 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1320 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001321 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1322 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001323 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1324 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001325 .ndo_fdb_add = switchdev_port_fdb_add,
1326 .ndo_fdb_del = switchdev_port_fdb_del,
1327 .ndo_fdb_dump = switchdev_port_fdb_dump,
1328 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1329 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1330 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001331 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001332};
1333
1334static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1335 struct ethtool_drvinfo *drvinfo)
1336{
1337 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1338 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1339
1340 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1341 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1342 sizeof(drvinfo->version));
1343 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1344 "%d.%d.%d",
1345 mlxsw_sp->bus_info->fw_rev.major,
1346 mlxsw_sp->bus_info->fw_rev.minor,
1347 mlxsw_sp->bus_info->fw_rev.subminor);
1348 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1349 sizeof(drvinfo->bus_info));
1350}
1351
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001352static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1353 struct ethtool_pauseparam *pause)
1354{
1355 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1356
1357 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1358 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1359}
1360
1361static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1362 struct ethtool_pauseparam *pause)
1363{
1364 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1365
1366 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1367 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1368 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1369
1370 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1371 pfcc_pl);
1372}
1373
1374static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1375 struct ethtool_pauseparam *pause)
1376{
1377 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1378 bool pause_en = pause->tx_pause || pause->rx_pause;
1379 int err;
1380
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001381 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1382 netdev_err(dev, "PFC already enabled on port\n");
1383 return -EINVAL;
1384 }
1385
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001386 if (pause->autoneg) {
1387 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1388 return -EINVAL;
1389 }
1390
1391 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1392 if (err) {
1393 netdev_err(dev, "Failed to configure port's headroom\n");
1394 return err;
1395 }
1396
1397 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1398 if (err) {
1399 netdev_err(dev, "Failed to set PAUSE parameters\n");
1400 goto err_port_pause_configure;
1401 }
1402
1403 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1404 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1405
1406 return 0;
1407
1408err_port_pause_configure:
1409 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1410 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1411 return err;
1412}
1413
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001414struct mlxsw_sp_port_hw_stats {
1415 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001416 u64 (*getter)(const char *payload);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001417};
1418
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001419static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001420 {
1421 .str = "a_frames_transmitted_ok",
1422 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1423 },
1424 {
1425 .str = "a_frames_received_ok",
1426 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1427 },
1428 {
1429 .str = "a_frame_check_sequence_errors",
1430 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1431 },
1432 {
1433 .str = "a_alignment_errors",
1434 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1435 },
1436 {
1437 .str = "a_octets_transmitted_ok",
1438 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1439 },
1440 {
1441 .str = "a_octets_received_ok",
1442 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1443 },
1444 {
1445 .str = "a_multicast_frames_xmitted_ok",
1446 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1447 },
1448 {
1449 .str = "a_broadcast_frames_xmitted_ok",
1450 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1451 },
1452 {
1453 .str = "a_multicast_frames_received_ok",
1454 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1455 },
1456 {
1457 .str = "a_broadcast_frames_received_ok",
1458 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1459 },
1460 {
1461 .str = "a_in_range_length_errors",
1462 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1463 },
1464 {
1465 .str = "a_out_of_range_length_field",
1466 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1467 },
1468 {
1469 .str = "a_frame_too_long_errors",
1470 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1471 },
1472 {
1473 .str = "a_symbol_error_during_carrier",
1474 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1475 },
1476 {
1477 .str = "a_mac_control_frames_transmitted",
1478 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1479 },
1480 {
1481 .str = "a_mac_control_frames_received",
1482 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1483 },
1484 {
1485 .str = "a_unsupported_opcodes_received",
1486 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1487 },
1488 {
1489 .str = "a_pause_mac_ctrl_frames_received",
1490 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1491 },
1492 {
1493 .str = "a_pause_mac_ctrl_frames_xmitted",
1494 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1495 },
1496};
1497
1498#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1499
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001500static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1501 {
1502 .str = "rx_octets_prio",
1503 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1504 },
1505 {
1506 .str = "rx_frames_prio",
1507 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1508 },
1509 {
1510 .str = "tx_octets_prio",
1511 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1512 },
1513 {
1514 .str = "tx_frames_prio",
1515 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1516 },
1517 {
1518 .str = "rx_pause_prio",
1519 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1520 },
1521 {
1522 .str = "rx_pause_duration_prio",
1523 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1524 },
1525 {
1526 .str = "tx_pause_prio",
1527 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1528 },
1529 {
1530 .str = "tx_pause_duration_prio",
1531 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1532 },
1533};
1534
1535#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1536
Jiri Pirko412791d2016-10-21 16:07:19 +02001537static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001538{
1539 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1540
1541 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1542}
1543
1544static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1545 {
1546 .str = "tc_transmit_queue_tc",
1547 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1548 },
1549 {
1550 .str = "tc_no_buffer_discard_uc_tc",
1551 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1552 },
1553};
1554
1555#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1556
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001557#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001558 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1559 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001560 IEEE_8021QAZ_MAX_TCS)
1561
1562static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1563{
1564 int i;
1565
1566 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1567 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1568 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1569 *p += ETH_GSTRING_LEN;
1570 }
1571}
1572
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001573static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1574{
1575 int i;
1576
1577 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1578 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1579 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1580 *p += ETH_GSTRING_LEN;
1581 }
1582}
1583
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001584static void mlxsw_sp_port_get_strings(struct net_device *dev,
1585 u32 stringset, u8 *data)
1586{
1587 u8 *p = data;
1588 int i;
1589
1590 switch (stringset) {
1591 case ETH_SS_STATS:
1592 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1593 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1594 ETH_GSTRING_LEN);
1595 p += ETH_GSTRING_LEN;
1596 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001597
1598 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1599 mlxsw_sp_port_get_prio_strings(&p, i);
1600
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001601 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1602 mlxsw_sp_port_get_tc_strings(&p, i);
1603
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001604 break;
1605 }
1606}
1607
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001608static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1609 enum ethtool_phys_id_state state)
1610{
1611 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1612 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1613 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1614 bool active;
1615
1616 switch (state) {
1617 case ETHTOOL_ID_ACTIVE:
1618 active = true;
1619 break;
1620 case ETHTOOL_ID_INACTIVE:
1621 active = false;
1622 break;
1623 default:
1624 return -EOPNOTSUPP;
1625 }
1626
1627 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1628 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1629}
1630
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001631static int
1632mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1633 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1634{
1635 switch (grp) {
1636 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1637 *p_hw_stats = mlxsw_sp_port_hw_stats;
1638 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1639 break;
1640 case MLXSW_REG_PPCNT_PRIO_CNT:
1641 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1642 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1643 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001644 case MLXSW_REG_PPCNT_TC_CNT:
1645 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1646 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1647 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001648 default:
1649 WARN_ON(1);
1650 return -ENOTSUPP;
1651 }
1652 return 0;
1653}
1654
1655static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1656 enum mlxsw_reg_ppcnt_grp grp, int prio,
1657 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001658{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001659 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001660 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001661 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001662 int err;
1663
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001664 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1665 if (err)
1666 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001667 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001668 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001669 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001670}
1671
1672static void mlxsw_sp_port_get_stats(struct net_device *dev,
1673 struct ethtool_stats *stats, u64 *data)
1674{
1675 int i, data_index = 0;
1676
1677 /* IEEE 802.3 Counters */
1678 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1679 data, data_index);
1680 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1681
1682 /* Per-Priority Counters */
1683 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1684 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1685 data, data_index);
1686 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1687 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001688
1689 /* Per-TC Counters */
1690 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1691 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1692 data, data_index);
1693 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1694 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001695}
1696
1697static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1698{
1699 switch (sset) {
1700 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001701 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001702 default:
1703 return -EOPNOTSUPP;
1704 }
1705}
1706
1707struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001708 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001709 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001710 u32 speed;
1711};
1712
1713static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1714 {
1715 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001716 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1717 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001718 },
1719 {
1720 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1721 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001722 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1723 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001724 },
1725 {
1726 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001727 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1728 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001729 },
1730 {
1731 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1732 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001733 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1734 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001735 },
1736 {
1737 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1738 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1739 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1740 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001741 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1742 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001743 },
1744 {
1745 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001746 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1747 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001748 },
1749 {
1750 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001751 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1752 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001753 },
1754 {
1755 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001756 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1757 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001758 },
1759 {
1760 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001761 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1762 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001763 },
1764 {
1765 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001766 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1767 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001768 },
1769 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001770 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1771 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1772 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001773 },
1774 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001775 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1776 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1777 .speed = SPEED_25000,
1778 },
1779 {
1780 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1781 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1782 .speed = SPEED_25000,
1783 },
1784 {
1785 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1786 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1787 .speed = SPEED_25000,
1788 },
1789 {
1790 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1791 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1792 .speed = SPEED_50000,
1793 },
1794 {
1795 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1796 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1797 .speed = SPEED_50000,
1798 },
1799 {
1800 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1801 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1802 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001803 },
1804 {
1805 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001806 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1807 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001808 },
1809 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001810 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1811 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1812 .speed = SPEED_56000,
1813 },
1814 {
1815 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1816 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1817 .speed = SPEED_56000,
1818 },
1819 {
1820 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1821 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1822 .speed = SPEED_56000,
1823 },
1824 {
1825 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1826 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1827 .speed = SPEED_100000,
1828 },
1829 {
1830 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1831 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1832 .speed = SPEED_100000,
1833 },
1834 {
1835 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1836 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1837 .speed = SPEED_100000,
1838 },
1839 {
1840 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1841 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1842 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001843 },
1844};
1845
1846#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1847
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001848static void
1849mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1850 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001851{
1852 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1853 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1854 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1855 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1856 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1857 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001858 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001859
1860 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1861 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1862 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1863 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1864 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001865 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001866}
1867
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001868static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001869{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001870 int i;
1871
1872 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1873 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001874 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1875 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001876 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001877}
1878
1879static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001880 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001881{
1882 u32 speed = SPEED_UNKNOWN;
1883 u8 duplex = DUPLEX_UNKNOWN;
1884 int i;
1885
1886 if (!carrier_ok)
1887 goto out;
1888
1889 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1890 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1891 speed = mlxsw_sp_port_link_mode[i].speed;
1892 duplex = DUPLEX_FULL;
1893 break;
1894 }
1895 }
1896out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001897 cmd->base.speed = speed;
1898 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001899}
1900
1901static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1902{
1903 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1904 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1905 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1906 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1907 return PORT_FIBRE;
1908
1909 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1910 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1911 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1912 return PORT_DA;
1913
1914 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1915 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1916 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1917 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1918 return PORT_NONE;
1919
1920 return PORT_OTHER;
1921}
1922
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001923static u32
1924mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001925{
1926 u32 ptys_proto = 0;
1927 int i;
1928
1929 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001930 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1931 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001932 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1933 }
1934 return ptys_proto;
1935}
1936
1937static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1938{
1939 u32 ptys_proto = 0;
1940 int i;
1941
1942 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1943 if (speed == mlxsw_sp_port_link_mode[i].speed)
1944 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1945 }
1946 return ptys_proto;
1947}
1948
Ido Schimmel18f1e702016-02-26 17:32:31 +01001949static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1950{
1951 u32 ptys_proto = 0;
1952 int i;
1953
1954 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1955 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1956 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1957 }
1958 return ptys_proto;
1959}
1960
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001961static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1962 struct ethtool_link_ksettings *cmd)
1963{
1964 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1965 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1966 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1967
1968 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1969 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1970}
1971
1972static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1973 struct ethtool_link_ksettings *cmd)
1974{
1975 if (!autoneg)
1976 return;
1977
1978 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1979 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1980}
1981
1982static void
1983mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1984 struct ethtool_link_ksettings *cmd)
1985{
1986 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1987 return;
1988
1989 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1990 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1991}
1992
1993static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
1994 struct ethtool_link_ksettings *cmd)
1995{
1996 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
1997 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1998 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1999 char ptys_pl[MLXSW_REG_PTYS_LEN];
2000 u8 autoneg_status;
2001 bool autoneg;
2002 int err;
2003
2004 autoneg = mlxsw_sp_port->link.autoneg;
Elad Raz401c8b42016-10-28 21:35:52 +02002005 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002006 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2007 if (err)
2008 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002009 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2010 &eth_proto_oper);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002011
2012 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2013
2014 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2015
2016 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2017 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2018 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2019
2020 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2021 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2022 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2023 cmd);
2024
2025 return 0;
2026}
2027
2028static int
2029mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2030 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002031{
2032 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2033 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2034 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002035 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002036 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002037 int err;
2038
Elad Raz401c8b42016-10-28 21:35:52 +02002039 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002040 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002041 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002042 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002043 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002044
2045 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2046 eth_proto_new = autoneg ?
2047 mlxsw_sp_to_ptys_advert_link(cmd) :
2048 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002049
2050 eth_proto_new = eth_proto_new & eth_proto_cap;
2051 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002052 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002053 return -EINVAL;
2054 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002055
Elad Raz401c8b42016-10-28 21:35:52 +02002056 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2057 eth_proto_new);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002058 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002059 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002060 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002061
Ido Schimmel6277d462016-07-15 11:14:58 +02002062 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002063 return 0;
2064
Ido Schimmel0c83f882016-09-12 13:26:23 +02002065 mlxsw_sp_port->link.autoneg = autoneg;
2066
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002067 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2068 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002069
2070 return 0;
2071}
2072
2073static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2074 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2075 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002076 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2077 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002078 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002079 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002080 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2081 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002082 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2083 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002084};
2085
Ido Schimmel18f1e702016-02-26 17:32:31 +01002086static int
2087mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2088{
2089 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2090 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2091 char ptys_pl[MLXSW_REG_PTYS_LEN];
2092 u32 eth_proto_admin;
2093
2094 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
Elad Raz401c8b42016-10-28 21:35:52 +02002095 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2096 eth_proto_admin);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002097 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2098}
2099
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002100int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2101 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2102 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002103{
2104 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2105 char qeec_pl[MLXSW_REG_QEEC_LEN];
2106
2107 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2108 next_index);
2109 mlxsw_reg_qeec_de_set(qeec_pl, true);
2110 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2111 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2112 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2113}
2114
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002115int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2116 enum mlxsw_reg_qeec_hr hr, u8 index,
2117 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002118{
2119 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2120 char qeec_pl[MLXSW_REG_QEEC_LEN];
2121
2122 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2123 next_index);
2124 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2125 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2126 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2127}
2128
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002129int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2130 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002131{
2132 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2133 char qtct_pl[MLXSW_REG_QTCT_LEN];
2134
2135 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2136 tclass);
2137 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2138}
2139
2140static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2141{
2142 int err, i;
2143
2144 /* Setup the elements hierarcy, so that each TC is linked to
2145 * one subgroup, which are all member in the same group.
2146 */
2147 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2148 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2149 0);
2150 if (err)
2151 return err;
2152 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2153 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2154 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2155 0, false, 0);
2156 if (err)
2157 return err;
2158 }
2159 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2160 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2161 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2162 false, 0);
2163 if (err)
2164 return err;
2165 }
2166
2167 /* Make sure the max shaper is disabled in all hierarcies that
2168 * support it.
2169 */
2170 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2171 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2172 MLXSW_REG_QEEC_MAS_DIS);
2173 if (err)
2174 return err;
2175 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2176 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2177 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2178 i, 0,
2179 MLXSW_REG_QEEC_MAS_DIS);
2180 if (err)
2181 return err;
2182 }
2183 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2184 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2185 MLXSW_REG_QEEC_HIERARCY_TC,
2186 i, i,
2187 MLXSW_REG_QEEC_MAS_DIS);
2188 if (err)
2189 return err;
2190 }
2191
2192 /* Map all priorities to traffic class 0. */
2193 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2194 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2195 if (err)
2196 return err;
2197 }
2198
2199 return 0;
2200}
2201
Ido Schimmel05978482016-08-17 16:39:30 +02002202static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2203{
2204 mlxsw_sp_port->pvid = 1;
2205
2206 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2207}
2208
2209static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2210{
2211 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2212}
2213
Jiri Pirko67963a32016-10-28 21:35:55 +02002214static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2215 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002216{
2217 struct mlxsw_sp_port *mlxsw_sp_port;
2218 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002219 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002220 int err;
2221
2222 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2223 if (!dev)
2224 return -ENOMEM;
Jiri Pirkof20a91f2016-10-27 15:13:00 +02002225 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002226 mlxsw_sp_port = netdev_priv(dev);
2227 mlxsw_sp_port->dev = dev;
2228 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2229 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002230 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002231 mlxsw_sp_port->mapping.module = module;
2232 mlxsw_sp_port->mapping.width = width;
2233 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002234 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002235 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2236 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2237 if (!mlxsw_sp_port->active_vlans) {
2238 err = -ENOMEM;
2239 goto err_port_active_vlans_alloc;
2240 }
Elad Razfc1273a2016-01-06 13:01:11 +01002241 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2242 if (!mlxsw_sp_port->untagged_vlans) {
2243 err = -ENOMEM;
2244 goto err_port_untagged_vlans_alloc;
2245 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002246 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002247 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002248
2249 mlxsw_sp_port->pcpu_stats =
2250 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2251 if (!mlxsw_sp_port->pcpu_stats) {
2252 err = -ENOMEM;
2253 goto err_alloc_stats;
2254 }
2255
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002256 mlxsw_sp_port->hw_stats.cache =
2257 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2258
2259 if (!mlxsw_sp_port->hw_stats.cache) {
2260 err = -ENOMEM;
2261 goto err_alloc_hw_stats;
2262 }
2263 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2264 &update_stats_cache);
2265
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002266 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2267 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2268
Ido Schimmel3247ff22016-09-08 08:16:02 +02002269 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2270 if (err) {
2271 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2272 mlxsw_sp_port->local_port);
2273 goto err_port_swid_set;
2274 }
2275
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002276 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2277 if (err) {
2278 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2279 mlxsw_sp_port->local_port);
2280 goto err_dev_addr_init;
2281 }
2282
2283 netif_carrier_off(dev);
2284
2285 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002286 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2287 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002288
Jarod Wilsond894be52016-10-20 13:55:16 -04002289 dev->min_mtu = 0;
2290 dev->max_mtu = ETH_MAX_MTU;
2291
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002292 /* Each packet needs to have a Tx header (metadata) on top all other
2293 * headers.
2294 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002295 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002296
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002297 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2298 if (err) {
2299 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2300 mlxsw_sp_port->local_port);
2301 goto err_port_system_port_mapping_set;
2302 }
2303
Ido Schimmel18f1e702016-02-26 17:32:31 +01002304 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2305 if (err) {
2306 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2307 mlxsw_sp_port->local_port);
2308 goto err_port_speed_by_width_set;
2309 }
2310
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002311 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2312 if (err) {
2313 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2314 mlxsw_sp_port->local_port);
2315 goto err_port_mtu_set;
2316 }
2317
2318 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2319 if (err)
2320 goto err_port_admin_status_set;
2321
2322 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2323 if (err) {
2324 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2325 mlxsw_sp_port->local_port);
2326 goto err_port_buffers_init;
2327 }
2328
Ido Schimmel90183b92016-04-06 17:10:08 +02002329 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2330 if (err) {
2331 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2332 mlxsw_sp_port->local_port);
2333 goto err_port_ets_init;
2334 }
2335
Ido Schimmelf00817d2016-04-06 17:10:09 +02002336 /* ETS and buffers must be initialized before DCB. */
2337 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2338 if (err) {
2339 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2340 mlxsw_sp_port->local_port);
2341 goto err_port_dcb_init;
2342 }
2343
Ido Schimmel05978482016-08-17 16:39:30 +02002344 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2345 if (err) {
2346 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2347 mlxsw_sp_port->local_port);
2348 goto err_port_pvid_vport_create;
2349 }
2350
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002351 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002352 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002353 err = register_netdev(dev);
2354 if (err) {
2355 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2356 mlxsw_sp_port->local_port);
2357 goto err_register_netdev;
2358 }
2359
Elad Razd808c7e2016-10-28 21:35:57 +02002360 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2361 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2362 module);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002363 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002364 return 0;
2365
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002366err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002367 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002368 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002369 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2370err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002371 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002372err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002373err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002374err_port_buffers_init:
2375err_port_admin_status_set:
2376err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002377err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002378err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002379err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002380 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2381err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002382 kfree(mlxsw_sp_port->hw_stats.cache);
2383err_alloc_hw_stats:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002384 free_percpu(mlxsw_sp_port->pcpu_stats);
2385err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002386 kfree(mlxsw_sp_port->untagged_vlans);
2387err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002388 kfree(mlxsw_sp_port->active_vlans);
2389err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002390 free_netdev(dev);
2391 return err;
2392}
2393
Jiri Pirko67963a32016-10-28 21:35:55 +02002394static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2395 bool split, u8 module, u8 width, u8 lane)
2396{
2397 int err;
2398
2399 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2400 if (err) {
2401 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2402 local_port);
2403 return err;
2404 }
Ido Schimmel9a60c902016-12-16 19:29:03 +01002405 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split,
Jiri Pirko67963a32016-10-28 21:35:55 +02002406 module, width, lane);
2407 if (err)
2408 goto err_port_create;
2409 return 0;
2410
2411err_port_create:
2412 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2413 return err;
2414}
2415
2416static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002417{
2418 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2419
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002420 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko67963a32016-10-28 21:35:55 +02002421 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002422 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002423 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002424 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002425 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002426 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002427 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2428 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002429 free_percpu(mlxsw_sp_port->pcpu_stats);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002430 kfree(mlxsw_sp_port->hw_stats.cache);
Elad Razfc1273a2016-01-06 13:01:11 +01002431 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002432 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002433 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002434 free_netdev(mlxsw_sp_port->dev);
2435}
2436
Jiri Pirko67963a32016-10-28 21:35:55 +02002437static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2438{
2439 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2440 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2441}
2442
Jiri Pirkof83e2102016-10-28 21:35:49 +02002443static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2444{
2445 return mlxsw_sp->ports[local_port] != NULL;
2446}
2447
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002448static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2449{
2450 int i;
2451
2452 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002453 if (mlxsw_sp_port_created(mlxsw_sp, i))
2454 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002455 kfree(mlxsw_sp->ports);
2456}
2457
2458static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2459{
Ido Schimmeld664b412016-06-09 09:51:40 +02002460 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002461 size_t alloc_size;
2462 int i;
2463 int err;
2464
2465 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2466 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2467 if (!mlxsw_sp->ports)
2468 return -ENOMEM;
2469
2470 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002471 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002472 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002473 if (err)
2474 goto err_port_module_info_get;
2475 if (!width)
2476 continue;
2477 mlxsw_sp->port_to_module[i] = module;
Jiri Pirko67963a32016-10-28 21:35:55 +02002478 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2479 module, width, lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002480 if (err)
2481 goto err_port_create;
2482 }
2483 return 0;
2484
2485err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002486err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002487 for (i--; i >= 1; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002488 if (mlxsw_sp_port_created(mlxsw_sp, i))
2489 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002490 kfree(mlxsw_sp->ports);
2491 return err;
2492}
2493
Ido Schimmel18f1e702016-02-26 17:32:31 +01002494static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2495{
2496 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2497
2498 return local_port - offset;
2499}
2500
Ido Schimmelbe945352016-06-09 09:51:39 +02002501static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2502 u8 module, unsigned int count)
2503{
2504 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2505 int err, i;
2506
2507 for (i = 0; i < count; i++) {
2508 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2509 width, i * width);
2510 if (err)
2511 goto err_port_module_map;
2512 }
2513
2514 for (i = 0; i < count; i++) {
2515 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2516 if (err)
2517 goto err_port_swid_set;
2518 }
2519
2520 for (i = 0; i < count; i++) {
2521 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002522 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002523 if (err)
2524 goto err_port_create;
2525 }
2526
2527 return 0;
2528
2529err_port_create:
2530 for (i--; i >= 0; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002531 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2532 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmelbe945352016-06-09 09:51:39 +02002533 i = count;
2534err_port_swid_set:
2535 for (i--; i >= 0; i--)
2536 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2537 MLXSW_PORT_SWID_DISABLED_PORT);
2538 i = count;
2539err_port_module_map:
2540 for (i--; i >= 0; i--)
2541 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2542 return err;
2543}
2544
2545static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2546 u8 base_port, unsigned int count)
2547{
2548 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2549 int i;
2550
2551 /* Split by four means we need to re-create two ports, otherwise
2552 * only one.
2553 */
2554 count = count / 2;
2555
2556 for (i = 0; i < count; i++) {
2557 local_port = base_port + i * 2;
2558 module = mlxsw_sp->port_to_module[local_port];
2559
2560 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2561 0);
2562 }
2563
2564 for (i = 0; i < count; i++)
2565 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2566
2567 for (i = 0; i < count; i++) {
2568 local_port = base_port + i * 2;
2569 module = mlxsw_sp->port_to_module[local_port];
2570
2571 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002572 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002573 }
2574}
2575
Jiri Pirkob2f10572016-04-08 19:11:23 +02002576static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2577 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002578{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002579 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002580 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002581 u8 module, cur_width, base_port;
2582 int i;
2583 int err;
2584
2585 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2586 if (!mlxsw_sp_port) {
2587 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2588 local_port);
2589 return -EINVAL;
2590 }
2591
Ido Schimmeld664b412016-06-09 09:51:40 +02002592 module = mlxsw_sp_port->mapping.module;
2593 cur_width = mlxsw_sp_port->mapping.width;
2594
Ido Schimmel18f1e702016-02-26 17:32:31 +01002595 if (count != 2 && count != 4) {
2596 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2597 return -EINVAL;
2598 }
2599
Ido Schimmel18f1e702016-02-26 17:32:31 +01002600 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2601 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2602 return -EINVAL;
2603 }
2604
2605 /* Make sure we have enough slave (even) ports for the split. */
2606 if (count == 2) {
2607 base_port = local_port;
2608 if (mlxsw_sp->ports[base_port + 1]) {
2609 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2610 return -EINVAL;
2611 }
2612 } else {
2613 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2614 if (mlxsw_sp->ports[base_port + 1] ||
2615 mlxsw_sp->ports[base_port + 3]) {
2616 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2617 return -EINVAL;
2618 }
2619 }
2620
2621 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002622 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2623 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002624
Ido Schimmelbe945352016-06-09 09:51:39 +02002625 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2626 if (err) {
2627 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2628 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002629 }
2630
2631 return 0;
2632
Ido Schimmelbe945352016-06-09 09:51:39 +02002633err_port_split_create:
2634 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002635 return err;
2636}
2637
Jiri Pirkob2f10572016-04-08 19:11:23 +02002638static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002639{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002640 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002641 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002642 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002643 unsigned int count;
2644 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002645
2646 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2647 if (!mlxsw_sp_port) {
2648 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2649 local_port);
2650 return -EINVAL;
2651 }
2652
2653 if (!mlxsw_sp_port->split) {
2654 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2655 return -EINVAL;
2656 }
2657
Ido Schimmeld664b412016-06-09 09:51:40 +02002658 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002659 count = cur_width == 1 ? 4 : 2;
2660
2661 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2662
2663 /* Determine which ports to remove. */
2664 if (count == 2 && local_port >= base_port + 2)
2665 base_port = base_port + 2;
2666
2667 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002668 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2669 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002670
Ido Schimmelbe945352016-06-09 09:51:39 +02002671 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002672
2673 return 0;
2674}
2675
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002676static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2677 char *pude_pl, void *priv)
2678{
2679 struct mlxsw_sp *mlxsw_sp = priv;
2680 struct mlxsw_sp_port *mlxsw_sp_port;
2681 enum mlxsw_reg_pude_oper_status status;
2682 u8 local_port;
2683
2684 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2685 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002686 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002687 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002688
2689 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2690 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2691 netdev_info(mlxsw_sp_port->dev, "link up\n");
2692 netif_carrier_on(mlxsw_sp_port->dev);
2693 } else {
2694 netdev_info(mlxsw_sp_port->dev, "link down\n");
2695 netif_carrier_off(mlxsw_sp_port->dev);
2696 }
2697}
2698
Nogah Frankel14eeda92016-11-25 10:33:32 +01002699static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
2700 u8 local_port, void *priv)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002701{
2702 struct mlxsw_sp *mlxsw_sp = priv;
2703 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2704 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2705
2706 if (unlikely(!mlxsw_sp_port)) {
2707 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2708 local_port);
2709 return;
2710 }
2711
2712 skb->dev = mlxsw_sp_port->dev;
2713
2714 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2715 u64_stats_update_begin(&pcpu_stats->syncp);
2716 pcpu_stats->rx_packets++;
2717 pcpu_stats->rx_bytes += skb->len;
2718 u64_stats_update_end(&pcpu_stats->syncp);
2719
2720 skb->protocol = eth_type_trans(skb, skb->dev);
2721 netif_receive_skb(skb);
2722}
2723
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002724static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2725 void *priv)
2726{
2727 skb->offload_fwd_mark = 1;
Nogah Frankel14eeda92016-11-25 10:33:32 +01002728 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002729}
2730
Nogah Frankel117b0da2016-11-25 10:33:44 +01002731#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel0fb78a42016-11-25 10:33:39 +01002732 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002733 _is_ctrl, SP_##_trap_group, DISCARD)
Ido Schimmel93393b32016-08-25 18:42:38 +02002734
Nogah Frankel117b0da2016-11-25 10:33:44 +01002735#define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel14eeda92016-11-25 10:33:32 +01002736 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002737 _is_ctrl, SP_##_trap_group, DISCARD)
2738
2739#define MLXSW_SP_EVENTL(_func, _trap_id) \
2740 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
Nogah Frankel14eeda92016-11-25 10:33:32 +01002741
Nogah Frankel45449132016-11-25 10:33:35 +01002742static const struct mlxsw_listener mlxsw_sp_listener[] = {
2743 /* Events */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002744 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
Nogah Frankelee4a60d2016-11-25 10:33:29 +01002745 /* L2 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002746 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
2747 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
2748 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
2749 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
2750 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
2751 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
2752 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
2753 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
2754 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
2755 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
2756 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
Ido Schimmel93393b32016-08-25 18:42:38 +02002757 /* L3 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002758 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2759 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2760 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2761 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
2762 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
2763 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
2764 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
2765 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002766};
2767
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002768static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
2769{
2770 char qpcr_pl[MLXSW_REG_QPCR_LEN];
2771 enum mlxsw_reg_qpcr_ir_units ir_units;
2772 int max_cpu_policers;
2773 bool is_bytes;
2774 u8 burst_size;
2775 u32 rate;
2776 int i, err;
2777
2778 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
2779 return -EIO;
2780
2781 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
2782
2783 ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
2784 for (i = 0; i < max_cpu_policers; i++) {
2785 is_bytes = false;
2786 switch (i) {
2787 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2788 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2789 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2790 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2791 rate = 128;
2792 burst_size = 7;
2793 break;
2794 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2795 rate = 16 * 1024;
2796 burst_size = 10;
2797 break;
2798 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2799 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2800 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2801 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2802 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2803 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2804 rate = 1024;
2805 burst_size = 7;
2806 break;
2807 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2808 is_bytes = true;
2809 rate = 4 * 1024;
2810 burst_size = 4;
2811 break;
2812 default:
2813 continue;
2814 }
2815
2816 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
2817 burst_size);
2818 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
2819 if (err)
2820 return err;
2821 }
2822
2823 return 0;
2824}
2825
Nogah Frankel579c82e2016-11-25 10:33:42 +01002826static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002827{
2828 char htgt_pl[MLXSW_REG_HTGT_LEN];
Nogah Frankel117b0da2016-11-25 10:33:44 +01002829 enum mlxsw_reg_htgt_trap_group i;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002830 int max_cpu_policers;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002831 int max_trap_groups;
2832 u8 priority, tc;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002833 u16 policer_id;
Nogah Frankel117b0da2016-11-25 10:33:44 +01002834 int err;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002835
2836 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
2837 return -EIO;
2838
2839 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002840 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
Nogah Frankel579c82e2016-11-25 10:33:42 +01002841
2842 for (i = 0; i < max_trap_groups; i++) {
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002843 policer_id = i;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002844 switch (i) {
Nogah Frankel117b0da2016-11-25 10:33:44 +01002845 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2846 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2847 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2848 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2849 priority = 5;
2850 tc = 5;
2851 break;
2852 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2853 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2854 priority = 4;
2855 tc = 4;
2856 break;
2857 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2858 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2859 priority = 3;
2860 tc = 3;
2861 break;
2862 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2863 priority = 2;
2864 tc = 2;
2865 break;
2866 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2867 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2868 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2869 priority = 1;
2870 tc = 1;
2871 break;
2872 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
Nogah Frankel579c82e2016-11-25 10:33:42 +01002873 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
2874 tc = MLXSW_REG_HTGT_DEFAULT_TC;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002875 policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002876 break;
2877 default:
2878 continue;
2879 }
Nogah Frankel117b0da2016-11-25 10:33:44 +01002880
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002881 if (max_cpu_policers <= policer_id &&
2882 policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
2883 return -EIO;
2884
2885 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
Nogah Frankel579c82e2016-11-25 10:33:42 +01002886 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
2887 if (err)
2888 return err;
2889 }
2890
2891 return 0;
2892}
2893
2894static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2895{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002896 int i;
2897 int err;
2898
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002899 err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
2900 if (err)
2901 return err;
2902
Nogah Frankel579c82e2016-11-25 10:33:42 +01002903 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002904 if (err)
2905 return err;
2906
Nogah Frankel45449132016-11-25 10:33:35 +01002907 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01002908 err = mlxsw_core_trap_register(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01002909 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01002910 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002911 if (err)
Nogah Frankel45449132016-11-25 10:33:35 +01002912 goto err_listener_register;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002913
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002914 }
2915 return 0;
2916
Nogah Frankel45449132016-11-25 10:33:35 +01002917err_listener_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002918 for (i--; i >= 0; i--) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01002919 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01002920 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01002921 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002922 }
2923 return err;
2924}
2925
2926static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2927{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002928 int i;
2929
Nogah Frankel45449132016-11-25 10:33:35 +01002930 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01002931 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01002932 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01002933 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002934 }
2935}
2936
2937static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2938 enum mlxsw_reg_sfgc_type type,
2939 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2940{
2941 enum mlxsw_flood_table_type table_type;
2942 enum mlxsw_sp_flood_table flood_table;
2943 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2944
Ido Schimmel19ae6122015-12-15 16:03:39 +01002945 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002946 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002947 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002948 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002949
2950 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2951 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2952 else
2953 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002954
2955 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2956 flood_table);
2957 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2958}
2959
2960static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2961{
2962 int type, err;
2963
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002964 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2965 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2966 continue;
2967
2968 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2969 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2970 if (err)
2971 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002972
2973 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2974 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2975 if (err)
2976 return err;
2977 }
2978
2979 return 0;
2980}
2981
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002982static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2983{
2984 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002985 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002986
2987 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2988 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2989 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2990 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2991 MLXSW_REG_SLCR_LAG_HASH_SIP |
2992 MLXSW_REG_SLCR_LAG_HASH_DIP |
2993 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2994 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2995 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002996 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2997 if (err)
2998 return err;
2999
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003000 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3001 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003002 return -EIO;
3003
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003004 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003005 sizeof(struct mlxsw_sp_upper),
3006 GFP_KERNEL);
3007 if (!mlxsw_sp->lags)
3008 return -ENOMEM;
3009
3010 return 0;
3011}
3012
3013static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3014{
3015 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003016}
3017
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003018static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3019{
3020 char htgt_pl[MLXSW_REG_HTGT_LEN];
3021
Nogah Frankel579c82e2016-11-25 10:33:42 +01003022 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3023 MLXSW_REG_HTGT_INVALID_POLICER,
3024 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3025 MLXSW_REG_HTGT_DEFAULT_TC);
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003026 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3027}
3028
Jiri Pirkob2f10572016-04-08 19:11:23 +02003029static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003030 const struct mlxsw_bus_info *mlxsw_bus_info)
3031{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003032 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003033 int err;
3034
3035 mlxsw_sp->core = mlxsw_core;
3036 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02003037 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003038 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01003039 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003040
3041 err = mlxsw_sp_base_mac_get(mlxsw_sp);
3042 if (err) {
3043 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3044 return err;
3045 }
3046
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003047 err = mlxsw_sp_traps_init(mlxsw_sp);
3048 if (err) {
Nogah Frankel45449132016-11-25 10:33:35 +01003049 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3050 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003051 }
3052
3053 err = mlxsw_sp_flood_init(mlxsw_sp);
3054 if (err) {
3055 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
3056 goto err_flood_init;
3057 }
3058
3059 err = mlxsw_sp_buffers_init(mlxsw_sp);
3060 if (err) {
3061 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3062 goto err_buffers_init;
3063 }
3064
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003065 err = mlxsw_sp_lag_init(mlxsw_sp);
3066 if (err) {
3067 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3068 goto err_lag_init;
3069 }
3070
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003071 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3072 if (err) {
3073 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3074 goto err_switchdev_init;
3075 }
3076
Ido Schimmel464dce12016-07-02 11:00:15 +02003077 err = mlxsw_sp_router_init(mlxsw_sp);
3078 if (err) {
3079 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3080 goto err_router_init;
3081 }
3082
Yotam Gigi763b4b72016-07-21 12:03:17 +02003083 err = mlxsw_sp_span_init(mlxsw_sp);
3084 if (err) {
3085 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3086 goto err_span_init;
3087 }
3088
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003089 err = mlxsw_sp_ports_create(mlxsw_sp);
3090 if (err) {
3091 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3092 goto err_ports_create;
3093 }
3094
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003095 return 0;
3096
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003097err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003098 mlxsw_sp_span_fini(mlxsw_sp);
3099err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003100 mlxsw_sp_router_fini(mlxsw_sp);
3101err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003102 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003103err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003104 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003105err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003106 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003107err_buffers_init:
3108err_flood_init:
3109 mlxsw_sp_traps_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003110 return err;
3111}
3112
Jiri Pirkob2f10572016-04-08 19:11:23 +02003113static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003114{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003115 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003116
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003117 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003118 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003119 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003120 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003121 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003122 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003123 mlxsw_sp_traps_fini(mlxsw_sp);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003124 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003125 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003126}
3127
3128static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3129 .used_max_vepa_channels = 1,
3130 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003131 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003132 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003133 .used_max_pgt = 1,
3134 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003135 .used_flood_tables = 1,
3136 .used_flood_mode = 1,
3137 .flood_mode = 3,
3138 .max_fid_offset_flood_tables = 2,
3139 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003140 .max_fid_flood_tables = 2,
3141 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003142 .used_max_ib_mc = 1,
3143 .max_ib_mc = 0,
3144 .used_max_pkey = 1,
3145 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003146 .used_kvd_split_data = 1,
3147 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3148 .kvd_hash_single_parts = 2,
3149 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003150 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003151 .swid_config = {
3152 {
3153 .used_type = 1,
3154 .type = MLXSW_PORT_SWID_TYPE_ETH,
3155 }
3156 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003157 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003158};
3159
3160static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003161 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003162 .priv_size = sizeof(struct mlxsw_sp),
3163 .init = mlxsw_sp_init,
3164 .fini = mlxsw_sp_fini,
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003165 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003166 .port_split = mlxsw_sp_port_split,
3167 .port_unsplit = mlxsw_sp_port_unsplit,
3168 .sb_pool_get = mlxsw_sp_sb_pool_get,
3169 .sb_pool_set = mlxsw_sp_sb_pool_set,
3170 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3171 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3172 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3173 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3174 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3175 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3176 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3177 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3178 .txhdr_construct = mlxsw_sp_txhdr_construct,
3179 .txhdr_len = MLXSW_TXHDR_LEN,
3180 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003181};
3182
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003183static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3184{
3185 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3186}
3187
David Aherndd823642016-10-17 19:15:49 -07003188static int mlxsw_lower_dev_walk(struct net_device *lower_dev, void *data)
3189{
3190 struct mlxsw_sp_port **port = data;
3191 int ret = 0;
3192
3193 if (mlxsw_sp_port_dev_check(lower_dev)) {
3194 *port = netdev_priv(lower_dev);
3195 ret = 1;
3196 }
3197
3198 return ret;
3199}
3200
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003201static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3202{
David Aherndd823642016-10-17 19:15:49 -07003203 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003204
3205 if (mlxsw_sp_port_dev_check(dev))
3206 return netdev_priv(dev);
3207
David Aherndd823642016-10-17 19:15:49 -07003208 port = NULL;
3209 netdev_walk_all_lower_dev(dev, mlxsw_lower_dev_walk, &port);
3210
3211 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003212}
3213
3214static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3215{
3216 struct mlxsw_sp_port *mlxsw_sp_port;
3217
3218 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3219 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3220}
3221
3222static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3223{
David Aherndd823642016-10-17 19:15:49 -07003224 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003225
3226 if (mlxsw_sp_port_dev_check(dev))
3227 return netdev_priv(dev);
3228
David Aherndd823642016-10-17 19:15:49 -07003229 port = NULL;
3230 netdev_walk_all_lower_dev_rcu(dev, mlxsw_lower_dev_walk, &port);
3231
3232 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003233}
3234
3235struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3236{
3237 struct mlxsw_sp_port *mlxsw_sp_port;
3238
3239 rcu_read_lock();
3240 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3241 if (mlxsw_sp_port)
3242 dev_hold(mlxsw_sp_port->dev);
3243 rcu_read_unlock();
3244 return mlxsw_sp_port;
3245}
3246
3247void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3248{
3249 dev_put(mlxsw_sp_port->dev);
3250}
3251
Ido Schimmel99724c12016-07-04 08:23:14 +02003252static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3253 unsigned long event)
3254{
3255 switch (event) {
3256 case NETDEV_UP:
3257 if (!r)
3258 return true;
3259 r->ref_count++;
3260 return false;
3261 case NETDEV_DOWN:
3262 if (r && --r->ref_count == 0)
3263 return true;
3264 /* It is possible we already removed the RIF ourselves
3265 * if it was assigned to a netdev that is now a bridge
3266 * or LAG slave.
3267 */
3268 return false;
3269 }
3270
3271 return false;
3272}
3273
3274static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3275{
3276 int i;
3277
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003278 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
Ido Schimmel99724c12016-07-04 08:23:14 +02003279 if (!mlxsw_sp->rifs[i])
3280 return i;
3281
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003282 return MLXSW_SP_INVALID_RIF;
Ido Schimmel99724c12016-07-04 08:23:14 +02003283}
3284
3285static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3286 bool *p_lagged, u16 *p_system_port)
3287{
3288 u8 local_port = mlxsw_sp_vport->local_port;
3289
3290 *p_lagged = mlxsw_sp_vport->lagged;
3291 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3292}
3293
3294static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3295 struct net_device *l3_dev, u16 rif,
3296 bool create)
3297{
3298 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3299 bool lagged = mlxsw_sp_vport->lagged;
3300 char ritr_pl[MLXSW_REG_RITR_LEN];
3301 u16 system_port;
3302
3303 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3304 l3_dev->mtu, l3_dev->dev_addr);
3305
3306 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3307 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3308 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3309
3310 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3311}
3312
3313static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3314
3315static struct mlxsw_sp_fid *
3316mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3317{
3318 struct mlxsw_sp_fid *f;
3319
3320 f = kzalloc(sizeof(*f), GFP_KERNEL);
3321 if (!f)
3322 return NULL;
3323
3324 f->leave = mlxsw_sp_vport_rif_sp_leave;
3325 f->ref_count = 0;
3326 f->dev = l3_dev;
3327 f->fid = fid;
3328
3329 return f;
3330}
3331
3332static struct mlxsw_sp_rif *
3333mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3334{
3335 struct mlxsw_sp_rif *r;
3336
3337 r = kzalloc(sizeof(*r), GFP_KERNEL);
3338 if (!r)
3339 return NULL;
3340
3341 ether_addr_copy(r->addr, l3_dev->dev_addr);
3342 r->mtu = l3_dev->mtu;
3343 r->ref_count = 1;
3344 r->dev = l3_dev;
3345 r->rif = rif;
3346 r->f = f;
3347
3348 return r;
3349}
3350
3351static struct mlxsw_sp_rif *
3352mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3353 struct net_device *l3_dev)
3354{
3355 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3356 struct mlxsw_sp_fid *f;
3357 struct mlxsw_sp_rif *r;
3358 u16 fid, rif;
3359 int err;
3360
3361 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003362 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99724c12016-07-04 08:23:14 +02003363 return ERR_PTR(-ERANGE);
3364
3365 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3366 if (err)
3367 return ERR_PTR(err);
3368
3369 fid = mlxsw_sp_rif_sp_to_fid(rif);
3370 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3371 if (err)
3372 goto err_rif_fdb_op;
3373
3374 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3375 if (!f) {
3376 err = -ENOMEM;
3377 goto err_rfid_alloc;
3378 }
3379
3380 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3381 if (!r) {
3382 err = -ENOMEM;
3383 goto err_rif_alloc;
3384 }
3385
3386 f->r = r;
3387 mlxsw_sp->rifs[rif] = r;
3388
3389 return r;
3390
3391err_rif_alloc:
3392 kfree(f);
3393err_rfid_alloc:
3394 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3395err_rif_fdb_op:
3396 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3397 return ERR_PTR(err);
3398}
3399
3400static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3401 struct mlxsw_sp_rif *r)
3402{
3403 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3404 struct net_device *l3_dev = r->dev;
3405 struct mlxsw_sp_fid *f = r->f;
3406 u16 fid = f->fid;
3407 u16 rif = r->rif;
3408
3409 mlxsw_sp->rifs[rif] = NULL;
3410 f->r = NULL;
3411
3412 kfree(r);
3413
3414 kfree(f);
3415
3416 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3417
3418 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3419}
3420
3421static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3422 struct net_device *l3_dev)
3423{
3424 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3425 struct mlxsw_sp_rif *r;
3426
3427 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3428 if (!r) {
3429 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3430 if (IS_ERR(r))
3431 return PTR_ERR(r);
3432 }
3433
3434 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3435 r->f->ref_count++;
3436
3437 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3438
3439 return 0;
3440}
3441
3442static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3443{
3444 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3445
3446 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3447
3448 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3449 if (--f->ref_count == 0)
3450 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3451}
3452
3453static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3454 struct net_device *port_dev,
3455 unsigned long event, u16 vid)
3456{
3457 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3458 struct mlxsw_sp_port *mlxsw_sp_vport;
3459
3460 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3461 if (WARN_ON(!mlxsw_sp_vport))
3462 return -EINVAL;
3463
3464 switch (event) {
3465 case NETDEV_UP:
3466 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3467 case NETDEV_DOWN:
3468 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3469 break;
3470 }
3471
3472 return 0;
3473}
3474
3475static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3476 unsigned long event)
3477{
3478 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3479 return 0;
3480
3481 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3482}
3483
3484static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3485 struct net_device *lag_dev,
3486 unsigned long event, u16 vid)
3487{
3488 struct net_device *port_dev;
3489 struct list_head *iter;
3490 int err;
3491
3492 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3493 if (mlxsw_sp_port_dev_check(port_dev)) {
3494 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3495 event, vid);
3496 if (err)
3497 return err;
3498 }
3499 }
3500
3501 return 0;
3502}
3503
3504static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3505 unsigned long event)
3506{
3507 if (netif_is_bridge_port(lag_dev))
3508 return 0;
3509
3510 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3511}
3512
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003513static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3514 struct net_device *l3_dev)
3515{
3516 u16 fid;
3517
3518 if (is_vlan_dev(l3_dev))
3519 fid = vlan_dev_vlan_id(l3_dev);
3520 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3521 fid = 1;
3522 else
3523 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3524
3525 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3526}
3527
Ido Schimmelf888f582016-08-24 11:18:51 +02003528static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3529{
3530 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3531 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3532}
3533
3534static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3535{
3536 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3537}
3538
3539static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3540 bool set)
3541{
3542 enum mlxsw_flood_table_type table_type;
3543 char *sftr_pl;
3544 u16 index;
3545 int err;
3546
3547 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3548 if (!sftr_pl)
3549 return -ENOMEM;
3550
3551 table_type = mlxsw_sp_flood_table_type_get(fid);
3552 index = mlxsw_sp_flood_table_index_get(fid);
3553 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3554 1, MLXSW_PORT_ROUTER_PORT, set);
3555 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3556
3557 kfree(sftr_pl);
3558 return err;
3559}
3560
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003561static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3562{
3563 if (mlxsw_sp_fid_is_vfid(fid))
3564 return MLXSW_REG_RITR_FID_IF;
3565 else
3566 return MLXSW_REG_RITR_VLAN_IF;
3567}
3568
3569static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3570 struct net_device *l3_dev,
3571 u16 fid, u16 rif,
3572 bool create)
3573{
3574 enum mlxsw_reg_ritr_if_type rif_type;
3575 char ritr_pl[MLXSW_REG_RITR_LEN];
3576
3577 rif_type = mlxsw_sp_rif_type_get(fid);
3578 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3579 l3_dev->dev_addr);
3580 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3581
3582 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3583}
3584
3585static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3586 struct net_device *l3_dev,
3587 struct mlxsw_sp_fid *f)
3588{
3589 struct mlxsw_sp_rif *r;
3590 u16 rif;
3591 int err;
3592
3593 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003594 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003595 return -ERANGE;
3596
Ido Schimmelf888f582016-08-24 11:18:51 +02003597 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003598 if (err)
3599 return err;
3600
Ido Schimmelf888f582016-08-24 11:18:51 +02003601 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3602 if (err)
3603 goto err_rif_bridge_op;
3604
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003605 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3606 if (err)
3607 goto err_rif_fdb_op;
3608
3609 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3610 if (!r) {
3611 err = -ENOMEM;
3612 goto err_rif_alloc;
3613 }
3614
3615 f->r = r;
3616 mlxsw_sp->rifs[rif] = r;
3617
3618 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3619
3620 return 0;
3621
3622err_rif_alloc:
3623 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3624err_rif_fdb_op:
3625 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003626err_rif_bridge_op:
3627 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003628 return err;
3629}
3630
3631void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3632 struct mlxsw_sp_rif *r)
3633{
3634 struct net_device *l3_dev = r->dev;
3635 struct mlxsw_sp_fid *f = r->f;
3636 u16 rif = r->rif;
3637
3638 mlxsw_sp->rifs[rif] = NULL;
3639 f->r = NULL;
3640
3641 kfree(r);
3642
3643 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3644
3645 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3646
Ido Schimmelf888f582016-08-24 11:18:51 +02003647 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3648
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003649 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3650}
3651
3652static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3653 struct net_device *br_dev,
3654 unsigned long event)
3655{
3656 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3657 struct mlxsw_sp_fid *f;
3658
3659 /* FID can either be an actual FID if the L3 device is the
3660 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3661 * L3 device is a VLAN-unaware bridge and we get a vFID.
3662 */
3663 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3664 if (WARN_ON(!f))
3665 return -EINVAL;
3666
3667 switch (event) {
3668 case NETDEV_UP:
3669 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3670 case NETDEV_DOWN:
3671 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3672 break;
3673 }
3674
3675 return 0;
3676}
3677
Ido Schimmel99724c12016-07-04 08:23:14 +02003678static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3679 unsigned long event)
3680{
3681 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003682 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003683 u16 vid = vlan_dev_vlan_id(vlan_dev);
3684
3685 if (mlxsw_sp_port_dev_check(real_dev))
3686 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3687 vid);
3688 else if (netif_is_lag_master(real_dev))
3689 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3690 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003691 else if (netif_is_bridge_master(real_dev) &&
3692 mlxsw_sp->master_bridge.dev == real_dev)
3693 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3694 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003695
3696 return 0;
3697}
3698
3699static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3700 unsigned long event, void *ptr)
3701{
3702 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3703 struct net_device *dev = ifa->ifa_dev->dev;
3704 struct mlxsw_sp *mlxsw_sp;
3705 struct mlxsw_sp_rif *r;
3706 int err = 0;
3707
3708 mlxsw_sp = mlxsw_sp_lower_get(dev);
3709 if (!mlxsw_sp)
3710 goto out;
3711
3712 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3713 if (!mlxsw_sp_rif_should_config(r, event))
3714 goto out;
3715
3716 if (mlxsw_sp_port_dev_check(dev))
3717 err = mlxsw_sp_inetaddr_port_event(dev, event);
3718 else if (netif_is_lag_master(dev))
3719 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003720 else if (netif_is_bridge_master(dev))
3721 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003722 else if (is_vlan_dev(dev))
3723 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3724
3725out:
3726 return notifier_from_errno(err);
3727}
3728
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003729static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3730 const char *mac, int mtu)
3731{
3732 char ritr_pl[MLXSW_REG_RITR_LEN];
3733 int err;
3734
3735 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3736 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3737 if (err)
3738 return err;
3739
3740 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3741 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3742 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3743 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3744}
3745
3746static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3747{
3748 struct mlxsw_sp *mlxsw_sp;
3749 struct mlxsw_sp_rif *r;
3750 int err;
3751
3752 mlxsw_sp = mlxsw_sp_lower_get(dev);
3753 if (!mlxsw_sp)
3754 return 0;
3755
3756 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3757 if (!r)
3758 return 0;
3759
3760 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3761 if (err)
3762 return err;
3763
3764 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3765 if (err)
3766 goto err_rif_edit;
3767
3768 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3769 if (err)
3770 goto err_rif_fdb_op;
3771
3772 ether_addr_copy(r->addr, dev->dev_addr);
3773 r->mtu = dev->mtu;
3774
3775 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3776
3777 return 0;
3778
3779err_rif_fdb_op:
3780 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3781err_rif_edit:
3782 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3783 return err;
3784}
3785
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003786static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3787 u16 fid)
3788{
3789 if (mlxsw_sp_fid_is_vfid(fid))
3790 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3791 else
3792 return test_bit(fid, lag_port->active_vlans);
3793}
3794
3795static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3796 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003797{
3798 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003799 u8 local_port = mlxsw_sp_port->local_port;
3800 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003801 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003802 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003803
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003804 if (!mlxsw_sp_port->lagged)
3805 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003806
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003807 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3808 MAX_LAG_MEMBERS);
3809 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003810 struct mlxsw_sp_port *lag_port;
3811
3812 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3813 if (!lag_port || lag_port->local_port == local_port)
3814 continue;
3815 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3816 count++;
3817 }
3818
3819 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003820}
3821
3822static int
3823mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3824 u16 fid)
3825{
3826 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3827 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3828
3829 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3830 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3831 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3832 mlxsw_sp_port->local_port);
3833
Ido Schimmel22305372016-06-20 23:04:21 +02003834 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3835 mlxsw_sp_port->local_port, fid);
3836
Ido Schimmel039c49a2016-01-27 15:20:18 +01003837 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3838}
3839
3840static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003841mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3842 u16 fid)
3843{
3844 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3845 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3846
3847 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3848 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3849 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3850
Ido Schimmel22305372016-06-20 23:04:21 +02003851 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3852 mlxsw_sp_port->lag_id, fid);
3853
Ido Schimmel039c49a2016-01-27 15:20:18 +01003854 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3855}
3856
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003857int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003858{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003859 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3860 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003861
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003862 if (mlxsw_sp_port->lagged)
3863 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003864 fid);
3865 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003866 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003867}
3868
Ido Schimmel701b1862016-07-04 08:23:16 +02003869static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3870{
3871 struct mlxsw_sp_fid *f, *tmp;
3872
3873 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3874 if (--f->ref_count == 0)
3875 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3876 else
3877 WARN_ON_ONCE(1);
3878}
3879
Ido Schimmel7117a572016-06-20 23:04:06 +02003880static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3881 struct net_device *br_dev)
3882{
3883 return !mlxsw_sp->master_bridge.dev ||
3884 mlxsw_sp->master_bridge.dev == br_dev;
3885}
3886
3887static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3888 struct net_device *br_dev)
3889{
3890 mlxsw_sp->master_bridge.dev = br_dev;
3891 mlxsw_sp->master_bridge.ref_count++;
3892}
3893
3894static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3895{
Ido Schimmel701b1862016-07-04 08:23:16 +02003896 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003897 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003898 /* It's possible upper VLAN devices are still holding
3899 * references to underlying FIDs. Drop the reference
3900 * and release the resources if it was the last one.
3901 * If it wasn't, then something bad happened.
3902 */
3903 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3904 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003905}
3906
3907static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3908 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003909{
3910 struct net_device *dev = mlxsw_sp_port->dev;
3911 int err;
3912
3913 /* When port is not bridged untagged packets are tagged with
3914 * PVID=VID=1, thereby creating an implicit VLAN interface in
3915 * the device. Remove it and let bridge code take care of its
3916 * own VLANs.
3917 */
3918 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003919 if (err)
3920 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003921
Ido Schimmel7117a572016-06-20 23:04:06 +02003922 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3923
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003924 mlxsw_sp_port->learning = 1;
3925 mlxsw_sp_port->learning_sync = 1;
3926 mlxsw_sp_port->uc_flood = 1;
3927 mlxsw_sp_port->bridged = 1;
3928
3929 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003930}
3931
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003932static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003933{
3934 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003935
Ido Schimmel28a01d22016-02-18 11:30:02 +01003936 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3937
Ido Schimmel7117a572016-06-20 23:04:06 +02003938 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3939
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003940 mlxsw_sp_port->learning = 0;
3941 mlxsw_sp_port->learning_sync = 0;
3942 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003943 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003944
3945 /* Add implicit VLAN interface in the device, so that untagged
3946 * packets will be classified to the default vFID.
3947 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003948 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003949}
3950
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003951static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003952{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003953 char sldr_pl[MLXSW_REG_SLDR_LEN];
3954
3955 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3956 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3957}
3958
3959static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3960{
3961 char sldr_pl[MLXSW_REG_SLDR_LEN];
3962
3963 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3964 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3965}
3966
3967static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3968 u16 lag_id, u8 port_index)
3969{
3970 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3971 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3972
3973 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3974 lag_id, port_index);
3975 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3976}
3977
3978static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3979 u16 lag_id)
3980{
3981 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3982 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3983
3984 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3985 lag_id);
3986 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3987}
3988
3989static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3990 u16 lag_id)
3991{
3992 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3993 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3994
3995 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3996 lag_id);
3997 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3998}
3999
4000static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
4001 u16 lag_id)
4002{
4003 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4004 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4005
4006 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
4007 lag_id);
4008 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4009}
4010
4011static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4012 struct net_device *lag_dev,
4013 u16 *p_lag_id)
4014{
4015 struct mlxsw_sp_upper *lag;
4016 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004017 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004018 int i;
4019
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004020 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
4021 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004022 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
4023 if (lag->ref_count) {
4024 if (lag->dev == lag_dev) {
4025 *p_lag_id = i;
4026 return 0;
4027 }
4028 } else if (free_lag_id < 0) {
4029 free_lag_id = i;
4030 }
4031 }
4032 if (free_lag_id < 0)
4033 return -EBUSY;
4034 *p_lag_id = free_lag_id;
4035 return 0;
4036}
4037
4038static bool
4039mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
4040 struct net_device *lag_dev,
4041 struct netdev_lag_upper_info *lag_upper_info)
4042{
4043 u16 lag_id;
4044
4045 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
4046 return false;
4047 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
4048 return false;
4049 return true;
4050}
4051
4052static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4053 u16 lag_id, u8 *p_port_index)
4054{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004055 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004056 int i;
4057
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004058 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
4059 MAX_LAG_MEMBERS);
4060 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004061 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
4062 *p_port_index = i;
4063 return 0;
4064 }
4065 }
4066 return -EBUSY;
4067}
4068
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004069static void
4070mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4071 u16 lag_id)
4072{
4073 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004074 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004075
4076 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4077 if (WARN_ON(!mlxsw_sp_vport))
4078 return;
4079
Ido Schimmel11943ff2016-07-02 11:00:12 +02004080 /* If vPort is assigned a RIF, then leave it since it's no
4081 * longer valid.
4082 */
4083 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4084 if (f)
4085 f->leave(mlxsw_sp_vport);
4086
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004087 mlxsw_sp_vport->lag_id = lag_id;
4088 mlxsw_sp_vport->lagged = 1;
4089}
4090
4091static void
4092mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4093{
4094 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004095 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004096
4097 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4098 if (WARN_ON(!mlxsw_sp_vport))
4099 return;
4100
Ido Schimmel11943ff2016-07-02 11:00:12 +02004101 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4102 if (f)
4103 f->leave(mlxsw_sp_vport);
4104
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004105 mlxsw_sp_vport->lagged = 0;
4106}
4107
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004108static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4109 struct net_device *lag_dev)
4110{
4111 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4112 struct mlxsw_sp_upper *lag;
4113 u16 lag_id;
4114 u8 port_index;
4115 int err;
4116
4117 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4118 if (err)
4119 return err;
4120 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4121 if (!lag->ref_count) {
4122 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4123 if (err)
4124 return err;
4125 lag->dev = lag_dev;
4126 }
4127
4128 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4129 if (err)
4130 return err;
4131 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4132 if (err)
4133 goto err_col_port_add;
4134 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4135 if (err)
4136 goto err_col_port_enable;
4137
4138 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4139 mlxsw_sp_port->local_port);
4140 mlxsw_sp_port->lag_id = lag_id;
4141 mlxsw_sp_port->lagged = 1;
4142 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004143
4144 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4145
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004146 return 0;
4147
Ido Schimmel51554db2016-05-06 22:18:39 +02004148err_col_port_enable:
4149 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004150err_col_port_add:
4151 if (!lag->ref_count)
4152 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004153 return err;
4154}
4155
Ido Schimmel82e6db02016-06-20 23:04:04 +02004156static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4157 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004158{
4159 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004160 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004161 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004162
4163 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004164 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004165 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4166 WARN_ON(lag->ref_count == 0);
4167
Ido Schimmel82e6db02016-06-20 23:04:04 +02004168 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4169 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004170
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004171 if (mlxsw_sp_port->bridged) {
4172 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004173 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004174 }
4175
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004176 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004177 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004178
4179 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4180 mlxsw_sp_port->local_port);
4181 mlxsw_sp_port->lagged = 0;
4182 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004183
4184 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004185}
4186
Jiri Pirko74581202015-12-03 12:12:30 +01004187static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4188 u16 lag_id)
4189{
4190 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4191 char sldr_pl[MLXSW_REG_SLDR_LEN];
4192
4193 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4194 mlxsw_sp_port->local_port);
4195 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4196}
4197
4198static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4199 u16 lag_id)
4200{
4201 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4202 char sldr_pl[MLXSW_REG_SLDR_LEN];
4203
4204 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4205 mlxsw_sp_port->local_port);
4206 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4207}
4208
4209static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4210 bool lag_tx_enabled)
4211{
4212 if (lag_tx_enabled)
4213 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4214 mlxsw_sp_port->lag_id);
4215 else
4216 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4217 mlxsw_sp_port->lag_id);
4218}
4219
4220static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4221 struct netdev_lag_lower_state_info *info)
4222{
4223 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4224}
4225
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004226static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4227 struct net_device *vlan_dev)
4228{
4229 struct mlxsw_sp_port *mlxsw_sp_vport;
4230 u16 vid = vlan_dev_vlan_id(vlan_dev);
4231
4232 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004233 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004234 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004235
4236 mlxsw_sp_vport->dev = vlan_dev;
4237
4238 return 0;
4239}
4240
Ido Schimmel82e6db02016-06-20 23:04:04 +02004241static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4242 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004243{
4244 struct mlxsw_sp_port *mlxsw_sp_vport;
4245 u16 vid = vlan_dev_vlan_id(vlan_dev);
4246
4247 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004248 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004249 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004250
4251 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004252}
4253
Jiri Pirko74581202015-12-03 12:12:30 +01004254static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4255 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004256{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004257 struct netdev_notifier_changeupper_info *info;
4258 struct mlxsw_sp_port *mlxsw_sp_port;
4259 struct net_device *upper_dev;
4260 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004261 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004262
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004263 mlxsw_sp_port = netdev_priv(dev);
4264 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4265 info = ptr;
4266
4267 switch (event) {
4268 case NETDEV_PRECHANGEUPPER:
4269 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004270 if (!is_vlan_dev(upper_dev) &&
4271 !netif_is_lag_master(upper_dev) &&
4272 !netif_is_bridge_master(upper_dev))
4273 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004274 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004275 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004276 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004277 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004278 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004279 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004280 if (netif_is_lag_master(upper_dev) &&
4281 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4282 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004283 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004284 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4285 return -EINVAL;
4286 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4287 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4288 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004289 break;
4290 case NETDEV_CHANGEUPPER:
4291 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004292 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004293 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004294 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4295 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004296 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004297 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4298 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004299 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004300 if (info->linking)
4301 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4302 upper_dev);
4303 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004304 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004305 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004306 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004307 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4308 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004309 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004310 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4311 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004312 } else {
4313 err = -EINVAL;
4314 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004315 }
4316 break;
4317 }
4318
Ido Schimmel80bedf12016-06-20 23:03:59 +02004319 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004320}
4321
Jiri Pirko74581202015-12-03 12:12:30 +01004322static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4323 unsigned long event, void *ptr)
4324{
4325 struct netdev_notifier_changelowerstate_info *info;
4326 struct mlxsw_sp_port *mlxsw_sp_port;
4327 int err;
4328
4329 mlxsw_sp_port = netdev_priv(dev);
4330 info = ptr;
4331
4332 switch (event) {
4333 case NETDEV_CHANGELOWERSTATE:
4334 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4335 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4336 info->lower_state_info);
4337 if (err)
4338 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4339 }
4340 break;
4341 }
4342
Ido Schimmel80bedf12016-06-20 23:03:59 +02004343 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004344}
4345
4346static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4347 unsigned long event, void *ptr)
4348{
4349 switch (event) {
4350 case NETDEV_PRECHANGEUPPER:
4351 case NETDEV_CHANGEUPPER:
4352 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4353 case NETDEV_CHANGELOWERSTATE:
4354 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4355 }
4356
Ido Schimmel80bedf12016-06-20 23:03:59 +02004357 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004358}
4359
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004360static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4361 unsigned long event, void *ptr)
4362{
4363 struct net_device *dev;
4364 struct list_head *iter;
4365 int ret;
4366
4367 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4368 if (mlxsw_sp_port_dev_check(dev)) {
4369 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004370 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004371 return ret;
4372 }
4373 }
4374
Ido Schimmel80bedf12016-06-20 23:03:59 +02004375 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004376}
4377
Ido Schimmel701b1862016-07-04 08:23:16 +02004378static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4379 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004380{
Ido Schimmel701b1862016-07-04 08:23:16 +02004381 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004382 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004383
Ido Schimmel701b1862016-07-04 08:23:16 +02004384 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4385 if (!f) {
4386 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4387 if (IS_ERR(f))
4388 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004389 }
4390
Ido Schimmel701b1862016-07-04 08:23:16 +02004391 f->ref_count++;
4392
4393 return 0;
4394}
4395
4396static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4397 struct net_device *vlan_dev)
4398{
4399 u16 fid = vlan_dev_vlan_id(vlan_dev);
4400 struct mlxsw_sp_fid *f;
4401
4402 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004403 if (f && f->r)
4404 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004405 if (f && --f->ref_count == 0)
4406 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4407}
4408
4409static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4410 unsigned long event, void *ptr)
4411{
4412 struct netdev_notifier_changeupper_info *info;
4413 struct net_device *upper_dev;
4414 struct mlxsw_sp *mlxsw_sp;
4415 int err;
4416
4417 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4418 if (!mlxsw_sp)
4419 return 0;
4420 if (br_dev != mlxsw_sp->master_bridge.dev)
4421 return 0;
4422
4423 info = ptr;
4424
4425 switch (event) {
4426 case NETDEV_CHANGEUPPER:
4427 upper_dev = info->upper_dev;
4428 if (!is_vlan_dev(upper_dev))
4429 break;
4430 if (info->linking) {
4431 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4432 upper_dev);
4433 if (err)
4434 return err;
4435 } else {
4436 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4437 }
4438 break;
4439 }
4440
4441 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004442}
4443
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004444static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004445{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004446 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004447 MLXSW_SP_VFID_MAX);
4448}
4449
4450static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4451{
4452 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4453
4454 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4455 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004456}
4457
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004458static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004459
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004460static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4461 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004462{
4463 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004464 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004465 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004466 int err;
4467
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004468 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004469 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004470 dev_err(dev, "No available vFIDs\n");
4471 return ERR_PTR(-ERANGE);
4472 }
4473
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004474 fid = mlxsw_sp_vfid_to_fid(vfid);
4475 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004476 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004477 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004478 return ERR_PTR(err);
4479 }
4480
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004481 f = kzalloc(sizeof(*f), GFP_KERNEL);
4482 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004483 goto err_allocate_vfid;
4484
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004485 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004486 f->fid = fid;
4487 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004488
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004489 list_add(&f->list, &mlxsw_sp->vfids.list);
4490 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004491
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004492 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004493
4494err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004495 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004496 return ERR_PTR(-ENOMEM);
4497}
4498
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004499static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4500 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004501{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004502 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004503 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004504
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004505 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004506 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004507
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004508 if (f->r)
4509 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004510
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004511 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004512
4513 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004514}
4515
Ido Schimmel99724c12016-07-04 08:23:14 +02004516static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4517 bool valid)
4518{
4519 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4520 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4521
4522 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4523 vid);
4524}
4525
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004526static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4527 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004528{
Ido Schimmel0355b592016-06-20 23:04:13 +02004529 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004530 int err;
4531
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004532 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004533 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004534 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004535 if (IS_ERR(f))
4536 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004537 }
4538
Ido Schimmel0355b592016-06-20 23:04:13 +02004539 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4540 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004541 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004542
Ido Schimmel0355b592016-06-20 23:04:13 +02004543 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4544 if (err)
4545 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004546
Ido Schimmel41b996c2016-06-20 23:04:17 +02004547 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004548 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004549
Ido Schimmel22305372016-06-20 23:04:21 +02004550 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4551
Ido Schimmel0355b592016-06-20 23:04:13 +02004552 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004553
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004554err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004555 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4556err_vport_flood_set:
4557 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004558 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004559 return err;
4560}
4561
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004562static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004563{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004564 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004565
Ido Schimmel22305372016-06-20 23:04:21 +02004566 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4567
Ido Schimmel0355b592016-06-20 23:04:13 +02004568 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4569
4570 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4571
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004572 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4573
Ido Schimmel41b996c2016-06-20 23:04:17 +02004574 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004575 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004576 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004577}
4578
4579static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4580 struct net_device *br_dev)
4581{
Ido Schimmel99724c12016-07-04 08:23:14 +02004582 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004583 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4584 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004585 int err;
4586
Ido Schimmel99724c12016-07-04 08:23:14 +02004587 if (f && !WARN_ON(!f->leave))
4588 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004589
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004590 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004591 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004592 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004593 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004594 }
4595
4596 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4597 if (err) {
4598 netdev_err(dev, "Failed to enable learning\n");
4599 goto err_port_vid_learning_set;
4600 }
4601
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004602 mlxsw_sp_vport->learning = 1;
4603 mlxsw_sp_vport->learning_sync = 1;
4604 mlxsw_sp_vport->uc_flood = 1;
4605 mlxsw_sp_vport->bridged = 1;
4606
4607 return 0;
4608
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004609err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004610 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004611 return err;
4612}
4613
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004614static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004615{
4616 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004617
4618 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4619
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004620 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004621
Ido Schimmel0355b592016-06-20 23:04:13 +02004622 mlxsw_sp_vport->learning = 0;
4623 mlxsw_sp_vport->learning_sync = 0;
4624 mlxsw_sp_vport->uc_flood = 0;
4625 mlxsw_sp_vport->bridged = 0;
4626}
4627
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004628static bool
4629mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4630 const struct net_device *br_dev)
4631{
4632 struct mlxsw_sp_port *mlxsw_sp_vport;
4633
4634 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4635 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004636 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004637
4638 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004639 return false;
4640 }
4641
4642 return true;
4643}
4644
4645static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4646 unsigned long event, void *ptr,
4647 u16 vid)
4648{
4649 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4650 struct netdev_notifier_changeupper_info *info = ptr;
4651 struct mlxsw_sp_port *mlxsw_sp_vport;
4652 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004653 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004654
4655 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4656
4657 switch (event) {
4658 case NETDEV_PRECHANGEUPPER:
4659 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004660 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004661 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004662 if (!info->linking)
4663 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004664 /* We can't have multiple VLAN interfaces configured on
4665 * the same port and being members in the same bridge.
4666 */
4667 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4668 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004669 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004670 break;
4671 case NETDEV_CHANGEUPPER:
4672 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004673 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004674 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004675 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004676 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4677 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004678 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004679 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004680 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004681 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004682 }
4683 }
4684
Ido Schimmel80bedf12016-06-20 23:03:59 +02004685 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004686}
4687
Ido Schimmel272c4472015-12-15 16:03:47 +01004688static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4689 unsigned long event, void *ptr,
4690 u16 vid)
4691{
4692 struct net_device *dev;
4693 struct list_head *iter;
4694 int ret;
4695
4696 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4697 if (mlxsw_sp_port_dev_check(dev)) {
4698 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4699 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004700 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004701 return ret;
4702 }
4703 }
4704
Ido Schimmel80bedf12016-06-20 23:03:59 +02004705 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004706}
4707
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004708static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4709 unsigned long event, void *ptr)
4710{
4711 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4712 u16 vid = vlan_dev_vlan_id(vlan_dev);
4713
Ido Schimmel272c4472015-12-15 16:03:47 +01004714 if (mlxsw_sp_port_dev_check(real_dev))
4715 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4716 vid);
4717 else if (netif_is_lag_master(real_dev))
4718 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4719 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004720
Ido Schimmel80bedf12016-06-20 23:03:59 +02004721 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004722}
4723
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004724static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4725 unsigned long event, void *ptr)
4726{
4727 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004728 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004729
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004730 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4731 err = mlxsw_sp_netdevice_router_port_event(dev);
4732 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004733 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4734 else if (netif_is_lag_master(dev))
4735 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004736 else if (netif_is_bridge_master(dev))
4737 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004738 else if (is_vlan_dev(dev))
4739 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004740
Ido Schimmel80bedf12016-06-20 23:03:59 +02004741 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004742}
4743
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004744static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4745 .notifier_call = mlxsw_sp_netdevice_event,
4746};
4747
Ido Schimmel99724c12016-07-04 08:23:14 +02004748static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4749 .notifier_call = mlxsw_sp_inetaddr_event,
4750 .priority = 10, /* Must be called before FIB notifier block */
4751};
4752
Jiri Pirkoe7322632016-09-01 10:37:43 +02004753static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4754 .notifier_call = mlxsw_sp_router_netevent_event,
4755};
4756
Jiri Pirko1d20d232016-10-27 15:12:59 +02004757static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4758 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4759 {0, },
4760};
4761
4762static struct pci_driver mlxsw_sp_pci_driver = {
4763 .name = mlxsw_sp_driver_name,
4764 .id_table = mlxsw_sp_pci_id_table,
4765};
4766
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004767static int __init mlxsw_sp_module_init(void)
4768{
4769 int err;
4770
4771 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004772 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004773 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4774
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004775 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4776 if (err)
4777 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004778
4779 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4780 if (err)
4781 goto err_pci_driver_register;
4782
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004783 return 0;
4784
Jiri Pirko1d20d232016-10-27 15:12:59 +02004785err_pci_driver_register:
4786 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004787err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004788 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004789 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004790 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4791 return err;
4792}
4793
4794static void __exit mlxsw_sp_module_exit(void)
4795{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004796 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004797 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004798 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004799 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004800 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4801}
4802
4803module_init(mlxsw_sp_module_init);
4804module_exit(mlxsw_sp_module_exit);
4805
4806MODULE_LICENSE("Dual BSD/GPL");
4807MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4808MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004809MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);