blob: e323527c7eee1c520a0ba1e85a3f05dd428df092 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Frank Barchard22136062020-11-24 18:44:46 -0800476 "src/math/expminus-scalar-rr2-lut64-p2.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
483 "src/math/roundne-scalar-nearbyint.c",
484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
489 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhan047b6202021-05-11 20:32:25 -0700500 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
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505 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
507 "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c",
508 "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c",
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510 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
511 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
512 "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c",
513 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
514 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
515 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
516 "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c",
517 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
519 "src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c",
520 "src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c",
521 "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700524 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
526 "src/qs8-requantization/rndna-scalar-unsigned32.c",
527 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700528 "src/qs8-vadd/gen/minmax-scalar-x1.c",
529 "src/qs8-vadd/gen/minmax-scalar-x2.c",
530 "src/qs8-vadd/gen/minmax-scalar-x4.c",
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532 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
533 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700534 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
535 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
536 "src/qu8-dwconv/up1x9-minmax-scalar.c",
537 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
538 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700539 "src/qu8-gemm/2x2-minmax-scalar.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700540 "src/qu8-igemm/2x2-minmax-scalar.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700541 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700543 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700544 "src/qu8-requantization/rndna-scalar-signed64.c",
545 "src/qu8-requantization/rndna-scalar-unsigned32.c",
546 "src/qu8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700547 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700548 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700549 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700550 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700551 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700552 "src/x8-lut/scalar.c",
553 "src/x8-zip/x2-scalar.c",
554 "src/x8-zip/x3-scalar.c",
555 "src/x8-zip/x4-scalar.c",
556 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800557 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700558 "src/x32-fill/scalar-float.c",
559 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700560 "src/x32-packx/x2-scalar.c",
561 "src/x32-packx/x3-scalar.c",
562 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700563 "src/x32-pad/scalar-float.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700564 "src/x32-pad/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700565 "src/x32-unpool/scalar.c",
566 "src/x32-zip/x2-scalar.c",
567 "src/x32-zip/x3-scalar.c",
568 "src/x32-zip/x4-scalar.c",
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Marat Dukhan048931b2020-11-24 20:53:54 -0800570 "src/xx-copy/memcpy.c",
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572
Marat Dukhan436ebe62019-12-04 15:10:12 -0800573WASM_UKERNELS = [
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001355 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07001381 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
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Marat Dukhande390d42020-11-29 19:32:18 -08001389 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
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1391 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001393 "src/math/roundd-wasmsimd-addsub.c",
1394 "src/math/roundd-wasmsimd-cvt.c",
1395 "src/math/roundne-wasmsimd-addsub.c",
1396 "src/math/roundu-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-cvt.c",
1398 "src/math/roundz-wasmsimd-addsub.c",
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1400 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
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Marat Dukhane1ff2482021-05-24 17:48:47 -07001402 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1404 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
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Marat Dukhanb5e3d172020-08-06 13:29:53 -07001408 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001429 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001430 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001431 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1432 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -07001440 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001441 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001442 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001443 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001444 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001445 "src/x32-zip/x2-wasmsimd.c",
1446 "src/x32-zip/x3-wasmsimd.c",
1447 "src/x32-zip/x4-wasmsimd.c",
1448 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001449]
1450
Marat Dukhan08c4a432019-10-03 09:29:21 -07001451# ISA-specific micro-kernels
1452NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001453 "src/f32-argmaxpool/4x-neon-c4.c",
1454 "src/f32-argmaxpool/9p8x-neon-c4.c",
1455 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001456 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1457 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001458 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001462 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001466 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001467 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001469 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001471 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1473 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1475 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001477 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001479 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001489 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001497 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001510 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001520 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001521 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1522 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001523 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1525 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001526 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1530 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1531 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001532 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001536 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1537 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001538 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1539 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1540 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1541 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1542 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1546 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1547 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1548 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1552 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1553 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001554 "src/f32-ibilinear-chw/gen/neon-p4.c",
1555 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001556 "src/f32-ibilinear/gen/neon-c4.c",
1557 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001558 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001560 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001561 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1562 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001563 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1565 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1567 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001568 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001570 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001572 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1573 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001574 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1575 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001577 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1578 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001579 "src/f32-prelu/gen/neon-1x4.c",
1580 "src/f32-prelu/gen/neon-1x8.c",
1581 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001582 "src/f32-prelu/gen/neon-2x4.c",
1583 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001584 "src/f32-prelu/gen/neon-2x16.c",
1585 "src/f32-prelu/gen/neon-4x4.c",
1586 "src/f32-prelu/gen/neon-4x8.c",
1587 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001588 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1600 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001612 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001613 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1614 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon.c",
1616 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon.c",
1619 "src/f32-spmm/gen/12x1-minmax-neon.c",
1620 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon.c",
1623 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001626 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1627 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1628 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001630 "src/f32-vbinary/gen/vmax-neon-x4.c",
1631 "src/f32-vbinary/gen/vmax-neon-x8.c",
1632 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1634 "src/f32-vbinary/gen/vmin-neon-x4.c",
1635 "src/f32-vbinary/gen/vmin-neon-x8.c",
1636 "src/f32-vbinary/gen/vminc-neon-x4.c",
1637 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001638 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1639 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1640 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1642 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001644 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1645 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1646 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001648 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1649 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1650 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001652 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1653 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001654 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1660 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001666 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1667 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001669 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1670 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001671 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1672 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001673 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1674 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001675 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1676 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001677 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1678 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1679 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1681 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001683 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001701 "src/f32-vunary/gen/vabs-neon-x4.c",
1702 "src/f32-vunary/gen/vabs-neon-x8.c",
1703 "src/f32-vunary/gen/vneg-neon-x4.c",
1704 "src/f32-vunary/gen/vneg-neon-x8.c",
1705 "src/f32-vunary/gen/vsqr-neon-x4.c",
1706 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001707 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1708 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001709 "src/math/roundd-neon-addsub.c",
1710 "src/math/roundd-neon-cvt.c",
1711 "src/math/roundne-neon-addsub.c",
1712 "src/math/roundu-neon-addsub.c",
1713 "src/math/roundu-neon-cvt.c",
1714 "src/math/roundz-neon-addsub.c",
1715 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001716 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1717 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1719 "src/math/sqrt-neon-nr1rsqrts.c",
1720 "src/math/sqrt-neon-nr2rsqrts.c",
1721 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001722 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
1723 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
1724 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
1725 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
1726 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
1727 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
1728 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
1729 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001730 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1731 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1732 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1733 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001734 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1735 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1736 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1737 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001738 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1739 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1740 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1741 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1742 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1743 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1744 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1745 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1746 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1747 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1748 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1749 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1750 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1751 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1752 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1753 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1754 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1755 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1756 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1757 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1758 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1759 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1760 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1761 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1762 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1763 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1764 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1765 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1766 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1767 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1768 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1769 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1770 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1771 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1772 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1773 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1774 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1775 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1776 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1777 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1778 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1779 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1780 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1781 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1782 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1783 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1784 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1785 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1786 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1787 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1788 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1789 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1790 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1791 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1792 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1793 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1794 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1795 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1796 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1797 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1798 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1799 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1800 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1801 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1802 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1803 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1804 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1805 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1806 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1807 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1808 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1809 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1810 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1811 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1812 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1813 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1814 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1815 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1816 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1817 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1818 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1819 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1820 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1821 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1822 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1823 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1824 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1825 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1826 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1827 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1828 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1829 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1830 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1831 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1832 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1833 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1834 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1835 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1836 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1837 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1838 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1839 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1840 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1841 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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1843 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
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1845 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
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1847 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
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1849 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1850 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1851 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1852 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1853 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1854 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1855 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1856 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1857 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1858 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1859 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1860 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1861 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1862 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1863 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1864 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1865 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1866 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1867 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1868 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1869 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1870 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1871 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1872 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1873 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001874 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001875 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001876 "src/qs8-requantization/rndna-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001877 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1878 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1879 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1880 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1881 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1882 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1883 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1884 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001885 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1886 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1887 "src/qu8-dwconv/up8x9-minmax-neon.c",
1888 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1889 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1890 "src/qu8-gemm/4x8-minmax-neon.c",
1891 "src/qu8-gemm/8x8-minmax-neon.c",
1892 "src/qu8-igemm/4x8-minmax-neon.c",
1893 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001894 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001895 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001896 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001897 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001898 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001899 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001900 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001901 "src/x8-zip/x2-neon.c",
1902 "src/x8-zip/x3-neon.c",
1903 "src/x8-zip/x4-neon.c",
1904 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001905 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001906 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001907 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001908 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001909 "src/x32-zip/x2-neon.c",
1910 "src/x32-zip/x3-neon.c",
1911 "src/x32-zip/x4-neon.c",
1912 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001913]
1914
1915NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001916 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1917 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1918 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1919 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1920 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1921 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1922 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1923 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1924 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1925 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1926 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1927 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1928 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1929 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1930 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1931 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1932 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1933 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1934 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1935 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1936 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1937 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1938 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1939 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1940 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1941 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1942 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1943 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1944 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1945 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001946 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1947 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001948 "src/f32-ibilinear/gen/neonfma-c4.c",
1949 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001950 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001951 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001952 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001953 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1954 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001955 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1956 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001957 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1958 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001959 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1960 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001961 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001962 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001963 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001964 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1965 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001966 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001967 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1968 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001969 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001970 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1971 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001972 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1973 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1974 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1975 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1976 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1977 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1978 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1979 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1980 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1981 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1982 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1984 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08001985 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1986 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
1987 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1988 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1989 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
1990 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1991 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1992 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1993 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
1994 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1995 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
1996 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
1997 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001998 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
1999 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2000 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2001 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2002 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2003 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2004 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2005 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2006 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2007 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2008 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2009 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002010 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2011 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002012 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2013 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2014 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2015 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2016 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2017 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2018 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2019 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2020 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2021 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2022 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2023 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2024 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2025 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2026 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2027 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2028 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2029 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002066 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2067 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2068 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2069 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2070 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2071 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2072 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2073 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2074 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2075 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2076 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2077 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2078 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2079 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2080 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2081 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2082 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2083 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2084 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2085 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002086 "src/math/exp-neonfma-rr2-lut64-p2.c",
2087 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002088 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2089 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002090 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2091 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2092 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002093 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2094 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2095 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002096 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2097 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2098 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002099 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2100 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2101 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002102 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2103 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2104 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002105 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2106 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2107 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002108 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2109 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2110 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002111 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002112 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002113 "src/math/sqrt-neonfma-nr2fma.c",
2114 "src/math/sqrt-neonfma-nr2fma1adj.c",
2115 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002116]
2117
2118AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002119 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002120 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002121 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
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Marat Dukhan56b10cd2020-05-18 09:35:49 -07002123 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002124 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002125 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
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Marat Dukhan1f29b802020-05-15 23:46:39 -07002127 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002128 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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2130 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002131 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
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Marat Dukhan1268a242020-10-24 00:36:32 -07002133 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2136 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2137 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002138 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
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2140 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002141 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002142 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002143 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
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Marat Dukhan149f0ea2020-10-26 12:50:33 -07002146 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002150 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002151 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002154 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002155 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002156 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002159 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002167 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002169 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
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2175 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2176 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2177 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2178 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2179 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2180 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2181 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2182 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2183 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2184 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2185 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2186 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2187 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2188 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002189 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2190 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002191 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2192 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002193 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2194 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2196 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002197 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2198 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002199 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
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2203 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2204 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002205 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2206 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
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2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002223 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2224 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002225 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002226 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002227 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002228 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002229 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002230 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002231]
2232
Marat Dukhan8853b822020-05-07 12:19:01 -07002233NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002234 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2235 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002236 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2237 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2238 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
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2241 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002242 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002243 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002244 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002245 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002246]
2247
Marat Dukhan08c4a432019-10-03 09:29:21 -07002248AARCH64_NEONFP16ARITH_UKERNELS = [
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2252 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002253 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2254 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2255 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2256 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2257 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2258 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2259 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
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Frank Barchard0bb49a72020-06-04 11:35:11 -07002261 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002263 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
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2265 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2266 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2267 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2268 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
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2271 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2272 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2273 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2274 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2275 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2276 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2277 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2278 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002279 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2280 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2281 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2282 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2283 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2284 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2285 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2286 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002287 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002288 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002289 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002290 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002291 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002292 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002293 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002294 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002295 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002296 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2297 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2298 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2299 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2300 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2301 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2302 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2303 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2304 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2305 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2306 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2307 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2308 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2309 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2310 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2311 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2312 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2313 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2314 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2315 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2316 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2317 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2318 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2319 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2320 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2321 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2322 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2323 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2324 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002325 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2326 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002327 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2328 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002329 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2330 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002331 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2332 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002333]
2334
Benoit Jacoba9644732020-08-13 12:48:55 -07002335NEONDOT_UKERNELS = [
Marat Dukhand65d20e2021-05-24 16:59:51 -07002336 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
2337 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
2338 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
2339 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
2340 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
2341 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
2342 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
2343 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
2344 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
2345 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
2346 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
2347 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
2348 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
2349 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
2350 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
2351 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002352]
2353
Marat Dukhan08c4a432019-10-03 09:29:21 -07002354SSE_UKERNELS = [
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Erich Elsenb1233402020-06-08 15:53:15 -07002357 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
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2361 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002363 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002365 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2366 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2367 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2368 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002369 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2370 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002371 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
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Marat Dukhan470078a2020-10-23 22:36:52 -07002374 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002375 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
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2378 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2379 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
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Marat Dukhan0ff97182020-10-25 19:14:03 -07002381 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002384 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002385 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002386 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
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2388 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002389 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
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2391 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2392 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2393 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2394 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2395 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2396 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2397 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2398 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2399 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2400 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2401 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002402 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2403 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2404 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2405 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2406 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2407 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
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2409 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002410 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
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2417 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
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2420 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002421 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
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Marat Dukhan802fcae2020-12-11 14:37:25 -08002424 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
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2426 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002427 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
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2429 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002430 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002433 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
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Marat Dukhan802fcae2020-12-11 14:37:25 -08002437 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
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Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002440 "src/f32-ibilinear-chw/gen/sse-p4.c",
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2446 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002447 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
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2449 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
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2452 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
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Marat Dukhan802fcae2020-12-11 14:37:25 -08002454 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
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2456 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002457 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
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2459 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002460 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002461 "src/f32-prelu/gen/sse-2x4.c",
2462 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002463 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002464 "src/f32-spmm/gen/4x1-minmax-sse.c",
2465 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002466 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002467 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002468 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2469 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2470 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2471 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2472 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2473 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2474 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2475 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002476 "src/f32-vbinary/gen/vmax-sse-x4.c",
2477 "src/f32-vbinary/gen/vmax-sse-x8.c",
2478 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2479 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2480 "src/f32-vbinary/gen/vmin-sse-x4.c",
2481 "src/f32-vbinary/gen/vmin-sse-x8.c",
2482 "src/f32-vbinary/gen/vminc-sse-x4.c",
2483 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002484 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2485 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2486 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2487 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2488 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2489 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2490 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2491 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002492 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2493 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2494 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2495 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002496 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2497 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2498 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2499 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002500 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2501 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002502 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2503 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002504 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2505 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002506 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2507 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002508 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2509 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002510 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2511 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002512 "src/f32-vunary/gen/vabs-sse-x4.c",
2513 "src/f32-vunary/gen/vabs-sse-x8.c",
2514 "src/f32-vunary/gen/vneg-sse-x4.c",
2515 "src/f32-vunary/gen/vneg-sse-x8.c",
2516 "src/f32-vunary/gen/vsqr-sse-x4.c",
2517 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002518 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002519 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002520 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002521 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002522 "src/math/sqrt-sse-hh1mac.c",
2523 "src/math/sqrt-sse-nr1mac.c",
2524 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002525 "src/x32-fill/sse.c",
2526 "src/x32-packx/x4-sse.c",
2527 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002528]
2529
2530SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002531 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002532 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002533 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002534 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2535 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2536 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2537 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2538 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2539 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2540 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2541 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2542 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2543 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2544 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2545 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002546 "src/f32-prelu/gen/sse2-2x4.c",
2547 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002548 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002549 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002550 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002551 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2552 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002553 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002554 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2555 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002556 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002557 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2558 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002559 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002560 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2561 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2562 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2563 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2564 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2565 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2566 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2567 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2568 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2569 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2570 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2571 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002572 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2573 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002574 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2575 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002576 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2577 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2578 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2579 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2580 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2581 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002582 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2583 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2584 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2585 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2586 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2587 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2588 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2589 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2590 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2591 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2592 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2593 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002594 "src/math/exp-sse2-rr2-lut64-p2.c",
2595 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002596 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002597 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002598 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002599 "src/math/roundd-sse2-cvt.c",
2600 "src/math/roundne-sse2-cvt.c",
2601 "src/math/roundu-sse2-cvt.c",
2602 "src/math/roundz-sse2-cvt.c",
2603 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2604 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2605 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2606 "src/math/sigmoid-sse2-rr2-p5-div.c",
2607 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2608 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002609 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
2610 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2611 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2612 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2613 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2614 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002615 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2616 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2617 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002618 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2619 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2620 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002621 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
2622 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
2623 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
2624 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
2625 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
2626 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
2627 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
2628 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
2629 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
2630 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
2631 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
2632 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
2633 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
2634 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
2635 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
2636 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
2637 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
2638 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
2639 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
2640 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
2641 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
2642 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
2643 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
2644 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
2645 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
2646 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
2647 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
2648 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
2649 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
2650 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
2651 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
2652 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
2653 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
2654 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
2655 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002656 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002657 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002658 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002659 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2660 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2661 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2662 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002663 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2664 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2665 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2666 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002667 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2668 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002669 "src/qu8-dwconv/up8x9-minmax-sse2.c",
2670 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2671 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
2672 "src/qu8-gemm/2x4c8-minmax-sse2.c",
2673 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002674 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002675 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002676 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002677 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002678 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002679 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002680 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002681 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002682 "src/x8-zip/x2-sse2.c",
2683 "src/x8-zip/x3-sse2.c",
2684 "src/x8-zip/x4-sse2.c",
2685 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002686 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002687 "src/x32-zip/x2-sse2.c",
2688 "src/x32-zip/x3-sse2.c",
2689 "src/x32-zip/x4-sse2.c",
2690 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07002691]
2692
2693SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07002694 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
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Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002697 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
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Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002699 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
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2702 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
2703 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002704 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
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2706 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
2707 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
2708 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
2709 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002710 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
2711 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
2712 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002713 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
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2715 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002716 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
2717 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
2718 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
2719 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
2720 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
2721 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
2722 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
2723 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
2724 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
2725 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
2726 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
2727 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
2728 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
2729 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
2730 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
2731 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
2732 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
2733 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
2734 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
2735 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
2736 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
2737 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
2738 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
2739 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
2740 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
2741 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
2742 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
2743 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
2744 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
2745 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
2746 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
2747 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
2748 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
2749 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
2750 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002751 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002752 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002753 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002754 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002755]
2756
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002757SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08002758 "src/f32-prelu/gen/sse41-2x4.c",
2759 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002760 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
2761 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
2762 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
2763 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
2764 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
2765 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
2766 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
2767 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
2768 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
2769 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
2770 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
2771 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002772 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
2773 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002774 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2775 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002776 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
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2778 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
2779 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
2780 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2781 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002782 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
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2785 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2786 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2787 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2788 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
2789 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
2790 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2791 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2792 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2793 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002794 "src/math/roundd-sse41.c",
2795 "src/math/roundne-sse41.c",
2796 "src/math/roundu-sse41.c",
2797 "src/math/roundz-sse41.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002798 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
2799 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
2800 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
2801 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
2802 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2803 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2804 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2805 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
2806 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2807 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2808 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
2809 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002810 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
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2812 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002813 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002816 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
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2818 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
2819 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
2820 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
2821 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
2822 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
2823 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
2824 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
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2826 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
2827 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
2828 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
2829 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
2830 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
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2838 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
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2840 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
2841 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
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2850 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002851 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002852 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002853 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002854 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
2855 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
2856 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
2857 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07002858 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
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2861 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002862 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
2863 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
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2865 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07002866 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
2867 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
2868 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
2869 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002870 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002871 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002872]
2873
Marat Dukhan08c4a432019-10-03 09:29:21 -07002874AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07002875 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002877 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
2878 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002879 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
2880 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002881 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
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2883 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
2884 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
2885 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
2886 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002887 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002888 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002890 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002891 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002892 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002893 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002894 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
2895 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
2896 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
2897 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
2898 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
2899 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
2900 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
2901 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
2902 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
2903 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
2904 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002905 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002906 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
2907 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002908 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002909 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002910 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002911 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002912 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
2913 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07002914 "src/f32-prelu/gen/avx-2x8.c",
2915 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002916 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002917 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
2918 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
2919 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
2920 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
2921 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
2922 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
2923 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
2924 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08002925 "src/f32-vbinary/gen/vmax-avx-x8.c",
2926 "src/f32-vbinary/gen/vmax-avx-x16.c",
2927 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
2928 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
2929 "src/f32-vbinary/gen/vmin-avx-x8.c",
2930 "src/f32-vbinary/gen/vmin-avx-x16.c",
2931 "src/f32-vbinary/gen/vminc-avx-x8.c",
2932 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002933 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
2934 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
2935 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
2936 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
2937 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
2938 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
2939 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
2940 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002941 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
2942 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
2943 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
2944 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002945 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
2946 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
2947 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
2948 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002949 "src/f32-vclamp/gen/vclamp-avx-x8.c",
2950 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002951 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
2952 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
2953 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
2954 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
2955 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
2956 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
2957 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
2958 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
2959 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
2960 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
2961 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
2962 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
2963 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
2964 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
2965 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
2966 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
2967 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
2968 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002969 "src/f32-vhswish/gen/vhswish-avx-x8.c",
2970 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002971 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
2972 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002973 "src/f32-vrelu/gen/vrelu-avx-x8.c",
2974 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002975 "src/f32-vrnd/gen/vrndd-avx-x8.c",
2976 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002977 "src/f32-vrnd/gen/vrndne-avx-x8.c",
2978 "src/f32-vrnd/gen/vrndne-avx-x16.c",
2979 "src/f32-vrnd/gen/vrndu-avx-x8.c",
2980 "src/f32-vrnd/gen/vrndu-avx-x16.c",
2981 "src/f32-vrnd/gen/vrndz-avx-x8.c",
2982 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002983 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002984 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
2985 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
2986 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
2987 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
2988 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
2989 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
2990 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
2991 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
2992 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
2993 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
2994 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
2995 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
2996 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
2997 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
2998 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
2999 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3000 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3001 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3002 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3003 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003004 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3005 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003006 "src/f32-vunary/gen/vabs-avx-x8.c",
3007 "src/f32-vunary/gen/vabs-avx-x16.c",
3008 "src/f32-vunary/gen/vneg-avx-x8.c",
3009 "src/f32-vunary/gen/vneg-avx-x16.c",
3010 "src/f32-vunary/gen/vsqr-avx-x8.c",
3011 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003012 "src/math/exp-avx-rr2-p5.c",
3013 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3014 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3015 "src/math/expm1minus-avx-rr2-p6.c",
3016 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3017 "src/math/sigmoid-avx-rr2-p5-div.c",
3018 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3019 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003020 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3021 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
3022 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3023 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3024 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3025 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3026 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3027 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3028 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3029 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3030 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3031 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003032 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3033 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
3034 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
3035 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3036 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
3037 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
3038 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3039 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
3040 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
3041 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3042 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
3043 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
3044 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3045 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
3046 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
3047 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3048 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
3049 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
3050 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
3051 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
3052 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
3053 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3054 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
3055 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3056 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
3057 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3058 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
3059 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3060 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
3061 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3062 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
3063 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3064 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
3065 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
3066 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003067 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3068 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3069 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3070 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3071 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3072 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3073 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3074 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3075 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3076 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3077 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3078 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3079 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3080 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3081 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3082 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003083]
3084
Marat Dukhan1566fee2020-08-02 21:55:41 -07003085XOP_UKERNELS = [
Marat Dukhane1ff2482021-05-24 17:48:47 -07003086 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
3087 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3088 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3089 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3090 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3091 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003092 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
3093 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld128.c",
3094 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
3095 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
3096 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
3097 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
3098 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
3099 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
3100 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
3101 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
3102 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
3103 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
3104 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
3105 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
3106 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
3107 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
3108 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
3109 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
3110 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
3111 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
3112 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
3113 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
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3115 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
3116 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
3117 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
3118 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
3119 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
3120 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
3121 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
3122 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
3123 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
3124 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
3125 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
3126 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003127 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3128 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3129 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3130 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3131 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3132 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3133 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3134 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003135]
3136
Marat Dukhanfda12b82019-11-21 12:27:59 -08003137FMA3_UKERNELS = [
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Marat Dukhan1c587112020-04-08 20:04:28 -07003140 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003142 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
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3148 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3149 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003155 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003158 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003159 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003161 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003164 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3165 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3166 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3167 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3168 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3169 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3170 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3171 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3172 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3173 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3174 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3175 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3176 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3177 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003178 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003179 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3180 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3181 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3182 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003183 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003184 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3185 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003186 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003187 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3188 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003189 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3190 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3191 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003192 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3193 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003194 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3195 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3196 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3197 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3198 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3199 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3200 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3201 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003202 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003203 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003204 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003205]
3206
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003207AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003208 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
3209 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003210 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003211 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003212 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003213 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
3214 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003215 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003216 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
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3218 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003219 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003220 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
3221 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003222 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003223 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003224 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003225 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3226 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003227 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003228 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3229 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3230 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003231 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003232 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3233 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003234 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003235 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003236 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003237 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3238 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003239 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003240 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3241 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3242 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003243 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003244 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3245 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3246 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3247 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3248 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3249 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
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3251 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3252 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3253 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3254 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3255 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3256 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3257 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3258 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3259 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3260 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3261 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3262 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3263 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3264 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3265 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3266 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3267 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3268 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3269 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3270 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3271 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3272 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3273 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3274 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3275 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3276 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3277 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3278 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3279 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3280 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3281 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3282 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3283 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003284 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3285 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3286 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3287 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3288 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3289 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3290 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3291 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3292 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3293 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3294 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3295 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3296 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3297 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3298 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3299 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3300 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3301 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3302 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3303 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3304 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3305 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3306 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3307 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003308 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3309 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3310 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3311 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3312 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3313 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3314 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3315 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3316 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3317 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3318 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3319 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3320 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3321 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3322 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3323 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3324 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3325 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3326 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3327 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3328 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3329 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3330 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3331 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3332 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3333 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3334 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3335 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3336 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3337 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003338 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3339 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3340 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003341 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3342 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3343 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3344 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003345 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003346 "src/math/extexp-avx2-p5.c",
3347 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3348 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3349 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3350 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3351 "src/math/sigmoid-avx2-rr1-p5-div.c",
3352 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3353 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3354 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3355 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3356 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3357 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3358 "src/math/sigmoid-avx2-rr2-p5-div.c",
3359 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3360 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003361 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003362 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003363 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003364 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003365 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003366 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003367 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003368 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003369 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003370 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003371 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003372 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003373 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003374 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003375 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003376 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003377 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003378 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003379 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003380 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003381 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003382 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003383 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003384 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003385 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003386 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003387 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
3388 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003389 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003390 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
3391 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003392 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003393 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
3394 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003395 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003396 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003397 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003398 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003399 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003400 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3401 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3402 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3403 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3404 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3405 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3406 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3407 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003408]
3409
Marat Dukhan08c4a432019-10-03 09:29:21 -07003410AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003411 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3412 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003413 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3414 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003415 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3416 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003417 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3418 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3419 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3420 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3421 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3422 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003423 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3424 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3425 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3426 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3427 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3428 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003429 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3430 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3431 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3432 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3433 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3434 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003435 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3436 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3437 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3438 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3439 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3440 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003441 "src/f32-prelu/gen/avx512f-2x16.c",
3442 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003443 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3444 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003445 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003446 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003447 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003448 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3449 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003450 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003451 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3452 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3453 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003454 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003455 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3456 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003457 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003458 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003459 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003460 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3461 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003462 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003463 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3464 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3465 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003466 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003467 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3468 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003469 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003470 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003471 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003472 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3473 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003474 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003475 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3476 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3477 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003478 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003479 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003480 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3481 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3482 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3483 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3484 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3485 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3486 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3487 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003488 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3489 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3490 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3491 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3492 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3493 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3494 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3495 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003496 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3497 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3498 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3499 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3500 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3501 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3502 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3503 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003504 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3505 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3506 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3507 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003508 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3509 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3510 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3511 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003512 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3513 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003514 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3515 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3516 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3517 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3518 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3519 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3520 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3521 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3522 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3523 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3524 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3525 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3526 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3527 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3528 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3529 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003530 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3531 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003532 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3533 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003534 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3535 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003536 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3537 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3538 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3539 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3540 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3541 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3542 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3543 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003544 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003545 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3546 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3547 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3548 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3549 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3550 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3551 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3552 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3553 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3554 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3555 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3556 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3557 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3558 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3559 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3560 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3561 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3562 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3563 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3564 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3565 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3566 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3567 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3568 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003569 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3570 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3571 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3572 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3573 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3574 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3575 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3576 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3577 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3578 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3579 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3580 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3581 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3582 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3583 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3584 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3585 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3586 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3587 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3588 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3589 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3590 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3591 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3592 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3593 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3594 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3595 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3596 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3597 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3598 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3599 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3600 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3601 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3602 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3603 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3604 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3605 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3606 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3607 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3608 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3609 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3610 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3611 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3612 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3613 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
3614 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
3615 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
3616 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003617 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
3618 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
3619 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
3620 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
3621 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
3622 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
3623 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
3624 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003625 "src/f32-vunary/gen/vabs-avx512f-x16.c",
3626 "src/f32-vunary/gen/vabs-avx512f-x32.c",
3627 "src/f32-vunary/gen/vneg-avx512f-x16.c",
3628 "src/f32-vunary/gen/vneg-avx512f-x32.c",
3629 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
3630 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003631 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
3632 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
3633 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
3634 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
3635 "src/math/exp-avx512f-rr2-p5-scalef.c",
3636 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003637 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
3638 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07003639 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003640 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003641 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003642 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003643 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003644 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003645 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003646 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003647 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003648 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
3649 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
3650 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
3651 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
3652 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
3653 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
3654 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
3655 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
3656 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
3657 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003658 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003659 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003660 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
3661 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
3662 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
3663 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003664 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003665 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003666 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003667]
3668
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003669AVX512SKX_UKERNELS = [
Marat Dukhane1ff2482021-05-24 17:48:47 -07003670 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003671 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003672 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003673 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003674 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003675 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003676 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003677 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003678 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003679 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003680 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003681 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003682 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003683 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003684 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003685 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003686 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003687 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003688 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003689 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003690 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003691 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003692 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003693 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003694]
3695
Frank Barchardbcedc082020-08-17 18:00:51 -07003696WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07003697 "src/f32-vrelu/wasm_shr_x1.S",
3698 "src/f32-vrelu/wasm_shr_x2.S",
3699 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07003700]
3701
Marat Dukhan08c4a432019-10-03 09:29:21 -07003702AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07003703 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07003704 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003705 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
3706 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003707 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003708 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07003709 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003710 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003711 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
3712 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003713 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
3714 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
3715 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
3716 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003717]
3718
3719AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003720 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003721 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003722 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003723 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003724 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003725 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -07003726 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003727 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
3728 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
3729 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
3730 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
3731 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
3732 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
3733 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003734 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
3735 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003736 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3737 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3738 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003739 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
3740 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003741 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3742 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
3743 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3744 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003745 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003746 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
3747 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003748 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3749 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
3750 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3751 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003752 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003753 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003754 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003755 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003756 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
3757 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
3758 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
3759 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
3760 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
3761 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
3762 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
3763 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
3764 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
3765 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
3766 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
3767 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
3768 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
3769 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
3770 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
3771 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
3772 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
3773 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
3774 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
3775 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
3776 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
3777 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003778 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003779 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003780 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
3781 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003782 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
3783 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
3784 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
3785 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
3786 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
3787 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003788 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
3789 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
3790 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
3791 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003792 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
3793 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003794 "src/qs8-gemm/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3795 "src/qs8-gemm/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
3796 "src/qs8-gemm/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
3797 "src/qs8-gemm/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3798 "src/qs8-gemm/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
3799 "src/qs8-gemm/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3800 "src/qs8-gemm/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
3801 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3802 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3803 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3804 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3805 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3806 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3807 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3808 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3809 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
3810 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
3811 "src/qs8-igemm/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3812 "src/qs8-igemm/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
3813 "src/qs8-igemm/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
3814 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3815 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3816 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3817 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3818 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3819 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3820 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3821 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3822 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
3823 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003824]
3825
Marat Dukhan1b354632020-03-23 12:50:22 -07003826INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003827 "src/xnnpack/argmaxpool.h",
3828 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003829 "src/xnnpack/common.h",
3830 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08003831 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003832 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07003833 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003834 "src/xnnpack/gavgpool.h",
3835 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07003836 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003837 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08003838 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003839 "src/xnnpack/lut.h",
3840 "src/xnnpack/math.h",
3841 "src/xnnpack/maxpool.h",
3842 "src/xnnpack/packx.h",
3843 "src/xnnpack/pad.h",
3844 "src/xnnpack/params.h",
3845 "src/xnnpack/pavgpool.h",
3846 "src/xnnpack/ppmm.h",
3847 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07003848 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07003849 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07003850 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003851 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003852 "src/xnnpack/spmm.h",
3853 "src/xnnpack/unpool.h",
3854 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08003855 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003856 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07003857 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07003858 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07003859 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08003860 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003861 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07003862]
3863
3864INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003865 "include/xnnpack.h",
3866 "src/xnnpack/allocator.h",
3867 "src/xnnpack/compute.h",
3868 "src/xnnpack/im2col.h",
3869 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003870 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07003871 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003872 "src/xnnpack/operator.h",
3873 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07003874 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003875 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003876 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08003877 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003878]
3879
Marat Dukhan1b354632020-03-23 12:50:22 -07003880ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003881 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003882]
3883
Marat Dukhan1b354632020-03-23 12:50:22 -07003884MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003885 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07003886 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003887]
3888
Marat Dukhan1b354632020-03-23 12:50:22 -07003889MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07003890 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003891 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07003892 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003893 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003894]
3895
3896OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003897 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07003898 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003899]
3900
3901WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003902 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07003903 "src/xnnpack/operator.h",
3904 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003905]
3906
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07003907LOGGING_COPTS = select({
3908 # No logging in optimized mode
3909 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
3910 # Full logging in debug mode
3911 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
3912 # Error-only logging in default (fastbuild) mode
3913 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
3914})
3915
Marat Dukhan3b59de22020-06-03 20:15:19 -07003916LOGGING_SRCS = select({
3917 # No logging in optimized mode
3918 ":optimized_build": [],
3919 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07003920 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07003921 "src/operator-strings.c",
3922 "src/subgraph-strings.c",
3923 ],
3924})
3925
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07003926LOGGING_HDRS = [
3927 "src/xnnpack/log.h",
3928]
3929
Marat Dukhan08c4a432019-10-03 09:29:21 -07003930xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003931 name = "tables",
3932 srcs = TABLE_SRCS,
3933 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07003934 gcc_copts = xnnpack_gcc_std_copts(),
3935 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003936)
3937
3938xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07003939 name = "scalar_ukernels",
3940 srcs = SCALAR_UKERNELS,
3941 hdrs = INTERNAL_HDRS,
3942 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07003943 gcc_copts = xnnpack_gcc_std_copts(),
3944 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07003945 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003946 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003947 "@FP16",
3948 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08003949 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003950 ],
3951)
3952
3953xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07003954 name = "scalar_ukernels_test_mode",
3955 srcs = SCALAR_UKERNELS,
3956 hdrs = INTERNAL_HDRS,
3957 aarch32_copts = ["-marm"],
3958 copts = [
3959 "-UNDEBUG",
3960 "-DXNN_TEST_MODE=1",
3961 ],
3962 gcc_copts = xnnpack_gcc_std_copts(),
3963 msvc_copts = xnnpack_msvc_std_copts(),
3964 deps = [
3965 ":tables",
3966 "@FP16",
3967 "@FXdiv",
3968 "@pthreadpool",
3969 ],
3970)
3971
3972xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08003973 name = "wasm_ukernels",
3974 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07003975 gcc_copts = xnnpack_gcc_std_copts(),
3976 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08003977 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07003978 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08003979 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003980 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08003981 "@FP16",
3982 "@FXdiv",
3983 "@pthreadpool",
3984 ],
3985)
3986
3987xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07003988 name = "wasm_ukernels_test_mode",
3989 hdrs = INTERNAL_HDRS,
3990 copts = [
3991 "-UNDEBUG",
3992 "-DXNN_TEST_MODE=1",
3993 ],
3994 gcc_copts = xnnpack_gcc_std_copts(),
3995 msvc_copts = xnnpack_msvc_std_copts(),
3996 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07003997 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07003998 deps = [
3999 ":tables",
4000 "@FP16",
4001 "@FXdiv",
4002 "@pthreadpool",
4003 ],
4004)
4005
4006xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004007 name = "neon_ukernels",
4008 hdrs = INTERNAL_HDRS,
4009 aarch32_copts = [
4010 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004011 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004012 "-mfpu=neon",
4013 ],
4014 aarch32_srcs = NEON_UKERNELS,
4015 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004016 gcc_copts = xnnpack_gcc_std_copts(),
4017 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004018 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004019 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004020 "@FP16",
4021 "@pthreadpool",
4022 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004023)
4024
4025xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004026 name = "neon_ukernels_test_mode",
4027 hdrs = INTERNAL_HDRS,
4028 aarch32_copts = [
4029 "-marm",
4030 "-march=armv7-a",
4031 "-mfpu=neon",
4032 ],
4033 aarch32_srcs = NEON_UKERNELS,
4034 aarch64_srcs = NEON_UKERNELS,
4035 copts = [
4036 "-UNDEBUG",
4037 "-DXNN_TEST_MODE=1",
4038 ],
4039 gcc_copts = xnnpack_gcc_std_copts(),
4040 msvc_copts = xnnpack_msvc_std_copts(),
4041 deps = [
4042 ":tables",
4043 "@FP16",
4044 "@pthreadpool",
4045 ],
4046)
4047
4048xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004049 name = "neonfma_ukernels",
4050 hdrs = INTERNAL_HDRS,
4051 aarch32_copts = [
4052 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004053 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004054 "-mfpu=neon-vfpv4",
4055 ],
4056 aarch32_srcs = NEONFMA_UKERNELS,
4057 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004058 apple_aarch32_copts = [
4059 "-mcpu=swift",
4060 "-mtune=generic",
4061 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004062 gcc_copts = xnnpack_gcc_std_copts(),
4063 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004064 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004065 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004066 "@FP16",
4067 "@pthreadpool",
4068 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004069)
4070
4071xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004072 name = "neonfma_ukernels_test_mode",
4073 hdrs = INTERNAL_HDRS,
4074 aarch32_copts = [
4075 "-marm",
4076 "-march=armv7-a",
4077 "-mfpu=neon-vfpv4",
4078 ],
4079 aarch32_srcs = NEONFMA_UKERNELS,
4080 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004081 apple_aarch32_copts = [
4082 "-mcpu=swift",
4083 "-mtune=generic",
4084 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004085 copts = [
4086 "-UNDEBUG",
4087 "-DXNN_TEST_MODE=1",
4088 ],
4089 gcc_copts = xnnpack_gcc_std_copts(),
4090 msvc_copts = xnnpack_msvc_std_copts(),
4091 deps = [
4092 ":tables",
4093 "@FP16",
4094 "@pthreadpool",
4095 ],
4096)
4097
4098xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004099 name = "neonv8_ukernels",
4100 hdrs = INTERNAL_HDRS,
4101 aarch32_copts = [
4102 "-marm",
4103 "-march=armv8-a",
4104 "-mfpu=neon-fp-armv8",
4105 ],
4106 aarch32_srcs = NEONV8_UKERNELS,
4107 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004108 apple_aarch32_copts = [
4109 "-mcpu=cyclone",
4110 "-mtune=generic",
4111 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004112 gcc_copts = xnnpack_gcc_std_copts(),
4113 msvc_copts = xnnpack_msvc_std_copts(),
4114 deps = [
4115 ":tables",
4116 "@FP16",
4117 "@pthreadpool",
4118 ],
4119)
4120
4121xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004122 name = "neonv8_ukernels_test_mode",
4123 hdrs = INTERNAL_HDRS,
4124 aarch32_copts = [
4125 "-marm",
4126 "-march=armv8-a",
4127 "-mfpu=neon-fp-armv8",
4128 ],
4129 aarch32_srcs = NEONV8_UKERNELS,
4130 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004131 apple_aarch32_copts = [
4132 "-mcpu=cyclone",
4133 "-mtune=generic",
4134 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004135 copts = [
4136 "-UNDEBUG",
4137 "-DXNN_TEST_MODE=1",
4138 ],
4139 gcc_copts = xnnpack_gcc_std_copts(),
4140 msvc_copts = xnnpack_msvc_std_copts(),
4141 deps = [
4142 ":tables",
4143 "@FP16",
4144 "@pthreadpool",
4145 ],
4146)
4147
4148xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004149 name = "neonfp16arith_ukernels",
4150 hdrs = INTERNAL_HDRS,
4151 aarch64_copts = ["-march=armv8.2-a+fp16"],
4152 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004153 gcc_copts = xnnpack_gcc_std_copts(),
4154 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004155 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004156 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004157 "@FP16",
4158 "@pthreadpool",
4159 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004160)
4161
4162xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004163 name = "neonfp16arith_ukernels_test_mode",
4164 hdrs = INTERNAL_HDRS,
4165 aarch64_copts = ["-march=armv8.2-a+fp16"],
4166 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4167 copts = [
4168 "-UNDEBUG",
4169 "-DXNN_TEST_MODE=1",
4170 ],
4171 gcc_copts = xnnpack_gcc_std_copts(),
4172 msvc_copts = xnnpack_msvc_std_copts(),
4173 deps = [
4174 ":tables",
4175 "@FP16",
4176 "@pthreadpool",
4177 ],
4178)
4179
4180xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004181 name = "neondot_ukernels",
4182 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004183 aarch32_copts = [
4184 "-marm",
4185 "-march=armv8.2-a+dotprod",
4186 "-mfpu=neon-fp-armv8",
4187 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004188 aarch32_srcs = NEONDOT_UKERNELS,
4189 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4190 aarch64_srcs = NEONDOT_UKERNELS,
4191 gcc_copts = xnnpack_gcc_std_copts(),
4192 msvc_copts = xnnpack_msvc_std_copts(),
4193 deps = [
4194 ":tables",
4195 "@FP16",
4196 "@pthreadpool",
4197 ],
4198)
4199
4200xnnpack_cc_library(
4201 name = "neondot_ukernels_test_mode",
4202 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004203 aarch32_copts = [
4204 "-marm",
4205 "-march=armv8.2-a+dotprod",
4206 "-mfpu=neon-fp-armv8",
4207 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004208 aarch32_srcs = NEONDOT_UKERNELS,
4209 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4210 aarch64_srcs = NEONDOT_UKERNELS,
4211 copts = [
4212 "-UNDEBUG",
4213 "-DXNN_TEST_MODE=1",
4214 ],
4215 gcc_copts = xnnpack_gcc_std_copts(),
4216 msvc_copts = xnnpack_msvc_std_copts(),
4217 deps = [
4218 ":tables",
4219 "@FP16",
4220 "@pthreadpool",
4221 ],
4222)
4223
4224xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004225 name = "sse2_ukernels",
4226 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004227 gcc_copts = xnnpack_gcc_std_copts(),
4228 gcc_x86_copts = ["-msse2"],
4229 msvc_copts = xnnpack_msvc_std_copts(),
4230 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004231 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004232 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004233 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004234 "@FP16",
4235 "@pthreadpool",
4236 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004237)
4238
4239xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004240 name = "sse2_ukernels_test_mode",
4241 hdrs = INTERNAL_HDRS,
4242 copts = [
4243 "-UNDEBUG",
4244 "-DXNN_TEST_MODE=1",
4245 ],
4246 gcc_copts = xnnpack_gcc_std_copts(),
4247 gcc_x86_copts = ["-msse2"],
4248 msvc_copts = xnnpack_msvc_std_copts(),
4249 msvc_x86_32_copts = ["/arch:SSE2"],
4250 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4251 deps = [
4252 ":tables",
4253 "@FP16",
4254 "@pthreadpool",
4255 ],
4256)
4257
4258xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004259 name = "ssse3_ukernels",
4260 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004261 gcc_copts = xnnpack_gcc_std_copts(),
4262 gcc_x86_copts = ["-mssse3"],
4263 msvc_copts = xnnpack_msvc_std_copts(),
4264 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004265 x86_srcs = SSSE3_UKERNELS,
4266 deps = [
4267 ":tables",
4268 "@FP16",
4269 "@pthreadpool",
4270 ],
4271)
4272
4273xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004274 name = "ssse3_ukernels_test_mode",
4275 hdrs = INTERNAL_HDRS,
4276 copts = [
4277 "-UNDEBUG",
4278 "-DXNN_TEST_MODE=1",
4279 ],
4280 gcc_copts = xnnpack_gcc_std_copts(),
4281 gcc_x86_copts = ["-mssse3"],
4282 msvc_copts = xnnpack_msvc_std_copts(),
4283 msvc_x86_32_copts = ["/arch:SSE2"],
4284 x86_srcs = SSSE3_UKERNELS,
4285 deps = [
4286 ":tables",
4287 "@FP16",
4288 "@pthreadpool",
4289 ],
4290)
4291
4292xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004293 name = "sse41_ukernels",
4294 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004295 gcc_copts = xnnpack_gcc_std_copts(),
4296 gcc_x86_copts = ["-msse4.1"],
4297 msvc_copts = xnnpack_msvc_std_copts(),
4298 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004299 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004300 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004301 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004302 "@FP16",
4303 "@pthreadpool",
4304 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004305)
4306
4307xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004308 name = "sse41_ukernels_test_mode",
4309 hdrs = INTERNAL_HDRS,
4310 copts = [
4311 "-UNDEBUG",
4312 "-DXNN_TEST_MODE=1",
4313 ],
4314 gcc_copts = xnnpack_gcc_std_copts(),
4315 gcc_x86_copts = ["-msse4.1"],
4316 msvc_copts = xnnpack_msvc_std_copts(),
4317 msvc_x86_32_copts = ["/arch:SSE2"],
4318 x86_srcs = SSE41_UKERNELS,
4319 deps = [
4320 ":tables",
4321 "@FP16",
4322 "@pthreadpool",
4323 ],
4324)
4325
4326xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004327 name = "avx_ukernels",
4328 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004329 gcc_copts = xnnpack_gcc_std_copts(),
4330 gcc_x86_copts = ["-mavx"],
4331 msvc_copts = xnnpack_msvc_std_copts(),
4332 msvc_x86_32_copts = ["/arch:AVX"],
4333 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004334 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004335 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004336 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004337 "@FP16",
4338 "@pthreadpool",
4339 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004340)
4341
4342xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004343 name = "avx_ukernels_test_mode",
4344 hdrs = INTERNAL_HDRS,
4345 copts = [
4346 "-UNDEBUG",
4347 "-DXNN_TEST_MODE=1",
4348 ],
4349 gcc_copts = xnnpack_gcc_std_copts(),
4350 gcc_x86_copts = ["-mavx"],
4351 msvc_copts = xnnpack_msvc_std_copts(),
4352 msvc_x86_32_copts = ["/arch:AVX"],
4353 msvc_x86_64_copts = ["/arch:AVX"],
4354 x86_srcs = AVX_UKERNELS,
4355 deps = [
4356 ":tables",
4357 "@FP16",
4358 "@pthreadpool",
4359 ],
4360)
4361
4362xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004363 name = "xop_ukernels",
4364 hdrs = INTERNAL_HDRS,
4365 gcc_copts = xnnpack_gcc_std_copts(),
4366 gcc_x86_copts = ["-mxop"],
4367 msvc_copts = xnnpack_msvc_std_copts(),
4368 msvc_x86_32_copts = ["/arch:AVX"],
4369 msvc_x86_64_copts = ["/arch:AVX"],
4370 x86_srcs = XOP_UKERNELS,
4371 deps = [
4372 ":tables",
4373 "@FP16",
4374 "@pthreadpool",
4375 ],
4376)
4377
4378xnnpack_cc_library(
4379 name = "xop_ukernels_test_mode",
4380 hdrs = INTERNAL_HDRS,
4381 copts = [
4382 "-UNDEBUG",
4383 "-DXNN_TEST_MODE=1",
4384 ],
4385 gcc_copts = xnnpack_gcc_std_copts(),
4386 gcc_x86_copts = ["-mxop"],
4387 msvc_copts = xnnpack_msvc_std_copts(),
4388 msvc_x86_32_copts = ["/arch:AVX"],
4389 msvc_x86_64_copts = ["/arch:AVX"],
4390 x86_srcs = XOP_UKERNELS,
4391 deps = [
4392 ":tables",
4393 "@FP16",
4394 "@pthreadpool",
4395 ],
4396)
4397
4398xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004399 name = "fma3_ukernels",
4400 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004401 gcc_copts = xnnpack_gcc_std_copts(),
4402 gcc_x86_copts = ["-mfma"],
4403 msvc_copts = xnnpack_msvc_std_copts(),
4404 msvc_x86_32_copts = ["/arch:AVX"],
4405 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004406 x86_srcs = FMA3_UKERNELS,
4407 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004408 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004409 "@FP16",
4410 "@pthreadpool",
4411 ],
4412)
4413
4414xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004415 name = "fma3_ukernels_test_mode",
4416 hdrs = INTERNAL_HDRS,
4417 copts = [
4418 "-UNDEBUG",
4419 "-DXNN_TEST_MODE=1",
4420 ],
4421 gcc_copts = xnnpack_gcc_std_copts(),
4422 gcc_x86_copts = ["-mfma"],
4423 msvc_copts = xnnpack_msvc_std_copts(),
4424 msvc_x86_32_copts = ["/arch:AVX"],
4425 msvc_x86_64_copts = ["/arch:AVX"],
4426 x86_srcs = FMA3_UKERNELS,
4427 deps = [
4428 ":tables",
4429 "@FP16",
4430 "@pthreadpool",
4431 ],
4432)
4433
4434xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004435 name = "avx2_ukernels",
4436 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004437 gcc_copts = xnnpack_gcc_std_copts(),
4438 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004439 "-mfma",
4440 "-mavx2",
4441 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004442 msvc_copts = xnnpack_msvc_std_copts(),
4443 msvc_x86_32_copts = ["/arch:AVX2"],
4444 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004445 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004446 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004447 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004448 "@FP16",
4449 "@pthreadpool",
4450 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004451)
4452
4453xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004454 name = "avx2_ukernels_test_mode",
4455 hdrs = INTERNAL_HDRS,
4456 copts = [
4457 "-UNDEBUG",
4458 "-DXNN_TEST_MODE=1",
4459 ],
4460 gcc_copts = xnnpack_gcc_std_copts(),
4461 gcc_x86_copts = [
4462 "-mfma",
4463 "-mavx2",
4464 ],
4465 msvc_copts = xnnpack_msvc_std_copts(),
4466 msvc_x86_32_copts = ["/arch:AVX2"],
4467 msvc_x86_64_copts = ["/arch:AVX2"],
4468 x86_srcs = AVX2_UKERNELS,
4469 deps = [
4470 ":tables",
4471 "@FP16",
4472 "@pthreadpool",
4473 ],
4474)
4475
4476xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004477 name = "avx512f_ukernels",
4478 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004479 gcc_copts = xnnpack_gcc_std_copts(),
4480 gcc_x86_copts = ["-mavx512f"],
4481 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4482 msvc_copts = xnnpack_msvc_std_copts(),
4483 msvc_x86_32_copts = ["/arch:AVX512"],
4484 msvc_x86_64_copts = ["/arch:AVX512"],
4485 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004486 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004487 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004488 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004489 "@FP16",
4490 "@pthreadpool",
4491 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004492)
4493
4494xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004495 name = "avx512f_ukernels_test_mode",
4496 hdrs = INTERNAL_HDRS,
4497 copts = [
4498 "-UNDEBUG",
4499 "-DXNN_TEST_MODE=1",
4500 ],
4501 gcc_copts = xnnpack_gcc_std_copts(),
4502 gcc_x86_copts = ["-mavx512f"],
4503 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4504 msvc_copts = xnnpack_msvc_std_copts(),
4505 msvc_x86_32_copts = ["/arch:AVX512"],
4506 msvc_x86_64_copts = ["/arch:AVX512"],
4507 msys_copts = ["-fno-asynchronous-unwind-tables"],
4508 x86_srcs = AVX512F_UKERNELS,
4509 deps = [
4510 ":tables",
4511 "@FP16",
4512 "@pthreadpool",
4513 ],
4514)
4515
4516xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004517 name = "avx512skx_ukernels",
4518 hdrs = INTERNAL_HDRS,
4519 gcc_copts = xnnpack_gcc_std_copts(),
4520 gcc_x86_copts = [
4521 "-mavx512f",
4522 "-mavx512cd",
4523 "-mavx512bw",
4524 "-mavx512dq",
4525 "-mavx512vl",
4526 ],
4527 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4528 msvc_copts = xnnpack_msvc_std_copts(),
4529 msvc_x86_32_copts = ["/arch:AVX512"],
4530 msvc_x86_64_copts = ["/arch:AVX512"],
4531 msys_copts = ["-fno-asynchronous-unwind-tables"],
4532 x86_srcs = AVX512SKX_UKERNELS,
4533 deps = [
4534 ":tables",
4535 "@FP16",
4536 "@pthreadpool",
4537 ],
4538)
4539
4540xnnpack_cc_library(
4541 name = "avx512skx_ukernels_test_mode",
4542 hdrs = INTERNAL_HDRS,
4543 copts = [
4544 "-UNDEBUG",
4545 "-DXNN_TEST_MODE=1",
4546 ],
4547 gcc_copts = xnnpack_gcc_std_copts(),
4548 gcc_x86_copts = [
4549 "-mavx512f",
4550 "-mavx512cd",
4551 "-mavx512bw",
4552 "-mavx512dq",
4553 "-mavx512vl",
4554 ],
4555 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4556 msvc_copts = xnnpack_msvc_std_copts(),
4557 msvc_x86_32_copts = ["/arch:AVX512"],
4558 msvc_x86_64_copts = ["/arch:AVX512"],
4559 msys_copts = ["-fno-asynchronous-unwind-tables"],
4560 x86_srcs = AVX512SKX_UKERNELS,
4561 deps = [
4562 ":tables",
4563 "@FP16",
4564 "@pthreadpool",
4565 ],
4566)
4567
4568xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004569 name = "asm_ukernels",
4570 hdrs = ["src/xnnpack/assembly.h"],
4571 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004572 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004573 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004574 wasm_srcs = WASM32_ASM_UKERNELS,
4575 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004576)
4577
Marat Dukhan3b59de22020-06-03 20:15:19 -07004578xnnpack_cc_library(
4579 name = "logging_utils",
4580 srcs = LOGGING_SRCS,
4581 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4582 copts = LOGGING_COPTS + [
4583 "-Isrc",
4584 "-Iinclude",
4585 ] + select({
4586 ":debug_build": [],
4587 "//conditions:default": xnnpack_min_size_copts(),
4588 }),
4589 gcc_copts = xnnpack_gcc_std_copts(),
4590 msvc_copts = xnnpack_msvc_std_copts(),
4591 visibility = xnnpack_visibility(),
4592 deps = [
4593 "@FP16",
4594 "@clog",
4595 "@pthreadpool",
4596 ],
4597)
4598
Marat Dukhan08c4a432019-10-03 09:29:21 -07004599xnnpack_aggregate_library(
4600 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004601 aarch32_ios_deps = [
4602 ":neon_ukernels",
4603 ":neonfma_ukernels",
4604 ":neonv8_ukernels",
4605 ":asm_ukernels",
4606 ],
4607 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004608 ":neon_ukernels",
4609 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004610 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004611 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004612 ":asm_ukernels",
4613 ],
4614 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004615 ":neon_ukernels",
4616 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004617 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004618 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004619 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004620 ":asm_ukernels",
4621 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004622 generic_deps = [
4623 ":scalar_ukernels",
4624 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004625 wasm_deps = [
4626 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004627 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004628 ],
4629 wasmsimd_deps = [
4630 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004631 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004632 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004633 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004634 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004635 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004636 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004637 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004638 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004639 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004640 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004641 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004642 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004643 ],
4644)
4645
Marat Dukhan33fcf782020-05-24 14:27:15 -07004646xnnpack_aggregate_library(
4647 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004648 aarch32_ios_deps = [
4649 ":neon_ukernels_test_mode",
4650 ":neonfma_ukernels_test_mode",
4651 ":neonv8_ukernels_test_mode",
4652 ":asm_ukernels",
4653 ],
4654 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07004655 ":neon_ukernels_test_mode",
4656 ":neonfma_ukernels_test_mode",
4657 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004658 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004659 ":asm_ukernels",
4660 ],
4661 aarch64_deps = [
4662 ":neon_ukernels_test_mode",
4663 ":neonfma_ukernels_test_mode",
4664 ":neonv8_ukernels_test_mode",
4665 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004666 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004667 ":asm_ukernels",
4668 ],
4669 generic_deps = [
4670 ":scalar_ukernels_test_mode",
4671 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004672 wasm_deps = [
4673 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004674 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004675 ],
4676 wasmsimd_deps = [
4677 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004678 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004679 ],
4680 x86_deps = [
4681 ":sse2_ukernels_test_mode",
4682 ":ssse3_ukernels_test_mode",
4683 ":sse41_ukernels_test_mode",
4684 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004685 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004686 ":fma3_ukernels_test_mode",
4687 ":avx2_ukernels_test_mode",
4688 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004689 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004690 ],
4691)
4692
Marat Dukhan08c4a432019-10-03 09:29:21 -07004693xnnpack_cc_library(
4694 name = "im2col",
4695 srcs = ["src/im2col.c"],
4696 hdrs = [
4697 "src/xnnpack/common.h",
4698 "src/xnnpack/im2col.h",
4699 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004700 gcc_copts = xnnpack_gcc_std_copts(),
4701 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004702)
4703
4704xnnpack_cc_library(
4705 name = "indirection",
4706 srcs = ["src/indirection.c"],
4707 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004708 gcc_copts = xnnpack_gcc_std_copts(),
4709 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004710 deps = [
4711 "@FP16",
4712 "@FXdiv",
4713 "@pthreadpool",
4714 ],
4715)
4716
4717xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004718 name = "indirection_test_mode",
4719 srcs = ["src/indirection.c"],
4720 hdrs = INTERNAL_HDRS,
4721 copts = [
4722 "-UNDEBUG",
4723 "-DXNN_TEST_MODE=1",
4724 ],
4725 gcc_copts = xnnpack_gcc_std_copts(),
4726 msvc_copts = xnnpack_msvc_std_copts(),
4727 deps = [
4728 "@FP16",
4729 "@FXdiv",
4730 "@pthreadpool",
4731 ],
4732)
4733
4734xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07004735 name = "packing",
4736 srcs = ["src/packing.c"],
4737 hdrs = INTERNAL_HDRS,
4738 gcc_copts = xnnpack_gcc_std_copts(),
4739 msvc_copts = xnnpack_msvc_std_copts(),
4740 deps = [
4741 "@FP16",
4742 "@FXdiv",
4743 "@pthreadpool",
4744 ],
4745)
4746
4747xnnpack_cc_library(
4748 name = "packing_test_mode",
4749 srcs = ["src/packing.c"],
4750 hdrs = INTERNAL_HDRS,
4751 copts = [
4752 "-UNDEBUG",
4753 "-DXNN_TEST_MODE=1",
4754 ],
4755 gcc_copts = xnnpack_gcc_std_copts(),
4756 msvc_copts = xnnpack_msvc_std_copts(),
4757 deps = [
4758 "@FP16",
4759 "@FXdiv",
4760 "@pthreadpool",
4761 ],
4762)
4763
4764xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004765 name = "operator_run",
4766 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004767 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004768 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07004769 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4770 "//conditions:default": [],
4771 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004772 gcc_copts = xnnpack_gcc_std_copts(),
4773 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004774 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004775 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004776 "@FP16",
4777 "@FXdiv",
4778 "@clog",
4779 "@pthreadpool",
4780 ],
4781)
4782
Chao Mei6ddfc602020-05-13 22:29:36 -07004783xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004784 name = "operator_run_test_mode",
4785 srcs = ["src/operator-run.c"],
4786 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4787 copts = LOGGING_COPTS + [
4788 "-UNDEBUG",
4789 "-DXNN_TEST_MODE=1",
4790 ] + select({
4791 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4792 "//conditions:default": [],
4793 }),
4794 gcc_copts = xnnpack_gcc_std_copts(),
4795 msvc_copts = xnnpack_msvc_std_copts(),
4796 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004797 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004798 "@FP16",
4799 "@FXdiv",
4800 "@clog",
4801 "@pthreadpool",
4802 ],
4803)
4804
4805xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07004806 name = "memory_planner",
4807 srcs = ["src/memory-planner.c"],
4808 hdrs = INTERNAL_HDRS,
4809 defines = select({
4810 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
4811 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
4812 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
4813 }),
4814 gcc_copts = xnnpack_gcc_std_copts(),
4815 msvc_copts = xnnpack_msvc_std_copts(),
4816 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004817 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07004818 "@pthreadpool",
4819 ],
4820)
4821
Marat Dukhan33fcf782020-05-24 14:27:15 -07004822xnnpack_cc_library(
4823 name = "memory_planner_test_mode",
4824 srcs = ["src/memory-planner.c"],
4825 hdrs = INTERNAL_HDRS,
4826 copts = [
4827 "-UNDEBUG",
4828 "-DXNN_TEST_MODE=1",
4829 ],
4830 defines = select({
4831 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
4832 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
4833 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
4834 }),
4835 gcc_copts = xnnpack_gcc_std_copts(),
4836 msvc_copts = xnnpack_msvc_std_copts(),
4837 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004838 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004839 "@pthreadpool",
4840 ],
4841)
4842
Marat Dukhan08c4a432019-10-03 09:29:21 -07004843cc_library(
4844 name = "enable_assembly",
4845 defines = select({
4846 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
4847 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07004848 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004849 }),
4850)
4851
Marat Dukhan9de90e02020-06-18 16:04:12 -07004852cc_library(
4853 name = "enable_sparse",
4854 defines = select({
4855 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
4856 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08004857 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07004858 }),
4859)
4860
Marat Dukhancf056b22019-10-07 10:26:29 -07004861xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004862 name = "operators",
4863 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07004864 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004865 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07004866 ],
4867 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004868 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004869 "-Isrc",
4870 "-Iinclude",
4871 ] + select({
4872 ":debug_build": [],
4873 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07004874 }) + select({
4875 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4876 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004877 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004878 gcc_copts = xnnpack_gcc_std_copts(),
4879 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004880 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004881 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004882 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07004883 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004884 "@FP16",
4885 "@FXdiv",
4886 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004887 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004888 ],
4889)
4890
Marat Dukhan10a38082020-04-17 03:58:35 -07004891xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004892 name = "operators_test_mode",
4893 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07004894 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004895 "src/operator-delete.c",
4896 ],
4897 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4898 copts = LOGGING_COPTS + [
4899 "-Isrc",
4900 "-Iinclude",
4901 "-UNDEBUG",
4902 "-DXNN_TEST_MODE=1",
4903 ] + select({
4904 ":debug_build": [],
4905 "//conditions:default": xnnpack_min_size_copts(),
4906 }) + select({
4907 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4908 "//conditions:default": [],
4909 }),
4910 gcc_copts = xnnpack_gcc_std_copts(),
4911 msvc_copts = xnnpack_msvc_std_copts(),
4912 deps = [
4913 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004914 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07004915 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004916 "@FP16",
4917 "@FXdiv",
4918 "@clog",
4919 "@pthreadpool",
4920 ],
4921)
4922
4923xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004924 name = "XNNPACK",
4925 srcs = [
4926 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08004927 "src/runtime.c",
4928 "src/subgraph.c",
4929 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07004930 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004931 hdrs = ["include/xnnpack.h"],
4932 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004933 "-Isrc",
4934 "-Iinclude",
4935 ] + select({
4936 ":debug_build": [],
4937 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07004938 }) + select({
4939 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4940 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004941 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004942 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004943 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004944 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004945 visibility = xnnpack_visibility(),
4946 deps = [
4947 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07004948 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004949 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07004950 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004951 ":operator_run",
4952 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004953 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004954 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07004955 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004956 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07004957 ] + select({
4958 ":emscripten": [],
4959 "//conditions:default": ["@cpuinfo"],
4960 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004961)
4962
Marat Dukhan10a38082020-04-17 03:58:35 -07004963xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004964 name = "XNNPACK_test_mode",
4965 srcs = [
4966 "src/init.c",
4967 "src/runtime.c",
4968 "src/subgraph.c",
4969 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07004970 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004971 hdrs = ["include/xnnpack.h"],
4972 copts = LOGGING_COPTS + [
4973 "-Isrc",
4974 "-Iinclude",
4975 "-UNDEBUG",
4976 "-DXNN_TEST_MODE=1",
4977 ] + select({
4978 ":debug_build": [],
4979 "//conditions:default": xnnpack_min_size_copts(),
4980 }) + select({
4981 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4982 "//conditions:default": [],
4983 }),
4984 gcc_copts = xnnpack_gcc_std_copts(),
4985 includes = ["include"],
4986 msvc_copts = xnnpack_msvc_std_copts(),
4987 visibility = xnnpack_visibility(),
4988 deps = [
4989 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07004990 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004991 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004992 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004993 ":operator_run_test_mode",
4994 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004995 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004996 "@clog",
4997 "@FP16",
4998 "@pthreadpool",
4999 ] + select({
5000 ":emscripten": [],
5001 "//conditions:default": ["@cpuinfo"],
5002 }),
5003)
5004
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005005# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5006# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005007xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005008 name = "xnnpack_for_tflite",
5009 srcs = [
5010 "src/init.c",
5011 "src/runtime.c",
5012 "src/subgraph.c",
5013 "src/tensor.c",
5014 ] + SUBGRAPH_SRCS,
5015 hdrs = ["include/xnnpack.h"],
5016 copts = LOGGING_COPTS + [
5017 "-Isrc",
5018 "-Iinclude",
5019 ] + select({
5020 ":debug_build": [],
5021 "//conditions:default": xnnpack_min_size_copts(),
5022 }) + select({
5023 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5024 "//conditions:default": [],
5025 }),
5026 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005027 "XNN_NO_QU8_OPERATORS",
5028 "XNN_NO_U8_OPERATORS",
5029 "XNN_NO_X8_OPERATORS",
5030 "XNN_NO_F16_OPERATORS",
5031 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005032 ] + select({
5033 ":xnn_enable_qs8_explicit_true": [],
5034 ":xnn_enable_qs8_explicit_false": ["XNN_NO_QS8_OPERATORS"],
5035 "//conditions:default": ["XNN_NO_QS8_OPERATORS"],
5036 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005037 gcc_copts = xnnpack_gcc_std_copts(),
5038 includes = ["include"],
5039 msvc_copts = xnnpack_msvc_std_copts(),
5040 visibility = xnnpack_visibility(),
5041 deps = [
5042 ":enable_assembly",
5043 ":enable_sparse",
5044 ":logging_utils",
5045 ":memory_planner",
5046 ":operator_run",
5047 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005048 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005049 "@clog",
5050 "@FP16",
5051 "@pthreadpool",
5052 ] + select({
5053 ":emscripten": [],
5054 "//conditions:default": ["@cpuinfo"],
5055 }),
5056)
5057
5058# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5059# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5060xnnpack_cc_library(
5061 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005062 srcs = [
5063 "src/init.c",
5064 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005065 hdrs = ["include/xnnpack.h"],
5066 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005067 "-Isrc",
5068 "-Iinclude",
5069 ] + select({
5070 ":debug_build": [],
5071 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005072 }) + select({
5073 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5074 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005075 }),
5076 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005077 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005078 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005079 "XNN_NO_U8_OPERATORS",
5080 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005081 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005082 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005083 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005084 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005085 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005086 visibility = xnnpack_visibility(),
5087 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005088 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005089 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005090 ":operator_run",
5091 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005092 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005093 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005094 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005095 ] + select({
5096 ":emscripten": [],
5097 "//conditions:default": ["@cpuinfo"],
5098 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005099)
5100
Marat Dukhancf056b22019-10-07 10:26:29 -07005101xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005102 name = "bench_utils",
5103 srcs = ["bench/utils.cc"],
5104 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005105 deps = [
5106 "@com_google_benchmark//:benchmark",
5107 "@cpuinfo",
5108 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005109)
5110
Frank Barchard7e955972019-10-11 10:34:25 -07005111######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005112
5113xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005114 name = "qs8_gemm_bench",
5115 srcs = [
5116 "bench/gemm.h",
5117 "bench/qs8-gemm.cc",
5118 "src/xnnpack/AlignedAllocator.h",
5119 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005120 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5121 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005122)
5123
5124xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005125 name = "qs8_requantization_bench",
5126 srcs = [
5127 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005128 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005129 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005130 ] + MICROKERNEL_BENCHMARK_HDRS,
5131 deps = MICROKERNEL_BENCHMARK_DEPS,
5132)
5133
5134xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005135 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005136 srcs = [
5137 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005138 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005139 "src/xnnpack/AlignedAllocator.h",
5140 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005141 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005142 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005143)
5144
5145xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005146 name = "qu8_requantization_bench",
5147 srcs = [
5148 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005149 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005150 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005151 ] + MICROKERNEL_BENCHMARK_HDRS,
5152 deps = MICROKERNEL_BENCHMARK_DEPS,
5153)
5154
5155xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005156 name = "f16_igemm_bench",
5157 srcs = [
5158 "bench/f16-igemm.cc",
5159 "bench/conv.h",
5160 "bench/google/conv.h",
5161 "src/xnnpack/AlignedAllocator.h",
5162 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005163 deps = MICROKERNEL_BENCHMARK_DEPS + [
5164 ":indirection",
5165 ":packing",
5166 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005167)
5168
5169xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005170 name = "f16_gemm_bench",
5171 srcs = [
5172 "bench/f16-gemm.cc",
5173 "bench/gemm.h",
5174 "src/xnnpack/AlignedAllocator.h",
5175 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005176 deps = MICROKERNEL_BENCHMARK_DEPS + [
5177 ":packing",
5178 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005179)
5180
5181xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005182 name = "f16_spmm_bench",
5183 srcs = [
5184 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005185 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005186 "src/xnnpack/AlignedAllocator.h",
5187 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005188 deps = MICROKERNEL_BENCHMARK_DEPS,
5189)
5190
5191xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005192 name = "f16_vrelu_bench",
5193 srcs = [
5194 "bench/f16-vrelu.cc",
5195 "src/xnnpack/AlignedAllocator.h",
5196 ] + MICROKERNEL_BENCHMARK_HDRS,
5197 deps = MICROKERNEL_BENCHMARK_DEPS,
5198)
5199
5200xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005201 name = "f32_igemm_bench",
5202 srcs = [
5203 "bench/f32-igemm.cc",
5204 "bench/conv.h",
5205 "src/xnnpack/AlignedAllocator.h",
5206 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005207 deps = MICROKERNEL_BENCHMARK_DEPS + [
5208 ":indirection",
5209 ":packing",
5210 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005211)
5212
5213xnnpack_benchmark(
5214 name = "f32_conv_hwc_bench",
5215 srcs = [
5216 "bench/f32-conv-hwc.cc",
5217 "bench/dconv.h",
5218 "src/xnnpack/AlignedAllocator.h",
5219 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005220 deps = MICROKERNEL_BENCHMARK_DEPS + [
5221 ":packing",
5222 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005223)
5224
5225xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005226 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005227 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005228 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005229 "bench/dconv.h",
5230 "src/xnnpack/AlignedAllocator.h",
5231 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005232 deps = MICROKERNEL_BENCHMARK_DEPS + [
5233 ":packing",
5234 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005235)
5236
5237xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005238 name = "f16_dwconv_bench",
5239 srcs = [
5240 "bench/f16-dwconv.cc",
5241 "bench/dwconv.h",
5242 "bench/google/dwconv.h",
5243 "src/xnnpack/AlignedAllocator.h",
5244 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005245 deps = MICROKERNEL_BENCHMARK_DEPS + [
5246 ":indirection",
5247 ":packing",
5248 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005249)
5250
5251xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005252 name = "f32_dwconv_bench",
5253 srcs = [
5254 "bench/f32-dwconv.cc",
5255 "bench/dwconv.h",
5256 "src/xnnpack/AlignedAllocator.h",
5257 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005258 deps = MICROKERNEL_BENCHMARK_DEPS + [
5259 ":indirection",
5260 ":packing",
5261 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005262)
5263
5264xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005265 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005266 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005267 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005268 "bench/dwconv.h",
5269 "src/xnnpack/AlignedAllocator.h",
5270 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005271 deps = MICROKERNEL_BENCHMARK_DEPS + [
5272 ":indirection",
5273 ":packing",
5274 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005275)
5276
5277xnnpack_benchmark(
5278 name = "f32_gemm_bench",
5279 srcs = [
5280 "bench/f32-gemm.cc",
5281 "bench/gemm.h",
5282 "src/xnnpack/AlignedAllocator.h",
5283 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005284 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005285 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005286)
5287
5288xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005289 name = "f32_raddexpminusmax_bench",
5290 srcs = [
5291 "bench/f32-raddexpminusmax.cc",
5292 "src/xnnpack/AlignedAllocator.h",
5293 ] + MICROKERNEL_BENCHMARK_HDRS,
5294 deps = MICROKERNEL_BENCHMARK_DEPS,
5295)
5296
5297xnnpack_benchmark(
5298 name = "f32_raddextexp_bench",
5299 srcs = [
5300 "bench/f32-raddextexp.cc",
5301 "src/xnnpack/AlignedAllocator.h",
5302 ] + MICROKERNEL_BENCHMARK_HDRS,
5303 deps = MICROKERNEL_BENCHMARK_DEPS,
5304)
5305
5306xnnpack_benchmark(
5307 name = "f32_raddstoreexpminusmax_bench",
5308 srcs = [
5309 "bench/f32-raddstoreexpminusmax.cc",
5310 "src/xnnpack/AlignedAllocator.h",
5311 ] + MICROKERNEL_BENCHMARK_HDRS,
5312 deps = MICROKERNEL_BENCHMARK_DEPS,
5313)
5314
5315xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005316 name = "f32_rmax_bench",
5317 srcs = [
5318 "bench/f32-rmax.cc",
5319 "src/xnnpack/AlignedAllocator.h",
5320 ] + MICROKERNEL_BENCHMARK_HDRS,
5321 deps = MICROKERNEL_BENCHMARK_DEPS,
5322)
5323
5324xnnpack_benchmark(
5325 name = "f32_spmm_bench",
5326 srcs = [
5327 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005328 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005329 "src/xnnpack/AlignedAllocator.h",
5330 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005331 deps = MICROKERNEL_BENCHMARK_DEPS,
5332)
5333
5334xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005335 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005336 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005337 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005338 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005339 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005340 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005341)
5342
5343xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005344 name = "f32_velu_bench",
5345 srcs = [
5346 "bench/f32-velu.cc",
5347 "src/xnnpack/AlignedAllocator.h",
5348 ] + MICROKERNEL_BENCHMARK_HDRS,
5349 deps = MICROKERNEL_BENCHMARK_DEPS,
5350)
5351
5352xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005353 name = "f32_vhswish_bench",
5354 srcs = [
5355 "bench/f32-vhswish.cc",
5356 "src/xnnpack/AlignedAllocator.h",
5357 ] + MICROKERNEL_BENCHMARK_HDRS,
5358 deps = MICROKERNEL_BENCHMARK_DEPS,
5359)
5360
5361xnnpack_benchmark(
5362 name = "f32_vrelu_bench",
5363 srcs = [
5364 "bench/f32-vrelu.cc",
5365 "src/xnnpack/AlignedAllocator.h",
5366 ] + MICROKERNEL_BENCHMARK_HDRS,
5367 deps = MICROKERNEL_BENCHMARK_DEPS,
5368)
5369
5370xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005371 name = "f32_vscaleexpminusmax_bench",
5372 srcs = [
5373 "bench/f32-vscaleexpminusmax.cc",
5374 "src/xnnpack/AlignedAllocator.h",
5375 ] + MICROKERNEL_BENCHMARK_HDRS,
5376 deps = MICROKERNEL_BENCHMARK_DEPS,
5377)
5378
5379xnnpack_benchmark(
5380 name = "f32_vscaleextexp_bench",
5381 srcs = [
5382 "bench/f32-vscaleextexp.cc",
5383 "src/xnnpack/AlignedAllocator.h",
5384 ] + MICROKERNEL_BENCHMARK_HDRS,
5385 deps = MICROKERNEL_BENCHMARK_DEPS,
5386)
5387
5388xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005389 name = "f32_vsigmoid_bench",
5390 srcs = [
5391 "bench/f32-vsigmoid.cc",
5392 "src/xnnpack/AlignedAllocator.h",
5393 ] + MICROKERNEL_BENCHMARK_HDRS,
5394 deps = MICROKERNEL_BENCHMARK_DEPS,
5395)
5396
5397xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005398 name = "f32_vsqrt_bench",
5399 srcs = [
5400 "bench/f32-vsqrt.cc",
5401 "src/xnnpack/AlignedAllocator.h",
5402 ] + MICROKERNEL_BENCHMARK_HDRS,
5403 deps = MICROKERNEL_BENCHMARK_DEPS,
5404)
5405
5406xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005407 name = "f32_im2col_gemm_bench",
5408 srcs = [
5409 "bench/f32-im2col-gemm.cc",
5410 "bench/conv.h",
5411 "src/xnnpack/AlignedAllocator.h",
5412 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005413 deps = MICROKERNEL_BENCHMARK_DEPS + [
5414 ":im2col",
5415 ":packing",
5416 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005417)
5418
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005419xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005420 name = "rounding_bench",
5421 srcs = [
5422 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005423 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005424 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005425 ] + MICROKERNEL_BENCHMARK_HDRS,
5426 deps = MICROKERNEL_BENCHMARK_DEPS,
5427)
5428
Marat Dukhan08c4a432019-10-03 09:29:21 -07005429########################### Benchmarks for operators ###########################
5430
5431xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005432 name = "average_pooling_bench",
5433 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005434 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005435 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005436 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005437)
5438
5439xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005440 name = "bankers_rounding_bench",
5441 srcs = ["bench/bankers-rounding.cc"],
5442 copts = xnnpack_optional_tflite_copts(),
5443 tags = ["nowin32"],
5444 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5445)
5446
5447xnnpack_benchmark(
5448 name = "ceiling_bench",
5449 srcs = ["bench/ceiling.cc"],
5450 copts = xnnpack_optional_tflite_copts(),
5451 tags = ["nowin32"],
5452 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5453)
5454
5455xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005456 name = "channel_shuffle_bench",
5457 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005458 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005459)
5460
5461xnnpack_benchmark(
5462 name = "convolution_bench",
5463 srcs = ["bench/convolution.cc"],
5464 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005465 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005466 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005467)
5468
5469xnnpack_benchmark(
5470 name = "deconvolution_bench",
5471 srcs = ["bench/deconvolution.cc"],
5472 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005473 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005474 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005475)
5476
5477xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005478 name = "elu_bench",
5479 srcs = ["bench/elu.cc"],
5480 copts = xnnpack_optional_tflite_copts(),
5481 tags = ["nowin32"],
5482 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5483)
5484
5485xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005486 name = "floor_bench",
5487 srcs = ["bench/floor.cc"],
5488 copts = xnnpack_optional_tflite_copts(),
5489 tags = ["nowin32"],
5490 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5491)
5492
5493xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005494 name = "global_average_pooling_bench",
5495 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005496 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005497)
5498
5499xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005500 name = "hardswish_bench",
5501 srcs = ["bench/hardswish.cc"],
5502 copts = xnnpack_optional_tflite_copts(),
5503 tags = ["nowin32"],
5504 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5505)
5506
5507xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005508 name = "max_pooling_bench",
5509 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005510 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005511)
5512
5513xnnpack_benchmark(
5514 name = "sigmoid_bench",
5515 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005516 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005517 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005518 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005519)
5520
5521xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005522 name = "prelu_bench",
5523 srcs = ["bench/prelu.cc"],
5524 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005525 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005526 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005527)
5528
5529xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005530 name = "softmax_bench",
5531 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005532 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005533 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005534 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005535)
5536
Marat Dukhan87727142020-06-24 15:24:10 -07005537xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005538 name = "square_root_bench",
5539 srcs = ["bench/square-root.cc"],
5540 copts = xnnpack_optional_tflite_copts(),
5541 tags = ["nowin32"],
5542 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5543)
5544
5545xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005546 name = "truncation_bench",
5547 srcs = ["bench/truncation.cc"],
5548 deps = OPERATOR_BENCHMARK_DEPS,
5549)
5550
Marat Dukhanc068bb62019-10-04 13:24:39 -07005551############################# End-to-end benchmarks ############################
5552
5553cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005554 name = "fp32_mobilenet_v1",
5555 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005556 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005557 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005558 linkstatic = True,
5559 deps = [
5560 ":XNNPACK",
5561 "@pthreadpool",
5562 ],
5563)
5564
5565cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005566 name = "fp32_sparse_mobilenet_v1",
5567 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5568 hdrs = ["models/models.h"],
5569 copts = xnnpack_std_cxxopts(),
5570 linkstatic = True,
5571 deps = [
5572 ":XNNPACK",
5573 "@pthreadpool",
5574 ],
5575)
5576
5577cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005578 name = "fp16_mobilenet_v1",
5579 srcs = ["models/fp16-mobilenet-v1.cc"],
5580 hdrs = ["models/models.h"],
5581 copts = xnnpack_std_cxxopts(),
5582 linkstatic = True,
5583 deps = [
5584 ":XNNPACK",
5585 "@FP16",
5586 "@pthreadpool",
5587 ],
5588)
5589
5590cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005591 name = "qs8_mobilenet_v1",
5592 srcs = ["models/qs8-mobilenet-v1.cc"],
5593 hdrs = ["models/models.h"],
5594 copts = xnnpack_std_cxxopts(),
5595 linkstatic = True,
5596 deps = [
5597 ":XNNPACK",
5598 "@pthreadpool",
5599 ],
5600)
5601
5602cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07005603 name = "qs8_mobilenet_v2",
5604 srcs = ["models/qs8-mobilenet-v2.cc"],
5605 hdrs = ["models/models.h"],
5606 copts = xnnpack_std_cxxopts(),
5607 linkstatic = True,
5608 deps = [
5609 ":XNNPACK",
5610 "@pthreadpool",
5611 ],
5612)
5613
5614cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005615 name = "qu8_mobilenet_v1",
5616 srcs = ["models/qu8-mobilenet-v1.cc"],
5617 hdrs = ["models/models.h"],
5618 copts = xnnpack_std_cxxopts(),
5619 linkstatic = True,
5620 deps = [
5621 ":XNNPACK",
5622 "@pthreadpool",
5623 ],
5624)
5625
5626cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005627 name = "fp32_mobilenet_v2",
5628 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005629 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005630 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005631 linkstatic = True,
5632 deps = [
5633 ":XNNPACK",
5634 "@pthreadpool",
5635 ],
5636)
5637
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005638cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005639 name = "fp32_sparse_mobilenet_v2",
5640 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
5641 hdrs = ["models/models.h"],
5642 copts = xnnpack_std_cxxopts(),
5643 linkstatic = True,
5644 deps = [
5645 ":XNNPACK",
5646 "@pthreadpool",
5647 ],
5648)
5649
5650cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005651 name = "fp16_mobilenet_v2",
5652 srcs = ["models/fp16-mobilenet-v2.cc"],
5653 hdrs = ["models/models.h"],
5654 copts = xnnpack_std_cxxopts(),
5655 linkstatic = True,
5656 deps = [
5657 ":XNNPACK",
5658 "@FP16",
5659 "@pthreadpool",
5660 ],
5661)
5662
5663cc_library(
5664 name = "fp32_mobilenet_v3_large",
5665 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005666 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005667 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005668 linkstatic = True,
5669 deps = [
5670 ":XNNPACK",
5671 "@pthreadpool",
5672 ],
5673)
5674
5675cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005676 name = "fp32_sparse_mobilenet_v3_large",
5677 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
5678 hdrs = ["models/models.h"],
5679 copts = xnnpack_std_cxxopts(),
5680 linkstatic = True,
5681 deps = [
5682 ":XNNPACK",
5683 "@pthreadpool",
5684 ],
5685)
5686
5687cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005688 name = "fp16_mobilenet_v3_large",
5689 srcs = ["models/fp16-mobilenet-v3-large.cc"],
5690 hdrs = ["models/models.h"],
5691 copts = xnnpack_std_cxxopts(),
5692 linkstatic = True,
5693 deps = [
5694 ":XNNPACK",
5695 "@FP16",
5696 "@pthreadpool",
5697 ],
5698)
5699
5700cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005701 name = "fp32_mobilenet_v3_small",
5702 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005703 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005704 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005705 linkstatic = True,
5706 deps = [
5707 ":XNNPACK",
5708 "@pthreadpool",
5709 ],
5710)
5711
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005712cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005713 name = "fp32_sparse_mobilenet_v3_small",
5714 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
5715 hdrs = ["models/models.h"],
5716 copts = xnnpack_std_cxxopts(),
5717 linkstatic = True,
5718 deps = [
5719 ":XNNPACK",
5720 "@pthreadpool",
5721 ],
5722)
5723
5724cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005725 name = "fp16_mobilenet_v3_small",
5726 srcs = ["models/fp16-mobilenet-v3-small.cc"],
5727 hdrs = ["models/models.h"],
5728 copts = xnnpack_std_cxxopts(),
5729 linkstatic = True,
5730 deps = [
5731 ":XNNPACK",
5732 "@FP16",
5733 "@pthreadpool",
5734 ],
5735)
5736
Marat Dukhanc068bb62019-10-04 13:24:39 -07005737xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07005738 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005739 srcs = [
5740 "bench/f32-dwconv-e2e.cc",
5741 "bench/end2end.h",
5742 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07005743 deps = MICROKERNEL_BENCHMARK_DEPS + [
5744 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005745 ":fp32_mobilenet_v1",
5746 ":fp32_mobilenet_v2",
5747 ":fp32_mobilenet_v3_large",
5748 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07005749 ],
5750)
5751
5752xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07005753 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005754 srcs = [
5755 "bench/f32-gemm-e2e.cc",
5756 "bench/end2end.h",
5757 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07005758 deps = MICROKERNEL_BENCHMARK_DEPS + [
5759 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005760 ":fp32_mobilenet_v1",
5761 ":fp32_mobilenet_v2",
5762 ":fp32_mobilenet_v3_large",
5763 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07005764 ],
5765)
5766
5767xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08005768 name = "qs8_gemm_e2e_bench",
5769 srcs = [
5770 "bench/qs8-gemm-e2e.cc",
5771 "bench/end2end.h",
5772 ] + MICROKERNEL_BENCHMARK_HDRS,
5773 deps = MICROKERNEL_BENCHMARK_DEPS + [
5774 ":XNNPACK",
5775 ":qs8_mobilenet_v1",
5776 ":qs8_mobilenet_v2",
5777 ],
5778)
5779
5780xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07005781 name = "end2end_bench",
5782 srcs = ["bench/end2end.cc"],
5783 deps = [
5784 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07005785 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005786 ":fp16_mobilenet_v1",
5787 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005788 ":fp16_mobilenet_v3_large",
5789 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005790 ":fp32_mobilenet_v1",
5791 ":fp32_mobilenet_v2",
5792 ":fp32_mobilenet_v3_large",
5793 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08005794 ":fp32_sparse_mobilenet_v1",
5795 ":fp32_sparse_mobilenet_v2",
5796 ":fp32_sparse_mobilenet_v3_large",
5797 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005798 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07005799 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005800 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07005801 "@pthreadpool",
5802 ],
5803)
5804
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005805#################### Accuracy evaluation for math functions ####################
5806
5807xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005808 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005809 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005810 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005811 "src/xnnpack/AlignedAllocator.h",
5812 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08005813 deps = ACCURACY_EVAL_DEPS + [
5814 ":bench_utils",
5815 "@cpuinfo",
5816 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005817)
5818
Marat Dukhan515c9772019-10-17 18:07:57 -07005819xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005820 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07005821 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005822 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07005823 "src/xnnpack/AlignedAllocator.h",
5824 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08005825 deps = ACCURACY_EVAL_DEPS + [
5826 ":bench_utils",
5827 "@cpuinfo",
5828 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07005829)
5830
Marat Dukhan98ba4412019-10-23 02:14:28 -07005831xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005832 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08005833 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005834 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08005835 "src/xnnpack/AlignedAllocator.h",
5836 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08005837 deps = ACCURACY_EVAL_DEPS + [
5838 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08005839 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08005840 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08005841)
5842
5843xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005844 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07005845 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005846 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07005847 "src/xnnpack/AlignedAllocator.h",
5848 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08005849 deps = ACCURACY_EVAL_DEPS + [
5850 ":bench_utils",
5851 "@cpuinfo",
5852 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07005853)
5854
Marat Dukhanf44f0222020-12-14 11:53:27 -08005855xnnpack_benchmark(
5856 name = "f32_sigmoid_ulp_eval",
5857 srcs = [
5858 "eval/f32-sigmoid-ulp.cc",
5859 "src/xnnpack/AlignedAllocator.h",
5860 ] + ACCURACY_EVAL_HDRS,
5861 deps = ACCURACY_EVAL_DEPS + [
5862 ":bench_utils",
5863 "@cpuinfo",
5864 ],
5865)
5866
5867xnnpack_benchmark(
5868 name = "f32_sqrt_ulp_eval",
5869 srcs = [
5870 "eval/f32-sqrt-ulp.cc",
5871 "src/xnnpack/AlignedAllocator.h",
5872 ] + ACCURACY_EVAL_HDRS,
5873 deps = ACCURACY_EVAL_DEPS + [
5874 ":bench_utils",
5875 "@cpuinfo",
5876 ],
5877)
5878
5879################### Accuracy verification for math functions ##################
5880
5881xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08005882 name = "f32_exp_eval",
5883 srcs = [
5884 "eval/f32-exp.cc",
5885 "src/xnnpack/AlignedAllocator.h",
5886 "src/xnnpack/math-stubs.h",
5887 ] + MICROKERNEL_TEST_HDRS,
5888 automatic = False,
5889 deps = MICROKERNEL_TEST_DEPS,
5890)
5891
5892xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08005893 name = "f32_expm1minus_eval",
5894 srcs = [
5895 "eval/f32-expm1minus.cc",
5896 "src/xnnpack/AlignedAllocator.h",
5897 "src/xnnpack/math-stubs.h",
5898 ] + MICROKERNEL_TEST_HDRS,
5899 automatic = False,
5900 deps = MICROKERNEL_TEST_DEPS,
5901)
5902
Marat Dukhan8853b822020-05-07 12:19:01 -07005903xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08005904 name = "f32_expminus_eval",
5905 srcs = [
5906 "eval/f32-expminus.cc",
5907 "src/xnnpack/AlignedAllocator.h",
5908 "src/xnnpack/math-stubs.h",
5909 ] + MICROKERNEL_TEST_HDRS,
5910 automatic = False,
5911 deps = MICROKERNEL_TEST_DEPS,
5912)
5913
5914xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07005915 name = "f32_roundne_eval",
5916 srcs = [
5917 "eval/f32-roundne.cc",
5918 "src/xnnpack/AlignedAllocator.h",
5919 "src/xnnpack/math-stubs.h",
5920 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07005921 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07005922 deps = MICROKERNEL_TEST_DEPS,
5923)
5924
Marat Dukhan2dbb9442020-05-12 20:43:43 -07005925xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07005926 name = "f32_roundd_eval",
5927 srcs = [
5928 "eval/f32-roundd.cc",
5929 "src/xnnpack/AlignedAllocator.h",
5930 "src/xnnpack/math-stubs.h",
5931 ] + MICROKERNEL_TEST_HDRS,
5932 automatic = False,
5933 deps = MICROKERNEL_TEST_DEPS,
5934)
5935
5936xnnpack_unit_test(
5937 name = "f32_roundu_eval",
5938 srcs = [
5939 "eval/f32-roundu.cc",
5940 "src/xnnpack/AlignedAllocator.h",
5941 "src/xnnpack/math-stubs.h",
5942 ] + MICROKERNEL_TEST_HDRS,
5943 automatic = False,
5944 deps = MICROKERNEL_TEST_DEPS,
5945)
5946
5947xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07005948 name = "f32_roundz_eval",
5949 srcs = [
5950 "eval/f32-roundz.cc",
5951 "src/xnnpack/AlignedAllocator.h",
5952 "src/xnnpack/math-stubs.h",
5953 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07005954 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07005955 deps = MICROKERNEL_TEST_DEPS,
5956)
5957
Marat Dukhan08c4a432019-10-03 09:29:21 -07005958######################### Unit tests for micro-kernels #########################
5959
5960xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07005961 name = "f16_dwconv_minmax_test",
5962 srcs = [
5963 "test/f16-dwconv-minmax.cc",
5964 "test/dwconv-microkernel-tester.h",
5965 "src/xnnpack/AlignedAllocator.h",
5966 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
5967 deps = MICROKERNEL_TEST_DEPS + [":packing"],
5968)
5969
5970xnnpack_unit_test(
5971 name = "f16_gavgpool_minmax_test",
5972 srcs = [
5973 "test/f16-gavgpool-minmax.cc",
5974 "test/gavgpool-microkernel-tester.h",
5975 "src/xnnpack/AlignedAllocator.h",
5976 ] + MICROKERNEL_TEST_HDRS,
5977 deps = MICROKERNEL_TEST_DEPS,
5978)
5979
5980xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07005981 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005982 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07005983 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005984 "test/gemm-microkernel-tester.h",
5985 "src/xnnpack/AlignedAllocator.h",
5986 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005987 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005988)
5989
5990xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07005991 name = "f16_igemm_minmax_test",
5992 srcs = [
5993 "test/f16-igemm-minmax.cc",
5994 "test/gemm-microkernel-tester.h",
5995 "src/xnnpack/AlignedAllocator.h",
5996 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
5997 deps = MICROKERNEL_TEST_DEPS + [":packing"],
5998)
5999
6000xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006001 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006002 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006003 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006004 "test/spmm-microkernel-tester.h",
6005 "src/xnnpack/AlignedAllocator.h",
6006 ] + MICROKERNEL_TEST_HDRS,
6007 deps = MICROKERNEL_TEST_DEPS,
6008)
6009
6010xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006011 name = "f16_vadd_minmax_test",
6012 srcs = [
6013 "test/f16-vadd-minmax.cc",
6014 "test/vbinary-microkernel-tester.h",
6015 ] + MICROKERNEL_TEST_HDRS,
6016 deps = MICROKERNEL_TEST_DEPS,
6017)
6018
6019xnnpack_unit_test(
6020 name = "f16_vaddc_minmax_test",
6021 srcs = [
6022 "test/f16-vaddc-minmax.cc",
6023 "test/vbinaryc-microkernel-tester.h",
6024 ] + MICROKERNEL_TEST_HDRS,
6025 deps = MICROKERNEL_TEST_DEPS,
6026)
6027
6028xnnpack_unit_test(
6029 name = "f16_vclamp_test",
6030 srcs = [
6031 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006032 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006033 ] + MICROKERNEL_TEST_HDRS,
6034 deps = MICROKERNEL_TEST_DEPS,
6035)
6036
6037xnnpack_unit_test(
6038 name = "f16_vdiv_minmax_test",
6039 srcs = [
6040 "test/f16-vdiv-minmax.cc",
6041 "test/vbinary-microkernel-tester.h",
6042 ] + MICROKERNEL_TEST_HDRS,
6043 deps = MICROKERNEL_TEST_DEPS,
6044)
6045
6046xnnpack_unit_test(
6047 name = "f16_vdivc_minmax_test",
6048 srcs = [
6049 "test/f16-vdivc-minmax.cc",
6050 "test/vbinaryc-microkernel-tester.h",
6051 ] + MICROKERNEL_TEST_HDRS,
6052 deps = MICROKERNEL_TEST_DEPS,
6053)
6054
6055xnnpack_unit_test(
6056 name = "f16_vrdivc_minmax_test",
6057 srcs = [
6058 "test/f16-vrdivc-minmax.cc",
6059 "test/vbinaryc-microkernel-tester.h",
6060 ] + MICROKERNEL_TEST_HDRS,
6061 deps = MICROKERNEL_TEST_DEPS,
6062)
6063
6064xnnpack_unit_test(
6065 name = "f16_vhswish_test",
6066 srcs = [
6067 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006068 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006069 ] + MICROKERNEL_TEST_HDRS,
6070 deps = MICROKERNEL_TEST_DEPS,
6071)
6072
6073xnnpack_unit_test(
6074 name = "f16_vmax_test",
6075 srcs = [
6076 "test/f16-vmax.cc",
6077 "test/vbinary-microkernel-tester.h",
6078 ] + MICROKERNEL_TEST_HDRS,
6079 deps = MICROKERNEL_TEST_DEPS,
6080)
6081
6082xnnpack_unit_test(
6083 name = "f16_vmaxc_test",
6084 srcs = [
6085 "test/f16-vmaxc.cc",
6086 "test/vbinaryc-microkernel-tester.h",
6087 ] + MICROKERNEL_TEST_HDRS,
6088 deps = MICROKERNEL_TEST_DEPS,
6089)
6090
6091xnnpack_unit_test(
6092 name = "f16_vmin_test",
6093 srcs = [
6094 "test/f16-vmin.cc",
6095 "test/vbinary-microkernel-tester.h",
6096 ] + MICROKERNEL_TEST_HDRS,
6097 deps = MICROKERNEL_TEST_DEPS,
6098)
6099
6100xnnpack_unit_test(
6101 name = "f16_vminc_test",
6102 srcs = [
6103 "test/f16-vminc.cc",
6104 "test/vbinaryc-microkernel-tester.h",
6105 ] + MICROKERNEL_TEST_HDRS,
6106 deps = MICROKERNEL_TEST_DEPS,
6107)
6108
6109xnnpack_unit_test(
6110 name = "f16_vmul_minmax_test",
6111 srcs = [
6112 "test/f16-vmul-minmax.cc",
6113 "test/vbinary-microkernel-tester.h",
6114 ] + MICROKERNEL_TEST_HDRS,
6115 deps = MICROKERNEL_TEST_DEPS,
6116)
6117
6118xnnpack_unit_test(
6119 name = "f16_vmulc_minmax_test",
6120 srcs = [
6121 "test/f16-vmulc-minmax.cc",
6122 "test/vbinaryc-microkernel-tester.h",
6123 ] + MICROKERNEL_TEST_HDRS,
6124 deps = MICROKERNEL_TEST_DEPS,
6125)
6126
6127xnnpack_unit_test(
6128 name = "f16_vmulcaddc_minmax_test",
6129 srcs = [
6130 "test/f16-vmulcaddc-minmax.cc",
6131 "test/vmulcaddc-microkernel-tester.h",
6132 "src/xnnpack/AlignedAllocator.h",
6133 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6134 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6135)
6136
6137xnnpack_unit_test(
6138 name = "f16_vsub_minmax_test",
6139 srcs = [
6140 "test/f16-vsub-minmax.cc",
6141 "test/vbinary-microkernel-tester.h",
6142 ] + MICROKERNEL_TEST_HDRS,
6143 deps = MICROKERNEL_TEST_DEPS,
6144)
6145
6146xnnpack_unit_test(
6147 name = "f16_vsubc_minmax_test",
6148 srcs = [
6149 "test/f16-vsubc-minmax.cc",
6150 "test/vbinaryc-microkernel-tester.h",
6151 ] + MICROKERNEL_TEST_HDRS,
6152 deps = MICROKERNEL_TEST_DEPS,
6153)
6154
6155xnnpack_unit_test(
6156 name = "f16_vrsubc_minmax_test",
6157 srcs = [
6158 "test/f16-vrsubc-minmax.cc",
6159 "test/vbinaryc-microkernel-tester.h",
6160 ] + MICROKERNEL_TEST_HDRS,
6161 deps = MICROKERNEL_TEST_DEPS,
6162)
6163
6164xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006165 name = "f32_argmaxpool_test",
6166 srcs = [
6167 "test/f32-argmaxpool.cc",
6168 "test/argmaxpool-microkernel-tester.h",
6169 "src/xnnpack/AlignedAllocator.h",
6170 ] + MICROKERNEL_TEST_HDRS,
6171 deps = MICROKERNEL_TEST_DEPS,
6172)
6173
6174xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006175 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006176 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006177 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006178 "test/avgpool-microkernel-tester.h",
6179 "src/xnnpack/AlignedAllocator.h",
6180 ] + MICROKERNEL_TEST_HDRS,
6181 deps = MICROKERNEL_TEST_DEPS,
6182)
6183
6184xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006185 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006186 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006187 "test/f32-ibilinear.cc",
6188 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006189 "src/xnnpack/AlignedAllocator.h",
6190 ] + MICROKERNEL_TEST_HDRS,
6191 deps = MICROKERNEL_TEST_DEPS,
6192)
6193
6194xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006195 name = "f32_ibilinear_chw_test",
6196 srcs = [
6197 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006198 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006199 "src/xnnpack/AlignedAllocator.h",
6200 ] + MICROKERNEL_TEST_HDRS,
6201 deps = MICROKERNEL_TEST_DEPS,
6202)
6203
6204xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006205 name = "f32_igemm_test",
6206 srcs = [
6207 "test/f32-igemm.cc",
6208 "test/gemm-microkernel-tester.h",
6209 "src/xnnpack/AlignedAllocator.h",
6210 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006211 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006212)
6213
6214xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006215 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006216 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006217 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006218 "test/gemm-microkernel-tester.h",
6219 "src/xnnpack/AlignedAllocator.h",
6220 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006221 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006222)
6223
6224xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006225 name = "f32_igemm_minmax_test",
6226 srcs = [
6227 "test/f32-igemm-minmax.cc",
6228 "test/gemm-microkernel-tester.h",
6229 "src/xnnpack/AlignedAllocator.h",
6230 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006231 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006232)
6233
6234xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006235 name = "f32_conv_hwc_test",
6236 srcs = [
6237 "test/f32-conv-hwc.cc",
6238 "test/conv-hwc-microkernel-tester.h",
6239 "src/xnnpack/AlignedAllocator.h",
6240 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006241 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006242)
6243
6244xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006245 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006246 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006247 "test/f32-conv-hwc2chw.cc",
6248 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006249 "src/xnnpack/AlignedAllocator.h",
6250 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006251 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006252)
6253
6254xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006255 name = "f32_dwconv_test",
6256 srcs = [
6257 "test/f32-dwconv.cc",
6258 "test/dwconv-microkernel-tester.h",
6259 "src/xnnpack/AlignedAllocator.h",
6260 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006261 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006262)
6263
6264xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006265 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006266 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006267 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006268 "test/dwconv-microkernel-tester.h",
6269 "src/xnnpack/AlignedAllocator.h",
6270 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006271 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006272)
6273
6274xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006275 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006276 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006277 "test/f32-dwconv2d-chw.cc",
6278 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006279 "src/xnnpack/AlignedAllocator.h",
6280 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006281 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006282)
6283
6284xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006285 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006286 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006287 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006288 "test/gavgpool-microkernel-tester.h",
6289 "src/xnnpack/AlignedAllocator.h",
6290 ] + MICROKERNEL_TEST_HDRS,
6291 deps = MICROKERNEL_TEST_DEPS,
6292)
6293
6294xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006295 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006296 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006297 "test/f32-gavgpool-cw.cc",
6298 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006299 "src/xnnpack/AlignedAllocator.h",
6300 ] + MICROKERNEL_TEST_HDRS,
6301 deps = MICROKERNEL_TEST_DEPS,
6302)
6303
6304xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006305 name = "f32_gemm_test",
6306 srcs = [
6307 "test/f32-gemm.cc",
6308 "test/gemm-microkernel-tester.h",
6309 "src/xnnpack/AlignedAllocator.h",
6310 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006311 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006312)
6313
6314xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006315 name = "f32_gemm_relu_test",
6316 srcs = [
6317 "test/f32-gemm-relu.cc",
6318 "test/gemm-microkernel-tester.h",
6319 "src/xnnpack/AlignedAllocator.h",
6320 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006321 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006322)
6323
6324xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006325 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006326 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006327 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006328 "test/gemm-microkernel-tester.h",
6329 "src/xnnpack/AlignedAllocator.h",
6330 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006331 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006332)
6333
6334xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006335 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006336 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006337 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006338 "test/gemm-microkernel-tester.h",
6339 "src/xnnpack/AlignedAllocator.h",
6340 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006341 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006342)
6343
6344xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006345 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006346 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006347 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006348 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006349 ] + MICROKERNEL_TEST_HDRS,
6350 deps = MICROKERNEL_TEST_DEPS,
6351)
6352
6353xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006354 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006355 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006356 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006357 "test/maxpool-microkernel-tester.h",
6358 ] + MICROKERNEL_TEST_HDRS,
6359 deps = MICROKERNEL_TEST_DEPS,
6360)
6361
6362xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006363 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006364 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006365 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006366 "test/avgpool-microkernel-tester.h",
6367 "src/xnnpack/AlignedAllocator.h",
6368 ] + MICROKERNEL_TEST_HDRS,
6369 deps = MICROKERNEL_TEST_DEPS,
6370)
6371
6372xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006373 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006374 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006375 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006376 "test/gemm-microkernel-tester.h",
6377 "src/xnnpack/AlignedAllocator.h",
6378 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006379 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006380)
6381
6382xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006383 name = "f16_prelu_test",
6384 srcs = [
6385 "test/f16-prelu.cc",
6386 "test/prelu-microkernel-tester.h",
6387 "src/xnnpack/AlignedAllocator.h",
6388 ] + MICROKERNEL_TEST_HDRS,
6389 deps = MICROKERNEL_TEST_DEPS,
6390)
6391
6392xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006393 name = "f32_prelu_test",
6394 srcs = [
6395 "test/f32-prelu.cc",
6396 "test/prelu-microkernel-tester.h",
6397 "src/xnnpack/AlignedAllocator.h",
6398 ] + MICROKERNEL_TEST_HDRS,
6399 deps = MICROKERNEL_TEST_DEPS,
6400)
6401
6402xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006403 name = "f32_raddexpminusmax_test",
6404 srcs = [
6405 "test/f32-raddexpminusmax.cc",
6406 "test/raddexpminusmax-microkernel-tester.h",
6407 ] + MICROKERNEL_TEST_HDRS,
6408 deps = MICROKERNEL_TEST_DEPS,
6409)
6410
6411xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006412 name = "f32_raddextexp_test",
6413 srcs = [
6414 "test/f32-raddextexp.cc",
6415 "test/raddextexp-microkernel-tester.h",
6416 ] + MICROKERNEL_TEST_HDRS,
6417 deps = MICROKERNEL_TEST_DEPS,
6418)
6419
6420xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006421 name = "f32_raddstoreexpminusmax_test",
6422 srcs = [
6423 "test/f32-raddstoreexpminusmax.cc",
6424 "test/raddstoreexpminusmax-microkernel-tester.h",
6425 ] + MICROKERNEL_TEST_HDRS,
6426 deps = MICROKERNEL_TEST_DEPS,
6427)
6428
6429xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006430 name = "f32_rmax_test",
6431 srcs = [
6432 "test/f32-rmax.cc",
6433 "test/rmax-microkernel-tester.h",
6434 ] + MICROKERNEL_TEST_HDRS,
6435 deps = MICROKERNEL_TEST_DEPS,
6436)
6437
6438xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006439 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006440 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006441 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006442 "test/spmm-microkernel-tester.h",
6443 "src/xnnpack/AlignedAllocator.h",
6444 ] + MICROKERNEL_TEST_HDRS,
6445 deps = MICROKERNEL_TEST_DEPS,
6446)
6447
6448xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006449 name = "f32_vabs_test",
6450 srcs = [
6451 "test/f32-vabs.cc",
6452 "test/vunary-microkernel-tester.h",
6453 ] + MICROKERNEL_TEST_HDRS,
6454 deps = MICROKERNEL_TEST_DEPS,
6455)
6456
6457xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006458 name = "f32_vadd_test",
6459 srcs = [
6460 "test/f32-vadd.cc",
6461 "test/vbinary-microkernel-tester.h",
6462 ] + MICROKERNEL_TEST_HDRS,
6463 deps = MICROKERNEL_TEST_DEPS,
6464)
6465
6466xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006467 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006468 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006469 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006470 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006471 ] + MICROKERNEL_TEST_HDRS,
6472 deps = MICROKERNEL_TEST_DEPS,
6473)
6474
6475xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006476 name = "f32_vadd_relu_test",
6477 srcs = [
6478 "test/f32-vadd-relu.cc",
6479 "test/vbinary-microkernel-tester.h",
6480 ] + MICROKERNEL_TEST_HDRS,
6481 deps = MICROKERNEL_TEST_DEPS,
6482)
6483
6484xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006485 name = "f32_vaddc_test",
6486 srcs = [
6487 "test/f32-vaddc.cc",
6488 "test/vbinaryc-microkernel-tester.h",
6489 ] + MICROKERNEL_TEST_HDRS,
6490 deps = MICROKERNEL_TEST_DEPS,
6491)
6492
6493xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006494 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006495 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006496 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006497 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006498 ] + MICROKERNEL_TEST_HDRS,
6499 deps = MICROKERNEL_TEST_DEPS,
6500)
6501
6502xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006503 name = "f32_vaddc_relu_test",
6504 srcs = [
6505 "test/f32-vaddc-relu.cc",
6506 "test/vbinaryc-microkernel-tester.h",
6507 ] + MICROKERNEL_TEST_HDRS,
6508 deps = MICROKERNEL_TEST_DEPS,
6509)
6510
6511xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006512 name = "f32_vclamp_test",
6513 srcs = [
6514 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006515 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006516 ] + MICROKERNEL_TEST_HDRS,
6517 deps = MICROKERNEL_TEST_DEPS,
6518)
6519
6520xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006521 name = "f32_vdiv_test",
6522 srcs = [
6523 "test/f32-vdiv.cc",
6524 "test/vbinary-microkernel-tester.h",
6525 ] + MICROKERNEL_TEST_HDRS,
6526 deps = MICROKERNEL_TEST_DEPS,
6527)
6528
6529xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006530 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006531 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006532 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006533 "test/vbinary-microkernel-tester.h",
6534 ] + MICROKERNEL_TEST_HDRS,
6535 deps = MICROKERNEL_TEST_DEPS,
6536)
6537
6538xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006539 name = "f32_vdiv_relu_test",
6540 srcs = [
6541 "test/f32-vdiv-relu.cc",
6542 "test/vbinary-microkernel-tester.h",
6543 ] + MICROKERNEL_TEST_HDRS,
6544 deps = MICROKERNEL_TEST_DEPS,
6545)
6546
6547xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006548 name = "f32_vdivc_test",
6549 srcs = [
6550 "test/f32-vdivc.cc",
6551 "test/vbinaryc-microkernel-tester.h",
6552 ] + MICROKERNEL_TEST_HDRS,
6553 deps = MICROKERNEL_TEST_DEPS,
6554)
6555
6556xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006557 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006558 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006559 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006560 "test/vbinaryc-microkernel-tester.h",
6561 ] + MICROKERNEL_TEST_HDRS,
6562 deps = MICROKERNEL_TEST_DEPS,
6563)
6564
6565xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006566 name = "f32_vdivc_relu_test",
6567 srcs = [
6568 "test/f32-vdivc-relu.cc",
6569 "test/vbinaryc-microkernel-tester.h",
6570 ] + MICROKERNEL_TEST_HDRS,
6571 deps = MICROKERNEL_TEST_DEPS,
6572)
6573
6574xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006575 name = "f32_vrdivc_test",
6576 srcs = [
6577 "test/f32-vrdivc.cc",
6578 "test/vbinaryc-microkernel-tester.h",
6579 ] + MICROKERNEL_TEST_HDRS,
6580 deps = MICROKERNEL_TEST_DEPS,
6581)
6582
6583xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006584 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006585 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006586 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006587 "test/vbinaryc-microkernel-tester.h",
6588 ] + MICROKERNEL_TEST_HDRS,
6589 deps = MICROKERNEL_TEST_DEPS,
6590)
6591
6592xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006593 name = "f32_vrdivc_relu_test",
6594 srcs = [
6595 "test/f32-vrdivc-relu.cc",
6596 "test/vbinaryc-microkernel-tester.h",
6597 ] + MICROKERNEL_TEST_HDRS,
6598 deps = MICROKERNEL_TEST_DEPS,
6599)
6600
6601xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006602 name = "f32_velu_test",
6603 srcs = [
6604 "test/f32-velu.cc",
6605 "test/vunary-microkernel-tester.h",
6606 ] + MICROKERNEL_TEST_HDRS,
6607 deps = MICROKERNEL_TEST_DEPS,
6608)
6609
6610xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08006611 name = "f32_vmax_test",
6612 srcs = [
6613 "test/f32-vmax.cc",
6614 "test/vbinary-microkernel-tester.h",
6615 ] + MICROKERNEL_TEST_HDRS,
6616 deps = MICROKERNEL_TEST_DEPS,
6617)
6618
6619xnnpack_unit_test(
6620 name = "f32_vmaxc_test",
6621 srcs = [
6622 "test/f32-vmaxc.cc",
6623 "test/vbinaryc-microkernel-tester.h",
6624 ] + MICROKERNEL_TEST_HDRS,
6625 deps = MICROKERNEL_TEST_DEPS,
6626)
6627
6628xnnpack_unit_test(
6629 name = "f32_vmin_test",
6630 srcs = [
6631 "test/f32-vmin.cc",
6632 "test/vbinary-microkernel-tester.h",
6633 ] + MICROKERNEL_TEST_HDRS,
6634 deps = MICROKERNEL_TEST_DEPS,
6635)
6636
6637xnnpack_unit_test(
6638 name = "f32_vminc_test",
6639 srcs = [
6640 "test/f32-vminc.cc",
6641 "test/vbinaryc-microkernel-tester.h",
6642 ] + MICROKERNEL_TEST_HDRS,
6643 deps = MICROKERNEL_TEST_DEPS,
6644)
6645
6646xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006647 name = "f32_vmul_test",
6648 srcs = [
6649 "test/f32-vmul.cc",
6650 "test/vbinary-microkernel-tester.h",
6651 ] + MICROKERNEL_TEST_HDRS,
6652 deps = MICROKERNEL_TEST_DEPS,
6653)
6654
6655xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006656 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006657 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006658 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006659 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006660 ] + MICROKERNEL_TEST_HDRS,
6661 deps = MICROKERNEL_TEST_DEPS,
6662)
6663
6664xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006665 name = "f32_vmul_relu_test",
6666 srcs = [
6667 "test/f32-vmul-relu.cc",
6668 "test/vbinary-microkernel-tester.h",
6669 ] + MICROKERNEL_TEST_HDRS,
6670 deps = MICROKERNEL_TEST_DEPS,
6671)
6672
6673xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006674 name = "f32_vmulc_test",
6675 srcs = [
6676 "test/f32-vmulc.cc",
6677 "test/vbinaryc-microkernel-tester.h",
6678 ] + MICROKERNEL_TEST_HDRS,
6679 deps = MICROKERNEL_TEST_DEPS,
6680)
6681
6682xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006683 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006684 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006685 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006686 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006687 ] + MICROKERNEL_TEST_HDRS,
6688 deps = MICROKERNEL_TEST_DEPS,
6689)
6690
6691xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006692 name = "f32_vmulc_relu_test",
6693 srcs = [
6694 "test/f32-vmulc-relu.cc",
6695 "test/vbinaryc-microkernel-tester.h",
6696 ] + MICROKERNEL_TEST_HDRS,
6697 deps = MICROKERNEL_TEST_DEPS,
6698)
6699
6700xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006701 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006702 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006703 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006704 "test/vmulcaddc-microkernel-tester.h",
6705 "src/xnnpack/AlignedAllocator.h",
6706 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006707 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006708)
6709
6710xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07006711 name = "f32_vlrelu_test",
6712 srcs = [
6713 "test/f32-vlrelu.cc",
6714 "test/vunary-microkernel-tester.h",
6715 ] + MICROKERNEL_TEST_HDRS,
6716 deps = MICROKERNEL_TEST_DEPS,
6717)
6718
6719xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006720 name = "f32_vneg_test",
6721 srcs = [
6722 "test/f32-vneg.cc",
6723 "test/vunary-microkernel-tester.h",
6724 ] + MICROKERNEL_TEST_HDRS,
6725 deps = MICROKERNEL_TEST_DEPS,
6726)
6727
6728xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006729 name = "f32_vrelu_test",
6730 srcs = [
6731 "test/f32-vrelu.cc",
6732 "test/vunary-microkernel-tester.h",
6733 ] + MICROKERNEL_TEST_HDRS,
6734 deps = MICROKERNEL_TEST_DEPS,
6735)
6736
6737xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07006738 name = "f32_vrndne_test",
6739 srcs = [
6740 "test/f32-vrndne.cc",
6741 "test/vunary-microkernel-tester.h",
6742 ] + MICROKERNEL_TEST_HDRS,
6743 deps = MICROKERNEL_TEST_DEPS,
6744)
6745
6746xnnpack_unit_test(
6747 name = "f32_vrndz_test",
6748 srcs = [
6749 "test/f32-vrndz.cc",
6750 "test/vunary-microkernel-tester.h",
6751 ] + MICROKERNEL_TEST_HDRS,
6752 deps = MICROKERNEL_TEST_DEPS,
6753)
6754
6755xnnpack_unit_test(
6756 name = "f32_vrndu_test",
6757 srcs = [
6758 "test/f32-vrndu.cc",
6759 "test/vunary-microkernel-tester.h",
6760 ] + MICROKERNEL_TEST_HDRS,
6761 deps = MICROKERNEL_TEST_DEPS,
6762)
6763
6764xnnpack_unit_test(
6765 name = "f32_vrndd_test",
6766 srcs = [
6767 "test/f32-vrndd.cc",
6768 "test/vunary-microkernel-tester.h",
6769 ] + MICROKERNEL_TEST_HDRS,
6770 deps = MICROKERNEL_TEST_DEPS,
6771)
6772
6773xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07006774 name = "f32_vscale_test",
6775 srcs = [
6776 "test/f32-vscale.cc",
6777 "test/vscale-microkernel-tester.h",
6778 ] + MICROKERNEL_TEST_HDRS,
6779 deps = MICROKERNEL_TEST_DEPS,
6780)
6781
6782xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006783 name = "f32_vscaleexpminusmax_test",
6784 srcs = [
6785 "test/f32-vscaleexpminusmax.cc",
6786 "test/vscaleexpminusmax-microkernel-tester.h",
6787 ] + MICROKERNEL_TEST_HDRS,
6788 deps = MICROKERNEL_TEST_DEPS,
6789)
6790
6791xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006792 name = "f32_vscaleextexp_test",
6793 srcs = [
6794 "test/f32-vscaleextexp.cc",
6795 "test/vscaleextexp-microkernel-tester.h",
6796 ] + MICROKERNEL_TEST_HDRS,
6797 deps = MICROKERNEL_TEST_DEPS,
6798)
6799
6800xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006801 name = "f32_vsigmoid_test",
6802 srcs = [
6803 "test/f32-vsigmoid.cc",
6804 "test/vunary-microkernel-tester.h",
6805 ] + MICROKERNEL_TEST_HDRS,
6806 deps = MICROKERNEL_TEST_DEPS,
6807)
6808
6809xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006810 name = "f32_vsqr_test",
6811 srcs = [
6812 "test/f32-vsqr.cc",
6813 "test/vunary-microkernel-tester.h",
6814 ] + MICROKERNEL_TEST_HDRS,
6815 deps = MICROKERNEL_TEST_DEPS,
6816)
6817
6818xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07006819 name = "f32_vsqrdiff_test",
6820 srcs = [
6821 "test/f32-vsqrdiff.cc",
6822 "test/vbinary-microkernel-tester.h",
6823 ] + MICROKERNEL_TEST_HDRS,
6824 deps = MICROKERNEL_TEST_DEPS,
6825)
6826
6827xnnpack_unit_test(
6828 name = "f32_vsqrdiffc_test",
6829 srcs = [
6830 "test/f32-vsqrdiffc.cc",
6831 "test/vbinaryc-microkernel-tester.h",
6832 ] + MICROKERNEL_TEST_HDRS,
6833 deps = MICROKERNEL_TEST_DEPS,
6834)
6835
6836xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006837 name = "f32_vsqrt_test",
6838 srcs = [
6839 "test/f32-vsqrt.cc",
6840 "test/vunary-microkernel-tester.h",
6841 ] + MICROKERNEL_TEST_HDRS,
6842 deps = MICROKERNEL_TEST_DEPS,
6843)
6844
6845xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006846 name = "f32_vsub_test",
6847 srcs = [
6848 "test/f32-vsub.cc",
6849 "test/vbinary-microkernel-tester.h",
6850 ] + MICROKERNEL_TEST_HDRS,
6851 deps = MICROKERNEL_TEST_DEPS,
6852)
6853
6854xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006855 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07006856 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006857 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006858 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006859 ] + MICROKERNEL_TEST_HDRS,
6860 deps = MICROKERNEL_TEST_DEPS,
6861)
6862
6863xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006864 name = "f32_vsub_relu_test",
6865 srcs = [
6866 "test/f32-vsub-relu.cc",
6867 "test/vbinary-microkernel-tester.h",
6868 ] + MICROKERNEL_TEST_HDRS,
6869 deps = MICROKERNEL_TEST_DEPS,
6870)
6871
6872xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006873 name = "f32_vsubc_test",
6874 srcs = [
6875 "test/f32-vsubc.cc",
6876 "test/vbinaryc-microkernel-tester.h",
6877 ] + MICROKERNEL_TEST_HDRS,
6878 deps = MICROKERNEL_TEST_DEPS,
6879)
6880
6881xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006882 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006883 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006884 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006885 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006886 ] + MICROKERNEL_TEST_HDRS,
6887 deps = MICROKERNEL_TEST_DEPS,
6888)
6889
6890xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006891 name = "f32_vsubc_relu_test",
6892 srcs = [
6893 "test/f32-vsubc-relu.cc",
6894 "test/vbinaryc-microkernel-tester.h",
6895 ] + MICROKERNEL_TEST_HDRS,
6896 deps = MICROKERNEL_TEST_DEPS,
6897)
6898
6899xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006900 name = "f32_vrsubc_test",
6901 srcs = [
6902 "test/f32-vrsubc.cc",
6903 "test/vbinaryc-microkernel-tester.h",
6904 ] + MICROKERNEL_TEST_HDRS,
6905 deps = MICROKERNEL_TEST_DEPS,
6906)
6907
6908xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006909 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006910 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006911 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006912 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07006913 ] + MICROKERNEL_TEST_HDRS,
6914 deps = MICROKERNEL_TEST_DEPS,
6915)
6916
6917xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006918 name = "f32_vrsubc_relu_test",
6919 srcs = [
6920 "test/f32-vrsubc-relu.cc",
6921 "test/vbinaryc-microkernel-tester.h",
6922 ] + MICROKERNEL_TEST_HDRS,
6923 deps = MICROKERNEL_TEST_DEPS,
6924)
6925
6926xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006927 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07006928 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006929 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07006930 "test/dwconv-microkernel-tester.h",
6931 "src/xnnpack/AlignedAllocator.h",
6932 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6933 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6934)
6935
6936xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07006937 name = "qs8_dwconv_minmax_fp32_test",
6938 srcs = [
6939 "test/qs8-dwconv-minmax-fp32.cc",
6940 "test/dwconv-microkernel-tester.h",
6941 "src/xnnpack/AlignedAllocator.h",
6942 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6943 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6944)
6945
6946xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07006947 name = "qs8_gavgpool_minmax_test",
6948 srcs = [
6949 "test/qs8-gavgpool-minmax.cc",
6950 "test/gavgpool-microkernel-tester.h",
6951 "src/xnnpack/AlignedAllocator.h",
6952 ] + MICROKERNEL_TEST_HDRS,
6953 deps = MICROKERNEL_TEST_DEPS,
6954)
6955
6956xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006957 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07006958 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07006959 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006960 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07006961 "test/gemm-microkernel-tester.h",
6962 "src/xnnpack/AlignedAllocator.h",
6963 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6964 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6965)
6966
6967xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07006968 name = "qs8_gemm_minmax_fp32_test",
6969 timeout = "moderate",
6970 srcs = [
6971 "test/qs8-gemm-minmax-fp32.cc",
6972 "test/gemm-microkernel-tester.h",
6973 "src/xnnpack/AlignedAllocator.h",
6974 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6975 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6976)
6977
6978xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006979 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07006980 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07006981 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006982 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07006983 "test/gemm-microkernel-tester.h",
6984 "src/xnnpack/AlignedAllocator.h",
6985 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6986 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6987)
6988
6989xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07006990 name = "qs8_igemm_minmax_fp32_test",
6991 timeout = "moderate",
6992 srcs = [
6993 "test/qs8-igemm-minmax-fp32.cc",
6994 "test/gemm-microkernel-tester.h",
6995 "src/xnnpack/AlignedAllocator.h",
6996 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6997 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6998)
6999
7000xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007001 name = "qs8_requantization_test",
7002 srcs = [
7003 "src/xnnpack/requantization-stubs.h",
7004 "test/qs8-requantization.cc",
7005 "test/requantization-tester.h",
7006 ] + MICROKERNEL_TEST_HDRS,
7007 deps = MICROKERNEL_TEST_DEPS,
7008)
7009
7010xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007011 name = "qs8_vadd_minmax_test",
7012 srcs = [
7013 "test/qs8-vadd-minmax.cc",
7014 "test/vadd-microkernel-tester.h",
7015 ] + MICROKERNEL_TEST_HDRS,
7016 deps = MICROKERNEL_TEST_DEPS,
7017)
7018
7019xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007020 name = "qs8_vaddc_minmax_test",
7021 srcs = [
7022 "test/qs8-vaddc-minmax.cc",
7023 "test/vaddc-microkernel-tester.h",
7024 ] + MICROKERNEL_TEST_HDRS,
7025 deps = MICROKERNEL_TEST_DEPS,
7026)
7027
7028xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007029 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007030 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007031 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007032 "test/avgpool-microkernel-tester.h",
7033 "src/xnnpack/AlignedAllocator.h",
7034 ] + MICROKERNEL_TEST_HDRS,
7035 deps = MICROKERNEL_TEST_DEPS,
7036)
7037
7038xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007039 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007040 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007041 "test/qu8-dwconv-minmax.cc",
7042 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007043 "src/xnnpack/AlignedAllocator.h",
7044 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007045 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007046)
7047
7048xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007049 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007050 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007051 "test/qu8-igemm-minmax.cc",
7052 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007053 "src/xnnpack/AlignedAllocator.h",
7054 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007055 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007056)
7057
7058xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007059 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007060 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007061 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007062 "test/gavgpool-microkernel-tester.h",
7063 "src/xnnpack/AlignedAllocator.h",
7064 ] + MICROKERNEL_TEST_HDRS,
7065 deps = MICROKERNEL_TEST_DEPS,
7066)
7067
7068xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007069 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007070 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007071 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007072 "test/gemm-microkernel-tester.h",
7073 "src/xnnpack/AlignedAllocator.h",
7074 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007075 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007076)
7077
7078xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007079 name = "qu8_requantization_test",
7080 srcs = [
7081 "src/xnnpack/requantization-stubs.h",
7082 "test/qu8-requantization.cc",
7083 "test/requantization-tester.h",
7084 ] + MICROKERNEL_TEST_HDRS,
7085 deps = MICROKERNEL_TEST_DEPS,
7086)
7087
7088xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007089 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007090 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007091 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007092 "test/vadd-microkernel-tester.h",
7093 ] + MICROKERNEL_TEST_HDRS,
7094 deps = MICROKERNEL_TEST_DEPS,
7095)
7096
7097xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007098 name = "u8_lut32norm_test",
7099 srcs = [
7100 "test/u8-lut32norm.cc",
7101 "test/lut-norm-microkernel-tester.h",
7102 ] + MICROKERNEL_TEST_HDRS,
7103 deps = MICROKERNEL_TEST_DEPS,
7104)
7105
7106xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007107 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007108 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007109 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007110 "test/maxpool-microkernel-tester.h",
7111 ] + MICROKERNEL_TEST_HDRS,
7112 deps = MICROKERNEL_TEST_DEPS,
7113)
7114
7115xnnpack_unit_test(
7116 name = "u8_rmax_test",
7117 srcs = [
7118 "test/u8-rmax.cc",
7119 "test/rmax-microkernel-tester.h",
7120 ] + MICROKERNEL_TEST_HDRS,
7121 deps = MICROKERNEL_TEST_DEPS,
7122)
7123
7124xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007125 name = "u8_vclamp_test",
7126 srcs = [
7127 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007128 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007129 ] + MICROKERNEL_TEST_HDRS,
7130 deps = MICROKERNEL_TEST_DEPS,
7131)
7132
7133xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007134 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007135 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007136 "test/x32-depthtospace2d-chw2hwc.cc",
7137 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007138 ] + MICROKERNEL_TEST_HDRS,
7139 deps = MICROKERNEL_TEST_DEPS,
7140)
7141
7142xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007143 name = "x32_fill_test",
7144 srcs = [
7145 "test/x32-fill.cc",
7146 "test/fill-microkernel-tester.h",
7147 ] + MICROKERNEL_TEST_HDRS,
7148 deps = MICROKERNEL_TEST_DEPS,
7149)
7150
7151xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007152 name = "x32_packx_test",
7153 srcs = [
7154 "test/x32-packx.cc",
7155 "test/pack-microkernel-tester.h",
7156 "src/xnnpack/AlignedAllocator.h",
7157 ] + MICROKERNEL_TEST_HDRS,
7158 deps = MICROKERNEL_TEST_DEPS,
7159)
7160
7161xnnpack_unit_test(
7162 name = "x32_pad_test",
7163 srcs = [
7164 "test/x32-pad.cc",
7165 "test/pad-microkernel-tester.h",
7166 ] + MICROKERNEL_TEST_HDRS,
7167 deps = MICROKERNEL_TEST_DEPS,
7168)
7169
7170xnnpack_unit_test(
7171 name = "x32_unpool_test",
7172 srcs = [
7173 "test/x32-unpool.cc",
7174 "test/unpool-microkernel-tester.h",
7175 ] + MICROKERNEL_TEST_HDRS,
7176 deps = MICROKERNEL_TEST_DEPS,
7177)
7178
7179xnnpack_unit_test(
7180 name = "x32_zip_test",
7181 srcs = [
7182 "test/x32-zip.cc",
7183 "test/zip-microkernel-tester.h",
7184 ] + MICROKERNEL_TEST_HDRS,
7185 deps = MICROKERNEL_TEST_DEPS,
7186)
7187
7188xnnpack_unit_test(
7189 name = "x8_lut_test",
7190 srcs = [
7191 "test/x8-lut.cc",
7192 "test/lut-microkernel-tester.h",
7193 ] + MICROKERNEL_TEST_HDRS,
7194 deps = MICROKERNEL_TEST_DEPS,
7195)
7196
7197xnnpack_unit_test(
7198 name = "x8_zip_test",
7199 srcs = [
7200 "test/x8-zip.cc",
7201 "test/zip-microkernel-tester.h",
7202 ] + MICROKERNEL_TEST_HDRS,
7203 deps = MICROKERNEL_TEST_DEPS,
7204)
7205
Marat Dukhan20c3b922020-03-10 03:45:06 -07007206########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007207
7208xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007209 name = "operator_size_test",
7210 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007211 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007212)
7213
Marat Dukhan20c3b922020-03-10 03:45:06 -07007214xnnpack_binary(
7215 name = "subgraph_size_test",
7216 srcs = ["test/subgraph-size.c"],
7217 deps = [":XNNPACK"],
7218)
7219
7220########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007221
7222xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007223 name = "abs_nc_test",
7224 srcs = [
7225 "test/abs-nc.cc",
7226 "test/abs-operator-tester.h",
7227 ],
7228 deps = OPERATOR_TEST_DEPS,
7229)
7230
7231xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007232 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007233 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007234 srcs = [
7235 "test/add-nd.cc",
7236 "test/binary-elementwise-operator-tester.h",
7237 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007238 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007239)
7240
7241xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007242 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007243 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007244 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007245 "test/argmax-pooling-operator-tester.h",
7246 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007247 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007248)
7249
7250xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007251 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007252 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007253 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007254 "test/average-pooling-operator-tester.h",
7255 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007256 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007257)
7258
7259xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007260 name = "bankers_rounding_nc_test",
7261 srcs = [
7262 "test/bankers-rounding-nc.cc",
7263 "test/bankers-rounding-operator-tester.h",
7264 ],
7265 deps = OPERATOR_TEST_DEPS,
7266)
7267
7268xnnpack_unit_test(
7269 name = "ceiling_nc_test",
7270 srcs = [
7271 "test/ceiling-nc.cc",
7272 "test/ceiling-operator-tester.h",
7273 ],
7274 deps = OPERATOR_TEST_DEPS,
7275)
7276
7277xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007278 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007279 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007280 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007281 "test/channel-shuffle-operator-tester.h",
7282 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007283 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007284)
7285
7286xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007287 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007288 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007289 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007290 "test/clamp-operator-tester.h",
7291 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007292 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007293)
7294
7295xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007296 name = "constant_pad_nd_test",
7297 srcs = [
7298 "test/constant-pad-nd.cc",
7299 "test/constant-pad-operator-tester.h",
7300 ],
7301 deps = OPERATOR_TEST_DEPS,
7302)
7303
7304xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007305 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007306 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007307 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007308 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007309 "test/convolution-operator-tester.h",
7310 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007311 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007312)
7313
7314xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007315 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007316 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007317 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007318 "test/convolution-nchw.cc",
7319 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007320 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007321 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007322)
7323
7324xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007325 name = "copy_nc_test",
7326 srcs = [
7327 "test/copy-nc.cc",
7328 "test/copy-operator-tester.h",
7329 ],
7330 deps = OPERATOR_TEST_DEPS,
7331)
7332
7333xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007334 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007335 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007336 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007337 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007338 "test/deconvolution-operator-tester.h",
7339 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007340 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007341)
7342
7343xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007344 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007345 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007346 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007347 "test/depth-to-space-operator-tester.h",
7348 ] + OPERATOR_TEST_PARAMS_HDRS,
7349 deps = OPERATOR_TEST_DEPS,
7350)
7351
7352xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007353 name = "depth_to_space_nhwc_test",
7354 srcs = [
7355 "test/depth-to-space-nhwc.cc",
7356 "test/depth-to-space-operator-tester.h",
7357 ] + OPERATOR_TEST_PARAMS_HDRS,
7358 deps = OPERATOR_TEST_DEPS,
7359)
7360
7361xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007362 name = "divide_nd_test",
7363 srcs = [
7364 "test/binary-elementwise-operator-tester.h",
7365 "test/divide-nd.cc",
7366 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007367 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007368)
7369
7370xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007371 name = "elu_nc_test",
7372 srcs = [
7373 "test/elu-nc.cc",
7374 "test/elu-operator-tester.h",
7375 ],
7376 deps = OPERATOR_TEST_DEPS,
7377)
7378
7379xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007380 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007381 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007382 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007383 "test/fully-connected-operator-tester.h",
7384 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007385 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007386)
7387
7388xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007389 name = "floor_nc_test",
7390 srcs = [
7391 "test/floor-nc.cc",
7392 "test/floor-operator-tester.h",
7393 ],
7394 deps = OPERATOR_TEST_DEPS,
7395)
7396
7397xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007398 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007399 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007400 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007401 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007402 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007403 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007404)
7405
7406xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007407 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007408 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007409 "test/global-average-pooling-ncw.cc",
7410 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007411 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007412 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007413)
7414
7415xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007416 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007417 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007418 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007419 "test/hardswish-operator-tester.h",
7420 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007421 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007422)
7423
7424xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007425 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007426 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007427 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007428 "test/leaky-relu-operator-tester.h",
7429 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007430 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007431)
7432
7433xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007434 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007435 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007436 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007437 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007438 "test/max-pooling-operator-tester.h",
7439 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007440 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007441)
7442
7443xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007444 name = "maximum_nd_test",
7445 srcs = [
7446 "test/binary-elementwise-operator-tester.h",
7447 "test/maximum-nd.cc",
7448 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007449 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007450)
7451
7452xnnpack_unit_test(
7453 name = "minimum_nd_test",
7454 srcs = [
7455 "test/binary-elementwise-operator-tester.h",
7456 "test/minimum-nd.cc",
7457 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007458 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007459)
7460
7461xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007462 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007463 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007464 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007465 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007466 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007467 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007468)
7469
7470xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007471 name = "negate_nc_test",
7472 srcs = [
7473 "test/negate-nc.cc",
7474 "test/negate-operator-tester.h",
7475 ],
7476 deps = OPERATOR_TEST_DEPS,
7477)
7478
7479xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007480 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007481 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007482 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007483 "test/prelu-operator-tester.h",
7484 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007485 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007486)
7487
7488xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007489 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007490 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007491 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007492 "test/resize-bilinear-operator-tester.h",
7493 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007494 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007495)
7496
7497xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007498 name = "resize_bilinear_nchw_test",
7499 srcs = [
7500 "test/resize-bilinear-nchw.cc",
7501 "test/resize-bilinear-operator-tester.h",
7502 ] + OPERATOR_TEST_PARAMS_HDRS,
7503 deps = OPERATOR_TEST_DEPS,
7504)
7505
7506xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007507 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007508 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007509 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007510 "test/sigmoid-operator-tester.h",
7511 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007512 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007513)
7514
7515xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007516 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007517 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007518 "test/softmax-nc.cc",
7519 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007520 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007521 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007522)
7523
7524xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007525 name = "square_nc_test",
7526 srcs = [
7527 "test/square-nc.cc",
7528 "test/square-operator-tester.h",
7529 ],
7530 deps = OPERATOR_TEST_DEPS,
7531)
7532
7533xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007534 name = "square_root_nc_test",
7535 srcs = [
7536 "test/square-root-nc.cc",
7537 "test/square-root-operator-tester.h",
7538 ],
7539 deps = OPERATOR_TEST_DEPS,
7540)
7541
7542xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007543 name = "squared_difference_nd_test",
7544 srcs = [
7545 "test/binary-elementwise-operator-tester.h",
7546 "test/squared-difference-nd.cc",
7547 ],
7548 deps = OPERATOR_TEST_DEPS,
7549)
7550
7551xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007552 name = "subtract_nd_test",
7553 srcs = [
7554 "test/binary-elementwise-operator-tester.h",
7555 "test/subtract-nd.cc",
7556 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007557 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007558)
7559
7560xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007561 name = "truncation_nc_test",
7562 srcs = [
7563 "test/truncation-nc.cc",
7564 "test/truncation-operator-tester.h",
7565 ],
7566 deps = OPERATOR_TEST_DEPS,
7567)
7568
7569xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007570 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007571 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007572 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007573 "test/unpooling-operator-tester.h",
7574 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007575 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007576)
7577
Chao Mei6ddfc602020-05-13 22:29:36 -07007578############################### Misc unit tests ###############################
7579
7580xnnpack_unit_test(
7581 name = "memory_planner_test",
7582 srcs = [
7583 "test/memory-planner-test.cc",
7584 ],
7585 deps = [
7586 ":XNNPACK",
7587 ":memory_planner",
7588 ],
7589)
7590
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07007591xnnpack_unit_test(
7592 name = "subgraph_nchw_test",
7593 srcs = [
7594 "src/xnnpack/subgraph.h",
7595 "test/subgraph-nchw.cc",
7596 "test/subgraph-tester.h",
7597 ],
7598 deps = [
7599 ":XNNPACK",
7600 ],
7601)
7602
Marat Dukhan08c4a432019-10-03 09:29:21 -07007603############################# Build configurations #############################
7604
Marat Dukhanb8642352019-10-30 15:43:02 -07007605# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07007606config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007607 name = "xnn_enable_assembly_explicit_true",
7608 define_values = {"xnn_enable_assembly": "true"},
7609)
7610
7611# Disables usage of assembly kernels.
7612config_setting(
7613 name = "xnn_enable_assembly_explicit_false",
7614 define_values = {"xnn_enable_assembly": "false"},
7615)
7616
Marat Dukhan9de90e02020-06-18 16:04:12 -07007617# Enables usage of sparse inference.
7618config_setting(
7619 name = "xnn_enable_sparse_explicit_true",
7620 define_values = {"xnn_enable_sparse": "true"},
7621)
7622
7623# Disables usage of sparse inference.
7624config_setting(
7625 name = "xnn_enable_sparse_explicit_false",
7626 define_values = {"xnn_enable_sparse": "false"},
7627)
7628
Marat Dukhan05702cf2020-03-26 15:41:33 -07007629# Disables usage of HMP-aware optimizations.
7630config_setting(
7631 name = "xnn_enable_hmp_explicit_false",
7632 define_values = {"xnn_enable_hmp": "false"},
7633)
7634
Chao Mei6ddfc602020-05-13 22:29:36 -07007635# Enable usage of optimized memory allocation
7636config_setting(
7637 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07007638 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007639)
7640
7641# Disable usage of optimized memory allocation
7642config_setting(
7643 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07007644 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007645)
7646
Marat Dukhanb939cdb2021-03-30 18:51:51 -07007647# Enable QS8 inference in TFLite-specific version
7648config_setting(
7649 name = "xnn_enable_qs8_explicit_true",
7650 define_values = {"xnn_enable_qs8": "true"},
7651)
7652
7653# Disable QS8 inference in TFLite-specific version
7654config_setting(
7655 name = "xnn_enable_qs8_explicit_false",
7656 define_values = {"xnn_enable_qs8": "false"},
7657)
7658
Marat Dukhanb8642352019-10-30 15:43:02 -07007659# Builds with -c dbg
7660config_setting(
7661 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007662 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07007663 "compilation_mode": "dbg",
7664 },
7665)
7666
7667# Builds with -c opt
7668config_setting(
7669 name = "optimized_build",
7670 values = {
7671 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007672 },
7673)
7674
7675config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007676 name = "linux_k8",
7677 values = {"cpu": "k8"},
7678)
7679
7680config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007681 name = "linux_arm",
7682 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07007683)
7684
7685config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07007686 name = "linux_armeabi",
7687 values = {"cpu": "armeabi"},
7688)
7689
7690config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07007691 name = "linux_armhf",
7692 values = {"cpu": "armhf"},
7693)
7694
7695config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07007696 name = "linux_armv7a",
7697 values = {"cpu": "armv7a"},
7698)
7699
7700config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007701 name = "linux_aarch64",
7702 values = {"cpu": "aarch64"},
7703)
7704
7705config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007706 name = "android",
7707 values = {"crosstool_top": "//external:android/crosstool"},
7708)
7709
7710config_setting(
7711 name = "android_armv7",
7712 values = {
7713 "crosstool_top": "//external:android/crosstool",
7714 "cpu": "armeabi-v7a",
7715 },
7716)
7717
7718config_setting(
7719 name = "android_arm64",
7720 values = {
7721 "crosstool_top": "//external:android/crosstool",
7722 "cpu": "arm64-v8a",
7723 },
7724)
7725
7726config_setting(
7727 name = "android_x86",
7728 values = {
7729 "crosstool_top": "//external:android/crosstool",
7730 "cpu": "x86",
7731 },
7732)
7733
7734config_setting(
7735 name = "android_x86_64",
7736 values = {
7737 "crosstool_top": "//external:android/crosstool",
7738 "cpu": "x86_64",
7739 },
7740)
7741
7742config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007743 name = "windows_x86_64",
7744 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007745)
7746
7747config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007748 name = "windows_x86_64_clang",
7749 values = {
7750 "compiler": "clang-cl",
7751 "cpu": "x64_windows",
7752 },
7753)
7754
7755config_setting(
7756 name = "windows_x86_64_mingw",
7757 values = {
7758 "compiler": "mingw-gcc",
7759 "cpu": "x64_windows",
7760 },
7761)
7762
7763config_setting(
7764 name = "windows_x86_64_msys",
7765 values = {
7766 "compiler": "msys-gcc",
7767 "cpu": "x64_windows",
7768 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007769)
7770
7771config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07007772 name = "macos_x86_64",
7773 values = {
7774 "apple_platform_type": "macos",
7775 "cpu": "darwin",
7776 },
7777)
7778
7779config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01007780 name = "macos_arm64",
7781 values = {
7782 "apple_platform_type": "macos",
7783 "cpu": "darwin_arm64",
7784 },
7785)
7786
7787config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007788 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007789 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07007790)
7791
7792config_setting(
7793 name = "emscripten_wasm",
7794 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007795 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007796 "cpu": "wasm",
7797 },
7798)
7799
7800config_setting(
7801 name = "emscripten_wasmsimd",
7802 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007803 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007804 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07007805 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007806 },
7807)
7808
7809config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007810 name = "ios_armv7",
7811 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007812 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007813 "cpu": "ios_armv7",
7814 },
7815)
7816
7817config_setting(
7818 name = "ios_arm64",
7819 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007820 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007821 "cpu": "ios_arm64",
7822 },
7823)
7824
7825config_setting(
7826 name = "ios_arm64e",
7827 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007828 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007829 "cpu": "ios_arm64e",
7830 },
7831)
7832
7833config_setting(
7834 name = "ios_x86",
7835 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007836 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007837 "cpu": "ios_i386",
7838 },
7839)
7840
7841config_setting(
7842 name = "ios_x86_64",
7843 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007844 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007845 "cpu": "ios_x86_64",
7846 },
7847)
7848
7849config_setting(
7850 name = "watchos_armv7k",
7851 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007852 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007853 "cpu": "watchos_armv7k",
7854 },
7855)
7856
7857config_setting(
7858 name = "watchos_arm64_32",
7859 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007860 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007861 "cpu": "watchos_arm64_32",
7862 },
7863)
7864
7865config_setting(
7866 name = "watchos_x86",
7867 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007868 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007869 "cpu": "watchos_i386",
7870 },
7871)
7872
7873config_setting(
7874 name = "watchos_x86_64",
7875 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007876 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007877 "cpu": "watchos_x86_64",
7878 },
7879)
7880
7881config_setting(
7882 name = "tvos_arm64",
7883 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007884 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007885 "cpu": "tvos_arm64",
7886 },
7887)
7888
7889config_setting(
7890 name = "tvos_x86_64",
7891 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007892 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007893 "cpu": "tvos_x86_64",
7894 },
7895)