sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1 | /* -*- mode: C; c-basic-offset: 3; -*- */ |
| 2 | |
| 3 | /*---------------------------------------------------------------*/ |
| 4 | /*--- begin guest_s390_toIR.c ---*/ |
| 5 | /*---------------------------------------------------------------*/ |
| 6 | |
| 7 | /* |
| 8 | This file is part of Valgrind, a dynamic binary instrumentation |
| 9 | framework. |
| 10 | |
| 11 | Copyright IBM Corp. 2010-2011 |
| 12 | |
| 13 | This program is free software; you can redistribute it and/or |
| 14 | modify it under the terms of the GNU General Public License as |
| 15 | published by the Free Software Foundation; either version 2 of the |
| 16 | License, or (at your option) any later version. |
| 17 | |
| 18 | This program is distributed in the hope that it will be useful, but |
| 19 | WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 21 | General Public License for more details. |
| 22 | |
| 23 | You should have received a copy of the GNU General Public License |
| 24 | along with this program; if not, write to the Free Software |
| 25 | Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
| 26 | 02110-1301, USA. |
| 27 | |
| 28 | The GNU General Public License is contained in the file COPYING. |
| 29 | */ |
| 30 | |
| 31 | /* Contributed by Florian Krohm and Christian Borntraeger */ |
| 32 | |
| 33 | /* Translates s390 code to IR. */ |
| 34 | |
| 35 | #include "libvex_basictypes.h" |
| 36 | #include "libvex_ir.h" |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 37 | #include "libvex.h" /* needed for bb_to_IR.h */ |
florian | 933065d | 2011-07-11 01:48:02 +0000 | [diff] [blame] | 38 | #include "libvex_s390x_common.h" |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 39 | #include "main_util.h" /* vassert */ |
| 40 | #include "main_globals.h" /* vex_traceflags */ |
| 41 | #include "guest_generic_bb_to_IR.h" /* DisResult */ |
| 42 | #include "guest_s390_defs.h" /* prototypes for this file's functions */ |
| 43 | #include "host_s390_disasm.h" |
| 44 | #include "host_s390_defs.h" /* S390_ROUND_xyzzy */ |
| 45 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 46 | |
| 47 | /*------------------------------------------------------------*/ |
florian | b4df768 | 2011-07-05 02:09:01 +0000 | [diff] [blame] | 48 | /*--- Forward declarations ---*/ |
| 49 | /*------------------------------------------------------------*/ |
| 50 | static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *); |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 51 | static void s390_irgen_xonc(IROp, IRTemp, IRTemp, IRTemp); |
florian | 79e839e | 2012-05-05 02:20:30 +0000 | [diff] [blame] | 52 | static void s390_irgen_CLC_EX(IRTemp, IRTemp, IRTemp); |
florian | b4df768 | 2011-07-05 02:09:01 +0000 | [diff] [blame] | 53 | |
| 54 | |
| 55 | /*------------------------------------------------------------*/ |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 56 | /*--- Globals ---*/ |
| 57 | /*------------------------------------------------------------*/ |
| 58 | |
| 59 | /* The IRSB* into which we're generating code. */ |
| 60 | static IRSB *irsb; |
| 61 | |
| 62 | /* The guest address for the instruction currently being |
| 63 | translated. */ |
| 64 | static Addr64 guest_IA_curr_instr; |
| 65 | |
| 66 | /* The guest address for the instruction following the current instruction. */ |
| 67 | static Addr64 guest_IA_next_instr; |
| 68 | |
| 69 | /* Result of disassembly step. */ |
| 70 | static DisResult *dis_res; |
| 71 | |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 72 | /* Resteer function and callback data */ |
| 73 | static Bool (*resteer_fn)(void *, Addr64); |
| 74 | static void *resteer_data; |
| 75 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 76 | /* The last seen execute target instruction */ |
| 77 | ULong last_execute_target; |
| 78 | |
| 79 | /* The possible outcomes of a decoding operation */ |
| 80 | typedef enum { |
| 81 | S390_DECODE_OK, |
| 82 | S390_DECODE_UNKNOWN_INSN, |
| 83 | S390_DECODE_UNIMPLEMENTED_INSN, |
| 84 | S390_DECODE_UNKNOWN_SPECIAL_INSN, |
| 85 | S390_DECODE_ERROR |
| 86 | } s390_decode_t; |
| 87 | |
florian | 428dfdd | 2012-03-27 03:09:49 +0000 | [diff] [blame] | 88 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 89 | /*------------------------------------------------------------*/ |
| 90 | /*--- Helpers for constructing IR. ---*/ |
| 91 | /*------------------------------------------------------------*/ |
| 92 | |
| 93 | /* Sign extend a value with the given number of bits. This is a |
| 94 | macro because it allows us to overload the type of the value. |
| 95 | Note that VALUE must have a signed type! */ |
| 96 | #undef sign_extend |
| 97 | #define sign_extend(value,num_bits) \ |
| 98 | (((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \ |
| 99 | (sizeof(__typeof__(value)) * 8 - (num_bits))) |
| 100 | |
| 101 | |
| 102 | /* Add a statement to the current irsb. */ |
| 103 | static __inline__ void |
| 104 | stmt(IRStmt *st) |
| 105 | { |
| 106 | addStmtToIRSB(irsb, st); |
| 107 | } |
| 108 | |
| 109 | /* Allocate a new temporary of the given type. */ |
| 110 | static __inline__ IRTemp |
| 111 | newTemp(IRType type) |
| 112 | { |
| 113 | vassert(isPlausibleIRType(type)); |
| 114 | |
| 115 | return newIRTemp(irsb->tyenv, type); |
| 116 | } |
| 117 | |
| 118 | /* Create an expression node for a temporary */ |
| 119 | static __inline__ IRExpr * |
| 120 | mkexpr(IRTemp tmp) |
| 121 | { |
| 122 | return IRExpr_RdTmp(tmp); |
| 123 | } |
| 124 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 125 | /* Generate an expression node for an address. */ |
| 126 | static __inline__ IRExpr * |
| 127 | mkaddr_expr(Addr64 addr) |
| 128 | { |
| 129 | return IRExpr_Const(IRConst_U64(addr)); |
| 130 | } |
| 131 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 132 | /* Add a statement that assigns to a temporary */ |
| 133 | static __inline__ void |
| 134 | assign(IRTemp dst, IRExpr *expr) |
| 135 | { |
| 136 | stmt(IRStmt_WrTmp(dst, expr)); |
| 137 | } |
| 138 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 139 | /* Write an address into the guest_IA */ |
| 140 | static __inline__ void |
| 141 | put_IA(IRExpr *address) |
| 142 | { |
| 143 | stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IA), address)); |
| 144 | } |
| 145 | |
| 146 | /* Add a dummy put to the guest_IA to satisfy an assert in bb_to_IR |
| 147 | that wants the last statement in an IRSB to be a put to the guest_IA. |
| 148 | Mostly used for insns that use the "counter" pseudo guest reg. */ |
| 149 | static __inline__ void |
| 150 | dummy_put_IA(void) |
| 151 | { |
| 152 | put_IA(IRExpr_Get(S390X_GUEST_OFFSET(guest_IA), Ity_I64)); |
| 153 | } |
| 154 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 155 | /* Create a temporary of the given type and assign the expression to it */ |
| 156 | static __inline__ IRTemp |
| 157 | mktemp(IRType type, IRExpr *expr) |
| 158 | { |
| 159 | IRTemp temp = newTemp(type); |
| 160 | |
| 161 | assign(temp, expr); |
| 162 | |
| 163 | return temp; |
| 164 | } |
| 165 | |
| 166 | /* Create a unary expression */ |
| 167 | static __inline__ IRExpr * |
| 168 | unop(IROp kind, IRExpr *op) |
| 169 | { |
| 170 | return IRExpr_Unop(kind, op); |
| 171 | } |
| 172 | |
| 173 | /* Create a binary expression */ |
| 174 | static __inline__ IRExpr * |
| 175 | binop(IROp kind, IRExpr *op1, IRExpr *op2) |
| 176 | { |
| 177 | return IRExpr_Binop(kind, op1, op2); |
| 178 | } |
| 179 | |
| 180 | /* Create a ternary expression */ |
| 181 | static __inline__ IRExpr * |
| 182 | triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3) |
| 183 | { |
| 184 | return IRExpr_Triop(kind, op1, op2, op3); |
| 185 | } |
| 186 | |
| 187 | /* Create a quaternary expression */ |
| 188 | static __inline__ IRExpr * |
| 189 | qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4) |
| 190 | { |
| 191 | return IRExpr_Qop(kind, op1, op2, op3, op4); |
| 192 | } |
| 193 | |
| 194 | /* Create an expression node for an 8-bit integer constant */ |
| 195 | static __inline__ IRExpr * |
| 196 | mkU8(UInt value) |
| 197 | { |
| 198 | vassert(value < 256); |
| 199 | |
| 200 | return IRExpr_Const(IRConst_U8((UChar)value)); |
| 201 | } |
| 202 | |
| 203 | /* Create an expression node for a 16-bit integer constant */ |
| 204 | static __inline__ IRExpr * |
| 205 | mkU16(UInt value) |
| 206 | { |
| 207 | vassert(value < 65536); |
| 208 | |
| 209 | return IRExpr_Const(IRConst_U16((UShort)value)); |
| 210 | } |
| 211 | |
| 212 | /* Create an expression node for a 32-bit integer constant */ |
| 213 | static __inline__ IRExpr * |
| 214 | mkU32(UInt value) |
| 215 | { |
| 216 | return IRExpr_Const(IRConst_U32(value)); |
| 217 | } |
| 218 | |
| 219 | /* Create an expression node for a 64-bit integer constant */ |
| 220 | static __inline__ IRExpr * |
| 221 | mkU64(ULong value) |
| 222 | { |
| 223 | return IRExpr_Const(IRConst_U64(value)); |
| 224 | } |
| 225 | |
| 226 | /* Create an expression node for a 32-bit floating point constant |
| 227 | whose value is given by a bit pattern. */ |
| 228 | static __inline__ IRExpr * |
| 229 | mkF32i(UInt value) |
| 230 | { |
| 231 | return IRExpr_Const(IRConst_F32i(value)); |
| 232 | } |
| 233 | |
| 234 | /* Create an expression node for a 32-bit floating point constant |
| 235 | whose value is given by a bit pattern. */ |
| 236 | static __inline__ IRExpr * |
| 237 | mkF64i(ULong value) |
| 238 | { |
| 239 | return IRExpr_Const(IRConst_F64i(value)); |
| 240 | } |
| 241 | |
| 242 | /* Little helper function for my sanity. ITE = if-then-else */ |
| 243 | static IRExpr * |
| 244 | mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse) |
| 245 | { |
| 246 | vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1); |
| 247 | |
| 248 | return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue); |
| 249 | } |
| 250 | |
| 251 | /* Add a statement that stores DATA at ADDR. This is a big-endian machine. */ |
| 252 | static void __inline__ |
| 253 | store(IRExpr *addr, IRExpr *data) |
| 254 | { |
| 255 | stmt(IRStmt_Store(Iend_BE, addr, data)); |
| 256 | } |
| 257 | |
| 258 | /* Create an expression that loads a TYPE sized value from ADDR. |
| 259 | This is a big-endian machine. */ |
| 260 | static __inline__ IRExpr * |
| 261 | load(IRType type, IRExpr *addr) |
| 262 | { |
| 263 | return IRExpr_Load(Iend_BE, type, addr); |
| 264 | } |
| 265 | |
| 266 | /* Function call */ |
| 267 | static void |
| 268 | call_function(IRExpr *callee_address) |
| 269 | { |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 270 | put_IA(callee_address); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 271 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 272 | dis_res->whatNext = Dis_StopHere; |
| 273 | dis_res->jk_StopHere = Ijk_Call; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 274 | } |
| 275 | |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 276 | /* Function call with known target. */ |
| 277 | static void |
| 278 | call_function_and_chase(Addr64 callee_address) |
| 279 | { |
| 280 | if (resteer_fn(resteer_data, callee_address)) { |
| 281 | dis_res->whatNext = Dis_ResteerU; |
| 282 | dis_res->continueAt = callee_address; |
| 283 | } else { |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 284 | put_IA(mkaddr_expr(callee_address)); |
| 285 | |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 286 | dis_res->whatNext = Dis_StopHere; |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 287 | dis_res->jk_StopHere = Ijk_Call; |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 288 | } |
| 289 | } |
| 290 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 291 | /* Function return sequence */ |
| 292 | static void |
| 293 | return_from_function(IRExpr *return_address) |
| 294 | { |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 295 | put_IA(return_address); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 296 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 297 | dis_res->whatNext = Dis_StopHere; |
| 298 | dis_res->jk_StopHere = Ijk_Ret; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 299 | } |
| 300 | |
| 301 | /* A conditional branch whose target is not known at instrumentation time. |
| 302 | |
| 303 | if (condition) goto computed_target; |
| 304 | |
| 305 | Needs to be represented as: |
| 306 | |
| 307 | if (! condition) goto next_instruction; |
| 308 | goto computed_target; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 309 | */ |
| 310 | static void |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 311 | if_condition_goto_computed(IRExpr *condition, IRExpr *target) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 312 | { |
| 313 | vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1); |
| 314 | |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 315 | condition = unop(Iop_Not1, condition); |
| 316 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 317 | stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr), |
| 318 | S390X_GUEST_OFFSET(guest_IA))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 319 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 320 | put_IA(target); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 321 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 322 | dis_res->whatNext = Dis_StopHere; |
| 323 | dis_res->jk_StopHere = Ijk_Boring; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 324 | } |
| 325 | |
| 326 | /* A conditional branch whose target is known at instrumentation time. */ |
| 327 | static void |
| 328 | if_condition_goto(IRExpr *condition, Addr64 target) |
| 329 | { |
| 330 | vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1); |
| 331 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 332 | stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target), |
| 333 | S390X_GUEST_OFFSET(guest_IA))); |
| 334 | |
florian | 7346c7a | 2012-04-13 21:14:24 +0000 | [diff] [blame] | 335 | put_IA(mkaddr_expr(guest_IA_next_instr)); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 336 | |
| 337 | dis_res->whatNext = Dis_StopHere; |
| 338 | dis_res->jk_StopHere = Ijk_Boring; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 339 | } |
| 340 | |
| 341 | /* An unconditional branch. Target may or may not be known at instrumentation |
| 342 | time. */ |
| 343 | static void |
| 344 | always_goto(IRExpr *target) |
| 345 | { |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 346 | put_IA(target); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 347 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 348 | dis_res->whatNext = Dis_StopHere; |
| 349 | dis_res->jk_StopHere = Ijk_Boring; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 350 | } |
| 351 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 352 | |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 353 | /* An unconditional branch to a known target. */ |
| 354 | static void |
| 355 | always_goto_and_chase(Addr64 target) |
| 356 | { |
| 357 | if (resteer_fn(resteer_data, target)) { |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 358 | /* Follow into the target */ |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 359 | dis_res->whatNext = Dis_ResteerU; |
| 360 | dis_res->continueAt = target; |
| 361 | } else { |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 362 | put_IA(mkaddr_expr(target)); |
| 363 | |
| 364 | dis_res->whatNext = Dis_StopHere; |
| 365 | dis_res->jk_StopHere = Ijk_Boring; |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 366 | } |
| 367 | } |
| 368 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 369 | /* A system call */ |
| 370 | static void |
| 371 | system_call(IRExpr *sysno) |
| 372 | { |
| 373 | /* Store the system call number in the pseudo register. */ |
florian | 428dfdd | 2012-03-27 03:09:49 +0000 | [diff] [blame] | 374 | stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_SYSNO), sysno)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 375 | |
sewardj | 6900702 | 2011-04-28 20:13:45 +0000 | [diff] [blame] | 376 | /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */ |
florian | 428dfdd | 2012-03-27 03:09:49 +0000 | [diff] [blame] | 377 | stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IP_AT_SYSCALL), |
| 378 | mkU64(guest_IA_curr_instr))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 379 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 380 | put_IA(mkaddr_expr(guest_IA_next_instr)); |
| 381 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 382 | /* It's important that all ArchRegs carry their up-to-date value |
| 383 | at this point. So we declare an end-of-block here, which |
| 384 | forces any TempRegs caching ArchRegs to be flushed. */ |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 385 | dis_res->whatNext = Dis_StopHere; |
| 386 | dis_res->jk_StopHere = Ijk_Sys_syscall; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 387 | } |
| 388 | |
| 389 | /* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain |
| 390 | instructions to VEX's IRRoundingMode. */ |
| 391 | static IRRoundingMode |
| 392 | encode_rounding_mode(UChar mode) |
| 393 | { |
| 394 | switch (mode) { |
| 395 | case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST; |
| 396 | case S390_ROUND_ZERO: return Irrm_ZERO; |
| 397 | case S390_ROUND_POSINF: return Irrm_PosINF; |
| 398 | case S390_ROUND_NEGINF: return Irrm_NegINF; |
| 399 | } |
| 400 | vpanic("encode_rounding_mode"); |
| 401 | } |
| 402 | |
| 403 | static __inline__ IRExpr *get_fpr_dw0(UInt); |
| 404 | static __inline__ void put_fpr_dw0(UInt, IRExpr *); |
| 405 | |
| 406 | /* Read a floating point register pair and combine their contents into a |
| 407 | 128-bit value */ |
| 408 | static IRExpr * |
| 409 | get_fpr_pair(UInt archreg) |
| 410 | { |
| 411 | IRExpr *high = get_fpr_dw0(archreg); |
| 412 | IRExpr *low = get_fpr_dw0(archreg + 2); |
| 413 | |
| 414 | return binop(Iop_F64HLtoF128, high, low); |
| 415 | } |
| 416 | |
| 417 | /* Write a 128-bit floating point value into a register pair. */ |
| 418 | static void |
| 419 | put_fpr_pair(UInt archreg, IRExpr *expr) |
| 420 | { |
| 421 | IRExpr *high = unop(Iop_F128HItoF64, expr); |
| 422 | IRExpr *low = unop(Iop_F128LOtoF64, expr); |
| 423 | |
| 424 | put_fpr_dw0(archreg, high); |
| 425 | put_fpr_dw0(archreg + 2, low); |
| 426 | } |
| 427 | |
| 428 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 429 | /*------------------------------------------------------------*/ |
| 430 | /*--- Build the flags thunk. ---*/ |
| 431 | /*------------------------------------------------------------*/ |
| 432 | |
| 433 | /* Completely fill the flags thunk. We're always filling all fields. |
| 434 | Apparently, that is better for redundant PUT elimination. */ |
| 435 | static void |
| 436 | s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep) |
| 437 | { |
| 438 | UInt op_off, dep1_off, dep2_off, ndep_off; |
| 439 | |
florian | 428dfdd | 2012-03-27 03:09:49 +0000 | [diff] [blame] | 440 | op_off = S390X_GUEST_OFFSET(guest_CC_OP); |
| 441 | dep1_off = S390X_GUEST_OFFSET(guest_CC_DEP1); |
| 442 | dep2_off = S390X_GUEST_OFFSET(guest_CC_DEP2); |
| 443 | ndep_off = S390X_GUEST_OFFSET(guest_CC_NDEP); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 444 | |
| 445 | stmt(IRStmt_Put(op_off, op)); |
| 446 | stmt(IRStmt_Put(dep1_off, dep1)); |
| 447 | stmt(IRStmt_Put(dep2_off, dep2)); |
| 448 | stmt(IRStmt_Put(ndep_off, ndep)); |
| 449 | } |
| 450 | |
| 451 | |
| 452 | /* Create an expression for V and widen the result to 64 bit. */ |
| 453 | static IRExpr * |
| 454 | s390_cc_widen(IRTemp v, Bool sign_extend) |
| 455 | { |
| 456 | IRExpr *expr; |
| 457 | |
| 458 | expr = mkexpr(v); |
| 459 | |
| 460 | switch (typeOfIRTemp(irsb->tyenv, v)) { |
| 461 | case Ity_I64: |
| 462 | break; |
| 463 | case Ity_I32: |
| 464 | expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr); |
| 465 | break; |
| 466 | case Ity_I16: |
| 467 | expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr); |
| 468 | break; |
| 469 | case Ity_I8: |
| 470 | expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr); |
| 471 | break; |
| 472 | default: |
| 473 | vpanic("s390_cc_widen"); |
| 474 | } |
| 475 | |
| 476 | return expr; |
| 477 | } |
| 478 | |
| 479 | static void |
| 480 | s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend) |
| 481 | { |
| 482 | IRExpr *op, *dep1, *dep2, *ndep; |
| 483 | |
| 484 | op = mkU64(opc); |
| 485 | dep1 = s390_cc_widen(d1, sign_extend); |
| 486 | dep2 = mkU64(0); |
| 487 | ndep = mkU64(0); |
| 488 | |
| 489 | s390_cc_thunk_fill(op, dep1, dep2, ndep); |
| 490 | } |
| 491 | |
| 492 | |
| 493 | static void |
| 494 | s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend) |
| 495 | { |
| 496 | IRExpr *op, *dep1, *dep2, *ndep; |
| 497 | |
| 498 | op = mkU64(opc); |
| 499 | dep1 = s390_cc_widen(d1, sign_extend); |
| 500 | dep2 = s390_cc_widen(d2, sign_extend); |
| 501 | ndep = mkU64(0); |
| 502 | |
| 503 | s390_cc_thunk_fill(op, dep1, dep2, ndep); |
| 504 | } |
| 505 | |
| 506 | |
| 507 | /* memcheck believes that the NDEP field in the flags thunk is always |
| 508 | defined. But for some flag computations (e.g. add with carry) that is |
| 509 | just not true. We therefore need to convey to memcheck that the value |
| 510 | of the ndep field does matter and therefore we make the DEP2 field |
| 511 | depend on it: |
| 512 | |
| 513 | DEP2 = original_DEP2 ^ NDEP |
| 514 | |
| 515 | In s390_calculate_cc we exploit that (a^b)^b == a |
| 516 | I.e. we xor the DEP2 value with the NDEP value to recover the |
| 517 | original_DEP2 value. */ |
| 518 | static void |
| 519 | s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend) |
| 520 | { |
| 521 | IRExpr *op, *dep1, *dep2, *ndep, *dep2x; |
| 522 | |
| 523 | op = mkU64(opc); |
| 524 | dep1 = s390_cc_widen(d1, sign_extend); |
| 525 | dep2 = s390_cc_widen(d2, sign_extend); |
| 526 | ndep = s390_cc_widen(nd, sign_extend); |
| 527 | |
| 528 | dep2x = binop(Iop_Xor64, dep2, ndep); |
| 529 | |
| 530 | s390_cc_thunk_fill(op, dep1, dep2x, ndep); |
| 531 | } |
| 532 | |
| 533 | |
| 534 | /* Write one floating point value into the flags thunk */ |
| 535 | static void |
| 536 | s390_cc_thunk_put1f(UInt opc, IRTemp d1) |
| 537 | { |
| 538 | IRExpr *op, *dep1, *dep2, *ndep; |
| 539 | |
| 540 | op = mkU64(opc); |
| 541 | dep1 = mkexpr(d1); |
| 542 | dep2 = mkU64(0); |
| 543 | ndep = mkU64(0); |
| 544 | |
| 545 | s390_cc_thunk_fill(op, dep1, dep2, ndep); |
| 546 | } |
| 547 | |
| 548 | |
| 549 | /* Write a floating point value and an integer into the flags thunk. The |
| 550 | integer value is zero-extended first. */ |
| 551 | static void |
| 552 | s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2) |
| 553 | { |
| 554 | IRExpr *op, *dep1, *dep2, *ndep; |
| 555 | |
| 556 | op = mkU64(opc); |
| 557 | dep1 = mkexpr(d1); |
| 558 | dep2 = s390_cc_widen(d2, False); |
| 559 | ndep = mkU64(0); |
| 560 | |
| 561 | s390_cc_thunk_fill(op, dep1, dep2, ndep); |
| 562 | } |
| 563 | |
| 564 | |
| 565 | /* Write a 128-bit floating point value into the flags thunk. This is |
| 566 | done by splitting the value into two 64-bits values. */ |
| 567 | static void |
| 568 | s390_cc_thunk_put1f128(UInt opc, IRTemp d1) |
| 569 | { |
| 570 | IRExpr *op, *hi, *lo, *ndep; |
| 571 | |
| 572 | op = mkU64(opc); |
| 573 | hi = unop(Iop_F128HItoF64, mkexpr(d1)); |
| 574 | lo = unop(Iop_F128LOtoF64, mkexpr(d1)); |
| 575 | ndep = mkU64(0); |
| 576 | |
| 577 | s390_cc_thunk_fill(op, hi, lo, ndep); |
| 578 | } |
| 579 | |
| 580 | |
| 581 | /* Write a 128-bit floating point value and an integer into the flags thunk. |
| 582 | The integer value is zero-extended first. */ |
| 583 | static void |
| 584 | s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd) |
| 585 | { |
| 586 | IRExpr *op, *hi, *lo, *lox, *ndep; |
| 587 | |
| 588 | op = mkU64(opc); |
| 589 | hi = unop(Iop_F128HItoF64, mkexpr(d1)); |
| 590 | lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1))); |
| 591 | ndep = s390_cc_widen(nd, False); |
| 592 | |
| 593 | lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */ |
| 594 | |
| 595 | s390_cc_thunk_fill(op, hi, lox, ndep); |
| 596 | } |
| 597 | |
| 598 | |
| 599 | static void |
| 600 | s390_cc_set(UInt val) |
| 601 | { |
| 602 | s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), |
| 603 | mkU64(val), mkU64(0), mkU64(0)); |
| 604 | } |
| 605 | |
| 606 | /* Build IR to calculate the condition code from flags thunk. |
| 607 | Returns an expression of type Ity_I32 */ |
| 608 | static IRExpr * |
| 609 | s390_call_calculate_cc(void) |
| 610 | { |
| 611 | IRExpr **args, *call, *op, *dep1, *dep2, *ndep; |
| 612 | |
florian | 428dfdd | 2012-03-27 03:09:49 +0000 | [diff] [blame] | 613 | op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64); |
| 614 | dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64); |
| 615 | dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64); |
| 616 | ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 617 | |
| 618 | args = mkIRExprVec_4(op, dep1, dep2, ndep); |
| 619 | call = mkIRExprCCall(Ity_I32, 0 /*regparm*/, |
| 620 | "s390_calculate_cc", &s390_calculate_cc, args); |
| 621 | |
| 622 | /* Exclude OP and NDEP from definedness checking. We're only |
| 623 | interested in DEP1 and DEP2. */ |
| 624 | call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3); |
| 625 | |
| 626 | return call; |
| 627 | } |
| 628 | |
| 629 | /* Build IR to calculate the internal condition code for a "compare and branch" |
| 630 | insn. Returns an expression of type Ity_I32 */ |
| 631 | static IRExpr * |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 632 | s390_call_calculate_icc(UInt m, UInt opc, IRTemp op1, IRTemp op2) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 633 | { |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 634 | IRExpr **args, *call, *op, *dep1, *dep2, *mask; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 635 | |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 636 | switch (opc) { |
| 637 | case S390_CC_OP_SIGNED_COMPARE: |
| 638 | dep1 = s390_cc_widen(op1, True); |
| 639 | dep2 = s390_cc_widen(op2, True); |
| 640 | break; |
| 641 | |
| 642 | case S390_CC_OP_UNSIGNED_COMPARE: |
| 643 | dep1 = s390_cc_widen(op1, False); |
| 644 | dep2 = s390_cc_widen(op2, False); |
| 645 | break; |
| 646 | |
| 647 | default: |
| 648 | vpanic("s390_call_calculate_icc"); |
| 649 | } |
| 650 | |
| 651 | mask = mkU64(m); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 652 | op = mkU64(opc); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 653 | |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 654 | args = mkIRExprVec_5(mask, op, dep1, dep2, mkU64(0) /* unused */); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 655 | call = mkIRExprCCall(Ity_I32, 0 /*regparm*/, |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 656 | "s390_calculate_cond", &s390_calculate_cond, args); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 657 | |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 658 | /* Exclude the requested condition, OP and NDEP from definedness |
| 659 | checking. We're only interested in DEP1 and DEP2. */ |
| 660 | call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 661 | |
| 662 | return call; |
| 663 | } |
| 664 | |
| 665 | /* Build IR to calculate the condition code from flags thunk. |
| 666 | Returns an expression of type Ity_I32 */ |
| 667 | static IRExpr * |
| 668 | s390_call_calculate_cond(UInt m) |
| 669 | { |
| 670 | IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask; |
| 671 | |
| 672 | mask = mkU64(m); |
florian | 428dfdd | 2012-03-27 03:09:49 +0000 | [diff] [blame] | 673 | op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64); |
| 674 | dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64); |
| 675 | dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64); |
| 676 | ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 677 | |
| 678 | args = mkIRExprVec_5(mask, op, dep1, dep2, ndep); |
| 679 | call = mkIRExprCCall(Ity_I32, 0 /*regparm*/, |
| 680 | "s390_calculate_cond", &s390_calculate_cond, args); |
| 681 | |
| 682 | /* Exclude the requested condition, OP and NDEP from definedness |
| 683 | checking. We're only interested in DEP1 and DEP2. */ |
| 684 | call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4); |
| 685 | |
| 686 | return call; |
| 687 | } |
| 688 | |
| 689 | #define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False) |
| 690 | #define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True) |
| 691 | #define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1) |
| 692 | #define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False) |
| 693 | #define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True) |
| 694 | #define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2) |
| 695 | #define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \ |
| 696 | s390_cc_thunk_put3(op,dep1,dep2,ndep,False) |
| 697 | #define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \ |
| 698 | s390_cc_thunk_put3(op,dep1,dep2,ndep,True) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 699 | |
| 700 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 701 | |
| 702 | |
| 703 | /*------------------------------------------------------------*/ |
| 704 | /*--- Guest register access ---*/ |
| 705 | /*------------------------------------------------------------*/ |
| 706 | |
| 707 | |
| 708 | /*------------------------------------------------------------*/ |
| 709 | /*--- ar registers ---*/ |
| 710 | /*------------------------------------------------------------*/ |
| 711 | |
| 712 | /* Return the guest state offset of a ar register. */ |
| 713 | static UInt |
| 714 | ar_offset(UInt archreg) |
| 715 | { |
| 716 | static const UInt offset[16] = { |
florian | e88b3c9 | 2011-07-05 02:48:39 +0000 | [diff] [blame] | 717 | S390X_GUEST_OFFSET(guest_a0), |
| 718 | S390X_GUEST_OFFSET(guest_a1), |
| 719 | S390X_GUEST_OFFSET(guest_a2), |
| 720 | S390X_GUEST_OFFSET(guest_a3), |
| 721 | S390X_GUEST_OFFSET(guest_a4), |
| 722 | S390X_GUEST_OFFSET(guest_a5), |
| 723 | S390X_GUEST_OFFSET(guest_a6), |
| 724 | S390X_GUEST_OFFSET(guest_a7), |
| 725 | S390X_GUEST_OFFSET(guest_a8), |
| 726 | S390X_GUEST_OFFSET(guest_a9), |
| 727 | S390X_GUEST_OFFSET(guest_a10), |
| 728 | S390X_GUEST_OFFSET(guest_a11), |
| 729 | S390X_GUEST_OFFSET(guest_a12), |
| 730 | S390X_GUEST_OFFSET(guest_a13), |
| 731 | S390X_GUEST_OFFSET(guest_a14), |
| 732 | S390X_GUEST_OFFSET(guest_a15), |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 733 | }; |
| 734 | |
| 735 | vassert(archreg < 16); |
| 736 | |
| 737 | return offset[archreg]; |
| 738 | } |
| 739 | |
| 740 | |
| 741 | /* Return the guest state offset of word #0 of a ar register. */ |
| 742 | static __inline__ UInt |
| 743 | ar_w0_offset(UInt archreg) |
| 744 | { |
| 745 | return ar_offset(archreg) + 0; |
| 746 | } |
| 747 | |
| 748 | /* Write word #0 of a ar to the guest state. */ |
| 749 | static __inline__ void |
| 750 | put_ar_w0(UInt archreg, IRExpr *expr) |
| 751 | { |
| 752 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); |
| 753 | |
| 754 | stmt(IRStmt_Put(ar_w0_offset(archreg), expr)); |
| 755 | } |
| 756 | |
| 757 | /* Read word #0 of a ar register. */ |
| 758 | static __inline__ IRExpr * |
| 759 | get_ar_w0(UInt archreg) |
| 760 | { |
| 761 | return IRExpr_Get(ar_w0_offset(archreg), Ity_I32); |
| 762 | } |
| 763 | |
| 764 | |
| 765 | /*------------------------------------------------------------*/ |
| 766 | /*--- fpr registers ---*/ |
| 767 | /*------------------------------------------------------------*/ |
| 768 | |
| 769 | /* Return the guest state offset of a fpr register. */ |
| 770 | static UInt |
| 771 | fpr_offset(UInt archreg) |
| 772 | { |
| 773 | static const UInt offset[16] = { |
florian | e88b3c9 | 2011-07-05 02:48:39 +0000 | [diff] [blame] | 774 | S390X_GUEST_OFFSET(guest_f0), |
| 775 | S390X_GUEST_OFFSET(guest_f1), |
| 776 | S390X_GUEST_OFFSET(guest_f2), |
| 777 | S390X_GUEST_OFFSET(guest_f3), |
| 778 | S390X_GUEST_OFFSET(guest_f4), |
| 779 | S390X_GUEST_OFFSET(guest_f5), |
| 780 | S390X_GUEST_OFFSET(guest_f6), |
| 781 | S390X_GUEST_OFFSET(guest_f7), |
| 782 | S390X_GUEST_OFFSET(guest_f8), |
| 783 | S390X_GUEST_OFFSET(guest_f9), |
| 784 | S390X_GUEST_OFFSET(guest_f10), |
| 785 | S390X_GUEST_OFFSET(guest_f11), |
| 786 | S390X_GUEST_OFFSET(guest_f12), |
| 787 | S390X_GUEST_OFFSET(guest_f13), |
| 788 | S390X_GUEST_OFFSET(guest_f14), |
| 789 | S390X_GUEST_OFFSET(guest_f15), |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 790 | }; |
| 791 | |
| 792 | vassert(archreg < 16); |
| 793 | |
| 794 | return offset[archreg]; |
| 795 | } |
| 796 | |
| 797 | |
| 798 | /* Return the guest state offset of word #0 of a fpr register. */ |
| 799 | static __inline__ UInt |
| 800 | fpr_w0_offset(UInt archreg) |
| 801 | { |
| 802 | return fpr_offset(archreg) + 0; |
| 803 | } |
| 804 | |
| 805 | /* Write word #0 of a fpr to the guest state. */ |
| 806 | static __inline__ void |
| 807 | put_fpr_w0(UInt archreg, IRExpr *expr) |
| 808 | { |
| 809 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32); |
| 810 | |
| 811 | stmt(IRStmt_Put(fpr_w0_offset(archreg), expr)); |
| 812 | } |
| 813 | |
| 814 | /* Read word #0 of a fpr register. */ |
| 815 | static __inline__ IRExpr * |
| 816 | get_fpr_w0(UInt archreg) |
| 817 | { |
| 818 | return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32); |
| 819 | } |
| 820 | |
| 821 | /* Return the guest state offset of double word #0 of a fpr register. */ |
| 822 | static __inline__ UInt |
| 823 | fpr_dw0_offset(UInt archreg) |
| 824 | { |
| 825 | return fpr_offset(archreg) + 0; |
| 826 | } |
| 827 | |
| 828 | /* Write double word #0 of a fpr to the guest state. */ |
| 829 | static __inline__ void |
| 830 | put_fpr_dw0(UInt archreg, IRExpr *expr) |
| 831 | { |
| 832 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64); |
| 833 | |
| 834 | stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr)); |
| 835 | } |
| 836 | |
| 837 | /* Read double word #0 of a fpr register. */ |
| 838 | static __inline__ IRExpr * |
| 839 | get_fpr_dw0(UInt archreg) |
| 840 | { |
| 841 | return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64); |
| 842 | } |
| 843 | |
| 844 | |
| 845 | /*------------------------------------------------------------*/ |
| 846 | /*--- gpr registers ---*/ |
| 847 | /*------------------------------------------------------------*/ |
| 848 | |
| 849 | /* Return the guest state offset of a gpr register. */ |
| 850 | static UInt |
| 851 | gpr_offset(UInt archreg) |
| 852 | { |
| 853 | static const UInt offset[16] = { |
florian | e88b3c9 | 2011-07-05 02:48:39 +0000 | [diff] [blame] | 854 | S390X_GUEST_OFFSET(guest_r0), |
| 855 | S390X_GUEST_OFFSET(guest_r1), |
| 856 | S390X_GUEST_OFFSET(guest_r2), |
| 857 | S390X_GUEST_OFFSET(guest_r3), |
| 858 | S390X_GUEST_OFFSET(guest_r4), |
| 859 | S390X_GUEST_OFFSET(guest_r5), |
| 860 | S390X_GUEST_OFFSET(guest_r6), |
| 861 | S390X_GUEST_OFFSET(guest_r7), |
| 862 | S390X_GUEST_OFFSET(guest_r8), |
| 863 | S390X_GUEST_OFFSET(guest_r9), |
| 864 | S390X_GUEST_OFFSET(guest_r10), |
| 865 | S390X_GUEST_OFFSET(guest_r11), |
| 866 | S390X_GUEST_OFFSET(guest_r12), |
| 867 | S390X_GUEST_OFFSET(guest_r13), |
| 868 | S390X_GUEST_OFFSET(guest_r14), |
| 869 | S390X_GUEST_OFFSET(guest_r15), |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 870 | }; |
| 871 | |
| 872 | vassert(archreg < 16); |
| 873 | |
| 874 | return offset[archreg]; |
| 875 | } |
| 876 | |
| 877 | |
| 878 | /* Return the guest state offset of word #0 of a gpr register. */ |
| 879 | static __inline__ UInt |
| 880 | gpr_w0_offset(UInt archreg) |
| 881 | { |
| 882 | return gpr_offset(archreg) + 0; |
| 883 | } |
| 884 | |
| 885 | /* Write word #0 of a gpr to the guest state. */ |
| 886 | static __inline__ void |
| 887 | put_gpr_w0(UInt archreg, IRExpr *expr) |
| 888 | { |
| 889 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); |
| 890 | |
| 891 | stmt(IRStmt_Put(gpr_w0_offset(archreg), expr)); |
| 892 | } |
| 893 | |
| 894 | /* Read word #0 of a gpr register. */ |
| 895 | static __inline__ IRExpr * |
| 896 | get_gpr_w0(UInt archreg) |
| 897 | { |
| 898 | return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32); |
| 899 | } |
| 900 | |
| 901 | /* Return the guest state offset of double word #0 of a gpr register. */ |
| 902 | static __inline__ UInt |
| 903 | gpr_dw0_offset(UInt archreg) |
| 904 | { |
| 905 | return gpr_offset(archreg) + 0; |
| 906 | } |
| 907 | |
| 908 | /* Write double word #0 of a gpr to the guest state. */ |
| 909 | static __inline__ void |
| 910 | put_gpr_dw0(UInt archreg, IRExpr *expr) |
| 911 | { |
| 912 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64); |
| 913 | |
| 914 | stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr)); |
| 915 | } |
| 916 | |
| 917 | /* Read double word #0 of a gpr register. */ |
| 918 | static __inline__ IRExpr * |
| 919 | get_gpr_dw0(UInt archreg) |
| 920 | { |
| 921 | return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64); |
| 922 | } |
| 923 | |
| 924 | /* Return the guest state offset of half word #1 of a gpr register. */ |
| 925 | static __inline__ UInt |
| 926 | gpr_hw1_offset(UInt archreg) |
| 927 | { |
| 928 | return gpr_offset(archreg) + 2; |
| 929 | } |
| 930 | |
| 931 | /* Write half word #1 of a gpr to the guest state. */ |
| 932 | static __inline__ void |
| 933 | put_gpr_hw1(UInt archreg, IRExpr *expr) |
| 934 | { |
| 935 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16); |
| 936 | |
| 937 | stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr)); |
| 938 | } |
| 939 | |
| 940 | /* Read half word #1 of a gpr register. */ |
| 941 | static __inline__ IRExpr * |
| 942 | get_gpr_hw1(UInt archreg) |
| 943 | { |
| 944 | return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16); |
| 945 | } |
| 946 | |
| 947 | /* Return the guest state offset of byte #6 of a gpr register. */ |
| 948 | static __inline__ UInt |
| 949 | gpr_b6_offset(UInt archreg) |
| 950 | { |
| 951 | return gpr_offset(archreg) + 6; |
| 952 | } |
| 953 | |
| 954 | /* Write byte #6 of a gpr to the guest state. */ |
| 955 | static __inline__ void |
| 956 | put_gpr_b6(UInt archreg, IRExpr *expr) |
| 957 | { |
| 958 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); |
| 959 | |
| 960 | stmt(IRStmt_Put(gpr_b6_offset(archreg), expr)); |
| 961 | } |
| 962 | |
| 963 | /* Read byte #6 of a gpr register. */ |
| 964 | static __inline__ IRExpr * |
| 965 | get_gpr_b6(UInt archreg) |
| 966 | { |
| 967 | return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8); |
| 968 | } |
| 969 | |
| 970 | /* Return the guest state offset of byte #3 of a gpr register. */ |
| 971 | static __inline__ UInt |
| 972 | gpr_b3_offset(UInt archreg) |
| 973 | { |
| 974 | return gpr_offset(archreg) + 3; |
| 975 | } |
| 976 | |
| 977 | /* Write byte #3 of a gpr to the guest state. */ |
| 978 | static __inline__ void |
| 979 | put_gpr_b3(UInt archreg, IRExpr *expr) |
| 980 | { |
| 981 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); |
| 982 | |
| 983 | stmt(IRStmt_Put(gpr_b3_offset(archreg), expr)); |
| 984 | } |
| 985 | |
| 986 | /* Read byte #3 of a gpr register. */ |
| 987 | static __inline__ IRExpr * |
| 988 | get_gpr_b3(UInt archreg) |
| 989 | { |
| 990 | return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8); |
| 991 | } |
| 992 | |
| 993 | /* Return the guest state offset of byte #0 of a gpr register. */ |
| 994 | static __inline__ UInt |
| 995 | gpr_b0_offset(UInt archreg) |
| 996 | { |
| 997 | return gpr_offset(archreg) + 0; |
| 998 | } |
| 999 | |
| 1000 | /* Write byte #0 of a gpr to the guest state. */ |
| 1001 | static __inline__ void |
| 1002 | put_gpr_b0(UInt archreg, IRExpr *expr) |
| 1003 | { |
| 1004 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); |
| 1005 | |
| 1006 | stmt(IRStmt_Put(gpr_b0_offset(archreg), expr)); |
| 1007 | } |
| 1008 | |
| 1009 | /* Read byte #0 of a gpr register. */ |
| 1010 | static __inline__ IRExpr * |
| 1011 | get_gpr_b0(UInt archreg) |
| 1012 | { |
| 1013 | return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8); |
| 1014 | } |
| 1015 | |
| 1016 | /* Return the guest state offset of word #1 of a gpr register. */ |
| 1017 | static __inline__ UInt |
| 1018 | gpr_w1_offset(UInt archreg) |
| 1019 | { |
| 1020 | return gpr_offset(archreg) + 4; |
| 1021 | } |
| 1022 | |
| 1023 | /* Write word #1 of a gpr to the guest state. */ |
| 1024 | static __inline__ void |
| 1025 | put_gpr_w1(UInt archreg, IRExpr *expr) |
| 1026 | { |
| 1027 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); |
| 1028 | |
| 1029 | stmt(IRStmt_Put(gpr_w1_offset(archreg), expr)); |
| 1030 | } |
| 1031 | |
| 1032 | /* Read word #1 of a gpr register. */ |
| 1033 | static __inline__ IRExpr * |
| 1034 | get_gpr_w1(UInt archreg) |
| 1035 | { |
| 1036 | return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32); |
| 1037 | } |
| 1038 | |
| 1039 | /* Return the guest state offset of half word #3 of a gpr register. */ |
| 1040 | static __inline__ UInt |
| 1041 | gpr_hw3_offset(UInt archreg) |
| 1042 | { |
| 1043 | return gpr_offset(archreg) + 6; |
| 1044 | } |
| 1045 | |
| 1046 | /* Write half word #3 of a gpr to the guest state. */ |
| 1047 | static __inline__ void |
| 1048 | put_gpr_hw3(UInt archreg, IRExpr *expr) |
| 1049 | { |
| 1050 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16); |
| 1051 | |
| 1052 | stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr)); |
| 1053 | } |
| 1054 | |
| 1055 | /* Read half word #3 of a gpr register. */ |
| 1056 | static __inline__ IRExpr * |
| 1057 | get_gpr_hw3(UInt archreg) |
| 1058 | { |
| 1059 | return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16); |
| 1060 | } |
| 1061 | |
| 1062 | /* Return the guest state offset of byte #7 of a gpr register. */ |
| 1063 | static __inline__ UInt |
| 1064 | gpr_b7_offset(UInt archreg) |
| 1065 | { |
| 1066 | return gpr_offset(archreg) + 7; |
| 1067 | } |
| 1068 | |
| 1069 | /* Write byte #7 of a gpr to the guest state. */ |
| 1070 | static __inline__ void |
| 1071 | put_gpr_b7(UInt archreg, IRExpr *expr) |
| 1072 | { |
| 1073 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); |
| 1074 | |
| 1075 | stmt(IRStmt_Put(gpr_b7_offset(archreg), expr)); |
| 1076 | } |
| 1077 | |
| 1078 | /* Read byte #7 of a gpr register. */ |
| 1079 | static __inline__ IRExpr * |
| 1080 | get_gpr_b7(UInt archreg) |
| 1081 | { |
| 1082 | return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8); |
| 1083 | } |
| 1084 | |
| 1085 | /* Return the guest state offset of half word #0 of a gpr register. */ |
| 1086 | static __inline__ UInt |
| 1087 | gpr_hw0_offset(UInt archreg) |
| 1088 | { |
| 1089 | return gpr_offset(archreg) + 0; |
| 1090 | } |
| 1091 | |
| 1092 | /* Write half word #0 of a gpr to the guest state. */ |
| 1093 | static __inline__ void |
| 1094 | put_gpr_hw0(UInt archreg, IRExpr *expr) |
| 1095 | { |
| 1096 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16); |
| 1097 | |
| 1098 | stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr)); |
| 1099 | } |
| 1100 | |
| 1101 | /* Read half word #0 of a gpr register. */ |
| 1102 | static __inline__ IRExpr * |
| 1103 | get_gpr_hw0(UInt archreg) |
| 1104 | { |
| 1105 | return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16); |
| 1106 | } |
| 1107 | |
| 1108 | /* Return the guest state offset of byte #4 of a gpr register. */ |
| 1109 | static __inline__ UInt |
| 1110 | gpr_b4_offset(UInt archreg) |
| 1111 | { |
| 1112 | return gpr_offset(archreg) + 4; |
| 1113 | } |
| 1114 | |
| 1115 | /* Write byte #4 of a gpr to the guest state. */ |
| 1116 | static __inline__ void |
| 1117 | put_gpr_b4(UInt archreg, IRExpr *expr) |
| 1118 | { |
| 1119 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); |
| 1120 | |
| 1121 | stmt(IRStmt_Put(gpr_b4_offset(archreg), expr)); |
| 1122 | } |
| 1123 | |
| 1124 | /* Read byte #4 of a gpr register. */ |
| 1125 | static __inline__ IRExpr * |
| 1126 | get_gpr_b4(UInt archreg) |
| 1127 | { |
| 1128 | return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8); |
| 1129 | } |
| 1130 | |
| 1131 | /* Return the guest state offset of byte #1 of a gpr register. */ |
| 1132 | static __inline__ UInt |
| 1133 | gpr_b1_offset(UInt archreg) |
| 1134 | { |
| 1135 | return gpr_offset(archreg) + 1; |
| 1136 | } |
| 1137 | |
| 1138 | /* Write byte #1 of a gpr to the guest state. */ |
| 1139 | static __inline__ void |
| 1140 | put_gpr_b1(UInt archreg, IRExpr *expr) |
| 1141 | { |
| 1142 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); |
| 1143 | |
| 1144 | stmt(IRStmt_Put(gpr_b1_offset(archreg), expr)); |
| 1145 | } |
| 1146 | |
| 1147 | /* Read byte #1 of a gpr register. */ |
| 1148 | static __inline__ IRExpr * |
| 1149 | get_gpr_b1(UInt archreg) |
| 1150 | { |
| 1151 | return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8); |
| 1152 | } |
| 1153 | |
| 1154 | /* Return the guest state offset of half word #2 of a gpr register. */ |
| 1155 | static __inline__ UInt |
| 1156 | gpr_hw2_offset(UInt archreg) |
| 1157 | { |
| 1158 | return gpr_offset(archreg) + 4; |
| 1159 | } |
| 1160 | |
| 1161 | /* Write half word #2 of a gpr to the guest state. */ |
| 1162 | static __inline__ void |
| 1163 | put_gpr_hw2(UInt archreg, IRExpr *expr) |
| 1164 | { |
| 1165 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16); |
| 1166 | |
| 1167 | stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr)); |
| 1168 | } |
| 1169 | |
| 1170 | /* Read half word #2 of a gpr register. */ |
| 1171 | static __inline__ IRExpr * |
| 1172 | get_gpr_hw2(UInt archreg) |
| 1173 | { |
| 1174 | return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16); |
| 1175 | } |
| 1176 | |
| 1177 | /* Return the guest state offset of byte #5 of a gpr register. */ |
| 1178 | static __inline__ UInt |
| 1179 | gpr_b5_offset(UInt archreg) |
| 1180 | { |
| 1181 | return gpr_offset(archreg) + 5; |
| 1182 | } |
| 1183 | |
| 1184 | /* Write byte #5 of a gpr to the guest state. */ |
| 1185 | static __inline__ void |
| 1186 | put_gpr_b5(UInt archreg, IRExpr *expr) |
| 1187 | { |
| 1188 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); |
| 1189 | |
| 1190 | stmt(IRStmt_Put(gpr_b5_offset(archreg), expr)); |
| 1191 | } |
| 1192 | |
| 1193 | /* Read byte #5 of a gpr register. */ |
| 1194 | static __inline__ IRExpr * |
| 1195 | get_gpr_b5(UInt archreg) |
| 1196 | { |
| 1197 | return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8); |
| 1198 | } |
| 1199 | |
| 1200 | /* Return the guest state offset of byte #2 of a gpr register. */ |
| 1201 | static __inline__ UInt |
| 1202 | gpr_b2_offset(UInt archreg) |
| 1203 | { |
| 1204 | return gpr_offset(archreg) + 2; |
| 1205 | } |
| 1206 | |
| 1207 | /* Write byte #2 of a gpr to the guest state. */ |
| 1208 | static __inline__ void |
| 1209 | put_gpr_b2(UInt archreg, IRExpr *expr) |
| 1210 | { |
| 1211 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); |
| 1212 | |
| 1213 | stmt(IRStmt_Put(gpr_b2_offset(archreg), expr)); |
| 1214 | } |
| 1215 | |
| 1216 | /* Read byte #2 of a gpr register. */ |
| 1217 | static __inline__ IRExpr * |
| 1218 | get_gpr_b2(UInt archreg) |
| 1219 | { |
| 1220 | return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8); |
| 1221 | } |
| 1222 | |
| 1223 | /* Return the guest state offset of the counter register. */ |
| 1224 | static UInt |
| 1225 | counter_offset(void) |
| 1226 | { |
florian | e88b3c9 | 2011-07-05 02:48:39 +0000 | [diff] [blame] | 1227 | return S390X_GUEST_OFFSET(guest_counter); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1228 | } |
| 1229 | |
| 1230 | /* Return the guest state offset of double word #0 of the counter register. */ |
| 1231 | static __inline__ UInt |
| 1232 | counter_dw0_offset(void) |
| 1233 | { |
| 1234 | return counter_offset() + 0; |
| 1235 | } |
| 1236 | |
| 1237 | /* Write double word #0 of the counter to the guest state. */ |
| 1238 | static __inline__ void |
| 1239 | put_counter_dw0(IRExpr *expr) |
| 1240 | { |
| 1241 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64); |
| 1242 | |
| 1243 | stmt(IRStmt_Put(counter_dw0_offset(), expr)); |
| 1244 | } |
| 1245 | |
| 1246 | /* Read double word #0 of the counter register. */ |
| 1247 | static __inline__ IRExpr * |
| 1248 | get_counter_dw0(void) |
| 1249 | { |
| 1250 | return IRExpr_Get(counter_dw0_offset(), Ity_I64); |
| 1251 | } |
| 1252 | |
| 1253 | /* Return the guest state offset of word #0 of the counter register. */ |
| 1254 | static __inline__ UInt |
| 1255 | counter_w0_offset(void) |
| 1256 | { |
| 1257 | return counter_offset() + 0; |
| 1258 | } |
| 1259 | |
| 1260 | /* Return the guest state offset of word #1 of the counter register. */ |
| 1261 | static __inline__ UInt |
| 1262 | counter_w1_offset(void) |
| 1263 | { |
| 1264 | return counter_offset() + 4; |
| 1265 | } |
| 1266 | |
| 1267 | /* Write word #0 of the counter to the guest state. */ |
| 1268 | static __inline__ void |
| 1269 | put_counter_w0(IRExpr *expr) |
| 1270 | { |
| 1271 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); |
| 1272 | |
| 1273 | stmt(IRStmt_Put(counter_w0_offset(), expr)); |
| 1274 | } |
| 1275 | |
| 1276 | /* Read word #0 of the counter register. */ |
| 1277 | static __inline__ IRExpr * |
| 1278 | get_counter_w0(void) |
| 1279 | { |
| 1280 | return IRExpr_Get(counter_w0_offset(), Ity_I32); |
| 1281 | } |
| 1282 | |
| 1283 | /* Write word #1 of the counter to the guest state. */ |
| 1284 | static __inline__ void |
| 1285 | put_counter_w1(IRExpr *expr) |
| 1286 | { |
| 1287 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); |
| 1288 | |
| 1289 | stmt(IRStmt_Put(counter_w1_offset(), expr)); |
| 1290 | } |
| 1291 | |
| 1292 | /* Read word #1 of the counter register. */ |
| 1293 | static __inline__ IRExpr * |
| 1294 | get_counter_w1(void) |
| 1295 | { |
| 1296 | return IRExpr_Get(counter_w1_offset(), Ity_I32); |
| 1297 | } |
| 1298 | |
| 1299 | /* Return the guest state offset of the fpc register. */ |
| 1300 | static UInt |
| 1301 | fpc_offset(void) |
| 1302 | { |
florian | e88b3c9 | 2011-07-05 02:48:39 +0000 | [diff] [blame] | 1303 | return S390X_GUEST_OFFSET(guest_fpc); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1304 | } |
| 1305 | |
| 1306 | /* Return the guest state offset of word #0 of the fpc register. */ |
| 1307 | static __inline__ UInt |
| 1308 | fpc_w0_offset(void) |
| 1309 | { |
| 1310 | return fpc_offset() + 0; |
| 1311 | } |
| 1312 | |
| 1313 | /* Write word #0 of the fpc to the guest state. */ |
| 1314 | static __inline__ void |
| 1315 | put_fpc_w0(IRExpr *expr) |
| 1316 | { |
| 1317 | vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); |
| 1318 | |
| 1319 | stmt(IRStmt_Put(fpc_w0_offset(), expr)); |
| 1320 | } |
| 1321 | |
| 1322 | /* Read word #0 of the fpc register. */ |
| 1323 | static __inline__ IRExpr * |
| 1324 | get_fpc_w0(void) |
| 1325 | { |
| 1326 | return IRExpr_Get(fpc_w0_offset(), Ity_I32); |
| 1327 | } |
| 1328 | |
| 1329 | |
| 1330 | /*------------------------------------------------------------*/ |
| 1331 | /*--- Build IR for formats ---*/ |
| 1332 | /*------------------------------------------------------------*/ |
| 1333 | static void |
| 1334 | s390_format_I(HChar *(*irgen)(UChar i), |
| 1335 | UChar i) |
| 1336 | { |
| 1337 | HChar *mnm = irgen(i); |
| 1338 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1339 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1340 | s390_disasm(ENC2(MNM, UINT), mnm, i); |
| 1341 | } |
| 1342 | |
| 1343 | static void |
| 1344 | s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2), |
| 1345 | UChar r1, UShort i2) |
| 1346 | { |
| 1347 | irgen(r1, i2); |
| 1348 | } |
| 1349 | |
| 1350 | static void |
| 1351 | s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2), |
| 1352 | UChar r1, UShort i2) |
| 1353 | { |
| 1354 | HChar *mnm = irgen(r1, i2); |
| 1355 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1356 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1357 | s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2); |
| 1358 | } |
| 1359 | |
| 1360 | static void |
| 1361 | s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2), |
| 1362 | UChar r1, UShort i2) |
| 1363 | { |
| 1364 | HChar *mnm = irgen(r1, i2); |
| 1365 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1366 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1367 | s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2); |
| 1368 | } |
| 1369 | |
| 1370 | static void |
| 1371 | s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2), |
| 1372 | UChar r1, UShort i2) |
| 1373 | { |
| 1374 | HChar *mnm = irgen(r1, i2); |
| 1375 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1376 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1377 | s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2); |
| 1378 | } |
| 1379 | |
| 1380 | static void |
| 1381 | s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2), |
| 1382 | UChar r1, UChar r3, UShort i2) |
| 1383 | { |
| 1384 | HChar *mnm = irgen(r1, r3, i2); |
| 1385 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1386 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1387 | s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2); |
| 1388 | } |
| 1389 | |
| 1390 | static void |
| 1391 | s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2), |
| 1392 | UChar r1, UChar r3, UShort i2) |
| 1393 | { |
| 1394 | HChar *mnm = irgen(r1, r3, i2); |
| 1395 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1396 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1397 | s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2); |
| 1398 | } |
| 1399 | |
| 1400 | static void |
| 1401 | s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4, |
| 1402 | UChar i5), |
| 1403 | UChar r1, UChar r2, UChar i3, UChar i4, UChar i5) |
| 1404 | { |
| 1405 | HChar *mnm = irgen(r1, r2, i3, i4, i5); |
| 1406 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1407 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1408 | s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4, |
| 1409 | i5); |
| 1410 | } |
| 1411 | |
| 1412 | static void |
| 1413 | s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3), |
| 1414 | UChar r1, UChar r2, UShort i4, UChar m3) |
| 1415 | { |
| 1416 | HChar *mnm = irgen(r1, r2, i4, m3); |
| 1417 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1418 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1419 | s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1, |
| 1420 | r2, m3, (Int)(Short)i4); |
| 1421 | } |
| 1422 | |
| 1423 | static void |
| 1424 | s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2), |
| 1425 | UChar r1, UChar m3, UShort i4, UChar i2) |
| 1426 | { |
| 1427 | HChar *mnm = irgen(r1, m3, i4, i2); |
| 1428 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1429 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1430 | s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, |
| 1431 | r1, i2, m3, (Int)(Short)i4); |
| 1432 | } |
| 1433 | |
| 1434 | static void |
| 1435 | s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2), |
| 1436 | UChar r1, UChar m3, UShort i4, UChar i2) |
| 1437 | { |
| 1438 | HChar *mnm = irgen(r1, m3, i4, i2); |
| 1439 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1440 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1441 | s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1, |
| 1442 | (Int)(Char)i2, m3, (Int)(Short)i4); |
| 1443 | } |
| 1444 | |
| 1445 | static void |
| 1446 | s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2), |
| 1447 | UChar r1, UInt i2) |
| 1448 | { |
| 1449 | irgen(r1, i2); |
| 1450 | } |
| 1451 | |
| 1452 | static void |
| 1453 | s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2), |
| 1454 | UChar r1, UInt i2) |
| 1455 | { |
| 1456 | HChar *mnm = irgen(r1, i2); |
| 1457 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1458 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1459 | s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2); |
| 1460 | } |
| 1461 | |
| 1462 | static void |
| 1463 | s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2), |
| 1464 | UChar r1, UInt i2) |
| 1465 | { |
| 1466 | HChar *mnm = irgen(r1, i2); |
| 1467 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1468 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1469 | s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2); |
| 1470 | } |
| 1471 | |
| 1472 | static void |
| 1473 | s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2), |
| 1474 | UChar r1, UInt i2) |
| 1475 | { |
| 1476 | HChar *mnm = irgen(r1, i2); |
| 1477 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1478 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1479 | s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2); |
| 1480 | } |
| 1481 | |
| 1482 | static void |
| 1483 | s390_format_RIL_UP(HChar *(*irgen)(void), |
| 1484 | UChar r1, UInt i2) |
| 1485 | { |
| 1486 | HChar *mnm = irgen(); |
| 1487 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1488 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1489 | s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2); |
| 1490 | } |
| 1491 | |
| 1492 | static void |
| 1493 | s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2, |
| 1494 | IRTemp op4addr), |
| 1495 | UChar r1, UChar m3, UChar b4, UShort d4, UChar i2) |
| 1496 | { |
| 1497 | HChar *mnm; |
| 1498 | IRTemp op4addr = newTemp(Ity_I64); |
| 1499 | |
| 1500 | assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) : |
| 1501 | mkU64(0))); |
| 1502 | |
| 1503 | mnm = irgen(r1, m3, i2, op4addr); |
| 1504 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1505 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1506 | s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1, |
| 1507 | (Int)(Char)i2, m3, d4, 0, b4); |
| 1508 | } |
| 1509 | |
| 1510 | static void |
| 1511 | s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2, |
| 1512 | IRTemp op4addr), |
| 1513 | UChar r1, UChar m3, UChar b4, UShort d4, UChar i2) |
| 1514 | { |
| 1515 | HChar *mnm; |
| 1516 | IRTemp op4addr = newTemp(Ity_I64); |
| 1517 | |
| 1518 | assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) : |
| 1519 | mkU64(0))); |
| 1520 | |
| 1521 | mnm = irgen(r1, m3, i2, op4addr); |
| 1522 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1523 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1524 | s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1, |
| 1525 | i2, m3, d4, 0, b4); |
| 1526 | } |
| 1527 | |
| 1528 | static void |
| 1529 | s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2), |
| 1530 | UChar r1, UChar r2) |
| 1531 | { |
| 1532 | irgen(r1, r2); |
| 1533 | } |
| 1534 | |
| 1535 | static void |
| 1536 | s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2), |
| 1537 | UChar r1, UChar r2) |
| 1538 | { |
| 1539 | HChar *mnm = irgen(r1, r2); |
| 1540 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1541 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1542 | s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2); |
| 1543 | } |
| 1544 | |
| 1545 | static void |
| 1546 | s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2), |
| 1547 | UChar r1, UChar r2) |
| 1548 | { |
| 1549 | HChar *mnm = irgen(r1, r2); |
| 1550 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1551 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1552 | s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2); |
| 1553 | } |
| 1554 | |
| 1555 | static void |
| 1556 | s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2), |
| 1557 | UChar r1, UChar r2) |
| 1558 | { |
| 1559 | irgen(r1, r2); |
| 1560 | } |
| 1561 | |
| 1562 | static void |
| 1563 | s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2), |
| 1564 | UChar r1, UChar r2) |
| 1565 | { |
| 1566 | HChar *mnm = irgen(r1, r2); |
| 1567 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1568 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1569 | s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2); |
| 1570 | } |
| 1571 | |
| 1572 | static void |
| 1573 | s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2), |
| 1574 | UChar r1, UChar r2) |
| 1575 | { |
| 1576 | HChar *mnm = irgen(r1, r2); |
| 1577 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1578 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1579 | s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2); |
| 1580 | } |
| 1581 | |
| 1582 | static void |
| 1583 | s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar), |
| 1584 | UChar r1, UChar r2) |
| 1585 | { |
| 1586 | HChar *mnm = irgen(r1, r2); |
| 1587 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1588 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1589 | s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2); |
| 1590 | } |
| 1591 | |
| 1592 | static void |
| 1593 | s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2), |
| 1594 | UChar r1, UChar r2) |
| 1595 | { |
| 1596 | HChar *mnm = irgen(r1, r2); |
| 1597 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1598 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1599 | s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2); |
| 1600 | } |
| 1601 | |
| 1602 | static void |
| 1603 | s390_format_RRE_R0(HChar *(*irgen)(UChar r1), |
| 1604 | UChar r1) |
| 1605 | { |
| 1606 | HChar *mnm = irgen(r1); |
| 1607 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1608 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1609 | s390_disasm(ENC2(MNM, GPR), mnm, r1); |
| 1610 | } |
| 1611 | |
| 1612 | static void |
| 1613 | s390_format_RRE_F0(HChar *(*irgen)(UChar r1), |
| 1614 | UChar r1) |
| 1615 | { |
| 1616 | HChar *mnm = irgen(r1); |
| 1617 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1618 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1619 | s390_disasm(ENC2(MNM, FPR), mnm, r1); |
| 1620 | } |
| 1621 | |
| 1622 | static void |
florian | 9af3769 | 2012-01-15 21:01:16 +0000 | [diff] [blame] | 1623 | s390_format_RRF_M0RERE(HChar *(*irgen)(UChar m3, UChar r1, UChar r2), |
| 1624 | UChar m3, UChar r1, UChar r2) |
| 1625 | { |
florian | fed3ea3 | 2012-07-19 14:54:03 +0000 | [diff] [blame] | 1626 | HChar *mnm = irgen(m3, r1, r2); |
florian | 9af3769 | 2012-01-15 21:01:16 +0000 | [diff] [blame] | 1627 | |
| 1628 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
florian | fed3ea3 | 2012-07-19 14:54:03 +0000 | [diff] [blame] | 1629 | s390_disasm(ENC4(MNM, GPR, GPR, UINT), mnm, r1, r2, m3); |
florian | 9af3769 | 2012-01-15 21:01:16 +0000 | [diff] [blame] | 1630 | } |
| 1631 | |
| 1632 | static void |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1633 | s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar), |
| 1634 | UChar r1, UChar r3, UChar r2) |
| 1635 | { |
| 1636 | HChar *mnm = irgen(r1, r3, r2); |
| 1637 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1638 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1639 | s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2); |
| 1640 | } |
| 1641 | |
| 1642 | static void |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 1643 | s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2), |
| 1644 | UChar m3, UChar r1, UChar r2, Int xmnm_kind) |
| 1645 | { |
| 1646 | irgen(m3, r1, r2); |
| 1647 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1648 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 1649 | s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2); |
| 1650 | } |
| 1651 | |
| 1652 | static void |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1653 | s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2), |
| 1654 | UChar r3, UChar r1, UChar r2) |
| 1655 | { |
| 1656 | HChar *mnm = irgen(r3, r1, r2); |
| 1657 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1658 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1659 | s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2); |
| 1660 | } |
| 1661 | |
| 1662 | static void |
| 1663 | s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar), |
| 1664 | UChar r3, UChar r1, UChar r2) |
| 1665 | { |
| 1666 | HChar *mnm = irgen(r3, r1, r2); |
| 1667 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1668 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1669 | s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2); |
| 1670 | } |
| 1671 | |
| 1672 | static void |
| 1673 | s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2), |
| 1674 | UChar r3, UChar r1, UChar r2) |
| 1675 | { |
| 1676 | HChar *mnm = irgen(r3, r1, r2); |
| 1677 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1678 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1679 | s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3); |
| 1680 | } |
| 1681 | |
| 1682 | static void |
| 1683 | s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr), |
| 1684 | UChar r1, UChar r2, UChar b4, UShort d4, UChar m3) |
| 1685 | { |
| 1686 | HChar *mnm; |
| 1687 | IRTemp op4addr = newTemp(Ity_I64); |
| 1688 | |
| 1689 | assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) : |
| 1690 | mkU64(0))); |
| 1691 | |
| 1692 | mnm = irgen(r1, r2, m3, op4addr); |
| 1693 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1694 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1695 | s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1, |
| 1696 | r2, m3, d4, 0, b4); |
| 1697 | } |
| 1698 | |
| 1699 | static void |
| 1700 | s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr), |
| 1701 | UChar r1, UChar b2, UShort d2) |
| 1702 | { |
| 1703 | HChar *mnm; |
| 1704 | IRTemp op2addr = newTemp(Ity_I64); |
| 1705 | |
| 1706 | assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : |
| 1707 | mkU64(0))); |
| 1708 | |
| 1709 | mnm = irgen(r1, op2addr); |
| 1710 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1711 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1712 | s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2); |
| 1713 | } |
| 1714 | |
| 1715 | static void |
| 1716 | s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr), |
| 1717 | UChar r1, UChar r3, UChar b2, UShort d2) |
| 1718 | { |
| 1719 | HChar *mnm; |
| 1720 | IRTemp op2addr = newTemp(Ity_I64); |
| 1721 | |
| 1722 | assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : |
| 1723 | mkU64(0))); |
| 1724 | |
| 1725 | mnm = irgen(r1, r3, op2addr); |
| 1726 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1727 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1728 | s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2); |
| 1729 | } |
| 1730 | |
| 1731 | static void |
| 1732 | s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr), |
| 1733 | UChar r1, UChar r3, UChar b2, UShort d2) |
| 1734 | { |
| 1735 | HChar *mnm; |
| 1736 | IRTemp op2addr = newTemp(Ity_I64); |
| 1737 | |
| 1738 | assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : |
| 1739 | mkU64(0))); |
| 1740 | |
| 1741 | mnm = irgen(r1, r3, op2addr); |
| 1742 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1743 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1744 | s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2); |
| 1745 | } |
| 1746 | |
| 1747 | static void |
| 1748 | s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp), |
| 1749 | UChar r1, UChar r3, UChar b2, UShort d2) |
| 1750 | { |
| 1751 | HChar *mnm; |
| 1752 | IRTemp op2addr = newTemp(Ity_I64); |
| 1753 | |
| 1754 | assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : |
| 1755 | mkU64(0))); |
| 1756 | |
| 1757 | mnm = irgen(r1, r3, op2addr); |
| 1758 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1759 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1760 | s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2); |
| 1761 | } |
| 1762 | |
| 1763 | static void |
| 1764 | s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2), |
| 1765 | UChar r1, UChar r3, UShort i2) |
| 1766 | { |
| 1767 | HChar *mnm = irgen(r1, r3, i2); |
| 1768 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1769 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1770 | s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2); |
| 1771 | } |
| 1772 | |
| 1773 | static void |
| 1774 | s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr), |
| 1775 | UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) |
| 1776 | { |
| 1777 | HChar *mnm; |
| 1778 | IRTemp op2addr = newTemp(Ity_I64); |
| 1779 | IRTemp d2 = newTemp(Ity_I64); |
| 1780 | |
| 1781 | assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); |
| 1782 | assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) : |
| 1783 | mkU64(0))); |
| 1784 | |
| 1785 | mnm = irgen(r1, r3, op2addr); |
| 1786 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1787 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1788 | s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2); |
| 1789 | } |
| 1790 | |
| 1791 | static void |
| 1792 | s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp), |
| 1793 | UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) |
| 1794 | { |
| 1795 | HChar *mnm; |
| 1796 | IRTemp op2addr = newTemp(Ity_I64); |
| 1797 | IRTemp d2 = newTemp(Ity_I64); |
| 1798 | |
| 1799 | assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); |
| 1800 | assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) : |
| 1801 | mkU64(0))); |
| 1802 | |
| 1803 | mnm = irgen(r1, r3, op2addr); |
| 1804 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1805 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1806 | s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2); |
| 1807 | } |
| 1808 | |
| 1809 | static void |
| 1810 | s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr), |
| 1811 | UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) |
| 1812 | { |
| 1813 | HChar *mnm; |
| 1814 | IRTemp op2addr = newTemp(Ity_I64); |
| 1815 | IRTemp d2 = newTemp(Ity_I64); |
| 1816 | |
| 1817 | assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); |
| 1818 | assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) : |
| 1819 | mkU64(0))); |
| 1820 | |
| 1821 | mnm = irgen(r1, r3, op2addr); |
| 1822 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1823 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1824 | s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2); |
| 1825 | } |
| 1826 | |
| 1827 | static void |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 1828 | s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr), |
| 1829 | UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2, |
| 1830 | Int xmnm_kind) |
| 1831 | { |
| 1832 | IRTemp op2addr = newTemp(Ity_I64); |
| 1833 | IRTemp d2 = newTemp(Ity_I64); |
| 1834 | |
| 1835 | if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)), |
| 1836 | guest_IA_next_instr); |
| 1837 | assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); |
| 1838 | assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) : |
| 1839 | mkU64(0))); |
| 1840 | |
| 1841 | irgen(r1, op2addr); |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 1842 | dummy_put_IA(); |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 1843 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1844 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 1845 | s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2); |
| 1846 | } |
| 1847 | |
| 1848 | static void |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1849 | s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2, |
| 1850 | IRTemp op2addr), |
| 1851 | UChar r1, UChar x2, UChar b2, UShort d2) |
| 1852 | { |
| 1853 | IRTemp op2addr = newTemp(Ity_I64); |
| 1854 | |
| 1855 | assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2), |
| 1856 | b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : |
| 1857 | mkU64(0))); |
| 1858 | |
| 1859 | irgen(r1, x2, b2, d2, op2addr); |
| 1860 | } |
| 1861 | |
| 1862 | static void |
| 1863 | s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr), |
| 1864 | UChar r1, UChar x2, UChar b2, UShort d2) |
| 1865 | { |
| 1866 | HChar *mnm; |
| 1867 | IRTemp op2addr = newTemp(Ity_I64); |
| 1868 | |
| 1869 | assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2), |
| 1870 | b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : |
| 1871 | mkU64(0))); |
| 1872 | |
| 1873 | mnm = irgen(r1, op2addr); |
| 1874 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1875 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1876 | s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2); |
| 1877 | } |
| 1878 | |
| 1879 | static void |
| 1880 | s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr), |
| 1881 | UChar r1, UChar x2, UChar b2, UShort d2) |
| 1882 | { |
| 1883 | HChar *mnm; |
| 1884 | IRTemp op2addr = newTemp(Ity_I64); |
| 1885 | |
| 1886 | assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2), |
| 1887 | b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : |
| 1888 | mkU64(0))); |
| 1889 | |
| 1890 | mnm = irgen(r1, op2addr); |
| 1891 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1892 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1893 | s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2); |
| 1894 | } |
| 1895 | |
| 1896 | static void |
| 1897 | s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr), |
| 1898 | UChar r1, UChar x2, UChar b2, UShort d2) |
| 1899 | { |
| 1900 | HChar *mnm; |
| 1901 | IRTemp op2addr = newTemp(Ity_I64); |
| 1902 | |
| 1903 | assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2), |
| 1904 | b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : |
| 1905 | mkU64(0))); |
| 1906 | |
| 1907 | mnm = irgen(r1, op2addr); |
| 1908 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1909 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1910 | s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2); |
| 1911 | } |
| 1912 | |
| 1913 | static void |
| 1914 | s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar), |
| 1915 | UChar r3, UChar x2, UChar b2, UShort d2, UChar r1) |
| 1916 | { |
| 1917 | HChar *mnm; |
| 1918 | IRTemp op2addr = newTemp(Ity_I64); |
| 1919 | |
| 1920 | assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2), |
| 1921 | b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : |
| 1922 | mkU64(0))); |
| 1923 | |
| 1924 | mnm = irgen(r3, op2addr, r1); |
| 1925 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1926 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1927 | s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2); |
| 1928 | } |
| 1929 | |
| 1930 | static void |
| 1931 | s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr), |
| 1932 | UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) |
| 1933 | { |
| 1934 | HChar *mnm; |
| 1935 | IRTemp op2addr = newTemp(Ity_I64); |
| 1936 | IRTemp d2 = newTemp(Ity_I64); |
| 1937 | |
| 1938 | assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); |
| 1939 | assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2), |
| 1940 | b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : |
| 1941 | mkU64(0))); |
| 1942 | |
| 1943 | mnm = irgen(r1, op2addr); |
| 1944 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1945 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1946 | s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2); |
| 1947 | } |
| 1948 | |
| 1949 | static void |
| 1950 | s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr), |
| 1951 | UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) |
| 1952 | { |
| 1953 | HChar *mnm; |
| 1954 | IRTemp op2addr = newTemp(Ity_I64); |
| 1955 | IRTemp d2 = newTemp(Ity_I64); |
| 1956 | |
| 1957 | assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); |
| 1958 | assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2), |
| 1959 | b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : |
| 1960 | mkU64(0))); |
| 1961 | |
| 1962 | mnm = irgen(r1, op2addr); |
| 1963 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1964 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1965 | s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2); |
| 1966 | } |
| 1967 | |
| 1968 | static void |
| 1969 | s390_format_RXY_URRD(HChar *(*irgen)(void), |
| 1970 | UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) |
| 1971 | { |
| 1972 | HChar *mnm; |
| 1973 | IRTemp op2addr = newTemp(Ity_I64); |
| 1974 | IRTemp d2 = newTemp(Ity_I64); |
| 1975 | |
| 1976 | assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); |
| 1977 | assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2), |
| 1978 | b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : |
| 1979 | mkU64(0))); |
| 1980 | |
| 1981 | mnm = irgen(); |
| 1982 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1983 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 1984 | s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2); |
| 1985 | } |
| 1986 | |
| 1987 | static void |
| 1988 | s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr), |
| 1989 | UChar b2, UShort d2) |
| 1990 | { |
| 1991 | HChar *mnm; |
| 1992 | IRTemp op2addr = newTemp(Ity_I64); |
| 1993 | |
| 1994 | assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : |
| 1995 | mkU64(0))); |
| 1996 | |
| 1997 | mnm = irgen(op2addr); |
| 1998 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 1999 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 2000 | s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2); |
| 2001 | } |
| 2002 | |
| 2003 | static void |
| 2004 | s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr), |
| 2005 | UChar i2, UChar b1, UShort d1) |
| 2006 | { |
| 2007 | HChar *mnm; |
| 2008 | IRTemp op1addr = newTemp(Ity_I64); |
| 2009 | |
| 2010 | assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) : |
| 2011 | mkU64(0))); |
| 2012 | |
| 2013 | mnm = irgen(i2, op1addr); |
| 2014 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 2015 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 2016 | s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2); |
| 2017 | } |
| 2018 | |
| 2019 | static void |
| 2020 | s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr), |
| 2021 | UChar i2, UChar b1, UShort dl1, UChar dh1) |
| 2022 | { |
| 2023 | HChar *mnm; |
| 2024 | IRTemp op1addr = newTemp(Ity_I64); |
| 2025 | IRTemp d1 = newTemp(Ity_I64); |
| 2026 | |
| 2027 | assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1))); |
| 2028 | assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) : |
| 2029 | mkU64(0))); |
| 2030 | |
| 2031 | mnm = irgen(i2, op1addr); |
| 2032 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 2033 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 2034 | s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2); |
| 2035 | } |
| 2036 | |
| 2037 | static void |
| 2038 | s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr), |
| 2039 | UChar i2, UChar b1, UShort dl1, UChar dh1) |
| 2040 | { |
| 2041 | HChar *mnm; |
| 2042 | IRTemp op1addr = newTemp(Ity_I64); |
| 2043 | IRTemp d1 = newTemp(Ity_I64); |
| 2044 | |
| 2045 | assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1))); |
| 2046 | assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) : |
| 2047 | mkU64(0))); |
| 2048 | |
| 2049 | mnm = irgen(i2, op1addr); |
| 2050 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 2051 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 2052 | s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2); |
| 2053 | } |
| 2054 | |
| 2055 | static void |
| 2056 | s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp), |
| 2057 | UChar l, UChar b1, UShort d1, UChar b2, UShort d2) |
| 2058 | { |
| 2059 | HChar *mnm; |
| 2060 | IRTemp op1addr = newTemp(Ity_I64); |
| 2061 | IRTemp op2addr = newTemp(Ity_I64); |
| 2062 | |
| 2063 | assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) : |
| 2064 | mkU64(0))); |
| 2065 | assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : |
| 2066 | mkU64(0))); |
| 2067 | |
| 2068 | mnm = irgen(l, op1addr, op2addr); |
| 2069 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 2070 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 2071 | s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2); |
| 2072 | } |
| 2073 | |
| 2074 | static void |
| 2075 | s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr), |
| 2076 | UChar b1, UShort d1, UShort i2) |
| 2077 | { |
| 2078 | HChar *mnm; |
| 2079 | IRTemp op1addr = newTemp(Ity_I64); |
| 2080 | |
| 2081 | assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) : |
| 2082 | mkU64(0))); |
| 2083 | |
| 2084 | mnm = irgen(i2, op1addr); |
| 2085 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 2086 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 2087 | s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2); |
| 2088 | } |
| 2089 | |
| 2090 | static void |
| 2091 | s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr), |
| 2092 | UChar b1, UShort d1, UShort i2) |
| 2093 | { |
| 2094 | HChar *mnm; |
| 2095 | IRTemp op1addr = newTemp(Ity_I64); |
| 2096 | |
| 2097 | assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) : |
| 2098 | mkU64(0))); |
| 2099 | |
| 2100 | mnm = irgen(i2, op1addr); |
| 2101 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 2102 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 2103 | s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2); |
| 2104 | } |
| 2105 | |
| 2106 | |
| 2107 | |
| 2108 | /*------------------------------------------------------------*/ |
| 2109 | /*--- Build IR for opcodes ---*/ |
| 2110 | /*------------------------------------------------------------*/ |
| 2111 | |
| 2112 | static HChar * |
florian | 30e8901 | 2011-08-08 18:22:58 +0000 | [diff] [blame] | 2113 | s390_irgen_00(UChar r1 __attribute__((unused)), |
| 2114 | UChar r2 __attribute__((unused))) |
| 2115 | { |
| 2116 | IRDirty *d; |
| 2117 | |
| 2118 | d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00, |
| 2119 | mkIRExprVec_0()); |
| 2120 | d->needsBBP = 1; /* Need to pass pointer to guest state to helper */ |
| 2121 | |
sewardj | c9069f2 | 2012-06-01 16:09:50 +0000 | [diff] [blame] | 2122 | d->nFxState = 1; |
| 2123 | vex_bzero(&d->fxState, sizeof(d->fxState)); |
| 2124 | |
florian | 30e8901 | 2011-08-08 18:22:58 +0000 | [diff] [blame] | 2125 | d->fxState[0].fx = Ifx_Modify; /* read then write */ |
| 2126 | d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA); |
| 2127 | d->fxState[0].size = sizeof(ULong); |
florian | 30e8901 | 2011-08-08 18:22:58 +0000 | [diff] [blame] | 2128 | |
| 2129 | stmt(IRStmt_Dirty(d)); |
| 2130 | |
| 2131 | return "00"; |
| 2132 | } |
| 2133 | |
| 2134 | static HChar * |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 2135 | s390_irgen_AR(UChar r1, UChar r2) |
| 2136 | { |
| 2137 | IRTemp op1 = newTemp(Ity_I32); |
| 2138 | IRTemp op2 = newTemp(Ity_I32); |
| 2139 | IRTemp result = newTemp(Ity_I32); |
| 2140 | |
| 2141 | assign(op1, get_gpr_w1(r1)); |
| 2142 | assign(op2, get_gpr_w1(r2)); |
| 2143 | assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); |
| 2144 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2); |
| 2145 | put_gpr_w1(r1, mkexpr(result)); |
| 2146 | |
| 2147 | return "ar"; |
| 2148 | } |
| 2149 | |
| 2150 | static HChar * |
| 2151 | s390_irgen_AGR(UChar r1, UChar r2) |
| 2152 | { |
| 2153 | IRTemp op1 = newTemp(Ity_I64); |
| 2154 | IRTemp op2 = newTemp(Ity_I64); |
| 2155 | IRTemp result = newTemp(Ity_I64); |
| 2156 | |
| 2157 | assign(op1, get_gpr_dw0(r1)); |
| 2158 | assign(op2, get_gpr_dw0(r2)); |
| 2159 | assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); |
| 2160 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2); |
| 2161 | put_gpr_dw0(r1, mkexpr(result)); |
| 2162 | |
| 2163 | return "agr"; |
| 2164 | } |
| 2165 | |
| 2166 | static HChar * |
| 2167 | s390_irgen_AGFR(UChar r1, UChar r2) |
| 2168 | { |
| 2169 | IRTemp op1 = newTemp(Ity_I64); |
| 2170 | IRTemp op2 = newTemp(Ity_I64); |
| 2171 | IRTemp result = newTemp(Ity_I64); |
| 2172 | |
| 2173 | assign(op1, get_gpr_dw0(r1)); |
| 2174 | assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); |
| 2175 | assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); |
| 2176 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2); |
| 2177 | put_gpr_dw0(r1, mkexpr(result)); |
| 2178 | |
| 2179 | return "agfr"; |
| 2180 | } |
| 2181 | |
| 2182 | static HChar * |
| 2183 | s390_irgen_ARK(UChar r3, UChar r1, UChar r2) |
| 2184 | { |
| 2185 | IRTemp op2 = newTemp(Ity_I32); |
| 2186 | IRTemp op3 = newTemp(Ity_I32); |
| 2187 | IRTemp result = newTemp(Ity_I32); |
| 2188 | |
| 2189 | assign(op2, get_gpr_w1(r2)); |
| 2190 | assign(op3, get_gpr_w1(r3)); |
| 2191 | assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); |
| 2192 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3); |
| 2193 | put_gpr_w1(r1, mkexpr(result)); |
| 2194 | |
| 2195 | return "ark"; |
| 2196 | } |
| 2197 | |
| 2198 | static HChar * |
| 2199 | s390_irgen_AGRK(UChar r3, UChar r1, UChar r2) |
| 2200 | { |
| 2201 | IRTemp op2 = newTemp(Ity_I64); |
| 2202 | IRTemp op3 = newTemp(Ity_I64); |
| 2203 | IRTemp result = newTemp(Ity_I64); |
| 2204 | |
| 2205 | assign(op2, get_gpr_dw0(r2)); |
| 2206 | assign(op3, get_gpr_dw0(r3)); |
| 2207 | assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3))); |
| 2208 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3); |
| 2209 | put_gpr_dw0(r1, mkexpr(result)); |
| 2210 | |
| 2211 | return "agrk"; |
| 2212 | } |
| 2213 | |
| 2214 | static HChar * |
| 2215 | s390_irgen_A(UChar r1, IRTemp op2addr) |
| 2216 | { |
| 2217 | IRTemp op1 = newTemp(Ity_I32); |
| 2218 | IRTemp op2 = newTemp(Ity_I32); |
| 2219 | IRTemp result = newTemp(Ity_I32); |
| 2220 | |
| 2221 | assign(op1, get_gpr_w1(r1)); |
| 2222 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 2223 | assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); |
| 2224 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2); |
| 2225 | put_gpr_w1(r1, mkexpr(result)); |
| 2226 | |
| 2227 | return "a"; |
| 2228 | } |
| 2229 | |
| 2230 | static HChar * |
| 2231 | s390_irgen_AY(UChar r1, IRTemp op2addr) |
| 2232 | { |
| 2233 | IRTemp op1 = newTemp(Ity_I32); |
| 2234 | IRTemp op2 = newTemp(Ity_I32); |
| 2235 | IRTemp result = newTemp(Ity_I32); |
| 2236 | |
| 2237 | assign(op1, get_gpr_w1(r1)); |
| 2238 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 2239 | assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); |
| 2240 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2); |
| 2241 | put_gpr_w1(r1, mkexpr(result)); |
| 2242 | |
| 2243 | return "ay"; |
| 2244 | } |
| 2245 | |
| 2246 | static HChar * |
| 2247 | s390_irgen_AG(UChar r1, IRTemp op2addr) |
| 2248 | { |
| 2249 | IRTemp op1 = newTemp(Ity_I64); |
| 2250 | IRTemp op2 = newTemp(Ity_I64); |
| 2251 | IRTemp result = newTemp(Ity_I64); |
| 2252 | |
| 2253 | assign(op1, get_gpr_dw0(r1)); |
| 2254 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 2255 | assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); |
| 2256 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2); |
| 2257 | put_gpr_dw0(r1, mkexpr(result)); |
| 2258 | |
| 2259 | return "ag"; |
| 2260 | } |
| 2261 | |
| 2262 | static HChar * |
| 2263 | s390_irgen_AGF(UChar r1, IRTemp op2addr) |
| 2264 | { |
| 2265 | IRTemp op1 = newTemp(Ity_I64); |
| 2266 | IRTemp op2 = newTemp(Ity_I64); |
| 2267 | IRTemp result = newTemp(Ity_I64); |
| 2268 | |
| 2269 | assign(op1, get_gpr_dw0(r1)); |
| 2270 | assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); |
| 2271 | assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); |
| 2272 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2); |
| 2273 | put_gpr_dw0(r1, mkexpr(result)); |
| 2274 | |
| 2275 | return "agf"; |
| 2276 | } |
| 2277 | |
| 2278 | static HChar * |
| 2279 | s390_irgen_AFI(UChar r1, UInt i2) |
| 2280 | { |
| 2281 | IRTemp op1 = newTemp(Ity_I32); |
| 2282 | Int op2; |
| 2283 | IRTemp result = newTemp(Ity_I32); |
| 2284 | |
| 2285 | assign(op1, get_gpr_w1(r1)); |
| 2286 | op2 = (Int)i2; |
| 2287 | assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2))); |
| 2288 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32, |
| 2289 | mkU32((UInt)op2))); |
| 2290 | put_gpr_w1(r1, mkexpr(result)); |
| 2291 | |
| 2292 | return "afi"; |
| 2293 | } |
| 2294 | |
| 2295 | static HChar * |
| 2296 | s390_irgen_AGFI(UChar r1, UInt i2) |
| 2297 | { |
| 2298 | IRTemp op1 = newTemp(Ity_I64); |
| 2299 | Long op2; |
| 2300 | IRTemp result = newTemp(Ity_I64); |
| 2301 | |
| 2302 | assign(op1, get_gpr_dw0(r1)); |
| 2303 | op2 = (Long)(Int)i2; |
| 2304 | assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2))); |
| 2305 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64, |
| 2306 | mkU64((ULong)op2))); |
| 2307 | put_gpr_dw0(r1, mkexpr(result)); |
| 2308 | |
| 2309 | return "agfi"; |
| 2310 | } |
| 2311 | |
| 2312 | static HChar * |
| 2313 | s390_irgen_AHIK(UChar r1, UChar r3, UShort i2) |
| 2314 | { |
| 2315 | Int op2; |
| 2316 | IRTemp op3 = newTemp(Ity_I32); |
| 2317 | IRTemp result = newTemp(Ity_I32); |
| 2318 | |
| 2319 | op2 = (Int)(Short)i2; |
| 2320 | assign(op3, get_gpr_w1(r3)); |
| 2321 | assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3))); |
| 2322 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt) |
| 2323 | op2)), op3); |
| 2324 | put_gpr_w1(r1, mkexpr(result)); |
| 2325 | |
| 2326 | return "ahik"; |
| 2327 | } |
| 2328 | |
| 2329 | static HChar * |
| 2330 | s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2) |
| 2331 | { |
| 2332 | Long op2; |
| 2333 | IRTemp op3 = newTemp(Ity_I64); |
| 2334 | IRTemp result = newTemp(Ity_I64); |
| 2335 | |
| 2336 | op2 = (Long)(Short)i2; |
| 2337 | assign(op3, get_gpr_dw0(r3)); |
| 2338 | assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3))); |
| 2339 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong) |
| 2340 | op2)), op3); |
| 2341 | put_gpr_dw0(r1, mkexpr(result)); |
| 2342 | |
| 2343 | return "aghik"; |
| 2344 | } |
| 2345 | |
| 2346 | static HChar * |
| 2347 | s390_irgen_ASI(UChar i2, IRTemp op1addr) |
| 2348 | { |
| 2349 | IRTemp op1 = newTemp(Ity_I32); |
| 2350 | Int op2; |
| 2351 | IRTemp result = newTemp(Ity_I32); |
| 2352 | |
| 2353 | assign(op1, load(Ity_I32, mkexpr(op1addr))); |
| 2354 | op2 = (Int)(Char)i2; |
| 2355 | assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2))); |
| 2356 | store(mkexpr(op1addr), mkexpr(result)); |
| 2357 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32, |
| 2358 | mkU32((UInt)op2))); |
| 2359 | |
| 2360 | return "asi"; |
| 2361 | } |
| 2362 | |
| 2363 | static HChar * |
| 2364 | s390_irgen_AGSI(UChar i2, IRTemp op1addr) |
| 2365 | { |
| 2366 | IRTemp op1 = newTemp(Ity_I64); |
| 2367 | Long op2; |
| 2368 | IRTemp result = newTemp(Ity_I64); |
| 2369 | |
| 2370 | assign(op1, load(Ity_I64, mkexpr(op1addr))); |
| 2371 | op2 = (Long)(Char)i2; |
| 2372 | assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2))); |
| 2373 | store(mkexpr(op1addr), mkexpr(result)); |
| 2374 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64, |
| 2375 | mkU64((ULong)op2))); |
| 2376 | |
| 2377 | return "agsi"; |
| 2378 | } |
| 2379 | |
| 2380 | static HChar * |
| 2381 | s390_irgen_AH(UChar r1, IRTemp op2addr) |
| 2382 | { |
| 2383 | IRTemp op1 = newTemp(Ity_I32); |
| 2384 | IRTemp op2 = newTemp(Ity_I32); |
| 2385 | IRTemp result = newTemp(Ity_I32); |
| 2386 | |
| 2387 | assign(op1, get_gpr_w1(r1)); |
| 2388 | assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); |
| 2389 | assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); |
| 2390 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2); |
| 2391 | put_gpr_w1(r1, mkexpr(result)); |
| 2392 | |
| 2393 | return "ah"; |
| 2394 | } |
| 2395 | |
| 2396 | static HChar * |
| 2397 | s390_irgen_AHY(UChar r1, IRTemp op2addr) |
| 2398 | { |
| 2399 | IRTemp op1 = newTemp(Ity_I32); |
| 2400 | IRTemp op2 = newTemp(Ity_I32); |
| 2401 | IRTemp result = newTemp(Ity_I32); |
| 2402 | |
| 2403 | assign(op1, get_gpr_w1(r1)); |
| 2404 | assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); |
| 2405 | assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); |
| 2406 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2); |
| 2407 | put_gpr_w1(r1, mkexpr(result)); |
| 2408 | |
| 2409 | return "ahy"; |
| 2410 | } |
| 2411 | |
| 2412 | static HChar * |
| 2413 | s390_irgen_AHI(UChar r1, UShort i2) |
| 2414 | { |
| 2415 | IRTemp op1 = newTemp(Ity_I32); |
| 2416 | Int op2; |
| 2417 | IRTemp result = newTemp(Ity_I32); |
| 2418 | |
| 2419 | assign(op1, get_gpr_w1(r1)); |
| 2420 | op2 = (Int)(Short)i2; |
| 2421 | assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2))); |
| 2422 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32, |
| 2423 | mkU32((UInt)op2))); |
| 2424 | put_gpr_w1(r1, mkexpr(result)); |
| 2425 | |
| 2426 | return "ahi"; |
| 2427 | } |
| 2428 | |
| 2429 | static HChar * |
| 2430 | s390_irgen_AGHI(UChar r1, UShort i2) |
| 2431 | { |
| 2432 | IRTemp op1 = newTemp(Ity_I64); |
| 2433 | Long op2; |
| 2434 | IRTemp result = newTemp(Ity_I64); |
| 2435 | |
| 2436 | assign(op1, get_gpr_dw0(r1)); |
| 2437 | op2 = (Long)(Short)i2; |
| 2438 | assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2))); |
| 2439 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64, |
| 2440 | mkU64((ULong)op2))); |
| 2441 | put_gpr_dw0(r1, mkexpr(result)); |
| 2442 | |
| 2443 | return "aghi"; |
| 2444 | } |
| 2445 | |
| 2446 | static HChar * |
| 2447 | s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2) |
| 2448 | { |
| 2449 | IRTemp op2 = newTemp(Ity_I32); |
| 2450 | IRTemp op3 = newTemp(Ity_I32); |
| 2451 | IRTemp result = newTemp(Ity_I32); |
| 2452 | |
| 2453 | assign(op2, get_gpr_w0(r2)); |
| 2454 | assign(op3, get_gpr_w0(r3)); |
| 2455 | assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); |
| 2456 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3); |
| 2457 | put_gpr_w0(r1, mkexpr(result)); |
| 2458 | |
| 2459 | return "ahhhr"; |
| 2460 | } |
| 2461 | |
| 2462 | static HChar * |
| 2463 | s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2) |
| 2464 | { |
| 2465 | IRTemp op2 = newTemp(Ity_I32); |
| 2466 | IRTemp op3 = newTemp(Ity_I32); |
| 2467 | IRTemp result = newTemp(Ity_I32); |
| 2468 | |
| 2469 | assign(op2, get_gpr_w0(r2)); |
| 2470 | assign(op3, get_gpr_w1(r3)); |
| 2471 | assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); |
| 2472 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3); |
| 2473 | put_gpr_w0(r1, mkexpr(result)); |
| 2474 | |
| 2475 | return "ahhlr"; |
| 2476 | } |
| 2477 | |
| 2478 | static HChar * |
| 2479 | s390_irgen_AIH(UChar r1, UInt i2) |
| 2480 | { |
| 2481 | IRTemp op1 = newTemp(Ity_I32); |
| 2482 | Int op2; |
| 2483 | IRTemp result = newTemp(Ity_I32); |
| 2484 | |
| 2485 | assign(op1, get_gpr_w0(r1)); |
| 2486 | op2 = (Int)i2; |
| 2487 | assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2))); |
| 2488 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32, |
| 2489 | mkU32((UInt)op2))); |
| 2490 | put_gpr_w0(r1, mkexpr(result)); |
| 2491 | |
| 2492 | return "aih"; |
| 2493 | } |
| 2494 | |
| 2495 | static HChar * |
| 2496 | s390_irgen_ALR(UChar r1, UChar r2) |
| 2497 | { |
| 2498 | IRTemp op1 = newTemp(Ity_I32); |
| 2499 | IRTemp op2 = newTemp(Ity_I32); |
| 2500 | IRTemp result = newTemp(Ity_I32); |
| 2501 | |
| 2502 | assign(op1, get_gpr_w1(r1)); |
| 2503 | assign(op2, get_gpr_w1(r2)); |
| 2504 | assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); |
| 2505 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2); |
| 2506 | put_gpr_w1(r1, mkexpr(result)); |
| 2507 | |
| 2508 | return "alr"; |
| 2509 | } |
| 2510 | |
| 2511 | static HChar * |
| 2512 | s390_irgen_ALGR(UChar r1, UChar r2) |
| 2513 | { |
| 2514 | IRTemp op1 = newTemp(Ity_I64); |
| 2515 | IRTemp op2 = newTemp(Ity_I64); |
| 2516 | IRTemp result = newTemp(Ity_I64); |
| 2517 | |
| 2518 | assign(op1, get_gpr_dw0(r1)); |
| 2519 | assign(op2, get_gpr_dw0(r2)); |
| 2520 | assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); |
| 2521 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2); |
| 2522 | put_gpr_dw0(r1, mkexpr(result)); |
| 2523 | |
| 2524 | return "algr"; |
| 2525 | } |
| 2526 | |
| 2527 | static HChar * |
| 2528 | s390_irgen_ALGFR(UChar r1, UChar r2) |
| 2529 | { |
| 2530 | IRTemp op1 = newTemp(Ity_I64); |
| 2531 | IRTemp op2 = newTemp(Ity_I64); |
| 2532 | IRTemp result = newTemp(Ity_I64); |
| 2533 | |
| 2534 | assign(op1, get_gpr_dw0(r1)); |
| 2535 | assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2))); |
| 2536 | assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); |
| 2537 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2); |
| 2538 | put_gpr_dw0(r1, mkexpr(result)); |
| 2539 | |
| 2540 | return "algfr"; |
| 2541 | } |
| 2542 | |
| 2543 | static HChar * |
| 2544 | s390_irgen_ALRK(UChar r3, UChar r1, UChar r2) |
| 2545 | { |
| 2546 | IRTemp op2 = newTemp(Ity_I32); |
| 2547 | IRTemp op3 = newTemp(Ity_I32); |
| 2548 | IRTemp result = newTemp(Ity_I32); |
| 2549 | |
| 2550 | assign(op2, get_gpr_w1(r2)); |
| 2551 | assign(op3, get_gpr_w1(r3)); |
| 2552 | assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); |
| 2553 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3); |
| 2554 | put_gpr_w1(r1, mkexpr(result)); |
| 2555 | |
| 2556 | return "alrk"; |
| 2557 | } |
| 2558 | |
| 2559 | static HChar * |
| 2560 | s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2) |
| 2561 | { |
| 2562 | IRTemp op2 = newTemp(Ity_I64); |
| 2563 | IRTemp op3 = newTemp(Ity_I64); |
| 2564 | IRTemp result = newTemp(Ity_I64); |
| 2565 | |
| 2566 | assign(op2, get_gpr_dw0(r2)); |
| 2567 | assign(op3, get_gpr_dw0(r3)); |
| 2568 | assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3))); |
| 2569 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3); |
| 2570 | put_gpr_dw0(r1, mkexpr(result)); |
| 2571 | |
| 2572 | return "algrk"; |
| 2573 | } |
| 2574 | |
| 2575 | static HChar * |
| 2576 | s390_irgen_AL(UChar r1, IRTemp op2addr) |
| 2577 | { |
| 2578 | IRTemp op1 = newTemp(Ity_I32); |
| 2579 | IRTemp op2 = newTemp(Ity_I32); |
| 2580 | IRTemp result = newTemp(Ity_I32); |
| 2581 | |
| 2582 | assign(op1, get_gpr_w1(r1)); |
| 2583 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 2584 | assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); |
| 2585 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2); |
| 2586 | put_gpr_w1(r1, mkexpr(result)); |
| 2587 | |
| 2588 | return "al"; |
| 2589 | } |
| 2590 | |
| 2591 | static HChar * |
| 2592 | s390_irgen_ALY(UChar r1, IRTemp op2addr) |
| 2593 | { |
| 2594 | IRTemp op1 = newTemp(Ity_I32); |
| 2595 | IRTemp op2 = newTemp(Ity_I32); |
| 2596 | IRTemp result = newTemp(Ity_I32); |
| 2597 | |
| 2598 | assign(op1, get_gpr_w1(r1)); |
| 2599 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 2600 | assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); |
| 2601 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2); |
| 2602 | put_gpr_w1(r1, mkexpr(result)); |
| 2603 | |
| 2604 | return "aly"; |
| 2605 | } |
| 2606 | |
| 2607 | static HChar * |
| 2608 | s390_irgen_ALG(UChar r1, IRTemp op2addr) |
| 2609 | { |
| 2610 | IRTemp op1 = newTemp(Ity_I64); |
| 2611 | IRTemp op2 = newTemp(Ity_I64); |
| 2612 | IRTemp result = newTemp(Ity_I64); |
| 2613 | |
| 2614 | assign(op1, get_gpr_dw0(r1)); |
| 2615 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 2616 | assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); |
| 2617 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2); |
| 2618 | put_gpr_dw0(r1, mkexpr(result)); |
| 2619 | |
| 2620 | return "alg"; |
| 2621 | } |
| 2622 | |
| 2623 | static HChar * |
| 2624 | s390_irgen_ALGF(UChar r1, IRTemp op2addr) |
| 2625 | { |
| 2626 | IRTemp op1 = newTemp(Ity_I64); |
| 2627 | IRTemp op2 = newTemp(Ity_I64); |
| 2628 | IRTemp result = newTemp(Ity_I64); |
| 2629 | |
| 2630 | assign(op1, get_gpr_dw0(r1)); |
| 2631 | assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr)))); |
| 2632 | assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); |
| 2633 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2); |
| 2634 | put_gpr_dw0(r1, mkexpr(result)); |
| 2635 | |
| 2636 | return "algf"; |
| 2637 | } |
| 2638 | |
| 2639 | static HChar * |
| 2640 | s390_irgen_ALFI(UChar r1, UInt i2) |
| 2641 | { |
| 2642 | IRTemp op1 = newTemp(Ity_I32); |
| 2643 | UInt op2; |
| 2644 | IRTemp result = newTemp(Ity_I32); |
| 2645 | |
| 2646 | assign(op1, get_gpr_w1(r1)); |
| 2647 | op2 = i2; |
| 2648 | assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2))); |
| 2649 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32, |
| 2650 | mkU32(op2))); |
| 2651 | put_gpr_w1(r1, mkexpr(result)); |
| 2652 | |
| 2653 | return "alfi"; |
| 2654 | } |
| 2655 | |
| 2656 | static HChar * |
| 2657 | s390_irgen_ALGFI(UChar r1, UInt i2) |
| 2658 | { |
| 2659 | IRTemp op1 = newTemp(Ity_I64); |
| 2660 | ULong op2; |
| 2661 | IRTemp result = newTemp(Ity_I64); |
| 2662 | |
| 2663 | assign(op1, get_gpr_dw0(r1)); |
| 2664 | op2 = (ULong)i2; |
| 2665 | assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2))); |
| 2666 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64, |
| 2667 | mkU64(op2))); |
| 2668 | put_gpr_dw0(r1, mkexpr(result)); |
| 2669 | |
| 2670 | return "algfi"; |
| 2671 | } |
| 2672 | |
| 2673 | static HChar * |
| 2674 | s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2) |
| 2675 | { |
| 2676 | IRTemp op2 = newTemp(Ity_I32); |
| 2677 | IRTemp op3 = newTemp(Ity_I32); |
| 2678 | IRTemp result = newTemp(Ity_I32); |
| 2679 | |
| 2680 | assign(op2, get_gpr_w0(r2)); |
| 2681 | assign(op3, get_gpr_w0(r3)); |
| 2682 | assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); |
| 2683 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3); |
| 2684 | put_gpr_w0(r1, mkexpr(result)); |
| 2685 | |
| 2686 | return "alhhhr"; |
| 2687 | } |
| 2688 | |
| 2689 | static HChar * |
| 2690 | s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2) |
| 2691 | { |
| 2692 | IRTemp op2 = newTemp(Ity_I32); |
| 2693 | IRTemp op3 = newTemp(Ity_I32); |
| 2694 | IRTemp result = newTemp(Ity_I32); |
| 2695 | |
| 2696 | assign(op2, get_gpr_w0(r2)); |
| 2697 | assign(op3, get_gpr_w1(r3)); |
| 2698 | assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); |
| 2699 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3); |
| 2700 | put_gpr_w0(r1, mkexpr(result)); |
| 2701 | |
| 2702 | return "alhhlr"; |
| 2703 | } |
| 2704 | |
| 2705 | static HChar * |
| 2706 | s390_irgen_ALCR(UChar r1, UChar r2) |
| 2707 | { |
| 2708 | IRTemp op1 = newTemp(Ity_I32); |
| 2709 | IRTemp op2 = newTemp(Ity_I32); |
| 2710 | IRTemp result = newTemp(Ity_I32); |
| 2711 | IRTemp carry_in = newTemp(Ity_I32); |
| 2712 | |
| 2713 | assign(op1, get_gpr_w1(r1)); |
| 2714 | assign(op2, get_gpr_w1(r2)); |
| 2715 | assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1))); |
| 2716 | assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)), |
| 2717 | mkexpr(carry_in))); |
| 2718 | s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in); |
| 2719 | put_gpr_w1(r1, mkexpr(result)); |
| 2720 | |
| 2721 | return "alcr"; |
| 2722 | } |
| 2723 | |
| 2724 | static HChar * |
| 2725 | s390_irgen_ALCGR(UChar r1, UChar r2) |
| 2726 | { |
| 2727 | IRTemp op1 = newTemp(Ity_I64); |
| 2728 | IRTemp op2 = newTemp(Ity_I64); |
| 2729 | IRTemp result = newTemp(Ity_I64); |
| 2730 | IRTemp carry_in = newTemp(Ity_I64); |
| 2731 | |
| 2732 | assign(op1, get_gpr_dw0(r1)); |
| 2733 | assign(op2, get_gpr_dw0(r2)); |
| 2734 | assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(), |
| 2735 | mkU8(1)))); |
| 2736 | assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)), |
| 2737 | mkexpr(carry_in))); |
| 2738 | s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in); |
| 2739 | put_gpr_dw0(r1, mkexpr(result)); |
| 2740 | |
| 2741 | return "alcgr"; |
| 2742 | } |
| 2743 | |
| 2744 | static HChar * |
| 2745 | s390_irgen_ALC(UChar r1, IRTemp op2addr) |
| 2746 | { |
| 2747 | IRTemp op1 = newTemp(Ity_I32); |
| 2748 | IRTemp op2 = newTemp(Ity_I32); |
| 2749 | IRTemp result = newTemp(Ity_I32); |
| 2750 | IRTemp carry_in = newTemp(Ity_I32); |
| 2751 | |
| 2752 | assign(op1, get_gpr_w1(r1)); |
| 2753 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 2754 | assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1))); |
| 2755 | assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)), |
| 2756 | mkexpr(carry_in))); |
| 2757 | s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in); |
| 2758 | put_gpr_w1(r1, mkexpr(result)); |
| 2759 | |
| 2760 | return "alc"; |
| 2761 | } |
| 2762 | |
| 2763 | static HChar * |
| 2764 | s390_irgen_ALCG(UChar r1, IRTemp op2addr) |
| 2765 | { |
| 2766 | IRTemp op1 = newTemp(Ity_I64); |
| 2767 | IRTemp op2 = newTemp(Ity_I64); |
| 2768 | IRTemp result = newTemp(Ity_I64); |
| 2769 | IRTemp carry_in = newTemp(Ity_I64); |
| 2770 | |
| 2771 | assign(op1, get_gpr_dw0(r1)); |
| 2772 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 2773 | assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(), |
| 2774 | mkU8(1)))); |
| 2775 | assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)), |
| 2776 | mkexpr(carry_in))); |
| 2777 | s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in); |
| 2778 | put_gpr_dw0(r1, mkexpr(result)); |
| 2779 | |
| 2780 | return "alcg"; |
| 2781 | } |
| 2782 | |
| 2783 | static HChar * |
| 2784 | s390_irgen_ALSI(UChar i2, IRTemp op1addr) |
| 2785 | { |
| 2786 | IRTemp op1 = newTemp(Ity_I32); |
| 2787 | UInt op2; |
| 2788 | IRTemp result = newTemp(Ity_I32); |
| 2789 | |
| 2790 | assign(op1, load(Ity_I32, mkexpr(op1addr))); |
| 2791 | op2 = (UInt)(Int)(Char)i2; |
| 2792 | assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2))); |
| 2793 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32, |
| 2794 | mkU32(op2))); |
| 2795 | store(mkexpr(op1addr), mkexpr(result)); |
| 2796 | |
| 2797 | return "alsi"; |
| 2798 | } |
| 2799 | |
| 2800 | static HChar * |
| 2801 | s390_irgen_ALGSI(UChar i2, IRTemp op1addr) |
| 2802 | { |
| 2803 | IRTemp op1 = newTemp(Ity_I64); |
| 2804 | ULong op2; |
| 2805 | IRTemp result = newTemp(Ity_I64); |
| 2806 | |
| 2807 | assign(op1, load(Ity_I64, mkexpr(op1addr))); |
| 2808 | op2 = (ULong)(Long)(Char)i2; |
| 2809 | assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2))); |
| 2810 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64, |
| 2811 | mkU64(op2))); |
| 2812 | store(mkexpr(op1addr), mkexpr(result)); |
| 2813 | |
| 2814 | return "algsi"; |
| 2815 | } |
| 2816 | |
| 2817 | static HChar * |
| 2818 | s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2) |
| 2819 | { |
| 2820 | UInt op2; |
| 2821 | IRTemp op3 = newTemp(Ity_I32); |
| 2822 | IRTemp result = newTemp(Ity_I32); |
| 2823 | |
| 2824 | op2 = (UInt)(Int)(Short)i2; |
| 2825 | assign(op3, get_gpr_w1(r3)); |
| 2826 | assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3))); |
| 2827 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)), |
| 2828 | op3); |
| 2829 | put_gpr_w1(r1, mkexpr(result)); |
| 2830 | |
| 2831 | return "alhsik"; |
| 2832 | } |
| 2833 | |
| 2834 | static HChar * |
| 2835 | s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2) |
| 2836 | { |
| 2837 | ULong op2; |
| 2838 | IRTemp op3 = newTemp(Ity_I64); |
| 2839 | IRTemp result = newTemp(Ity_I64); |
| 2840 | |
| 2841 | op2 = (ULong)(Long)(Short)i2; |
| 2842 | assign(op3, get_gpr_dw0(r3)); |
| 2843 | assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3))); |
| 2844 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)), |
| 2845 | op3); |
| 2846 | put_gpr_dw0(r1, mkexpr(result)); |
| 2847 | |
| 2848 | return "alghsik"; |
| 2849 | } |
| 2850 | |
| 2851 | static HChar * |
| 2852 | s390_irgen_ALSIH(UChar r1, UInt i2) |
| 2853 | { |
| 2854 | IRTemp op1 = newTemp(Ity_I32); |
| 2855 | UInt op2; |
| 2856 | IRTemp result = newTemp(Ity_I32); |
| 2857 | |
| 2858 | assign(op1, get_gpr_w0(r1)); |
| 2859 | op2 = i2; |
| 2860 | assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2))); |
| 2861 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32, |
| 2862 | mkU32(op2))); |
| 2863 | put_gpr_w0(r1, mkexpr(result)); |
| 2864 | |
| 2865 | return "alsih"; |
| 2866 | } |
| 2867 | |
| 2868 | static HChar * |
| 2869 | s390_irgen_ALSIHN(UChar r1, UInt i2) |
| 2870 | { |
| 2871 | IRTemp op1 = newTemp(Ity_I32); |
| 2872 | UInt op2; |
| 2873 | IRTemp result = newTemp(Ity_I32); |
| 2874 | |
| 2875 | assign(op1, get_gpr_w0(r1)); |
| 2876 | op2 = i2; |
| 2877 | assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2))); |
| 2878 | put_gpr_w0(r1, mkexpr(result)); |
| 2879 | |
| 2880 | return "alsihn"; |
| 2881 | } |
| 2882 | |
| 2883 | static HChar * |
| 2884 | s390_irgen_NR(UChar r1, UChar r2) |
| 2885 | { |
| 2886 | IRTemp op1 = newTemp(Ity_I32); |
| 2887 | IRTemp op2 = newTemp(Ity_I32); |
| 2888 | IRTemp result = newTemp(Ity_I32); |
| 2889 | |
| 2890 | assign(op1, get_gpr_w1(r1)); |
| 2891 | assign(op2, get_gpr_w1(r2)); |
| 2892 | assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2))); |
| 2893 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 2894 | put_gpr_w1(r1, mkexpr(result)); |
| 2895 | |
| 2896 | return "nr"; |
| 2897 | } |
| 2898 | |
| 2899 | static HChar * |
| 2900 | s390_irgen_NGR(UChar r1, UChar r2) |
| 2901 | { |
| 2902 | IRTemp op1 = newTemp(Ity_I64); |
| 2903 | IRTemp op2 = newTemp(Ity_I64); |
| 2904 | IRTemp result = newTemp(Ity_I64); |
| 2905 | |
| 2906 | assign(op1, get_gpr_dw0(r1)); |
| 2907 | assign(op2, get_gpr_dw0(r2)); |
| 2908 | assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2))); |
| 2909 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 2910 | put_gpr_dw0(r1, mkexpr(result)); |
| 2911 | |
| 2912 | return "ngr"; |
| 2913 | } |
| 2914 | |
| 2915 | static HChar * |
| 2916 | s390_irgen_NRK(UChar r3, UChar r1, UChar r2) |
| 2917 | { |
| 2918 | IRTemp op2 = newTemp(Ity_I32); |
| 2919 | IRTemp op3 = newTemp(Ity_I32); |
| 2920 | IRTemp result = newTemp(Ity_I32); |
| 2921 | |
| 2922 | assign(op2, get_gpr_w1(r2)); |
| 2923 | assign(op3, get_gpr_w1(r3)); |
| 2924 | assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3))); |
| 2925 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 2926 | put_gpr_w1(r1, mkexpr(result)); |
| 2927 | |
| 2928 | return "nrk"; |
| 2929 | } |
| 2930 | |
| 2931 | static HChar * |
| 2932 | s390_irgen_NGRK(UChar r3, UChar r1, UChar r2) |
| 2933 | { |
| 2934 | IRTemp op2 = newTemp(Ity_I64); |
| 2935 | IRTemp op3 = newTemp(Ity_I64); |
| 2936 | IRTemp result = newTemp(Ity_I64); |
| 2937 | |
| 2938 | assign(op2, get_gpr_dw0(r2)); |
| 2939 | assign(op3, get_gpr_dw0(r3)); |
| 2940 | assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3))); |
| 2941 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 2942 | put_gpr_dw0(r1, mkexpr(result)); |
| 2943 | |
| 2944 | return "ngrk"; |
| 2945 | } |
| 2946 | |
| 2947 | static HChar * |
| 2948 | s390_irgen_N(UChar r1, IRTemp op2addr) |
| 2949 | { |
| 2950 | IRTemp op1 = newTemp(Ity_I32); |
| 2951 | IRTemp op2 = newTemp(Ity_I32); |
| 2952 | IRTemp result = newTemp(Ity_I32); |
| 2953 | |
| 2954 | assign(op1, get_gpr_w1(r1)); |
| 2955 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 2956 | assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2))); |
| 2957 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 2958 | put_gpr_w1(r1, mkexpr(result)); |
| 2959 | |
| 2960 | return "n"; |
| 2961 | } |
| 2962 | |
| 2963 | static HChar * |
| 2964 | s390_irgen_NY(UChar r1, IRTemp op2addr) |
| 2965 | { |
| 2966 | IRTemp op1 = newTemp(Ity_I32); |
| 2967 | IRTemp op2 = newTemp(Ity_I32); |
| 2968 | IRTemp result = newTemp(Ity_I32); |
| 2969 | |
| 2970 | assign(op1, get_gpr_w1(r1)); |
| 2971 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 2972 | assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2))); |
| 2973 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 2974 | put_gpr_w1(r1, mkexpr(result)); |
| 2975 | |
| 2976 | return "ny"; |
| 2977 | } |
| 2978 | |
| 2979 | static HChar * |
| 2980 | s390_irgen_NG(UChar r1, IRTemp op2addr) |
| 2981 | { |
| 2982 | IRTemp op1 = newTemp(Ity_I64); |
| 2983 | IRTemp op2 = newTemp(Ity_I64); |
| 2984 | IRTemp result = newTemp(Ity_I64); |
| 2985 | |
| 2986 | assign(op1, get_gpr_dw0(r1)); |
| 2987 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 2988 | assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2))); |
| 2989 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 2990 | put_gpr_dw0(r1, mkexpr(result)); |
| 2991 | |
| 2992 | return "ng"; |
| 2993 | } |
| 2994 | |
| 2995 | static HChar * |
| 2996 | s390_irgen_NI(UChar i2, IRTemp op1addr) |
| 2997 | { |
| 2998 | IRTemp op1 = newTemp(Ity_I8); |
| 2999 | UChar op2; |
| 3000 | IRTemp result = newTemp(Ity_I8); |
| 3001 | |
| 3002 | assign(op1, load(Ity_I8, mkexpr(op1addr))); |
| 3003 | op2 = i2; |
| 3004 | assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2))); |
| 3005 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 3006 | store(mkexpr(op1addr), mkexpr(result)); |
| 3007 | |
| 3008 | return "ni"; |
| 3009 | } |
| 3010 | |
| 3011 | static HChar * |
| 3012 | s390_irgen_NIY(UChar i2, IRTemp op1addr) |
| 3013 | { |
| 3014 | IRTemp op1 = newTemp(Ity_I8); |
| 3015 | UChar op2; |
| 3016 | IRTemp result = newTemp(Ity_I8); |
| 3017 | |
| 3018 | assign(op1, load(Ity_I8, mkexpr(op1addr))); |
| 3019 | op2 = i2; |
| 3020 | assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2))); |
| 3021 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 3022 | store(mkexpr(op1addr), mkexpr(result)); |
| 3023 | |
| 3024 | return "niy"; |
| 3025 | } |
| 3026 | |
| 3027 | static HChar * |
| 3028 | s390_irgen_NIHF(UChar r1, UInt i2) |
| 3029 | { |
| 3030 | IRTemp op1 = newTemp(Ity_I32); |
| 3031 | UInt op2; |
| 3032 | IRTemp result = newTemp(Ity_I32); |
| 3033 | |
| 3034 | assign(op1, get_gpr_w0(r1)); |
| 3035 | op2 = i2; |
| 3036 | assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2))); |
| 3037 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 3038 | put_gpr_w0(r1, mkexpr(result)); |
| 3039 | |
| 3040 | return "nihf"; |
| 3041 | } |
| 3042 | |
| 3043 | static HChar * |
| 3044 | s390_irgen_NIHH(UChar r1, UShort i2) |
| 3045 | { |
| 3046 | IRTemp op1 = newTemp(Ity_I16); |
| 3047 | UShort op2; |
| 3048 | IRTemp result = newTemp(Ity_I16); |
| 3049 | |
| 3050 | assign(op1, get_gpr_hw0(r1)); |
| 3051 | op2 = i2; |
| 3052 | assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2))); |
| 3053 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 3054 | put_gpr_hw0(r1, mkexpr(result)); |
| 3055 | |
| 3056 | return "nihh"; |
| 3057 | } |
| 3058 | |
| 3059 | static HChar * |
| 3060 | s390_irgen_NIHL(UChar r1, UShort i2) |
| 3061 | { |
| 3062 | IRTemp op1 = newTemp(Ity_I16); |
| 3063 | UShort op2; |
| 3064 | IRTemp result = newTemp(Ity_I16); |
| 3065 | |
| 3066 | assign(op1, get_gpr_hw1(r1)); |
| 3067 | op2 = i2; |
| 3068 | assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2))); |
| 3069 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 3070 | put_gpr_hw1(r1, mkexpr(result)); |
| 3071 | |
| 3072 | return "nihl"; |
| 3073 | } |
| 3074 | |
| 3075 | static HChar * |
| 3076 | s390_irgen_NILF(UChar r1, UInt i2) |
| 3077 | { |
| 3078 | IRTemp op1 = newTemp(Ity_I32); |
| 3079 | UInt op2; |
| 3080 | IRTemp result = newTemp(Ity_I32); |
| 3081 | |
| 3082 | assign(op1, get_gpr_w1(r1)); |
| 3083 | op2 = i2; |
| 3084 | assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2))); |
| 3085 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 3086 | put_gpr_w1(r1, mkexpr(result)); |
| 3087 | |
| 3088 | return "nilf"; |
| 3089 | } |
| 3090 | |
| 3091 | static HChar * |
| 3092 | s390_irgen_NILH(UChar r1, UShort i2) |
| 3093 | { |
| 3094 | IRTemp op1 = newTemp(Ity_I16); |
| 3095 | UShort op2; |
| 3096 | IRTemp result = newTemp(Ity_I16); |
| 3097 | |
| 3098 | assign(op1, get_gpr_hw2(r1)); |
| 3099 | op2 = i2; |
| 3100 | assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2))); |
| 3101 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 3102 | put_gpr_hw2(r1, mkexpr(result)); |
| 3103 | |
| 3104 | return "nilh"; |
| 3105 | } |
| 3106 | |
| 3107 | static HChar * |
| 3108 | s390_irgen_NILL(UChar r1, UShort i2) |
| 3109 | { |
| 3110 | IRTemp op1 = newTemp(Ity_I16); |
| 3111 | UShort op2; |
| 3112 | IRTemp result = newTemp(Ity_I16); |
| 3113 | |
| 3114 | assign(op1, get_gpr_hw3(r1)); |
| 3115 | op2 = i2; |
| 3116 | assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2))); |
| 3117 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 3118 | put_gpr_hw3(r1, mkexpr(result)); |
| 3119 | |
| 3120 | return "nill"; |
| 3121 | } |
| 3122 | |
| 3123 | static HChar * |
| 3124 | s390_irgen_BASR(UChar r1, UChar r2) |
| 3125 | { |
| 3126 | IRTemp target = newTemp(Ity_I64); |
| 3127 | |
| 3128 | if (r2 == 0) { |
| 3129 | put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL)); |
| 3130 | } else { |
| 3131 | if (r1 != r2) { |
| 3132 | put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL)); |
| 3133 | call_function(get_gpr_dw0(r2)); |
| 3134 | } else { |
| 3135 | assign(target, get_gpr_dw0(r2)); |
| 3136 | put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL)); |
| 3137 | call_function(mkexpr(target)); |
| 3138 | } |
| 3139 | } |
| 3140 | |
| 3141 | return "basr"; |
| 3142 | } |
| 3143 | |
| 3144 | static HChar * |
| 3145 | s390_irgen_BAS(UChar r1, IRTemp op2addr) |
| 3146 | { |
| 3147 | IRTemp target = newTemp(Ity_I64); |
| 3148 | |
| 3149 | put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL)); |
| 3150 | assign(target, mkexpr(op2addr)); |
| 3151 | call_function(mkexpr(target)); |
| 3152 | |
| 3153 | return "bas"; |
| 3154 | } |
| 3155 | |
| 3156 | static HChar * |
| 3157 | s390_irgen_BCR(UChar r1, UChar r2) |
| 3158 | { |
| 3159 | IRTemp cond = newTemp(Ity_I32); |
| 3160 | |
sewardj | a52e37e | 2011-04-28 18:48:06 +0000 | [diff] [blame] | 3161 | if (r2 == 0 && (r1 >= 14)) { /* serialization */ |
| 3162 | stmt(IRStmt_MBE(Imbe_Fence)); |
| 3163 | } |
| 3164 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3165 | if ((r2 == 0) || (r1 == 0)) { |
| 3166 | } else { |
| 3167 | if (r1 == 15) { |
| 3168 | return_from_function(get_gpr_dw0(r2)); |
| 3169 | } else { |
| 3170 | assign(cond, s390_call_calculate_cond(r1)); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3171 | if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 3172 | get_gpr_dw0(r2)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3173 | } |
| 3174 | } |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 3175 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3176 | s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2); |
| 3177 | |
| 3178 | return "bcr"; |
| 3179 | } |
| 3180 | |
| 3181 | static HChar * |
| 3182 | s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr) |
| 3183 | { |
| 3184 | IRTemp cond = newTemp(Ity_I32); |
| 3185 | |
| 3186 | if (r1 == 0) { |
| 3187 | } else { |
| 3188 | if (r1 == 15) { |
| 3189 | always_goto(mkexpr(op2addr)); |
| 3190 | } else { |
| 3191 | assign(cond, s390_call_calculate_cond(r1)); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3192 | if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 3193 | mkexpr(op2addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3194 | } |
| 3195 | } |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 3196 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3197 | s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2); |
| 3198 | |
| 3199 | return "bc"; |
| 3200 | } |
| 3201 | |
| 3202 | static HChar * |
| 3203 | s390_irgen_BCTR(UChar r1, UChar r2) |
| 3204 | { |
| 3205 | put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1))); |
| 3206 | if (r2 != 0) { |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3207 | if_condition_goto_computed(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)), |
| 3208 | get_gpr_dw0(r2)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3209 | } |
| 3210 | |
| 3211 | return "bctr"; |
| 3212 | } |
| 3213 | |
| 3214 | static HChar * |
| 3215 | s390_irgen_BCTGR(UChar r1, UChar r2) |
| 3216 | { |
| 3217 | put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1))); |
| 3218 | if (r2 != 0) { |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3219 | if_condition_goto_computed(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)), |
| 3220 | get_gpr_dw0(r2)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3221 | } |
| 3222 | |
| 3223 | return "bctgr"; |
| 3224 | } |
| 3225 | |
| 3226 | static HChar * |
| 3227 | s390_irgen_BCT(UChar r1, IRTemp op2addr) |
| 3228 | { |
| 3229 | put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1))); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3230 | if_condition_goto_computed(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)), |
| 3231 | mkexpr(op2addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3232 | |
| 3233 | return "bct"; |
| 3234 | } |
| 3235 | |
| 3236 | static HChar * |
| 3237 | s390_irgen_BCTG(UChar r1, IRTemp op2addr) |
| 3238 | { |
| 3239 | put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1))); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3240 | if_condition_goto_computed(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)), |
| 3241 | mkexpr(op2addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3242 | |
| 3243 | return "bctg"; |
| 3244 | } |
| 3245 | |
| 3246 | static HChar * |
| 3247 | s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr) |
| 3248 | { |
| 3249 | IRTemp value = newTemp(Ity_I32); |
| 3250 | |
| 3251 | assign(value, get_gpr_w1(r3 | 1)); |
| 3252 | put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3))); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3253 | if_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value), |
| 3254 | get_gpr_w1(r1)), mkexpr(op2addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3255 | |
| 3256 | return "bxh"; |
| 3257 | } |
| 3258 | |
| 3259 | static HChar * |
| 3260 | s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr) |
| 3261 | { |
| 3262 | IRTemp value = newTemp(Ity_I64); |
| 3263 | |
| 3264 | assign(value, get_gpr_dw0(r3 | 1)); |
| 3265 | put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3))); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3266 | if_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value), |
| 3267 | get_gpr_dw0(r1)), mkexpr(op2addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3268 | |
| 3269 | return "bxhg"; |
| 3270 | } |
| 3271 | |
| 3272 | static HChar * |
| 3273 | s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr) |
| 3274 | { |
| 3275 | IRTemp value = newTemp(Ity_I32); |
| 3276 | |
| 3277 | assign(value, get_gpr_w1(r3 | 1)); |
| 3278 | put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3))); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3279 | if_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1), |
| 3280 | mkexpr(value)), mkexpr(op2addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3281 | |
| 3282 | return "bxle"; |
| 3283 | } |
| 3284 | |
| 3285 | static HChar * |
| 3286 | s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr) |
| 3287 | { |
| 3288 | IRTemp value = newTemp(Ity_I64); |
| 3289 | |
| 3290 | assign(value, get_gpr_dw0(r3 | 1)); |
| 3291 | put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3))); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3292 | if_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1), |
| 3293 | mkexpr(value)), mkexpr(op2addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3294 | |
| 3295 | return "bxleg"; |
| 3296 | } |
| 3297 | |
| 3298 | static HChar * |
| 3299 | s390_irgen_BRAS(UChar r1, UShort i2) |
| 3300 | { |
| 3301 | put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL)); |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 3302 | call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3303 | |
| 3304 | return "bras"; |
| 3305 | } |
| 3306 | |
| 3307 | static HChar * |
| 3308 | s390_irgen_BRASL(UChar r1, UInt i2) |
| 3309 | { |
| 3310 | put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL)); |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 3311 | call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3312 | |
| 3313 | return "brasl"; |
| 3314 | } |
| 3315 | |
| 3316 | static HChar * |
| 3317 | s390_irgen_BRC(UChar r1, UShort i2) |
| 3318 | { |
| 3319 | IRTemp cond = newTemp(Ity_I32); |
| 3320 | |
| 3321 | if (r1 == 0) { |
| 3322 | } else { |
| 3323 | if (r1 == 15) { |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 3324 | always_goto_and_chase( |
| 3325 | guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3326 | } else { |
| 3327 | assign(cond, s390_call_calculate_cond(r1)); |
| 3328 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 3329 | guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); |
| 3330 | |
| 3331 | } |
| 3332 | } |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 3333 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3334 | s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2); |
| 3335 | |
| 3336 | return "brc"; |
| 3337 | } |
| 3338 | |
| 3339 | static HChar * |
| 3340 | s390_irgen_BRCL(UChar r1, UInt i2) |
| 3341 | { |
| 3342 | IRTemp cond = newTemp(Ity_I32); |
| 3343 | |
| 3344 | if (r1 == 0) { |
| 3345 | } else { |
| 3346 | if (r1 == 15) { |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 3347 | always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3348 | } else { |
| 3349 | assign(cond, s390_call_calculate_cond(r1)); |
| 3350 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 3351 | guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)); |
| 3352 | } |
| 3353 | } |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 3354 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3355 | s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2); |
| 3356 | |
| 3357 | return "brcl"; |
| 3358 | } |
| 3359 | |
| 3360 | static HChar * |
| 3361 | s390_irgen_BRCT(UChar r1, UShort i2) |
| 3362 | { |
| 3363 | put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1))); |
| 3364 | if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)), |
| 3365 | guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); |
| 3366 | |
| 3367 | return "brct"; |
| 3368 | } |
| 3369 | |
| 3370 | static HChar * |
| 3371 | s390_irgen_BRCTG(UChar r1, UShort i2) |
| 3372 | { |
| 3373 | put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1))); |
| 3374 | if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)), |
| 3375 | guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); |
| 3376 | |
| 3377 | return "brctg"; |
| 3378 | } |
| 3379 | |
| 3380 | static HChar * |
| 3381 | s390_irgen_BRXH(UChar r1, UChar r3, UShort i2) |
| 3382 | { |
| 3383 | IRTemp value = newTemp(Ity_I32); |
| 3384 | |
| 3385 | assign(value, get_gpr_w1(r3 | 1)); |
| 3386 | put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3))); |
| 3387 | if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)), |
| 3388 | guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); |
| 3389 | |
| 3390 | return "brxh"; |
| 3391 | } |
| 3392 | |
| 3393 | static HChar * |
| 3394 | s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2) |
| 3395 | { |
| 3396 | IRTemp value = newTemp(Ity_I64); |
| 3397 | |
| 3398 | assign(value, get_gpr_dw0(r3 | 1)); |
| 3399 | put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3))); |
| 3400 | if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)), |
| 3401 | guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); |
| 3402 | |
| 3403 | return "brxhg"; |
| 3404 | } |
| 3405 | |
| 3406 | static HChar * |
| 3407 | s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2) |
| 3408 | { |
| 3409 | IRTemp value = newTemp(Ity_I32); |
| 3410 | |
| 3411 | assign(value, get_gpr_w1(r3 | 1)); |
| 3412 | put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3))); |
| 3413 | if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)), |
| 3414 | guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); |
| 3415 | |
| 3416 | return "brxle"; |
| 3417 | } |
| 3418 | |
| 3419 | static HChar * |
| 3420 | s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2) |
| 3421 | { |
| 3422 | IRTemp value = newTemp(Ity_I64); |
| 3423 | |
| 3424 | assign(value, get_gpr_dw0(r3 | 1)); |
| 3425 | put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3))); |
| 3426 | if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)), |
| 3427 | guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); |
| 3428 | |
| 3429 | return "brxlg"; |
| 3430 | } |
| 3431 | |
| 3432 | static HChar * |
| 3433 | s390_irgen_CR(UChar r1, UChar r2) |
| 3434 | { |
| 3435 | IRTemp op1 = newTemp(Ity_I32); |
| 3436 | IRTemp op2 = newTemp(Ity_I32); |
| 3437 | |
| 3438 | assign(op1, get_gpr_w1(r1)); |
| 3439 | assign(op2, get_gpr_w1(r2)); |
| 3440 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3441 | |
| 3442 | return "cr"; |
| 3443 | } |
| 3444 | |
| 3445 | static HChar * |
| 3446 | s390_irgen_CGR(UChar r1, UChar r2) |
| 3447 | { |
| 3448 | IRTemp op1 = newTemp(Ity_I64); |
| 3449 | IRTemp op2 = newTemp(Ity_I64); |
| 3450 | |
| 3451 | assign(op1, get_gpr_dw0(r1)); |
| 3452 | assign(op2, get_gpr_dw0(r2)); |
| 3453 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3454 | |
| 3455 | return "cgr"; |
| 3456 | } |
| 3457 | |
| 3458 | static HChar * |
| 3459 | s390_irgen_CGFR(UChar r1, UChar r2) |
| 3460 | { |
| 3461 | IRTemp op1 = newTemp(Ity_I64); |
| 3462 | IRTemp op2 = newTemp(Ity_I64); |
| 3463 | |
| 3464 | assign(op1, get_gpr_dw0(r1)); |
| 3465 | assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); |
| 3466 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3467 | |
| 3468 | return "cgfr"; |
| 3469 | } |
| 3470 | |
| 3471 | static HChar * |
| 3472 | s390_irgen_C(UChar r1, IRTemp op2addr) |
| 3473 | { |
| 3474 | IRTemp op1 = newTemp(Ity_I32); |
| 3475 | IRTemp op2 = newTemp(Ity_I32); |
| 3476 | |
| 3477 | assign(op1, get_gpr_w1(r1)); |
| 3478 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 3479 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3480 | |
| 3481 | return "c"; |
| 3482 | } |
| 3483 | |
| 3484 | static HChar * |
| 3485 | s390_irgen_CY(UChar r1, IRTemp op2addr) |
| 3486 | { |
| 3487 | IRTemp op1 = newTemp(Ity_I32); |
| 3488 | IRTemp op2 = newTemp(Ity_I32); |
| 3489 | |
| 3490 | assign(op1, get_gpr_w1(r1)); |
| 3491 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 3492 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3493 | |
| 3494 | return "cy"; |
| 3495 | } |
| 3496 | |
| 3497 | static HChar * |
| 3498 | s390_irgen_CG(UChar r1, IRTemp op2addr) |
| 3499 | { |
| 3500 | IRTemp op1 = newTemp(Ity_I64); |
| 3501 | IRTemp op2 = newTemp(Ity_I64); |
| 3502 | |
| 3503 | assign(op1, get_gpr_dw0(r1)); |
| 3504 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 3505 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3506 | |
| 3507 | return "cg"; |
| 3508 | } |
| 3509 | |
| 3510 | static HChar * |
| 3511 | s390_irgen_CGF(UChar r1, IRTemp op2addr) |
| 3512 | { |
| 3513 | IRTemp op1 = newTemp(Ity_I64); |
| 3514 | IRTemp op2 = newTemp(Ity_I64); |
| 3515 | |
| 3516 | assign(op1, get_gpr_dw0(r1)); |
| 3517 | assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); |
| 3518 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3519 | |
| 3520 | return "cgf"; |
| 3521 | } |
| 3522 | |
| 3523 | static HChar * |
| 3524 | s390_irgen_CFI(UChar r1, UInt i2) |
| 3525 | { |
| 3526 | IRTemp op1 = newTemp(Ity_I32); |
| 3527 | Int op2; |
| 3528 | |
| 3529 | assign(op1, get_gpr_w1(r1)); |
| 3530 | op2 = (Int)i2; |
| 3531 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32, |
| 3532 | mkU32((UInt)op2))); |
| 3533 | |
| 3534 | return "cfi"; |
| 3535 | } |
| 3536 | |
| 3537 | static HChar * |
| 3538 | s390_irgen_CGFI(UChar r1, UInt i2) |
| 3539 | { |
| 3540 | IRTemp op1 = newTemp(Ity_I64); |
| 3541 | Long op2; |
| 3542 | |
| 3543 | assign(op1, get_gpr_dw0(r1)); |
| 3544 | op2 = (Long)(Int)i2; |
| 3545 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64, |
| 3546 | mkU64((ULong)op2))); |
| 3547 | |
| 3548 | return "cgfi"; |
| 3549 | } |
| 3550 | |
| 3551 | static HChar * |
| 3552 | s390_irgen_CRL(UChar r1, UInt i2) |
| 3553 | { |
| 3554 | IRTemp op1 = newTemp(Ity_I32); |
| 3555 | IRTemp op2 = newTemp(Ity_I32); |
| 3556 | |
| 3557 | assign(op1, get_gpr_w1(r1)); |
| 3558 | assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) |
| 3559 | i2 << 1)))); |
| 3560 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3561 | |
| 3562 | return "crl"; |
| 3563 | } |
| 3564 | |
| 3565 | static HChar * |
| 3566 | s390_irgen_CGRL(UChar r1, UInt i2) |
| 3567 | { |
| 3568 | IRTemp op1 = newTemp(Ity_I64); |
| 3569 | IRTemp op2 = newTemp(Ity_I64); |
| 3570 | |
| 3571 | assign(op1, get_gpr_dw0(r1)); |
| 3572 | assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) |
| 3573 | i2 << 1)))); |
| 3574 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3575 | |
| 3576 | return "cgrl"; |
| 3577 | } |
| 3578 | |
| 3579 | static HChar * |
| 3580 | s390_irgen_CGFRL(UChar r1, UInt i2) |
| 3581 | { |
| 3582 | IRTemp op1 = newTemp(Ity_I64); |
| 3583 | IRTemp op2 = newTemp(Ity_I64); |
| 3584 | |
| 3585 | assign(op1, get_gpr_dw0(r1)); |
| 3586 | assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr + |
| 3587 | ((ULong)(Long)(Int)i2 << 1))))); |
| 3588 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3589 | |
| 3590 | return "cgfrl"; |
| 3591 | } |
| 3592 | |
| 3593 | static HChar * |
| 3594 | s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr) |
| 3595 | { |
| 3596 | IRTemp op1 = newTemp(Ity_I32); |
| 3597 | IRTemp op2 = newTemp(Ity_I32); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3598 | IRTemp cond = newTemp(Ity_I32); |
| 3599 | |
| 3600 | if (m3 == 0) { |
| 3601 | } else { |
| 3602 | if (m3 == 14) { |
| 3603 | always_goto(mkexpr(op4addr)); |
| 3604 | } else { |
| 3605 | assign(op1, get_gpr_w1(r1)); |
| 3606 | assign(op2, get_gpr_w1(r2)); |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 3607 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, |
| 3608 | op1, op2)); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3609 | if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), |
| 3610 | mkU32(0)), mkexpr(op4addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3611 | } |
| 3612 | } |
| 3613 | |
| 3614 | return "crb"; |
| 3615 | } |
| 3616 | |
| 3617 | static HChar * |
| 3618 | s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr) |
| 3619 | { |
| 3620 | IRTemp op1 = newTemp(Ity_I64); |
| 3621 | IRTemp op2 = newTemp(Ity_I64); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3622 | IRTemp cond = newTemp(Ity_I32); |
| 3623 | |
| 3624 | if (m3 == 0) { |
| 3625 | } else { |
| 3626 | if (m3 == 14) { |
| 3627 | always_goto(mkexpr(op4addr)); |
| 3628 | } else { |
| 3629 | assign(op1, get_gpr_dw0(r1)); |
| 3630 | assign(op2, get_gpr_dw0(r2)); |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 3631 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, |
| 3632 | op1, op2)); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3633 | if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), |
| 3634 | mkU32(0)), mkexpr(op4addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3635 | } |
| 3636 | } |
| 3637 | |
| 3638 | return "cgrb"; |
| 3639 | } |
| 3640 | |
| 3641 | static HChar * |
| 3642 | s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3) |
| 3643 | { |
| 3644 | IRTemp op1 = newTemp(Ity_I32); |
| 3645 | IRTemp op2 = newTemp(Ity_I32); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3646 | IRTemp cond = newTemp(Ity_I32); |
| 3647 | |
| 3648 | if (m3 == 0) { |
| 3649 | } else { |
| 3650 | if (m3 == 14) { |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 3651 | always_goto_and_chase( |
| 3652 | guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3653 | } else { |
| 3654 | assign(op1, get_gpr_w1(r1)); |
| 3655 | assign(op2, get_gpr_w1(r2)); |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 3656 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, |
| 3657 | op1, op2)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3658 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 3659 | guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
| 3660 | |
| 3661 | } |
| 3662 | } |
| 3663 | |
| 3664 | return "crj"; |
| 3665 | } |
| 3666 | |
| 3667 | static HChar * |
| 3668 | s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3) |
| 3669 | { |
| 3670 | IRTemp op1 = newTemp(Ity_I64); |
| 3671 | IRTemp op2 = newTemp(Ity_I64); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3672 | IRTemp cond = newTemp(Ity_I32); |
| 3673 | |
| 3674 | if (m3 == 0) { |
| 3675 | } else { |
| 3676 | if (m3 == 14) { |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 3677 | always_goto_and_chase( |
| 3678 | guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3679 | } else { |
| 3680 | assign(op1, get_gpr_dw0(r1)); |
| 3681 | assign(op2, get_gpr_dw0(r2)); |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 3682 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, |
| 3683 | op1, op2)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3684 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 3685 | guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
| 3686 | |
| 3687 | } |
| 3688 | } |
| 3689 | |
| 3690 | return "cgrj"; |
| 3691 | } |
| 3692 | |
| 3693 | static HChar * |
| 3694 | s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr) |
| 3695 | { |
| 3696 | IRTemp op1 = newTemp(Ity_I32); |
| 3697 | Int op2; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3698 | IRTemp cond = newTemp(Ity_I32); |
| 3699 | |
| 3700 | if (m3 == 0) { |
| 3701 | } else { |
| 3702 | if (m3 == 14) { |
| 3703 | always_goto(mkexpr(op4addr)); |
| 3704 | } else { |
| 3705 | assign(op1, get_gpr_w1(r1)); |
| 3706 | op2 = (Int)(Char)i2; |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 3707 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1, |
| 3708 | mktemp(Ity_I32, mkU32((UInt)op2)))); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3709 | if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 3710 | mkexpr(op4addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3711 | } |
| 3712 | } |
| 3713 | |
| 3714 | return "cib"; |
| 3715 | } |
| 3716 | |
| 3717 | static HChar * |
| 3718 | s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr) |
| 3719 | { |
| 3720 | IRTemp op1 = newTemp(Ity_I64); |
| 3721 | Long op2; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3722 | IRTemp cond = newTemp(Ity_I32); |
| 3723 | |
| 3724 | if (m3 == 0) { |
| 3725 | } else { |
| 3726 | if (m3 == 14) { |
| 3727 | always_goto(mkexpr(op4addr)); |
| 3728 | } else { |
| 3729 | assign(op1, get_gpr_dw0(r1)); |
| 3730 | op2 = (Long)(Char)i2; |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 3731 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1, |
| 3732 | mktemp(Ity_I64, mkU64((ULong)op2)))); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 3733 | if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 3734 | mkexpr(op4addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3735 | } |
| 3736 | } |
| 3737 | |
| 3738 | return "cgib"; |
| 3739 | } |
| 3740 | |
| 3741 | static HChar * |
| 3742 | s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2) |
| 3743 | { |
| 3744 | IRTemp op1 = newTemp(Ity_I32); |
| 3745 | Int op2; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3746 | IRTemp cond = newTemp(Ity_I32); |
| 3747 | |
| 3748 | if (m3 == 0) { |
| 3749 | } else { |
| 3750 | if (m3 == 14) { |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 3751 | always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3752 | } else { |
| 3753 | assign(op1, get_gpr_w1(r1)); |
| 3754 | op2 = (Int)(Char)i2; |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 3755 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1, |
| 3756 | mktemp(Ity_I32, mkU32((UInt)op2)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3757 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 3758 | guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
| 3759 | |
| 3760 | } |
| 3761 | } |
| 3762 | |
| 3763 | return "cij"; |
| 3764 | } |
| 3765 | |
| 3766 | static HChar * |
| 3767 | s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2) |
| 3768 | { |
| 3769 | IRTemp op1 = newTemp(Ity_I64); |
| 3770 | Long op2; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3771 | IRTemp cond = newTemp(Ity_I32); |
| 3772 | |
| 3773 | if (m3 == 0) { |
| 3774 | } else { |
| 3775 | if (m3 == 14) { |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 3776 | always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3777 | } else { |
| 3778 | assign(op1, get_gpr_dw0(r1)); |
| 3779 | op2 = (Long)(Char)i2; |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 3780 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1, |
| 3781 | mktemp(Ity_I64, mkU64((ULong)op2)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 3782 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 3783 | guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
| 3784 | |
| 3785 | } |
| 3786 | } |
| 3787 | |
| 3788 | return "cgij"; |
| 3789 | } |
| 3790 | |
| 3791 | static HChar * |
| 3792 | s390_irgen_CH(UChar r1, IRTemp op2addr) |
| 3793 | { |
| 3794 | IRTemp op1 = newTemp(Ity_I32); |
| 3795 | IRTemp op2 = newTemp(Ity_I32); |
| 3796 | |
| 3797 | assign(op1, get_gpr_w1(r1)); |
| 3798 | assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); |
| 3799 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3800 | |
| 3801 | return "ch"; |
| 3802 | } |
| 3803 | |
| 3804 | static HChar * |
| 3805 | s390_irgen_CHY(UChar r1, IRTemp op2addr) |
| 3806 | { |
| 3807 | IRTemp op1 = newTemp(Ity_I32); |
| 3808 | IRTemp op2 = newTemp(Ity_I32); |
| 3809 | |
| 3810 | assign(op1, get_gpr_w1(r1)); |
| 3811 | assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); |
| 3812 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3813 | |
| 3814 | return "chy"; |
| 3815 | } |
| 3816 | |
| 3817 | static HChar * |
| 3818 | s390_irgen_CGH(UChar r1, IRTemp op2addr) |
| 3819 | { |
| 3820 | IRTemp op1 = newTemp(Ity_I64); |
| 3821 | IRTemp op2 = newTemp(Ity_I64); |
| 3822 | |
| 3823 | assign(op1, get_gpr_dw0(r1)); |
| 3824 | assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr)))); |
| 3825 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3826 | |
| 3827 | return "cgh"; |
| 3828 | } |
| 3829 | |
| 3830 | static HChar * |
| 3831 | s390_irgen_CHI(UChar r1, UShort i2) |
| 3832 | { |
| 3833 | IRTemp op1 = newTemp(Ity_I32); |
| 3834 | Int op2; |
| 3835 | |
| 3836 | assign(op1, get_gpr_w1(r1)); |
| 3837 | op2 = (Int)(Short)i2; |
| 3838 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32, |
| 3839 | mkU32((UInt)op2))); |
| 3840 | |
| 3841 | return "chi"; |
| 3842 | } |
| 3843 | |
| 3844 | static HChar * |
| 3845 | s390_irgen_CGHI(UChar r1, UShort i2) |
| 3846 | { |
| 3847 | IRTemp op1 = newTemp(Ity_I64); |
| 3848 | Long op2; |
| 3849 | |
| 3850 | assign(op1, get_gpr_dw0(r1)); |
| 3851 | op2 = (Long)(Short)i2; |
| 3852 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64, |
| 3853 | mkU64((ULong)op2))); |
| 3854 | |
| 3855 | return "cghi"; |
| 3856 | } |
| 3857 | |
| 3858 | static HChar * |
| 3859 | s390_irgen_CHHSI(UShort i2, IRTemp op1addr) |
| 3860 | { |
| 3861 | IRTemp op1 = newTemp(Ity_I16); |
| 3862 | Short op2; |
| 3863 | |
| 3864 | assign(op1, load(Ity_I16, mkexpr(op1addr))); |
| 3865 | op2 = (Short)i2; |
| 3866 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16, |
| 3867 | mkU16((UShort)op2))); |
| 3868 | |
| 3869 | return "chhsi"; |
| 3870 | } |
| 3871 | |
| 3872 | static HChar * |
| 3873 | s390_irgen_CHSI(UShort i2, IRTemp op1addr) |
| 3874 | { |
| 3875 | IRTemp op1 = newTemp(Ity_I32); |
| 3876 | Int op2; |
| 3877 | |
| 3878 | assign(op1, load(Ity_I32, mkexpr(op1addr))); |
| 3879 | op2 = (Int)(Short)i2; |
| 3880 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32, |
| 3881 | mkU32((UInt)op2))); |
| 3882 | |
| 3883 | return "chsi"; |
| 3884 | } |
| 3885 | |
| 3886 | static HChar * |
| 3887 | s390_irgen_CGHSI(UShort i2, IRTemp op1addr) |
| 3888 | { |
| 3889 | IRTemp op1 = newTemp(Ity_I64); |
| 3890 | Long op2; |
| 3891 | |
| 3892 | assign(op1, load(Ity_I64, mkexpr(op1addr))); |
| 3893 | op2 = (Long)(Short)i2; |
| 3894 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64, |
| 3895 | mkU64((ULong)op2))); |
| 3896 | |
| 3897 | return "cghsi"; |
| 3898 | } |
| 3899 | |
| 3900 | static HChar * |
| 3901 | s390_irgen_CHRL(UChar r1, UInt i2) |
| 3902 | { |
| 3903 | IRTemp op1 = newTemp(Ity_I32); |
| 3904 | IRTemp op2 = newTemp(Ity_I32); |
| 3905 | |
| 3906 | assign(op1, get_gpr_w1(r1)); |
| 3907 | assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr + |
| 3908 | ((ULong)(Long)(Int)i2 << 1))))); |
| 3909 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3910 | |
| 3911 | return "chrl"; |
| 3912 | } |
| 3913 | |
| 3914 | static HChar * |
| 3915 | s390_irgen_CGHRL(UChar r1, UInt i2) |
| 3916 | { |
| 3917 | IRTemp op1 = newTemp(Ity_I64); |
| 3918 | IRTemp op2 = newTemp(Ity_I64); |
| 3919 | |
| 3920 | assign(op1, get_gpr_dw0(r1)); |
| 3921 | assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr + |
| 3922 | ((ULong)(Long)(Int)i2 << 1))))); |
| 3923 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3924 | |
| 3925 | return "cghrl"; |
| 3926 | } |
| 3927 | |
| 3928 | static HChar * |
| 3929 | s390_irgen_CHHR(UChar r1, UChar r2) |
| 3930 | { |
| 3931 | IRTemp op1 = newTemp(Ity_I32); |
| 3932 | IRTemp op2 = newTemp(Ity_I32); |
| 3933 | |
| 3934 | assign(op1, get_gpr_w0(r1)); |
| 3935 | assign(op2, get_gpr_w0(r2)); |
| 3936 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3937 | |
| 3938 | return "chhr"; |
| 3939 | } |
| 3940 | |
| 3941 | static HChar * |
| 3942 | s390_irgen_CHLR(UChar r1, UChar r2) |
| 3943 | { |
| 3944 | IRTemp op1 = newTemp(Ity_I32); |
| 3945 | IRTemp op2 = newTemp(Ity_I32); |
| 3946 | |
| 3947 | assign(op1, get_gpr_w0(r1)); |
| 3948 | assign(op2, get_gpr_w1(r2)); |
| 3949 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3950 | |
| 3951 | return "chlr"; |
| 3952 | } |
| 3953 | |
| 3954 | static HChar * |
| 3955 | s390_irgen_CHF(UChar r1, IRTemp op2addr) |
| 3956 | { |
| 3957 | IRTemp op1 = newTemp(Ity_I32); |
| 3958 | IRTemp op2 = newTemp(Ity_I32); |
| 3959 | |
| 3960 | assign(op1, get_gpr_w0(r1)); |
| 3961 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 3962 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); |
| 3963 | |
| 3964 | return "chf"; |
| 3965 | } |
| 3966 | |
| 3967 | static HChar * |
| 3968 | s390_irgen_CIH(UChar r1, UInt i2) |
| 3969 | { |
| 3970 | IRTemp op1 = newTemp(Ity_I32); |
| 3971 | Int op2; |
| 3972 | |
| 3973 | assign(op1, get_gpr_w0(r1)); |
| 3974 | op2 = (Int)i2; |
| 3975 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32, |
| 3976 | mkU32((UInt)op2))); |
| 3977 | |
| 3978 | return "cih"; |
| 3979 | } |
| 3980 | |
| 3981 | static HChar * |
| 3982 | s390_irgen_CLR(UChar r1, UChar r2) |
| 3983 | { |
| 3984 | IRTemp op1 = newTemp(Ity_I32); |
| 3985 | IRTemp op2 = newTemp(Ity_I32); |
| 3986 | |
| 3987 | assign(op1, get_gpr_w1(r1)); |
| 3988 | assign(op2, get_gpr_w1(r2)); |
| 3989 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 3990 | |
| 3991 | return "clr"; |
| 3992 | } |
| 3993 | |
| 3994 | static HChar * |
| 3995 | s390_irgen_CLGR(UChar r1, UChar r2) |
| 3996 | { |
| 3997 | IRTemp op1 = newTemp(Ity_I64); |
| 3998 | IRTemp op2 = newTemp(Ity_I64); |
| 3999 | |
| 4000 | assign(op1, get_gpr_dw0(r1)); |
| 4001 | assign(op2, get_gpr_dw0(r2)); |
| 4002 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4003 | |
| 4004 | return "clgr"; |
| 4005 | } |
| 4006 | |
| 4007 | static HChar * |
| 4008 | s390_irgen_CLGFR(UChar r1, UChar r2) |
| 4009 | { |
| 4010 | IRTemp op1 = newTemp(Ity_I64); |
| 4011 | IRTemp op2 = newTemp(Ity_I64); |
| 4012 | |
| 4013 | assign(op1, get_gpr_dw0(r1)); |
| 4014 | assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2))); |
| 4015 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4016 | |
| 4017 | return "clgfr"; |
| 4018 | } |
| 4019 | |
| 4020 | static HChar * |
| 4021 | s390_irgen_CL(UChar r1, IRTemp op2addr) |
| 4022 | { |
| 4023 | IRTemp op1 = newTemp(Ity_I32); |
| 4024 | IRTemp op2 = newTemp(Ity_I32); |
| 4025 | |
| 4026 | assign(op1, get_gpr_w1(r1)); |
| 4027 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 4028 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4029 | |
| 4030 | return "cl"; |
| 4031 | } |
| 4032 | |
| 4033 | static HChar * |
| 4034 | s390_irgen_CLY(UChar r1, IRTemp op2addr) |
| 4035 | { |
| 4036 | IRTemp op1 = newTemp(Ity_I32); |
| 4037 | IRTemp op2 = newTemp(Ity_I32); |
| 4038 | |
| 4039 | assign(op1, get_gpr_w1(r1)); |
| 4040 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 4041 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4042 | |
| 4043 | return "cly"; |
| 4044 | } |
| 4045 | |
| 4046 | static HChar * |
| 4047 | s390_irgen_CLG(UChar r1, IRTemp op2addr) |
| 4048 | { |
| 4049 | IRTemp op1 = newTemp(Ity_I64); |
| 4050 | IRTemp op2 = newTemp(Ity_I64); |
| 4051 | |
| 4052 | assign(op1, get_gpr_dw0(r1)); |
| 4053 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 4054 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4055 | |
| 4056 | return "clg"; |
| 4057 | } |
| 4058 | |
| 4059 | static HChar * |
| 4060 | s390_irgen_CLGF(UChar r1, IRTemp op2addr) |
| 4061 | { |
| 4062 | IRTemp op1 = newTemp(Ity_I64); |
| 4063 | IRTemp op2 = newTemp(Ity_I64); |
| 4064 | |
| 4065 | assign(op1, get_gpr_dw0(r1)); |
| 4066 | assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr)))); |
| 4067 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4068 | |
| 4069 | return "clgf"; |
| 4070 | } |
| 4071 | |
| 4072 | static HChar * |
| 4073 | s390_irgen_CLFI(UChar r1, UInt i2) |
| 4074 | { |
| 4075 | IRTemp op1 = newTemp(Ity_I32); |
| 4076 | UInt op2; |
| 4077 | |
| 4078 | assign(op1, get_gpr_w1(r1)); |
| 4079 | op2 = i2; |
| 4080 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32, |
| 4081 | mkU32(op2))); |
| 4082 | |
| 4083 | return "clfi"; |
| 4084 | } |
| 4085 | |
| 4086 | static HChar * |
| 4087 | s390_irgen_CLGFI(UChar r1, UInt i2) |
| 4088 | { |
| 4089 | IRTemp op1 = newTemp(Ity_I64); |
| 4090 | ULong op2; |
| 4091 | |
| 4092 | assign(op1, get_gpr_dw0(r1)); |
| 4093 | op2 = (ULong)i2; |
| 4094 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64, |
| 4095 | mkU64(op2))); |
| 4096 | |
| 4097 | return "clgfi"; |
| 4098 | } |
| 4099 | |
| 4100 | static HChar * |
| 4101 | s390_irgen_CLI(UChar i2, IRTemp op1addr) |
| 4102 | { |
| 4103 | IRTemp op1 = newTemp(Ity_I8); |
| 4104 | UChar op2; |
| 4105 | |
| 4106 | assign(op1, load(Ity_I8, mkexpr(op1addr))); |
| 4107 | op2 = i2; |
| 4108 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8, |
| 4109 | mkU8(op2))); |
| 4110 | |
| 4111 | return "cli"; |
| 4112 | } |
| 4113 | |
| 4114 | static HChar * |
| 4115 | s390_irgen_CLIY(UChar i2, IRTemp op1addr) |
| 4116 | { |
| 4117 | IRTemp op1 = newTemp(Ity_I8); |
| 4118 | UChar op2; |
| 4119 | |
| 4120 | assign(op1, load(Ity_I8, mkexpr(op1addr))); |
| 4121 | op2 = i2; |
| 4122 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8, |
| 4123 | mkU8(op2))); |
| 4124 | |
| 4125 | return "cliy"; |
| 4126 | } |
| 4127 | |
| 4128 | static HChar * |
| 4129 | s390_irgen_CLFHSI(UShort i2, IRTemp op1addr) |
| 4130 | { |
| 4131 | IRTemp op1 = newTemp(Ity_I32); |
| 4132 | UInt op2; |
| 4133 | |
| 4134 | assign(op1, load(Ity_I32, mkexpr(op1addr))); |
| 4135 | op2 = (UInt)i2; |
| 4136 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32, |
| 4137 | mkU32(op2))); |
| 4138 | |
| 4139 | return "clfhsi"; |
| 4140 | } |
| 4141 | |
| 4142 | static HChar * |
| 4143 | s390_irgen_CLGHSI(UShort i2, IRTemp op1addr) |
| 4144 | { |
| 4145 | IRTemp op1 = newTemp(Ity_I64); |
| 4146 | ULong op2; |
| 4147 | |
| 4148 | assign(op1, load(Ity_I64, mkexpr(op1addr))); |
| 4149 | op2 = (ULong)i2; |
| 4150 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64, |
| 4151 | mkU64(op2))); |
| 4152 | |
| 4153 | return "clghsi"; |
| 4154 | } |
| 4155 | |
| 4156 | static HChar * |
| 4157 | s390_irgen_CLHHSI(UShort i2, IRTemp op1addr) |
| 4158 | { |
| 4159 | IRTemp op1 = newTemp(Ity_I16); |
| 4160 | UShort op2; |
| 4161 | |
| 4162 | assign(op1, load(Ity_I16, mkexpr(op1addr))); |
| 4163 | op2 = i2; |
| 4164 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16, |
| 4165 | mkU16(op2))); |
| 4166 | |
| 4167 | return "clhhsi"; |
| 4168 | } |
| 4169 | |
| 4170 | static HChar * |
| 4171 | s390_irgen_CLRL(UChar r1, UInt i2) |
| 4172 | { |
| 4173 | IRTemp op1 = newTemp(Ity_I32); |
| 4174 | IRTemp op2 = newTemp(Ity_I32); |
| 4175 | |
| 4176 | assign(op1, get_gpr_w1(r1)); |
| 4177 | assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) |
| 4178 | i2 << 1)))); |
| 4179 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4180 | |
| 4181 | return "clrl"; |
| 4182 | } |
| 4183 | |
| 4184 | static HChar * |
| 4185 | s390_irgen_CLGRL(UChar r1, UInt i2) |
| 4186 | { |
| 4187 | IRTemp op1 = newTemp(Ity_I64); |
| 4188 | IRTemp op2 = newTemp(Ity_I64); |
| 4189 | |
| 4190 | assign(op1, get_gpr_dw0(r1)); |
| 4191 | assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) |
| 4192 | i2 << 1)))); |
| 4193 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4194 | |
| 4195 | return "clgrl"; |
| 4196 | } |
| 4197 | |
| 4198 | static HChar * |
| 4199 | s390_irgen_CLGFRL(UChar r1, UInt i2) |
| 4200 | { |
| 4201 | IRTemp op1 = newTemp(Ity_I64); |
| 4202 | IRTemp op2 = newTemp(Ity_I64); |
| 4203 | |
| 4204 | assign(op1, get_gpr_dw0(r1)); |
| 4205 | assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr + |
| 4206 | ((ULong)(Long)(Int)i2 << 1))))); |
| 4207 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4208 | |
| 4209 | return "clgfrl"; |
| 4210 | } |
| 4211 | |
| 4212 | static HChar * |
| 4213 | s390_irgen_CLHRL(UChar r1, UInt i2) |
| 4214 | { |
| 4215 | IRTemp op1 = newTemp(Ity_I32); |
| 4216 | IRTemp op2 = newTemp(Ity_I32); |
| 4217 | |
| 4218 | assign(op1, get_gpr_w1(r1)); |
| 4219 | assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr + |
| 4220 | ((ULong)(Long)(Int)i2 << 1))))); |
| 4221 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4222 | |
| 4223 | return "clhrl"; |
| 4224 | } |
| 4225 | |
| 4226 | static HChar * |
| 4227 | s390_irgen_CLGHRL(UChar r1, UInt i2) |
| 4228 | { |
| 4229 | IRTemp op1 = newTemp(Ity_I64); |
| 4230 | IRTemp op2 = newTemp(Ity_I64); |
| 4231 | |
| 4232 | assign(op1, get_gpr_dw0(r1)); |
| 4233 | assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr + |
| 4234 | ((ULong)(Long)(Int)i2 << 1))))); |
| 4235 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4236 | |
| 4237 | return "clghrl"; |
| 4238 | } |
| 4239 | |
| 4240 | static HChar * |
| 4241 | s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr) |
| 4242 | { |
| 4243 | IRTemp op1 = newTemp(Ity_I32); |
| 4244 | IRTemp op2 = newTemp(Ity_I32); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4245 | IRTemp cond = newTemp(Ity_I32); |
| 4246 | |
| 4247 | if (m3 == 0) { |
| 4248 | } else { |
| 4249 | if (m3 == 14) { |
| 4250 | always_goto(mkexpr(op4addr)); |
| 4251 | } else { |
| 4252 | assign(op1, get_gpr_w1(r1)); |
| 4253 | assign(op2, get_gpr_w1(r2)); |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 4254 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, |
| 4255 | op1, op2)); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 4256 | if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 4257 | mkexpr(op4addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4258 | } |
| 4259 | } |
| 4260 | |
| 4261 | return "clrb"; |
| 4262 | } |
| 4263 | |
| 4264 | static HChar * |
| 4265 | s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr) |
| 4266 | { |
| 4267 | IRTemp op1 = newTemp(Ity_I64); |
| 4268 | IRTemp op2 = newTemp(Ity_I64); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4269 | IRTemp cond = newTemp(Ity_I32); |
| 4270 | |
| 4271 | if (m3 == 0) { |
| 4272 | } else { |
| 4273 | if (m3 == 14) { |
| 4274 | always_goto(mkexpr(op4addr)); |
| 4275 | } else { |
| 4276 | assign(op1, get_gpr_dw0(r1)); |
| 4277 | assign(op2, get_gpr_dw0(r2)); |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 4278 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, |
| 4279 | op1, op2)); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 4280 | if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 4281 | mkexpr(op4addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4282 | } |
| 4283 | } |
| 4284 | |
| 4285 | return "clgrb"; |
| 4286 | } |
| 4287 | |
| 4288 | static HChar * |
| 4289 | s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3) |
| 4290 | { |
| 4291 | IRTemp op1 = newTemp(Ity_I32); |
| 4292 | IRTemp op2 = newTemp(Ity_I32); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4293 | IRTemp cond = newTemp(Ity_I32); |
| 4294 | |
| 4295 | if (m3 == 0) { |
| 4296 | } else { |
| 4297 | if (m3 == 14) { |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 4298 | always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4299 | } else { |
| 4300 | assign(op1, get_gpr_w1(r1)); |
| 4301 | assign(op2, get_gpr_w1(r2)); |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 4302 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, |
| 4303 | op1, op2)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4304 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 4305 | guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
| 4306 | |
| 4307 | } |
| 4308 | } |
| 4309 | |
| 4310 | return "clrj"; |
| 4311 | } |
| 4312 | |
| 4313 | static HChar * |
| 4314 | s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3) |
| 4315 | { |
| 4316 | IRTemp op1 = newTemp(Ity_I64); |
| 4317 | IRTemp op2 = newTemp(Ity_I64); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4318 | IRTemp cond = newTemp(Ity_I32); |
| 4319 | |
| 4320 | if (m3 == 0) { |
| 4321 | } else { |
| 4322 | if (m3 == 14) { |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 4323 | always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4324 | } else { |
| 4325 | assign(op1, get_gpr_dw0(r1)); |
| 4326 | assign(op2, get_gpr_dw0(r2)); |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 4327 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, |
| 4328 | op1, op2)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4329 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 4330 | guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
| 4331 | |
| 4332 | } |
| 4333 | } |
| 4334 | |
| 4335 | return "clgrj"; |
| 4336 | } |
| 4337 | |
| 4338 | static HChar * |
| 4339 | s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr) |
| 4340 | { |
| 4341 | IRTemp op1 = newTemp(Ity_I32); |
| 4342 | UInt op2; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4343 | IRTemp cond = newTemp(Ity_I32); |
| 4344 | |
| 4345 | if (m3 == 0) { |
| 4346 | } else { |
| 4347 | if (m3 == 14) { |
| 4348 | always_goto(mkexpr(op4addr)); |
| 4349 | } else { |
| 4350 | assign(op1, get_gpr_w1(r1)); |
| 4351 | op2 = (UInt)i2; |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 4352 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1, |
| 4353 | mktemp(Ity_I32, mkU32(op2)))); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 4354 | if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 4355 | mkexpr(op4addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4356 | } |
| 4357 | } |
| 4358 | |
| 4359 | return "clib"; |
| 4360 | } |
| 4361 | |
| 4362 | static HChar * |
| 4363 | s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr) |
| 4364 | { |
| 4365 | IRTemp op1 = newTemp(Ity_I64); |
| 4366 | ULong op2; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4367 | IRTemp cond = newTemp(Ity_I32); |
| 4368 | |
| 4369 | if (m3 == 0) { |
| 4370 | } else { |
| 4371 | if (m3 == 14) { |
| 4372 | always_goto(mkexpr(op4addr)); |
| 4373 | } else { |
| 4374 | assign(op1, get_gpr_dw0(r1)); |
| 4375 | op2 = (ULong)i2; |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 4376 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1, |
| 4377 | mktemp(Ity_I64, mkU64(op2)))); |
florian | f321da7 | 2012-07-21 20:32:57 +0000 | [diff] [blame^] | 4378 | if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 4379 | mkexpr(op4addr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4380 | } |
| 4381 | } |
| 4382 | |
| 4383 | return "clgib"; |
| 4384 | } |
| 4385 | |
| 4386 | static HChar * |
| 4387 | s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2) |
| 4388 | { |
| 4389 | IRTemp op1 = newTemp(Ity_I32); |
| 4390 | UInt op2; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4391 | IRTemp cond = newTemp(Ity_I32); |
| 4392 | |
| 4393 | if (m3 == 0) { |
| 4394 | } else { |
| 4395 | if (m3 == 14) { |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 4396 | always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4397 | } else { |
| 4398 | assign(op1, get_gpr_w1(r1)); |
| 4399 | op2 = (UInt)i2; |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 4400 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1, |
| 4401 | mktemp(Ity_I32, mkU32(op2)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4402 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 4403 | guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
| 4404 | |
| 4405 | } |
| 4406 | } |
| 4407 | |
| 4408 | return "clij"; |
| 4409 | } |
| 4410 | |
| 4411 | static HChar * |
| 4412 | s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2) |
| 4413 | { |
| 4414 | IRTemp op1 = newTemp(Ity_I64); |
| 4415 | ULong op2; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4416 | IRTemp cond = newTemp(Ity_I32); |
| 4417 | |
| 4418 | if (m3 == 0) { |
| 4419 | } else { |
| 4420 | if (m3 == 14) { |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 4421 | always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4422 | } else { |
| 4423 | assign(op1, get_gpr_dw0(r1)); |
| 4424 | op2 = (ULong)i2; |
florian | ff9613f | 2012-05-12 15:26:44 +0000 | [diff] [blame] | 4425 | assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1, |
| 4426 | mktemp(Ity_I64, mkU64(op2)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4427 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), |
| 4428 | guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); |
| 4429 | |
| 4430 | } |
| 4431 | } |
| 4432 | |
| 4433 | return "clgij"; |
| 4434 | } |
| 4435 | |
| 4436 | static HChar * |
| 4437 | s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr) |
| 4438 | { |
| 4439 | IRTemp op1 = newTemp(Ity_I32); |
| 4440 | IRTemp op2 = newTemp(Ity_I32); |
| 4441 | IRTemp b0 = newTemp(Ity_I32); |
| 4442 | IRTemp b1 = newTemp(Ity_I32); |
| 4443 | IRTemp b2 = newTemp(Ity_I32); |
| 4444 | IRTemp b3 = newTemp(Ity_I32); |
| 4445 | IRTemp c0 = newTemp(Ity_I32); |
| 4446 | IRTemp c1 = newTemp(Ity_I32); |
| 4447 | IRTemp c2 = newTemp(Ity_I32); |
| 4448 | IRTemp c3 = newTemp(Ity_I32); |
| 4449 | UChar n; |
| 4450 | |
| 4451 | n = 0; |
| 4452 | if ((r3 & 8) != 0) { |
| 4453 | assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1))); |
| 4454 | assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr)))); |
| 4455 | n = n + 1; |
| 4456 | } else { |
| 4457 | assign(b0, mkU32(0)); |
| 4458 | assign(c0, mkU32(0)); |
| 4459 | } |
| 4460 | if ((r3 & 4) != 0) { |
| 4461 | assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1))); |
| 4462 | assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), |
| 4463 | mkU64(n))))); |
| 4464 | n = n + 1; |
| 4465 | } else { |
| 4466 | assign(b1, mkU32(0)); |
| 4467 | assign(c1, mkU32(0)); |
| 4468 | } |
| 4469 | if ((r3 & 2) != 0) { |
| 4470 | assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1))); |
| 4471 | assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), |
| 4472 | mkU64(n))))); |
| 4473 | n = n + 1; |
| 4474 | } else { |
| 4475 | assign(b2, mkU32(0)); |
| 4476 | assign(c2, mkU32(0)); |
| 4477 | } |
| 4478 | if ((r3 & 1) != 0) { |
| 4479 | assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1))); |
| 4480 | assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), |
| 4481 | mkU64(n))))); |
| 4482 | n = n + 1; |
| 4483 | } else { |
| 4484 | assign(b3, mkU32(0)); |
| 4485 | assign(c3, mkU32(0)); |
| 4486 | } |
| 4487 | assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, |
| 4488 | mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))), |
| 4489 | binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3))); |
| 4490 | assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, |
| 4491 | mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))), |
| 4492 | binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3))); |
| 4493 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4494 | |
| 4495 | return "clm"; |
| 4496 | } |
| 4497 | |
| 4498 | static HChar * |
| 4499 | s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr) |
| 4500 | { |
| 4501 | IRTemp op1 = newTemp(Ity_I32); |
| 4502 | IRTemp op2 = newTemp(Ity_I32); |
| 4503 | IRTemp b0 = newTemp(Ity_I32); |
| 4504 | IRTemp b1 = newTemp(Ity_I32); |
| 4505 | IRTemp b2 = newTemp(Ity_I32); |
| 4506 | IRTemp b3 = newTemp(Ity_I32); |
| 4507 | IRTemp c0 = newTemp(Ity_I32); |
| 4508 | IRTemp c1 = newTemp(Ity_I32); |
| 4509 | IRTemp c2 = newTemp(Ity_I32); |
| 4510 | IRTemp c3 = newTemp(Ity_I32); |
| 4511 | UChar n; |
| 4512 | |
| 4513 | n = 0; |
| 4514 | if ((r3 & 8) != 0) { |
| 4515 | assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1))); |
| 4516 | assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr)))); |
| 4517 | n = n + 1; |
| 4518 | } else { |
| 4519 | assign(b0, mkU32(0)); |
| 4520 | assign(c0, mkU32(0)); |
| 4521 | } |
| 4522 | if ((r3 & 4) != 0) { |
| 4523 | assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1))); |
| 4524 | assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), |
| 4525 | mkU64(n))))); |
| 4526 | n = n + 1; |
| 4527 | } else { |
| 4528 | assign(b1, mkU32(0)); |
| 4529 | assign(c1, mkU32(0)); |
| 4530 | } |
| 4531 | if ((r3 & 2) != 0) { |
| 4532 | assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1))); |
| 4533 | assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), |
| 4534 | mkU64(n))))); |
| 4535 | n = n + 1; |
| 4536 | } else { |
| 4537 | assign(b2, mkU32(0)); |
| 4538 | assign(c2, mkU32(0)); |
| 4539 | } |
| 4540 | if ((r3 & 1) != 0) { |
| 4541 | assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1))); |
| 4542 | assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), |
| 4543 | mkU64(n))))); |
| 4544 | n = n + 1; |
| 4545 | } else { |
| 4546 | assign(b3, mkU32(0)); |
| 4547 | assign(c3, mkU32(0)); |
| 4548 | } |
| 4549 | assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, |
| 4550 | mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))), |
| 4551 | binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3))); |
| 4552 | assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, |
| 4553 | mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))), |
| 4554 | binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3))); |
| 4555 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4556 | |
| 4557 | return "clmy"; |
| 4558 | } |
| 4559 | |
| 4560 | static HChar * |
| 4561 | s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr) |
| 4562 | { |
| 4563 | IRTemp op1 = newTemp(Ity_I32); |
| 4564 | IRTemp op2 = newTemp(Ity_I32); |
| 4565 | IRTemp b0 = newTemp(Ity_I32); |
| 4566 | IRTemp b1 = newTemp(Ity_I32); |
| 4567 | IRTemp b2 = newTemp(Ity_I32); |
| 4568 | IRTemp b3 = newTemp(Ity_I32); |
| 4569 | IRTemp c0 = newTemp(Ity_I32); |
| 4570 | IRTemp c1 = newTemp(Ity_I32); |
| 4571 | IRTemp c2 = newTemp(Ity_I32); |
| 4572 | IRTemp c3 = newTemp(Ity_I32); |
| 4573 | UChar n; |
| 4574 | |
| 4575 | n = 0; |
| 4576 | if ((r3 & 8) != 0) { |
| 4577 | assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1))); |
| 4578 | assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr)))); |
| 4579 | n = n + 1; |
| 4580 | } else { |
| 4581 | assign(b0, mkU32(0)); |
| 4582 | assign(c0, mkU32(0)); |
| 4583 | } |
| 4584 | if ((r3 & 4) != 0) { |
| 4585 | assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1))); |
| 4586 | assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), |
| 4587 | mkU64(n))))); |
| 4588 | n = n + 1; |
| 4589 | } else { |
| 4590 | assign(b1, mkU32(0)); |
| 4591 | assign(c1, mkU32(0)); |
| 4592 | } |
| 4593 | if ((r3 & 2) != 0) { |
| 4594 | assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1))); |
| 4595 | assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), |
| 4596 | mkU64(n))))); |
| 4597 | n = n + 1; |
| 4598 | } else { |
| 4599 | assign(b2, mkU32(0)); |
| 4600 | assign(c2, mkU32(0)); |
| 4601 | } |
| 4602 | if ((r3 & 1) != 0) { |
| 4603 | assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1))); |
| 4604 | assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), |
| 4605 | mkU64(n))))); |
| 4606 | n = n + 1; |
| 4607 | } else { |
| 4608 | assign(b3, mkU32(0)); |
| 4609 | assign(c3, mkU32(0)); |
| 4610 | } |
| 4611 | assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, |
| 4612 | mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))), |
| 4613 | binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3))); |
| 4614 | assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, |
| 4615 | mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))), |
| 4616 | binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3))); |
| 4617 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4618 | |
| 4619 | return "clmh"; |
| 4620 | } |
| 4621 | |
| 4622 | static HChar * |
| 4623 | s390_irgen_CLHHR(UChar r1, UChar r2) |
| 4624 | { |
| 4625 | IRTemp op1 = newTemp(Ity_I32); |
| 4626 | IRTemp op2 = newTemp(Ity_I32); |
| 4627 | |
| 4628 | assign(op1, get_gpr_w0(r1)); |
| 4629 | assign(op2, get_gpr_w0(r2)); |
| 4630 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4631 | |
| 4632 | return "clhhr"; |
| 4633 | } |
| 4634 | |
| 4635 | static HChar * |
| 4636 | s390_irgen_CLHLR(UChar r1, UChar r2) |
| 4637 | { |
| 4638 | IRTemp op1 = newTemp(Ity_I32); |
| 4639 | IRTemp op2 = newTemp(Ity_I32); |
| 4640 | |
| 4641 | assign(op1, get_gpr_w0(r1)); |
| 4642 | assign(op2, get_gpr_w1(r2)); |
| 4643 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4644 | |
| 4645 | return "clhlr"; |
| 4646 | } |
| 4647 | |
| 4648 | static HChar * |
| 4649 | s390_irgen_CLHF(UChar r1, IRTemp op2addr) |
| 4650 | { |
| 4651 | IRTemp op1 = newTemp(Ity_I32); |
| 4652 | IRTemp op2 = newTemp(Ity_I32); |
| 4653 | |
| 4654 | assign(op1, get_gpr_w0(r1)); |
| 4655 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 4656 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); |
| 4657 | |
| 4658 | return "clhf"; |
| 4659 | } |
| 4660 | |
| 4661 | static HChar * |
| 4662 | s390_irgen_CLIH(UChar r1, UInt i2) |
| 4663 | { |
| 4664 | IRTemp op1 = newTemp(Ity_I32); |
| 4665 | UInt op2; |
| 4666 | |
| 4667 | assign(op1, get_gpr_w0(r1)); |
| 4668 | op2 = i2; |
| 4669 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32, |
| 4670 | mkU32(op2))); |
| 4671 | |
| 4672 | return "clih"; |
| 4673 | } |
| 4674 | |
| 4675 | static HChar * |
| 4676 | s390_irgen_CPYA(UChar r1, UChar r2) |
| 4677 | { |
| 4678 | put_ar_w0(r1, get_ar_w0(r2)); |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 4679 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4680 | s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2); |
| 4681 | |
| 4682 | return "cpya"; |
| 4683 | } |
| 4684 | |
| 4685 | static HChar * |
| 4686 | s390_irgen_XR(UChar r1, UChar r2) |
| 4687 | { |
| 4688 | IRTemp op1 = newTemp(Ity_I32); |
| 4689 | IRTemp op2 = newTemp(Ity_I32); |
| 4690 | IRTemp result = newTemp(Ity_I32); |
| 4691 | |
| 4692 | if (r1 == r2) { |
| 4693 | assign(result, mkU32(0)); |
| 4694 | } else { |
| 4695 | assign(op1, get_gpr_w1(r1)); |
| 4696 | assign(op2, get_gpr_w1(r2)); |
| 4697 | assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2))); |
| 4698 | } |
| 4699 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4700 | put_gpr_w1(r1, mkexpr(result)); |
| 4701 | |
| 4702 | return "xr"; |
| 4703 | } |
| 4704 | |
| 4705 | static HChar * |
| 4706 | s390_irgen_XGR(UChar r1, UChar r2) |
| 4707 | { |
| 4708 | IRTemp op1 = newTemp(Ity_I64); |
| 4709 | IRTemp op2 = newTemp(Ity_I64); |
| 4710 | IRTemp result = newTemp(Ity_I64); |
| 4711 | |
| 4712 | if (r1 == r2) { |
| 4713 | assign(result, mkU64(0)); |
| 4714 | } else { |
| 4715 | assign(op1, get_gpr_dw0(r1)); |
| 4716 | assign(op2, get_gpr_dw0(r2)); |
| 4717 | assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2))); |
| 4718 | } |
| 4719 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4720 | put_gpr_dw0(r1, mkexpr(result)); |
| 4721 | |
| 4722 | return "xgr"; |
| 4723 | } |
| 4724 | |
| 4725 | static HChar * |
| 4726 | s390_irgen_XRK(UChar r3, UChar r1, UChar r2) |
| 4727 | { |
| 4728 | IRTemp op2 = newTemp(Ity_I32); |
| 4729 | IRTemp op3 = newTemp(Ity_I32); |
| 4730 | IRTemp result = newTemp(Ity_I32); |
| 4731 | |
| 4732 | assign(op2, get_gpr_w1(r2)); |
| 4733 | assign(op3, get_gpr_w1(r3)); |
| 4734 | assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3))); |
| 4735 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4736 | put_gpr_w1(r1, mkexpr(result)); |
| 4737 | |
| 4738 | return "xrk"; |
| 4739 | } |
| 4740 | |
| 4741 | static HChar * |
| 4742 | s390_irgen_XGRK(UChar r3, UChar r1, UChar r2) |
| 4743 | { |
| 4744 | IRTemp op2 = newTemp(Ity_I64); |
| 4745 | IRTemp op3 = newTemp(Ity_I64); |
| 4746 | IRTemp result = newTemp(Ity_I64); |
| 4747 | |
| 4748 | assign(op2, get_gpr_dw0(r2)); |
| 4749 | assign(op3, get_gpr_dw0(r3)); |
| 4750 | assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3))); |
| 4751 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4752 | put_gpr_dw0(r1, mkexpr(result)); |
| 4753 | |
| 4754 | return "xgrk"; |
| 4755 | } |
| 4756 | |
| 4757 | static HChar * |
| 4758 | s390_irgen_X(UChar r1, IRTemp op2addr) |
| 4759 | { |
| 4760 | IRTemp op1 = newTemp(Ity_I32); |
| 4761 | IRTemp op2 = newTemp(Ity_I32); |
| 4762 | IRTemp result = newTemp(Ity_I32); |
| 4763 | |
| 4764 | assign(op1, get_gpr_w1(r1)); |
| 4765 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 4766 | assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2))); |
| 4767 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4768 | put_gpr_w1(r1, mkexpr(result)); |
| 4769 | |
| 4770 | return "x"; |
| 4771 | } |
| 4772 | |
| 4773 | static HChar * |
| 4774 | s390_irgen_XY(UChar r1, IRTemp op2addr) |
| 4775 | { |
| 4776 | IRTemp op1 = newTemp(Ity_I32); |
| 4777 | IRTemp op2 = newTemp(Ity_I32); |
| 4778 | IRTemp result = newTemp(Ity_I32); |
| 4779 | |
| 4780 | assign(op1, get_gpr_w1(r1)); |
| 4781 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 4782 | assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2))); |
| 4783 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4784 | put_gpr_w1(r1, mkexpr(result)); |
| 4785 | |
| 4786 | return "xy"; |
| 4787 | } |
| 4788 | |
| 4789 | static HChar * |
| 4790 | s390_irgen_XG(UChar r1, IRTemp op2addr) |
| 4791 | { |
| 4792 | IRTemp op1 = newTemp(Ity_I64); |
| 4793 | IRTemp op2 = newTemp(Ity_I64); |
| 4794 | IRTemp result = newTemp(Ity_I64); |
| 4795 | |
| 4796 | assign(op1, get_gpr_dw0(r1)); |
| 4797 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 4798 | assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2))); |
| 4799 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4800 | put_gpr_dw0(r1, mkexpr(result)); |
| 4801 | |
| 4802 | return "xg"; |
| 4803 | } |
| 4804 | |
| 4805 | static HChar * |
| 4806 | s390_irgen_XI(UChar i2, IRTemp op1addr) |
| 4807 | { |
| 4808 | IRTemp op1 = newTemp(Ity_I8); |
| 4809 | UChar op2; |
| 4810 | IRTemp result = newTemp(Ity_I8); |
| 4811 | |
| 4812 | assign(op1, load(Ity_I8, mkexpr(op1addr))); |
| 4813 | op2 = i2; |
| 4814 | assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2))); |
| 4815 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4816 | store(mkexpr(op1addr), mkexpr(result)); |
| 4817 | |
| 4818 | return "xi"; |
| 4819 | } |
| 4820 | |
| 4821 | static HChar * |
| 4822 | s390_irgen_XIY(UChar i2, IRTemp op1addr) |
| 4823 | { |
| 4824 | IRTemp op1 = newTemp(Ity_I8); |
| 4825 | UChar op2; |
| 4826 | IRTemp result = newTemp(Ity_I8); |
| 4827 | |
| 4828 | assign(op1, load(Ity_I8, mkexpr(op1addr))); |
| 4829 | op2 = i2; |
| 4830 | assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2))); |
| 4831 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4832 | store(mkexpr(op1addr), mkexpr(result)); |
| 4833 | |
| 4834 | return "xiy"; |
| 4835 | } |
| 4836 | |
| 4837 | static HChar * |
| 4838 | s390_irgen_XIHF(UChar r1, UInt i2) |
| 4839 | { |
| 4840 | IRTemp op1 = newTemp(Ity_I32); |
| 4841 | UInt op2; |
| 4842 | IRTemp result = newTemp(Ity_I32); |
| 4843 | |
| 4844 | assign(op1, get_gpr_w0(r1)); |
| 4845 | op2 = i2; |
| 4846 | assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2))); |
| 4847 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4848 | put_gpr_w0(r1, mkexpr(result)); |
| 4849 | |
| 4850 | return "xihf"; |
| 4851 | } |
| 4852 | |
| 4853 | static HChar * |
| 4854 | s390_irgen_XILF(UChar r1, UInt i2) |
| 4855 | { |
| 4856 | IRTemp op1 = newTemp(Ity_I32); |
| 4857 | UInt op2; |
| 4858 | IRTemp result = newTemp(Ity_I32); |
| 4859 | |
| 4860 | assign(op1, get_gpr_w1(r1)); |
| 4861 | op2 = i2; |
| 4862 | assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2))); |
| 4863 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 4864 | put_gpr_w1(r1, mkexpr(result)); |
| 4865 | |
| 4866 | return "xilf"; |
| 4867 | } |
| 4868 | |
| 4869 | static HChar * |
| 4870 | s390_irgen_EAR(UChar r1, UChar r2) |
| 4871 | { |
| 4872 | put_gpr_w1(r1, get_ar_w0(r2)); |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 4873 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 4874 | s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2); |
| 4875 | |
| 4876 | return "ear"; |
| 4877 | } |
| 4878 | |
| 4879 | static HChar * |
| 4880 | s390_irgen_IC(UChar r1, IRTemp op2addr) |
| 4881 | { |
| 4882 | put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr))); |
| 4883 | |
| 4884 | return "ic"; |
| 4885 | } |
| 4886 | |
| 4887 | static HChar * |
| 4888 | s390_irgen_ICY(UChar r1, IRTemp op2addr) |
| 4889 | { |
| 4890 | put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr))); |
| 4891 | |
| 4892 | return "icy"; |
| 4893 | } |
| 4894 | |
| 4895 | static HChar * |
| 4896 | s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr) |
| 4897 | { |
| 4898 | UChar n; |
| 4899 | IRTemp result = newTemp(Ity_I32); |
| 4900 | UInt mask; |
| 4901 | |
| 4902 | n = 0; |
| 4903 | mask = (UInt)r3; |
| 4904 | if ((mask & 8) != 0) { |
| 4905 | put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr))); |
| 4906 | n = n + 1; |
| 4907 | } |
| 4908 | if ((mask & 4) != 0) { |
| 4909 | put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); |
| 4910 | |
| 4911 | n = n + 1; |
| 4912 | } |
| 4913 | if ((mask & 2) != 0) { |
| 4914 | put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); |
| 4915 | |
| 4916 | n = n + 1; |
| 4917 | } |
| 4918 | if ((mask & 1) != 0) { |
| 4919 | put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); |
| 4920 | |
| 4921 | n = n + 1; |
| 4922 | } |
| 4923 | assign(result, get_gpr_w1(r1)); |
| 4924 | s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32, |
| 4925 | mkU32(mask))); |
| 4926 | |
| 4927 | return "icm"; |
| 4928 | } |
| 4929 | |
| 4930 | static HChar * |
| 4931 | s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr) |
| 4932 | { |
| 4933 | UChar n; |
| 4934 | IRTemp result = newTemp(Ity_I32); |
| 4935 | UInt mask; |
| 4936 | |
| 4937 | n = 0; |
| 4938 | mask = (UInt)r3; |
| 4939 | if ((mask & 8) != 0) { |
| 4940 | put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr))); |
| 4941 | n = n + 1; |
| 4942 | } |
| 4943 | if ((mask & 4) != 0) { |
| 4944 | put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); |
| 4945 | |
| 4946 | n = n + 1; |
| 4947 | } |
| 4948 | if ((mask & 2) != 0) { |
| 4949 | put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); |
| 4950 | |
| 4951 | n = n + 1; |
| 4952 | } |
| 4953 | if ((mask & 1) != 0) { |
| 4954 | put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); |
| 4955 | |
| 4956 | n = n + 1; |
| 4957 | } |
| 4958 | assign(result, get_gpr_w1(r1)); |
| 4959 | s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32, |
| 4960 | mkU32(mask))); |
| 4961 | |
| 4962 | return "icmy"; |
| 4963 | } |
| 4964 | |
| 4965 | static HChar * |
| 4966 | s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr) |
| 4967 | { |
| 4968 | UChar n; |
| 4969 | IRTemp result = newTemp(Ity_I32); |
| 4970 | UInt mask; |
| 4971 | |
| 4972 | n = 0; |
| 4973 | mask = (UInt)r3; |
| 4974 | if ((mask & 8) != 0) { |
| 4975 | put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr))); |
| 4976 | n = n + 1; |
| 4977 | } |
| 4978 | if ((mask & 4) != 0) { |
| 4979 | put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); |
| 4980 | |
| 4981 | n = n + 1; |
| 4982 | } |
| 4983 | if ((mask & 2) != 0) { |
| 4984 | put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); |
| 4985 | |
| 4986 | n = n + 1; |
| 4987 | } |
| 4988 | if ((mask & 1) != 0) { |
| 4989 | put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); |
| 4990 | |
| 4991 | n = n + 1; |
| 4992 | } |
| 4993 | assign(result, get_gpr_w0(r1)); |
| 4994 | s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32, |
| 4995 | mkU32(mask))); |
| 4996 | |
| 4997 | return "icmh"; |
| 4998 | } |
| 4999 | |
| 5000 | static HChar * |
| 5001 | s390_irgen_IIHF(UChar r1, UInt i2) |
| 5002 | { |
| 5003 | put_gpr_w0(r1, mkU32(i2)); |
| 5004 | |
| 5005 | return "iihf"; |
| 5006 | } |
| 5007 | |
| 5008 | static HChar * |
| 5009 | s390_irgen_IIHH(UChar r1, UShort i2) |
| 5010 | { |
| 5011 | put_gpr_hw0(r1, mkU16(i2)); |
| 5012 | |
| 5013 | return "iihh"; |
| 5014 | } |
| 5015 | |
| 5016 | static HChar * |
| 5017 | s390_irgen_IIHL(UChar r1, UShort i2) |
| 5018 | { |
| 5019 | put_gpr_hw1(r1, mkU16(i2)); |
| 5020 | |
| 5021 | return "iihl"; |
| 5022 | } |
| 5023 | |
| 5024 | static HChar * |
| 5025 | s390_irgen_IILF(UChar r1, UInt i2) |
| 5026 | { |
| 5027 | put_gpr_w1(r1, mkU32(i2)); |
| 5028 | |
| 5029 | return "iilf"; |
| 5030 | } |
| 5031 | |
| 5032 | static HChar * |
| 5033 | s390_irgen_IILH(UChar r1, UShort i2) |
| 5034 | { |
| 5035 | put_gpr_hw2(r1, mkU16(i2)); |
| 5036 | |
| 5037 | return "iilh"; |
| 5038 | } |
| 5039 | |
| 5040 | static HChar * |
| 5041 | s390_irgen_IILL(UChar r1, UShort i2) |
| 5042 | { |
| 5043 | put_gpr_hw3(r1, mkU16(i2)); |
| 5044 | |
| 5045 | return "iill"; |
| 5046 | } |
| 5047 | |
| 5048 | static HChar * |
| 5049 | s390_irgen_LR(UChar r1, UChar r2) |
| 5050 | { |
| 5051 | put_gpr_w1(r1, get_gpr_w1(r2)); |
| 5052 | |
| 5053 | return "lr"; |
| 5054 | } |
| 5055 | |
| 5056 | static HChar * |
| 5057 | s390_irgen_LGR(UChar r1, UChar r2) |
| 5058 | { |
| 5059 | put_gpr_dw0(r1, get_gpr_dw0(r2)); |
| 5060 | |
| 5061 | return "lgr"; |
| 5062 | } |
| 5063 | |
| 5064 | static HChar * |
| 5065 | s390_irgen_LGFR(UChar r1, UChar r2) |
| 5066 | { |
| 5067 | put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2))); |
| 5068 | |
| 5069 | return "lgfr"; |
| 5070 | } |
| 5071 | |
| 5072 | static HChar * |
| 5073 | s390_irgen_L(UChar r1, IRTemp op2addr) |
| 5074 | { |
| 5075 | put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr))); |
| 5076 | |
| 5077 | return "l"; |
| 5078 | } |
| 5079 | |
| 5080 | static HChar * |
| 5081 | s390_irgen_LY(UChar r1, IRTemp op2addr) |
| 5082 | { |
| 5083 | put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr))); |
| 5084 | |
| 5085 | return "ly"; |
| 5086 | } |
| 5087 | |
| 5088 | static HChar * |
| 5089 | s390_irgen_LG(UChar r1, IRTemp op2addr) |
| 5090 | { |
| 5091 | put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr))); |
| 5092 | |
| 5093 | return "lg"; |
| 5094 | } |
| 5095 | |
| 5096 | static HChar * |
| 5097 | s390_irgen_LGF(UChar r1, IRTemp op2addr) |
| 5098 | { |
| 5099 | put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); |
| 5100 | |
| 5101 | return "lgf"; |
| 5102 | } |
| 5103 | |
| 5104 | static HChar * |
| 5105 | s390_irgen_LGFI(UChar r1, UInt i2) |
| 5106 | { |
| 5107 | put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2)); |
| 5108 | |
| 5109 | return "lgfi"; |
| 5110 | } |
| 5111 | |
| 5112 | static HChar * |
| 5113 | s390_irgen_LRL(UChar r1, UInt i2) |
| 5114 | { |
| 5115 | put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) |
| 5116 | i2 << 1)))); |
| 5117 | |
| 5118 | return "lrl"; |
| 5119 | } |
| 5120 | |
| 5121 | static HChar * |
| 5122 | s390_irgen_LGRL(UChar r1, UInt i2) |
| 5123 | { |
| 5124 | put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) |
| 5125 | i2 << 1)))); |
| 5126 | |
| 5127 | return "lgrl"; |
| 5128 | } |
| 5129 | |
| 5130 | static HChar * |
| 5131 | s390_irgen_LGFRL(UChar r1, UInt i2) |
| 5132 | { |
| 5133 | put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr + |
| 5134 | ((ULong)(Long)(Int)i2 << 1))))); |
| 5135 | |
| 5136 | return "lgfrl"; |
| 5137 | } |
| 5138 | |
| 5139 | static HChar * |
| 5140 | s390_irgen_LA(UChar r1, IRTemp op2addr) |
| 5141 | { |
| 5142 | put_gpr_dw0(r1, mkexpr(op2addr)); |
| 5143 | |
| 5144 | return "la"; |
| 5145 | } |
| 5146 | |
| 5147 | static HChar * |
| 5148 | s390_irgen_LAY(UChar r1, IRTemp op2addr) |
| 5149 | { |
| 5150 | put_gpr_dw0(r1, mkexpr(op2addr)); |
| 5151 | |
| 5152 | return "lay"; |
| 5153 | } |
| 5154 | |
| 5155 | static HChar * |
| 5156 | s390_irgen_LAE(UChar r1, IRTemp op2addr) |
| 5157 | { |
| 5158 | put_gpr_dw0(r1, mkexpr(op2addr)); |
| 5159 | |
| 5160 | return "lae"; |
| 5161 | } |
| 5162 | |
| 5163 | static HChar * |
| 5164 | s390_irgen_LAEY(UChar r1, IRTemp op2addr) |
| 5165 | { |
| 5166 | put_gpr_dw0(r1, mkexpr(op2addr)); |
| 5167 | |
| 5168 | return "laey"; |
| 5169 | } |
| 5170 | |
| 5171 | static HChar * |
| 5172 | s390_irgen_LARL(UChar r1, UInt i2) |
| 5173 | { |
| 5174 | put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1))); |
| 5175 | |
| 5176 | return "larl"; |
| 5177 | } |
| 5178 | |
| 5179 | static HChar * |
| 5180 | s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr) |
| 5181 | { |
| 5182 | IRTemp op2 = newTemp(Ity_I32); |
| 5183 | IRTemp op3 = newTemp(Ity_I32); |
| 5184 | IRTemp result = newTemp(Ity_I32); |
| 5185 | |
| 5186 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 5187 | assign(op3, get_gpr_w1(r3)); |
| 5188 | assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); |
| 5189 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3); |
| 5190 | store(mkexpr(op2addr), mkexpr(result)); |
| 5191 | put_gpr_w1(r1, mkexpr(op2)); |
| 5192 | |
| 5193 | return "laa"; |
| 5194 | } |
| 5195 | |
| 5196 | static HChar * |
| 5197 | s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr) |
| 5198 | { |
| 5199 | IRTemp op2 = newTemp(Ity_I64); |
| 5200 | IRTemp op3 = newTemp(Ity_I64); |
| 5201 | IRTemp result = newTemp(Ity_I64); |
| 5202 | |
| 5203 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 5204 | assign(op3, get_gpr_dw0(r3)); |
| 5205 | assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3))); |
| 5206 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3); |
| 5207 | store(mkexpr(op2addr), mkexpr(result)); |
| 5208 | put_gpr_dw0(r1, mkexpr(op2)); |
| 5209 | |
| 5210 | return "laag"; |
| 5211 | } |
| 5212 | |
| 5213 | static HChar * |
| 5214 | s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr) |
| 5215 | { |
| 5216 | IRTemp op2 = newTemp(Ity_I32); |
| 5217 | IRTemp op3 = newTemp(Ity_I32); |
| 5218 | IRTemp result = newTemp(Ity_I32); |
| 5219 | |
| 5220 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 5221 | assign(op3, get_gpr_w1(r3)); |
| 5222 | assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); |
| 5223 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3); |
| 5224 | store(mkexpr(op2addr), mkexpr(result)); |
| 5225 | put_gpr_w1(r1, mkexpr(op2)); |
| 5226 | |
| 5227 | return "laal"; |
| 5228 | } |
| 5229 | |
| 5230 | static HChar * |
| 5231 | s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr) |
| 5232 | { |
| 5233 | IRTemp op2 = newTemp(Ity_I64); |
| 5234 | IRTemp op3 = newTemp(Ity_I64); |
| 5235 | IRTemp result = newTemp(Ity_I64); |
| 5236 | |
| 5237 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 5238 | assign(op3, get_gpr_dw0(r3)); |
| 5239 | assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3))); |
| 5240 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3); |
| 5241 | store(mkexpr(op2addr), mkexpr(result)); |
| 5242 | put_gpr_dw0(r1, mkexpr(op2)); |
| 5243 | |
| 5244 | return "laalg"; |
| 5245 | } |
| 5246 | |
| 5247 | static HChar * |
| 5248 | s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr) |
| 5249 | { |
| 5250 | IRTemp op2 = newTemp(Ity_I32); |
| 5251 | IRTemp op3 = newTemp(Ity_I32); |
| 5252 | IRTemp result = newTemp(Ity_I32); |
| 5253 | |
| 5254 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 5255 | assign(op3, get_gpr_w1(r3)); |
| 5256 | assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3))); |
| 5257 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 5258 | store(mkexpr(op2addr), mkexpr(result)); |
| 5259 | put_gpr_w1(r1, mkexpr(op2)); |
| 5260 | |
| 5261 | return "lan"; |
| 5262 | } |
| 5263 | |
| 5264 | static HChar * |
| 5265 | s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr) |
| 5266 | { |
| 5267 | IRTemp op2 = newTemp(Ity_I64); |
| 5268 | IRTemp op3 = newTemp(Ity_I64); |
| 5269 | IRTemp result = newTemp(Ity_I64); |
| 5270 | |
| 5271 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 5272 | assign(op3, get_gpr_dw0(r3)); |
| 5273 | assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3))); |
| 5274 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 5275 | store(mkexpr(op2addr), mkexpr(result)); |
| 5276 | put_gpr_dw0(r1, mkexpr(op2)); |
| 5277 | |
| 5278 | return "lang"; |
| 5279 | } |
| 5280 | |
| 5281 | static HChar * |
| 5282 | s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr) |
| 5283 | { |
| 5284 | IRTemp op2 = newTemp(Ity_I32); |
| 5285 | IRTemp op3 = newTemp(Ity_I32); |
| 5286 | IRTemp result = newTemp(Ity_I32); |
| 5287 | |
| 5288 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 5289 | assign(op3, get_gpr_w1(r3)); |
| 5290 | assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3))); |
| 5291 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 5292 | store(mkexpr(op2addr), mkexpr(result)); |
| 5293 | put_gpr_w1(r1, mkexpr(op2)); |
| 5294 | |
| 5295 | return "lax"; |
| 5296 | } |
| 5297 | |
| 5298 | static HChar * |
| 5299 | s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr) |
| 5300 | { |
| 5301 | IRTemp op2 = newTemp(Ity_I64); |
| 5302 | IRTemp op3 = newTemp(Ity_I64); |
| 5303 | IRTemp result = newTemp(Ity_I64); |
| 5304 | |
| 5305 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 5306 | assign(op3, get_gpr_dw0(r3)); |
| 5307 | assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3))); |
| 5308 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 5309 | store(mkexpr(op2addr), mkexpr(result)); |
| 5310 | put_gpr_dw0(r1, mkexpr(op2)); |
| 5311 | |
| 5312 | return "laxg"; |
| 5313 | } |
| 5314 | |
| 5315 | static HChar * |
| 5316 | s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr) |
| 5317 | { |
| 5318 | IRTemp op2 = newTemp(Ity_I32); |
| 5319 | IRTemp op3 = newTemp(Ity_I32); |
| 5320 | IRTemp result = newTemp(Ity_I32); |
| 5321 | |
| 5322 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 5323 | assign(op3, get_gpr_w1(r3)); |
| 5324 | assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3))); |
| 5325 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 5326 | store(mkexpr(op2addr), mkexpr(result)); |
| 5327 | put_gpr_w1(r1, mkexpr(op2)); |
| 5328 | |
| 5329 | return "lao"; |
| 5330 | } |
| 5331 | |
| 5332 | static HChar * |
| 5333 | s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr) |
| 5334 | { |
| 5335 | IRTemp op2 = newTemp(Ity_I64); |
| 5336 | IRTemp op3 = newTemp(Ity_I64); |
| 5337 | IRTemp result = newTemp(Ity_I64); |
| 5338 | |
| 5339 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 5340 | assign(op3, get_gpr_dw0(r3)); |
| 5341 | assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3))); |
| 5342 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 5343 | store(mkexpr(op2addr), mkexpr(result)); |
| 5344 | put_gpr_dw0(r1, mkexpr(op2)); |
| 5345 | |
| 5346 | return "laog"; |
| 5347 | } |
| 5348 | |
| 5349 | static HChar * |
| 5350 | s390_irgen_LTR(UChar r1, UChar r2) |
| 5351 | { |
| 5352 | IRTemp op2 = newTemp(Ity_I32); |
| 5353 | |
| 5354 | assign(op2, get_gpr_w1(r2)); |
| 5355 | put_gpr_w1(r1, mkexpr(op2)); |
| 5356 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); |
| 5357 | |
| 5358 | return "ltr"; |
| 5359 | } |
| 5360 | |
| 5361 | static HChar * |
| 5362 | s390_irgen_LTGR(UChar r1, UChar r2) |
| 5363 | { |
| 5364 | IRTemp op2 = newTemp(Ity_I64); |
| 5365 | |
| 5366 | assign(op2, get_gpr_dw0(r2)); |
| 5367 | put_gpr_dw0(r1, mkexpr(op2)); |
| 5368 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); |
| 5369 | |
| 5370 | return "ltgr"; |
| 5371 | } |
| 5372 | |
| 5373 | static HChar * |
| 5374 | s390_irgen_LTGFR(UChar r1, UChar r2) |
| 5375 | { |
| 5376 | IRTemp op2 = newTemp(Ity_I64); |
| 5377 | |
| 5378 | assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); |
| 5379 | put_gpr_dw0(r1, mkexpr(op2)); |
| 5380 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); |
| 5381 | |
| 5382 | return "ltgfr"; |
| 5383 | } |
| 5384 | |
| 5385 | static HChar * |
| 5386 | s390_irgen_LT(UChar r1, IRTemp op2addr) |
| 5387 | { |
| 5388 | IRTemp op2 = newTemp(Ity_I32); |
| 5389 | |
| 5390 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 5391 | put_gpr_w1(r1, mkexpr(op2)); |
| 5392 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); |
| 5393 | |
| 5394 | return "lt"; |
| 5395 | } |
| 5396 | |
| 5397 | static HChar * |
| 5398 | s390_irgen_LTG(UChar r1, IRTemp op2addr) |
| 5399 | { |
| 5400 | IRTemp op2 = newTemp(Ity_I64); |
| 5401 | |
| 5402 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 5403 | put_gpr_dw0(r1, mkexpr(op2)); |
| 5404 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); |
| 5405 | |
| 5406 | return "ltg"; |
| 5407 | } |
| 5408 | |
| 5409 | static HChar * |
| 5410 | s390_irgen_LTGF(UChar r1, IRTemp op2addr) |
| 5411 | { |
| 5412 | IRTemp op2 = newTemp(Ity_I64); |
| 5413 | |
| 5414 | assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); |
| 5415 | put_gpr_dw0(r1, mkexpr(op2)); |
| 5416 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); |
| 5417 | |
| 5418 | return "ltgf"; |
| 5419 | } |
| 5420 | |
| 5421 | static HChar * |
| 5422 | s390_irgen_LBR(UChar r1, UChar r2) |
| 5423 | { |
| 5424 | put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2))); |
| 5425 | |
| 5426 | return "lbr"; |
| 5427 | } |
| 5428 | |
| 5429 | static HChar * |
| 5430 | s390_irgen_LGBR(UChar r1, UChar r2) |
| 5431 | { |
| 5432 | put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2))); |
| 5433 | |
| 5434 | return "lgbr"; |
| 5435 | } |
| 5436 | |
| 5437 | static HChar * |
| 5438 | s390_irgen_LB(UChar r1, IRTemp op2addr) |
| 5439 | { |
| 5440 | put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr)))); |
| 5441 | |
| 5442 | return "lb"; |
| 5443 | } |
| 5444 | |
| 5445 | static HChar * |
| 5446 | s390_irgen_LGB(UChar r1, IRTemp op2addr) |
| 5447 | { |
| 5448 | put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr)))); |
| 5449 | |
| 5450 | return "lgb"; |
| 5451 | } |
| 5452 | |
| 5453 | static HChar * |
| 5454 | s390_irgen_LBH(UChar r1, IRTemp op2addr) |
| 5455 | { |
| 5456 | put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr)))); |
| 5457 | |
| 5458 | return "lbh"; |
| 5459 | } |
| 5460 | |
| 5461 | static HChar * |
| 5462 | s390_irgen_LCR(UChar r1, UChar r2) |
| 5463 | { |
| 5464 | Int op1; |
| 5465 | IRTemp op2 = newTemp(Ity_I32); |
| 5466 | IRTemp result = newTemp(Ity_I32); |
| 5467 | |
| 5468 | op1 = 0; |
| 5469 | assign(op2, get_gpr_w1(r2)); |
| 5470 | assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2))); |
| 5471 | put_gpr_w1(r1, mkexpr(result)); |
| 5472 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt) |
| 5473 | op1)), op2); |
| 5474 | |
| 5475 | return "lcr"; |
| 5476 | } |
| 5477 | |
| 5478 | static HChar * |
| 5479 | s390_irgen_LCGR(UChar r1, UChar r2) |
| 5480 | { |
| 5481 | Long op1; |
| 5482 | IRTemp op2 = newTemp(Ity_I64); |
| 5483 | IRTemp result = newTemp(Ity_I64); |
| 5484 | |
| 5485 | op1 = 0ULL; |
| 5486 | assign(op2, get_gpr_dw0(r2)); |
| 5487 | assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2))); |
| 5488 | put_gpr_dw0(r1, mkexpr(result)); |
| 5489 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong) |
| 5490 | op1)), op2); |
| 5491 | |
| 5492 | return "lcgr"; |
| 5493 | } |
| 5494 | |
| 5495 | static HChar * |
| 5496 | s390_irgen_LCGFR(UChar r1, UChar r2) |
| 5497 | { |
| 5498 | Long op1; |
| 5499 | IRTemp op2 = newTemp(Ity_I64); |
| 5500 | IRTemp result = newTemp(Ity_I64); |
| 5501 | |
| 5502 | op1 = 0ULL; |
| 5503 | assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); |
| 5504 | assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2))); |
| 5505 | put_gpr_dw0(r1, mkexpr(result)); |
| 5506 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong) |
| 5507 | op1)), op2); |
| 5508 | |
| 5509 | return "lcgfr"; |
| 5510 | } |
| 5511 | |
| 5512 | static HChar * |
| 5513 | s390_irgen_LHR(UChar r1, UChar r2) |
| 5514 | { |
| 5515 | put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2))); |
| 5516 | |
| 5517 | return "lhr"; |
| 5518 | } |
| 5519 | |
| 5520 | static HChar * |
| 5521 | s390_irgen_LGHR(UChar r1, UChar r2) |
| 5522 | { |
| 5523 | put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2))); |
| 5524 | |
| 5525 | return "lghr"; |
| 5526 | } |
| 5527 | |
| 5528 | static HChar * |
| 5529 | s390_irgen_LH(UChar r1, IRTemp op2addr) |
| 5530 | { |
| 5531 | put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); |
| 5532 | |
| 5533 | return "lh"; |
| 5534 | } |
| 5535 | |
| 5536 | static HChar * |
| 5537 | s390_irgen_LHY(UChar r1, IRTemp op2addr) |
| 5538 | { |
| 5539 | put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); |
| 5540 | |
| 5541 | return "lhy"; |
| 5542 | } |
| 5543 | |
| 5544 | static HChar * |
| 5545 | s390_irgen_LGH(UChar r1, IRTemp op2addr) |
| 5546 | { |
| 5547 | put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr)))); |
| 5548 | |
| 5549 | return "lgh"; |
| 5550 | } |
| 5551 | |
| 5552 | static HChar * |
| 5553 | s390_irgen_LHI(UChar r1, UShort i2) |
| 5554 | { |
| 5555 | put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2)); |
| 5556 | |
| 5557 | return "lhi"; |
| 5558 | } |
| 5559 | |
| 5560 | static HChar * |
| 5561 | s390_irgen_LGHI(UChar r1, UShort i2) |
| 5562 | { |
| 5563 | put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2)); |
| 5564 | |
| 5565 | return "lghi"; |
| 5566 | } |
| 5567 | |
| 5568 | static HChar * |
| 5569 | s390_irgen_LHRL(UChar r1, UInt i2) |
| 5570 | { |
| 5571 | put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr + |
| 5572 | ((ULong)(Long)(Int)i2 << 1))))); |
| 5573 | |
| 5574 | return "lhrl"; |
| 5575 | } |
| 5576 | |
| 5577 | static HChar * |
| 5578 | s390_irgen_LGHRL(UChar r1, UInt i2) |
| 5579 | { |
| 5580 | put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr + |
| 5581 | ((ULong)(Long)(Int)i2 << 1))))); |
| 5582 | |
| 5583 | return "lghrl"; |
| 5584 | } |
| 5585 | |
| 5586 | static HChar * |
| 5587 | s390_irgen_LHH(UChar r1, IRTemp op2addr) |
| 5588 | { |
| 5589 | put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); |
| 5590 | |
| 5591 | return "lhh"; |
| 5592 | } |
| 5593 | |
| 5594 | static HChar * |
| 5595 | s390_irgen_LFH(UChar r1, IRTemp op2addr) |
| 5596 | { |
| 5597 | put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr))); |
| 5598 | |
| 5599 | return "lfh"; |
| 5600 | } |
| 5601 | |
| 5602 | static HChar * |
| 5603 | s390_irgen_LLGFR(UChar r1, UChar r2) |
| 5604 | { |
| 5605 | put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2))); |
| 5606 | |
| 5607 | return "llgfr"; |
| 5608 | } |
| 5609 | |
| 5610 | static HChar * |
| 5611 | s390_irgen_LLGF(UChar r1, IRTemp op2addr) |
| 5612 | { |
| 5613 | put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr)))); |
| 5614 | |
| 5615 | return "llgf"; |
| 5616 | } |
| 5617 | |
| 5618 | static HChar * |
| 5619 | s390_irgen_LLGFRL(UChar r1, UInt i2) |
| 5620 | { |
| 5621 | put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr + |
| 5622 | ((ULong)(Long)(Int)i2 << 1))))); |
| 5623 | |
| 5624 | return "llgfrl"; |
| 5625 | } |
| 5626 | |
| 5627 | static HChar * |
| 5628 | s390_irgen_LLCR(UChar r1, UChar r2) |
| 5629 | { |
| 5630 | put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2))); |
| 5631 | |
| 5632 | return "llcr"; |
| 5633 | } |
| 5634 | |
| 5635 | static HChar * |
| 5636 | s390_irgen_LLGCR(UChar r1, UChar r2) |
| 5637 | { |
| 5638 | put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2))); |
| 5639 | |
| 5640 | return "llgcr"; |
| 5641 | } |
| 5642 | |
| 5643 | static HChar * |
| 5644 | s390_irgen_LLC(UChar r1, IRTemp op2addr) |
| 5645 | { |
| 5646 | put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr)))); |
| 5647 | |
| 5648 | return "llc"; |
| 5649 | } |
| 5650 | |
| 5651 | static HChar * |
| 5652 | s390_irgen_LLGC(UChar r1, IRTemp op2addr) |
| 5653 | { |
| 5654 | put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr)))); |
| 5655 | |
| 5656 | return "llgc"; |
| 5657 | } |
| 5658 | |
| 5659 | static HChar * |
| 5660 | s390_irgen_LLCH(UChar r1, IRTemp op2addr) |
| 5661 | { |
| 5662 | put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr)))); |
| 5663 | |
| 5664 | return "llch"; |
| 5665 | } |
| 5666 | |
| 5667 | static HChar * |
| 5668 | s390_irgen_LLHR(UChar r1, UChar r2) |
| 5669 | { |
| 5670 | put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2))); |
| 5671 | |
| 5672 | return "llhr"; |
| 5673 | } |
| 5674 | |
| 5675 | static HChar * |
| 5676 | s390_irgen_LLGHR(UChar r1, UChar r2) |
| 5677 | { |
| 5678 | put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2))); |
| 5679 | |
| 5680 | return "llghr"; |
| 5681 | } |
| 5682 | |
| 5683 | static HChar * |
| 5684 | s390_irgen_LLH(UChar r1, IRTemp op2addr) |
| 5685 | { |
| 5686 | put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr)))); |
| 5687 | |
| 5688 | return "llh"; |
| 5689 | } |
| 5690 | |
| 5691 | static HChar * |
| 5692 | s390_irgen_LLGH(UChar r1, IRTemp op2addr) |
| 5693 | { |
| 5694 | put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr)))); |
| 5695 | |
| 5696 | return "llgh"; |
| 5697 | } |
| 5698 | |
| 5699 | static HChar * |
| 5700 | s390_irgen_LLHRL(UChar r1, UInt i2) |
| 5701 | { |
| 5702 | put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr + |
| 5703 | ((ULong)(Long)(Int)i2 << 1))))); |
| 5704 | |
| 5705 | return "llhrl"; |
| 5706 | } |
| 5707 | |
| 5708 | static HChar * |
| 5709 | s390_irgen_LLGHRL(UChar r1, UInt i2) |
| 5710 | { |
| 5711 | put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr + |
| 5712 | ((ULong)(Long)(Int)i2 << 1))))); |
| 5713 | |
| 5714 | return "llghrl"; |
| 5715 | } |
| 5716 | |
| 5717 | static HChar * |
| 5718 | s390_irgen_LLHH(UChar r1, IRTemp op2addr) |
| 5719 | { |
| 5720 | put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr)))); |
| 5721 | |
| 5722 | return "llhh"; |
| 5723 | } |
| 5724 | |
| 5725 | static HChar * |
| 5726 | s390_irgen_LLIHF(UChar r1, UInt i2) |
| 5727 | { |
| 5728 | put_gpr_dw0(r1, mkU64(((ULong)i2) << 32)); |
| 5729 | |
| 5730 | return "llihf"; |
| 5731 | } |
| 5732 | |
| 5733 | static HChar * |
| 5734 | s390_irgen_LLIHH(UChar r1, UShort i2) |
| 5735 | { |
| 5736 | put_gpr_dw0(r1, mkU64(((ULong)i2) << 48)); |
| 5737 | |
| 5738 | return "llihh"; |
| 5739 | } |
| 5740 | |
| 5741 | static HChar * |
| 5742 | s390_irgen_LLIHL(UChar r1, UShort i2) |
| 5743 | { |
| 5744 | put_gpr_dw0(r1, mkU64(((ULong)i2) << 32)); |
| 5745 | |
| 5746 | return "llihl"; |
| 5747 | } |
| 5748 | |
| 5749 | static HChar * |
| 5750 | s390_irgen_LLILF(UChar r1, UInt i2) |
| 5751 | { |
| 5752 | put_gpr_dw0(r1, mkU64(i2)); |
| 5753 | |
| 5754 | return "llilf"; |
| 5755 | } |
| 5756 | |
| 5757 | static HChar * |
| 5758 | s390_irgen_LLILH(UChar r1, UShort i2) |
| 5759 | { |
| 5760 | put_gpr_dw0(r1, mkU64(((ULong)i2) << 16)); |
| 5761 | |
| 5762 | return "llilh"; |
| 5763 | } |
| 5764 | |
| 5765 | static HChar * |
| 5766 | s390_irgen_LLILL(UChar r1, UShort i2) |
| 5767 | { |
| 5768 | put_gpr_dw0(r1, mkU64(i2)); |
| 5769 | |
| 5770 | return "llill"; |
| 5771 | } |
| 5772 | |
| 5773 | static HChar * |
| 5774 | s390_irgen_LLGTR(UChar r1, UChar r2) |
| 5775 | { |
| 5776 | put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2), |
| 5777 | mkU32(2147483647)))); |
| 5778 | |
| 5779 | return "llgtr"; |
| 5780 | } |
| 5781 | |
| 5782 | static HChar * |
| 5783 | s390_irgen_LLGT(UChar r1, IRTemp op2addr) |
| 5784 | { |
| 5785 | put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32, |
| 5786 | mkexpr(op2addr)), mkU32(2147483647)))); |
| 5787 | |
| 5788 | return "llgt"; |
| 5789 | } |
| 5790 | |
| 5791 | static HChar * |
| 5792 | s390_irgen_LNR(UChar r1, UChar r2) |
| 5793 | { |
| 5794 | IRTemp op2 = newTemp(Ity_I32); |
| 5795 | IRTemp result = newTemp(Ity_I32); |
| 5796 | |
| 5797 | assign(op2, get_gpr_w1(r2)); |
| 5798 | assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2), |
| 5799 | binop(Iop_Sub32, mkU32(0), mkexpr(op2)))); |
| 5800 | put_gpr_w1(r1, mkexpr(result)); |
| 5801 | s390_cc_thunk_putS(S390_CC_OP_BITWISE, result); |
| 5802 | |
| 5803 | return "lnr"; |
| 5804 | } |
| 5805 | |
| 5806 | static HChar * |
| 5807 | s390_irgen_LNGR(UChar r1, UChar r2) |
| 5808 | { |
| 5809 | IRTemp op2 = newTemp(Ity_I64); |
| 5810 | IRTemp result = newTemp(Ity_I64); |
| 5811 | |
| 5812 | assign(op2, get_gpr_dw0(r2)); |
| 5813 | assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2), |
| 5814 | binop(Iop_Sub64, mkU64(0), mkexpr(op2)))); |
| 5815 | put_gpr_dw0(r1, mkexpr(result)); |
| 5816 | s390_cc_thunk_putS(S390_CC_OP_BITWISE, result); |
| 5817 | |
| 5818 | return "lngr"; |
| 5819 | } |
| 5820 | |
| 5821 | static HChar * |
| 5822 | s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused))) |
| 5823 | { |
| 5824 | IRTemp op2 = newTemp(Ity_I64); |
| 5825 | IRTemp result = newTemp(Ity_I64); |
| 5826 | |
| 5827 | assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1))); |
| 5828 | assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2), |
| 5829 | binop(Iop_Sub64, mkU64(0), mkexpr(op2)))); |
| 5830 | put_gpr_dw0(r1, mkexpr(result)); |
| 5831 | s390_cc_thunk_putS(S390_CC_OP_BITWISE, result); |
| 5832 | |
| 5833 | return "lngfr"; |
| 5834 | } |
| 5835 | |
| 5836 | static HChar * |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 5837 | s390_irgen_LOCR(UChar m3, UChar r1, UChar r2) |
| 5838 | { |
| 5839 | if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)), |
| 5840 | guest_IA_next_instr); |
| 5841 | put_gpr_w1(r1, get_gpr_w1(r2)); |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 5842 | dummy_put_IA(); |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 5843 | |
| 5844 | return "locr"; |
| 5845 | } |
| 5846 | |
| 5847 | static HChar * |
| 5848 | s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2) |
| 5849 | { |
| 5850 | if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)), |
| 5851 | guest_IA_next_instr); |
| 5852 | put_gpr_dw0(r1, get_gpr_dw0(r2)); |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 5853 | dummy_put_IA(); |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 5854 | |
| 5855 | return "locgr"; |
| 5856 | } |
| 5857 | |
| 5858 | static HChar * |
| 5859 | s390_irgen_LOC(UChar r1, IRTemp op2addr) |
| 5860 | { |
| 5861 | /* condition is checked in format handler */ |
| 5862 | put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr))); |
| 5863 | |
| 5864 | return "loc"; |
| 5865 | } |
| 5866 | |
| 5867 | static HChar * |
| 5868 | s390_irgen_LOCG(UChar r1, IRTemp op2addr) |
| 5869 | { |
| 5870 | /* condition is checked in format handler */ |
| 5871 | put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr))); |
| 5872 | |
| 5873 | return "locg"; |
| 5874 | } |
| 5875 | |
| 5876 | static HChar * |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 5877 | s390_irgen_LPQ(UChar r1, IRTemp op2addr) |
| 5878 | { |
| 5879 | put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr))); |
| 5880 | put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8)) |
| 5881 | )); |
| 5882 | |
| 5883 | return "lpq"; |
| 5884 | } |
| 5885 | |
| 5886 | static HChar * |
| 5887 | s390_irgen_LPR(UChar r1, UChar r2) |
| 5888 | { |
| 5889 | IRTemp op2 = newTemp(Ity_I32); |
| 5890 | IRTemp result = newTemp(Ity_I32); |
| 5891 | |
| 5892 | assign(op2, get_gpr_w1(r2)); |
| 5893 | assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)), |
| 5894 | binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2))); |
| 5895 | put_gpr_w1(r1, mkexpr(result)); |
| 5896 | s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2); |
| 5897 | |
| 5898 | return "lpr"; |
| 5899 | } |
| 5900 | |
| 5901 | static HChar * |
| 5902 | s390_irgen_LPGR(UChar r1, UChar r2) |
| 5903 | { |
| 5904 | IRTemp op2 = newTemp(Ity_I64); |
| 5905 | IRTemp result = newTemp(Ity_I64); |
| 5906 | |
| 5907 | assign(op2, get_gpr_dw0(r2)); |
| 5908 | assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)), |
| 5909 | binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2))); |
| 5910 | put_gpr_dw0(r1, mkexpr(result)); |
| 5911 | s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2); |
| 5912 | |
| 5913 | return "lpgr"; |
| 5914 | } |
| 5915 | |
| 5916 | static HChar * |
| 5917 | s390_irgen_LPGFR(UChar r1, UChar r2) |
| 5918 | { |
| 5919 | IRTemp op2 = newTemp(Ity_I64); |
| 5920 | IRTemp result = newTemp(Ity_I64); |
| 5921 | |
| 5922 | assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); |
| 5923 | assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)), |
| 5924 | binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2))); |
| 5925 | put_gpr_dw0(r1, mkexpr(result)); |
| 5926 | s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2); |
| 5927 | |
| 5928 | return "lpgfr"; |
| 5929 | } |
| 5930 | |
| 5931 | static HChar * |
| 5932 | s390_irgen_LRVR(UChar r1, UChar r2) |
| 5933 | { |
| 5934 | IRTemp b0 = newTemp(Ity_I8); |
| 5935 | IRTemp b1 = newTemp(Ity_I8); |
| 5936 | IRTemp b2 = newTemp(Ity_I8); |
| 5937 | IRTemp b3 = newTemp(Ity_I8); |
| 5938 | |
| 5939 | assign(b3, get_gpr_b7(r2)); |
| 5940 | assign(b2, get_gpr_b6(r2)); |
| 5941 | assign(b1, get_gpr_b5(r2)); |
| 5942 | assign(b0, get_gpr_b4(r2)); |
| 5943 | put_gpr_b4(r1, mkexpr(b3)); |
| 5944 | put_gpr_b5(r1, mkexpr(b2)); |
| 5945 | put_gpr_b6(r1, mkexpr(b1)); |
| 5946 | put_gpr_b7(r1, mkexpr(b0)); |
| 5947 | |
| 5948 | return "lrvr"; |
| 5949 | } |
| 5950 | |
| 5951 | static HChar * |
| 5952 | s390_irgen_LRVGR(UChar r1, UChar r2) |
| 5953 | { |
| 5954 | IRTemp b0 = newTemp(Ity_I8); |
| 5955 | IRTemp b1 = newTemp(Ity_I8); |
| 5956 | IRTemp b2 = newTemp(Ity_I8); |
| 5957 | IRTemp b3 = newTemp(Ity_I8); |
| 5958 | IRTemp b4 = newTemp(Ity_I8); |
| 5959 | IRTemp b5 = newTemp(Ity_I8); |
| 5960 | IRTemp b6 = newTemp(Ity_I8); |
| 5961 | IRTemp b7 = newTemp(Ity_I8); |
| 5962 | |
| 5963 | assign(b7, get_gpr_b7(r2)); |
| 5964 | assign(b6, get_gpr_b6(r2)); |
| 5965 | assign(b5, get_gpr_b5(r2)); |
| 5966 | assign(b4, get_gpr_b4(r2)); |
| 5967 | assign(b3, get_gpr_b3(r2)); |
| 5968 | assign(b2, get_gpr_b2(r2)); |
| 5969 | assign(b1, get_gpr_b1(r2)); |
| 5970 | assign(b0, get_gpr_b0(r2)); |
| 5971 | put_gpr_b0(r1, mkexpr(b7)); |
| 5972 | put_gpr_b1(r1, mkexpr(b6)); |
| 5973 | put_gpr_b2(r1, mkexpr(b5)); |
| 5974 | put_gpr_b3(r1, mkexpr(b4)); |
| 5975 | put_gpr_b4(r1, mkexpr(b3)); |
| 5976 | put_gpr_b5(r1, mkexpr(b2)); |
| 5977 | put_gpr_b6(r1, mkexpr(b1)); |
| 5978 | put_gpr_b7(r1, mkexpr(b0)); |
| 5979 | |
| 5980 | return "lrvgr"; |
| 5981 | } |
| 5982 | |
| 5983 | static HChar * |
| 5984 | s390_irgen_LRVH(UChar r1, IRTemp op2addr) |
| 5985 | { |
| 5986 | IRTemp op2 = newTemp(Ity_I16); |
| 5987 | |
| 5988 | assign(op2, load(Ity_I16, mkexpr(op2addr))); |
| 5989 | put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2))); |
| 5990 | put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2))); |
| 5991 | |
| 5992 | return "lrvh"; |
| 5993 | } |
| 5994 | |
| 5995 | static HChar * |
| 5996 | s390_irgen_LRV(UChar r1, IRTemp op2addr) |
| 5997 | { |
| 5998 | IRTemp op2 = newTemp(Ity_I32); |
| 5999 | |
| 6000 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 6001 | put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255)))); |
| 6002 | put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2), |
| 6003 | mkU8(8)), mkU32(255)))); |
| 6004 | put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2), |
| 6005 | mkU8(16)), mkU32(255)))); |
| 6006 | put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2), |
| 6007 | mkU8(24)), mkU32(255)))); |
| 6008 | |
| 6009 | return "lrv"; |
| 6010 | } |
| 6011 | |
| 6012 | static HChar * |
| 6013 | s390_irgen_LRVG(UChar r1, IRTemp op2addr) |
| 6014 | { |
| 6015 | IRTemp op2 = newTemp(Ity_I64); |
| 6016 | |
| 6017 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 6018 | put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255)))); |
| 6019 | put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), |
| 6020 | mkU8(8)), mkU64(255)))); |
| 6021 | put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), |
| 6022 | mkU8(16)), mkU64(255)))); |
| 6023 | put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), |
| 6024 | mkU8(24)), mkU64(255)))); |
| 6025 | put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), |
| 6026 | mkU8(32)), mkU64(255)))); |
| 6027 | put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), |
| 6028 | mkU8(40)), mkU64(255)))); |
| 6029 | put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), |
| 6030 | mkU8(48)), mkU64(255)))); |
| 6031 | put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), |
| 6032 | mkU8(56)), mkU64(255)))); |
| 6033 | |
| 6034 | return "lrvg"; |
| 6035 | } |
| 6036 | |
| 6037 | static HChar * |
| 6038 | s390_irgen_MVHHI(UShort i2, IRTemp op1addr) |
| 6039 | { |
| 6040 | store(mkexpr(op1addr), mkU16(i2)); |
| 6041 | |
| 6042 | return "mvhhi"; |
| 6043 | } |
| 6044 | |
| 6045 | static HChar * |
| 6046 | s390_irgen_MVHI(UShort i2, IRTemp op1addr) |
| 6047 | { |
| 6048 | store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2)); |
| 6049 | |
| 6050 | return "mvhi"; |
| 6051 | } |
| 6052 | |
| 6053 | static HChar * |
| 6054 | s390_irgen_MVGHI(UShort i2, IRTemp op1addr) |
| 6055 | { |
| 6056 | store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2)); |
| 6057 | |
| 6058 | return "mvghi"; |
| 6059 | } |
| 6060 | |
| 6061 | static HChar * |
| 6062 | s390_irgen_MVI(UChar i2, IRTemp op1addr) |
| 6063 | { |
| 6064 | store(mkexpr(op1addr), mkU8(i2)); |
| 6065 | |
| 6066 | return "mvi"; |
| 6067 | } |
| 6068 | |
| 6069 | static HChar * |
| 6070 | s390_irgen_MVIY(UChar i2, IRTemp op1addr) |
| 6071 | { |
| 6072 | store(mkexpr(op1addr), mkU8(i2)); |
| 6073 | |
| 6074 | return "mviy"; |
| 6075 | } |
| 6076 | |
| 6077 | static HChar * |
| 6078 | s390_irgen_MR(UChar r1, UChar r2) |
| 6079 | { |
| 6080 | IRTemp op1 = newTemp(Ity_I32); |
| 6081 | IRTemp op2 = newTemp(Ity_I32); |
| 6082 | IRTemp result = newTemp(Ity_I64); |
| 6083 | |
| 6084 | assign(op1, get_gpr_w1(r1 + 1)); |
| 6085 | assign(op2, get_gpr_w1(r2)); |
| 6086 | assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); |
| 6087 | put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); |
| 6088 | put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); |
| 6089 | |
| 6090 | return "mr"; |
| 6091 | } |
| 6092 | |
| 6093 | static HChar * |
| 6094 | s390_irgen_M(UChar r1, IRTemp op2addr) |
| 6095 | { |
| 6096 | IRTemp op1 = newTemp(Ity_I32); |
| 6097 | IRTemp op2 = newTemp(Ity_I32); |
| 6098 | IRTemp result = newTemp(Ity_I64); |
| 6099 | |
| 6100 | assign(op1, get_gpr_w1(r1 + 1)); |
| 6101 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 6102 | assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); |
| 6103 | put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); |
| 6104 | put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); |
| 6105 | |
| 6106 | return "m"; |
| 6107 | } |
| 6108 | |
| 6109 | static HChar * |
| 6110 | s390_irgen_MFY(UChar r1, IRTemp op2addr) |
| 6111 | { |
| 6112 | IRTemp op1 = newTemp(Ity_I32); |
| 6113 | IRTemp op2 = newTemp(Ity_I32); |
| 6114 | IRTemp result = newTemp(Ity_I64); |
| 6115 | |
| 6116 | assign(op1, get_gpr_w1(r1 + 1)); |
| 6117 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 6118 | assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); |
| 6119 | put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); |
| 6120 | put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); |
| 6121 | |
| 6122 | return "mfy"; |
| 6123 | } |
| 6124 | |
| 6125 | static HChar * |
| 6126 | s390_irgen_MH(UChar r1, IRTemp op2addr) |
| 6127 | { |
| 6128 | IRTemp op1 = newTemp(Ity_I32); |
| 6129 | IRTemp op2 = newTemp(Ity_I16); |
| 6130 | IRTemp result = newTemp(Ity_I64); |
| 6131 | |
| 6132 | assign(op1, get_gpr_w1(r1)); |
| 6133 | assign(op2, load(Ity_I16, mkexpr(op2addr))); |
| 6134 | assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2)) |
| 6135 | )); |
| 6136 | put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); |
| 6137 | |
| 6138 | return "mh"; |
| 6139 | } |
| 6140 | |
| 6141 | static HChar * |
| 6142 | s390_irgen_MHY(UChar r1, IRTemp op2addr) |
| 6143 | { |
| 6144 | IRTemp op1 = newTemp(Ity_I32); |
| 6145 | IRTemp op2 = newTemp(Ity_I16); |
| 6146 | IRTemp result = newTemp(Ity_I64); |
| 6147 | |
| 6148 | assign(op1, get_gpr_w1(r1)); |
| 6149 | assign(op2, load(Ity_I16, mkexpr(op2addr))); |
| 6150 | assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2)) |
| 6151 | )); |
| 6152 | put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); |
| 6153 | |
| 6154 | return "mhy"; |
| 6155 | } |
| 6156 | |
| 6157 | static HChar * |
| 6158 | s390_irgen_MHI(UChar r1, UShort i2) |
| 6159 | { |
| 6160 | IRTemp op1 = newTemp(Ity_I32); |
| 6161 | Short op2; |
| 6162 | IRTemp result = newTemp(Ity_I64); |
| 6163 | |
| 6164 | assign(op1, get_gpr_w1(r1)); |
| 6165 | op2 = (Short)i2; |
| 6166 | assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, |
| 6167 | mkU16((UShort)op2)))); |
| 6168 | put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); |
| 6169 | |
| 6170 | return "mhi"; |
| 6171 | } |
| 6172 | |
| 6173 | static HChar * |
| 6174 | s390_irgen_MGHI(UChar r1, UShort i2) |
| 6175 | { |
| 6176 | IRTemp op1 = newTemp(Ity_I64); |
| 6177 | Short op2; |
| 6178 | IRTemp result = newTemp(Ity_I128); |
| 6179 | |
| 6180 | assign(op1, get_gpr_dw0(r1)); |
| 6181 | op2 = (Short)i2; |
| 6182 | assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64, |
| 6183 | mkU16((UShort)op2)))); |
| 6184 | put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); |
| 6185 | |
| 6186 | return "mghi"; |
| 6187 | } |
| 6188 | |
| 6189 | static HChar * |
| 6190 | s390_irgen_MLR(UChar r1, UChar r2) |
| 6191 | { |
| 6192 | IRTemp op1 = newTemp(Ity_I32); |
| 6193 | IRTemp op2 = newTemp(Ity_I32); |
| 6194 | IRTemp result = newTemp(Ity_I64); |
| 6195 | |
| 6196 | assign(op1, get_gpr_w1(r1 + 1)); |
| 6197 | assign(op2, get_gpr_w1(r2)); |
| 6198 | assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2))); |
| 6199 | put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); |
| 6200 | put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); |
| 6201 | |
| 6202 | return "mlr"; |
| 6203 | } |
| 6204 | |
| 6205 | static HChar * |
| 6206 | s390_irgen_MLGR(UChar r1, UChar r2) |
| 6207 | { |
| 6208 | IRTemp op1 = newTemp(Ity_I64); |
| 6209 | IRTemp op2 = newTemp(Ity_I64); |
| 6210 | IRTemp result = newTemp(Ity_I128); |
| 6211 | |
| 6212 | assign(op1, get_gpr_dw0(r1 + 1)); |
| 6213 | assign(op2, get_gpr_dw0(r2)); |
| 6214 | assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2))); |
| 6215 | put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); |
| 6216 | put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); |
| 6217 | |
| 6218 | return "mlgr"; |
| 6219 | } |
| 6220 | |
| 6221 | static HChar * |
| 6222 | s390_irgen_ML(UChar r1, IRTemp op2addr) |
| 6223 | { |
| 6224 | IRTemp op1 = newTemp(Ity_I32); |
| 6225 | IRTemp op2 = newTemp(Ity_I32); |
| 6226 | IRTemp result = newTemp(Ity_I64); |
| 6227 | |
| 6228 | assign(op1, get_gpr_w1(r1 + 1)); |
| 6229 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 6230 | assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2))); |
| 6231 | put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); |
| 6232 | put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); |
| 6233 | |
| 6234 | return "ml"; |
| 6235 | } |
| 6236 | |
| 6237 | static HChar * |
| 6238 | s390_irgen_MLG(UChar r1, IRTemp op2addr) |
| 6239 | { |
| 6240 | IRTemp op1 = newTemp(Ity_I64); |
| 6241 | IRTemp op2 = newTemp(Ity_I64); |
| 6242 | IRTemp result = newTemp(Ity_I128); |
| 6243 | |
| 6244 | assign(op1, get_gpr_dw0(r1 + 1)); |
| 6245 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 6246 | assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2))); |
| 6247 | put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); |
| 6248 | put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); |
| 6249 | |
| 6250 | return "mlg"; |
| 6251 | } |
| 6252 | |
| 6253 | static HChar * |
| 6254 | s390_irgen_MSR(UChar r1, UChar r2) |
| 6255 | { |
| 6256 | IRTemp op1 = newTemp(Ity_I32); |
| 6257 | IRTemp op2 = newTemp(Ity_I32); |
| 6258 | IRTemp result = newTemp(Ity_I64); |
| 6259 | |
| 6260 | assign(op1, get_gpr_w1(r1)); |
| 6261 | assign(op2, get_gpr_w1(r2)); |
| 6262 | assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); |
| 6263 | put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); |
| 6264 | |
| 6265 | return "msr"; |
| 6266 | } |
| 6267 | |
| 6268 | static HChar * |
| 6269 | s390_irgen_MSGR(UChar r1, UChar r2) |
| 6270 | { |
| 6271 | IRTemp op1 = newTemp(Ity_I64); |
| 6272 | IRTemp op2 = newTemp(Ity_I64); |
| 6273 | IRTemp result = newTemp(Ity_I128); |
| 6274 | |
| 6275 | assign(op1, get_gpr_dw0(r1)); |
| 6276 | assign(op2, get_gpr_dw0(r2)); |
| 6277 | assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2))); |
| 6278 | put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); |
| 6279 | |
| 6280 | return "msgr"; |
| 6281 | } |
| 6282 | |
| 6283 | static HChar * |
| 6284 | s390_irgen_MSGFR(UChar r1, UChar r2) |
| 6285 | { |
| 6286 | IRTemp op1 = newTemp(Ity_I64); |
| 6287 | IRTemp op2 = newTemp(Ity_I32); |
| 6288 | IRTemp result = newTemp(Ity_I128); |
| 6289 | |
| 6290 | assign(op1, get_gpr_dw0(r1)); |
| 6291 | assign(op2, get_gpr_w1(r2)); |
| 6292 | assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2)) |
| 6293 | )); |
| 6294 | put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); |
| 6295 | |
| 6296 | return "msgfr"; |
| 6297 | } |
| 6298 | |
| 6299 | static HChar * |
| 6300 | s390_irgen_MS(UChar r1, IRTemp op2addr) |
| 6301 | { |
| 6302 | IRTemp op1 = newTemp(Ity_I32); |
| 6303 | IRTemp op2 = newTemp(Ity_I32); |
| 6304 | IRTemp result = newTemp(Ity_I64); |
| 6305 | |
| 6306 | assign(op1, get_gpr_w1(r1)); |
| 6307 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 6308 | assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); |
| 6309 | put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); |
| 6310 | |
| 6311 | return "ms"; |
| 6312 | } |
| 6313 | |
| 6314 | static HChar * |
| 6315 | s390_irgen_MSY(UChar r1, IRTemp op2addr) |
| 6316 | { |
| 6317 | IRTemp op1 = newTemp(Ity_I32); |
| 6318 | IRTemp op2 = newTemp(Ity_I32); |
| 6319 | IRTemp result = newTemp(Ity_I64); |
| 6320 | |
| 6321 | assign(op1, get_gpr_w1(r1)); |
| 6322 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 6323 | assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); |
| 6324 | put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); |
| 6325 | |
| 6326 | return "msy"; |
| 6327 | } |
| 6328 | |
| 6329 | static HChar * |
| 6330 | s390_irgen_MSG(UChar r1, IRTemp op2addr) |
| 6331 | { |
| 6332 | IRTemp op1 = newTemp(Ity_I64); |
| 6333 | IRTemp op2 = newTemp(Ity_I64); |
| 6334 | IRTemp result = newTemp(Ity_I128); |
| 6335 | |
| 6336 | assign(op1, get_gpr_dw0(r1)); |
| 6337 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 6338 | assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2))); |
| 6339 | put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); |
| 6340 | |
| 6341 | return "msg"; |
| 6342 | } |
| 6343 | |
| 6344 | static HChar * |
| 6345 | s390_irgen_MSGF(UChar r1, IRTemp op2addr) |
| 6346 | { |
| 6347 | IRTemp op1 = newTemp(Ity_I64); |
| 6348 | IRTemp op2 = newTemp(Ity_I32); |
| 6349 | IRTemp result = newTemp(Ity_I128); |
| 6350 | |
| 6351 | assign(op1, get_gpr_dw0(r1)); |
| 6352 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 6353 | assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2)) |
| 6354 | )); |
| 6355 | put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); |
| 6356 | |
| 6357 | return "msgf"; |
| 6358 | } |
| 6359 | |
| 6360 | static HChar * |
| 6361 | s390_irgen_MSFI(UChar r1, UInt i2) |
| 6362 | { |
| 6363 | IRTemp op1 = newTemp(Ity_I32); |
| 6364 | Int op2; |
| 6365 | IRTemp result = newTemp(Ity_I64); |
| 6366 | |
| 6367 | assign(op1, get_gpr_w1(r1)); |
| 6368 | op2 = (Int)i2; |
| 6369 | assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2))); |
| 6370 | put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); |
| 6371 | |
| 6372 | return "msfi"; |
| 6373 | } |
| 6374 | |
| 6375 | static HChar * |
| 6376 | s390_irgen_MSGFI(UChar r1, UInt i2) |
| 6377 | { |
| 6378 | IRTemp op1 = newTemp(Ity_I64); |
| 6379 | Int op2; |
| 6380 | IRTemp result = newTemp(Ity_I128); |
| 6381 | |
| 6382 | assign(op1, get_gpr_dw0(r1)); |
| 6383 | op2 = (Int)i2; |
| 6384 | assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt) |
| 6385 | op2)))); |
| 6386 | put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); |
| 6387 | |
| 6388 | return "msgfi"; |
| 6389 | } |
| 6390 | |
| 6391 | static HChar * |
| 6392 | s390_irgen_OR(UChar r1, UChar r2) |
| 6393 | { |
| 6394 | IRTemp op1 = newTemp(Ity_I32); |
| 6395 | IRTemp op2 = newTemp(Ity_I32); |
| 6396 | IRTemp result = newTemp(Ity_I32); |
| 6397 | |
| 6398 | assign(op1, get_gpr_w1(r1)); |
| 6399 | assign(op2, get_gpr_w1(r2)); |
| 6400 | assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2))); |
| 6401 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6402 | put_gpr_w1(r1, mkexpr(result)); |
| 6403 | |
| 6404 | return "or"; |
| 6405 | } |
| 6406 | |
| 6407 | static HChar * |
| 6408 | s390_irgen_OGR(UChar r1, UChar r2) |
| 6409 | { |
| 6410 | IRTemp op1 = newTemp(Ity_I64); |
| 6411 | IRTemp op2 = newTemp(Ity_I64); |
| 6412 | IRTemp result = newTemp(Ity_I64); |
| 6413 | |
| 6414 | assign(op1, get_gpr_dw0(r1)); |
| 6415 | assign(op2, get_gpr_dw0(r2)); |
| 6416 | assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2))); |
| 6417 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6418 | put_gpr_dw0(r1, mkexpr(result)); |
| 6419 | |
| 6420 | return "ogr"; |
| 6421 | } |
| 6422 | |
| 6423 | static HChar * |
| 6424 | s390_irgen_ORK(UChar r3, UChar r1, UChar r2) |
| 6425 | { |
| 6426 | IRTemp op2 = newTemp(Ity_I32); |
| 6427 | IRTemp op3 = newTemp(Ity_I32); |
| 6428 | IRTemp result = newTemp(Ity_I32); |
| 6429 | |
| 6430 | assign(op2, get_gpr_w1(r2)); |
| 6431 | assign(op3, get_gpr_w1(r3)); |
| 6432 | assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3))); |
| 6433 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6434 | put_gpr_w1(r1, mkexpr(result)); |
| 6435 | |
| 6436 | return "ork"; |
| 6437 | } |
| 6438 | |
| 6439 | static HChar * |
| 6440 | s390_irgen_OGRK(UChar r3, UChar r1, UChar r2) |
| 6441 | { |
| 6442 | IRTemp op2 = newTemp(Ity_I64); |
| 6443 | IRTemp op3 = newTemp(Ity_I64); |
| 6444 | IRTemp result = newTemp(Ity_I64); |
| 6445 | |
| 6446 | assign(op2, get_gpr_dw0(r2)); |
| 6447 | assign(op3, get_gpr_dw0(r3)); |
| 6448 | assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3))); |
| 6449 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6450 | put_gpr_dw0(r1, mkexpr(result)); |
| 6451 | |
| 6452 | return "ogrk"; |
| 6453 | } |
| 6454 | |
| 6455 | static HChar * |
| 6456 | s390_irgen_O(UChar r1, IRTemp op2addr) |
| 6457 | { |
| 6458 | IRTemp op1 = newTemp(Ity_I32); |
| 6459 | IRTemp op2 = newTemp(Ity_I32); |
| 6460 | IRTemp result = newTemp(Ity_I32); |
| 6461 | |
| 6462 | assign(op1, get_gpr_w1(r1)); |
| 6463 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 6464 | assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2))); |
| 6465 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6466 | put_gpr_w1(r1, mkexpr(result)); |
| 6467 | |
| 6468 | return "o"; |
| 6469 | } |
| 6470 | |
| 6471 | static HChar * |
| 6472 | s390_irgen_OY(UChar r1, IRTemp op2addr) |
| 6473 | { |
| 6474 | IRTemp op1 = newTemp(Ity_I32); |
| 6475 | IRTemp op2 = newTemp(Ity_I32); |
| 6476 | IRTemp result = newTemp(Ity_I32); |
| 6477 | |
| 6478 | assign(op1, get_gpr_w1(r1)); |
| 6479 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 6480 | assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2))); |
| 6481 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6482 | put_gpr_w1(r1, mkexpr(result)); |
| 6483 | |
| 6484 | return "oy"; |
| 6485 | } |
| 6486 | |
| 6487 | static HChar * |
| 6488 | s390_irgen_OG(UChar r1, IRTemp op2addr) |
| 6489 | { |
| 6490 | IRTemp op1 = newTemp(Ity_I64); |
| 6491 | IRTemp op2 = newTemp(Ity_I64); |
| 6492 | IRTemp result = newTemp(Ity_I64); |
| 6493 | |
| 6494 | assign(op1, get_gpr_dw0(r1)); |
| 6495 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 6496 | assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2))); |
| 6497 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6498 | put_gpr_dw0(r1, mkexpr(result)); |
| 6499 | |
| 6500 | return "og"; |
| 6501 | } |
| 6502 | |
| 6503 | static HChar * |
| 6504 | s390_irgen_OI(UChar i2, IRTemp op1addr) |
| 6505 | { |
| 6506 | IRTemp op1 = newTemp(Ity_I8); |
| 6507 | UChar op2; |
| 6508 | IRTemp result = newTemp(Ity_I8); |
| 6509 | |
| 6510 | assign(op1, load(Ity_I8, mkexpr(op1addr))); |
| 6511 | op2 = i2; |
| 6512 | assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2))); |
| 6513 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6514 | store(mkexpr(op1addr), mkexpr(result)); |
| 6515 | |
| 6516 | return "oi"; |
| 6517 | } |
| 6518 | |
| 6519 | static HChar * |
| 6520 | s390_irgen_OIY(UChar i2, IRTemp op1addr) |
| 6521 | { |
| 6522 | IRTemp op1 = newTemp(Ity_I8); |
| 6523 | UChar op2; |
| 6524 | IRTemp result = newTemp(Ity_I8); |
| 6525 | |
| 6526 | assign(op1, load(Ity_I8, mkexpr(op1addr))); |
| 6527 | op2 = i2; |
| 6528 | assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2))); |
| 6529 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6530 | store(mkexpr(op1addr), mkexpr(result)); |
| 6531 | |
| 6532 | return "oiy"; |
| 6533 | } |
| 6534 | |
| 6535 | static HChar * |
| 6536 | s390_irgen_OIHF(UChar r1, UInt i2) |
| 6537 | { |
| 6538 | IRTemp op1 = newTemp(Ity_I32); |
| 6539 | UInt op2; |
| 6540 | IRTemp result = newTemp(Ity_I32); |
| 6541 | |
| 6542 | assign(op1, get_gpr_w0(r1)); |
| 6543 | op2 = i2; |
| 6544 | assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2))); |
| 6545 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6546 | put_gpr_w0(r1, mkexpr(result)); |
| 6547 | |
| 6548 | return "oihf"; |
| 6549 | } |
| 6550 | |
| 6551 | static HChar * |
| 6552 | s390_irgen_OIHH(UChar r1, UShort i2) |
| 6553 | { |
| 6554 | IRTemp op1 = newTemp(Ity_I16); |
| 6555 | UShort op2; |
| 6556 | IRTemp result = newTemp(Ity_I16); |
| 6557 | |
| 6558 | assign(op1, get_gpr_hw0(r1)); |
| 6559 | op2 = i2; |
| 6560 | assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2))); |
| 6561 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6562 | put_gpr_hw0(r1, mkexpr(result)); |
| 6563 | |
| 6564 | return "oihh"; |
| 6565 | } |
| 6566 | |
| 6567 | static HChar * |
| 6568 | s390_irgen_OIHL(UChar r1, UShort i2) |
| 6569 | { |
| 6570 | IRTemp op1 = newTemp(Ity_I16); |
| 6571 | UShort op2; |
| 6572 | IRTemp result = newTemp(Ity_I16); |
| 6573 | |
| 6574 | assign(op1, get_gpr_hw1(r1)); |
| 6575 | op2 = i2; |
| 6576 | assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2))); |
| 6577 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6578 | put_gpr_hw1(r1, mkexpr(result)); |
| 6579 | |
| 6580 | return "oihl"; |
| 6581 | } |
| 6582 | |
| 6583 | static HChar * |
| 6584 | s390_irgen_OILF(UChar r1, UInt i2) |
| 6585 | { |
| 6586 | IRTemp op1 = newTemp(Ity_I32); |
| 6587 | UInt op2; |
| 6588 | IRTemp result = newTemp(Ity_I32); |
| 6589 | |
| 6590 | assign(op1, get_gpr_w1(r1)); |
| 6591 | op2 = i2; |
| 6592 | assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2))); |
| 6593 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6594 | put_gpr_w1(r1, mkexpr(result)); |
| 6595 | |
| 6596 | return "oilf"; |
| 6597 | } |
| 6598 | |
| 6599 | static HChar * |
| 6600 | s390_irgen_OILH(UChar r1, UShort i2) |
| 6601 | { |
| 6602 | IRTemp op1 = newTemp(Ity_I16); |
| 6603 | UShort op2; |
| 6604 | IRTemp result = newTemp(Ity_I16); |
| 6605 | |
| 6606 | assign(op1, get_gpr_hw2(r1)); |
| 6607 | op2 = i2; |
| 6608 | assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2))); |
| 6609 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6610 | put_gpr_hw2(r1, mkexpr(result)); |
| 6611 | |
| 6612 | return "oilh"; |
| 6613 | } |
| 6614 | |
| 6615 | static HChar * |
| 6616 | s390_irgen_OILL(UChar r1, UShort i2) |
| 6617 | { |
| 6618 | IRTemp op1 = newTemp(Ity_I16); |
| 6619 | UShort op2; |
| 6620 | IRTemp result = newTemp(Ity_I16); |
| 6621 | |
| 6622 | assign(op1, get_gpr_hw3(r1)); |
| 6623 | op2 = i2; |
| 6624 | assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2))); |
| 6625 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6626 | put_gpr_hw3(r1, mkexpr(result)); |
| 6627 | |
| 6628 | return "oill"; |
| 6629 | } |
| 6630 | |
| 6631 | static HChar * |
| 6632 | s390_irgen_PFD(void) |
| 6633 | { |
| 6634 | |
| 6635 | return "pfd"; |
| 6636 | } |
| 6637 | |
| 6638 | static HChar * |
| 6639 | s390_irgen_PFDRL(void) |
| 6640 | { |
| 6641 | |
| 6642 | return "pfdrl"; |
| 6643 | } |
| 6644 | |
| 6645 | static HChar * |
| 6646 | s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr) |
| 6647 | { |
| 6648 | IRTemp amount = newTemp(Ity_I64); |
| 6649 | IRTemp op = newTemp(Ity_I32); |
| 6650 | |
| 6651 | assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31))); |
| 6652 | assign(op, get_gpr_w1(r3)); |
| 6653 | put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8, |
| 6654 | mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, |
| 6655 | binop(Iop_Sub64, mkU64(32), mkexpr(amount)))))); |
| 6656 | |
| 6657 | return "rll"; |
| 6658 | } |
| 6659 | |
| 6660 | static HChar * |
| 6661 | s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr) |
| 6662 | { |
| 6663 | IRTemp amount = newTemp(Ity_I64); |
| 6664 | IRTemp op = newTemp(Ity_I64); |
| 6665 | |
| 6666 | assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63))); |
| 6667 | assign(op, get_gpr_dw0(r3)); |
| 6668 | put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8, |
| 6669 | mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, |
| 6670 | binop(Iop_Sub64, mkU64(64), mkexpr(amount)))))); |
| 6671 | |
| 6672 | return "rllg"; |
| 6673 | } |
| 6674 | |
| 6675 | static HChar * |
| 6676 | s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5) |
| 6677 | { |
| 6678 | UChar from; |
| 6679 | UChar to; |
| 6680 | UChar rot; |
| 6681 | UChar t_bit; |
| 6682 | ULong mask; |
| 6683 | ULong maskc; |
| 6684 | IRTemp result = newTemp(Ity_I64); |
| 6685 | IRTemp op2 = newTemp(Ity_I64); |
| 6686 | |
| 6687 | from = i3 & 63; |
| 6688 | to = i4 & 63; |
| 6689 | rot = i5 & 63; |
| 6690 | t_bit = i3 & 128; |
| 6691 | assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64, |
| 6692 | get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2), |
| 6693 | mkU8(64 - rot)))); |
| 6694 | if (from <= to) { |
| 6695 | mask = ~0ULL; |
| 6696 | mask = (mask >> from) & (mask << (63 - to)); |
| 6697 | maskc = ~mask; |
| 6698 | } else { |
| 6699 | maskc = ~0ULL; |
| 6700 | maskc = (maskc >> (to + 1)) & (maskc << (64 - from)); |
| 6701 | mask = ~maskc; |
| 6702 | } |
| 6703 | assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2) |
| 6704 | ), mkU64(mask))); |
| 6705 | if (t_bit == 0) { |
| 6706 | put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1), |
| 6707 | mkU64(maskc)), mkexpr(result))); |
| 6708 | } |
| 6709 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6710 | |
| 6711 | return "rnsbg"; |
| 6712 | } |
| 6713 | |
| 6714 | static HChar * |
| 6715 | s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5) |
| 6716 | { |
| 6717 | UChar from; |
| 6718 | UChar to; |
| 6719 | UChar rot; |
| 6720 | UChar t_bit; |
| 6721 | ULong mask; |
| 6722 | ULong maskc; |
| 6723 | IRTemp result = newTemp(Ity_I64); |
| 6724 | IRTemp op2 = newTemp(Ity_I64); |
| 6725 | |
| 6726 | from = i3 & 63; |
| 6727 | to = i4 & 63; |
| 6728 | rot = i5 & 63; |
| 6729 | t_bit = i3 & 128; |
| 6730 | assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64, |
| 6731 | get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2), |
| 6732 | mkU8(64 - rot)))); |
| 6733 | if (from <= to) { |
| 6734 | mask = ~0ULL; |
| 6735 | mask = (mask >> from) & (mask << (63 - to)); |
| 6736 | maskc = ~mask; |
| 6737 | } else { |
| 6738 | maskc = ~0ULL; |
| 6739 | maskc = (maskc >> (to + 1)) & (maskc << (64 - from)); |
| 6740 | mask = ~maskc; |
| 6741 | } |
| 6742 | assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2) |
| 6743 | ), mkU64(mask))); |
| 6744 | if (t_bit == 0) { |
| 6745 | put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1), |
| 6746 | mkU64(maskc)), mkexpr(result))); |
| 6747 | } |
| 6748 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6749 | |
| 6750 | return "rxsbg"; |
| 6751 | } |
| 6752 | |
| 6753 | static HChar * |
| 6754 | s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5) |
| 6755 | { |
| 6756 | UChar from; |
| 6757 | UChar to; |
| 6758 | UChar rot; |
| 6759 | UChar t_bit; |
| 6760 | ULong mask; |
| 6761 | ULong maskc; |
| 6762 | IRTemp result = newTemp(Ity_I64); |
| 6763 | IRTemp op2 = newTemp(Ity_I64); |
| 6764 | |
| 6765 | from = i3 & 63; |
| 6766 | to = i4 & 63; |
| 6767 | rot = i5 & 63; |
| 6768 | t_bit = i3 & 128; |
| 6769 | assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64, |
| 6770 | get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2), |
| 6771 | mkU8(64 - rot)))); |
| 6772 | if (from <= to) { |
| 6773 | mask = ~0ULL; |
| 6774 | mask = (mask >> from) & (mask << (63 - to)); |
| 6775 | maskc = ~mask; |
| 6776 | } else { |
| 6777 | maskc = ~0ULL; |
| 6778 | maskc = (maskc >> (to + 1)) & (maskc << (64 - from)); |
| 6779 | mask = ~maskc; |
| 6780 | } |
| 6781 | assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2) |
| 6782 | ), mkU64(mask))); |
| 6783 | if (t_bit == 0) { |
| 6784 | put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1), |
| 6785 | mkU64(maskc)), mkexpr(result))); |
| 6786 | } |
| 6787 | s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); |
| 6788 | |
| 6789 | return "rosbg"; |
| 6790 | } |
| 6791 | |
| 6792 | static HChar * |
| 6793 | s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5) |
| 6794 | { |
| 6795 | UChar from; |
| 6796 | UChar to; |
| 6797 | UChar rot; |
| 6798 | UChar z_bit; |
| 6799 | ULong mask; |
| 6800 | ULong maskc; |
| 6801 | IRTemp op2 = newTemp(Ity_I64); |
| 6802 | IRTemp result = newTemp(Ity_I64); |
| 6803 | |
| 6804 | from = i3 & 63; |
| 6805 | to = i4 & 63; |
| 6806 | rot = i5 & 63; |
| 6807 | z_bit = i4 & 128; |
| 6808 | assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64, |
| 6809 | get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2), |
| 6810 | mkU8(64 - rot)))); |
| 6811 | if (from <= to) { |
| 6812 | mask = ~0ULL; |
| 6813 | mask = (mask >> from) & (mask << (63 - to)); |
| 6814 | maskc = ~mask; |
| 6815 | } else { |
| 6816 | maskc = ~0ULL; |
| 6817 | maskc = (maskc >> (to + 1)) & (maskc << (64 - from)); |
| 6818 | mask = ~maskc; |
| 6819 | } |
| 6820 | if (z_bit == 0) { |
| 6821 | put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1), |
| 6822 | mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask)))); |
| 6823 | } else { |
| 6824 | put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask))); |
| 6825 | } |
| 6826 | assign(result, get_gpr_dw0(r1)); |
| 6827 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); |
| 6828 | |
| 6829 | return "risbg"; |
| 6830 | } |
| 6831 | |
| 6832 | static HChar * |
| 6833 | s390_irgen_SAR(UChar r1, UChar r2) |
| 6834 | { |
| 6835 | put_ar_w0(r1, get_gpr_w1(r2)); |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 6836 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 6837 | s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2); |
| 6838 | |
| 6839 | return "sar"; |
| 6840 | } |
| 6841 | |
| 6842 | static HChar * |
| 6843 | s390_irgen_SLDA(UChar r1, IRTemp op2addr) |
| 6844 | { |
| 6845 | IRTemp p1 = newTemp(Ity_I64); |
| 6846 | IRTemp p2 = newTemp(Ity_I64); |
| 6847 | IRTemp op = newTemp(Ity_I64); |
| 6848 | IRTemp result = newTemp(Ity_I64); |
florian | 417b22d | 2012-07-13 13:41:41 +0000 | [diff] [blame] | 6849 | ULong sign_mask; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 6850 | IRTemp shift_amount = newTemp(Ity_I64); |
| 6851 | |
| 6852 | assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1))); |
| 6853 | assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1))); |
| 6854 | assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2) |
| 6855 | )); |
| 6856 | sign_mask = 1ULL << 63; |
| 6857 | assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63))); |
| 6858 | assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op), |
florian | 417b22d | 2012-07-13 13:41:41 +0000 | [diff] [blame] | 6859 | unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)), |
| 6860 | binop(Iop_And64, mkexpr(op), mkU64(sign_mask)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 6861 | put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); |
| 6862 | put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); |
| 6863 | s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount); |
| 6864 | |
| 6865 | return "slda"; |
| 6866 | } |
| 6867 | |
| 6868 | static HChar * |
| 6869 | s390_irgen_SLDL(UChar r1, IRTemp op2addr) |
| 6870 | { |
| 6871 | IRTemp p1 = newTemp(Ity_I64); |
| 6872 | IRTemp p2 = newTemp(Ity_I64); |
| 6873 | IRTemp result = newTemp(Ity_I64); |
| 6874 | |
| 6875 | assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1))); |
| 6876 | assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1))); |
| 6877 | assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), |
| 6878 | mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64, |
| 6879 | mkexpr(op2addr), mkU64(63))))); |
| 6880 | put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); |
| 6881 | put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); |
| 6882 | |
| 6883 | return "sldl"; |
| 6884 | } |
| 6885 | |
| 6886 | static HChar * |
| 6887 | s390_irgen_SLA(UChar r1, IRTemp op2addr) |
| 6888 | { |
| 6889 | IRTemp uop = newTemp(Ity_I32); |
| 6890 | IRTemp result = newTemp(Ity_I32); |
| 6891 | UInt sign_mask; |
| 6892 | IRTemp shift_amount = newTemp(Ity_I64); |
| 6893 | IRTemp op = newTemp(Ity_I32); |
| 6894 | |
| 6895 | assign(op, get_gpr_w1(r1)); |
| 6896 | assign(uop, get_gpr_w1(r1)); |
| 6897 | sign_mask = 2147483648U; |
| 6898 | assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63))); |
| 6899 | assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop), |
| 6900 | unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)), |
| 6901 | binop(Iop_And32, mkexpr(uop), mkU32(sign_mask)))); |
| 6902 | put_gpr_w1(r1, mkexpr(result)); |
| 6903 | s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount); |
| 6904 | |
| 6905 | return "sla"; |
| 6906 | } |
| 6907 | |
| 6908 | static HChar * |
| 6909 | s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr) |
| 6910 | { |
| 6911 | IRTemp uop = newTemp(Ity_I32); |
| 6912 | IRTemp result = newTemp(Ity_I32); |
| 6913 | UInt sign_mask; |
| 6914 | IRTemp shift_amount = newTemp(Ity_I64); |
| 6915 | IRTemp op = newTemp(Ity_I32); |
| 6916 | |
| 6917 | assign(op, get_gpr_w1(r3)); |
| 6918 | assign(uop, get_gpr_w1(r3)); |
| 6919 | sign_mask = 2147483648U; |
| 6920 | assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63))); |
| 6921 | assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop), |
| 6922 | unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)), |
| 6923 | binop(Iop_And32, mkexpr(uop), mkU32(sign_mask)))); |
| 6924 | put_gpr_w1(r1, mkexpr(result)); |
| 6925 | s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount); |
| 6926 | |
| 6927 | return "slak"; |
| 6928 | } |
| 6929 | |
| 6930 | static HChar * |
| 6931 | s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr) |
| 6932 | { |
| 6933 | IRTemp uop = newTemp(Ity_I64); |
| 6934 | IRTemp result = newTemp(Ity_I64); |
| 6935 | ULong sign_mask; |
| 6936 | IRTemp shift_amount = newTemp(Ity_I64); |
| 6937 | IRTemp op = newTemp(Ity_I64); |
| 6938 | |
| 6939 | assign(op, get_gpr_dw0(r3)); |
| 6940 | assign(uop, get_gpr_dw0(r3)); |
| 6941 | sign_mask = 9223372036854775808ULL; |
| 6942 | assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63))); |
| 6943 | assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop), |
| 6944 | unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)), |
| 6945 | binop(Iop_And64, mkexpr(uop), mkU64(sign_mask)))); |
| 6946 | put_gpr_dw0(r1, mkexpr(result)); |
| 6947 | s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount); |
| 6948 | |
| 6949 | return "slag"; |
| 6950 | } |
| 6951 | |
| 6952 | static HChar * |
| 6953 | s390_irgen_SLL(UChar r1, IRTemp op2addr) |
| 6954 | { |
| 6955 | put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8, |
| 6956 | binop(Iop_And64, mkexpr(op2addr), mkU64(63))))); |
| 6957 | |
| 6958 | return "sll"; |
| 6959 | } |
| 6960 | |
| 6961 | static HChar * |
| 6962 | s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr) |
| 6963 | { |
| 6964 | put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8, |
| 6965 | binop(Iop_And64, mkexpr(op2addr), mkU64(63))))); |
| 6966 | |
| 6967 | return "sllk"; |
| 6968 | } |
| 6969 | |
| 6970 | static HChar * |
| 6971 | s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr) |
| 6972 | { |
| 6973 | put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8, |
| 6974 | binop(Iop_And64, mkexpr(op2addr), mkU64(63))))); |
| 6975 | |
| 6976 | return "sllg"; |
| 6977 | } |
| 6978 | |
| 6979 | static HChar * |
| 6980 | s390_irgen_SRDA(UChar r1, IRTemp op2addr) |
| 6981 | { |
| 6982 | IRTemp p1 = newTemp(Ity_I64); |
| 6983 | IRTemp p2 = newTemp(Ity_I64); |
| 6984 | IRTemp result = newTemp(Ity_I64); |
| 6985 | |
| 6986 | assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1))); |
| 6987 | assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1))); |
| 6988 | assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), |
| 6989 | mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64, |
| 6990 | mkexpr(op2addr), mkU64(63))))); |
| 6991 | put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); |
| 6992 | put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); |
| 6993 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result); |
| 6994 | |
| 6995 | return "srda"; |
| 6996 | } |
| 6997 | |
| 6998 | static HChar * |
| 6999 | s390_irgen_SRDL(UChar r1, IRTemp op2addr) |
| 7000 | { |
| 7001 | IRTemp p1 = newTemp(Ity_I64); |
| 7002 | IRTemp p2 = newTemp(Ity_I64); |
| 7003 | IRTemp result = newTemp(Ity_I64); |
| 7004 | |
| 7005 | assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1))); |
| 7006 | assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1))); |
| 7007 | assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), |
| 7008 | mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64, |
| 7009 | mkexpr(op2addr), mkU64(63))))); |
| 7010 | put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); |
| 7011 | put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); |
| 7012 | |
| 7013 | return "srdl"; |
| 7014 | } |
| 7015 | |
| 7016 | static HChar * |
| 7017 | s390_irgen_SRA(UChar r1, IRTemp op2addr) |
| 7018 | { |
| 7019 | IRTemp result = newTemp(Ity_I32); |
| 7020 | IRTemp op = newTemp(Ity_I32); |
| 7021 | |
| 7022 | assign(op, get_gpr_w1(r1)); |
| 7023 | assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, |
| 7024 | mkexpr(op2addr), mkU64(63))))); |
| 7025 | put_gpr_w1(r1, mkexpr(result)); |
| 7026 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result); |
| 7027 | |
| 7028 | return "sra"; |
| 7029 | } |
| 7030 | |
| 7031 | static HChar * |
| 7032 | s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr) |
| 7033 | { |
| 7034 | IRTemp result = newTemp(Ity_I32); |
| 7035 | IRTemp op = newTemp(Ity_I32); |
| 7036 | |
| 7037 | assign(op, get_gpr_w1(r3)); |
| 7038 | assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, |
| 7039 | mkexpr(op2addr), mkU64(63))))); |
| 7040 | put_gpr_w1(r1, mkexpr(result)); |
| 7041 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result); |
| 7042 | |
| 7043 | return "srak"; |
| 7044 | } |
| 7045 | |
| 7046 | static HChar * |
| 7047 | s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr) |
| 7048 | { |
| 7049 | IRTemp result = newTemp(Ity_I64); |
| 7050 | IRTemp op = newTemp(Ity_I64); |
| 7051 | |
| 7052 | assign(op, get_gpr_dw0(r3)); |
| 7053 | assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, |
| 7054 | mkexpr(op2addr), mkU64(63))))); |
| 7055 | put_gpr_dw0(r1, mkexpr(result)); |
| 7056 | s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result); |
| 7057 | |
| 7058 | return "srag"; |
| 7059 | } |
| 7060 | |
| 7061 | static HChar * |
| 7062 | s390_irgen_SRL(UChar r1, IRTemp op2addr) |
| 7063 | { |
| 7064 | IRTemp op = newTemp(Ity_I32); |
| 7065 | |
| 7066 | assign(op, get_gpr_w1(r1)); |
| 7067 | put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, |
| 7068 | mkexpr(op2addr), mkU64(63))))); |
| 7069 | |
| 7070 | return "srl"; |
| 7071 | } |
| 7072 | |
| 7073 | static HChar * |
| 7074 | s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr) |
| 7075 | { |
| 7076 | IRTemp op = newTemp(Ity_I32); |
| 7077 | |
| 7078 | assign(op, get_gpr_w1(r3)); |
| 7079 | put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, |
| 7080 | mkexpr(op2addr), mkU64(63))))); |
| 7081 | |
| 7082 | return "srlk"; |
| 7083 | } |
| 7084 | |
| 7085 | static HChar * |
| 7086 | s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr) |
| 7087 | { |
| 7088 | IRTemp op = newTemp(Ity_I64); |
| 7089 | |
| 7090 | assign(op, get_gpr_dw0(r3)); |
| 7091 | put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, |
| 7092 | mkexpr(op2addr), mkU64(63))))); |
| 7093 | |
| 7094 | return "srlg"; |
| 7095 | } |
| 7096 | |
| 7097 | static HChar * |
| 7098 | s390_irgen_ST(UChar r1, IRTemp op2addr) |
| 7099 | { |
| 7100 | store(mkexpr(op2addr), get_gpr_w1(r1)); |
| 7101 | |
| 7102 | return "st"; |
| 7103 | } |
| 7104 | |
| 7105 | static HChar * |
| 7106 | s390_irgen_STY(UChar r1, IRTemp op2addr) |
| 7107 | { |
| 7108 | store(mkexpr(op2addr), get_gpr_w1(r1)); |
| 7109 | |
| 7110 | return "sty"; |
| 7111 | } |
| 7112 | |
| 7113 | static HChar * |
| 7114 | s390_irgen_STG(UChar r1, IRTemp op2addr) |
| 7115 | { |
| 7116 | store(mkexpr(op2addr), get_gpr_dw0(r1)); |
| 7117 | |
| 7118 | return "stg"; |
| 7119 | } |
| 7120 | |
| 7121 | static HChar * |
| 7122 | s390_irgen_STRL(UChar r1, UInt i2) |
| 7123 | { |
| 7124 | store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)), |
| 7125 | get_gpr_w1(r1)); |
| 7126 | |
| 7127 | return "strl"; |
| 7128 | } |
| 7129 | |
| 7130 | static HChar * |
| 7131 | s390_irgen_STGRL(UChar r1, UInt i2) |
| 7132 | { |
| 7133 | store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)), |
| 7134 | get_gpr_dw0(r1)); |
| 7135 | |
| 7136 | return "stgrl"; |
| 7137 | } |
| 7138 | |
| 7139 | static HChar * |
| 7140 | s390_irgen_STC(UChar r1, IRTemp op2addr) |
| 7141 | { |
| 7142 | store(mkexpr(op2addr), get_gpr_b7(r1)); |
| 7143 | |
| 7144 | return "stc"; |
| 7145 | } |
| 7146 | |
| 7147 | static HChar * |
| 7148 | s390_irgen_STCY(UChar r1, IRTemp op2addr) |
| 7149 | { |
| 7150 | store(mkexpr(op2addr), get_gpr_b7(r1)); |
| 7151 | |
| 7152 | return "stcy"; |
| 7153 | } |
| 7154 | |
| 7155 | static HChar * |
| 7156 | s390_irgen_STCH(UChar r1, IRTemp op2addr) |
| 7157 | { |
| 7158 | store(mkexpr(op2addr), get_gpr_b3(r1)); |
| 7159 | |
| 7160 | return "stch"; |
| 7161 | } |
| 7162 | |
| 7163 | static HChar * |
| 7164 | s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr) |
| 7165 | { |
| 7166 | UChar mask; |
| 7167 | UChar n; |
| 7168 | |
| 7169 | mask = (UChar)r3; |
| 7170 | n = 0; |
| 7171 | if ((mask & 8) != 0) { |
| 7172 | store(mkexpr(op2addr), get_gpr_b4(r1)); |
| 7173 | n = n + 1; |
| 7174 | } |
| 7175 | if ((mask & 4) != 0) { |
| 7176 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1)); |
| 7177 | n = n + 1; |
| 7178 | } |
| 7179 | if ((mask & 2) != 0) { |
| 7180 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1)); |
| 7181 | n = n + 1; |
| 7182 | } |
| 7183 | if ((mask & 1) != 0) { |
| 7184 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1)); |
| 7185 | } |
| 7186 | |
| 7187 | return "stcm"; |
| 7188 | } |
| 7189 | |
| 7190 | static HChar * |
| 7191 | s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr) |
| 7192 | { |
| 7193 | UChar mask; |
| 7194 | UChar n; |
| 7195 | |
| 7196 | mask = (UChar)r3; |
| 7197 | n = 0; |
| 7198 | if ((mask & 8) != 0) { |
| 7199 | store(mkexpr(op2addr), get_gpr_b4(r1)); |
| 7200 | n = n + 1; |
| 7201 | } |
| 7202 | if ((mask & 4) != 0) { |
| 7203 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1)); |
| 7204 | n = n + 1; |
| 7205 | } |
| 7206 | if ((mask & 2) != 0) { |
| 7207 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1)); |
| 7208 | n = n + 1; |
| 7209 | } |
| 7210 | if ((mask & 1) != 0) { |
| 7211 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1)); |
| 7212 | } |
| 7213 | |
| 7214 | return "stcmy"; |
| 7215 | } |
| 7216 | |
| 7217 | static HChar * |
| 7218 | s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr) |
| 7219 | { |
| 7220 | UChar mask; |
| 7221 | UChar n; |
| 7222 | |
| 7223 | mask = (UChar)r3; |
| 7224 | n = 0; |
| 7225 | if ((mask & 8) != 0) { |
| 7226 | store(mkexpr(op2addr), get_gpr_b0(r1)); |
| 7227 | n = n + 1; |
| 7228 | } |
| 7229 | if ((mask & 4) != 0) { |
| 7230 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1)); |
| 7231 | n = n + 1; |
| 7232 | } |
| 7233 | if ((mask & 2) != 0) { |
| 7234 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1)); |
| 7235 | n = n + 1; |
| 7236 | } |
| 7237 | if ((mask & 1) != 0) { |
| 7238 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1)); |
| 7239 | } |
| 7240 | |
| 7241 | return "stcmh"; |
| 7242 | } |
| 7243 | |
| 7244 | static HChar * |
| 7245 | s390_irgen_STH(UChar r1, IRTemp op2addr) |
| 7246 | { |
| 7247 | store(mkexpr(op2addr), get_gpr_hw3(r1)); |
| 7248 | |
| 7249 | return "sth"; |
| 7250 | } |
| 7251 | |
| 7252 | static HChar * |
| 7253 | s390_irgen_STHY(UChar r1, IRTemp op2addr) |
| 7254 | { |
| 7255 | store(mkexpr(op2addr), get_gpr_hw3(r1)); |
| 7256 | |
| 7257 | return "sthy"; |
| 7258 | } |
| 7259 | |
| 7260 | static HChar * |
| 7261 | s390_irgen_STHRL(UChar r1, UInt i2) |
| 7262 | { |
| 7263 | store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)), |
| 7264 | get_gpr_hw3(r1)); |
| 7265 | |
| 7266 | return "sthrl"; |
| 7267 | } |
| 7268 | |
| 7269 | static HChar * |
| 7270 | s390_irgen_STHH(UChar r1, IRTemp op2addr) |
| 7271 | { |
| 7272 | store(mkexpr(op2addr), get_gpr_hw1(r1)); |
| 7273 | |
| 7274 | return "sthh"; |
| 7275 | } |
| 7276 | |
| 7277 | static HChar * |
| 7278 | s390_irgen_STFH(UChar r1, IRTemp op2addr) |
| 7279 | { |
| 7280 | store(mkexpr(op2addr), get_gpr_w0(r1)); |
| 7281 | |
| 7282 | return "stfh"; |
| 7283 | } |
| 7284 | |
| 7285 | static HChar * |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 7286 | s390_irgen_STOC(UChar r1, IRTemp op2addr) |
| 7287 | { |
| 7288 | /* condition is checked in format handler */ |
| 7289 | store(mkexpr(op2addr), get_gpr_w1(r1)); |
| 7290 | |
| 7291 | return "stoc"; |
| 7292 | } |
| 7293 | |
| 7294 | static HChar * |
| 7295 | s390_irgen_STOCG(UChar r1, IRTemp op2addr) |
| 7296 | { |
| 7297 | /* condition is checked in format handler */ |
| 7298 | store(mkexpr(op2addr), get_gpr_dw0(r1)); |
| 7299 | |
| 7300 | return "stocg"; |
| 7301 | } |
| 7302 | |
| 7303 | static HChar * |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 7304 | s390_irgen_STPQ(UChar r1, IRTemp op2addr) |
| 7305 | { |
| 7306 | store(mkexpr(op2addr), get_gpr_dw0(r1)); |
| 7307 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1)); |
| 7308 | |
| 7309 | return "stpq"; |
| 7310 | } |
| 7311 | |
| 7312 | static HChar * |
| 7313 | s390_irgen_STRVH(UChar r1, IRTemp op2addr) |
| 7314 | { |
| 7315 | store(mkexpr(op2addr), get_gpr_b7(r1)); |
| 7316 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1)); |
| 7317 | |
| 7318 | return "strvh"; |
| 7319 | } |
| 7320 | |
| 7321 | static HChar * |
| 7322 | s390_irgen_STRV(UChar r1, IRTemp op2addr) |
| 7323 | { |
| 7324 | store(mkexpr(op2addr), get_gpr_b7(r1)); |
| 7325 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1)); |
| 7326 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1)); |
| 7327 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1)); |
| 7328 | |
| 7329 | return "strv"; |
| 7330 | } |
| 7331 | |
| 7332 | static HChar * |
| 7333 | s390_irgen_STRVG(UChar r1, IRTemp op2addr) |
| 7334 | { |
| 7335 | store(mkexpr(op2addr), get_gpr_b7(r1)); |
| 7336 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1)); |
| 7337 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1)); |
| 7338 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1)); |
| 7339 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1)); |
| 7340 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1)); |
| 7341 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1)); |
| 7342 | store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1)); |
| 7343 | |
| 7344 | return "strvg"; |
| 7345 | } |
| 7346 | |
| 7347 | static HChar * |
| 7348 | s390_irgen_SR(UChar r1, UChar r2) |
| 7349 | { |
| 7350 | IRTemp op1 = newTemp(Ity_I32); |
| 7351 | IRTemp op2 = newTemp(Ity_I32); |
| 7352 | IRTemp result = newTemp(Ity_I32); |
| 7353 | |
| 7354 | assign(op1, get_gpr_w1(r1)); |
| 7355 | assign(op2, get_gpr_w1(r2)); |
| 7356 | assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); |
| 7357 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2); |
| 7358 | put_gpr_w1(r1, mkexpr(result)); |
| 7359 | |
| 7360 | return "sr"; |
| 7361 | } |
| 7362 | |
| 7363 | static HChar * |
| 7364 | s390_irgen_SGR(UChar r1, UChar r2) |
| 7365 | { |
| 7366 | IRTemp op1 = newTemp(Ity_I64); |
| 7367 | IRTemp op2 = newTemp(Ity_I64); |
| 7368 | IRTemp result = newTemp(Ity_I64); |
| 7369 | |
| 7370 | assign(op1, get_gpr_dw0(r1)); |
| 7371 | assign(op2, get_gpr_dw0(r2)); |
| 7372 | assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); |
| 7373 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2); |
| 7374 | put_gpr_dw0(r1, mkexpr(result)); |
| 7375 | |
| 7376 | return "sgr"; |
| 7377 | } |
| 7378 | |
| 7379 | static HChar * |
| 7380 | s390_irgen_SGFR(UChar r1, UChar r2) |
| 7381 | { |
| 7382 | IRTemp op1 = newTemp(Ity_I64); |
| 7383 | IRTemp op2 = newTemp(Ity_I64); |
| 7384 | IRTemp result = newTemp(Ity_I64); |
| 7385 | |
| 7386 | assign(op1, get_gpr_dw0(r1)); |
| 7387 | assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); |
| 7388 | assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); |
| 7389 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2); |
| 7390 | put_gpr_dw0(r1, mkexpr(result)); |
| 7391 | |
| 7392 | return "sgfr"; |
| 7393 | } |
| 7394 | |
| 7395 | static HChar * |
| 7396 | s390_irgen_SRK(UChar r3, UChar r1, UChar r2) |
| 7397 | { |
| 7398 | IRTemp op2 = newTemp(Ity_I32); |
| 7399 | IRTemp op3 = newTemp(Ity_I32); |
| 7400 | IRTemp result = newTemp(Ity_I32); |
| 7401 | |
| 7402 | assign(op2, get_gpr_w1(r2)); |
| 7403 | assign(op3, get_gpr_w1(r3)); |
| 7404 | assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); |
| 7405 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3); |
| 7406 | put_gpr_w1(r1, mkexpr(result)); |
| 7407 | |
| 7408 | return "srk"; |
| 7409 | } |
| 7410 | |
| 7411 | static HChar * |
| 7412 | s390_irgen_SGRK(UChar r3, UChar r1, UChar r2) |
| 7413 | { |
| 7414 | IRTemp op2 = newTemp(Ity_I64); |
| 7415 | IRTemp op3 = newTemp(Ity_I64); |
| 7416 | IRTemp result = newTemp(Ity_I64); |
| 7417 | |
| 7418 | assign(op2, get_gpr_dw0(r2)); |
| 7419 | assign(op3, get_gpr_dw0(r3)); |
| 7420 | assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3))); |
| 7421 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3); |
| 7422 | put_gpr_dw0(r1, mkexpr(result)); |
| 7423 | |
| 7424 | return "sgrk"; |
| 7425 | } |
| 7426 | |
| 7427 | static HChar * |
| 7428 | s390_irgen_S(UChar r1, IRTemp op2addr) |
| 7429 | { |
| 7430 | IRTemp op1 = newTemp(Ity_I32); |
| 7431 | IRTemp op2 = newTemp(Ity_I32); |
| 7432 | IRTemp result = newTemp(Ity_I32); |
| 7433 | |
| 7434 | assign(op1, get_gpr_w1(r1)); |
| 7435 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 7436 | assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); |
| 7437 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2); |
| 7438 | put_gpr_w1(r1, mkexpr(result)); |
| 7439 | |
| 7440 | return "s"; |
| 7441 | } |
| 7442 | |
| 7443 | static HChar * |
| 7444 | s390_irgen_SY(UChar r1, IRTemp op2addr) |
| 7445 | { |
| 7446 | IRTemp op1 = newTemp(Ity_I32); |
| 7447 | IRTemp op2 = newTemp(Ity_I32); |
| 7448 | IRTemp result = newTemp(Ity_I32); |
| 7449 | |
| 7450 | assign(op1, get_gpr_w1(r1)); |
| 7451 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 7452 | assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); |
| 7453 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2); |
| 7454 | put_gpr_w1(r1, mkexpr(result)); |
| 7455 | |
| 7456 | return "sy"; |
| 7457 | } |
| 7458 | |
| 7459 | static HChar * |
| 7460 | s390_irgen_SG(UChar r1, IRTemp op2addr) |
| 7461 | { |
| 7462 | IRTemp op1 = newTemp(Ity_I64); |
| 7463 | IRTemp op2 = newTemp(Ity_I64); |
| 7464 | IRTemp result = newTemp(Ity_I64); |
| 7465 | |
| 7466 | assign(op1, get_gpr_dw0(r1)); |
| 7467 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 7468 | assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); |
| 7469 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2); |
| 7470 | put_gpr_dw0(r1, mkexpr(result)); |
| 7471 | |
| 7472 | return "sg"; |
| 7473 | } |
| 7474 | |
| 7475 | static HChar * |
| 7476 | s390_irgen_SGF(UChar r1, IRTemp op2addr) |
| 7477 | { |
| 7478 | IRTemp op1 = newTemp(Ity_I64); |
| 7479 | IRTemp op2 = newTemp(Ity_I64); |
| 7480 | IRTemp result = newTemp(Ity_I64); |
| 7481 | |
| 7482 | assign(op1, get_gpr_dw0(r1)); |
| 7483 | assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); |
| 7484 | assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); |
| 7485 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2); |
| 7486 | put_gpr_dw0(r1, mkexpr(result)); |
| 7487 | |
| 7488 | return "sgf"; |
| 7489 | } |
| 7490 | |
| 7491 | static HChar * |
| 7492 | s390_irgen_SH(UChar r1, IRTemp op2addr) |
| 7493 | { |
| 7494 | IRTemp op1 = newTemp(Ity_I32); |
| 7495 | IRTemp op2 = newTemp(Ity_I32); |
| 7496 | IRTemp result = newTemp(Ity_I32); |
| 7497 | |
| 7498 | assign(op1, get_gpr_w1(r1)); |
| 7499 | assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); |
| 7500 | assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); |
| 7501 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2); |
| 7502 | put_gpr_w1(r1, mkexpr(result)); |
| 7503 | |
| 7504 | return "sh"; |
| 7505 | } |
| 7506 | |
| 7507 | static HChar * |
| 7508 | s390_irgen_SHY(UChar r1, IRTemp op2addr) |
| 7509 | { |
| 7510 | IRTemp op1 = newTemp(Ity_I32); |
| 7511 | IRTemp op2 = newTemp(Ity_I32); |
| 7512 | IRTemp result = newTemp(Ity_I32); |
| 7513 | |
| 7514 | assign(op1, get_gpr_w1(r1)); |
| 7515 | assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); |
| 7516 | assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); |
| 7517 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2); |
| 7518 | put_gpr_w1(r1, mkexpr(result)); |
| 7519 | |
| 7520 | return "shy"; |
| 7521 | } |
| 7522 | |
| 7523 | static HChar * |
| 7524 | s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2) |
| 7525 | { |
| 7526 | IRTemp op2 = newTemp(Ity_I32); |
| 7527 | IRTemp op3 = newTemp(Ity_I32); |
| 7528 | IRTemp result = newTemp(Ity_I32); |
| 7529 | |
| 7530 | assign(op2, get_gpr_w0(r1)); |
| 7531 | assign(op3, get_gpr_w0(r2)); |
| 7532 | assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); |
| 7533 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3); |
| 7534 | put_gpr_w0(r1, mkexpr(result)); |
| 7535 | |
| 7536 | return "shhhr"; |
| 7537 | } |
| 7538 | |
| 7539 | static HChar * |
| 7540 | s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2) |
| 7541 | { |
| 7542 | IRTemp op2 = newTemp(Ity_I32); |
| 7543 | IRTemp op3 = newTemp(Ity_I32); |
| 7544 | IRTemp result = newTemp(Ity_I32); |
| 7545 | |
| 7546 | assign(op2, get_gpr_w0(r1)); |
| 7547 | assign(op3, get_gpr_w1(r2)); |
| 7548 | assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); |
| 7549 | s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3); |
| 7550 | put_gpr_w0(r1, mkexpr(result)); |
| 7551 | |
| 7552 | return "shhlr"; |
| 7553 | } |
| 7554 | |
| 7555 | static HChar * |
| 7556 | s390_irgen_SLR(UChar r1, UChar r2) |
| 7557 | { |
| 7558 | IRTemp op1 = newTemp(Ity_I32); |
| 7559 | IRTemp op2 = newTemp(Ity_I32); |
| 7560 | IRTemp result = newTemp(Ity_I32); |
| 7561 | |
| 7562 | assign(op1, get_gpr_w1(r1)); |
| 7563 | assign(op2, get_gpr_w1(r2)); |
| 7564 | assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); |
| 7565 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2); |
| 7566 | put_gpr_w1(r1, mkexpr(result)); |
| 7567 | |
| 7568 | return "slr"; |
| 7569 | } |
| 7570 | |
| 7571 | static HChar * |
| 7572 | s390_irgen_SLGR(UChar r1, UChar r2) |
| 7573 | { |
| 7574 | IRTemp op1 = newTemp(Ity_I64); |
| 7575 | IRTemp op2 = newTemp(Ity_I64); |
| 7576 | IRTemp result = newTemp(Ity_I64); |
| 7577 | |
| 7578 | assign(op1, get_gpr_dw0(r1)); |
| 7579 | assign(op2, get_gpr_dw0(r2)); |
| 7580 | assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); |
| 7581 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2); |
| 7582 | put_gpr_dw0(r1, mkexpr(result)); |
| 7583 | |
| 7584 | return "slgr"; |
| 7585 | } |
| 7586 | |
| 7587 | static HChar * |
| 7588 | s390_irgen_SLGFR(UChar r1, UChar r2) |
| 7589 | { |
| 7590 | IRTemp op1 = newTemp(Ity_I64); |
| 7591 | IRTemp op2 = newTemp(Ity_I64); |
| 7592 | IRTemp result = newTemp(Ity_I64); |
| 7593 | |
| 7594 | assign(op1, get_gpr_dw0(r1)); |
| 7595 | assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2))); |
| 7596 | assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); |
| 7597 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2); |
| 7598 | put_gpr_dw0(r1, mkexpr(result)); |
| 7599 | |
| 7600 | return "slgfr"; |
| 7601 | } |
| 7602 | |
| 7603 | static HChar * |
| 7604 | s390_irgen_SLRK(UChar r3, UChar r1, UChar r2) |
| 7605 | { |
| 7606 | IRTemp op2 = newTemp(Ity_I32); |
| 7607 | IRTemp op3 = newTemp(Ity_I32); |
| 7608 | IRTemp result = newTemp(Ity_I32); |
| 7609 | |
| 7610 | assign(op2, get_gpr_w1(r2)); |
| 7611 | assign(op3, get_gpr_w1(r3)); |
| 7612 | assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); |
| 7613 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3); |
| 7614 | put_gpr_w1(r1, mkexpr(result)); |
| 7615 | |
| 7616 | return "slrk"; |
| 7617 | } |
| 7618 | |
| 7619 | static HChar * |
| 7620 | s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2) |
| 7621 | { |
| 7622 | IRTemp op2 = newTemp(Ity_I64); |
| 7623 | IRTemp op3 = newTemp(Ity_I64); |
| 7624 | IRTemp result = newTemp(Ity_I64); |
| 7625 | |
| 7626 | assign(op2, get_gpr_dw0(r2)); |
| 7627 | assign(op3, get_gpr_dw0(r3)); |
| 7628 | assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3))); |
| 7629 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3); |
| 7630 | put_gpr_dw0(r1, mkexpr(result)); |
| 7631 | |
| 7632 | return "slgrk"; |
| 7633 | } |
| 7634 | |
| 7635 | static HChar * |
| 7636 | s390_irgen_SL(UChar r1, IRTemp op2addr) |
| 7637 | { |
| 7638 | IRTemp op1 = newTemp(Ity_I32); |
| 7639 | IRTemp op2 = newTemp(Ity_I32); |
| 7640 | IRTemp result = newTemp(Ity_I32); |
| 7641 | |
| 7642 | assign(op1, get_gpr_w1(r1)); |
| 7643 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 7644 | assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); |
| 7645 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2); |
| 7646 | put_gpr_w1(r1, mkexpr(result)); |
| 7647 | |
| 7648 | return "sl"; |
| 7649 | } |
| 7650 | |
| 7651 | static HChar * |
| 7652 | s390_irgen_SLY(UChar r1, IRTemp op2addr) |
| 7653 | { |
| 7654 | IRTemp op1 = newTemp(Ity_I32); |
| 7655 | IRTemp op2 = newTemp(Ity_I32); |
| 7656 | IRTemp result = newTemp(Ity_I32); |
| 7657 | |
| 7658 | assign(op1, get_gpr_w1(r1)); |
| 7659 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 7660 | assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); |
| 7661 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2); |
| 7662 | put_gpr_w1(r1, mkexpr(result)); |
| 7663 | |
| 7664 | return "sly"; |
| 7665 | } |
| 7666 | |
| 7667 | static HChar * |
| 7668 | s390_irgen_SLG(UChar r1, IRTemp op2addr) |
| 7669 | { |
| 7670 | IRTemp op1 = newTemp(Ity_I64); |
| 7671 | IRTemp op2 = newTemp(Ity_I64); |
| 7672 | IRTemp result = newTemp(Ity_I64); |
| 7673 | |
| 7674 | assign(op1, get_gpr_dw0(r1)); |
| 7675 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 7676 | assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); |
| 7677 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2); |
| 7678 | put_gpr_dw0(r1, mkexpr(result)); |
| 7679 | |
| 7680 | return "slg"; |
| 7681 | } |
| 7682 | |
| 7683 | static HChar * |
| 7684 | s390_irgen_SLGF(UChar r1, IRTemp op2addr) |
| 7685 | { |
| 7686 | IRTemp op1 = newTemp(Ity_I64); |
| 7687 | IRTemp op2 = newTemp(Ity_I64); |
| 7688 | IRTemp result = newTemp(Ity_I64); |
| 7689 | |
| 7690 | assign(op1, get_gpr_dw0(r1)); |
| 7691 | assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr)))); |
| 7692 | assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); |
| 7693 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2); |
| 7694 | put_gpr_dw0(r1, mkexpr(result)); |
| 7695 | |
| 7696 | return "slgf"; |
| 7697 | } |
| 7698 | |
| 7699 | static HChar * |
| 7700 | s390_irgen_SLFI(UChar r1, UInt i2) |
| 7701 | { |
| 7702 | IRTemp op1 = newTemp(Ity_I32); |
| 7703 | UInt op2; |
| 7704 | IRTemp result = newTemp(Ity_I32); |
| 7705 | |
| 7706 | assign(op1, get_gpr_w1(r1)); |
| 7707 | op2 = i2; |
| 7708 | assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2))); |
| 7709 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32, |
| 7710 | mkU32(op2))); |
| 7711 | put_gpr_w1(r1, mkexpr(result)); |
| 7712 | |
| 7713 | return "slfi"; |
| 7714 | } |
| 7715 | |
| 7716 | static HChar * |
| 7717 | s390_irgen_SLGFI(UChar r1, UInt i2) |
| 7718 | { |
| 7719 | IRTemp op1 = newTemp(Ity_I64); |
| 7720 | ULong op2; |
| 7721 | IRTemp result = newTemp(Ity_I64); |
| 7722 | |
| 7723 | assign(op1, get_gpr_dw0(r1)); |
| 7724 | op2 = (ULong)i2; |
| 7725 | assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2))); |
| 7726 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64, |
| 7727 | mkU64(op2))); |
| 7728 | put_gpr_dw0(r1, mkexpr(result)); |
| 7729 | |
| 7730 | return "slgfi"; |
| 7731 | } |
| 7732 | |
| 7733 | static HChar * |
| 7734 | s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2) |
| 7735 | { |
| 7736 | IRTemp op2 = newTemp(Ity_I32); |
| 7737 | IRTemp op3 = newTemp(Ity_I32); |
| 7738 | IRTemp result = newTemp(Ity_I32); |
| 7739 | |
| 7740 | assign(op2, get_gpr_w0(r1)); |
| 7741 | assign(op3, get_gpr_w0(r2)); |
| 7742 | assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); |
| 7743 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3); |
| 7744 | put_gpr_w0(r1, mkexpr(result)); |
| 7745 | |
| 7746 | return "slhhhr"; |
| 7747 | } |
| 7748 | |
| 7749 | static HChar * |
| 7750 | s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2) |
| 7751 | { |
| 7752 | IRTemp op2 = newTemp(Ity_I32); |
| 7753 | IRTemp op3 = newTemp(Ity_I32); |
| 7754 | IRTemp result = newTemp(Ity_I32); |
| 7755 | |
| 7756 | assign(op2, get_gpr_w0(r1)); |
| 7757 | assign(op3, get_gpr_w1(r2)); |
| 7758 | assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); |
| 7759 | s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3); |
| 7760 | put_gpr_w0(r1, mkexpr(result)); |
| 7761 | |
| 7762 | return "slhhlr"; |
| 7763 | } |
| 7764 | |
| 7765 | static HChar * |
| 7766 | s390_irgen_SLBR(UChar r1, UChar r2) |
| 7767 | { |
| 7768 | IRTemp op1 = newTemp(Ity_I32); |
| 7769 | IRTemp op2 = newTemp(Ity_I32); |
| 7770 | IRTemp result = newTemp(Ity_I32); |
| 7771 | IRTemp borrow_in = newTemp(Ity_I32); |
| 7772 | |
| 7773 | assign(op1, get_gpr_w1(r1)); |
| 7774 | assign(op2, get_gpr_w1(r2)); |
| 7775 | assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32, |
| 7776 | s390_call_calculate_cc(), mkU8(1)))); |
| 7777 | assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)), |
| 7778 | mkexpr(borrow_in))); |
| 7779 | s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in); |
| 7780 | put_gpr_w1(r1, mkexpr(result)); |
| 7781 | |
| 7782 | return "slbr"; |
| 7783 | } |
| 7784 | |
| 7785 | static HChar * |
| 7786 | s390_irgen_SLBGR(UChar r1, UChar r2) |
| 7787 | { |
| 7788 | IRTemp op1 = newTemp(Ity_I64); |
| 7789 | IRTemp op2 = newTemp(Ity_I64); |
| 7790 | IRTemp result = newTemp(Ity_I64); |
| 7791 | IRTemp borrow_in = newTemp(Ity_I64); |
| 7792 | |
| 7793 | assign(op1, get_gpr_dw0(r1)); |
| 7794 | assign(op2, get_gpr_dw0(r2)); |
| 7795 | assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1), |
| 7796 | binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1))))); |
| 7797 | assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)), |
| 7798 | mkexpr(borrow_in))); |
| 7799 | s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in); |
| 7800 | put_gpr_dw0(r1, mkexpr(result)); |
| 7801 | |
| 7802 | return "slbgr"; |
| 7803 | } |
| 7804 | |
| 7805 | static HChar * |
| 7806 | s390_irgen_SLB(UChar r1, IRTemp op2addr) |
| 7807 | { |
| 7808 | IRTemp op1 = newTemp(Ity_I32); |
| 7809 | IRTemp op2 = newTemp(Ity_I32); |
| 7810 | IRTemp result = newTemp(Ity_I32); |
| 7811 | IRTemp borrow_in = newTemp(Ity_I32); |
| 7812 | |
| 7813 | assign(op1, get_gpr_w1(r1)); |
| 7814 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 7815 | assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32, |
| 7816 | s390_call_calculate_cc(), mkU8(1)))); |
| 7817 | assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)), |
| 7818 | mkexpr(borrow_in))); |
| 7819 | s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in); |
| 7820 | put_gpr_w1(r1, mkexpr(result)); |
| 7821 | |
| 7822 | return "slb"; |
| 7823 | } |
| 7824 | |
| 7825 | static HChar * |
| 7826 | s390_irgen_SLBG(UChar r1, IRTemp op2addr) |
| 7827 | { |
| 7828 | IRTemp op1 = newTemp(Ity_I64); |
| 7829 | IRTemp op2 = newTemp(Ity_I64); |
| 7830 | IRTemp result = newTemp(Ity_I64); |
| 7831 | IRTemp borrow_in = newTemp(Ity_I64); |
| 7832 | |
| 7833 | assign(op1, get_gpr_dw0(r1)); |
| 7834 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 7835 | assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1), |
| 7836 | binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1))))); |
| 7837 | assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)), |
| 7838 | mkexpr(borrow_in))); |
| 7839 | s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in); |
| 7840 | put_gpr_dw0(r1, mkexpr(result)); |
| 7841 | |
| 7842 | return "slbg"; |
| 7843 | } |
| 7844 | |
| 7845 | static HChar * |
| 7846 | s390_irgen_SVC(UChar i) |
| 7847 | { |
| 7848 | IRTemp sysno = newTemp(Ity_I64); |
| 7849 | |
| 7850 | if (i != 0) { |
| 7851 | assign(sysno, mkU64(i)); |
| 7852 | } else { |
| 7853 | assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1))); |
| 7854 | } |
| 7855 | system_call(mkexpr(sysno)); |
| 7856 | |
| 7857 | return "svc"; |
| 7858 | } |
| 7859 | |
| 7860 | static HChar * |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 7861 | s390_irgen_TM(UChar i2, IRTemp op1addr) |
| 7862 | { |
| 7863 | UChar mask; |
| 7864 | IRTemp value = newTemp(Ity_I8); |
| 7865 | |
| 7866 | mask = i2; |
| 7867 | assign(value, load(Ity_I8, mkexpr(op1addr))); |
| 7868 | s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8, |
| 7869 | mkU8(mask))); |
| 7870 | |
| 7871 | return "tm"; |
| 7872 | } |
| 7873 | |
| 7874 | static HChar * |
| 7875 | s390_irgen_TMY(UChar i2, IRTemp op1addr) |
| 7876 | { |
| 7877 | UChar mask; |
| 7878 | IRTemp value = newTemp(Ity_I8); |
| 7879 | |
| 7880 | mask = i2; |
| 7881 | assign(value, load(Ity_I8, mkexpr(op1addr))); |
| 7882 | s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8, |
| 7883 | mkU8(mask))); |
| 7884 | |
| 7885 | return "tmy"; |
| 7886 | } |
| 7887 | |
| 7888 | static HChar * |
| 7889 | s390_irgen_TMHH(UChar r1, UShort i2) |
| 7890 | { |
| 7891 | UShort mask; |
| 7892 | IRTemp value = newTemp(Ity_I16); |
| 7893 | |
| 7894 | mask = i2; |
| 7895 | assign(value, get_gpr_hw0(r1)); |
| 7896 | s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16, |
| 7897 | mkU16(mask))); |
| 7898 | |
| 7899 | return "tmhh"; |
| 7900 | } |
| 7901 | |
| 7902 | static HChar * |
| 7903 | s390_irgen_TMHL(UChar r1, UShort i2) |
| 7904 | { |
| 7905 | UShort mask; |
| 7906 | IRTemp value = newTemp(Ity_I16); |
| 7907 | |
| 7908 | mask = i2; |
| 7909 | assign(value, get_gpr_hw1(r1)); |
| 7910 | s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16, |
| 7911 | mkU16(mask))); |
| 7912 | |
| 7913 | return "tmhl"; |
| 7914 | } |
| 7915 | |
| 7916 | static HChar * |
| 7917 | s390_irgen_TMLH(UChar r1, UShort i2) |
| 7918 | { |
| 7919 | UShort mask; |
| 7920 | IRTemp value = newTemp(Ity_I16); |
| 7921 | |
| 7922 | mask = i2; |
| 7923 | assign(value, get_gpr_hw2(r1)); |
| 7924 | s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16, |
| 7925 | mkU16(mask))); |
| 7926 | |
| 7927 | return "tmlh"; |
| 7928 | } |
| 7929 | |
| 7930 | static HChar * |
| 7931 | s390_irgen_TMLL(UChar r1, UShort i2) |
| 7932 | { |
| 7933 | UShort mask; |
| 7934 | IRTemp value = newTemp(Ity_I16); |
| 7935 | |
| 7936 | mask = i2; |
| 7937 | assign(value, get_gpr_hw3(r1)); |
| 7938 | s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16, |
| 7939 | mkU16(mask))); |
| 7940 | |
| 7941 | return "tmll"; |
| 7942 | } |
| 7943 | |
| 7944 | static HChar * |
| 7945 | s390_irgen_EFPC(UChar r1) |
| 7946 | { |
| 7947 | put_gpr_w1(r1, get_fpc_w0()); |
| 7948 | |
| 7949 | return "efpc"; |
| 7950 | } |
| 7951 | |
| 7952 | static HChar * |
| 7953 | s390_irgen_LER(UChar r1, UChar r2) |
| 7954 | { |
| 7955 | put_fpr_w0(r1, get_fpr_w0(r2)); |
| 7956 | |
| 7957 | return "ler"; |
| 7958 | } |
| 7959 | |
| 7960 | static HChar * |
| 7961 | s390_irgen_LDR(UChar r1, UChar r2) |
| 7962 | { |
| 7963 | put_fpr_dw0(r1, get_fpr_dw0(r2)); |
| 7964 | |
| 7965 | return "ldr"; |
| 7966 | } |
| 7967 | |
| 7968 | static HChar * |
| 7969 | s390_irgen_LXR(UChar r1, UChar r2) |
| 7970 | { |
| 7971 | put_fpr_dw0(r1, get_fpr_dw0(r2)); |
| 7972 | put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2)); |
| 7973 | |
| 7974 | return "lxr"; |
| 7975 | } |
| 7976 | |
| 7977 | static HChar * |
| 7978 | s390_irgen_LE(UChar r1, IRTemp op2addr) |
| 7979 | { |
| 7980 | put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr))); |
| 7981 | |
| 7982 | return "le"; |
| 7983 | } |
| 7984 | |
| 7985 | static HChar * |
| 7986 | s390_irgen_LD(UChar r1, IRTemp op2addr) |
| 7987 | { |
| 7988 | put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr))); |
| 7989 | |
| 7990 | return "ld"; |
| 7991 | } |
| 7992 | |
| 7993 | static HChar * |
| 7994 | s390_irgen_LEY(UChar r1, IRTemp op2addr) |
| 7995 | { |
| 7996 | put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr))); |
| 7997 | |
| 7998 | return "ley"; |
| 7999 | } |
| 8000 | |
| 8001 | static HChar * |
| 8002 | s390_irgen_LDY(UChar r1, IRTemp op2addr) |
| 8003 | { |
| 8004 | put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr))); |
| 8005 | |
| 8006 | return "ldy"; |
| 8007 | } |
| 8008 | |
| 8009 | static HChar * |
| 8010 | s390_irgen_LFPC(IRTemp op2addr) |
| 8011 | { |
| 8012 | put_fpc_w0(load(Ity_I32, mkexpr(op2addr))); |
| 8013 | |
| 8014 | return "lfpc"; |
| 8015 | } |
| 8016 | |
| 8017 | static HChar * |
| 8018 | s390_irgen_LZER(UChar r1) |
| 8019 | { |
| 8020 | put_fpr_w0(r1, mkF32i(0x0)); |
| 8021 | |
| 8022 | return "lzer"; |
| 8023 | } |
| 8024 | |
| 8025 | static HChar * |
| 8026 | s390_irgen_LZDR(UChar r1) |
| 8027 | { |
| 8028 | put_fpr_dw0(r1, mkF64i(0x0)); |
| 8029 | |
| 8030 | return "lzdr"; |
| 8031 | } |
| 8032 | |
| 8033 | static HChar * |
| 8034 | s390_irgen_LZXR(UChar r1) |
| 8035 | { |
| 8036 | put_fpr_dw0(r1, mkF64i(0x0)); |
| 8037 | put_fpr_dw0(r1 + 2, mkF64i(0x0)); |
| 8038 | |
| 8039 | return "lzxr"; |
| 8040 | } |
| 8041 | |
| 8042 | static HChar * |
| 8043 | s390_irgen_SRNM(IRTemp op2addr) |
| 8044 | { |
| 8045 | UInt mask; |
| 8046 | |
| 8047 | mask = 3; |
| 8048 | put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)), |
| 8049 | binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask))) |
| 8050 | ); |
| 8051 | |
| 8052 | return "srnm"; |
| 8053 | } |
| 8054 | |
| 8055 | static HChar * |
| 8056 | s390_irgen_SFPC(UChar r1) |
| 8057 | { |
| 8058 | put_fpc_w0(get_gpr_w1(r1)); |
| 8059 | |
| 8060 | return "sfpc"; |
| 8061 | } |
| 8062 | |
| 8063 | static HChar * |
| 8064 | s390_irgen_STE(UChar r1, IRTemp op2addr) |
| 8065 | { |
| 8066 | store(mkexpr(op2addr), get_fpr_w0(r1)); |
| 8067 | |
| 8068 | return "ste"; |
| 8069 | } |
| 8070 | |
| 8071 | static HChar * |
| 8072 | s390_irgen_STD(UChar r1, IRTemp op2addr) |
| 8073 | { |
| 8074 | store(mkexpr(op2addr), get_fpr_dw0(r1)); |
| 8075 | |
| 8076 | return "std"; |
| 8077 | } |
| 8078 | |
| 8079 | static HChar * |
| 8080 | s390_irgen_STEY(UChar r1, IRTemp op2addr) |
| 8081 | { |
| 8082 | store(mkexpr(op2addr), get_fpr_w0(r1)); |
| 8083 | |
| 8084 | return "stey"; |
| 8085 | } |
| 8086 | |
| 8087 | static HChar * |
| 8088 | s390_irgen_STDY(UChar r1, IRTemp op2addr) |
| 8089 | { |
| 8090 | store(mkexpr(op2addr), get_fpr_dw0(r1)); |
| 8091 | |
| 8092 | return "stdy"; |
| 8093 | } |
| 8094 | |
| 8095 | static HChar * |
| 8096 | s390_irgen_STFPC(IRTemp op2addr) |
| 8097 | { |
| 8098 | store(mkexpr(op2addr), get_fpc_w0()); |
| 8099 | |
| 8100 | return "stfpc"; |
| 8101 | } |
| 8102 | |
| 8103 | static HChar * |
| 8104 | s390_irgen_AEBR(UChar r1, UChar r2) |
| 8105 | { |
| 8106 | IRTemp op1 = newTemp(Ity_F32); |
| 8107 | IRTemp op2 = newTemp(Ity_F32); |
| 8108 | IRTemp result = newTemp(Ity_F32); |
| 8109 | |
| 8110 | assign(op1, get_fpr_w0(r1)); |
| 8111 | assign(op2, get_fpr_w0(r2)); |
| 8112 | assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8113 | mkexpr(op2))); |
| 8114 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); |
| 8115 | put_fpr_w0(r1, mkexpr(result)); |
| 8116 | |
| 8117 | return "aebr"; |
| 8118 | } |
| 8119 | |
| 8120 | static HChar * |
| 8121 | s390_irgen_ADBR(UChar r1, UChar r2) |
| 8122 | { |
| 8123 | IRTemp op1 = newTemp(Ity_F64); |
| 8124 | IRTemp op2 = newTemp(Ity_F64); |
| 8125 | IRTemp result = newTemp(Ity_F64); |
| 8126 | |
| 8127 | assign(op1, get_fpr_dw0(r1)); |
| 8128 | assign(op2, get_fpr_dw0(r2)); |
| 8129 | assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8130 | mkexpr(op2))); |
| 8131 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); |
| 8132 | put_fpr_dw0(r1, mkexpr(result)); |
| 8133 | |
| 8134 | return "adbr"; |
| 8135 | } |
| 8136 | |
| 8137 | static HChar * |
| 8138 | s390_irgen_AEB(UChar r1, IRTemp op2addr) |
| 8139 | { |
| 8140 | IRTemp op1 = newTemp(Ity_F32); |
| 8141 | IRTemp op2 = newTemp(Ity_F32); |
| 8142 | IRTemp result = newTemp(Ity_F32); |
| 8143 | |
| 8144 | assign(op1, get_fpr_w0(r1)); |
| 8145 | assign(op2, load(Ity_F32, mkexpr(op2addr))); |
| 8146 | assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8147 | mkexpr(op2))); |
| 8148 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); |
| 8149 | put_fpr_w0(r1, mkexpr(result)); |
| 8150 | |
| 8151 | return "aeb"; |
| 8152 | } |
| 8153 | |
| 8154 | static HChar * |
| 8155 | s390_irgen_ADB(UChar r1, IRTemp op2addr) |
| 8156 | { |
| 8157 | IRTemp op1 = newTemp(Ity_F64); |
| 8158 | IRTemp op2 = newTemp(Ity_F64); |
| 8159 | IRTemp result = newTemp(Ity_F64); |
| 8160 | |
| 8161 | assign(op1, get_fpr_dw0(r1)); |
| 8162 | assign(op2, load(Ity_F64, mkexpr(op2addr))); |
| 8163 | assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8164 | mkexpr(op2))); |
| 8165 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); |
| 8166 | put_fpr_dw0(r1, mkexpr(result)); |
| 8167 | |
| 8168 | return "adb"; |
| 8169 | } |
| 8170 | |
| 8171 | static HChar * |
| 8172 | s390_irgen_CEFBR(UChar r1, UChar r2) |
| 8173 | { |
| 8174 | IRTemp op2 = newTemp(Ity_I32); |
| 8175 | |
| 8176 | assign(op2, get_gpr_w1(r2)); |
| 8177 | put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2))); |
| 8178 | |
| 8179 | return "cefbr"; |
| 8180 | } |
| 8181 | |
| 8182 | static HChar * |
| 8183 | s390_irgen_CDFBR(UChar r1, UChar r2) |
| 8184 | { |
| 8185 | IRTemp op2 = newTemp(Ity_I32); |
| 8186 | |
| 8187 | assign(op2, get_gpr_w1(r2)); |
| 8188 | put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2))); |
| 8189 | |
| 8190 | return "cdfbr"; |
| 8191 | } |
| 8192 | |
| 8193 | static HChar * |
| 8194 | s390_irgen_CEGBR(UChar r1, UChar r2) |
| 8195 | { |
| 8196 | IRTemp op2 = newTemp(Ity_I64); |
| 8197 | |
| 8198 | assign(op2, get_gpr_dw0(r2)); |
| 8199 | put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2))); |
| 8200 | |
| 8201 | return "cegbr"; |
| 8202 | } |
| 8203 | |
| 8204 | static HChar * |
| 8205 | s390_irgen_CDGBR(UChar r1, UChar r2) |
| 8206 | { |
| 8207 | IRTemp op2 = newTemp(Ity_I64); |
| 8208 | |
| 8209 | assign(op2, get_gpr_dw0(r2)); |
| 8210 | put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2))); |
| 8211 | |
| 8212 | return "cdgbr"; |
| 8213 | } |
| 8214 | |
| 8215 | static HChar * |
| 8216 | s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2) |
| 8217 | { |
| 8218 | IRTemp op = newTemp(Ity_F32); |
| 8219 | IRTemp result = newTemp(Ity_I32); |
| 8220 | |
| 8221 | assign(op, get_fpr_w0(r2)); |
| 8222 | assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)), |
| 8223 | mkexpr(op))); |
| 8224 | put_gpr_w1(r1, mkexpr(result)); |
| 8225 | s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op); |
| 8226 | |
| 8227 | return "cfebr"; |
| 8228 | } |
| 8229 | |
| 8230 | static HChar * |
| 8231 | s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2) |
| 8232 | { |
| 8233 | IRTemp op = newTemp(Ity_F64); |
| 8234 | IRTemp result = newTemp(Ity_I32); |
| 8235 | |
| 8236 | assign(op, get_fpr_dw0(r2)); |
| 8237 | assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)), |
| 8238 | mkexpr(op))); |
| 8239 | put_gpr_w1(r1, mkexpr(result)); |
| 8240 | s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op); |
| 8241 | |
| 8242 | return "cfdbr"; |
| 8243 | } |
| 8244 | |
| 8245 | static HChar * |
| 8246 | s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2) |
| 8247 | { |
| 8248 | IRTemp op = newTemp(Ity_F32); |
| 8249 | IRTemp result = newTemp(Ity_I64); |
| 8250 | |
| 8251 | assign(op, get_fpr_w0(r2)); |
| 8252 | assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)), |
| 8253 | mkexpr(op))); |
| 8254 | put_gpr_dw0(r1, mkexpr(result)); |
| 8255 | s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op); |
| 8256 | |
| 8257 | return "cgebr"; |
| 8258 | } |
| 8259 | |
| 8260 | static HChar * |
| 8261 | s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2) |
| 8262 | { |
| 8263 | IRTemp op = newTemp(Ity_F64); |
| 8264 | IRTemp result = newTemp(Ity_I64); |
| 8265 | |
| 8266 | assign(op, get_fpr_dw0(r2)); |
| 8267 | assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)), |
| 8268 | mkexpr(op))); |
| 8269 | put_gpr_dw0(r1, mkexpr(result)); |
| 8270 | s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op); |
| 8271 | |
| 8272 | return "cgdbr"; |
| 8273 | } |
| 8274 | |
| 8275 | static HChar * |
| 8276 | s390_irgen_DEBR(UChar r1, UChar r2) |
| 8277 | { |
| 8278 | IRTemp op1 = newTemp(Ity_F32); |
| 8279 | IRTemp op2 = newTemp(Ity_F32); |
| 8280 | IRTemp result = newTemp(Ity_F32); |
| 8281 | |
| 8282 | assign(op1, get_fpr_w0(r1)); |
| 8283 | assign(op2, get_fpr_w0(r2)); |
| 8284 | assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8285 | mkexpr(op2))); |
| 8286 | put_fpr_w0(r1, mkexpr(result)); |
| 8287 | |
| 8288 | return "debr"; |
| 8289 | } |
| 8290 | |
| 8291 | static HChar * |
| 8292 | s390_irgen_DDBR(UChar r1, UChar r2) |
| 8293 | { |
| 8294 | IRTemp op1 = newTemp(Ity_F64); |
| 8295 | IRTemp op2 = newTemp(Ity_F64); |
| 8296 | IRTemp result = newTemp(Ity_F64); |
| 8297 | |
| 8298 | assign(op1, get_fpr_dw0(r1)); |
| 8299 | assign(op2, get_fpr_dw0(r2)); |
| 8300 | assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8301 | mkexpr(op2))); |
| 8302 | put_fpr_dw0(r1, mkexpr(result)); |
| 8303 | |
| 8304 | return "ddbr"; |
| 8305 | } |
| 8306 | |
| 8307 | static HChar * |
| 8308 | s390_irgen_DEB(UChar r1, IRTemp op2addr) |
| 8309 | { |
| 8310 | IRTemp op1 = newTemp(Ity_F32); |
| 8311 | IRTemp op2 = newTemp(Ity_F32); |
| 8312 | IRTemp result = newTemp(Ity_F32); |
| 8313 | |
| 8314 | assign(op1, get_fpr_w0(r1)); |
| 8315 | assign(op2, load(Ity_F32, mkexpr(op2addr))); |
| 8316 | assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8317 | mkexpr(op2))); |
| 8318 | put_fpr_w0(r1, mkexpr(result)); |
| 8319 | |
| 8320 | return "deb"; |
| 8321 | } |
| 8322 | |
| 8323 | static HChar * |
| 8324 | s390_irgen_DDB(UChar r1, IRTemp op2addr) |
| 8325 | { |
| 8326 | IRTemp op1 = newTemp(Ity_F64); |
| 8327 | IRTemp op2 = newTemp(Ity_F64); |
| 8328 | IRTemp result = newTemp(Ity_F64); |
| 8329 | |
| 8330 | assign(op1, get_fpr_dw0(r1)); |
| 8331 | assign(op2, load(Ity_F64, mkexpr(op2addr))); |
| 8332 | assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8333 | mkexpr(op2))); |
| 8334 | put_fpr_dw0(r1, mkexpr(result)); |
| 8335 | |
| 8336 | return "ddb"; |
| 8337 | } |
| 8338 | |
| 8339 | static HChar * |
| 8340 | s390_irgen_LTEBR(UChar r1, UChar r2) |
| 8341 | { |
| 8342 | IRTemp result = newTemp(Ity_F32); |
| 8343 | |
| 8344 | assign(result, get_fpr_w0(r2)); |
| 8345 | put_fpr_w0(r1, mkexpr(result)); |
| 8346 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); |
| 8347 | |
| 8348 | return "ltebr"; |
| 8349 | } |
| 8350 | |
| 8351 | static HChar * |
| 8352 | s390_irgen_LTDBR(UChar r1, UChar r2) |
| 8353 | { |
| 8354 | IRTemp result = newTemp(Ity_F64); |
| 8355 | |
| 8356 | assign(result, get_fpr_dw0(r2)); |
| 8357 | put_fpr_dw0(r1, mkexpr(result)); |
| 8358 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); |
| 8359 | |
| 8360 | return "ltdbr"; |
| 8361 | } |
| 8362 | |
| 8363 | static HChar * |
| 8364 | s390_irgen_LCEBR(UChar r1, UChar r2) |
| 8365 | { |
| 8366 | IRTemp result = newTemp(Ity_F32); |
| 8367 | |
| 8368 | assign(result, unop(Iop_NegF32, get_fpr_w0(r2))); |
| 8369 | put_fpr_w0(r1, mkexpr(result)); |
| 8370 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); |
| 8371 | |
| 8372 | return "lcebr"; |
| 8373 | } |
| 8374 | |
| 8375 | static HChar * |
| 8376 | s390_irgen_LCDBR(UChar r1, UChar r2) |
| 8377 | { |
| 8378 | IRTemp result = newTemp(Ity_F64); |
| 8379 | |
| 8380 | assign(result, unop(Iop_NegF64, get_fpr_dw0(r2))); |
| 8381 | put_fpr_dw0(r1, mkexpr(result)); |
| 8382 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); |
| 8383 | |
| 8384 | return "lcdbr"; |
| 8385 | } |
| 8386 | |
| 8387 | static HChar * |
| 8388 | s390_irgen_LDEBR(UChar r1, UChar r2) |
| 8389 | { |
| 8390 | IRTemp op = newTemp(Ity_F32); |
| 8391 | |
| 8392 | assign(op, get_fpr_w0(r2)); |
| 8393 | put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op))); |
| 8394 | |
| 8395 | return "ldebr"; |
| 8396 | } |
| 8397 | |
| 8398 | static HChar * |
| 8399 | s390_irgen_LDEB(UChar r1, IRTemp op2addr) |
| 8400 | { |
| 8401 | IRTemp op = newTemp(Ity_F32); |
| 8402 | |
| 8403 | assign(op, load(Ity_F32, mkexpr(op2addr))); |
| 8404 | put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op))); |
| 8405 | |
| 8406 | return "ldeb"; |
| 8407 | } |
| 8408 | |
| 8409 | static HChar * |
| 8410 | s390_irgen_LEDBR(UChar r1, UChar r2) |
| 8411 | { |
| 8412 | IRTemp op = newTemp(Ity_F64); |
| 8413 | |
| 8414 | assign(op, get_fpr_dw0(r2)); |
| 8415 | put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op))); |
| 8416 | |
| 8417 | return "ledbr"; |
| 8418 | } |
| 8419 | |
| 8420 | static HChar * |
| 8421 | s390_irgen_MEEBR(UChar r1, UChar r2) |
| 8422 | { |
| 8423 | IRTemp op1 = newTemp(Ity_F32); |
| 8424 | IRTemp op2 = newTemp(Ity_F32); |
| 8425 | IRTemp result = newTemp(Ity_F32); |
| 8426 | |
| 8427 | assign(op1, get_fpr_w0(r1)); |
| 8428 | assign(op2, get_fpr_w0(r2)); |
| 8429 | assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8430 | mkexpr(op2))); |
| 8431 | put_fpr_w0(r1, mkexpr(result)); |
| 8432 | |
| 8433 | return "meebr"; |
| 8434 | } |
| 8435 | |
| 8436 | static HChar * |
| 8437 | s390_irgen_MDBR(UChar r1, UChar r2) |
| 8438 | { |
| 8439 | IRTemp op1 = newTemp(Ity_F64); |
| 8440 | IRTemp op2 = newTemp(Ity_F64); |
| 8441 | IRTemp result = newTemp(Ity_F64); |
| 8442 | |
| 8443 | assign(op1, get_fpr_dw0(r1)); |
| 8444 | assign(op2, get_fpr_dw0(r2)); |
| 8445 | assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8446 | mkexpr(op2))); |
| 8447 | put_fpr_dw0(r1, mkexpr(result)); |
| 8448 | |
| 8449 | return "mdbr"; |
| 8450 | } |
| 8451 | |
| 8452 | static HChar * |
| 8453 | s390_irgen_MEEB(UChar r1, IRTemp op2addr) |
| 8454 | { |
| 8455 | IRTemp op1 = newTemp(Ity_F32); |
| 8456 | IRTemp op2 = newTemp(Ity_F32); |
| 8457 | IRTemp result = newTemp(Ity_F32); |
| 8458 | |
| 8459 | assign(op1, get_fpr_w0(r1)); |
| 8460 | assign(op2, load(Ity_F32, mkexpr(op2addr))); |
| 8461 | assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8462 | mkexpr(op2))); |
| 8463 | put_fpr_w0(r1, mkexpr(result)); |
| 8464 | |
| 8465 | return "meeb"; |
| 8466 | } |
| 8467 | |
| 8468 | static HChar * |
| 8469 | s390_irgen_MDB(UChar r1, IRTemp op2addr) |
| 8470 | { |
| 8471 | IRTemp op1 = newTemp(Ity_F64); |
| 8472 | IRTemp op2 = newTemp(Ity_F64); |
| 8473 | IRTemp result = newTemp(Ity_F64); |
| 8474 | |
| 8475 | assign(op1, get_fpr_dw0(r1)); |
| 8476 | assign(op2, load(Ity_F64, mkexpr(op2addr))); |
| 8477 | assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8478 | mkexpr(op2))); |
| 8479 | put_fpr_dw0(r1, mkexpr(result)); |
| 8480 | |
| 8481 | return "mdb"; |
| 8482 | } |
| 8483 | |
| 8484 | static HChar * |
| 8485 | s390_irgen_SEBR(UChar r1, UChar r2) |
| 8486 | { |
| 8487 | IRTemp op1 = newTemp(Ity_F32); |
| 8488 | IRTemp op2 = newTemp(Ity_F32); |
| 8489 | IRTemp result = newTemp(Ity_F32); |
| 8490 | |
| 8491 | assign(op1, get_fpr_w0(r1)); |
| 8492 | assign(op2, get_fpr_w0(r2)); |
| 8493 | assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8494 | mkexpr(op2))); |
| 8495 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); |
| 8496 | put_fpr_w0(r1, mkexpr(result)); |
| 8497 | |
| 8498 | return "sebr"; |
| 8499 | } |
| 8500 | |
| 8501 | static HChar * |
| 8502 | s390_irgen_SDBR(UChar r1, UChar r2) |
| 8503 | { |
| 8504 | IRTemp op1 = newTemp(Ity_F64); |
| 8505 | IRTemp op2 = newTemp(Ity_F64); |
| 8506 | IRTemp result = newTemp(Ity_F64); |
| 8507 | |
| 8508 | assign(op1, get_fpr_dw0(r1)); |
| 8509 | assign(op2, get_fpr_dw0(r2)); |
| 8510 | assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8511 | mkexpr(op2))); |
| 8512 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); |
| 8513 | put_fpr_dw0(r1, mkexpr(result)); |
| 8514 | |
| 8515 | return "sdbr"; |
| 8516 | } |
| 8517 | |
| 8518 | static HChar * |
| 8519 | s390_irgen_SEB(UChar r1, IRTemp op2addr) |
| 8520 | { |
| 8521 | IRTemp op1 = newTemp(Ity_F32); |
| 8522 | IRTemp op2 = newTemp(Ity_F32); |
| 8523 | IRTemp result = newTemp(Ity_F32); |
| 8524 | |
| 8525 | assign(op1, get_fpr_w0(r1)); |
| 8526 | assign(op2, load(Ity_F32, mkexpr(op2addr))); |
| 8527 | assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8528 | mkexpr(op2))); |
| 8529 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); |
| 8530 | put_fpr_w0(r1, mkexpr(result)); |
| 8531 | |
| 8532 | return "seb"; |
| 8533 | } |
| 8534 | |
| 8535 | static HChar * |
| 8536 | s390_irgen_SDB(UChar r1, IRTemp op2addr) |
| 8537 | { |
| 8538 | IRTemp op1 = newTemp(Ity_F64); |
| 8539 | IRTemp op2 = newTemp(Ity_F64); |
| 8540 | IRTemp result = newTemp(Ity_F64); |
| 8541 | |
| 8542 | assign(op1, get_fpr_dw0(r1)); |
| 8543 | assign(op2, load(Ity_F64, mkexpr(op2addr))); |
| 8544 | assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 8545 | mkexpr(op2))); |
| 8546 | s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); |
| 8547 | put_fpr_dw0(r1, mkexpr(result)); |
| 8548 | |
| 8549 | return "sdb"; |
| 8550 | } |
| 8551 | |
| 8552 | |
| 8553 | static HChar * |
| 8554 | s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2) |
| 8555 | { |
florian | 79e839e | 2012-05-05 02:20:30 +0000 | [diff] [blame] | 8556 | IRTemp len = newTemp(Ity_I64); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8557 | |
florian | 79e839e | 2012-05-05 02:20:30 +0000 | [diff] [blame] | 8558 | assign(len, mkU64(length)); |
| 8559 | s390_irgen_CLC_EX(len, start1, start2); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 8560 | dummy_put_IA(); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8561 | |
| 8562 | return "clc"; |
| 8563 | } |
| 8564 | |
| 8565 | static HChar * |
florian | b0c9a13 | 2011-09-08 15:37:39 +0000 | [diff] [blame] | 8566 | s390_irgen_CLCL(UChar r1, UChar r2) |
| 8567 | { |
| 8568 | IRTemp addr1 = newTemp(Ity_I64); |
| 8569 | IRTemp addr2 = newTemp(Ity_I64); |
| 8570 | IRTemp addr1_load = newTemp(Ity_I64); |
| 8571 | IRTemp addr2_load = newTemp(Ity_I64); |
| 8572 | IRTemp len1 = newTemp(Ity_I32); |
| 8573 | IRTemp len2 = newTemp(Ity_I32); |
| 8574 | IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */ |
| 8575 | IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */ |
| 8576 | IRTemp single1 = newTemp(Ity_I8); |
| 8577 | IRTemp single2 = newTemp(Ity_I8); |
| 8578 | IRTemp pad = newTemp(Ity_I8); |
| 8579 | |
| 8580 | assign(addr1, get_gpr_dw0(r1)); |
| 8581 | assign(r1p1, get_gpr_w1(r1 + 1)); |
| 8582 | assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff))); |
| 8583 | assign(addr2, get_gpr_dw0(r2)); |
| 8584 | assign(r2p1, get_gpr_w1(r2 + 1)); |
| 8585 | assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff))); |
| 8586 | assign(pad, get_gpr_b4(r2 + 1)); |
| 8587 | |
| 8588 | /* len1 == 0 and len2 == 0? Exit */ |
| 8589 | s390_cc_set(0); |
| 8590 | if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1), |
| 8591 | mkexpr(len2)), mkU32(0)), |
| 8592 | guest_IA_next_instr); |
| 8593 | |
| 8594 | /* Because mkite evaluates both the then-clause and the else-clause |
| 8595 | we cannot load directly from addr1 here. If len1 is 0, then adddr1 |
| 8596 | may be NULL and loading from there would segfault. So we provide a |
| 8597 | valid dummy address in that case. Loading from there does no harm and |
| 8598 | the value will be discarded at runtime. */ |
| 8599 | assign(addr1_load, |
| 8600 | mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)), |
| 8601 | mkU64(guest_IA_curr_instr), mkexpr(addr1))); |
| 8602 | assign(single1, |
| 8603 | mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)), |
| 8604 | mkexpr(pad), load(Ity_I8, mkexpr(addr1_load)))); |
| 8605 | |
| 8606 | assign(addr2_load, |
| 8607 | mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)), |
| 8608 | mkU64(guest_IA_curr_instr), mkexpr(addr2))); |
| 8609 | assign(single2, |
| 8610 | mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)), |
| 8611 | mkexpr(pad), load(Ity_I8, mkexpr(addr2_load)))); |
| 8612 | |
| 8613 | s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False); |
| 8614 | /* Fields differ ? */ |
| 8615 | if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)), |
| 8616 | guest_IA_next_instr); |
| 8617 | |
| 8618 | /* Update len1 and addr1, unless len1 == 0. */ |
| 8619 | put_gpr_dw0(r1, |
| 8620 | mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)), |
| 8621 | mkexpr(addr1), |
| 8622 | binop(Iop_Add64, mkexpr(addr1), mkU64(1)))); |
| 8623 | |
| 8624 | /* When updating len1 we must not modify bits (r1+1)[0:39] */ |
| 8625 | put_gpr_w1(r1 + 1, |
| 8626 | mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)), |
| 8627 | binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)), |
| 8628 | binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)))); |
| 8629 | |
| 8630 | /* Update len2 and addr2, unless len2 == 0. */ |
| 8631 | put_gpr_dw0(r2, |
| 8632 | mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)), |
| 8633 | mkexpr(addr2), |
| 8634 | binop(Iop_Add64, mkexpr(addr2), mkU64(1)))); |
| 8635 | |
| 8636 | /* When updating len2 we must not modify bits (r2+1)[0:39] */ |
| 8637 | put_gpr_w1(r2 + 1, |
| 8638 | mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)), |
| 8639 | binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)), |
| 8640 | binop(Iop_Sub32, mkexpr(r2p1), mkU32(1)))); |
| 8641 | |
| 8642 | always_goto_and_chase(guest_IA_curr_instr); |
| 8643 | |
| 8644 | return "clcl"; |
| 8645 | } |
| 8646 | |
| 8647 | static HChar * |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8648 | s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2) |
| 8649 | { |
| 8650 | IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3; |
| 8651 | |
| 8652 | addr1 = newTemp(Ity_I64); |
| 8653 | addr3 = newTemp(Ity_I64); |
| 8654 | addr1_load = newTemp(Ity_I64); |
| 8655 | addr3_load = newTemp(Ity_I64); |
| 8656 | len1 = newTemp(Ity_I64); |
| 8657 | len3 = newTemp(Ity_I64); |
| 8658 | single1 = newTemp(Ity_I8); |
| 8659 | single3 = newTemp(Ity_I8); |
| 8660 | |
| 8661 | assign(addr1, get_gpr_dw0(r1)); |
| 8662 | assign(len1, get_gpr_dw0(r1 + 1)); |
| 8663 | assign(addr3, get_gpr_dw0(r3)); |
| 8664 | assign(len3, get_gpr_dw0(r3 + 1)); |
| 8665 | |
| 8666 | /* len1 == 0 and len3 == 0? Exit */ |
| 8667 | s390_cc_set(0); |
| 8668 | if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1), |
| 8669 | mkexpr(len3)), mkU64(0)), |
| 8670 | guest_IA_next_instr); |
| 8671 | |
| 8672 | /* A mux requires both ways to be possible. This is a way to prevent clcle |
| 8673 | from reading from addr1 if it should read from the pad. Since the pad |
| 8674 | has no address, just read from the instruction, we discard that anyway */ |
| 8675 | assign(addr1_load, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 8676 | mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)), |
| 8677 | mkU64(guest_IA_curr_instr), mkexpr(addr1))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8678 | |
| 8679 | /* same for addr3 */ |
| 8680 | assign(addr3_load, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 8681 | mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)), |
| 8682 | mkU64(guest_IA_curr_instr), mkexpr(addr3))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8683 | |
| 8684 | assign(single1, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 8685 | mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)), |
| 8686 | unop(Iop_64to8, mkexpr(pad2)), |
| 8687 | load(Ity_I8, mkexpr(addr1_load)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8688 | |
| 8689 | assign(single3, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 8690 | mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)), |
| 8691 | unop(Iop_64to8, mkexpr(pad2)), |
| 8692 | load(Ity_I8, mkexpr(addr3_load)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8693 | |
| 8694 | s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False); |
| 8695 | /* Both fields differ ? */ |
| 8696 | if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)), |
| 8697 | guest_IA_next_instr); |
| 8698 | |
| 8699 | /* If a length in 0 we must not change this length and the address */ |
| 8700 | put_gpr_dw0(r1, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 8701 | mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)), |
| 8702 | mkexpr(addr1), |
| 8703 | binop(Iop_Add64, mkexpr(addr1), mkU64(1)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8704 | |
| 8705 | put_gpr_dw0(r1 + 1, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 8706 | mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)), |
| 8707 | mkU64(0), binop(Iop_Sub64, mkexpr(len1), mkU64(1)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8708 | |
| 8709 | put_gpr_dw0(r3, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 8710 | mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)), |
| 8711 | mkexpr(addr3), |
| 8712 | binop(Iop_Add64, mkexpr(addr3), mkU64(1)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8713 | |
| 8714 | put_gpr_dw0(r3 + 1, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 8715 | mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)), |
| 8716 | mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8717 | |
| 8718 | /* The architecture requires that we exit with CC3 after a machine specific |
| 8719 | amount of bytes. We do that if len1+len3 % 4096 == 0 */ |
| 8720 | s390_cc_set(3); |
| 8721 | if_condition_goto(binop(Iop_CmpEQ64, |
| 8722 | binop(Iop_And64, |
| 8723 | binop(Iop_Add64, mkexpr(len1), mkexpr(len3)), |
| 8724 | mkU64(0xfff)), |
| 8725 | mkU64(0)), |
| 8726 | guest_IA_next_instr); |
| 8727 | |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 8728 | always_goto_and_chase(guest_IA_curr_instr); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8729 | |
| 8730 | return "clcle"; |
| 8731 | } |
florian | a64c243 | 2011-07-16 02:11:50 +0000 | [diff] [blame] | 8732 | |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 8733 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8734 | static void |
| 8735 | s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2) |
| 8736 | { |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 8737 | s390_irgen_xonc(Iop_Xor8, length, start1, start2); |
| 8738 | } |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8739 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8740 | |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 8741 | static void |
| 8742 | s390_irgen_NC_EX(IRTemp length, IRTemp start1, IRTemp start2) |
| 8743 | { |
| 8744 | s390_irgen_xonc(Iop_And8, length, start1, start2); |
| 8745 | } |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8746 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8747 | |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 8748 | static void |
| 8749 | s390_irgen_OC_EX(IRTemp length, IRTemp start1, IRTemp start2) |
| 8750 | { |
| 8751 | s390_irgen_xonc(Iop_Or8, length, start1, start2); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8752 | } |
| 8753 | |
| 8754 | |
| 8755 | static void |
| 8756 | s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2) |
| 8757 | { |
| 8758 | IRTemp current1 = newTemp(Ity_I8); |
| 8759 | IRTemp current2 = newTemp(Ity_I8); |
| 8760 | IRTemp counter = newTemp(Ity_I64); |
| 8761 | |
| 8762 | assign(counter, get_counter_dw0()); |
| 8763 | put_counter_dw0(mkU64(0)); |
| 8764 | |
| 8765 | assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1), |
| 8766 | mkexpr(counter)))); |
| 8767 | assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2), |
| 8768 | mkexpr(counter)))); |
| 8769 | s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2, |
| 8770 | False); |
| 8771 | |
| 8772 | /* Both fields differ ? */ |
| 8773 | if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)), |
| 8774 | guest_IA_next_instr); |
| 8775 | |
| 8776 | /* Check for end of field */ |
| 8777 | put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); |
| 8778 | if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)), |
| 8779 | guest_IA_curr_instr); |
| 8780 | put_counter_dw0(mkU64(0)); |
| 8781 | } |
| 8782 | |
| 8783 | static void |
| 8784 | s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2) |
| 8785 | { |
| 8786 | IRTemp counter = newTemp(Ity_I64); |
| 8787 | |
| 8788 | assign(counter, get_counter_dw0()); |
| 8789 | |
| 8790 | store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)), |
| 8791 | load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter)))); |
| 8792 | |
| 8793 | /* Check for end of field */ |
| 8794 | put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); |
| 8795 | if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)), |
| 8796 | guest_IA_curr_instr); |
| 8797 | put_counter_dw0(mkU64(0)); |
| 8798 | } |
| 8799 | |
florian | f87d4fb | 2012-05-05 02:55:24 +0000 | [diff] [blame] | 8800 | static void |
| 8801 | s390_irgen_TR_EX(IRTemp length, IRTemp start1, IRTemp start2) |
| 8802 | { |
| 8803 | IRTemp op = newTemp(Ity_I8); |
| 8804 | IRTemp op1 = newTemp(Ity_I8); |
| 8805 | IRTemp result = newTemp(Ity_I64); |
| 8806 | IRTemp counter = newTemp(Ity_I64); |
| 8807 | |
| 8808 | assign(counter, get_counter_dw0()); |
| 8809 | |
| 8810 | assign(op, load(Ity_I8, binop(Iop_Add64, mkexpr(start1), mkexpr(counter)))); |
| 8811 | |
| 8812 | assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)), mkexpr(start2))); |
| 8813 | |
| 8814 | assign(op1, load(Ity_I8, mkexpr(result))); |
| 8815 | store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)), mkexpr(op1)); |
| 8816 | |
| 8817 | put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); |
| 8818 | if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)), |
| 8819 | guest_IA_curr_instr); |
| 8820 | put_counter_dw0(mkU64(0)); |
| 8821 | } |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8822 | |
| 8823 | |
| 8824 | static void |
| 8825 | s390_irgen_EX_SS(UChar r, IRTemp addr2, |
| 8826 | void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize) |
| 8827 | { |
| 8828 | struct SS { |
| 8829 | unsigned int op : 8; |
| 8830 | unsigned int l : 8; |
| 8831 | unsigned int b1 : 4; |
| 8832 | unsigned int d1 : 12; |
| 8833 | unsigned int b2 : 4; |
| 8834 | unsigned int d2 : 12; |
| 8835 | }; |
| 8836 | union { |
| 8837 | struct SS dec; |
| 8838 | unsigned long bytes; |
| 8839 | } ss; |
| 8840 | IRTemp cond; |
| 8841 | IRDirty *d; |
| 8842 | IRTemp torun; |
| 8843 | |
| 8844 | IRTemp start1 = newTemp(Ity_I64); |
| 8845 | IRTemp start2 = newTemp(Ity_I64); |
| 8846 | IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32); |
| 8847 | cond = newTemp(Ity_I1); |
| 8848 | torun = newTemp(Ity_I64); |
| 8849 | |
| 8850 | assign(torun, load(Ity_I64, mkexpr(addr2))); |
| 8851 | /* Start with a check that the saved code is still correct */ |
| 8852 | assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target))); |
| 8853 | /* If not, save the new value */ |
| 8854 | d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX, |
| 8855 | mkIRExprVec_1(mkexpr(torun))); |
| 8856 | d->guard = mkexpr(cond); |
| 8857 | stmt(IRStmt_Dirty(d)); |
| 8858 | |
| 8859 | /* and restart */ |
florian | 428dfdd | 2012-03-27 03:09:49 +0000 | [diff] [blame] | 8860 | stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART), |
| 8861 | mkU64(guest_IA_curr_instr))); |
| 8862 | stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4))); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 8863 | stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval, IRConst_U64(guest_IA_curr_instr), |
| 8864 | S390X_GUEST_OFFSET(guest_IA))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8865 | |
| 8866 | ss.bytes = last_execute_target; |
| 8867 | assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1), |
| 8868 | ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0))); |
| 8869 | assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2), |
| 8870 | ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0))); |
| 8871 | assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8, |
| 8872 | r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l)))); |
| 8873 | irgen(len, start1, start2); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 8874 | dummy_put_IA(); |
| 8875 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8876 | last_execute_target = 0; |
| 8877 | } |
| 8878 | |
| 8879 | static HChar * |
| 8880 | s390_irgen_EX(UChar r1, IRTemp addr2) |
| 8881 | { |
| 8882 | switch(last_execute_target & 0xff00000000000000ULL) { |
| 8883 | case 0: |
| 8884 | { |
| 8885 | /* no code information yet */ |
| 8886 | IRDirty *d; |
| 8887 | |
| 8888 | /* so safe the code... */ |
| 8889 | d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX, |
| 8890 | mkIRExprVec_1(load(Ity_I64, mkexpr(addr2)))); |
| 8891 | stmt(IRStmt_Dirty(d)); |
| 8892 | /* and restart */ |
florian | 428dfdd | 2012-03-27 03:09:49 +0000 | [diff] [blame] | 8893 | stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART), |
| 8894 | mkU64(guest_IA_curr_instr))); |
| 8895 | stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4))); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 8896 | stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval, |
| 8897 | IRConst_U64(guest_IA_curr_instr), |
| 8898 | S390X_GUEST_OFFSET(guest_IA))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8899 | /* we know that this will be invalidated */ |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 8900 | put_IA(mkaddr_expr(guest_IA_next_instr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8901 | dis_res->whatNext = Dis_StopHere; |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 8902 | dis_res->jk_StopHere = Ijk_TInval; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8903 | break; |
| 8904 | } |
| 8905 | |
| 8906 | case 0xd200000000000000ULL: |
| 8907 | /* special case MVC */ |
| 8908 | s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64); |
| 8909 | return "mvc via ex"; |
| 8910 | |
| 8911 | case 0xd500000000000000ULL: |
| 8912 | /* special case CLC */ |
| 8913 | s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64); |
| 8914 | return "clc via ex"; |
| 8915 | |
| 8916 | case 0xd700000000000000ULL: |
| 8917 | /* special case XC */ |
| 8918 | s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32); |
| 8919 | return "xc via ex"; |
| 8920 | |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 8921 | case 0xd600000000000000ULL: |
| 8922 | /* special case OC */ |
| 8923 | s390_irgen_EX_SS(r1, addr2, s390_irgen_OC_EX, 32); |
| 8924 | return "oc via ex"; |
| 8925 | |
| 8926 | case 0xd400000000000000ULL: |
| 8927 | /* special case NC */ |
| 8928 | s390_irgen_EX_SS(r1, addr2, s390_irgen_NC_EX, 32); |
| 8929 | return "nc via ex"; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8930 | |
florian | f87d4fb | 2012-05-05 02:55:24 +0000 | [diff] [blame] | 8931 | case 0xdc00000000000000ULL: |
| 8932 | /* special case TR */ |
| 8933 | s390_irgen_EX_SS(r1, addr2, s390_irgen_TR_EX, 64); |
| 8934 | return "tr via ex"; |
| 8935 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8936 | default: |
| 8937 | { |
| 8938 | /* everything else will get a self checking prefix that also checks the |
| 8939 | register content */ |
| 8940 | IRDirty *d; |
| 8941 | UChar *bytes; |
| 8942 | IRTemp cond; |
| 8943 | IRTemp orperand; |
| 8944 | IRTemp torun; |
| 8945 | |
| 8946 | cond = newTemp(Ity_I1); |
| 8947 | orperand = newTemp(Ity_I64); |
| 8948 | torun = newTemp(Ity_I64); |
| 8949 | |
| 8950 | if (r1 == 0) |
| 8951 | assign(orperand, mkU64(0)); |
| 8952 | else |
| 8953 | assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1))); |
| 8954 | /* This code is going to be translated */ |
| 8955 | assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)), |
| 8956 | binop(Iop_Shl64, mkexpr(orperand), mkU8(48)))); |
| 8957 | |
| 8958 | /* Start with a check that saved code is still correct */ |
| 8959 | assign(cond, binop(Iop_CmpNE64, mkexpr(torun), |
| 8960 | mkU64(last_execute_target))); |
| 8961 | /* If not, save the new value */ |
| 8962 | d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX, |
| 8963 | mkIRExprVec_1(mkexpr(torun))); |
| 8964 | d->guard = mkexpr(cond); |
| 8965 | stmt(IRStmt_Dirty(d)); |
| 8966 | |
| 8967 | /* and restart */ |
florian | 428dfdd | 2012-03-27 03:09:49 +0000 | [diff] [blame] | 8968 | stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART), mkU64(guest_IA_curr_instr))); |
| 8969 | stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4))); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 8970 | stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval, |
| 8971 | IRConst_U64(guest_IA_curr_instr), |
| 8972 | S390X_GUEST_OFFSET(guest_IA))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8973 | |
| 8974 | /* Now comes the actual translation */ |
| 8975 | bytes = (UChar *) &last_execute_target; |
| 8976 | s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1, |
| 8977 | dis_res); |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 8978 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8979 | vex_printf(" which was executed by\n"); |
| 8980 | /* dont make useless translations in the next execute */ |
| 8981 | last_execute_target = 0; |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 8982 | dummy_put_IA(); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 8983 | } |
| 8984 | } |
| 8985 | return "ex"; |
| 8986 | } |
| 8987 | |
| 8988 | static HChar * |
| 8989 | s390_irgen_EXRL(UChar r1, UInt offset) |
| 8990 | { |
| 8991 | IRTemp addr = newTemp(Ity_I64); |
| 8992 | /* we might save one round trip because we know the target */ |
| 8993 | if (!last_execute_target) |
| 8994 | last_execute_target = *(ULong *)(HWord) |
| 8995 | (guest_IA_curr_instr + offset * 2UL); |
| 8996 | assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL)); |
| 8997 | s390_irgen_EX(r1, addr); |
| 8998 | return "exrl"; |
| 8999 | } |
| 9000 | |
| 9001 | static HChar * |
| 9002 | s390_irgen_IPM(UChar r1) |
| 9003 | { |
| 9004 | // As long as we dont support SPM, lets just assume 0 as program mask |
| 9005 | put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */), |
| 9006 | binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4))))); |
| 9007 | |
| 9008 | return "ipm"; |
| 9009 | } |
| 9010 | |
| 9011 | |
| 9012 | static HChar * |
| 9013 | s390_irgen_SRST(UChar r1, UChar r2) |
| 9014 | { |
| 9015 | IRTemp address = newTemp(Ity_I64); |
| 9016 | IRTemp next = newTemp(Ity_I64); |
| 9017 | IRTemp delim = newTemp(Ity_I8); |
| 9018 | IRTemp counter = newTemp(Ity_I64); |
| 9019 | IRTemp byte = newTemp(Ity_I8); |
| 9020 | |
| 9021 | assign(address, get_gpr_dw0(r2)); |
| 9022 | assign(next, get_gpr_dw0(r1)); |
| 9023 | |
| 9024 | assign(counter, get_counter_dw0()); |
| 9025 | put_counter_dw0(mkU64(0)); |
| 9026 | |
| 9027 | // start = next? CC=2 and out r1 and r2 unchanged |
| 9028 | s390_cc_set(2); |
| 9029 | put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter))); |
| 9030 | if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)), |
| 9031 | guest_IA_next_instr); |
| 9032 | |
| 9033 | assign(byte, load(Ity_I8, mkexpr(address))); |
| 9034 | assign(delim, get_gpr_b7(0)); |
| 9035 | |
| 9036 | // byte = delim? CC=1, R1=address |
| 9037 | s390_cc_set(1); |
| 9038 | put_gpr_dw0(r1, mkexpr(address)); |
| 9039 | if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)), |
| 9040 | guest_IA_next_instr); |
| 9041 | |
| 9042 | // else: all equal, no end yet, loop |
| 9043 | put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); |
| 9044 | put_gpr_dw0(r1, mkexpr(next)); |
| 9045 | put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1))); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 9046 | stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)), |
| 9047 | Ijk_Boring, IRConst_U64(guest_IA_curr_instr), |
| 9048 | S390X_GUEST_OFFSET(guest_IA))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9049 | // >= 256 bytes done CC=3 |
| 9050 | s390_cc_set(3); |
| 9051 | put_counter_dw0(mkU64(0)); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 9052 | dummy_put_IA(); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9053 | |
| 9054 | return "srst"; |
| 9055 | } |
| 9056 | |
| 9057 | static HChar * |
| 9058 | s390_irgen_CLST(UChar r1, UChar r2) |
| 9059 | { |
| 9060 | IRTemp address1 = newTemp(Ity_I64); |
| 9061 | IRTemp address2 = newTemp(Ity_I64); |
| 9062 | IRTemp end = newTemp(Ity_I8); |
| 9063 | IRTemp counter = newTemp(Ity_I64); |
| 9064 | IRTemp byte1 = newTemp(Ity_I8); |
| 9065 | IRTemp byte2 = newTemp(Ity_I8); |
| 9066 | |
| 9067 | assign(address1, get_gpr_dw0(r1)); |
| 9068 | assign(address2, get_gpr_dw0(r2)); |
| 9069 | assign(end, get_gpr_b7(0)); |
| 9070 | assign(counter, get_counter_dw0()); |
| 9071 | put_counter_dw0(mkU64(0)); |
| 9072 | assign(byte1, load(Ity_I8, mkexpr(address1))); |
| 9073 | assign(byte2, load(Ity_I8, mkexpr(address2))); |
| 9074 | |
| 9075 | // end in both? all equal, reset r1 and r2 to start values |
| 9076 | s390_cc_set(0); |
| 9077 | put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter))); |
| 9078 | put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter))); |
| 9079 | if_condition_goto(binop(Iop_CmpEQ8, mkU8(0), |
| 9080 | binop(Iop_Or8, |
| 9081 | binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)), |
| 9082 | binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))), |
| 9083 | guest_IA_next_instr); |
| 9084 | |
| 9085 | put_gpr_dw0(r1, mkexpr(address1)); |
| 9086 | put_gpr_dw0(r2, mkexpr(address2)); |
| 9087 | |
| 9088 | // End found in string1 |
| 9089 | s390_cc_set(1); |
| 9090 | if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)), |
| 9091 | guest_IA_next_instr); |
| 9092 | |
| 9093 | // End found in string2 |
| 9094 | s390_cc_set(2); |
| 9095 | if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)), |
| 9096 | guest_IA_next_instr); |
| 9097 | |
| 9098 | // string1 < string2 |
| 9099 | s390_cc_set(1); |
| 9100 | if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)), |
| 9101 | unop(Iop_8Uto32, mkexpr(byte2))), |
| 9102 | guest_IA_next_instr); |
| 9103 | |
| 9104 | // string2 < string1 |
| 9105 | s390_cc_set(2); |
| 9106 | if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)), |
| 9107 | unop(Iop_8Uto32, mkexpr(byte1))), |
| 9108 | guest_IA_next_instr); |
| 9109 | |
| 9110 | // else: all equal, no end yet, loop |
| 9111 | put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); |
| 9112 | put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1))); |
| 9113 | put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1))); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 9114 | stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)), |
| 9115 | Ijk_Boring, IRConst_U64(guest_IA_curr_instr), |
| 9116 | S390X_GUEST_OFFSET(guest_IA))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9117 | // >= 256 bytes done CC=3 |
| 9118 | s390_cc_set(3); |
| 9119 | put_counter_dw0(mkU64(0)); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 9120 | dummy_put_IA(); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9121 | |
| 9122 | return "clst"; |
| 9123 | } |
| 9124 | |
| 9125 | static void |
| 9126 | s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr) |
| 9127 | { |
| 9128 | UChar reg; |
| 9129 | IRTemp addr = newTemp(Ity_I64); |
| 9130 | |
| 9131 | assign(addr, mkexpr(op2addr)); |
| 9132 | reg = r1; |
| 9133 | do { |
| 9134 | IRTemp old = addr; |
| 9135 | |
| 9136 | reg %= 16; |
| 9137 | put_gpr_w1(reg, load(Ity_I32, mkexpr(addr))); |
| 9138 | addr = newTemp(Ity_I64); |
| 9139 | assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); |
| 9140 | reg++; |
| 9141 | } while (reg != (r3 + 1)); |
| 9142 | } |
| 9143 | |
| 9144 | static HChar * |
| 9145 | s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr) |
| 9146 | { |
| 9147 | s390_irgen_load_multiple_32bit(r1, r3, op2addr); |
| 9148 | |
| 9149 | return "lm"; |
| 9150 | } |
| 9151 | |
| 9152 | static HChar * |
| 9153 | s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr) |
| 9154 | { |
| 9155 | s390_irgen_load_multiple_32bit(r1, r3, op2addr); |
| 9156 | |
| 9157 | return "lmy"; |
| 9158 | } |
| 9159 | |
| 9160 | static HChar * |
| 9161 | s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr) |
| 9162 | { |
| 9163 | UChar reg; |
| 9164 | IRTemp addr = newTemp(Ity_I64); |
| 9165 | |
| 9166 | assign(addr, mkexpr(op2addr)); |
| 9167 | reg = r1; |
| 9168 | do { |
| 9169 | IRTemp old = addr; |
| 9170 | |
| 9171 | reg %= 16; |
| 9172 | put_gpr_w0(reg, load(Ity_I32, mkexpr(addr))); |
| 9173 | addr = newTemp(Ity_I64); |
| 9174 | assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); |
| 9175 | reg++; |
| 9176 | } while (reg != (r3 + 1)); |
| 9177 | |
| 9178 | return "lmh"; |
| 9179 | } |
| 9180 | |
| 9181 | static HChar * |
| 9182 | s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr) |
| 9183 | { |
| 9184 | UChar reg; |
| 9185 | IRTemp addr = newTemp(Ity_I64); |
| 9186 | |
| 9187 | assign(addr, mkexpr(op2addr)); |
| 9188 | reg = r1; |
| 9189 | do { |
| 9190 | IRTemp old = addr; |
| 9191 | |
| 9192 | reg %= 16; |
| 9193 | put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr))); |
| 9194 | addr = newTemp(Ity_I64); |
| 9195 | assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8))); |
| 9196 | reg++; |
| 9197 | } while (reg != (r3 + 1)); |
| 9198 | |
| 9199 | return "lmg"; |
| 9200 | } |
| 9201 | |
| 9202 | static void |
| 9203 | s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr) |
| 9204 | { |
| 9205 | UChar reg; |
| 9206 | IRTemp addr = newTemp(Ity_I64); |
| 9207 | |
| 9208 | assign(addr, mkexpr(op2addr)); |
| 9209 | reg = r1; |
| 9210 | do { |
| 9211 | IRTemp old = addr; |
| 9212 | |
| 9213 | reg %= 16; |
| 9214 | store(mkexpr(addr), get_gpr_w1(reg)); |
| 9215 | addr = newTemp(Ity_I64); |
| 9216 | assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); |
| 9217 | reg++; |
| 9218 | } while( reg != (r3 + 1)); |
| 9219 | } |
| 9220 | |
| 9221 | static HChar * |
| 9222 | s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr) |
| 9223 | { |
| 9224 | s390_irgen_store_multiple_32bit(r1, r3, op2addr); |
| 9225 | |
| 9226 | return "stm"; |
| 9227 | } |
| 9228 | |
| 9229 | static HChar * |
| 9230 | s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr) |
| 9231 | { |
| 9232 | s390_irgen_store_multiple_32bit(r1, r3, op2addr); |
| 9233 | |
| 9234 | return "stmy"; |
| 9235 | } |
| 9236 | |
| 9237 | static HChar * |
| 9238 | s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr) |
| 9239 | { |
| 9240 | UChar reg; |
| 9241 | IRTemp addr = newTemp(Ity_I64); |
| 9242 | |
| 9243 | assign(addr, mkexpr(op2addr)); |
| 9244 | reg = r1; |
| 9245 | do { |
| 9246 | IRTemp old = addr; |
| 9247 | |
| 9248 | reg %= 16; |
| 9249 | store(mkexpr(addr), get_gpr_w0(reg)); |
| 9250 | addr = newTemp(Ity_I64); |
| 9251 | assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); |
| 9252 | reg++; |
| 9253 | } while( reg != (r3 + 1)); |
| 9254 | |
| 9255 | return "stmh"; |
| 9256 | } |
| 9257 | |
| 9258 | static HChar * |
| 9259 | s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr) |
| 9260 | { |
| 9261 | UChar reg; |
| 9262 | IRTemp addr = newTemp(Ity_I64); |
| 9263 | |
| 9264 | assign(addr, mkexpr(op2addr)); |
| 9265 | reg = r1; |
| 9266 | do { |
| 9267 | IRTemp old = addr; |
| 9268 | |
| 9269 | reg %= 16; |
| 9270 | store(mkexpr(addr), get_gpr_dw0(reg)); |
| 9271 | addr = newTemp(Ity_I64); |
| 9272 | assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8))); |
| 9273 | reg++; |
| 9274 | } while( reg != (r3 + 1)); |
| 9275 | |
| 9276 | return "stmg"; |
| 9277 | } |
| 9278 | |
| 9279 | static void |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 9280 | s390_irgen_xonc(IROp op, IRTemp length, IRTemp start1, IRTemp start2) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9281 | { |
| 9282 | IRTemp old1 = newTemp(Ity_I8); |
| 9283 | IRTemp old2 = newTemp(Ity_I8); |
| 9284 | IRTemp new1 = newTemp(Ity_I8); |
| 9285 | IRTemp counter = newTemp(Ity_I32); |
| 9286 | IRTemp addr1 = newTemp(Ity_I64); |
| 9287 | |
| 9288 | assign(counter, get_counter_w0()); |
| 9289 | |
| 9290 | assign(addr1, binop(Iop_Add64, mkexpr(start1), |
| 9291 | unop(Iop_32Uto64, mkexpr(counter)))); |
| 9292 | |
| 9293 | assign(old1, load(Ity_I8, mkexpr(addr1))); |
| 9294 | assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2), |
| 9295 | unop(Iop_32Uto64,mkexpr(counter))))); |
| 9296 | assign(new1, binop(op, mkexpr(old1), mkexpr(old2))); |
| 9297 | |
| 9298 | /* Special case: xc is used to zero memory */ |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9299 | if (op == Iop_Xor8) { |
| 9300 | store(mkexpr(addr1), |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 9301 | mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)), |
| 9302 | mkU8(0), mkexpr(new1))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9303 | } else |
| 9304 | store(mkexpr(addr1), mkexpr(new1)); |
| 9305 | put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)), |
| 9306 | get_counter_w1())); |
| 9307 | |
| 9308 | /* Check for end of field */ |
| 9309 | put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1))); |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 9310 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)), |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9311 | guest_IA_curr_instr); |
| 9312 | s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()), |
| 9313 | False); |
| 9314 | put_counter_dw0(mkU64(0)); |
| 9315 | } |
| 9316 | |
| 9317 | static HChar * |
| 9318 | s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2) |
| 9319 | { |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 9320 | IRTemp len = newTemp(Ity_I32); |
| 9321 | |
| 9322 | assign(len, mkU32(length)); |
| 9323 | s390_irgen_xonc(Iop_Xor8, len, start1, start2); |
florian | 79e839e | 2012-05-05 02:20:30 +0000 | [diff] [blame] | 9324 | dummy_put_IA(); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9325 | |
| 9326 | return "xc"; |
| 9327 | } |
| 9328 | |
sewardj | b63967e | 2011-03-24 08:50:04 +0000 | [diff] [blame] | 9329 | static void |
| 9330 | s390_irgen_XC_sameloc(UChar length, UChar b, UShort d) |
| 9331 | { |
| 9332 | IRTemp counter = newTemp(Ity_I32); |
| 9333 | IRTemp start = newTemp(Ity_I64); |
| 9334 | IRTemp addr = newTemp(Ity_I64); |
| 9335 | |
| 9336 | assign(start, |
| 9337 | binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0))); |
| 9338 | |
| 9339 | if (length < 8) { |
| 9340 | UInt i; |
| 9341 | |
| 9342 | for (i = 0; i <= length; ++i) { |
| 9343 | store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0)); |
| 9344 | } |
| 9345 | } else { |
| 9346 | assign(counter, get_counter_w0()); |
| 9347 | |
| 9348 | assign(addr, binop(Iop_Add64, mkexpr(start), |
| 9349 | unop(Iop_32Uto64, mkexpr(counter)))); |
| 9350 | |
| 9351 | store(mkexpr(addr), mkU8(0)); |
| 9352 | |
| 9353 | /* Check for end of field */ |
| 9354 | put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1))); |
| 9355 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)), |
| 9356 | guest_IA_curr_instr); |
| 9357 | |
| 9358 | /* Reset counter */ |
| 9359 | put_counter_dw0(mkU64(0)); |
| 9360 | } |
| 9361 | |
| 9362 | s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False); |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 9363 | dummy_put_IA(); |
sewardj | b63967e | 2011-03-24 08:50:04 +0000 | [diff] [blame] | 9364 | |
sewardj | 7ee9752 | 2011-05-09 21:45:04 +0000 | [diff] [blame] | 9365 | if (UNLIKELY(vex_traceflags & VEX_TRACE_FE)) |
sewardj | b63967e | 2011-03-24 08:50:04 +0000 | [diff] [blame] | 9366 | s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b); |
| 9367 | } |
| 9368 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9369 | static HChar * |
| 9370 | s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2) |
| 9371 | { |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 9372 | IRTemp len = newTemp(Ity_I32); |
| 9373 | |
| 9374 | assign(len, mkU32(length)); |
| 9375 | s390_irgen_xonc(Iop_And8, len, start1, start2); |
florian | 79e839e | 2012-05-05 02:20:30 +0000 | [diff] [blame] | 9376 | dummy_put_IA(); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9377 | |
| 9378 | return "nc"; |
| 9379 | } |
| 9380 | |
| 9381 | static HChar * |
| 9382 | s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2) |
| 9383 | { |
florian | b0bf660 | 2012-05-05 00:01:16 +0000 | [diff] [blame] | 9384 | IRTemp len = newTemp(Ity_I32); |
| 9385 | |
| 9386 | assign(len, mkU32(length)); |
| 9387 | s390_irgen_xonc(Iop_Or8, len, start1, start2); |
florian | 79e839e | 2012-05-05 02:20:30 +0000 | [diff] [blame] | 9388 | dummy_put_IA(); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9389 | |
| 9390 | return "oc"; |
| 9391 | } |
| 9392 | |
| 9393 | |
| 9394 | static HChar * |
| 9395 | s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2) |
| 9396 | { |
florian | 79e839e | 2012-05-05 02:20:30 +0000 | [diff] [blame] | 9397 | IRTemp len = newTemp(Ity_I64); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9398 | |
florian | 79e839e | 2012-05-05 02:20:30 +0000 | [diff] [blame] | 9399 | assign(len, mkU64(length)); |
| 9400 | s390_irgen_MVC_EX(len, start1, start2); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 9401 | dummy_put_IA(); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9402 | |
| 9403 | return "mvc"; |
| 9404 | } |
| 9405 | |
| 9406 | static HChar * |
florian | b0c9a13 | 2011-09-08 15:37:39 +0000 | [diff] [blame] | 9407 | s390_irgen_MVCL(UChar r1, UChar r2) |
| 9408 | { |
| 9409 | IRTemp addr1 = newTemp(Ity_I64); |
| 9410 | IRTemp addr2 = newTemp(Ity_I64); |
| 9411 | IRTemp addr2_load = newTemp(Ity_I64); |
| 9412 | IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */ |
| 9413 | IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */ |
| 9414 | IRTemp len1 = newTemp(Ity_I32); |
| 9415 | IRTemp len2 = newTemp(Ity_I32); |
| 9416 | IRTemp pad = newTemp(Ity_I8); |
| 9417 | IRTemp single = newTemp(Ity_I8); |
| 9418 | |
| 9419 | assign(addr1, get_gpr_dw0(r1)); |
| 9420 | assign(r1p1, get_gpr_w1(r1 + 1)); |
| 9421 | assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff))); |
| 9422 | assign(addr2, get_gpr_dw0(r2)); |
| 9423 | assign(r2p1, get_gpr_w1(r2 + 1)); |
| 9424 | assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff))); |
| 9425 | assign(pad, get_gpr_b4(r2 + 1)); |
| 9426 | |
| 9427 | /* len1 == 0 ? */ |
| 9428 | s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False); |
| 9429 | if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)), |
| 9430 | guest_IA_next_instr); |
| 9431 | |
| 9432 | /* Check for destructive overlap: |
| 9433 | addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */ |
| 9434 | s390_cc_set(3); |
| 9435 | IRTemp cond1 = newTemp(Ity_I32); |
| 9436 | assign(cond1, unop(Iop_1Uto32, |
| 9437 | binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1)))); |
| 9438 | IRTemp cond2 = newTemp(Ity_I32); |
| 9439 | assign(cond2, unop(Iop_1Uto32, |
| 9440 | binop(Iop_CmpLT64U, mkexpr(addr1), |
| 9441 | binop(Iop_Add64, mkexpr(addr2), |
| 9442 | unop(Iop_32Uto64, mkexpr(len1)))))); |
| 9443 | IRTemp cond3 = newTemp(Ity_I32); |
| 9444 | assign(cond3, unop(Iop_1Uto32, |
| 9445 | binop(Iop_CmpLT64U, |
| 9446 | mkexpr(addr1), |
| 9447 | binop(Iop_Add64, mkexpr(addr2), |
| 9448 | unop(Iop_32Uto64, mkexpr(len2)))))); |
| 9449 | |
| 9450 | if_condition_goto(binop(Iop_CmpEQ32, |
| 9451 | binop(Iop_And32, |
| 9452 | binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)), |
| 9453 | mkexpr(cond3)), |
| 9454 | mkU32(1)), |
| 9455 | guest_IA_next_instr); |
| 9456 | |
| 9457 | /* See s390_irgen_CLCL for explanation why we cannot load directly |
| 9458 | and need two steps. */ |
| 9459 | assign(addr2_load, |
| 9460 | mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)), |
| 9461 | mkU64(guest_IA_curr_instr), mkexpr(addr2))); |
| 9462 | assign(single, |
| 9463 | mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)), |
| 9464 | mkexpr(pad), load(Ity_I8, mkexpr(addr2_load)))); |
| 9465 | |
| 9466 | store(mkexpr(addr1), mkexpr(single)); |
| 9467 | |
| 9468 | /* Update addr1 and len1 */ |
| 9469 | put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1))); |
| 9470 | put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))); |
| 9471 | |
| 9472 | /* Update addr2 and len2 */ |
| 9473 | put_gpr_dw0(r2, |
| 9474 | mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)), |
| 9475 | mkexpr(addr2), |
| 9476 | binop(Iop_Add64, mkexpr(addr2), mkU64(1)))); |
| 9477 | |
| 9478 | /* When updating len2 we must not modify bits (r2+1)[0:39] */ |
| 9479 | put_gpr_w1(r2 + 1, |
| 9480 | mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)), |
| 9481 | binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)), |
| 9482 | binop(Iop_Sub32, mkexpr(r2p1), mkU32(1)))); |
| 9483 | |
| 9484 | s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False); |
| 9485 | if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)), |
| 9486 | guest_IA_curr_instr); |
| 9487 | |
| 9488 | return "mvcl"; |
| 9489 | } |
| 9490 | |
| 9491 | |
| 9492 | static HChar * |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9493 | s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2) |
| 9494 | { |
| 9495 | IRTemp addr1, addr3, addr3_load, len1, len3, single; |
| 9496 | |
| 9497 | addr1 = newTemp(Ity_I64); |
| 9498 | addr3 = newTemp(Ity_I64); |
| 9499 | addr3_load = newTemp(Ity_I64); |
| 9500 | len1 = newTemp(Ity_I64); |
| 9501 | len3 = newTemp(Ity_I64); |
| 9502 | single = newTemp(Ity_I8); |
| 9503 | |
| 9504 | assign(addr1, get_gpr_dw0(r1)); |
| 9505 | assign(len1, get_gpr_dw0(r1 + 1)); |
| 9506 | assign(addr3, get_gpr_dw0(r3)); |
| 9507 | assign(len3, get_gpr_dw0(r3 + 1)); |
| 9508 | |
| 9509 | // len1 == 0 ? |
| 9510 | s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False); |
| 9511 | if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)), |
| 9512 | guest_IA_next_instr); |
| 9513 | |
| 9514 | /* This is a hack to prevent mvcle from reading from addr3 if it |
| 9515 | should read from the pad. Since the pad has no address, just |
| 9516 | read from the instruction, we discard that anyway */ |
| 9517 | assign(addr3_load, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 9518 | mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)), |
| 9519 | mkU64(guest_IA_curr_instr), mkexpr(addr3))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9520 | |
| 9521 | assign(single, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 9522 | mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)), |
| 9523 | unop(Iop_64to8, mkexpr(pad2)), |
| 9524 | load(Ity_I8, mkexpr(addr3_load)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9525 | store(mkexpr(addr1), mkexpr(single)); |
| 9526 | |
| 9527 | put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1))); |
| 9528 | |
| 9529 | put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1))); |
| 9530 | |
| 9531 | put_gpr_dw0(r3, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 9532 | mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)), |
| 9533 | mkexpr(addr3), |
| 9534 | binop(Iop_Add64, mkexpr(addr3), mkU64(1)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9535 | |
| 9536 | put_gpr_dw0(r3 + 1, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 9537 | mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)), |
| 9538 | mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9539 | |
| 9540 | /* We should set CC=3 (faked by overflow add) and leave after |
| 9541 | a maximum of ~4096 bytes have been processed. This is simpler: |
| 9542 | we leave whenever (len1 % 4096) == 0 */ |
| 9543 | s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)), |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9544 | mktemp(Ity_I64, mkU64(-1ULL)), False); |
| 9545 | if_condition_goto(binop(Iop_CmpEQ64, |
| 9546 | binop(Iop_And64, mkexpr(len1), mkU64(0xfff)), |
| 9547 | mkU64(0)), |
| 9548 | guest_IA_next_instr); |
| 9549 | |
| 9550 | s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False); |
| 9551 | if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)), |
| 9552 | guest_IA_curr_instr); |
| 9553 | |
| 9554 | return "mvcle"; |
| 9555 | } |
| 9556 | |
| 9557 | static HChar * |
| 9558 | s390_irgen_MVST(UChar r1, UChar r2) |
| 9559 | { |
| 9560 | IRTemp addr1 = newTemp(Ity_I64); |
| 9561 | IRTemp addr2 = newTemp(Ity_I64); |
| 9562 | IRTemp end = newTemp(Ity_I8); |
| 9563 | IRTemp byte = newTemp(Ity_I8); |
| 9564 | IRTemp counter = newTemp(Ity_I64); |
| 9565 | |
| 9566 | assign(addr1, get_gpr_dw0(r1)); |
| 9567 | assign(addr2, get_gpr_dw0(r2)); |
| 9568 | assign(counter, get_counter_dw0()); |
| 9569 | assign(end, get_gpr_b7(0)); |
| 9570 | assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter)))); |
| 9571 | store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte)); |
| 9572 | |
| 9573 | // We use unlimited as cpu-determined number |
| 9574 | put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); |
| 9575 | if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)), |
| 9576 | guest_IA_curr_instr); |
| 9577 | |
| 9578 | // and always set cc=1 at the end + update r1 |
| 9579 | s390_cc_set(1); |
| 9580 | put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter))); |
| 9581 | put_counter_dw0(mkU64(0)); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 9582 | dummy_put_IA(); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9583 | |
| 9584 | return "mvst"; |
| 9585 | } |
| 9586 | |
| 9587 | static void |
| 9588 | s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2) |
| 9589 | { |
| 9590 | IRTemp op1 = newTemp(Ity_I64); |
| 9591 | IRTemp result = newTemp(Ity_I64); |
| 9592 | |
| 9593 | assign(op1, binop(Iop_32HLto64, |
| 9594 | get_gpr_w1(r1), // high 32 bits |
| 9595 | get_gpr_w1(r1 + 1))); // low 32 bits |
| 9596 | assign(result, binop(op, mkexpr(op1), mkexpr(op2))); |
| 9597 | put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder |
| 9598 | put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient |
| 9599 | } |
| 9600 | |
| 9601 | static void |
| 9602 | s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2) |
| 9603 | { |
| 9604 | IRTemp op1 = newTemp(Ity_I128); |
| 9605 | IRTemp result = newTemp(Ity_I128); |
| 9606 | |
| 9607 | assign(op1, binop(Iop_64HLto128, |
| 9608 | get_gpr_dw0(r1), // high 64 bits |
| 9609 | get_gpr_dw0(r1 + 1))); // low 64 bits |
| 9610 | assign(result, binop(op, mkexpr(op1), mkexpr(op2))); |
| 9611 | put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder |
| 9612 | put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient |
| 9613 | } |
| 9614 | |
| 9615 | static void |
| 9616 | s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2) |
| 9617 | { |
| 9618 | IRTemp op1 = newTemp(Ity_I64); |
| 9619 | IRTemp result = newTemp(Ity_I128); |
| 9620 | |
| 9621 | assign(op1, get_gpr_dw0(r1 + 1)); |
| 9622 | assign(result, binop(op, mkexpr(op1), mkexpr(op2))); |
| 9623 | put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder |
| 9624 | put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient |
| 9625 | } |
| 9626 | |
| 9627 | static HChar * |
| 9628 | s390_irgen_DR(UChar r1, UChar r2) |
| 9629 | { |
| 9630 | IRTemp op2 = newTemp(Ity_I32); |
| 9631 | |
| 9632 | assign(op2, get_gpr_w1(r2)); |
| 9633 | |
| 9634 | s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2); |
| 9635 | |
| 9636 | return "dr"; |
| 9637 | } |
| 9638 | |
| 9639 | static HChar * |
| 9640 | s390_irgen_D(UChar r1, IRTemp op2addr) |
| 9641 | { |
| 9642 | IRTemp op2 = newTemp(Ity_I32); |
| 9643 | |
| 9644 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 9645 | |
| 9646 | s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2); |
| 9647 | |
| 9648 | return "d"; |
| 9649 | } |
| 9650 | |
| 9651 | static HChar * |
| 9652 | s390_irgen_DLR(UChar r1, UChar r2) |
| 9653 | { |
| 9654 | IRTemp op2 = newTemp(Ity_I32); |
| 9655 | |
| 9656 | assign(op2, get_gpr_w1(r2)); |
| 9657 | |
| 9658 | s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2); |
| 9659 | |
| 9660 | return "dr"; |
| 9661 | } |
| 9662 | |
| 9663 | static HChar * |
| 9664 | s390_irgen_DL(UChar r1, IRTemp op2addr) |
| 9665 | { |
| 9666 | IRTemp op2 = newTemp(Ity_I32); |
| 9667 | |
| 9668 | assign(op2, load(Ity_I32, mkexpr(op2addr))); |
| 9669 | |
| 9670 | s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2); |
| 9671 | |
| 9672 | return "dl"; |
| 9673 | } |
| 9674 | |
| 9675 | static HChar * |
| 9676 | s390_irgen_DLG(UChar r1, IRTemp op2addr) |
| 9677 | { |
| 9678 | IRTemp op2 = newTemp(Ity_I64); |
| 9679 | |
| 9680 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 9681 | |
| 9682 | s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2); |
| 9683 | |
| 9684 | return "dlg"; |
| 9685 | } |
| 9686 | |
| 9687 | static HChar * |
| 9688 | s390_irgen_DLGR(UChar r1, UChar r2) |
| 9689 | { |
| 9690 | IRTemp op2 = newTemp(Ity_I64); |
| 9691 | |
| 9692 | assign(op2, get_gpr_dw0(r2)); |
| 9693 | |
| 9694 | s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2); |
| 9695 | |
| 9696 | return "dlgr"; |
| 9697 | } |
| 9698 | |
| 9699 | static HChar * |
| 9700 | s390_irgen_DSGR(UChar r1, UChar r2) |
| 9701 | { |
| 9702 | IRTemp op2 = newTemp(Ity_I64); |
| 9703 | |
| 9704 | assign(op2, get_gpr_dw0(r2)); |
| 9705 | |
| 9706 | s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2); |
| 9707 | |
| 9708 | return "dsgr"; |
| 9709 | } |
| 9710 | |
| 9711 | static HChar * |
| 9712 | s390_irgen_DSG(UChar r1, IRTemp op2addr) |
| 9713 | { |
| 9714 | IRTemp op2 = newTemp(Ity_I64); |
| 9715 | |
| 9716 | assign(op2, load(Ity_I64, mkexpr(op2addr))); |
| 9717 | |
| 9718 | s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2); |
| 9719 | |
| 9720 | return "dsg"; |
| 9721 | } |
| 9722 | |
| 9723 | static HChar * |
| 9724 | s390_irgen_DSGFR(UChar r1, UChar r2) |
| 9725 | { |
| 9726 | IRTemp op2 = newTemp(Ity_I64); |
| 9727 | |
| 9728 | assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); |
| 9729 | |
| 9730 | s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2); |
| 9731 | |
| 9732 | return "dsgfr"; |
| 9733 | } |
| 9734 | |
| 9735 | static HChar * |
| 9736 | s390_irgen_DSGF(UChar r1, IRTemp op2addr) |
| 9737 | { |
| 9738 | IRTemp op2 = newTemp(Ity_I64); |
| 9739 | |
| 9740 | assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); |
| 9741 | |
| 9742 | s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2); |
| 9743 | |
| 9744 | return "dsgf"; |
| 9745 | } |
| 9746 | |
| 9747 | static void |
| 9748 | s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr) |
| 9749 | { |
| 9750 | UChar reg; |
| 9751 | IRTemp addr = newTemp(Ity_I64); |
| 9752 | |
| 9753 | assign(addr, mkexpr(op2addr)); |
| 9754 | reg = r1; |
| 9755 | do { |
| 9756 | IRTemp old = addr; |
| 9757 | |
| 9758 | reg %= 16; |
| 9759 | put_ar_w0(reg, load(Ity_I32, mkexpr(addr))); |
| 9760 | addr = newTemp(Ity_I64); |
| 9761 | assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); |
| 9762 | reg++; |
| 9763 | } while (reg != (r3 + 1)); |
| 9764 | } |
| 9765 | |
| 9766 | static HChar * |
| 9767 | s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr) |
| 9768 | { |
| 9769 | s390_irgen_load_ar_multiple(r1, r3, op2addr); |
| 9770 | |
| 9771 | return "lam"; |
| 9772 | } |
| 9773 | |
| 9774 | static HChar * |
| 9775 | s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr) |
| 9776 | { |
| 9777 | s390_irgen_load_ar_multiple(r1, r3, op2addr); |
| 9778 | |
| 9779 | return "lamy"; |
| 9780 | } |
| 9781 | |
| 9782 | static void |
| 9783 | s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr) |
| 9784 | { |
| 9785 | UChar reg; |
| 9786 | IRTemp addr = newTemp(Ity_I64); |
| 9787 | |
| 9788 | assign(addr, mkexpr(op2addr)); |
| 9789 | reg = r1; |
| 9790 | do { |
| 9791 | IRTemp old = addr; |
| 9792 | |
| 9793 | reg %= 16; |
| 9794 | store(mkexpr(addr), get_ar_w0(reg)); |
| 9795 | addr = newTemp(Ity_I64); |
| 9796 | assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); |
| 9797 | reg++; |
| 9798 | } while (reg != (r3 + 1)); |
| 9799 | } |
| 9800 | |
| 9801 | static HChar * |
| 9802 | s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr) |
| 9803 | { |
| 9804 | s390_irgen_store_ar_multiple(r1, r3, op2addr); |
| 9805 | |
| 9806 | return "stam"; |
| 9807 | } |
| 9808 | |
| 9809 | static HChar * |
| 9810 | s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr) |
| 9811 | { |
| 9812 | s390_irgen_store_ar_multiple(r1, r3, op2addr); |
| 9813 | |
| 9814 | return "stamy"; |
| 9815 | } |
| 9816 | |
| 9817 | |
| 9818 | /* Implementation for 32-bit compare-and-swap */ |
| 9819 | static void |
| 9820 | s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr) |
| 9821 | { |
| 9822 | IRCAS *cas; |
| 9823 | IRTemp op1 = newTemp(Ity_I32); |
| 9824 | IRTemp old_mem = newTemp(Ity_I32); |
| 9825 | IRTemp op3 = newTemp(Ity_I32); |
| 9826 | IRTemp result = newTemp(Ity_I32); |
| 9827 | IRTemp nequal = newTemp(Ity_I1); |
| 9828 | |
| 9829 | assign(op1, get_gpr_w1(r1)); |
| 9830 | assign(op3, get_gpr_w1(r3)); |
| 9831 | |
| 9832 | /* The first and second operands are compared. If they are equal, |
| 9833 | the third operand is stored at the second- operand location. */ |
| 9834 | cas = mkIRCAS(IRTemp_INVALID, old_mem, |
| 9835 | Iend_BE, mkexpr(op2addr), |
| 9836 | NULL, mkexpr(op1), /* expected value */ |
| 9837 | NULL, mkexpr(op3) /* new value */); |
| 9838 | stmt(IRStmt_CAS(cas)); |
| 9839 | |
| 9840 | /* Set CC. Operands compared equal -> 0, else 1. */ |
| 9841 | assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem))); |
| 9842 | s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False); |
| 9843 | |
| 9844 | /* If operands were equal (cc == 0) just store the old value op1 in r1. |
| 9845 | Otherwise, store the old_value from memory in r1 and yield. */ |
| 9846 | assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0))); |
| 9847 | put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1))); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 9848 | stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield, |
| 9849 | IRConst_U64(guest_IA_next_instr), |
| 9850 | S390X_GUEST_OFFSET(guest_IA))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9851 | } |
| 9852 | |
| 9853 | static HChar * |
| 9854 | s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr) |
| 9855 | { |
| 9856 | s390_irgen_cas_32(r1, r3, op2addr); |
| 9857 | |
| 9858 | return "cs"; |
| 9859 | } |
| 9860 | |
| 9861 | static HChar * |
| 9862 | s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr) |
| 9863 | { |
| 9864 | s390_irgen_cas_32(r1, r3, op2addr); |
| 9865 | |
| 9866 | return "csy"; |
| 9867 | } |
| 9868 | |
| 9869 | static HChar * |
| 9870 | s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr) |
| 9871 | { |
| 9872 | IRCAS *cas; |
| 9873 | IRTemp op1 = newTemp(Ity_I64); |
| 9874 | IRTemp old_mem = newTemp(Ity_I64); |
| 9875 | IRTemp op3 = newTemp(Ity_I64); |
| 9876 | IRTemp result = newTemp(Ity_I64); |
| 9877 | IRTemp nequal = newTemp(Ity_I1); |
| 9878 | |
| 9879 | assign(op1, get_gpr_dw0(r1)); |
| 9880 | assign(op3, get_gpr_dw0(r3)); |
| 9881 | |
| 9882 | /* The first and second operands are compared. If they are equal, |
| 9883 | the third operand is stored at the second- operand location. */ |
| 9884 | cas = mkIRCAS(IRTemp_INVALID, old_mem, |
| 9885 | Iend_BE, mkexpr(op2addr), |
| 9886 | NULL, mkexpr(op1), /* expected value */ |
| 9887 | NULL, mkexpr(op3) /* new value */); |
| 9888 | stmt(IRStmt_CAS(cas)); |
| 9889 | |
| 9890 | /* Set CC. Operands compared equal -> 0, else 1. */ |
| 9891 | assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem))); |
| 9892 | s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False); |
| 9893 | |
| 9894 | /* If operands were equal (cc == 0) just store the old value op1 in r1. |
| 9895 | Otherwise, store the old_value from memory in r1 and yield. */ |
| 9896 | assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0))); |
| 9897 | put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1))); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 9898 | stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield, |
| 9899 | IRConst_U64(guest_IA_next_instr), |
| 9900 | S390X_GUEST_OFFSET(guest_IA))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 9901 | |
| 9902 | return "csg"; |
| 9903 | } |
| 9904 | |
florian | 448cbba | 2012-06-06 02:26:01 +0000 | [diff] [blame] | 9905 | /* Implementation for 32-bit compare-double-and-swap */ |
| 9906 | static void |
| 9907 | s390_irgen_cdas_32(UChar r1, UChar r3, IRTemp op2addr) |
| 9908 | { |
| 9909 | IRCAS *cas; |
| 9910 | IRTemp op1_high = newTemp(Ity_I32); |
| 9911 | IRTemp op1_low = newTemp(Ity_I32); |
| 9912 | IRTemp old_mem_high = newTemp(Ity_I32); |
| 9913 | IRTemp old_mem_low = newTemp(Ity_I32); |
| 9914 | IRTemp op3_high = newTemp(Ity_I32); |
| 9915 | IRTemp op3_low = newTemp(Ity_I32); |
| 9916 | IRTemp result = newTemp(Ity_I32); |
| 9917 | IRTemp nequal = newTemp(Ity_I1); |
| 9918 | |
| 9919 | assign(op1_high, get_gpr_w1(r1)); |
| 9920 | assign(op1_low, get_gpr_w1(r1+1)); |
| 9921 | assign(op3_high, get_gpr_w1(r3)); |
| 9922 | assign(op3_low, get_gpr_w1(r3+1)); |
| 9923 | |
| 9924 | /* The first and second operands are compared. If they are equal, |
| 9925 | the third operand is stored at the second-operand location. */ |
| 9926 | cas = mkIRCAS(old_mem_high, old_mem_low, |
| 9927 | Iend_BE, mkexpr(op2addr), |
| 9928 | mkexpr(op1_high), mkexpr(op1_low), /* expected value */ |
| 9929 | mkexpr(op3_high), mkexpr(op3_low) /* new value */); |
| 9930 | stmt(IRStmt_CAS(cas)); |
| 9931 | |
| 9932 | /* Set CC. Operands compared equal -> 0, else 1. */ |
| 9933 | assign(result, unop(Iop_1Uto32, |
| 9934 | binop(Iop_CmpNE32, |
| 9935 | binop(Iop_Or32, |
| 9936 | binop(Iop_Xor32, mkexpr(op1_high), mkexpr(old_mem_high)), |
| 9937 | binop(Iop_Xor32, mkexpr(op1_low), mkexpr(old_mem_low))), |
| 9938 | mkU32(0)))); |
| 9939 | |
| 9940 | s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False); |
| 9941 | |
| 9942 | /* If operands were equal (cc == 0) just store the old value op1 in r1. |
| 9943 | Otherwise, store the old_value from memory in r1 and yield. */ |
| 9944 | assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0))); |
| 9945 | put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem_high), mkexpr(op1_high))); |
| 9946 | put_gpr_w1(r1+1, mkite(mkexpr(nequal), mkexpr(old_mem_low), mkexpr(op1_low))); |
| 9947 | stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield, |
| 9948 | IRConst_U64(guest_IA_next_instr), |
| 9949 | S390X_GUEST_OFFSET(guest_IA))); |
| 9950 | } |
| 9951 | |
| 9952 | static HChar * |
| 9953 | s390_irgen_CDS(UChar r1, UChar r3, IRTemp op2addr) |
| 9954 | { |
| 9955 | s390_irgen_cdas_32(r1, r3, op2addr); |
| 9956 | |
| 9957 | return "cds"; |
| 9958 | } |
| 9959 | |
| 9960 | static HChar * |
| 9961 | s390_irgen_CDSY(UChar r1, UChar r3, IRTemp op2addr) |
| 9962 | { |
| 9963 | s390_irgen_cdas_32(r1, r3, op2addr); |
| 9964 | |
| 9965 | return "cdsy"; |
| 9966 | } |
| 9967 | |
| 9968 | static HChar * |
| 9969 | s390_irgen_CDSG(UChar r1, UChar r3, IRTemp op2addr) |
| 9970 | { |
| 9971 | IRCAS *cas; |
| 9972 | IRTemp op1_high = newTemp(Ity_I64); |
| 9973 | IRTemp op1_low = newTemp(Ity_I64); |
| 9974 | IRTemp old_mem_high = newTemp(Ity_I64); |
| 9975 | IRTemp old_mem_low = newTemp(Ity_I64); |
| 9976 | IRTemp op3_high = newTemp(Ity_I64); |
| 9977 | IRTemp op3_low = newTemp(Ity_I64); |
| 9978 | IRTemp result = newTemp(Ity_I64); |
| 9979 | IRTemp nequal = newTemp(Ity_I1); |
| 9980 | |
| 9981 | assign(op1_high, get_gpr_dw0(r1)); |
| 9982 | assign(op1_low, get_gpr_dw0(r1+1)); |
| 9983 | assign(op3_high, get_gpr_dw0(r3)); |
| 9984 | assign(op3_low, get_gpr_dw0(r3+1)); |
| 9985 | |
| 9986 | /* The first and second operands are compared. If they are equal, |
| 9987 | the third operand is stored at the second-operand location. */ |
| 9988 | cas = mkIRCAS(old_mem_high, old_mem_low, |
| 9989 | Iend_BE, mkexpr(op2addr), |
| 9990 | mkexpr(op1_high), mkexpr(op1_low), /* expected value */ |
| 9991 | mkexpr(op3_high), mkexpr(op3_low) /* new value */); |
| 9992 | stmt(IRStmt_CAS(cas)); |
| 9993 | |
| 9994 | /* Set CC. Operands compared equal -> 0, else 1. */ |
| 9995 | assign(result, unop(Iop_1Uto64, |
| 9996 | binop(Iop_CmpNE64, |
| 9997 | binop(Iop_Or64, |
| 9998 | binop(Iop_Xor64, mkexpr(op1_high), mkexpr(old_mem_high)), |
| 9999 | binop(Iop_Xor64, mkexpr(op1_low), mkexpr(old_mem_low))), |
| 10000 | mkU64(0)))); |
| 10001 | |
| 10002 | s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False); |
| 10003 | |
| 10004 | /* If operands were equal (cc == 0) just store the old value op1 in r1. |
| 10005 | Otherwise, store the old_value from memory in r1 and yield. */ |
| 10006 | assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0))); |
| 10007 | put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem_high), mkexpr(op1_high))); |
| 10008 | put_gpr_dw0(r1+1, mkite(mkexpr(nequal), mkexpr(old_mem_low), mkexpr(op1_low))); |
| 10009 | stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield, |
| 10010 | IRConst_U64(guest_IA_next_instr), |
| 10011 | S390X_GUEST_OFFSET(guest_IA))); |
| 10012 | return "cdsg"; |
| 10013 | } |
| 10014 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 10015 | |
| 10016 | /* Binary floating point */ |
| 10017 | |
| 10018 | static HChar * |
| 10019 | s390_irgen_AXBR(UChar r1, UChar r2) |
| 10020 | { |
| 10021 | IRTemp op1 = newTemp(Ity_F128); |
| 10022 | IRTemp op2 = newTemp(Ity_F128); |
| 10023 | IRTemp result = newTemp(Ity_F128); |
| 10024 | |
| 10025 | assign(op1, get_fpr_pair(r1)); |
| 10026 | assign(op2, get_fpr_pair(r2)); |
| 10027 | assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 10028 | mkexpr(op2))); |
| 10029 | put_fpr_pair(r1, mkexpr(result)); |
| 10030 | |
| 10031 | s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); |
| 10032 | |
| 10033 | return "axbr"; |
| 10034 | } |
| 10035 | |
| 10036 | /* The result of a Iop_CmdFxx operation is a condition code. It is |
| 10037 | encoded using the values defined in type IRCmpFxxResult. |
| 10038 | Before we can store the condition code into the guest state (or do |
| 10039 | anything else with it for that matter) we need to convert it to |
| 10040 | the encoding that s390 uses. This is what this function does. |
| 10041 | |
| 10042 | s390 VEX b6 b2 b0 cc.1 cc.0 |
| 10043 | 0 0x40 EQ 1 0 0 0 0 |
| 10044 | 1 0x01 LT 0 0 1 0 1 |
| 10045 | 2 0x00 GT 0 0 0 1 0 |
| 10046 | 3 0x45 Unordered 1 1 1 1 1 |
| 10047 | |
| 10048 | The following bits from the VEX encoding are interesting: |
| 10049 | b0, b2, b6 with b0 being the LSB. We observe: |
| 10050 | |
| 10051 | cc.0 = b0; |
| 10052 | cc.1 = b2 | (~b0 & ~b6) |
| 10053 | |
| 10054 | with cc being the s390 condition code. |
| 10055 | */ |
| 10056 | static IRExpr * |
| 10057 | convert_vex_fpcc_to_s390(IRTemp vex_cc) |
| 10058 | { |
| 10059 | IRTemp cc0 = newTemp(Ity_I32); |
| 10060 | IRTemp cc1 = newTemp(Ity_I32); |
| 10061 | IRTemp b0 = newTemp(Ity_I32); |
| 10062 | IRTemp b2 = newTemp(Ity_I32); |
| 10063 | IRTemp b6 = newTemp(Ity_I32); |
| 10064 | |
| 10065 | assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1))); |
| 10066 | assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)), |
| 10067 | mkU32(1))); |
| 10068 | assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)), |
| 10069 | mkU32(1))); |
| 10070 | |
| 10071 | assign(cc0, mkexpr(b0)); |
| 10072 | assign(cc1, binop(Iop_Or32, mkexpr(b2), |
| 10073 | binop(Iop_And32, |
| 10074 | binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */ |
| 10075 | binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */ |
| 10076 | ))); |
| 10077 | |
| 10078 | return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1))); |
| 10079 | } |
| 10080 | |
| 10081 | static HChar * |
| 10082 | s390_irgen_CEBR(UChar r1, UChar r2) |
| 10083 | { |
| 10084 | IRTemp op1 = newTemp(Ity_F32); |
| 10085 | IRTemp op2 = newTemp(Ity_F32); |
| 10086 | IRTemp cc_vex = newTemp(Ity_I32); |
| 10087 | IRTemp cc_s390 = newTemp(Ity_I32); |
| 10088 | |
| 10089 | assign(op1, get_fpr_w0(r1)); |
| 10090 | assign(op2, get_fpr_w0(r2)); |
| 10091 | assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2))); |
| 10092 | |
| 10093 | assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex)); |
| 10094 | s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); |
| 10095 | |
| 10096 | return "cebr"; |
| 10097 | } |
| 10098 | |
| 10099 | static HChar * |
| 10100 | s390_irgen_CDBR(UChar r1, UChar r2) |
| 10101 | { |
| 10102 | IRTemp op1 = newTemp(Ity_F64); |
| 10103 | IRTemp op2 = newTemp(Ity_F64); |
| 10104 | IRTemp cc_vex = newTemp(Ity_I32); |
| 10105 | IRTemp cc_s390 = newTemp(Ity_I32); |
| 10106 | |
| 10107 | assign(op1, get_fpr_dw0(r1)); |
| 10108 | assign(op2, get_fpr_dw0(r2)); |
| 10109 | assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2))); |
| 10110 | |
| 10111 | assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex)); |
| 10112 | s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); |
| 10113 | |
| 10114 | return "cdbr"; |
| 10115 | } |
| 10116 | |
| 10117 | static HChar * |
| 10118 | s390_irgen_CXBR(UChar r1, UChar r2) |
| 10119 | { |
| 10120 | IRTemp op1 = newTemp(Ity_F128); |
| 10121 | IRTemp op2 = newTemp(Ity_F128); |
| 10122 | IRTemp cc_vex = newTemp(Ity_I32); |
| 10123 | IRTemp cc_s390 = newTemp(Ity_I32); |
| 10124 | |
| 10125 | assign(op1, get_fpr_pair(r1)); |
| 10126 | assign(op2, get_fpr_pair(r2)); |
| 10127 | assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2))); |
| 10128 | |
| 10129 | assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex)); |
| 10130 | s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); |
| 10131 | |
| 10132 | return "cxbr"; |
| 10133 | } |
| 10134 | |
| 10135 | static HChar * |
| 10136 | s390_irgen_CEB(UChar r1, IRTemp op2addr) |
| 10137 | { |
| 10138 | IRTemp op1 = newTemp(Ity_F32); |
| 10139 | IRTemp op2 = newTemp(Ity_F32); |
| 10140 | IRTemp cc_vex = newTemp(Ity_I32); |
| 10141 | IRTemp cc_s390 = newTemp(Ity_I32); |
| 10142 | |
| 10143 | assign(op1, get_fpr_w0(r1)); |
| 10144 | assign(op2, load(Ity_F32, mkexpr(op2addr))); |
| 10145 | assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2))); |
| 10146 | |
| 10147 | assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex)); |
| 10148 | s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); |
| 10149 | |
| 10150 | return "ceb"; |
| 10151 | } |
| 10152 | |
| 10153 | static HChar * |
| 10154 | s390_irgen_CDB(UChar r1, IRTemp op2addr) |
| 10155 | { |
| 10156 | IRTemp op1 = newTemp(Ity_F64); |
| 10157 | IRTemp op2 = newTemp(Ity_F64); |
| 10158 | IRTemp cc_vex = newTemp(Ity_I32); |
| 10159 | IRTemp cc_s390 = newTemp(Ity_I32); |
| 10160 | |
| 10161 | assign(op1, get_fpr_dw0(r1)); |
| 10162 | assign(op2, load(Ity_F64, mkexpr(op2addr))); |
| 10163 | assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2))); |
| 10164 | |
| 10165 | assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex)); |
| 10166 | s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); |
| 10167 | |
| 10168 | return "cdb"; |
| 10169 | } |
| 10170 | |
| 10171 | static HChar * |
| 10172 | s390_irgen_CXFBR(UChar r1, UChar r2) |
| 10173 | { |
| 10174 | IRTemp op2 = newTemp(Ity_I32); |
| 10175 | |
| 10176 | assign(op2, get_gpr_w1(r2)); |
| 10177 | put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2))); |
| 10178 | |
| 10179 | return "cxfbr"; |
| 10180 | } |
| 10181 | |
| 10182 | static HChar * |
| 10183 | s390_irgen_CXGBR(UChar r1, UChar r2) |
| 10184 | { |
| 10185 | IRTemp op2 = newTemp(Ity_I64); |
| 10186 | |
| 10187 | assign(op2, get_gpr_dw0(r2)); |
| 10188 | put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2))); |
| 10189 | |
| 10190 | return "cxgbr"; |
| 10191 | } |
| 10192 | |
| 10193 | static HChar * |
| 10194 | s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2) |
| 10195 | { |
| 10196 | IRTemp op = newTemp(Ity_F128); |
| 10197 | IRTemp result = newTemp(Ity_I32); |
| 10198 | |
| 10199 | assign(op, get_fpr_pair(r2)); |
| 10200 | assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)), |
| 10201 | mkexpr(op))); |
| 10202 | put_gpr_w1(r1, mkexpr(result)); |
| 10203 | s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op); |
| 10204 | |
| 10205 | return "cfxbr"; |
| 10206 | } |
| 10207 | |
| 10208 | static HChar * |
| 10209 | s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2) |
| 10210 | { |
| 10211 | IRTemp op = newTemp(Ity_F128); |
| 10212 | IRTemp result = newTemp(Ity_I64); |
| 10213 | |
| 10214 | assign(op, get_fpr_pair(r2)); |
| 10215 | assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)), |
| 10216 | mkexpr(op))); |
| 10217 | put_gpr_dw0(r1, mkexpr(result)); |
| 10218 | s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op); |
| 10219 | |
| 10220 | return "cgxbr"; |
| 10221 | } |
| 10222 | |
| 10223 | static HChar * |
| 10224 | s390_irgen_DXBR(UChar r1, UChar r2) |
| 10225 | { |
| 10226 | IRTemp op1 = newTemp(Ity_F128); |
| 10227 | IRTemp op2 = newTemp(Ity_F128); |
| 10228 | IRTemp result = newTemp(Ity_F128); |
| 10229 | |
| 10230 | assign(op1, get_fpr_pair(r1)); |
| 10231 | assign(op2, get_fpr_pair(r2)); |
| 10232 | assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 10233 | mkexpr(op2))); |
| 10234 | put_fpr_pair(r1, mkexpr(result)); |
| 10235 | |
| 10236 | return "dxbr"; |
| 10237 | } |
| 10238 | |
| 10239 | static HChar * |
| 10240 | s390_irgen_LTXBR(UChar r1, UChar r2) |
| 10241 | { |
| 10242 | IRTemp result = newTemp(Ity_F128); |
| 10243 | |
| 10244 | assign(result, get_fpr_pair(r2)); |
| 10245 | put_fpr_pair(r1, mkexpr(result)); |
| 10246 | s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); |
| 10247 | |
| 10248 | return "ltxbr"; |
| 10249 | } |
| 10250 | |
| 10251 | static HChar * |
| 10252 | s390_irgen_LCXBR(UChar r1, UChar r2) |
| 10253 | { |
| 10254 | IRTemp result = newTemp(Ity_F128); |
| 10255 | |
| 10256 | assign(result, unop(Iop_NegF128, get_fpr_pair(r2))); |
| 10257 | put_fpr_pair(r1, mkexpr(result)); |
| 10258 | s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); |
| 10259 | |
| 10260 | return "lcxbr"; |
| 10261 | } |
| 10262 | |
| 10263 | static HChar * |
| 10264 | s390_irgen_LXDBR(UChar r1, UChar r2) |
| 10265 | { |
| 10266 | IRTemp op = newTemp(Ity_F64); |
| 10267 | |
| 10268 | assign(op, get_fpr_dw0(r2)); |
| 10269 | put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op))); |
| 10270 | |
| 10271 | return "lxdbr"; |
| 10272 | } |
| 10273 | |
| 10274 | static HChar * |
| 10275 | s390_irgen_LXEBR(UChar r1, UChar r2) |
| 10276 | { |
| 10277 | IRTemp op = newTemp(Ity_F32); |
| 10278 | |
| 10279 | assign(op, get_fpr_w0(r2)); |
| 10280 | put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op))); |
| 10281 | |
| 10282 | return "lxebr"; |
| 10283 | } |
| 10284 | |
| 10285 | static HChar * |
| 10286 | s390_irgen_LXDB(UChar r1, IRTemp op2addr) |
| 10287 | { |
| 10288 | IRTemp op = newTemp(Ity_F64); |
| 10289 | |
| 10290 | assign(op, load(Ity_F64, mkexpr(op2addr))); |
| 10291 | put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op))); |
| 10292 | |
| 10293 | return "lxdb"; |
| 10294 | } |
| 10295 | |
| 10296 | static HChar * |
| 10297 | s390_irgen_LXEB(UChar r1, IRTemp op2addr) |
| 10298 | { |
| 10299 | IRTemp op = newTemp(Ity_F32); |
| 10300 | |
| 10301 | assign(op, load(Ity_F32, mkexpr(op2addr))); |
| 10302 | put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op))); |
| 10303 | |
| 10304 | return "lxeb"; |
| 10305 | } |
| 10306 | |
| 10307 | static HChar * |
| 10308 | s390_irgen_LNEBR(UChar r1, UChar r2) |
| 10309 | { |
| 10310 | IRTemp result = newTemp(Ity_F32); |
| 10311 | |
| 10312 | assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2)))); |
| 10313 | put_fpr_w0(r1, mkexpr(result)); |
| 10314 | s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result); |
| 10315 | |
| 10316 | return "lnebr"; |
| 10317 | } |
| 10318 | |
| 10319 | static HChar * |
| 10320 | s390_irgen_LNDBR(UChar r1, UChar r2) |
| 10321 | { |
| 10322 | IRTemp result = newTemp(Ity_F64); |
| 10323 | |
| 10324 | assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2)))); |
| 10325 | put_fpr_dw0(r1, mkexpr(result)); |
| 10326 | s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result); |
| 10327 | |
| 10328 | return "lndbr"; |
| 10329 | } |
| 10330 | |
| 10331 | static HChar * |
| 10332 | s390_irgen_LNXBR(UChar r1, UChar r2) |
| 10333 | { |
| 10334 | IRTemp result = newTemp(Ity_F128); |
| 10335 | |
| 10336 | assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2)))); |
| 10337 | put_fpr_pair(r1, mkexpr(result)); |
| 10338 | s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); |
| 10339 | |
| 10340 | return "lnxbr"; |
| 10341 | } |
| 10342 | |
| 10343 | static HChar * |
| 10344 | s390_irgen_LPEBR(UChar r1, UChar r2) |
| 10345 | { |
| 10346 | IRTemp result = newTemp(Ity_F32); |
| 10347 | |
| 10348 | assign(result, unop(Iop_AbsF32, get_fpr_w0(r2))); |
| 10349 | put_fpr_w0(r1, mkexpr(result)); |
| 10350 | s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result); |
| 10351 | |
| 10352 | return "lpebr"; |
| 10353 | } |
| 10354 | |
| 10355 | static HChar * |
| 10356 | s390_irgen_LPDBR(UChar r1, UChar r2) |
| 10357 | { |
| 10358 | IRTemp result = newTemp(Ity_F64); |
| 10359 | |
| 10360 | assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2))); |
| 10361 | put_fpr_dw0(r1, mkexpr(result)); |
| 10362 | s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result); |
| 10363 | |
| 10364 | return "lpdbr"; |
| 10365 | } |
| 10366 | |
| 10367 | static HChar * |
| 10368 | s390_irgen_LPXBR(UChar r1, UChar r2) |
| 10369 | { |
| 10370 | IRTemp result = newTemp(Ity_F128); |
| 10371 | |
| 10372 | assign(result, unop(Iop_AbsF128, get_fpr_pair(r2))); |
| 10373 | put_fpr_pair(r1, mkexpr(result)); |
| 10374 | s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); |
| 10375 | |
| 10376 | return "lpxbr"; |
| 10377 | } |
| 10378 | |
| 10379 | static HChar * |
| 10380 | s390_irgen_LDXBR(UChar r1, UChar r2) |
| 10381 | { |
| 10382 | IRTemp result = newTemp(Ity_F64); |
| 10383 | |
| 10384 | assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2))); |
| 10385 | put_fpr_dw0(r1, mkexpr(result)); |
| 10386 | |
| 10387 | return "ldxbr"; |
| 10388 | } |
| 10389 | |
| 10390 | static HChar * |
| 10391 | s390_irgen_LEXBR(UChar r1, UChar r2) |
| 10392 | { |
| 10393 | IRTemp result = newTemp(Ity_F32); |
| 10394 | |
| 10395 | assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2))); |
| 10396 | put_fpr_w0(r1, mkexpr(result)); |
| 10397 | |
| 10398 | return "lexbr"; |
| 10399 | } |
| 10400 | |
| 10401 | static HChar * |
| 10402 | s390_irgen_MXBR(UChar r1, UChar r2) |
| 10403 | { |
| 10404 | IRTemp op1 = newTemp(Ity_F128); |
| 10405 | IRTemp op2 = newTemp(Ity_F128); |
| 10406 | IRTemp result = newTemp(Ity_F128); |
| 10407 | |
| 10408 | assign(op1, get_fpr_pair(r1)); |
| 10409 | assign(op2, get_fpr_pair(r2)); |
| 10410 | assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 10411 | mkexpr(op2))); |
| 10412 | put_fpr_pair(r1, mkexpr(result)); |
| 10413 | |
| 10414 | return "mxbr"; |
| 10415 | } |
| 10416 | |
| 10417 | static HChar * |
| 10418 | s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2) |
| 10419 | { |
| 10420 | put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST), |
| 10421 | get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3))); |
| 10422 | |
| 10423 | return "maebr"; |
| 10424 | } |
| 10425 | |
| 10426 | static HChar * |
| 10427 | s390_irgen_MADBR(UChar r1, UChar r3, UChar r2) |
| 10428 | { |
| 10429 | put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST), |
| 10430 | get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3))); |
| 10431 | |
| 10432 | return "madbr"; |
| 10433 | } |
| 10434 | |
| 10435 | static HChar * |
| 10436 | s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1) |
| 10437 | { |
| 10438 | IRExpr *op2 = load(Ity_F32, mkexpr(op2addr)); |
| 10439 | |
| 10440 | put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST), |
| 10441 | get_fpr_w0(r1), op2, get_fpr_w0(r3))); |
| 10442 | |
| 10443 | return "maeb"; |
| 10444 | } |
| 10445 | |
| 10446 | static HChar * |
| 10447 | s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1) |
| 10448 | { |
| 10449 | IRExpr *op2 = load(Ity_F64, mkexpr(op2addr)); |
| 10450 | |
| 10451 | put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST), |
| 10452 | get_fpr_dw0(r1), op2, get_fpr_dw0(r3))); |
| 10453 | |
| 10454 | return "madb"; |
| 10455 | } |
| 10456 | |
| 10457 | static HChar * |
| 10458 | s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2) |
| 10459 | { |
| 10460 | put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST), |
| 10461 | get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3))); |
| 10462 | |
| 10463 | return "msebr"; |
| 10464 | } |
| 10465 | |
| 10466 | static HChar * |
| 10467 | s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2) |
| 10468 | { |
| 10469 | put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST), |
| 10470 | get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3))); |
| 10471 | |
| 10472 | return "msdbr"; |
| 10473 | } |
| 10474 | |
| 10475 | static HChar * |
| 10476 | s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1) |
| 10477 | { |
| 10478 | IRExpr *op2 = load(Ity_F32, mkexpr(op2addr)); |
| 10479 | |
| 10480 | put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST), |
| 10481 | get_fpr_w0(r1), op2, get_fpr_w0(r3))); |
| 10482 | |
| 10483 | return "mseb"; |
| 10484 | } |
| 10485 | |
| 10486 | static HChar * |
| 10487 | s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1) |
| 10488 | { |
| 10489 | IRExpr *op2 = load(Ity_F64, mkexpr(op2addr)); |
| 10490 | |
| 10491 | put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST), |
| 10492 | get_fpr_dw0(r1), op2, get_fpr_dw0(r3))); |
| 10493 | |
| 10494 | return "msdb"; |
| 10495 | } |
| 10496 | |
| 10497 | static HChar * |
| 10498 | s390_irgen_SQEBR(UChar r1, UChar r2) |
| 10499 | { |
| 10500 | IRTemp result = newTemp(Ity_F32); |
| 10501 | |
| 10502 | assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2))); |
| 10503 | put_fpr_w0(r1, mkexpr(result)); |
| 10504 | |
| 10505 | return "sqebr"; |
| 10506 | } |
| 10507 | |
| 10508 | static HChar * |
| 10509 | s390_irgen_SQDBR(UChar r1, UChar r2) |
| 10510 | { |
| 10511 | IRTemp result = newTemp(Ity_F64); |
| 10512 | |
| 10513 | assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2))); |
| 10514 | put_fpr_dw0(r1, mkexpr(result)); |
| 10515 | |
| 10516 | return "sqdbr"; |
| 10517 | } |
| 10518 | |
| 10519 | static HChar * |
| 10520 | s390_irgen_SQXBR(UChar r1, UChar r2) |
| 10521 | { |
| 10522 | IRTemp result = newTemp(Ity_F128); |
| 10523 | |
| 10524 | assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2))); |
| 10525 | put_fpr_pair(r1, mkexpr(result)); |
| 10526 | |
| 10527 | return "sqxbr"; |
| 10528 | } |
| 10529 | |
| 10530 | static HChar * |
| 10531 | s390_irgen_SQEB(UChar r1, IRTemp op2addr) |
| 10532 | { |
| 10533 | IRTemp op = newTemp(Ity_F32); |
| 10534 | |
| 10535 | assign(op, load(Ity_F32, mkexpr(op2addr))); |
| 10536 | put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op))); |
| 10537 | |
| 10538 | return "sqeb"; |
| 10539 | } |
| 10540 | |
| 10541 | static HChar * |
| 10542 | s390_irgen_SQDB(UChar r1, IRTemp op2addr) |
| 10543 | { |
| 10544 | IRTemp op = newTemp(Ity_F64); |
| 10545 | |
| 10546 | assign(op, load(Ity_F64, mkexpr(op2addr))); |
| 10547 | put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op))); |
| 10548 | |
| 10549 | return "sqdb"; |
| 10550 | } |
| 10551 | |
| 10552 | static HChar * |
| 10553 | s390_irgen_SXBR(UChar r1, UChar r2) |
| 10554 | { |
| 10555 | IRTemp op1 = newTemp(Ity_F128); |
| 10556 | IRTemp op2 = newTemp(Ity_F128); |
| 10557 | IRTemp result = newTemp(Ity_F128); |
| 10558 | |
| 10559 | assign(op1, get_fpr_pair(r1)); |
| 10560 | assign(op2, get_fpr_pair(r2)); |
| 10561 | assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1), |
| 10562 | mkexpr(op2))); |
| 10563 | put_fpr_pair(r1, mkexpr(result)); |
| 10564 | s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); |
| 10565 | |
| 10566 | return "sxbr"; |
| 10567 | } |
| 10568 | |
| 10569 | static HChar * |
| 10570 | s390_irgen_TCEB(UChar r1, IRTemp op2addr) |
| 10571 | { |
| 10572 | IRTemp value = newTemp(Ity_F32); |
| 10573 | |
| 10574 | assign(value, get_fpr_w0(r1)); |
| 10575 | |
| 10576 | s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr); |
| 10577 | |
| 10578 | return "tceb"; |
| 10579 | } |
| 10580 | |
| 10581 | static HChar * |
| 10582 | s390_irgen_TCDB(UChar r1, IRTemp op2addr) |
| 10583 | { |
| 10584 | IRTemp value = newTemp(Ity_F64); |
| 10585 | |
| 10586 | assign(value, get_fpr_dw0(r1)); |
| 10587 | |
| 10588 | s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr); |
| 10589 | |
| 10590 | return "tcdb"; |
| 10591 | } |
| 10592 | |
| 10593 | static HChar * |
| 10594 | s390_irgen_TCXB(UChar r1, IRTemp op2addr) |
| 10595 | { |
| 10596 | IRTemp value = newTemp(Ity_F128); |
| 10597 | |
| 10598 | assign(value, get_fpr_pair(r1)); |
| 10599 | |
| 10600 | s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr); |
| 10601 | |
| 10602 | return "tcxb"; |
| 10603 | } |
| 10604 | |
| 10605 | static HChar * |
| 10606 | s390_irgen_LCDFR(UChar r1, UChar r2) |
| 10607 | { |
| 10608 | IRTemp result = newTemp(Ity_F64); |
| 10609 | |
| 10610 | assign(result, unop(Iop_NegF64, get_fpr_dw0(r2))); |
| 10611 | put_fpr_dw0(r1, mkexpr(result)); |
| 10612 | |
| 10613 | return "lcdfr"; |
| 10614 | } |
| 10615 | |
| 10616 | static HChar * |
| 10617 | s390_irgen_LNDFR(UChar r1, UChar r2) |
| 10618 | { |
| 10619 | IRTemp result = newTemp(Ity_F64); |
| 10620 | |
| 10621 | assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2)))); |
| 10622 | put_fpr_dw0(r1, mkexpr(result)); |
| 10623 | |
| 10624 | return "lndfr"; |
| 10625 | } |
| 10626 | |
| 10627 | static HChar * |
| 10628 | s390_irgen_LPDFR(UChar r1, UChar r2) |
| 10629 | { |
| 10630 | IRTemp result = newTemp(Ity_F64); |
| 10631 | |
| 10632 | assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2))); |
| 10633 | put_fpr_dw0(r1, mkexpr(result)); |
| 10634 | |
| 10635 | return "lpdfr"; |
| 10636 | } |
| 10637 | |
| 10638 | static HChar * |
| 10639 | s390_irgen_LDGR(UChar r1, UChar r2) |
| 10640 | { |
| 10641 | put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2))); |
| 10642 | |
| 10643 | return "ldgr"; |
| 10644 | } |
| 10645 | |
| 10646 | static HChar * |
| 10647 | s390_irgen_LGDR(UChar r1, UChar r2) |
| 10648 | { |
| 10649 | put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2))); |
| 10650 | |
| 10651 | return "lgdr"; |
| 10652 | } |
| 10653 | |
| 10654 | |
| 10655 | static HChar * |
| 10656 | s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2) |
| 10657 | { |
| 10658 | IRTemp sign = newTemp(Ity_I64); |
| 10659 | IRTemp value = newTemp(Ity_I64); |
| 10660 | |
| 10661 | assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)), |
| 10662 | mkU64(1ULL << 63))); |
| 10663 | assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)), |
| 10664 | mkU64((1ULL << 63) - 1))); |
| 10665 | put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value), |
| 10666 | mkexpr(sign)))); |
| 10667 | |
| 10668 | return "cpsdr"; |
| 10669 | } |
| 10670 | |
| 10671 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 10672 | static IRExpr * |
| 10673 | s390_call_cvb(IRExpr *in) |
| 10674 | { |
| 10675 | IRExpr **args, *call; |
| 10676 | |
| 10677 | args = mkIRExprVec_1(in); |
| 10678 | call = mkIRExprCCall(Ity_I32, 0 /*regparm*/, |
| 10679 | "s390_do_cvb", &s390_do_cvb, args); |
| 10680 | |
| 10681 | /* Nothing is excluded from definedness checking. */ |
| 10682 | call->Iex.CCall.cee->mcx_mask = 0; |
| 10683 | |
| 10684 | return call; |
| 10685 | } |
| 10686 | |
| 10687 | static HChar * |
| 10688 | s390_irgen_CVB(UChar r1, IRTemp op2addr) |
| 10689 | { |
| 10690 | put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr)))); |
| 10691 | |
| 10692 | return "cvb"; |
| 10693 | } |
| 10694 | |
| 10695 | static HChar * |
| 10696 | s390_irgen_CVBY(UChar r1, IRTemp op2addr) |
| 10697 | { |
| 10698 | put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr)))); |
| 10699 | |
| 10700 | return "cvby"; |
| 10701 | } |
| 10702 | |
| 10703 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 10704 | static IRExpr * |
| 10705 | s390_call_cvd(IRExpr *in) |
| 10706 | { |
| 10707 | IRExpr **args, *call; |
| 10708 | |
| 10709 | args = mkIRExprVec_1(in); |
| 10710 | call = mkIRExprCCall(Ity_I64, 0 /*regparm*/, |
| 10711 | "s390_do_cvd", &s390_do_cvd, args); |
| 10712 | |
| 10713 | /* Nothing is excluded from definedness checking. */ |
| 10714 | call->Iex.CCall.cee->mcx_mask = 0; |
| 10715 | |
| 10716 | return call; |
| 10717 | } |
| 10718 | |
| 10719 | static HChar * |
| 10720 | s390_irgen_CVD(UChar r1, IRTemp op2addr) |
| 10721 | { |
| 10722 | store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1))); |
| 10723 | |
| 10724 | return "cvd"; |
| 10725 | } |
| 10726 | |
| 10727 | static HChar * |
| 10728 | s390_irgen_CVDY(UChar r1, IRTemp op2addr) |
| 10729 | { |
| 10730 | store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1))); |
| 10731 | |
| 10732 | return "cvdy"; |
| 10733 | } |
| 10734 | |
| 10735 | static HChar * |
| 10736 | s390_irgen_FLOGR(UChar r1, UChar r2) |
| 10737 | { |
| 10738 | IRTemp input = newTemp(Ity_I64); |
| 10739 | IRTemp not_zero = newTemp(Ity_I64); |
| 10740 | IRTemp tmpnum = newTemp(Ity_I64); |
| 10741 | IRTemp num = newTemp(Ity_I64); |
| 10742 | IRTemp shift_amount = newTemp(Ity_I8); |
| 10743 | |
| 10744 | /* We use the "count leading zeroes" operator because the number of |
| 10745 | leading zeroes is identical with the bit position of the first '1' bit. |
| 10746 | However, that operator does not work when the input value is zero. |
| 10747 | Therefore, we set the LSB of the input value to 1 and use Clz64 on |
| 10748 | the modified value. If input == 0, then the result is 64. Otherwise, |
| 10749 | the result of Clz64 is what we want. */ |
| 10750 | |
| 10751 | assign(input, get_gpr_dw0(r2)); |
| 10752 | assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1))); |
| 10753 | assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero))); |
| 10754 | |
| 10755 | /* num = (input == 0) ? 64 : tmpnum */ |
| 10756 | assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)), |
| 10757 | /* == 0 */ mkU64(64), |
| 10758 | /* != 0 */ mkexpr(tmpnum))); |
| 10759 | |
| 10760 | put_gpr_dw0(r1, mkexpr(num)); |
| 10761 | |
| 10762 | /* Set the leftmost '1' bit of the input value to zero. The general scheme |
| 10763 | is to first shift the input value by NUM + 1 bits to the left which |
| 10764 | causes the leftmost '1' bit to disappear. Then we shift logically to |
| 10765 | the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and |
| 10766 | Iop_Shr64 are undefined if the shift-amount is greater than or equal to |
| 10767 | the width of the value-to-be-shifted, we need to special case |
| 10768 | NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1. |
| 10769 | For both such INPUT values the result will be 0. */ |
| 10770 | |
| 10771 | assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num), |
| 10772 | mkU64(1)))); |
| 10773 | |
| 10774 | put_gpr_dw0(r1 + 1, |
florian | 6ad4952 | 2011-09-09 02:38:55 +0000 | [diff] [blame] | 10775 | mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)), |
| 10776 | /* == 0 || == 1*/ mkU64(0), |
| 10777 | /* otherwise */ |
| 10778 | binop(Iop_Shr64, |
| 10779 | binop(Iop_Shl64, mkexpr(input), |
| 10780 | mkexpr(shift_amount)), |
| 10781 | mkexpr(shift_amount)))); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 10782 | |
| 10783 | /* Compare the original value as an unsigned integer with 0. */ |
| 10784 | s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input, |
| 10785 | mktemp(Ity_I64, mkU64(0)), False); |
| 10786 | |
| 10787 | return "flogr"; |
| 10788 | } |
| 10789 | |
sewardj | 1e5fea6 | 2011-05-17 16:18:36 +0000 | [diff] [blame] | 10790 | static HChar * |
| 10791 | s390_irgen_STCK(IRTemp op2addr) |
| 10792 | { |
| 10793 | IRDirty *d; |
| 10794 | IRTemp cc = newTemp(Ity_I64); |
| 10795 | |
| 10796 | d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK", |
| 10797 | &s390x_dirtyhelper_STCK, |
| 10798 | mkIRExprVec_1(mkexpr(op2addr))); |
| 10799 | d->mFx = Ifx_Write; |
| 10800 | d->mAddr = mkexpr(op2addr); |
| 10801 | d->mSize = 8; |
| 10802 | stmt(IRStmt_Dirty(d)); |
| 10803 | s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), |
| 10804 | mkexpr(cc), mkU64(0), mkU64(0)); |
| 10805 | return "stck"; |
| 10806 | } |
| 10807 | |
| 10808 | static HChar * |
| 10809 | s390_irgen_STCKF(IRTemp op2addr) |
| 10810 | { |
| 10811 | IRDirty *d; |
| 10812 | IRTemp cc = newTemp(Ity_I64); |
| 10813 | |
| 10814 | d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF", |
| 10815 | &s390x_dirtyhelper_STCKF, |
| 10816 | mkIRExprVec_1(mkexpr(op2addr))); |
| 10817 | d->mFx = Ifx_Write; |
| 10818 | d->mAddr = mkexpr(op2addr); |
| 10819 | d->mSize = 8; |
| 10820 | stmt(IRStmt_Dirty(d)); |
| 10821 | s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), |
| 10822 | mkexpr(cc), mkU64(0), mkU64(0)); |
| 10823 | return "stckf"; |
| 10824 | } |
| 10825 | |
| 10826 | static HChar * |
| 10827 | s390_irgen_STCKE(IRTemp op2addr) |
| 10828 | { |
| 10829 | IRDirty *d; |
| 10830 | IRTemp cc = newTemp(Ity_I64); |
| 10831 | |
| 10832 | d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE", |
| 10833 | &s390x_dirtyhelper_STCKE, |
| 10834 | mkIRExprVec_1(mkexpr(op2addr))); |
| 10835 | d->mFx = Ifx_Write; |
| 10836 | d->mAddr = mkexpr(op2addr); |
| 10837 | d->mSize = 16; |
| 10838 | stmt(IRStmt_Dirty(d)); |
| 10839 | s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), |
| 10840 | mkexpr(cc), mkU64(0), mkU64(0)); |
| 10841 | return "stcke"; |
| 10842 | } |
| 10843 | |
florian | 933065d | 2011-07-11 01:48:02 +0000 | [diff] [blame] | 10844 | static HChar * |
| 10845 | s390_irgen_STFLE(IRTemp op2addr) |
| 10846 | { |
| 10847 | IRDirty *d; |
| 10848 | IRTemp cc = newTemp(Ity_I64); |
| 10849 | |
| 10850 | d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE", |
| 10851 | &s390x_dirtyhelper_STFLE, |
| 10852 | mkIRExprVec_1(mkexpr(op2addr))); |
| 10853 | |
| 10854 | d->needsBBP = 1; /* Need to pass pointer to guest state to helper */ |
| 10855 | |
sewardj | c9069f2 | 2012-06-01 16:09:50 +0000 | [diff] [blame] | 10856 | d->nFxState = 1; |
| 10857 | vex_bzero(&d->fxState, sizeof(d->fxState)); |
| 10858 | |
florian | 933065d | 2011-07-11 01:48:02 +0000 | [diff] [blame] | 10859 | d->fxState[0].fx = Ifx_Modify; /* read then write */ |
| 10860 | d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0); |
| 10861 | d->fxState[0].size = sizeof(ULong); |
florian | 933065d | 2011-07-11 01:48:02 +0000 | [diff] [blame] | 10862 | |
| 10863 | d->mAddr = mkexpr(op2addr); |
| 10864 | /* Pretend all double words are written */ |
| 10865 | d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong); |
| 10866 | d->mFx = Ifx_Write; |
| 10867 | |
| 10868 | stmt(IRStmt_Dirty(d)); |
| 10869 | |
| 10870 | s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0)); |
| 10871 | |
| 10872 | return "stfle"; |
| 10873 | } |
| 10874 | |
florian | a4384a3 | 2011-08-11 16:58:45 +0000 | [diff] [blame] | 10875 | static HChar * |
| 10876 | s390_irgen_CKSM(UChar r1,UChar r2) |
| 10877 | { |
| 10878 | IRTemp addr = newTemp(Ity_I64); |
| 10879 | IRTemp op = newTemp(Ity_I32); |
| 10880 | IRTemp len = newTemp(Ity_I64); |
| 10881 | IRTemp oldval = newTemp(Ity_I32); |
| 10882 | IRTemp mask = newTemp(Ity_I32); |
| 10883 | IRTemp newop = newTemp(Ity_I32); |
| 10884 | IRTemp result = newTemp(Ity_I32); |
| 10885 | IRTemp result1 = newTemp(Ity_I32); |
| 10886 | IRTemp inc = newTemp(Ity_I64); |
| 10887 | |
| 10888 | assign(oldval, get_gpr_w1(r1)); |
| 10889 | assign(addr, get_gpr_dw0(r2)); |
| 10890 | assign(len, get_gpr_dw0(r2+1)); |
| 10891 | |
| 10892 | /* Condition code is always zero. */ |
| 10893 | s390_cc_set(0); |
| 10894 | |
| 10895 | /* If length is zero, there is no need to calculate the checksum */ |
| 10896 | if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)), |
| 10897 | guest_IA_next_instr); |
| 10898 | |
| 10899 | /* Assiging the increment variable to adjust address and length |
| 10900 | later on. */ |
| 10901 | assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)), |
| 10902 | mkexpr(len), mkU64(4))); |
| 10903 | |
| 10904 | /* If length < 4 the final 4-byte 2nd operand value is computed by |
| 10905 | appending the remaining bytes to the right with 0. This is done |
| 10906 | by AND'ing the 4 bytes loaded from memory with an appropriate |
| 10907 | mask. If length >= 4, that mask is simply 0xffffffff. */ |
| 10908 | |
| 10909 | assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)), |
| 10910 | /* Mask computation when len < 4: |
| 10911 | 0xffffffff << (32 - (len % 4)*8) */ |
| 10912 | binop(Iop_Shl32, mkU32(0xffffffff), |
| 10913 | unop(Iop_32to8, |
| 10914 | binop(Iop_Sub32, mkU32(32), |
| 10915 | binop(Iop_Shl32, |
| 10916 | unop(Iop_64to32, |
| 10917 | binop(Iop_And64, |
| 10918 | mkexpr(len), mkU64(3))), |
| 10919 | mkU8(3))))), |
| 10920 | mkU32(0xffffffff))); |
| 10921 | |
| 10922 | assign(op, load(Ity_I32, mkexpr(addr))); |
| 10923 | assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask))); |
| 10924 | assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval))); |
| 10925 | |
| 10926 | /* Checking for carry */ |
| 10927 | assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)), |
| 10928 | binop(Iop_Add32, mkexpr(result), mkU32(1)), |
| 10929 | mkexpr(result))); |
| 10930 | |
| 10931 | put_gpr_w1(r1, mkexpr(result1)); |
| 10932 | put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc))); |
| 10933 | put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc))); |
| 10934 | |
| 10935 | if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)), |
| 10936 | guest_IA_curr_instr); |
| 10937 | |
| 10938 | return "cksm"; |
| 10939 | } |
| 10940 | |
florian | 9af3769 | 2012-01-15 21:01:16 +0000 | [diff] [blame] | 10941 | static HChar * |
| 10942 | s390_irgen_TROO(UChar m3, UChar r1, UChar r2) |
| 10943 | { |
| 10944 | IRTemp src_addr, des_addr, tab_addr, src_len, test_byte; |
| 10945 | src_addr = newTemp(Ity_I64); |
| 10946 | des_addr = newTemp(Ity_I64); |
| 10947 | tab_addr = newTemp(Ity_I64); |
| 10948 | test_byte = newTemp(Ity_I8); |
| 10949 | src_len = newTemp(Ity_I64); |
| 10950 | |
| 10951 | assign(src_addr, get_gpr_dw0(r2)); |
| 10952 | assign(des_addr, get_gpr_dw0(r1)); |
| 10953 | assign(tab_addr, get_gpr_dw0(1)); |
florian | 5351853 | 2012-01-18 14:00:31 +0000 | [diff] [blame] | 10954 | assign(src_len, get_gpr_dw0(r1+1)); |
florian | 9af3769 | 2012-01-15 21:01:16 +0000 | [diff] [blame] | 10955 | assign(test_byte, get_gpr_b7(0)); |
| 10956 | |
| 10957 | IRTemp op = newTemp(Ity_I8); |
| 10958 | IRTemp op1 = newTemp(Ity_I8); |
| 10959 | IRTemp result = newTemp(Ity_I64); |
| 10960 | |
| 10961 | /* End of source string? We're done; proceed to next insn */ |
| 10962 | s390_cc_set(0); |
| 10963 | if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)), |
| 10964 | guest_IA_next_instr); |
| 10965 | |
| 10966 | /* Load character from source string, index translation table and |
| 10967 | store translated character in op1. */ |
| 10968 | assign(op, load(Ity_I8, mkexpr(src_addr))); |
| 10969 | |
| 10970 | assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)), |
| 10971 | mkexpr(tab_addr))); |
| 10972 | assign(op1, load(Ity_I8, mkexpr(result))); |
| 10973 | |
| 10974 | if (! s390_host_has_etf2 || (m3 & 0x1) == 0) { |
| 10975 | s390_cc_set(1); |
| 10976 | if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)), |
| 10977 | guest_IA_next_instr); |
| 10978 | } |
| 10979 | store(get_gpr_dw0(r1), mkexpr(op1)); |
| 10980 | |
| 10981 | put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1))); |
| 10982 | put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1))); |
| 10983 | put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1))); |
| 10984 | |
| 10985 | always_goto_and_chase(guest_IA_curr_instr); |
| 10986 | |
| 10987 | return "troo"; |
| 10988 | } |
| 10989 | |
florian | 730448f | 2012-02-04 17:07:07 +0000 | [diff] [blame] | 10990 | static HChar * |
| 10991 | s390_irgen_TRTO(UChar m3, UChar r1, UChar r2) |
| 10992 | { |
| 10993 | IRTemp src_addr, des_addr, tab_addr, src_len, test_byte; |
| 10994 | src_addr = newTemp(Ity_I64); |
| 10995 | des_addr = newTemp(Ity_I64); |
| 10996 | tab_addr = newTemp(Ity_I64); |
| 10997 | test_byte = newTemp(Ity_I8); |
| 10998 | src_len = newTemp(Ity_I64); |
| 10999 | |
| 11000 | assign(src_addr, get_gpr_dw0(r2)); |
| 11001 | assign(des_addr, get_gpr_dw0(r1)); |
| 11002 | assign(tab_addr, get_gpr_dw0(1)); |
| 11003 | assign(src_len, get_gpr_dw0(r1+1)); |
| 11004 | assign(test_byte, get_gpr_b7(0)); |
| 11005 | |
| 11006 | IRTemp op = newTemp(Ity_I16); |
| 11007 | IRTemp op1 = newTemp(Ity_I8); |
| 11008 | IRTemp result = newTemp(Ity_I64); |
| 11009 | |
| 11010 | /* End of source string? We're done; proceed to next insn */ |
| 11011 | s390_cc_set(0); |
| 11012 | if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)), |
| 11013 | guest_IA_next_instr); |
| 11014 | |
| 11015 | /* Load character from source string, index translation table and |
| 11016 | store translated character in op1. */ |
| 11017 | assign(op, load(Ity_I16, mkexpr(src_addr))); |
| 11018 | |
| 11019 | assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)), |
| 11020 | mkexpr(tab_addr))); |
| 11021 | |
| 11022 | assign(op1, load(Ity_I8, mkexpr(result))); |
| 11023 | |
| 11024 | if (! s390_host_has_etf2 || (m3 & 0x1) == 0) { |
| 11025 | s390_cc_set(1); |
| 11026 | if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)), |
| 11027 | guest_IA_next_instr); |
| 11028 | } |
| 11029 | store(get_gpr_dw0(r1), mkexpr(op1)); |
| 11030 | |
| 11031 | put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2))); |
| 11032 | put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1))); |
| 11033 | put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2))); |
| 11034 | |
| 11035 | always_goto_and_chase(guest_IA_curr_instr); |
| 11036 | |
| 11037 | return "trto"; |
| 11038 | } |
| 11039 | |
| 11040 | static HChar * |
| 11041 | s390_irgen_TROT(UChar m3, UChar r1, UChar r2) |
| 11042 | { |
| 11043 | IRTemp src_addr, des_addr, tab_addr, src_len, test_byte; |
| 11044 | src_addr = newTemp(Ity_I64); |
| 11045 | des_addr = newTemp(Ity_I64); |
| 11046 | tab_addr = newTemp(Ity_I64); |
| 11047 | test_byte = newTemp(Ity_I16); |
| 11048 | src_len = newTemp(Ity_I64); |
| 11049 | |
| 11050 | assign(src_addr, get_gpr_dw0(r2)); |
| 11051 | assign(des_addr, get_gpr_dw0(r1)); |
| 11052 | assign(tab_addr, get_gpr_dw0(1)); |
| 11053 | assign(src_len, get_gpr_dw0(r1+1)); |
| 11054 | assign(test_byte, get_gpr_hw3(0)); |
| 11055 | |
| 11056 | IRTemp op = newTemp(Ity_I8); |
| 11057 | IRTemp op1 = newTemp(Ity_I16); |
| 11058 | IRTemp result = newTemp(Ity_I64); |
| 11059 | |
| 11060 | /* End of source string? We're done; proceed to next insn */ |
| 11061 | s390_cc_set(0); |
| 11062 | if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)), |
| 11063 | guest_IA_next_instr); |
| 11064 | |
| 11065 | /* Load character from source string, index translation table and |
| 11066 | store translated character in op1. */ |
| 11067 | assign(op, binop(Iop_Shl8, load(Ity_I8, mkexpr(src_addr)), mkU8(1))); |
| 11068 | |
| 11069 | assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)), |
| 11070 | mkexpr(tab_addr))); |
| 11071 | assign(op1, load(Ity_I16, mkexpr(result))); |
| 11072 | |
| 11073 | if (! s390_host_has_etf2 || (m3 & 0x1) == 0) { |
| 11074 | s390_cc_set(1); |
| 11075 | if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)), |
| 11076 | guest_IA_next_instr); |
| 11077 | } |
| 11078 | store(get_gpr_dw0(r1), mkexpr(op1)); |
| 11079 | |
| 11080 | put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1))); |
| 11081 | put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2))); |
| 11082 | put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1))); |
| 11083 | |
| 11084 | always_goto_and_chase(guest_IA_curr_instr); |
| 11085 | |
| 11086 | return "trot"; |
| 11087 | } |
| 11088 | |
| 11089 | static HChar * |
| 11090 | s390_irgen_TRTT(UChar m3, UChar r1, UChar r2) |
| 11091 | { |
| 11092 | IRTemp src_addr, des_addr, tab_addr, src_len, test_byte; |
| 11093 | src_addr = newTemp(Ity_I64); |
| 11094 | des_addr = newTemp(Ity_I64); |
| 11095 | tab_addr = newTemp(Ity_I64); |
| 11096 | test_byte = newTemp(Ity_I16); |
| 11097 | src_len = newTemp(Ity_I64); |
| 11098 | |
| 11099 | assign(src_addr, get_gpr_dw0(r2)); |
| 11100 | assign(des_addr, get_gpr_dw0(r1)); |
| 11101 | assign(tab_addr, get_gpr_dw0(1)); |
| 11102 | assign(src_len, get_gpr_dw0(r1+1)); |
| 11103 | assign(test_byte, get_gpr_hw3(0)); |
| 11104 | |
| 11105 | IRTemp op = newTemp(Ity_I16); |
| 11106 | IRTemp op1 = newTemp(Ity_I16); |
| 11107 | IRTemp result = newTemp(Ity_I64); |
| 11108 | |
| 11109 | /* End of source string? We're done; proceed to next insn */ |
| 11110 | s390_cc_set(0); |
| 11111 | if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)), |
| 11112 | guest_IA_next_instr); |
| 11113 | |
| 11114 | /* Load character from source string, index translation table and |
| 11115 | store translated character in op1. */ |
| 11116 | assign(op, binop(Iop_Shl16, load(Ity_I16, mkexpr(src_addr)), mkU8(1))); |
| 11117 | |
| 11118 | assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)), |
| 11119 | mkexpr(tab_addr))); |
| 11120 | assign(op1, load(Ity_I16, mkexpr(result))); |
| 11121 | |
| 11122 | if (! s390_host_has_etf2 || (m3 & 0x1) == 0) { |
| 11123 | s390_cc_set(1); |
| 11124 | if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)), |
| 11125 | guest_IA_next_instr); |
| 11126 | } |
| 11127 | |
| 11128 | store(get_gpr_dw0(r1), mkexpr(op1)); |
| 11129 | |
| 11130 | put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2))); |
| 11131 | put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2))); |
| 11132 | put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2))); |
| 11133 | |
| 11134 | always_goto_and_chase(guest_IA_curr_instr); |
| 11135 | |
| 11136 | return "trtt"; |
| 11137 | } |
| 11138 | |
| 11139 | static HChar * |
| 11140 | s390_irgen_TR(UChar length, IRTemp start1, IRTemp start2) |
| 11141 | { |
florian | f87d4fb | 2012-05-05 02:55:24 +0000 | [diff] [blame] | 11142 | IRTemp len = newTemp(Ity_I64); |
florian | 730448f | 2012-02-04 17:07:07 +0000 | [diff] [blame] | 11143 | |
florian | f87d4fb | 2012-05-05 02:55:24 +0000 | [diff] [blame] | 11144 | assign(len, mkU64(length)); |
| 11145 | s390_irgen_TR_EX(len, start1, start2); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 11146 | dummy_put_IA(); |
florian | 730448f | 2012-02-04 17:07:07 +0000 | [diff] [blame] | 11147 | |
| 11148 | return "tr"; |
| 11149 | } |
| 11150 | |
| 11151 | static HChar * |
| 11152 | s390_irgen_TRE(UChar r1,UChar r2) |
| 11153 | { |
| 11154 | IRTemp src_addr, tab_addr, src_len, test_byte; |
| 11155 | src_addr = newTemp(Ity_I64); |
| 11156 | tab_addr = newTemp(Ity_I64); |
| 11157 | src_len = newTemp(Ity_I64); |
| 11158 | test_byte = newTemp(Ity_I8); |
| 11159 | |
| 11160 | assign(src_addr, get_gpr_dw0(r1)); |
| 11161 | assign(src_len, get_gpr_dw0(r1+1)); |
| 11162 | assign(tab_addr, get_gpr_dw0(r2)); |
| 11163 | assign(test_byte, get_gpr_b7(0)); |
| 11164 | |
| 11165 | IRTemp op = newTemp(Ity_I8); |
| 11166 | IRTemp op1 = newTemp(Ity_I8); |
| 11167 | IRTemp result = newTemp(Ity_I64); |
| 11168 | |
| 11169 | /* End of source string? We're done; proceed to next insn */ |
| 11170 | s390_cc_set(0); |
| 11171 | if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)), |
| 11172 | guest_IA_next_instr); |
| 11173 | |
| 11174 | /* Load character from source string and compare with test byte */ |
| 11175 | assign(op, load(Ity_I8, mkexpr(src_addr))); |
| 11176 | |
| 11177 | s390_cc_set(1); |
| 11178 | if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op), mkexpr(test_byte)), |
| 11179 | guest_IA_next_instr); |
| 11180 | |
| 11181 | assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)), |
| 11182 | mkexpr(tab_addr))); |
| 11183 | |
| 11184 | assign(op1, load(Ity_I8, mkexpr(result))); |
| 11185 | |
| 11186 | store(get_gpr_dw0(r1), mkexpr(op1)); |
| 11187 | put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(src_addr), mkU64(1))); |
| 11188 | put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1))); |
| 11189 | |
| 11190 | always_goto(mkU64(guest_IA_curr_instr)); |
| 11191 | |
| 11192 | return "tre"; |
| 11193 | } |
| 11194 | |
florian | a0100c9 | 2012-07-20 00:06:35 +0000 | [diff] [blame] | 11195 | static IRExpr * |
| 11196 | s390_call_cu21(IRExpr *srcval, IRExpr *low_surrogate) |
| 11197 | { |
| 11198 | IRExpr **args, *call; |
| 11199 | args = mkIRExprVec_2(srcval, low_surrogate); |
| 11200 | call = mkIRExprCCall(Ity_I64, 0 /*regparm*/, |
| 11201 | "s390_do_cu21", &s390_do_cu21, args); |
| 11202 | |
| 11203 | /* Nothing is excluded from definedness checking. */ |
| 11204 | call->Iex.CCall.cee->mcx_mask = 0; |
| 11205 | |
| 11206 | return call; |
| 11207 | } |
| 11208 | |
| 11209 | static HChar * |
| 11210 | s390_irgen_CU21(UChar m3, UChar r1, UChar r2) |
| 11211 | { |
| 11212 | IRTemp addr1 = newTemp(Ity_I64); |
| 11213 | IRTemp addr2 = newTemp(Ity_I64); |
| 11214 | IRTemp len1 = newTemp(Ity_I64); |
| 11215 | IRTemp len2 = newTemp(Ity_I64); |
| 11216 | |
| 11217 | assign(addr1, get_gpr_dw0(r1)); |
| 11218 | assign(addr2, get_gpr_dw0(r2)); |
| 11219 | assign(len1, get_gpr_dw0(r1 + 1)); |
| 11220 | assign(len2, get_gpr_dw0(r2 + 1)); |
| 11221 | |
| 11222 | /* We're processing the 2nd operand 2 bytes at a time. Therefore, if |
| 11223 | there are less than 2 bytes left, then the 2nd operand is exhausted |
| 11224 | and we're done here. cc = 0 */ |
| 11225 | s390_cc_set(0); |
| 11226 | if_condition_goto(binop(Iop_CmpLT64U, mkexpr(len2), mkU64(2)), |
| 11227 | guest_IA_next_instr); |
| 11228 | |
| 11229 | /* There are at least two bytes there. Read them. */ |
| 11230 | IRTemp srcval = newTemp(Ity_I32); |
| 11231 | assign(srcval, unop(Iop_16Uto32, load(Ity_I16, mkexpr(addr2)))); |
| 11232 | |
| 11233 | /* Find out whether this is a high surrogate. I.e. SRCVAL lies |
| 11234 | inside the interval [0xd800 - 0xdbff] */ |
| 11235 | IRTemp is_high_surrogate = newTemp(Ity_I32); |
| 11236 | IRExpr *flag1 = mkite(binop(Iop_CmpLE32U, mkU32(0xd800), mkexpr(srcval)), |
| 11237 | mkU32(1), mkU32(0)); |
| 11238 | IRExpr *flag2 = mkite(binop(Iop_CmpLE32U, mkexpr(srcval), mkU32(0xdbff)), |
| 11239 | mkU32(1), mkU32(0)); |
| 11240 | assign(is_high_surrogate, binop(Iop_And32, flag1, flag2)); |
| 11241 | |
| 11242 | /* If SRCVAL is a high surrogate and there are less than 4 bytes left, |
| 11243 | then the 2nd operand is exhausted and we're done here. cc = 0 */ |
| 11244 | IRExpr *not_enough_bytes = |
| 11245 | mkite(binop(Iop_CmpLT64U, mkexpr(len2), mkU64(4)), mkU32(1), mkU32(0)); |
| 11246 | |
| 11247 | if_condition_goto(binop(Iop_CmpEQ32, |
| 11248 | binop(Iop_And32, mkexpr(is_high_surrogate), |
| 11249 | not_enough_bytes), |
| 11250 | mkU32(1)), guest_IA_next_instr); |
| 11251 | |
| 11252 | /* The 2nd operand is not exhausted. If the first 2 bytes are a high |
| 11253 | surrogate, read the next two bytes (low surrogate). */ |
| 11254 | IRTemp low_surrogate = newTemp(Ity_I32); |
| 11255 | IRExpr *low_surrogate_addr = binop(Iop_Add64, mkexpr(addr2), mkU64(2)); |
| 11256 | |
| 11257 | assign(low_surrogate, |
| 11258 | mkite(binop(Iop_CmpEQ32, mkexpr(is_high_surrogate), mkU32(1)), |
| 11259 | unop(Iop_16Uto32, load(Ity_I16, low_surrogate_addr)), |
| 11260 | mkU32(0))); // any value is fine; it will not be used |
| 11261 | |
| 11262 | /* Call the helper */ |
| 11263 | IRTemp retval = newTemp(Ity_I64); |
| 11264 | assign(retval, s390_call_cu21(mkexpr(srcval), mkexpr(low_surrogate))); |
| 11265 | |
| 11266 | /* Before we can test whether the 1st operand is exhausted we need to |
| 11267 | test for an invalid low surrogate. Because cc=2 outranks cc=1. */ |
| 11268 | if (s390_host_has_etf3 && (m3 & 0x1) == 1) { |
| 11269 | IRExpr *invalid_low_surrogate = |
| 11270 | binop(Iop_And64, mkexpr(retval), mkU64(0xff)); |
| 11271 | |
| 11272 | s390_cc_set(2); |
| 11273 | if_condition_goto(binop(Iop_CmpEQ64, invalid_low_surrogate, mkU64(1)), |
| 11274 | guest_IA_next_instr); |
| 11275 | } |
| 11276 | |
| 11277 | /* Now test whether the 1st operand is exhausted */ |
| 11278 | IRTemp num_bytes = newTemp(Ity_I64); |
| 11279 | assign(num_bytes, binop(Iop_And64, |
| 11280 | binop(Iop_Shr64, mkexpr(retval), mkU8(8)), |
| 11281 | mkU64(0xff))); |
| 11282 | s390_cc_set(1); |
| 11283 | if_condition_goto(binop(Iop_CmpLT64U, mkexpr(len1), mkexpr(num_bytes)), |
| 11284 | guest_IA_next_instr); |
| 11285 | |
| 11286 | /* Extract the bytes to be stored at addr1 */ |
| 11287 | IRTemp data = newTemp(Ity_I64); |
| 11288 | assign(data, binop(Iop_Shr64, mkexpr(retval), mkU8(16))); |
| 11289 | |
| 11290 | /* To store the bytes construct 4 dirty helper calls. The helper calls |
| 11291 | are guarded (num_bytes == 1, num_bytes == 2, etc) such that only |
| 11292 | one of them will be called at runtime. */ |
| 11293 | int i; |
| 11294 | for (i = 1; i <= 4; ++i) { |
| 11295 | IRDirty *d; |
| 11296 | |
| 11297 | d = unsafeIRDirty_0_N(0 /* regparms */, "s390x_dirtyhelper_CUxy", |
| 11298 | &s390x_dirtyhelper_CUxy, |
| 11299 | mkIRExprVec_3(mkexpr(addr1), mkexpr(data), |
| 11300 | mkexpr(num_bytes))); |
| 11301 | d->guard = binop(Iop_CmpEQ64, mkexpr(num_bytes), mkU64(i)); |
| 11302 | d->mFx = Ifx_Write; |
| 11303 | d->mAddr = mkexpr(addr1); |
| 11304 | d->mSize = i; |
| 11305 | stmt(IRStmt_Dirty(d)); |
| 11306 | } |
| 11307 | |
| 11308 | /* Update source address and length */ |
| 11309 | IRTemp num_src_bytes = newTemp(Ity_I64); |
| 11310 | assign(num_src_bytes, |
| 11311 | mkite(binop(Iop_CmpEQ32, mkexpr(is_high_surrogate), mkU32(1)), |
| 11312 | mkU64(4), mkU64(2))); |
| 11313 | put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr2), mkexpr(num_src_bytes))); |
| 11314 | put_gpr_dw0(r2 + 1, binop(Iop_Sub64, mkexpr(len2), mkexpr(num_src_bytes))); |
| 11315 | |
| 11316 | /* Update destination address and length */ |
| 11317 | put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(num_bytes))); |
| 11318 | put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkexpr(num_bytes))); |
| 11319 | |
| 11320 | /* Iterate */ |
| 11321 | always_goto_and_chase(guest_IA_curr_instr); |
| 11322 | |
| 11323 | return "cu21"; |
| 11324 | } |
| 11325 | |
florian | 2a415a1 | 2012-07-21 17:41:36 +0000 | [diff] [blame] | 11326 | static IRExpr * |
| 11327 | s390_call_cu24(IRExpr *srcval, IRExpr *low_surrogate) |
| 11328 | { |
| 11329 | IRExpr **args, *call; |
| 11330 | args = mkIRExprVec_2(srcval, low_surrogate); |
| 11331 | call = mkIRExprCCall(Ity_I64, 0 /*regparm*/, |
| 11332 | "s390_do_cu24", &s390_do_cu24, args); |
| 11333 | |
| 11334 | /* Nothing is excluded from definedness checking. */ |
| 11335 | call->Iex.CCall.cee->mcx_mask = 0; |
| 11336 | |
| 11337 | return call; |
| 11338 | } |
| 11339 | |
| 11340 | static HChar * |
| 11341 | s390_irgen_CU24(UChar m3, UChar r1, UChar r2) |
| 11342 | { |
| 11343 | IRTemp addr1 = newTemp(Ity_I64); |
| 11344 | IRTemp addr2 = newTemp(Ity_I64); |
| 11345 | IRTemp len1 = newTemp(Ity_I64); |
| 11346 | IRTemp len2 = newTemp(Ity_I64); |
| 11347 | |
| 11348 | assign(addr1, get_gpr_dw0(r1)); |
| 11349 | assign(addr2, get_gpr_dw0(r2)); |
| 11350 | assign(len1, get_gpr_dw0(r1 + 1)); |
| 11351 | assign(len2, get_gpr_dw0(r2 + 1)); |
| 11352 | |
| 11353 | /* We're processing the 2nd operand 2 bytes at a time. Therefore, if |
| 11354 | there are less than 2 bytes left, then the 2nd operand is exhausted |
| 11355 | and we're done here. cc = 0 */ |
| 11356 | s390_cc_set(0); |
| 11357 | if_condition_goto(binop(Iop_CmpLT64U, mkexpr(len2), mkU64(2)), |
| 11358 | guest_IA_next_instr); |
| 11359 | |
| 11360 | /* There are at least two bytes there. Read them. */ |
| 11361 | IRTemp srcval = newTemp(Ity_I32); |
| 11362 | assign(srcval, unop(Iop_16Uto32, load(Ity_I16, mkexpr(addr2)))); |
| 11363 | |
| 11364 | /* Find out whether this is a high surrogate. I.e. SRCVAL lies |
| 11365 | inside the interval [0xd800 - 0xdbff] */ |
| 11366 | IRTemp is_high_surrogate = newTemp(Ity_I32); |
| 11367 | IRExpr *flag1 = mkite(binop(Iop_CmpLE32U, mkU32(0xd800), mkexpr(srcval)), |
| 11368 | mkU32(1), mkU32(0)); |
| 11369 | IRExpr *flag2 = mkite(binop(Iop_CmpLE32U, mkexpr(srcval), mkU32(0xdbff)), |
| 11370 | mkU32(1), mkU32(0)); |
| 11371 | assign(is_high_surrogate, binop(Iop_And32, flag1, flag2)); |
| 11372 | |
| 11373 | /* If SRCVAL is a high surrogate and there are less than 4 bytes left, |
| 11374 | then the 2nd operand is exhausted and we're done here. cc = 0 */ |
| 11375 | IRExpr *not_enough_bytes = |
| 11376 | mkite(binop(Iop_CmpLT64U, mkexpr(len2), mkU64(4)), mkU32(1), mkU32(0)); |
| 11377 | |
| 11378 | if_condition_goto(binop(Iop_CmpEQ32, |
| 11379 | binop(Iop_And32, mkexpr(is_high_surrogate), |
| 11380 | not_enough_bytes), |
| 11381 | mkU32(1)), guest_IA_next_instr); |
| 11382 | |
| 11383 | /* The 2nd operand is not exhausted. If the first 2 bytes are a high |
| 11384 | surrogate, read the next two bytes (low surrogate). */ |
| 11385 | IRTemp low_surrogate = newTemp(Ity_I32); |
| 11386 | IRExpr *low_surrogate_addr = binop(Iop_Add64, mkexpr(addr2), mkU64(2)); |
| 11387 | |
| 11388 | assign(low_surrogate, |
| 11389 | mkite(binop(Iop_CmpEQ32, mkexpr(is_high_surrogate), mkU32(1)), |
| 11390 | unop(Iop_16Uto32, load(Ity_I16, low_surrogate_addr)), |
| 11391 | mkU32(0))); // any value is fine; it will not be used |
| 11392 | |
| 11393 | /* Call the helper */ |
| 11394 | IRTemp retval = newTemp(Ity_I64); |
| 11395 | assign(retval, s390_call_cu24(mkexpr(srcval), mkexpr(low_surrogate))); |
| 11396 | |
| 11397 | /* Before we can test whether the 1st operand is exhausted we need to |
| 11398 | test for an invalid low surrogate. Because cc=2 outranks cc=1. */ |
| 11399 | if (s390_host_has_etf3 && (m3 & 0x1) == 1) { |
| 11400 | IRExpr *invalid_low_surrogate = |
| 11401 | binop(Iop_And64, mkexpr(retval), mkU64(0xff)); |
| 11402 | |
| 11403 | s390_cc_set(2); |
| 11404 | if_condition_goto(binop(Iop_CmpEQ64, invalid_low_surrogate, mkU64(1)), |
| 11405 | guest_IA_next_instr); |
| 11406 | } |
| 11407 | |
| 11408 | /* Now test whether the 1st operand is exhausted */ |
| 11409 | s390_cc_set(1); |
| 11410 | if_condition_goto(binop(Iop_CmpLT64U, mkexpr(len1), mkU64(4)), |
| 11411 | guest_IA_next_instr); |
| 11412 | |
| 11413 | /* Extract the bytes to be stored at addr1 */ |
| 11414 | IRExpr *data = unop(Iop_64to32, binop(Iop_Shr64, mkexpr(retval), mkU8(8))); |
| 11415 | |
| 11416 | store(mkexpr(addr1), data); |
| 11417 | |
| 11418 | /* Update source address and length */ |
| 11419 | IRTemp num_src_bytes = newTemp(Ity_I64); |
| 11420 | assign(num_src_bytes, |
| 11421 | mkite(binop(Iop_CmpEQ32, mkexpr(is_high_surrogate), mkU32(1)), |
| 11422 | mkU64(4), mkU64(2))); |
| 11423 | put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr2), mkexpr(num_src_bytes))); |
| 11424 | put_gpr_dw0(r2 + 1, binop(Iop_Sub64, mkexpr(len2), mkexpr(num_src_bytes))); |
| 11425 | |
| 11426 | /* Update destination address and length */ |
| 11427 | put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(4))); |
| 11428 | put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(4))); |
| 11429 | |
| 11430 | /* Iterate */ |
| 11431 | always_goto_and_chase(guest_IA_curr_instr); |
| 11432 | |
| 11433 | return "cu24"; |
| 11434 | } |
florian | a4384a3 | 2011-08-11 16:58:45 +0000 | [diff] [blame] | 11435 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11436 | /*------------------------------------------------------------*/ |
| 11437 | /*--- Build IR for special instructions ---*/ |
| 11438 | /*------------------------------------------------------------*/ |
| 11439 | |
florian | b4df768 | 2011-07-05 02:09:01 +0000 | [diff] [blame] | 11440 | static void |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11441 | s390_irgen_client_request(void) |
| 11442 | { |
| 11443 | if (0) |
| 11444 | vex_printf("%%R3 = client_request ( %%R2 )\n"); |
| 11445 | |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 11446 | Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE |
| 11447 | + S390_SPECIAL_OP_SIZE; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11448 | |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 11449 | dis_res->jk_StopHere = Ijk_ClientReq; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11450 | dis_res->whatNext = Dis_StopHere; |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 11451 | |
| 11452 | put_IA(mkaddr_expr(next)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11453 | } |
| 11454 | |
florian | b4df768 | 2011-07-05 02:09:01 +0000 | [diff] [blame] | 11455 | static void |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11456 | s390_irgen_guest_NRADDR(void) |
| 11457 | { |
| 11458 | if (0) |
| 11459 | vex_printf("%%R3 = guest_NRADDR\n"); |
| 11460 | |
florian | e88b3c9 | 2011-07-05 02:48:39 +0000 | [diff] [blame] | 11461 | put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11462 | } |
| 11463 | |
florian | b4df768 | 2011-07-05 02:09:01 +0000 | [diff] [blame] | 11464 | static void |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11465 | s390_irgen_call_noredir(void) |
| 11466 | { |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 11467 | Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE |
| 11468 | + S390_SPECIAL_OP_SIZE; |
| 11469 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11470 | /* Continue after special op */ |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 11471 | put_gpr_dw0(14, mkaddr_expr(next)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11472 | |
| 11473 | /* The address is in REG1, all parameters are in the right (guest) places */ |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 11474 | put_IA(get_gpr_dw0(1)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11475 | |
| 11476 | dis_res->whatNext = Dis_StopHere; |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 11477 | dis_res->jk_StopHere = Ijk_NoRedir; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11478 | } |
| 11479 | |
| 11480 | /* Force proper alignment for the structures below. */ |
| 11481 | #pragma pack(1) |
| 11482 | |
| 11483 | |
| 11484 | static s390_decode_t |
| 11485 | s390_decode_2byte_and_irgen(UChar *bytes) |
| 11486 | { |
| 11487 | typedef union { |
| 11488 | struct { |
| 11489 | unsigned int op : 16; |
| 11490 | } E; |
| 11491 | struct { |
| 11492 | unsigned int op : 8; |
| 11493 | unsigned int i : 8; |
| 11494 | } I; |
| 11495 | struct { |
| 11496 | unsigned int op : 8; |
| 11497 | unsigned int r1 : 4; |
| 11498 | unsigned int r2 : 4; |
| 11499 | } RR; |
| 11500 | } formats; |
| 11501 | union { |
| 11502 | formats fmt; |
| 11503 | UShort value; |
| 11504 | } ovl; |
| 11505 | |
| 11506 | vassert(sizeof(formats) == 2); |
| 11507 | |
| 11508 | ((char *)(&ovl.value))[0] = bytes[0]; |
| 11509 | ((char *)(&ovl.value))[1] = bytes[1]; |
| 11510 | |
| 11511 | switch (ovl.value & 0xffff) { |
florian | 30e8901 | 2011-08-08 18:22:58 +0000 | [diff] [blame] | 11512 | case 0x0000: /* invalid opcode */ |
| 11513 | s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11514 | case 0x0101: /* PR */ goto unimplemented; |
| 11515 | case 0x0102: /* UPT */ goto unimplemented; |
| 11516 | case 0x0104: /* PTFF */ goto unimplemented; |
| 11517 | case 0x0107: /* SCKPF */ goto unimplemented; |
| 11518 | case 0x010a: /* PFPO */ goto unimplemented; |
| 11519 | case 0x010b: /* TAM */ goto unimplemented; |
| 11520 | case 0x010c: /* SAM24 */ goto unimplemented; |
| 11521 | case 0x010d: /* SAM31 */ goto unimplemented; |
| 11522 | case 0x010e: /* SAM64 */ goto unimplemented; |
| 11523 | case 0x01ff: /* TRAP2 */ goto unimplemented; |
| 11524 | } |
| 11525 | |
| 11526 | switch ((ovl.value & 0xff00) >> 8) { |
| 11527 | case 0x04: /* SPM */ goto unimplemented; |
| 11528 | case 0x05: /* BALR */ goto unimplemented; |
| 11529 | case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11530 | goto ok; |
| 11531 | case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11532 | goto ok; |
| 11533 | case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok; |
| 11534 | case 0x0b: /* BSM */ goto unimplemented; |
| 11535 | case 0x0c: /* BASSM */ goto unimplemented; |
| 11536 | case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11537 | goto ok; |
florian | b0c9a13 | 2011-09-08 15:37:39 +0000 | [diff] [blame] | 11538 | case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11539 | goto ok; |
| 11540 | case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11541 | goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11542 | case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11543 | goto ok; |
| 11544 | case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11545 | goto ok; |
| 11546 | case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11547 | goto ok; |
| 11548 | case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11549 | goto ok; |
| 11550 | case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11551 | goto ok; |
| 11552 | case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11553 | goto ok; |
| 11554 | case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11555 | goto ok; |
| 11556 | case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11557 | goto ok; |
| 11558 | case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11559 | goto ok; |
| 11560 | case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11561 | goto ok; |
| 11562 | case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11563 | goto ok; |
| 11564 | case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11565 | goto ok; |
| 11566 | case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11567 | goto ok; |
| 11568 | case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11569 | goto ok; |
| 11570 | case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11571 | goto ok; |
| 11572 | case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11573 | goto ok; |
| 11574 | case 0x20: /* LPDR */ goto unimplemented; |
| 11575 | case 0x21: /* LNDR */ goto unimplemented; |
| 11576 | case 0x22: /* LTDR */ goto unimplemented; |
| 11577 | case 0x23: /* LCDR */ goto unimplemented; |
| 11578 | case 0x24: /* HDR */ goto unimplemented; |
| 11579 | case 0x25: /* LDXR */ goto unimplemented; |
| 11580 | case 0x26: /* MXR */ goto unimplemented; |
| 11581 | case 0x27: /* MXDR */ goto unimplemented; |
| 11582 | case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11583 | goto ok; |
| 11584 | case 0x29: /* CDR */ goto unimplemented; |
| 11585 | case 0x2a: /* ADR */ goto unimplemented; |
| 11586 | case 0x2b: /* SDR */ goto unimplemented; |
| 11587 | case 0x2c: /* MDR */ goto unimplemented; |
| 11588 | case 0x2d: /* DDR */ goto unimplemented; |
| 11589 | case 0x2e: /* AWR */ goto unimplemented; |
| 11590 | case 0x2f: /* SWR */ goto unimplemented; |
| 11591 | case 0x30: /* LPER */ goto unimplemented; |
| 11592 | case 0x31: /* LNER */ goto unimplemented; |
| 11593 | case 0x32: /* LTER */ goto unimplemented; |
| 11594 | case 0x33: /* LCER */ goto unimplemented; |
| 11595 | case 0x34: /* HER */ goto unimplemented; |
| 11596 | case 0x35: /* LEDR */ goto unimplemented; |
| 11597 | case 0x36: /* AXR */ goto unimplemented; |
| 11598 | case 0x37: /* SXR */ goto unimplemented; |
| 11599 | case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2); |
| 11600 | goto ok; |
| 11601 | case 0x39: /* CER */ goto unimplemented; |
| 11602 | case 0x3a: /* AER */ goto unimplemented; |
| 11603 | case 0x3b: /* SER */ goto unimplemented; |
| 11604 | case 0x3c: /* MDER */ goto unimplemented; |
| 11605 | case 0x3d: /* DER */ goto unimplemented; |
| 11606 | case 0x3e: /* AUR */ goto unimplemented; |
| 11607 | case 0x3f: /* SUR */ goto unimplemented; |
| 11608 | } |
| 11609 | |
| 11610 | return S390_DECODE_UNKNOWN_INSN; |
| 11611 | |
| 11612 | ok: |
| 11613 | return S390_DECODE_OK; |
| 11614 | |
| 11615 | unimplemented: |
| 11616 | return S390_DECODE_UNIMPLEMENTED_INSN; |
| 11617 | } |
| 11618 | |
| 11619 | static s390_decode_t |
| 11620 | s390_decode_4byte_and_irgen(UChar *bytes) |
| 11621 | { |
| 11622 | typedef union { |
| 11623 | struct { |
| 11624 | unsigned int op1 : 8; |
| 11625 | unsigned int r1 : 4; |
| 11626 | unsigned int op2 : 4; |
| 11627 | unsigned int i2 : 16; |
| 11628 | } RI; |
| 11629 | struct { |
| 11630 | unsigned int op : 16; |
| 11631 | unsigned int : 8; |
| 11632 | unsigned int r1 : 4; |
| 11633 | unsigned int r2 : 4; |
| 11634 | } RRE; |
| 11635 | struct { |
| 11636 | unsigned int op : 16; |
| 11637 | unsigned int r1 : 4; |
| 11638 | unsigned int : 4; |
| 11639 | unsigned int r3 : 4; |
| 11640 | unsigned int r2 : 4; |
| 11641 | } RRF; |
| 11642 | struct { |
| 11643 | unsigned int op : 16; |
| 11644 | unsigned int r3 : 4; |
| 11645 | unsigned int m4 : 4; |
| 11646 | unsigned int r1 : 4; |
| 11647 | unsigned int r2 : 4; |
| 11648 | } RRF2; |
| 11649 | struct { |
| 11650 | unsigned int op : 16; |
| 11651 | unsigned int r3 : 4; |
| 11652 | unsigned int : 4; |
| 11653 | unsigned int r1 : 4; |
| 11654 | unsigned int r2 : 4; |
| 11655 | } RRF3; |
| 11656 | struct { |
| 11657 | unsigned int op : 16; |
| 11658 | unsigned int r3 : 4; |
| 11659 | unsigned int : 4; |
| 11660 | unsigned int r1 : 4; |
| 11661 | unsigned int r2 : 4; |
| 11662 | } RRR; |
| 11663 | struct { |
| 11664 | unsigned int op : 16; |
| 11665 | unsigned int r3 : 4; |
| 11666 | unsigned int : 4; |
| 11667 | unsigned int r1 : 4; |
| 11668 | unsigned int r2 : 4; |
| 11669 | } RRF4; |
| 11670 | struct { |
| 11671 | unsigned int op : 8; |
| 11672 | unsigned int r1 : 4; |
| 11673 | unsigned int r3 : 4; |
| 11674 | unsigned int b2 : 4; |
| 11675 | unsigned int d2 : 12; |
| 11676 | } RS; |
| 11677 | struct { |
| 11678 | unsigned int op : 8; |
| 11679 | unsigned int r1 : 4; |
| 11680 | unsigned int r3 : 4; |
| 11681 | unsigned int i2 : 16; |
| 11682 | } RSI; |
| 11683 | struct { |
| 11684 | unsigned int op : 8; |
| 11685 | unsigned int r1 : 4; |
| 11686 | unsigned int x2 : 4; |
| 11687 | unsigned int b2 : 4; |
| 11688 | unsigned int d2 : 12; |
| 11689 | } RX; |
| 11690 | struct { |
| 11691 | unsigned int op : 16; |
| 11692 | unsigned int b2 : 4; |
| 11693 | unsigned int d2 : 12; |
| 11694 | } S; |
| 11695 | struct { |
| 11696 | unsigned int op : 8; |
| 11697 | unsigned int i2 : 8; |
| 11698 | unsigned int b1 : 4; |
| 11699 | unsigned int d1 : 12; |
| 11700 | } SI; |
| 11701 | } formats; |
| 11702 | union { |
| 11703 | formats fmt; |
| 11704 | UInt value; |
| 11705 | } ovl; |
| 11706 | |
| 11707 | vassert(sizeof(formats) == 4); |
| 11708 | |
| 11709 | ((char *)(&ovl.value))[0] = bytes[0]; |
| 11710 | ((char *)(&ovl.value))[1] = bytes[1]; |
| 11711 | ((char *)(&ovl.value))[2] = bytes[2]; |
| 11712 | ((char *)(&ovl.value))[3] = bytes[3]; |
| 11713 | |
| 11714 | switch ((ovl.value & 0xff0f0000) >> 16) { |
| 11715 | case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1, |
| 11716 | ovl.fmt.RI.i2); goto ok; |
| 11717 | case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1, |
| 11718 | ovl.fmt.RI.i2); goto ok; |
| 11719 | case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1, |
| 11720 | ovl.fmt.RI.i2); goto ok; |
| 11721 | case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1, |
| 11722 | ovl.fmt.RI.i2); goto ok; |
| 11723 | case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1, |
| 11724 | ovl.fmt.RI.i2); goto ok; |
| 11725 | case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1, |
| 11726 | ovl.fmt.RI.i2); goto ok; |
| 11727 | case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1, |
| 11728 | ovl.fmt.RI.i2); goto ok; |
| 11729 | case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1, |
| 11730 | ovl.fmt.RI.i2); goto ok; |
| 11731 | case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1, |
| 11732 | ovl.fmt.RI.i2); goto ok; |
| 11733 | case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1, |
| 11734 | ovl.fmt.RI.i2); goto ok; |
| 11735 | case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1, |
| 11736 | ovl.fmt.RI.i2); goto ok; |
| 11737 | case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1, |
| 11738 | ovl.fmt.RI.i2); goto ok; |
| 11739 | case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1, |
| 11740 | ovl.fmt.RI.i2); goto ok; |
| 11741 | case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1, |
| 11742 | ovl.fmt.RI.i2); goto ok; |
| 11743 | case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1, |
| 11744 | ovl.fmt.RI.i2); goto ok; |
| 11745 | case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1, |
| 11746 | ovl.fmt.RI.i2); goto ok; |
| 11747 | case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1, |
| 11748 | ovl.fmt.RI.i2); goto ok; |
| 11749 | case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1, |
| 11750 | ovl.fmt.RI.i2); goto ok; |
| 11751 | case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1, |
| 11752 | ovl.fmt.RI.i2); goto ok; |
| 11753 | case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1, |
| 11754 | ovl.fmt.RI.i2); goto ok; |
| 11755 | case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2); |
| 11756 | goto ok; |
| 11757 | case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1, |
| 11758 | ovl.fmt.RI.i2); goto ok; |
| 11759 | case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1, |
| 11760 | ovl.fmt.RI.i2); goto ok; |
| 11761 | case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1, |
| 11762 | ovl.fmt.RI.i2); goto ok; |
| 11763 | case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2); |
| 11764 | goto ok; |
| 11765 | case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1, |
| 11766 | ovl.fmt.RI.i2); goto ok; |
| 11767 | case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2); |
| 11768 | goto ok; |
| 11769 | case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1, |
| 11770 | ovl.fmt.RI.i2); goto ok; |
| 11771 | case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2); |
| 11772 | goto ok; |
| 11773 | case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1, |
| 11774 | ovl.fmt.RI.i2); goto ok; |
| 11775 | case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2); |
| 11776 | goto ok; |
| 11777 | case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1, |
| 11778 | ovl.fmt.RI.i2); goto ok; |
| 11779 | } |
| 11780 | |
| 11781 | switch ((ovl.value & 0xffff0000) >> 16) { |
| 11782 | case 0x8000: /* SSM */ goto unimplemented; |
| 11783 | case 0x8200: /* LPSW */ goto unimplemented; |
florian | 7700fc9 | 2012-01-16 17:25:55 +0000 | [diff] [blame] | 11784 | case 0x9300: /* TS */ goto unimplemented; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11785 | case 0xb202: /* STIDP */ goto unimplemented; |
| 11786 | case 0xb204: /* SCK */ goto unimplemented; |
florian | 7700fc9 | 2012-01-16 17:25:55 +0000 | [diff] [blame] | 11787 | case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2); |
| 11788 | goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11789 | case 0xb206: /* SCKC */ goto unimplemented; |
| 11790 | case 0xb207: /* STCKC */ goto unimplemented; |
| 11791 | case 0xb208: /* SPT */ goto unimplemented; |
| 11792 | case 0xb209: /* STPT */ goto unimplemented; |
| 11793 | case 0xb20a: /* SPKA */ goto unimplemented; |
| 11794 | case 0xb20b: /* IPK */ goto unimplemented; |
| 11795 | case 0xb20d: /* PTLB */ goto unimplemented; |
| 11796 | case 0xb210: /* SPX */ goto unimplemented; |
| 11797 | case 0xb211: /* STPX */ goto unimplemented; |
| 11798 | case 0xb212: /* STAP */ goto unimplemented; |
| 11799 | case 0xb214: /* SIE */ goto unimplemented; |
| 11800 | case 0xb218: /* PC */ goto unimplemented; |
| 11801 | case 0xb219: /* SAC */ goto unimplemented; |
| 11802 | case 0xb21a: /* CFC */ goto unimplemented; |
| 11803 | case 0xb221: /* IPTE */ goto unimplemented; |
| 11804 | case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok; |
| 11805 | case 0xb223: /* IVSK */ goto unimplemented; |
| 11806 | case 0xb224: /* IAC */ goto unimplemented; |
| 11807 | case 0xb225: /* SSAR */ goto unimplemented; |
| 11808 | case 0xb226: /* EPAR */ goto unimplemented; |
| 11809 | case 0xb227: /* ESAR */ goto unimplemented; |
| 11810 | case 0xb228: /* PT */ goto unimplemented; |
| 11811 | case 0xb229: /* ISKE */ goto unimplemented; |
| 11812 | case 0xb22a: /* RRBE */ goto unimplemented; |
| 11813 | case 0xb22b: /* SSKE */ goto unimplemented; |
| 11814 | case 0xb22c: /* TB */ goto unimplemented; |
| 11815 | case 0xb22d: /* DXR */ goto unimplemented; |
| 11816 | case 0xb22e: /* PGIN */ goto unimplemented; |
| 11817 | case 0xb22f: /* PGOUT */ goto unimplemented; |
| 11818 | case 0xb230: /* CSCH */ goto unimplemented; |
| 11819 | case 0xb231: /* HSCH */ goto unimplemented; |
| 11820 | case 0xb232: /* MSCH */ goto unimplemented; |
| 11821 | case 0xb233: /* SSCH */ goto unimplemented; |
| 11822 | case 0xb234: /* STSCH */ goto unimplemented; |
| 11823 | case 0xb235: /* TSCH */ goto unimplemented; |
| 11824 | case 0xb236: /* TPI */ goto unimplemented; |
| 11825 | case 0xb237: /* SAL */ goto unimplemented; |
| 11826 | case 0xb238: /* RSCH */ goto unimplemented; |
| 11827 | case 0xb239: /* STCRW */ goto unimplemented; |
| 11828 | case 0xb23a: /* STCPS */ goto unimplemented; |
| 11829 | case 0xb23b: /* RCHP */ goto unimplemented; |
| 11830 | case 0xb23c: /* SCHM */ goto unimplemented; |
| 11831 | case 0xb240: /* BAKR */ goto unimplemented; |
florian | a4384a3 | 2011-08-11 16:58:45 +0000 | [diff] [blame] | 11832 | case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1, |
| 11833 | ovl.fmt.RRE.r2); goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11834 | case 0xb244: /* SQDR */ goto unimplemented; |
| 11835 | case 0xb245: /* SQER */ goto unimplemented; |
| 11836 | case 0xb246: /* STURA */ goto unimplemented; |
| 11837 | case 0xb247: /* MSTA */ goto unimplemented; |
| 11838 | case 0xb248: /* PALB */ goto unimplemented; |
| 11839 | case 0xb249: /* EREG */ goto unimplemented; |
| 11840 | case 0xb24a: /* ESTA */ goto unimplemented; |
| 11841 | case 0xb24b: /* LURA */ goto unimplemented; |
| 11842 | case 0xb24c: /* TAR */ goto unimplemented; |
| 11843 | case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1, |
| 11844 | ovl.fmt.RRE.r2); goto ok; |
| 11845 | case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); |
| 11846 | goto ok; |
| 11847 | case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); |
| 11848 | goto ok; |
| 11849 | case 0xb250: /* CSP */ goto unimplemented; |
| 11850 | case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1, |
| 11851 | ovl.fmt.RRE.r2); goto ok; |
| 11852 | case 0xb254: /* MVPG */ goto unimplemented; |
| 11853 | case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1, |
| 11854 | ovl.fmt.RRE.r2); goto ok; |
| 11855 | case 0xb257: /* CUSE */ goto unimplemented; |
| 11856 | case 0xb258: /* BSG */ goto unimplemented; |
| 11857 | case 0xb25a: /* BSA */ goto unimplemented; |
| 11858 | case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1, |
| 11859 | ovl.fmt.RRE.r2); goto ok; |
| 11860 | case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1, |
| 11861 | ovl.fmt.RRE.r2); goto ok; |
| 11862 | case 0xb263: /* CMPSC */ goto unimplemented; |
| 11863 | case 0xb274: /* SIGA */ goto unimplemented; |
| 11864 | case 0xb276: /* XSCH */ goto unimplemented; |
| 11865 | case 0xb277: /* RP */ goto unimplemented; |
sewardj | 1e5fea6 | 2011-05-17 16:18:36 +0000 | [diff] [blame] | 11866 | case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11867 | case 0xb279: /* SACF */ goto unimplemented; |
sewardj | 1e5fea6 | 2011-05-17 16:18:36 +0000 | [diff] [blame] | 11868 | case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11869 | case 0xb27d: /* STSI */ goto unimplemented; |
| 11870 | case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2); |
| 11871 | goto ok; |
| 11872 | case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2); |
| 11873 | goto ok; |
| 11874 | case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2); |
| 11875 | goto ok; |
florian | 730448f | 2012-02-04 17:07:07 +0000 | [diff] [blame] | 11876 | case 0xb2a5: s390_format_RRE_FF(s390_irgen_TRE, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); goto ok; |
florian | a0100c9 | 2012-07-20 00:06:35 +0000 | [diff] [blame] | 11877 | case 0xb2a6: s390_format_RRF_M0RERE(s390_irgen_CU21, ovl.fmt.RRF3.r3, |
| 11878 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); |
| 11879 | goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11880 | case 0xb2a7: /* CU12 */ goto unimplemented; |
florian | 933065d | 2011-07-11 01:48:02 +0000 | [diff] [blame] | 11881 | case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2); |
| 11882 | goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 11883 | case 0xb2b1: /* STFL */ goto unimplemented; |
| 11884 | case 0xb2b2: /* LPSWE */ goto unimplemented; |
| 11885 | case 0xb2b8: /* SRNMB */ goto unimplemented; |
| 11886 | case 0xb2b9: /* SRNMT */ goto unimplemented; |
| 11887 | case 0xb2bd: /* LFAS */ goto unimplemented; |
| 11888 | case 0xb2ff: /* TRAP4 */ goto unimplemented; |
| 11889 | case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1, |
| 11890 | ovl.fmt.RRE.r2); goto ok; |
| 11891 | case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1, |
| 11892 | ovl.fmt.RRE.r2); goto ok; |
| 11893 | case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1, |
| 11894 | ovl.fmt.RRE.r2); goto ok; |
| 11895 | case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1, |
| 11896 | ovl.fmt.RRE.r2); goto ok; |
| 11897 | case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1, |
| 11898 | ovl.fmt.RRE.r2); goto ok; |
| 11899 | case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1, |
| 11900 | ovl.fmt.RRE.r2); goto ok; |
| 11901 | case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1, |
| 11902 | ovl.fmt.RRE.r2); goto ok; |
| 11903 | case 0xb307: /* MXDBR */ goto unimplemented; |
| 11904 | case 0xb308: /* KEBR */ goto unimplemented; |
| 11905 | case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1, |
| 11906 | ovl.fmt.RRE.r2); goto ok; |
| 11907 | case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1, |
| 11908 | ovl.fmt.RRE.r2); goto ok; |
| 11909 | case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1, |
| 11910 | ovl.fmt.RRE.r2); goto ok; |
| 11911 | case 0xb30c: /* MDEBR */ goto unimplemented; |
| 11912 | case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1, |
| 11913 | ovl.fmt.RRE.r2); goto ok; |
| 11914 | case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1, |
| 11915 | ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok; |
| 11916 | case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1, |
| 11917 | ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok; |
| 11918 | case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1, |
| 11919 | ovl.fmt.RRE.r2); goto ok; |
| 11920 | case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1, |
| 11921 | ovl.fmt.RRE.r2); goto ok; |
| 11922 | case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1, |
| 11923 | ovl.fmt.RRE.r2); goto ok; |
| 11924 | case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1, |
| 11925 | ovl.fmt.RRE.r2); goto ok; |
| 11926 | case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1, |
| 11927 | ovl.fmt.RRE.r2); goto ok; |
| 11928 | case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1, |
| 11929 | ovl.fmt.RRE.r2); goto ok; |
| 11930 | case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1, |
| 11931 | ovl.fmt.RRE.r2); goto ok; |
| 11932 | case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1, |
| 11933 | ovl.fmt.RRE.r2); goto ok; |
| 11934 | case 0xb318: /* KDBR */ goto unimplemented; |
| 11935 | case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1, |
| 11936 | ovl.fmt.RRE.r2); goto ok; |
| 11937 | case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1, |
| 11938 | ovl.fmt.RRE.r2); goto ok; |
| 11939 | case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1, |
| 11940 | ovl.fmt.RRE.r2); goto ok; |
| 11941 | case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1, |
| 11942 | ovl.fmt.RRE.r2); goto ok; |
| 11943 | case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1, |
| 11944 | ovl.fmt.RRE.r2); goto ok; |
| 11945 | case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1, |
| 11946 | ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok; |
| 11947 | case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1, |
| 11948 | ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok; |
| 11949 | case 0xb324: /* LDER */ goto unimplemented; |
| 11950 | case 0xb325: /* LXDR */ goto unimplemented; |
| 11951 | case 0xb326: /* LXER */ goto unimplemented; |
| 11952 | case 0xb32e: /* MAER */ goto unimplemented; |
| 11953 | case 0xb32f: /* MSER */ goto unimplemented; |
| 11954 | case 0xb336: /* SQXR */ goto unimplemented; |
| 11955 | case 0xb337: /* MEER */ goto unimplemented; |
| 11956 | case 0xb338: /* MAYLR */ goto unimplemented; |
| 11957 | case 0xb339: /* MYLR */ goto unimplemented; |
| 11958 | case 0xb33a: /* MAYR */ goto unimplemented; |
| 11959 | case 0xb33b: /* MYR */ goto unimplemented; |
| 11960 | case 0xb33c: /* MAYHR */ goto unimplemented; |
| 11961 | case 0xb33d: /* MYHR */ goto unimplemented; |
| 11962 | case 0xb33e: /* MADR */ goto unimplemented; |
| 11963 | case 0xb33f: /* MSDR */ goto unimplemented; |
| 11964 | case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1, |
| 11965 | ovl.fmt.RRE.r2); goto ok; |
| 11966 | case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1, |
| 11967 | ovl.fmt.RRE.r2); goto ok; |
| 11968 | case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1, |
| 11969 | ovl.fmt.RRE.r2); goto ok; |
| 11970 | case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1, |
| 11971 | ovl.fmt.RRE.r2); goto ok; |
| 11972 | case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1, |
| 11973 | ovl.fmt.RRE.r2); goto ok; |
| 11974 | case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1, |
| 11975 | ovl.fmt.RRE.r2); goto ok; |
| 11976 | case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1, |
| 11977 | ovl.fmt.RRE.r2); goto ok; |
| 11978 | case 0xb347: /* FIXBR */ goto unimplemented; |
| 11979 | case 0xb348: /* KXBR */ goto unimplemented; |
| 11980 | case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1, |
| 11981 | ovl.fmt.RRE.r2); goto ok; |
| 11982 | case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1, |
| 11983 | ovl.fmt.RRE.r2); goto ok; |
| 11984 | case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1, |
| 11985 | ovl.fmt.RRE.r2); goto ok; |
| 11986 | case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1, |
| 11987 | ovl.fmt.RRE.r2); goto ok; |
| 11988 | case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1, |
| 11989 | ovl.fmt.RRE.r2); goto ok; |
| 11990 | case 0xb350: /* TBEDR */ goto unimplemented; |
| 11991 | case 0xb351: /* TBDR */ goto unimplemented; |
| 11992 | case 0xb353: /* DIEBR */ goto unimplemented; |
| 11993 | case 0xb357: /* FIEBR */ goto unimplemented; |
| 11994 | case 0xb358: /* THDER */ goto unimplemented; |
| 11995 | case 0xb359: /* THDR */ goto unimplemented; |
| 11996 | case 0xb35b: /* DIDBR */ goto unimplemented; |
| 11997 | case 0xb35f: /* FIDBR */ goto unimplemented; |
| 11998 | case 0xb360: /* LPXR */ goto unimplemented; |
| 11999 | case 0xb361: /* LNXR */ goto unimplemented; |
| 12000 | case 0xb362: /* LTXR */ goto unimplemented; |
| 12001 | case 0xb363: /* LCXR */ goto unimplemented; |
| 12002 | case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1, |
| 12003 | ovl.fmt.RRE.r2); goto ok; |
| 12004 | case 0xb366: /* LEXR */ goto unimplemented; |
| 12005 | case 0xb367: /* FIXR */ goto unimplemented; |
| 12006 | case 0xb369: /* CXR */ goto unimplemented; |
| 12007 | case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1, |
| 12008 | ovl.fmt.RRE.r2); goto ok; |
| 12009 | case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1, |
| 12010 | ovl.fmt.RRE.r2); goto ok; |
| 12011 | case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3, |
| 12012 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); |
| 12013 | goto ok; |
| 12014 | case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1, |
| 12015 | ovl.fmt.RRE.r2); goto ok; |
| 12016 | case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok; |
| 12017 | case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok; |
| 12018 | case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok; |
| 12019 | case 0xb377: /* FIER */ goto unimplemented; |
| 12020 | case 0xb37f: /* FIDR */ goto unimplemented; |
| 12021 | case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok; |
| 12022 | case 0xb385: /* SFASR */ goto unimplemented; |
| 12023 | case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok; |
| 12024 | case 0xb390: /* CELFBR */ goto unimplemented; |
| 12025 | case 0xb391: /* CDLFBR */ goto unimplemented; |
| 12026 | case 0xb392: /* CXLFBR */ goto unimplemented; |
| 12027 | case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1, |
| 12028 | ovl.fmt.RRE.r2); goto ok; |
| 12029 | case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1, |
| 12030 | ovl.fmt.RRE.r2); goto ok; |
| 12031 | case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1, |
| 12032 | ovl.fmt.RRE.r2); goto ok; |
| 12033 | case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3, |
| 12034 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); |
| 12035 | goto ok; |
| 12036 | case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3, |
| 12037 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); |
| 12038 | goto ok; |
| 12039 | case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3, |
| 12040 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); |
| 12041 | goto ok; |
| 12042 | case 0xb3a0: /* CELGBR */ goto unimplemented; |
| 12043 | case 0xb3a1: /* CDLGBR */ goto unimplemented; |
| 12044 | case 0xb3a2: /* CXLGBR */ goto unimplemented; |
| 12045 | case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1, |
| 12046 | ovl.fmt.RRE.r2); goto ok; |
| 12047 | case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1, |
| 12048 | ovl.fmt.RRE.r2); goto ok; |
| 12049 | case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1, |
| 12050 | ovl.fmt.RRE.r2); goto ok; |
| 12051 | case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3, |
| 12052 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); |
| 12053 | goto ok; |
| 12054 | case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3, |
| 12055 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); |
| 12056 | goto ok; |
| 12057 | case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3, |
| 12058 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); |
| 12059 | goto ok; |
| 12060 | case 0xb3b4: /* CEFR */ goto unimplemented; |
| 12061 | case 0xb3b5: /* CDFR */ goto unimplemented; |
| 12062 | case 0xb3b6: /* CXFR */ goto unimplemented; |
| 12063 | case 0xb3b8: /* CFER */ goto unimplemented; |
| 12064 | case 0xb3b9: /* CFDR */ goto unimplemented; |
| 12065 | case 0xb3ba: /* CFXR */ goto unimplemented; |
| 12066 | case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1, |
| 12067 | ovl.fmt.RRE.r2); goto ok; |
| 12068 | case 0xb3c4: /* CEGR */ goto unimplemented; |
| 12069 | case 0xb3c5: /* CDGR */ goto unimplemented; |
| 12070 | case 0xb3c6: /* CXGR */ goto unimplemented; |
| 12071 | case 0xb3c8: /* CGER */ goto unimplemented; |
| 12072 | case 0xb3c9: /* CGDR */ goto unimplemented; |
| 12073 | case 0xb3ca: /* CGXR */ goto unimplemented; |
| 12074 | case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1, |
| 12075 | ovl.fmt.RRE.r2); goto ok; |
| 12076 | case 0xb3d0: /* MDTR */ goto unimplemented; |
| 12077 | case 0xb3d1: /* DDTR */ goto unimplemented; |
| 12078 | case 0xb3d2: /* ADTR */ goto unimplemented; |
| 12079 | case 0xb3d3: /* SDTR */ goto unimplemented; |
| 12080 | case 0xb3d4: /* LDETR */ goto unimplemented; |
| 12081 | case 0xb3d5: /* LEDTR */ goto unimplemented; |
| 12082 | case 0xb3d6: /* LTDTR */ goto unimplemented; |
| 12083 | case 0xb3d7: /* FIDTR */ goto unimplemented; |
| 12084 | case 0xb3d8: /* MXTR */ goto unimplemented; |
| 12085 | case 0xb3d9: /* DXTR */ goto unimplemented; |
| 12086 | case 0xb3da: /* AXTR */ goto unimplemented; |
| 12087 | case 0xb3db: /* SXTR */ goto unimplemented; |
| 12088 | case 0xb3dc: /* LXDTR */ goto unimplemented; |
| 12089 | case 0xb3dd: /* LDXTR */ goto unimplemented; |
| 12090 | case 0xb3de: /* LTXTR */ goto unimplemented; |
| 12091 | case 0xb3df: /* FIXTR */ goto unimplemented; |
| 12092 | case 0xb3e0: /* KDTR */ goto unimplemented; |
| 12093 | case 0xb3e1: /* CGDTR */ goto unimplemented; |
| 12094 | case 0xb3e2: /* CUDTR */ goto unimplemented; |
| 12095 | case 0xb3e3: /* CSDTR */ goto unimplemented; |
| 12096 | case 0xb3e4: /* CDTR */ goto unimplemented; |
| 12097 | case 0xb3e5: /* EEDTR */ goto unimplemented; |
| 12098 | case 0xb3e7: /* ESDTR */ goto unimplemented; |
| 12099 | case 0xb3e8: /* KXTR */ goto unimplemented; |
| 12100 | case 0xb3e9: /* CGXTR */ goto unimplemented; |
| 12101 | case 0xb3ea: /* CUXTR */ goto unimplemented; |
| 12102 | case 0xb3eb: /* CSXTR */ goto unimplemented; |
| 12103 | case 0xb3ec: /* CXTR */ goto unimplemented; |
| 12104 | case 0xb3ed: /* EEXTR */ goto unimplemented; |
| 12105 | case 0xb3ef: /* ESXTR */ goto unimplemented; |
| 12106 | case 0xb3f1: /* CDGTR */ goto unimplemented; |
| 12107 | case 0xb3f2: /* CDUTR */ goto unimplemented; |
| 12108 | case 0xb3f3: /* CDSTR */ goto unimplemented; |
| 12109 | case 0xb3f4: /* CEDTR */ goto unimplemented; |
| 12110 | case 0xb3f5: /* QADTR */ goto unimplemented; |
| 12111 | case 0xb3f6: /* IEDTR */ goto unimplemented; |
| 12112 | case 0xb3f7: /* RRDTR */ goto unimplemented; |
| 12113 | case 0xb3f9: /* CXGTR */ goto unimplemented; |
| 12114 | case 0xb3fa: /* CXUTR */ goto unimplemented; |
| 12115 | case 0xb3fb: /* CXSTR */ goto unimplemented; |
| 12116 | case 0xb3fc: /* CEXTR */ goto unimplemented; |
| 12117 | case 0xb3fd: /* QAXTR */ goto unimplemented; |
| 12118 | case 0xb3fe: /* IEXTR */ goto unimplemented; |
| 12119 | case 0xb3ff: /* RRXTR */ goto unimplemented; |
| 12120 | case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1, |
| 12121 | ovl.fmt.RRE.r2); goto ok; |
| 12122 | case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1, |
| 12123 | ovl.fmt.RRE.r2); goto ok; |
| 12124 | case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1, |
| 12125 | ovl.fmt.RRE.r2); goto ok; |
| 12126 | case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1, |
| 12127 | ovl.fmt.RRE.r2); goto ok; |
| 12128 | case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1, |
| 12129 | ovl.fmt.RRE.r2); goto ok; |
| 12130 | case 0xb905: /* LURAG */ goto unimplemented; |
| 12131 | case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1, |
| 12132 | ovl.fmt.RRE.r2); goto ok; |
| 12133 | case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1, |
| 12134 | ovl.fmt.RRE.r2); goto ok; |
| 12135 | case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1, |
| 12136 | ovl.fmt.RRE.r2); goto ok; |
| 12137 | case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1, |
| 12138 | ovl.fmt.RRE.r2); goto ok; |
| 12139 | case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1, |
| 12140 | ovl.fmt.RRE.r2); goto ok; |
| 12141 | case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1, |
| 12142 | ovl.fmt.RRE.r2); goto ok; |
| 12143 | case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1, |
| 12144 | ovl.fmt.RRE.r2); goto ok; |
| 12145 | case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1, |
| 12146 | ovl.fmt.RRE.r2); goto ok; |
| 12147 | case 0xb90e: /* EREGG */ goto unimplemented; |
| 12148 | case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1, |
| 12149 | ovl.fmt.RRE.r2); goto ok; |
| 12150 | case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1, |
| 12151 | ovl.fmt.RRE.r2); goto ok; |
| 12152 | case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1, |
| 12153 | ovl.fmt.RRE.r2); goto ok; |
| 12154 | case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1, |
| 12155 | ovl.fmt.RRE.r2); goto ok; |
| 12156 | case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1, |
| 12157 | ovl.fmt.RRE.r2); goto ok; |
| 12158 | case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1, |
| 12159 | ovl.fmt.RRE.r2); goto ok; |
| 12160 | case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1, |
| 12161 | ovl.fmt.RRE.r2); goto ok; |
| 12162 | case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1, |
| 12163 | ovl.fmt.RRE.r2); goto ok; |
| 12164 | case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1, |
| 12165 | ovl.fmt.RRE.r2); goto ok; |
| 12166 | case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1, |
| 12167 | ovl.fmt.RRE.r2); goto ok; |
| 12168 | case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1, |
| 12169 | ovl.fmt.RRE.r2); goto ok; |
| 12170 | case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1, |
| 12171 | ovl.fmt.RRE.r2); goto ok; |
| 12172 | case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1, |
| 12173 | ovl.fmt.RRE.r2); goto ok; |
| 12174 | case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1, |
| 12175 | ovl.fmt.RRE.r2); goto ok; |
| 12176 | case 0xb91e: /* KMAC */ goto unimplemented; |
| 12177 | case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1, |
| 12178 | ovl.fmt.RRE.r2); goto ok; |
| 12179 | case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1, |
| 12180 | ovl.fmt.RRE.r2); goto ok; |
| 12181 | case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1, |
| 12182 | ovl.fmt.RRE.r2); goto ok; |
| 12183 | case 0xb925: /* STURG */ goto unimplemented; |
| 12184 | case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1, |
| 12185 | ovl.fmt.RRE.r2); goto ok; |
| 12186 | case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1, |
| 12187 | ovl.fmt.RRE.r2); goto ok; |
| 12188 | case 0xb928: /* PCKMO */ goto unimplemented; |
| 12189 | case 0xb92b: /* KMO */ goto unimplemented; |
| 12190 | case 0xb92c: /* PCC */ goto unimplemented; |
| 12191 | case 0xb92d: /* KMCTR */ goto unimplemented; |
| 12192 | case 0xb92e: /* KM */ goto unimplemented; |
| 12193 | case 0xb92f: /* KMC */ goto unimplemented; |
| 12194 | case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1, |
| 12195 | ovl.fmt.RRE.r2); goto ok; |
| 12196 | case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1, |
| 12197 | ovl.fmt.RRE.r2); goto ok; |
| 12198 | case 0xb93e: /* KIMD */ goto unimplemented; |
| 12199 | case 0xb93f: /* KLMD */ goto unimplemented; |
| 12200 | case 0xb941: /* CFDTR */ goto unimplemented; |
| 12201 | case 0xb942: /* CLGDTR */ goto unimplemented; |
| 12202 | case 0xb943: /* CLFDTR */ goto unimplemented; |
| 12203 | case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1, |
| 12204 | ovl.fmt.RRE.r2); goto ok; |
| 12205 | case 0xb949: /* CFXTR */ goto unimplemented; |
| 12206 | case 0xb94a: /* CLGXTR */ goto unimplemented; |
| 12207 | case 0xb94b: /* CLFXTR */ goto unimplemented; |
| 12208 | case 0xb951: /* CDFTR */ goto unimplemented; |
| 12209 | case 0xb952: /* CDLGTR */ goto unimplemented; |
| 12210 | case 0xb953: /* CDLFTR */ goto unimplemented; |
| 12211 | case 0xb959: /* CXFTR */ goto unimplemented; |
| 12212 | case 0xb95a: /* CXLGTR */ goto unimplemented; |
| 12213 | case 0xb95b: /* CXLFTR */ goto unimplemented; |
| 12214 | case 0xb960: /* CGRT */ goto unimplemented; |
| 12215 | case 0xb961: /* CLGRT */ goto unimplemented; |
| 12216 | case 0xb972: /* CRT */ goto unimplemented; |
| 12217 | case 0xb973: /* CLRT */ goto unimplemented; |
| 12218 | case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1, |
| 12219 | ovl.fmt.RRE.r2); goto ok; |
| 12220 | case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1, |
| 12221 | ovl.fmt.RRE.r2); goto ok; |
| 12222 | case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1, |
| 12223 | ovl.fmt.RRE.r2); goto ok; |
| 12224 | case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1, |
| 12225 | ovl.fmt.RRE.r2); goto ok; |
| 12226 | case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1, |
| 12227 | ovl.fmt.RRE.r2); goto ok; |
| 12228 | case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1, |
| 12229 | ovl.fmt.RRE.r2); goto ok; |
| 12230 | case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1, |
| 12231 | ovl.fmt.RRE.r2); goto ok; |
| 12232 | case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1, |
| 12233 | ovl.fmt.RRE.r2); goto ok; |
| 12234 | case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1, |
| 12235 | ovl.fmt.RRE.r2); goto ok; |
| 12236 | case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1, |
| 12237 | ovl.fmt.RRE.r2); goto ok; |
| 12238 | case 0xb98a: /* CSPG */ goto unimplemented; |
| 12239 | case 0xb98d: /* EPSW */ goto unimplemented; |
| 12240 | case 0xb98e: /* IDTE */ goto unimplemented; |
florian | 730448f | 2012-02-04 17:07:07 +0000 | [diff] [blame] | 12241 | case 0xb990: s390_format_RRF_M0RERE(s390_irgen_TRTT, ovl.fmt.RRF3.r3, |
| 12242 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok; |
| 12243 | case 0xb991: s390_format_RRF_M0RERE(s390_irgen_TRTO, ovl.fmt.RRF3.r3, |
| 12244 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok; |
| 12245 | case 0xb992: s390_format_RRF_M0RERE(s390_irgen_TROT, ovl.fmt.RRF3.r3, |
| 12246 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok; |
florian | 9af3769 | 2012-01-15 21:01:16 +0000 | [diff] [blame] | 12247 | case 0xb993: s390_format_RRF_M0RERE(s390_irgen_TROO, ovl.fmt.RRF3.r3, |
| 12248 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 12249 | case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1, |
| 12250 | ovl.fmt.RRE.r2); goto ok; |
| 12251 | case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1, |
| 12252 | ovl.fmt.RRE.r2); goto ok; |
| 12253 | case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1, |
| 12254 | ovl.fmt.RRE.r2); goto ok; |
| 12255 | case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1, |
| 12256 | ovl.fmt.RRE.r2); goto ok; |
| 12257 | case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1, |
| 12258 | ovl.fmt.RRE.r2); goto ok; |
| 12259 | case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1, |
| 12260 | ovl.fmt.RRE.r2); goto ok; |
| 12261 | case 0xb99a: /* EPAIR */ goto unimplemented; |
| 12262 | case 0xb99b: /* ESAIR */ goto unimplemented; |
| 12263 | case 0xb99d: /* ESEA */ goto unimplemented; |
| 12264 | case 0xb99e: /* PTI */ goto unimplemented; |
| 12265 | case 0xb99f: /* SSAIR */ goto unimplemented; |
| 12266 | case 0xb9a2: /* PTF */ goto unimplemented; |
| 12267 | case 0xb9aa: /* LPTEA */ goto unimplemented; |
| 12268 | case 0xb9ae: /* RRBM */ goto unimplemented; |
| 12269 | case 0xb9af: /* PFMF */ goto unimplemented; |
| 12270 | case 0xb9b0: /* CU14 */ goto unimplemented; |
florian | 2a415a1 | 2012-07-21 17:41:36 +0000 | [diff] [blame] | 12271 | case 0xb9b1: s390_format_RRF_M0RERE(s390_irgen_CU24, ovl.fmt.RRF3.r3, |
| 12272 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); |
| 12273 | goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 12274 | case 0xb9b2: /* CU41 */ goto unimplemented; |
| 12275 | case 0xb9b3: /* CU42 */ goto unimplemented; |
| 12276 | case 0xb9bd: /* TRTRE */ goto unimplemented; |
| 12277 | case 0xb9be: /* SRSTU */ goto unimplemented; |
| 12278 | case 0xb9bf: /* TRTE */ goto unimplemented; |
| 12279 | case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3, |
| 12280 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12281 | goto ok; |
| 12282 | case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3, |
| 12283 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12284 | goto ok; |
| 12285 | case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3, |
| 12286 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12287 | goto ok; |
| 12288 | case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3, |
| 12289 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12290 | goto ok; |
| 12291 | case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1, |
| 12292 | ovl.fmt.RRE.r2); goto ok; |
| 12293 | case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1, |
| 12294 | ovl.fmt.RRE.r2); goto ok; |
| 12295 | case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3, |
| 12296 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12297 | goto ok; |
| 12298 | case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3, |
| 12299 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12300 | goto ok; |
| 12301 | case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3, |
| 12302 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12303 | goto ok; |
| 12304 | case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3, |
| 12305 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12306 | goto ok; |
| 12307 | case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1, |
| 12308 | ovl.fmt.RRE.r2); goto ok; |
| 12309 | case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1, |
| 12310 | ovl.fmt.RRE.r2); goto ok; |
| 12311 | case 0xb9e1: /* POPCNT */ goto unimplemented; |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 12312 | case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3, |
| 12313 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2, |
| 12314 | S390_XMNM_LOCGR); goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 12315 | case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3, |
| 12316 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12317 | goto ok; |
| 12318 | case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3, |
| 12319 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12320 | goto ok; |
| 12321 | case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3, |
| 12322 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12323 | goto ok; |
| 12324 | case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3, |
| 12325 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12326 | goto ok; |
| 12327 | case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3, |
| 12328 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12329 | goto ok; |
| 12330 | case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3, |
| 12331 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12332 | goto ok; |
| 12333 | case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3, |
| 12334 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12335 | goto ok; |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 12336 | case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3, |
| 12337 | ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2, |
| 12338 | S390_XMNM_LOCR); goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 12339 | case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3, |
| 12340 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12341 | goto ok; |
| 12342 | case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3, |
| 12343 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12344 | goto ok; |
| 12345 | case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3, |
| 12346 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12347 | goto ok; |
| 12348 | case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3, |
| 12349 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12350 | goto ok; |
| 12351 | case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3, |
| 12352 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12353 | goto ok; |
| 12354 | case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3, |
| 12355 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12356 | goto ok; |
| 12357 | case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3, |
| 12358 | ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); |
| 12359 | goto ok; |
| 12360 | } |
| 12361 | |
| 12362 | switch ((ovl.value & 0xff000000) >> 24) { |
| 12363 | case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12364 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12365 | case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12366 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12367 | case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12368 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12369 | case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12370 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12371 | case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12372 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12373 | case 0x45: /* BAL */ goto unimplemented; |
| 12374 | case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12375 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12376 | case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12377 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12378 | case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12379 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12380 | case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12381 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12382 | case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12383 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12384 | case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12385 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12386 | case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12387 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12388 | case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12389 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12390 | case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12391 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12392 | case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12393 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12394 | case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12395 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12396 | case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12397 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12398 | case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12399 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12400 | case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12401 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12402 | case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12403 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12404 | case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12405 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12406 | case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12407 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12408 | case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12409 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12410 | case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12411 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12412 | case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12413 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12414 | case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12415 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12416 | case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12417 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12418 | case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12419 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12420 | case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12421 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12422 | case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12423 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12424 | case 0x67: /* MXD */ goto unimplemented; |
| 12425 | case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12426 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12427 | case 0x69: /* CD */ goto unimplemented; |
| 12428 | case 0x6a: /* AD */ goto unimplemented; |
| 12429 | case 0x6b: /* SD */ goto unimplemented; |
| 12430 | case 0x6c: /* MD */ goto unimplemented; |
| 12431 | case 0x6d: /* DD */ goto unimplemented; |
| 12432 | case 0x6e: /* AW */ goto unimplemented; |
| 12433 | case 0x6f: /* SW */ goto unimplemented; |
| 12434 | case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12435 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12436 | case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12437 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12438 | case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2, |
| 12439 | ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; |
| 12440 | case 0x79: /* CE */ goto unimplemented; |
| 12441 | case 0x7a: /* AE */ goto unimplemented; |
| 12442 | case 0x7b: /* SE */ goto unimplemented; |
| 12443 | case 0x7c: /* MDE */ goto unimplemented; |
| 12444 | case 0x7d: /* DE */ goto unimplemented; |
| 12445 | case 0x7e: /* AU */ goto unimplemented; |
| 12446 | case 0x7f: /* SU */ goto unimplemented; |
| 12447 | case 0x83: /* DIAG */ goto unimplemented; |
| 12448 | case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1, |
| 12449 | ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok; |
| 12450 | case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1, |
| 12451 | ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok; |
| 12452 | case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12453 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
| 12454 | case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12455 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
| 12456 | case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2, |
| 12457 | ovl.fmt.RS.d2); goto ok; |
| 12458 | case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2, |
| 12459 | ovl.fmt.RS.d2); goto ok; |
| 12460 | case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2, |
| 12461 | ovl.fmt.RS.d2); goto ok; |
| 12462 | case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2, |
| 12463 | ovl.fmt.RS.d2); goto ok; |
| 12464 | case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2, |
| 12465 | ovl.fmt.RS.d2); goto ok; |
| 12466 | case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2, |
| 12467 | ovl.fmt.RS.d2); goto ok; |
| 12468 | case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2, |
| 12469 | ovl.fmt.RS.d2); goto ok; |
| 12470 | case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2, |
| 12471 | ovl.fmt.RS.d2); goto ok; |
| 12472 | case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12473 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
| 12474 | case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1, |
| 12475 | ovl.fmt.SI.d1); goto ok; |
| 12476 | case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1, |
| 12477 | ovl.fmt.SI.d1); goto ok; |
| 12478 | case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1, |
| 12479 | ovl.fmt.SI.d1); goto ok; |
| 12480 | case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1, |
| 12481 | ovl.fmt.SI.d1); goto ok; |
| 12482 | case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1, |
| 12483 | ovl.fmt.SI.d1); goto ok; |
| 12484 | case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1, |
| 12485 | ovl.fmt.SI.d1); goto ok; |
| 12486 | case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12487 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
| 12488 | case 0x99: /* TRACE */ goto unimplemented; |
| 12489 | case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12490 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
| 12491 | case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12492 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
| 12493 | case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1, |
| 12494 | ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2); |
| 12495 | goto ok; |
| 12496 | case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1, |
| 12497 | ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2); |
| 12498 | goto ok; |
| 12499 | case 0xac: /* STNSM */ goto unimplemented; |
| 12500 | case 0xad: /* STOSM */ goto unimplemented; |
| 12501 | case 0xae: /* SIGP */ goto unimplemented; |
| 12502 | case 0xaf: /* MC */ goto unimplemented; |
| 12503 | case 0xb1: /* LRA */ goto unimplemented; |
| 12504 | case 0xb6: /* STCTL */ goto unimplemented; |
| 12505 | case 0xb7: /* LCTL */ goto unimplemented; |
| 12506 | case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12507 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
florian | 448cbba | 2012-06-06 02:26:01 +0000 | [diff] [blame] | 12508 | case 0xbb: s390_format_RS_RRRD(s390_irgen_CDS, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12509 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 12510 | case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12511 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
| 12512 | case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12513 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
| 12514 | case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, |
| 12515 | ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; |
| 12516 | } |
| 12517 | |
| 12518 | return S390_DECODE_UNKNOWN_INSN; |
| 12519 | |
| 12520 | ok: |
| 12521 | return S390_DECODE_OK; |
| 12522 | |
| 12523 | unimplemented: |
| 12524 | return S390_DECODE_UNIMPLEMENTED_INSN; |
| 12525 | } |
| 12526 | |
| 12527 | static s390_decode_t |
| 12528 | s390_decode_6byte_and_irgen(UChar *bytes) |
| 12529 | { |
| 12530 | typedef union { |
| 12531 | struct { |
| 12532 | unsigned int op1 : 8; |
| 12533 | unsigned int r1 : 4; |
| 12534 | unsigned int r3 : 4; |
| 12535 | unsigned int i2 : 16; |
| 12536 | unsigned int : 8; |
| 12537 | unsigned int op2 : 8; |
| 12538 | } RIE; |
| 12539 | struct { |
| 12540 | unsigned int op1 : 8; |
| 12541 | unsigned int r1 : 4; |
| 12542 | unsigned int r2 : 4; |
| 12543 | unsigned int i3 : 8; |
| 12544 | unsigned int i4 : 8; |
| 12545 | unsigned int i5 : 8; |
| 12546 | unsigned int op2 : 8; |
| 12547 | } RIE_RRUUU; |
| 12548 | struct { |
| 12549 | unsigned int op1 : 8; |
| 12550 | unsigned int r1 : 4; |
| 12551 | unsigned int : 4; |
| 12552 | unsigned int i2 : 16; |
| 12553 | unsigned int m3 : 4; |
| 12554 | unsigned int : 4; |
| 12555 | unsigned int op2 : 8; |
| 12556 | } RIEv1; |
| 12557 | struct { |
| 12558 | unsigned int op1 : 8; |
| 12559 | unsigned int r1 : 4; |
| 12560 | unsigned int r2 : 4; |
| 12561 | unsigned int i4 : 16; |
| 12562 | unsigned int m3 : 4; |
| 12563 | unsigned int : 4; |
| 12564 | unsigned int op2 : 8; |
| 12565 | } RIE_RRPU; |
| 12566 | struct { |
| 12567 | unsigned int op1 : 8; |
| 12568 | unsigned int r1 : 4; |
| 12569 | unsigned int m3 : 4; |
| 12570 | unsigned int i4 : 16; |
| 12571 | unsigned int i2 : 8; |
| 12572 | unsigned int op2 : 8; |
| 12573 | } RIEv3; |
| 12574 | struct { |
| 12575 | unsigned int op1 : 8; |
| 12576 | unsigned int r1 : 4; |
| 12577 | unsigned int op2 : 4; |
| 12578 | unsigned int i2 : 32; |
| 12579 | } RIL; |
| 12580 | struct { |
| 12581 | unsigned int op1 : 8; |
| 12582 | unsigned int r1 : 4; |
| 12583 | unsigned int m3 : 4; |
| 12584 | unsigned int b4 : 4; |
| 12585 | unsigned int d4 : 12; |
| 12586 | unsigned int i2 : 8; |
| 12587 | unsigned int op2 : 8; |
| 12588 | } RIS; |
| 12589 | struct { |
| 12590 | unsigned int op1 : 8; |
| 12591 | unsigned int r1 : 4; |
| 12592 | unsigned int r2 : 4; |
| 12593 | unsigned int b4 : 4; |
| 12594 | unsigned int d4 : 12; |
| 12595 | unsigned int m3 : 4; |
| 12596 | unsigned int : 4; |
| 12597 | unsigned int op2 : 8; |
| 12598 | } RRS; |
| 12599 | struct { |
| 12600 | unsigned int op1 : 8; |
| 12601 | unsigned int l1 : 4; |
| 12602 | unsigned int : 4; |
| 12603 | unsigned int b1 : 4; |
| 12604 | unsigned int d1 : 12; |
| 12605 | unsigned int : 8; |
| 12606 | unsigned int op2 : 8; |
| 12607 | } RSL; |
| 12608 | struct { |
| 12609 | unsigned int op1 : 8; |
| 12610 | unsigned int r1 : 4; |
| 12611 | unsigned int r3 : 4; |
| 12612 | unsigned int b2 : 4; |
| 12613 | unsigned int dl2 : 12; |
| 12614 | unsigned int dh2 : 8; |
| 12615 | unsigned int op2 : 8; |
| 12616 | } RSY; |
| 12617 | struct { |
| 12618 | unsigned int op1 : 8; |
| 12619 | unsigned int r1 : 4; |
| 12620 | unsigned int x2 : 4; |
| 12621 | unsigned int b2 : 4; |
| 12622 | unsigned int d2 : 12; |
| 12623 | unsigned int : 8; |
| 12624 | unsigned int op2 : 8; |
| 12625 | } RXE; |
| 12626 | struct { |
| 12627 | unsigned int op1 : 8; |
| 12628 | unsigned int r3 : 4; |
| 12629 | unsigned int x2 : 4; |
| 12630 | unsigned int b2 : 4; |
| 12631 | unsigned int d2 : 12; |
| 12632 | unsigned int r1 : 4; |
| 12633 | unsigned int : 4; |
| 12634 | unsigned int op2 : 8; |
| 12635 | } RXF; |
| 12636 | struct { |
| 12637 | unsigned int op1 : 8; |
| 12638 | unsigned int r1 : 4; |
| 12639 | unsigned int x2 : 4; |
| 12640 | unsigned int b2 : 4; |
| 12641 | unsigned int dl2 : 12; |
| 12642 | unsigned int dh2 : 8; |
| 12643 | unsigned int op2 : 8; |
| 12644 | } RXY; |
| 12645 | struct { |
| 12646 | unsigned int op1 : 8; |
| 12647 | unsigned int i2 : 8; |
| 12648 | unsigned int b1 : 4; |
| 12649 | unsigned int dl1 : 12; |
| 12650 | unsigned int dh1 : 8; |
| 12651 | unsigned int op2 : 8; |
| 12652 | } SIY; |
| 12653 | struct { |
| 12654 | unsigned int op : 8; |
| 12655 | unsigned int l : 8; |
| 12656 | unsigned int b1 : 4; |
| 12657 | unsigned int d1 : 12; |
| 12658 | unsigned int b2 : 4; |
| 12659 | unsigned int d2 : 12; |
| 12660 | } SS; |
| 12661 | struct { |
| 12662 | unsigned int op : 8; |
| 12663 | unsigned int l1 : 4; |
| 12664 | unsigned int l2 : 4; |
| 12665 | unsigned int b1 : 4; |
| 12666 | unsigned int d1 : 12; |
| 12667 | unsigned int b2 : 4; |
| 12668 | unsigned int d2 : 12; |
| 12669 | } SS_LLRDRD; |
| 12670 | struct { |
| 12671 | unsigned int op : 8; |
| 12672 | unsigned int r1 : 4; |
| 12673 | unsigned int r3 : 4; |
| 12674 | unsigned int b2 : 4; |
| 12675 | unsigned int d2 : 12; |
| 12676 | unsigned int b4 : 4; |
| 12677 | unsigned int d4 : 12; |
| 12678 | } SS_RRRDRD2; |
| 12679 | struct { |
| 12680 | unsigned int op : 16; |
| 12681 | unsigned int b1 : 4; |
| 12682 | unsigned int d1 : 12; |
| 12683 | unsigned int b2 : 4; |
| 12684 | unsigned int d2 : 12; |
| 12685 | } SSE; |
| 12686 | struct { |
| 12687 | unsigned int op1 : 8; |
| 12688 | unsigned int r3 : 4; |
| 12689 | unsigned int op2 : 4; |
| 12690 | unsigned int b1 : 4; |
| 12691 | unsigned int d1 : 12; |
| 12692 | unsigned int b2 : 4; |
| 12693 | unsigned int d2 : 12; |
| 12694 | } SSF; |
| 12695 | struct { |
| 12696 | unsigned int op : 16; |
| 12697 | unsigned int b1 : 4; |
| 12698 | unsigned int d1 : 12; |
| 12699 | unsigned int i2 : 16; |
| 12700 | } SIL; |
| 12701 | } formats; |
| 12702 | union { |
| 12703 | formats fmt; |
| 12704 | ULong value; |
| 12705 | } ovl; |
| 12706 | |
| 12707 | vassert(sizeof(formats) == 6); |
| 12708 | |
| 12709 | ((char *)(&ovl.value))[0] = bytes[0]; |
| 12710 | ((char *)(&ovl.value))[1] = bytes[1]; |
| 12711 | ((char *)(&ovl.value))[2] = bytes[2]; |
| 12712 | ((char *)(&ovl.value))[3] = bytes[3]; |
| 12713 | ((char *)(&ovl.value))[4] = bytes[4]; |
| 12714 | ((char *)(&ovl.value))[5] = bytes[5]; |
| 12715 | ((char *)(&ovl.value))[6] = 0x0; |
| 12716 | ((char *)(&ovl.value))[7] = 0x0; |
| 12717 | |
| 12718 | switch ((ovl.value >> 16) & 0xff00000000ffULL) { |
| 12719 | case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1, |
| 12720 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12721 | ovl.fmt.RXY.dl2, |
| 12722 | ovl.fmt.RXY.dh2); goto ok; |
| 12723 | case 0xe30000000003ULL: /* LRAG */ goto unimplemented; |
| 12724 | case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1, |
| 12725 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12726 | ovl.fmt.RXY.dl2, |
| 12727 | ovl.fmt.RXY.dh2); goto ok; |
| 12728 | case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1, |
| 12729 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12730 | ovl.fmt.RXY.dl2, |
| 12731 | ovl.fmt.RXY.dh2); goto ok; |
| 12732 | case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1, |
| 12733 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12734 | ovl.fmt.RXY.dl2, |
| 12735 | ovl.fmt.RXY.dh2); goto ok; |
| 12736 | case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1, |
| 12737 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12738 | ovl.fmt.RXY.dl2, |
| 12739 | ovl.fmt.RXY.dh2); goto ok; |
| 12740 | case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1, |
| 12741 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12742 | ovl.fmt.RXY.dl2, |
| 12743 | ovl.fmt.RXY.dh2); goto ok; |
| 12744 | case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1, |
| 12745 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12746 | ovl.fmt.RXY.dl2, |
| 12747 | ovl.fmt.RXY.dh2); goto ok; |
| 12748 | case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1, |
| 12749 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12750 | ovl.fmt.RXY.dl2, |
| 12751 | ovl.fmt.RXY.dh2); goto ok; |
| 12752 | case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1, |
| 12753 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12754 | ovl.fmt.RXY.dl2, |
| 12755 | ovl.fmt.RXY.dh2); goto ok; |
| 12756 | case 0xe3000000000eULL: /* CVBG */ goto unimplemented; |
| 12757 | case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1, |
| 12758 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12759 | ovl.fmt.RXY.dl2, |
| 12760 | ovl.fmt.RXY.dh2); goto ok; |
| 12761 | case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1, |
| 12762 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12763 | ovl.fmt.RXY.dl2, |
| 12764 | ovl.fmt.RXY.dh2); goto ok; |
| 12765 | case 0xe30000000013ULL: /* LRAY */ goto unimplemented; |
| 12766 | case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1, |
| 12767 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12768 | ovl.fmt.RXY.dl2, |
| 12769 | ovl.fmt.RXY.dh2); goto ok; |
| 12770 | case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1, |
| 12771 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12772 | ovl.fmt.RXY.dl2, |
| 12773 | ovl.fmt.RXY.dh2); goto ok; |
| 12774 | case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1, |
| 12775 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12776 | ovl.fmt.RXY.dl2, |
| 12777 | ovl.fmt.RXY.dh2); goto ok; |
| 12778 | case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1, |
| 12779 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12780 | ovl.fmt.RXY.dl2, |
| 12781 | ovl.fmt.RXY.dh2); goto ok; |
| 12782 | case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1, |
| 12783 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12784 | ovl.fmt.RXY.dl2, |
| 12785 | ovl.fmt.RXY.dh2); goto ok; |
| 12786 | case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1, |
| 12787 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12788 | ovl.fmt.RXY.dl2, |
| 12789 | ovl.fmt.RXY.dh2); goto ok; |
| 12790 | case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1, |
| 12791 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12792 | ovl.fmt.RXY.dl2, |
| 12793 | ovl.fmt.RXY.dh2); goto ok; |
| 12794 | case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1, |
| 12795 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12796 | ovl.fmt.RXY.dl2, |
| 12797 | ovl.fmt.RXY.dh2); goto ok; |
| 12798 | case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1, |
| 12799 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12800 | ovl.fmt.RXY.dl2, |
| 12801 | ovl.fmt.RXY.dh2); goto ok; |
| 12802 | case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1, |
| 12803 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12804 | ovl.fmt.RXY.dl2, |
| 12805 | ovl.fmt.RXY.dh2); goto ok; |
| 12806 | case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1, |
| 12807 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12808 | ovl.fmt.RXY.dl2, |
| 12809 | ovl.fmt.RXY.dh2); goto ok; |
| 12810 | case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1, |
| 12811 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12812 | ovl.fmt.RXY.dl2, |
| 12813 | ovl.fmt.RXY.dh2); goto ok; |
| 12814 | case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1, |
| 12815 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12816 | ovl.fmt.RXY.dl2, |
| 12817 | ovl.fmt.RXY.dh2); goto ok; |
| 12818 | case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1, |
| 12819 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12820 | ovl.fmt.RXY.dl2, |
| 12821 | ovl.fmt.RXY.dh2); goto ok; |
| 12822 | case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1, |
| 12823 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12824 | ovl.fmt.RXY.dl2, |
| 12825 | ovl.fmt.RXY.dh2); goto ok; |
| 12826 | case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1, |
| 12827 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12828 | ovl.fmt.RXY.dl2, |
| 12829 | ovl.fmt.RXY.dh2); goto ok; |
| 12830 | case 0xe3000000002eULL: /* CVDG */ goto unimplemented; |
| 12831 | case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG, |
| 12832 | ovl.fmt.RXY.r1, ovl.fmt.RXY.x2, |
| 12833 | ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2, |
| 12834 | ovl.fmt.RXY.dh2); goto ok; |
| 12835 | case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1, |
| 12836 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12837 | ovl.fmt.RXY.dl2, |
| 12838 | ovl.fmt.RXY.dh2); goto ok; |
| 12839 | case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1, |
| 12840 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12841 | ovl.fmt.RXY.dl2, |
| 12842 | ovl.fmt.RXY.dh2); goto ok; |
| 12843 | case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1, |
| 12844 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12845 | ovl.fmt.RXY.dl2, |
| 12846 | ovl.fmt.RXY.dh2); goto ok; |
| 12847 | case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1, |
| 12848 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12849 | ovl.fmt.RXY.dl2, |
| 12850 | ovl.fmt.RXY.dh2); goto ok; |
| 12851 | case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1, |
| 12852 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12853 | ovl.fmt.RXY.dl2, |
| 12854 | ovl.fmt.RXY.dh2); goto ok; |
| 12855 | case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1, |
| 12856 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12857 | ovl.fmt.RXY.dl2, |
| 12858 | ovl.fmt.RXY.dh2); goto ok; |
| 12859 | case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH, |
| 12860 | ovl.fmt.RXY.r1, ovl.fmt.RXY.x2, |
| 12861 | ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2, |
| 12862 | ovl.fmt.RXY.dh2); goto ok; |
| 12863 | case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1, |
| 12864 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12865 | ovl.fmt.RXY.dl2, |
| 12866 | ovl.fmt.RXY.dh2); goto ok; |
| 12867 | case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1, |
| 12868 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12869 | ovl.fmt.RXY.dl2, |
| 12870 | ovl.fmt.RXY.dh2); goto ok; |
| 12871 | case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1, |
| 12872 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12873 | ovl.fmt.RXY.dl2, |
| 12874 | ovl.fmt.RXY.dh2); goto ok; |
| 12875 | case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1, |
| 12876 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12877 | ovl.fmt.RXY.dl2, |
| 12878 | ovl.fmt.RXY.dh2); goto ok; |
| 12879 | case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1, |
| 12880 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12881 | ovl.fmt.RXY.dl2, |
| 12882 | ovl.fmt.RXY.dh2); goto ok; |
| 12883 | case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1, |
| 12884 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12885 | ovl.fmt.RXY.dl2, |
| 12886 | ovl.fmt.RXY.dh2); goto ok; |
| 12887 | case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1, |
| 12888 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12889 | ovl.fmt.RXY.dl2, |
| 12890 | ovl.fmt.RXY.dh2); goto ok; |
| 12891 | case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1, |
| 12892 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12893 | ovl.fmt.RXY.dl2, |
| 12894 | ovl.fmt.RXY.dh2); goto ok; |
| 12895 | case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1, |
| 12896 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12897 | ovl.fmt.RXY.dl2, |
| 12898 | ovl.fmt.RXY.dh2); goto ok; |
| 12899 | case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1, |
| 12900 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12901 | ovl.fmt.RXY.dl2, |
| 12902 | ovl.fmt.RXY.dh2); goto ok; |
| 12903 | case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1, |
| 12904 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12905 | ovl.fmt.RXY.dl2, |
| 12906 | ovl.fmt.RXY.dh2); goto ok; |
| 12907 | case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1, |
| 12908 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12909 | ovl.fmt.RXY.dl2, |
| 12910 | ovl.fmt.RXY.dh2); goto ok; |
| 12911 | case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1, |
| 12912 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12913 | ovl.fmt.RXY.dl2, |
| 12914 | ovl.fmt.RXY.dh2); goto ok; |
| 12915 | case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1, |
| 12916 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12917 | ovl.fmt.RXY.dl2, |
| 12918 | ovl.fmt.RXY.dh2); goto ok; |
| 12919 | case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1, |
| 12920 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12921 | ovl.fmt.RXY.dl2, |
| 12922 | ovl.fmt.RXY.dh2); goto ok; |
| 12923 | case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1, |
| 12924 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12925 | ovl.fmt.RXY.dl2, |
| 12926 | ovl.fmt.RXY.dh2); goto ok; |
| 12927 | case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1, |
| 12928 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12929 | ovl.fmt.RXY.dl2, |
| 12930 | ovl.fmt.RXY.dh2); goto ok; |
| 12931 | case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1, |
| 12932 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12933 | ovl.fmt.RXY.dl2, |
| 12934 | ovl.fmt.RXY.dh2); goto ok; |
| 12935 | case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1, |
| 12936 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12937 | ovl.fmt.RXY.dl2, |
| 12938 | ovl.fmt.RXY.dh2); goto ok; |
| 12939 | case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1, |
| 12940 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12941 | ovl.fmt.RXY.dl2, |
| 12942 | ovl.fmt.RXY.dh2); goto ok; |
| 12943 | case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1, |
| 12944 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12945 | ovl.fmt.RXY.dl2, |
| 12946 | ovl.fmt.RXY.dh2); goto ok; |
| 12947 | case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1, |
| 12948 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12949 | ovl.fmt.RXY.dl2, |
| 12950 | ovl.fmt.RXY.dh2); goto ok; |
| 12951 | case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1, |
| 12952 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12953 | ovl.fmt.RXY.dl2, |
| 12954 | ovl.fmt.RXY.dh2); goto ok; |
| 12955 | case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1, |
| 12956 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12957 | ovl.fmt.RXY.dl2, |
| 12958 | ovl.fmt.RXY.dh2); goto ok; |
| 12959 | case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1, |
| 12960 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12961 | ovl.fmt.RXY.dl2, |
| 12962 | ovl.fmt.RXY.dh2); goto ok; |
| 12963 | case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1, |
| 12964 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12965 | ovl.fmt.RXY.dl2, |
| 12966 | ovl.fmt.RXY.dh2); goto ok; |
| 12967 | case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1, |
| 12968 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12969 | ovl.fmt.RXY.dl2, |
| 12970 | ovl.fmt.RXY.dh2); goto ok; |
| 12971 | case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1, |
| 12972 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12973 | ovl.fmt.RXY.dl2, |
| 12974 | ovl.fmt.RXY.dh2); goto ok; |
| 12975 | case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1, |
| 12976 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12977 | ovl.fmt.RXY.dl2, |
| 12978 | ovl.fmt.RXY.dh2); goto ok; |
| 12979 | case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1, |
| 12980 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12981 | ovl.fmt.RXY.dl2, |
| 12982 | ovl.fmt.RXY.dh2); goto ok; |
| 12983 | case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1, |
| 12984 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12985 | ovl.fmt.RXY.dl2, |
| 12986 | ovl.fmt.RXY.dh2); goto ok; |
| 12987 | case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1, |
| 12988 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12989 | ovl.fmt.RXY.dl2, |
| 12990 | ovl.fmt.RXY.dh2); goto ok; |
| 12991 | case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1, |
| 12992 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12993 | ovl.fmt.RXY.dl2, |
| 12994 | ovl.fmt.RXY.dh2); goto ok; |
| 12995 | case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1, |
| 12996 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 12997 | ovl.fmt.RXY.dl2, |
| 12998 | ovl.fmt.RXY.dh2); goto ok; |
| 12999 | case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1, |
| 13000 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13001 | ovl.fmt.RXY.dl2, |
| 13002 | ovl.fmt.RXY.dh2); goto ok; |
| 13003 | case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1, |
| 13004 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13005 | ovl.fmt.RXY.dl2, |
| 13006 | ovl.fmt.RXY.dh2); goto ok; |
| 13007 | case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1, |
| 13008 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13009 | ovl.fmt.RXY.dl2, |
| 13010 | ovl.fmt.RXY.dh2); goto ok; |
| 13011 | case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1, |
| 13012 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13013 | ovl.fmt.RXY.dl2, |
| 13014 | ovl.fmt.RXY.dh2); goto ok; |
| 13015 | case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1, |
| 13016 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13017 | ovl.fmt.RXY.dl2, |
| 13018 | ovl.fmt.RXY.dh2); goto ok; |
| 13019 | case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1, |
| 13020 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13021 | ovl.fmt.RXY.dl2, |
| 13022 | ovl.fmt.RXY.dh2); goto ok; |
| 13023 | case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1, |
| 13024 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13025 | ovl.fmt.RXY.dl2, |
| 13026 | ovl.fmt.RXY.dh2); goto ok; |
| 13027 | case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1, |
| 13028 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13029 | ovl.fmt.RXY.dl2, |
| 13030 | ovl.fmt.RXY.dh2); goto ok; |
| 13031 | case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1, |
| 13032 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13033 | ovl.fmt.RXY.dl2, |
| 13034 | ovl.fmt.RXY.dh2); goto ok; |
| 13035 | case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1, |
| 13036 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13037 | ovl.fmt.RXY.dl2, |
| 13038 | ovl.fmt.RXY.dh2); goto ok; |
| 13039 | case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1, |
| 13040 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13041 | ovl.fmt.RXY.dl2, |
| 13042 | ovl.fmt.RXY.dh2); goto ok; |
| 13043 | case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1, |
| 13044 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13045 | ovl.fmt.RXY.dl2, |
| 13046 | ovl.fmt.RXY.dh2); goto ok; |
| 13047 | case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1, |
| 13048 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13049 | ovl.fmt.RXY.dl2, |
| 13050 | ovl.fmt.RXY.dh2); goto ok; |
| 13051 | case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1, |
| 13052 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13053 | ovl.fmt.RXY.dl2, |
| 13054 | ovl.fmt.RXY.dh2); goto ok; |
| 13055 | case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1, |
| 13056 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13057 | ovl.fmt.RXY.dl2, |
| 13058 | ovl.fmt.RXY.dh2); goto ok; |
| 13059 | case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1, |
| 13060 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13061 | ovl.fmt.RXY.dl2, |
| 13062 | ovl.fmt.RXY.dh2); goto ok; |
| 13063 | case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1, |
| 13064 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13065 | ovl.fmt.RXY.dl2, |
| 13066 | ovl.fmt.RXY.dh2); goto ok; |
| 13067 | case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1, |
| 13068 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13069 | ovl.fmt.RXY.dl2, |
| 13070 | ovl.fmt.RXY.dh2); goto ok; |
| 13071 | case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1, |
| 13072 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13073 | ovl.fmt.RXY.dl2, |
| 13074 | ovl.fmt.RXY.dh2); goto ok; |
| 13075 | case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1, |
| 13076 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13077 | ovl.fmt.RSY.dl2, |
| 13078 | ovl.fmt.RSY.dh2); goto ok; |
| 13079 | case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1, |
| 13080 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13081 | ovl.fmt.RSY.dl2, |
| 13082 | ovl.fmt.RSY.dh2); goto ok; |
| 13083 | case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1, |
| 13084 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13085 | ovl.fmt.RSY.dl2, |
| 13086 | ovl.fmt.RSY.dh2); goto ok; |
| 13087 | case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1, |
| 13088 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13089 | ovl.fmt.RSY.dl2, |
| 13090 | ovl.fmt.RSY.dh2); goto ok; |
| 13091 | case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1, |
| 13092 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13093 | ovl.fmt.RSY.dl2, |
| 13094 | ovl.fmt.RSY.dh2); goto ok; |
| 13095 | case 0xeb000000000fULL: /* TRACG */ goto unimplemented; |
| 13096 | case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1, |
| 13097 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13098 | ovl.fmt.RSY.dl2, |
| 13099 | ovl.fmt.RSY.dh2); goto ok; |
| 13100 | case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1, |
| 13101 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13102 | ovl.fmt.RSY.dl2, |
| 13103 | ovl.fmt.RSY.dh2); goto ok; |
| 13104 | case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1, |
| 13105 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13106 | ovl.fmt.RSY.dl2, |
| 13107 | ovl.fmt.RSY.dh2); goto ok; |
| 13108 | case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1, |
| 13109 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13110 | ovl.fmt.RSY.dl2, |
| 13111 | ovl.fmt.RSY.dh2); goto ok; |
| 13112 | case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1, |
| 13113 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13114 | ovl.fmt.RSY.dl2, |
| 13115 | ovl.fmt.RSY.dh2); goto ok; |
| 13116 | case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1, |
| 13117 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13118 | ovl.fmt.RSY.dl2, |
| 13119 | ovl.fmt.RSY.dh2); goto ok; |
| 13120 | case 0xeb0000000025ULL: /* STCTG */ goto unimplemented; |
| 13121 | case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1, |
| 13122 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13123 | ovl.fmt.RSY.dl2, |
| 13124 | ovl.fmt.RSY.dh2); goto ok; |
| 13125 | case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH, |
| 13126 | ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, |
| 13127 | ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, |
| 13128 | ovl.fmt.RSY.dh2); goto ok; |
| 13129 | case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY, |
| 13130 | ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, |
| 13131 | ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, |
| 13132 | ovl.fmt.RSY.dh2); goto ok; |
| 13133 | case 0xeb000000002fULL: /* LCTLG */ goto unimplemented; |
| 13134 | case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1, |
| 13135 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13136 | ovl.fmt.RSY.dl2, |
| 13137 | ovl.fmt.RSY.dh2); goto ok; |
florian | 448cbba | 2012-06-06 02:26:01 +0000 | [diff] [blame] | 13138 | case 0xeb0000000031ULL: s390_format_RSY_RRRD(s390_irgen_CDSY, ovl.fmt.RSY.r1, |
| 13139 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13140 | ovl.fmt.RSY.dl2, |
| 13141 | ovl.fmt.RSY.dh2); goto ok; |
| 13142 | case 0xeb000000003eULL: s390_format_RSY_RRRD(s390_irgen_CDSG, ovl.fmt.RSY.r1, |
| 13143 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13144 | ovl.fmt.RSY.dl2, |
| 13145 | ovl.fmt.RSY.dh2); goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13146 | case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1, |
| 13147 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13148 | ovl.fmt.RSY.dl2, |
| 13149 | ovl.fmt.RSY.dh2); goto ok; |
| 13150 | case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG, |
| 13151 | ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, |
| 13152 | ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, |
| 13153 | ovl.fmt.RSY.dh2); goto ok; |
| 13154 | case 0xeb000000004cULL: /* ECAG */ goto unimplemented; |
| 13155 | case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2, |
| 13156 | ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, |
| 13157 | ovl.fmt.SIY.dh1); goto ok; |
| 13158 | case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2, |
| 13159 | ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, |
| 13160 | ovl.fmt.SIY.dh1); goto ok; |
| 13161 | case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2, |
| 13162 | ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, |
| 13163 | ovl.fmt.SIY.dh1); goto ok; |
| 13164 | case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2, |
| 13165 | ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, |
| 13166 | ovl.fmt.SIY.dh1); goto ok; |
| 13167 | case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2, |
| 13168 | ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, |
| 13169 | ovl.fmt.SIY.dh1); goto ok; |
| 13170 | case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2, |
| 13171 | ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, |
| 13172 | ovl.fmt.SIY.dh1); goto ok; |
| 13173 | case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2, |
| 13174 | ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, |
| 13175 | ovl.fmt.SIY.dh1); goto ok; |
| 13176 | case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2, |
| 13177 | ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, |
| 13178 | ovl.fmt.SIY.dh1); goto ok; |
| 13179 | case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2, |
| 13180 | ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, |
| 13181 | ovl.fmt.SIY.dh1); goto ok; |
| 13182 | case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2, |
| 13183 | ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, |
| 13184 | ovl.fmt.SIY.dh1); goto ok; |
| 13185 | case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1, |
| 13186 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13187 | ovl.fmt.RSY.dl2, |
| 13188 | ovl.fmt.RSY.dh2); goto ok; |
| 13189 | case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1, |
| 13190 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13191 | ovl.fmt.RSY.dl2, |
| 13192 | ovl.fmt.RSY.dh2); goto ok; |
| 13193 | case 0xeb000000008eULL: /* MVCLU */ goto unimplemented; |
| 13194 | case 0xeb000000008fULL: /* CLCLU */ goto unimplemented; |
| 13195 | case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1, |
| 13196 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13197 | ovl.fmt.RSY.dl2, |
| 13198 | ovl.fmt.RSY.dh2); goto ok; |
| 13199 | case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1, |
| 13200 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13201 | ovl.fmt.RSY.dl2, |
| 13202 | ovl.fmt.RSY.dh2); goto ok; |
| 13203 | case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1, |
| 13204 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13205 | ovl.fmt.RSY.dl2, |
| 13206 | ovl.fmt.RSY.dh2); goto ok; |
| 13207 | case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1, |
| 13208 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13209 | ovl.fmt.RSY.dl2, |
| 13210 | ovl.fmt.RSY.dh2); goto ok; |
| 13211 | case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY, |
| 13212 | ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, |
| 13213 | ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, |
| 13214 | ovl.fmt.RSY.dh2); goto ok; |
| 13215 | case 0xeb00000000c0ULL: /* TP */ goto unimplemented; |
| 13216 | case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1, |
| 13217 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13218 | ovl.fmt.RSY.dl2, |
| 13219 | ovl.fmt.RSY.dh2); goto ok; |
| 13220 | case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1, |
| 13221 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13222 | ovl.fmt.RSY.dl2, |
| 13223 | ovl.fmt.RSY.dh2); goto ok; |
| 13224 | case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1, |
| 13225 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13226 | ovl.fmt.RSY.dl2, |
| 13227 | ovl.fmt.RSY.dh2); goto ok; |
| 13228 | case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1, |
| 13229 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13230 | ovl.fmt.RSY.dl2, |
| 13231 | ovl.fmt.RSY.dh2); goto ok; |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 13232 | case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1, |
| 13233 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13234 | ovl.fmt.RSY.dl2, |
| 13235 | ovl.fmt.RSY.dh2, |
| 13236 | S390_XMNM_LOCG); goto ok; |
| 13237 | case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG, |
| 13238 | ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, |
| 13239 | ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, |
| 13240 | ovl.fmt.RSY.dh2, |
| 13241 | S390_XMNM_STOCG); goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13242 | case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1, |
| 13243 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13244 | ovl.fmt.RSY.dl2, |
| 13245 | ovl.fmt.RSY.dh2); goto ok; |
| 13246 | case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1, |
| 13247 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13248 | ovl.fmt.RSY.dl2, |
| 13249 | ovl.fmt.RSY.dh2); goto ok; |
| 13250 | case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1, |
| 13251 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13252 | ovl.fmt.RSY.dl2, |
| 13253 | ovl.fmt.RSY.dh2); goto ok; |
| 13254 | case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1, |
| 13255 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13256 | ovl.fmt.RSY.dl2, |
| 13257 | ovl.fmt.RSY.dh2); goto ok; |
| 13258 | case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG, |
| 13259 | ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, |
| 13260 | ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, |
| 13261 | ovl.fmt.RSY.dh2); goto ok; |
sewardj | d7bde72 | 2011-04-05 13:19:33 +0000 | [diff] [blame] | 13262 | case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1, |
| 13263 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13264 | ovl.fmt.RSY.dl2, |
| 13265 | ovl.fmt.RSY.dh2, S390_XMNM_LOC); |
| 13266 | goto ok; |
| 13267 | case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1, |
| 13268 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13269 | ovl.fmt.RSY.dl2, |
| 13270 | ovl.fmt.RSY.dh2, |
| 13271 | S390_XMNM_STOC); goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13272 | case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1, |
| 13273 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13274 | ovl.fmt.RSY.dl2, |
| 13275 | ovl.fmt.RSY.dh2); goto ok; |
| 13276 | case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1, |
| 13277 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13278 | ovl.fmt.RSY.dl2, |
| 13279 | ovl.fmt.RSY.dh2); goto ok; |
| 13280 | case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1, |
| 13281 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13282 | ovl.fmt.RSY.dl2, |
| 13283 | ovl.fmt.RSY.dh2); goto ok; |
| 13284 | case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1, |
| 13285 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13286 | ovl.fmt.RSY.dl2, |
| 13287 | ovl.fmt.RSY.dh2); goto ok; |
| 13288 | case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1, |
| 13289 | ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, |
| 13290 | ovl.fmt.RSY.dl2, |
| 13291 | ovl.fmt.RSY.dh2); goto ok; |
| 13292 | case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1, |
| 13293 | ovl.fmt.RIE.r3, ovl.fmt.RIE.i2); |
| 13294 | goto ok; |
| 13295 | case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1, |
| 13296 | ovl.fmt.RIE.r3, ovl.fmt.RIE.i2); |
| 13297 | goto ok; |
| 13298 | case 0xec0000000051ULL: /* RISBLG */ goto unimplemented; |
| 13299 | case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG, |
| 13300 | ovl.fmt.RIE_RRUUU.r1, |
| 13301 | ovl.fmt.RIE_RRUUU.r2, |
| 13302 | ovl.fmt.RIE_RRUUU.i3, |
| 13303 | ovl.fmt.RIE_RRUUU.i4, |
| 13304 | ovl.fmt.RIE_RRUUU.i5); |
| 13305 | goto ok; |
| 13306 | case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG, |
| 13307 | ovl.fmt.RIE_RRUUU.r1, |
| 13308 | ovl.fmt.RIE_RRUUU.r2, |
| 13309 | ovl.fmt.RIE_RRUUU.i3, |
| 13310 | ovl.fmt.RIE_RRUUU.i4, |
| 13311 | ovl.fmt.RIE_RRUUU.i5); |
| 13312 | goto ok; |
| 13313 | case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG, |
| 13314 | ovl.fmt.RIE_RRUUU.r1, |
| 13315 | ovl.fmt.RIE_RRUUU.r2, |
| 13316 | ovl.fmt.RIE_RRUUU.i3, |
| 13317 | ovl.fmt.RIE_RRUUU.i4, |
| 13318 | ovl.fmt.RIE_RRUUU.i5); |
| 13319 | goto ok; |
| 13320 | case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG, |
| 13321 | ovl.fmt.RIE_RRUUU.r1, |
| 13322 | ovl.fmt.RIE_RRUUU.r2, |
| 13323 | ovl.fmt.RIE_RRUUU.i3, |
| 13324 | ovl.fmt.RIE_RRUUU.i4, |
| 13325 | ovl.fmt.RIE_RRUUU.i5); |
| 13326 | goto ok; |
| 13327 | case 0xec000000005dULL: /* RISBHG */ goto unimplemented; |
| 13328 | case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ, |
| 13329 | ovl.fmt.RIE_RRPU.r1, |
| 13330 | ovl.fmt.RIE_RRPU.r2, |
| 13331 | ovl.fmt.RIE_RRPU.i4, |
| 13332 | ovl.fmt.RIE_RRPU.m3); goto ok; |
| 13333 | case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ, |
| 13334 | ovl.fmt.RIE_RRPU.r1, |
| 13335 | ovl.fmt.RIE_RRPU.r2, |
| 13336 | ovl.fmt.RIE_RRPU.i4, |
| 13337 | ovl.fmt.RIE_RRPU.m3); goto ok; |
| 13338 | case 0xec0000000070ULL: /* CGIT */ goto unimplemented; |
| 13339 | case 0xec0000000071ULL: /* CLGIT */ goto unimplemented; |
| 13340 | case 0xec0000000072ULL: /* CIT */ goto unimplemented; |
| 13341 | case 0xec0000000073ULL: /* CLFIT */ goto unimplemented; |
| 13342 | case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ, |
| 13343 | ovl.fmt.RIE_RRPU.r1, |
| 13344 | ovl.fmt.RIE_RRPU.r2, |
| 13345 | ovl.fmt.RIE_RRPU.i4, |
| 13346 | ovl.fmt.RIE_RRPU.m3); goto ok; |
| 13347 | case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ, |
| 13348 | ovl.fmt.RIE_RRPU.r1, |
| 13349 | ovl.fmt.RIE_RRPU.r2, |
| 13350 | ovl.fmt.RIE_RRPU.i4, |
| 13351 | ovl.fmt.RIE_RRPU.m3); goto ok; |
| 13352 | case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ, |
| 13353 | ovl.fmt.RIEv3.r1, |
| 13354 | ovl.fmt.RIEv3.m3, |
| 13355 | ovl.fmt.RIEv3.i4, |
| 13356 | ovl.fmt.RIEv3.i2); goto ok; |
| 13357 | case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ, |
| 13358 | ovl.fmt.RIEv3.r1, |
| 13359 | ovl.fmt.RIEv3.m3, |
| 13360 | ovl.fmt.RIEv3.i4, |
| 13361 | ovl.fmt.RIEv3.i2); goto ok; |
| 13362 | case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ, |
| 13363 | ovl.fmt.RIEv3.r1, |
| 13364 | ovl.fmt.RIEv3.m3, |
| 13365 | ovl.fmt.RIEv3.i4, |
| 13366 | ovl.fmt.RIEv3.i2); goto ok; |
| 13367 | case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ, |
| 13368 | ovl.fmt.RIEv3.r1, |
| 13369 | ovl.fmt.RIEv3.m3, |
| 13370 | ovl.fmt.RIEv3.i4, |
| 13371 | ovl.fmt.RIEv3.i2); goto ok; |
| 13372 | case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1, |
| 13373 | ovl.fmt.RIE.r3, ovl.fmt.RIE.i2); |
| 13374 | goto ok; |
| 13375 | case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK, |
| 13376 | ovl.fmt.RIE.r1, ovl.fmt.RIE.r3, |
| 13377 | ovl.fmt.RIE.i2); goto ok; |
| 13378 | case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK, |
| 13379 | ovl.fmt.RIE.r1, ovl.fmt.RIE.r3, |
| 13380 | ovl.fmt.RIE.i2); goto ok; |
| 13381 | case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK, |
| 13382 | ovl.fmt.RIE.r1, ovl.fmt.RIE.r3, |
| 13383 | ovl.fmt.RIE.i2); goto ok; |
| 13384 | case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1, |
| 13385 | ovl.fmt.RRS.r2, ovl.fmt.RRS.b4, |
| 13386 | ovl.fmt.RRS.d4, ovl.fmt.RRS.m3); |
| 13387 | goto ok; |
| 13388 | case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1, |
| 13389 | ovl.fmt.RRS.r2, ovl.fmt.RRS.b4, |
| 13390 | ovl.fmt.RRS.d4, ovl.fmt.RRS.m3); |
| 13391 | goto ok; |
| 13392 | case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1, |
| 13393 | ovl.fmt.RRS.r2, ovl.fmt.RRS.b4, |
| 13394 | ovl.fmt.RRS.d4, ovl.fmt.RRS.m3); |
| 13395 | goto ok; |
| 13396 | case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1, |
| 13397 | ovl.fmt.RRS.r2, ovl.fmt.RRS.b4, |
| 13398 | ovl.fmt.RRS.d4, ovl.fmt.RRS.m3); |
| 13399 | goto ok; |
| 13400 | case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB, |
| 13401 | ovl.fmt.RIS.r1, ovl.fmt.RIS.m3, |
| 13402 | ovl.fmt.RIS.b4, ovl.fmt.RIS.d4, |
| 13403 | ovl.fmt.RIS.i2); goto ok; |
| 13404 | case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB, |
| 13405 | ovl.fmt.RIS.r1, ovl.fmt.RIS.m3, |
| 13406 | ovl.fmt.RIS.b4, ovl.fmt.RIS.d4, |
| 13407 | ovl.fmt.RIS.i2); goto ok; |
| 13408 | case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1, |
| 13409 | ovl.fmt.RIS.m3, ovl.fmt.RIS.b4, |
| 13410 | ovl.fmt.RIS.d4, |
| 13411 | ovl.fmt.RIS.i2); goto ok; |
| 13412 | case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB, |
| 13413 | ovl.fmt.RIS.r1, ovl.fmt.RIS.m3, |
| 13414 | ovl.fmt.RIS.b4, ovl.fmt.RIS.d4, |
| 13415 | ovl.fmt.RIS.i2); goto ok; |
| 13416 | case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1, |
| 13417 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13418 | ovl.fmt.RXE.d2); goto ok; |
| 13419 | case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1, |
| 13420 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13421 | ovl.fmt.RXE.d2); goto ok; |
| 13422 | case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1, |
| 13423 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13424 | ovl.fmt.RXE.d2); goto ok; |
| 13425 | case 0xed0000000007ULL: /* MXDB */ goto unimplemented; |
| 13426 | case 0xed0000000008ULL: /* KEB */ goto unimplemented; |
| 13427 | case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1, |
| 13428 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13429 | ovl.fmt.RXE.d2); goto ok; |
| 13430 | case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1, |
| 13431 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13432 | ovl.fmt.RXE.d2); goto ok; |
| 13433 | case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1, |
| 13434 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13435 | ovl.fmt.RXE.d2); goto ok; |
| 13436 | case 0xed000000000cULL: /* MDEB */ goto unimplemented; |
| 13437 | case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1, |
| 13438 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13439 | ovl.fmt.RXE.d2); goto ok; |
| 13440 | case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB, |
| 13441 | ovl.fmt.RXF.r3, ovl.fmt.RXF.x2, |
| 13442 | ovl.fmt.RXF.b2, ovl.fmt.RXF.d2, |
| 13443 | ovl.fmt.RXF.r1); goto ok; |
| 13444 | case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB, |
| 13445 | ovl.fmt.RXF.r3, ovl.fmt.RXF.x2, |
| 13446 | ovl.fmt.RXF.b2, ovl.fmt.RXF.d2, |
| 13447 | ovl.fmt.RXF.r1); goto ok; |
| 13448 | case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1, |
| 13449 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13450 | ovl.fmt.RXE.d2); goto ok; |
| 13451 | case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1, |
| 13452 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13453 | ovl.fmt.RXE.d2); goto ok; |
| 13454 | case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1, |
| 13455 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13456 | ovl.fmt.RXE.d2); goto ok; |
| 13457 | case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1, |
| 13458 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13459 | ovl.fmt.RXE.d2); goto ok; |
| 13460 | case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1, |
| 13461 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13462 | ovl.fmt.RXE.d2); goto ok; |
| 13463 | case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1, |
| 13464 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13465 | ovl.fmt.RXE.d2); goto ok; |
| 13466 | case 0xed0000000018ULL: /* KDB */ goto unimplemented; |
| 13467 | case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1, |
| 13468 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13469 | ovl.fmt.RXE.d2); goto ok; |
| 13470 | case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1, |
| 13471 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13472 | ovl.fmt.RXE.d2); goto ok; |
| 13473 | case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1, |
| 13474 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13475 | ovl.fmt.RXE.d2); goto ok; |
| 13476 | case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1, |
| 13477 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13478 | ovl.fmt.RXE.d2); goto ok; |
| 13479 | case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1, |
| 13480 | ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, |
| 13481 | ovl.fmt.RXE.d2); goto ok; |
| 13482 | case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB, |
| 13483 | ovl.fmt.RXF.r3, ovl.fmt.RXF.x2, |
| 13484 | ovl.fmt.RXF.b2, ovl.fmt.RXF.d2, |
| 13485 | ovl.fmt.RXF.r1); goto ok; |
| 13486 | case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB, |
| 13487 | ovl.fmt.RXF.r3, ovl.fmt.RXF.x2, |
| 13488 | ovl.fmt.RXF.b2, ovl.fmt.RXF.d2, |
| 13489 | ovl.fmt.RXF.r1); goto ok; |
| 13490 | case 0xed0000000024ULL: /* LDE */ goto unimplemented; |
| 13491 | case 0xed0000000025ULL: /* LXD */ goto unimplemented; |
| 13492 | case 0xed0000000026ULL: /* LXE */ goto unimplemented; |
| 13493 | case 0xed000000002eULL: /* MAE */ goto unimplemented; |
| 13494 | case 0xed000000002fULL: /* MSE */ goto unimplemented; |
| 13495 | case 0xed0000000034ULL: /* SQE */ goto unimplemented; |
| 13496 | case 0xed0000000035ULL: /* SQD */ goto unimplemented; |
| 13497 | case 0xed0000000037ULL: /* MEE */ goto unimplemented; |
| 13498 | case 0xed0000000038ULL: /* MAYL */ goto unimplemented; |
| 13499 | case 0xed0000000039ULL: /* MYL */ goto unimplemented; |
| 13500 | case 0xed000000003aULL: /* MAY */ goto unimplemented; |
| 13501 | case 0xed000000003bULL: /* MY */ goto unimplemented; |
| 13502 | case 0xed000000003cULL: /* MAYH */ goto unimplemented; |
| 13503 | case 0xed000000003dULL: /* MYH */ goto unimplemented; |
| 13504 | case 0xed000000003eULL: /* MAD */ goto unimplemented; |
| 13505 | case 0xed000000003fULL: /* MSD */ goto unimplemented; |
| 13506 | case 0xed0000000040ULL: /* SLDT */ goto unimplemented; |
| 13507 | case 0xed0000000041ULL: /* SRDT */ goto unimplemented; |
| 13508 | case 0xed0000000048ULL: /* SLXT */ goto unimplemented; |
| 13509 | case 0xed0000000049ULL: /* SRXT */ goto unimplemented; |
| 13510 | case 0xed0000000050ULL: /* TDCET */ goto unimplemented; |
| 13511 | case 0xed0000000051ULL: /* TDGET */ goto unimplemented; |
| 13512 | case 0xed0000000054ULL: /* TDCDT */ goto unimplemented; |
| 13513 | case 0xed0000000055ULL: /* TDGDT */ goto unimplemented; |
| 13514 | case 0xed0000000058ULL: /* TDCXT */ goto unimplemented; |
| 13515 | case 0xed0000000059ULL: /* TDGXT */ goto unimplemented; |
| 13516 | case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1, |
| 13517 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13518 | ovl.fmt.RXY.dl2, |
| 13519 | ovl.fmt.RXY.dh2); goto ok; |
| 13520 | case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1, |
| 13521 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13522 | ovl.fmt.RXY.dl2, |
| 13523 | ovl.fmt.RXY.dh2); goto ok; |
| 13524 | case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1, |
| 13525 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13526 | ovl.fmt.RXY.dl2, |
| 13527 | ovl.fmt.RXY.dh2); goto ok; |
| 13528 | case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1, |
| 13529 | ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, |
| 13530 | ovl.fmt.RXY.dl2, |
| 13531 | ovl.fmt.RXY.dh2); goto ok; |
| 13532 | } |
| 13533 | |
| 13534 | switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) { |
| 13535 | case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1, |
| 13536 | ovl.fmt.RIL.i2); goto ok; |
| 13537 | case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1, |
| 13538 | ovl.fmt.RIL.i2); goto ok; |
| 13539 | case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1, |
| 13540 | ovl.fmt.RIL.i2); goto ok; |
| 13541 | case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1, |
| 13542 | ovl.fmt.RIL.i2); goto ok; |
| 13543 | case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1, |
| 13544 | ovl.fmt.RIL.i2); goto ok; |
| 13545 | case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1, |
| 13546 | ovl.fmt.RIL.i2); goto ok; |
| 13547 | case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1, |
| 13548 | ovl.fmt.RIL.i2); goto ok; |
| 13549 | case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1, |
| 13550 | ovl.fmt.RIL.i2); goto ok; |
| 13551 | case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1, |
| 13552 | ovl.fmt.RIL.i2); goto ok; |
| 13553 | case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1, |
| 13554 | ovl.fmt.RIL.i2); goto ok; |
| 13555 | case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1, |
| 13556 | ovl.fmt.RIL.i2); goto ok; |
| 13557 | case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1, |
| 13558 | ovl.fmt.RIL.i2); goto ok; |
| 13559 | case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1, |
| 13560 | ovl.fmt.RIL.i2); goto ok; |
| 13561 | case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1, |
| 13562 | ovl.fmt.RIL.i2); goto ok; |
| 13563 | case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1, |
| 13564 | ovl.fmt.RIL.i2); goto ok; |
| 13565 | case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1, |
| 13566 | ovl.fmt.RIL.i2); goto ok; |
| 13567 | case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1, |
| 13568 | ovl.fmt.RIL.i2); goto ok; |
| 13569 | case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1, |
| 13570 | ovl.fmt.RIL.i2); goto ok; |
| 13571 | case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1, |
| 13572 | ovl.fmt.RIL.i2); goto ok; |
| 13573 | case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1, |
| 13574 | ovl.fmt.RIL.i2); goto ok; |
| 13575 | case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1, |
| 13576 | ovl.fmt.RIL.i2); goto ok; |
| 13577 | case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1, |
| 13578 | ovl.fmt.RIL.i2); goto ok; |
| 13579 | case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1, |
| 13580 | ovl.fmt.RIL.i2); goto ok; |
| 13581 | case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1, |
| 13582 | ovl.fmt.RIL.i2); goto ok; |
| 13583 | case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1, |
| 13584 | ovl.fmt.RIL.i2); goto ok; |
| 13585 | case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1, |
| 13586 | ovl.fmt.RIL.i2); goto ok; |
| 13587 | case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1, |
| 13588 | ovl.fmt.RIL.i2); goto ok; |
| 13589 | case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1, |
| 13590 | ovl.fmt.RIL.i2); goto ok; |
| 13591 | case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1, |
| 13592 | ovl.fmt.RIL.i2); goto ok; |
| 13593 | case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1, |
| 13594 | ovl.fmt.RIL.i2); goto ok; |
| 13595 | case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1, |
| 13596 | ovl.fmt.RIL.i2); goto ok; |
| 13597 | case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1, |
| 13598 | ovl.fmt.RIL.i2); goto ok; |
| 13599 | case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1, |
| 13600 | ovl.fmt.RIL.i2); goto ok; |
| 13601 | case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1, |
| 13602 | ovl.fmt.RIL.i2); goto ok; |
| 13603 | case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1, |
| 13604 | ovl.fmt.RIL.i2); goto ok; |
| 13605 | case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1, |
| 13606 | ovl.fmt.RIL.i2); goto ok; |
| 13607 | case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1, |
| 13608 | ovl.fmt.RIL.i2); goto ok; |
| 13609 | case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1, |
| 13610 | ovl.fmt.RIL.i2); goto ok; |
| 13611 | case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1, |
| 13612 | ovl.fmt.RIL.i2); goto ok; |
| 13613 | case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1, |
| 13614 | ovl.fmt.RIL.i2); goto ok; |
| 13615 | case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1, |
| 13616 | ovl.fmt.RIL.i2); goto ok; |
| 13617 | case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1, |
| 13618 | ovl.fmt.RIL.i2); goto ok; |
| 13619 | case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1, |
| 13620 | ovl.fmt.RIL.i2); goto ok; |
| 13621 | case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1, |
| 13622 | ovl.fmt.RIL.i2); goto ok; |
| 13623 | case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1, |
| 13624 | ovl.fmt.RIL.i2); goto ok; |
| 13625 | case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1, |
| 13626 | ovl.fmt.RIL.i2); goto ok; |
| 13627 | case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1, |
| 13628 | ovl.fmt.RIL.i2); goto ok; |
| 13629 | case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1, |
| 13630 | ovl.fmt.RIL.i2); goto ok; |
| 13631 | case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1, |
| 13632 | ovl.fmt.RIL.i2); goto ok; |
| 13633 | case 0xc800ULL: /* MVCOS */ goto unimplemented; |
| 13634 | case 0xc801ULL: /* ECTG */ goto unimplemented; |
| 13635 | case 0xc802ULL: /* CSST */ goto unimplemented; |
| 13636 | case 0xc804ULL: /* LPD */ goto unimplemented; |
| 13637 | case 0xc805ULL: /* LPDG */ goto unimplemented; |
| 13638 | case 0xcc06ULL: /* BRCTH */ goto unimplemented; |
| 13639 | case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1, |
| 13640 | ovl.fmt.RIL.i2); goto ok; |
| 13641 | case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1, |
| 13642 | ovl.fmt.RIL.i2); goto ok; |
| 13643 | case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1, |
| 13644 | ovl.fmt.RIL.i2); goto ok; |
| 13645 | case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1, |
| 13646 | ovl.fmt.RIL.i2); goto ok; |
| 13647 | case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1, |
| 13648 | ovl.fmt.RIL.i2); goto ok; |
| 13649 | } |
| 13650 | |
| 13651 | switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) { |
| 13652 | case 0xd0ULL: /* TRTR */ goto unimplemented; |
| 13653 | case 0xd1ULL: /* MVN */ goto unimplemented; |
| 13654 | case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l, |
| 13655 | ovl.fmt.SS.b1, ovl.fmt.SS.d1, |
| 13656 | ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok; |
| 13657 | case 0xd3ULL: /* MVZ */ goto unimplemented; |
| 13658 | case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l, |
| 13659 | ovl.fmt.SS.b1, ovl.fmt.SS.d1, |
| 13660 | ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok; |
| 13661 | case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l, |
| 13662 | ovl.fmt.SS.b1, ovl.fmt.SS.d1, |
| 13663 | ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok; |
| 13664 | case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l, |
| 13665 | ovl.fmt.SS.b1, ovl.fmt.SS.d1, |
| 13666 | ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok; |
sewardj | b63967e | 2011-03-24 08:50:04 +0000 | [diff] [blame] | 13667 | case 0xd7ULL: |
| 13668 | if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2) |
| 13669 | s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1); |
| 13670 | else |
| 13671 | s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l, |
| 13672 | ovl.fmt.SS.b1, ovl.fmt.SS.d1, |
| 13673 | ovl.fmt.SS.b2, ovl.fmt.SS.d2); |
| 13674 | goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13675 | case 0xd9ULL: /* MVCK */ goto unimplemented; |
| 13676 | case 0xdaULL: /* MVCP */ goto unimplemented; |
| 13677 | case 0xdbULL: /* MVCS */ goto unimplemented; |
florian | 730448f | 2012-02-04 17:07:07 +0000 | [diff] [blame] | 13678 | case 0xdcULL: s390_format_SS_L0RDRD(s390_irgen_TR, ovl.fmt.SS.l, |
| 13679 | ovl.fmt.SS.b1, ovl.fmt.SS.d1, |
| 13680 | ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13681 | case 0xddULL: /* TRT */ goto unimplemented; |
| 13682 | case 0xdeULL: /* ED */ goto unimplemented; |
| 13683 | case 0xdfULL: /* EDMK */ goto unimplemented; |
| 13684 | case 0xe1ULL: /* PKU */ goto unimplemented; |
| 13685 | case 0xe2ULL: /* UNPKU */ goto unimplemented; |
| 13686 | case 0xe8ULL: /* MVCIN */ goto unimplemented; |
| 13687 | case 0xe9ULL: /* PKA */ goto unimplemented; |
| 13688 | case 0xeaULL: /* UNPKA */ goto unimplemented; |
| 13689 | case 0xeeULL: /* PLO */ goto unimplemented; |
| 13690 | case 0xefULL: /* LMD */ goto unimplemented; |
| 13691 | case 0xf0ULL: /* SRP */ goto unimplemented; |
| 13692 | case 0xf1ULL: /* MVO */ goto unimplemented; |
| 13693 | case 0xf2ULL: /* PACK */ goto unimplemented; |
| 13694 | case 0xf3ULL: /* UNPK */ goto unimplemented; |
| 13695 | case 0xf8ULL: /* ZAP */ goto unimplemented; |
| 13696 | case 0xf9ULL: /* CP */ goto unimplemented; |
| 13697 | case 0xfaULL: /* AP */ goto unimplemented; |
| 13698 | case 0xfbULL: /* SP */ goto unimplemented; |
| 13699 | case 0xfcULL: /* MP */ goto unimplemented; |
| 13700 | case 0xfdULL: /* DP */ goto unimplemented; |
| 13701 | } |
| 13702 | |
| 13703 | switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) { |
| 13704 | case 0xe500ULL: /* LASP */ goto unimplemented; |
| 13705 | case 0xe501ULL: /* TPROT */ goto unimplemented; |
| 13706 | case 0xe502ULL: /* STRAG */ goto unimplemented; |
| 13707 | case 0xe50eULL: /* MVCSK */ goto unimplemented; |
| 13708 | case 0xe50fULL: /* MVCDK */ goto unimplemented; |
| 13709 | case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1, |
| 13710 | ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); |
| 13711 | goto ok; |
| 13712 | case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1, |
| 13713 | ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); |
| 13714 | goto ok; |
| 13715 | case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1, |
| 13716 | ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); |
| 13717 | goto ok; |
| 13718 | case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1, |
| 13719 | ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); |
| 13720 | goto ok; |
| 13721 | case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1, |
| 13722 | ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); |
| 13723 | goto ok; |
| 13724 | case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1, |
| 13725 | ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); |
| 13726 | goto ok; |
| 13727 | case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1, |
| 13728 | ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); |
| 13729 | goto ok; |
| 13730 | case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1, |
| 13731 | ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); |
| 13732 | goto ok; |
| 13733 | case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1, |
| 13734 | ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); |
| 13735 | goto ok; |
| 13736 | } |
| 13737 | |
| 13738 | return S390_DECODE_UNKNOWN_INSN; |
| 13739 | |
| 13740 | ok: |
| 13741 | return S390_DECODE_OK; |
| 13742 | |
| 13743 | unimplemented: |
| 13744 | return S390_DECODE_UNIMPLEMENTED_INSN; |
| 13745 | } |
| 13746 | |
| 13747 | /* Handle "special" instructions. */ |
| 13748 | static s390_decode_t |
| 13749 | s390_decode_special_and_irgen(UChar *bytes) |
| 13750 | { |
| 13751 | s390_decode_t status = S390_DECODE_OK; |
| 13752 | |
| 13753 | /* Got a "Special" instruction preamble. Which one is it? */ |
| 13754 | if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) { |
| 13755 | s390_irgen_client_request(); |
| 13756 | } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) { |
| 13757 | s390_irgen_guest_NRADDR(); |
| 13758 | } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) { |
| 13759 | s390_irgen_call_noredir(); |
| 13760 | } else { |
| 13761 | /* We don't know what it is. */ |
| 13762 | return S390_DECODE_UNKNOWN_SPECIAL_INSN; |
| 13763 | } |
| 13764 | |
| 13765 | dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE; |
| 13766 | |
| 13767 | return status; |
| 13768 | } |
| 13769 | |
| 13770 | |
| 13771 | /* Function returns # bytes that were decoded or 0 in case of failure */ |
florian | b4df768 | 2011-07-05 02:09:01 +0000 | [diff] [blame] | 13772 | static UInt |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13773 | s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres) |
| 13774 | { |
| 13775 | s390_decode_t status; |
| 13776 | |
| 13777 | dis_res = dres; |
| 13778 | |
| 13779 | /* Spot the 8-byte preamble: 18ff lr r15,r15 |
| 13780 | 1811 lr r1,r1 |
| 13781 | 1822 lr r2,r2 |
| 13782 | 1833 lr r3,r3 */ |
| 13783 | if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 && |
| 13784 | bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 && |
| 13785 | bytes[ 6] == 0x18 && bytes[ 7] == 0x33) { |
| 13786 | |
| 13787 | /* Handle special instruction that follows that preamble. */ |
| 13788 | if (0) vex_printf("special function handling...\n"); |
florian | 2c8ed94 | 2011-08-01 22:07:51 +0000 | [diff] [blame] | 13789 | |
| 13790 | insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE; |
| 13791 | guest_IA_next_instr = guest_IA_curr_instr + insn_length; |
| 13792 | |
| 13793 | status = |
| 13794 | s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13795 | } else { |
| 13796 | /* Handle normal instructions. */ |
| 13797 | switch (insn_length) { |
| 13798 | case 2: |
| 13799 | status = s390_decode_2byte_and_irgen(bytes); |
| 13800 | break; |
| 13801 | |
| 13802 | case 4: |
| 13803 | status = s390_decode_4byte_and_irgen(bytes); |
| 13804 | break; |
| 13805 | |
| 13806 | case 6: |
| 13807 | status = s390_decode_6byte_and_irgen(bytes); |
| 13808 | break; |
| 13809 | |
| 13810 | default: |
| 13811 | status = S390_DECODE_ERROR; |
| 13812 | break; |
| 13813 | } |
| 13814 | } |
florian | 5fcbba2 | 2011-07-27 20:40:22 +0000 | [diff] [blame] | 13815 | /* If next instruction is execute, stop here */ |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 13816 | if (dis_res->whatNext == Dis_Continue && bytes[insn_length] == 0x44) { |
| 13817 | put_IA(mkaddr_expr(guest_IA_next_instr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13818 | dis_res->whatNext = Dis_StopHere; |
florian | f9e1ed7 | 2012-04-17 02:41:56 +0000 | [diff] [blame] | 13819 | dis_res->jk_StopHere = Ijk_Boring; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13820 | } |
| 13821 | |
| 13822 | if (status == S390_DECODE_OK) return insn_length; /* OK */ |
| 13823 | |
| 13824 | /* Decoding failed somehow */ |
| 13825 | vex_printf("vex s390->IR: "); |
| 13826 | switch (status) { |
| 13827 | case S390_DECODE_UNKNOWN_INSN: |
| 13828 | vex_printf("unknown insn: "); |
| 13829 | break; |
| 13830 | |
| 13831 | case S390_DECODE_UNIMPLEMENTED_INSN: |
| 13832 | vex_printf("unimplemented insn: "); |
| 13833 | break; |
| 13834 | |
| 13835 | case S390_DECODE_UNKNOWN_SPECIAL_INSN: |
| 13836 | vex_printf("unimplemented special insn: "); |
| 13837 | break; |
| 13838 | |
| 13839 | default: |
| 13840 | case S390_DECODE_ERROR: |
| 13841 | vex_printf("decoding error: "); |
| 13842 | break; |
| 13843 | } |
| 13844 | |
| 13845 | vex_printf("%02x%02x", bytes[0], bytes[1]); |
| 13846 | if (insn_length > 2) { |
| 13847 | vex_printf(" %02x%02x", bytes[2], bytes[3]); |
| 13848 | } |
| 13849 | if (insn_length > 4) { |
| 13850 | vex_printf(" %02x%02x", bytes[4], bytes[5]); |
| 13851 | } |
| 13852 | vex_printf("\n"); |
| 13853 | |
| 13854 | return 0; /* Failed */ |
| 13855 | } |
| 13856 | |
| 13857 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13858 | /* Disassemble a single instruction INSN into IR. */ |
| 13859 | static DisResult |
florian | 420c501 | 2011-07-22 02:12:28 +0000 | [diff] [blame] | 13860 | disInstr_S390_WRK(UChar *insn) |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13861 | { |
| 13862 | UChar byte; |
| 13863 | UInt insn_length; |
| 13864 | DisResult dres; |
| 13865 | |
| 13866 | /* ---------------------------------------------------- */ |
| 13867 | /* --- Compute instruction length -- */ |
| 13868 | /* ---------------------------------------------------- */ |
| 13869 | |
| 13870 | /* Get the first byte of the insn. */ |
| 13871 | byte = insn[0]; |
| 13872 | |
| 13873 | /* The leftmost two bits (0:1) encode the length of the insn in bytes. |
| 13874 | 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */ |
| 13875 | insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1; |
| 13876 | |
| 13877 | guest_IA_next_instr = guest_IA_curr_instr + insn_length; |
| 13878 | |
| 13879 | /* ---------------------------------------------------- */ |
| 13880 | /* --- Initialise the DisResult data -- */ |
| 13881 | /* ---------------------------------------------------- */ |
| 13882 | dres.whatNext = Dis_Continue; |
| 13883 | dres.len = insn_length; |
| 13884 | dres.continueAt = 0; |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 13885 | dres.jk_StopHere = Ijk_INVALID; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13886 | |
florian | a99f20e | 2011-07-17 14:16:41 +0000 | [diff] [blame] | 13887 | /* fixs390: consider chasing of conditional jumps */ |
| 13888 | |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13889 | /* Normal and special instruction handling starts here. */ |
| 13890 | if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) { |
| 13891 | /* All decode failures end up here. The decoder has already issued an |
| 13892 | error message. |
| 13893 | Tell the dispatcher that this insn cannot be decoded, and so has |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 13894 | not been executed, and (is currently) the next to be executed. */ |
florian | 65b5b3f | 2012-04-22 02:51:27 +0000 | [diff] [blame] | 13895 | put_IA(mkaddr_expr(guest_IA_next_instr)); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13896 | |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 13897 | dres.whatNext = Dis_StopHere; |
| 13898 | dres.jk_StopHere = Ijk_NoDecode; |
| 13899 | dres.continueAt = 0; |
| 13900 | dres.len = 0; |
| 13901 | } else { |
| 13902 | /* Decode success */ |
| 13903 | switch (dres.whatNext) { |
| 13904 | case Dis_Continue: |
florian | 8559e41 | 2012-04-19 14:23:48 +0000 | [diff] [blame] | 13905 | put_IA(mkaddr_expr(guest_IA_next_instr)); |
florian | 8844a63 | 2012-04-13 04:04:06 +0000 | [diff] [blame] | 13906 | break; |
| 13907 | case Dis_ResteerU: |
| 13908 | case Dis_ResteerC: |
| 13909 | put_IA(mkaddr_expr(dres.continueAt)); |
| 13910 | break; |
| 13911 | case Dis_StopHere: |
| 13912 | break; |
| 13913 | default: |
| 13914 | vassert(0); |
| 13915 | } |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13916 | } |
| 13917 | |
| 13918 | return dres; |
| 13919 | } |
| 13920 | |
| 13921 | |
| 13922 | /*------------------------------------------------------------*/ |
| 13923 | /*--- Top-level fn ---*/ |
| 13924 | /*------------------------------------------------------------*/ |
| 13925 | |
| 13926 | /* Disassemble a single instruction into IR. The instruction |
| 13927 | is located in host memory at &guest_code[delta]. */ |
| 13928 | |
| 13929 | DisResult |
| 13930 | disInstr_S390(IRSB *irsb_IN, |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13931 | Bool (*resteerOkFn)(void *, Addr64), |
| 13932 | Bool resteerCisOk, |
| 13933 | void *callback_opaque, |
| 13934 | UChar *guest_code, |
| 13935 | Long delta, |
| 13936 | Addr64 guest_IP, |
| 13937 | VexArch guest_arch, |
| 13938 | VexArchInfo *archinfo, |
| 13939 | VexAbiInfo *abiinfo, |
| 13940 | Bool host_bigendian) |
| 13941 | { |
| 13942 | vassert(guest_arch == VexArchS390X); |
| 13943 | |
| 13944 | /* The instruction decoder requires a big-endian machine. */ |
| 13945 | vassert(host_bigendian == True); |
| 13946 | |
| 13947 | /* Set globals (see top of this file) */ |
| 13948 | guest_IA_curr_instr = guest_IP; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13949 | irsb = irsb_IN; |
florian | 420c501 | 2011-07-22 02:12:28 +0000 | [diff] [blame] | 13950 | resteer_fn = resteerOkFn; |
| 13951 | resteer_data = callback_opaque; |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13952 | |
florian | 420c501 | 2011-07-22 02:12:28 +0000 | [diff] [blame] | 13953 | return disInstr_S390_WRK(guest_code + delta); |
sewardj | 2019a97 | 2011-03-07 16:04:07 +0000 | [diff] [blame] | 13954 | } |
| 13955 | |
| 13956 | /*---------------------------------------------------------------*/ |
| 13957 | /*--- end guest_s390_toIR.c ---*/ |
| 13958 | /*---------------------------------------------------------------*/ |