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gerrit-public.fairphone.software / toolchain / llvm-project / 714f23bcdb80fe4609a6a7fc290e1527878e4732 / . / llvm / lib / Target / X86 / X86InstrFragmentsSIMD.td
blob: f8590e59dbf66b7e94ce3794ddfb6f6491666eed [file] [log] [blame]
Jia Liue1d61962012-02-19 02:03:36 +0000[diff] [blame]1//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +0000[diff] [blame]7//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]8//===----------------------------------------------------------------------===//
9//
10// This file provides pattern fragments useful for SIMD instructions.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]15// MMX specific DAG Nodes.
16//===----------------------------------------------------------------------===//
17
18// Low word of MMX to GPR.
19def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,
20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
Bruno Cardoso Lopesab9ae872015-02-05 13:23:07 +0000[diff] [blame]21// GPR to low word of MMX.
22def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1,
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]24
25//===----------------------------------------------------------------------===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]26// MMX Pattern Fragments
27//===----------------------------------------------------------------------===//
28
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]29def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>;
30def bc_mmx : PatFrag<(ops node:$in), (x86mmx (bitconvert node:$in))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]31
32//===----------------------------------------------------------------------===//
33// SSE specific DAG Nodes.
34//===----------------------------------------------------------------------===//
35
36def SDTX86FPShiftOp : SDTypeProfile<1, 2, [ SDTCisSameAs<0, 1>,
37 SDTCisFP<0>, SDTCisInt<2> ]>;
38def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]39 SDTCisFP<1>, SDTCisVT<3, i8>,
40 SDTCisVec<1>]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]41
Benjamin Kramer4669d182012-12-21 14:04:55 +0000[diff] [blame]42def X86umin : SDNode<"X86ISD::UMIN", SDTIntBinOp>;
43def X86umax : SDNode<"X86ISD::UMAX", SDTIntBinOp>;
44def X86smin : SDNode<"X86ISD::SMIN", SDTIntBinOp>;
45def X86smax : SDNode<"X86ISD::SMAX", SDTIntBinOp>;
46
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]47def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
48def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
Nadav Rotem178250a2012-08-19 13:06:16 +0000[diff] [blame]49
50// Commutative and Associative FMIN and FMAX.
51def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,
52 [SDNPCommutative, SDNPAssociative]>;
53def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,
54 [SDNPCommutative, SDNPAssociative]>;
55
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]56def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
57 [SDNPCommutative, SDNPAssociative]>;
58def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
59 [SDNPCommutative, SDNPAssociative]>;
60def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
61 [SDNPCommutative, SDNPAssociative]>;
Benjamin Kramer5bc180c2013-08-04 12:05:16 +0000[diff] [blame]62def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp,
63 [SDNPCommutative, SDNPAssociative]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]64def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
65def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
66def X86fsrl : SDNode<"X86ISD::FSRL", SDTX86FPShiftOp>;
Stuart Hastings9f208042011-06-01 04:39:42 +0000[diff] [blame]67def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>;
Duncan Sands0e4fcb82011-09-22 20:15:48 +0000[diff] [blame]68def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
69def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
Craig Topperf984efb2011-11-19 09:02:40 +0000[diff] [blame]70def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
71def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]72def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>;
73def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]74def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
75//def X86cmpsd : SDNode<"X86ISD::FSETCCsd", SDTX86Cmpsd>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]76def X86pshufb : SDNode<"X86ISD::PSHUFB",
Craig Topper78349002012-01-25 06:43:11 +0000[diff] [blame]77 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]78 SDTCisSameAs<0,2>]>>;
Bruno Cardoso Lopes7ba479d2011-07-13 21:36:47 +0000[diff] [blame]79def X86andnp : SDNode<"X86ISD::ANDNP",
Bruno Cardoso Lopes9613b642011-07-13 21:36:51 +0000[diff] [blame]80 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]81 SDTCisSameAs<0,2>]>>;
Craig Topper81390be2011-11-19 07:33:10 +0000[diff] [blame]82def X86psign : SDNode<"X86ISD::PSIGN",
Craig Topperde6b73b2011-11-19 07:07:26 +0000[diff] [blame]83 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]84 SDTCisSameAs<0,2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]85def X86pextrb : SDNode<"X86ISD::PEXTRB",
86 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
87def X86pextrw : SDNode<"X86ISD::PEXTRW",
88 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
89def X86pinsrb : SDNode<"X86ISD::PINSRB",
90 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
91 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
92def X86pinsrw : SDNode<"X86ISD::PINSRW",
93 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
94 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
Filipe Cabecinhas20352212014-04-21 20:07:29 +0000[diff] [blame]95def X86insertps : SDNode<"X86ISD::INSERTPS",
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]96 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]97 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]98def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
99 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>;
Elena Demikhovsky8d7e56c2012-04-22 09:39:03 +0000[diff] [blame]100
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]101def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
Chris Lattner54e53292010-09-22 00:34:38 +0000[diff] [blame]102 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]103
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]104def X86vzext : SDNode<"X86ISD::VZEXT",
105 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]106 SDTCisInt<0>, SDTCisInt<1>,
107 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]108
109def X86vsext : SDNode<"X86ISD::VSEXT",
110 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]111 SDTCisInt<0>, SDTCisInt<1>,
112 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]113
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]114def X86vtrunc : SDNode<"X86ISD::VTRUNC",
115 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]116 SDTCisInt<0>, SDTCisInt<1>,
117 SDTCisOpSmallerThanOp<0, 1>]>>;
Elena Demikhovskyc5f67262013-12-17 08:33:15 +0000[diff] [blame]118def X86trunc : SDNode<"X86ISD::TRUNC",
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]119 SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>,
120 SDTCisOpSmallerThanOp<0, 1>]>>;
121
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]122def X86vtruncm : SDNode<"X86ISD::VTRUNCM",
123 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
124 SDTCisInt<0>, SDTCisInt<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]125 SDTCisVec<2>, SDTCisInt<2>,
126 SDTCisOpSmallerThanOp<0, 2>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]127def X86vfpext : SDNode<"X86ISD::VFPEXT",
128 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]129 SDTCisFP<0>, SDTCisFP<1>,
130 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liaoe999b862012-10-10 16:53:28 +0000[diff] [blame]131def X86vfpround: SDNode<"X86ISD::VFPROUND",
132 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]133 SDTCisFP<0>, SDTCisFP<1>,
134 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]135
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]136def X86vshldq : SDNode<"X86ISD::VSHLDQ", SDTIntShiftOp>;
137def X86vshrdq : SDNode<"X86ISD::VSRLDQ", SDTIntShiftOp>;
Craig Topper0b7ad762012-01-22 23:36:02 +0000[diff] [blame]138def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>;
Craig Topperbd4884372012-01-22 22:42:16 +0000[diff] [blame]139def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;
140def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]141
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]142def X86IntCmpMask : SDTypeProfile<1, 2,
143 [SDTCisVec<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>]>;
144def X86pcmpeqm : SDNode<"X86ISD::PCMPEQM", X86IntCmpMask, [SDNPCommutative]>;
145def X86pcmpgtm : SDNode<"X86ISD::PCMPGTM", X86IntCmpMask>;
146
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]147def X86CmpMaskCC :
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]148 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisInt<0>, SDTCisVec<1>,
149 SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]150def X86CmpMaskCCScalar :
151 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
152
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]153def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>;
154def X86cmpmu : SDNode<"X86ISD::CMPMU", X86CmpMaskCC>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]155def X86cmpms : SDNode<"X86ISD::FSETCC", X86CmpMaskCCScalar>;
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]156
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]157def X86vshl : SDNode<"X86ISD::VSHL",
158 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
159 SDTCisVec<2>]>>;
160def X86vsrl : SDNode<"X86ISD::VSRL",
161 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
162 SDTCisVec<2>]>>;
163def X86vsra : SDNode<"X86ISD::VSRA",
164 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
165 SDTCisVec<2>]>>;
166
167def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;
168def X86vsrli : SDNode<"X86ISD::VSRLI", SDTIntShiftOp>;
169def X86vsrai : SDNode<"X86ISD::VSRAI", SDTIntShiftOp>;
170
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]171def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]172 SDTCisVec<1>,
173 SDTCisSameAs<2, 1>]>;
Benjamin Kramerb16ccde2012-12-15 16:47:44 +0000[diff] [blame]174def X86subus : SDNode<"X86ISD::SUBUS", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]175def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]176def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
Elena Demikhovsky40864b62013-08-05 08:52:21 +0000[diff] [blame]177def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]178def X86testm : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky33d447a2013-08-21 09:36:02 +0000[diff] [blame]179 SDTCisVec<1>,
180 SDTCisSameAs<2, 1>]>>;
Elena Demikhovskya30e4372014-02-05 07:05:03 +0000[diff] [blame]181def X86testnm : SDNode<"X86ISD::TESTNM", SDTypeProfile<1, 2, [SDTCisVec<0>,
182 SDTCisVec<1>,
183 SDTCisSameAs<2, 1>]>>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]184def X86select : SDNode<"X86ISD::SELECT" , SDTSelect>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]185
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]186def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
187 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
188 SDTCisSameAs<1,2>]>>;
Benjamin Kramer6d2dff62014-04-26 14:12:19 +0000[diff] [blame]189def X86pmuldq : SDNode<"X86ISD::PMULDQ",
190 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
191 SDTCisSameAs<1,2>]>>;
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]192
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]193// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
194// translated into one of the target nodes below during lowering.
195// Note: this is a work in progress...
196def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>;
197def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
198 SDTCisSameAs<0,2>]>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]199def SDTShuff3Op : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
200 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]201
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]202def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
203 SDTCisVec<2>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]204def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>,
205 SDTCisSameAs<0,1>, SDTCisInt<2>]>;
206def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
207 SDTCisSameAs<0,2>, SDTCisInt<3>]>;
208
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]209def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;
210def SDTVBroadcastm : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>]>;
211
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]212def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]213 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]214
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame^]215def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc.
216 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisInt<3>]>;
217
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]218def SDTFma : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
219 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]220def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
221 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>, SDTCisInt<4>]>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]222def STDFp1SrcRm : SDTypeProfile<1, 2, [SDTCisSameAs<0,1>,
223 SDTCisVec<0>, SDTCisInt<2>]>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]224def STDFp2SrcRm : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
225 SDTCisVec<0>, SDTCisInt<3>]>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]226
Craig Topper8fb09f02013-01-28 06:48:25 +0000[diff] [blame]227def X86PAlignr : SDNode<"X86ISD::PALIGNR", SDTShuff3OpI>;
Adam Nemet2f10cc62014-08-05 17:22:55 +0000[diff] [blame]228def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]229
230def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>;
231def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>;
232def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>;
233
Craig Topper6e54ba72011-12-31 23:50:21 +0000[diff] [blame]234def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]235
236def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
237def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;
238def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;
239
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]240def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
241def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
242
243def X86Movlhps : SDNode<"X86ISD::MOVLHPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]244def X86Movlhpd : SDNode<"X86ISD::MOVLHPD", SDTShuff2Op>;
Bruno Cardoso Lopes03e4c352010-08-31 21:15:21 +0000[diff] [blame]245def X86Movhlps : SDNode<"X86ISD::MOVHLPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]246
Bruno Cardoso Lopesb3825212010-09-01 05:08:25 +0000[diff] [blame]247def X86Movlps : SDNode<"X86ISD::MOVLPS", SDTShuff2Op>;
248def X86Movlpd : SDNode<"X86ISD::MOVLPD", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]249
Chandler Carruth8366ceb2014-06-20 01:05:28 +0000[diff] [blame]250def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, SDTCisSameAs<2, 1>]>;
251def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
252def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>;
253
Craig Topper8d4ba192011-12-06 08:21:25 +0000[diff] [blame]254def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;
255def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]256
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]257def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>;
Chandler Carruthed5dfff2014-09-22 22:29:42 +0000[diff] [blame]258def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>;
259def X86VPermv : SDNode<"X86ISD::VPERMV", SDTShuff2Op>;
260def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;
261def X86VPermv3 : SDNode<"X86ISD::VPERMV3", SDTShuff3Op>;
Elena Demikhovskya5d38a32014-01-23 14:27:26 +0000[diff] [blame]262def X86VPermiv3 : SDNode<"X86ISD::VPERMIV3", SDTShuff3Op>;
Bruno Cardoso Lopesb878caa2011-07-21 01:55:47 +0000[diff] [blame]263
Craig Topper0a672ea2011-11-30 07:47:51 +0000[diff] [blame]264def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;
Bruno Cardoso Lopesf15dfe52011-08-12 21:48:26 +0000[diff] [blame]265
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]266def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>;
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]267def X86VBroadcastm : SDNode<"X86ISD::VBROADCASTM", SDTVBroadcastm>;
Elena Demikhovsky89529742013-09-12 08:55:00 +0000[diff] [blame]268def X86Vinsert : SDNode<"X86ISD::VINSERT", SDTypeProfile<1, 3,
269 [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
Elena Demikhovsky9f423d62014-02-10 07:02:39 +0000[diff] [blame]270def X86Vextract : SDNode<"X86ISD::VEXTRACT", SDTypeProfile<1, 2,
271 [SDTCisVec<1>, SDTCisPtrTy<2>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]272
Elena Demikhovskycd3c1c42012-12-05 09:24:57 +0000[diff] [blame]273def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>;
Chandler Carruth204ad4c2014-09-15 20:09:47 +0000[diff] [blame]274
275def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>;
276
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame^]277def X86faddRnd : SDNode<"X86ISD::FADD_RND", SDTFPBinOpRound>;
278def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>;
279def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>;
280def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;
281
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]282def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;
283def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
284def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFma>;
285def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFma>;
Craig Toppera999c662012-08-29 07:18:25 +0000[diff] [blame]286def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFma>;
287def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFma>;
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]288
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]289def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound>;
290def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound>;
291def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound>;
292def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound>;
293def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound>;
294def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound>;
295
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]296def X86rsqrt28 : SDNode<"X86ISD::RSQRT28", STDFp1SrcRm>;
297def X86rcp28 : SDNode<"X86ISD::RCP28", STDFp1SrcRm>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]298def X86exp2 : SDNode<"X86ISD::EXP2", STDFp1SrcRm>;
299
300def X86rsqrt28s : SDNode<"X86ISD::RSQRT28", STDFp2SrcRm>;
301def X86rcp28s : SDNode<"X86ISD::RCP28", STDFp2SrcRm>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]302
Craig Topperab47fe42012-08-06 06:22:36 +0000[diff] [blame]303def SDT_PCMPISTRI : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
304 SDTCisVT<2, v16i8>, SDTCisVT<3, v16i8>,
305 SDTCisVT<4, i8>]>;
306def SDT_PCMPESTRI : SDTypeProfile<2, 5, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
307 SDTCisVT<2, v16i8>, SDTCisVT<3, i32>,
308 SDTCisVT<4, v16i8>, SDTCisVT<5, i32>,
309 SDTCisVT<6, i8>]>;
310
311def X86pcmpistri : SDNode<"X86ISD::PCMPISTRI", SDT_PCMPISTRI>;
312def X86pcmpestri : SDNode<"X86ISD::PCMPESTRI", SDT_PCMPESTRI>;
313
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]314def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 3,
315 [SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>,
316 SDTCisVec<3>, SDTCisVec<1>, SDTCisInt<1>]>, []>;
Elena Demikhovsky72860c32014-12-15 10:03:52 +0000[diff] [blame]317def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 3,
318 [SDTCisSameAs<0, 3>,
319 SDTCisVec<3>, SDTCisVec<1>, SDTCisInt<1>]>, []>;
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]320
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]321//===----------------------------------------------------------------------===//
322// SSE Complex Patterns
323//===----------------------------------------------------------------------===//
324
325// These are 'extloads' from a scalar to the low element of a vector, zeroing
326// the top elements. These are used for the SSE 'ss' and 'sd' instruction
327// forms.
328def sse_load_f32 : ComplexPattern<v4f32, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]329 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
330 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]331def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]332 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
333 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]334
335def ssmem : Operand<v4f32> {
336 let PrintMethod = "printf32mem";
337 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]338 let ParserMatchClass = X86Mem32AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]339 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]340}
341def sdmem : Operand<v2f64> {
342 let PrintMethod = "printf64mem";
343 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]344 let ParserMatchClass = X86Mem64AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]345 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]346}
347
348//===----------------------------------------------------------------------===//
349// SSE pattern fragments
350//===----------------------------------------------------------------------===//
351
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]352// 128-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]353// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]354def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>;
355def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]356def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>;
357
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]358// 256-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]359// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]360def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>;
361def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]362def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>;
363
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]364// 512-bit load pattern fragments
365def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>;
366def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>;
Robert Khasanov7ca7df02014-08-04 14:35:15 +0000[diff] [blame]367def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>;
368def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>;
Elena Demikhovsky1f3ed412013-10-22 09:19:28 +0000[diff] [blame]369def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]370def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>;
371
372// 128-/256-/512-bit extload pattern fragments
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]373def extloadv2f32 : PatFrag<(ops node:$ptr), (v2f64 (extloadvf32 node:$ptr))>;
374def extloadv4f32 : PatFrag<(ops node:$ptr), (v4f64 (extloadvf32 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]375def extloadv8f32 : PatFrag<(ops node:$ptr), (v8f64 (extloadvf32 node:$ptr))>;
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]376
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]377// These are needed to match a scalar load that is used in a vector-only
378// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
379// The memory operand is required to be a 128-bit load, so it must be converted
380// from a vector to a scalar.
381def loadf32_128 : PatFrag<(ops node:$ptr),
382 (f32 (vector_extract (loadv4f32 node:$ptr), (iPTR 0)))>;
383def loadf64_128 : PatFrag<(ops node:$ptr),
384 (f64 (vector_extract (loadv2f64 node:$ptr), (iPTR 0)))>;
385
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]386// Like 'store', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]387def alignedstore : PatFrag<(ops node:$val, node:$ptr),
388 (store node:$val, node:$ptr), [{
389 return cast<StoreSDNode>(N)->getAlignment() >= 16;
390}]>;
391
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]392// Like 'store', but always requires 256-bit vector alignment.
393def alignedstore256 : PatFrag<(ops node:$val, node:$ptr),
394 (store node:$val, node:$ptr), [{
395 return cast<StoreSDNode>(N)->getAlignment() >= 32;
396}]>;
397
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]398// Like 'store', but always requires 512-bit vector alignment.
399def alignedstore512 : PatFrag<(ops node:$val, node:$ptr),
400 (store node:$val, node:$ptr), [{
401 return cast<StoreSDNode>(N)->getAlignment() >= 64;
402}]>;
403
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]404// Like 'load', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]405def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
406 return cast<LoadSDNode>(N)->getAlignment() >= 16;
407}]>;
408
Chad Rosiera281afc2012-03-09 02:00:48 +0000[diff] [blame]409// Like 'X86vzload', but always requires 128-bit vector alignment.
410def alignedX86vzload : PatFrag<(ops node:$ptr), (X86vzload node:$ptr), [{
411 return cast<MemSDNode>(N)->getAlignment() >= 16;
412}]>;
413
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]414// Like 'load', but always requires 256-bit vector alignment.
415def alignedload256 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
416 return cast<LoadSDNode>(N)->getAlignment() >= 32;
417}]>;
418
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]419// Like 'load', but always requires 512-bit vector alignment.
420def alignedload512 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
421 return cast<LoadSDNode>(N)->getAlignment() >= 64;
422}]>;
423
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]424def alignedloadfsf32 : PatFrag<(ops node:$ptr),
425 (f32 (alignedload node:$ptr))>;
426def alignedloadfsf64 : PatFrag<(ops node:$ptr),
427 (f64 (alignedload node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]428
429// 128-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]430// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]431def alignedloadv4f32 : PatFrag<(ops node:$ptr),
432 (v4f32 (alignedload node:$ptr))>;
433def alignedloadv2f64 : PatFrag<(ops node:$ptr),
434 (v2f64 (alignedload node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]435def alignedloadv2i64 : PatFrag<(ops node:$ptr),
436 (v2i64 (alignedload node:$ptr))>;
437
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]438// 256-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]439// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]440def alignedloadv8f32 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]441 (v8f32 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]442def alignedloadv4f64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]443 (v4f64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]444def alignedloadv4i64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]445 (v4i64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]446
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]447// 512-bit aligned load pattern fragments
448def alignedloadv16f32 : PatFrag<(ops node:$ptr),
449 (v16f32 (alignedload512 node:$ptr))>;
Elena Demikhovsky3ce8dbb2013-08-18 13:08:57 +0000[diff] [blame]450def alignedloadv16i32 : PatFrag<(ops node:$ptr),
451 (v16i32 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]452def alignedloadv8f64 : PatFrag<(ops node:$ptr),
453 (v8f64 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]454def alignedloadv8i64 : PatFrag<(ops node:$ptr),
455 (v8i64 (alignedload512 node:$ptr))>;
456
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]457// Like 'load', but uses special alignment checks suitable for use in
458// memory operands in most SSE instructions, which are required to
459// be naturally aligned on some targets but not on others. If the subtarget
460// allows unaligned accesses, match any load, though this may require
461// setting a feature bit in the processor (on startup, for example).
462// Opteron 10h and later implement such a feature.
463def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{
Sanjay Patelffd039b2015-02-03 17:13:04 +0000[diff] [blame]464 return Subtarget->hasSSEUnalignedMem()
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]465 || cast<LoadSDNode>(N)->getAlignment() >= 16;
466}]>;
467
468def memopfsf32 : PatFrag<(ops node:$ptr), (f32 (memop node:$ptr))>;
469def memopfsf64 : PatFrag<(ops node:$ptr), (f64 (memop node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]470
471// 128-bit memop pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]472// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]473def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;
474def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]475def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]476
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]477// These are needed to match a scalar memop that is used in a vector-only
478// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
479// The memory operand is required to be a 128-bit load, so it must be converted
480// from a vector to a scalar.
481def memopfsf32_128 : PatFrag<(ops node:$ptr),
482 (f32 (vector_extract (memopv4f32 node:$ptr), (iPTR 0)))>;
483def memopfsf64_128 : PatFrag<(ops node:$ptr),
484 (f64 (vector_extract (memopv2f64 node:$ptr), (iPTR 0)))>;
485
486
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]487// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
488// 16-byte boundary.
489// FIXME: 8 byte alignment for mmx reads is not required
490def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
491 return cast<LoadSDNode>(N)->getAlignment() >= 8;
492}]>;
493
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]494def memopmmx : PatFrag<(ops node:$ptr), (x86mmx (memop64 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]495
496// MOVNT Support
497// Like 'store', but requires the non-temporal bit to be set
498def nontemporalstore : PatFrag<(ops node:$val, node:$ptr),
499 (st node:$val, node:$ptr), [{
500 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
501 return ST->isNonTemporal();
502 return false;
503}]>;
504
505def alignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]506 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]507 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
508 return ST->isNonTemporal() && !ST->isTruncatingStore() &&
509 ST->getAddressingMode() == ISD::UNINDEXED &&
510 ST->getAlignment() >= 16;
511 return false;
512}]>;
513
514def unalignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]515 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]516 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
517 return ST->isNonTemporal() &&
518 ST->getAlignment() < 16;
519 return false;
520}]>;
521
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]522// 128-bit bitconvert pattern fragments
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]523def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>;
524def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>;
525def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>;
526def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>;
527def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;
528def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;
529
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]530// 256-bit bitconvert pattern fragments
Craig Topper682b8502011-11-02 04:42:13 +0000[diff] [blame]531def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;
532def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]533def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;
Bruno Cardoso Lopes1021b4a2011-07-13 01:15:33 +0000[diff] [blame]534def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;
Elena Demikhovsky3629b4a2014-01-06 08:45:54 +0000[diff] [blame]535def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]536
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]537// 512-bit bitconvert pattern fragments
538def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>;
539def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]540def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;
541def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>;
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]542
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]543def vzmovl_v2i64 : PatFrag<(ops node:$src),
544 (bitconvert (v2i64 (X86vzmovl
545 (v2i64 (scalar_to_vector (loadi64 node:$src))))))>;
546def vzmovl_v4i32 : PatFrag<(ops node:$src),
547 (bitconvert (v4i32 (X86vzmovl
548 (v4i32 (scalar_to_vector (loadi32 node:$src))))))>;
549
550def vzload_v2i64 : PatFrag<(ops node:$src),
551 (bitconvert (v2i64 (X86vzload node:$src)))>;
552
553
554def fp32imm0 : PatLeaf<(f32 fpimm), [{
555 return N->isExactlyValue(+0.0);
556}]>;
557
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]558def I8Imm : SDNodeXForm<imm, [{
559 // Transformation function: get the low 8 bits.
560 return getI8Imm((uint8_t)N->getZExtValue());
561}]>;
562
563def FROUND_NO_EXC : ImmLeaf<i32, [{ return Imm == 8; }]>;
Adam Nemet50b83f02014-08-14 17:13:26 +0000[diff] [blame]564def FROUND_CURRENT : ImmLeaf<i32, [{
565 return Imm == X86::STATIC_ROUNDING::CUR_DIRECTION;
566}]>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]567
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]568// BYTE_imm - Transform bit immediates into byte immediates.
569def BYTE_imm : SDNodeXForm<imm, [{
570 // Transformation function: imm >> 3
571 return getI32Imm(N->getZExtValue() >> 3);
572}]>;
573
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]574// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index
575// to VEXTRACTF128/VEXTRACTI128 imm.
576def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{
577 return getI8Imm(X86::getExtractVEXTRACT128Immediate(N));
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]578}]>;
579
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]580// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to
581// VINSERTF128/VINSERTI128 imm.
582def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{
583 return getI8Imm(X86::getInsertVINSERT128Immediate(N));
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]584}]>;
585
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]586// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index
587// to VEXTRACTF64x4 imm.
588def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{
589 return getI8Imm(X86::getExtractVEXTRACT256Immediate(N));
590}]>;
591
592// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to
593// VINSERTF64x4 imm.
594def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{
595 return getI8Imm(X86::getInsertVINSERT256Immediate(N));
596}]>;
597
598def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index),
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]599 (extract_subvector node:$bigvec,
600 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]601 return X86::isVEXTRACT128Index(N);
602}], EXTRACT_get_vextract128_imm>;
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]603
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]604def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]605 node:$index),
606 (insert_subvector node:$bigvec, node:$smallvec,
607 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]608 return X86::isVINSERT128Index(N);
609}], INSERT_get_vinsert128_imm>;
610
611
612def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index),
613 (extract_subvector node:$bigvec,
614 node:$index), [{
615 return X86::isVEXTRACT256Index(N);
616}], EXTRACT_get_vextract256_imm>;
617
618def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
619 node:$index),
620 (insert_subvector node:$bigvec, node:$smallvec,
621 node:$index), [{
622 return X86::isVINSERT256Index(N);
623}], INSERT_get_vinsert256_imm>;
Bruno Cardoso Lopes123dff02011-07-25 23:05:25 +0000[diff] [blame]624