blob: e210fc2ccdf7cb519c3f85a7c95c099c8c997021 [file] [log] [blame]
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann92b0aad2012-10-18 10:37:59 -070018#include <math.h>
Greg Hackmann29724852012-07-23 15:31:10 -070019#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070020#include <pthread.h>
21#include <stdio.h>
22#include <stdlib.h>
23
24#include <sys/ioctl.h>
25#include <sys/mman.h>
26#include <sys/time.h>
27#include <sys/resource.h>
28
29#include <s3c-fb.h>
30
31#include <EGL/egl.h>
32
Erik Gilling87e707e2012-06-29 17:35:13 -070033#define HWC_REMOVE_DEPRECATED_VERSIONS 1
34
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070035#include <cutils/compiler.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070036#include <cutils/log.h>
Greg Hackmann6e0f76d2012-09-17 17:47:09 -070037#include <cutils/properties.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070038#include <hardware/gralloc.h>
39#include <hardware/hardware.h>
40#include <hardware/hwcomposer.h>
41#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070042#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070043#include <utils/Vector.h>
44
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070045#include <sync/sync.h>
46
Greg Hackmann86eb1c62012-05-30 09:25:51 -070047#include "ion.h"
48#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070049#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070050#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070051#include "exynos_v4l2.h"
52#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070053
Greg Hackmannf9509d32012-09-12 09:49:29 -070054const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070055const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmannf9509d32012-09-12 09:49:29 -070056const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070057const size_t GSC_W_ALIGNMENT = 16;
58const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann92b0aad2012-10-18 10:37:59 -070059const size_t GSC_DST_CROP_W_ALIGNMENT_RGB888 = 32;
Sanghee Kim7b4c1322012-10-04 18:44:36 -070060const size_t GSC_DST_W_ALIGNMENT_RGB888 = 32;
61const size_t GSC_DST_H_ALIGNMENT_RGB888 = 1;
Greg Hackmannd6743822012-10-02 17:27:25 -070062const size_t FIMD_GSC_IDX = 0;
63const size_t HDMI_GSC_IDX = 1;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070064const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
65const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
66 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann67b2c312012-10-01 13:31:26 -070067const size_t BURSTLEN_BYTES = 16 * 8;
Benoit Goby93f9f5d2012-09-28 20:37:17 -070068const size_t NUM_HDMI_BUFFERS = 3;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070069
Erik Gilling87e707e2012-06-29 17:35:13 -070070struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070071
Greg Hackmann9130e702012-07-30 14:53:04 -070072struct exynos5_gsc_map_t {
73 enum {
74 GSC_NONE = 0,
75 GSC_M2M,
76 // TODO: GSC_LOCAL_PATH
77 } mode;
78 int idx;
79};
80
Greg Hackmann86eb1c62012-05-30 09:25:51 -070081struct exynos5_hwc_post_data_t {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070082 int overlay_map[NUM_HW_WINDOWS];
83 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
84 size_t fb_window;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070085};
86
Greg Hackmann44a6d422012-09-17 17:31:30 -070087const size_t NUM_GSC_DST_BUFS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070088struct exynos5_gsc_data_t {
89 void *gsc;
90 exynos_gsc_img src_cfg;
91 exynos_gsc_img dst_cfg;
92 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
Greg Hackmannde6a0872012-10-10 16:57:24 -070093 int dst_buf_fence[NUM_GSC_DST_BUFS];
Greg Hackmann9130e702012-07-30 14:53:04 -070094 size_t current_buf;
95};
96
Benoit Goby93f9f5d2012-09-28 20:37:17 -070097struct hdmi_layer_t {
98 int id;
99 int fd;
100 bool enabled;
101 exynos_gsc_img cfg;
102
103 bool streaming;
104 size_t current_buf;
105 size_t queued_buf;
106};
107
Erik Gilling87e707e2012-06-29 17:35:13 -0700108struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700109 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700110
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700111 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -0700112 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700113 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700114
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700115 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700116 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -0700117 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700118 pthread_t vsync_thread;
Greg Hackmann6e0f76d2012-09-17 17:47:09 -0700119 int force_gpu;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700120
Greg Hackmannd92fe212012-09-11 14:28:41 -0700121 int32_t xres;
122 int32_t yres;
123 int32_t xdpi;
124 int32_t ydpi;
125 int32_t vsync_period;
126
Benoit Goby8bad7e32012-08-16 14:17:14 -0700127 int hdmi_mixer0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700128 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700129 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700130 bool hdmi_blanked;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700131 int hdmi_w;
132 int hdmi_h;
Benoit Gobyb5501902012-10-01 00:29:01 -0700133
Benoit Gobyb5501902012-10-01 00:29:01 -0700134 hdmi_layer_t hdmi_layers[2];
Greg Hackmann9130e702012-07-30 14:53:04 -0700135
136 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700137
138 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700139 size_t last_fb_window;
Greg Hackmann600867e2012-08-23 12:58:02 -0700140 const void *last_handles[NUM_HW_WINDOWS];
141 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700142};
143
Greg Hackmannefd98532012-10-02 12:00:42 -0700144static void exynos5_cleanup_gsc_m2m(exynos5_hwc_composer_device_1_t *pdev,
145 size_t gsc_idx);
146
Greg Hackmann9130e702012-07-30 14:53:04 -0700147static void dump_handle(private_handle_t *h)
148{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700149 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
150 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700151}
152
Erik Gilling87e707e2012-06-29 17:35:13 -0700153static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700154{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700155 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
156 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
157 l->compositionType, l->flags, l->handle, l->transform,
158 l->blending,
159 l->sourceCrop.left,
160 l->sourceCrop.top,
161 l->sourceCrop.right,
162 l->sourceCrop.bottom,
163 l->displayFrame.left,
164 l->displayFrame.top,
165 l->displayFrame.right,
166 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700167
Greg Hackmann9130e702012-07-30 14:53:04 -0700168 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
169 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700170}
171
172static void dump_config(s3c_fb_win_config &c)
173{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700174 ALOGV("\tstate = %u", c.state);
175 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
176 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
177 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700178 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700179 c.fd, c.offset, c.stride,
180 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700181 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700182 }
183 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
184 ALOGV("\t\tcolor = %u", c.color);
185 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700186}
187
Greg Hackmann9130e702012-07-30 14:53:04 -0700188static void dump_gsc_img(exynos_gsc_img &c)
189{
190 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
191 c.x, c.y, c.w, c.h, c.fw, c.fh);
192 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
193 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
194}
195
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700196inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
197inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700198template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
199template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
200
Greg Hackmann02893a42012-10-02 11:39:13 -0700201static int dup_or_warn(int fence)
202{
203 int dup_fd = dup(fence);
204 if (dup_fd < 0)
205 ALOGW("fence dup failed: %s", strerror(errno));
206 return dup_fd;
207}
208
209static int merge_or_warn(const char *name, int f1, int f2)
210{
211 int merge_fd = sync_merge(name, f1, f2);
212 if (merge_fd < 0)
213 ALOGW("fence merge failed: %s", strerror(errno));
214 return merge_fd;
215}
216
Greg Hackmann92b0aad2012-10-18 10:37:59 -0700217template<typename T> void align_crop_and_center(T &w, T &h,
218 hwc_rect_t *crop, size_t alignment)
219{
220 double aspect = 1.0 * h / w;
221 T w_orig = w, h_orig = h;
222
223 w = ALIGN(w, alignment);
224 h = round(aspect * w);
225 if (crop) {
226 crop->left = (w - w_orig) / 2;
227 crop->top = (h - h_orig) / 2;
228 crop->right = crop->left + w_orig;
229 crop->bottom = crop->top + h_orig;
230 }
231}
232
Greg Hackmann31991d52012-07-13 13:23:11 -0700233static bool is_transformed(const hwc_layer_1_t &layer)
234{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700235 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700236}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700237
Greg Hackmann9130e702012-07-30 14:53:04 -0700238static bool is_rotated(const hwc_layer_1_t &layer)
239{
240 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
241 (layer.transform & HAL_TRANSFORM_ROT_180);
242}
243
Erik Gilling87e707e2012-06-29 17:35:13 -0700244static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700245{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700246 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
247 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700248}
249
Benoit Goby8bad7e32012-08-16 14:17:14 -0700250static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
251{
252 return c1.x != c2.x ||
253 c1.y != c2.y ||
254 c1.w != c2.w ||
255 c1.h != c2.h ||
256 c1.format != c2.format ||
257 c1.rot != c2.rot ||
258 c1.cacheable != c2.cacheable ||
259 c1.drmMode != c2.drmMode;
260}
261
262static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
263{
264 return gsc_dst_cfg_changed(c1, c2) ||
265 c1.fw != c2.fw ||
266 c1.fh != c2.fh;
267}
268
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700269static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
270{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700271 switch (format) {
272 case HAL_PIXEL_FORMAT_RGBA_8888:
273 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
274 case HAL_PIXEL_FORMAT_RGBX_8888:
275 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
276 case HAL_PIXEL_FORMAT_RGBA_5551:
277 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Sanghee Kim05cbd792012-09-14 23:58:28 -0700278 case HAL_PIXEL_FORMAT_RGB_565:
279 return S3C_FB_PIXEL_FORMAT_RGB_565;
Greg Hackmann9eb2a022012-09-26 09:37:12 -0700280 case HAL_PIXEL_FORMAT_BGRA_8888:
281 return S3C_FB_PIXEL_FORMAT_BGRA_8888;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700282 default:
283 return S3C_FB_PIXEL_FORMAT_MAX;
284 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700285}
286
287static bool exynos5_format_is_supported(int format)
288{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700289 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700290}
291
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700292static bool exynos5_format_is_rgb(int format)
293{
294 switch (format) {
295 case HAL_PIXEL_FORMAT_RGBA_8888:
296 case HAL_PIXEL_FORMAT_RGBX_8888:
297 case HAL_PIXEL_FORMAT_RGB_888:
298 case HAL_PIXEL_FORMAT_RGB_565:
299 case HAL_PIXEL_FORMAT_BGRA_8888:
300 case HAL_PIXEL_FORMAT_RGBA_5551:
301 case HAL_PIXEL_FORMAT_RGBA_4444:
302 return true;
303
304 default:
305 return false;
306 }
307}
308
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700309static bool exynos5_format_is_supported_by_gscaler(int format)
310{
Greg Hackmann9130e702012-07-30 14:53:04 -0700311 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700312 case HAL_PIXEL_FORMAT_RGBX_8888:
313 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700314 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700315 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700316 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700317 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700318
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700319 default:
320 return false;
321 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700322}
323
Greg Hackmann296668e2012-08-14 15:51:40 -0700324static bool exynos5_format_is_ycrcb(int format)
325{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700326 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700327}
328
Greg Hackmann9130e702012-07-30 14:53:04 -0700329static bool exynos5_format_requires_gscaler(int format)
330{
Sanghee Kim05cbd792012-09-14 23:58:28 -0700331 return (exynos5_format_is_supported_by_gscaler(format) &&
332 (format != HAL_PIXEL_FORMAT_RGBX_8888) && (format != HAL_PIXEL_FORMAT_RGB_565));
Greg Hackmann9130e702012-07-30 14:53:04 -0700333}
334
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700335static uint8_t exynos5_format_to_bpp(int format)
336{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700337 switch (format) {
338 case HAL_PIXEL_FORMAT_RGBA_8888:
339 case HAL_PIXEL_FORMAT_RGBX_8888:
Greg Hackmann9eb2a022012-09-26 09:37:12 -0700340 case HAL_PIXEL_FORMAT_BGRA_8888:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700341 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700342
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700343 case HAL_PIXEL_FORMAT_RGBA_5551:
344 case HAL_PIXEL_FORMAT_RGBA_4444:
Sanghee Kim05cbd792012-09-14 23:58:28 -0700345 case HAL_PIXEL_FORMAT_RGB_565:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700346 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700347
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700348 default:
349 ALOGW("unrecognized pixel format %u", format);
350 return 0;
351 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700352}
353
Greg Hackmann2a19eb12012-09-27 14:09:18 -0700354static bool is_x_aligned(const hwc_layer_1_t &layer, int format)
355{
356 if (!exynos5_format_is_supported(format))
357 return true;
358
359 uint8_t bpp = exynos5_format_to_bpp(format);
360 uint8_t pixel_alignment = 32 / bpp;
361
362 return (layer.displayFrame.left % pixel_alignment) == 0 &&
363 (layer.displayFrame.right % pixel_alignment) == 0;
364}
365
Greg Hackmann92b0aad2012-10-18 10:37:59 -0700366static bool dst_crop_w_aligned(int dest_w)
Sanghee Kim3f32ce52012-10-09 20:04:23 -0700367{
Sanghee Kim3f32ce52012-10-09 20:04:23 -0700368 int dst_crop_w_alignement;
369
Sanghee Kim3f32ce52012-10-09 20:04:23 -0700370 /* GSC's dst crop size should be aligned 128Bytes */
Greg Hackmann92b0aad2012-10-18 10:37:59 -0700371 dst_crop_w_alignement = GSC_DST_CROP_W_ALIGNMENT_RGB888;
Sanghee Kim3f32ce52012-10-09 20:04:23 -0700372
373 return (dest_w % dst_crop_w_alignement) == 0;
374}
375
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700376static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
377 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700378{
379 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
380
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700381 int max_w = is_rotated(layer) ? 2048 : 4800;
382 int max_h = is_rotated(layer) ? 2048 : 3344;
Greg Hackmann9130e702012-07-30 14:53:04 -0700383
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700384 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
385 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
386 // HAL_TRANSFORM_ROT_180
Greg Hackmann9130e702012-07-30 14:53:04 -0700387
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700388 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
389 int dest_w, dest_h;
390 if (rot90or270) {
391 dest_w = HEIGHT(layer.displayFrame);
392 dest_h = WIDTH(layer.displayFrame);
393 } else {
394 dest_w = WIDTH(layer.displayFrame);
395 dest_h = HEIGHT(layer.displayFrame);
396 }
Greg Hackmann92b0aad2012-10-18 10:37:59 -0700397
398 if (handle->flags & GRALLOC_USAGE_PROTECTED)
399 align_crop_and_center(dest_w, dest_h, NULL,
400 GSC_DST_CROP_W_ALIGNMENT_RGB888);
401
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700402 int max_downscale = local_path ? 4 : 16;
403 const int max_upscale = 8;
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700404
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700405 return exynos5_format_is_supported_by_gscaler(format) &&
Greg Hackmann92b0aad2012-10-18 10:37:59 -0700406 dst_crop_w_aligned(dest_w) &&
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700407 handle->stride <= max_w &&
408 handle->stride % GSC_W_ALIGNMENT == 0 &&
409 src_w <= dest_w * max_downscale &&
410 dest_w <= src_w * max_upscale &&
411 handle->vstride <= max_h &&
412 handle->vstride % GSC_H_ALIGNMENT == 0 &&
413 src_h <= dest_h * max_downscale &&
414 dest_h <= src_h * max_upscale &&
415 // per 46.2
416 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
417 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
418 // per 46.3.1.6
Greg Hackmann9130e702012-07-30 14:53:04 -0700419}
420
Greg Hackmann09c45c22012-09-20 09:35:37 -0700421static bool exynos5_requires_gscaler(hwc_layer_1_t &layer, int format)
422{
423 return exynos5_format_requires_gscaler(format) || is_scaled(layer)
Greg Hackmann2a19eb12012-09-27 14:09:18 -0700424 || is_transformed(layer) || !is_x_aligned(layer, format);
Greg Hackmann09c45c22012-09-20 09:35:37 -0700425}
426
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700427int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
428{
429 struct v4l2_dv_preset preset;
430 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700431 int index = 0;
432 bool found = false;
433 int ret;
434
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700435 if (ioctl(dev->hdmi_layers[0].fd, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700436 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
437 return -1;
438 }
439
440 while (true) {
441 enum_preset.index = index++;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700442 ret = ioctl(dev->hdmi_layers[0].fd, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700443
444 if (ret < 0) {
445 if (errno == EINVAL)
446 break;
447 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
448 return -1;
449 }
450
451 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
452 __func__, enum_preset.index, enum_preset.preset,
453 enum_preset.width, enum_preset.height, enum_preset.name);
454
455 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700456 dev->hdmi_w = enum_preset.width;
457 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700458 found = true;
459 }
460 }
461
462 return found ? 0 : -1;
463}
464
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700465static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
466{
467 switch (blending) {
468 case HWC_BLENDING_NONE:
469 return S3C_FB_BLENDING_NONE;
470 case HWC_BLENDING_PREMULT:
471 return S3C_FB_BLENDING_PREMULT;
472 case HWC_BLENDING_COVERAGE:
473 return S3C_FB_BLENDING_COVERAGE;
474
475 default:
476 return S3C_FB_BLENDING_MAX;
477 }
478}
479
480static bool exynos5_blending_is_supported(int32_t blending)
481{
482 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
483}
484
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700485
486static int hdmi_enable_layer(struct exynos5_hwc_composer_device_1_t *dev,
487 hdmi_layer_t &hl)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700488{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700489 if (hl.enabled)
490 return 0;
491
Benoit Goby8bad7e32012-08-16 14:17:14 -0700492 struct v4l2_requestbuffers reqbuf;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700493 memset(&reqbuf, 0, sizeof(reqbuf));
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700494 reqbuf.count = NUM_HDMI_BUFFERS;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700495 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700496 reqbuf.memory = V4L2_MEMORY_DMABUF;
497 if (exynos_v4l2_reqbufs(hl.fd, &reqbuf) < 0) {
498 ALOGE("%s: layer%d: reqbufs failed %d", __func__, hl.id, errno);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700499 return -1;
500 }
501
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700502 if (reqbuf.count != NUM_HDMI_BUFFERS) {
503 ALOGE("%s: layer%d: didn't get buffer", __func__, hl.id);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700504 return -1;
505 }
506
Benoit Gobyb5501902012-10-01 00:29:01 -0700507 if (hl.id == 1) {
508 if (exynos_v4l2_s_ctrl(hl.fd, V4L2_CID_TV_PIXEL_BLEND_ENABLE, 1) < 0) {
509 ALOGE("%s: layer%d: PIXEL_BLEND_ENABLE failed %d", __func__,
510 hl.id, errno);
511 return -1;
512 }
513 }
514
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700515 ALOGV("%s: layer%d enabled", __func__, hl.id);
516 hl.enabled = true;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700517 return 0;
518}
519
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700520static void hdmi_disable_layer(struct exynos5_hwc_composer_device_1_t *dev,
521 hdmi_layer_t &hl)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700522{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700523 if (!hl.enabled)
524 return;
525
526 if (hl.streaming) {
527 if (exynos_v4l2_streamoff(hl.fd, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0)
528 ALOGE("%s: layer%d: streamoff failed %d", __func__, hl.id, errno);
529 hl.streaming = false;
530 }
531
Benoit Goby8bad7e32012-08-16 14:17:14 -0700532 struct v4l2_requestbuffers reqbuf;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700533 memset(&reqbuf, 0, sizeof(reqbuf));
Benoit Goby8bad7e32012-08-16 14:17:14 -0700534 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700535 reqbuf.memory = V4L2_MEMORY_DMABUF;
536 if (exynos_v4l2_reqbufs(hl.fd, &reqbuf) < 0)
537 ALOGE("%s: layer%d: reqbufs failed %d", __func__, hl.id, errno);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700538
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700539 memset(&hl.cfg, 0, sizeof(hl.cfg));
540 hl.current_buf = 0;
541 hl.queued_buf = 0;
542 hl.enabled = false;
543
544 ALOGV("%s: layer%d disabled", __func__, hl.id);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700545}
546
Benoit Gobycdd61b32012-07-09 12:09:59 -0700547static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
548{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700549 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700550 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700551
Benoit Gobyad4e3582012-08-30 17:17:34 -0700552 if (dev->hdmi_blanked)
553 return 0;
554
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700555 struct v4l2_subdev_format sd_fmt;
556 memset(&sd_fmt, 0, sizeof(sd_fmt));
557 sd_fmt.pad = MIXER_G0_SUBDEV_PAD_SINK;
558 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
559 sd_fmt.format.width = dev->hdmi_w;
560 sd_fmt.format.height = dev->hdmi_h;
561 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
562 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
563 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700564 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700565 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700566
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700567 struct v4l2_subdev_crop sd_crop;
568 memset(&sd_crop, 0, sizeof(sd_crop));
569 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SINK;
570 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
571 sd_crop.rect.width = dev->hdmi_w;
572 sd_crop.rect.height = dev->hdmi_h;
573 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
574 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
575 return -1;
576 }
577
578 memset(&sd_fmt, 0, sizeof(sd_fmt));
579 sd_fmt.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
580 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
581 sd_fmt.format.width = dev->hdmi_w;
582 sd_fmt.format.height = dev->hdmi_h;
583 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
584 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
585 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
586 return -1;
587 }
588
589 memset(&sd_crop, 0, sizeof(sd_crop));
590 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
591 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
592 sd_crop.rect.width = dev->hdmi_w;
593 sd_crop.rect.height = dev->hdmi_h;
594 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
595 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
596 return -1;
597 }
598
Benoit Goby56208452012-10-23 17:49:52 -0700599 char value[PROPERTY_VALUE_MAX];
600 property_get("persist.hdmi.hdcp_enabled", value, "1");
601 int hdcp_enabled = atoi(value);
602
603 if (exynos_v4l2_s_ctrl(dev->hdmi_layers[1].fd, V4L2_CID_TV_HDCP_ENABLE,
604 hdcp_enabled) < 0)
605 ALOGE("%s: s_ctrl(CID_TV_HDCP_ENABLE) failed %d", __func__, errno);
606
607 /* "3" is RGB709_16_235 */
608 property_get("persist.hdmi.color_range", value, "3");
609 int color_range = atoi(value);
610
611 if (exynos_v4l2_s_ctrl(dev->hdmi_layers[1].fd, V4L2_CID_TV_SET_COLOR_RANGE,
612 color_range) < 0)
613 ALOGE("%s: s_ctrl(CID_TV_COLOR_RANGE) failed %d", __func__, errno);
614
Benoit Gobyb5501902012-10-01 00:29:01 -0700615 hdmi_enable_layer(dev, dev->hdmi_layers[1]);
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700616
Benoit Goby8bad7e32012-08-16 14:17:14 -0700617 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700618 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700619}
620
621static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
622{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700623 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700624 return;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700625
626 hdmi_disable_layer(dev, dev->hdmi_layers[0]);
Benoit Gobyb5501902012-10-01 00:29:01 -0700627 hdmi_disable_layer(dev, dev->hdmi_layers[1]);
628
Greg Hackmannefd98532012-10-02 12:00:42 -0700629 exynos5_cleanup_gsc_m2m(dev, HDMI_GSC_IDX);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700630 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700631}
632
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700633static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev,
634 hdmi_layer_t &hl,
Benoit Gobyb5501902012-10-01 00:29:01 -0700635 hwc_layer_1_t &layer,
Benoit Goby181e92b2012-10-04 16:35:57 -0700636 private_handle_t *h,
637 int acquireFenceFd,
638 int *releaseFenceFd)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700639{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700640 int ret = 0;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700641
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700642 exynos_gsc_img cfg;
643 memset(&cfg, 0, sizeof(cfg));
644 cfg.x = layer.displayFrame.left;
645 cfg.y = layer.displayFrame.top;
646 cfg.w = WIDTH(layer.displayFrame);
647 cfg.h = HEIGHT(layer.displayFrame);
648
649 if (gsc_src_cfg_changed(hl.cfg, cfg)) {
Benoit Gobyb5501902012-10-01 00:29:01 -0700650 hdmi_disable_layer(dev, hl);
651
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700652 struct v4l2_format fmt;
653 memset(&fmt, 0, sizeof(fmt));
654 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
Greg Hackmann92b0aad2012-10-18 10:37:59 -0700655 fmt.fmt.pix_mp.width = h->stride;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700656 fmt.fmt.pix_mp.height = cfg.h;
657 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
658 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
659 fmt.fmt.pix_mp.num_planes = 1;
660 ret = exynos_v4l2_s_fmt(hl.fd, &fmt);
661 if (ret < 0) {
662 ALOGE("%s: layer%d: s_fmt failed %d", __func__, hl.id, errno);
663 goto err;
664 }
665
Benoit Gobyb5501902012-10-01 00:29:01 -0700666 struct v4l2_subdev_crop sd_crop;
667 memset(&sd_crop, 0, sizeof(sd_crop));
668 if (hl.id == 0)
669 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
670 else
671 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
672 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
673 sd_crop.rect.left = cfg.x;
674 sd_crop.rect.top = cfg.y;
675 sd_crop.rect.width = cfg.w;
676 sd_crop.rect.height = cfg.h;
677 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
678 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
679 goto err;
680 }
681
682 hdmi_enable_layer(dev, hl);
683
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700684 ALOGV("HDMI layer%d configuration:", hl.id);
685 dump_gsc_img(cfg);
686 hl.cfg = cfg;
687 }
688
689 struct v4l2_buffer buffer;
690 struct v4l2_plane planes[1];
691
692 if (hl.queued_buf == NUM_HDMI_BUFFERS) {
693 memset(&buffer, 0, sizeof(buffer));
694 memset(planes, 0, sizeof(planes));
695 buffer.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
696 buffer.memory = V4L2_MEMORY_DMABUF;
697 buffer.length = 1;
698 buffer.m.planes = planes;
699 ret = exynos_v4l2_dqbuf(hl.fd, &buffer);
700 if (ret < 0) {
701 ALOGE("%s: layer%d: dqbuf failed %d", __func__, hl.id, errno);
702 goto err;
703 }
704 hl.queued_buf--;
705 }
706
707 memset(&buffer, 0, sizeof(buffer));
708 memset(planes, 0, sizeof(planes));
709 buffer.index = hl.current_buf;
710 buffer.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
711 buffer.memory = V4L2_MEMORY_DMABUF;
712 buffer.flags = V4L2_BUF_FLAG_USE_SYNC;
Benoit Goby181e92b2012-10-04 16:35:57 -0700713 buffer.reserved = acquireFenceFd;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700714 buffer.length = 1;
715 buffer.m.planes = planes;
716 buffer.m.planes[0].m.fd = h->fd;
717 if (exynos_v4l2_qbuf(hl.fd, &buffer) < 0) {
718 ALOGE("%s: layer%d: qbuf failed %d", __func__, hl.id, errno);
719 ret = -1;
720 goto err;
721 }
722
Benoit Goby181e92b2012-10-04 16:35:57 -0700723 if (releaseFenceFd)
724 *releaseFenceFd = buffer.reserved;
725 else
726 close(buffer.reserved);
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700727
728 hl.queued_buf++;
729 hl.current_buf = (hl.current_buf + 1) % NUM_HDMI_BUFFERS;
730
731 if (!hl.streaming) {
732 if (exynos_v4l2_streamon(hl.fd, buffer.type) < 0) {
733 ALOGE("%s: layer%d: streamon failed %d", __func__, hl.id, errno);
734 ret = -1;
735 goto err;
736 }
737 hl.streaming = true;
738 }
Benoit Goby105be0b2012-09-21 13:19:30 -0700739
740err:
Benoit Goby181e92b2012-10-04 16:35:57 -0700741 if (acquireFenceFd >= 0)
742 close(acquireFenceFd);
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700743
Benoit Goby105be0b2012-09-21 13:19:30 -0700744 return ret;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700745}
746
Greg Hackmann81575142012-09-19 15:09:04 -0700747bool exynos5_is_offscreen(hwc_layer_1_t &layer,
748 struct exynos5_hwc_composer_device_1_t *pdev)
749{
750 return layer.sourceCrop.left > pdev->xres ||
751 layer.sourceCrop.right < 0 ||
752 layer.sourceCrop.top > pdev->yres ||
753 layer.sourceCrop.bottom < 0;
754}
755
Greg Hackmann67b2c312012-10-01 13:31:26 -0700756size_t exynos5_visible_width(hwc_layer_1_t &layer, int format,
757 struct exynos5_hwc_composer_device_1_t *pdev)
758{
759 int bpp;
760 if (exynos5_requires_gscaler(layer, format))
761 bpp = 32;
762 else
763 bpp = exynos5_format_to_bpp(format);
764 int left = max(layer.displayFrame.left, 0);
765 int right = min(layer.displayFrame.right, pdev->xres);
766
767 return (right - left) * bpp / 8;
768}
769
Greg Hackmann81575142012-09-19 15:09:04 -0700770bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i,
771 struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700772{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700773 if (layer.flags & HWC_SKIP_LAYER) {
774 ALOGV("\tlayer %u: skipping", i);
775 return false;
776 }
777
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700778 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700779
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700780 if (!handle) {
781 ALOGV("\tlayer %u: handle is NULL", i);
782 return false;
783 }
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700784
Greg Hackmann92b0aad2012-10-18 10:37:59 -0700785 if (exynos5_visible_width(layer, handle->format, pdev) < BURSTLEN_BYTES) {
786 ALOGV("\tlayer %u: visible area is too narrow", i);
787 return false;
788 }
Greg Hackmann09c45c22012-09-20 09:35:37 -0700789 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700790 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700791 ALOGV("\tlayer %u: gscaler required but not supported", i);
792 return false;
793 }
794 } else {
795 if (!exynos5_format_is_supported(handle->format)) {
796 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
797 return false;
798 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700799 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700800 if (!exynos5_blending_is_supported(layer.blending)) {
801 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700802 return false;
803 }
Greg Hackmann81575142012-09-19 15:09:04 -0700804 if (CC_UNLIKELY(exynos5_is_offscreen(layer, pdev))) {
805 ALOGW("\tlayer %u: off-screen", i);
806 return false;
807 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700808
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700809 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700810}
811
Greg Hackmann31991d52012-07-13 13:23:11 -0700812inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
813{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700814 return !(r1.left > r2.right ||
815 r1.right < r2.left ||
816 r1.top > r2.bottom ||
817 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700818}
819
820inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
821{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700822 hwc_rect i;
823 i.top = max(r1.top, r2.top);
824 i.bottom = min(r1.bottom, r2.bottom);
825 i.left = max(r1.left, r2.left);
826 i.right = min(r1.right, r2.right);
827 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700828}
829
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700830static int exynos5_prepare_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby4f439962012-09-21 17:16:45 -0700831 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700832{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700833 ALOGV("preparing %u layers for FIMD", contents->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700834
Greg Hackmann9130e702012-07-30 14:53:04 -0700835 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700836
Benoit Goby4f439962012-09-21 17:16:45 -0700837 bool force_fb = pdev->force_gpu;
Erik Gilling87e707e2012-06-29 17:35:13 -0700838 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
839 pdev->bufs.overlay_map[i] = -1;
840
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700841 bool fb_needed = false;
842 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700843
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700844 // find unsupported overlays
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700845 for (size_t i = 0; i < contents->numHwLayers; i++) {
846 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700847
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700848 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
849 ALOGV("\tlayer %u: framebuffer target", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700850 continue;
851 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700852
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700853 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
854 ALOGV("\tlayer %u: background supported", i);
855 dump_layer(&contents->hwLayers[i]);
856 continue;
857 }
858
Greg Hackmann81575142012-09-19 15:09:04 -0700859 if (exynos5_supports_overlay(contents->hwLayers[i], i, pdev) &&
860 !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700861 ALOGV("\tlayer %u: overlay supported", i);
862 layer.compositionType = HWC_OVERLAY;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700863 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700864 continue;
865 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700866
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700867 if (!fb_needed) {
868 first_fb = i;
869 fb_needed = true;
870 }
871 last_fb = i;
872 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700873
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700874 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700875 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700876
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700877 // can't composite overlays sandwiched between framebuffers
878 if (fb_needed)
879 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700880 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700881
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700882 // Incrementally try to add our supported layers to hardware windows.
883 // If adding a layer would violate a hardware constraint, force it
884 // into the framebuffer and try again. (Revisiting the entire list is
885 // necessary because adding a layer to the framebuffer can cause other
886 // windows to retroactively violate constraints.)
887 bool changed;
Greg Hackmannd6743822012-10-02 17:27:25 -0700888 bool gsc_used;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700889 do {
890 android::Vector<hwc_rect> rects;
891 android::Vector<hwc_rect> overlaps;
Greg Hackmannd6743822012-10-02 17:27:25 -0700892 size_t pixels_left, windows_left;
893
894 gsc_used = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700895
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700896 if (fb_needed) {
897 hwc_rect_t fb_rect;
898 fb_rect.top = fb_rect.left = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -0700899 fb_rect.right = pdev->xres - 1;
900 fb_rect.bottom = pdev->yres - 1;
901 pixels_left = MAX_PIXELS - pdev->xres * pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700902 windows_left = NUM_HW_WINDOWS - 1;
903 rects.push_back(fb_rect);
904 }
905 else {
906 pixels_left = MAX_PIXELS;
907 windows_left = NUM_HW_WINDOWS;
908 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700909
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700910 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700911
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700912 for (size_t i = 0; i < contents->numHwLayers; i++) {
913 hwc_layer_1_t &layer = contents->hwLayers[i];
914 if ((layer.flags & HWC_SKIP_LAYER) ||
915 layer.compositionType == HWC_FRAMEBUFFER_TARGET)
Greg Hackmann9130e702012-07-30 14:53:04 -0700916 continue;
917
918 private_handle_t *handle = private_handle_t::dynamicCast(
919 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700920
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700921 // we've already accounted for the framebuffer above
922 if (layer.compositionType == HWC_FRAMEBUFFER)
923 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700924
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700925 // only layer 0 can be HWC_BACKGROUND, so we can
926 // unconditionally allow it without extra checks
927 if (layer.compositionType == HWC_BACKGROUND) {
928 windows_left--;
929 continue;
930 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700931
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700932 size_t pixels_needed = WIDTH(layer.displayFrame) *
933 HEIGHT(layer.displayFrame);
934 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann09c45c22012-09-20 09:35:37 -0700935 bool gsc_required = exynos5_requires_gscaler(layer, handle->format);
Greg Hackmann9130e702012-07-30 14:53:04 -0700936 if (gsc_required)
Greg Hackmannd6743822012-10-02 17:27:25 -0700937 can_compose = can_compose && !gsc_used;
Greg Hackmann31991d52012-07-13 13:23:11 -0700938
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700939 // hwc_rect_t right and bottom values are normally exclusive;
940 // the intersection logic is simpler if we make them inclusive
941 hwc_rect_t visible_rect = layer.displayFrame;
942 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700943
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700944 // no more than 2 layers can overlap on a given pixel
945 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
946 if (intersect(visible_rect, overlaps.itemAt(j)))
947 can_compose = false;
948 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700949
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700950 if (!can_compose) {
951 layer.compositionType = HWC_FRAMEBUFFER;
952 if (!fb_needed) {
953 first_fb = last_fb = i;
954 fb_needed = true;
955 }
956 else {
957 first_fb = min(i, first_fb);
958 last_fb = max(i, last_fb);
959 }
960 changed = true;
961 break;
962 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700963
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700964 for (size_t j = 0; j < rects.size(); j++) {
965 const hwc_rect_t &other_rect = rects.itemAt(j);
966 if (intersect(visible_rect, other_rect))
967 overlaps.push_back(intersection(visible_rect, other_rect));
968 }
969 rects.push_back(visible_rect);
970 pixels_left -= pixels_needed;
971 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700972 if (gsc_required)
Greg Hackmannd6743822012-10-02 17:27:25 -0700973 gsc_used = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700974 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700975
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700976 if (changed)
977 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700978 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700979 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700980
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700981 unsigned int nextWindow = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700982
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700983 for (size_t i = 0; i < contents->numHwLayers; i++) {
984 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700985
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700986 if (fb_needed && i == first_fb) {
987 ALOGV("assigning framebuffer to window %u\n",
988 nextWindow);
989 nextWindow++;
990 continue;
991 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700992
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700993 if (layer.compositionType != HWC_FRAMEBUFFER &&
994 layer.compositionType != HWC_FRAMEBUFFER_TARGET) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700995 ALOGV("assigning layer %u to window %u", i, nextWindow);
996 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700997 if (layer.compositionType == HWC_OVERLAY) {
998 private_handle_t *handle =
999 private_handle_t::dynamicCast(layer.handle);
Greg Hackmann09c45c22012-09-20 09:35:37 -07001000 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmannd6743822012-10-02 17:27:25 -07001001 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[FIMD_GSC_IDX]);
Greg Hackmann3088b972012-09-12 15:07:23 -07001002 pdev->bufs.gsc_map[nextWindow].mode =
Greg Hackmann9130e702012-07-30 14:53:04 -07001003 exynos5_gsc_map_t::GSC_M2M;
Greg Hackmannd6743822012-10-02 17:27:25 -07001004 pdev->bufs.gsc_map[nextWindow].idx = FIMD_GSC_IDX;
Greg Hackmann9130e702012-07-30 14:53:04 -07001005 }
1006 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001007 nextWindow++;
1008 }
1009 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001010
Greg Hackmannefd98532012-10-02 12:00:42 -07001011 if (!gsc_used)
1012 exynos5_cleanup_gsc_m2m(pdev, FIMD_GSC_IDX);
Greg Hackmann9130e702012-07-30 14:53:04 -07001013
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001014 if (fb_needed)
1015 pdev->bufs.fb_window = first_fb;
1016 else
1017 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001018
Greg Hackmann9130e702012-07-30 14:53:04 -07001019 return 0;
1020}
1021
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001022static int exynos5_prepare_hdmi(exynos5_hwc_composer_device_1_t *pdev,
1023 hwc_display_contents_1_t* contents)
1024{
Benoit Goby922abbf2012-09-19 19:24:19 -07001025 ALOGV("preparing %u layers for HDMI", contents->numHwLayers);
Benoit Gobyb5501902012-10-01 00:29:01 -07001026 hwc_layer_1_t *video_layer = NULL;
Benoit Goby922abbf2012-09-19 19:24:19 -07001027
1028 for (size_t i = 0; i < contents->numHwLayers; i++) {
1029 hwc_layer_1_t &layer = contents->hwLayers[i];
1030
1031 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
1032 ALOGV("\tlayer %u: framebuffer target", i);
Benoit Goby922abbf2012-09-19 19:24:19 -07001033 continue;
1034 }
1035
1036 if (layer.compositionType == HWC_BACKGROUND) {
1037 ALOGV("\tlayer %u: background layer", i);
1038 dump_layer(&layer);
1039 continue;
1040 }
1041
Benoit Gobyb5501902012-10-01 00:29:01 -07001042 if (layer.handle) {
1043 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
1044 if (h->flags & GRALLOC_USAGE_PROTECTED) {
1045 if (!video_layer) {
1046 video_layer = &layer;
1047 layer.compositionType = HWC_OVERLAY;
1048 ALOGV("\tlayer %u: video layer", i);
1049 dump_layer(&layer);
1050 continue;
1051 }
1052 }
1053 }
1054
Benoit Goby922abbf2012-09-19 19:24:19 -07001055 layer.compositionType = HWC_FRAMEBUFFER;
1056 dump_layer(&layer);
1057 }
1058
1059 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001060}
1061
1062static int exynos5_prepare(hwc_composer_device_1_t *dev,
1063 size_t numDisplays, hwc_display_contents_1_t** displays)
1064{
1065 if (!numDisplays || !displays)
1066 return 0;
1067
1068 exynos5_hwc_composer_device_1_t *pdev =
1069 (exynos5_hwc_composer_device_1_t *)dev;
1070 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1071 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
1072
1073 if (pdev->hdmi_hpd) {
1074 hdmi_enable(pdev);
1075 } else {
1076 hdmi_disable(pdev);
1077 }
1078
1079 if (fimd_contents) {
Benoit Goby4f439962012-09-21 17:16:45 -07001080 int err = exynos5_prepare_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001081 if (err)
1082 return err;
1083 }
1084
1085 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001086 int err = exynos5_prepare_hdmi(pdev, hdmi_contents);
1087 if (err)
1088 return err;
1089 }
1090
1091 return 0;
1092}
1093
Greg Hackmann9130e702012-07-30 14:53:04 -07001094static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
1095 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
Greg Hackmann92b0aad2012-10-18 10:37:59 -07001096 int gsc_idx, int dst_format, hwc_rect_t *sourceCrop)
Greg Hackmann9130e702012-07-30 14:53:04 -07001097{
Benoit Gobyb5501902012-10-01 00:29:01 -07001098 ALOGV("configuring gscaler %u for memory-to-memory", AVAILABLE_GSC_UNITS[gsc_idx]);
Greg Hackmann9130e702012-07-30 14:53:04 -07001099
1100 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
1101 buffer_handle_t dst_buf;
1102 private_handle_t *dst_handle;
1103 int ret = 0;
1104
1105 exynos_gsc_img src_cfg, dst_cfg;
1106 memset(&src_cfg, 0, sizeof(src_cfg));
1107 memset(&dst_cfg, 0, sizeof(dst_cfg));
1108
Greg Hackmann92b0aad2012-10-18 10:37:59 -07001109 hwc_rect_t sourceCropTemp;
1110 if (!sourceCrop)
1111 sourceCrop = &sourceCropTemp;
1112
Greg Hackmann9130e702012-07-30 14:53:04 -07001113 src_cfg.x = layer.sourceCrop.left;
1114 src_cfg.y = layer.sourceCrop.top;
1115 src_cfg.w = WIDTH(layer.sourceCrop);
1116 src_cfg.fw = src_handle->stride;
1117 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -07001118 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001119 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -07001120 if (exynos5_format_is_ycrcb(src_handle->format)) {
1121 src_cfg.uaddr = src_handle->fd2;
1122 src_cfg.vaddr = src_handle->fd1;
1123 } else {
1124 src_cfg.uaddr = src_handle->fd1;
1125 src_cfg.vaddr = src_handle->fd2;
1126 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001127 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001128 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Benoit Goby181e92b2012-10-04 16:35:57 -07001129 src_cfg.acquireFenceFd = layer.acquireFenceFd;
1130 layer.acquireFenceFd = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001131
1132 dst_cfg.x = 0;
1133 dst_cfg.y = 0;
1134 dst_cfg.w = WIDTH(layer.displayFrame);
1135 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmann9130e702012-07-30 14:53:04 -07001136 dst_cfg.rot = layer.transform;
Sanghee Kim6c195c52012-08-30 22:59:43 -07001137 dst_cfg.drmMode = src_cfg.drmMode;
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001138 dst_cfg.format = dst_format;
Greg Hackmann5d99ec52012-10-11 14:26:13 -07001139 dst_cfg.narrowRgb = !exynos5_format_is_rgb(src_handle->format);
Greg Hackmann92b0aad2012-10-18 10:37:59 -07001140 if (dst_cfg.drmMode)
1141 align_crop_and_center(dst_cfg.w, dst_cfg.h, sourceCrop,
1142 GSC_DST_CROP_W_ALIGNMENT_RGB888);
Greg Hackmann9130e702012-07-30 14:53:04 -07001143
1144 ALOGV("source configuration:");
1145 dump_gsc_img(src_cfg);
1146
Greg Hackmann4eaff152012-10-03 16:28:19 -07001147 bool reconfigure = gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
1148 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg);
1149 if (reconfigure) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001150 int dst_stride;
1151 int usage = GRALLOC_USAGE_SW_READ_NEVER |
1152 GRALLOC_USAGE_SW_WRITE_NEVER |
1153 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001154
1155 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
1156 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -07001157
Greg Hackmann92b0aad2012-10-18 10:37:59 -07001158 int w = ALIGN(dst_cfg.w, GSC_DST_W_ALIGNMENT_RGB888);
1159 int h = ALIGN(dst_cfg.h, GSC_DST_H_ALIGNMENT_RGB888);
Greg Hackmann9130e702012-07-30 14:53:04 -07001160
1161 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1162 if (gsc_data->dst_buf[i]) {
1163 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1164 gsc_data->dst_buf[i] = NULL;
1165 }
1166
Greg Hackmannde6a0872012-10-10 16:57:24 -07001167 if (gsc_data->dst_buf_fence[i] >= 0) {
1168 close(gsc_data->dst_buf_fence[i]);
1169 gsc_data->dst_buf_fence[i] = -1;
1170 }
1171
Greg Hackmann9130e702012-07-30 14:53:04 -07001172 int ret = alloc_device->alloc(alloc_device, w, h,
1173 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1174 &dst_stride);
1175 if (ret < 0) {
1176 ALOGE("failed to allocate destination buffer: %s",
1177 strerror(-ret));
1178 goto err_alloc;
1179 }
1180 }
1181
1182 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001183 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001184
Greg Hackmann9130e702012-07-30 14:53:04 -07001185 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1186 dst_handle = private_handle_t::dynamicCast(dst_buf);
1187
1188 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001189 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001190 dst_cfg.yaddr = dst_handle->fd;
Greg Hackmannde6a0872012-10-10 16:57:24 -07001191 dst_cfg.acquireFenceFd = gsc_data->dst_buf_fence[gsc_data->current_buf];
1192 gsc_data->dst_buf_fence[gsc_data->current_buf] = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001193
1194 ALOGV("destination configuration:");
1195 dump_gsc_img(dst_cfg);
1196
Greg Hackmann92b0aad2012-10-18 10:37:59 -07001197 if ((int)dst_cfg.w != WIDTH(layer.displayFrame))
1198 ALOGV("padding %u x %u output to %u x %u and cropping to {%u,%u,%u,%u}",
1199 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame),
1200 dst_cfg.w, dst_cfg.h, sourceCrop->left, sourceCrop->top,
1201 sourceCrop->right, sourceCrop->bottom);
1202
Greg Hackmannefd98532012-10-02 12:00:42 -07001203 if (gsc_data->gsc) {
1204 ALOGV("reusing open gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1205 } else {
1206 ALOGV("opening gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1207 gsc_data->gsc = exynos_gsc_create_exclusive(
Dima Zavin33aa35f2012-10-05 16:04:52 -07001208 AVAILABLE_GSC_UNITS[gsc_idx], GSC_M2M_MODE, GSC_DUMMY, true);
Greg Hackmannefd98532012-10-02 12:00:42 -07001209 if (!gsc_data->gsc) {
1210 ALOGE("failed to create gscaler handle");
1211 ret = -1;
1212 goto err_alloc;
1213 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001214 }
1215
Greg Hackmann4eaff152012-10-03 16:28:19 -07001216 if (reconfigure) {
Dima Zavin33aa35f2012-10-05 16:04:52 -07001217 ret = exynos_gsc_stop_exclusive(gsc_data->gsc);
1218 if (ret < 0) {
1219 ALOGE("failed to stop gscaler %u", gsc_idx);
1220 goto err_gsc_config;
1221 }
1222
Greg Hackmann4eaff152012-10-03 16:28:19 -07001223 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1224 if (ret < 0) {
1225 ALOGE("failed to configure gscaler %u", gsc_idx);
1226 goto err_gsc_config;
1227 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001228 }
1229
1230 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1231 if (ret < 0) {
1232 ALOGE("failed to run gscaler %u", gsc_idx);
1233 goto err_gsc_config;
1234 }
1235
1236 gsc_data->src_cfg = src_cfg;
1237 gsc_data->dst_cfg = dst_cfg;
1238
Benoit Goby181e92b2012-10-04 16:35:57 -07001239 layer.releaseFenceFd = src_cfg.releaseFenceFd;
1240
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001241 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001242
1243err_gsc_config:
1244 exynos_gsc_destroy(gsc_data->gsc);
1245 gsc_data->gsc = NULL;
1246err_alloc:
Benoit Goby181e92b2012-10-04 16:35:57 -07001247 if (src_cfg.acquireFenceFd >= 0)
1248 close(src_cfg.acquireFenceFd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001249 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
Greg Hackmannde6a0872012-10-10 16:57:24 -07001250 if (gsc_data->dst_buf[i]) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001251 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1252 gsc_data->dst_buf[i] = NULL;
1253 }
Greg Hackmannde6a0872012-10-10 16:57:24 -07001254 if (gsc_data->dst_buf_fence[i] >= 0) {
1255 close(gsc_data->dst_buf_fence[i]);
1256 gsc_data->dst_buf_fence[i] = -1;
1257 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001258 }
Greg Hackmann7dddd2a2012-09-12 15:11:07 -07001259 memset(&gsc_data->src_cfg, 0, sizeof(gsc_data->src_cfg));
1260 memset(&gsc_data->dst_cfg, 0, sizeof(gsc_data->dst_cfg));
Greg Hackmann9130e702012-07-30 14:53:04 -07001261 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001262}
1263
Greg Hackmannefd98532012-10-02 12:00:42 -07001264
1265static void exynos5_cleanup_gsc_m2m(exynos5_hwc_composer_device_1_t *pdev,
1266 size_t gsc_idx)
1267{
1268 exynos5_gsc_data_t &gsc_data = pdev->gsc[gsc_idx];
1269 if (!gsc_data.gsc)
1270 return;
1271
1272 ALOGV("closing gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1273
Greg Hackmann4eaff152012-10-03 16:28:19 -07001274 exynos_gsc_stop_exclusive(gsc_data.gsc);
Greg Hackmannefd98532012-10-02 12:00:42 -07001275 exynos_gsc_destroy(gsc_data.gsc);
Greg Hackmannde6a0872012-10-10 16:57:24 -07001276 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
Greg Hackmannefd98532012-10-02 12:00:42 -07001277 if (gsc_data.dst_buf[i])
1278 pdev->alloc_device->free(pdev->alloc_device, gsc_data.dst_buf[i]);
Greg Hackmannde6a0872012-10-10 16:57:24 -07001279 if (gsc_data.dst_buf_fence[i] >= 0)
1280 close(gsc_data.dst_buf_fence[i]);
1281 }
Greg Hackmannefd98532012-10-02 12:00:42 -07001282
1283 memset(&gsc_data, 0, sizeof(gsc_data));
Greg Hackmannde6a0872012-10-10 16:57:24 -07001284 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++)
1285 gsc_data.dst_buf_fence[i] = -1;
Greg Hackmannefd98532012-10-02 12:00:42 -07001286}
1287
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001288static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001289 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001290 int32_t blending, int fence_fd, s3c_fb_win_config &cfg,
Greg Hackmann81575142012-09-19 15:09:04 -07001291 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001292{
Greg Hackmann81575142012-09-19 15:09:04 -07001293 uint32_t x, y;
1294 uint32_t w = WIDTH(displayFrame);
1295 uint32_t h = HEIGHT(displayFrame);
1296 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1297 uint32_t offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1298
1299 if (displayFrame.left < 0) {
1300 unsigned int crop = -displayFrame.left;
1301 ALOGV("layer off left side of screen; cropping %u pixels from left edge",
1302 crop);
1303 x = 0;
1304 w -= crop;
1305 offset += crop * bpp / 8;
1306 } else {
1307 x = displayFrame.left;
1308 }
1309
1310 if (displayFrame.right > pdev->xres) {
1311 unsigned int crop = displayFrame.right - pdev->xres;
1312 ALOGV("layer off right side of screen; cropping %u pixels from right edge",
1313 crop);
1314 w -= crop;
1315 }
1316
1317 if (displayFrame.top < 0) {
1318 unsigned int crop = -displayFrame.top;
1319 ALOGV("layer off top side of screen; cropping %u pixels from top edge",
1320 crop);
1321 y = 0;
1322 h -= crop;
1323 offset += handle->stride * crop * bpp / 8;
1324 } else {
1325 y = displayFrame.top;
1326 }
1327
1328 if (displayFrame.bottom > pdev->yres) {
1329 int crop = displayFrame.bottom - pdev->yres;
1330 ALOGV("layer off bottom side of screen; cropping %u pixels from bottom edge",
1331 crop);
1332 h -= crop;
1333 }
1334
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001335 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1336 cfg.fd = handle->fd;
Greg Hackmann81575142012-09-19 15:09:04 -07001337 cfg.x = x;
1338 cfg.y = y;
1339 cfg.w = w;
1340 cfg.h = h;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001341 cfg.format = exynos5_format_to_s3c_format(handle->format);
Greg Hackmann81575142012-09-19 15:09:04 -07001342 cfg.offset = offset;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001343 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001344 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001345 cfg.fence_fd = fence_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001346}
1347
Erik Gilling87e707e2012-06-29 17:35:13 -07001348static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannd92fe212012-09-11 14:28:41 -07001349 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001350{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001351 if (layer->compositionType == HWC_BACKGROUND) {
1352 hwc_color_t color = layer->backgroundColor;
1353 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1354 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1355 cfg.x = 0;
1356 cfg.y = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001357 cfg.w = pdev->xres;
1358 cfg.h = pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001359 return;
1360 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001361
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001362 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001363 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001364 layer->blending, layer->acquireFenceFd, cfg, pdev);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001365}
1366
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001367static int exynos5_post_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001368 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001369{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001370 exynos5_hwc_post_data_t *pdata = &pdev->bufs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001371 struct s3c_fb_win_config_data win_data;
1372 struct s3c_fb_win_config *config = win_data.config;
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001373
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001374 memset(config, 0, sizeof(win_data.config));
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001375 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1376 config[i].fence_fd = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001377
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001378 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001379 int layer_idx = pdata->overlay_map[i];
1380 if (layer_idx != -1) {
1381 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001382 private_handle_t *handle =
1383 private_handle_t::dynamicCast(layer.handle);
1384
1385 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1386 int gsc_idx = pdata->gsc_map[i].idx;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001387 exynos5_gsc_data_t &gsc = pdev->gsc[gsc_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001388
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001389 // RGBX8888 surfaces are already in the right color order from the GPU,
1390 // RGB565 and YUV surfaces need the Gscaler to swap R & B
1391 int dst_format = HAL_PIXEL_FORMAT_BGRA_8888;
1392 if (exynos5_format_is_rgb(handle->format) &&
1393 handle->format != HAL_PIXEL_FORMAT_RGB_565)
1394 dst_format = HAL_PIXEL_FORMAT_RGBX_8888;
1395
Greg Hackmann92b0aad2012-10-18 10:37:59 -07001396 hwc_rect_t sourceCrop = { 0, 0,
1397 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001398 int err = exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc,
Greg Hackmann92b0aad2012-10-18 10:37:59 -07001399 gsc_idx, dst_format, &sourceCrop);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001400 if (err < 0) {
Greg Hackmann4eaff152012-10-03 16:28:19 -07001401 ALOGE("failed to configure gscaler %u for layer %u",
Greg Hackmann9130e702012-07-30 14:53:04 -07001402 gsc_idx, i);
Greg Hackmannde6a0872012-10-10 16:57:24 -07001403 pdata->gsc_map[i].mode = exynos5_gsc_map_t::GSC_NONE;
Greg Hackmann9130e702012-07-30 14:53:04 -07001404 continue;
1405 }
1406
Greg Hackmann9130e702012-07-30 14:53:04 -07001407 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
Greg Hackmann9130e702012-07-30 14:53:04 -07001408 private_handle_t *dst_handle =
1409 private_handle_t::dynamicCast(dst_buf);
Benoit Goby181e92b2012-10-04 16:35:57 -07001410 int fence = gsc.dst_cfg.releaseFenceFd;
Greg Hackmann90219f32012-08-16 17:28:57 -07001411 exynos5_config_handle(dst_handle, sourceCrop,
Benoit Goby181e92b2012-10-04 16:35:57 -07001412 layer.displayFrame, layer.blending, fence, config[i],
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001413 pdev);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001414 } else {
1415 exynos5_config_overlay(&layer, config[i], pdev);
Erik Gilling87e707e2012-06-29 17:35:13 -07001416 }
1417 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001418 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1419 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1420 config[i].blending = S3C_FB_BLENDING_NONE;
1421 }
1422
Greg Hackmann9130e702012-07-30 14:53:04 -07001423 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001424 dump_config(config[i]);
1425 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001426
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001427 int ret = ioctl(pdev->fd, S3CFB_WIN_CONFIG, &win_data);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001428 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1429 if (config[i].fence_fd != -1)
1430 close(config[i].fence_fd);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001431 if (ret < 0) {
1432 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %s", strerror(errno));
1433 return ret;
1434 }
1435
1436 memcpy(pdev->last_config, &win_data.config, sizeof(win_data.config));
1437 memcpy(pdev->last_gsc_map, pdata->gsc_map, sizeof(pdata->gsc_map));
1438 pdev->last_fb_window = pdata->fb_window;
1439 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1440 int layer_idx = pdata->overlay_map[i];
1441 if (layer_idx != -1) {
1442 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
1443 pdev->last_handles[i] = layer.handle;
1444 }
1445 }
1446
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001447 return win_data.fence;
1448}
1449
Greg Hackmannec13dea2012-10-08 14:54:45 -07001450static int exynos5_clear_fimd(exynos5_hwc_composer_device_1_t *pdev)
1451{
1452 struct s3c_fb_win_config_data win_data;
1453 memset(&win_data, 0, sizeof(win_data));
1454
1455 int ret = ioctl(pdev->fd, S3CFB_WIN_CONFIG, &win_data);
1456 LOG_ALWAYS_FATAL_IF(ret < 0,
1457 "ioctl S3CFB_WIN_CONFIG failed to clear screen: %s",
1458 strerror(errno));
1459 // the causes of an empty config failing are all unrecoverable
1460
1461 return win_data.fence;
1462}
1463
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001464static int exynos5_set_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001465 hwc_display_contents_1_t* contents)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001466{
1467 if (!contents->dpy || !contents->sur)
1468 return 0;
1469
1470 hwc_layer_1_t *fb_layer = NULL;
Greg Hackmannec13dea2012-10-08 14:54:45 -07001471 int err = 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001472
1473 if (pdev->bufs.fb_window != NO_FB_NEEDED) {
1474 for (size_t i = 0; i < contents->numHwLayers; i++) {
1475 if (contents->hwLayers[i].compositionType ==
1476 HWC_FRAMEBUFFER_TARGET) {
1477 pdev->bufs.overlay_map[pdev->bufs.fb_window] = i;
1478 fb_layer = &contents->hwLayers[i];
1479 break;
Greg Hackmann600867e2012-08-23 12:58:02 -07001480 }
1481 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001482
1483 if (CC_UNLIKELY(!fb_layer)) {
1484 ALOGE("framebuffer target expected, but not provided");
Greg Hackmannec13dea2012-10-08 14:54:45 -07001485 err = -EINVAL;
1486 } else {
1487 ALOGV("framebuffer target buffer:");
1488 dump_layer(fb_layer);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001489 }
Greg Hackmann600867e2012-08-23 12:58:02 -07001490 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001491
Greg Hackmannec13dea2012-10-08 14:54:45 -07001492 int fence;
1493 if (!err) {
1494 fence = exynos5_post_fimd(pdev, contents);
1495 if (fence < 0)
1496 err = fence;
1497 }
1498
1499 if (err)
1500 fence = exynos5_clear_fimd(pdev);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001501
1502 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Greg Hackmannde6a0872012-10-10 16:57:24 -07001503 if (pdev->bufs.overlay_map[i] != -1) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001504 hwc_layer_1_t &layer =
1505 contents->hwLayers[pdev->bufs.overlay_map[i]];
Greg Hackmann02893a42012-10-02 11:39:13 -07001506 int dup_fd = dup_or_warn(fence);
Greg Hackmannde6a0872012-10-10 16:57:24 -07001507 if (pdev->bufs.gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1508 int gsc_idx = pdev->bufs.gsc_map[i].idx;
1509 exynos5_gsc_data_t &gsc = pdev->gsc[gsc_idx];
1510 gsc.dst_buf_fence[gsc.current_buf] = dup_fd;
1511 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1512 } else {
1513 layer.releaseFenceFd = dup_fd;
1514 }
Benoit Goby8bad7e32012-08-16 14:17:14 -07001515 }
1516 }
Greg Hackmann02893a42012-10-02 11:39:13 -07001517 contents->retireFenceFd = fence;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001518
Greg Hackmannec13dea2012-10-08 14:54:45 -07001519 return err;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001520}
1521
1522static int exynos5_set_hdmi(exynos5_hwc_composer_device_1_t *pdev,
1523 hwc_display_contents_1_t* contents)
1524{
Benoit Gobyb5501902012-10-01 00:29:01 -07001525 hwc_layer_1_t *fb_layer = NULL;
1526 hwc_layer_1_t *video_layer = NULL;
1527
Benoit Goby105be0b2012-09-21 13:19:30 -07001528 if (!pdev->hdmi_enabled) {
1529 for (size_t i = 0; i < contents->numHwLayers; i++) {
1530 hwc_layer_1_t &layer = contents->hwLayers[i];
Benoit Goby181e92b2012-10-04 16:35:57 -07001531 if (layer.acquireFenceFd != -1) {
Benoit Goby105be0b2012-09-21 13:19:30 -07001532 close(layer.acquireFenceFd);
Benoit Goby181e92b2012-10-04 16:35:57 -07001533 layer.acquireFenceFd = -1;
1534 }
Benoit Goby922abbf2012-09-19 19:24:19 -07001535 }
Benoit Goby48a69542012-09-21 17:12:28 -07001536 return 0;
Benoit Goby105be0b2012-09-21 13:19:30 -07001537 }
Benoit Goby48a69542012-09-21 17:12:28 -07001538
1539 for (size_t i = 0; i < contents->numHwLayers; i++) {
1540 hwc_layer_1_t &layer = contents->hwLayers[i];
Benoit Goby922abbf2012-09-19 19:24:19 -07001541
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001542 if (layer.flags & HWC_SKIP_LAYER) {
1543 ALOGV("HDMI skipping layer %d", i);
1544 continue;
1545 }
1546
Benoit Gobyb5501902012-10-01 00:29:01 -07001547 if (layer.compositionType == HWC_OVERLAY) {
1548 if (!layer.handle)
1549 continue;
1550
1551 ALOGV("HDMI video layer:");
1552 dump_layer(&layer);
1553
Greg Hackmannd6743822012-10-02 17:27:25 -07001554 exynos5_gsc_data_t &gsc = pdev->gsc[HDMI_GSC_IDX];
Benoit Goby181e92b2012-10-04 16:35:57 -07001555 int ret = exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc, 1,
Greg Hackmann92b0aad2012-10-18 10:37:59 -07001556 HAL_PIXEL_FORMAT_RGBX_8888, NULL);
Benoit Goby181e92b2012-10-04 16:35:57 -07001557 if (ret < 0) {
1558 ALOGE("failed to configure gscaler for video layer");
1559 continue;
1560 }
Benoit Gobyb5501902012-10-01 00:29:01 -07001561
Benoit Gobyb5501902012-10-01 00:29:01 -07001562 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
Benoit Gobyb5501902012-10-01 00:29:01 -07001563 private_handle_t *h = private_handle_t::dynamicCast(dst_buf);
1564
Benoit Goby181e92b2012-10-04 16:35:57 -07001565 int acquireFenceFd = gsc.dst_cfg.releaseFenceFd;
Greg Hackmannde6a0872012-10-10 16:57:24 -07001566 int releaseFenceFd = -1;
Benoit Goby181e92b2012-10-04 16:35:57 -07001567
Greg Hackmannde6a0872012-10-10 16:57:24 -07001568 hdmi_output(pdev, pdev->hdmi_layers[0], layer, h, acquireFenceFd,
1569 &releaseFenceFd);
Benoit Gobyb5501902012-10-01 00:29:01 -07001570 video_layer = &layer;
Greg Hackmannde6a0872012-10-10 16:57:24 -07001571
1572 gsc.dst_buf_fence[gsc.current_buf] = releaseFenceFd;
1573 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
Greg Hackmann02893a42012-10-02 11:39:13 -07001574 if (contents->retireFenceFd < 0)
1575 contents->retireFenceFd = dup_or_warn(releaseFenceFd);
1576 else {
1577 int merged = merge_or_warn("hdmi",
1578 contents->retireFenceFd, layer.releaseFenceFd);
1579 close(contents->retireFenceFd);
1580 contents->retireFenceFd = merged;
1581 }
Benoit Gobyb5501902012-10-01 00:29:01 -07001582 }
1583
Benoit Goby922abbf2012-09-19 19:24:19 -07001584 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
1585 if (!layer.handle)
1586 continue;
1587
1588 ALOGV("HDMI FB layer:");
1589 dump_layer(&layer);
1590
Benoit Gobyb5501902012-10-01 00:29:01 -07001591 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
Benoit Goby181e92b2012-10-04 16:35:57 -07001592 hdmi_output(pdev, pdev->hdmi_layers[1], layer, h, layer.acquireFenceFd,
1593 &layer.releaseFenceFd);
Benoit Gobyb5501902012-10-01 00:29:01 -07001594 fb_layer = &layer;
Greg Hackmann02893a42012-10-02 11:39:13 -07001595 if (contents->retireFenceFd < 0)
1596 contents->retireFenceFd = dup_or_warn(layer.releaseFenceFd);
1597 else {
1598 int merged = merge_or_warn("hdmi",
1599 contents->retireFenceFd, layer.releaseFenceFd);
1600 close(contents->retireFenceFd);
1601 contents->retireFenceFd = merged;
1602 }
Benoit Goby922abbf2012-09-19 19:24:19 -07001603 }
1604 }
1605
Greg Hackmannefd98532012-10-02 12:00:42 -07001606 if (!video_layer) {
Benoit Gobyb5501902012-10-01 00:29:01 -07001607 hdmi_disable_layer(pdev, pdev->hdmi_layers[0]);
Greg Hackmannefd98532012-10-02 12:00:42 -07001608 exynos5_cleanup_gsc_m2m(pdev, HDMI_GSC_IDX);
1609 }
Benoit Gobyb5501902012-10-01 00:29:01 -07001610 if (!fb_layer)
1611 hdmi_disable_layer(pdev, pdev->hdmi_layers[1]);
1612
Benoit Gobya37db022012-10-08 11:06:01 -07001613 if (exynos_v4l2_s_ctrl(pdev->hdmi_layers[1].fd, V4L2_CID_TV_UPDATE, 1) < 0) {
1614 ALOGE("%s: s_ctrl(CID_TV_UPDATE) failed %d", __func__, errno);
1615 return -1;
1616 }
1617
Benoit Goby922abbf2012-09-19 19:24:19 -07001618 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001619}
1620
Jesse Halle94046d2012-07-31 14:34:08 -07001621static int exynos5_set(struct hwc_composer_device_1 *dev,
1622 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001623{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001624 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001625 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001626
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001627 exynos5_hwc_composer_device_1_t *pdev =
1628 (exynos5_hwc_composer_device_1_t *)dev;
1629 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1630 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
Greg Hackmannec13dea2012-10-08 14:54:45 -07001631 int fimd_err = 0, hdmi_err = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001632
Greg Hackmannec13dea2012-10-08 14:54:45 -07001633 if (fimd_contents)
1634 fimd_err = exynos5_set_fimd(pdev, fimd_contents);
Erik Gilling87e707e2012-06-29 17:35:13 -07001635
Greg Hackmannec13dea2012-10-08 14:54:45 -07001636 if (hdmi_contents)
1637 hdmi_err = exynos5_set_hdmi(pdev, hdmi_contents);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001638
Greg Hackmannec13dea2012-10-08 14:54:45 -07001639 if (fimd_err)
1640 return fimd_err;
1641
1642 return hdmi_err;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001643}
1644
Erik Gilling87e707e2012-06-29 17:35:13 -07001645static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001646 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001647{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001648 struct exynos5_hwc_composer_device_1_t* pdev =
1649 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001650 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001651}
1652
Erik Gilling87e707e2012-06-29 17:35:13 -07001653static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001654{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001655 struct exynos5_hwc_composer_device_1_t *pdev =
1656 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001657
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001658 switch (what) {
1659 case HWC_BACKGROUND_LAYER_SUPPORTED:
1660 // we support the background layer
1661 value[0] = 1;
1662 break;
1663 case HWC_VSYNC_PERIOD:
1664 // vsync period in nanosecond
Greg Hackmannd92fe212012-09-11 14:28:41 -07001665 value[0] = pdev->vsync_period;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001666 break;
1667 default:
1668 // unsupported query
1669 return -EINVAL;
1670 }
1671 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001672}
1673
Jesse Halle94046d2012-07-31 14:34:08 -07001674static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1675 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001676{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001677 struct exynos5_hwc_composer_device_1_t *pdev =
1678 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001679
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001680 switch (event) {
1681 case HWC_EVENT_VSYNC:
1682 __u32 val = !!enabled;
1683 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1684 if (err < 0) {
1685 ALOGE("vsync ioctl failed");
1686 return -errno;
1687 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001688
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001689 return 0;
1690 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001691
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001692 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001693}
1694
Benoit Gobycdd61b32012-07-09 12:09:59 -07001695static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001696 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001697{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001698 const char *s = buff;
1699 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001700
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001701 while (*s) {
1702 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1703 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001704
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001705 s += strlen(s) + 1;
1706 if (s - buff >= len)
1707 break;
1708 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001709
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001710 if (pdev->hdmi_hpd) {
1711 if (hdmi_get_config(pdev)) {
1712 ALOGE("Error reading HDMI configuration");
1713 pdev->hdmi_hpd = false;
1714 return;
1715 }
Benoit Gobycb4ed2f2012-09-21 19:14:08 -07001716
1717 pdev->hdmi_blanked = false;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001718 }
1719
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001720 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001721 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001722 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001723
Jesse Hallda5a71d2012-08-21 12:12:55 -07001724 /* hwc_dev->procs is set right after the device is opened, but there is
1725 * still a race condition where a hotplug event might occur after the open
1726 * but before the procs are registered. */
1727 if (pdev->procs)
Benoit Gobya93919c2012-09-20 22:36:09 -07001728 pdev->procs->hotplug(pdev->procs, HWC_DISPLAY_EXTERNAL, pdev->hdmi_hpd);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001729}
1730
Greg Hackmann29724852012-07-23 15:31:10 -07001731static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001732{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001733 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001734 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001735
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001736 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1737 if (err < 0) {
1738 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1739 return;
1740 }
1741
Greg Hackmann29724852012-07-23 15:31:10 -07001742 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001743 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001744 if (err < 0) {
1745 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1746 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001747 }
Greg Hackmann29724852012-07-23 15:31:10 -07001748 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001749
Greg Hackmann29724852012-07-23 15:31:10 -07001750 errno = 0;
1751 uint64_t timestamp = strtoull(buf, NULL, 0);
1752 if (!errno)
1753 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001754}
1755
1756static void *hwc_vsync_thread(void *data)
1757{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001758 struct exynos5_hwc_composer_device_1_t *pdev =
1759 (struct exynos5_hwc_composer_device_1_t *)data;
1760 char uevent_desc[4096];
1761 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001762
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001763 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001764
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001765 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001766
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001767 char temp[4096];
1768 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1769 if (err < 0) {
1770 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1771 return NULL;
1772 }
1773
Greg Hackmann29724852012-07-23 15:31:10 -07001774 struct pollfd fds[2];
1775 fds[0].fd = pdev->vsync_fd;
1776 fds[0].events = POLLPRI;
1777 fds[1].fd = uevent_get_fd();
1778 fds[1].events = POLLIN;
1779
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001780 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001781 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001782
Greg Hackmann29724852012-07-23 15:31:10 -07001783 if (err > 0) {
1784 if (fds[0].revents & POLLPRI) {
1785 handle_vsync_event(pdev);
1786 }
1787 else if (fds[1].revents & POLLIN) {
1788 int len = uevent_next_event(uevent_desc,
1789 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001790
Greg Hackmann29724852012-07-23 15:31:10 -07001791 bool hdmi = !strcmp(uevent_desc,
1792 "change@/devices/virtual/switch/hdmi");
1793 if (hdmi)
1794 handle_hdmi_uevent(pdev, uevent_desc, len);
1795 }
1796 }
1797 else if (err == -1) {
1798 if (errno == EINTR)
1799 break;
1800 ALOGE("error in vsync thread: %s", strerror(errno));
1801 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001802 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001803
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001804 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001805}
1806
Benoit Gobycb4ed2f2012-09-21 19:14:08 -07001807static int exynos5_blank(struct hwc_composer_device_1 *dev, int disp, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001808{
1809 struct exynos5_hwc_composer_device_1_t *pdev =
1810 (struct exynos5_hwc_composer_device_1_t *)dev;
1811
Benoit Gobycb4ed2f2012-09-21 19:14:08 -07001812 switch (disp) {
1813 case HWC_DISPLAY_PRIMARY: {
1814 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1815 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1816 if (err < 0) {
1817 if (errno == EBUSY)
1818 ALOGI("%sblank ioctl failed (display already %sblanked)",
1819 blank ? "" : "un", blank ? "" : "un");
1820 else
1821 ALOGE("%sblank ioctl failed: %s", blank ? "" : "un",
1822 strerror(errno));
1823 return -errno;
1824 }
1825 break;
Colin Cross00359a82012-07-12 17:54:17 -07001826 }
1827
Benoit Gobycb4ed2f2012-09-21 19:14:08 -07001828 case HWC_DISPLAY_EXTERNAL:
1829 if (pdev->hdmi_hpd) {
1830 if (blank && !pdev->hdmi_blanked)
1831 hdmi_disable(pdev);
1832 pdev->hdmi_blanked = !!blank;
1833 }
1834 break;
1835
1836 default:
1837 return -EINVAL;
1838
Benoit Gobyad4e3582012-08-30 17:17:34 -07001839 }
1840
Colin Cross00359a82012-07-12 17:54:17 -07001841 return 0;
1842}
1843
Greg Hackmann600867e2012-08-23 12:58:02 -07001844static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1845{
1846 if (buff_len <= 0)
1847 return;
1848
1849 struct exynos5_hwc_composer_device_1_t *pdev =
1850 (struct exynos5_hwc_composer_device_1_t *)dev;
1851
1852 android::String8 result;
1853
Benoit Goby8bad7e32012-08-16 14:17:14 -07001854 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1855 if (pdev->hdmi_enabled)
1856 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001857 result.append(
1858 " type | handle | color | blend | format | position | size | gsc \n"
1859 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1860 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1861
1862 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1863 struct s3c_fb_win_config &config = pdev->last_config[i];
1864 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1865 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1866 "DISABLED", "-", "-", "-", "-", "-", "-");
1867 }
1868 else {
1869 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1870 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1871 "-", config.color, "-", "-");
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001872 else
1873 result.appendFormat(" %8s | %8x | %8s | %5x | %6x",
1874 pdev->last_fb_window == i ? "FB" : "OVERLAY",
1875 intptr_t(pdev->last_handles[i]),
1876 "-", config.blending, config.format);
Greg Hackmann600867e2012-08-23 12:58:02 -07001877
1878 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1879 config.w, config.h);
1880 }
1881 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1882 result.appendFormat(" | %3s", "-");
1883 else
1884 result.appendFormat(" | %3d",
1885 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1886 result.append("\n");
1887 }
1888
1889 strlcpy(buff, result.string(), buff_len);
1890}
1891
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001892static int exynos5_getDisplayConfigs(struct hwc_composer_device_1 *dev,
1893 int disp, uint32_t *configs, size_t *numConfigs)
1894{
1895 struct exynos5_hwc_composer_device_1_t *pdev =
1896 (struct exynos5_hwc_composer_device_1_t *)dev;
1897
1898 if (*numConfigs == 0)
1899 return 0;
1900
1901 if (disp == HWC_DISPLAY_PRIMARY) {
1902 configs[0] = 0;
1903 *numConfigs = 1;
1904 return 0;
1905 } else if (disp == HWC_DISPLAY_EXTERNAL) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001906 if (!pdev->hdmi_hpd) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001907 return -EINVAL;
1908 }
1909
1910 int err = hdmi_get_config(pdev);
1911 if (err) {
1912 return -EINVAL;
1913 }
1914
1915 configs[0] = 0;
1916 *numConfigs = 1;
1917 return 0;
1918 }
1919
1920 return -EINVAL;
1921}
1922
1923static int32_t exynos5_fimd_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1924 const uint32_t attribute)
1925{
1926 switch(attribute) {
1927 case HWC_DISPLAY_VSYNC_PERIOD:
1928 return pdev->vsync_period;
1929
1930 case HWC_DISPLAY_WIDTH:
1931 return pdev->xres;
1932
1933 case HWC_DISPLAY_HEIGHT:
1934 return pdev->yres;
1935
1936 case HWC_DISPLAY_DPI_X:
1937 return pdev->xdpi;
1938
1939 case HWC_DISPLAY_DPI_Y:
1940 return pdev->ydpi;
1941
1942 default:
1943 ALOGE("unknown display attribute %u", attribute);
1944 return -EINVAL;
1945 }
1946}
1947
1948static int32_t exynos5_hdmi_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1949 const uint32_t attribute)
1950{
1951 switch(attribute) {
1952 case HWC_DISPLAY_VSYNC_PERIOD:
1953 return pdev->vsync_period;
1954
1955 case HWC_DISPLAY_WIDTH:
1956 return pdev->hdmi_w;
1957
1958 case HWC_DISPLAY_HEIGHT:
1959 return pdev->hdmi_h;
1960
1961 case HWC_DISPLAY_DPI_X:
1962 case HWC_DISPLAY_DPI_Y:
1963 return 0; // unknown
1964
1965 default:
1966 ALOGE("unknown display attribute %u", attribute);
1967 return -EINVAL;
1968 }
1969}
1970
Jesse Hall54aa0d22012-09-20 11:43:49 -07001971static int exynos5_getDisplayAttributes(struct hwc_composer_device_1 *dev,
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001972 int disp, uint32_t config, const uint32_t *attributes, int32_t *values)
1973{
1974 struct exynos5_hwc_composer_device_1_t *pdev =
1975 (struct exynos5_hwc_composer_device_1_t *)dev;
1976
1977 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
1978 if (disp == HWC_DISPLAY_PRIMARY)
1979 values[i] = exynos5_fimd_attribute(pdev, attributes[i]);
1980 else if (disp == HWC_DISPLAY_EXTERNAL)
1981 values[i] = exynos5_hdmi_attribute(pdev, attributes[i]);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001982 else {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001983 ALOGE("unknown display type %u", disp);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001984 return -EINVAL;
1985 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001986 }
Jesse Hall54aa0d22012-09-20 11:43:49 -07001987
1988 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001989}
1990
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001991static int exynos5_close(hw_device_t* device);
1992
1993static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001994 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001995{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001996 int ret;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001997 int refreshRate;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001998 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001999
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002000 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
2001 return -EINVAL;
2002 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002003
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002004 struct exynos5_hwc_composer_device_1_t *dev;
2005 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
2006 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002007
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002008 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
2009 (const struct hw_module_t **)&dev->gralloc_module)) {
2010 ALOGE("failed to get gralloc hw module");
2011 ret = -EINVAL;
2012 goto err_get_module;
2013 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002014
Greg Hackmann9130e702012-07-30 14:53:04 -07002015 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
2016 &dev->alloc_device)) {
2017 ALOGE("failed to open gralloc");
2018 ret = -EINVAL;
2019 goto err_get_module;
2020 }
2021
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002022 dev->fd = open("/dev/graphics/fb0", O_RDWR);
2023 if (dev->fd < 0) {
2024 ALOGE("failed to open framebuffer");
2025 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07002026 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002027 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002028
Greg Hackmannd92fe212012-09-11 14:28:41 -07002029 struct fb_var_screeninfo info;
2030 if (ioctl(dev->fd, FBIOGET_VSCREENINFO, &info) == -1) {
2031 ALOGE("FBIOGET_VSCREENINFO ioctl failed: %s", strerror(errno));
2032 ret = -errno;
2033 goto err_ioctl;
2034 }
2035
2036 refreshRate = 1000000000000LLU /
2037 (
2038 uint64_t( info.upper_margin + info.lower_margin + info.yres )
2039 * ( info.left_margin + info.right_margin + info.xres )
2040 * info.pixclock
2041 );
2042
2043 if (refreshRate == 0) {
2044 ALOGW("invalid refresh rate, assuming 60 Hz");
2045 refreshRate = 60;
2046 }
2047
Greg Hackmann0c1ba822012-09-13 13:38:12 -07002048 dev->xres = 2560;
2049 dev->yres = 1600;
Greg Hackmannd92fe212012-09-11 14:28:41 -07002050 dev->xdpi = 1000 * (info.xres * 25.4f) / info.width;
2051 dev->ydpi = 1000 * (info.yres * 25.4f) / info.height;
2052 dev->vsync_period = 1000000000 / refreshRate;
2053
2054 ALOGV("using\n"
2055 "xres = %d px\n"
2056 "yres = %d px\n"
2057 "width = %d mm (%f dpi)\n"
2058 "height = %d mm (%f dpi)\n"
2059 "refresh rate = %d Hz\n",
2060 dev->xres, dev->yres, info.width, dev->xdpi / 1000.0,
2061 info.height, dev->ydpi / 1000.0, refreshRate);
2062
Greg Hackmannde6a0872012-10-10 16:57:24 -07002063 for (size_t i = 0; i < NUM_GSC_UNITS; i++)
2064 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
2065 dev->gsc[i].dst_buf_fence[j] = -1;
2066
Benoit Goby8bad7e32012-08-16 14:17:14 -07002067 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002068 if (dev->hdmi_mixer0 < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07002069 ALOGE("failed to open hdmi mixer0 subdev");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002070 ret = dev->hdmi_mixer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07002071 goto err_ioctl;
2072 }
2073
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002074 dev->hdmi_layers[0].id = 0;
2075 dev->hdmi_layers[0].fd = open("/dev/video16", O_RDWR);
2076 if (dev->hdmi_layers[0].fd < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07002077 ALOGE("failed to open hdmi layer0 device");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002078 ret = dev->hdmi_layers[0].fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07002079 goto err_mixer0;
2080 }
2081
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002082 dev->hdmi_layers[1].id = 1;
2083 dev->hdmi_layers[1].fd = open("/dev/video17", O_RDWR);
2084 if (dev->hdmi_layers[1].fd < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07002085 ALOGE("failed to open hdmi layer1 device");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002086 ret = dev->hdmi_layers[1].fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07002087 goto err_hdmi0;
2088 }
2089
Greg Hackmann29724852012-07-23 15:31:10 -07002090 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
2091 if (dev->vsync_fd < 0) {
2092 ALOGE("failed to open vsync attribute");
2093 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07002094 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07002095 }
2096
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002097 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
2098 if (sw_fd) {
2099 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07002100 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002101 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07002102 if (hdmi_get_config(dev)) {
2103 ALOGE("Error reading HDMI configuration");
2104 dev->hdmi_hpd = false;
2105 }
2106 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002107 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07002108
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002109 dev->base.common.tag = HARDWARE_DEVICE_TAG;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07002110 dev->base.common.version = HWC_DEVICE_API_VERSION_1_1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002111 dev->base.common.module = const_cast<hw_module_t *>(module);
2112 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002113
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002114 dev->base.prepare = exynos5_prepare;
2115 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07002116 dev->base.eventControl = exynos5_eventControl;
2117 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002118 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07002119 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07002120 dev->base.dump = exynos5_dump;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07002121 dev->base.getDisplayConfigs = exynos5_getDisplayConfigs;
2122 dev->base.getDisplayAttributes = exynos5_getDisplayAttributes;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002123
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002124 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002125
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002126 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
2127 if (ret) {
2128 ALOGE("failed to start vsync thread: %s", strerror(ret));
2129 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07002130 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002131 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002132
Greg Hackmann6e0f76d2012-09-17 17:47:09 -07002133 char value[PROPERTY_VALUE_MAX];
2134 property_get("debug.hwc.force_gpu", value, "0");
2135 dev->force_gpu = atoi(value);
2136
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002137 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002138
Greg Hackmann29724852012-07-23 15:31:10 -07002139err_vsync:
2140 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07002141err_mixer0:
2142 close(dev->hdmi_mixer0);
2143err_hdmi1:
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002144 close(dev->hdmi_layers[0].fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07002145err_hdmi0:
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002146 close(dev->hdmi_layers[1].fd);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002147err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002148 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07002149err_open_fb:
2150 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002151err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002152 free(dev);
2153 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002154}
2155
2156static int exynos5_close(hw_device_t *device)
2157{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002158 struct exynos5_hwc_composer_device_1_t *dev =
2159 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07002160 pthread_kill(dev->vsync_thread, SIGTERM);
2161 pthread_join(dev->vsync_thread, NULL);
Greg Hackmannefd98532012-10-02 12:00:42 -07002162 for (size_t i = 0; i < NUM_GSC_UNITS; i++)
2163 exynos5_cleanup_gsc_m2m(dev, i);
Greg Hackmann9130e702012-07-30 14:53:04 -07002164 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07002165 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07002166 close(dev->hdmi_mixer0);
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002167 close(dev->hdmi_layers[0].fd);
2168 close(dev->hdmi_layers[1].fd);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002169 close(dev->fd);
2170 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002171}
2172
2173static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002174 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002175};
2176
2177hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002178 common: {
2179 tag: HARDWARE_MODULE_TAG,
2180 module_api_version: HWC_MODULE_API_VERSION_0_1,
2181 hal_api_version: HARDWARE_HAL_API_VERSION,
2182 id: HWC_HARDWARE_MODULE_ID,
2183 name: "Samsung exynos5 hwcomposer module",
2184 author: "Google",
2185 methods: &exynos5_hwc_module_methods,
2186 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002187};