blob: a618a6a45a7758a3383eb585089ecb8bff90d707 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/drm_crtc.h>
34#include <drm/drm_edid.h>
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010043#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080044
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040046 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080047
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000049#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080050#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010051#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010052#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080053
Jesse Barnes79e53942008-11-07 14:24:08 -080054
Chris Wilson2e88e402010-08-07 11:01:27 +010055static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080056 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63};
64
65#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
Chris Wilsonea5b2132010-08-04 13:50:23 +010067struct intel_sdvo {
68 struct intel_encoder base;
69
Chris Wilsonf899fc62010-07-20 15:44:45 -070070 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070071 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080072
Chris Wilsone957d772010-09-24 12:52:03 +010073 struct i2c_adapter ddc;
74
Jesse Barnese2f0ba92009-02-02 15:11:52 -080075 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010076 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080077
Jesse Barnese2f0ba92009-02-02 15:11:52 -080078 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080080
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
Jesse Barnes79e53942008-11-07 14:24:08 -080085 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080086
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080088 int pixel_clock_min, pixel_clock_max;
89
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080090 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
Simon Farnsworthcc68c812011-09-21 17:13:30 +010096 /*
97 * Hotplug activation bits for this device
98 */
Jani Nikula5fa7ac92012-08-29 16:43:58 +030099 uint16_t hotplug_active;
Simon Farnsworthcc68c812011-09-21 17:13:30 +0100100
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800101 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
Ville Syrjälä55bc60d2013-01-17 16:31:29 +0200106 bool color_range_auto;
Chris Wilsone953fd72011-02-21 22:23:52 +0000107
108 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
Daniel Vettereef4eac2012-03-23 23:43:35 +0100117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
Zhao Yakuice6feab2009-08-24 13:50:26 +0800120 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100121 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
Ville Syrjäläabedc072013-01-17 16:31:31 +0200129 bool rgb_quant_range_selectable;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800130
Ma Ling7086c872009-05-13 11:20:06 +0800131 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100132 * This is set if we detect output of sdvo device as LVDS and
133 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800134 */
135 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800136
137 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800138 * This is sdvo fixed pannel mode pointer
139 */
140 struct drm_display_mode *sdvo_lvds_fixed_mode;
141
Eric Anholtc751ce42010-03-25 11:48:48 -0700142 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800143 uint8_t ddc_bus;
Egbert Eiche7518232012-10-13 14:29:31 +0200144
145 /*
146 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
147 */
148 uint8_t dtd_sdvo_flags;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800149};
150
151struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100152 struct intel_connector base;
153
Zhenyu Wang14571b42010-03-30 14:06:33 +0800154 /* Mark the type of connector */
155 uint16_t output_flag;
156
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100157 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100158
Zhenyu Wang14571b42010-03-30 14:06:33 +0800159 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100160 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800161 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100162 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800163
Zhao Yakuib9219c52009-09-10 15:45:46 +0800164 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100165 struct drm_property *left;
166 struct drm_property *right;
167 struct drm_property *top;
168 struct drm_property *bottom;
169 struct drm_property *hpos;
170 struct drm_property *vpos;
171 struct drm_property *contrast;
172 struct drm_property *saturation;
173 struct drm_property *hue;
174 struct drm_property *sharpness;
175 struct drm_property *flicker_filter;
176 struct drm_property *flicker_filter_adaptive;
177 struct drm_property *flicker_filter_2d;
178 struct drm_property *tv_chroma_filter;
179 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100180 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800181
182 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100183 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800184
185 /* Add variable to record current setting for the above property */
186 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100187
Zhao Yakuib9219c52009-09-10 15:45:46 +0800188 /* this is to get the range of margin.*/
189 u32 max_hscan, max_vscan;
190 u32 max_hpos, cur_hpos;
191 u32 max_vpos, cur_vpos;
192 u32 cur_brightness, max_brightness;
193 u32 cur_contrast, max_contrast;
194 u32 cur_saturation, max_saturation;
195 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100196 u32 cur_sharpness, max_sharpness;
197 u32 cur_flicker_filter, max_flicker_filter;
198 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
199 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
200 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
201 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100202 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800203};
204
Chris Wilson890f3352010-09-14 16:46:59 +0100205static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100206{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100207 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100208}
209
Chris Wilsondf0e9242010-09-09 16:20:55 +0100210static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
211{
212 return container_of(intel_attached_encoder(connector),
213 struct intel_sdvo, base);
214}
215
Chris Wilson615fb932010-08-04 13:50:24 +0100216static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
217{
218 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
219}
220
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800221static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100222intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100223static bool
224intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
225 struct intel_sdvo_connector *intel_sdvo_connector,
226 int type);
227static bool
228intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
229 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800230
Jesse Barnes79e53942008-11-07 14:24:08 -0800231/**
232 * Writes the SDVOB or SDVOC with the given value, but always writes both
233 * SDVOB and SDVOC to work around apparent hardware issues (according to
234 * comments in the BIOS).
235 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100236static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800237{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100238 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800239 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800240 u32 bval = val, cval = val;
241 int i;
242
Chris Wilsonea5b2132010-08-04 13:50:23 +0100243 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
244 I915_WRITE(intel_sdvo->sdvo_reg, val);
245 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800246 return;
247 }
248
Paulo Zanonie2debe92013-02-18 19:00:27 -0300249 if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
250 cval = I915_READ(GEN3_SDVOC);
251 else
252 bval = I915_READ(GEN3_SDVOB);
253
Jesse Barnes79e53942008-11-07 14:24:08 -0800254 /*
255 * Write the registers twice for luck. Sometimes,
256 * writing them only once doesn't appear to 'stick'.
257 * The BIOS does this too. Yay, magic
258 */
259 for (i = 0; i < 2; i++)
260 {
Paulo Zanonie2debe92013-02-18 19:00:27 -0300261 I915_WRITE(GEN3_SDVOB, bval);
262 I915_READ(GEN3_SDVOB);
263 I915_WRITE(GEN3_SDVOC, cval);
264 I915_READ(GEN3_SDVOC);
Jesse Barnes79e53942008-11-07 14:24:08 -0800265 }
266}
267
Chris Wilson32aad862010-08-04 13:50:25 +0100268static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800269{
Jesse Barnes79e53942008-11-07 14:24:08 -0800270 struct i2c_msg msgs[] = {
271 {
Chris Wilsone957d772010-09-24 12:52:03 +0100272 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800273 .flags = 0,
274 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100275 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800276 },
277 {
Chris Wilsone957d772010-09-24 12:52:03 +0100278 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800279 .flags = I2C_M_RD,
280 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100281 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800282 }
283 };
Chris Wilson32aad862010-08-04 13:50:25 +0100284 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800285
Chris Wilsonf899fc62010-07-20 15:44:45 -0700286 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800287 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800288
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800289 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800290 return false;
291}
292
Jesse Barnes79e53942008-11-07 14:24:08 -0800293#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
294/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100295static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800296 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100297 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800298} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100342
Akshay Joshi0206e352011-08-16 15:34:10 -0400343 /* Add the op code for SDVO enhancements */
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100388
Akshay Joshi0206e352011-08-16 15:34:10 -0400389 /* HDMI op code */
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
409 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800410};
411
Daniel Vettereef4eac2012-03-23 23:43:35 +0100412#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800413
Chris Wilsonea5b2132010-08-04 13:50:23 +0100414static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100415 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800416{
Jesse Barnes79e53942008-11-07 14:24:08 -0800417 int i;
418
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800419 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100420 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800421 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800422 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800423 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800424 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400425 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800426 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800427 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800428 break;
429 }
430 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400431 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800432 DRM_LOG_KMS("(%02X)", cmd);
433 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800434}
Jesse Barnes79e53942008-11-07 14:24:08 -0800435
Jesse Barnes79e53942008-11-07 14:24:08 -0800436static const char *cmd_status_names[] = {
437 "Power on",
438 "Success",
439 "Not supported",
440 "Invalid arg",
441 "Pending",
442 "Target not specified",
443 "Scaling not supported"
444};
445
Chris Wilsone957d772010-09-24 12:52:03 +0100446static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
447 const void *args, int args_len)
448{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700449 u8 *buf, status;
450 struct i2c_msg *msgs;
451 int i, ret = true;
452
Alan Cox0274df32012-07-25 13:51:04 +0100453 /* Would be simpler to allocate both in one go ? */
Mihnea Dobrescu-Balaur5c67eeb2013-03-10 14:22:48 +0200454 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700455 if (!buf)
456 return false;
457
458 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
Alan Cox0274df32012-07-25 13:51:04 +0100459 if (!msgs) {
460 kfree(buf);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700461 return false;
Alan Cox0274df32012-07-25 13:51:04 +0100462 }
Chris Wilsone957d772010-09-24 12:52:03 +0100463
464 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
465
466 for (i = 0; i < args_len; i++) {
467 msgs[i].addr = intel_sdvo->slave_addr;
468 msgs[i].flags = 0;
469 msgs[i].len = 2;
470 msgs[i].buf = buf + 2 *i;
471 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
472 buf[2*i + 1] = ((u8*)args)[i];
473 }
474 msgs[i].addr = intel_sdvo->slave_addr;
475 msgs[i].flags = 0;
476 msgs[i].len = 2;
477 msgs[i].buf = buf + 2*i;
478 buf[2*i + 0] = SDVO_I2C_OPCODE;
479 buf[2*i + 1] = cmd;
480
481 /* the following two are to read the response */
482 status = SDVO_I2C_CMD_STATUS;
483 msgs[i+1].addr = intel_sdvo->slave_addr;
484 msgs[i+1].flags = 0;
485 msgs[i+1].len = 1;
486 msgs[i+1].buf = &status;
487
488 msgs[i+2].addr = intel_sdvo->slave_addr;
489 msgs[i+2].flags = I2C_M_RD;
490 msgs[i+2].len = 1;
491 msgs[i+2].buf = &status;
492
493 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
494 if (ret < 0) {
495 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700496 ret = false;
497 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100498 }
499 if (ret != i+3) {
500 /* failure in I2C transfer */
501 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700502 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100503 }
504
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700505out:
506 kfree(msgs);
507 kfree(buf);
508 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100509}
510
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100511static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
512 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800513{
Chris Wilsonfc373812012-11-23 11:57:56 +0000514 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100515 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800516 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800517
Chris Wilsond121a5d2011-01-25 15:00:01 +0000518 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
519
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100520 /*
521 * The documentation states that all commands will be
522 * processed within 15µs, and that we need only poll
523 * the status byte a maximum of 3 times in order for the
524 * command to be complete.
525 *
526 * Check 5 times in case the hardware failed to read the docs.
Chris Wilsonfc373812012-11-23 11:57:56 +0000527 *
528 * Also beware that the first response by many devices is to
529 * reply PENDING and stall for time. TVs are notorious for
530 * requiring longer than specified to complete their replies.
531 * Originally (in the DDX long ago), the delay was only ever 15ms
532 * with an additional delay of 30ms applied for TVs added later after
533 * many experiments. To accommodate both sets of delays, we do a
534 * sequence of slow checks if the device is falling behind and fails
535 * to reply within 5*15µs.
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100536 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000537 if (!intel_sdvo_read_byte(intel_sdvo,
538 SDVO_I2C_CMD_STATUS,
539 &status))
540 goto log_fail;
541
Chris Wilsonfc373812012-11-23 11:57:56 +0000542 while (status == SDVO_CMD_STATUS_PENDING && --retry) {
543 if (retry < 10)
544 msleep(15);
545 else
546 udelay(15);
547
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100548 if (!intel_sdvo_read_byte(intel_sdvo,
549 SDVO_I2C_CMD_STATUS,
550 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000551 goto log_fail;
552 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100553
Jesse Barnes79e53942008-11-07 14:24:08 -0800554 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800555 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800556 else
yakui_zhao342dc382009-06-02 14:12:00 +0800557 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800558
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100559 if (status != SDVO_CMD_STATUS_SUCCESS)
560 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800561
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100562 /* Read the command response */
563 for (i = 0; i < response_len; i++) {
564 if (!intel_sdvo_read_byte(intel_sdvo,
565 SDVO_I2C_RETURN_0 + i,
566 &((u8 *)response)[i]))
567 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100568 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800569 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100570 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100571 return true;
572
573log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000574 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100575 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800576}
577
Hannes Ederb358d0a2008-12-18 21:18:47 +0100578static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800579{
580 if (mode->clock >= 100000)
581 return 1;
582 else if (mode->clock >= 50000)
583 return 2;
584 else
585 return 4;
586}
587
Chris Wilsone957d772010-09-24 12:52:03 +0100588static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
589 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800590{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000591 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100592 return intel_sdvo_write_cmd(intel_sdvo,
593 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
594 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800595}
596
Chris Wilson32aad862010-08-04 13:50:25 +0100597static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
598{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000599 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
600 return false;
601
602 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100603}
604
605static bool
606intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
607{
608 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
609 return false;
610
611 return intel_sdvo_read_response(intel_sdvo, value, len);
612}
613
614static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800615{
616 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100617 return intel_sdvo_set_value(intel_sdvo,
618 SDVO_CMD_SET_TARGET_INPUT,
619 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800620}
621
622/**
623 * Return whether each input is trained.
624 *
625 * This function is making an assumption about the layout of the response,
626 * which should be checked against the docs.
627 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100628static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800629{
630 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800631
Chris Wilson1a3665c2011-01-25 13:59:37 +0000632 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100633 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
634 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800635 return false;
636
637 *input_1 = response.input0_trained;
638 *input_2 = response.input1_trained;
639 return true;
640}
641
Chris Wilsonea5b2132010-08-04 13:50:23 +0100642static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800643 u16 outputs)
644{
Chris Wilson32aad862010-08-04 13:50:25 +0100645 return intel_sdvo_set_value(intel_sdvo,
646 SDVO_CMD_SET_ACTIVE_OUTPUTS,
647 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800648}
649
Daniel Vetter4ac41f42012-07-02 14:54:00 +0200650static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
651 u16 *outputs)
652{
653 return intel_sdvo_get_value(intel_sdvo,
654 SDVO_CMD_GET_ACTIVE_OUTPUTS,
655 outputs, sizeof(*outputs));
656}
657
Chris Wilsonea5b2132010-08-04 13:50:23 +0100658static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800659 int mode)
660{
Chris Wilson32aad862010-08-04 13:50:25 +0100661 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800662
663 switch (mode) {
664 case DRM_MODE_DPMS_ON:
665 state = SDVO_ENCODER_STATE_ON;
666 break;
667 case DRM_MODE_DPMS_STANDBY:
668 state = SDVO_ENCODER_STATE_STANDBY;
669 break;
670 case DRM_MODE_DPMS_SUSPEND:
671 state = SDVO_ENCODER_STATE_SUSPEND;
672 break;
673 case DRM_MODE_DPMS_OFF:
674 state = SDVO_ENCODER_STATE_OFF;
675 break;
676 }
677
Chris Wilson32aad862010-08-04 13:50:25 +0100678 return intel_sdvo_set_value(intel_sdvo,
679 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800680}
681
Chris Wilsonea5b2132010-08-04 13:50:23 +0100682static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800683 int *clock_min,
684 int *clock_max)
685{
686 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800687
Chris Wilson1a3665c2011-01-25 13:59:37 +0000688 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100689 if (!intel_sdvo_get_value(intel_sdvo,
690 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
691 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800692 return false;
693
694 /* Convert the values from units of 10 kHz to kHz. */
695 *clock_min = clocks.min * 10;
696 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800697 return true;
698}
699
Chris Wilsonea5b2132010-08-04 13:50:23 +0100700static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800701 u16 outputs)
702{
Chris Wilson32aad862010-08-04 13:50:25 +0100703 return intel_sdvo_set_value(intel_sdvo,
704 SDVO_CMD_SET_TARGET_OUTPUT,
705 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800706}
707
Chris Wilsonea5b2132010-08-04 13:50:23 +0100708static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800709 struct intel_sdvo_dtd *dtd)
710{
Chris Wilson32aad862010-08-04 13:50:25 +0100711 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
712 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800713}
714
Chris Wilsonea5b2132010-08-04 13:50:23 +0100715static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800716 struct intel_sdvo_dtd *dtd)
717{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100718 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800719 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
720}
721
Chris Wilsonea5b2132010-08-04 13:50:23 +0100722static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800723 struct intel_sdvo_dtd *dtd)
724{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100725 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800726 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
727}
728
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800729static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100730intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800731 uint16_t clock,
732 uint16_t width,
733 uint16_t height)
734{
735 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800736
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800737 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800738 args.clock = clock;
739 args.width = width;
740 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800741 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800742
Chris Wilsonea5b2132010-08-04 13:50:23 +0100743 if (intel_sdvo->is_lvds &&
744 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
745 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800746 args.scaled = 1;
747
Chris Wilson32aad862010-08-04 13:50:25 +0100748 return intel_sdvo_set_value(intel_sdvo,
749 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
750 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800751}
752
Chris Wilsonea5b2132010-08-04 13:50:23 +0100753static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800754 struct intel_sdvo_dtd *dtd)
755{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000756 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
757 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100758 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
759 &dtd->part1, sizeof(dtd->part1)) &&
760 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
761 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800762}
Jesse Barnes79e53942008-11-07 14:24:08 -0800763
Chris Wilsonea5b2132010-08-04 13:50:23 +0100764static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800765{
Chris Wilson32aad862010-08-04 13:50:25 +0100766 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800767}
768
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800769static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100770 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800771{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800772 uint16_t width, height;
773 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
774 uint16_t h_sync_offset, v_sync_offset;
Daniel Vetter66518192012-04-01 19:16:18 +0200775 int mode_clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800776
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200777 width = mode->hdisplay;
778 height = mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800779
780 /* do some mode translations */
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200781 h_blank_len = mode->htotal - mode->hdisplay;
782 h_sync_len = mode->hsync_end - mode->hsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800783
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200784 v_blank_len = mode->vtotal - mode->vdisplay;
785 v_sync_len = mode->vsync_end - mode->vsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800786
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200787 h_sync_offset = mode->hsync_start - mode->hdisplay;
788 v_sync_offset = mode->vsync_start - mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800789
Daniel Vetter66518192012-04-01 19:16:18 +0200790 mode_clock = mode->clock;
Daniel Vetter66518192012-04-01 19:16:18 +0200791 mode_clock /= 10;
792 dtd->part1.clock = mode_clock;
793
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800794 dtd->part1.h_active = width & 0xff;
795 dtd->part1.h_blank = h_blank_len & 0xff;
796 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800797 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800798 dtd->part1.v_active = height & 0xff;
799 dtd->part1.v_blank = v_blank_len & 0xff;
800 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800801 ((v_blank_len >> 8) & 0xf);
802
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800803 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800804 dtd->part2.h_sync_width = h_sync_len & 0xff;
805 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800806 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800807 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800808 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
809 ((v_sync_len & 0x30) >> 4);
810
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800811 dtd->part2.dtd_flags = 0x18;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200812 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
813 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800814 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200815 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800816 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200817 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800818
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800819 dtd->part2.sdvo_flags = 0;
820 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
821 dtd->part2.reserved = 0;
822}
Jesse Barnes79e53942008-11-07 14:24:08 -0800823
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800824static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100825 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800826{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800827 mode->hdisplay = dtd->part1.h_active;
828 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
829 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800830 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800831 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
832 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
833 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
834 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
835
836 mode->vdisplay = dtd->part1.v_active;
837 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
838 mode->vsync_start = mode->vdisplay;
839 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800840 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
842 mode->vsync_end = mode->vsync_start +
843 (dtd->part2.v_sync_off_width & 0xf);
844 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
845 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
846 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
847
848 mode->clock = dtd->part1.clock * 10;
849
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800850 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200851 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
852 mode->flags |= DRM_MODE_FLAG_INTERLACE;
853 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800854 mode->flags |= DRM_MODE_FLAG_PHSYNC;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200855 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800856 mode->flags |= DRM_MODE_FLAG_PVSYNC;
857}
858
Chris Wilsone27d8532010-10-22 09:15:22 +0100859static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800860{
Chris Wilsone27d8532010-10-22 09:15:22 +0100861 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800862
Chris Wilson1a3665c2011-01-25 13:59:37 +0000863 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100864 return intel_sdvo_get_value(intel_sdvo,
865 SDVO_CMD_GET_SUPP_ENCODE,
866 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800867}
868
Chris Wilsonea5b2132010-08-04 13:50:23 +0100869static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700870 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800871{
Chris Wilson32aad862010-08-04 13:50:25 +0100872 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800873}
874
Chris Wilsonea5b2132010-08-04 13:50:23 +0100875static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800876 uint8_t mode)
877{
Chris Wilson32aad862010-08-04 13:50:25 +0100878 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800879}
880
881#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100882static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800883{
884 int i, j;
885 uint8_t set_buf_index[2];
886 uint8_t av_split;
887 uint8_t buf_size;
888 uint8_t buf[48];
889 uint8_t *pos;
890
Chris Wilson32aad862010-08-04 13:50:25 +0100891 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800892
893 for (i = 0; i <= av_split; i++) {
894 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700895 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800896 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700897 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
898 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800899
900 pos = buf;
901 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700902 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800903 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700904 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800905 pos += 8;
906 }
907 }
908}
909#endif
910
Daniel Vetterb6e0e542012-10-21 12:52:39 +0200911static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
912 unsigned if_index, uint8_t tx_rate,
913 uint8_t *data, unsigned length)
914{
915 uint8_t set_buf_index[2] = { if_index, 0 };
916 uint8_t hbuf_size, tmp[8];
917 int i;
918
919 if (!intel_sdvo_set_value(intel_sdvo,
920 SDVO_CMD_SET_HBUF_INDEX,
921 set_buf_index, 2))
922 return false;
923
924 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
925 &hbuf_size, 1))
926 return false;
927
928 /* Buffer size is 0 based, hooray! */
929 hbuf_size++;
930
931 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
932 if_index, length, hbuf_size);
933
934 for (i = 0; i < hbuf_size; i += 8) {
935 memset(tmp, 0, 8);
936 if (i < length)
937 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
938
939 if (!intel_sdvo_set_value(intel_sdvo,
940 SDVO_CMD_SET_HBUF_DATA,
941 tmp, 8))
942 return false;
943 }
944
945 return intel_sdvo_set_value(intel_sdvo,
946 SDVO_CMD_SET_HBUF_TXRATE,
947 &tx_rate, 1);
948}
949
Ville Syrjäläabedc072013-01-17 16:31:31 +0200950static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
951 const struct drm_display_mode *adjusted_mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800952{
953 struct dip_infoframe avi_if = {
954 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200955 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800956 .len = DIP_LEN_AVI,
957 };
Daniel Vetter81014b92012-05-12 20:22:00 +0200958 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
Daniel Vetter50f3b012013-03-27 00:44:56 +0100959 struct intel_crtc *intel_crtc = to_intel_crtc(intel_sdvo->base.base.crtc);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800960
Ville Syrjäläabedc072013-01-17 16:31:31 +0200961 if (intel_sdvo->rgb_quant_range_selectable) {
Daniel Vetter50f3b012013-03-27 00:44:56 +0100962 if (intel_crtc->config.limited_color_range)
Ville Syrjäläabedc072013-01-17 16:31:31 +0200963 avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
964 else
965 avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
966 }
967
Ville Syrjälä96b219f2013-03-20 18:10:07 +0200968 avi_if.body.avi.VIC = drm_match_cea_mode(adjusted_mode);
969
David Härdeman3c17fe42010-09-24 21:44:32 +0200970 intel_dip_infoframe_csum(&avi_if);
971
Daniel Vetter81014b92012-05-12 20:22:00 +0200972 /* sdvo spec says that the ecc is handled by the hw, and it looks like
973 * we must not send the ecc field, either. */
974 memcpy(sdvo_data, &avi_if, 3);
975 sdvo_data[3] = avi_if.checksum;
976 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
977
Daniel Vetterb6e0e542012-10-21 12:52:39 +0200978 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
979 SDVO_HBUF_TX_VSYNC,
980 sdvo_data, sizeof(sdvo_data));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800981}
982
Chris Wilson32aad862010-08-04 13:50:25 +0100983static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800984{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800985 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100986 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800987
Chris Wilson40039752010-08-04 13:50:26 +0100988 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800989 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100990 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800991
Chris Wilson32aad862010-08-04 13:50:25 +0100992 BUILD_BUG_ON(sizeof(format) != 6);
993 return intel_sdvo_set_value(intel_sdvo,
994 SDVO_CMD_SET_TV_FORMAT,
995 &format, sizeof(format));
996}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800997
Chris Wilson32aad862010-08-04 13:50:25 +0100998static bool
999intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +02001000 const struct drm_display_mode *mode)
Chris Wilson32aad862010-08-04 13:50:25 +01001001{
1002 struct intel_sdvo_dtd output_dtd;
1003
1004 if (!intel_sdvo_set_target_output(intel_sdvo,
1005 intel_sdvo->attached_output))
1006 return false;
1007
1008 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1009 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1010 return false;
1011
1012 return true;
1013}
1014
Daniel Vetterc9a29692012-04-10 13:55:47 +02001015/* Asks the sdvo controller for the preferred input mode given the output mode.
1016 * Unfortunately we have to set up the full output mode to do that. */
Chris Wilson32aad862010-08-04 13:50:25 +01001017static bool
Daniel Vetterc9a29692012-04-10 13:55:47 +02001018intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +02001019 const struct drm_display_mode *mode,
Daniel Vetterc9a29692012-04-10 13:55:47 +02001020 struct drm_display_mode *adjusted_mode)
Chris Wilson32aad862010-08-04 13:50:25 +01001021{
Daniel Vetterc9a29692012-04-10 13:55:47 +02001022 struct intel_sdvo_dtd input_dtd;
1023
Chris Wilson32aad862010-08-04 13:50:25 +01001024 /* Reset the input timing to the screen. Assume always input 0. */
1025 if (!intel_sdvo_set_target_input(intel_sdvo))
1026 return false;
1027
1028 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1029 mode->clock / 10,
1030 mode->hdisplay,
1031 mode->vdisplay))
1032 return false;
1033
1034 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Daniel Vetterc9a29692012-04-10 13:55:47 +02001035 &input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +01001036 return false;
1037
Daniel Vetterc9a29692012-04-10 13:55:47 +02001038 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
Egbert Eiche7518232012-10-13 14:29:31 +02001039 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
Chris Wilson32aad862010-08-04 13:50:25 +01001040
Chris Wilson32aad862010-08-04 13:50:25 +01001041 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001042}
1043
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001044static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1045 struct intel_crtc_config *pipe_config)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001046{
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001047 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1048 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1049 struct drm_display_mode *mode = &pipe_config->requested_mode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001050
Daniel Vetter5d2d38d2013-03-27 00:45:01 +01001051 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1052 pipe_config->pipe_bpp = 8*3;
1053
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +01001054 if (HAS_PCH_SPLIT(encoder->base.dev))
1055 pipe_config->has_pch_encoder = true;
1056
Chris Wilson32aad862010-08-04 13:50:25 +01001057 /* We need to construct preferred input timings based on our
1058 * output timings. To do that, we have to set the output
1059 * timings, even though this isn't really the right place in
1060 * the sequence to do it. Oh well.
1061 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001062 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +01001063 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001064 return false;
Chris Wilson32aad862010-08-04 13:50:25 +01001065
Daniel Vetterc9a29692012-04-10 13:55:47 +02001066 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1067 mode,
1068 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001069 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +01001070 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +01001071 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001072 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001073
Daniel Vetterc9a29692012-04-10 13:55:47 +02001074 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1075 mode,
1076 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001077 }
Chris Wilson32aad862010-08-04 13:50:25 +01001078
1079 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +01001080 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +01001081 */
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001082 pipe_config->pixel_multiplier =
1083 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1084 adjusted_mode->clock *= pipe_config->pixel_multiplier;
Chris Wilson32aad862010-08-04 13:50:25 +01001085
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001086 if (intel_sdvo->color_range_auto) {
1087 /* See CEA-861-E - 5.1 Default Encoding Parameters */
Paulo Zanoni4f3a8bc2013-02-19 16:21:47 -03001088 /* FIXME: This bit is only valid when using TMDS encoding and 8
1089 * bit per color mode. */
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001090 if (intel_sdvo->has_hdmi_monitor &&
Thierry Reding18316c82012-12-20 15:41:44 +01001091 drm_match_cea_mode(adjusted_mode) > 1)
Paulo Zanoni4f3a8bc2013-02-19 16:21:47 -03001092 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001093 else
1094 intel_sdvo->color_range = 0;
1095 }
1096
Ville Syrjälä3685a8f2013-01-17 16:31:28 +02001097 if (intel_sdvo->color_range)
Daniel Vetter50f3b012013-03-27 00:44:56 +01001098 pipe_config->limited_color_range = true;
Ville Syrjälä3685a8f2013-01-17 16:31:28 +02001099
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001100 return true;
1101}
1102
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001103static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001104{
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001105 struct drm_device *dev = intel_encoder->base.dev;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001106 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001107 struct drm_crtc *crtc = intel_encoder->base.crtc;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001108 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001109 struct drm_display_mode *adjusted_mode =
1110 &intel_crtc->config.adjusted_mode;
1111 struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
1112 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&intel_encoder->base);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001113 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001114 struct intel_sdvo_in_out_map in_out;
Daniel Vetter66518192012-04-01 19:16:18 +02001115 struct intel_sdvo_dtd input_dtd, output_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001116 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001117
1118 if (!mode)
1119 return;
1120
1121 /* First, set the input mapping for the first input to our controlled
1122 * output. This is only correct if we're a single-input device, in
1123 * which case the first input is the output from the appropriate SDVO
1124 * channel on the motherboard. In a two-input device, the first input
1125 * will be SDVOB and the second SDVOC.
1126 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001127 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001128 in_out.in1 = 0;
1129
Pavel Roskinc74696b2010-09-02 14:46:34 -04001130 intel_sdvo_set_value(intel_sdvo,
1131 SDVO_CMD_SET_IN_OUT_MAP,
1132 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001133
Chris Wilson6c9547f2010-08-25 10:05:17 +01001134 /* Set the output timings to the screen */
1135 if (!intel_sdvo_set_target_output(intel_sdvo,
1136 intel_sdvo->attached_output))
1137 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001138
Daniel Vetter66518192012-04-01 19:16:18 +02001139 /* lvds has a special fixed output timing. */
1140 if (intel_sdvo->is_lvds)
1141 intel_sdvo_get_dtd_from_mode(&output_dtd,
1142 intel_sdvo->sdvo_lvds_fixed_mode);
1143 else
1144 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001145 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1146 DRM_INFO("Setting output timings on %s failed\n",
1147 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001148
1149 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001150 if (!intel_sdvo_set_target_input(intel_sdvo))
1151 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001152
Chris Wilson97aaf912011-01-04 20:10:52 +00001153 if (intel_sdvo->has_hdmi_monitor) {
1154 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1155 intel_sdvo_set_colorimetry(intel_sdvo,
1156 SDVO_COLORIMETRY_RGB256);
Ville Syrjäläabedc072013-01-17 16:31:31 +02001157 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
Chris Wilson97aaf912011-01-04 20:10:52 +00001158 } else
1159 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001160
Chris Wilson6c9547f2010-08-25 10:05:17 +01001161 if (intel_sdvo->is_tv &&
1162 !intel_sdvo_set_tv_format(intel_sdvo))
1163 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001164
Daniel Vetter66518192012-04-01 19:16:18 +02001165 /* We have tried to get input timing in mode_fixup, and filled into
1166 * adjusted_mode.
1167 */
1168 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Egbert Eiche7518232012-10-13 14:29:31 +02001169 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1170 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001171 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1172 DRM_INFO("Setting input timings on %s failed\n",
1173 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001174
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001175 switch (intel_crtc->config.pixel_multiplier) {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001176 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001177 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1178 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1179 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001180 }
Chris Wilson32aad862010-08-04 13:50:25 +01001181 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1182 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001183
1184 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001185 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001186 /* The real mode polarity is set by the SDVO commands, using
1187 * struct intel_sdvo_dtd. */
1188 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Ville Syrjälä3685a8f2013-01-17 16:31:28 +02001189 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
Chris Wilsone953fd72011-02-21 22:23:52 +00001190 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001191 if (INTEL_INFO(dev)->gen < 5)
1192 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001193 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001194 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001195 switch (intel_sdvo->sdvo_reg) {
Paulo Zanonie2debe92013-02-18 19:00:27 -03001196 case GEN3_SDVOB:
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001197 sdvox &= SDVOB_PRESERVE_MASK;
1198 break;
Paulo Zanonie2debe92013-02-18 19:00:27 -03001199 case GEN3_SDVOC:
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001200 sdvox &= SDVOC_PRESERVE_MASK;
1201 break;
1202 }
1203 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1204 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001205
1206 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
Paulo Zanonidc0fa712013-02-19 16:21:46 -03001207 sdvox |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe);
Paulo Zanoni3573c412011-10-14 18:16:22 -03001208 else
Paulo Zanonidc0fa712013-02-19 16:21:46 -03001209 sdvox |= SDVO_PIPE_SEL(intel_crtc->pipe);
Paulo Zanoni3573c412011-10-14 18:16:22 -03001210
Chris Wilsonda79de92010-11-22 11:12:46 +00001211 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001212 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001213
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001214 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001215 /* done in crtc_mode_set as the dpll_md reg must be written early */
1216 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1217 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001218 } else {
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001219 sdvox |= (intel_crtc->config.pixel_multiplier - 1)
1220 << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001221 }
1222
Chris Wilson6714afb2010-12-17 04:10:51 +00001223 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1224 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001225 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001226 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001227}
1228
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001229static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001230{
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001231 struct intel_sdvo_connector *intel_sdvo_connector =
1232 to_intel_sdvo_connector(&connector->base);
1233 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1234 u16 active_outputs;
1235
1236 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1237
1238 if (active_outputs & intel_sdvo_connector->output_flag)
1239 return true;
1240 else
1241 return false;
1242}
1243
1244static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1245 enum pipe *pipe)
1246{
1247 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -08001248 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001249 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Egbert Eich7a7d1fb2013-04-04 16:04:02 -04001250 u16 active_outputs;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001251 u32 tmp;
1252
1253 tmp = I915_READ(intel_sdvo->sdvo_reg);
Egbert Eich7a7d1fb2013-04-04 16:04:02 -04001254 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001255
Egbert Eich7a7d1fb2013-04-04 16:04:02 -04001256 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001257 return false;
1258
1259 if (HAS_PCH_CPT(dev))
1260 *pipe = PORT_TO_PIPE_CPT(tmp);
1261 else
1262 *pipe = PORT_TO_PIPE(tmp);
1263
1264 return true;
1265}
1266
Daniel Vetterce22c322012-07-01 15:31:04 +02001267static void intel_disable_sdvo(struct intel_encoder *encoder)
1268{
1269 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1270 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001271 u32 temp;
1272
Daniel Vetterce22c322012-07-01 15:31:04 +02001273 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1274 if (0)
1275 intel_sdvo_set_encoder_power_state(intel_sdvo,
1276 DRM_MODE_DPMS_OFF);
1277
1278 temp = I915_READ(intel_sdvo->sdvo_reg);
1279 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilson776ca7c2012-11-21 10:44:23 +00001280 /* HW workaround for IBX, we need to move the port to
1281 * transcoder A before disabling it. */
1282 if (HAS_PCH_IBX(encoder->base.dev)) {
1283 struct drm_crtc *crtc = encoder->base.crtc;
1284 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1285
1286 if (temp & SDVO_PIPE_B_SELECT) {
1287 temp &= ~SDVO_PIPE_B_SELECT;
1288 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1289 POSTING_READ(intel_sdvo->sdvo_reg);
1290
1291 /* Again we need to write this twice. */
1292 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1293 POSTING_READ(intel_sdvo->sdvo_reg);
1294
1295 /* Transcoder selection bits only update
1296 * effectively on vblank. */
1297 if (crtc)
1298 intel_wait_for_vblank(encoder->base.dev, pipe);
1299 else
1300 msleep(50);
1301 }
1302 }
1303
Daniel Vetterce22c322012-07-01 15:31:04 +02001304 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1305 }
1306}
1307
1308static void intel_enable_sdvo(struct intel_encoder *encoder)
1309{
1310 struct drm_device *dev = encoder->base.dev;
1311 struct drm_i915_private *dev_priv = dev->dev_private;
1312 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1313 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1314 u32 temp;
1315 bool input1, input2;
1316 int i;
1317 u8 status;
1318
1319 temp = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001320 if ((temp & SDVO_ENABLE) == 0) {
1321 /* HW workaround for IBX, we need to move the port
Paulo Zanonidc0fa712013-02-19 16:21:46 -03001322 * to transcoder A before disabling it, so restore it here. */
1323 if (HAS_PCH_IBX(dev))
1324 temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001325
Daniel Vetterce22c322012-07-01 15:31:04 +02001326 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001327 }
Daniel Vetterce22c322012-07-01 15:31:04 +02001328 for (i = 0; i < 2; i++)
1329 intel_wait_for_vblank(dev, intel_crtc->pipe);
1330
1331 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1332 /* Warn if the device reported failure to sync.
1333 * A lot of SDVO devices fail to notify of sync, but it's
1334 * a given it the status is a success, we succeeded.
1335 */
1336 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1337 DRM_DEBUG_KMS("First %s output reported failure to "
1338 "sync\n", SDVO_NAME(intel_sdvo));
1339 }
1340
1341 if (0)
1342 intel_sdvo_set_encoder_power_state(intel_sdvo,
1343 DRM_MODE_DPMS_ON);
1344 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1345}
1346
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001347static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
Jesse Barnes79e53942008-11-07 14:24:08 -08001348{
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001349 struct drm_crtc *crtc;
1350 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1351
1352 /* dvo supports only 2 dpms states. */
1353 if (mode != DRM_MODE_DPMS_ON)
1354 mode = DRM_MODE_DPMS_OFF;
1355
1356 if (mode == connector->dpms)
1357 return;
1358
1359 connector->dpms = mode;
1360
1361 /* Only need to change hw state when actually enabled */
1362 crtc = intel_sdvo->base.base.crtc;
1363 if (!crtc) {
1364 intel_sdvo->base.connectors_active = false;
1365 return;
1366 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001367
1368 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001369 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001370 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001371 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001372
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001373 intel_sdvo->base.connectors_active = false;
1374
1375 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001376 } else {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001377 intel_sdvo->base.connectors_active = true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001378
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001379 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001380
1381 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001382 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1383 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001384 }
Daniel Vetter0a91ca22012-07-02 21:54:27 +02001385
Daniel Vetterb9805142012-08-31 17:37:33 +02001386 intel_modeset_check_state(connector->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -08001387}
1388
Jesse Barnes79e53942008-11-07 14:24:08 -08001389static int intel_sdvo_mode_valid(struct drm_connector *connector,
1390 struct drm_display_mode *mode)
1391{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001392 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001393
1394 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1395 return MODE_NO_DBLESCAN;
1396
Chris Wilsonea5b2132010-08-04 13:50:23 +01001397 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001398 return MODE_CLOCK_LOW;
1399
Chris Wilsonea5b2132010-08-04 13:50:23 +01001400 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001401 return MODE_CLOCK_HIGH;
1402
Chris Wilson85454232010-08-08 14:28:23 +01001403 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001404 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001405 return MODE_PANEL;
1406
Chris Wilsonea5b2132010-08-04 13:50:23 +01001407 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001408 return MODE_PANEL;
1409 }
1410
Jesse Barnes79e53942008-11-07 14:24:08 -08001411 return MODE_OK;
1412}
1413
Chris Wilsonea5b2132010-08-04 13:50:23 +01001414static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001415{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001416 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001417 if (!intel_sdvo_get_value(intel_sdvo,
1418 SDVO_CMD_GET_DEVICE_CAPS,
1419 caps, sizeof(*caps)))
1420 return false;
1421
1422 DRM_DEBUG_KMS("SDVO capabilities:\n"
1423 " vendor_id: %d\n"
1424 " device_id: %d\n"
1425 " device_rev_id: %d\n"
1426 " sdvo_version_major: %d\n"
1427 " sdvo_version_minor: %d\n"
1428 " sdvo_inputs_mask: %d\n"
1429 " smooth_scaling: %d\n"
1430 " sharp_scaling: %d\n"
1431 " up_scaling: %d\n"
1432 " down_scaling: %d\n"
1433 " stall_support: %d\n"
1434 " output_flags: %d\n",
1435 caps->vendor_id,
1436 caps->device_id,
1437 caps->device_rev_id,
1438 caps->sdvo_version_major,
1439 caps->sdvo_version_minor,
1440 caps->sdvo_inputs_mask,
1441 caps->smooth_scaling,
1442 caps->sharp_scaling,
1443 caps->up_scaling,
1444 caps->down_scaling,
1445 caps->stall_support,
1446 caps->output_flags);
1447
1448 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001449}
1450
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001451static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001452{
Daniel Vetter768b1072012-05-04 11:29:56 +02001453 struct drm_device *dev = intel_sdvo->base.base.dev;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001454 uint16_t hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001455
Daniel Vetter768b1072012-05-04 11:29:56 +02001456 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1457 * on the line. */
1458 if (IS_I945G(dev) || IS_I945GM(dev))
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001459 return 0;
Daniel Vetter768b1072012-05-04 11:29:56 +02001460
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001461 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1462 &hotplug, sizeof(hotplug)))
1463 return 0;
1464
1465 return hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001466}
1467
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001468static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001469{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001470 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001471
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001472 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1473 &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001474}
1475
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001476static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001477intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001478{
Chris Wilsonbc652122011-01-25 13:28:29 +00001479 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001480 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001481}
1482
Chris Wilsonf899fc62010-07-20 15:44:45 -07001483static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001484intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001485{
Chris Wilsone957d772010-09-24 12:52:03 +01001486 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1487 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001488}
1489
Chris Wilsonff482d82010-09-15 10:40:38 +01001490/* Mac mini hack -- use the same DDC as the analog connector */
1491static struct edid *
1492intel_sdvo_get_analog_edid(struct drm_connector *connector)
1493{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001494 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001495
Chris Wilson0c1dab82010-11-23 22:37:01 +00001496 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001497 intel_gmbus_get_adapter(dev_priv,
1498 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001499}
1500
Ben Widawskyc43b5632012-04-16 14:07:40 -07001501static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001502intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001503{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001504 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001505 enum drm_connector_status status;
1506 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001507
Chris Wilsone957d772010-09-24 12:52:03 +01001508 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001509
Chris Wilsonea5b2132010-08-04 13:50:23 +01001510 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001511 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001512
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001513 /*
1514 * Don't use the 1 as the argument of DDC bus switch to get
1515 * the EDID. It is used for SDVO SPD ROM.
1516 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001517 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001518 intel_sdvo->ddc_bus = ddc;
1519 edid = intel_sdvo_get_edid(connector);
1520 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001521 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001522 }
Chris Wilsone957d772010-09-24 12:52:03 +01001523 /*
1524 * If we found the EDID on the other bus,
1525 * assume that is the correct DDC bus.
1526 */
1527 if (edid == NULL)
1528 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001529 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001530
1531 /*
1532 * When there is no edid and no monitor is connected with VGA
1533 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001534 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001535 if (edid == NULL)
1536 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001537
Chris Wilson2f551c82010-09-15 10:42:50 +01001538 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001539 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001540 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001541 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1542 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001543 if (intel_sdvo->is_hdmi) {
1544 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1545 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
Ville Syrjäläabedc072013-01-17 16:31:31 +02001546 intel_sdvo->rgb_quant_range_selectable =
1547 drm_rgb_quant_range_selectable(edid);
Chris Wilsonda79de92010-11-22 11:12:46 +00001548 }
Chris Wilson139467432011-02-09 20:01:16 +00001549 } else
1550 status = connector_status_disconnected;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001551 kfree(edid);
1552 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001553
1554 if (status == connector_status_connected) {
1555 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001556 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1557 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001558 }
1559
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001560 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001561}
1562
Chris Wilson52220082011-06-20 14:45:50 +01001563static bool
1564intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1565 struct edid *edid)
1566{
1567 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1568 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1569
1570 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1571 connector_is_digital, monitor_is_digital);
1572 return connector_is_digital == monitor_is_digital;
1573}
1574
Chris Wilson7b334fc2010-09-09 23:51:02 +01001575static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001576intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001577{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001578 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001579 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001580 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001581 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001582
Chris Wilsonfc373812012-11-23 11:57:56 +00001583 if (!intel_sdvo_get_value(intel_sdvo,
1584 SDVO_CMD_GET_ATTACHED_DISPLAYS,
1585 &response, 2))
Chris Wilson32aad862010-08-04 13:50:25 +01001586 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001587
Chris Wilsone957d772010-09-24 12:52:03 +01001588 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1589 response & 0xff, response >> 8,
1590 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001591
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001592 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001593 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001594
Chris Wilsonea5b2132010-08-04 13:50:23 +01001595 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001596
Chris Wilson97aaf912011-01-04 20:10:52 +00001597 intel_sdvo->has_hdmi_monitor = false;
1598 intel_sdvo->has_hdmi_audio = false;
Ville Syrjäläabedc072013-01-17 16:31:31 +02001599 intel_sdvo->rgb_quant_range_selectable = false;
Chris Wilson97aaf912011-01-04 20:10:52 +00001600
Chris Wilson615fb932010-08-04 13:50:24 +01001601 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001602 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001603 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001604 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001605 else {
1606 struct edid *edid;
1607
1608 /* if we have an edid check it matches the connection */
1609 edid = intel_sdvo_get_edid(connector);
1610 if (edid == NULL)
1611 edid = intel_sdvo_get_analog_edid(connector);
1612 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001613 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1614 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001615 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001616 else
1617 ret = connector_status_disconnected;
1618
Chris Wilson139467432011-02-09 20:01:16 +00001619 kfree(edid);
1620 } else
1621 ret = connector_status_connected;
1622 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001623
1624 /* May update encoder flag for like clock for SDVO TV, etc.*/
1625 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001626 intel_sdvo->is_tv = false;
1627 intel_sdvo->is_lvds = false;
1628 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001629
1630 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001631 intel_sdvo->is_tv = true;
1632 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001633 }
1634 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001635 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001636 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001637
1638 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001639}
1640
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001641static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001642{
Chris Wilsonff482d82010-09-15 10:40:38 +01001643 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001644
1645 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001646 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001647
Keith Packard57cdaf92009-09-04 13:07:54 +08001648 /*
1649 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1650 * link between analog and digital outputs. So, if the regular SDVO
1651 * DDC fails, check to see if the analog output is disconnected, in
1652 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001653 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001654 if (edid == NULL)
1655 edid = intel_sdvo_get_analog_edid(connector);
1656
Chris Wilsonff482d82010-09-15 10:40:38 +01001657 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001658 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1659 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001660 drm_mode_connector_update_edid_property(connector, edid);
1661 drm_add_edid_modes(connector, edid);
1662 }
Chris Wilson139467432011-02-09 20:01:16 +00001663
Chris Wilsonff482d82010-09-15 10:40:38 +01001664 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001665 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001666}
1667
1668/*
1669 * Set of SDVO TV modes.
1670 * Note! This is in reply order (see loop in get_tv_modes).
1671 * XXX: all 60Hz refresh?
1672 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001673static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001674 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1675 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001676 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001677 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1678 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001679 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001680 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1681 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001682 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001683 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1684 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001685 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001686 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1687 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001688 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001689 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1690 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001691 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001692 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1693 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001694 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001695 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1696 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001697 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001698 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1699 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001700 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001701 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1702 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001703 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001704 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1705 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001706 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001707 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1708 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001709 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001710 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1711 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001712 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001713 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1714 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001715 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001716 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1717 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001718 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001719 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1720 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001721 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001722 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1723 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001724 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001725 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1726 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001727 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001728 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1729 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001730 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1731};
1732
1733static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1734{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001735 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001736 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001737 uint32_t reply = 0, format_map = 0;
1738 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001739
1740 /* Read the list of supported input resolutions for the selected TV
1741 * format.
1742 */
Chris Wilson40039752010-08-04 13:50:26 +01001743 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001744 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001745 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001746
Chris Wilson32aad862010-08-04 13:50:25 +01001747 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1748 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001749
Chris Wilson32aad862010-08-04 13:50:25 +01001750 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001751 if (!intel_sdvo_write_cmd(intel_sdvo,
1752 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001753 &tv_res, sizeof(tv_res)))
1754 return;
1755 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001756 return;
1757
1758 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001759 if (reply & (1 << i)) {
1760 struct drm_display_mode *nmode;
1761 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001762 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001763 if (nmode)
1764 drm_mode_probed_add(connector, nmode);
1765 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001766}
1767
Ma Ling7086c872009-05-13 11:20:06 +08001768static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1769{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001770 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001771 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001772 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001773
1774 /*
1775 * Attempt to get the mode list from DDC.
1776 * Assume that the preferred modes are
1777 * arranged in priority order.
1778 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001779 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001780 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001781 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001782
1783 /* Fetch modes from VBT */
1784 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001785 newmode = drm_mode_duplicate(connector->dev,
1786 dev_priv->sdvo_lvds_vbt_mode);
1787 if (newmode != NULL) {
1788 /* Guarantee the mode is preferred */
1789 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1790 DRM_MODE_TYPE_DRIVER);
1791 drm_mode_probed_add(connector, newmode);
1792 }
1793 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001794
1795end:
1796 list_for_each_entry(newmode, &connector->probed_modes, head) {
1797 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001798 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001799 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001800
Chris Wilson85454232010-08-08 14:28:23 +01001801 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001802 break;
1803 }
1804 }
1805
Ma Ling7086c872009-05-13 11:20:06 +08001806}
1807
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001808static int intel_sdvo_get_modes(struct drm_connector *connector)
1809{
Chris Wilson615fb932010-08-04 13:50:24 +01001810 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001811
Chris Wilson615fb932010-08-04 13:50:24 +01001812 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001813 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001814 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001815 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001816 else
1817 intel_sdvo_get_ddc_modes(connector);
1818
Chris Wilson32aad862010-08-04 13:50:25 +01001819 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001820}
1821
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001822static void
1823intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001824{
Chris Wilson615fb932010-08-04 13:50:24 +01001825 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001826 struct drm_device *dev = connector->dev;
1827
Chris Wilsonc5521702010-08-04 13:50:28 +01001828 if (intel_sdvo_connector->left)
1829 drm_property_destroy(dev, intel_sdvo_connector->left);
1830 if (intel_sdvo_connector->right)
1831 drm_property_destroy(dev, intel_sdvo_connector->right);
1832 if (intel_sdvo_connector->top)
1833 drm_property_destroy(dev, intel_sdvo_connector->top);
1834 if (intel_sdvo_connector->bottom)
1835 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1836 if (intel_sdvo_connector->hpos)
1837 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1838 if (intel_sdvo_connector->vpos)
1839 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1840 if (intel_sdvo_connector->saturation)
1841 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1842 if (intel_sdvo_connector->contrast)
1843 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1844 if (intel_sdvo_connector->hue)
1845 drm_property_destroy(dev, intel_sdvo_connector->hue);
1846 if (intel_sdvo_connector->sharpness)
1847 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1848 if (intel_sdvo_connector->flicker_filter)
1849 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1850 if (intel_sdvo_connector->flicker_filter_2d)
1851 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1852 if (intel_sdvo_connector->flicker_filter_adaptive)
1853 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1854 if (intel_sdvo_connector->tv_luma_filter)
1855 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1856 if (intel_sdvo_connector->tv_chroma_filter)
1857 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001858 if (intel_sdvo_connector->dot_crawl)
1859 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001860 if (intel_sdvo_connector->brightness)
1861 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001862}
1863
Jesse Barnes79e53942008-11-07 14:24:08 -08001864static void intel_sdvo_destroy(struct drm_connector *connector)
1865{
Chris Wilson615fb932010-08-04 13:50:24 +01001866 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001867
Chris Wilsonc5521702010-08-04 13:50:28 +01001868 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001869 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001870 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001871
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001872 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001873 drm_sysfs_connector_remove(connector);
1874 drm_connector_cleanup(connector);
Jani Nikula4b745b12012-11-12 18:31:36 +02001875 kfree(intel_sdvo_connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001876}
1877
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001878static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1879{
1880 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1881 struct edid *edid;
1882 bool has_audio = false;
1883
1884 if (!intel_sdvo->is_hdmi)
1885 return false;
1886
1887 edid = intel_sdvo_get_edid(connector);
1888 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1889 has_audio = drm_detect_monitor_audio(edid);
Jani Nikula38ab8a22012-08-15 12:32:36 +03001890 kfree(edid);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001891
1892 return has_audio;
1893}
1894
Zhao Yakuice6feab2009-08-24 13:50:26 +08001895static int
1896intel_sdvo_set_property(struct drm_connector *connector,
1897 struct drm_property *property,
1898 uint64_t val)
1899{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001900 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001901 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001902 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001903 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001904 uint8_t cmd;
1905 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001906
Rob Clark662595d2012-10-11 20:36:04 -05001907 ret = drm_object_property_set_value(&connector->base, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001908 if (ret)
1909 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001910
Chris Wilson3f43c482011-05-12 22:17:24 +01001911 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001912 int i = val;
1913 bool has_audio;
1914
1915 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001916 return 0;
1917
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001918 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001919
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001920 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001921 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1922 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001923 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001924
1925 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001926 return 0;
1927
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001928 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001929 goto done;
1930 }
1931
Chris Wilsone953fd72011-02-21 22:23:52 +00001932 if (property == dev_priv->broadcast_rgb_property) {
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001933 switch (val) {
1934 case INTEL_BROADCAST_RGB_AUTO:
1935 intel_sdvo->color_range_auto = true;
1936 break;
1937 case INTEL_BROADCAST_RGB_FULL:
1938 intel_sdvo->color_range_auto = false;
1939 intel_sdvo->color_range = 0;
1940 break;
1941 case INTEL_BROADCAST_RGB_LIMITED:
1942 intel_sdvo->color_range_auto = false;
Paulo Zanoni4f3a8bc2013-02-19 16:21:47 -03001943 /* FIXME: this bit is only valid when using TMDS
1944 * encoding and 8 bit per color mode. */
1945 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001946 break;
1947 default:
1948 return -EINVAL;
1949 }
Zhao Yakuice6feab2009-08-24 13:50:26 +08001950 goto done;
1951 }
1952
Chris Wilsonc5521702010-08-04 13:50:28 +01001953#define CHECK_PROPERTY(name, NAME) \
1954 if (intel_sdvo_connector->name == property) { \
1955 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1956 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1957 cmd = SDVO_CMD_SET_##NAME; \
1958 intel_sdvo_connector->cur_##name = temp_value; \
1959 goto set_value; \
1960 }
1961
1962 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001963 if (val >= TV_FORMAT_NUM)
1964 return -EINVAL;
1965
Chris Wilson40039752010-08-04 13:50:26 +01001966 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001967 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001968 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001969
Chris Wilson40039752010-08-04 13:50:26 +01001970 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001971 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001972 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001973 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001974 if (intel_sdvo_connector->left == property) {
Rob Clark662595d2012-10-11 20:36:04 -05001975 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01001976 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001977 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001978 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001979
Chris Wilson615fb932010-08-04 13:50:24 +01001980 intel_sdvo_connector->left_margin = temp_value;
1981 intel_sdvo_connector->right_margin = temp_value;
1982 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001983 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001984 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001985 goto set_value;
1986 } else if (intel_sdvo_connector->right == property) {
Rob Clark662595d2012-10-11 20:36:04 -05001987 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01001988 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001989 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001990 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001991
Chris Wilson615fb932010-08-04 13:50:24 +01001992 intel_sdvo_connector->left_margin = temp_value;
1993 intel_sdvo_connector->right_margin = temp_value;
1994 temp_value = intel_sdvo_connector->max_hscan -
1995 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001996 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001997 goto set_value;
1998 } else if (intel_sdvo_connector->top == property) {
Rob Clark662595d2012-10-11 20:36:04 -05001999 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002000 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01002001 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01002002 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002003
Chris Wilson615fb932010-08-04 13:50:24 +01002004 intel_sdvo_connector->top_margin = temp_value;
2005 intel_sdvo_connector->bottom_margin = temp_value;
2006 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01002007 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002008 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01002009 goto set_value;
2010 } else if (intel_sdvo_connector->bottom == property) {
Rob Clark662595d2012-10-11 20:36:04 -05002011 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002012 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01002013 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01002014 return 0;
2015
Chris Wilson615fb932010-08-04 13:50:24 +01002016 intel_sdvo_connector->top_margin = temp_value;
2017 intel_sdvo_connector->bottom_margin = temp_value;
2018 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01002019 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002020 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01002021 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002022 }
Chris Wilsonc5521702010-08-04 13:50:28 +01002023 CHECK_PROPERTY(hpos, HPOS)
2024 CHECK_PROPERTY(vpos, VPOS)
2025 CHECK_PROPERTY(saturation, SATURATION)
2026 CHECK_PROPERTY(contrast, CONTRAST)
2027 CHECK_PROPERTY(hue, HUE)
2028 CHECK_PROPERTY(brightness, BRIGHTNESS)
2029 CHECK_PROPERTY(sharpness, SHARPNESS)
2030 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2031 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2032 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2033 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2034 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01002035 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002036 }
Chris Wilsonc5521702010-08-04 13:50:28 +01002037
2038 return -EINVAL; /* unknown property */
2039
2040set_value:
2041 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2042 return -EIO;
2043
2044
2045done:
Chris Wilsonc0c36b942012-12-19 16:08:43 +00002046 if (intel_sdvo->base.base.crtc)
2047 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
Chris Wilsonc5521702010-08-04 13:50:28 +01002048
Chris Wilson32aad862010-08-04 13:50:25 +01002049 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01002050#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08002051}
2052
Jesse Barnes79e53942008-11-07 14:24:08 -08002053static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02002054 .dpms = intel_sdvo_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08002055 .detect = intel_sdvo_detect,
2056 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08002057 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08002058 .destroy = intel_sdvo_destroy,
2059};
2060
2061static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2062 .get_modes = intel_sdvo_get_modes,
2063 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01002064 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08002065};
2066
Hannes Ederb358d0a2008-12-18 21:18:47 +01002067static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08002068{
Chris Wilson890f3352010-09-14 16:46:59 +01002069 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002070
Chris Wilsonea5b2132010-08-04 13:50:23 +01002071 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002072 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002073 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002074
Chris Wilsone957d772010-09-24 12:52:03 +01002075 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002076 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08002077}
2078
2079static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2080 .destroy = intel_sdvo_enc_destroy,
2081};
2082
Chris Wilsonb66d8422010-08-12 15:26:41 +01002083static void
2084intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2085{
2086 uint16_t mask = 0;
2087 unsigned int num_bits;
2088
2089 /* Make a mask of outputs less than or equal to our own priority in the
2090 * list.
2091 */
2092 switch (sdvo->controlled_output) {
2093 case SDVO_OUTPUT_LVDS1:
2094 mask |= SDVO_OUTPUT_LVDS1;
2095 case SDVO_OUTPUT_LVDS0:
2096 mask |= SDVO_OUTPUT_LVDS0;
2097 case SDVO_OUTPUT_TMDS1:
2098 mask |= SDVO_OUTPUT_TMDS1;
2099 case SDVO_OUTPUT_TMDS0:
2100 mask |= SDVO_OUTPUT_TMDS0;
2101 case SDVO_OUTPUT_RGB1:
2102 mask |= SDVO_OUTPUT_RGB1;
2103 case SDVO_OUTPUT_RGB0:
2104 mask |= SDVO_OUTPUT_RGB0;
2105 break;
2106 }
2107
2108 /* Count bits to find what number we are in the priority list. */
2109 mask &= sdvo->caps.output_flags;
2110 num_bits = hweight16(mask);
2111 /* If more than 3 outputs, default to DDC bus 3 for now. */
2112 if (num_bits > 3)
2113 num_bits = 3;
2114
2115 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2116 sdvo->ddc_bus = 1 << num_bits;
2117}
Jesse Barnes79e53942008-11-07 14:24:08 -08002118
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002119/**
2120 * Choose the appropriate DDC bus for control bus switch command for this
2121 * SDVO output based on the controlled output.
2122 *
2123 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2124 * outputs, then LVDS outputs.
2125 */
2126static void
Adam Jacksonb1083332010-04-23 16:07:40 -04002127intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002128 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002129{
Adam Jacksonb1083332010-04-23 16:07:40 -04002130 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002131
Daniel Vettereef4eac2012-03-23 23:43:35 +01002132 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04002133 mapping = &(dev_priv->sdvo_mappings[0]);
2134 else
2135 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002136
Chris Wilsonb66d8422010-08-12 15:26:41 +01002137 if (mapping->initialized)
2138 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2139 else
2140 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002141}
2142
Chris Wilsone957d772010-09-24 12:52:03 +01002143static void
2144intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2145 struct intel_sdvo *sdvo, u32 reg)
2146{
2147 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04002148 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01002149
Daniel Vettereef4eac2012-03-23 23:43:35 +01002150 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01002151 mapping = &dev_priv->sdvo_mappings[0];
2152 else
2153 mapping = &dev_priv->sdvo_mappings[1];
2154
Jani Nikula6cb16122012-10-22 16:12:17 +03002155 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
Chris Wilsone957d772010-09-24 12:52:03 +01002156 pin = mapping->i2c_pin;
Jani Nikula6cb16122012-10-22 16:12:17 +03002157 else
2158 pin = GMBUS_PORT_DPB;
Chris Wilsone957d772010-09-24 12:52:03 +01002159
Jani Nikula6cb16122012-10-22 16:12:17 +03002160 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2161
2162 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2163 * our code totally fails once we start using gmbus. Hence fall back to
2164 * bit banging for now. */
2165 intel_gmbus_force_bit(sdvo->i2c, true);
Chris Wilsone957d772010-09-24 12:52:03 +01002166}
2167
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002168/* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2169static void
2170intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2171{
2172 intel_gmbus_force_bit(sdvo->i2c, false);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002173}
2174
2175static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01002176intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002177{
Chris Wilson97aaf912011-01-04 20:10:52 +00002178 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002179}
2180
yakui_zhao714605e2009-05-31 17:18:07 +08002181static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01002182intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08002183{
2184 struct drm_i915_private *dev_priv = dev->dev_private;
2185 struct sdvo_device_mapping *my_mapping, *other_mapping;
2186
Daniel Vettereef4eac2012-03-23 23:43:35 +01002187 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08002188 my_mapping = &dev_priv->sdvo_mappings[0];
2189 other_mapping = &dev_priv->sdvo_mappings[1];
2190 } else {
2191 my_mapping = &dev_priv->sdvo_mappings[1];
2192 other_mapping = &dev_priv->sdvo_mappings[0];
2193 }
2194
2195 /* If the BIOS described our SDVO device, take advantage of it. */
2196 if (my_mapping->slave_addr)
2197 return my_mapping->slave_addr;
2198
2199 /* If the BIOS only described a different SDVO device, use the
2200 * address that it isn't using.
2201 */
2202 if (other_mapping->slave_addr) {
2203 if (other_mapping->slave_addr == 0x70)
2204 return 0x72;
2205 else
2206 return 0x70;
2207 }
2208
2209 /* No SDVO device info is found for another DVO port,
2210 * so use mapping assumption we had before BIOS parsing.
2211 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01002212 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08002213 return 0x70;
2214 else
2215 return 0x72;
2216}
2217
Zhenyu Wang14571b42010-03-30 14:06:33 +08002218static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01002219intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2220 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002221{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002222 drm_connector_init(encoder->base.base.dev,
2223 &connector->base.base,
2224 &intel_sdvo_connector_funcs,
2225 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002226
Chris Wilsondf0e9242010-09-09 16:20:55 +01002227 drm_connector_helper_add(&connector->base.base,
2228 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002229
Peter Ross8f4839e2012-01-28 14:49:25 +01002230 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002231 connector->base.base.doublescan_allowed = 0;
2232 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002233 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002234
Chris Wilsondf0e9242010-09-09 16:20:55 +01002235 intel_connector_attach_encoder(&connector->base, &encoder->base);
2236 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002237}
2238
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002239static void
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002240intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2241 struct intel_sdvo_connector *connector)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002242{
2243 struct drm_device *dev = connector->base.base.dev;
2244
Chris Wilson3f43c482011-05-12 22:17:24 +01002245 intel_attach_force_audio_property(&connector->base.base);
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002246 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
Chris Wilsone953fd72011-02-21 22:23:52 +00002247 intel_attach_broadcast_rgb_property(&connector->base.base);
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002248 intel_sdvo->color_range_auto = true;
2249 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002250}
2251
Zhenyu Wang14571b42010-03-30 14:06:33 +08002252static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002253intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002254{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002255 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002256 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002257 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002258 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002259 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002260
Chris Wilson615fb932010-08-04 13:50:24 +01002261 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2262 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002263 return false;
2264
Zhenyu Wang14571b42010-03-30 14:06:33 +08002265 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002266 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002267 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002268 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002269 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002270 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002271 }
2272
Chris Wilson615fb932010-08-04 13:50:24 +01002273 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002274 connector = &intel_connector->base;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002275 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2276 intel_sdvo_connector->output_flag) {
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002277 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002278 /* Some SDVO devices have one-shot hotplug interrupts.
2279 * Ensure that they get re-enabled when an interrupt happens.
2280 */
2281 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2282 intel_sdvo_enable_hotplug(intel_encoder);
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002283 } else {
Egbert Eich821450c2013-04-16 13:36:55 +02002284 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002285 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002286 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2287 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2288
Chris Wilsone27d8532010-10-22 09:15:22 +01002289 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002290 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002291 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002292 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002293
Chris Wilsondf0e9242010-09-09 16:20:55 +01002294 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002295 if (intel_sdvo->is_hdmi)
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002296 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002297
2298 return true;
2299}
2300
2301static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002302intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002303{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002304 struct drm_encoder *encoder = &intel_sdvo->base.base;
2305 struct drm_connector *connector;
2306 struct intel_connector *intel_connector;
2307 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002308
Chris Wilson615fb932010-08-04 13:50:24 +01002309 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2310 if (!intel_sdvo_connector)
2311 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002312
Chris Wilson615fb932010-08-04 13:50:24 +01002313 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002314 connector = &intel_connector->base;
2315 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2316 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002317
Chris Wilson4ef69c72010-09-09 15:14:28 +01002318 intel_sdvo->controlled_output |= type;
2319 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002320
Chris Wilson4ef69c72010-09-09 15:14:28 +01002321 intel_sdvo->is_tv = true;
2322 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002323
Chris Wilsondf0e9242010-09-09 16:20:55 +01002324 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002325
Chris Wilson4ef69c72010-09-09 15:14:28 +01002326 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002327 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002328
Chris Wilson4ef69c72010-09-09 15:14:28 +01002329 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002330 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002331
Chris Wilson4ef69c72010-09-09 15:14:28 +01002332 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002333
2334err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002335 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002336 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002337}
2338
2339static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002340intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002341{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002342 struct drm_encoder *encoder = &intel_sdvo->base.base;
2343 struct drm_connector *connector;
2344 struct intel_connector *intel_connector;
2345 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002346
Chris Wilson615fb932010-08-04 13:50:24 +01002347 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2348 if (!intel_sdvo_connector)
2349 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002350
Chris Wilson615fb932010-08-04 13:50:24 +01002351 intel_connector = &intel_sdvo_connector->base;
2352 connector = &intel_connector->base;
Egbert Eich821450c2013-04-16 13:36:55 +02002353 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002354 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2355 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002356
Chris Wilson4ef69c72010-09-09 15:14:28 +01002357 if (device == 0) {
2358 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2359 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2360 } else if (device == 1) {
2361 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2362 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2363 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002364
Chris Wilsondf0e9242010-09-09 16:20:55 +01002365 intel_sdvo_connector_init(intel_sdvo_connector,
2366 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002367 return true;
2368}
2369
2370static bool
2371intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2372{
2373 struct drm_encoder *encoder = &intel_sdvo->base.base;
2374 struct drm_connector *connector;
2375 struct intel_connector *intel_connector;
2376 struct intel_sdvo_connector *intel_sdvo_connector;
2377
2378 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2379 if (!intel_sdvo_connector)
2380 return false;
2381
2382 intel_connector = &intel_sdvo_connector->base;
2383 connector = &intel_connector->base;
2384 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2385 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2386
2387 if (device == 0) {
2388 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2389 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2390 } else if (device == 1) {
2391 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2392 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2393 }
2394
Chris Wilsondf0e9242010-09-09 16:20:55 +01002395 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002396 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002397 goto err;
2398
2399 return true;
2400
2401err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002402 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002403 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002404}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002405
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002406static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002407intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002408{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002409 intel_sdvo->is_tv = false;
2410 intel_sdvo->base.needs_tv_clock = false;
2411 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002412
Zhenyu Wang14571b42010-03-30 14:06:33 +08002413 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002414
Zhenyu Wang14571b42010-03-30 14:06:33 +08002415 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002416 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002417 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002418
Zhenyu Wang14571b42010-03-30 14:06:33 +08002419 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002420 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002421 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002422
Zhenyu Wang14571b42010-03-30 14:06:33 +08002423 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002424 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002425 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002426 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002427
Zhenyu Wang14571b42010-03-30 14:06:33 +08002428 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002429 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002430 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002431
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002432 if (flags & SDVO_OUTPUT_YPRPB0)
2433 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2434 return false;
2435
Zhenyu Wang14571b42010-03-30 14:06:33 +08002436 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002437 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002438 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002439
Zhenyu Wang14571b42010-03-30 14:06:33 +08002440 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002441 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002442 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002443
Zhenyu Wang14571b42010-03-30 14:06:33 +08002444 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002445 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002446 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002447
Zhenyu Wang14571b42010-03-30 14:06:33 +08002448 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002449 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002450 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002451
Zhenyu Wang14571b42010-03-30 14:06:33 +08002452 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002453 unsigned char bytes[2];
2454
Chris Wilsonea5b2132010-08-04 13:50:23 +01002455 intel_sdvo->controlled_output = 0;
2456 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002457 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002458 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002459 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002460 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002461 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002462 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002463
Zhenyu Wang14571b42010-03-30 14:06:33 +08002464 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002465}
2466
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002467static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2468{
2469 struct drm_device *dev = intel_sdvo->base.base.dev;
2470 struct drm_connector *connector, *tmp;
2471
2472 list_for_each_entry_safe(connector, tmp,
2473 &dev->mode_config.connector_list, head) {
2474 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2475 intel_sdvo_destroy(connector);
2476 }
2477}
2478
Chris Wilson32aad862010-08-04 13:50:25 +01002479static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2480 struct intel_sdvo_connector *intel_sdvo_connector,
2481 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002482{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002483 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002484 struct intel_sdvo_tv_format format;
2485 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002486
Chris Wilson32aad862010-08-04 13:50:25 +01002487 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2488 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002489
Chris Wilson1a3665c2011-01-25 13:59:37 +00002490 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002491 if (!intel_sdvo_get_value(intel_sdvo,
2492 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2493 &format, sizeof(format)))
2494 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002495
Chris Wilson32aad862010-08-04 13:50:25 +01002496 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002497
2498 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002499 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002500
Chris Wilson615fb932010-08-04 13:50:24 +01002501 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002502 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002503 if (format_map & (1 << i))
2504 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002505
2506
Chris Wilsonc5521702010-08-04 13:50:28 +01002507 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002508 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2509 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002510 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002511 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002512
Chris Wilson615fb932010-08-04 13:50:24 +01002513 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002514 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002515 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002516 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002517
Chris Wilson40039752010-08-04 13:50:26 +01002518 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Rob Clark662595d2012-10-11 20:36:04 -05002519 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002520 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002521 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002522
2523}
2524
Chris Wilsonc5521702010-08-04 13:50:28 +01002525#define ENHANCEMENT(name, NAME) do { \
2526 if (enhancements.name) { \
2527 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2528 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2529 return false; \
2530 intel_sdvo_connector->max_##name = data_value[0]; \
2531 intel_sdvo_connector->cur_##name = response; \
2532 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002533 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002534 if (!intel_sdvo_connector->name) return false; \
Rob Clark662595d2012-10-11 20:36:04 -05002535 drm_object_attach_property(&connector->base, \
Chris Wilsonc5521702010-08-04 13:50:28 +01002536 intel_sdvo_connector->name, \
2537 intel_sdvo_connector->cur_##name); \
2538 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2539 data_value[0], data_value[1], response); \
2540 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002541} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002542
2543static bool
2544intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2545 struct intel_sdvo_connector *intel_sdvo_connector,
2546 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002547{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002548 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002549 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002550 uint16_t response, data_value[2];
2551
Chris Wilsonc5521702010-08-04 13:50:28 +01002552 /* when horizontal overscan is supported, Add the left/right property */
2553 if (enhancements.overscan_h) {
2554 if (!intel_sdvo_get_value(intel_sdvo,
2555 SDVO_CMD_GET_MAX_OVERSCAN_H,
2556 &data_value, 4))
2557 return false;
2558
2559 if (!intel_sdvo_get_value(intel_sdvo,
2560 SDVO_CMD_GET_OVERSCAN_H,
2561 &response, 2))
2562 return false;
2563
2564 intel_sdvo_connector->max_hscan = data_value[0];
2565 intel_sdvo_connector->left_margin = data_value[0] - response;
2566 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2567 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002568 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002569 if (!intel_sdvo_connector->left)
2570 return false;
2571
Rob Clark662595d2012-10-11 20:36:04 -05002572 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002573 intel_sdvo_connector->left,
2574 intel_sdvo_connector->left_margin);
2575
2576 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002577 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002578 if (!intel_sdvo_connector->right)
2579 return false;
2580
Rob Clark662595d2012-10-11 20:36:04 -05002581 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002582 intel_sdvo_connector->right,
2583 intel_sdvo_connector->right_margin);
2584 DRM_DEBUG_KMS("h_overscan: max %d, "
2585 "default %d, current %d\n",
2586 data_value[0], data_value[1], response);
2587 }
2588
2589 if (enhancements.overscan_v) {
2590 if (!intel_sdvo_get_value(intel_sdvo,
2591 SDVO_CMD_GET_MAX_OVERSCAN_V,
2592 &data_value, 4))
2593 return false;
2594
2595 if (!intel_sdvo_get_value(intel_sdvo,
2596 SDVO_CMD_GET_OVERSCAN_V,
2597 &response, 2))
2598 return false;
2599
2600 intel_sdvo_connector->max_vscan = data_value[0];
2601 intel_sdvo_connector->top_margin = data_value[0] - response;
2602 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2603 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002604 drm_property_create_range(dev, 0,
2605 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002606 if (!intel_sdvo_connector->top)
2607 return false;
2608
Rob Clark662595d2012-10-11 20:36:04 -05002609 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002610 intel_sdvo_connector->top,
2611 intel_sdvo_connector->top_margin);
2612
2613 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002614 drm_property_create_range(dev, 0,
2615 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002616 if (!intel_sdvo_connector->bottom)
2617 return false;
2618
Rob Clark662595d2012-10-11 20:36:04 -05002619 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002620 intel_sdvo_connector->bottom,
2621 intel_sdvo_connector->bottom_margin);
2622 DRM_DEBUG_KMS("v_overscan: max %d, "
2623 "default %d, current %d\n",
2624 data_value[0], data_value[1], response);
2625 }
2626
2627 ENHANCEMENT(hpos, HPOS);
2628 ENHANCEMENT(vpos, VPOS);
2629 ENHANCEMENT(saturation, SATURATION);
2630 ENHANCEMENT(contrast, CONTRAST);
2631 ENHANCEMENT(hue, HUE);
2632 ENHANCEMENT(sharpness, SHARPNESS);
2633 ENHANCEMENT(brightness, BRIGHTNESS);
2634 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2635 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2636 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2637 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2638 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2639
Chris Wilsone0442182010-08-04 13:50:29 +01002640 if (enhancements.dot_crawl) {
2641 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2642 return false;
2643
2644 intel_sdvo_connector->max_dot_crawl = 1;
2645 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2646 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002647 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002648 if (!intel_sdvo_connector->dot_crawl)
2649 return false;
2650
Rob Clark662595d2012-10-11 20:36:04 -05002651 drm_object_attach_property(&connector->base,
Chris Wilsone0442182010-08-04 13:50:29 +01002652 intel_sdvo_connector->dot_crawl,
2653 intel_sdvo_connector->cur_dot_crawl);
2654 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2655 }
2656
Chris Wilsonc5521702010-08-04 13:50:28 +01002657 return true;
2658}
2659
2660static bool
2661intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2662 struct intel_sdvo_connector *intel_sdvo_connector,
2663 struct intel_sdvo_enhancements_reply enhancements)
2664{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002665 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002666 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2667 uint16_t response, data_value[2];
2668
2669 ENHANCEMENT(brightness, BRIGHTNESS);
2670
2671 return true;
2672}
2673#undef ENHANCEMENT
2674
2675static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2676 struct intel_sdvo_connector *intel_sdvo_connector)
2677{
2678 union {
2679 struct intel_sdvo_enhancements_reply reply;
2680 uint16_t response;
2681 } enhancements;
2682
Chris Wilson1a3665c2011-01-25 13:59:37 +00002683 BUILD_BUG_ON(sizeof(enhancements) != 2);
2684
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002685 enhancements.response = 0;
2686 intel_sdvo_get_value(intel_sdvo,
2687 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2688 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002689 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002690 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002691 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002692 }
Chris Wilson32aad862010-08-04 13:50:25 +01002693
Chris Wilsonc5521702010-08-04 13:50:28 +01002694 if (IS_TV(intel_sdvo_connector))
2695 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002696 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002697 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2698 else
2699 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002700}
Chris Wilson32aad862010-08-04 13:50:25 +01002701
Chris Wilsone957d772010-09-24 12:52:03 +01002702static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2703 struct i2c_msg *msgs,
2704 int num)
2705{
2706 struct intel_sdvo *sdvo = adapter->algo_data;
2707
2708 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2709 return -EIO;
2710
2711 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2712}
2713
2714static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2715{
2716 struct intel_sdvo *sdvo = adapter->algo_data;
2717 return sdvo->i2c->algo->functionality(sdvo->i2c);
2718}
2719
2720static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2721 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2722 .functionality = intel_sdvo_ddc_proxy_func
2723};
2724
2725static bool
2726intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2727 struct drm_device *dev)
2728{
2729 sdvo->ddc.owner = THIS_MODULE;
2730 sdvo->ddc.class = I2C_CLASS_DDC;
2731 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2732 sdvo->ddc.dev.parent = &dev->pdev->dev;
2733 sdvo->ddc.algo_data = sdvo;
2734 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2735
2736 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002737}
2738
Daniel Vettereef4eac2012-03-23 23:43:35 +01002739bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002740{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002741 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002742 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002743 struct intel_sdvo *intel_sdvo;
Chris Wilson084b6122012-05-11 18:01:33 +01002744 u32 hotplug_mask;
Jesse Barnes79e53942008-11-07 14:24:08 -08002745 int i;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002746 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2747 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002748 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002749
Chris Wilson56184e32011-05-17 14:03:50 +01002750 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002751 intel_sdvo->is_sdvob = is_sdvob;
2752 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002753 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002754 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2755 goto err_i2c_bus;
Chris Wilsone957d772010-09-24 12:52:03 +01002756
Chris Wilson56184e32011-05-17 14:03:50 +01002757 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002758 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002759 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002760 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002761
Jesse Barnes79e53942008-11-07 14:24:08 -08002762 /* Read the regs to test if we can talk to the device */
2763 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002764 u8 byte;
2765
2766 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002767 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2768 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002769 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002770 }
2771 }
2772
Chris Wilson084b6122012-05-11 18:01:33 +01002773 hotplug_mask = 0;
2774 if (IS_G4X(dev)) {
2775 hotplug_mask = intel_sdvo->is_sdvob ?
2776 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2777 } else if (IS_GEN4(dev)) {
2778 hotplug_mask = intel_sdvo->is_sdvob ?
2779 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2780 } else {
2781 hotplug_mask = intel_sdvo->is_sdvob ?
2782 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2783 }
Ma Ling619ac3b2009-05-18 16:12:46 +08002784
Egbert Eich4f770a52013-02-25 12:06:52 -05002785 /* Only enable the hotplug irq if we need it, to work around noisy
2786 * hotplug lines.
2787 */
Egbert Eich1d843f92013-02-25 12:06:49 -05002788 if (intel_sdvo->hotplug_active)
2789 intel_encoder->hpd_pin = HPD_SDVO_B ? HPD_SDVO_B : HPD_SDVO_C;
2790
Daniel Vetter6cc5f342013-03-27 00:44:53 +01002791 intel_encoder->compute_config = intel_sdvo_compute_config;
Daniel Vetterce22c322012-07-01 15:31:04 +02002792 intel_encoder->disable = intel_disable_sdvo;
Daniel Vetter6cc5f342013-03-27 00:44:53 +01002793 intel_encoder->mode_set = intel_sdvo_mode_set;
Daniel Vetterce22c322012-07-01 15:31:04 +02002794 intel_encoder->enable = intel_enable_sdvo;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002795 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
Daniel Vetterce22c322012-07-01 15:31:04 +02002796
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002797 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002798 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002799 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002800
Chris Wilsonea5b2132010-08-04 13:50:23 +01002801 if (intel_sdvo_output_setup(intel_sdvo,
2802 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002803 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2804 SDVO_NAME(intel_sdvo));
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002805 /* Output_setup can leave behind connectors! */
2806 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002807 }
2808
Daniel Vettere506d6f2012-11-13 17:24:43 +01002809 /*
2810 * Cloning SDVO with anything is often impossible, since the SDVO
2811 * encoder can request a special input timing mode. And even if that's
2812 * not the case we have evidence that cloning a plain unscaled mode with
2813 * VGA doesn't really work. Furthermore the cloning flags are way too
2814 * simplistic anyway to express such constraints, so just give up on
2815 * cloning for SDVO encoders.
2816 */
2817 intel_sdvo->base.cloneable = false;
2818
Chris Wilsonea5b2132010-08-04 13:50:23 +01002819 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002820
Jesse Barnes79e53942008-11-07 14:24:08 -08002821 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002822 if (!intel_sdvo_set_target_input(intel_sdvo))
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002823 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002824
Chris Wilson32aad862010-08-04 13:50:25 +01002825 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2826 &intel_sdvo->pixel_clock_min,
2827 &intel_sdvo->pixel_clock_max))
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002828 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002829
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002830 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002831 "clock range %dMHz - %dMHz, "
2832 "input 1: %c, input 2: %c, "
2833 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002834 SDVO_NAME(intel_sdvo),
2835 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2836 intel_sdvo->caps.device_rev_id,
2837 intel_sdvo->pixel_clock_min / 1000,
2838 intel_sdvo->pixel_clock_max / 1000,
2839 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2840 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002841 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002842 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002843 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002844 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002845 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002846 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002847
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002848err_output:
2849 intel_sdvo_output_cleanup(intel_sdvo);
2850
Chris Wilsonf899fc62010-07-20 15:44:45 -07002851err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002852 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002853 i2c_del_adapter(&intel_sdvo->ddc);
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002854err_i2c_bus:
2855 intel_sdvo_unselect_i2c_bus(intel_sdvo);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002856 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002857
Eric Anholt7d573822009-01-02 13:33:00 -08002858 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002859}