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Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/drm_crtc.h>
34#include <drm/drm_edid.h>
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010043#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080044
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040046 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080047
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000049#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080050#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010051#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010052#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080053
Jesse Barnes79e53942008-11-07 14:24:08 -080054
Chris Wilson2e88e402010-08-07 11:01:27 +010055static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080056 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63};
64
65#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
Chris Wilsonea5b2132010-08-04 13:50:23 +010067struct intel_sdvo {
68 struct intel_encoder base;
69
Chris Wilsonf899fc62010-07-20 15:44:45 -070070 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070071 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080072
Chris Wilsone957d772010-09-24 12:52:03 +010073 struct i2c_adapter ddc;
74
Jesse Barnese2f0ba92009-02-02 15:11:52 -080075 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010076 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080077
Jesse Barnese2f0ba92009-02-02 15:11:52 -080078 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080080
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
Jesse Barnes79e53942008-11-07 14:24:08 -080085 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080086
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080088 int pixel_clock_min, pixel_clock_max;
89
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080090 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
Simon Farnsworthcc68c812011-09-21 17:13:30 +010096 /*
97 * Hotplug activation bits for this device
98 */
Jani Nikula5fa7ac92012-08-29 16:43:58 +030099 uint16_t hotplug_active;
Simon Farnsworthcc68c812011-09-21 17:13:30 +0100100
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800101 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
Ville Syrjälä55bc60d2013-01-17 16:31:29 +0200106 bool color_range_auto;
Chris Wilsone953fd72011-02-21 22:23:52 +0000107
108 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
Daniel Vettereef4eac2012-03-23 23:43:35 +0100117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
Zhao Yakuice6feab2009-08-24 13:50:26 +0800120 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100121 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
Ville Syrjäläabedc072013-01-17 16:31:31 +0200129 bool rgb_quant_range_selectable;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800130
Ma Ling7086c872009-05-13 11:20:06 +0800131 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100132 * This is set if we detect output of sdvo device as LVDS and
133 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800134 */
135 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800136
137 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800138 * This is sdvo fixed pannel mode pointer
139 */
140 struct drm_display_mode *sdvo_lvds_fixed_mode;
141
Eric Anholtc751ce42010-03-25 11:48:48 -0700142 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800143 uint8_t ddc_bus;
Egbert Eiche7518232012-10-13 14:29:31 +0200144
145 /*
146 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
147 */
148 uint8_t dtd_sdvo_flags;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800149};
150
151struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100152 struct intel_connector base;
153
Zhenyu Wang14571b42010-03-30 14:06:33 +0800154 /* Mark the type of connector */
155 uint16_t output_flag;
156
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100157 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100158
Zhenyu Wang14571b42010-03-30 14:06:33 +0800159 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100160 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800161 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100162 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800163
Zhao Yakuib9219c52009-09-10 15:45:46 +0800164 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100165 struct drm_property *left;
166 struct drm_property *right;
167 struct drm_property *top;
168 struct drm_property *bottom;
169 struct drm_property *hpos;
170 struct drm_property *vpos;
171 struct drm_property *contrast;
172 struct drm_property *saturation;
173 struct drm_property *hue;
174 struct drm_property *sharpness;
175 struct drm_property *flicker_filter;
176 struct drm_property *flicker_filter_adaptive;
177 struct drm_property *flicker_filter_2d;
178 struct drm_property *tv_chroma_filter;
179 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100180 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800181
182 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100183 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800184
185 /* Add variable to record current setting for the above property */
186 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100187
Zhao Yakuib9219c52009-09-10 15:45:46 +0800188 /* this is to get the range of margin.*/
189 u32 max_hscan, max_vscan;
190 u32 max_hpos, cur_hpos;
191 u32 max_vpos, cur_vpos;
192 u32 cur_brightness, max_brightness;
193 u32 cur_contrast, max_contrast;
194 u32 cur_saturation, max_saturation;
195 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100196 u32 cur_sharpness, max_sharpness;
197 u32 cur_flicker_filter, max_flicker_filter;
198 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
199 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
200 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
201 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100202 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800203};
204
Chris Wilson890f3352010-09-14 16:46:59 +0100205static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100206{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100207 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100208}
209
Chris Wilsondf0e9242010-09-09 16:20:55 +0100210static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
211{
212 return container_of(intel_attached_encoder(connector),
213 struct intel_sdvo, base);
214}
215
Chris Wilson615fb932010-08-04 13:50:24 +0100216static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
217{
218 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
219}
220
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800221static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100222intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100223static bool
224intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
225 struct intel_sdvo_connector *intel_sdvo_connector,
226 int type);
227static bool
228intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
229 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800230
Jesse Barnes79e53942008-11-07 14:24:08 -0800231/**
232 * Writes the SDVOB or SDVOC with the given value, but always writes both
233 * SDVOB and SDVOC to work around apparent hardware issues (according to
234 * comments in the BIOS).
235 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100236static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800237{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100238 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800239 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800240 u32 bval = val, cval = val;
241 int i;
242
Chris Wilsonea5b2132010-08-04 13:50:23 +0100243 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
244 I915_WRITE(intel_sdvo->sdvo_reg, val);
245 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800246 return;
247 }
248
Paulo Zanonie2debe92013-02-18 19:00:27 -0300249 if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
250 cval = I915_READ(GEN3_SDVOC);
251 else
252 bval = I915_READ(GEN3_SDVOB);
253
Jesse Barnes79e53942008-11-07 14:24:08 -0800254 /*
255 * Write the registers twice for luck. Sometimes,
256 * writing them only once doesn't appear to 'stick'.
257 * The BIOS does this too. Yay, magic
258 */
259 for (i = 0; i < 2; i++)
260 {
Paulo Zanonie2debe92013-02-18 19:00:27 -0300261 I915_WRITE(GEN3_SDVOB, bval);
262 I915_READ(GEN3_SDVOB);
263 I915_WRITE(GEN3_SDVOC, cval);
264 I915_READ(GEN3_SDVOC);
Jesse Barnes79e53942008-11-07 14:24:08 -0800265 }
266}
267
Chris Wilson32aad862010-08-04 13:50:25 +0100268static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800269{
Jesse Barnes79e53942008-11-07 14:24:08 -0800270 struct i2c_msg msgs[] = {
271 {
Chris Wilsone957d772010-09-24 12:52:03 +0100272 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800273 .flags = 0,
274 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100275 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800276 },
277 {
Chris Wilsone957d772010-09-24 12:52:03 +0100278 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800279 .flags = I2C_M_RD,
280 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100281 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800282 }
283 };
Chris Wilson32aad862010-08-04 13:50:25 +0100284 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800285
Chris Wilsonf899fc62010-07-20 15:44:45 -0700286 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800287 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800288
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800289 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800290 return false;
291}
292
Jesse Barnes79e53942008-11-07 14:24:08 -0800293#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
294/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100295static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800296 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100297 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800298} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100342
Akshay Joshi0206e352011-08-16 15:34:10 -0400343 /* Add the op code for SDVO enhancements */
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100388
Akshay Joshi0206e352011-08-16 15:34:10 -0400389 /* HDMI op code */
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
409 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800410};
411
Daniel Vettereef4eac2012-03-23 23:43:35 +0100412#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800413
Chris Wilsonea5b2132010-08-04 13:50:23 +0100414static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100415 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800416{
Jesse Barnes79e53942008-11-07 14:24:08 -0800417 int i;
418
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800419 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100420 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800421 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800422 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800423 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800424 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400425 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800426 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800427 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800428 break;
429 }
430 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400431 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800432 DRM_LOG_KMS("(%02X)", cmd);
433 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800434}
Jesse Barnes79e53942008-11-07 14:24:08 -0800435
Jesse Barnes79e53942008-11-07 14:24:08 -0800436static const char *cmd_status_names[] = {
437 "Power on",
438 "Success",
439 "Not supported",
440 "Invalid arg",
441 "Pending",
442 "Target not specified",
443 "Scaling not supported"
444};
445
Chris Wilsone957d772010-09-24 12:52:03 +0100446static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
447 const void *args, int args_len)
448{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700449 u8 *buf, status;
450 struct i2c_msg *msgs;
451 int i, ret = true;
452
Alan Cox0274df32012-07-25 13:51:04 +0100453 /* Would be simpler to allocate both in one go ? */
Mihnea Dobrescu-Balaur5c67eeb2013-03-10 14:22:48 +0200454 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700455 if (!buf)
456 return false;
457
458 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
Alan Cox0274df32012-07-25 13:51:04 +0100459 if (!msgs) {
460 kfree(buf);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700461 return false;
Alan Cox0274df32012-07-25 13:51:04 +0100462 }
Chris Wilsone957d772010-09-24 12:52:03 +0100463
464 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
465
466 for (i = 0; i < args_len; i++) {
467 msgs[i].addr = intel_sdvo->slave_addr;
468 msgs[i].flags = 0;
469 msgs[i].len = 2;
470 msgs[i].buf = buf + 2 *i;
471 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
472 buf[2*i + 1] = ((u8*)args)[i];
473 }
474 msgs[i].addr = intel_sdvo->slave_addr;
475 msgs[i].flags = 0;
476 msgs[i].len = 2;
477 msgs[i].buf = buf + 2*i;
478 buf[2*i + 0] = SDVO_I2C_OPCODE;
479 buf[2*i + 1] = cmd;
480
481 /* the following two are to read the response */
482 status = SDVO_I2C_CMD_STATUS;
483 msgs[i+1].addr = intel_sdvo->slave_addr;
484 msgs[i+1].flags = 0;
485 msgs[i+1].len = 1;
486 msgs[i+1].buf = &status;
487
488 msgs[i+2].addr = intel_sdvo->slave_addr;
489 msgs[i+2].flags = I2C_M_RD;
490 msgs[i+2].len = 1;
491 msgs[i+2].buf = &status;
492
493 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
494 if (ret < 0) {
495 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700496 ret = false;
497 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100498 }
499 if (ret != i+3) {
500 /* failure in I2C transfer */
501 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700502 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100503 }
504
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700505out:
506 kfree(msgs);
507 kfree(buf);
508 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100509}
510
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100511static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
512 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800513{
Chris Wilsonfc373812012-11-23 11:57:56 +0000514 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100515 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800516 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800517
Chris Wilsond121a5d2011-01-25 15:00:01 +0000518 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
519
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100520 /*
521 * The documentation states that all commands will be
522 * processed within 15µs, and that we need only poll
523 * the status byte a maximum of 3 times in order for the
524 * command to be complete.
525 *
526 * Check 5 times in case the hardware failed to read the docs.
Chris Wilsonfc373812012-11-23 11:57:56 +0000527 *
528 * Also beware that the first response by many devices is to
529 * reply PENDING and stall for time. TVs are notorious for
530 * requiring longer than specified to complete their replies.
531 * Originally (in the DDX long ago), the delay was only ever 15ms
532 * with an additional delay of 30ms applied for TVs added later after
533 * many experiments. To accommodate both sets of delays, we do a
534 * sequence of slow checks if the device is falling behind and fails
535 * to reply within 5*15µs.
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100536 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000537 if (!intel_sdvo_read_byte(intel_sdvo,
538 SDVO_I2C_CMD_STATUS,
539 &status))
540 goto log_fail;
541
Chris Wilsonfc373812012-11-23 11:57:56 +0000542 while (status == SDVO_CMD_STATUS_PENDING && --retry) {
543 if (retry < 10)
544 msleep(15);
545 else
546 udelay(15);
547
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100548 if (!intel_sdvo_read_byte(intel_sdvo,
549 SDVO_I2C_CMD_STATUS,
550 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000551 goto log_fail;
552 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100553
Jesse Barnes79e53942008-11-07 14:24:08 -0800554 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800555 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800556 else
yakui_zhao342dc382009-06-02 14:12:00 +0800557 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800558
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100559 if (status != SDVO_CMD_STATUS_SUCCESS)
560 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800561
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100562 /* Read the command response */
563 for (i = 0; i < response_len; i++) {
564 if (!intel_sdvo_read_byte(intel_sdvo,
565 SDVO_I2C_RETURN_0 + i,
566 &((u8 *)response)[i]))
567 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100568 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800569 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100570 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100571 return true;
572
573log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000574 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100575 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800576}
577
Hannes Ederb358d0a2008-12-18 21:18:47 +0100578static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800579{
580 if (mode->clock >= 100000)
581 return 1;
582 else if (mode->clock >= 50000)
583 return 2;
584 else
585 return 4;
586}
587
Chris Wilsone957d772010-09-24 12:52:03 +0100588static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
589 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800590{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000591 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100592 return intel_sdvo_write_cmd(intel_sdvo,
593 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
594 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800595}
596
Chris Wilson32aad862010-08-04 13:50:25 +0100597static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
598{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000599 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
600 return false;
601
602 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100603}
604
605static bool
606intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
607{
608 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
609 return false;
610
611 return intel_sdvo_read_response(intel_sdvo, value, len);
612}
613
614static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800615{
616 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100617 return intel_sdvo_set_value(intel_sdvo,
618 SDVO_CMD_SET_TARGET_INPUT,
619 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800620}
621
622/**
623 * Return whether each input is trained.
624 *
625 * This function is making an assumption about the layout of the response,
626 * which should be checked against the docs.
627 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100628static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800629{
630 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800631
Chris Wilson1a3665c2011-01-25 13:59:37 +0000632 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100633 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
634 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800635 return false;
636
637 *input_1 = response.input0_trained;
638 *input_2 = response.input1_trained;
639 return true;
640}
641
Chris Wilsonea5b2132010-08-04 13:50:23 +0100642static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800643 u16 outputs)
644{
Chris Wilson32aad862010-08-04 13:50:25 +0100645 return intel_sdvo_set_value(intel_sdvo,
646 SDVO_CMD_SET_ACTIVE_OUTPUTS,
647 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800648}
649
Daniel Vetter4ac41f42012-07-02 14:54:00 +0200650static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
651 u16 *outputs)
652{
653 return intel_sdvo_get_value(intel_sdvo,
654 SDVO_CMD_GET_ACTIVE_OUTPUTS,
655 outputs, sizeof(*outputs));
656}
657
Chris Wilsonea5b2132010-08-04 13:50:23 +0100658static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800659 int mode)
660{
Chris Wilson32aad862010-08-04 13:50:25 +0100661 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800662
663 switch (mode) {
664 case DRM_MODE_DPMS_ON:
665 state = SDVO_ENCODER_STATE_ON;
666 break;
667 case DRM_MODE_DPMS_STANDBY:
668 state = SDVO_ENCODER_STATE_STANDBY;
669 break;
670 case DRM_MODE_DPMS_SUSPEND:
671 state = SDVO_ENCODER_STATE_SUSPEND;
672 break;
673 case DRM_MODE_DPMS_OFF:
674 state = SDVO_ENCODER_STATE_OFF;
675 break;
676 }
677
Chris Wilson32aad862010-08-04 13:50:25 +0100678 return intel_sdvo_set_value(intel_sdvo,
679 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800680}
681
Chris Wilsonea5b2132010-08-04 13:50:23 +0100682static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800683 int *clock_min,
684 int *clock_max)
685{
686 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800687
Chris Wilson1a3665c2011-01-25 13:59:37 +0000688 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100689 if (!intel_sdvo_get_value(intel_sdvo,
690 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
691 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800692 return false;
693
694 /* Convert the values from units of 10 kHz to kHz. */
695 *clock_min = clocks.min * 10;
696 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800697 return true;
698}
699
Chris Wilsonea5b2132010-08-04 13:50:23 +0100700static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800701 u16 outputs)
702{
Chris Wilson32aad862010-08-04 13:50:25 +0100703 return intel_sdvo_set_value(intel_sdvo,
704 SDVO_CMD_SET_TARGET_OUTPUT,
705 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800706}
707
Chris Wilsonea5b2132010-08-04 13:50:23 +0100708static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800709 struct intel_sdvo_dtd *dtd)
710{
Chris Wilson32aad862010-08-04 13:50:25 +0100711 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
712 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800713}
714
Chris Wilsonea5b2132010-08-04 13:50:23 +0100715static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800716 struct intel_sdvo_dtd *dtd)
717{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100718 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800719 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
720}
721
Chris Wilsonea5b2132010-08-04 13:50:23 +0100722static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800723 struct intel_sdvo_dtd *dtd)
724{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100725 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800726 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
727}
728
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800729static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100730intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800731 uint16_t clock,
732 uint16_t width,
733 uint16_t height)
734{
735 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800736
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800737 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800738 args.clock = clock;
739 args.width = width;
740 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800741 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800742
Chris Wilsonea5b2132010-08-04 13:50:23 +0100743 if (intel_sdvo->is_lvds &&
744 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
745 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800746 args.scaled = 1;
747
Chris Wilson32aad862010-08-04 13:50:25 +0100748 return intel_sdvo_set_value(intel_sdvo,
749 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
750 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800751}
752
Chris Wilsonea5b2132010-08-04 13:50:23 +0100753static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800754 struct intel_sdvo_dtd *dtd)
755{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000756 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
757 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100758 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
759 &dtd->part1, sizeof(dtd->part1)) &&
760 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
761 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800762}
Jesse Barnes79e53942008-11-07 14:24:08 -0800763
Chris Wilsonea5b2132010-08-04 13:50:23 +0100764static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800765{
Chris Wilson32aad862010-08-04 13:50:25 +0100766 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800767}
768
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800769static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100770 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800771{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800772 uint16_t width, height;
773 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
774 uint16_t h_sync_offset, v_sync_offset;
Daniel Vetter66518192012-04-01 19:16:18 +0200775 int mode_clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800776
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200777 width = mode->hdisplay;
778 height = mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800779
780 /* do some mode translations */
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200781 h_blank_len = mode->htotal - mode->hdisplay;
782 h_sync_len = mode->hsync_end - mode->hsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800783
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200784 v_blank_len = mode->vtotal - mode->vdisplay;
785 v_sync_len = mode->vsync_end - mode->vsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800786
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200787 h_sync_offset = mode->hsync_start - mode->hdisplay;
788 v_sync_offset = mode->vsync_start - mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800789
Daniel Vetter66518192012-04-01 19:16:18 +0200790 mode_clock = mode->clock;
Daniel Vetter66518192012-04-01 19:16:18 +0200791 mode_clock /= 10;
792 dtd->part1.clock = mode_clock;
793
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800794 dtd->part1.h_active = width & 0xff;
795 dtd->part1.h_blank = h_blank_len & 0xff;
796 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800797 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800798 dtd->part1.v_active = height & 0xff;
799 dtd->part1.v_blank = v_blank_len & 0xff;
800 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800801 ((v_blank_len >> 8) & 0xf);
802
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800803 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800804 dtd->part2.h_sync_width = h_sync_len & 0xff;
805 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800806 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800807 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800808 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
809 ((v_sync_len & 0x30) >> 4);
810
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800811 dtd->part2.dtd_flags = 0x18;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200812 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
813 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800814 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200815 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800816 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200817 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800818
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800819 dtd->part2.sdvo_flags = 0;
820 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
821 dtd->part2.reserved = 0;
822}
Jesse Barnes79e53942008-11-07 14:24:08 -0800823
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800824static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100825 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800826{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800827 mode->hdisplay = dtd->part1.h_active;
828 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
829 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800830 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800831 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
832 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
833 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
834 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
835
836 mode->vdisplay = dtd->part1.v_active;
837 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
838 mode->vsync_start = mode->vdisplay;
839 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800840 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
842 mode->vsync_end = mode->vsync_start +
843 (dtd->part2.v_sync_off_width & 0xf);
844 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
845 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
846 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
847
848 mode->clock = dtd->part1.clock * 10;
849
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800850 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200851 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
852 mode->flags |= DRM_MODE_FLAG_INTERLACE;
853 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800854 mode->flags |= DRM_MODE_FLAG_PHSYNC;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200855 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800856 mode->flags |= DRM_MODE_FLAG_PVSYNC;
857}
858
Chris Wilsone27d8532010-10-22 09:15:22 +0100859static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800860{
Chris Wilsone27d8532010-10-22 09:15:22 +0100861 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800862
Chris Wilson1a3665c2011-01-25 13:59:37 +0000863 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100864 return intel_sdvo_get_value(intel_sdvo,
865 SDVO_CMD_GET_SUPP_ENCODE,
866 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800867}
868
Chris Wilsonea5b2132010-08-04 13:50:23 +0100869static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700870 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800871{
Chris Wilson32aad862010-08-04 13:50:25 +0100872 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800873}
874
Chris Wilsonea5b2132010-08-04 13:50:23 +0100875static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800876 uint8_t mode)
877{
Chris Wilson32aad862010-08-04 13:50:25 +0100878 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800879}
880
881#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100882static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800883{
884 int i, j;
885 uint8_t set_buf_index[2];
886 uint8_t av_split;
887 uint8_t buf_size;
888 uint8_t buf[48];
889 uint8_t *pos;
890
Chris Wilson32aad862010-08-04 13:50:25 +0100891 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800892
893 for (i = 0; i <= av_split; i++) {
894 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700895 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800896 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700897 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
898 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800899
900 pos = buf;
901 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700902 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800903 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700904 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800905 pos += 8;
906 }
907 }
908}
909#endif
910
Daniel Vetterb6e0e542012-10-21 12:52:39 +0200911static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
912 unsigned if_index, uint8_t tx_rate,
913 uint8_t *data, unsigned length)
914{
915 uint8_t set_buf_index[2] = { if_index, 0 };
916 uint8_t hbuf_size, tmp[8];
917 int i;
918
919 if (!intel_sdvo_set_value(intel_sdvo,
920 SDVO_CMD_SET_HBUF_INDEX,
921 set_buf_index, 2))
922 return false;
923
924 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
925 &hbuf_size, 1))
926 return false;
927
928 /* Buffer size is 0 based, hooray! */
929 hbuf_size++;
930
931 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
932 if_index, length, hbuf_size);
933
934 for (i = 0; i < hbuf_size; i += 8) {
935 memset(tmp, 0, 8);
936 if (i < length)
937 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
938
939 if (!intel_sdvo_set_value(intel_sdvo,
940 SDVO_CMD_SET_HBUF_DATA,
941 tmp, 8))
942 return false;
943 }
944
945 return intel_sdvo_set_value(intel_sdvo,
946 SDVO_CMD_SET_HBUF_TXRATE,
947 &tx_rate, 1);
948}
949
Ville Syrjäläabedc072013-01-17 16:31:31 +0200950static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
951 const struct drm_display_mode *adjusted_mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800952{
953 struct dip_infoframe avi_if = {
954 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200955 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800956 .len = DIP_LEN_AVI,
957 };
Daniel Vetter81014b92012-05-12 20:22:00 +0200958 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
Daniel Vetter50f3b012013-03-27 00:44:56 +0100959 struct intel_crtc *intel_crtc = to_intel_crtc(intel_sdvo->base.base.crtc);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800960
Ville Syrjäläabedc072013-01-17 16:31:31 +0200961 if (intel_sdvo->rgb_quant_range_selectable) {
Daniel Vetter50f3b012013-03-27 00:44:56 +0100962 if (intel_crtc->config.limited_color_range)
Ville Syrjäläabedc072013-01-17 16:31:31 +0200963 avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
964 else
965 avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
966 }
967
Ville Syrjälä96b219f2013-03-20 18:10:07 +0200968 avi_if.body.avi.VIC = drm_match_cea_mode(adjusted_mode);
969
David Härdeman3c17fe42010-09-24 21:44:32 +0200970 intel_dip_infoframe_csum(&avi_if);
971
Daniel Vetter81014b92012-05-12 20:22:00 +0200972 /* sdvo spec says that the ecc is handled by the hw, and it looks like
973 * we must not send the ecc field, either. */
974 memcpy(sdvo_data, &avi_if, 3);
975 sdvo_data[3] = avi_if.checksum;
976 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
977
Daniel Vetterb6e0e542012-10-21 12:52:39 +0200978 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
979 SDVO_HBUF_TX_VSYNC,
980 sdvo_data, sizeof(sdvo_data));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800981}
982
Chris Wilson32aad862010-08-04 13:50:25 +0100983static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800984{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800985 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100986 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800987
Chris Wilson40039752010-08-04 13:50:26 +0100988 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800989 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100990 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800991
Chris Wilson32aad862010-08-04 13:50:25 +0100992 BUILD_BUG_ON(sizeof(format) != 6);
993 return intel_sdvo_set_value(intel_sdvo,
994 SDVO_CMD_SET_TV_FORMAT,
995 &format, sizeof(format));
996}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800997
Chris Wilson32aad862010-08-04 13:50:25 +0100998static bool
999intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +02001000 const struct drm_display_mode *mode)
Chris Wilson32aad862010-08-04 13:50:25 +01001001{
1002 struct intel_sdvo_dtd output_dtd;
1003
1004 if (!intel_sdvo_set_target_output(intel_sdvo,
1005 intel_sdvo->attached_output))
1006 return false;
1007
1008 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1009 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1010 return false;
1011
1012 return true;
1013}
1014
Daniel Vetterc9a29692012-04-10 13:55:47 +02001015/* Asks the sdvo controller for the preferred input mode given the output mode.
1016 * Unfortunately we have to set up the full output mode to do that. */
Chris Wilson32aad862010-08-04 13:50:25 +01001017static bool
Daniel Vetterc9a29692012-04-10 13:55:47 +02001018intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +02001019 const struct drm_display_mode *mode,
Daniel Vetterc9a29692012-04-10 13:55:47 +02001020 struct drm_display_mode *adjusted_mode)
Chris Wilson32aad862010-08-04 13:50:25 +01001021{
Daniel Vetterc9a29692012-04-10 13:55:47 +02001022 struct intel_sdvo_dtd input_dtd;
1023
Chris Wilson32aad862010-08-04 13:50:25 +01001024 /* Reset the input timing to the screen. Assume always input 0. */
1025 if (!intel_sdvo_set_target_input(intel_sdvo))
1026 return false;
1027
1028 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1029 mode->clock / 10,
1030 mode->hdisplay,
1031 mode->vdisplay))
1032 return false;
1033
1034 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Daniel Vetterc9a29692012-04-10 13:55:47 +02001035 &input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +01001036 return false;
1037
Daniel Vetterc9a29692012-04-10 13:55:47 +02001038 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
Egbert Eiche7518232012-10-13 14:29:31 +02001039 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
Chris Wilson32aad862010-08-04 13:50:25 +01001040
Chris Wilson32aad862010-08-04 13:50:25 +01001041 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001042}
1043
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001044static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1045 struct intel_crtc_config *pipe_config)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001046{
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001047 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1048 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1049 struct drm_display_mode *mode = &pipe_config->requested_mode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001050
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +01001051 if (HAS_PCH_SPLIT(encoder->base.dev))
1052 pipe_config->has_pch_encoder = true;
1053
Chris Wilson32aad862010-08-04 13:50:25 +01001054 /* We need to construct preferred input timings based on our
1055 * output timings. To do that, we have to set the output
1056 * timings, even though this isn't really the right place in
1057 * the sequence to do it. Oh well.
1058 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001059 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +01001060 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001061 return false;
Chris Wilson32aad862010-08-04 13:50:25 +01001062
Daniel Vetterc9a29692012-04-10 13:55:47 +02001063 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1064 mode,
1065 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001066 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +01001067 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +01001068 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001069 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001070
Daniel Vetterc9a29692012-04-10 13:55:47 +02001071 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1072 mode,
1073 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001074 }
Chris Wilson32aad862010-08-04 13:50:25 +01001075
1076 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +01001077 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +01001078 */
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001079 pipe_config->pixel_multiplier =
1080 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1081 adjusted_mode->clock *= pipe_config->pixel_multiplier;
Chris Wilson32aad862010-08-04 13:50:25 +01001082
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001083 if (intel_sdvo->color_range_auto) {
1084 /* See CEA-861-E - 5.1 Default Encoding Parameters */
Paulo Zanoni4f3a8bc2013-02-19 16:21:47 -03001085 /* FIXME: This bit is only valid when using TMDS encoding and 8
1086 * bit per color mode. */
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001087 if (intel_sdvo->has_hdmi_monitor &&
Thierry Reding18316c82012-12-20 15:41:44 +01001088 drm_match_cea_mode(adjusted_mode) > 1)
Paulo Zanoni4f3a8bc2013-02-19 16:21:47 -03001089 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001090 else
1091 intel_sdvo->color_range = 0;
1092 }
1093
Ville Syrjälä3685a8f2013-01-17 16:31:28 +02001094 if (intel_sdvo->color_range)
Daniel Vetter50f3b012013-03-27 00:44:56 +01001095 pipe_config->limited_color_range = true;
Ville Syrjälä3685a8f2013-01-17 16:31:28 +02001096
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001097 return true;
1098}
1099
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001100static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001101{
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001102 struct drm_device *dev = intel_encoder->base.dev;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001103 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001104 struct drm_crtc *crtc = intel_encoder->base.crtc;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001105 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001106 struct drm_display_mode *adjusted_mode =
1107 &intel_crtc->config.adjusted_mode;
1108 struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
1109 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&intel_encoder->base);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001110 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001111 struct intel_sdvo_in_out_map in_out;
Daniel Vetter66518192012-04-01 19:16:18 +02001112 struct intel_sdvo_dtd input_dtd, output_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001113 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001114
1115 if (!mode)
1116 return;
1117
1118 /* First, set the input mapping for the first input to our controlled
1119 * output. This is only correct if we're a single-input device, in
1120 * which case the first input is the output from the appropriate SDVO
1121 * channel on the motherboard. In a two-input device, the first input
1122 * will be SDVOB and the second SDVOC.
1123 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001124 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001125 in_out.in1 = 0;
1126
Pavel Roskinc74696b2010-09-02 14:46:34 -04001127 intel_sdvo_set_value(intel_sdvo,
1128 SDVO_CMD_SET_IN_OUT_MAP,
1129 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001130
Chris Wilson6c9547f2010-08-25 10:05:17 +01001131 /* Set the output timings to the screen */
1132 if (!intel_sdvo_set_target_output(intel_sdvo,
1133 intel_sdvo->attached_output))
1134 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001135
Daniel Vetter66518192012-04-01 19:16:18 +02001136 /* lvds has a special fixed output timing. */
1137 if (intel_sdvo->is_lvds)
1138 intel_sdvo_get_dtd_from_mode(&output_dtd,
1139 intel_sdvo->sdvo_lvds_fixed_mode);
1140 else
1141 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001142 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1143 DRM_INFO("Setting output timings on %s failed\n",
1144 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001145
1146 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001147 if (!intel_sdvo_set_target_input(intel_sdvo))
1148 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001149
Chris Wilson97aaf912011-01-04 20:10:52 +00001150 if (intel_sdvo->has_hdmi_monitor) {
1151 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1152 intel_sdvo_set_colorimetry(intel_sdvo,
1153 SDVO_COLORIMETRY_RGB256);
Ville Syrjäläabedc072013-01-17 16:31:31 +02001154 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
Chris Wilson97aaf912011-01-04 20:10:52 +00001155 } else
1156 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001157
Chris Wilson6c9547f2010-08-25 10:05:17 +01001158 if (intel_sdvo->is_tv &&
1159 !intel_sdvo_set_tv_format(intel_sdvo))
1160 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001161
Daniel Vetter66518192012-04-01 19:16:18 +02001162 /* We have tried to get input timing in mode_fixup, and filled into
1163 * adjusted_mode.
1164 */
1165 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Egbert Eiche7518232012-10-13 14:29:31 +02001166 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1167 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001168 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1169 DRM_INFO("Setting input timings on %s failed\n",
1170 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001171
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001172 switch (intel_crtc->config.pixel_multiplier) {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001173 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001174 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1175 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1176 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001177 }
Chris Wilson32aad862010-08-04 13:50:25 +01001178 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1179 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001180
1181 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001182 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001183 /* The real mode polarity is set by the SDVO commands, using
1184 * struct intel_sdvo_dtd. */
1185 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Ville Syrjälä3685a8f2013-01-17 16:31:28 +02001186 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
Chris Wilsone953fd72011-02-21 22:23:52 +00001187 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001188 if (INTEL_INFO(dev)->gen < 5)
1189 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001190 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001191 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001192 switch (intel_sdvo->sdvo_reg) {
Paulo Zanonie2debe92013-02-18 19:00:27 -03001193 case GEN3_SDVOB:
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001194 sdvox &= SDVOB_PRESERVE_MASK;
1195 break;
Paulo Zanonie2debe92013-02-18 19:00:27 -03001196 case GEN3_SDVOC:
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001197 sdvox &= SDVOC_PRESERVE_MASK;
1198 break;
1199 }
1200 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1201 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001202
1203 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
Paulo Zanonidc0fa712013-02-19 16:21:46 -03001204 sdvox |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe);
Paulo Zanoni3573c412011-10-14 18:16:22 -03001205 else
Paulo Zanonidc0fa712013-02-19 16:21:46 -03001206 sdvox |= SDVO_PIPE_SEL(intel_crtc->pipe);
Paulo Zanoni3573c412011-10-14 18:16:22 -03001207
Chris Wilsonda79de92010-11-22 11:12:46 +00001208 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001209 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001210
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001211 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001212 /* done in crtc_mode_set as the dpll_md reg must be written early */
1213 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1214 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001215 } else {
Daniel Vetter6cc5f342013-03-27 00:44:53 +01001216 sdvox |= (intel_crtc->config.pixel_multiplier - 1)
1217 << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001218 }
1219
Chris Wilson6714afb2010-12-17 04:10:51 +00001220 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1221 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001222 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001223 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001224}
1225
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001226static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001227{
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001228 struct intel_sdvo_connector *intel_sdvo_connector =
1229 to_intel_sdvo_connector(&connector->base);
1230 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1231 u16 active_outputs;
1232
1233 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1234
1235 if (active_outputs & intel_sdvo_connector->output_flag)
1236 return true;
1237 else
1238 return false;
1239}
1240
1241static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1242 enum pipe *pipe)
1243{
1244 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -08001245 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001246 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1247 u32 tmp;
1248
1249 tmp = I915_READ(intel_sdvo->sdvo_reg);
1250
1251 if (!(tmp & SDVO_ENABLE))
1252 return false;
1253
1254 if (HAS_PCH_CPT(dev))
1255 *pipe = PORT_TO_PIPE_CPT(tmp);
1256 else
1257 *pipe = PORT_TO_PIPE(tmp);
1258
1259 return true;
1260}
1261
Daniel Vetterce22c322012-07-01 15:31:04 +02001262static void intel_disable_sdvo(struct intel_encoder *encoder)
1263{
1264 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1265 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001266 u32 temp;
1267
Daniel Vetterce22c322012-07-01 15:31:04 +02001268 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1269 if (0)
1270 intel_sdvo_set_encoder_power_state(intel_sdvo,
1271 DRM_MODE_DPMS_OFF);
1272
1273 temp = I915_READ(intel_sdvo->sdvo_reg);
1274 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilson776ca7c2012-11-21 10:44:23 +00001275 /* HW workaround for IBX, we need to move the port to
1276 * transcoder A before disabling it. */
1277 if (HAS_PCH_IBX(encoder->base.dev)) {
1278 struct drm_crtc *crtc = encoder->base.crtc;
1279 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1280
1281 if (temp & SDVO_PIPE_B_SELECT) {
1282 temp &= ~SDVO_PIPE_B_SELECT;
1283 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1284 POSTING_READ(intel_sdvo->sdvo_reg);
1285
1286 /* Again we need to write this twice. */
1287 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1288 POSTING_READ(intel_sdvo->sdvo_reg);
1289
1290 /* Transcoder selection bits only update
1291 * effectively on vblank. */
1292 if (crtc)
1293 intel_wait_for_vblank(encoder->base.dev, pipe);
1294 else
1295 msleep(50);
1296 }
1297 }
1298
Daniel Vetterce22c322012-07-01 15:31:04 +02001299 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1300 }
1301}
1302
1303static void intel_enable_sdvo(struct intel_encoder *encoder)
1304{
1305 struct drm_device *dev = encoder->base.dev;
1306 struct drm_i915_private *dev_priv = dev->dev_private;
1307 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1308 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1309 u32 temp;
1310 bool input1, input2;
1311 int i;
1312 u8 status;
1313
1314 temp = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001315 if ((temp & SDVO_ENABLE) == 0) {
1316 /* HW workaround for IBX, we need to move the port
Paulo Zanonidc0fa712013-02-19 16:21:46 -03001317 * to transcoder A before disabling it, so restore it here. */
1318 if (HAS_PCH_IBX(dev))
1319 temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001320
Daniel Vetterce22c322012-07-01 15:31:04 +02001321 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001322 }
Daniel Vetterce22c322012-07-01 15:31:04 +02001323 for (i = 0; i < 2; i++)
1324 intel_wait_for_vblank(dev, intel_crtc->pipe);
1325
1326 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1327 /* Warn if the device reported failure to sync.
1328 * A lot of SDVO devices fail to notify of sync, but it's
1329 * a given it the status is a success, we succeeded.
1330 */
1331 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1332 DRM_DEBUG_KMS("First %s output reported failure to "
1333 "sync\n", SDVO_NAME(intel_sdvo));
1334 }
1335
1336 if (0)
1337 intel_sdvo_set_encoder_power_state(intel_sdvo,
1338 DRM_MODE_DPMS_ON);
1339 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1340}
1341
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001342static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
Jesse Barnes79e53942008-11-07 14:24:08 -08001343{
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001344 struct drm_crtc *crtc;
1345 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1346
1347 /* dvo supports only 2 dpms states. */
1348 if (mode != DRM_MODE_DPMS_ON)
1349 mode = DRM_MODE_DPMS_OFF;
1350
1351 if (mode == connector->dpms)
1352 return;
1353
1354 connector->dpms = mode;
1355
1356 /* Only need to change hw state when actually enabled */
1357 crtc = intel_sdvo->base.base.crtc;
1358 if (!crtc) {
1359 intel_sdvo->base.connectors_active = false;
1360 return;
1361 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001362
1363 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001364 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001365 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001366 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001367
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001368 intel_sdvo->base.connectors_active = false;
1369
1370 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001371 } else {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001372 intel_sdvo->base.connectors_active = true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001373
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001374 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001375
1376 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001377 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1378 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001379 }
Daniel Vetter0a91ca22012-07-02 21:54:27 +02001380
Daniel Vetterb9805142012-08-31 17:37:33 +02001381 intel_modeset_check_state(connector->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -08001382}
1383
Jesse Barnes79e53942008-11-07 14:24:08 -08001384static int intel_sdvo_mode_valid(struct drm_connector *connector,
1385 struct drm_display_mode *mode)
1386{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001387 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001388
1389 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1390 return MODE_NO_DBLESCAN;
1391
Chris Wilsonea5b2132010-08-04 13:50:23 +01001392 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001393 return MODE_CLOCK_LOW;
1394
Chris Wilsonea5b2132010-08-04 13:50:23 +01001395 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001396 return MODE_CLOCK_HIGH;
1397
Chris Wilson85454232010-08-08 14:28:23 +01001398 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001399 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001400 return MODE_PANEL;
1401
Chris Wilsonea5b2132010-08-04 13:50:23 +01001402 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001403 return MODE_PANEL;
1404 }
1405
Jesse Barnes79e53942008-11-07 14:24:08 -08001406 return MODE_OK;
1407}
1408
Chris Wilsonea5b2132010-08-04 13:50:23 +01001409static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001410{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001411 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001412 if (!intel_sdvo_get_value(intel_sdvo,
1413 SDVO_CMD_GET_DEVICE_CAPS,
1414 caps, sizeof(*caps)))
1415 return false;
1416
1417 DRM_DEBUG_KMS("SDVO capabilities:\n"
1418 " vendor_id: %d\n"
1419 " device_id: %d\n"
1420 " device_rev_id: %d\n"
1421 " sdvo_version_major: %d\n"
1422 " sdvo_version_minor: %d\n"
1423 " sdvo_inputs_mask: %d\n"
1424 " smooth_scaling: %d\n"
1425 " sharp_scaling: %d\n"
1426 " up_scaling: %d\n"
1427 " down_scaling: %d\n"
1428 " stall_support: %d\n"
1429 " output_flags: %d\n",
1430 caps->vendor_id,
1431 caps->device_id,
1432 caps->device_rev_id,
1433 caps->sdvo_version_major,
1434 caps->sdvo_version_minor,
1435 caps->sdvo_inputs_mask,
1436 caps->smooth_scaling,
1437 caps->sharp_scaling,
1438 caps->up_scaling,
1439 caps->down_scaling,
1440 caps->stall_support,
1441 caps->output_flags);
1442
1443 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001444}
1445
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001446static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001447{
Daniel Vetter768b1072012-05-04 11:29:56 +02001448 struct drm_device *dev = intel_sdvo->base.base.dev;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001449 uint16_t hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001450
Daniel Vetter768b1072012-05-04 11:29:56 +02001451 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1452 * on the line. */
1453 if (IS_I945G(dev) || IS_I945GM(dev))
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001454 return 0;
Daniel Vetter768b1072012-05-04 11:29:56 +02001455
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001456 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1457 &hotplug, sizeof(hotplug)))
1458 return 0;
1459
1460 return hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001461}
1462
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001463static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001464{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001465 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001466
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001467 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1468 &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001469}
1470
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001471static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001472intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001473{
Chris Wilsonbc652122011-01-25 13:28:29 +00001474 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001475 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001476}
1477
Chris Wilsonf899fc62010-07-20 15:44:45 -07001478static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001479intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001480{
Chris Wilsone957d772010-09-24 12:52:03 +01001481 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1482 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001483}
1484
Chris Wilsonff482d82010-09-15 10:40:38 +01001485/* Mac mini hack -- use the same DDC as the analog connector */
1486static struct edid *
1487intel_sdvo_get_analog_edid(struct drm_connector *connector)
1488{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001489 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001490
Chris Wilson0c1dab82010-11-23 22:37:01 +00001491 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001492 intel_gmbus_get_adapter(dev_priv,
1493 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001494}
1495
Ben Widawskyc43b5632012-04-16 14:07:40 -07001496static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001497intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001498{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001499 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001500 enum drm_connector_status status;
1501 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001502
Chris Wilsone957d772010-09-24 12:52:03 +01001503 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001504
Chris Wilsonea5b2132010-08-04 13:50:23 +01001505 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001506 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001507
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001508 /*
1509 * Don't use the 1 as the argument of DDC bus switch to get
1510 * the EDID. It is used for SDVO SPD ROM.
1511 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001512 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001513 intel_sdvo->ddc_bus = ddc;
1514 edid = intel_sdvo_get_edid(connector);
1515 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001516 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001517 }
Chris Wilsone957d772010-09-24 12:52:03 +01001518 /*
1519 * If we found the EDID on the other bus,
1520 * assume that is the correct DDC bus.
1521 */
1522 if (edid == NULL)
1523 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001524 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001525
1526 /*
1527 * When there is no edid and no monitor is connected with VGA
1528 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001529 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001530 if (edid == NULL)
1531 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001532
Chris Wilson2f551c82010-09-15 10:42:50 +01001533 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001534 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001535 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001536 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1537 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001538 if (intel_sdvo->is_hdmi) {
1539 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1540 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
Ville Syrjäläabedc072013-01-17 16:31:31 +02001541 intel_sdvo->rgb_quant_range_selectable =
1542 drm_rgb_quant_range_selectable(edid);
Chris Wilsonda79de92010-11-22 11:12:46 +00001543 }
Chris Wilson139467432011-02-09 20:01:16 +00001544 } else
1545 status = connector_status_disconnected;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001546 kfree(edid);
1547 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001548
1549 if (status == connector_status_connected) {
1550 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001551 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1552 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001553 }
1554
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001555 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001556}
1557
Chris Wilson52220082011-06-20 14:45:50 +01001558static bool
1559intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1560 struct edid *edid)
1561{
1562 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1563 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1564
1565 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1566 connector_is_digital, monitor_is_digital);
1567 return connector_is_digital == monitor_is_digital;
1568}
1569
Chris Wilson7b334fc2010-09-09 23:51:02 +01001570static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001571intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001572{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001573 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001574 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001575 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001576 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001577
Chris Wilsonfc373812012-11-23 11:57:56 +00001578 if (!intel_sdvo_get_value(intel_sdvo,
1579 SDVO_CMD_GET_ATTACHED_DISPLAYS,
1580 &response, 2))
Chris Wilson32aad862010-08-04 13:50:25 +01001581 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001582
Chris Wilsone957d772010-09-24 12:52:03 +01001583 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1584 response & 0xff, response >> 8,
1585 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001586
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001587 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001588 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001589
Chris Wilsonea5b2132010-08-04 13:50:23 +01001590 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001591
Chris Wilson97aaf912011-01-04 20:10:52 +00001592 intel_sdvo->has_hdmi_monitor = false;
1593 intel_sdvo->has_hdmi_audio = false;
Ville Syrjäläabedc072013-01-17 16:31:31 +02001594 intel_sdvo->rgb_quant_range_selectable = false;
Chris Wilson97aaf912011-01-04 20:10:52 +00001595
Chris Wilson615fb932010-08-04 13:50:24 +01001596 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001597 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001598 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001599 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001600 else {
1601 struct edid *edid;
1602
1603 /* if we have an edid check it matches the connection */
1604 edid = intel_sdvo_get_edid(connector);
1605 if (edid == NULL)
1606 edid = intel_sdvo_get_analog_edid(connector);
1607 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001608 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1609 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001610 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001611 else
1612 ret = connector_status_disconnected;
1613
Chris Wilson139467432011-02-09 20:01:16 +00001614 kfree(edid);
1615 } else
1616 ret = connector_status_connected;
1617 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001618
1619 /* May update encoder flag for like clock for SDVO TV, etc.*/
1620 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001621 intel_sdvo->is_tv = false;
1622 intel_sdvo->is_lvds = false;
1623 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001624
1625 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001626 intel_sdvo->is_tv = true;
1627 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001628 }
1629 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001630 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001631 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001632
1633 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001634}
1635
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001636static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001637{
Chris Wilsonff482d82010-09-15 10:40:38 +01001638 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001639
1640 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001641 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001642
Keith Packard57cdaf92009-09-04 13:07:54 +08001643 /*
1644 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1645 * link between analog and digital outputs. So, if the regular SDVO
1646 * DDC fails, check to see if the analog output is disconnected, in
1647 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001648 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001649 if (edid == NULL)
1650 edid = intel_sdvo_get_analog_edid(connector);
1651
Chris Wilsonff482d82010-09-15 10:40:38 +01001652 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001653 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1654 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001655 drm_mode_connector_update_edid_property(connector, edid);
1656 drm_add_edid_modes(connector, edid);
1657 }
Chris Wilson139467432011-02-09 20:01:16 +00001658
Chris Wilsonff482d82010-09-15 10:40:38 +01001659 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001660 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001661}
1662
1663/*
1664 * Set of SDVO TV modes.
1665 * Note! This is in reply order (see loop in get_tv_modes).
1666 * XXX: all 60Hz refresh?
1667 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001668static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001669 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1670 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001671 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001672 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1673 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001674 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001675 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1676 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001677 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001678 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1679 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001680 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001681 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1682 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001683 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001684 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1685 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001686 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001687 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1688 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001689 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001690 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1691 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001692 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001693 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1694 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001695 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001696 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1697 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001698 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001699 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1700 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001701 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001702 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1703 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001704 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001705 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1706 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001707 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001708 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1709 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001710 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001711 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1712 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001713 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001714 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1715 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001716 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001717 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1718 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001719 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001720 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1721 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001722 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001723 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1724 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001725 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1726};
1727
1728static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1729{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001730 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001731 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001732 uint32_t reply = 0, format_map = 0;
1733 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001734
1735 /* Read the list of supported input resolutions for the selected TV
1736 * format.
1737 */
Chris Wilson40039752010-08-04 13:50:26 +01001738 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001739 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001740 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001741
Chris Wilson32aad862010-08-04 13:50:25 +01001742 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1743 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001744
Chris Wilson32aad862010-08-04 13:50:25 +01001745 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001746 if (!intel_sdvo_write_cmd(intel_sdvo,
1747 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001748 &tv_res, sizeof(tv_res)))
1749 return;
1750 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001751 return;
1752
1753 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001754 if (reply & (1 << i)) {
1755 struct drm_display_mode *nmode;
1756 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001757 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001758 if (nmode)
1759 drm_mode_probed_add(connector, nmode);
1760 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001761}
1762
Ma Ling7086c872009-05-13 11:20:06 +08001763static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1764{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001765 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001766 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001767 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001768
1769 /*
1770 * Attempt to get the mode list from DDC.
1771 * Assume that the preferred modes are
1772 * arranged in priority order.
1773 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001774 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001775 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001776 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001777
1778 /* Fetch modes from VBT */
1779 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001780 newmode = drm_mode_duplicate(connector->dev,
1781 dev_priv->sdvo_lvds_vbt_mode);
1782 if (newmode != NULL) {
1783 /* Guarantee the mode is preferred */
1784 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1785 DRM_MODE_TYPE_DRIVER);
1786 drm_mode_probed_add(connector, newmode);
1787 }
1788 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001789
1790end:
1791 list_for_each_entry(newmode, &connector->probed_modes, head) {
1792 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001793 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001794 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001795
Chris Wilson85454232010-08-08 14:28:23 +01001796 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001797 break;
1798 }
1799 }
1800
Ma Ling7086c872009-05-13 11:20:06 +08001801}
1802
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001803static int intel_sdvo_get_modes(struct drm_connector *connector)
1804{
Chris Wilson615fb932010-08-04 13:50:24 +01001805 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001806
Chris Wilson615fb932010-08-04 13:50:24 +01001807 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001808 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001809 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001810 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001811 else
1812 intel_sdvo_get_ddc_modes(connector);
1813
Chris Wilson32aad862010-08-04 13:50:25 +01001814 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001815}
1816
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001817static void
1818intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001819{
Chris Wilson615fb932010-08-04 13:50:24 +01001820 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001821 struct drm_device *dev = connector->dev;
1822
Chris Wilsonc5521702010-08-04 13:50:28 +01001823 if (intel_sdvo_connector->left)
1824 drm_property_destroy(dev, intel_sdvo_connector->left);
1825 if (intel_sdvo_connector->right)
1826 drm_property_destroy(dev, intel_sdvo_connector->right);
1827 if (intel_sdvo_connector->top)
1828 drm_property_destroy(dev, intel_sdvo_connector->top);
1829 if (intel_sdvo_connector->bottom)
1830 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1831 if (intel_sdvo_connector->hpos)
1832 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1833 if (intel_sdvo_connector->vpos)
1834 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1835 if (intel_sdvo_connector->saturation)
1836 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1837 if (intel_sdvo_connector->contrast)
1838 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1839 if (intel_sdvo_connector->hue)
1840 drm_property_destroy(dev, intel_sdvo_connector->hue);
1841 if (intel_sdvo_connector->sharpness)
1842 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1843 if (intel_sdvo_connector->flicker_filter)
1844 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1845 if (intel_sdvo_connector->flicker_filter_2d)
1846 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1847 if (intel_sdvo_connector->flicker_filter_adaptive)
1848 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1849 if (intel_sdvo_connector->tv_luma_filter)
1850 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1851 if (intel_sdvo_connector->tv_chroma_filter)
1852 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001853 if (intel_sdvo_connector->dot_crawl)
1854 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001855 if (intel_sdvo_connector->brightness)
1856 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001857}
1858
Jesse Barnes79e53942008-11-07 14:24:08 -08001859static void intel_sdvo_destroy(struct drm_connector *connector)
1860{
Chris Wilson615fb932010-08-04 13:50:24 +01001861 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001862
Chris Wilsonc5521702010-08-04 13:50:28 +01001863 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001864 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001865 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001866
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001867 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001868 drm_sysfs_connector_remove(connector);
1869 drm_connector_cleanup(connector);
Jani Nikula4b745b12012-11-12 18:31:36 +02001870 kfree(intel_sdvo_connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001871}
1872
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001873static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1874{
1875 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1876 struct edid *edid;
1877 bool has_audio = false;
1878
1879 if (!intel_sdvo->is_hdmi)
1880 return false;
1881
1882 edid = intel_sdvo_get_edid(connector);
1883 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1884 has_audio = drm_detect_monitor_audio(edid);
Jani Nikula38ab8a22012-08-15 12:32:36 +03001885 kfree(edid);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001886
1887 return has_audio;
1888}
1889
Zhao Yakuice6feab2009-08-24 13:50:26 +08001890static int
1891intel_sdvo_set_property(struct drm_connector *connector,
1892 struct drm_property *property,
1893 uint64_t val)
1894{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001895 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001896 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001897 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001898 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001899 uint8_t cmd;
1900 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001901
Rob Clark662595d2012-10-11 20:36:04 -05001902 ret = drm_object_property_set_value(&connector->base, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001903 if (ret)
1904 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001905
Chris Wilson3f43c482011-05-12 22:17:24 +01001906 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001907 int i = val;
1908 bool has_audio;
1909
1910 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001911 return 0;
1912
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001913 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001914
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001915 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001916 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1917 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001918 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001919
1920 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001921 return 0;
1922
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001923 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001924 goto done;
1925 }
1926
Chris Wilsone953fd72011-02-21 22:23:52 +00001927 if (property == dev_priv->broadcast_rgb_property) {
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001928 switch (val) {
1929 case INTEL_BROADCAST_RGB_AUTO:
1930 intel_sdvo->color_range_auto = true;
1931 break;
1932 case INTEL_BROADCAST_RGB_FULL:
1933 intel_sdvo->color_range_auto = false;
1934 intel_sdvo->color_range = 0;
1935 break;
1936 case INTEL_BROADCAST_RGB_LIMITED:
1937 intel_sdvo->color_range_auto = false;
Paulo Zanoni4f3a8bc2013-02-19 16:21:47 -03001938 /* FIXME: this bit is only valid when using TMDS
1939 * encoding and 8 bit per color mode. */
1940 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02001941 break;
1942 default:
1943 return -EINVAL;
1944 }
Zhao Yakuice6feab2009-08-24 13:50:26 +08001945 goto done;
1946 }
1947
Chris Wilsonc5521702010-08-04 13:50:28 +01001948#define CHECK_PROPERTY(name, NAME) \
1949 if (intel_sdvo_connector->name == property) { \
1950 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1951 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1952 cmd = SDVO_CMD_SET_##NAME; \
1953 intel_sdvo_connector->cur_##name = temp_value; \
1954 goto set_value; \
1955 }
1956
1957 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001958 if (val >= TV_FORMAT_NUM)
1959 return -EINVAL;
1960
Chris Wilson40039752010-08-04 13:50:26 +01001961 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001962 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001963 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001964
Chris Wilson40039752010-08-04 13:50:26 +01001965 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001966 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001967 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001968 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001969 if (intel_sdvo_connector->left == property) {
Rob Clark662595d2012-10-11 20:36:04 -05001970 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01001971 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001972 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001973 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001974
Chris Wilson615fb932010-08-04 13:50:24 +01001975 intel_sdvo_connector->left_margin = temp_value;
1976 intel_sdvo_connector->right_margin = temp_value;
1977 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001978 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001979 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001980 goto set_value;
1981 } else if (intel_sdvo_connector->right == property) {
Rob Clark662595d2012-10-11 20:36:04 -05001982 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01001983 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001984 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001985 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001986
Chris Wilson615fb932010-08-04 13:50:24 +01001987 intel_sdvo_connector->left_margin = temp_value;
1988 intel_sdvo_connector->right_margin = temp_value;
1989 temp_value = intel_sdvo_connector->max_hscan -
1990 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001991 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001992 goto set_value;
1993 } else if (intel_sdvo_connector->top == property) {
Rob Clark662595d2012-10-11 20:36:04 -05001994 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01001995 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001996 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001997 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001998
Chris Wilson615fb932010-08-04 13:50:24 +01001999 intel_sdvo_connector->top_margin = temp_value;
2000 intel_sdvo_connector->bottom_margin = temp_value;
2001 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01002002 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002003 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01002004 goto set_value;
2005 } else if (intel_sdvo_connector->bottom == property) {
Rob Clark662595d2012-10-11 20:36:04 -05002006 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002007 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01002008 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01002009 return 0;
2010
Chris Wilson615fb932010-08-04 13:50:24 +01002011 intel_sdvo_connector->top_margin = temp_value;
2012 intel_sdvo_connector->bottom_margin = temp_value;
2013 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01002014 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002015 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01002016 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002017 }
Chris Wilsonc5521702010-08-04 13:50:28 +01002018 CHECK_PROPERTY(hpos, HPOS)
2019 CHECK_PROPERTY(vpos, VPOS)
2020 CHECK_PROPERTY(saturation, SATURATION)
2021 CHECK_PROPERTY(contrast, CONTRAST)
2022 CHECK_PROPERTY(hue, HUE)
2023 CHECK_PROPERTY(brightness, BRIGHTNESS)
2024 CHECK_PROPERTY(sharpness, SHARPNESS)
2025 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2026 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2027 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2028 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2029 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01002030 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002031 }
Chris Wilsonc5521702010-08-04 13:50:28 +01002032
2033 return -EINVAL; /* unknown property */
2034
2035set_value:
2036 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2037 return -EIO;
2038
2039
2040done:
Chris Wilsonc0c36b942012-12-19 16:08:43 +00002041 if (intel_sdvo->base.base.crtc)
2042 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
Chris Wilsonc5521702010-08-04 13:50:28 +01002043
Chris Wilson32aad862010-08-04 13:50:25 +01002044 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01002045#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08002046}
2047
Jesse Barnes79e53942008-11-07 14:24:08 -08002048static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02002049 .dpms = intel_sdvo_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08002050 .detect = intel_sdvo_detect,
2051 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08002052 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08002053 .destroy = intel_sdvo_destroy,
2054};
2055
2056static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2057 .get_modes = intel_sdvo_get_modes,
2058 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01002059 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08002060};
2061
Hannes Ederb358d0a2008-12-18 21:18:47 +01002062static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08002063{
Chris Wilson890f3352010-09-14 16:46:59 +01002064 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002065
Chris Wilsonea5b2132010-08-04 13:50:23 +01002066 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002067 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002068 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002069
Chris Wilsone957d772010-09-24 12:52:03 +01002070 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002071 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08002072}
2073
2074static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2075 .destroy = intel_sdvo_enc_destroy,
2076};
2077
Chris Wilsonb66d8422010-08-12 15:26:41 +01002078static void
2079intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2080{
2081 uint16_t mask = 0;
2082 unsigned int num_bits;
2083
2084 /* Make a mask of outputs less than or equal to our own priority in the
2085 * list.
2086 */
2087 switch (sdvo->controlled_output) {
2088 case SDVO_OUTPUT_LVDS1:
2089 mask |= SDVO_OUTPUT_LVDS1;
2090 case SDVO_OUTPUT_LVDS0:
2091 mask |= SDVO_OUTPUT_LVDS0;
2092 case SDVO_OUTPUT_TMDS1:
2093 mask |= SDVO_OUTPUT_TMDS1;
2094 case SDVO_OUTPUT_TMDS0:
2095 mask |= SDVO_OUTPUT_TMDS0;
2096 case SDVO_OUTPUT_RGB1:
2097 mask |= SDVO_OUTPUT_RGB1;
2098 case SDVO_OUTPUT_RGB0:
2099 mask |= SDVO_OUTPUT_RGB0;
2100 break;
2101 }
2102
2103 /* Count bits to find what number we are in the priority list. */
2104 mask &= sdvo->caps.output_flags;
2105 num_bits = hweight16(mask);
2106 /* If more than 3 outputs, default to DDC bus 3 for now. */
2107 if (num_bits > 3)
2108 num_bits = 3;
2109
2110 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2111 sdvo->ddc_bus = 1 << num_bits;
2112}
Jesse Barnes79e53942008-11-07 14:24:08 -08002113
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002114/**
2115 * Choose the appropriate DDC bus for control bus switch command for this
2116 * SDVO output based on the controlled output.
2117 *
2118 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2119 * outputs, then LVDS outputs.
2120 */
2121static void
Adam Jacksonb1083332010-04-23 16:07:40 -04002122intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002123 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002124{
Adam Jacksonb1083332010-04-23 16:07:40 -04002125 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002126
Daniel Vettereef4eac2012-03-23 23:43:35 +01002127 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04002128 mapping = &(dev_priv->sdvo_mappings[0]);
2129 else
2130 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002131
Chris Wilsonb66d8422010-08-12 15:26:41 +01002132 if (mapping->initialized)
2133 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2134 else
2135 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002136}
2137
Chris Wilsone957d772010-09-24 12:52:03 +01002138static void
2139intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2140 struct intel_sdvo *sdvo, u32 reg)
2141{
2142 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04002143 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01002144
Daniel Vettereef4eac2012-03-23 23:43:35 +01002145 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01002146 mapping = &dev_priv->sdvo_mappings[0];
2147 else
2148 mapping = &dev_priv->sdvo_mappings[1];
2149
Jani Nikula6cb16122012-10-22 16:12:17 +03002150 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
Chris Wilsone957d772010-09-24 12:52:03 +01002151 pin = mapping->i2c_pin;
Jani Nikula6cb16122012-10-22 16:12:17 +03002152 else
2153 pin = GMBUS_PORT_DPB;
Chris Wilsone957d772010-09-24 12:52:03 +01002154
Jani Nikula6cb16122012-10-22 16:12:17 +03002155 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2156
2157 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2158 * our code totally fails once we start using gmbus. Hence fall back to
2159 * bit banging for now. */
2160 intel_gmbus_force_bit(sdvo->i2c, true);
Chris Wilsone957d772010-09-24 12:52:03 +01002161}
2162
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002163/* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2164static void
2165intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2166{
2167 intel_gmbus_force_bit(sdvo->i2c, false);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002168}
2169
2170static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01002171intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002172{
Chris Wilson97aaf912011-01-04 20:10:52 +00002173 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002174}
2175
yakui_zhao714605e2009-05-31 17:18:07 +08002176static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01002177intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08002178{
2179 struct drm_i915_private *dev_priv = dev->dev_private;
2180 struct sdvo_device_mapping *my_mapping, *other_mapping;
2181
Daniel Vettereef4eac2012-03-23 23:43:35 +01002182 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08002183 my_mapping = &dev_priv->sdvo_mappings[0];
2184 other_mapping = &dev_priv->sdvo_mappings[1];
2185 } else {
2186 my_mapping = &dev_priv->sdvo_mappings[1];
2187 other_mapping = &dev_priv->sdvo_mappings[0];
2188 }
2189
2190 /* If the BIOS described our SDVO device, take advantage of it. */
2191 if (my_mapping->slave_addr)
2192 return my_mapping->slave_addr;
2193
2194 /* If the BIOS only described a different SDVO device, use the
2195 * address that it isn't using.
2196 */
2197 if (other_mapping->slave_addr) {
2198 if (other_mapping->slave_addr == 0x70)
2199 return 0x72;
2200 else
2201 return 0x70;
2202 }
2203
2204 /* No SDVO device info is found for another DVO port,
2205 * so use mapping assumption we had before BIOS parsing.
2206 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01002207 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08002208 return 0x70;
2209 else
2210 return 0x72;
2211}
2212
Zhenyu Wang14571b42010-03-30 14:06:33 +08002213static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01002214intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2215 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002216{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002217 drm_connector_init(encoder->base.base.dev,
2218 &connector->base.base,
2219 &intel_sdvo_connector_funcs,
2220 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002221
Chris Wilsondf0e9242010-09-09 16:20:55 +01002222 drm_connector_helper_add(&connector->base.base,
2223 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002224
Peter Ross8f4839e2012-01-28 14:49:25 +01002225 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002226 connector->base.base.doublescan_allowed = 0;
2227 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002228 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002229
Chris Wilsondf0e9242010-09-09 16:20:55 +01002230 intel_connector_attach_encoder(&connector->base, &encoder->base);
2231 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002232}
2233
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002234static void
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002235intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2236 struct intel_sdvo_connector *connector)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002237{
2238 struct drm_device *dev = connector->base.base.dev;
2239
Chris Wilson3f43c482011-05-12 22:17:24 +01002240 intel_attach_force_audio_property(&connector->base.base);
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002241 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
Chris Wilsone953fd72011-02-21 22:23:52 +00002242 intel_attach_broadcast_rgb_property(&connector->base.base);
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002243 intel_sdvo->color_range_auto = true;
2244 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002245}
2246
Zhenyu Wang14571b42010-03-30 14:06:33 +08002247static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002248intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002249{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002250 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002251 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002252 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002253 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002254 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002255
Chris Wilson615fb932010-08-04 13:50:24 +01002256 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2257 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002258 return false;
2259
Zhenyu Wang14571b42010-03-30 14:06:33 +08002260 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002261 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002262 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002263 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002264 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002265 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002266 }
2267
Chris Wilson615fb932010-08-04 13:50:24 +01002268 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002269 connector = &intel_connector->base;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002270 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2271 intel_sdvo_connector->output_flag) {
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002272 connector->polled = DRM_CONNECTOR_POLL_HPD;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002273 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002274 /* Some SDVO devices have one-shot hotplug interrupts.
2275 * Ensure that they get re-enabled when an interrupt happens.
2276 */
2277 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2278 intel_sdvo_enable_hotplug(intel_encoder);
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002279 } else {
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002280 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002281 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002282 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2283 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2284
Chris Wilsone27d8532010-10-22 09:15:22 +01002285 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002286 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002287 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002288 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002289
Chris Wilsondf0e9242010-09-09 16:20:55 +01002290 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002291 if (intel_sdvo->is_hdmi)
Ville Syrjälä55bc60d2013-01-17 16:31:29 +02002292 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002293
2294 return true;
2295}
2296
2297static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002298intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002299{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002300 struct drm_encoder *encoder = &intel_sdvo->base.base;
2301 struct drm_connector *connector;
2302 struct intel_connector *intel_connector;
2303 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002304
Chris Wilson615fb932010-08-04 13:50:24 +01002305 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2306 if (!intel_sdvo_connector)
2307 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002308
Chris Wilson615fb932010-08-04 13:50:24 +01002309 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002310 connector = &intel_connector->base;
2311 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2312 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002313
Chris Wilson4ef69c72010-09-09 15:14:28 +01002314 intel_sdvo->controlled_output |= type;
2315 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002316
Chris Wilson4ef69c72010-09-09 15:14:28 +01002317 intel_sdvo->is_tv = true;
2318 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002319
Chris Wilsondf0e9242010-09-09 16:20:55 +01002320 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002321
Chris Wilson4ef69c72010-09-09 15:14:28 +01002322 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002323 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002324
Chris Wilson4ef69c72010-09-09 15:14:28 +01002325 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002326 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002327
Chris Wilson4ef69c72010-09-09 15:14:28 +01002328 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002329
2330err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002331 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002332 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002333}
2334
2335static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002336intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002337{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002338 struct drm_encoder *encoder = &intel_sdvo->base.base;
2339 struct drm_connector *connector;
2340 struct intel_connector *intel_connector;
2341 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002342
Chris Wilson615fb932010-08-04 13:50:24 +01002343 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2344 if (!intel_sdvo_connector)
2345 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002346
Chris Wilson615fb932010-08-04 13:50:24 +01002347 intel_connector = &intel_sdvo_connector->base;
2348 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002349 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2350 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2351 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002352
Chris Wilson4ef69c72010-09-09 15:14:28 +01002353 if (device == 0) {
2354 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2355 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2356 } else if (device == 1) {
2357 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2358 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2359 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002360
Chris Wilsondf0e9242010-09-09 16:20:55 +01002361 intel_sdvo_connector_init(intel_sdvo_connector,
2362 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002363 return true;
2364}
2365
2366static bool
2367intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2368{
2369 struct drm_encoder *encoder = &intel_sdvo->base.base;
2370 struct drm_connector *connector;
2371 struct intel_connector *intel_connector;
2372 struct intel_sdvo_connector *intel_sdvo_connector;
2373
2374 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2375 if (!intel_sdvo_connector)
2376 return false;
2377
2378 intel_connector = &intel_sdvo_connector->base;
2379 connector = &intel_connector->base;
2380 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2381 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2382
2383 if (device == 0) {
2384 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2385 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2386 } else if (device == 1) {
2387 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2388 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2389 }
2390
Chris Wilsondf0e9242010-09-09 16:20:55 +01002391 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002392 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002393 goto err;
2394
2395 return true;
2396
2397err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002398 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002399 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002400}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002401
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002402static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002403intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002404{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002405 intel_sdvo->is_tv = false;
2406 intel_sdvo->base.needs_tv_clock = false;
2407 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002408
Zhenyu Wang14571b42010-03-30 14:06:33 +08002409 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002410
Zhenyu Wang14571b42010-03-30 14:06:33 +08002411 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002412 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002413 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002414
Zhenyu Wang14571b42010-03-30 14:06:33 +08002415 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002416 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002417 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002418
Zhenyu Wang14571b42010-03-30 14:06:33 +08002419 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002420 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002421 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002422 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002423
Zhenyu Wang14571b42010-03-30 14:06:33 +08002424 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002425 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002426 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002427
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002428 if (flags & SDVO_OUTPUT_YPRPB0)
2429 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2430 return false;
2431
Zhenyu Wang14571b42010-03-30 14:06:33 +08002432 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002433 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002434 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002435
Zhenyu Wang14571b42010-03-30 14:06:33 +08002436 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002437 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002438 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002439
Zhenyu Wang14571b42010-03-30 14:06:33 +08002440 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002441 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002442 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002443
Zhenyu Wang14571b42010-03-30 14:06:33 +08002444 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002445 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002446 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002447
Zhenyu Wang14571b42010-03-30 14:06:33 +08002448 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002449 unsigned char bytes[2];
2450
Chris Wilsonea5b2132010-08-04 13:50:23 +01002451 intel_sdvo->controlled_output = 0;
2452 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002453 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002454 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002455 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002456 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002457 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002458 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002459
Zhenyu Wang14571b42010-03-30 14:06:33 +08002460 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002461}
2462
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002463static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2464{
2465 struct drm_device *dev = intel_sdvo->base.base.dev;
2466 struct drm_connector *connector, *tmp;
2467
2468 list_for_each_entry_safe(connector, tmp,
2469 &dev->mode_config.connector_list, head) {
2470 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2471 intel_sdvo_destroy(connector);
2472 }
2473}
2474
Chris Wilson32aad862010-08-04 13:50:25 +01002475static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2476 struct intel_sdvo_connector *intel_sdvo_connector,
2477 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002478{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002479 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002480 struct intel_sdvo_tv_format format;
2481 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002482
Chris Wilson32aad862010-08-04 13:50:25 +01002483 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2484 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002485
Chris Wilson1a3665c2011-01-25 13:59:37 +00002486 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002487 if (!intel_sdvo_get_value(intel_sdvo,
2488 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2489 &format, sizeof(format)))
2490 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002491
Chris Wilson32aad862010-08-04 13:50:25 +01002492 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002493
2494 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002495 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002496
Chris Wilson615fb932010-08-04 13:50:24 +01002497 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002498 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002499 if (format_map & (1 << i))
2500 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002501
2502
Chris Wilsonc5521702010-08-04 13:50:28 +01002503 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002504 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2505 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002506 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002507 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002508
Chris Wilson615fb932010-08-04 13:50:24 +01002509 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002510 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002511 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002512 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002513
Chris Wilson40039752010-08-04 13:50:26 +01002514 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Rob Clark662595d2012-10-11 20:36:04 -05002515 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002516 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002517 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002518
2519}
2520
Chris Wilsonc5521702010-08-04 13:50:28 +01002521#define ENHANCEMENT(name, NAME) do { \
2522 if (enhancements.name) { \
2523 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2524 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2525 return false; \
2526 intel_sdvo_connector->max_##name = data_value[0]; \
2527 intel_sdvo_connector->cur_##name = response; \
2528 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002529 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002530 if (!intel_sdvo_connector->name) return false; \
Rob Clark662595d2012-10-11 20:36:04 -05002531 drm_object_attach_property(&connector->base, \
Chris Wilsonc5521702010-08-04 13:50:28 +01002532 intel_sdvo_connector->name, \
2533 intel_sdvo_connector->cur_##name); \
2534 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2535 data_value[0], data_value[1], response); \
2536 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002537} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002538
2539static bool
2540intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2541 struct intel_sdvo_connector *intel_sdvo_connector,
2542 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002543{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002544 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002545 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002546 uint16_t response, data_value[2];
2547
Chris Wilsonc5521702010-08-04 13:50:28 +01002548 /* when horizontal overscan is supported, Add the left/right property */
2549 if (enhancements.overscan_h) {
2550 if (!intel_sdvo_get_value(intel_sdvo,
2551 SDVO_CMD_GET_MAX_OVERSCAN_H,
2552 &data_value, 4))
2553 return false;
2554
2555 if (!intel_sdvo_get_value(intel_sdvo,
2556 SDVO_CMD_GET_OVERSCAN_H,
2557 &response, 2))
2558 return false;
2559
2560 intel_sdvo_connector->max_hscan = data_value[0];
2561 intel_sdvo_connector->left_margin = data_value[0] - response;
2562 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2563 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002564 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002565 if (!intel_sdvo_connector->left)
2566 return false;
2567
Rob Clark662595d2012-10-11 20:36:04 -05002568 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002569 intel_sdvo_connector->left,
2570 intel_sdvo_connector->left_margin);
2571
2572 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002573 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002574 if (!intel_sdvo_connector->right)
2575 return false;
2576
Rob Clark662595d2012-10-11 20:36:04 -05002577 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002578 intel_sdvo_connector->right,
2579 intel_sdvo_connector->right_margin);
2580 DRM_DEBUG_KMS("h_overscan: max %d, "
2581 "default %d, current %d\n",
2582 data_value[0], data_value[1], response);
2583 }
2584
2585 if (enhancements.overscan_v) {
2586 if (!intel_sdvo_get_value(intel_sdvo,
2587 SDVO_CMD_GET_MAX_OVERSCAN_V,
2588 &data_value, 4))
2589 return false;
2590
2591 if (!intel_sdvo_get_value(intel_sdvo,
2592 SDVO_CMD_GET_OVERSCAN_V,
2593 &response, 2))
2594 return false;
2595
2596 intel_sdvo_connector->max_vscan = data_value[0];
2597 intel_sdvo_connector->top_margin = data_value[0] - response;
2598 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2599 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002600 drm_property_create_range(dev, 0,
2601 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002602 if (!intel_sdvo_connector->top)
2603 return false;
2604
Rob Clark662595d2012-10-11 20:36:04 -05002605 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002606 intel_sdvo_connector->top,
2607 intel_sdvo_connector->top_margin);
2608
2609 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002610 drm_property_create_range(dev, 0,
2611 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002612 if (!intel_sdvo_connector->bottom)
2613 return false;
2614
Rob Clark662595d2012-10-11 20:36:04 -05002615 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002616 intel_sdvo_connector->bottom,
2617 intel_sdvo_connector->bottom_margin);
2618 DRM_DEBUG_KMS("v_overscan: max %d, "
2619 "default %d, current %d\n",
2620 data_value[0], data_value[1], response);
2621 }
2622
2623 ENHANCEMENT(hpos, HPOS);
2624 ENHANCEMENT(vpos, VPOS);
2625 ENHANCEMENT(saturation, SATURATION);
2626 ENHANCEMENT(contrast, CONTRAST);
2627 ENHANCEMENT(hue, HUE);
2628 ENHANCEMENT(sharpness, SHARPNESS);
2629 ENHANCEMENT(brightness, BRIGHTNESS);
2630 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2631 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2632 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2633 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2634 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2635
Chris Wilsone0442182010-08-04 13:50:29 +01002636 if (enhancements.dot_crawl) {
2637 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2638 return false;
2639
2640 intel_sdvo_connector->max_dot_crawl = 1;
2641 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2642 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002643 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002644 if (!intel_sdvo_connector->dot_crawl)
2645 return false;
2646
Rob Clark662595d2012-10-11 20:36:04 -05002647 drm_object_attach_property(&connector->base,
Chris Wilsone0442182010-08-04 13:50:29 +01002648 intel_sdvo_connector->dot_crawl,
2649 intel_sdvo_connector->cur_dot_crawl);
2650 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2651 }
2652
Chris Wilsonc5521702010-08-04 13:50:28 +01002653 return true;
2654}
2655
2656static bool
2657intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2658 struct intel_sdvo_connector *intel_sdvo_connector,
2659 struct intel_sdvo_enhancements_reply enhancements)
2660{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002661 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002662 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2663 uint16_t response, data_value[2];
2664
2665 ENHANCEMENT(brightness, BRIGHTNESS);
2666
2667 return true;
2668}
2669#undef ENHANCEMENT
2670
2671static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2672 struct intel_sdvo_connector *intel_sdvo_connector)
2673{
2674 union {
2675 struct intel_sdvo_enhancements_reply reply;
2676 uint16_t response;
2677 } enhancements;
2678
Chris Wilson1a3665c2011-01-25 13:59:37 +00002679 BUILD_BUG_ON(sizeof(enhancements) != 2);
2680
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002681 enhancements.response = 0;
2682 intel_sdvo_get_value(intel_sdvo,
2683 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2684 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002685 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002686 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002687 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002688 }
Chris Wilson32aad862010-08-04 13:50:25 +01002689
Chris Wilsonc5521702010-08-04 13:50:28 +01002690 if (IS_TV(intel_sdvo_connector))
2691 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002692 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002693 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2694 else
2695 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002696}
Chris Wilson32aad862010-08-04 13:50:25 +01002697
Chris Wilsone957d772010-09-24 12:52:03 +01002698static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2699 struct i2c_msg *msgs,
2700 int num)
2701{
2702 struct intel_sdvo *sdvo = adapter->algo_data;
2703
2704 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2705 return -EIO;
2706
2707 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2708}
2709
2710static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2711{
2712 struct intel_sdvo *sdvo = adapter->algo_data;
2713 return sdvo->i2c->algo->functionality(sdvo->i2c);
2714}
2715
2716static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2717 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2718 .functionality = intel_sdvo_ddc_proxy_func
2719};
2720
2721static bool
2722intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2723 struct drm_device *dev)
2724{
2725 sdvo->ddc.owner = THIS_MODULE;
2726 sdvo->ddc.class = I2C_CLASS_DDC;
2727 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2728 sdvo->ddc.dev.parent = &dev->pdev->dev;
2729 sdvo->ddc.algo_data = sdvo;
2730 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2731
2732 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002733}
2734
Daniel Vettereef4eac2012-03-23 23:43:35 +01002735bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002736{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002737 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002738 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002739 struct intel_sdvo *intel_sdvo;
Chris Wilson084b6122012-05-11 18:01:33 +01002740 u32 hotplug_mask;
Jesse Barnes79e53942008-11-07 14:24:08 -08002741 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002742
Chris Wilsonea5b2132010-08-04 13:50:23 +01002743 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2744 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002745 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002746
Chris Wilson56184e32011-05-17 14:03:50 +01002747 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002748 intel_sdvo->is_sdvob = is_sdvob;
2749 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002750 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002751 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2752 goto err_i2c_bus;
Chris Wilsone957d772010-09-24 12:52:03 +01002753
Chris Wilson56184e32011-05-17 14:03:50 +01002754 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002755 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002756 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002757 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002758
Jesse Barnes79e53942008-11-07 14:24:08 -08002759 /* Read the regs to test if we can talk to the device */
2760 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002761 u8 byte;
2762
2763 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002764 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2765 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002766 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002767 }
2768 }
2769
Chris Wilson084b6122012-05-11 18:01:33 +01002770 hotplug_mask = 0;
2771 if (IS_G4X(dev)) {
2772 hotplug_mask = intel_sdvo->is_sdvob ?
2773 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2774 } else if (IS_GEN4(dev)) {
2775 hotplug_mask = intel_sdvo->is_sdvob ?
2776 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2777 } else {
2778 hotplug_mask = intel_sdvo->is_sdvob ?
2779 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2780 }
Ma Ling619ac3b2009-05-18 16:12:46 +08002781
Egbert Eich4f770a52013-02-25 12:06:52 -05002782 /* Only enable the hotplug irq if we need it, to work around noisy
2783 * hotplug lines.
2784 */
Egbert Eich1d843f92013-02-25 12:06:49 -05002785 if (intel_sdvo->hotplug_active)
2786 intel_encoder->hpd_pin = HPD_SDVO_B ? HPD_SDVO_B : HPD_SDVO_C;
2787
Daniel Vetter6cc5f342013-03-27 00:44:53 +01002788 intel_encoder->compute_config = intel_sdvo_compute_config;
Daniel Vetterce22c322012-07-01 15:31:04 +02002789 intel_encoder->disable = intel_disable_sdvo;
Daniel Vetter6cc5f342013-03-27 00:44:53 +01002790 intel_encoder->mode_set = intel_sdvo_mode_set;
Daniel Vetterce22c322012-07-01 15:31:04 +02002791 intel_encoder->enable = intel_enable_sdvo;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002792 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
Daniel Vetterce22c322012-07-01 15:31:04 +02002793
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002794 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002795 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002796 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002797
Chris Wilsonea5b2132010-08-04 13:50:23 +01002798 if (intel_sdvo_output_setup(intel_sdvo,
2799 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002800 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2801 SDVO_NAME(intel_sdvo));
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002802 /* Output_setup can leave behind connectors! */
2803 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002804 }
2805
Daniel Vettere506d6f2012-11-13 17:24:43 +01002806 /*
2807 * Cloning SDVO with anything is often impossible, since the SDVO
2808 * encoder can request a special input timing mode. And even if that's
2809 * not the case we have evidence that cloning a plain unscaled mode with
2810 * VGA doesn't really work. Furthermore the cloning flags are way too
2811 * simplistic anyway to express such constraints, so just give up on
2812 * cloning for SDVO encoders.
2813 */
2814 intel_sdvo->base.cloneable = false;
2815
Chris Wilsonea5b2132010-08-04 13:50:23 +01002816 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002817
Jesse Barnes79e53942008-11-07 14:24:08 -08002818 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002819 if (!intel_sdvo_set_target_input(intel_sdvo))
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002820 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002821
Chris Wilson32aad862010-08-04 13:50:25 +01002822 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2823 &intel_sdvo->pixel_clock_min,
2824 &intel_sdvo->pixel_clock_max))
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002825 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002826
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002827 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002828 "clock range %dMHz - %dMHz, "
2829 "input 1: %c, input 2: %c, "
2830 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002831 SDVO_NAME(intel_sdvo),
2832 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2833 intel_sdvo->caps.device_rev_id,
2834 intel_sdvo->pixel_clock_min / 1000,
2835 intel_sdvo->pixel_clock_max / 1000,
2836 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2837 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002838 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002839 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002840 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002841 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002842 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002843 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002844
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002845err_output:
2846 intel_sdvo_output_cleanup(intel_sdvo);
2847
Chris Wilsonf899fc62010-07-20 15:44:45 -07002848err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002849 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002850 i2c_del_adapter(&intel_sdvo->ddc);
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002851err_i2c_bus:
2852 intel_sdvo_unselect_i2c_bus(intel_sdvo);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002853 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002854
Eric Anholt7d573822009-01-02 13:33:00 -08002855 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002856}