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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00007 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 * Additional technical information is available on
maximilian attems8b2b4032007-07-28 13:07:16 +02009 * http://www.linux-mtd.infradead.org/doc/nand.html
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000010 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020012 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
Linus Torvalds1da177e2005-04-16 15:20:36 -070013 *
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020014 * Credits:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000015 * David Woodhouse for adding multichip support
16 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070017 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
18 * rework for 2K page size chips
19 *
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +020020 * TODO:
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 * Enable cached programming for 2k page size chips
22 * Check, if mtd->ecctype should be set to MTD_ECC_HW
Brian Norris7854d3f2011-06-23 14:12:08 -070023 * if we have HW ECC support.
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +030024 * BBT table is not serialized, has to be fixed
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070026 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License version 2 as
28 * published by the Free Software Foundation.
29 *
30 */
31
David Woodhouse552d9202006-05-14 01:20:46 +010032#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/delay.h>
34#include <linux/errno.h>
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +020035#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036#include <linux/sched.h>
37#include <linux/slab.h>
38#include <linux/types.h>
39#include <linux/mtd/mtd.h>
40#include <linux/mtd/nand.h>
41#include <linux/mtd/nand_ecc.h>
Ivan Djelic193bd402011-03-11 11:05:33 +010042#include <linux/mtd/nand_bch.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043#include <linux/interrupt.h>
44#include <linux/bitops.h>
Richard Purdie8fe833c2006-03-31 02:31:14 -080045#include <linux/leds.h>
Florian Fainelli7351d3a2010-09-07 13:23:45 +020046#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <linux/mtd/partitions.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070048
49/* Define default oob placement schemes for large and small page devices */
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020050static struct nand_ecclayout nand_oob_8 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070051 .eccbytes = 3,
52 .eccpos = {0, 1, 2},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020053 .oobfree = {
54 {.offset = 3,
55 .length = 2},
56 {.offset = 6,
Florian Fainellif8ac0412010-09-07 13:23:43 +020057 .length = 2} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070058};
59
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020060static struct nand_ecclayout nand_oob_16 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 .eccbytes = 6,
62 .eccpos = {0, 1, 2, 3, 6, 7},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020063 .oobfree = {
64 {.offset = 8,
Florian Fainellif8ac0412010-09-07 13:23:43 +020065 . length = 8} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070066};
67
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020068static struct nand_ecclayout nand_oob_64 = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070069 .eccbytes = 24,
70 .eccpos = {
David Woodhousee0c7d762006-05-13 18:07:53 +010071 40, 41, 42, 43, 44, 45, 46, 47,
72 48, 49, 50, 51, 52, 53, 54, 55,
73 56, 57, 58, 59, 60, 61, 62, 63},
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020074 .oobfree = {
75 {.offset = 2,
Florian Fainellif8ac0412010-09-07 13:23:43 +020076 .length = 38} }
Linus Torvalds1da177e2005-04-16 15:20:36 -070077};
78
Thomas Gleixner81ec5362007-12-12 17:27:03 +010079static struct nand_ecclayout nand_oob_128 = {
80 .eccbytes = 48,
81 .eccpos = {
82 80, 81, 82, 83, 84, 85, 86, 87,
83 88, 89, 90, 91, 92, 93, 94, 95,
84 96, 97, 98, 99, 100, 101, 102, 103,
85 104, 105, 106, 107, 108, 109, 110, 111,
86 112, 113, 114, 115, 116, 117, 118, 119,
87 120, 121, 122, 123, 124, 125, 126, 127},
88 .oobfree = {
89 {.offset = 2,
Florian Fainellif8ac0412010-09-07 13:23:43 +020090 .length = 78} }
Thomas Gleixner81ec5362007-12-12 17:27:03 +010091};
92
Huang Shijie6a8214a2012-11-19 14:43:30 +080093static int nand_get_device(struct mtd_info *mtd, int new_state);
Linus Torvalds1da177e2005-04-16 15:20:36 -070094
Thomas Gleixner8593fbc2006-05-29 03:26:58 +020095static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
96 struct mtd_oob_ops *ops);
97
Thomas Gleixnerd470a972006-05-23 23:48:57 +020098/*
Joe Perches8e87d782008-02-03 17:22:34 +020099 * For devices which display every fart in the system on a separate LED. Is
Thomas Gleixnerd470a972006-05-23 23:48:57 +0200100 * compiled away when LED support is disabled.
101 */
102DEFINE_LED_TRIGGER(nand_led_trigger);
103
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530104static int check_offs_len(struct mtd_info *mtd,
105 loff_t ofs, uint64_t len)
106{
107 struct nand_chip *chip = mtd->priv;
108 int ret = 0;
109
110 /* Start address must align on block boundary */
111 if (ofs & ((1 << chip->phys_erase_shift) - 1)) {
Brian Norris289c0522011-07-19 10:06:09 -0700112 pr_debug("%s: unaligned address\n", __func__);
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530113 ret = -EINVAL;
114 }
115
116 /* Length must align on block boundary */
117 if (len & ((1 << chip->phys_erase_shift) - 1)) {
Brian Norris289c0522011-07-19 10:06:09 -0700118 pr_debug("%s: length not block aligned\n", __func__);
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530119 ret = -EINVAL;
120 }
121
Vimal Singh6fe5a6a2010-02-03 14:12:24 +0530122 return ret;
123}
124
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125/**
126 * nand_release_device - [GENERIC] release chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700127 * @mtd: MTD device structure
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000128 *
Huang Shijieb0bb6902012-11-19 14:43:29 +0800129 * Release chip lock and wake up anyone waiting on the device.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100131static void nand_release_device(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200133 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134
Thomas Gleixnera36ed292006-05-23 11:37:03 +0200135 /* Release the controller and the chip */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200136 spin_lock(&chip->controller->lock);
137 chip->controller->active = NULL;
138 chip->state = FL_READY;
139 wake_up(&chip->controller->wq);
140 spin_unlock(&chip->controller->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141}
142
143/**
144 * nand_read_byte - [DEFAULT] read one byte from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700145 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700147 * Default read function for 8bit buswidth
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200149static uint8_t nand_read_byte(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200151 struct nand_chip *chip = mtd->priv;
152 return readb(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153}
154
155/**
Masanari Iida064a7692012-11-09 23:20:58 +0900156 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
Brian Norris7854d3f2011-06-23 14:12:08 -0700157 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700158 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700160 * Default read function for 16bit buswidth with endianness conversion.
161 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200163static uint8_t nand_read_byte16(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200165 struct nand_chip *chip = mtd->priv;
166 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167}
168
169/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170 * nand_read_word - [DEFAULT] read one word from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700171 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700173 * Default read function for 16bit buswidth without endianness conversion.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174 */
175static u16 nand_read_word(struct mtd_info *mtd)
176{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200177 struct nand_chip *chip = mtd->priv;
178 return readw(chip->IO_ADDR_R);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179}
180
181/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 * nand_select_chip - [DEFAULT] control CE line
Brian Norris8b6e50c2011-05-25 14:59:01 -0700183 * @mtd: MTD device structure
184 * @chipnr: chipnumber to select, -1 for deselect
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 *
186 * Default select function for 1 chip devices.
187 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200188static void nand_select_chip(struct mtd_info *mtd, int chipnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200190 struct nand_chip *chip = mtd->priv;
191
192 switch (chipnr) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193 case -1:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200194 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195 break;
196 case 0:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 break;
198
199 default:
200 BUG();
201 }
202}
203
204/**
205 * nand_write_buf - [DEFAULT] write buffer to chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700206 * @mtd: MTD device structure
207 * @buf: data buffer
208 * @len: number of bytes to write
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700210 * Default write function for 8bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200212static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200214 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215
Alexander Shiyan76413832013-04-13 09:32:13 +0400216 iowrite8_rep(chip->IO_ADDR_W, buf, len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217}
218
219/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000220 * nand_read_buf - [DEFAULT] read chip data into buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -0700221 * @mtd: MTD device structure
222 * @buf: buffer to store date
223 * @len: number of bytes to read
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700225 * Default read function for 8bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200227static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200229 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230
Alexander Shiyan76413832013-04-13 09:32:13 +0400231 ioread8_rep(chip->IO_ADDR_R, buf, len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700232}
233
234/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235 * nand_write_buf16 - [DEFAULT] write buffer to chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700236 * @mtd: MTD device structure
237 * @buf: data buffer
238 * @len: number of bytes to write
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700240 * Default write function for 16bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200242static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200244 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 u16 *p = (u16 *) buf;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000246
Alexander Shiyan76413832013-04-13 09:32:13 +0400247 iowrite16_rep(chip->IO_ADDR_W, p, len >> 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248}
249
250/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000251 * nand_read_buf16 - [DEFAULT] read chip data into buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -0700252 * @mtd: MTD device structure
253 * @buf: buffer to store date
254 * @len: number of bytes to read
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255 *
Brian Norris7854d3f2011-06-23 14:12:08 -0700256 * Default read function for 16bit buswidth.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257 */
Thomas Gleixner58dd8f2b2006-05-23 11:52:35 +0200258static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700259{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200260 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261 u16 *p = (u16 *) buf;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262
Alexander Shiyan76413832013-04-13 09:32:13 +0400263 ioread16_rep(chip->IO_ADDR_R, p, len >> 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264}
265
266/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
Brian Norris8b6e50c2011-05-25 14:59:01 -0700268 * @mtd: MTD device structure
269 * @ofs: offset from device start
270 * @getchip: 0, if the chip is already selected
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000272 * Check, if the block is bad.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273 */
274static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
275{
Brian Norriscdbec052012-01-13 18:11:48 -0800276 int page, chipnr, res = 0, i = 0;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200277 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278 u16 bad;
279
Brian Norris5fb15492011-05-31 16:31:21 -0700280 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
Kevin Cernekeeb60b08b2010-05-04 20:58:10 -0700281 ofs += mtd->erasesize - mtd->writesize;
282
Thomas Knobloch1a12f462007-05-03 07:39:37 +0100283 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
284
Linus Torvalds1da177e2005-04-16 15:20:36 -0700285 if (getchip) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200286 chipnr = (int)(ofs >> chip->chip_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287
Huang Shijie6a8214a2012-11-19 14:43:30 +0800288 nand_get_device(mtd, FL_READING);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289
290 /* Select the NAND device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200291 chip->select_chip(mtd, chipnr);
Thomas Knobloch1a12f462007-05-03 07:39:37 +0100292 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700293
Brian Norriscdbec052012-01-13 18:11:48 -0800294 do {
295 if (chip->options & NAND_BUSWIDTH_16) {
296 chip->cmdfunc(mtd, NAND_CMD_READOOB,
297 chip->badblockpos & 0xFE, page);
298 bad = cpu_to_le16(chip->read_word(mtd));
299 if (chip->badblockpos & 0x1)
300 bad >>= 8;
301 else
302 bad &= 0xFF;
303 } else {
304 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
305 page);
306 bad = chip->read_byte(mtd);
307 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000308
Brian Norriscdbec052012-01-13 18:11:48 -0800309 if (likely(chip->badblockbits == 8))
310 res = bad != 0xFF;
311 else
312 res = hweight8(bad) < chip->badblockbits;
313 ofs += mtd->writesize;
314 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
315 i++;
316 } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE));
Maxim Levitskye0b58d02010-02-22 20:39:38 +0200317
Huang Shijieb0bb6902012-11-19 14:43:29 +0800318 if (getchip) {
319 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320 nand_release_device(mtd);
Huang Shijieb0bb6902012-11-19 14:43:29 +0800321 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000322
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323 return res;
324}
325
326/**
Brian Norris5a0edb22013-07-30 17:52:58 -0700327 * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
Brian Norris8b6e50c2011-05-25 14:59:01 -0700328 * @mtd: MTD device structure
329 * @ofs: offset from device start
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700331 * This is the default implementation, which can be overridden by a hardware
Brian Norris5a0edb22013-07-30 17:52:58 -0700332 * specific driver. It provides the details for writing a bad block marker to a
333 * block.
334 */
335static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
336{
337 struct nand_chip *chip = mtd->priv;
338 struct mtd_oob_ops ops;
339 uint8_t buf[2] = { 0, 0 };
340 int ret = 0, res, i = 0;
341
342 ops.datbuf = NULL;
343 ops.oobbuf = buf;
344 ops.ooboffs = chip->badblockpos;
345 if (chip->options & NAND_BUSWIDTH_16) {
346 ops.ooboffs &= ~0x01;
347 ops.len = ops.ooblen = 2;
348 } else {
349 ops.len = ops.ooblen = 1;
350 }
351 ops.mode = MTD_OPS_PLACE_OOB;
352
353 /* Write to first/last page(s) if necessary */
354 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
355 ofs += mtd->erasesize - mtd->writesize;
356 do {
357 res = nand_do_write_oob(mtd, ofs, &ops);
358 if (!ret)
359 ret = res;
360
361 i++;
362 ofs += mtd->writesize;
363 } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2);
364
365 return ret;
366}
367
368/**
369 * nand_block_markbad_lowlevel - mark a block bad
370 * @mtd: MTD device structure
371 * @ofs: offset from device start
372 *
373 * This function performs the generic NAND bad block marking steps (i.e., bad
374 * block table(s) and/or marker(s)). We only allow the hardware driver to
375 * specify how to write bad block markers to OOB (chip->block_markbad).
376 *
377 * We try operations in the following order, according to our bbt_options
378 * (NAND_BBT_NO_OOB_BBM and NAND_BBT_USE_FLASH):
Brian Norrise2414f42012-02-06 13:44:00 -0800379 * (1) erase the affected block, to allow OOB marker to be written cleanly
380 * (2) update in-memory BBT
381 * (3) write bad block marker to OOB area of affected block
382 * (4) update flash-based BBT
383 * Note that we retain the first error encountered in (3) or (4), finish the
384 * procedures, and dump the error in the end.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385*/
Brian Norris5a0edb22013-07-30 17:52:58 -0700386static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200388 struct nand_chip *chip = mtd->priv;
Brian Norris5a0edb22013-07-30 17:52:58 -0700389 int block, res, ret = 0;
Brian Norrise2414f42012-02-06 13:44:00 -0800390 int write_oob = !(chip->bbt_options & NAND_BBT_NO_OOB_BBM);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000391
Brian Norrise2414f42012-02-06 13:44:00 -0800392 if (write_oob) {
Brian Norris00918422012-01-13 18:11:47 -0800393 struct erase_info einfo;
394
395 /* Attempt erase before marking OOB */
396 memset(&einfo, 0, sizeof(einfo));
397 einfo.mtd = mtd;
398 einfo.addr = ofs;
399 einfo.len = 1 << chip->phys_erase_shift;
400 nand_erase_nand(mtd, &einfo, 0);
401 }
402
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403 /* Get block number */
Andre Renaud4226b512007-04-17 13:50:59 -0400404 block = (int)(ofs >> chip->bbt_erase_shift);
Brian Norrise2414f42012-02-06 13:44:00 -0800405 /* Mark block bad in memory-based BBT */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200406 if (chip->bbt)
407 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408
Brian Norrise2414f42012-02-06 13:44:00 -0800409 /* Write bad block marker to OOB */
410 if (write_oob) {
Huang Shijie6a8214a2012-11-19 14:43:30 +0800411 nand_get_device(mtd, FL_WRITING);
Brian Norris5a0edb22013-07-30 17:52:58 -0700412 ret = chip->block_markbad(mtd, ofs);
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +0300413 nand_release_device(mtd);
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200414 }
Brian Norrise2414f42012-02-06 13:44:00 -0800415
416 /* Update flash-based bad block table */
417 if (chip->bbt_options & NAND_BBT_USE_FLASH) {
418 res = nand_update_bbt(mtd, ofs);
419 if (!ret)
420 ret = res;
421 }
422
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200423 if (!ret)
424 mtd->ecc_stats.badblocks++;
Artem Bityutskiyc0b8ba72007-07-23 16:06:50 +0300425
Thomas Gleixnerf1a28c02006-05-30 00:37:34 +0200426 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427}
428
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000429/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430 * nand_check_wp - [GENERIC] check if the chip is write protected
Brian Norris8b6e50c2011-05-25 14:59:01 -0700431 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700433 * Check, if the device is write protected. The function expects, that the
434 * device is already selected.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100436static int nand_check_wp(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200438 struct nand_chip *chip = mtd->priv;
Maxim Levitsky93edbad2010-02-22 20:39:40 +0200439
Brian Norris8b6e50c2011-05-25 14:59:01 -0700440 /* Broken xD cards report WP despite being writable */
Maxim Levitsky93edbad2010-02-22 20:39:40 +0200441 if (chip->options & NAND_BROKEN_XD)
442 return 0;
443
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444 /* Check the WP bit */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200445 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
446 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447}
448
449/**
450 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
Brian Norris8b6e50c2011-05-25 14:59:01 -0700451 * @mtd: MTD device structure
452 * @ofs: offset from device start
453 * @getchip: 0, if the chip is already selected
454 * @allowbbt: 1, if its allowed to access the bbt area
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455 *
456 * Check, if the block is bad. Either by reading the bad block table or
457 * calling of the scan function.
458 */
Thomas Gleixner2c0a2be2006-05-23 11:50:56 +0200459static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
460 int allowbbt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200462 struct nand_chip *chip = mtd->priv;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000463
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200464 if (!chip->bbt)
465 return chip->block_bad(mtd, ofs, getchip);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000466
Linus Torvalds1da177e2005-04-16 15:20:36 -0700467 /* Return info from the table */
David Woodhousee0c7d762006-05-13 18:07:53 +0100468 return nand_isbad_bbt(mtd, ofs, allowbbt);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469}
470
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200471/**
472 * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
Brian Norris8b6e50c2011-05-25 14:59:01 -0700473 * @mtd: MTD device structure
474 * @timeo: Timeout
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200475 *
476 * Helper function for nand_wait_ready used when needing to wait in interrupt
477 * context.
478 */
479static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo)
480{
481 struct nand_chip *chip = mtd->priv;
482 int i;
483
484 /* Wait for the device to get ready */
485 for (i = 0; i < timeo; i++) {
486 if (chip->dev_ready(mtd))
487 break;
488 touch_softlockup_watchdog();
489 mdelay(1);
490 }
491}
492
Brian Norris7854d3f2011-06-23 14:12:08 -0700493/* Wait for the ready pin, after a command. The timeout is caught later. */
David Woodhouse4b648b02006-09-25 17:05:24 +0100494void nand_wait_ready(struct mtd_info *mtd)
Thomas Gleixner3b887752005-02-22 21:56:49 +0000495{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200496 struct nand_chip *chip = mtd->priv;
Matthieu CASTETca6a2482012-11-22 18:31:28 +0100497 unsigned long timeo = jiffies + msecs_to_jiffies(20);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000498
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200499 /* 400ms timeout */
500 if (in_interrupt() || oops_in_progress)
501 return panic_nand_wait_ready(mtd, 400);
502
Richard Purdie8fe833c2006-03-31 02:31:14 -0800503 led_trigger_event(nand_led_trigger, LED_FULL);
Brian Norris7854d3f2011-06-23 14:12:08 -0700504 /* Wait until command is processed or timeout occurs */
Thomas Gleixner3b887752005-02-22 21:56:49 +0000505 do {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200506 if (chip->dev_ready(mtd))
Richard Purdie8fe833c2006-03-31 02:31:14 -0800507 break;
Ingo Molnar8446f1d2005-09-06 15:16:27 -0700508 touch_softlockup_watchdog();
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000509 } while (time_before(jiffies, timeo));
Richard Purdie8fe833c2006-03-31 02:31:14 -0800510 led_trigger_event(nand_led_trigger, LED_OFF);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000511}
David Woodhouse4b648b02006-09-25 17:05:24 +0100512EXPORT_SYMBOL_GPL(nand_wait_ready);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000513
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514/**
515 * nand_command - [DEFAULT] Send command to NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -0700516 * @mtd: MTD device structure
517 * @command: the command to be sent
518 * @column: the column address for this command, -1 if none
519 * @page_addr: the page address for this command, -1 if none
Linus Torvalds1da177e2005-04-16 15:20:36 -0700520 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700521 * Send command to NAND device. This function is used for small page devices
Artem Bityutskiy51148f12013-03-05 15:00:51 +0200522 * (512 Bytes per page).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200524static void nand_command(struct mtd_info *mtd, unsigned int command,
525 int column, int page_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700526{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200527 register struct nand_chip *chip = mtd->priv;
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200528 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529
Brian Norris8b6e50c2011-05-25 14:59:01 -0700530 /* Write out the command to the device */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531 if (command == NAND_CMD_SEQIN) {
532 int readcmd;
533
Joern Engel28318772006-05-22 23:18:05 +0200534 if (column >= mtd->writesize) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535 /* OOB area */
Joern Engel28318772006-05-22 23:18:05 +0200536 column -= mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537 readcmd = NAND_CMD_READOOB;
538 } else if (column < 256) {
539 /* First 256 bytes --> READ0 */
540 readcmd = NAND_CMD_READ0;
541 } else {
542 column -= 256;
543 readcmd = NAND_CMD_READ1;
544 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200545 chip->cmd_ctrl(mtd, readcmd, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200546 ctrl &= ~NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200548 chip->cmd_ctrl(mtd, command, ctrl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549
Brian Norris8b6e50c2011-05-25 14:59:01 -0700550 /* Address cycle, when necessary */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200551 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
552 /* Serially input address */
553 if (column != -1) {
554 /* Adjust columns for 16 bit buswidth */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200555 if (chip->options & NAND_BUSWIDTH_16)
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200556 column >>= 1;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200557 chip->cmd_ctrl(mtd, column, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200558 ctrl &= ~NAND_CTRL_CHANGE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559 }
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200560 if (page_addr != -1) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200561 chip->cmd_ctrl(mtd, page_addr, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200562 ctrl &= ~NAND_CTRL_CHANGE;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200563 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200564 /* One more address cycle for devices > 32MiB */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200565 if (chip->chipsize > (32 << 20))
566 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200567 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200568 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000569
570 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -0700571 * Program and erase have their own busy handlers status and sequential
572 * in needs no delay
David Woodhousee0c7d762006-05-13 18:07:53 +0100573 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700574 switch (command) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000575
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576 case NAND_CMD_PAGEPROG:
577 case NAND_CMD_ERASE1:
578 case NAND_CMD_ERASE2:
579 case NAND_CMD_SEQIN:
580 case NAND_CMD_STATUS:
581 return;
582
583 case NAND_CMD_RESET:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200584 if (chip->dev_ready)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700585 break;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200586 udelay(chip->chip_delay);
587 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200588 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200589 chip->cmd_ctrl(mtd,
590 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200591 while (!(chip->read_byte(mtd) & NAND_STATUS_READY))
592 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593 return;
594
David Woodhousee0c7d762006-05-13 18:07:53 +0100595 /* This applies to read commands */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596 default:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000597 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598 * If we don't have access to the busy pin, we apply the given
599 * command delay
David Woodhousee0c7d762006-05-13 18:07:53 +0100600 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200601 if (!chip->dev_ready) {
602 udelay(chip->chip_delay);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700603 return;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000604 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 }
Brian Norris8b6e50c2011-05-25 14:59:01 -0700606 /*
607 * Apply this short delay always to ensure that we do wait tWB in
608 * any case on any machine.
609 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100610 ndelay(100);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000611
612 nand_wait_ready(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613}
614
615/**
616 * nand_command_lp - [DEFAULT] Send command to NAND large page device
Brian Norris8b6e50c2011-05-25 14:59:01 -0700617 * @mtd: MTD device structure
618 * @command: the command to be sent
619 * @column: the column address for this command, -1 if none
620 * @page_addr: the page address for this command, -1 if none
Linus Torvalds1da177e2005-04-16 15:20:36 -0700621 *
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200622 * Send command to NAND device. This is the version for the new large page
Brian Norris7854d3f2011-06-23 14:12:08 -0700623 * devices. We don't have the separate regions as we have in the small page
624 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700625 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200626static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
627 int column, int page_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700628{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200629 register struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700630
631 /* Emulate NAND_CMD_READOOB */
632 if (command == NAND_CMD_READOOB) {
Joern Engel28318772006-05-22 23:18:05 +0200633 column += mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700634 command = NAND_CMD_READ0;
635 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000636
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200637 /* Command latch cycle */
Alexander Shiyanfb066ad2013-02-28 12:02:19 +0400638 chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700639
640 if (column != -1 || page_addr != -1) {
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200641 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642
643 /* Serially input address */
644 if (column != -1) {
645 /* Adjust columns for 16 bit buswidth */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200646 if (chip->options & NAND_BUSWIDTH_16)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700647 column >>= 1;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200648 chip->cmd_ctrl(mtd, column, ctrl);
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200649 ctrl &= ~NAND_CTRL_CHANGE;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200650 chip->cmd_ctrl(mtd, column >> 8, ctrl);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000651 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652 if (page_addr != -1) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200653 chip->cmd_ctrl(mtd, page_addr, ctrl);
654 chip->cmd_ctrl(mtd, page_addr >> 8,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200655 NAND_NCE | NAND_ALE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700656 /* One more address cycle for devices > 128MiB */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200657 if (chip->chipsize > (128 << 20))
658 chip->cmd_ctrl(mtd, page_addr >> 16,
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200659 NAND_NCE | NAND_ALE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700661 }
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200662 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000663
664 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -0700665 * Program and erase have their own busy handlers status, sequential
666 * in, and deplete1 need no delay.
David A. Marlin30f464b2005-01-17 18:35:25 +0000667 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700668 switch (command) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000669
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670 case NAND_CMD_CACHEDPROG:
671 case NAND_CMD_PAGEPROG:
672 case NAND_CMD_ERASE1:
673 case NAND_CMD_ERASE2:
674 case NAND_CMD_SEQIN:
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200675 case NAND_CMD_RNDIN:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676 case NAND_CMD_STATUS:
David A. Marlin30f464b2005-01-17 18:35:25 +0000677 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700678
679 case NAND_CMD_RESET:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200680 if (chip->dev_ready)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700681 break;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200682 udelay(chip->chip_delay);
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200683 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
684 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
685 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
686 NAND_NCE | NAND_CTRL_CHANGE);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200687 while (!(chip->read_byte(mtd) & NAND_STATUS_READY))
688 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689 return;
690
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200691 case NAND_CMD_RNDOUT:
692 /* No ready / busy check necessary */
693 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
694 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
695 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
696 NAND_NCE | NAND_CTRL_CHANGE);
697 return;
698
Linus Torvalds1da177e2005-04-16 15:20:36 -0700699 case NAND_CMD_READ0:
Thomas Gleixner12efdde2006-05-24 22:57:09 +0200700 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
701 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
702 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
703 NAND_NCE | NAND_CTRL_CHANGE);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000704
David Woodhousee0c7d762006-05-13 18:07:53 +0100705 /* This applies to read commands */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706 default:
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000707 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708 * If we don't have access to the busy pin, we apply the given
Brian Norris8b6e50c2011-05-25 14:59:01 -0700709 * command delay.
David Woodhousee0c7d762006-05-13 18:07:53 +0100710 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200711 if (!chip->dev_ready) {
712 udelay(chip->chip_delay);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700713 return;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000714 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700715 }
Thomas Gleixner3b887752005-02-22 21:56:49 +0000716
Brian Norris8b6e50c2011-05-25 14:59:01 -0700717 /*
718 * Apply this short delay always to ensure that we do wait tWB in
719 * any case on any machine.
720 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100721 ndelay(100);
Thomas Gleixner3b887752005-02-22 21:56:49 +0000722
723 nand_wait_ready(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700724}
725
726/**
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200727 * panic_nand_get_device - [GENERIC] Get chip for selected access
Brian Norris8b6e50c2011-05-25 14:59:01 -0700728 * @chip: the nand chip descriptor
729 * @mtd: MTD device structure
730 * @new_state: the state which is requested
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200731 *
732 * Used when in panic, no locks are taken.
733 */
734static void panic_nand_get_device(struct nand_chip *chip,
735 struct mtd_info *mtd, int new_state)
736{
Brian Norris7854d3f2011-06-23 14:12:08 -0700737 /* Hardware controller shared among independent devices */
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200738 chip->controller->active = chip;
739 chip->state = new_state;
740}
741
742/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700743 * nand_get_device - [GENERIC] Get chip for selected access
Brian Norris8b6e50c2011-05-25 14:59:01 -0700744 * @mtd: MTD device structure
745 * @new_state: the state which is requested
Linus Torvalds1da177e2005-04-16 15:20:36 -0700746 *
747 * Get the device and lock it for exclusive access
748 */
Thomas Gleixner2c0a2be2006-05-23 11:50:56 +0200749static int
Huang Shijie6a8214a2012-11-19 14:43:30 +0800750nand_get_device(struct mtd_info *mtd, int new_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751{
Huang Shijie6a8214a2012-11-19 14:43:30 +0800752 struct nand_chip *chip = mtd->priv;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200753 spinlock_t *lock = &chip->controller->lock;
754 wait_queue_head_t *wq = &chip->controller->wq;
David Woodhousee0c7d762006-05-13 18:07:53 +0100755 DECLARE_WAITQUEUE(wait, current);
Florian Fainelli7351d3a2010-09-07 13:23:45 +0200756retry:
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100757 spin_lock(lock);
758
vimal singhb8b3ee92009-07-09 20:41:22 +0530759 /* Hardware controller shared among independent devices */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200760 if (!chip->controller->active)
761 chip->controller->active = chip;
Thomas Gleixnera36ed292006-05-23 11:37:03 +0200762
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200763 if (chip->controller->active == chip && chip->state == FL_READY) {
764 chip->state = new_state;
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100765 spin_unlock(lock);
Vitaly Wool962034f2005-09-15 14:58:53 +0100766 return 0;
767 }
768 if (new_state == FL_PM_SUSPENDED) {
Li Yang6b0d9a82009-11-17 14:45:49 -0800769 if (chip->controller->active->state == FL_PM_SUSPENDED) {
770 chip->state = FL_PM_SUSPENDED;
771 spin_unlock(lock);
772 return 0;
Li Yang6b0d9a82009-11-17 14:45:49 -0800773 }
Thomas Gleixner0dfc6242005-05-31 20:39:20 +0100774 }
775 set_current_state(TASK_UNINTERRUPTIBLE);
776 add_wait_queue(wq, &wait);
777 spin_unlock(lock);
778 schedule();
779 remove_wait_queue(wq, &wait);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700780 goto retry;
781}
782
783/**
Brian Norris8b6e50c2011-05-25 14:59:01 -0700784 * panic_nand_wait - [GENERIC] wait until the command is done
785 * @mtd: MTD device structure
786 * @chip: NAND chip structure
787 * @timeo: timeout
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200788 *
789 * Wait for command done. This is a helper function for nand_wait used when
790 * we are in interrupt context. May happen when in panic and trying to write
Uwe Kleine-Königb5950762010-11-01 15:38:34 -0400791 * an oops through mtdoops.
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200792 */
793static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
794 unsigned long timeo)
795{
796 int i;
797 for (i = 0; i < timeo; i++) {
798 if (chip->dev_ready) {
799 if (chip->dev_ready(mtd))
800 break;
801 } else {
802 if (chip->read_byte(mtd) & NAND_STATUS_READY)
803 break;
804 }
805 mdelay(1);
Florian Fainellif8ac0412010-09-07 13:23:43 +0200806 }
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200807}
808
809/**
Brian Norris8b6e50c2011-05-25 14:59:01 -0700810 * nand_wait - [DEFAULT] wait until the command is done
811 * @mtd: MTD device structure
812 * @chip: NAND chip structure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700813 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700814 * Wait for command done. This applies to erase and program only. Erase can
815 * take up to 400ms and program up to 20ms according to general NAND and
816 * SmartMedia specs.
Randy Dunlap844d3b42006-06-28 21:48:27 -0700817 */
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200818static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700819{
820
Thomas Gleixner7bc33122006-06-20 20:05:05 +0200821 int status, state = chip->state;
Huang Shijie6d2559f2013-01-30 10:03:56 +0800822 unsigned long timeo = (state == FL_ERASING ? 400 : 20);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823
Richard Purdie8fe833c2006-03-31 02:31:14 -0800824 led_trigger_event(nand_led_trigger, LED_FULL);
825
Brian Norris8b6e50c2011-05-25 14:59:01 -0700826 /*
827 * Apply this short delay always to ensure that we do wait tWB in any
828 * case on any machine.
829 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100830 ndelay(100);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700831
Artem Bityutskiy14c65782013-03-04 14:21:34 +0200832 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200834 if (in_interrupt() || oops_in_progress)
835 panic_nand_wait(mtd, chip, timeo);
836 else {
Huang Shijie6d2559f2013-01-30 10:03:56 +0800837 timeo = jiffies + msecs_to_jiffies(timeo);
Simon Kagstrom2af7c652009-10-05 15:55:52 +0200838 while (time_before(jiffies, timeo)) {
839 if (chip->dev_ready) {
840 if (chip->dev_ready(mtd))
841 break;
842 } else {
843 if (chip->read_byte(mtd) & NAND_STATUS_READY)
844 break;
845 }
846 cond_resched();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700847 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700848 }
Richard Purdie8fe833c2006-03-31 02:31:14 -0800849 led_trigger_event(nand_led_trigger, LED_OFF);
850
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +0200851 status = (int)chip->read_byte(mtd);
Matthieu CASTETf251b8d2012-11-05 15:00:44 +0100852 /* This can happen if in case of timeout or buggy dev_ready */
853 WARN_ON(!(status & NAND_STATUS_READY));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700854 return status;
855}
856
857/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700858 * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700859 * @mtd: mtd info
860 * @ofs: offset to start unlock from
861 * @len: length to unlock
Brian Norris8b6e50c2011-05-25 14:59:01 -0700862 * @invert: when = 0, unlock the range of blocks within the lower and
863 * upper boundary address
864 * when = 1, unlock the range of blocks outside the boundaries
865 * of the lower and upper boundary address
Vimal Singh7d70f332010-02-08 15:50:49 +0530866 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700867 * Returs unlock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530868 */
869static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,
870 uint64_t len, int invert)
871{
872 int ret = 0;
873 int status, page;
874 struct nand_chip *chip = mtd->priv;
875
876 /* Submit address of first page to unlock */
877 page = ofs >> chip->page_shift;
878 chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask);
879
880 /* Submit address of last page to unlock */
881 page = (ofs + len) >> chip->page_shift;
882 chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1,
883 (page | invert) & chip->pagemask);
884
885 /* Call wait ready function */
886 status = chip->waitfunc(mtd, chip);
Vimal Singh7d70f332010-02-08 15:50:49 +0530887 /* See if device thinks it succeeded */
Huang Shijie74830962012-10-14 23:47:24 -0400888 if (status & NAND_STATUS_FAIL) {
Brian Norris289c0522011-07-19 10:06:09 -0700889 pr_debug("%s: error status = 0x%08x\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530890 __func__, status);
891 ret = -EIO;
892 }
893
894 return ret;
895}
896
897/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700898 * nand_unlock - [REPLACEABLE] unlocks specified locked blocks
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700899 * @mtd: mtd info
900 * @ofs: offset to start unlock from
901 * @len: length to unlock
Vimal Singh7d70f332010-02-08 15:50:49 +0530902 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700903 * Returns unlock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530904 */
905int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
906{
907 int ret = 0;
908 int chipnr;
909 struct nand_chip *chip = mtd->priv;
910
Brian Norris289c0522011-07-19 10:06:09 -0700911 pr_debug("%s: start = 0x%012llx, len = %llu\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530912 __func__, (unsigned long long)ofs, len);
913
914 if (check_offs_len(mtd, ofs, len))
915 ret = -EINVAL;
916
917 /* Align to last block address if size addresses end of the device */
918 if (ofs + len == mtd->size)
919 len -= mtd->erasesize;
920
Huang Shijie6a8214a2012-11-19 14:43:30 +0800921 nand_get_device(mtd, FL_UNLOCKING);
Vimal Singh7d70f332010-02-08 15:50:49 +0530922
923 /* Shift to get chip number */
924 chipnr = ofs >> chip->chip_shift;
925
926 chip->select_chip(mtd, chipnr);
927
928 /* Check, if it is write protected */
929 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -0700930 pr_debug("%s: device is write protected!\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530931 __func__);
932 ret = -EIO;
933 goto out;
934 }
935
936 ret = __nand_unlock(mtd, ofs, len, 0);
937
938out:
Huang Shijieb0bb6902012-11-19 14:43:29 +0800939 chip->select_chip(mtd, -1);
Vimal Singh7d70f332010-02-08 15:50:49 +0530940 nand_release_device(mtd);
941
942 return ret;
943}
Florian Fainelli7351d3a2010-09-07 13:23:45 +0200944EXPORT_SYMBOL(nand_unlock);
Vimal Singh7d70f332010-02-08 15:50:49 +0530945
946/**
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700947 * nand_lock - [REPLACEABLE] locks all blocks present in the device
Randy Dunlapb6d676d2010-08-10 18:02:50 -0700948 * @mtd: mtd info
949 * @ofs: offset to start unlock from
950 * @len: length to unlock
Vimal Singh7d70f332010-02-08 15:50:49 +0530951 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700952 * This feature is not supported in many NAND parts. 'Micron' NAND parts do
953 * have this feature, but it allows only to lock all blocks, not for specified
954 * range for block. Implementing 'lock' feature by making use of 'unlock', for
955 * now.
Vimal Singh7d70f332010-02-08 15:50:49 +0530956 *
Brian Norris8b6e50c2011-05-25 14:59:01 -0700957 * Returns lock status.
Vimal Singh7d70f332010-02-08 15:50:49 +0530958 */
959int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
960{
961 int ret = 0;
962 int chipnr, status, page;
963 struct nand_chip *chip = mtd->priv;
964
Brian Norris289c0522011-07-19 10:06:09 -0700965 pr_debug("%s: start = 0x%012llx, len = %llu\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530966 __func__, (unsigned long long)ofs, len);
967
968 if (check_offs_len(mtd, ofs, len))
969 ret = -EINVAL;
970
Huang Shijie6a8214a2012-11-19 14:43:30 +0800971 nand_get_device(mtd, FL_LOCKING);
Vimal Singh7d70f332010-02-08 15:50:49 +0530972
973 /* Shift to get chip number */
974 chipnr = ofs >> chip->chip_shift;
975
976 chip->select_chip(mtd, chipnr);
977
978 /* Check, if it is write protected */
979 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -0700980 pr_debug("%s: device is write protected!\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530981 __func__);
982 status = MTD_ERASE_FAILED;
983 ret = -EIO;
984 goto out;
985 }
986
987 /* Submit address of first page to lock */
988 page = ofs >> chip->page_shift;
989 chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask);
990
991 /* Call wait ready function */
992 status = chip->waitfunc(mtd, chip);
Vimal Singh7d70f332010-02-08 15:50:49 +0530993 /* See if device thinks it succeeded */
Huang Shijie74830962012-10-14 23:47:24 -0400994 if (status & NAND_STATUS_FAIL) {
Brian Norris289c0522011-07-19 10:06:09 -0700995 pr_debug("%s: error status = 0x%08x\n",
Vimal Singh7d70f332010-02-08 15:50:49 +0530996 __func__, status);
997 ret = -EIO;
998 goto out;
999 }
1000
1001 ret = __nand_unlock(mtd, ofs, len, 0x1);
1002
1003out:
Huang Shijieb0bb6902012-11-19 14:43:29 +08001004 chip->select_chip(mtd, -1);
Vimal Singh7d70f332010-02-08 15:50:49 +05301005 nand_release_device(mtd);
1006
1007 return ret;
1008}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001009EXPORT_SYMBOL(nand_lock);
Vimal Singh7d70f332010-02-08 15:50:49 +05301010
1011/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001012 * nand_read_page_raw - [INTERN] read raw page data without ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001013 * @mtd: mtd info structure
1014 * @chip: nand chip info structure
1015 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001016 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001017 * @page: page number to read
David Brownell52ff49d2009-03-04 12:01:36 -08001018 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001019 * Not for syndrome calculating ECC controllers, which use a special oob layout.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001020 */
1021static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001022 uint8_t *buf, int oob_required, int page)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001023{
1024 chip->read_buf(mtd, buf, mtd->writesize);
Brian Norris279f08d2012-05-02 10:15:03 -07001025 if (oob_required)
1026 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001027 return 0;
1028}
1029
1030/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001031 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001032 * @mtd: mtd info structure
1033 * @chip: nand chip info structure
1034 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001035 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001036 * @page: page number to read
David Brownell52ff49d2009-03-04 12:01:36 -08001037 *
1038 * We need a special oob layout and handling even when OOB isn't used.
1039 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001040static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07001041 struct nand_chip *chip, uint8_t *buf,
1042 int oob_required, int page)
David Brownell52ff49d2009-03-04 12:01:36 -08001043{
1044 int eccsize = chip->ecc.size;
1045 int eccbytes = chip->ecc.bytes;
1046 uint8_t *oob = chip->oob_poi;
1047 int steps, size;
1048
1049 for (steps = chip->ecc.steps; steps > 0; steps--) {
1050 chip->read_buf(mtd, buf, eccsize);
1051 buf += eccsize;
1052
1053 if (chip->ecc.prepad) {
1054 chip->read_buf(mtd, oob, chip->ecc.prepad);
1055 oob += chip->ecc.prepad;
1056 }
1057
1058 chip->read_buf(mtd, oob, eccbytes);
1059 oob += eccbytes;
1060
1061 if (chip->ecc.postpad) {
1062 chip->read_buf(mtd, oob, chip->ecc.postpad);
1063 oob += chip->ecc.postpad;
1064 }
1065 }
1066
1067 size = mtd->oobsize - (oob - chip->oob_poi);
1068 if (size)
1069 chip->read_buf(mtd, oob, size);
1070
1071 return 0;
1072}
1073
1074/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001075 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001076 * @mtd: mtd info structure
1077 * @chip: nand chip info structure
1078 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001079 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001080 * @page: page number to read
David A. Marlin068e3c02005-01-24 03:07:46 +00001081 */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001082static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001083 uint8_t *buf, int oob_required, int page)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001084{
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001085 int i, eccsize = chip->ecc.size;
1086 int eccbytes = chip->ecc.bytes;
1087 int eccsteps = chip->ecc.steps;
1088 uint8_t *p = buf;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001089 uint8_t *ecc_calc = chip->buffers->ecccalc;
1090 uint8_t *ecc_code = chip->buffers->ecccode;
Ben Dooks8b099a32007-05-28 19:17:54 +01001091 uint32_t *eccpos = chip->ecc.layout->eccpos;
Mike Dunn3f91e942012-04-25 12:06:09 -07001092 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001093
Brian Norris1fbb9382012-05-02 10:14:55 -07001094 chip->ecc.read_page_raw(mtd, chip, buf, 1, page);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001095
1096 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1097 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1098
1099 for (i = 0; i < chip->ecc.total; i++)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001100 ecc_code[i] = chip->oob_poi[eccpos[i]];
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001101
1102 eccsteps = chip->ecc.steps;
1103 p = buf;
1104
1105 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1106 int stat;
1107
1108 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001109 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001110 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001111 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001112 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001113 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1114 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001115 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001116 return max_bitflips;
Thomas Gleixner22c60f52005-04-04 19:56:32 +01001117}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001118
Linus Torvalds1da177e2005-04-16 15:20:36 -07001119/**
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05301120 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001121 * @mtd: mtd info structure
1122 * @chip: nand chip info structure
1123 * @data_offs: offset of requested data within the page
1124 * @readlen: data length
1125 * @bufpoi: buffer to store read data
Alexey Korolev3d459552008-05-15 17:23:18 +01001126 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001127static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1128 uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
Alexey Korolev3d459552008-05-15 17:23:18 +01001129{
1130 int start_step, end_step, num_steps;
1131 uint32_t *eccpos = chip->ecc.layout->eccpos;
1132 uint8_t *p;
1133 int data_col_addr, i, gaps = 0;
1134 int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
1135 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001136 int index = 0;
Mike Dunn3f91e942012-04-25 12:06:09 -07001137 unsigned int max_bitflips = 0;
Alexey Korolev3d459552008-05-15 17:23:18 +01001138
Brian Norris7854d3f2011-06-23 14:12:08 -07001139 /* Column address within the page aligned to ECC size (256bytes) */
Alexey Korolev3d459552008-05-15 17:23:18 +01001140 start_step = data_offs / chip->ecc.size;
1141 end_step = (data_offs + readlen - 1) / chip->ecc.size;
1142 num_steps = end_step - start_step + 1;
1143
Brian Norris8b6e50c2011-05-25 14:59:01 -07001144 /* Data size aligned to ECC ecc.size */
Alexey Korolev3d459552008-05-15 17:23:18 +01001145 datafrag_len = num_steps * chip->ecc.size;
1146 eccfrag_len = num_steps * chip->ecc.bytes;
1147
1148 data_col_addr = start_step * chip->ecc.size;
1149 /* If we read not a page aligned data */
1150 if (data_col_addr != 0)
1151 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
1152
1153 p = bufpoi + data_col_addr;
1154 chip->read_buf(mtd, p, datafrag_len);
1155
Brian Norris8b6e50c2011-05-25 14:59:01 -07001156 /* Calculate ECC */
Alexey Korolev3d459552008-05-15 17:23:18 +01001157 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
1158 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
1159
Brian Norris8b6e50c2011-05-25 14:59:01 -07001160 /*
1161 * The performance is faster if we position offsets according to
Brian Norris7854d3f2011-06-23 14:12:08 -07001162 * ecc.pos. Let's make sure that there are no gaps in ECC positions.
Brian Norris8b6e50c2011-05-25 14:59:01 -07001163 */
Alexey Korolev3d459552008-05-15 17:23:18 +01001164 for (i = 0; i < eccfrag_len - 1; i++) {
1165 if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=
1166 eccpos[i + start_step * chip->ecc.bytes + 1]) {
1167 gaps = 1;
1168 break;
1169 }
1170 }
1171 if (gaps) {
1172 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
1173 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1174 } else {
Brian Norris8b6e50c2011-05-25 14:59:01 -07001175 /*
Brian Norris7854d3f2011-06-23 14:12:08 -07001176 * Send the command to read the particular ECC bytes take care
Brian Norris8b6e50c2011-05-25 14:59:01 -07001177 * about buswidth alignment in read_buf.
1178 */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001179 index = start_step * chip->ecc.bytes;
1180
1181 aligned_pos = eccpos[index] & ~(busw - 1);
Alexey Korolev3d459552008-05-15 17:23:18 +01001182 aligned_len = eccfrag_len;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001183 if (eccpos[index] & (busw - 1))
Alexey Korolev3d459552008-05-15 17:23:18 +01001184 aligned_len++;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001185 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))
Alexey Korolev3d459552008-05-15 17:23:18 +01001186 aligned_len++;
1187
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001188 chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
1189 mtd->writesize + aligned_pos, -1);
Alexey Korolev3d459552008-05-15 17:23:18 +01001190 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);
1191 }
1192
1193 for (i = 0; i < eccfrag_len; i++)
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001194 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];
Alexey Korolev3d459552008-05-15 17:23:18 +01001195
1196 p = bufpoi + data_col_addr;
1197 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
1198 int stat;
1199
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001200 stat = chip->ecc.correct(mtd, p,
1201 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001202 if (stat < 0) {
Alexey Korolev3d459552008-05-15 17:23:18 +01001203 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001204 } else {
Alexey Korolev3d459552008-05-15 17:23:18 +01001205 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001206 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1207 }
Alexey Korolev3d459552008-05-15 17:23:18 +01001208 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001209 return max_bitflips;
Alexey Korolev3d459552008-05-15 17:23:18 +01001210}
1211
1212/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001213 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001214 * @mtd: mtd info structure
1215 * @chip: nand chip info structure
1216 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001217 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001218 * @page: page number to read
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001219 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001220 * Not for syndrome calculating ECC controllers which need a special oob layout.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001221 */
1222static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001223 uint8_t *buf, int oob_required, int page)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001224{
1225 int i, eccsize = chip->ecc.size;
1226 int eccbytes = chip->ecc.bytes;
1227 int eccsteps = chip->ecc.steps;
1228 uint8_t *p = buf;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001229 uint8_t *ecc_calc = chip->buffers->ecccalc;
1230 uint8_t *ecc_code = chip->buffers->ecccode;
Ben Dooks8b099a32007-05-28 19:17:54 +01001231 uint32_t *eccpos = chip->ecc.layout->eccpos;
Mike Dunn3f91e942012-04-25 12:06:09 -07001232 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001233
1234 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1235 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1236 chip->read_buf(mtd, p, eccsize);
1237 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1238 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001239 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001240
1241 for (i = 0; i < chip->ecc.total; i++)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001242 ecc_code[i] = chip->oob_poi[eccpos[i]];
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001243
1244 eccsteps = chip->ecc.steps;
1245 p = buf;
1246
1247 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1248 int stat;
1249
1250 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Mike Dunn3f91e942012-04-25 12:06:09 -07001251 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001252 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001253 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001254 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001255 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1256 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001257 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001258 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001259}
1260
1261/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001262 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
Brian Norris8b6e50c2011-05-25 14:59:01 -07001263 * @mtd: mtd info structure
1264 * @chip: nand chip info structure
1265 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001266 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001267 * @page: page number to read
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001268 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001269 * Hardware ECC for large page chips, require OOB to be read first. For this
1270 * ECC mode, the write_page method is re-used from ECC_HW. These methods
1271 * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
1272 * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
1273 * the data area, by overwriting the NAND manufacturer bad block markings.
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001274 */
1275static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07001276 struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001277{
1278 int i, eccsize = chip->ecc.size;
1279 int eccbytes = chip->ecc.bytes;
1280 int eccsteps = chip->ecc.steps;
1281 uint8_t *p = buf;
1282 uint8_t *ecc_code = chip->buffers->ecccode;
1283 uint32_t *eccpos = chip->ecc.layout->eccpos;
1284 uint8_t *ecc_calc = chip->buffers->ecccalc;
Mike Dunn3f91e942012-04-25 12:06:09 -07001285 unsigned int max_bitflips = 0;
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001286
1287 /* Read the OOB area first */
1288 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1289 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1290 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1291
1292 for (i = 0; i < chip->ecc.total; i++)
1293 ecc_code[i] = chip->oob_poi[eccpos[i]];
1294
1295 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1296 int stat;
1297
1298 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1299 chip->read_buf(mtd, p, eccsize);
1300 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1301
1302 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
Mike Dunn3f91e942012-04-25 12:06:09 -07001303 if (stat < 0) {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001304 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001305 } else {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001306 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001307 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1308 }
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001309 }
Mike Dunn3f91e942012-04-25 12:06:09 -07001310 return max_bitflips;
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07001311}
1312
1313/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001314 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
Brian Norris8b6e50c2011-05-25 14:59:01 -07001315 * @mtd: mtd info structure
1316 * @chip: nand chip info structure
1317 * @buf: buffer to store read data
Brian Norris1fbb9382012-05-02 10:14:55 -07001318 * @oob_required: caller requires OOB data read to chip->oob_poi
Brian Norris8b6e50c2011-05-25 14:59:01 -07001319 * @page: page number to read
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001320 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001321 * The hw generator calculates the error syndrome automatically. Therefore we
1322 * need a special oob layout and handling.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001323 */
1324static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001325 uint8_t *buf, int oob_required, int page)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001326{
1327 int i, eccsize = chip->ecc.size;
1328 int eccbytes = chip->ecc.bytes;
1329 int eccsteps = chip->ecc.steps;
1330 uint8_t *p = buf;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001331 uint8_t *oob = chip->oob_poi;
Mike Dunn3f91e942012-04-25 12:06:09 -07001332 unsigned int max_bitflips = 0;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001333
1334 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1335 int stat;
1336
1337 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1338 chip->read_buf(mtd, p, eccsize);
1339
1340 if (chip->ecc.prepad) {
1341 chip->read_buf(mtd, oob, chip->ecc.prepad);
1342 oob += chip->ecc.prepad;
1343 }
1344
1345 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
1346 chip->read_buf(mtd, oob, eccbytes);
1347 stat = chip->ecc.correct(mtd, p, oob, NULL);
1348
Mike Dunn3f91e942012-04-25 12:06:09 -07001349 if (stat < 0) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001350 mtd->ecc_stats.failed++;
Mike Dunn3f91e942012-04-25 12:06:09 -07001351 } else {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001352 mtd->ecc_stats.corrected += stat;
Mike Dunn3f91e942012-04-25 12:06:09 -07001353 max_bitflips = max_t(unsigned int, max_bitflips, stat);
1354 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001355
1356 oob += eccbytes;
1357
1358 if (chip->ecc.postpad) {
1359 chip->read_buf(mtd, oob, chip->ecc.postpad);
1360 oob += chip->ecc.postpad;
1361 }
1362 }
1363
1364 /* Calculate remaining oob bytes */
Vitaly Wool7e4178f2006-06-07 09:34:37 +04001365 i = mtd->oobsize - (oob - chip->oob_poi);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001366 if (i)
1367 chip->read_buf(mtd, oob, i);
1368
Mike Dunn3f91e942012-04-25 12:06:09 -07001369 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001370}
1371
1372/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001373 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
Brian Norris8b6e50c2011-05-25 14:59:01 -07001374 * @chip: nand chip structure
1375 * @oob: oob destination address
1376 * @ops: oob ops structure
1377 * @len: size of oob to transfer
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001378 */
1379static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
Vitaly Wool70145682006-11-03 18:20:38 +03001380 struct mtd_oob_ops *ops, size_t len)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001381{
Florian Fainellif8ac0412010-09-07 13:23:43 +02001382 switch (ops->mode) {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001383
Brian Norris0612b9d2011-08-30 18:45:40 -07001384 case MTD_OPS_PLACE_OOB:
1385 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001386 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
1387 return oob + len;
1388
Brian Norris0612b9d2011-08-30 18:45:40 -07001389 case MTD_OPS_AUTO_OOB: {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001390 struct nand_oobfree *free = chip->ecc.layout->oobfree;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001391 uint32_t boffs = 0, roffs = ops->ooboffs;
1392 size_t bytes = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001393
Florian Fainellif8ac0412010-09-07 13:23:43 +02001394 for (; free->length && len; free++, len -= bytes) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07001395 /* Read request not from offset 0? */
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001396 if (unlikely(roffs)) {
1397 if (roffs >= free->length) {
1398 roffs -= free->length;
1399 continue;
1400 }
1401 boffs = free->offset + roffs;
1402 bytes = min_t(size_t, len,
1403 (free->length - roffs));
1404 roffs = 0;
1405 } else {
1406 bytes = min_t(size_t, len, free->length);
1407 boffs = free->offset;
1408 }
1409 memcpy(oob, chip->oob_poi + boffs, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001410 oob += bytes;
1411 }
1412 return oob;
1413 }
1414 default:
1415 BUG();
1416 }
1417 return NULL;
1418}
1419
1420/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001421 * nand_do_read_ops - [INTERN] Read data with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07001422 * @mtd: MTD device structure
1423 * @from: offset to read from
1424 * @ops: oob ops structure
David A. Marlin068e3c02005-01-24 03:07:46 +00001425 *
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001426 * Internal function. Called with chip held.
David A. Marlin068e3c02005-01-24 03:07:46 +00001427 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001428static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1429 struct mtd_oob_ops *ops)
David A. Marlin068e3c02005-01-24 03:07:46 +00001430{
Brian Norrise47f3db2012-05-02 10:14:56 -07001431 int chipnr, page, realpage, col, bytes, aligned, oob_required;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001432 struct nand_chip *chip = mtd->priv;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001433 struct mtd_ecc_stats stats;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001434 int ret = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001435 uint32_t readlen = ops->len;
Vitaly Wool70145682006-11-03 18:20:38 +03001436 uint32_t oobreadlen = ops->ooblen;
Brian Norris0612b9d2011-08-30 18:45:40 -07001437 uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ?
Maxim Levitsky9aca3342010-02-22 20:39:35 +02001438 mtd->oobavail : mtd->oobsize;
1439
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001440 uint8_t *bufpoi, *oob, *buf;
Mike Dunnedbc45402012-04-25 12:06:11 -07001441 unsigned int max_bitflips = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001442
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001443 stats = mtd->ecc_stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001444
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001445 chipnr = (int)(from >> chip->chip_shift);
1446 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001447
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001448 realpage = (int)(from >> chip->page_shift);
1449 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001450
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001451 col = (int)(from & (mtd->writesize - 1));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001452
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001453 buf = ops->datbuf;
1454 oob = ops->oobbuf;
Brian Norrise47f3db2012-05-02 10:14:56 -07001455 oob_required = oob ? 1 : 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001456
Florian Fainellif8ac0412010-09-07 13:23:43 +02001457 while (1) {
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001458 bytes = min(mtd->writesize - col, readlen);
1459 aligned = (bytes == mtd->writesize);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001460
Brian Norris8b6e50c2011-05-25 14:59:01 -07001461 /* Is the current page in the buffer? */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001462 if (realpage != chip->pagebuf || oob) {
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001463 bufpoi = aligned ? buf : chip->buffers->databuf;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001464
Brian Norrisc00a0992012-05-01 17:12:54 -07001465 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001466
Mike Dunnedbc45402012-04-25 12:06:11 -07001467 /*
1468 * Now read the page into the buffer. Absent an error,
1469 * the read methods return max bitflips per ecc step.
1470 */
Brian Norris0612b9d2011-08-30 18:45:40 -07001471 if (unlikely(ops->mode == MTD_OPS_RAW))
Brian Norris1fbb9382012-05-02 10:14:55 -07001472 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi,
Brian Norrise47f3db2012-05-02 10:14:56 -07001473 oob_required,
1474 page);
Jeff Westfahla5ff4f12012-08-13 16:35:30 -05001475 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
1476 !oob)
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001477 ret = chip->ecc.read_subpage(mtd, chip,
1478 col, bytes, bufpoi);
David Woodhouse956e9442006-09-25 17:12:39 +01001479 else
Sneha Narnakaje46a8cf22009-09-18 12:51:46 -07001480 ret = chip->ecc.read_page(mtd, chip, bufpoi,
Brian Norrise47f3db2012-05-02 10:14:56 -07001481 oob_required, page);
Brian Norris6d77b9d2011-09-07 13:13:40 -07001482 if (ret < 0) {
1483 if (!aligned)
1484 /* Invalidate page cache */
1485 chip->pagebuf = -1;
David Woodhousee0c7d762006-05-13 18:07:53 +01001486 break;
Brian Norris6d77b9d2011-09-07 13:13:40 -07001487 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001488
Mike Dunnedbc45402012-04-25 12:06:11 -07001489 max_bitflips = max_t(unsigned int, max_bitflips, ret);
1490
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001491 /* Transfer not aligned data */
1492 if (!aligned) {
Jeff Westfahla5ff4f12012-08-13 16:35:30 -05001493 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob &&
Brian Norris6d77b9d2011-09-07 13:13:40 -07001494 !(mtd->ecc_stats.failed - stats.failed) &&
Mike Dunnedbc45402012-04-25 12:06:11 -07001495 (ops->mode != MTD_OPS_RAW)) {
Alexey Korolev3d459552008-05-15 17:23:18 +01001496 chip->pagebuf = realpage;
Mike Dunnedbc45402012-04-25 12:06:11 -07001497 chip->pagebuf_bitflips = ret;
1498 } else {
Brian Norris6d77b9d2011-09-07 13:13:40 -07001499 /* Invalidate page cache */
1500 chip->pagebuf = -1;
Mike Dunnedbc45402012-04-25 12:06:11 -07001501 }
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001502 memcpy(buf, chip->buffers->databuf + col, bytes);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001503 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001504
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001505 buf += bytes;
1506
1507 if (unlikely(oob)) {
Maxim Levitskyb64d39d2010-02-22 20:39:37 +02001508 int toread = min(oobreadlen, max_oobsize);
1509
1510 if (toread) {
1511 oob = nand_transfer_oob(chip,
1512 oob, ops, toread);
1513 oobreadlen -= toread;
1514 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001515 }
Brian Norris5bc7c332013-03-13 09:51:31 -07001516
1517 if (chip->options & NAND_NEED_READRDY) {
1518 /* Apply delay or wait for ready/busy pin */
1519 if (!chip->dev_ready)
1520 udelay(chip->chip_delay);
1521 else
1522 nand_wait_ready(mtd);
1523 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001524 } else {
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001525 memcpy(buf, chip->buffers->databuf + col, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001526 buf += bytes;
Mike Dunnedbc45402012-04-25 12:06:11 -07001527 max_bitflips = max_t(unsigned int, max_bitflips,
1528 chip->pagebuf_bitflips);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001529 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001530
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001531 readlen -= bytes;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001532
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001533 if (!readlen)
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001534 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001535
Brian Norris8b6e50c2011-05-25 14:59:01 -07001536 /* For subsequent reads align to page boundary */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001537 col = 0;
1538 /* Increment page address */
1539 realpage++;
1540
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001541 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001542 /* Check, if we cross a chip boundary */
1543 if (!page) {
1544 chipnr++;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001545 chip->select_chip(mtd, -1);
1546 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001547 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001548 }
Huang Shijieb0bb6902012-11-19 14:43:29 +08001549 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001550
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001551 ops->retlen = ops->len - (size_t) readlen;
Vitaly Wool70145682006-11-03 18:20:38 +03001552 if (oob)
1553 ops->oobretlen = ops->ooblen - oobreadlen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001554
Mike Dunn3f91e942012-04-25 12:06:09 -07001555 if (ret < 0)
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001556 return ret;
1557
Thomas Gleixner9a1fcdf2006-05-29 14:56:39 +02001558 if (mtd->ecc_stats.failed - stats.failed)
1559 return -EBADMSG;
1560
Mike Dunnedbc45402012-04-25 12:06:11 -07001561 return max_bitflips;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001562}
1563
1564/**
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001565 * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
Brian Norris8b6e50c2011-05-25 14:59:01 -07001566 * @mtd: MTD device structure
1567 * @from: offset to read from
1568 * @len: number of bytes to read
1569 * @retlen: pointer to variable to store the number of read bytes
1570 * @buf: the databuffer to put data
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001571 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001572 * Get hold of the chip and call nand_do_read.
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001573 */
1574static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1575 size_t *retlen, uint8_t *buf)
1576{
Brian Norris4a89ff82011-08-30 18:45:45 -07001577 struct mtd_oob_ops ops;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001578 int ret;
1579
Huang Shijie6a8214a2012-11-19 14:43:30 +08001580 nand_get_device(mtd, FL_READING);
Brian Norris4a89ff82011-08-30 18:45:45 -07001581 ops.len = len;
1582 ops.datbuf = buf;
1583 ops.oobbuf = NULL;
Huang Shijie11041ae2012-07-03 16:44:14 +08001584 ops.mode = MTD_OPS_PLACE_OOB;
Brian Norris4a89ff82011-08-30 18:45:45 -07001585 ret = nand_do_read_ops(mtd, from, &ops);
Brian Norris4a89ff82011-08-30 18:45:45 -07001586 *retlen = ops.retlen;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001587 nand_release_device(mtd);
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02001588 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001589}
1590
1591/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001592 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001593 * @mtd: mtd info structure
1594 * @chip: nand chip info structure
1595 * @page: page number to read
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001596 */
1597static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001598 int page)
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001599{
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001600 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001601 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001602 return 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001603}
1604
1605/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001606 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001607 * with syndromes
Brian Norris8b6e50c2011-05-25 14:59:01 -07001608 * @mtd: mtd info structure
1609 * @chip: nand chip info structure
1610 * @page: page number to read
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001611 */
1612static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001613 int page)
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001614{
1615 uint8_t *buf = chip->oob_poi;
1616 int length = mtd->oobsize;
1617 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1618 int eccsize = chip->ecc.size;
1619 uint8_t *bufpoi = buf;
1620 int i, toread, sndrnd = 0, pos;
1621
1622 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
1623 for (i = 0; i < chip->ecc.steps; i++) {
1624 if (sndrnd) {
1625 pos = eccsize + i * (eccsize + chunk);
1626 if (mtd->writesize > 512)
1627 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
1628 else
1629 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
1630 } else
1631 sndrnd = 1;
1632 toread = min_t(int, length, chunk);
1633 chip->read_buf(mtd, bufpoi, toread);
1634 bufpoi += toread;
1635 length -= toread;
1636 }
1637 if (length > 0)
1638 chip->read_buf(mtd, bufpoi, length);
1639
Shmulik Ladkani5c2ffb12012-05-09 13:06:35 +03001640 return 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001641}
1642
1643/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001644 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001645 * @mtd: mtd info structure
1646 * @chip: nand chip info structure
1647 * @page: page number to write
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001648 */
1649static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1650 int page)
1651{
1652 int status = 0;
1653 const uint8_t *buf = chip->oob_poi;
1654 int length = mtd->oobsize;
1655
1656 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
1657 chip->write_buf(mtd, buf, length);
1658 /* Send command to program the OOB data */
1659 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1660
1661 status = chip->waitfunc(mtd, chip);
1662
Savin Zlobec0d420f92006-06-21 11:51:20 +02001663 return status & NAND_STATUS_FAIL ? -EIO : 0;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001664}
1665
1666/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001667 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07001668 * with syndrome - only for large page flash
1669 * @mtd: mtd info structure
1670 * @chip: nand chip info structure
1671 * @page: page number to write
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001672 */
1673static int nand_write_oob_syndrome(struct mtd_info *mtd,
1674 struct nand_chip *chip, int page)
1675{
1676 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1677 int eccsize = chip->ecc.size, length = mtd->oobsize;
1678 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
1679 const uint8_t *bufpoi = chip->oob_poi;
1680
1681 /*
1682 * data-ecc-data-ecc ... ecc-oob
1683 * or
1684 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1685 */
1686 if (!chip->ecc.prepad && !chip->ecc.postpad) {
1687 pos = steps * (eccsize + chunk);
1688 steps = 0;
1689 } else
Vitaly Wool8b0036e2006-07-11 09:11:25 +02001690 pos = eccsize;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001691
1692 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
1693 for (i = 0; i < steps; i++) {
1694 if (sndcmd) {
1695 if (mtd->writesize <= 512) {
1696 uint32_t fill = 0xFFFFFFFF;
1697
1698 len = eccsize;
1699 while (len > 0) {
1700 int num = min_t(int, len, 4);
1701 chip->write_buf(mtd, (uint8_t *)&fill,
1702 num);
1703 len -= num;
1704 }
1705 } else {
1706 pos = eccsize + i * (eccsize + chunk);
1707 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
1708 }
1709 } else
1710 sndcmd = 1;
1711 len = min_t(int, length, chunk);
1712 chip->write_buf(mtd, bufpoi, len);
1713 bufpoi += len;
1714 length -= len;
1715 }
1716 if (length > 0)
1717 chip->write_buf(mtd, bufpoi, length);
1718
1719 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1720 status = chip->waitfunc(mtd, chip);
1721
1722 return status & NAND_STATUS_FAIL ? -EIO : 0;
1723}
1724
1725/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001726 * nand_do_read_oob - [INTERN] NAND read out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07001727 * @mtd: MTD device structure
1728 * @from: offset to read from
1729 * @ops: oob operations description structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07001730 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001731 * NAND read out-of-band data from the spare area.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001732 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001733static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1734 struct mtd_oob_ops *ops)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001735{
Brian Norrisc00a0992012-05-01 17:12:54 -07001736 int page, realpage, chipnr;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001737 struct nand_chip *chip = mtd->priv;
Brian Norris041e4572011-06-23 16:45:24 -07001738 struct mtd_ecc_stats stats;
Vitaly Wool70145682006-11-03 18:20:38 +03001739 int readlen = ops->ooblen;
1740 int len;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02001741 uint8_t *buf = ops->oobbuf;
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001742 int ret = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001743
Brian Norris289c0522011-07-19 10:06:09 -07001744 pr_debug("%s: from = 0x%08Lx, len = %i\n",
vimal singh20d8e242009-07-07 15:49:49 +05301745 __func__, (unsigned long long)from, readlen);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001746
Brian Norris041e4572011-06-23 16:45:24 -07001747 stats = mtd->ecc_stats;
1748
Brian Norris0612b9d2011-08-30 18:45:40 -07001749 if (ops->mode == MTD_OPS_AUTO_OOB)
Vitaly Wool70145682006-11-03 18:20:38 +03001750 len = chip->ecc.layout->oobavail;
Adrian Hunter03736152007-01-31 17:58:29 +02001751 else
1752 len = mtd->oobsize;
1753
1754 if (unlikely(ops->ooboffs >= len)) {
Brian Norris289c0522011-07-19 10:06:09 -07001755 pr_debug("%s: attempt to start read outside oob\n",
1756 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02001757 return -EINVAL;
1758 }
1759
1760 /* Do not allow reads past end of device */
1761 if (unlikely(from >= mtd->size ||
1762 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
1763 (from >> chip->page_shift)) * len)) {
Brian Norris289c0522011-07-19 10:06:09 -07001764 pr_debug("%s: attempt to read beyond end of device\n",
1765 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02001766 return -EINVAL;
1767 }
Vitaly Wool70145682006-11-03 18:20:38 +03001768
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001769 chipnr = (int)(from >> chip->chip_shift);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02001770 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001771
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001772 /* Shift to get page */
1773 realpage = (int)(from >> chip->page_shift);
1774 page = realpage & chip->pagemask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001775
Florian Fainellif8ac0412010-09-07 13:23:43 +02001776 while (1) {
Brian Norris0612b9d2011-08-30 18:45:40 -07001777 if (ops->mode == MTD_OPS_RAW)
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001778 ret = chip->ecc.read_oob_raw(mtd, chip, page);
Brian Norrisc46f6482011-08-30 18:45:38 -07001779 else
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001780 ret = chip->ecc.read_oob(mtd, chip, page);
1781
1782 if (ret < 0)
1783 break;
Vitaly Wool70145682006-11-03 18:20:38 +03001784
1785 len = min(len, readlen);
1786 buf = nand_transfer_oob(chip, buf, ops, len);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001787
Brian Norris5bc7c332013-03-13 09:51:31 -07001788 if (chip->options & NAND_NEED_READRDY) {
1789 /* Apply delay or wait for ready/busy pin */
1790 if (!chip->dev_ready)
1791 udelay(chip->chip_delay);
1792 else
1793 nand_wait_ready(mtd);
1794 }
1795
Vitaly Wool70145682006-11-03 18:20:38 +03001796 readlen -= len;
Savin Zlobec0d420f92006-06-21 11:51:20 +02001797 if (!readlen)
1798 break;
1799
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02001800 /* Increment page address */
1801 realpage++;
1802
1803 page = realpage & chip->pagemask;
1804 /* Check, if we cross a chip boundary */
1805 if (!page) {
1806 chipnr++;
1807 chip->select_chip(mtd, -1);
1808 chip->select_chip(mtd, chipnr);
1809 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001810 }
Huang Shijieb0bb6902012-11-19 14:43:29 +08001811 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001812
Shmulik Ladkani1951f2f2012-05-09 13:13:34 +03001813 ops->oobretlen = ops->ooblen - readlen;
1814
1815 if (ret < 0)
1816 return ret;
Brian Norris041e4572011-06-23 16:45:24 -07001817
1818 if (mtd->ecc_stats.failed - stats.failed)
1819 return -EBADMSG;
1820
1821 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001822}
1823
1824/**
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001825 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07001826 * @mtd: MTD device structure
1827 * @from: offset to read from
1828 * @ops: oob operation description structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07001829 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07001830 * NAND read data and/or out-of-band data.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001831 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001832static int nand_read_oob(struct mtd_info *mtd, loff_t from,
1833 struct mtd_oob_ops *ops)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001834{
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001835 int ret = -ENOTSUPP;
1836
1837 ops->retlen = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001838
1839 /* Do not allow reads past end of device */
Vitaly Wool70145682006-11-03 18:20:38 +03001840 if (ops->datbuf && (from + ops->len) > mtd->size) {
Brian Norris289c0522011-07-19 10:06:09 -07001841 pr_debug("%s: attempt to read beyond end of device\n",
1842 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001843 return -EINVAL;
1844 }
1845
Huang Shijie6a8214a2012-11-19 14:43:30 +08001846 nand_get_device(mtd, FL_READING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001847
Florian Fainellif8ac0412010-09-07 13:23:43 +02001848 switch (ops->mode) {
Brian Norris0612b9d2011-08-30 18:45:40 -07001849 case MTD_OPS_PLACE_OOB:
1850 case MTD_OPS_AUTO_OOB:
1851 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001852 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001853
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001854 default:
1855 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001856 }
1857
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001858 if (!ops->datbuf)
1859 ret = nand_do_read_oob(mtd, from, ops);
1860 else
1861 ret = nand_do_read_ops(mtd, from, ops);
1862
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001863out:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001864 nand_release_device(mtd);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001865 return ret;
1866}
1867
1868
1869/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001870 * nand_write_page_raw - [INTERN] raw page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001871 * @mtd: mtd info structure
1872 * @chip: nand chip info structure
1873 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001874 * @oob_required: must write chip->oob_poi to OOB
David Brownell52ff49d2009-03-04 12:01:36 -08001875 *
Brian Norris7854d3f2011-06-23 14:12:08 -07001876 * Not for syndrome calculating ECC controllers, which use a special oob layout.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001877 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001878static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001879 const uint8_t *buf, int oob_required)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001880{
1881 chip->write_buf(mtd, buf, mtd->writesize);
Brian Norris279f08d2012-05-02 10:15:03 -07001882 if (oob_required)
1883 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
Josh Wufdbad98d2012-06-25 18:07:45 +08001884
1885 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001886}
1887
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00001888/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001889 * nand_write_page_raw_syndrome - [INTERN] raw page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001890 * @mtd: mtd info structure
1891 * @chip: nand chip info structure
1892 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001893 * @oob_required: must write chip->oob_poi to OOB
David Brownell52ff49d2009-03-04 12:01:36 -08001894 *
1895 * We need a special oob layout and handling even when ECC isn't checked.
1896 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001897static int nand_write_page_raw_syndrome(struct mtd_info *mtd,
Florian Fainelli7351d3a2010-09-07 13:23:45 +02001898 struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001899 const uint8_t *buf, int oob_required)
David Brownell52ff49d2009-03-04 12:01:36 -08001900{
1901 int eccsize = chip->ecc.size;
1902 int eccbytes = chip->ecc.bytes;
1903 uint8_t *oob = chip->oob_poi;
1904 int steps, size;
1905
1906 for (steps = chip->ecc.steps; steps > 0; steps--) {
1907 chip->write_buf(mtd, buf, eccsize);
1908 buf += eccsize;
1909
1910 if (chip->ecc.prepad) {
1911 chip->write_buf(mtd, oob, chip->ecc.prepad);
1912 oob += chip->ecc.prepad;
1913 }
1914
1915 chip->read_buf(mtd, oob, eccbytes);
1916 oob += eccbytes;
1917
1918 if (chip->ecc.postpad) {
1919 chip->write_buf(mtd, oob, chip->ecc.postpad);
1920 oob += chip->ecc.postpad;
1921 }
1922 }
1923
1924 size = mtd->oobsize - (oob - chip->oob_poi);
1925 if (size)
1926 chip->write_buf(mtd, oob, size);
Josh Wufdbad98d2012-06-25 18:07:45 +08001927
1928 return 0;
David Brownell52ff49d2009-03-04 12:01:36 -08001929}
1930/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001931 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001932 * @mtd: mtd info structure
1933 * @chip: nand chip info structure
1934 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001935 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001936 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001937static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001938 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001939{
1940 int i, eccsize = chip->ecc.size;
1941 int eccbytes = chip->ecc.bytes;
1942 int eccsteps = chip->ecc.steps;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001943 uint8_t *ecc_calc = chip->buffers->ecccalc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001944 const uint8_t *p = buf;
Ben Dooks8b099a32007-05-28 19:17:54 +01001945 uint32_t *eccpos = chip->ecc.layout->eccpos;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001946
Brian Norris7854d3f2011-06-23 14:12:08 -07001947 /* Software ECC calculation */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001948 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1949 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001950
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02001951 for (i = 0; i < chip->ecc.total; i++)
1952 chip->oob_poi[eccpos[i]] = ecc_calc[i];
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001953
Josh Wufdbad98d2012-06-25 18:07:45 +08001954 return chip->ecc.write_page_raw(mtd, chip, buf, 1);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001955}
1956
1957/**
Brian Norris7854d3f2011-06-23 14:12:08 -07001958 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
Brian Norris8b6e50c2011-05-25 14:59:01 -07001959 * @mtd: mtd info structure
1960 * @chip: nand chip info structure
1961 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07001962 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001963 */
Josh Wufdbad98d2012-06-25 18:07:45 +08001964static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -07001965 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001966{
1967 int i, eccsize = chip->ecc.size;
1968 int eccbytes = chip->ecc.bytes;
1969 int eccsteps = chip->ecc.steps;
David Woodhouse4bf63fc2006-09-25 17:08:04 +01001970 uint8_t *ecc_calc = chip->buffers->ecccalc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001971 const uint8_t *p = buf;
Ben Dooks8b099a32007-05-28 19:17:54 +01001972 uint32_t *eccpos = chip->ecc.layout->eccpos;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001973
1974 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1975 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
David Woodhouse29da9ce2006-05-26 23:05:44 +01001976 chip->write_buf(mtd, p, eccsize);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001977 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1978 }
1979
1980 for (i = 0; i < chip->ecc.total; i++)
1981 chip->oob_poi[eccpos[i]] = ecc_calc[i];
1982
1983 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
Josh Wufdbad98d2012-06-25 18:07:45 +08001984
1985 return 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02001986}
1987
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05301988
1989/**
1990 * nand_write_subpage_hwecc - [REPLACABLE] hardware ECC based subpage write
1991 * @mtd: mtd info structure
1992 * @chip: nand chip info structure
1993 * @column: column address of subpage within the page
1994 * @data_len: data length
1995 * @oob_required: must write chip->oob_poi to OOB
1996 */
1997static int nand_write_subpage_hwecc(struct mtd_info *mtd,
1998 struct nand_chip *chip, uint32_t offset,
1999 uint32_t data_len, const uint8_t *data_buf,
2000 int oob_required)
2001{
2002 uint8_t *oob_buf = chip->oob_poi;
2003 uint8_t *ecc_calc = chip->buffers->ecccalc;
2004 int ecc_size = chip->ecc.size;
2005 int ecc_bytes = chip->ecc.bytes;
2006 int ecc_steps = chip->ecc.steps;
2007 uint32_t *eccpos = chip->ecc.layout->eccpos;
2008 uint32_t start_step = offset / ecc_size;
2009 uint32_t end_step = (offset + data_len - 1) / ecc_size;
2010 int oob_bytes = mtd->oobsize / ecc_steps;
2011 int step, i;
2012
2013 for (step = 0; step < ecc_steps; step++) {
2014 /* configure controller for WRITE access */
2015 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
2016
2017 /* write data (untouched subpages already masked by 0xFF) */
2018 chip->write_buf(mtd, data_buf, ecc_size);
2019
2020 /* mask ECC of un-touched subpages by padding 0xFF */
2021 if ((step < start_step) || (step > end_step))
2022 memset(ecc_calc, 0xff, ecc_bytes);
2023 else
2024 chip->ecc.calculate(mtd, data_buf, ecc_calc);
2025
2026 /* mask OOB of un-touched subpages by padding 0xFF */
2027 /* if oob_required, preserve OOB metadata of written subpage */
2028 if (!oob_required || (step < start_step) || (step > end_step))
2029 memset(oob_buf, 0xff, oob_bytes);
2030
2031 data_buf += ecc_size;
2032 ecc_calc += ecc_bytes;
2033 oob_buf += oob_bytes;
2034 }
2035
2036 /* copy calculated ECC for whole page to chip->buffer->oob */
2037 /* this include masked-value(0xFF) for unwritten subpages */
2038 ecc_calc = chip->buffers->ecccalc;
2039 for (i = 0; i < chip->ecc.total; i++)
2040 chip->oob_poi[eccpos[i]] = ecc_calc[i];
2041
2042 /* write OOB buffer to NAND device */
2043 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
2044
2045 return 0;
2046}
2047
2048
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002049/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002050 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
Brian Norris8b6e50c2011-05-25 14:59:01 -07002051 * @mtd: mtd info structure
2052 * @chip: nand chip info structure
2053 * @buf: data buffer
Brian Norris1fbb9382012-05-02 10:14:55 -07002054 * @oob_required: must write chip->oob_poi to OOB
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002055 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002056 * The hw generator calculates the error syndrome automatically. Therefore we
2057 * need a special oob layout and handling.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002058 */
Josh Wufdbad98d2012-06-25 18:07:45 +08002059static int nand_write_page_syndrome(struct mtd_info *mtd,
Brian Norris1fbb9382012-05-02 10:14:55 -07002060 struct nand_chip *chip,
2061 const uint8_t *buf, int oob_required)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002062{
2063 int i, eccsize = chip->ecc.size;
2064 int eccbytes = chip->ecc.bytes;
2065 int eccsteps = chip->ecc.steps;
2066 const uint8_t *p = buf;
2067 uint8_t *oob = chip->oob_poi;
2068
2069 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
2070
2071 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
2072 chip->write_buf(mtd, p, eccsize);
2073
2074 if (chip->ecc.prepad) {
2075 chip->write_buf(mtd, oob, chip->ecc.prepad);
2076 oob += chip->ecc.prepad;
2077 }
2078
2079 chip->ecc.calculate(mtd, p, oob);
2080 chip->write_buf(mtd, oob, eccbytes);
2081 oob += eccbytes;
2082
2083 if (chip->ecc.postpad) {
2084 chip->write_buf(mtd, oob, chip->ecc.postpad);
2085 oob += chip->ecc.postpad;
2086 }
2087 }
2088
2089 /* Calculate remaining oob bytes */
Vitaly Wool7e4178f2006-06-07 09:34:37 +04002090 i = mtd->oobsize - (oob - chip->oob_poi);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002091 if (i)
2092 chip->write_buf(mtd, oob, i);
Josh Wufdbad98d2012-06-25 18:07:45 +08002093
2094 return 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002095}
2096
2097/**
David Woodhouse956e9442006-09-25 17:12:39 +01002098 * nand_write_page - [REPLACEABLE] write one page
Brian Norris8b6e50c2011-05-25 14:59:01 -07002099 * @mtd: MTD device structure
2100 * @chip: NAND chip descriptor
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302101 * @offset: address offset within the page
2102 * @data_len: length of actual data to be written
Brian Norris8b6e50c2011-05-25 14:59:01 -07002103 * @buf: the data to write
Brian Norris1fbb9382012-05-02 10:14:55 -07002104 * @oob_required: must write chip->oob_poi to OOB
Brian Norris8b6e50c2011-05-25 14:59:01 -07002105 * @page: page number to write
2106 * @cached: cached programming
2107 * @raw: use _raw version of write_page
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002108 */
2109static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302110 uint32_t offset, int data_len, const uint8_t *buf,
2111 int oob_required, int page, int cached, int raw)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002112{
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302113 int status, subpage;
2114
2115 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
2116 chip->ecc.write_subpage)
2117 subpage = offset || (data_len < mtd->writesize);
2118 else
2119 subpage = 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002120
2121 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
2122
David Woodhouse956e9442006-09-25 17:12:39 +01002123 if (unlikely(raw))
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302124 status = chip->ecc.write_page_raw(mtd, chip, buf,
2125 oob_required);
2126 else if (subpage)
2127 status = chip->ecc.write_subpage(mtd, chip, offset, data_len,
2128 buf, oob_required);
David Woodhouse956e9442006-09-25 17:12:39 +01002129 else
Josh Wufdbad98d2012-06-25 18:07:45 +08002130 status = chip->ecc.write_page(mtd, chip, buf, oob_required);
2131
2132 if (status < 0)
2133 return status;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002134
2135 /*
Brian Norris7854d3f2011-06-23 14:12:08 -07002136 * Cached progamming disabled for now. Not sure if it's worth the
Brian Norris8b6e50c2011-05-25 14:59:01 -07002137 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s).
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002138 */
2139 cached = 0;
2140
Artem Bityutskiy3239a6c2013-03-04 14:56:18 +02002141 if (!cached || !NAND_HAS_CACHEPROG(chip)) {
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002142
2143 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002144 status = chip->waitfunc(mtd, chip);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002145 /*
2146 * See if operation failed and additional status checks are
Brian Norris8b6e50c2011-05-25 14:59:01 -07002147 * available.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002148 */
2149 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2150 status = chip->errstat(mtd, chip, FL_WRITING, status,
2151 page);
2152
2153 if (status & NAND_STATUS_FAIL)
2154 return -EIO;
2155 } else {
2156 chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002157 status = chip->waitfunc(mtd, chip);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002158 }
2159
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002160 return 0;
2161}
2162
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002163/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002164 * nand_fill_oob - [INTERN] Transfer client buffer to oob
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002165 * @mtd: MTD device structure
Brian Norris8b6e50c2011-05-25 14:59:01 -07002166 * @oob: oob data buffer
2167 * @len: oob data write length
2168 * @ops: oob ops structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002169 */
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002170static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,
2171 struct mtd_oob_ops *ops)
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002172{
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002173 struct nand_chip *chip = mtd->priv;
2174
2175 /*
2176 * Initialise to all 0xFF, to avoid the possibility of left over OOB
2177 * data from a previous OOB read.
2178 */
2179 memset(chip->oob_poi, 0xff, mtd->oobsize);
2180
Florian Fainellif8ac0412010-09-07 13:23:43 +02002181 switch (ops->mode) {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002182
Brian Norris0612b9d2011-08-30 18:45:40 -07002183 case MTD_OPS_PLACE_OOB:
2184 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002185 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
2186 return oob + len;
2187
Brian Norris0612b9d2011-08-30 18:45:40 -07002188 case MTD_OPS_AUTO_OOB: {
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002189 struct nand_oobfree *free = chip->ecc.layout->oobfree;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002190 uint32_t boffs = 0, woffs = ops->ooboffs;
2191 size_t bytes = 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002192
Florian Fainellif8ac0412010-09-07 13:23:43 +02002193 for (; free->length && len; free++, len -= bytes) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07002194 /* Write request not from offset 0? */
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002195 if (unlikely(woffs)) {
2196 if (woffs >= free->length) {
2197 woffs -= free->length;
2198 continue;
2199 }
2200 boffs = free->offset + woffs;
2201 bytes = min_t(size_t, len,
2202 (free->length - woffs));
2203 woffs = 0;
2204 } else {
2205 bytes = min_t(size_t, len, free->length);
2206 boffs = free->offset;
2207 }
Vitaly Wool8b0036e2006-07-11 09:11:25 +02002208 memcpy(chip->oob_poi + boffs, oob, bytes);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002209 oob += bytes;
2210 }
2211 return oob;
2212 }
2213 default:
2214 BUG();
2215 }
2216 return NULL;
2217}
2218
Florian Fainellif8ac0412010-09-07 13:23:43 +02002219#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002220
2221/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002222 * nand_do_write_ops - [INTERN] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002223 * @mtd: MTD device structure
2224 * @to: offset to write to
2225 * @ops: oob operations description structure
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002226 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002227 * NAND write with ECC.
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002228 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002229static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2230 struct mtd_oob_ops *ops)
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002231{
Thomas Gleixner29072b92006-09-28 15:38:36 +02002232 int chipnr, realpage, page, blockmask, column;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002233 struct nand_chip *chip = mtd->priv;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002234 uint32_t writelen = ops->len;
Maxim Levitsky782ce792010-02-22 20:39:36 +02002235
2236 uint32_t oobwritelen = ops->ooblen;
Brian Norris0612b9d2011-08-30 18:45:40 -07002237 uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ?
Maxim Levitsky782ce792010-02-22 20:39:36 +02002238 mtd->oobavail : mtd->oobsize;
2239
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002240 uint8_t *oob = ops->oobbuf;
2241 uint8_t *buf = ops->datbuf;
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302242 int ret;
Brian Norrise47f3db2012-05-02 10:14:56 -07002243 int oob_required = oob ? 1 : 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002244
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002245 ops->retlen = 0;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002246 if (!writelen)
2247 return 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002248
Brian Norris8b6e50c2011-05-25 14:59:01 -07002249 /* Reject writes, which are not page aligned */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002250 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
Brian Norrisd0370212011-07-19 10:06:08 -07002251 pr_notice("%s: attempt to write non page aligned data\n",
2252 __func__);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002253 return -EINVAL;
2254 }
2255
Thomas Gleixner29072b92006-09-28 15:38:36 +02002256 column = to & (mtd->writesize - 1);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002257
Thomas Gleixner6a930962006-06-28 00:11:45 +02002258 chipnr = (int)(to >> chip->chip_shift);
2259 chip->select_chip(mtd, chipnr);
2260
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002261 /* Check, if it is write protected */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002262 if (nand_check_wp(mtd)) {
2263 ret = -EIO;
2264 goto err_out;
2265 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002266
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002267 realpage = (int)(to >> chip->page_shift);
2268 page = realpage & chip->pagemask;
2269 blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
2270
2271 /* Invalidate the page cache, when we write to the cached page */
2272 if (to <= (chip->pagebuf << chip->page_shift) &&
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002273 (chip->pagebuf << chip->page_shift) < (to + ops->len))
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002274 chip->pagebuf = -1;
2275
Maxim Levitsky782ce792010-02-22 20:39:36 +02002276 /* Don't allow multipage oob writes with offset */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002277 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {
2278 ret = -EINVAL;
2279 goto err_out;
2280 }
Maxim Levitsky782ce792010-02-22 20:39:36 +02002281
Florian Fainellif8ac0412010-09-07 13:23:43 +02002282 while (1) {
Thomas Gleixner29072b92006-09-28 15:38:36 +02002283 int bytes = mtd->writesize;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002284 int cached = writelen > bytes && page != blockmask;
Thomas Gleixner29072b92006-09-28 15:38:36 +02002285 uint8_t *wbuf = buf;
2286
Brian Norris8b6e50c2011-05-25 14:59:01 -07002287 /* Partial page write? */
Thomas Gleixner29072b92006-09-28 15:38:36 +02002288 if (unlikely(column || writelen < (mtd->writesize - 1))) {
2289 cached = 0;
2290 bytes = min_t(int, bytes - column, (int) writelen);
2291 chip->pagebuf = -1;
2292 memset(chip->buffers->databuf, 0xff, mtd->writesize);
2293 memcpy(&chip->buffers->databuf[column], buf, bytes);
2294 wbuf = chip->buffers->databuf;
2295 }
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002296
Maxim Levitsky782ce792010-02-22 20:39:36 +02002297 if (unlikely(oob)) {
2298 size_t len = min(oobwritelen, oobmaxlen);
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002299 oob = nand_fill_oob(mtd, oob, len, ops);
Maxim Levitsky782ce792010-02-22 20:39:36 +02002300 oobwritelen -= len;
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002301 } else {
2302 /* We still need to erase leftover OOB data */
2303 memset(chip->oob_poi, 0xff, mtd->oobsize);
Maxim Levitsky782ce792010-02-22 20:39:36 +02002304 }
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05302305 ret = chip->write_page(mtd, chip, column, bytes, wbuf,
2306 oob_required, page, cached,
2307 (ops->mode == MTD_OPS_RAW));
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002308 if (ret)
2309 break;
2310
2311 writelen -= bytes;
2312 if (!writelen)
2313 break;
2314
Thomas Gleixner29072b92006-09-28 15:38:36 +02002315 column = 0;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002316 buf += bytes;
2317 realpage++;
2318
2319 page = realpage & chip->pagemask;
2320 /* Check, if we cross a chip boundary */
2321 if (!page) {
2322 chipnr++;
2323 chip->select_chip(mtd, -1);
2324 chip->select_chip(mtd, chipnr);
2325 }
2326 }
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002327
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002328 ops->retlen = ops->len - writelen;
Vitaly Wool70145682006-11-03 18:20:38 +03002329 if (unlikely(oob))
2330 ops->oobretlen = ops->ooblen;
Huang Shijieb0bb6902012-11-19 14:43:29 +08002331
2332err_out:
2333 chip->select_chip(mtd, -1);
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002334 return ret;
2335}
2336
2337/**
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002338 * panic_nand_write - [MTD Interface] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002339 * @mtd: MTD device structure
2340 * @to: offset to write to
2341 * @len: number of bytes to write
2342 * @retlen: pointer to variable to store the number of written bytes
2343 * @buf: the data to write
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002344 *
2345 * NAND write with ECC. Used when performing writes in interrupt context, this
2346 * may for example be called by mtdoops when writing an oops while in panic.
2347 */
2348static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2349 size_t *retlen, const uint8_t *buf)
2350{
2351 struct nand_chip *chip = mtd->priv;
Brian Norris4a89ff82011-08-30 18:45:45 -07002352 struct mtd_oob_ops ops;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002353 int ret;
2354
Brian Norris8b6e50c2011-05-25 14:59:01 -07002355 /* Wait for the device to get ready */
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002356 panic_nand_wait(mtd, chip, 400);
2357
Brian Norris8b6e50c2011-05-25 14:59:01 -07002358 /* Grab the device */
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002359 panic_nand_get_device(chip, mtd, FL_WRITING);
2360
Brian Norris4a89ff82011-08-30 18:45:45 -07002361 ops.len = len;
2362 ops.datbuf = (uint8_t *)buf;
2363 ops.oobbuf = NULL;
Huang Shijie11041ae2012-07-03 16:44:14 +08002364 ops.mode = MTD_OPS_PLACE_OOB;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002365
Brian Norris4a89ff82011-08-30 18:45:45 -07002366 ret = nand_do_write_ops(mtd, to, &ops);
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002367
Brian Norris4a89ff82011-08-30 18:45:45 -07002368 *retlen = ops.retlen;
Simon Kagstrom2af7c652009-10-05 15:55:52 +02002369 return ret;
2370}
2371
2372/**
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002373 * nand_write - [MTD Interface] NAND write with ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07002374 * @mtd: MTD device structure
2375 * @to: offset to write to
2376 * @len: number of bytes to write
2377 * @retlen: pointer to variable to store the number of written bytes
2378 * @buf: the data to write
Linus Torvalds1da177e2005-04-16 15:20:36 -07002379 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002380 * NAND write with ECC.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002381 */
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002382static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002383 size_t *retlen, const uint8_t *buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002384{
Brian Norris4a89ff82011-08-30 18:45:45 -07002385 struct mtd_oob_ops ops;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002386 int ret;
2387
Huang Shijie6a8214a2012-11-19 14:43:30 +08002388 nand_get_device(mtd, FL_WRITING);
Brian Norris4a89ff82011-08-30 18:45:45 -07002389 ops.len = len;
2390 ops.datbuf = (uint8_t *)buf;
2391 ops.oobbuf = NULL;
Huang Shijie11041ae2012-07-03 16:44:14 +08002392 ops.mode = MTD_OPS_PLACE_OOB;
Brian Norris4a89ff82011-08-30 18:45:45 -07002393 ret = nand_do_write_ops(mtd, to, &ops);
Brian Norris4a89ff82011-08-30 18:45:45 -07002394 *retlen = ops.retlen;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002395 nand_release_device(mtd);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002396 return ret;
2397}
2398
2399/**
2400 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07002401 * @mtd: MTD device structure
2402 * @to: offset to write to
2403 * @ops: oob operation description structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002404 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002405 * NAND write out-of-band.
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002406 */
2407static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2408 struct mtd_oob_ops *ops)
2409{
Adrian Hunter03736152007-01-31 17:58:29 +02002410 int chipnr, page, status, len;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002411 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002412
Brian Norris289c0522011-07-19 10:06:09 -07002413 pr_debug("%s: to = 0x%08x, len = %i\n",
vimal singh20d8e242009-07-07 15:49:49 +05302414 __func__, (unsigned int)to, (int)ops->ooblen);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002415
Brian Norris0612b9d2011-08-30 18:45:40 -07002416 if (ops->mode == MTD_OPS_AUTO_OOB)
Adrian Hunter03736152007-01-31 17:58:29 +02002417 len = chip->ecc.layout->oobavail;
2418 else
2419 len = mtd->oobsize;
2420
Linus Torvalds1da177e2005-04-16 15:20:36 -07002421 /* Do not allow write past end of page */
Adrian Hunter03736152007-01-31 17:58:29 +02002422 if ((ops->ooboffs + ops->ooblen) > len) {
Brian Norris289c0522011-07-19 10:06:09 -07002423 pr_debug("%s: attempt to write past end of page\n",
2424 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002425 return -EINVAL;
2426 }
2427
Adrian Hunter03736152007-01-31 17:58:29 +02002428 if (unlikely(ops->ooboffs >= len)) {
Brian Norris289c0522011-07-19 10:06:09 -07002429 pr_debug("%s: attempt to start write outside oob\n",
2430 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02002431 return -EINVAL;
2432 }
2433
Jason Liu775adc32011-02-25 13:06:18 +08002434 /* Do not allow write past end of device */
Adrian Hunter03736152007-01-31 17:58:29 +02002435 if (unlikely(to >= mtd->size ||
2436 ops->ooboffs + ops->ooblen >
2437 ((mtd->size >> chip->page_shift) -
2438 (to >> chip->page_shift)) * len)) {
Brian Norris289c0522011-07-19 10:06:09 -07002439 pr_debug("%s: attempt to write beyond end of device\n",
2440 __func__);
Adrian Hunter03736152007-01-31 17:58:29 +02002441 return -EINVAL;
2442 }
2443
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002444 chipnr = (int)(to >> chip->chip_shift);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002445 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002446
Thomas Gleixner7314e9e2006-05-25 09:51:54 +02002447 /* Shift to get page */
2448 page = (int)(to >> chip->page_shift);
2449
2450 /*
2451 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
2452 * of my DiskOnChip 2000 test units) will clear the whole data page too
2453 * if we don't do this. I have no clue why, but I seem to have 'fixed'
2454 * it in the doc2000 driver in August 1999. dwmw2.
2455 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002456 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002457
2458 /* Check, if it is write protected */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002459 if (nand_check_wp(mtd)) {
2460 chip->select_chip(mtd, -1);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002461 return -EROFS;
Huang Shijieb0bb6902012-11-19 14:43:29 +08002462 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002463
Linus Torvalds1da177e2005-04-16 15:20:36 -07002464 /* Invalidate the page cache, if we write to the cached page */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002465 if (page == chip->pagebuf)
2466 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002467
THOMSON, Adam (Adam)f7220132011-06-14 16:52:38 +02002468 nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);
Brian Norris9ce244b2011-08-30 18:45:37 -07002469
Brian Norris0612b9d2011-08-30 18:45:40 -07002470 if (ops->mode == MTD_OPS_RAW)
Brian Norris9ce244b2011-08-30 18:45:37 -07002471 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);
2472 else
2473 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002474
Huang Shijieb0bb6902012-11-19 14:43:29 +08002475 chip->select_chip(mtd, -1);
2476
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002477 if (status)
2478 return status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002479
Vitaly Wool70145682006-11-03 18:20:38 +03002480 ops->oobretlen = ops->ooblen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002481
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002482 return 0;
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002483}
Linus Torvalds1da177e2005-04-16 15:20:36 -07002484
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002485/**
2486 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
Brian Norris8b6e50c2011-05-25 14:59:01 -07002487 * @mtd: MTD device structure
2488 * @to: offset to write to
2489 * @ops: oob operation description structure
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002490 */
2491static int nand_write_oob(struct mtd_info *mtd, loff_t to,
2492 struct mtd_oob_ops *ops)
2493{
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002494 int ret = -ENOTSUPP;
2495
2496 ops->retlen = 0;
2497
2498 /* Do not allow writes past end of device */
Vitaly Wool70145682006-11-03 18:20:38 +03002499 if (ops->datbuf && (to + ops->len) > mtd->size) {
Brian Norris289c0522011-07-19 10:06:09 -07002500 pr_debug("%s: attempt to write beyond end of device\n",
2501 __func__);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002502 return -EINVAL;
2503 }
2504
Huang Shijie6a8214a2012-11-19 14:43:30 +08002505 nand_get_device(mtd, FL_WRITING);
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002506
Florian Fainellif8ac0412010-09-07 13:23:43 +02002507 switch (ops->mode) {
Brian Norris0612b9d2011-08-30 18:45:40 -07002508 case MTD_OPS_PLACE_OOB:
2509 case MTD_OPS_AUTO_OOB:
2510 case MTD_OPS_RAW:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002511 break;
2512
2513 default:
2514 goto out;
2515 }
2516
2517 if (!ops->datbuf)
2518 ret = nand_do_write_oob(mtd, to, ops);
2519 else
2520 ret = nand_do_write_ops(mtd, to, ops);
2521
Florian Fainelli7351d3a2010-09-07 13:23:45 +02002522out:
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02002523 nand_release_device(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002524 return ret;
2525}
2526
Linus Torvalds1da177e2005-04-16 15:20:36 -07002527/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002528 * single_erase_cmd - [GENERIC] NAND standard block erase command function
Brian Norris8b6e50c2011-05-25 14:59:01 -07002529 * @mtd: MTD device structure
2530 * @page: the page address of the block which will be erased
Linus Torvalds1da177e2005-04-16 15:20:36 -07002531 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002532 * Standard erase command for NAND chips.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002533 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002534static void single_erase_cmd(struct mtd_info *mtd, int page)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002535{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002536 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002537 /* Send commands to erase a block */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002538 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2539 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002540}
2541
2542/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07002543 * nand_erase - [MTD Interface] erase block(s)
Brian Norris8b6e50c2011-05-25 14:59:01 -07002544 * @mtd: MTD device structure
2545 * @instr: erase instruction
Linus Torvalds1da177e2005-04-16 15:20:36 -07002546 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002547 * Erase one ore more blocks.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002548 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002549static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002550{
David Woodhousee0c7d762006-05-13 18:07:53 +01002551 return nand_erase_nand(mtd, instr, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002552}
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002553
Linus Torvalds1da177e2005-04-16 15:20:36 -07002554/**
Brian Norris7854d3f2011-06-23 14:12:08 -07002555 * nand_erase_nand - [INTERN] erase block(s)
Brian Norris8b6e50c2011-05-25 14:59:01 -07002556 * @mtd: MTD device structure
2557 * @instr: erase instruction
2558 * @allowbbt: allow erasing the bbt area
Linus Torvalds1da177e2005-04-16 15:20:36 -07002559 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002560 * Erase one ore more blocks.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002561 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002562int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2563 int allowbbt)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002564{
Adrian Hunter69423d92008-12-10 13:37:21 +00002565 int page, status, pages_per_block, ret, chipnr;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002566 struct nand_chip *chip = mtd->priv;
Adrian Hunter69423d92008-12-10 13:37:21 +00002567 loff_t len;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002568
Brian Norris289c0522011-07-19 10:06:09 -07002569 pr_debug("%s: start = 0x%012llx, len = %llu\n",
2570 __func__, (unsigned long long)instr->addr,
2571 (unsigned long long)instr->len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002572
Vimal Singh6fe5a6a2010-02-03 14:12:24 +05302573 if (check_offs_len(mtd, instr->addr, instr->len))
Linus Torvalds1da177e2005-04-16 15:20:36 -07002574 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002575
Linus Torvalds1da177e2005-04-16 15:20:36 -07002576 /* Grab the lock and see if the device is available */
Huang Shijie6a8214a2012-11-19 14:43:30 +08002577 nand_get_device(mtd, FL_ERASING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002578
2579 /* Shift to get first page */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002580 page = (int)(instr->addr >> chip->page_shift);
2581 chipnr = (int)(instr->addr >> chip->chip_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002582
2583 /* Calculate pages in each block */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002584 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002585
2586 /* Select the NAND device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002587 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002588
Linus Torvalds1da177e2005-04-16 15:20:36 -07002589 /* Check, if it is write protected */
2590 if (nand_check_wp(mtd)) {
Brian Norris289c0522011-07-19 10:06:09 -07002591 pr_debug("%s: device is write protected!\n",
2592 __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002593 instr->state = MTD_ERASE_FAILED;
2594 goto erase_exit;
2595 }
2596
2597 /* Loop through the pages */
2598 len = instr->len;
2599
2600 instr->state = MTD_ERASING;
2601
2602 while (len) {
Wolfram Sang12183a22011-12-21 23:01:20 +01002603 /* Check if we have a bad block, we do not erase bad blocks! */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002604 if (nand_block_checkbad(mtd, ((loff_t) page) <<
2605 chip->page_shift, 0, allowbbt)) {
Brian Norrisd0370212011-07-19 10:06:08 -07002606 pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
2607 __func__, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002608 instr->state = MTD_ERASE_FAILED;
2609 goto erase_exit;
2610 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002611
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002612 /*
2613 * Invalidate the page cache, if we erase the block which
Brian Norris8b6e50c2011-05-25 14:59:01 -07002614 * contains the current cached page.
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002615 */
2616 if (page <= chip->pagebuf && chip->pagebuf <
2617 (page + pages_per_block))
2618 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002619
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002620 chip->erase_cmd(mtd, page & chip->pagemask);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00002621
Thomas Gleixner7bc33122006-06-20 20:05:05 +02002622 status = chip->waitfunc(mtd, chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002623
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002624 /*
2625 * See if operation failed and additional status checks are
2626 * available
2627 */
2628 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2629 status = chip->errstat(mtd, chip, FL_ERASING,
2630 status, page);
David A. Marlin068e3c02005-01-24 03:07:46 +00002631
Linus Torvalds1da177e2005-04-16 15:20:36 -07002632 /* See if block erase succeeded */
David A. Marlina4ab4c52005-01-23 18:30:53 +00002633 if (status & NAND_STATUS_FAIL) {
Brian Norris289c0522011-07-19 10:06:09 -07002634 pr_debug("%s: failed erase, page 0x%08x\n",
2635 __func__, page);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002636 instr->state = MTD_ERASE_FAILED;
Adrian Hunter69423d92008-12-10 13:37:21 +00002637 instr->fail_addr =
2638 ((loff_t)page << chip->page_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002639 goto erase_exit;
2640 }
David A. Marlin30f464b2005-01-17 18:35:25 +00002641
Linus Torvalds1da177e2005-04-16 15:20:36 -07002642 /* Increment page address and decrement length */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002643 len -= (1 << chip->phys_erase_shift);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002644 page += pages_per_block;
2645
2646 /* Check, if we cross a chip boundary */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002647 if (len && !(page & chip->pagemask)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002648 chipnr++;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002649 chip->select_chip(mtd, -1);
2650 chip->select_chip(mtd, chipnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002651 }
2652 }
2653 instr->state = MTD_ERASE_DONE;
2654
Florian Fainelli7351d3a2010-09-07 13:23:45 +02002655erase_exit:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002656
2657 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002658
2659 /* Deselect and wake up anyone waiting on the device */
Huang Shijieb0bb6902012-11-19 14:43:29 +08002660 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002661 nand_release_device(mtd);
2662
David Woodhouse49defc02007-10-06 15:01:59 -04002663 /* Do call back function */
2664 if (!ret)
2665 mtd_erase_callback(instr);
2666
Linus Torvalds1da177e2005-04-16 15:20:36 -07002667 /* Return more or less happy */
2668 return ret;
2669}
2670
2671/**
2672 * nand_sync - [MTD Interface] sync
Brian Norris8b6e50c2011-05-25 14:59:01 -07002673 * @mtd: MTD device structure
Linus Torvalds1da177e2005-04-16 15:20:36 -07002674 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07002675 * Sync is actually a wait for chip ready function.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002676 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002677static void nand_sync(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002678{
Brian Norris289c0522011-07-19 10:06:09 -07002679 pr_debug("%s: called\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002680
2681 /* Grab the lock and see if the device is available */
Huang Shijie6a8214a2012-11-19 14:43:30 +08002682 nand_get_device(mtd, FL_SYNCING);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002683 /* Release it and go back */
David Woodhousee0c7d762006-05-13 18:07:53 +01002684 nand_release_device(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002685}
2686
Linus Torvalds1da177e2005-04-16 15:20:36 -07002687/**
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002688 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
Brian Norris8b6e50c2011-05-25 14:59:01 -07002689 * @mtd: MTD device structure
2690 * @offs: offset relative to mtd start
Linus Torvalds1da177e2005-04-16 15:20:36 -07002691 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002692static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002693{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002694 return nand_block_checkbad(mtd, offs, 1, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002695}
2696
2697/**
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002698 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
Brian Norris8b6e50c2011-05-25 14:59:01 -07002699 * @mtd: MTD device structure
2700 * @ofs: offset relative to mtd start
Linus Torvalds1da177e2005-04-16 15:20:36 -07002701 */
David Woodhousee0c7d762006-05-13 18:07:53 +01002702static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002703{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002704 int ret;
2705
Florian Fainellif8ac0412010-09-07 13:23:43 +02002706 ret = nand_block_isbad(mtd, ofs);
2707 if (ret) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07002708 /* If it was bad already, return success and do nothing */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002709 if (ret > 0)
2710 return 0;
David Woodhousee0c7d762006-05-13 18:07:53 +01002711 return ret;
2712 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002713
Brian Norris5a0edb22013-07-30 17:52:58 -07002714 return nand_block_markbad_lowlevel(mtd, ofs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002715}
2716
2717/**
Huang Shijie7db03ec2012-09-13 14:57:52 +08002718 * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand
2719 * @mtd: MTD device structure
2720 * @chip: nand chip info structure
2721 * @addr: feature address.
2722 * @subfeature_param: the subfeature parameters, a four bytes array.
2723 */
2724static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip,
2725 int addr, uint8_t *subfeature_param)
2726{
2727 int status;
2728
David Mosbergerd914c932013-05-29 15:30:13 +03002729 if (!chip->onfi_version ||
2730 !(le16_to_cpu(chip->onfi_params.opt_cmd)
2731 & ONFI_OPT_CMD_SET_GET_FEATURES))
Huang Shijie7db03ec2012-09-13 14:57:52 +08002732 return -EINVAL;
2733
2734 chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1);
2735 chip->write_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
2736 status = chip->waitfunc(mtd, chip);
2737 if (status & NAND_STATUS_FAIL)
2738 return -EIO;
2739 return 0;
2740}
2741
2742/**
2743 * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand
2744 * @mtd: MTD device structure
2745 * @chip: nand chip info structure
2746 * @addr: feature address.
2747 * @subfeature_param: the subfeature parameters, a four bytes array.
2748 */
2749static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip,
2750 int addr, uint8_t *subfeature_param)
2751{
David Mosbergerd914c932013-05-29 15:30:13 +03002752 if (!chip->onfi_version ||
2753 !(le16_to_cpu(chip->onfi_params.opt_cmd)
2754 & ONFI_OPT_CMD_SET_GET_FEATURES))
Huang Shijie7db03ec2012-09-13 14:57:52 +08002755 return -EINVAL;
2756
2757 /* clear the sub feature parameters */
2758 memset(subfeature_param, 0, ONFI_SUBFEATURE_PARAM_LEN);
2759
2760 chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1);
2761 chip->read_buf(mtd, subfeature_param, ONFI_SUBFEATURE_PARAM_LEN);
2762 return 0;
2763}
2764
2765/**
Vitaly Wool962034f2005-09-15 14:58:53 +01002766 * nand_suspend - [MTD Interface] Suspend the NAND flash
Brian Norris8b6e50c2011-05-25 14:59:01 -07002767 * @mtd: MTD device structure
Vitaly Wool962034f2005-09-15 14:58:53 +01002768 */
2769static int nand_suspend(struct mtd_info *mtd)
2770{
Huang Shijie6a8214a2012-11-19 14:43:30 +08002771 return nand_get_device(mtd, FL_PM_SUSPENDED);
Vitaly Wool962034f2005-09-15 14:58:53 +01002772}
2773
2774/**
2775 * nand_resume - [MTD Interface] Resume the NAND flash
Brian Norris8b6e50c2011-05-25 14:59:01 -07002776 * @mtd: MTD device structure
Vitaly Wool962034f2005-09-15 14:58:53 +01002777 */
2778static void nand_resume(struct mtd_info *mtd)
2779{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002780 struct nand_chip *chip = mtd->priv;
Vitaly Wool962034f2005-09-15 14:58:53 +01002781
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002782 if (chip->state == FL_PM_SUSPENDED)
Vitaly Wool962034f2005-09-15 14:58:53 +01002783 nand_release_device(mtd);
2784 else
Brian Norrisd0370212011-07-19 10:06:08 -07002785 pr_err("%s called for a chip which is not in suspended state\n",
2786 __func__);
Vitaly Wool962034f2005-09-15 14:58:53 +01002787}
2788
Brian Norris8b6e50c2011-05-25 14:59:01 -07002789/* Set default functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002790static void nand_set_defaults(struct nand_chip *chip, int busw)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002791{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002792 /* check for proper chip_delay setup, set 20us if not */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002793 if (!chip->chip_delay)
2794 chip->chip_delay = 20;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002795
2796 /* check, if a user supplied command function given */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002797 if (chip->cmdfunc == NULL)
2798 chip->cmdfunc = nand_command;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002799
2800 /* check, if a user supplied wait function given */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002801 if (chip->waitfunc == NULL)
2802 chip->waitfunc = nand_wait;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002803
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002804 if (!chip->select_chip)
2805 chip->select_chip = nand_select_chip;
Brian Norris68e80782013-07-18 01:17:02 -07002806
2807 /* If called twice, pointers that depend on busw may need to be reset */
2808 if (!chip->read_byte || chip->read_byte == nand_read_byte)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002809 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2810 if (!chip->read_word)
2811 chip->read_word = nand_read_word;
2812 if (!chip->block_bad)
2813 chip->block_bad = nand_block_bad;
2814 if (!chip->block_markbad)
2815 chip->block_markbad = nand_default_block_markbad;
Brian Norris68e80782013-07-18 01:17:02 -07002816 if (!chip->write_buf || chip->write_buf == nand_write_buf)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002817 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
Brian Norris68e80782013-07-18 01:17:02 -07002818 if (!chip->read_buf || chip->read_buf == nand_read_buf)
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002819 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02002820 if (!chip->scan_bbt)
2821 chip->scan_bbt = nand_default_bbt;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02002822
2823 if (!chip->controller) {
2824 chip->controller = &chip->hwcontrol;
2825 spin_lock_init(&chip->controller->lock);
2826 init_waitqueue_head(&chip->controller->wq);
2827 }
2828
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02002829}
2830
Brian Norris8b6e50c2011-05-25 14:59:01 -07002831/* Sanitize ONFI strings so we can safely print them */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002832static void sanitize_string(uint8_t *s, size_t len)
2833{
2834 ssize_t i;
2835
Brian Norris8b6e50c2011-05-25 14:59:01 -07002836 /* Null terminate */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002837 s[len - 1] = 0;
2838
Brian Norris8b6e50c2011-05-25 14:59:01 -07002839 /* Remove non printable chars */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002840 for (i = 0; i < len - 1; i++) {
2841 if (s[i] < ' ' || s[i] > 127)
2842 s[i] = '?';
2843 }
2844
Brian Norris8b6e50c2011-05-25 14:59:01 -07002845 /* Remove trailing spaces */
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02002846 strim(s);
2847}
2848
2849static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
2850{
2851 int i;
2852 while (len--) {
2853 crc ^= *p++ << 8;
2854 for (i = 0; i < 8; i++)
2855 crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
2856 }
2857
2858 return crc;
2859}
2860
2861/*
Brian Norris8b6e50c2011-05-25 14:59:01 -07002862 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002863 */
2864static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002865 int *busw)
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002866{
2867 struct nand_onfi_params *p = &chip->onfi_params;
2868 int i;
2869 int val;
2870
Matthieu CASTET0ce82b72013-01-16 15:25:45 +01002871 /* ONFI need to be probed in 8 bits mode, and 16 bits should be selected with NAND_BUSWIDTH_AUTO */
2872 if (chip->options & NAND_BUSWIDTH_16) {
2873 pr_err("Trying ONFI probe in 16 bits mode, aborting !\n");
2874 return 0;
2875 }
Brian Norris7854d3f2011-06-23 14:12:08 -07002876 /* Try ONFI for unknown chip or LP */
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002877 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
2878 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
2879 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')
2880 return 0;
2881
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002882 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
2883 for (i = 0; i < 3; i++) {
2884 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
2885 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
2886 le16_to_cpu(p->crc)) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07002887 pr_info("ONFI param page %d valid\n", i);
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002888 break;
2889 }
2890 }
2891
2892 if (i == 3)
2893 return 0;
2894
Brian Norris8b6e50c2011-05-25 14:59:01 -07002895 /* Check version */
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002896 val = le16_to_cpu(p->revision);
Brian Norrisb7b1a292010-12-12 00:23:33 -08002897 if (val & (1 << 5))
2898 chip->onfi_version = 23;
2899 else if (val & (1 << 4))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002900 chip->onfi_version = 22;
2901 else if (val & (1 << 3))
2902 chip->onfi_version = 21;
2903 else if (val & (1 << 2))
2904 chip->onfi_version = 20;
Brian Norrisb7b1a292010-12-12 00:23:33 -08002905 else if (val & (1 << 1))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002906 chip->onfi_version = 10;
Brian Norrisb7b1a292010-12-12 00:23:33 -08002907
2908 if (!chip->onfi_version) {
Brian Norrisd0370212011-07-19 10:06:08 -07002909 pr_info("%s: unsupported ONFI version: %d\n", __func__, val);
Brian Norrisb7b1a292010-12-12 00:23:33 -08002910 return 0;
2911 }
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002912
2913 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
2914 sanitize_string(p->model, sizeof(p->model));
2915 if (!mtd->name)
2916 mtd->name = p->model;
2917 mtd->writesize = le32_to_cpu(p->byte_per_page);
2918 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
2919 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
Matthieu CASTET63795752012-03-19 15:35:25 +01002920 chip->chipsize = le32_to_cpu(p->blocks_per_lun);
2921 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002922 *busw = 0;
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002923 if (le16_to_cpu(p->features) & 1)
Matthieu CASTET08c248f2011-06-26 18:26:55 +02002924 *busw = NAND_BUSWIDTH_16;
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002925
Huang Shijied42b5de2012-02-17 11:22:37 +08002926 pr_info("ONFI flash detected\n");
Florian Fainelli6fb277b2010-09-01 22:28:59 +02002927 return 1;
2928}
2929
2930/*
Brian Norrise3b88bd2012-09-24 20:40:52 -07002931 * nand_id_has_period - Check if an ID string has a given wraparound period
2932 * @id_data: the ID string
2933 * @arrlen: the length of the @id_data array
2934 * @period: the period of repitition
2935 *
2936 * Check if an ID string is repeated within a given sequence of bytes at
2937 * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a
Brian Norrisd4d4f1b2012-11-14 21:54:20 -08002938 * period of 3). This is a helper function for nand_id_len(). Returns non-zero
Brian Norrise3b88bd2012-09-24 20:40:52 -07002939 * if the repetition has a period of @period; otherwise, returns zero.
2940 */
2941static int nand_id_has_period(u8 *id_data, int arrlen, int period)
2942{
2943 int i, j;
2944 for (i = 0; i < period; i++)
2945 for (j = i + period; j < arrlen; j += period)
2946 if (id_data[i] != id_data[j])
2947 return 0;
2948 return 1;
2949}
2950
2951/*
2952 * nand_id_len - Get the length of an ID string returned by CMD_READID
2953 * @id_data: the ID string
2954 * @arrlen: the length of the @id_data array
2955
2956 * Returns the length of the ID string, according to known wraparound/trailing
2957 * zero patterns. If no pattern exists, returns the length of the array.
2958 */
2959static int nand_id_len(u8 *id_data, int arrlen)
2960{
2961 int last_nonzero, period;
2962
2963 /* Find last non-zero byte */
2964 for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)
2965 if (id_data[last_nonzero])
2966 break;
2967
2968 /* All zeros */
2969 if (last_nonzero < 0)
2970 return 0;
2971
2972 /* Calculate wraparound period */
2973 for (period = 1; period < arrlen; period++)
2974 if (nand_id_has_period(id_data, arrlen, period))
2975 break;
2976
2977 /* There's a repeated pattern */
2978 if (period < arrlen)
2979 return period;
2980
2981 /* There are trailing zeros */
2982 if (last_nonzero < arrlen - 1)
2983 return last_nonzero + 1;
2984
2985 /* No pattern detected */
2986 return arrlen;
2987}
2988
2989/*
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002990 * Many new NAND share similar device ID codes, which represent the size of the
2991 * chip. The rest of the parameters must be decoded according to generic or
2992 * manufacturer-specific "extended ID" decoding patterns.
2993 */
2994static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
2995 u8 id_data[8], int *busw)
2996{
Brian Norrise3b88bd2012-09-24 20:40:52 -07002997 int extid, id_len;
Brian Norrisfc09bbc2012-09-24 20:40:50 -07002998 /* The 3rd id byte holds MLC / multichip data */
2999 chip->cellinfo = id_data[2];
3000 /* The 4th id byte is the important one */
3001 extid = id_data[3];
3002
Brian Norrise3b88bd2012-09-24 20:40:52 -07003003 id_len = nand_id_len(id_data, 8);
3004
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003005 /*
3006 * Field definitions are in the following datasheets:
3007 * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
Brian Norrisaf451af2012-10-09 23:26:06 -07003008 * New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44)
Brian Norris73ca3922012-09-24 20:40:54 -07003009 * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22)
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003010 *
Brian Norrisaf451af2012-10-09 23:26:06 -07003011 * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung
3012 * ID to decide what to do.
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003013 */
Brian Norrisaf451af2012-10-09 23:26:06 -07003014 if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG &&
Brian Norris6924d992012-11-14 21:46:30 -08003015 (chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
Brian Norrisaf451af2012-10-09 23:26:06 -07003016 id_data[5] != 0x00) {
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003017 /* Calc pagesize */
3018 mtd->writesize = 2048 << (extid & 0x03);
3019 extid >>= 2;
3020 /* Calc oobsize */
Brian Norrise2d3a352012-09-24 20:40:55 -07003021 switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003022 case 1:
3023 mtd->oobsize = 128;
3024 break;
3025 case 2:
3026 mtd->oobsize = 218;
3027 break;
3028 case 3:
3029 mtd->oobsize = 400;
3030 break;
Brian Norrise2d3a352012-09-24 20:40:55 -07003031 case 4:
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003032 mtd->oobsize = 436;
3033 break;
Brian Norrise2d3a352012-09-24 20:40:55 -07003034 case 5:
3035 mtd->oobsize = 512;
3036 break;
3037 case 6:
3038 default: /* Other cases are "reserved" (unknown) */
3039 mtd->oobsize = 640;
3040 break;
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003041 }
3042 extid >>= 2;
3043 /* Calc blocksize */
3044 mtd->erasesize = (128 * 1024) <<
3045 (((extid >> 1) & 0x04) | (extid & 0x03));
3046 *busw = 0;
Brian Norris73ca3922012-09-24 20:40:54 -07003047 } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
3048 (chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
3049 unsigned int tmp;
3050
3051 /* Calc pagesize */
3052 mtd->writesize = 2048 << (extid & 0x03);
3053 extid >>= 2;
3054 /* Calc oobsize */
3055 switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
3056 case 0:
3057 mtd->oobsize = 128;
3058 break;
3059 case 1:
3060 mtd->oobsize = 224;
3061 break;
3062 case 2:
3063 mtd->oobsize = 448;
3064 break;
3065 case 3:
3066 mtd->oobsize = 64;
3067 break;
3068 case 4:
3069 mtd->oobsize = 32;
3070 break;
3071 case 5:
3072 mtd->oobsize = 16;
3073 break;
3074 default:
3075 mtd->oobsize = 640;
3076 break;
3077 }
3078 extid >>= 2;
3079 /* Calc blocksize */
3080 tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
3081 if (tmp < 0x03)
3082 mtd->erasesize = (128 * 1024) << tmp;
3083 else if (tmp == 0x03)
3084 mtd->erasesize = 768 * 1024;
3085 else
3086 mtd->erasesize = (64 * 1024) << tmp;
3087 *busw = 0;
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003088 } else {
3089 /* Calc pagesize */
3090 mtd->writesize = 1024 << (extid & 0x03);
3091 extid >>= 2;
3092 /* Calc oobsize */
3093 mtd->oobsize = (8 << (extid & 0x01)) *
3094 (mtd->writesize >> 9);
3095 extid >>= 2;
3096 /* Calc blocksize. Blocksize is multiples of 64KiB */
3097 mtd->erasesize = (64 * 1024) << (extid & 0x03);
3098 extid >>= 2;
3099 /* Get buswidth information */
3100 *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
Brian Norris60c67382013-06-25 13:17:59 -07003101
3102 /*
3103 * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
3104 * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
3105 * follows:
3106 * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
3107 * 110b -> 24nm
3108 * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC
3109 */
3110 if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA &&
3111 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3112 (id_data[5] & 0x7) == 0x6 /* 24nm */ &&
3113 !(id_data[4] & 0x80) /* !BENAND */) {
3114 mtd->oobsize = 32 * mtd->writesize >> 9;
3115 }
3116
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003117 }
3118}
3119
3120/*
Brian Norrisf23a4812012-09-24 20:40:51 -07003121 * Old devices have chip data hardcoded in the device ID table. nand_decode_id
3122 * decodes a matching ID table entry and assigns the MTD size parameters for
3123 * the chip.
3124 */
3125static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,
3126 struct nand_flash_dev *type, u8 id_data[8],
3127 int *busw)
3128{
3129 int maf_id = id_data[0];
3130
3131 mtd->erasesize = type->erasesize;
3132 mtd->writesize = type->pagesize;
3133 mtd->oobsize = mtd->writesize / 32;
3134 *busw = type->options & NAND_BUSWIDTH_16;
3135
3136 /*
3137 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
3138 * some Spansion chips have erasesize that conflicts with size
3139 * listed in nand_ids table.
3140 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
3141 */
3142 if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00
3143 && id_data[6] == 0x00 && id_data[7] == 0x00
3144 && mtd->writesize == 512) {
3145 mtd->erasesize = 128 * 1024;
3146 mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
3147 }
3148}
3149
3150/*
Brian Norris7e74c2d2012-09-24 20:40:49 -07003151 * Set the bad block marker/indicator (BBM/BBI) patterns according to some
3152 * heuristic patterns using various detected parameters (e.g., manufacturer,
3153 * page size, cell-type information).
3154 */
3155static void nand_decode_bbm_options(struct mtd_info *mtd,
3156 struct nand_chip *chip, u8 id_data[8])
3157{
3158 int maf_id = id_data[0];
3159
3160 /* Set the bad block position */
3161 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))
3162 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
3163 else
3164 chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
3165
3166 /*
3167 * Bad block marker is stored in the last page of each block on Samsung
3168 * and Hynix MLC devices; stored in first two pages of each block on
3169 * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
3170 * AMD/Spansion, and Macronix. All others scan only the first page.
3171 */
3172 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3173 (maf_id == NAND_MFR_SAMSUNG ||
3174 maf_id == NAND_MFR_HYNIX))
3175 chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
3176 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3177 (maf_id == NAND_MFR_SAMSUNG ||
3178 maf_id == NAND_MFR_HYNIX ||
3179 maf_id == NAND_MFR_TOSHIBA ||
3180 maf_id == NAND_MFR_AMD ||
3181 maf_id == NAND_MFR_MACRONIX)) ||
3182 (mtd->writesize == 2048 &&
3183 maf_id == NAND_MFR_MICRON))
3184 chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
3185}
3186
Huang Shijieec6e87e2013-03-15 11:01:00 +08003187static inline bool is_full_id_nand(struct nand_flash_dev *type)
3188{
3189 return type->id_len;
3190}
3191
3192static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,
3193 struct nand_flash_dev *type, u8 *id_data, int *busw)
3194{
3195 if (!strncmp(type->id, id_data, type->id_len)) {
3196 mtd->writesize = type->pagesize;
3197 mtd->erasesize = type->erasesize;
3198 mtd->oobsize = type->oobsize;
3199
3200 chip->cellinfo = id_data[2];
3201 chip->chipsize = (uint64_t)type->chipsize << 20;
3202 chip->options |= type->options;
3203
3204 *busw = type->options & NAND_BUSWIDTH_16;
3205
3206 return true;
3207 }
3208 return false;
3209}
3210
Brian Norris7e74c2d2012-09-24 20:40:49 -07003211/*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003212 * Get the flash and manufacturer id and lookup if the type is supported.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003213 */
3214static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003215 struct nand_chip *chip,
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003216 int busw,
3217 int *maf_id, int *dev_id,
David Woodhouse5e81e882010-02-26 18:32:56 +00003218 struct nand_flash_dev *type)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003219{
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003220 int i, maf_idx;
Kevin Cernekee426c4572010-05-04 20:58:03 -07003221 u8 id_data[8];
Linus Torvalds1da177e2005-04-16 15:20:36 -07003222
3223 /* Select the device */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003224 chip->select_chip(mtd, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003225
Karl Beldanef89a882008-09-15 14:37:29 +02003226 /*
3227 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
Brian Norris8b6e50c2011-05-25 14:59:01 -07003228 * after power-up.
Karl Beldanef89a882008-09-15 14:37:29 +02003229 */
3230 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
3231
Linus Torvalds1da177e2005-04-16 15:20:36 -07003232 /* Send the command for reading device ID */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003233 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003234
3235 /* Read manufacturer and device IDs */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003236 *maf_id = chip->read_byte(mtd);
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003237 *dev_id = chip->read_byte(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003238
Brian Norris8b6e50c2011-05-25 14:59:01 -07003239 /*
3240 * Try again to make sure, as some systems the bus-hold or other
Ben Dooksed8165c2008-04-14 14:58:58 +01003241 * interface concerns can cause random data which looks like a
3242 * possibly credible NAND flash to appear. If the two results do
3243 * not match, ignore the device completely.
3244 */
3245
3246 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
3247
Brian Norris4aef9b72012-09-24 20:40:48 -07003248 /* Read entire ID string */
3249 for (i = 0; i < 8; i++)
Kevin Cernekee426c4572010-05-04 20:58:03 -07003250 id_data[i] = chip->read_byte(mtd);
Ben Dooksed8165c2008-04-14 14:58:58 +01003251
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003252 if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003253 pr_info("%s: second ID read did not match "
Brian Norrisd0370212011-07-19 10:06:08 -07003254 "%02x,%02x against %02x,%02x\n", __func__,
3255 *maf_id, *dev_id, id_data[0], id_data[1]);
Ben Dooksed8165c2008-04-14 14:58:58 +01003256 return ERR_PTR(-ENODEV);
3257 }
3258
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003259 if (!type)
David Woodhouse5e81e882010-02-26 18:32:56 +00003260 type = nand_flash_ids;
3261
Huang Shijieec6e87e2013-03-15 11:01:00 +08003262 for (; type->name != NULL; type++) {
3263 if (is_full_id_nand(type)) {
3264 if (find_full_id_nand(mtd, chip, type, id_data, &busw))
3265 goto ident_done;
3266 } else if (*dev_id == type->dev_id) {
3267 break;
3268 }
3269 }
David Woodhouse5e81e882010-02-26 18:32:56 +00003270
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003271 chip->onfi_version = 0;
3272 if (!type->name || !type->pagesize) {
Florian Fainelli6fb277b2010-09-01 22:28:59 +02003273 /* Check is chip is ONFI compliant */
Brian Norris47450b32012-09-24 20:40:47 -07003274 if (nand_flash_detect_onfi(mtd, chip, &busw))
Florian Fainelli6fb277b2010-09-01 22:28:59 +02003275 goto ident_done;
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003276 }
3277
David Woodhouse5e81e882010-02-26 18:32:56 +00003278 if (!type->name)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003279 return ERR_PTR(-ENODEV);
3280
Thomas Gleixnerba0251f2006-05-27 01:02:13 +02003281 if (!mtd->name)
3282 mtd->name = type->name;
3283
Adrian Hunter69423d92008-12-10 13:37:21 +00003284 chip->chipsize = (uint64_t)type->chipsize << 20;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003285
Huang Shijie12a40a52010-09-27 10:43:53 +08003286 if (!type->pagesize && chip->init_size) {
Brian Norris8b6e50c2011-05-25 14:59:01 -07003287 /* Set the pagesize, oobsize, erasesize by the driver */
Huang Shijie12a40a52010-09-27 10:43:53 +08003288 busw = chip->init_size(mtd, chip, id_data);
3289 } else if (!type->pagesize) {
Brian Norrisfc09bbc2012-09-24 20:40:50 -07003290 /* Decode parameters from extended ID */
3291 nand_decode_ext_id(mtd, chip, id_data, &busw);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003292 } else {
Brian Norrisf23a4812012-09-24 20:40:51 -07003293 nand_decode_id(mtd, chip, type, id_data, &busw);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003294 }
Brian Norrisbf7a01b2012-07-13 09:28:24 -07003295 /* Get chip options */
3296 chip->options |= type->options;
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003297
Brian Norris8b6e50c2011-05-25 14:59:01 -07003298 /*
3299 * Check if chip is not a Samsung device. Do not clear the
3300 * options for chips which do not have an extended id.
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003301 */
3302 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
3303 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
3304ident_done:
3305
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003306 /* Try to identify manufacturer */
David Woodhouse9a909862006-07-15 13:26:18 +01003307 for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003308 if (nand_manuf_ids[maf_idx].id == *maf_id)
3309 break;
3310 }
3311
Matthieu CASTET64b37b22012-11-06 11:51:44 +01003312 if (chip->options & NAND_BUSWIDTH_AUTO) {
3313 WARN_ON(chip->options & NAND_BUSWIDTH_16);
3314 chip->options |= busw;
3315 nand_set_defaults(chip, busw);
3316 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) {
3317 /*
3318 * Check, if buswidth is correct. Hardware drivers should set
3319 * chip correct!
3320 */
Brian Norris9a4d4d62011-07-19 10:06:07 -07003321 pr_info("NAND device: Manufacturer ID:"
Brian Norrisd0370212011-07-19 10:06:08 -07003322 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
3323 *dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
Brian Norris9a4d4d62011-07-19 10:06:07 -07003324 pr_warn("NAND bus width %d instead %d bit\n",
Brian Norrisd0370212011-07-19 10:06:08 -07003325 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
3326 busw ? 16 : 8);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003327 return ERR_PTR(-EINVAL);
3328 }
3329
Brian Norris7e74c2d2012-09-24 20:40:49 -07003330 nand_decode_bbm_options(mtd, chip, id_data);
3331
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003332 /* Calculate the address shift from the page size */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003333 chip->page_shift = ffs(mtd->writesize) - 1;
Brian Norris8b6e50c2011-05-25 14:59:01 -07003334 /* Convert chipsize to number of pages per chip -1 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003335 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003336
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003337 chip->bbt_erase_shift = chip->phys_erase_shift =
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003338 ffs(mtd->erasesize) - 1;
Adrian Hunter69423d92008-12-10 13:37:21 +00003339 if (chip->chipsize & 0xffffffff)
3340 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003341 else {
3342 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
3343 chip->chip_shift += 32 - 1;
3344 }
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003345
Artem Bityutskiy26d9be12011-04-28 20:26:59 +03003346 chip->badblockbits = 8;
Artem Bityutskiy14c65782013-03-04 14:21:34 +02003347 chip->erase_cmd = single_erase_cmd;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003348
Brian Norris8b6e50c2011-05-25 14:59:01 -07003349 /* Do not replace user supplied command function! */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003350 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
3351 chip->cmdfunc = nand_command_lp;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003352
Huang Shijie886bd332012-04-09 11:41:37 +08003353 pr_info("NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s),"
Matthieu CASTET2fd71a22012-11-22 18:33:40 +01003354 " %dMiB, page size: %d, OOB size: %d\n",
Huang Shijie886bd332012-04-09 11:41:37 +08003355 *maf_id, *dev_id, nand_manuf_ids[maf_idx].name,
3356 chip->onfi_version ? chip->onfi_params.model : type->name,
Matthieu CASTET2fd71a22012-11-22 18:33:40 +01003357 (int)(chip->chipsize >> 20), mtd->writesize, mtd->oobsize);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003358
3359 return type;
3360}
3361
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003362/**
David Woodhouse3b85c322006-09-25 17:06:53 +01003363 * nand_scan_ident - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003364 * @mtd: MTD device structure
3365 * @maxchips: number of chips to scan for
3366 * @table: alternative NAND ID table
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003367 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003368 * This is the first phase of the normal nand_scan() function. It reads the
3369 * flash ID and sets up MTD fields accordingly.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003370 *
David Woodhouse3b85c322006-09-25 17:06:53 +01003371 * The mtd->owner field must be set to the module of the caller.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003372 */
David Woodhouse5e81e882010-02-26 18:32:56 +00003373int nand_scan_ident(struct mtd_info *mtd, int maxchips,
3374 struct nand_flash_dev *table)
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003375{
Florian Fainellid1e1f4e2010-08-30 18:32:24 +02003376 int i, busw, nand_maf_id, nand_dev_id;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003377 struct nand_chip *chip = mtd->priv;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003378 struct nand_flash_dev *type;
3379
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003380 /* Get buswidth to select the correct functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003381 busw = chip->options & NAND_BUSWIDTH_16;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003382 /* Set the default functions */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003383 nand_set_defaults(chip, busw);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003384
3385 /* Read the flash type */
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003386 type = nand_get_flash_type(mtd, chip, busw,
3387 &nand_maf_id, &nand_dev_id, table);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003388
3389 if (IS_ERR(type)) {
Ben Dooksb1c6e6d2009-11-02 18:12:33 +00003390 if (!(chip->options & NAND_SCAN_SILENT_NODEV))
Brian Norrisd0370212011-07-19 10:06:08 -07003391 pr_warn("No NAND device found\n");
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003392 chip->select_chip(mtd, -1);
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003393 return PTR_ERR(type);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003394 }
3395
Huang Shijie07300162012-11-09 16:23:45 +08003396 chip->select_chip(mtd, -1);
3397
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003398 /* Check for a chip array */
David Woodhousee0c7d762006-05-13 18:07:53 +01003399 for (i = 1; i < maxchips; i++) {
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003400 chip->select_chip(mtd, i);
Karl Beldanef89a882008-09-15 14:37:29 +02003401 /* See comment in nand_get_flash_type for reset */
3402 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003403 /* Send the command for reading device ID */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003404 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003405 /* Read manufacturer and device IDs */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003406 if (nand_maf_id != chip->read_byte(mtd) ||
Huang Shijie07300162012-11-09 16:23:45 +08003407 nand_dev_id != chip->read_byte(mtd)) {
3408 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003409 break;
Huang Shijie07300162012-11-09 16:23:45 +08003410 }
3411 chip->select_chip(mtd, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003412 }
3413 if (i > 1)
Brian Norris9a4d4d62011-07-19 10:06:07 -07003414 pr_info("%d NAND chips detected\n", i);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003415
Linus Torvalds1da177e2005-04-16 15:20:36 -07003416 /* Store the number of chips and calc total size for mtd */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003417 chip->numchips = i;
3418 mtd->size = i * chip->chipsize;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003419
David Woodhouse3b85c322006-09-25 17:06:53 +01003420 return 0;
3421}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003422EXPORT_SYMBOL(nand_scan_ident);
David Woodhouse3b85c322006-09-25 17:06:53 +01003423
3424
3425/**
3426 * nand_scan_tail - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003427 * @mtd: MTD device structure
David Woodhouse3b85c322006-09-25 17:06:53 +01003428 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003429 * This is the second phase of the normal nand_scan() function. It fills out
3430 * all the uninitialized function pointers with the defaults and scans for a
3431 * bad block table if appropriate.
David Woodhouse3b85c322006-09-25 17:06:53 +01003432 */
3433int nand_scan_tail(struct mtd_info *mtd)
3434{
3435 int i;
3436 struct nand_chip *chip = mtd->priv;
3437
Brian Norrise2414f42012-02-06 13:44:00 -08003438 /* New bad blocks should be marked in OOB, flash-based BBT, or both */
3439 BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
3440 !(chip->bbt_options & NAND_BBT_USE_FLASH));
3441
David Woodhouse4bf63fc2006-09-25 17:08:04 +01003442 if (!(chip->options & NAND_OWN_BUFFERS))
3443 chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
3444 if (!chip->buffers)
3445 return -ENOMEM;
3446
David Woodhouse7dcdcbef2006-10-21 17:09:53 +01003447 /* Set the internal oob buffer location, just after the page data */
David Woodhouse784f4d52006-10-22 01:47:45 +01003448 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003449
3450 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003451 * If no default placement scheme is given, select an appropriate one.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003452 */
Ivan Djelic193bd402011-03-11 11:05:33 +01003453 if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003454 switch (mtd->oobsize) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003455 case 8:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003456 chip->ecc.layout = &nand_oob_8;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003457 break;
3458 case 16:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003459 chip->ecc.layout = &nand_oob_16;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003460 break;
3461 case 64:
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003462 chip->ecc.layout = &nand_oob_64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003463 break;
Thomas Gleixner81ec5362007-12-12 17:27:03 +01003464 case 128:
3465 chip->ecc.layout = &nand_oob_128;
3466 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003467 default:
Brian Norrisd0370212011-07-19 10:06:08 -07003468 pr_warn("No oob scheme defined for oobsize %d\n",
3469 mtd->oobsize);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003470 BUG();
3471 }
3472 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003473
David Woodhouse956e9442006-09-25 17:12:39 +01003474 if (!chip->write_page)
3475 chip->write_page = nand_write_page;
3476
Huang Shijie7db03ec2012-09-13 14:57:52 +08003477 /* set for ONFI nand */
3478 if (!chip->onfi_set_features)
3479 chip->onfi_set_features = nand_onfi_set_features;
3480 if (!chip->onfi_get_features)
3481 chip->onfi_get_features = nand_onfi_get_features;
3482
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003483 /*
Brian Norris8b6e50c2011-05-25 14:59:01 -07003484 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003485 * selected and we have 256 byte pagesize fallback to software ECC
David Woodhousee0c7d762006-05-13 18:07:53 +01003486 */
David Woodhouse956e9442006-09-25 17:12:39 +01003487
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003488 switch (chip->ecc.mode) {
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07003489 case NAND_ECC_HW_OOB_FIRST:
3490 /* Similar to NAND_ECC_HW, but a separate read_page handle */
3491 if (!chip->ecc.calculate || !chip->ecc.correct ||
3492 !chip->ecc.hwctl) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003493 pr_warn("No ECC functions supplied; "
Brian Norrisd0370212011-07-19 10:06:08 -07003494 "hardware ECC not possible\n");
Sneha Narnakaje6e0cb132009-09-18 12:51:47 -07003495 BUG();
3496 }
3497 if (!chip->ecc.read_page)
3498 chip->ecc.read_page = nand_read_page_hwecc_oob_first;
3499
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003500 case NAND_ECC_HW:
Brian Norris8b6e50c2011-05-25 14:59:01 -07003501 /* Use standard hwecc read page function? */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003502 if (!chip->ecc.read_page)
3503 chip->ecc.read_page = nand_read_page_hwecc;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003504 if (!chip->ecc.write_page)
3505 chip->ecc.write_page = nand_write_page_hwecc;
David Brownell52ff49d2009-03-04 12:01:36 -08003506 if (!chip->ecc.read_page_raw)
3507 chip->ecc.read_page_raw = nand_read_page_raw;
3508 if (!chip->ecc.write_page_raw)
3509 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003510 if (!chip->ecc.read_oob)
3511 chip->ecc.read_oob = nand_read_oob_std;
3512 if (!chip->ecc.write_oob)
3513 chip->ecc.write_oob = nand_write_oob_std;
Gupta, Pekon837a6ba2013-03-15 17:55:53 +05303514 if (!chip->ecc.read_subpage)
3515 chip->ecc.read_subpage = nand_read_subpage;
3516 if (!chip->ecc.write_subpage)
3517 chip->ecc.write_subpage = nand_write_subpage_hwecc;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003518
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003519 case NAND_ECC_HW_SYNDROME:
Scott Wood78b65172007-12-13 11:15:28 -06003520 if ((!chip->ecc.calculate || !chip->ecc.correct ||
3521 !chip->ecc.hwctl) &&
3522 (!chip->ecc.read_page ||
Scott Wood1c45f602008-01-16 10:36:03 -06003523 chip->ecc.read_page == nand_read_page_hwecc ||
Scott Wood78b65172007-12-13 11:15:28 -06003524 !chip->ecc.write_page ||
Scott Wood1c45f602008-01-16 10:36:03 -06003525 chip->ecc.write_page == nand_write_page_hwecc)) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003526 pr_warn("No ECC functions supplied; "
Brian Norrisd0370212011-07-19 10:06:08 -07003527 "hardware ECC not possible\n");
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003528 BUG();
3529 }
Brian Norris8b6e50c2011-05-25 14:59:01 -07003530 /* Use standard syndrome read/write page function? */
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003531 if (!chip->ecc.read_page)
3532 chip->ecc.read_page = nand_read_page_syndrome;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003533 if (!chip->ecc.write_page)
3534 chip->ecc.write_page = nand_write_page_syndrome;
David Brownell52ff49d2009-03-04 12:01:36 -08003535 if (!chip->ecc.read_page_raw)
3536 chip->ecc.read_page_raw = nand_read_page_raw_syndrome;
3537 if (!chip->ecc.write_page_raw)
3538 chip->ecc.write_page_raw = nand_write_page_raw_syndrome;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003539 if (!chip->ecc.read_oob)
3540 chip->ecc.read_oob = nand_read_oob_syndrome;
3541 if (!chip->ecc.write_oob)
3542 chip->ecc.write_oob = nand_write_oob_syndrome;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003543
Mike Dunne2788c92012-04-25 12:06:10 -07003544 if (mtd->writesize >= chip->ecc.size) {
3545 if (!chip->ecc.strength) {
3546 pr_warn("Driver must set ecc.strength when using hardware ECC\n");
3547 BUG();
3548 }
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003549 break;
Mike Dunne2788c92012-04-25 12:06:10 -07003550 }
Brian Norris9a4d4d62011-07-19 10:06:07 -07003551 pr_warn("%d byte HW ECC not possible on "
Brian Norrisd0370212011-07-19 10:06:08 -07003552 "%d byte page size, fallback to SW ECC\n",
3553 chip->ecc.size, mtd->writesize);
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003554 chip->ecc.mode = NAND_ECC_SOFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003555
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003556 case NAND_ECC_SOFT:
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003557 chip->ecc.calculate = nand_calculate_ecc;
3558 chip->ecc.correct = nand_correct_data;
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003559 chip->ecc.read_page = nand_read_page_swecc;
Alexey Korolev3d459552008-05-15 17:23:18 +01003560 chip->ecc.read_subpage = nand_read_subpage;
Thomas Gleixnerf75e5092006-05-26 18:52:08 +02003561 chip->ecc.write_page = nand_write_page_swecc;
David Brownell52ff49d2009-03-04 12:01:36 -08003562 chip->ecc.read_page_raw = nand_read_page_raw;
3563 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003564 chip->ecc.read_oob = nand_read_oob_std;
3565 chip->ecc.write_oob = nand_write_oob_std;
Singh, Vimal9a732902008-12-12 00:10:57 +00003566 if (!chip->ecc.size)
3567 chip->ecc.size = 256;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003568 chip->ecc.bytes = 3;
Mike Dunn6a918ba2012-03-11 14:21:11 -07003569 chip->ecc.strength = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003570 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003571
Ivan Djelic193bd402011-03-11 11:05:33 +01003572 case NAND_ECC_SOFT_BCH:
3573 if (!mtd_nand_has_bch()) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003574 pr_warn("CONFIG_MTD_ECC_BCH not enabled\n");
Ivan Djelic193bd402011-03-11 11:05:33 +01003575 BUG();
3576 }
3577 chip->ecc.calculate = nand_bch_calculate_ecc;
3578 chip->ecc.correct = nand_bch_correct_data;
3579 chip->ecc.read_page = nand_read_page_swecc;
3580 chip->ecc.read_subpage = nand_read_subpage;
3581 chip->ecc.write_page = nand_write_page_swecc;
3582 chip->ecc.read_page_raw = nand_read_page_raw;
3583 chip->ecc.write_page_raw = nand_write_page_raw;
3584 chip->ecc.read_oob = nand_read_oob_std;
3585 chip->ecc.write_oob = nand_write_oob_std;
3586 /*
3587 * Board driver should supply ecc.size and ecc.bytes values to
3588 * select how many bits are correctable; see nand_bch_init()
Brian Norris8b6e50c2011-05-25 14:59:01 -07003589 * for details. Otherwise, default to 4 bits for large page
3590 * devices.
Ivan Djelic193bd402011-03-11 11:05:33 +01003591 */
3592 if (!chip->ecc.size && (mtd->oobsize >= 64)) {
3593 chip->ecc.size = 512;
3594 chip->ecc.bytes = 7;
3595 }
3596 chip->ecc.priv = nand_bch_init(mtd,
3597 chip->ecc.size,
3598 chip->ecc.bytes,
3599 &chip->ecc.layout);
3600 if (!chip->ecc.priv) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003601 pr_warn("BCH ECC initialization failed!\n");
Ivan Djelic193bd402011-03-11 11:05:33 +01003602 BUG();
3603 }
Mike Dunn6a918ba2012-03-11 14:21:11 -07003604 chip->ecc.strength =
Mike Dunne2788c92012-04-25 12:06:10 -07003605 chip->ecc.bytes * 8 / fls(8 * chip->ecc.size);
Ivan Djelic193bd402011-03-11 11:05:33 +01003606 break;
3607
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003608 case NAND_ECC_NONE:
Brian Norris9a4d4d62011-07-19 10:06:07 -07003609 pr_warn("NAND_ECC_NONE selected by board driver. "
Brian Norrisd0370212011-07-19 10:06:08 -07003610 "This is not recommended!\n");
Thomas Gleixner8593fbc2006-05-29 03:26:58 +02003611 chip->ecc.read_page = nand_read_page_raw;
3612 chip->ecc.write_page = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003613 chip->ecc.read_oob = nand_read_oob_std;
David Brownell52ff49d2009-03-04 12:01:36 -08003614 chip->ecc.read_page_raw = nand_read_page_raw;
3615 chip->ecc.write_page_raw = nand_write_page_raw;
Thomas Gleixner7bc33122006-06-20 20:05:05 +02003616 chip->ecc.write_oob = nand_write_oob_std;
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003617 chip->ecc.size = mtd->writesize;
3618 chip->ecc.bytes = 0;
Mike Dunn6a918ba2012-03-11 14:21:11 -07003619 chip->ecc.strength = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003620 break;
David Woodhouse956e9442006-09-25 17:12:39 +01003621
Linus Torvalds1da177e2005-04-16 15:20:36 -07003622 default:
Brian Norrisd0370212011-07-19 10:06:08 -07003623 pr_warn("Invalid NAND_ECC_MODE %d\n", chip->ecc.mode);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003624 BUG();
3625 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003626
Brian Norris9ce244b2011-08-30 18:45:37 -07003627 /* For many systems, the standard OOB write also works for raw */
Brian Norrisc46f6482011-08-30 18:45:38 -07003628 if (!chip->ecc.read_oob_raw)
3629 chip->ecc.read_oob_raw = chip->ecc.read_oob;
Brian Norris9ce244b2011-08-30 18:45:37 -07003630 if (!chip->ecc.write_oob_raw)
3631 chip->ecc.write_oob_raw = chip->ecc.write_oob;
3632
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003633 /*
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003634 * The number of bytes available for a client to place data into
Brian Norris8b6e50c2011-05-25 14:59:01 -07003635 * the out of band area.
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003636 */
3637 chip->ecc.layout->oobavail = 0;
David Brownell81d19b02009-04-21 19:51:20 -07003638 for (i = 0; chip->ecc.layout->oobfree[i].length
3639 && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++)
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003640 chip->ecc.layout->oobavail +=
3641 chip->ecc.layout->oobfree[i].length;
Vitaly Wool1f922672007-03-06 16:56:34 +03003642 mtd->oobavail = chip->ecc.layout->oobavail;
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003643
3644 /*
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003645 * Set the number of read / write steps for one page depending on ECC
Brian Norris8b6e50c2011-05-25 14:59:01 -07003646 * mode.
Thomas Gleixner7aa65bf2006-05-23 11:54:38 +02003647 */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003648 chip->ecc.steps = mtd->writesize / chip->ecc.size;
Florian Fainellif8ac0412010-09-07 13:23:43 +02003649 if (chip->ecc.steps * chip->ecc.size != mtd->writesize) {
Brian Norris9a4d4d62011-07-19 10:06:07 -07003650 pr_warn("Invalid ECC parameters\n");
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +02003651 BUG();
Linus Torvalds1da177e2005-04-16 15:20:36 -07003652 }
Thomas Gleixnerf5bbdac2006-05-25 10:07:16 +02003653 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003654
Brian Norris8b6e50c2011-05-25 14:59:01 -07003655 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
Thomas Gleixner29072b92006-09-28 15:38:36 +02003656 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
3657 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
Florian Fainellif8ac0412010-09-07 13:23:43 +02003658 switch (chip->ecc.steps) {
Thomas Gleixner29072b92006-09-28 15:38:36 +02003659 case 2:
3660 mtd->subpage_sft = 1;
3661 break;
3662 case 4:
3663 case 8:
Thomas Gleixner81ec5362007-12-12 17:27:03 +01003664 case 16:
Thomas Gleixner29072b92006-09-28 15:38:36 +02003665 mtd->subpage_sft = 2;
3666 break;
3667 }
3668 }
3669 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
3670
Thomas Gleixner04bbd0e2006-05-25 09:45:29 +02003671 /* Initialize state */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003672 chip->state = FL_READY;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003673
Linus Torvalds1da177e2005-04-16 15:20:36 -07003674 /* Invalidate the pagebuffer reference */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003675 chip->pagebuf = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003676
Jeff Westfahla5ff4f12012-08-13 16:35:30 -05003677 /* Large page NAND with SOFT_ECC should support subpage reads */
3678 if ((chip->ecc.mode == NAND_ECC_SOFT) && (chip->page_shift > 9))
3679 chip->options |= NAND_SUBPAGE_READ;
3680
Linus Torvalds1da177e2005-04-16 15:20:36 -07003681 /* Fill in remaining MTD driver data */
3682 mtd->type = MTD_NANDFLASH;
Maxim Levitsky93edbad2010-02-22 20:39:40 +02003683 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
3684 MTD_CAP_NANDFLASH;
Artem Bityutskiy3c3c10b2012-01-30 14:58:32 +02003685 mtd->_erase = nand_erase;
3686 mtd->_point = NULL;
3687 mtd->_unpoint = NULL;
3688 mtd->_read = nand_read;
3689 mtd->_write = nand_write;
3690 mtd->_panic_write = panic_nand_write;
3691 mtd->_read_oob = nand_read_oob;
3692 mtd->_write_oob = nand_write_oob;
3693 mtd->_sync = nand_sync;
3694 mtd->_lock = NULL;
3695 mtd->_unlock = NULL;
3696 mtd->_suspend = nand_suspend;
3697 mtd->_resume = nand_resume;
3698 mtd->_block_isbad = nand_block_isbad;
3699 mtd->_block_markbad = nand_block_markbad;
Anatolij Gustschincbcab652010-12-16 23:42:16 +01003700 mtd->writebufsize = mtd->writesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003701
Mike Dunn6a918ba2012-03-11 14:21:11 -07003702 /* propagate ecc info to mtd_info */
Thomas Gleixner5bd34c02006-05-27 22:16:10 +02003703 mtd->ecclayout = chip->ecc.layout;
Mike Dunn86c20722012-04-25 12:06:05 -07003704 mtd->ecc_strength = chip->ecc.strength;
Shmulik Ladkaniea3b2ea2012-06-08 18:29:06 +03003705 /*
3706 * Initialize bitflip_threshold to its default prior scan_bbt() call.
3707 * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be
3708 * properly set.
3709 */
3710 if (!mtd->bitflip_threshold)
3711 mtd->bitflip_threshold = mtd->ecc_strength;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003712
Thomas Gleixner0040bf32005-02-09 12:20:00 +00003713 /* Check, if we should skip the bad block table scan */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003714 if (chip->options & NAND_SKIP_BBTSCAN)
Thomas Gleixner0040bf32005-02-09 12:20:00 +00003715 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003716
3717 /* Build bad block table */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003718 return chip->scan_bbt(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003719}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003720EXPORT_SYMBOL(nand_scan_tail);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003721
Brian Norris8b6e50c2011-05-25 14:59:01 -07003722/*
3723 * is_module_text_address() isn't exported, and it's mostly a pointless
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003724 * test if this is a module _anyway_ -- they'd have to try _really_ hard
Brian Norris8b6e50c2011-05-25 14:59:01 -07003725 * to call us from in-kernel code if the core NAND support is modular.
3726 */
David Woodhouse3b85c322006-09-25 17:06:53 +01003727#ifdef MODULE
3728#define caller_is_module() (1)
3729#else
3730#define caller_is_module() \
Rusty Russella6e6abd2009-03-31 13:05:31 -06003731 is_module_text_address((unsigned long)__builtin_return_address(0))
David Woodhouse3b85c322006-09-25 17:06:53 +01003732#endif
3733
3734/**
3735 * nand_scan - [NAND Interface] Scan for the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003736 * @mtd: MTD device structure
3737 * @maxchips: number of chips to scan for
David Woodhouse3b85c322006-09-25 17:06:53 +01003738 *
Brian Norris8b6e50c2011-05-25 14:59:01 -07003739 * This fills out all the uninitialized function pointers with the defaults.
3740 * The flash ID is read and the mtd/chip structures are filled with the
3741 * appropriate values. The mtd->owner field must be set to the module of the
3742 * caller.
David Woodhouse3b85c322006-09-25 17:06:53 +01003743 */
3744int nand_scan(struct mtd_info *mtd, int maxchips)
3745{
3746 int ret;
3747
3748 /* Many callers got this wrong, so check for it for a while... */
3749 if (!mtd->owner && caller_is_module()) {
Brian Norrisd0370212011-07-19 10:06:08 -07003750 pr_crit("%s called with NULL mtd->owner!\n", __func__);
David Woodhouse3b85c322006-09-25 17:06:53 +01003751 BUG();
3752 }
3753
David Woodhouse5e81e882010-02-26 18:32:56 +00003754 ret = nand_scan_ident(mtd, maxchips, NULL);
David Woodhouse3b85c322006-09-25 17:06:53 +01003755 if (!ret)
3756 ret = nand_scan_tail(mtd);
3757 return ret;
3758}
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003759EXPORT_SYMBOL(nand_scan);
David Woodhouse3b85c322006-09-25 17:06:53 +01003760
Linus Torvalds1da177e2005-04-16 15:20:36 -07003761/**
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00003762 * nand_release - [NAND Interface] Free resources held by the NAND device
Brian Norris8b6e50c2011-05-25 14:59:01 -07003763 * @mtd: MTD device structure
3764 */
David Woodhousee0c7d762006-05-13 18:07:53 +01003765void nand_release(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003766{
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003767 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003768
Ivan Djelic193bd402011-03-11 11:05:33 +01003769 if (chip->ecc.mode == NAND_ECC_SOFT_BCH)
3770 nand_bch_free((struct nand_bch_control *)chip->ecc.priv);
3771
Jamie Iles5ffcaf32011-05-23 10:22:46 +01003772 mtd_device_unregister(mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003773
Jesper Juhlfa671642005-11-07 01:01:27 -08003774 /* Free bad block table memory */
Thomas Gleixnerace4dfe2006-05-24 12:07:37 +02003775 kfree(chip->bbt);
David Woodhouse4bf63fc2006-09-25 17:08:04 +01003776 if (!(chip->options & NAND_OWN_BUFFERS))
3777 kfree(chip->buffers);
Brian Norris58373ff2010-07-15 12:15:44 -07003778
3779 /* Free bad block descriptor memory */
3780 if (chip->badblock_pattern && chip->badblock_pattern->options
3781 & NAND_BBT_DYNAMICSTRUCT)
3782 kfree(chip->badblock_pattern);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003783}
David Woodhousee0c7d762006-05-13 18:07:53 +01003784EXPORT_SYMBOL_GPL(nand_release);
Richard Purdie8fe833c2006-03-31 02:31:14 -08003785
3786static int __init nand_base_init(void)
3787{
3788 led_trigger_register_simple("nand-disk", &nand_led_trigger);
3789 return 0;
3790}
3791
3792static void __exit nand_base_exit(void)
3793{
3794 led_trigger_unregister_simple(nand_led_trigger);
3795}
3796
3797module_init(nand_base_init);
3798module_exit(nand_base_exit);
3799
David Woodhousee0c7d762006-05-13 18:07:53 +01003800MODULE_LICENSE("GPL");
Florian Fainelli7351d3a2010-09-07 13:23:45 +02003801MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>");
3802MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
David Woodhousee0c7d762006-05-13 18:07:53 +01003803MODULE_DESCRIPTION("Generic NAND flash driver code");