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Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/drm_crtc.h>
34#include <drm/drm_edid.h>
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010043#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080044
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040046 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080047
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000049#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080050#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010051#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010052#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080053
Jesse Barnes79e53942008-11-07 14:24:08 -080054
Chris Wilson2e88e402010-08-07 11:01:27 +010055static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080056 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63};
64
65#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
Chris Wilsonea5b2132010-08-04 13:50:23 +010067struct intel_sdvo {
68 struct intel_encoder base;
69
Chris Wilsonf899fc62010-07-20 15:44:45 -070070 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070071 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080072
Chris Wilsone957d772010-09-24 12:52:03 +010073 struct i2c_adapter ddc;
74
Jesse Barnese2f0ba92009-02-02 15:11:52 -080075 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010076 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080077
Jesse Barnese2f0ba92009-02-02 15:11:52 -080078 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080080
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
Jesse Barnes79e53942008-11-07 14:24:08 -080085 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080086
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080088 int pixel_clock_min, pixel_clock_max;
89
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080090 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
Simon Farnsworthcc68c812011-09-21 17:13:30 +010096 /*
97 * Hotplug activation bits for this device
98 */
Jani Nikula5fa7ac92012-08-29 16:43:58 +030099 uint16_t hotplug_active;
Simon Farnsworthcc68c812011-09-21 17:13:30 +0100100
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800101 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
106
107 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800108 * This is set if we're going to treat the device as TV-out.
109 *
110 * While we have these nice friendly flags for output types that ought
111 * to decide this for us, the S-Video output on our HDMI+S-Video card
112 * shows up as RGB1 (VGA).
113 */
114 bool is_tv;
115
Daniel Vettereef4eac2012-03-23 23:43:35 +0100116 /* On different gens SDVOB is at different places. */
117 bool is_sdvob;
118
Zhao Yakuice6feab2009-08-24 13:50:26 +0800119 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100120 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800121
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800122 /**
123 * This is set if we treat the device as HDMI, instead of DVI.
124 */
125 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000126 bool has_hdmi_monitor;
127 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800128
Ma Ling7086c872009-05-13 11:20:06 +0800129 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100130 * This is set if we detect output of sdvo device as LVDS and
131 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800132 */
133 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800134
135 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800136 * This is sdvo fixed pannel mode pointer
137 */
138 struct drm_display_mode *sdvo_lvds_fixed_mode;
139
Eric Anholtc751ce42010-03-25 11:48:48 -0700140 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800141 uint8_t ddc_bus;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800142};
143
144struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100145 struct intel_connector base;
146
Zhenyu Wang14571b42010-03-30 14:06:33 +0800147 /* Mark the type of connector */
148 uint16_t output_flag;
149
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100150 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100151
Zhenyu Wang14571b42010-03-30 14:06:33 +0800152 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100153 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800154 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100155 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800156
Zhao Yakuib9219c52009-09-10 15:45:46 +0800157 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100158 struct drm_property *left;
159 struct drm_property *right;
160 struct drm_property *top;
161 struct drm_property *bottom;
162 struct drm_property *hpos;
163 struct drm_property *vpos;
164 struct drm_property *contrast;
165 struct drm_property *saturation;
166 struct drm_property *hue;
167 struct drm_property *sharpness;
168 struct drm_property *flicker_filter;
169 struct drm_property *flicker_filter_adaptive;
170 struct drm_property *flicker_filter_2d;
171 struct drm_property *tv_chroma_filter;
172 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100173 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800174
175 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100176 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800177
178 /* Add variable to record current setting for the above property */
179 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100180
Zhao Yakuib9219c52009-09-10 15:45:46 +0800181 /* this is to get the range of margin.*/
182 u32 max_hscan, max_vscan;
183 u32 max_hpos, cur_hpos;
184 u32 max_vpos, cur_vpos;
185 u32 cur_brightness, max_brightness;
186 u32 cur_contrast, max_contrast;
187 u32 cur_saturation, max_saturation;
188 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100189 u32 cur_sharpness, max_sharpness;
190 u32 cur_flicker_filter, max_flicker_filter;
191 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
192 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
193 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
194 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100195 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800196};
197
Chris Wilson890f3352010-09-14 16:46:59 +0100198static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100199{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100200 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100201}
202
Chris Wilsondf0e9242010-09-09 16:20:55 +0100203static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
204{
205 return container_of(intel_attached_encoder(connector),
206 struct intel_sdvo, base);
207}
208
Chris Wilson615fb932010-08-04 13:50:24 +0100209static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
210{
211 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
212}
213
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800214static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100215intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100216static bool
217intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
218 struct intel_sdvo_connector *intel_sdvo_connector,
219 int type);
220static bool
221intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800223
Jesse Barnes79e53942008-11-07 14:24:08 -0800224/**
225 * Writes the SDVOB or SDVOC with the given value, but always writes both
226 * SDVOB and SDVOC to work around apparent hardware issues (according to
227 * comments in the BIOS).
228 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100229static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800230{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100231 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800232 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800233 u32 bval = val, cval = val;
234 int i;
235
Chris Wilsonea5b2132010-08-04 13:50:23 +0100236 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
237 I915_WRITE(intel_sdvo->sdvo_reg, val);
238 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800239 return;
240 }
241
Chris Wilsonea5b2132010-08-04 13:50:23 +0100242 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800243 cval = I915_READ(SDVOC);
244 } else {
245 bval = I915_READ(SDVOB);
246 }
247 /*
248 * Write the registers twice for luck. Sometimes,
249 * writing them only once doesn't appear to 'stick'.
250 * The BIOS does this too. Yay, magic
251 */
252 for (i = 0; i < 2; i++)
253 {
254 I915_WRITE(SDVOB, bval);
255 I915_READ(SDVOB);
256 I915_WRITE(SDVOC, cval);
257 I915_READ(SDVOC);
258 }
259}
260
Chris Wilson32aad862010-08-04 13:50:25 +0100261static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800262{
Jesse Barnes79e53942008-11-07 14:24:08 -0800263 struct i2c_msg msgs[] = {
264 {
Chris Wilsone957d772010-09-24 12:52:03 +0100265 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800266 .flags = 0,
267 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100268 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800269 },
270 {
Chris Wilsone957d772010-09-24 12:52:03 +0100271 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800272 .flags = I2C_M_RD,
273 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100274 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800275 }
276 };
Chris Wilson32aad862010-08-04 13:50:25 +0100277 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800278
Chris Wilsonf899fc62010-07-20 15:44:45 -0700279 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800280 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800281
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800282 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800283 return false;
284}
285
Jesse Barnes79e53942008-11-07 14:24:08 -0800286#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
287/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100288static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800289 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100290 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800291} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100335
Akshay Joshi0206e352011-08-16 15:34:10 -0400336 /* Add the op code for SDVO enhancements */
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100381
Akshay Joshi0206e352011-08-16 15:34:10 -0400382 /* HDMI op code */
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800403};
404
Daniel Vettereef4eac2012-03-23 23:43:35 +0100405#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800406
Chris Wilsonea5b2132010-08-04 13:50:23 +0100407static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100408 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800409{
Jesse Barnes79e53942008-11-07 14:24:08 -0800410 int i;
411
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800412 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100413 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800414 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800415 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800416 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800417 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400418 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800419 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800420 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800421 break;
422 }
423 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400424 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800425 DRM_LOG_KMS("(%02X)", cmd);
426 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800427}
Jesse Barnes79e53942008-11-07 14:24:08 -0800428
Jesse Barnes79e53942008-11-07 14:24:08 -0800429static const char *cmd_status_names[] = {
430 "Power on",
431 "Success",
432 "Not supported",
433 "Invalid arg",
434 "Pending",
435 "Target not specified",
436 "Scaling not supported"
437};
438
Chris Wilsone957d772010-09-24 12:52:03 +0100439static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
440 const void *args, int args_len)
441{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700442 u8 *buf, status;
443 struct i2c_msg *msgs;
444 int i, ret = true;
445
Alan Cox0274df32012-07-25 13:51:04 +0100446 /* Would be simpler to allocate both in one go ? */
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700447 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
448 if (!buf)
449 return false;
450
451 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
Alan Cox0274df32012-07-25 13:51:04 +0100452 if (!msgs) {
453 kfree(buf);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700454 return false;
Alan Cox0274df32012-07-25 13:51:04 +0100455 }
Chris Wilsone957d772010-09-24 12:52:03 +0100456
457 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
458
459 for (i = 0; i < args_len; i++) {
460 msgs[i].addr = intel_sdvo->slave_addr;
461 msgs[i].flags = 0;
462 msgs[i].len = 2;
463 msgs[i].buf = buf + 2 *i;
464 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
465 buf[2*i + 1] = ((u8*)args)[i];
466 }
467 msgs[i].addr = intel_sdvo->slave_addr;
468 msgs[i].flags = 0;
469 msgs[i].len = 2;
470 msgs[i].buf = buf + 2*i;
471 buf[2*i + 0] = SDVO_I2C_OPCODE;
472 buf[2*i + 1] = cmd;
473
474 /* the following two are to read the response */
475 status = SDVO_I2C_CMD_STATUS;
476 msgs[i+1].addr = intel_sdvo->slave_addr;
477 msgs[i+1].flags = 0;
478 msgs[i+1].len = 1;
479 msgs[i+1].buf = &status;
480
481 msgs[i+2].addr = intel_sdvo->slave_addr;
482 msgs[i+2].flags = I2C_M_RD;
483 msgs[i+2].len = 1;
484 msgs[i+2].buf = &status;
485
486 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
487 if (ret < 0) {
488 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700489 ret = false;
490 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100491 }
492 if (ret != i+3) {
493 /* failure in I2C transfer */
494 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700495 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100496 }
497
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700498out:
499 kfree(msgs);
500 kfree(buf);
501 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100502}
503
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100504static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
505 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800506{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100507 u8 retry = 5;
508 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800509 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800510
Chris Wilsond121a5d2011-01-25 15:00:01 +0000511 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
512
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100513 /*
514 * The documentation states that all commands will be
515 * processed within 15µs, and that we need only poll
516 * the status byte a maximum of 3 times in order for the
517 * command to be complete.
518 *
519 * Check 5 times in case the hardware failed to read the docs.
520 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000521 if (!intel_sdvo_read_byte(intel_sdvo,
522 SDVO_I2C_CMD_STATUS,
523 &status))
524 goto log_fail;
525
526 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
527 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100528 if (!intel_sdvo_read_byte(intel_sdvo,
529 SDVO_I2C_CMD_STATUS,
530 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000531 goto log_fail;
532 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100533
Jesse Barnes79e53942008-11-07 14:24:08 -0800534 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800535 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800536 else
yakui_zhao342dc382009-06-02 14:12:00 +0800537 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800538
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100539 if (status != SDVO_CMD_STATUS_SUCCESS)
540 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800541
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100542 /* Read the command response */
543 for (i = 0; i < response_len; i++) {
544 if (!intel_sdvo_read_byte(intel_sdvo,
545 SDVO_I2C_RETURN_0 + i,
546 &((u8 *)response)[i]))
547 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100548 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800549 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100550 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100551 return true;
552
553log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000554 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100555 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800556}
557
Hannes Ederb358d0a2008-12-18 21:18:47 +0100558static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800559{
560 if (mode->clock >= 100000)
561 return 1;
562 else if (mode->clock >= 50000)
563 return 2;
564 else
565 return 4;
566}
567
Chris Wilsone957d772010-09-24 12:52:03 +0100568static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
569 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800570{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000571 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100572 return intel_sdvo_write_cmd(intel_sdvo,
573 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
574 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800575}
576
Chris Wilson32aad862010-08-04 13:50:25 +0100577static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
578{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000579 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
580 return false;
581
582 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100583}
584
585static bool
586intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
587{
588 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
589 return false;
590
591 return intel_sdvo_read_response(intel_sdvo, value, len);
592}
593
594static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800595{
596 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100597 return intel_sdvo_set_value(intel_sdvo,
598 SDVO_CMD_SET_TARGET_INPUT,
599 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800600}
601
602/**
603 * Return whether each input is trained.
604 *
605 * This function is making an assumption about the layout of the response,
606 * which should be checked against the docs.
607 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100608static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800609{
610 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800611
Chris Wilson1a3665c2011-01-25 13:59:37 +0000612 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100613 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
614 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800615 return false;
616
617 *input_1 = response.input0_trained;
618 *input_2 = response.input1_trained;
619 return true;
620}
621
Chris Wilsonea5b2132010-08-04 13:50:23 +0100622static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800623 u16 outputs)
624{
Chris Wilson32aad862010-08-04 13:50:25 +0100625 return intel_sdvo_set_value(intel_sdvo,
626 SDVO_CMD_SET_ACTIVE_OUTPUTS,
627 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800628}
629
Daniel Vetter4ac41f42012-07-02 14:54:00 +0200630static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
631 u16 *outputs)
632{
633 return intel_sdvo_get_value(intel_sdvo,
634 SDVO_CMD_GET_ACTIVE_OUTPUTS,
635 outputs, sizeof(*outputs));
636}
637
Chris Wilsonea5b2132010-08-04 13:50:23 +0100638static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800639 int mode)
640{
Chris Wilson32aad862010-08-04 13:50:25 +0100641 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800642
643 switch (mode) {
644 case DRM_MODE_DPMS_ON:
645 state = SDVO_ENCODER_STATE_ON;
646 break;
647 case DRM_MODE_DPMS_STANDBY:
648 state = SDVO_ENCODER_STATE_STANDBY;
649 break;
650 case DRM_MODE_DPMS_SUSPEND:
651 state = SDVO_ENCODER_STATE_SUSPEND;
652 break;
653 case DRM_MODE_DPMS_OFF:
654 state = SDVO_ENCODER_STATE_OFF;
655 break;
656 }
657
Chris Wilson32aad862010-08-04 13:50:25 +0100658 return intel_sdvo_set_value(intel_sdvo,
659 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800660}
661
Chris Wilsonea5b2132010-08-04 13:50:23 +0100662static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800663 int *clock_min,
664 int *clock_max)
665{
666 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800667
Chris Wilson1a3665c2011-01-25 13:59:37 +0000668 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100669 if (!intel_sdvo_get_value(intel_sdvo,
670 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
671 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800672 return false;
673
674 /* Convert the values from units of 10 kHz to kHz. */
675 *clock_min = clocks.min * 10;
676 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800677 return true;
678}
679
Chris Wilsonea5b2132010-08-04 13:50:23 +0100680static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800681 u16 outputs)
682{
Chris Wilson32aad862010-08-04 13:50:25 +0100683 return intel_sdvo_set_value(intel_sdvo,
684 SDVO_CMD_SET_TARGET_OUTPUT,
685 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800686}
687
Chris Wilsonea5b2132010-08-04 13:50:23 +0100688static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800689 struct intel_sdvo_dtd *dtd)
690{
Chris Wilson32aad862010-08-04 13:50:25 +0100691 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
692 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800693}
694
Chris Wilsonea5b2132010-08-04 13:50:23 +0100695static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800696 struct intel_sdvo_dtd *dtd)
697{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100698 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800699 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
700}
701
Chris Wilsonea5b2132010-08-04 13:50:23 +0100702static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800703 struct intel_sdvo_dtd *dtd)
704{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100705 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800706 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
707}
708
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800709static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100710intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800711 uint16_t clock,
712 uint16_t width,
713 uint16_t height)
714{
715 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800716
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800717 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800718 args.clock = clock;
719 args.width = width;
720 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800721 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800722
Chris Wilsonea5b2132010-08-04 13:50:23 +0100723 if (intel_sdvo->is_lvds &&
724 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
725 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800726 args.scaled = 1;
727
Chris Wilson32aad862010-08-04 13:50:25 +0100728 return intel_sdvo_set_value(intel_sdvo,
729 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
730 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800731}
732
Chris Wilsonea5b2132010-08-04 13:50:23 +0100733static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800734 struct intel_sdvo_dtd *dtd)
735{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000736 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
737 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100738 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
739 &dtd->part1, sizeof(dtd->part1)) &&
740 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
741 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800742}
Jesse Barnes79e53942008-11-07 14:24:08 -0800743
Chris Wilsonea5b2132010-08-04 13:50:23 +0100744static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800745{
Chris Wilson32aad862010-08-04 13:50:25 +0100746 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800747}
748
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800749static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100750 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800751{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800752 uint16_t width, height;
753 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
754 uint16_t h_sync_offset, v_sync_offset;
Daniel Vetter66518192012-04-01 19:16:18 +0200755 int mode_clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800756
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200757 width = mode->hdisplay;
758 height = mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800759
760 /* do some mode translations */
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200761 h_blank_len = mode->htotal - mode->hdisplay;
762 h_sync_len = mode->hsync_end - mode->hsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800763
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200764 v_blank_len = mode->vtotal - mode->vdisplay;
765 v_sync_len = mode->vsync_end - mode->vsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800766
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200767 h_sync_offset = mode->hsync_start - mode->hdisplay;
768 v_sync_offset = mode->vsync_start - mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800769
Daniel Vetter66518192012-04-01 19:16:18 +0200770 mode_clock = mode->clock;
771 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
772 mode_clock /= 10;
773 dtd->part1.clock = mode_clock;
774
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800775 dtd->part1.h_active = width & 0xff;
776 dtd->part1.h_blank = h_blank_len & 0xff;
777 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800778 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800779 dtd->part1.v_active = height & 0xff;
780 dtd->part1.v_blank = v_blank_len & 0xff;
781 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800782 ((v_blank_len >> 8) & 0xf);
783
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800784 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800785 dtd->part2.h_sync_width = h_sync_len & 0xff;
786 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800787 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800788 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800789 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
790 ((v_sync_len & 0x30) >> 4);
791
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800792 dtd->part2.dtd_flags = 0x18;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200793 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
794 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800795 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200796 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800797 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200798 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800799
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800800 dtd->part2.sdvo_flags = 0;
801 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
802 dtd->part2.reserved = 0;
803}
Jesse Barnes79e53942008-11-07 14:24:08 -0800804
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800805static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100806 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800807{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800808 mode->hdisplay = dtd->part1.h_active;
809 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
810 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800811 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800812 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
813 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
814 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
815 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
816
817 mode->vdisplay = dtd->part1.v_active;
818 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
819 mode->vsync_start = mode->vdisplay;
820 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800821 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800822 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
823 mode->vsync_end = mode->vsync_start +
824 (dtd->part2.v_sync_off_width & 0xf);
825 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
826 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
827 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
828
829 mode->clock = dtd->part1.clock * 10;
830
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800831 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200832 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
833 mode->flags |= DRM_MODE_FLAG_INTERLACE;
834 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800835 mode->flags |= DRM_MODE_FLAG_PHSYNC;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200836 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800837 mode->flags |= DRM_MODE_FLAG_PVSYNC;
838}
839
Chris Wilsone27d8532010-10-22 09:15:22 +0100840static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841{
Chris Wilsone27d8532010-10-22 09:15:22 +0100842 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800843
Chris Wilson1a3665c2011-01-25 13:59:37 +0000844 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100845 return intel_sdvo_get_value(intel_sdvo,
846 SDVO_CMD_GET_SUPP_ENCODE,
847 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800848}
849
Chris Wilsonea5b2132010-08-04 13:50:23 +0100850static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700851 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800852{
Chris Wilson32aad862010-08-04 13:50:25 +0100853 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800854}
855
Chris Wilsonea5b2132010-08-04 13:50:23 +0100856static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800857 uint8_t mode)
858{
Chris Wilson32aad862010-08-04 13:50:25 +0100859 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800860}
861
862#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100863static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800864{
865 int i, j;
866 uint8_t set_buf_index[2];
867 uint8_t av_split;
868 uint8_t buf_size;
869 uint8_t buf[48];
870 uint8_t *pos;
871
Chris Wilson32aad862010-08-04 13:50:25 +0100872 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800873
874 for (i = 0; i <= av_split; i++) {
875 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700876 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800877 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700878 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
879 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800880
881 pos = buf;
882 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700883 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800884 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700885 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800886 pos += 8;
887 }
888 }
889}
890#endif
891
David Härdeman3c17fe42010-09-24 21:44:32 +0200892static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800893{
894 struct dip_infoframe avi_if = {
895 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200896 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800897 .len = DIP_LEN_AVI,
898 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200899 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
900 uint8_t set_buf_index[2] = { 1, 0 };
Daniel Vetter81014b92012-05-12 20:22:00 +0200901 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
902 uint64_t *data = (uint64_t *)sdvo_data;
David Härdeman3c17fe42010-09-24 21:44:32 +0200903 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800904
David Härdeman3c17fe42010-09-24 21:44:32 +0200905 intel_dip_infoframe_csum(&avi_if);
906
Daniel Vetter81014b92012-05-12 20:22:00 +0200907 /* sdvo spec says that the ecc is handled by the hw, and it looks like
908 * we must not send the ecc field, either. */
909 memcpy(sdvo_data, &avi_if, 3);
910 sdvo_data[3] = avi_if.checksum;
911 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
912
Chris Wilsond121a5d2011-01-25 15:00:01 +0000913 if (!intel_sdvo_set_value(intel_sdvo,
914 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200915 set_buf_index, 2))
916 return false;
917
Daniel Vetter81014b92012-05-12 20:22:00 +0200918 for (i = 0; i < sizeof(sdvo_data); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000919 if (!intel_sdvo_set_value(intel_sdvo,
920 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200921 data, 8))
922 return false;
923 data++;
924 }
925
Chris Wilsond121a5d2011-01-25 15:00:01 +0000926 return intel_sdvo_set_value(intel_sdvo,
927 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200928 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800929}
930
Chris Wilson32aad862010-08-04 13:50:25 +0100931static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800932{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800933 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100934 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800935
Chris Wilson40039752010-08-04 13:50:26 +0100936 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800937 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100938 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800939
Chris Wilson32aad862010-08-04 13:50:25 +0100940 BUILD_BUG_ON(sizeof(format) != 6);
941 return intel_sdvo_set_value(intel_sdvo,
942 SDVO_CMD_SET_TV_FORMAT,
943 &format, sizeof(format));
944}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800945
Chris Wilson32aad862010-08-04 13:50:25 +0100946static bool
947intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200948 const struct drm_display_mode *mode)
Chris Wilson32aad862010-08-04 13:50:25 +0100949{
950 struct intel_sdvo_dtd output_dtd;
951
952 if (!intel_sdvo_set_target_output(intel_sdvo,
953 intel_sdvo->attached_output))
954 return false;
955
956 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
957 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
958 return false;
959
960 return true;
961}
962
Daniel Vetterc9a29692012-04-10 13:55:47 +0200963/* Asks the sdvo controller for the preferred input mode given the output mode.
964 * Unfortunately we have to set up the full output mode to do that. */
Chris Wilson32aad862010-08-04 13:50:25 +0100965static bool
Daniel Vetterc9a29692012-04-10 13:55:47 +0200966intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200967 const struct drm_display_mode *mode,
Daniel Vetterc9a29692012-04-10 13:55:47 +0200968 struct drm_display_mode *adjusted_mode)
Chris Wilson32aad862010-08-04 13:50:25 +0100969{
Daniel Vetterc9a29692012-04-10 13:55:47 +0200970 struct intel_sdvo_dtd input_dtd;
971
Chris Wilson32aad862010-08-04 13:50:25 +0100972 /* Reset the input timing to the screen. Assume always input 0. */
973 if (!intel_sdvo_set_target_input(intel_sdvo))
974 return false;
975
976 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
977 mode->clock / 10,
978 mode->hdisplay,
979 mode->vdisplay))
980 return false;
981
982 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Daniel Vetterc9a29692012-04-10 13:55:47 +0200983 &input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100984 return false;
985
Daniel Vetterc9a29692012-04-10 13:55:47 +0200986 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100987
Chris Wilson32aad862010-08-04 13:50:25 +0100988 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800989}
990
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800991static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200992 const struct drm_display_mode *mode,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800993 struct drm_display_mode *adjusted_mode)
994{
Chris Wilson890f3352010-09-14 16:46:59 +0100995 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100996 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800997
Chris Wilson32aad862010-08-04 13:50:25 +0100998 /* We need to construct preferred input timings based on our
999 * output timings. To do that, we have to set the output
1000 * timings, even though this isn't really the right place in
1001 * the sequence to do it. Oh well.
1002 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001003 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +01001004 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001005 return false;
Chris Wilson32aad862010-08-04 13:50:25 +01001006
Daniel Vetterc9a29692012-04-10 13:55:47 +02001007 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1008 mode,
1009 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001010 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +01001011 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +01001012 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001013 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001014
Daniel Vetterc9a29692012-04-10 13:55:47 +02001015 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1016 mode,
1017 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001018 }
Chris Wilson32aad862010-08-04 13:50:25 +01001019
1020 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +01001021 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +01001022 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001023 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1024 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +01001025
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001026 return true;
1027}
1028
1029static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1030 struct drm_display_mode *mode,
1031 struct drm_display_mode *adjusted_mode)
1032{
1033 struct drm_device *dev = encoder->dev;
1034 struct drm_i915_private *dev_priv = dev->dev_private;
1035 struct drm_crtc *crtc = encoder->crtc;
1036 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +01001037 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001038 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001039 struct intel_sdvo_in_out_map in_out;
Daniel Vetter66518192012-04-01 19:16:18 +02001040 struct intel_sdvo_dtd input_dtd, output_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001041 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1042 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001043
1044 if (!mode)
1045 return;
1046
1047 /* First, set the input mapping for the first input to our controlled
1048 * output. This is only correct if we're a single-input device, in
1049 * which case the first input is the output from the appropriate SDVO
1050 * channel on the motherboard. In a two-input device, the first input
1051 * will be SDVOB and the second SDVOC.
1052 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001053 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001054 in_out.in1 = 0;
1055
Pavel Roskinc74696b2010-09-02 14:46:34 -04001056 intel_sdvo_set_value(intel_sdvo,
1057 SDVO_CMD_SET_IN_OUT_MAP,
1058 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001059
Chris Wilson6c9547f2010-08-25 10:05:17 +01001060 /* Set the output timings to the screen */
1061 if (!intel_sdvo_set_target_output(intel_sdvo,
1062 intel_sdvo->attached_output))
1063 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001064
Daniel Vetter66518192012-04-01 19:16:18 +02001065 /* lvds has a special fixed output timing. */
1066 if (intel_sdvo->is_lvds)
1067 intel_sdvo_get_dtd_from_mode(&output_dtd,
1068 intel_sdvo->sdvo_lvds_fixed_mode);
1069 else
1070 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001071 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1072 DRM_INFO("Setting output timings on %s failed\n",
1073 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001074
1075 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001076 if (!intel_sdvo_set_target_input(intel_sdvo))
1077 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001078
Chris Wilson97aaf912011-01-04 20:10:52 +00001079 if (intel_sdvo->has_hdmi_monitor) {
1080 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1081 intel_sdvo_set_colorimetry(intel_sdvo,
1082 SDVO_COLORIMETRY_RGB256);
1083 intel_sdvo_set_avi_infoframe(intel_sdvo);
1084 } else
1085 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001086
Chris Wilson6c9547f2010-08-25 10:05:17 +01001087 if (intel_sdvo->is_tv &&
1088 !intel_sdvo_set_tv_format(intel_sdvo))
1089 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001090
Daniel Vetter66518192012-04-01 19:16:18 +02001091 /* We have tried to get input timing in mode_fixup, and filled into
1092 * adjusted_mode.
1093 */
1094 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001095 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1096 DRM_INFO("Setting input timings on %s failed\n",
1097 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001098
Chris Wilson6c9547f2010-08-25 10:05:17 +01001099 switch (pixel_multiplier) {
1100 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001101 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1102 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1103 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001104 }
Chris Wilson32aad862010-08-04 13:50:25 +01001105 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1106 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001107
1108 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001109 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001110 /* The real mode polarity is set by the SDVO commands, using
1111 * struct intel_sdvo_dtd. */
1112 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Chris Wilsone953fd72011-02-21 22:23:52 +00001113 if (intel_sdvo->is_hdmi)
1114 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001115 if (INTEL_INFO(dev)->gen < 5)
1116 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001117 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001118 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001119 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001120 case SDVOB:
1121 sdvox &= SDVOB_PRESERVE_MASK;
1122 break;
1123 case SDVOC:
1124 sdvox &= SDVOC_PRESERVE_MASK;
1125 break;
1126 }
1127 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1128 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001129
1130 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1131 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1132 else
1133 sdvox |= TRANSCODER(intel_crtc->pipe);
1134
Chris Wilsonda79de92010-11-22 11:12:46 +00001135 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001136 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001137
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001138 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001139 /* done in crtc_mode_set as the dpll_md reg must be written early */
1140 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1141 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001142 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001143 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001144 }
1145
Chris Wilson6714afb2010-12-17 04:10:51 +00001146 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1147 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001148 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001149 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001150}
1151
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001152static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001153{
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001154 struct intel_sdvo_connector *intel_sdvo_connector =
1155 to_intel_sdvo_connector(&connector->base);
1156 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1157 u16 active_outputs;
1158
1159 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1160
1161 if (active_outputs & intel_sdvo_connector->output_flag)
1162 return true;
1163 else
1164 return false;
1165}
1166
1167static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1168 enum pipe *pipe)
1169{
1170 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -08001171 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001172 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1173 u32 tmp;
1174
1175 tmp = I915_READ(intel_sdvo->sdvo_reg);
1176
1177 if (!(tmp & SDVO_ENABLE))
1178 return false;
1179
1180 if (HAS_PCH_CPT(dev))
1181 *pipe = PORT_TO_PIPE_CPT(tmp);
1182 else
1183 *pipe = PORT_TO_PIPE(tmp);
1184
1185 return true;
1186}
1187
Daniel Vetterce22c322012-07-01 15:31:04 +02001188static void intel_disable_sdvo(struct intel_encoder *encoder)
1189{
1190 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1191 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001192 u32 temp;
1193
Daniel Vetterce22c322012-07-01 15:31:04 +02001194 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1195 if (0)
1196 intel_sdvo_set_encoder_power_state(intel_sdvo,
1197 DRM_MODE_DPMS_OFF);
1198
1199 temp = I915_READ(intel_sdvo->sdvo_reg);
1200 if ((temp & SDVO_ENABLE) != 0) {
1201 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1202 }
1203}
1204
1205static void intel_enable_sdvo(struct intel_encoder *encoder)
1206{
1207 struct drm_device *dev = encoder->base.dev;
1208 struct drm_i915_private *dev_priv = dev->dev_private;
1209 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1210 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1211 u32 temp;
1212 bool input1, input2;
1213 int i;
1214 u8 status;
1215
1216 temp = I915_READ(intel_sdvo->sdvo_reg);
1217 if ((temp & SDVO_ENABLE) == 0)
1218 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1219 for (i = 0; i < 2; i++)
1220 intel_wait_for_vblank(dev, intel_crtc->pipe);
1221
1222 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1223 /* Warn if the device reported failure to sync.
1224 * A lot of SDVO devices fail to notify of sync, but it's
1225 * a given it the status is a success, we succeeded.
1226 */
1227 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1228 DRM_DEBUG_KMS("First %s output reported failure to "
1229 "sync\n", SDVO_NAME(intel_sdvo));
1230 }
1231
1232 if (0)
1233 intel_sdvo_set_encoder_power_state(intel_sdvo,
1234 DRM_MODE_DPMS_ON);
1235 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1236}
1237
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001238static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
Jesse Barnes79e53942008-11-07 14:24:08 -08001239{
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001240 struct drm_crtc *crtc;
1241 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1242
1243 /* dvo supports only 2 dpms states. */
1244 if (mode != DRM_MODE_DPMS_ON)
1245 mode = DRM_MODE_DPMS_OFF;
1246
1247 if (mode == connector->dpms)
1248 return;
1249
1250 connector->dpms = mode;
1251
1252 /* Only need to change hw state when actually enabled */
1253 crtc = intel_sdvo->base.base.crtc;
1254 if (!crtc) {
1255 intel_sdvo->base.connectors_active = false;
1256 return;
1257 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001258
1259 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001260 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001261 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001262 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001263
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001264 intel_sdvo->base.connectors_active = false;
1265
1266 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001267 } else {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001268 intel_sdvo->base.connectors_active = true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001269
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001270 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001271
1272 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001273 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1274 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001275 }
Daniel Vetter0a91ca22012-07-02 21:54:27 +02001276
Daniel Vetterb9805142012-08-31 17:37:33 +02001277 intel_modeset_check_state(connector->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -08001278}
1279
Jesse Barnes79e53942008-11-07 14:24:08 -08001280static int intel_sdvo_mode_valid(struct drm_connector *connector,
1281 struct drm_display_mode *mode)
1282{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001283 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001284
1285 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1286 return MODE_NO_DBLESCAN;
1287
Chris Wilsonea5b2132010-08-04 13:50:23 +01001288 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001289 return MODE_CLOCK_LOW;
1290
Chris Wilsonea5b2132010-08-04 13:50:23 +01001291 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001292 return MODE_CLOCK_HIGH;
1293
Chris Wilson85454232010-08-08 14:28:23 +01001294 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001295 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001296 return MODE_PANEL;
1297
Chris Wilsonea5b2132010-08-04 13:50:23 +01001298 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001299 return MODE_PANEL;
1300 }
1301
Jesse Barnes79e53942008-11-07 14:24:08 -08001302 return MODE_OK;
1303}
1304
Chris Wilsonea5b2132010-08-04 13:50:23 +01001305static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001306{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001307 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001308 if (!intel_sdvo_get_value(intel_sdvo,
1309 SDVO_CMD_GET_DEVICE_CAPS,
1310 caps, sizeof(*caps)))
1311 return false;
1312
1313 DRM_DEBUG_KMS("SDVO capabilities:\n"
1314 " vendor_id: %d\n"
1315 " device_id: %d\n"
1316 " device_rev_id: %d\n"
1317 " sdvo_version_major: %d\n"
1318 " sdvo_version_minor: %d\n"
1319 " sdvo_inputs_mask: %d\n"
1320 " smooth_scaling: %d\n"
1321 " sharp_scaling: %d\n"
1322 " up_scaling: %d\n"
1323 " down_scaling: %d\n"
1324 " stall_support: %d\n"
1325 " output_flags: %d\n",
1326 caps->vendor_id,
1327 caps->device_id,
1328 caps->device_rev_id,
1329 caps->sdvo_version_major,
1330 caps->sdvo_version_minor,
1331 caps->sdvo_inputs_mask,
1332 caps->smooth_scaling,
1333 caps->sharp_scaling,
1334 caps->up_scaling,
1335 caps->down_scaling,
1336 caps->stall_support,
1337 caps->output_flags);
1338
1339 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001340}
1341
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001342static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001343{
Daniel Vetter768b1072012-05-04 11:29:56 +02001344 struct drm_device *dev = intel_sdvo->base.base.dev;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001345 uint16_t hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001346
Daniel Vetter768b1072012-05-04 11:29:56 +02001347 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1348 * on the line. */
1349 if (IS_I945G(dev) || IS_I945GM(dev))
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001350 return 0;
Daniel Vetter768b1072012-05-04 11:29:56 +02001351
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001352 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1353 &hotplug, sizeof(hotplug)))
1354 return 0;
1355
1356 return hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001357}
1358
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001359static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001360{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001361 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001362
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001363 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1364 &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001365}
1366
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001367static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001368intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001369{
Chris Wilsonbc652122011-01-25 13:28:29 +00001370 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001371 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001372}
1373
Chris Wilsonf899fc62010-07-20 15:44:45 -07001374static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001375intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001376{
Chris Wilsone957d772010-09-24 12:52:03 +01001377 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1378 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001379}
1380
Chris Wilsonff482d82010-09-15 10:40:38 +01001381/* Mac mini hack -- use the same DDC as the analog connector */
1382static struct edid *
1383intel_sdvo_get_analog_edid(struct drm_connector *connector)
1384{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001385 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001386
Chris Wilson0c1dab82010-11-23 22:37:01 +00001387 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001388 intel_gmbus_get_adapter(dev_priv,
1389 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001390}
1391
Ben Widawskyc43b5632012-04-16 14:07:40 -07001392static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001393intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001394{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001395 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001396 enum drm_connector_status status;
1397 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001398
Chris Wilsone957d772010-09-24 12:52:03 +01001399 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001400
Chris Wilsonea5b2132010-08-04 13:50:23 +01001401 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001402 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001403
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001404 /*
1405 * Don't use the 1 as the argument of DDC bus switch to get
1406 * the EDID. It is used for SDVO SPD ROM.
1407 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001408 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001409 intel_sdvo->ddc_bus = ddc;
1410 edid = intel_sdvo_get_edid(connector);
1411 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001412 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001413 }
Chris Wilsone957d772010-09-24 12:52:03 +01001414 /*
1415 * If we found the EDID on the other bus,
1416 * assume that is the correct DDC bus.
1417 */
1418 if (edid == NULL)
1419 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001420 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001421
1422 /*
1423 * When there is no edid and no monitor is connected with VGA
1424 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001425 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001426 if (edid == NULL)
1427 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001428
Chris Wilson2f551c82010-09-15 10:42:50 +01001429 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001430 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001431 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001432 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1433 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001434 if (intel_sdvo->is_hdmi) {
1435 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1436 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1437 }
Chris Wilson139467432011-02-09 20:01:16 +00001438 } else
1439 status = connector_status_disconnected;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001440 kfree(edid);
1441 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001442
1443 if (status == connector_status_connected) {
1444 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001445 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1446 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001447 }
1448
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001449 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001450}
1451
Chris Wilson52220082011-06-20 14:45:50 +01001452static bool
1453intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1454 struct edid *edid)
1455{
1456 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1457 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1458
1459 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1460 connector_is_digital, monitor_is_digital);
1461 return connector_is_digital == monitor_is_digital;
1462}
1463
Chris Wilson7b334fc2010-09-09 23:51:02 +01001464static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001465intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001466{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001467 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001468 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001469 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001470 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001471
Chris Wilson32aad862010-08-04 13:50:25 +01001472 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001473 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001474 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001475
1476 /* add 30ms delay when the output type might be TV */
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01001477 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
Daniel Vetter6c982372012-05-24 21:26:49 +02001478 msleep(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001479
Chris Wilson32aad862010-08-04 13:50:25 +01001480 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1481 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001482
Chris Wilsone957d772010-09-24 12:52:03 +01001483 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1484 response & 0xff, response >> 8,
1485 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001486
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001487 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001488 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001489
Chris Wilsonea5b2132010-08-04 13:50:23 +01001490 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001491
Chris Wilson97aaf912011-01-04 20:10:52 +00001492 intel_sdvo->has_hdmi_monitor = false;
1493 intel_sdvo->has_hdmi_audio = false;
1494
Chris Wilson615fb932010-08-04 13:50:24 +01001495 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001496 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001497 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001498 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001499 else {
1500 struct edid *edid;
1501
1502 /* if we have an edid check it matches the connection */
1503 edid = intel_sdvo_get_edid(connector);
1504 if (edid == NULL)
1505 edid = intel_sdvo_get_analog_edid(connector);
1506 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001507 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1508 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001509 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001510 else
1511 ret = connector_status_disconnected;
1512
Chris Wilson139467432011-02-09 20:01:16 +00001513 kfree(edid);
1514 } else
1515 ret = connector_status_connected;
1516 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001517
1518 /* May update encoder flag for like clock for SDVO TV, etc.*/
1519 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001520 intel_sdvo->is_tv = false;
1521 intel_sdvo->is_lvds = false;
1522 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001523
1524 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001525 intel_sdvo->is_tv = true;
1526 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001527 }
1528 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001529 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001530 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001531
1532 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001533}
1534
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001535static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001536{
Chris Wilsonff482d82010-09-15 10:40:38 +01001537 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001538
1539 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001540 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001541
Keith Packard57cdaf92009-09-04 13:07:54 +08001542 /*
1543 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1544 * link between analog and digital outputs. So, if the regular SDVO
1545 * DDC fails, check to see if the analog output is disconnected, in
1546 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001547 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001548 if (edid == NULL)
1549 edid = intel_sdvo_get_analog_edid(connector);
1550
Chris Wilsonff482d82010-09-15 10:40:38 +01001551 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001552 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1553 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001554 drm_mode_connector_update_edid_property(connector, edid);
1555 drm_add_edid_modes(connector, edid);
1556 }
Chris Wilson139467432011-02-09 20:01:16 +00001557
Chris Wilsonff482d82010-09-15 10:40:38 +01001558 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001559 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001560}
1561
1562/*
1563 * Set of SDVO TV modes.
1564 * Note! This is in reply order (see loop in get_tv_modes).
1565 * XXX: all 60Hz refresh?
1566 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001567static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001568 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1569 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001570 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001571 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1572 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001573 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001574 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1575 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001576 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001577 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1578 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001579 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001580 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1581 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001582 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001583 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1584 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001585 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001586 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1587 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001588 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001589 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1590 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001591 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001592 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1593 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001594 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001595 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1596 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001597 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001598 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1599 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001600 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001601 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1602 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001603 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001604 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1605 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001606 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001607 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1608 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001609 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001610 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1611 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001612 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001613 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1614 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001615 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001616 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1617 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001618 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001619 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1620 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001621 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001622 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1623 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001624 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1625};
1626
1627static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1628{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001629 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001630 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001631 uint32_t reply = 0, format_map = 0;
1632 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001633
1634 /* Read the list of supported input resolutions for the selected TV
1635 * format.
1636 */
Chris Wilson40039752010-08-04 13:50:26 +01001637 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001638 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001639 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001640
Chris Wilson32aad862010-08-04 13:50:25 +01001641 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1642 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001643
Chris Wilson32aad862010-08-04 13:50:25 +01001644 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001645 if (!intel_sdvo_write_cmd(intel_sdvo,
1646 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001647 &tv_res, sizeof(tv_res)))
1648 return;
1649 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001650 return;
1651
1652 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001653 if (reply & (1 << i)) {
1654 struct drm_display_mode *nmode;
1655 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001656 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001657 if (nmode)
1658 drm_mode_probed_add(connector, nmode);
1659 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001660}
1661
Ma Ling7086c872009-05-13 11:20:06 +08001662static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1663{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001664 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001665 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001666 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001667
1668 /*
1669 * Attempt to get the mode list from DDC.
1670 * Assume that the preferred modes are
1671 * arranged in priority order.
1672 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001673 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001674 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001675 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001676
1677 /* Fetch modes from VBT */
1678 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001679 newmode = drm_mode_duplicate(connector->dev,
1680 dev_priv->sdvo_lvds_vbt_mode);
1681 if (newmode != NULL) {
1682 /* Guarantee the mode is preferred */
1683 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1684 DRM_MODE_TYPE_DRIVER);
1685 drm_mode_probed_add(connector, newmode);
1686 }
1687 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001688
1689end:
1690 list_for_each_entry(newmode, &connector->probed_modes, head) {
1691 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001692 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001693 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001694
Chris Wilson85454232010-08-08 14:28:23 +01001695 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001696 break;
1697 }
1698 }
1699
Ma Ling7086c872009-05-13 11:20:06 +08001700}
1701
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001702static int intel_sdvo_get_modes(struct drm_connector *connector)
1703{
Chris Wilson615fb932010-08-04 13:50:24 +01001704 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001705
Chris Wilson615fb932010-08-04 13:50:24 +01001706 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001707 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001708 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001709 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001710 else
1711 intel_sdvo_get_ddc_modes(connector);
1712
Chris Wilson32aad862010-08-04 13:50:25 +01001713 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001714}
1715
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001716static void
1717intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001718{
Chris Wilson615fb932010-08-04 13:50:24 +01001719 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001720 struct drm_device *dev = connector->dev;
1721
Chris Wilsonc5521702010-08-04 13:50:28 +01001722 if (intel_sdvo_connector->left)
1723 drm_property_destroy(dev, intel_sdvo_connector->left);
1724 if (intel_sdvo_connector->right)
1725 drm_property_destroy(dev, intel_sdvo_connector->right);
1726 if (intel_sdvo_connector->top)
1727 drm_property_destroy(dev, intel_sdvo_connector->top);
1728 if (intel_sdvo_connector->bottom)
1729 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1730 if (intel_sdvo_connector->hpos)
1731 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1732 if (intel_sdvo_connector->vpos)
1733 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1734 if (intel_sdvo_connector->saturation)
1735 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1736 if (intel_sdvo_connector->contrast)
1737 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1738 if (intel_sdvo_connector->hue)
1739 drm_property_destroy(dev, intel_sdvo_connector->hue);
1740 if (intel_sdvo_connector->sharpness)
1741 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1742 if (intel_sdvo_connector->flicker_filter)
1743 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1744 if (intel_sdvo_connector->flicker_filter_2d)
1745 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1746 if (intel_sdvo_connector->flicker_filter_adaptive)
1747 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1748 if (intel_sdvo_connector->tv_luma_filter)
1749 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1750 if (intel_sdvo_connector->tv_chroma_filter)
1751 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001752 if (intel_sdvo_connector->dot_crawl)
1753 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001754 if (intel_sdvo_connector->brightness)
1755 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001756}
1757
Jesse Barnes79e53942008-11-07 14:24:08 -08001758static void intel_sdvo_destroy(struct drm_connector *connector)
1759{
Chris Wilson615fb932010-08-04 13:50:24 +01001760 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001761
Chris Wilsonc5521702010-08-04 13:50:28 +01001762 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001763 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001764 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001765
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001766 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001767 drm_sysfs_connector_remove(connector);
1768 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001769 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001770}
1771
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001772static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1773{
1774 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1775 struct edid *edid;
1776 bool has_audio = false;
1777
1778 if (!intel_sdvo->is_hdmi)
1779 return false;
1780
1781 edid = intel_sdvo_get_edid(connector);
1782 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1783 has_audio = drm_detect_monitor_audio(edid);
Jani Nikula38ab8a22012-08-15 12:32:36 +03001784 kfree(edid);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001785
1786 return has_audio;
1787}
1788
Zhao Yakuice6feab2009-08-24 13:50:26 +08001789static int
1790intel_sdvo_set_property(struct drm_connector *connector,
1791 struct drm_property *property,
1792 uint64_t val)
1793{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001794 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001795 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001796 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001797 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001798 uint8_t cmd;
1799 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001800
1801 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001802 if (ret)
1803 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001804
Chris Wilson3f43c482011-05-12 22:17:24 +01001805 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001806 int i = val;
1807 bool has_audio;
1808
1809 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001810 return 0;
1811
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001812 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001813
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001814 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001815 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1816 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001817 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001818
1819 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001820 return 0;
1821
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001822 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001823 goto done;
1824 }
1825
Chris Wilsone953fd72011-02-21 22:23:52 +00001826 if (property == dev_priv->broadcast_rgb_property) {
1827 if (val == !!intel_sdvo->color_range)
1828 return 0;
1829
1830 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001831 goto done;
1832 }
1833
Chris Wilsonc5521702010-08-04 13:50:28 +01001834#define CHECK_PROPERTY(name, NAME) \
1835 if (intel_sdvo_connector->name == property) { \
1836 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1837 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1838 cmd = SDVO_CMD_SET_##NAME; \
1839 intel_sdvo_connector->cur_##name = temp_value; \
1840 goto set_value; \
1841 }
1842
1843 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001844 if (val >= TV_FORMAT_NUM)
1845 return -EINVAL;
1846
Chris Wilson40039752010-08-04 13:50:26 +01001847 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001848 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001849 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001850
Chris Wilson40039752010-08-04 13:50:26 +01001851 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001852 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001853 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001854 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001855 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001856 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001857 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001858 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001859 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001860
Chris Wilson615fb932010-08-04 13:50:24 +01001861 intel_sdvo_connector->left_margin = temp_value;
1862 intel_sdvo_connector->right_margin = temp_value;
1863 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001864 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001865 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001866 goto set_value;
1867 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001868 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001869 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001870 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001871 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001872
Chris Wilson615fb932010-08-04 13:50:24 +01001873 intel_sdvo_connector->left_margin = temp_value;
1874 intel_sdvo_connector->right_margin = temp_value;
1875 temp_value = intel_sdvo_connector->max_hscan -
1876 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001877 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001878 goto set_value;
1879 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001880 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001881 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001882 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001883 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001884
Chris Wilson615fb932010-08-04 13:50:24 +01001885 intel_sdvo_connector->top_margin = temp_value;
1886 intel_sdvo_connector->bottom_margin = temp_value;
1887 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001888 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001889 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001890 goto set_value;
1891 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001892 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001893 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001894 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001895 return 0;
1896
Chris Wilson615fb932010-08-04 13:50:24 +01001897 intel_sdvo_connector->top_margin = temp_value;
1898 intel_sdvo_connector->bottom_margin = temp_value;
1899 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001900 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001901 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001902 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001903 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001904 CHECK_PROPERTY(hpos, HPOS)
1905 CHECK_PROPERTY(vpos, VPOS)
1906 CHECK_PROPERTY(saturation, SATURATION)
1907 CHECK_PROPERTY(contrast, CONTRAST)
1908 CHECK_PROPERTY(hue, HUE)
1909 CHECK_PROPERTY(brightness, BRIGHTNESS)
1910 CHECK_PROPERTY(sharpness, SHARPNESS)
1911 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1912 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1913 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1914 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1915 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001916 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001917 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001918
1919 return -EINVAL; /* unknown property */
1920
1921set_value:
1922 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1923 return -EIO;
1924
1925
1926done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001927 if (intel_sdvo->base.base.crtc) {
1928 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Daniel Vettera6778b32012-07-02 09:56:42 +02001929 intel_set_mode(crtc, &crtc->mode,
1930 crtc->x, crtc->y, crtc->fb);
Chris Wilsonc5521702010-08-04 13:50:28 +01001931 }
1932
Chris Wilson32aad862010-08-04 13:50:25 +01001933 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001934#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001935}
1936
Jesse Barnes79e53942008-11-07 14:24:08 -08001937static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
Jesse Barnes79e53942008-11-07 14:24:08 -08001938 .mode_fixup = intel_sdvo_mode_fixup,
Jesse Barnes79e53942008-11-07 14:24:08 -08001939 .mode_set = intel_sdvo_mode_set,
Daniel Vetter1f703852012-07-11 16:51:39 +02001940 .disable = intel_encoder_noop,
Jesse Barnes79e53942008-11-07 14:24:08 -08001941};
1942
1943static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001944 .dpms = intel_sdvo_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001945 .detect = intel_sdvo_detect,
1946 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001947 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001948 .destroy = intel_sdvo_destroy,
1949};
1950
1951static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1952 .get_modes = intel_sdvo_get_modes,
1953 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001954 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001955};
1956
Hannes Ederb358d0a2008-12-18 21:18:47 +01001957static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001958{
Chris Wilson890f3352010-09-14 16:46:59 +01001959 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001960
Chris Wilsonea5b2132010-08-04 13:50:23 +01001961 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001962 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001963 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001964
Chris Wilsone957d772010-09-24 12:52:03 +01001965 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001966 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001967}
1968
1969static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1970 .destroy = intel_sdvo_enc_destroy,
1971};
1972
Chris Wilsonb66d8422010-08-12 15:26:41 +01001973static void
1974intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1975{
1976 uint16_t mask = 0;
1977 unsigned int num_bits;
1978
1979 /* Make a mask of outputs less than or equal to our own priority in the
1980 * list.
1981 */
1982 switch (sdvo->controlled_output) {
1983 case SDVO_OUTPUT_LVDS1:
1984 mask |= SDVO_OUTPUT_LVDS1;
1985 case SDVO_OUTPUT_LVDS0:
1986 mask |= SDVO_OUTPUT_LVDS0;
1987 case SDVO_OUTPUT_TMDS1:
1988 mask |= SDVO_OUTPUT_TMDS1;
1989 case SDVO_OUTPUT_TMDS0:
1990 mask |= SDVO_OUTPUT_TMDS0;
1991 case SDVO_OUTPUT_RGB1:
1992 mask |= SDVO_OUTPUT_RGB1;
1993 case SDVO_OUTPUT_RGB0:
1994 mask |= SDVO_OUTPUT_RGB0;
1995 break;
1996 }
1997
1998 /* Count bits to find what number we are in the priority list. */
1999 mask &= sdvo->caps.output_flags;
2000 num_bits = hweight16(mask);
2001 /* If more than 3 outputs, default to DDC bus 3 for now. */
2002 if (num_bits > 3)
2003 num_bits = 3;
2004
2005 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2006 sdvo->ddc_bus = 1 << num_bits;
2007}
Jesse Barnes79e53942008-11-07 14:24:08 -08002008
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002009/**
2010 * Choose the appropriate DDC bus for control bus switch command for this
2011 * SDVO output based on the controlled output.
2012 *
2013 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2014 * outputs, then LVDS outputs.
2015 */
2016static void
Adam Jacksonb1083332010-04-23 16:07:40 -04002017intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002018 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002019{
Adam Jacksonb1083332010-04-23 16:07:40 -04002020 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002021
Daniel Vettereef4eac2012-03-23 23:43:35 +01002022 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04002023 mapping = &(dev_priv->sdvo_mappings[0]);
2024 else
2025 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002026
Chris Wilsonb66d8422010-08-12 15:26:41 +01002027 if (mapping->initialized)
2028 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2029 else
2030 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002031}
2032
Chris Wilsone957d772010-09-24 12:52:03 +01002033static void
2034intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2035 struct intel_sdvo *sdvo, u32 reg)
2036{
2037 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04002038 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01002039
Daniel Vettereef4eac2012-03-23 23:43:35 +01002040 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01002041 mapping = &dev_priv->sdvo_mappings[0];
2042 else
2043 mapping = &dev_priv->sdvo_mappings[1];
2044
Jani Nikula6cb16122012-10-22 16:12:17 +03002045 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
Chris Wilsone957d772010-09-24 12:52:03 +01002046 pin = mapping->i2c_pin;
Jani Nikula6cb16122012-10-22 16:12:17 +03002047 else
2048 pin = GMBUS_PORT_DPB;
Chris Wilsone957d772010-09-24 12:52:03 +01002049
Jani Nikula6cb16122012-10-22 16:12:17 +03002050 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2051
2052 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2053 * our code totally fails once we start using gmbus. Hence fall back to
2054 * bit banging for now. */
2055 intel_gmbus_force_bit(sdvo->i2c, true);
Chris Wilsone957d772010-09-24 12:52:03 +01002056}
2057
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002058/* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2059static void
2060intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2061{
2062 intel_gmbus_force_bit(sdvo->i2c, false);
2063}
2064
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002065static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01002066intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002067{
Chris Wilson97aaf912011-01-04 20:10:52 +00002068 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002069}
2070
yakui_zhao714605e2009-05-31 17:18:07 +08002071static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01002072intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08002073{
2074 struct drm_i915_private *dev_priv = dev->dev_private;
2075 struct sdvo_device_mapping *my_mapping, *other_mapping;
2076
Daniel Vettereef4eac2012-03-23 23:43:35 +01002077 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08002078 my_mapping = &dev_priv->sdvo_mappings[0];
2079 other_mapping = &dev_priv->sdvo_mappings[1];
2080 } else {
2081 my_mapping = &dev_priv->sdvo_mappings[1];
2082 other_mapping = &dev_priv->sdvo_mappings[0];
2083 }
2084
2085 /* If the BIOS described our SDVO device, take advantage of it. */
2086 if (my_mapping->slave_addr)
2087 return my_mapping->slave_addr;
2088
2089 /* If the BIOS only described a different SDVO device, use the
2090 * address that it isn't using.
2091 */
2092 if (other_mapping->slave_addr) {
2093 if (other_mapping->slave_addr == 0x70)
2094 return 0x72;
2095 else
2096 return 0x70;
2097 }
2098
2099 /* No SDVO device info is found for another DVO port,
2100 * so use mapping assumption we had before BIOS parsing.
2101 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01002102 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08002103 return 0x70;
2104 else
2105 return 0x72;
2106}
2107
Zhenyu Wang14571b42010-03-30 14:06:33 +08002108static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01002109intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2110 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002111{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002112 drm_connector_init(encoder->base.base.dev,
2113 &connector->base.base,
2114 &intel_sdvo_connector_funcs,
2115 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002116
Chris Wilsondf0e9242010-09-09 16:20:55 +01002117 drm_connector_helper_add(&connector->base.base,
2118 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002119
Peter Ross8f4839e2012-01-28 14:49:25 +01002120 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002121 connector->base.base.doublescan_allowed = 0;
2122 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002123 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002124
Chris Wilsondf0e9242010-09-09 16:20:55 +01002125 intel_connector_attach_encoder(&connector->base, &encoder->base);
2126 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002127}
2128
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002129static void
2130intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2131{
2132 struct drm_device *dev = connector->base.base.dev;
2133
Chris Wilson3f43c482011-05-12 22:17:24 +01002134 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00002135 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2136 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002137}
2138
Zhenyu Wang14571b42010-03-30 14:06:33 +08002139static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002140intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002141{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002142 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002143 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002144 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002145 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002146 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002147
Chris Wilson615fb932010-08-04 13:50:24 +01002148 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2149 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002150 return false;
2151
Zhenyu Wang14571b42010-03-30 14:06:33 +08002152 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002153 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002154 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002155 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002156 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002157 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002158 }
2159
Chris Wilson615fb932010-08-04 13:50:24 +01002160 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002161 connector = &intel_connector->base;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002162 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2163 intel_sdvo_connector->output_flag) {
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002164 connector->polled = DRM_CONNECTOR_POLL_HPD;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002165 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002166 /* Some SDVO devices have one-shot hotplug interrupts.
2167 * Ensure that they get re-enabled when an interrupt happens.
2168 */
2169 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2170 intel_sdvo_enable_hotplug(intel_encoder);
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002171 } else {
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002172 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002173 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002174 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2175 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2176
Chris Wilsone27d8532010-10-22 09:15:22 +01002177 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002178 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002179 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002180 }
Daniel Vetter66a92782012-07-12 20:08:18 +02002181 intel_sdvo->base.cloneable = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002182
Chris Wilsondf0e9242010-09-09 16:20:55 +01002183 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002184 if (intel_sdvo->is_hdmi)
2185 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002186
2187 return true;
2188}
2189
2190static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002191intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002192{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002193 struct drm_encoder *encoder = &intel_sdvo->base.base;
2194 struct drm_connector *connector;
2195 struct intel_connector *intel_connector;
2196 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002197
Chris Wilson615fb932010-08-04 13:50:24 +01002198 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2199 if (!intel_sdvo_connector)
2200 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002201
Chris Wilson615fb932010-08-04 13:50:24 +01002202 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002203 connector = &intel_connector->base;
2204 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2205 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002206
Chris Wilson4ef69c72010-09-09 15:14:28 +01002207 intel_sdvo->controlled_output |= type;
2208 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002209
Chris Wilson4ef69c72010-09-09 15:14:28 +01002210 intel_sdvo->is_tv = true;
2211 intel_sdvo->base.needs_tv_clock = true;
Daniel Vetter66a92782012-07-12 20:08:18 +02002212 intel_sdvo->base.cloneable = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002213
Chris Wilsondf0e9242010-09-09 16:20:55 +01002214 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002215
Chris Wilson4ef69c72010-09-09 15:14:28 +01002216 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002217 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002218
Chris Wilson4ef69c72010-09-09 15:14:28 +01002219 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002220 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002221
Chris Wilson4ef69c72010-09-09 15:14:28 +01002222 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002223
2224err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002225 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002226 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002227}
2228
2229static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002230intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002231{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002232 struct drm_encoder *encoder = &intel_sdvo->base.base;
2233 struct drm_connector *connector;
2234 struct intel_connector *intel_connector;
2235 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002236
Chris Wilson615fb932010-08-04 13:50:24 +01002237 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2238 if (!intel_sdvo_connector)
2239 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002240
Chris Wilson615fb932010-08-04 13:50:24 +01002241 intel_connector = &intel_sdvo_connector->base;
2242 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002243 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2244 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2245 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002246
Chris Wilson4ef69c72010-09-09 15:14:28 +01002247 if (device == 0) {
2248 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2249 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2250 } else if (device == 1) {
2251 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2252 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2253 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002254
Daniel Vetter66a92782012-07-12 20:08:18 +02002255 intel_sdvo->base.cloneable = true;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002256
Chris Wilsondf0e9242010-09-09 16:20:55 +01002257 intel_sdvo_connector_init(intel_sdvo_connector,
2258 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002259 return true;
2260}
2261
2262static bool
2263intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2264{
2265 struct drm_encoder *encoder = &intel_sdvo->base.base;
2266 struct drm_connector *connector;
2267 struct intel_connector *intel_connector;
2268 struct intel_sdvo_connector *intel_sdvo_connector;
2269
2270 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2271 if (!intel_sdvo_connector)
2272 return false;
2273
2274 intel_connector = &intel_sdvo_connector->base;
2275 connector = &intel_connector->base;
2276 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2277 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2278
2279 if (device == 0) {
2280 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2281 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2282 } else if (device == 1) {
2283 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2284 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2285 }
2286
Daniel Vetter66a92782012-07-12 20:08:18 +02002287 /* SDVO LVDS is cloneable because the SDVO encoder does the upscaling,
2288 * as opposed to native LVDS, where we upscale with the panel-fitter
2289 * (and hence only the native LVDS resolution could be cloned). */
2290 intel_sdvo->base.cloneable = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002291
Chris Wilsondf0e9242010-09-09 16:20:55 +01002292 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002293 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002294 goto err;
2295
2296 return true;
2297
2298err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002299 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002300 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002301}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002302
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002303static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002304intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002305{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002306 intel_sdvo->is_tv = false;
2307 intel_sdvo->base.needs_tv_clock = false;
2308 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002309
Zhenyu Wang14571b42010-03-30 14:06:33 +08002310 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002311
Zhenyu Wang14571b42010-03-30 14:06:33 +08002312 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002313 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002314 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002315
Zhenyu Wang14571b42010-03-30 14:06:33 +08002316 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002317 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002318 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002319
Zhenyu Wang14571b42010-03-30 14:06:33 +08002320 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002321 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002322 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002323 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002324
Zhenyu Wang14571b42010-03-30 14:06:33 +08002325 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002326 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002327 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002328
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002329 if (flags & SDVO_OUTPUT_YPRPB0)
2330 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2331 return false;
2332
Zhenyu Wang14571b42010-03-30 14:06:33 +08002333 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002334 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002335 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002336
Zhenyu Wang14571b42010-03-30 14:06:33 +08002337 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002338 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002339 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002340
Zhenyu Wang14571b42010-03-30 14:06:33 +08002341 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002342 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002343 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002344
Zhenyu Wang14571b42010-03-30 14:06:33 +08002345 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002346 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002347 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002348
Zhenyu Wang14571b42010-03-30 14:06:33 +08002349 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002350 unsigned char bytes[2];
2351
Chris Wilsonea5b2132010-08-04 13:50:23 +01002352 intel_sdvo->controlled_output = 0;
2353 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002354 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002355 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002356 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002357 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002358 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002359 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002360
Zhenyu Wang14571b42010-03-30 14:06:33 +08002361 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002362}
2363
Chris Wilson32aad862010-08-04 13:50:25 +01002364static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2365 struct intel_sdvo_connector *intel_sdvo_connector,
2366 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002367{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002368 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002369 struct intel_sdvo_tv_format format;
2370 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002371
Chris Wilson32aad862010-08-04 13:50:25 +01002372 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2373 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002374
Chris Wilson1a3665c2011-01-25 13:59:37 +00002375 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002376 if (!intel_sdvo_get_value(intel_sdvo,
2377 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2378 &format, sizeof(format)))
2379 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002380
Chris Wilson32aad862010-08-04 13:50:25 +01002381 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002382
2383 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002384 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002385
Chris Wilson615fb932010-08-04 13:50:24 +01002386 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002387 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002388 if (format_map & (1 << i))
2389 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002390
2391
Chris Wilsonc5521702010-08-04 13:50:28 +01002392 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002393 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2394 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002395 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002396 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002397
Chris Wilson615fb932010-08-04 13:50:24 +01002398 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002399 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002400 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002401 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002402
Chris Wilson40039752010-08-04 13:50:26 +01002403 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002404 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002405 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002406 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002407
2408}
2409
Chris Wilsonc5521702010-08-04 13:50:28 +01002410#define ENHANCEMENT(name, NAME) do { \
2411 if (enhancements.name) { \
2412 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2413 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2414 return false; \
2415 intel_sdvo_connector->max_##name = data_value[0]; \
2416 intel_sdvo_connector->cur_##name = response; \
2417 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002418 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002419 if (!intel_sdvo_connector->name) return false; \
Chris Wilsonc5521702010-08-04 13:50:28 +01002420 drm_connector_attach_property(connector, \
2421 intel_sdvo_connector->name, \
2422 intel_sdvo_connector->cur_##name); \
2423 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2424 data_value[0], data_value[1], response); \
2425 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002426} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002427
2428static bool
2429intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2430 struct intel_sdvo_connector *intel_sdvo_connector,
2431 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002432{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002433 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002434 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002435 uint16_t response, data_value[2];
2436
Chris Wilsonc5521702010-08-04 13:50:28 +01002437 /* when horizontal overscan is supported, Add the left/right property */
2438 if (enhancements.overscan_h) {
2439 if (!intel_sdvo_get_value(intel_sdvo,
2440 SDVO_CMD_GET_MAX_OVERSCAN_H,
2441 &data_value, 4))
2442 return false;
2443
2444 if (!intel_sdvo_get_value(intel_sdvo,
2445 SDVO_CMD_GET_OVERSCAN_H,
2446 &response, 2))
2447 return false;
2448
2449 intel_sdvo_connector->max_hscan = data_value[0];
2450 intel_sdvo_connector->left_margin = data_value[0] - response;
2451 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2452 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002453 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002454 if (!intel_sdvo_connector->left)
2455 return false;
2456
Chris Wilsonc5521702010-08-04 13:50:28 +01002457 drm_connector_attach_property(connector,
2458 intel_sdvo_connector->left,
2459 intel_sdvo_connector->left_margin);
2460
2461 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002462 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002463 if (!intel_sdvo_connector->right)
2464 return false;
2465
Chris Wilsonc5521702010-08-04 13:50:28 +01002466 drm_connector_attach_property(connector,
2467 intel_sdvo_connector->right,
2468 intel_sdvo_connector->right_margin);
2469 DRM_DEBUG_KMS("h_overscan: max %d, "
2470 "default %d, current %d\n",
2471 data_value[0], data_value[1], response);
2472 }
2473
2474 if (enhancements.overscan_v) {
2475 if (!intel_sdvo_get_value(intel_sdvo,
2476 SDVO_CMD_GET_MAX_OVERSCAN_V,
2477 &data_value, 4))
2478 return false;
2479
2480 if (!intel_sdvo_get_value(intel_sdvo,
2481 SDVO_CMD_GET_OVERSCAN_V,
2482 &response, 2))
2483 return false;
2484
2485 intel_sdvo_connector->max_vscan = data_value[0];
2486 intel_sdvo_connector->top_margin = data_value[0] - response;
2487 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2488 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002489 drm_property_create_range(dev, 0,
2490 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002491 if (!intel_sdvo_connector->top)
2492 return false;
2493
Chris Wilsonc5521702010-08-04 13:50:28 +01002494 drm_connector_attach_property(connector,
2495 intel_sdvo_connector->top,
2496 intel_sdvo_connector->top_margin);
2497
2498 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002499 drm_property_create_range(dev, 0,
2500 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002501 if (!intel_sdvo_connector->bottom)
2502 return false;
2503
Chris Wilsonc5521702010-08-04 13:50:28 +01002504 drm_connector_attach_property(connector,
2505 intel_sdvo_connector->bottom,
2506 intel_sdvo_connector->bottom_margin);
2507 DRM_DEBUG_KMS("v_overscan: max %d, "
2508 "default %d, current %d\n",
2509 data_value[0], data_value[1], response);
2510 }
2511
2512 ENHANCEMENT(hpos, HPOS);
2513 ENHANCEMENT(vpos, VPOS);
2514 ENHANCEMENT(saturation, SATURATION);
2515 ENHANCEMENT(contrast, CONTRAST);
2516 ENHANCEMENT(hue, HUE);
2517 ENHANCEMENT(sharpness, SHARPNESS);
2518 ENHANCEMENT(brightness, BRIGHTNESS);
2519 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2520 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2521 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2522 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2523 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2524
Chris Wilsone0442182010-08-04 13:50:29 +01002525 if (enhancements.dot_crawl) {
2526 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2527 return false;
2528
2529 intel_sdvo_connector->max_dot_crawl = 1;
2530 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2531 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002532 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002533 if (!intel_sdvo_connector->dot_crawl)
2534 return false;
2535
Chris Wilsone0442182010-08-04 13:50:29 +01002536 drm_connector_attach_property(connector,
2537 intel_sdvo_connector->dot_crawl,
2538 intel_sdvo_connector->cur_dot_crawl);
2539 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2540 }
2541
Chris Wilsonc5521702010-08-04 13:50:28 +01002542 return true;
2543}
2544
2545static bool
2546intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2547 struct intel_sdvo_connector *intel_sdvo_connector,
2548 struct intel_sdvo_enhancements_reply enhancements)
2549{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002550 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002551 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2552 uint16_t response, data_value[2];
2553
2554 ENHANCEMENT(brightness, BRIGHTNESS);
2555
2556 return true;
2557}
2558#undef ENHANCEMENT
2559
2560static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2561 struct intel_sdvo_connector *intel_sdvo_connector)
2562{
2563 union {
2564 struct intel_sdvo_enhancements_reply reply;
2565 uint16_t response;
2566 } enhancements;
2567
Chris Wilson1a3665c2011-01-25 13:59:37 +00002568 BUILD_BUG_ON(sizeof(enhancements) != 2);
2569
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002570 enhancements.response = 0;
2571 intel_sdvo_get_value(intel_sdvo,
2572 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2573 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002574 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002575 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002576 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002577 }
Chris Wilson32aad862010-08-04 13:50:25 +01002578
Chris Wilsonc5521702010-08-04 13:50:28 +01002579 if (IS_TV(intel_sdvo_connector))
2580 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002581 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002582 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2583 else
2584 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002585}
Chris Wilson32aad862010-08-04 13:50:25 +01002586
Chris Wilsone957d772010-09-24 12:52:03 +01002587static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2588 struct i2c_msg *msgs,
2589 int num)
2590{
2591 struct intel_sdvo *sdvo = adapter->algo_data;
2592
2593 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2594 return -EIO;
2595
2596 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2597}
2598
2599static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2600{
2601 struct intel_sdvo *sdvo = adapter->algo_data;
2602 return sdvo->i2c->algo->functionality(sdvo->i2c);
2603}
2604
2605static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2606 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2607 .functionality = intel_sdvo_ddc_proxy_func
2608};
2609
2610static bool
2611intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2612 struct drm_device *dev)
2613{
2614 sdvo->ddc.owner = THIS_MODULE;
2615 sdvo->ddc.class = I2C_CLASS_DDC;
2616 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2617 sdvo->ddc.dev.parent = &dev->pdev->dev;
2618 sdvo->ddc.algo_data = sdvo;
2619 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2620
2621 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002622}
2623
Daniel Vettereef4eac2012-03-23 23:43:35 +01002624bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002625{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002626 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002627 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002628 struct intel_sdvo *intel_sdvo;
Chris Wilson084b6122012-05-11 18:01:33 +01002629 u32 hotplug_mask;
Jesse Barnes79e53942008-11-07 14:24:08 -08002630 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002631
Chris Wilsonea5b2132010-08-04 13:50:23 +01002632 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2633 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002634 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002635
Chris Wilson56184e32011-05-17 14:03:50 +01002636 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002637 intel_sdvo->is_sdvob = is_sdvob;
2638 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002639 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002640 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2641 goto err_i2c_bus;
Chris Wilsone957d772010-09-24 12:52:03 +01002642
Chris Wilson56184e32011-05-17 14:03:50 +01002643 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002644 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002645 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002646 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002647
Jesse Barnes79e53942008-11-07 14:24:08 -08002648 /* Read the regs to test if we can talk to the device */
2649 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002650 u8 byte;
2651
2652 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002653 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2654 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002655 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002656 }
2657 }
2658
Chris Wilson084b6122012-05-11 18:01:33 +01002659 hotplug_mask = 0;
2660 if (IS_G4X(dev)) {
2661 hotplug_mask = intel_sdvo->is_sdvob ?
2662 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2663 } else if (IS_GEN4(dev)) {
2664 hotplug_mask = intel_sdvo->is_sdvob ?
2665 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2666 } else {
2667 hotplug_mask = intel_sdvo->is_sdvob ?
2668 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2669 }
Ma Ling619ac3b2009-05-18 16:12:46 +08002670
Chris Wilson4ef69c72010-09-09 15:14:28 +01002671 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002672
Daniel Vetterce22c322012-07-01 15:31:04 +02002673 intel_encoder->disable = intel_disable_sdvo;
2674 intel_encoder->enable = intel_enable_sdvo;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002675 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
Daniel Vetterce22c322012-07-01 15:31:04 +02002676
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002677 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002678 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002679 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002680
Chris Wilsonea5b2132010-08-04 13:50:23 +01002681 if (intel_sdvo_output_setup(intel_sdvo,
2682 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002683 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2684 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002685 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002686 }
2687
Jani Nikulafcbc50d2012-08-29 14:08:42 +03002688 /* Only enable the hotplug irq if we need it, to work around noisy
2689 * hotplug lines.
2690 */
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002691 if (intel_sdvo->hotplug_active)
Jani Nikulafcbc50d2012-08-29 14:08:42 +03002692 dev_priv->hotplug_supported_mask |= hotplug_mask;
2693
Chris Wilsonea5b2132010-08-04 13:50:23 +01002694 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002695
Jesse Barnes79e53942008-11-07 14:24:08 -08002696 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002697 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002698 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002699
Chris Wilson32aad862010-08-04 13:50:25 +01002700 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2701 &intel_sdvo->pixel_clock_min,
2702 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002703 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002704
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002705 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002706 "clock range %dMHz - %dMHz, "
2707 "input 1: %c, input 2: %c, "
2708 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002709 SDVO_NAME(intel_sdvo),
2710 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2711 intel_sdvo->caps.device_rev_id,
2712 intel_sdvo->pixel_clock_min / 1000,
2713 intel_sdvo->pixel_clock_max / 1000,
2714 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2715 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002716 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002717 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002718 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002719 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002720 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002721 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002722
Chris Wilsonf899fc62010-07-20 15:44:45 -07002723err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002724 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002725 i2c_del_adapter(&intel_sdvo->ddc);
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002726err_i2c_bus:
2727 intel_sdvo_unselect_i2c_bus(intel_sdvo);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002728 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002729
Eric Anholt7d573822009-01-02 13:33:00 -08002730 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002731}