blob: b1d77e13d1c26cfb29a60f58f7458850ebbbb3b8 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
Jiri Pirko22a67762017-02-03 10:29:07 +01003 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
Jiri Pirko56ade8f2015-10-16 14:01:37 +02005 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Yotam Gigi98d0f7b2017-01-23 11:07:11 +010060#include <net/tc_act/tc_sample.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020061
62#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020063#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020064#include "core.h"
65#include "reg.h"
66#include "port.h"
67#include "trap.h"
68#include "txheader.h"
69
70static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
71static const char mlxsw_sp_driver_version[] = "1.0";
72
73/* tx_hdr_version
74 * Tx header version.
75 * Must be set to 1.
76 */
77MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
78
79/* tx_hdr_ctl
80 * Packet control type.
81 * 0 - Ethernet control (e.g. EMADs, LACP)
82 * 1 - Ethernet data
83 */
84MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
85
86/* tx_hdr_proto
87 * Packet protocol type. Must be set to 1 (Ethernet).
88 */
89MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
90
91/* tx_hdr_rx_is_router
92 * Packet is sent from the router. Valid for data packets only.
93 */
94MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
95
96/* tx_hdr_fid_valid
97 * Indicates if the 'fid' field is valid and should be used for
98 * forwarding lookup. Valid for data packets only.
99 */
100MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
101
102/* tx_hdr_swid
103 * Switch partition ID. Must be set to 0.
104 */
105MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
106
107/* tx_hdr_control_tclass
108 * Indicates if the packet should use the control TClass and not one
109 * of the data TClasses.
110 */
111MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
112
113/* tx_hdr_etclass
114 * Egress TClass to be used on the egress device on the egress port.
115 */
116MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
117
118/* tx_hdr_port_mid
119 * Destination local port for unicast packets.
120 * Destination multicast ID for multicast packets.
121 *
122 * Control packets are directed to a specific egress port, while data
123 * packets are transmitted through the CPU port (0) into the switch partition,
124 * where forwarding rules are applied.
125 */
126MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
127
128/* tx_hdr_fid
129 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
130 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
131 * Valid for data packets only.
132 */
133MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
134
135/* tx_hdr_type
136 * 0 - Data packets
137 * 6 - Control packets
138 */
139MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
140
141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
Elad Raz5b090742016-10-28 21:35:46 +0200159 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200171 int i;
172
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200173 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200174 return -EIO;
175
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200176 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
177 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200178 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
179 sizeof(struct mlxsw_sp_span_entry),
180 GFP_KERNEL);
181 if (!mlxsw_sp->span.entries)
182 return -ENOMEM;
183
184 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
185 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
186
187 return 0;
188}
189
190static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
191{
192 int i;
193
194 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
195 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
196
197 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
198 }
199 kfree(mlxsw_sp->span.entries);
200}
201
202static struct mlxsw_sp_span_entry *
203mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
204{
205 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
206 struct mlxsw_sp_span_entry *span_entry;
207 char mpat_pl[MLXSW_REG_MPAT_LEN];
208 u8 local_port = port->local_port;
209 int index;
210 int i;
211 int err;
212
213 /* find a free entry to use */
214 index = -1;
215 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
216 if (!mlxsw_sp->span.entries[i].used) {
217 index = i;
218 span_entry = &mlxsw_sp->span.entries[i];
219 break;
220 }
221 }
222 if (index < 0)
223 return NULL;
224
225 /* create a new port analayzer entry for local_port */
226 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
227 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
228 if (err)
229 return NULL;
230
231 span_entry->used = true;
232 span_entry->id = index;
Yotam Gigi2d644d42016-11-11 16:34:25 +0100233 span_entry->ref_count = 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200234 span_entry->local_port = local_port;
235 return span_entry;
236}
237
238static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
239 struct mlxsw_sp_span_entry *span_entry)
240{
241 u8 local_port = span_entry->local_port;
242 char mpat_pl[MLXSW_REG_MPAT_LEN];
243 int pa_id = span_entry->id;
244
245 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
246 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
247 span_entry->used = false;
248}
249
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200250static struct mlxsw_sp_span_entry *
251mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200252{
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
254 int i;
255
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258
259 if (curr->used && curr->local_port == port->local_port)
260 return curr;
261 }
262 return NULL;
263}
264
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200265static struct mlxsw_sp_span_entry
266*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200267{
268 struct mlxsw_sp_span_entry *span_entry;
269
270 span_entry = mlxsw_sp_span_entry_find(port);
271 if (span_entry) {
Yotam Gigi2d644d42016-11-11 16:34:25 +0100272 /* Already exists, just take a reference */
Yotam Gigi763b4b72016-07-21 12:03:17 +0200273 span_entry->ref_count++;
274 return span_entry;
275 }
276
277 return mlxsw_sp_span_entry_create(port);
278}
279
280static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
281 struct mlxsw_sp_span_entry *span_entry)
282{
Yotam Gigi2d644d42016-11-11 16:34:25 +0100283 WARN_ON(!span_entry->ref_count);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200284 if (--span_entry->ref_count == 0)
285 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
286 return 0;
287}
288
289static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
290{
291 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
292 struct mlxsw_sp_span_inspected_port *p;
293 int i;
294
295 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
296 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
297
298 list_for_each_entry(p, &curr->bound_ports_list, list)
299 if (p->local_port == port->local_port &&
300 p->type == MLXSW_SP_SPAN_EGRESS)
301 return true;
302 }
303
304 return false;
305}
306
307static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
308{
309 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
310}
311
312static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
313{
314 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
315 char sbib_pl[MLXSW_REG_SBIB_LEN];
316 int err;
317
318 /* If port is egress mirrored, the shared buffer size should be
319 * updated according to the mtu value
320 */
321 if (mlxsw_sp_span_is_egress_mirror(port)) {
322 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
323 mlxsw_sp_span_mtu_to_buffsize(mtu));
324 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
325 if (err) {
326 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
327 return err;
328 }
329 }
330
331 return 0;
332}
333
334static struct mlxsw_sp_span_inspected_port *
335mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
336 struct mlxsw_sp_span_entry *span_entry)
337{
338 struct mlxsw_sp_span_inspected_port *p;
339
340 list_for_each_entry(p, &span_entry->bound_ports_list, list)
341 if (port->local_port == p->local_port)
342 return p;
343 return NULL;
344}
345
346static int
347mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
348 struct mlxsw_sp_span_entry *span_entry,
349 enum mlxsw_sp_span_type type)
350{
351 struct mlxsw_sp_span_inspected_port *inspected_port;
352 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
353 char mpar_pl[MLXSW_REG_MPAR_LEN];
354 char sbib_pl[MLXSW_REG_SBIB_LEN];
355 int pa_id = span_entry->id;
356 int err;
357
358 /* if it is an egress SPAN, bind a shared buffer to it */
359 if (type == MLXSW_SP_SPAN_EGRESS) {
360 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
361 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
362 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
363 if (err) {
364 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
365 return err;
366 }
367 }
368
369 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200370 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
371 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200372 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
373 if (err)
374 goto err_mpar_reg_write;
375
376 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
377 if (!inspected_port) {
378 err = -ENOMEM;
379 goto err_inspected_port_alloc;
380 }
381 inspected_port->local_port = port->local_port;
382 inspected_port->type = type;
383 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
384
385 return 0;
386
387err_mpar_reg_write:
388err_inspected_port_alloc:
389 if (type == MLXSW_SP_SPAN_EGRESS) {
390 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
391 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
392 }
393 return err;
394}
395
396static void
397mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
398 struct mlxsw_sp_span_entry *span_entry,
399 enum mlxsw_sp_span_type type)
400{
401 struct mlxsw_sp_span_inspected_port *inspected_port;
402 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
403 char mpar_pl[MLXSW_REG_MPAR_LEN];
404 char sbib_pl[MLXSW_REG_SBIB_LEN];
405 int pa_id = span_entry->id;
406
407 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
408 if (!inspected_port)
409 return;
410
411 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200412 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
413 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
415
416 /* remove the SBIB buffer if it was egress SPAN */
417 if (type == MLXSW_SP_SPAN_EGRESS) {
418 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
419 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
420 }
421
422 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
423
424 list_del(&inspected_port->list);
425 kfree(inspected_port);
426}
427
428static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
429 struct mlxsw_sp_port *to,
430 enum mlxsw_sp_span_type type)
431{
432 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
433 struct mlxsw_sp_span_entry *span_entry;
434 int err;
435
436 span_entry = mlxsw_sp_span_entry_get(to);
437 if (!span_entry)
438 return -ENOENT;
439
440 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
441 span_entry->id);
442
443 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
444 if (err)
445 goto err_port_bind;
446
447 return 0;
448
449err_port_bind:
450 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
451 return err;
452}
453
454static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
455 struct mlxsw_sp_port *to,
456 enum mlxsw_sp_span_type type)
457{
458 struct mlxsw_sp_span_entry *span_entry;
459
460 span_entry = mlxsw_sp_span_entry_find(to);
461 if (!span_entry) {
462 netdev_err(from->dev, "no span entry found\n");
463 return;
464 }
465
466 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
467 span_entry->id);
468 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
469}
470
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100471static int mlxsw_sp_port_sample_set(struct mlxsw_sp_port *mlxsw_sp_port,
472 bool enable, u32 rate)
473{
474 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
475 char mpsc_pl[MLXSW_REG_MPSC_LEN];
476
477 mlxsw_reg_mpsc_pack(mpsc_pl, mlxsw_sp_port->local_port, enable, rate);
478 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpsc), mpsc_pl);
479}
480
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200481static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
482 bool is_up)
483{
484 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
485 char paos_pl[MLXSW_REG_PAOS_LEN];
486
487 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
488 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
489 MLXSW_PORT_ADMIN_STATUS_DOWN);
490 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
491}
492
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200493static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
494 unsigned char *addr)
495{
496 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
497 char ppad_pl[MLXSW_REG_PPAD_LEN];
498
499 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
500 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
501 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
502}
503
504static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
505{
506 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
507 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
508
509 ether_addr_copy(addr, mlxsw_sp->base_mac);
510 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
511 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
512}
513
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200514static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
515{
516 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
517 char pmtu_pl[MLXSW_REG_PMTU_LEN];
518 int max_mtu;
519 int err;
520
521 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
522 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
523 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
524 if (err)
525 return err;
526 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
527
528 if (mtu > max_mtu)
529 return -EINVAL;
530
531 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
532 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
533}
534
Ido Schimmelbe945352016-06-09 09:51:39 +0200535static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
536 u8 swid)
537{
538 char pspa_pl[MLXSW_REG_PSPA_LEN];
539
540 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
541 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
542}
543
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200544static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
545{
546 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200547
Ido Schimmelbe945352016-06-09 09:51:39 +0200548 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
549 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200550}
551
552static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
553 bool enable)
554{
555 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
556 char svpe_pl[MLXSW_REG_SVPE_LEN];
557
558 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
559 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
560}
561
562int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
563 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
564 u16 vid)
565{
566 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
567 char svfa_pl[MLXSW_REG_SVFA_LEN];
568
569 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
570 fid, vid);
571 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
572}
573
Ido Schimmel584d73d2016-08-24 12:00:26 +0200574int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
575 u16 vid_begin, u16 vid_end,
576 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200577{
578 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
579 char *spvmlr_pl;
580 int err;
581
582 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
583 if (!spvmlr_pl)
584 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200585 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
586 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200587 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
588 kfree(spvmlr_pl);
589 return err;
590}
591
Ido Schimmel584d73d2016-08-24 12:00:26 +0200592static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
593 u16 vid, bool learn_enable)
594{
595 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
596 learn_enable);
597}
598
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200599static int
600mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
601{
602 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
603 char sspr_pl[MLXSW_REG_SSPR_LEN];
604
605 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
606 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
607}
608
Ido Schimmeld664b412016-06-09 09:51:40 +0200609static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
610 u8 local_port, u8 *p_module,
611 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200612{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200613 char pmlp_pl[MLXSW_REG_PMLP_LEN];
614 int err;
615
Ido Schimmel558c2d52016-02-26 17:32:29 +0100616 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200617 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
618 if (err)
619 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100620 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
621 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200622 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200623 return 0;
624}
625
Ido Schimmel18f1e702016-02-26 17:32:31 +0100626static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
627 u8 module, u8 width, u8 lane)
628{
629 char pmlp_pl[MLXSW_REG_PMLP_LEN];
630 int i;
631
632 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
633 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
634 for (i = 0; i < width; i++) {
635 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
636 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
637 }
638
639 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
640}
641
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100642static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
643{
644 char pmlp_pl[MLXSW_REG_PMLP_LEN];
645
646 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
647 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
648 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
649}
650
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200651static int mlxsw_sp_port_open(struct net_device *dev)
652{
653 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
654 int err;
655
656 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
657 if (err)
658 return err;
659 netif_start_queue(dev);
660 return 0;
661}
662
663static int mlxsw_sp_port_stop(struct net_device *dev)
664{
665 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
666
667 netif_stop_queue(dev);
668 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
669}
670
671static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
672 struct net_device *dev)
673{
674 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
675 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
676 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
677 const struct mlxsw_tx_info tx_info = {
678 .local_port = mlxsw_sp_port->local_port,
679 .is_emad = false,
680 };
681 u64 len;
682 int err;
683
Jiri Pirko307c2432016-04-08 19:11:22 +0200684 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200685 return NETDEV_TX_BUSY;
686
687 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
688 struct sk_buff *skb_orig = skb;
689
690 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
691 if (!skb) {
692 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
693 dev_kfree_skb_any(skb_orig);
694 return NETDEV_TX_OK;
695 }
Arkadi Sharshevsky36bf38d2017-01-12 09:10:37 +0100696 dev_consume_skb_any(skb_orig);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200697 }
698
699 if (eth_skb_pad(skb)) {
700 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
701 return NETDEV_TX_OK;
702 }
703
704 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200705 /* TX header is consumed by HW on the way so we shouldn't count its
706 * bytes as being sent.
707 */
708 len = skb->len - MLXSW_TXHDR_LEN;
709
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200710 /* Due to a race we might fail here because of a full queue. In that
711 * unlikely case we simply drop the packet.
712 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200713 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200714
715 if (!err) {
716 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
717 u64_stats_update_begin(&pcpu_stats->syncp);
718 pcpu_stats->tx_packets++;
719 pcpu_stats->tx_bytes += len;
720 u64_stats_update_end(&pcpu_stats->syncp);
721 } else {
722 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
723 dev_kfree_skb_any(skb);
724 }
725 return NETDEV_TX_OK;
726}
727
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100728static void mlxsw_sp_set_rx_mode(struct net_device *dev)
729{
730}
731
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200732static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
733{
734 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
735 struct sockaddr *addr = p;
736 int err;
737
738 if (!is_valid_ether_addr(addr->sa_data))
739 return -EADDRNOTAVAIL;
740
741 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
742 if (err)
743 return err;
744 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
745 return 0;
746}
747
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200748static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200749 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200750{
751 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
752
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200753 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
754 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200755
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200756 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200757 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200758 pg_size + delay, pg_size);
759 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200760 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761}
762
763int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200764 u8 *prio_tc, bool pause_en,
765 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200766{
767 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200768 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
769 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200770 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200771 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200772
773 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
774 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
775 if (err)
776 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200777
778 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
779 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200780 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200781
782 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
783 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200784 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200785 configure = true;
786 break;
787 }
788 }
789
790 if (!configure)
791 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200792 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200793 }
794
Ido Schimmelff6551e2016-04-06 17:10:03 +0200795 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
796}
797
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200798static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200799 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200800{
801 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
802 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200803 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200804 u8 *prio_tc;
805
806 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200807 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200808
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200809 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200810 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200811}
812
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200813static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
814{
815 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200816 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200817 int err;
818
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200819 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200820 if (err)
821 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200822 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
823 if (err)
824 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200825 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
826 if (err)
827 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200828 dev->mtu = mtu;
829 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200830
831err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200832 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
833err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200834 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200835 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200836}
837
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300838static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200839mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
840 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200841{
842 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
843 struct mlxsw_sp_port_pcpu_stats *p;
844 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
845 u32 tx_dropped = 0;
846 unsigned int start;
847 int i;
848
849 for_each_possible_cpu(i) {
850 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
851 do {
852 start = u64_stats_fetch_begin_irq(&p->syncp);
853 rx_packets = p->rx_packets;
854 rx_bytes = p->rx_bytes;
855 tx_packets = p->tx_packets;
856 tx_bytes = p->tx_bytes;
857 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
858
859 stats->rx_packets += rx_packets;
860 stats->rx_bytes += rx_bytes;
861 stats->tx_packets += tx_packets;
862 stats->tx_bytes += tx_bytes;
863 /* tx_dropped is u32, updated without syncp protection. */
864 tx_dropped += p->tx_dropped;
865 }
866 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200867 return 0;
868}
869
Or Gerlitz3df5b3c2016-11-22 23:09:54 +0200870static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200871{
872 switch (attr_id) {
873 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
874 return true;
875 }
876
877 return false;
878}
879
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300880static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
881 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200882{
883 switch (attr_id) {
884 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
885 return mlxsw_sp_port_get_sw_stats64(dev, sp);
886 }
887
888 return -EINVAL;
889}
890
891static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
892 int prio, char *ppcnt_pl)
893{
894 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
895 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
896
897 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
898 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
899}
900
901static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
902 struct rtnl_link_stats64 *stats)
903{
904 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
905 int err;
906
907 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
908 0, ppcnt_pl);
909 if (err)
910 goto out;
911
912 stats->tx_packets =
913 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
914 stats->rx_packets =
915 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
916 stats->tx_bytes =
917 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
918 stats->rx_bytes =
919 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
920 stats->multicast =
921 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
922
923 stats->rx_crc_errors =
924 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
925 stats->rx_frame_errors =
926 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
927
928 stats->rx_length_errors = (
929 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
930 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
931 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
932
933 stats->rx_errors = (stats->rx_crc_errors +
934 stats->rx_frame_errors + stats->rx_length_errors);
935
936out:
937 return err;
938}
939
940static void update_stats_cache(struct work_struct *work)
941{
942 struct mlxsw_sp_port *mlxsw_sp_port =
943 container_of(work, struct mlxsw_sp_port,
944 hw_stats.update_dw.work);
945
946 if (!netif_carrier_ok(mlxsw_sp_port->dev))
947 goto out;
948
949 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
950 mlxsw_sp_port->hw_stats.cache);
951
952out:
953 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
954 MLXSW_HW_STATS_UPDATE_TIME);
955}
956
957/* Return the stats from a cache that is updated periodically,
958 * as this function might get called in an atomic context.
959 */
stephen hemmingerbc1f4472017-01-06 19:12:52 -0800960static void
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200961mlxsw_sp_port_get_stats64(struct net_device *dev,
962 struct rtnl_link_stats64 *stats)
963{
964 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
965
966 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200967}
968
969int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
970 u16 vid_end, bool is_member, bool untagged)
971{
972 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
973 char *spvm_pl;
974 int err;
975
976 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
977 if (!spvm_pl)
978 return -ENOMEM;
979
980 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
981 vid_end, is_member, untagged);
982 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
983 kfree(spvm_pl);
984 return err;
985}
986
987static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
988{
989 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
990 u16 vid, last_visited_vid;
991 int err;
992
993 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
994 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
995 vid);
996 if (err) {
997 last_visited_vid = vid;
998 goto err_port_vid_to_fid_set;
999 }
1000 }
1001
1002 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
1003 if (err) {
1004 last_visited_vid = VLAN_N_VID;
1005 goto err_port_vid_to_fid_set;
1006 }
1007
1008 return 0;
1009
1010err_port_vid_to_fid_set:
1011 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1012 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1013 vid);
1014 return err;
1015}
1016
1017static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1018{
1019 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1020 u16 vid;
1021 int err;
1022
1023 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1024 if (err)
1025 return err;
1026
1027 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1028 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1029 vid, vid);
1030 if (err)
1031 return err;
1032 }
1033
1034 return 0;
1035}
1036
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001037static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001038mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001039{
1040 struct mlxsw_sp_port *mlxsw_sp_vport;
1041
1042 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1043 if (!mlxsw_sp_vport)
1044 return NULL;
1045
1046 /* dev will be set correctly after the VLAN device is linked
1047 * with the real device. In case of bridge SELF invocation, dev
1048 * will remain as is.
1049 */
1050 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1051 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1052 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1053 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001054 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1055 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001056 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001057
1058 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1059
1060 return mlxsw_sp_vport;
1061}
1062
1063static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1064{
1065 list_del(&mlxsw_sp_vport->vport.list);
1066 kfree(mlxsw_sp_vport);
1067}
1068
Ido Schimmel05978482016-08-17 16:39:30 +02001069static int mlxsw_sp_port_add_vid(struct net_device *dev,
1070 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001071{
1072 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001073 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001074 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001075 int err;
1076
1077 /* VLAN 0 is added to HW filter when device goes up, but it is
1078 * reserved in our case, so simply return.
1079 */
1080 if (!vid)
1081 return 0;
1082
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001083 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001084 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001085
Ido Schimmel0355b592016-06-20 23:04:13 +02001086 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001087 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001088 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001089
1090 /* When adding the first VLAN interface on a bridged port we need to
1091 * transition all the active 802.1Q bridge VLANs to use explicit
1092 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1093 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001094 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001095 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001096 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001097 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001098 }
1099
Ido Schimmel52697a92016-07-02 11:00:09 +02001100 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001101 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001102 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001103
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001104 return 0;
1105
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001106err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001107 if (list_is_singular(&mlxsw_sp_port->vports_list))
1108 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1109err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001110 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001111 return err;
1112}
1113
Ido Schimmel32d863f2016-07-02 11:00:10 +02001114static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1115 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001116{
1117 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001118 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001119 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001120
1121 /* VLAN 0 is removed from HW filter when device goes down, but
1122 * it is reserved in our case, so simply return.
1123 */
1124 if (!vid)
1125 return 0;
1126
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001127 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001128 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001129 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001130
Ido Schimmel7a355832016-08-17 16:39:28 +02001131 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001132
Ido Schimmel1c800752016-06-20 23:04:20 +02001133 /* Drop FID reference. If this was the last reference the
1134 * resources will be freed.
1135 */
1136 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1137 if (f && !WARN_ON(!f->leave))
1138 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001139
1140 /* When removing the last VLAN interface on a bridged port we need to
1141 * transition all active 802.1Q bridge VLANs to use VID to FID
1142 * mappings and set port's mode to VLAN mode.
1143 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001144 if (list_is_singular(&mlxsw_sp_port->vports_list))
1145 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001146
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001147 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1148
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001149 return 0;
1150}
1151
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001152static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1153 size_t len)
1154{
1155 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001156 u8 module = mlxsw_sp_port->mapping.module;
1157 u8 width = mlxsw_sp_port->mapping.width;
1158 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001159 int err;
1160
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001161 if (!mlxsw_sp_port->split)
1162 err = snprintf(name, len, "p%d", module + 1);
1163 else
1164 err = snprintf(name, len, "p%ds%d", module + 1,
1165 lane / width);
1166
1167 if (err >= len)
1168 return -EINVAL;
1169
1170 return 0;
1171}
1172
Yotam Gigi763b4b72016-07-21 12:03:17 +02001173static struct mlxsw_sp_port_mall_tc_entry *
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001174mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1175 unsigned long cookie) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001176 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1177
1178 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1179 if (mall_tc_entry->cookie == cookie)
1180 return mall_tc_entry;
1181
1182 return NULL;
1183}
1184
1185static int
1186mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001187 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001188 const struct tc_action *a,
1189 bool ingress)
1190{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001191 struct net *net = dev_net(mlxsw_sp_port->dev);
1192 enum mlxsw_sp_span_type span_type;
1193 struct mlxsw_sp_port *to_port;
1194 struct net_device *to_dev;
1195 int ifindex;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001196
1197 ifindex = tcf_mirred_ifindex(a);
1198 to_dev = __dev_get_by_index(net, ifindex);
1199 if (!to_dev) {
1200 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1201 return -EINVAL;
1202 }
1203
1204 if (!mlxsw_sp_port_dev_check(to_dev)) {
1205 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
Yotam Gigie915ac62017-01-09 11:25:48 +01001206 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001207 }
1208 to_port = netdev_priv(to_dev);
1209
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001210 mirror->to_local_port = to_port->local_port;
1211 mirror->ingress = ingress;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001212 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001213 return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1214}
Yotam Gigi763b4b72016-07-21 12:03:17 +02001215
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001216static void
1217mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1218 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1219{
1220 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1221 enum mlxsw_sp_span_type span_type;
1222 struct mlxsw_sp_port *to_port;
1223
1224 to_port = mlxsw_sp->ports[mirror->to_local_port];
1225 span_type = mirror->ingress ?
1226 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1227 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001228}
1229
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001230static int
1231mlxsw_sp_port_add_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port,
1232 struct tc_cls_matchall_offload *cls,
1233 const struct tc_action *a,
1234 bool ingress)
1235{
1236 int err;
1237
1238 if (!mlxsw_sp_port->sample)
1239 return -EOPNOTSUPP;
1240 if (rtnl_dereference(mlxsw_sp_port->sample->psample_group)) {
1241 netdev_err(mlxsw_sp_port->dev, "sample already active\n");
1242 return -EEXIST;
1243 }
1244 if (tcf_sample_rate(a) > MLXSW_REG_MPSC_RATE_MAX) {
1245 netdev_err(mlxsw_sp_port->dev, "sample rate not supported\n");
1246 return -EOPNOTSUPP;
1247 }
1248
1249 rcu_assign_pointer(mlxsw_sp_port->sample->psample_group,
1250 tcf_sample_psample_group(a));
1251 mlxsw_sp_port->sample->truncate = tcf_sample_truncate(a);
1252 mlxsw_sp_port->sample->trunc_size = tcf_sample_trunc_size(a);
1253 mlxsw_sp_port->sample->rate = tcf_sample_rate(a);
1254
1255 err = mlxsw_sp_port_sample_set(mlxsw_sp_port, true, tcf_sample_rate(a));
1256 if (err)
1257 goto err_port_sample_set;
1258 return 0;
1259
1260err_port_sample_set:
1261 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1262 return err;
1263}
1264
1265static void
1266mlxsw_sp_port_del_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port)
1267{
1268 if (!mlxsw_sp_port->sample)
1269 return;
1270
1271 mlxsw_sp_port_sample_set(mlxsw_sp_port, false, 1);
1272 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1273}
1274
Yotam Gigi763b4b72016-07-21 12:03:17 +02001275static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1276 __be16 protocol,
1277 struct tc_cls_matchall_offload *cls,
1278 bool ingress)
1279{
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001280 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001281 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001282 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001283 int err;
1284
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001285 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001286 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
Yotam Gigie915ac62017-01-09 11:25:48 +01001287 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001288 }
1289
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001290 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1291 if (!mall_tc_entry)
1292 return -ENOMEM;
1293 mall_tc_entry->cookie = cls->cookie;
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001294
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001295 tcf_exts_to_list(cls->exts, &actions);
1296 a = list_first_entry(&actions, struct tc_action, list);
1297
1298 if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1299 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1300
1301 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1302 mirror = &mall_tc_entry->mirror;
1303 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1304 mirror, a, ingress);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001305 } else if (is_tcf_sample(a) && protocol == htons(ETH_P_ALL)) {
1306 mall_tc_entry->type = MLXSW_SP_PORT_MALL_SAMPLE;
1307 err = mlxsw_sp_port_add_cls_matchall_sample(mlxsw_sp_port, cls,
1308 a, ingress);
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001309 } else {
1310 err = -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001311 }
1312
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001313 if (err)
1314 goto err_add_action;
1315
1316 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001317 return 0;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001318
1319err_add_action:
1320 kfree(mall_tc_entry);
1321 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001322}
1323
1324static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1325 struct tc_cls_matchall_offload *cls)
1326{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001327 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001328
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001329 mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1330 cls->cookie);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001331 if (!mall_tc_entry) {
1332 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1333 return;
1334 }
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001335 list_del(&mall_tc_entry->list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001336
1337 switch (mall_tc_entry->type) {
1338 case MLXSW_SP_PORT_MALL_MIRROR:
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001339 mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1340 &mall_tc_entry->mirror);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001341 break;
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001342 case MLXSW_SP_PORT_MALL_SAMPLE:
1343 mlxsw_sp_port_del_cls_matchall_sample(mlxsw_sp_port);
1344 break;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001345 default:
1346 WARN_ON(1);
1347 }
1348
Yotam Gigi763b4b72016-07-21 12:03:17 +02001349 kfree(mall_tc_entry);
1350}
1351
1352static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1353 __be16 proto, struct tc_to_netdev *tc)
1354{
1355 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1356 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1357
1358 if (tc->type == TC_SETUP_MATCHALL) {
1359 switch (tc->cls_mall->command) {
1360 case TC_CLSMATCHALL_REPLACE:
1361 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1362 proto,
1363 tc->cls_mall,
1364 ingress);
1365 case TC_CLSMATCHALL_DESTROY:
1366 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1367 tc->cls_mall);
1368 return 0;
1369 default:
1370 return -EINVAL;
1371 }
1372 }
1373
Yotam Gigie915ac62017-01-09 11:25:48 +01001374 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001375}
1376
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001377static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1378 .ndo_open = mlxsw_sp_port_open,
1379 .ndo_stop = mlxsw_sp_port_stop,
1380 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001381 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001382 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001383 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1384 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1385 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001386 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1387 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001388 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1389 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001390 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1391 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001392 .ndo_fdb_add = switchdev_port_fdb_add,
1393 .ndo_fdb_del = switchdev_port_fdb_del,
1394 .ndo_fdb_dump = switchdev_port_fdb_dump,
1395 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1396 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1397 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001398 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001399};
1400
1401static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1402 struct ethtool_drvinfo *drvinfo)
1403{
1404 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1405 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1406
1407 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1408 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1409 sizeof(drvinfo->version));
1410 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1411 "%d.%d.%d",
1412 mlxsw_sp->bus_info->fw_rev.major,
1413 mlxsw_sp->bus_info->fw_rev.minor,
1414 mlxsw_sp->bus_info->fw_rev.subminor);
1415 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1416 sizeof(drvinfo->bus_info));
1417}
1418
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001419static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1420 struct ethtool_pauseparam *pause)
1421{
1422 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1423
1424 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1425 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1426}
1427
1428static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1429 struct ethtool_pauseparam *pause)
1430{
1431 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1432
1433 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1434 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1435 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1436
1437 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1438 pfcc_pl);
1439}
1440
1441static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1442 struct ethtool_pauseparam *pause)
1443{
1444 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1445 bool pause_en = pause->tx_pause || pause->rx_pause;
1446 int err;
1447
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001448 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1449 netdev_err(dev, "PFC already enabled on port\n");
1450 return -EINVAL;
1451 }
1452
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001453 if (pause->autoneg) {
1454 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1455 return -EINVAL;
1456 }
1457
1458 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1459 if (err) {
1460 netdev_err(dev, "Failed to configure port's headroom\n");
1461 return err;
1462 }
1463
1464 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1465 if (err) {
1466 netdev_err(dev, "Failed to set PAUSE parameters\n");
1467 goto err_port_pause_configure;
1468 }
1469
1470 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1471 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1472
1473 return 0;
1474
1475err_port_pause_configure:
1476 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1477 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1478 return err;
1479}
1480
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001481struct mlxsw_sp_port_hw_stats {
1482 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001483 u64 (*getter)(const char *payload);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001484};
1485
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001486static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001487 {
1488 .str = "a_frames_transmitted_ok",
1489 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1490 },
1491 {
1492 .str = "a_frames_received_ok",
1493 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1494 },
1495 {
1496 .str = "a_frame_check_sequence_errors",
1497 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1498 },
1499 {
1500 .str = "a_alignment_errors",
1501 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1502 },
1503 {
1504 .str = "a_octets_transmitted_ok",
1505 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1506 },
1507 {
1508 .str = "a_octets_received_ok",
1509 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1510 },
1511 {
1512 .str = "a_multicast_frames_xmitted_ok",
1513 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1514 },
1515 {
1516 .str = "a_broadcast_frames_xmitted_ok",
1517 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1518 },
1519 {
1520 .str = "a_multicast_frames_received_ok",
1521 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1522 },
1523 {
1524 .str = "a_broadcast_frames_received_ok",
1525 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1526 },
1527 {
1528 .str = "a_in_range_length_errors",
1529 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1530 },
1531 {
1532 .str = "a_out_of_range_length_field",
1533 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1534 },
1535 {
1536 .str = "a_frame_too_long_errors",
1537 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1538 },
1539 {
1540 .str = "a_symbol_error_during_carrier",
1541 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1542 },
1543 {
1544 .str = "a_mac_control_frames_transmitted",
1545 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1546 },
1547 {
1548 .str = "a_mac_control_frames_received",
1549 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1550 },
1551 {
1552 .str = "a_unsupported_opcodes_received",
1553 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1554 },
1555 {
1556 .str = "a_pause_mac_ctrl_frames_received",
1557 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1558 },
1559 {
1560 .str = "a_pause_mac_ctrl_frames_xmitted",
1561 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1562 },
1563};
1564
1565#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1566
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001567static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1568 {
1569 .str = "rx_octets_prio",
1570 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1571 },
1572 {
1573 .str = "rx_frames_prio",
1574 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1575 },
1576 {
1577 .str = "tx_octets_prio",
1578 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1579 },
1580 {
1581 .str = "tx_frames_prio",
1582 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1583 },
1584 {
1585 .str = "rx_pause_prio",
1586 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1587 },
1588 {
1589 .str = "rx_pause_duration_prio",
1590 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1591 },
1592 {
1593 .str = "tx_pause_prio",
1594 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1595 },
1596 {
1597 .str = "tx_pause_duration_prio",
1598 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1599 },
1600};
1601
1602#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1603
Jiri Pirko412791d2016-10-21 16:07:19 +02001604static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001605{
1606 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1607
1608 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1609}
1610
1611static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1612 {
1613 .str = "tc_transmit_queue_tc",
1614 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1615 },
1616 {
1617 .str = "tc_no_buffer_discard_uc_tc",
1618 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1619 },
1620};
1621
1622#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1623
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001624#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001625 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1626 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001627 IEEE_8021QAZ_MAX_TCS)
1628
1629static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1630{
1631 int i;
1632
1633 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1634 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1635 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1636 *p += ETH_GSTRING_LEN;
1637 }
1638}
1639
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001640static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1641{
1642 int i;
1643
1644 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1645 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1646 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1647 *p += ETH_GSTRING_LEN;
1648 }
1649}
1650
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001651static void mlxsw_sp_port_get_strings(struct net_device *dev,
1652 u32 stringset, u8 *data)
1653{
1654 u8 *p = data;
1655 int i;
1656
1657 switch (stringset) {
1658 case ETH_SS_STATS:
1659 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1660 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1661 ETH_GSTRING_LEN);
1662 p += ETH_GSTRING_LEN;
1663 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001664
1665 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1666 mlxsw_sp_port_get_prio_strings(&p, i);
1667
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001668 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1669 mlxsw_sp_port_get_tc_strings(&p, i);
1670
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001671 break;
1672 }
1673}
1674
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001675static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1676 enum ethtool_phys_id_state state)
1677{
1678 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1679 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1680 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1681 bool active;
1682
1683 switch (state) {
1684 case ETHTOOL_ID_ACTIVE:
1685 active = true;
1686 break;
1687 case ETHTOOL_ID_INACTIVE:
1688 active = false;
1689 break;
1690 default:
1691 return -EOPNOTSUPP;
1692 }
1693
1694 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1695 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1696}
1697
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001698static int
1699mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1700 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1701{
1702 switch (grp) {
1703 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1704 *p_hw_stats = mlxsw_sp_port_hw_stats;
1705 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1706 break;
1707 case MLXSW_REG_PPCNT_PRIO_CNT:
1708 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1709 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1710 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001711 case MLXSW_REG_PPCNT_TC_CNT:
1712 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1713 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1714 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001715 default:
1716 WARN_ON(1);
Yotam Gigie915ac62017-01-09 11:25:48 +01001717 return -EOPNOTSUPP;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001718 }
1719 return 0;
1720}
1721
1722static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1723 enum mlxsw_reg_ppcnt_grp grp, int prio,
1724 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001725{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001726 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001727 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001728 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001729 int err;
1730
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001731 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1732 if (err)
1733 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001734 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001735 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001736 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001737}
1738
1739static void mlxsw_sp_port_get_stats(struct net_device *dev,
1740 struct ethtool_stats *stats, u64 *data)
1741{
1742 int i, data_index = 0;
1743
1744 /* IEEE 802.3 Counters */
1745 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1746 data, data_index);
1747 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1748
1749 /* Per-Priority Counters */
1750 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1751 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1752 data, data_index);
1753 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1754 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001755
1756 /* Per-TC Counters */
1757 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1758 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1759 data, data_index);
1760 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1761 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001762}
1763
1764static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1765{
1766 switch (sset) {
1767 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001768 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001769 default:
1770 return -EOPNOTSUPP;
1771 }
1772}
1773
1774struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001775 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001776 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001777 u32 speed;
1778};
1779
1780static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1781 {
1782 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001783 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1784 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001785 },
1786 {
1787 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1788 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001789 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1790 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001791 },
1792 {
1793 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001794 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1795 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001796 },
1797 {
1798 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1799 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001800 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1801 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001802 },
1803 {
1804 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1805 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1806 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1807 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001808 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1809 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001810 },
1811 {
1812 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001813 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1814 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001815 },
1816 {
1817 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001818 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1819 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001820 },
1821 {
1822 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001823 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1824 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001825 },
1826 {
1827 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001828 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1829 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001830 },
1831 {
1832 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001833 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1834 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001835 },
1836 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001837 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1838 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1839 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001840 },
1841 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001842 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1843 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1844 .speed = SPEED_25000,
1845 },
1846 {
1847 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1848 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1849 .speed = SPEED_25000,
1850 },
1851 {
1852 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1853 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1854 .speed = SPEED_25000,
1855 },
1856 {
1857 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1858 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1859 .speed = SPEED_50000,
1860 },
1861 {
1862 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1863 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1864 .speed = SPEED_50000,
1865 },
1866 {
1867 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1868 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1869 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001870 },
1871 {
1872 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001873 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1874 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001875 },
1876 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001877 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1878 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1879 .speed = SPEED_56000,
1880 },
1881 {
1882 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1883 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1884 .speed = SPEED_56000,
1885 },
1886 {
1887 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1888 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1889 .speed = SPEED_56000,
1890 },
1891 {
1892 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1893 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1894 .speed = SPEED_100000,
1895 },
1896 {
1897 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1898 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1899 .speed = SPEED_100000,
1900 },
1901 {
1902 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1903 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1904 .speed = SPEED_100000,
1905 },
1906 {
1907 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1908 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1909 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001910 },
1911};
1912
1913#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1914
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001915static void
1916mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1917 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001918{
1919 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1920 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1921 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1922 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1923 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1924 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001925 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001926
1927 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1928 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1929 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1930 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1931 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001932 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001933}
1934
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001935static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001936{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001937 int i;
1938
1939 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1940 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001941 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1942 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001943 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001944}
1945
1946static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001947 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001948{
1949 u32 speed = SPEED_UNKNOWN;
1950 u8 duplex = DUPLEX_UNKNOWN;
1951 int i;
1952
1953 if (!carrier_ok)
1954 goto out;
1955
1956 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1957 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1958 speed = mlxsw_sp_port_link_mode[i].speed;
1959 duplex = DUPLEX_FULL;
1960 break;
1961 }
1962 }
1963out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001964 cmd->base.speed = speed;
1965 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001966}
1967
1968static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1969{
1970 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1971 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1972 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1973 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1974 return PORT_FIBRE;
1975
1976 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1977 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1978 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1979 return PORT_DA;
1980
1981 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1982 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1983 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1984 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1985 return PORT_NONE;
1986
1987 return PORT_OTHER;
1988}
1989
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001990static u32
1991mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001992{
1993 u32 ptys_proto = 0;
1994 int i;
1995
1996 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001997 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1998 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001999 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2000 }
2001 return ptys_proto;
2002}
2003
2004static u32 mlxsw_sp_to_ptys_speed(u32 speed)
2005{
2006 u32 ptys_proto = 0;
2007 int i;
2008
2009 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2010 if (speed == mlxsw_sp_port_link_mode[i].speed)
2011 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2012 }
2013 return ptys_proto;
2014}
2015
Ido Schimmel18f1e702016-02-26 17:32:31 +01002016static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
2017{
2018 u32 ptys_proto = 0;
2019 int i;
2020
2021 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2022 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
2023 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2024 }
2025 return ptys_proto;
2026}
2027
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002028static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
2029 struct ethtool_link_ksettings *cmd)
2030{
2031 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
2032 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
2033 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
2034
2035 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
2036 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
2037}
2038
2039static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
2040 struct ethtool_link_ksettings *cmd)
2041{
2042 if (!autoneg)
2043 return;
2044
2045 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
2046 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
2047}
2048
2049static void
2050mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
2051 struct ethtool_link_ksettings *cmd)
2052{
2053 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
2054 return;
2055
2056 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
2057 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
2058}
2059
2060static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
2061 struct ethtool_link_ksettings *cmd)
2062{
2063 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2064 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2065 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2066 char ptys_pl[MLXSW_REG_PTYS_LEN];
2067 u8 autoneg_status;
2068 bool autoneg;
2069 int err;
2070
2071 autoneg = mlxsw_sp_port->link.autoneg;
Elad Raz401c8b42016-10-28 21:35:52 +02002072 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002073 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2074 if (err)
2075 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002076 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2077 &eth_proto_oper);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002078
2079 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2080
2081 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2082
2083 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2084 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2085 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2086
2087 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2088 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2089 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2090 cmd);
2091
2092 return 0;
2093}
2094
2095static int
2096mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2097 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002098{
2099 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2100 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2101 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002102 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002103 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002104 int err;
2105
Elad Raz401c8b42016-10-28 21:35:52 +02002106 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002107 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002108 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002109 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002110 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002111
2112 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2113 eth_proto_new = autoneg ?
2114 mlxsw_sp_to_ptys_advert_link(cmd) :
2115 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002116
2117 eth_proto_new = eth_proto_new & eth_proto_cap;
2118 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002119 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002120 return -EINVAL;
2121 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002122
Elad Raz401c8b42016-10-28 21:35:52 +02002123 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2124 eth_proto_new);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002125 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002126 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002127 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002128
Ido Schimmel6277d462016-07-15 11:14:58 +02002129 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002130 return 0;
2131
Ido Schimmel0c83f882016-09-12 13:26:23 +02002132 mlxsw_sp_port->link.autoneg = autoneg;
2133
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002134 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2135 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002136
2137 return 0;
2138}
2139
2140static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2141 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2142 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002143 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2144 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002145 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002146 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002147 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2148 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002149 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2150 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002151};
2152
Ido Schimmel18f1e702016-02-26 17:32:31 +01002153static int
2154mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2155{
2156 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2157 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2158 char ptys_pl[MLXSW_REG_PTYS_LEN];
2159 u32 eth_proto_admin;
2160
2161 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
Elad Raz401c8b42016-10-28 21:35:52 +02002162 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2163 eth_proto_admin);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002164 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2165}
2166
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002167int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2168 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2169 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002170{
2171 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2172 char qeec_pl[MLXSW_REG_QEEC_LEN];
2173
2174 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2175 next_index);
2176 mlxsw_reg_qeec_de_set(qeec_pl, true);
2177 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2178 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2179 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2180}
2181
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002182int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2183 enum mlxsw_reg_qeec_hr hr, u8 index,
2184 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002185{
2186 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2187 char qeec_pl[MLXSW_REG_QEEC_LEN];
2188
2189 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2190 next_index);
2191 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2192 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2193 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2194}
2195
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002196int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2197 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002198{
2199 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2200 char qtct_pl[MLXSW_REG_QTCT_LEN];
2201
2202 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2203 tclass);
2204 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2205}
2206
2207static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2208{
2209 int err, i;
2210
2211 /* Setup the elements hierarcy, so that each TC is linked to
2212 * one subgroup, which are all member in the same group.
2213 */
2214 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2215 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2216 0);
2217 if (err)
2218 return err;
2219 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2220 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2221 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2222 0, false, 0);
2223 if (err)
2224 return err;
2225 }
2226 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2227 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2228 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2229 false, 0);
2230 if (err)
2231 return err;
2232 }
2233
2234 /* Make sure the max shaper is disabled in all hierarcies that
2235 * support it.
2236 */
2237 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2238 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2239 MLXSW_REG_QEEC_MAS_DIS);
2240 if (err)
2241 return err;
2242 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2243 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2244 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2245 i, 0,
2246 MLXSW_REG_QEEC_MAS_DIS);
2247 if (err)
2248 return err;
2249 }
2250 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2251 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2252 MLXSW_REG_QEEC_HIERARCY_TC,
2253 i, i,
2254 MLXSW_REG_QEEC_MAS_DIS);
2255 if (err)
2256 return err;
2257 }
2258
2259 /* Map all priorities to traffic class 0. */
2260 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2261 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2262 if (err)
2263 return err;
2264 }
2265
2266 return 0;
2267}
2268
Ido Schimmel05978482016-08-17 16:39:30 +02002269static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2270{
2271 mlxsw_sp_port->pvid = 1;
2272
2273 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2274}
2275
2276static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2277{
2278 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2279}
2280
Jiri Pirko67963a32016-10-28 21:35:55 +02002281static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2282 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002283{
2284 struct mlxsw_sp_port *mlxsw_sp_port;
2285 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002286 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002287 int err;
2288
2289 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2290 if (!dev)
2291 return -ENOMEM;
Jiri Pirkof20a91f2016-10-27 15:13:00 +02002292 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002293 mlxsw_sp_port = netdev_priv(dev);
2294 mlxsw_sp_port->dev = dev;
2295 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2296 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002297 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002298 mlxsw_sp_port->mapping.module = module;
2299 mlxsw_sp_port->mapping.width = width;
2300 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002301 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002302 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2303 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2304 if (!mlxsw_sp_port->active_vlans) {
2305 err = -ENOMEM;
2306 goto err_port_active_vlans_alloc;
2307 }
Elad Razfc1273a2016-01-06 13:01:11 +01002308 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2309 if (!mlxsw_sp_port->untagged_vlans) {
2310 err = -ENOMEM;
2311 goto err_port_untagged_vlans_alloc;
2312 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002313 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002314 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002315
2316 mlxsw_sp_port->pcpu_stats =
2317 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2318 if (!mlxsw_sp_port->pcpu_stats) {
2319 err = -ENOMEM;
2320 goto err_alloc_stats;
2321 }
2322
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002323 mlxsw_sp_port->sample = kzalloc(sizeof(*mlxsw_sp_port->sample),
2324 GFP_KERNEL);
2325 if (!mlxsw_sp_port->sample) {
2326 err = -ENOMEM;
2327 goto err_alloc_sample;
2328 }
2329
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002330 mlxsw_sp_port->hw_stats.cache =
2331 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2332
2333 if (!mlxsw_sp_port->hw_stats.cache) {
2334 err = -ENOMEM;
2335 goto err_alloc_hw_stats;
2336 }
2337 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2338 &update_stats_cache);
2339
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002340 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2341 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2342
Ido Schimmel3247ff22016-09-08 08:16:02 +02002343 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2344 if (err) {
2345 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2346 mlxsw_sp_port->local_port);
2347 goto err_port_swid_set;
2348 }
2349
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002350 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2351 if (err) {
2352 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2353 mlxsw_sp_port->local_port);
2354 goto err_dev_addr_init;
2355 }
2356
2357 netif_carrier_off(dev);
2358
2359 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002360 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2361 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002362
Jarod Wilsond894be52016-10-20 13:55:16 -04002363 dev->min_mtu = 0;
2364 dev->max_mtu = ETH_MAX_MTU;
2365
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002366 /* Each packet needs to have a Tx header (metadata) on top all other
2367 * headers.
2368 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002369 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002370
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002371 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2372 if (err) {
2373 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2374 mlxsw_sp_port->local_port);
2375 goto err_port_system_port_mapping_set;
2376 }
2377
Ido Schimmel18f1e702016-02-26 17:32:31 +01002378 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2379 if (err) {
2380 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2381 mlxsw_sp_port->local_port);
2382 goto err_port_speed_by_width_set;
2383 }
2384
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002385 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2386 if (err) {
2387 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2388 mlxsw_sp_port->local_port);
2389 goto err_port_mtu_set;
2390 }
2391
2392 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2393 if (err)
2394 goto err_port_admin_status_set;
2395
2396 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2397 if (err) {
2398 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2399 mlxsw_sp_port->local_port);
2400 goto err_port_buffers_init;
2401 }
2402
Ido Schimmel90183b92016-04-06 17:10:08 +02002403 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2404 if (err) {
2405 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2406 mlxsw_sp_port->local_port);
2407 goto err_port_ets_init;
2408 }
2409
Ido Schimmelf00817d2016-04-06 17:10:09 +02002410 /* ETS and buffers must be initialized before DCB. */
2411 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2412 if (err) {
2413 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2414 mlxsw_sp_port->local_port);
2415 goto err_port_dcb_init;
2416 }
2417
Ido Schimmel05978482016-08-17 16:39:30 +02002418 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2419 if (err) {
2420 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2421 mlxsw_sp_port->local_port);
2422 goto err_port_pvid_vport_create;
2423 }
2424
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002425 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002426 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002427 err = register_netdev(dev);
2428 if (err) {
2429 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2430 mlxsw_sp_port->local_port);
2431 goto err_register_netdev;
2432 }
2433
Elad Razd808c7e2016-10-28 21:35:57 +02002434 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2435 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2436 module);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002437 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002438 return 0;
2439
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002440err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002441 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002442 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002443 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2444err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002445 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002446err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002447err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002448err_port_buffers_init:
2449err_port_admin_status_set:
2450err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002451err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002452err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002453err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002454 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2455err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002456 kfree(mlxsw_sp_port->hw_stats.cache);
2457err_alloc_hw_stats:
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002458 kfree(mlxsw_sp_port->sample);
2459err_alloc_sample:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002460 free_percpu(mlxsw_sp_port->pcpu_stats);
2461err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002462 kfree(mlxsw_sp_port->untagged_vlans);
2463err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002464 kfree(mlxsw_sp_port->active_vlans);
2465err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002466 free_netdev(dev);
2467 return err;
2468}
2469
Jiri Pirko67963a32016-10-28 21:35:55 +02002470static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2471 bool split, u8 module, u8 width, u8 lane)
2472{
2473 int err;
2474
2475 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2476 if (err) {
2477 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2478 local_port);
2479 return err;
2480 }
Ido Schimmel9a60c902016-12-16 19:29:03 +01002481 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split,
Jiri Pirko67963a32016-10-28 21:35:55 +02002482 module, width, lane);
2483 if (err)
2484 goto err_port_create;
2485 return 0;
2486
2487err_port_create:
2488 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2489 return err;
2490}
2491
2492static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002493{
2494 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2495
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002496 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko67963a32016-10-28 21:35:55 +02002497 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002498 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002499 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002500 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002501 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002502 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002503 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2504 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002505 kfree(mlxsw_sp_port->hw_stats.cache);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002506 kfree(mlxsw_sp_port->sample);
Yotam Gigi136f1442017-01-09 11:25:47 +01002507 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002508 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002509 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002510 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002511 free_netdev(mlxsw_sp_port->dev);
2512}
2513
Jiri Pirko67963a32016-10-28 21:35:55 +02002514static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2515{
2516 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2517 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2518}
2519
Jiri Pirkof83e2102016-10-28 21:35:49 +02002520static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2521{
2522 return mlxsw_sp->ports[local_port] != NULL;
2523}
2524
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002525static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2526{
2527 int i;
2528
2529 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002530 if (mlxsw_sp_port_created(mlxsw_sp, i))
2531 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002532 kfree(mlxsw_sp->ports);
2533}
2534
2535static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2536{
Ido Schimmeld664b412016-06-09 09:51:40 +02002537 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002538 size_t alloc_size;
2539 int i;
2540 int err;
2541
2542 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2543 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2544 if (!mlxsw_sp->ports)
2545 return -ENOMEM;
2546
2547 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002548 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002549 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002550 if (err)
2551 goto err_port_module_info_get;
2552 if (!width)
2553 continue;
2554 mlxsw_sp->port_to_module[i] = module;
Jiri Pirko67963a32016-10-28 21:35:55 +02002555 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2556 module, width, lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002557 if (err)
2558 goto err_port_create;
2559 }
2560 return 0;
2561
2562err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002563err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002564 for (i--; i >= 1; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002565 if (mlxsw_sp_port_created(mlxsw_sp, i))
2566 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002567 kfree(mlxsw_sp->ports);
2568 return err;
2569}
2570
Ido Schimmel18f1e702016-02-26 17:32:31 +01002571static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2572{
2573 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2574
2575 return local_port - offset;
2576}
2577
Ido Schimmelbe945352016-06-09 09:51:39 +02002578static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2579 u8 module, unsigned int count)
2580{
2581 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2582 int err, i;
2583
2584 for (i = 0; i < count; i++) {
2585 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2586 width, i * width);
2587 if (err)
2588 goto err_port_module_map;
2589 }
2590
2591 for (i = 0; i < count; i++) {
2592 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2593 if (err)
2594 goto err_port_swid_set;
2595 }
2596
2597 for (i = 0; i < count; i++) {
2598 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002599 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002600 if (err)
2601 goto err_port_create;
2602 }
2603
2604 return 0;
2605
2606err_port_create:
2607 for (i--; i >= 0; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002608 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2609 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmelbe945352016-06-09 09:51:39 +02002610 i = count;
2611err_port_swid_set:
2612 for (i--; i >= 0; i--)
2613 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2614 MLXSW_PORT_SWID_DISABLED_PORT);
2615 i = count;
2616err_port_module_map:
2617 for (i--; i >= 0; i--)
2618 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2619 return err;
2620}
2621
2622static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2623 u8 base_port, unsigned int count)
2624{
2625 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2626 int i;
2627
2628 /* Split by four means we need to re-create two ports, otherwise
2629 * only one.
2630 */
2631 count = count / 2;
2632
2633 for (i = 0; i < count; i++) {
2634 local_port = base_port + i * 2;
2635 module = mlxsw_sp->port_to_module[local_port];
2636
2637 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2638 0);
2639 }
2640
2641 for (i = 0; i < count; i++)
2642 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2643
2644 for (i = 0; i < count; i++) {
2645 local_port = base_port + i * 2;
2646 module = mlxsw_sp->port_to_module[local_port];
2647
2648 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002649 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002650 }
2651}
2652
Jiri Pirkob2f10572016-04-08 19:11:23 +02002653static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2654 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002655{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002656 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002657 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002658 u8 module, cur_width, base_port;
2659 int i;
2660 int err;
2661
2662 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2663 if (!mlxsw_sp_port) {
2664 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2665 local_port);
2666 return -EINVAL;
2667 }
2668
Ido Schimmeld664b412016-06-09 09:51:40 +02002669 module = mlxsw_sp_port->mapping.module;
2670 cur_width = mlxsw_sp_port->mapping.width;
2671
Ido Schimmel18f1e702016-02-26 17:32:31 +01002672 if (count != 2 && count != 4) {
2673 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2674 return -EINVAL;
2675 }
2676
Ido Schimmel18f1e702016-02-26 17:32:31 +01002677 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2678 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2679 return -EINVAL;
2680 }
2681
2682 /* Make sure we have enough slave (even) ports for the split. */
2683 if (count == 2) {
2684 base_port = local_port;
2685 if (mlxsw_sp->ports[base_port + 1]) {
2686 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2687 return -EINVAL;
2688 }
2689 } else {
2690 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2691 if (mlxsw_sp->ports[base_port + 1] ||
2692 mlxsw_sp->ports[base_port + 3]) {
2693 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2694 return -EINVAL;
2695 }
2696 }
2697
2698 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002699 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2700 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002701
Ido Schimmelbe945352016-06-09 09:51:39 +02002702 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2703 if (err) {
2704 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2705 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002706 }
2707
2708 return 0;
2709
Ido Schimmelbe945352016-06-09 09:51:39 +02002710err_port_split_create:
2711 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002712 return err;
2713}
2714
Jiri Pirkob2f10572016-04-08 19:11:23 +02002715static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002716{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002717 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002718 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002719 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002720 unsigned int count;
2721 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002722
2723 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2724 if (!mlxsw_sp_port) {
2725 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2726 local_port);
2727 return -EINVAL;
2728 }
2729
2730 if (!mlxsw_sp_port->split) {
2731 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2732 return -EINVAL;
2733 }
2734
Ido Schimmeld664b412016-06-09 09:51:40 +02002735 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002736 count = cur_width == 1 ? 4 : 2;
2737
2738 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2739
2740 /* Determine which ports to remove. */
2741 if (count == 2 && local_port >= base_port + 2)
2742 base_port = base_port + 2;
2743
2744 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002745 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2746 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002747
Ido Schimmelbe945352016-06-09 09:51:39 +02002748 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002749
2750 return 0;
2751}
2752
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002753static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2754 char *pude_pl, void *priv)
2755{
2756 struct mlxsw_sp *mlxsw_sp = priv;
2757 struct mlxsw_sp_port *mlxsw_sp_port;
2758 enum mlxsw_reg_pude_oper_status status;
2759 u8 local_port;
2760
2761 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2762 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002763 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002764 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002765
2766 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2767 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2768 netdev_info(mlxsw_sp_port->dev, "link up\n");
2769 netif_carrier_on(mlxsw_sp_port->dev);
2770 } else {
2771 netdev_info(mlxsw_sp_port->dev, "link down\n");
2772 netif_carrier_off(mlxsw_sp_port->dev);
2773 }
2774}
2775
Nogah Frankel14eeda92016-11-25 10:33:32 +01002776static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
2777 u8 local_port, void *priv)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002778{
2779 struct mlxsw_sp *mlxsw_sp = priv;
2780 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2781 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2782
2783 if (unlikely(!mlxsw_sp_port)) {
2784 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2785 local_port);
2786 return;
2787 }
2788
2789 skb->dev = mlxsw_sp_port->dev;
2790
2791 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2792 u64_stats_update_begin(&pcpu_stats->syncp);
2793 pcpu_stats->rx_packets++;
2794 pcpu_stats->rx_bytes += skb->len;
2795 u64_stats_update_end(&pcpu_stats->syncp);
2796
2797 skb->protocol = eth_type_trans(skb, skb->dev);
2798 netif_receive_skb(skb);
2799}
2800
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002801static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2802 void *priv)
2803{
2804 skb->offload_fwd_mark = 1;
Nogah Frankel14eeda92016-11-25 10:33:32 +01002805 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002806}
2807
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002808static void mlxsw_sp_rx_listener_sample_func(struct sk_buff *skb, u8 local_port,
2809 void *priv)
2810{
2811 struct mlxsw_sp *mlxsw_sp = priv;
2812 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2813 struct psample_group *psample_group;
2814 u32 size;
2815
2816 if (unlikely(!mlxsw_sp_port)) {
2817 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received for non-existent port\n",
2818 local_port);
2819 goto out;
2820 }
2821 if (unlikely(!mlxsw_sp_port->sample)) {
2822 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received on unsupported port\n",
2823 local_port);
2824 goto out;
2825 }
2826
2827 size = mlxsw_sp_port->sample->truncate ?
2828 mlxsw_sp_port->sample->trunc_size : skb->len;
2829
2830 rcu_read_lock();
2831 psample_group = rcu_dereference(mlxsw_sp_port->sample->psample_group);
2832 if (!psample_group)
2833 goto out_unlock;
2834 psample_sample_packet(psample_group, skb, size,
2835 mlxsw_sp_port->dev->ifindex, 0,
2836 mlxsw_sp_port->sample->rate);
2837out_unlock:
2838 rcu_read_unlock();
2839out:
2840 consume_skb(skb);
2841}
2842
Nogah Frankel117b0da2016-11-25 10:33:44 +01002843#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel0fb78a42016-11-25 10:33:39 +01002844 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002845 _is_ctrl, SP_##_trap_group, DISCARD)
Ido Schimmel93393b32016-08-25 18:42:38 +02002846
Nogah Frankel117b0da2016-11-25 10:33:44 +01002847#define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel14eeda92016-11-25 10:33:32 +01002848 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002849 _is_ctrl, SP_##_trap_group, DISCARD)
2850
2851#define MLXSW_SP_EVENTL(_func, _trap_id) \
2852 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
Nogah Frankel14eeda92016-11-25 10:33:32 +01002853
Nogah Frankel45449132016-11-25 10:33:35 +01002854static const struct mlxsw_listener mlxsw_sp_listener[] = {
2855 /* Events */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002856 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
Nogah Frankelee4a60d2016-11-25 10:33:29 +01002857 /* L2 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002858 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
2859 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
2860 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
2861 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
2862 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
2863 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
2864 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
2865 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
2866 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
2867 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
2868 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
Ido Schimmel93393b32016-08-25 18:42:38 +02002869 /* L3 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002870 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2871 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2872 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2873 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
2874 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
2875 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
2876 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
2877 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002878 /* PKT Sample trap */
2879 MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,
2880 false, SP_IP2ME, DISCARD)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002881};
2882
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002883static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
2884{
2885 char qpcr_pl[MLXSW_REG_QPCR_LEN];
2886 enum mlxsw_reg_qpcr_ir_units ir_units;
2887 int max_cpu_policers;
2888 bool is_bytes;
2889 u8 burst_size;
2890 u32 rate;
2891 int i, err;
2892
2893 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
2894 return -EIO;
2895
2896 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
2897
2898 ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
2899 for (i = 0; i < max_cpu_policers; i++) {
2900 is_bytes = false;
2901 switch (i) {
2902 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2903 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2904 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2905 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2906 rate = 128;
2907 burst_size = 7;
2908 break;
2909 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2910 rate = 16 * 1024;
2911 burst_size = 10;
2912 break;
2913 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2914 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2915 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2916 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2917 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2918 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2919 rate = 1024;
2920 burst_size = 7;
2921 break;
2922 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2923 is_bytes = true;
2924 rate = 4 * 1024;
2925 burst_size = 4;
2926 break;
2927 default:
2928 continue;
2929 }
2930
2931 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
2932 burst_size);
2933 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
2934 if (err)
2935 return err;
2936 }
2937
2938 return 0;
2939}
2940
Nogah Frankel579c82e2016-11-25 10:33:42 +01002941static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002942{
2943 char htgt_pl[MLXSW_REG_HTGT_LEN];
Nogah Frankel117b0da2016-11-25 10:33:44 +01002944 enum mlxsw_reg_htgt_trap_group i;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002945 int max_cpu_policers;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002946 int max_trap_groups;
2947 u8 priority, tc;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002948 u16 policer_id;
Nogah Frankel117b0da2016-11-25 10:33:44 +01002949 int err;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002950
2951 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
2952 return -EIO;
2953
2954 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002955 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
Nogah Frankel579c82e2016-11-25 10:33:42 +01002956
2957 for (i = 0; i < max_trap_groups; i++) {
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002958 policer_id = i;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002959 switch (i) {
Nogah Frankel117b0da2016-11-25 10:33:44 +01002960 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2961 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2962 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2963 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2964 priority = 5;
2965 tc = 5;
2966 break;
2967 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2968 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2969 priority = 4;
2970 tc = 4;
2971 break;
2972 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2973 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2974 priority = 3;
2975 tc = 3;
2976 break;
2977 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2978 priority = 2;
2979 tc = 2;
2980 break;
2981 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2982 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2983 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2984 priority = 1;
2985 tc = 1;
2986 break;
2987 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
Nogah Frankel579c82e2016-11-25 10:33:42 +01002988 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
2989 tc = MLXSW_REG_HTGT_DEFAULT_TC;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002990 policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002991 break;
2992 default:
2993 continue;
2994 }
Nogah Frankel117b0da2016-11-25 10:33:44 +01002995
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002996 if (max_cpu_policers <= policer_id &&
2997 policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
2998 return -EIO;
2999
3000 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
Nogah Frankel579c82e2016-11-25 10:33:42 +01003001 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3002 if (err)
3003 return err;
3004 }
3005
3006 return 0;
3007}
3008
3009static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
3010{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003011 int i;
3012 int err;
3013
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003014 err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
3015 if (err)
3016 return err;
3017
Nogah Frankel579c82e2016-11-25 10:33:42 +01003018 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003019 if (err)
3020 return err;
3021
Nogah Frankel45449132016-11-25 10:33:35 +01003022 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003023 err = mlxsw_core_trap_register(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003024 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003025 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003026 if (err)
Nogah Frankel45449132016-11-25 10:33:35 +01003027 goto err_listener_register;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003028
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003029 }
3030 return 0;
3031
Nogah Frankel45449132016-11-25 10:33:35 +01003032err_listener_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003033 for (i--; i >= 0; i--) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003034 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003035 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003036 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003037 }
3038 return err;
3039}
3040
3041static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
3042{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003043 int i;
3044
Nogah Frankel45449132016-11-25 10:33:35 +01003045 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003046 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003047 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003048 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003049 }
3050}
3051
3052static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
3053 enum mlxsw_reg_sfgc_type type,
3054 enum mlxsw_reg_sfgc_bridge_type bridge_type)
3055{
3056 enum mlxsw_flood_table_type table_type;
3057 enum mlxsw_sp_flood_table flood_table;
3058 char sfgc_pl[MLXSW_REG_SFGC_LEN];
3059
Ido Schimmel19ae6122015-12-15 16:03:39 +01003060 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003061 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003062 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003063 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003064
3065 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
3066 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
3067 else
3068 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003069
3070 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
3071 flood_table);
3072 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
3073}
3074
3075static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
3076{
3077 int type, err;
3078
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003079 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
3080 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
3081 continue;
3082
3083 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3084 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
3085 if (err)
3086 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003087
3088 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3089 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
3090 if (err)
3091 return err;
3092 }
3093
3094 return 0;
3095}
3096
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003097static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
3098{
3099 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003100 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003101
3102 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
3103 MLXSW_REG_SLCR_LAG_HASH_DMAC |
3104 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
3105 MLXSW_REG_SLCR_LAG_HASH_VLANID |
3106 MLXSW_REG_SLCR_LAG_HASH_SIP |
3107 MLXSW_REG_SLCR_LAG_HASH_DIP |
3108 MLXSW_REG_SLCR_LAG_HASH_SPORT |
3109 MLXSW_REG_SLCR_LAG_HASH_DPORT |
3110 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003111 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3112 if (err)
3113 return err;
3114
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003115 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3116 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003117 return -EIO;
3118
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003119 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003120 sizeof(struct mlxsw_sp_upper),
3121 GFP_KERNEL);
3122 if (!mlxsw_sp->lags)
3123 return -ENOMEM;
3124
3125 return 0;
3126}
3127
3128static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3129{
3130 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003131}
3132
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003133static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3134{
3135 char htgt_pl[MLXSW_REG_HTGT_LEN];
3136
Nogah Frankel579c82e2016-11-25 10:33:42 +01003137 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3138 MLXSW_REG_HTGT_INVALID_POLICER,
3139 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3140 MLXSW_REG_HTGT_DEFAULT_TC);
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003141 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3142}
3143
Jiri Pirkob2f10572016-04-08 19:11:23 +02003144static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003145 const struct mlxsw_bus_info *mlxsw_bus_info)
3146{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003147 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003148 int err;
3149
3150 mlxsw_sp->core = mlxsw_core;
3151 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02003152 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003153 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01003154 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003155
3156 err = mlxsw_sp_base_mac_get(mlxsw_sp);
3157 if (err) {
3158 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3159 return err;
3160 }
3161
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003162 err = mlxsw_sp_traps_init(mlxsw_sp);
3163 if (err) {
Nogah Frankel45449132016-11-25 10:33:35 +01003164 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3165 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003166 }
3167
3168 err = mlxsw_sp_flood_init(mlxsw_sp);
3169 if (err) {
3170 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
3171 goto err_flood_init;
3172 }
3173
3174 err = mlxsw_sp_buffers_init(mlxsw_sp);
3175 if (err) {
3176 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3177 goto err_buffers_init;
3178 }
3179
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003180 err = mlxsw_sp_lag_init(mlxsw_sp);
3181 if (err) {
3182 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3183 goto err_lag_init;
3184 }
3185
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003186 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3187 if (err) {
3188 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3189 goto err_switchdev_init;
3190 }
3191
Ido Schimmel464dce12016-07-02 11:00:15 +02003192 err = mlxsw_sp_router_init(mlxsw_sp);
3193 if (err) {
3194 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3195 goto err_router_init;
3196 }
3197
Yotam Gigi763b4b72016-07-21 12:03:17 +02003198 err = mlxsw_sp_span_init(mlxsw_sp);
3199 if (err) {
3200 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3201 goto err_span_init;
3202 }
3203
Jiri Pirko22a67762017-02-03 10:29:07 +01003204 err = mlxsw_sp_acl_init(mlxsw_sp);
3205 if (err) {
3206 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL\n");
3207 goto err_acl_init;
3208 }
3209
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003210 err = mlxsw_sp_ports_create(mlxsw_sp);
3211 if (err) {
3212 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3213 goto err_ports_create;
3214 }
3215
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003216 return 0;
3217
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003218err_ports_create:
Jiri Pirko22a67762017-02-03 10:29:07 +01003219 mlxsw_sp_acl_fini(mlxsw_sp);
3220err_acl_init:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003221 mlxsw_sp_span_fini(mlxsw_sp);
3222err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003223 mlxsw_sp_router_fini(mlxsw_sp);
3224err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003225 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003226err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003227 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003228err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003229 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003230err_buffers_init:
3231err_flood_init:
3232 mlxsw_sp_traps_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003233 return err;
3234}
3235
Jiri Pirkob2f10572016-04-08 19:11:23 +02003236static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003237{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003238 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003239
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003240 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko22a67762017-02-03 10:29:07 +01003241 mlxsw_sp_acl_fini(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003242 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003243 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003244 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003245 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003246 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003247 mlxsw_sp_traps_fini(mlxsw_sp);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003248 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003249 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003250}
3251
3252static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3253 .used_max_vepa_channels = 1,
3254 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003255 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003256 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003257 .used_max_pgt = 1,
3258 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003259 .used_flood_tables = 1,
3260 .used_flood_mode = 1,
3261 .flood_mode = 3,
3262 .max_fid_offset_flood_tables = 2,
3263 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003264 .max_fid_flood_tables = 2,
3265 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003266 .used_max_ib_mc = 1,
3267 .max_ib_mc = 0,
3268 .used_max_pkey = 1,
3269 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003270 .used_kvd_split_data = 1,
3271 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3272 .kvd_hash_single_parts = 2,
3273 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003274 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003275 .swid_config = {
3276 {
3277 .used_type = 1,
3278 .type = MLXSW_PORT_SWID_TYPE_ETH,
3279 }
3280 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003281 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003282};
3283
3284static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003285 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003286 .priv_size = sizeof(struct mlxsw_sp),
3287 .init = mlxsw_sp_init,
3288 .fini = mlxsw_sp_fini,
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003289 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003290 .port_split = mlxsw_sp_port_split,
3291 .port_unsplit = mlxsw_sp_port_unsplit,
3292 .sb_pool_get = mlxsw_sp_sb_pool_get,
3293 .sb_pool_set = mlxsw_sp_sb_pool_set,
3294 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3295 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3296 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3297 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3298 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3299 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3300 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3301 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3302 .txhdr_construct = mlxsw_sp_txhdr_construct,
3303 .txhdr_len = MLXSW_TXHDR_LEN,
3304 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003305};
3306
Jiri Pirko22a67762017-02-03 10:29:07 +01003307bool mlxsw_sp_port_dev_check(const struct net_device *dev)
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003308{
3309 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3310}
3311
David Aherndd823642016-10-17 19:15:49 -07003312static int mlxsw_lower_dev_walk(struct net_device *lower_dev, void *data)
3313{
3314 struct mlxsw_sp_port **port = data;
3315 int ret = 0;
3316
3317 if (mlxsw_sp_port_dev_check(lower_dev)) {
3318 *port = netdev_priv(lower_dev);
3319 ret = 1;
3320 }
3321
3322 return ret;
3323}
3324
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003325static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3326{
David Aherndd823642016-10-17 19:15:49 -07003327 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003328
3329 if (mlxsw_sp_port_dev_check(dev))
3330 return netdev_priv(dev);
3331
David Aherndd823642016-10-17 19:15:49 -07003332 port = NULL;
3333 netdev_walk_all_lower_dev(dev, mlxsw_lower_dev_walk, &port);
3334
3335 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003336}
3337
3338static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3339{
3340 struct mlxsw_sp_port *mlxsw_sp_port;
3341
3342 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3343 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3344}
3345
3346static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3347{
David Aherndd823642016-10-17 19:15:49 -07003348 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003349
3350 if (mlxsw_sp_port_dev_check(dev))
3351 return netdev_priv(dev);
3352
David Aherndd823642016-10-17 19:15:49 -07003353 port = NULL;
3354 netdev_walk_all_lower_dev_rcu(dev, mlxsw_lower_dev_walk, &port);
3355
3356 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003357}
3358
3359struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3360{
3361 struct mlxsw_sp_port *mlxsw_sp_port;
3362
3363 rcu_read_lock();
3364 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3365 if (mlxsw_sp_port)
3366 dev_hold(mlxsw_sp_port->dev);
3367 rcu_read_unlock();
3368 return mlxsw_sp_port;
3369}
3370
3371void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3372{
3373 dev_put(mlxsw_sp_port->dev);
3374}
3375
Ido Schimmel99724c12016-07-04 08:23:14 +02003376static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3377 unsigned long event)
3378{
3379 switch (event) {
3380 case NETDEV_UP:
3381 if (!r)
3382 return true;
3383 r->ref_count++;
3384 return false;
3385 case NETDEV_DOWN:
3386 if (r && --r->ref_count == 0)
3387 return true;
3388 /* It is possible we already removed the RIF ourselves
3389 * if it was assigned to a netdev that is now a bridge
3390 * or LAG slave.
3391 */
3392 return false;
3393 }
3394
3395 return false;
3396}
3397
3398static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3399{
3400 int i;
3401
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003402 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
Ido Schimmel99724c12016-07-04 08:23:14 +02003403 if (!mlxsw_sp->rifs[i])
3404 return i;
3405
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003406 return MLXSW_SP_INVALID_RIF;
Ido Schimmel99724c12016-07-04 08:23:14 +02003407}
3408
3409static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3410 bool *p_lagged, u16 *p_system_port)
3411{
3412 u8 local_port = mlxsw_sp_vport->local_port;
3413
3414 *p_lagged = mlxsw_sp_vport->lagged;
3415 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3416}
3417
3418static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3419 struct net_device *l3_dev, u16 rif,
3420 bool create)
3421{
3422 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3423 bool lagged = mlxsw_sp_vport->lagged;
3424 char ritr_pl[MLXSW_REG_RITR_LEN];
3425 u16 system_port;
3426
3427 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3428 l3_dev->mtu, l3_dev->dev_addr);
3429
3430 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3431 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3432 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3433
3434 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3435}
3436
3437static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3438
3439static struct mlxsw_sp_fid *
3440mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3441{
3442 struct mlxsw_sp_fid *f;
3443
3444 f = kzalloc(sizeof(*f), GFP_KERNEL);
3445 if (!f)
3446 return NULL;
3447
3448 f->leave = mlxsw_sp_vport_rif_sp_leave;
3449 f->ref_count = 0;
3450 f->dev = l3_dev;
3451 f->fid = fid;
3452
3453 return f;
3454}
3455
3456static struct mlxsw_sp_rif *
3457mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3458{
3459 struct mlxsw_sp_rif *r;
3460
3461 r = kzalloc(sizeof(*r), GFP_KERNEL);
3462 if (!r)
3463 return NULL;
3464
3465 ether_addr_copy(r->addr, l3_dev->dev_addr);
3466 r->mtu = l3_dev->mtu;
3467 r->ref_count = 1;
3468 r->dev = l3_dev;
3469 r->rif = rif;
3470 r->f = f;
3471
3472 return r;
3473}
3474
3475static struct mlxsw_sp_rif *
3476mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3477 struct net_device *l3_dev)
3478{
3479 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3480 struct mlxsw_sp_fid *f;
3481 struct mlxsw_sp_rif *r;
3482 u16 fid, rif;
3483 int err;
3484
3485 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003486 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99724c12016-07-04 08:23:14 +02003487 return ERR_PTR(-ERANGE);
3488
3489 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3490 if (err)
3491 return ERR_PTR(err);
3492
3493 fid = mlxsw_sp_rif_sp_to_fid(rif);
3494 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3495 if (err)
3496 goto err_rif_fdb_op;
3497
3498 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3499 if (!f) {
3500 err = -ENOMEM;
3501 goto err_rfid_alloc;
3502 }
3503
3504 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3505 if (!r) {
3506 err = -ENOMEM;
3507 goto err_rif_alloc;
3508 }
3509
3510 f->r = r;
3511 mlxsw_sp->rifs[rif] = r;
3512
3513 return r;
3514
3515err_rif_alloc:
3516 kfree(f);
3517err_rfid_alloc:
3518 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3519err_rif_fdb_op:
3520 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3521 return ERR_PTR(err);
3522}
3523
3524static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3525 struct mlxsw_sp_rif *r)
3526{
3527 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3528 struct net_device *l3_dev = r->dev;
3529 struct mlxsw_sp_fid *f = r->f;
3530 u16 fid = f->fid;
3531 u16 rif = r->rif;
3532
3533 mlxsw_sp->rifs[rif] = NULL;
3534 f->r = NULL;
3535
3536 kfree(r);
3537
3538 kfree(f);
3539
3540 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3541
3542 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3543}
3544
3545static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3546 struct net_device *l3_dev)
3547{
3548 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3549 struct mlxsw_sp_rif *r;
3550
3551 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3552 if (!r) {
3553 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3554 if (IS_ERR(r))
3555 return PTR_ERR(r);
3556 }
3557
3558 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3559 r->f->ref_count++;
3560
3561 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3562
3563 return 0;
3564}
3565
3566static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3567{
3568 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3569
3570 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3571
3572 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3573 if (--f->ref_count == 0)
3574 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3575}
3576
3577static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3578 struct net_device *port_dev,
3579 unsigned long event, u16 vid)
3580{
3581 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3582 struct mlxsw_sp_port *mlxsw_sp_vport;
3583
3584 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3585 if (WARN_ON(!mlxsw_sp_vport))
3586 return -EINVAL;
3587
3588 switch (event) {
3589 case NETDEV_UP:
3590 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3591 case NETDEV_DOWN:
3592 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3593 break;
3594 }
3595
3596 return 0;
3597}
3598
3599static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3600 unsigned long event)
3601{
3602 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3603 return 0;
3604
3605 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3606}
3607
3608static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3609 struct net_device *lag_dev,
3610 unsigned long event, u16 vid)
3611{
3612 struct net_device *port_dev;
3613 struct list_head *iter;
3614 int err;
3615
3616 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3617 if (mlxsw_sp_port_dev_check(port_dev)) {
3618 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3619 event, vid);
3620 if (err)
3621 return err;
3622 }
3623 }
3624
3625 return 0;
3626}
3627
3628static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3629 unsigned long event)
3630{
3631 if (netif_is_bridge_port(lag_dev))
3632 return 0;
3633
3634 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3635}
3636
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003637static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3638 struct net_device *l3_dev)
3639{
3640 u16 fid;
3641
3642 if (is_vlan_dev(l3_dev))
3643 fid = vlan_dev_vlan_id(l3_dev);
3644 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3645 fid = 1;
3646 else
3647 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3648
3649 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3650}
3651
Ido Schimmelf888f582016-08-24 11:18:51 +02003652static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3653{
3654 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3655 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3656}
3657
3658static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3659{
3660 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3661}
3662
3663static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3664 bool set)
3665{
3666 enum mlxsw_flood_table_type table_type;
3667 char *sftr_pl;
3668 u16 index;
3669 int err;
3670
3671 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3672 if (!sftr_pl)
3673 return -ENOMEM;
3674
3675 table_type = mlxsw_sp_flood_table_type_get(fid);
3676 index = mlxsw_sp_flood_table_index_get(fid);
3677 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3678 1, MLXSW_PORT_ROUTER_PORT, set);
3679 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3680
3681 kfree(sftr_pl);
3682 return err;
3683}
3684
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003685static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3686{
3687 if (mlxsw_sp_fid_is_vfid(fid))
3688 return MLXSW_REG_RITR_FID_IF;
3689 else
3690 return MLXSW_REG_RITR_VLAN_IF;
3691}
3692
3693static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3694 struct net_device *l3_dev,
3695 u16 fid, u16 rif,
3696 bool create)
3697{
3698 enum mlxsw_reg_ritr_if_type rif_type;
3699 char ritr_pl[MLXSW_REG_RITR_LEN];
3700
3701 rif_type = mlxsw_sp_rif_type_get(fid);
3702 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3703 l3_dev->dev_addr);
3704 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3705
3706 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3707}
3708
3709static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3710 struct net_device *l3_dev,
3711 struct mlxsw_sp_fid *f)
3712{
3713 struct mlxsw_sp_rif *r;
3714 u16 rif;
3715 int err;
3716
3717 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003718 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003719 return -ERANGE;
3720
Ido Schimmelf888f582016-08-24 11:18:51 +02003721 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003722 if (err)
3723 return err;
3724
Ido Schimmelf888f582016-08-24 11:18:51 +02003725 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3726 if (err)
3727 goto err_rif_bridge_op;
3728
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003729 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3730 if (err)
3731 goto err_rif_fdb_op;
3732
3733 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3734 if (!r) {
3735 err = -ENOMEM;
3736 goto err_rif_alloc;
3737 }
3738
3739 f->r = r;
3740 mlxsw_sp->rifs[rif] = r;
3741
3742 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3743
3744 return 0;
3745
3746err_rif_alloc:
3747 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3748err_rif_fdb_op:
3749 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003750err_rif_bridge_op:
3751 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003752 return err;
3753}
3754
3755void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3756 struct mlxsw_sp_rif *r)
3757{
3758 struct net_device *l3_dev = r->dev;
3759 struct mlxsw_sp_fid *f = r->f;
3760 u16 rif = r->rif;
3761
3762 mlxsw_sp->rifs[rif] = NULL;
3763 f->r = NULL;
3764
3765 kfree(r);
3766
3767 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3768
3769 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3770
Ido Schimmelf888f582016-08-24 11:18:51 +02003771 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3772
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003773 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3774}
3775
3776static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3777 struct net_device *br_dev,
3778 unsigned long event)
3779{
3780 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3781 struct mlxsw_sp_fid *f;
3782
3783 /* FID can either be an actual FID if the L3 device is the
3784 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3785 * L3 device is a VLAN-unaware bridge and we get a vFID.
3786 */
3787 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3788 if (WARN_ON(!f))
3789 return -EINVAL;
3790
3791 switch (event) {
3792 case NETDEV_UP:
3793 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3794 case NETDEV_DOWN:
3795 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3796 break;
3797 }
3798
3799 return 0;
3800}
3801
Ido Schimmel99724c12016-07-04 08:23:14 +02003802static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3803 unsigned long event)
3804{
3805 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003806 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003807 u16 vid = vlan_dev_vlan_id(vlan_dev);
3808
3809 if (mlxsw_sp_port_dev_check(real_dev))
3810 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3811 vid);
3812 else if (netif_is_lag_master(real_dev))
3813 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3814 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003815 else if (netif_is_bridge_master(real_dev) &&
3816 mlxsw_sp->master_bridge.dev == real_dev)
3817 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3818 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003819
3820 return 0;
3821}
3822
3823static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3824 unsigned long event, void *ptr)
3825{
3826 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3827 struct net_device *dev = ifa->ifa_dev->dev;
3828 struct mlxsw_sp *mlxsw_sp;
3829 struct mlxsw_sp_rif *r;
3830 int err = 0;
3831
3832 mlxsw_sp = mlxsw_sp_lower_get(dev);
3833 if (!mlxsw_sp)
3834 goto out;
3835
3836 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3837 if (!mlxsw_sp_rif_should_config(r, event))
3838 goto out;
3839
3840 if (mlxsw_sp_port_dev_check(dev))
3841 err = mlxsw_sp_inetaddr_port_event(dev, event);
3842 else if (netif_is_lag_master(dev))
3843 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003844 else if (netif_is_bridge_master(dev))
3845 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003846 else if (is_vlan_dev(dev))
3847 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3848
3849out:
3850 return notifier_from_errno(err);
3851}
3852
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003853static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3854 const char *mac, int mtu)
3855{
3856 char ritr_pl[MLXSW_REG_RITR_LEN];
3857 int err;
3858
3859 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3860 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3861 if (err)
3862 return err;
3863
3864 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3865 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3866 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3867 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3868}
3869
3870static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3871{
3872 struct mlxsw_sp *mlxsw_sp;
3873 struct mlxsw_sp_rif *r;
3874 int err;
3875
3876 mlxsw_sp = mlxsw_sp_lower_get(dev);
3877 if (!mlxsw_sp)
3878 return 0;
3879
3880 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3881 if (!r)
3882 return 0;
3883
3884 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3885 if (err)
3886 return err;
3887
3888 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3889 if (err)
3890 goto err_rif_edit;
3891
3892 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3893 if (err)
3894 goto err_rif_fdb_op;
3895
3896 ether_addr_copy(r->addr, dev->dev_addr);
3897 r->mtu = dev->mtu;
3898
3899 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3900
3901 return 0;
3902
3903err_rif_fdb_op:
3904 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3905err_rif_edit:
3906 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3907 return err;
3908}
3909
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003910static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3911 u16 fid)
3912{
3913 if (mlxsw_sp_fid_is_vfid(fid))
3914 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3915 else
3916 return test_bit(fid, lag_port->active_vlans);
3917}
3918
3919static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3920 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003921{
3922 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003923 u8 local_port = mlxsw_sp_port->local_port;
3924 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003925 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003926 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003927
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003928 if (!mlxsw_sp_port->lagged)
3929 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003930
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003931 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3932 MAX_LAG_MEMBERS);
3933 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003934 struct mlxsw_sp_port *lag_port;
3935
3936 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3937 if (!lag_port || lag_port->local_port == local_port)
3938 continue;
3939 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3940 count++;
3941 }
3942
3943 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003944}
3945
3946static int
3947mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3948 u16 fid)
3949{
3950 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3951 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3952
3953 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3954 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3955 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3956 mlxsw_sp_port->local_port);
3957
Ido Schimmel22305372016-06-20 23:04:21 +02003958 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3959 mlxsw_sp_port->local_port, fid);
3960
Ido Schimmel039c49a2016-01-27 15:20:18 +01003961 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3962}
3963
3964static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003965mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3966 u16 fid)
3967{
3968 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3969 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3970
3971 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3972 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3973 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3974
Ido Schimmel22305372016-06-20 23:04:21 +02003975 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3976 mlxsw_sp_port->lag_id, fid);
3977
Ido Schimmel039c49a2016-01-27 15:20:18 +01003978 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3979}
3980
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003981int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003982{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003983 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3984 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003985
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003986 if (mlxsw_sp_port->lagged)
3987 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003988 fid);
3989 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003990 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003991}
3992
Ido Schimmel701b1862016-07-04 08:23:16 +02003993static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3994{
3995 struct mlxsw_sp_fid *f, *tmp;
3996
3997 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3998 if (--f->ref_count == 0)
3999 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4000 else
4001 WARN_ON_ONCE(1);
4002}
4003
Ido Schimmel7117a572016-06-20 23:04:06 +02004004static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
4005 struct net_device *br_dev)
4006{
4007 return !mlxsw_sp->master_bridge.dev ||
4008 mlxsw_sp->master_bridge.dev == br_dev;
4009}
4010
4011static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
4012 struct net_device *br_dev)
4013{
4014 mlxsw_sp->master_bridge.dev = br_dev;
4015 mlxsw_sp->master_bridge.ref_count++;
4016}
4017
4018static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
4019{
Ido Schimmel701b1862016-07-04 08:23:16 +02004020 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004021 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02004022 /* It's possible upper VLAN devices are still holding
4023 * references to underlying FIDs. Drop the reference
4024 * and release the resources if it was the last one.
4025 * If it wasn't, then something bad happened.
4026 */
4027 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
4028 }
Ido Schimmel7117a572016-06-20 23:04:06 +02004029}
4030
4031static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
4032 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004033{
4034 struct net_device *dev = mlxsw_sp_port->dev;
4035 int err;
4036
4037 /* When port is not bridged untagged packets are tagged with
4038 * PVID=VID=1, thereby creating an implicit VLAN interface in
4039 * the device. Remove it and let bridge code take care of its
4040 * own VLANs.
4041 */
4042 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004043 if (err)
4044 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004045
Ido Schimmel7117a572016-06-20 23:04:06 +02004046 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
4047
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004048 mlxsw_sp_port->learning = 1;
4049 mlxsw_sp_port->learning_sync = 1;
4050 mlxsw_sp_port->uc_flood = 1;
4051 mlxsw_sp_port->bridged = 1;
4052
4053 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004054}
4055
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004056static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004057{
4058 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01004059
Ido Schimmel28a01d22016-02-18 11:30:02 +01004060 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
4061
Ido Schimmel7117a572016-06-20 23:04:06 +02004062 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
4063
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004064 mlxsw_sp_port->learning = 0;
4065 mlxsw_sp_port->learning_sync = 0;
4066 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01004067 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004068
4069 /* Add implicit VLAN interface in the device, so that untagged
4070 * packets will be classified to the default vFID.
4071 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02004072 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004073}
4074
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004075static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004076{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004077 char sldr_pl[MLXSW_REG_SLDR_LEN];
4078
4079 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
4080 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4081}
4082
4083static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
4084{
4085 char sldr_pl[MLXSW_REG_SLDR_LEN];
4086
4087 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
4088 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4089}
4090
4091static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4092 u16 lag_id, u8 port_index)
4093{
4094 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4095 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4096
4097 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
4098 lag_id, port_index);
4099 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4100}
4101
4102static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4103 u16 lag_id)
4104{
4105 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4106 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4107
4108 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
4109 lag_id);
4110 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4111}
4112
4113static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
4114 u16 lag_id)
4115{
4116 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4117 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4118
4119 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
4120 lag_id);
4121 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4122}
4123
4124static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
4125 u16 lag_id)
4126{
4127 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4128 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4129
4130 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
4131 lag_id);
4132 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4133}
4134
4135static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4136 struct net_device *lag_dev,
4137 u16 *p_lag_id)
4138{
4139 struct mlxsw_sp_upper *lag;
4140 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004141 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004142 int i;
4143
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004144 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
4145 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004146 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
4147 if (lag->ref_count) {
4148 if (lag->dev == lag_dev) {
4149 *p_lag_id = i;
4150 return 0;
4151 }
4152 } else if (free_lag_id < 0) {
4153 free_lag_id = i;
4154 }
4155 }
4156 if (free_lag_id < 0)
4157 return -EBUSY;
4158 *p_lag_id = free_lag_id;
4159 return 0;
4160}
4161
4162static bool
4163mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
4164 struct net_device *lag_dev,
4165 struct netdev_lag_upper_info *lag_upper_info)
4166{
4167 u16 lag_id;
4168
4169 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
4170 return false;
4171 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
4172 return false;
4173 return true;
4174}
4175
4176static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4177 u16 lag_id, u8 *p_port_index)
4178{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004179 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004180 int i;
4181
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004182 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
4183 MAX_LAG_MEMBERS);
4184 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004185 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
4186 *p_port_index = i;
4187 return 0;
4188 }
4189 }
4190 return -EBUSY;
4191}
4192
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004193static void
4194mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4195 u16 lag_id)
4196{
4197 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004198 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004199
4200 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4201 if (WARN_ON(!mlxsw_sp_vport))
4202 return;
4203
Ido Schimmel11943ff2016-07-02 11:00:12 +02004204 /* If vPort is assigned a RIF, then leave it since it's no
4205 * longer valid.
4206 */
4207 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4208 if (f)
4209 f->leave(mlxsw_sp_vport);
4210
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004211 mlxsw_sp_vport->lag_id = lag_id;
4212 mlxsw_sp_vport->lagged = 1;
4213}
4214
4215static void
4216mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4217{
4218 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004219 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004220
4221 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4222 if (WARN_ON(!mlxsw_sp_vport))
4223 return;
4224
Ido Schimmel11943ff2016-07-02 11:00:12 +02004225 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4226 if (f)
4227 f->leave(mlxsw_sp_vport);
4228
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004229 mlxsw_sp_vport->lagged = 0;
4230}
4231
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004232static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4233 struct net_device *lag_dev)
4234{
4235 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4236 struct mlxsw_sp_upper *lag;
4237 u16 lag_id;
4238 u8 port_index;
4239 int err;
4240
4241 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4242 if (err)
4243 return err;
4244 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4245 if (!lag->ref_count) {
4246 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4247 if (err)
4248 return err;
4249 lag->dev = lag_dev;
4250 }
4251
4252 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4253 if (err)
4254 return err;
4255 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4256 if (err)
4257 goto err_col_port_add;
4258 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4259 if (err)
4260 goto err_col_port_enable;
4261
4262 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4263 mlxsw_sp_port->local_port);
4264 mlxsw_sp_port->lag_id = lag_id;
4265 mlxsw_sp_port->lagged = 1;
4266 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004267
4268 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4269
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004270 return 0;
4271
Ido Schimmel51554db2016-05-06 22:18:39 +02004272err_col_port_enable:
4273 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004274err_col_port_add:
4275 if (!lag->ref_count)
4276 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004277 return err;
4278}
4279
Ido Schimmel82e6db02016-06-20 23:04:04 +02004280static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4281 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004282{
4283 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004284 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004285 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004286
4287 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004288 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004289 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4290 WARN_ON(lag->ref_count == 0);
4291
Ido Schimmel82e6db02016-06-20 23:04:04 +02004292 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4293 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004294
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004295 if (mlxsw_sp_port->bridged) {
4296 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004297 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004298 }
4299
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004300 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004301 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004302
4303 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4304 mlxsw_sp_port->local_port);
4305 mlxsw_sp_port->lagged = 0;
4306 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004307
4308 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004309}
4310
Jiri Pirko74581202015-12-03 12:12:30 +01004311static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4312 u16 lag_id)
4313{
4314 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4315 char sldr_pl[MLXSW_REG_SLDR_LEN];
4316
4317 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4318 mlxsw_sp_port->local_port);
4319 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4320}
4321
4322static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4323 u16 lag_id)
4324{
4325 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4326 char sldr_pl[MLXSW_REG_SLDR_LEN];
4327
4328 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4329 mlxsw_sp_port->local_port);
4330 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4331}
4332
4333static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4334 bool lag_tx_enabled)
4335{
4336 if (lag_tx_enabled)
4337 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4338 mlxsw_sp_port->lag_id);
4339 else
4340 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4341 mlxsw_sp_port->lag_id);
4342}
4343
4344static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4345 struct netdev_lag_lower_state_info *info)
4346{
4347 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4348}
4349
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004350static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4351 struct net_device *vlan_dev)
4352{
4353 struct mlxsw_sp_port *mlxsw_sp_vport;
4354 u16 vid = vlan_dev_vlan_id(vlan_dev);
4355
4356 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004357 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004358 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004359
4360 mlxsw_sp_vport->dev = vlan_dev;
4361
4362 return 0;
4363}
4364
Ido Schimmel82e6db02016-06-20 23:04:04 +02004365static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4366 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004367{
4368 struct mlxsw_sp_port *mlxsw_sp_vport;
4369 u16 vid = vlan_dev_vlan_id(vlan_dev);
4370
4371 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004372 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004373 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004374
4375 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004376}
4377
Jiri Pirko74581202015-12-03 12:12:30 +01004378static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4379 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004380{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004381 struct netdev_notifier_changeupper_info *info;
4382 struct mlxsw_sp_port *mlxsw_sp_port;
4383 struct net_device *upper_dev;
4384 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004385 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004386
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004387 mlxsw_sp_port = netdev_priv(dev);
4388 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4389 info = ptr;
4390
4391 switch (event) {
4392 case NETDEV_PRECHANGEUPPER:
4393 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004394 if (!is_vlan_dev(upper_dev) &&
4395 !netif_is_lag_master(upper_dev) &&
4396 !netif_is_bridge_master(upper_dev))
4397 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004398 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004399 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004400 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004401 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004402 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004403 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004404 if (netif_is_lag_master(upper_dev) &&
4405 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4406 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004407 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004408 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4409 return -EINVAL;
4410 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4411 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4412 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004413 break;
4414 case NETDEV_CHANGEUPPER:
4415 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004416 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004417 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004418 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4419 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004420 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004421 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4422 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004423 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004424 if (info->linking)
4425 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4426 upper_dev);
4427 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004428 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004429 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004430 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004431 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4432 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004433 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004434 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4435 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004436 } else {
4437 err = -EINVAL;
4438 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004439 }
4440 break;
4441 }
4442
Ido Schimmel80bedf12016-06-20 23:03:59 +02004443 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004444}
4445
Jiri Pirko74581202015-12-03 12:12:30 +01004446static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4447 unsigned long event, void *ptr)
4448{
4449 struct netdev_notifier_changelowerstate_info *info;
4450 struct mlxsw_sp_port *mlxsw_sp_port;
4451 int err;
4452
4453 mlxsw_sp_port = netdev_priv(dev);
4454 info = ptr;
4455
4456 switch (event) {
4457 case NETDEV_CHANGELOWERSTATE:
4458 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4459 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4460 info->lower_state_info);
4461 if (err)
4462 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4463 }
4464 break;
4465 }
4466
Ido Schimmel80bedf12016-06-20 23:03:59 +02004467 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004468}
4469
4470static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4471 unsigned long event, void *ptr)
4472{
4473 switch (event) {
4474 case NETDEV_PRECHANGEUPPER:
4475 case NETDEV_CHANGEUPPER:
4476 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4477 case NETDEV_CHANGELOWERSTATE:
4478 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4479 }
4480
Ido Schimmel80bedf12016-06-20 23:03:59 +02004481 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004482}
4483
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004484static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4485 unsigned long event, void *ptr)
4486{
4487 struct net_device *dev;
4488 struct list_head *iter;
4489 int ret;
4490
4491 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4492 if (mlxsw_sp_port_dev_check(dev)) {
4493 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004494 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004495 return ret;
4496 }
4497 }
4498
Ido Schimmel80bedf12016-06-20 23:03:59 +02004499 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004500}
4501
Ido Schimmel701b1862016-07-04 08:23:16 +02004502static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4503 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004504{
Ido Schimmel701b1862016-07-04 08:23:16 +02004505 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004506 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004507
Ido Schimmel701b1862016-07-04 08:23:16 +02004508 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4509 if (!f) {
4510 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4511 if (IS_ERR(f))
4512 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004513 }
4514
Ido Schimmel701b1862016-07-04 08:23:16 +02004515 f->ref_count++;
4516
4517 return 0;
4518}
4519
4520static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4521 struct net_device *vlan_dev)
4522{
4523 u16 fid = vlan_dev_vlan_id(vlan_dev);
4524 struct mlxsw_sp_fid *f;
4525
4526 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004527 if (f && f->r)
4528 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004529 if (f && --f->ref_count == 0)
4530 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4531}
4532
4533static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4534 unsigned long event, void *ptr)
4535{
4536 struct netdev_notifier_changeupper_info *info;
4537 struct net_device *upper_dev;
4538 struct mlxsw_sp *mlxsw_sp;
4539 int err;
4540
4541 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4542 if (!mlxsw_sp)
4543 return 0;
4544 if (br_dev != mlxsw_sp->master_bridge.dev)
4545 return 0;
4546
4547 info = ptr;
4548
4549 switch (event) {
4550 case NETDEV_CHANGEUPPER:
4551 upper_dev = info->upper_dev;
4552 if (!is_vlan_dev(upper_dev))
4553 break;
4554 if (info->linking) {
4555 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4556 upper_dev);
4557 if (err)
4558 return err;
4559 } else {
4560 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4561 }
4562 break;
4563 }
4564
4565 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004566}
4567
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004568static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004569{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004570 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004571 MLXSW_SP_VFID_MAX);
4572}
4573
4574static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4575{
4576 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4577
4578 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4579 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004580}
4581
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004582static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004583
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004584static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4585 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004586{
4587 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004588 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004589 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004590 int err;
4591
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004592 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004593 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004594 dev_err(dev, "No available vFIDs\n");
4595 return ERR_PTR(-ERANGE);
4596 }
4597
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004598 fid = mlxsw_sp_vfid_to_fid(vfid);
4599 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004600 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004601 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004602 return ERR_PTR(err);
4603 }
4604
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004605 f = kzalloc(sizeof(*f), GFP_KERNEL);
4606 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004607 goto err_allocate_vfid;
4608
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004609 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004610 f->fid = fid;
4611 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004612
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004613 list_add(&f->list, &mlxsw_sp->vfids.list);
4614 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004615
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004616 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004617
4618err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004619 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004620 return ERR_PTR(-ENOMEM);
4621}
4622
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004623static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4624 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004625{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004626 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004627 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004628
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004629 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004630 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004631
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004632 if (f->r)
4633 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004634
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004635 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004636
4637 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004638}
4639
Ido Schimmel99724c12016-07-04 08:23:14 +02004640static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4641 bool valid)
4642{
4643 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4644 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4645
4646 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4647 vid);
4648}
4649
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004650static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4651 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004652{
Ido Schimmel0355b592016-06-20 23:04:13 +02004653 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004654 int err;
4655
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004656 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004657 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004658 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004659 if (IS_ERR(f))
4660 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004661 }
4662
Ido Schimmel0355b592016-06-20 23:04:13 +02004663 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4664 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004665 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004666
Ido Schimmel0355b592016-06-20 23:04:13 +02004667 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4668 if (err)
4669 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004670
Ido Schimmel41b996c2016-06-20 23:04:17 +02004671 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004672 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004673
Ido Schimmel22305372016-06-20 23:04:21 +02004674 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4675
Ido Schimmel0355b592016-06-20 23:04:13 +02004676 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004677
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004678err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004679 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4680err_vport_flood_set:
4681 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004682 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004683 return err;
4684}
4685
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004686static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004687{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004688 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004689
Ido Schimmel22305372016-06-20 23:04:21 +02004690 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4691
Ido Schimmel0355b592016-06-20 23:04:13 +02004692 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4693
4694 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4695
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004696 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4697
Ido Schimmel41b996c2016-06-20 23:04:17 +02004698 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004699 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004700 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004701}
4702
4703static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4704 struct net_device *br_dev)
4705{
Ido Schimmel99724c12016-07-04 08:23:14 +02004706 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004707 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4708 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004709 int err;
4710
Ido Schimmel99724c12016-07-04 08:23:14 +02004711 if (f && !WARN_ON(!f->leave))
4712 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004713
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004714 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004715 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004716 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004717 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004718 }
4719
4720 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4721 if (err) {
4722 netdev_err(dev, "Failed to enable learning\n");
4723 goto err_port_vid_learning_set;
4724 }
4725
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004726 mlxsw_sp_vport->learning = 1;
4727 mlxsw_sp_vport->learning_sync = 1;
4728 mlxsw_sp_vport->uc_flood = 1;
4729 mlxsw_sp_vport->bridged = 1;
4730
4731 return 0;
4732
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004733err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004734 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004735 return err;
4736}
4737
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004738static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004739{
4740 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004741
4742 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4743
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004744 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004745
Ido Schimmel0355b592016-06-20 23:04:13 +02004746 mlxsw_sp_vport->learning = 0;
4747 mlxsw_sp_vport->learning_sync = 0;
4748 mlxsw_sp_vport->uc_flood = 0;
4749 mlxsw_sp_vport->bridged = 0;
4750}
4751
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004752static bool
4753mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4754 const struct net_device *br_dev)
4755{
4756 struct mlxsw_sp_port *mlxsw_sp_vport;
4757
4758 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4759 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004760 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004761
4762 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004763 return false;
4764 }
4765
4766 return true;
4767}
4768
4769static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4770 unsigned long event, void *ptr,
4771 u16 vid)
4772{
4773 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4774 struct netdev_notifier_changeupper_info *info = ptr;
4775 struct mlxsw_sp_port *mlxsw_sp_vport;
4776 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004777 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004778
4779 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4780
4781 switch (event) {
4782 case NETDEV_PRECHANGEUPPER:
4783 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004784 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004785 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004786 if (!info->linking)
4787 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004788 /* We can't have multiple VLAN interfaces configured on
4789 * the same port and being members in the same bridge.
4790 */
4791 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4792 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004793 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004794 break;
4795 case NETDEV_CHANGEUPPER:
4796 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004797 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004798 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004799 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004800 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4801 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004802 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004803 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004804 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004805 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004806 }
4807 }
4808
Ido Schimmel80bedf12016-06-20 23:03:59 +02004809 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004810}
4811
Ido Schimmel272c4472015-12-15 16:03:47 +01004812static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4813 unsigned long event, void *ptr,
4814 u16 vid)
4815{
4816 struct net_device *dev;
4817 struct list_head *iter;
4818 int ret;
4819
4820 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4821 if (mlxsw_sp_port_dev_check(dev)) {
4822 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4823 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004824 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004825 return ret;
4826 }
4827 }
4828
Ido Schimmel80bedf12016-06-20 23:03:59 +02004829 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004830}
4831
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004832static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4833 unsigned long event, void *ptr)
4834{
4835 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4836 u16 vid = vlan_dev_vlan_id(vlan_dev);
4837
Ido Schimmel272c4472015-12-15 16:03:47 +01004838 if (mlxsw_sp_port_dev_check(real_dev))
4839 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4840 vid);
4841 else if (netif_is_lag_master(real_dev))
4842 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4843 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004844
Ido Schimmel80bedf12016-06-20 23:03:59 +02004845 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004846}
4847
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004848static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4849 unsigned long event, void *ptr)
4850{
4851 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004852 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004853
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004854 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4855 err = mlxsw_sp_netdevice_router_port_event(dev);
4856 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004857 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4858 else if (netif_is_lag_master(dev))
4859 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004860 else if (netif_is_bridge_master(dev))
4861 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004862 else if (is_vlan_dev(dev))
4863 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004864
Ido Schimmel80bedf12016-06-20 23:03:59 +02004865 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004866}
4867
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004868static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4869 .notifier_call = mlxsw_sp_netdevice_event,
4870};
4871
Ido Schimmel99724c12016-07-04 08:23:14 +02004872static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4873 .notifier_call = mlxsw_sp_inetaddr_event,
4874 .priority = 10, /* Must be called before FIB notifier block */
4875};
4876
Jiri Pirkoe7322632016-09-01 10:37:43 +02004877static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4878 .notifier_call = mlxsw_sp_router_netevent_event,
4879};
4880
Jiri Pirko1d20d232016-10-27 15:12:59 +02004881static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4882 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4883 {0, },
4884};
4885
4886static struct pci_driver mlxsw_sp_pci_driver = {
4887 .name = mlxsw_sp_driver_name,
4888 .id_table = mlxsw_sp_pci_id_table,
4889};
4890
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004891static int __init mlxsw_sp_module_init(void)
4892{
4893 int err;
4894
4895 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004896 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004897 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4898
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004899 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4900 if (err)
4901 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004902
4903 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4904 if (err)
4905 goto err_pci_driver_register;
4906
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004907 return 0;
4908
Jiri Pirko1d20d232016-10-27 15:12:59 +02004909err_pci_driver_register:
4910 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004911err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004912 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004913 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004914 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4915 return err;
4916}
4917
4918static void __exit mlxsw_sp_module_exit(void)
4919{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004920 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004921 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004922 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004923 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004924 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4925}
4926
4927module_init(mlxsw_sp_module_init);
4928module_exit(mlxsw_sp_module_exit);
4929
4930MODULE_LICENSE("Dual BSD/GPL");
4931MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4932MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004933MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);