blob: 09c57b2ac7f7a6a6486079d8fb71d7e1c594b78d [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
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Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
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518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
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Marat Dukhan062bee32021-05-27 20:31:07 -0700528 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700529 "src/qs8-vadd/gen/minmax-scalar-x1.c",
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533 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
534 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700535 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/qu8-gemm/2x2-minmax-scalar.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700542 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700544 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700545 "src/qu8-requantization/rndna-scalar-signed64.c",
546 "src/qu8-requantization/rndna-scalar-unsigned32.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -0700548 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700549 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700550 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700551 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700553 "src/x8-lut/scalar.c",
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556 "src/x8-zip/x4-scalar.c",
557 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800558 "src/x32-depthtospace2d-chw2hwc/scalar.c",
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560 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700561 "src/x32-packx/x2-scalar.c",
562 "src/x32-packx/x3-scalar.c",
563 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700564 "src/x32-pad/scalar-float.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700566 "src/x32-unpool/scalar.c",
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Marat Dukhan436ebe62019-12-04 15:10:12 -0800574WASM_UKERNELS = [
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001314 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
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Marat Dukhaned6baaf2020-12-01 15:07:08 -08001318 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07001345 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001356 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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1365 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001370 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
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1372 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
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1375 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
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1378 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
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1380 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07001382 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
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1385 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1386 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
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1388 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1389 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001390 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1391 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1393 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001394 "src/math/roundd-wasmsimd-addsub.c",
1395 "src/math/roundd-wasmsimd-cvt.c",
1396 "src/math/roundne-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-addsub.c",
1398 "src/math/roundu-wasmsimd-cvt.c",
1399 "src/math/roundz-wasmsimd-addsub.c",
1400 "src/math/roundz-wasmsimd-cvt.c",
1401 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1402 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001403 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1405 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1407 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
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Marat Dukhanb5e3d172020-08-06 13:29:53 -07001409 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
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1423 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
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1428 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1429 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001430 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001431 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001432 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1433 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
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1435 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001440 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001441 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001442 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001443 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001444 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001445 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001446 "src/x32-zip/x2-wasmsimd.c",
1447 "src/x32-zip/x3-wasmsimd.c",
1448 "src/x32-zip/x4-wasmsimd.c",
1449 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001450]
1451
Marat Dukhan08c4a432019-10-03 09:29:21 -07001452# ISA-specific micro-kernels
1453NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001454 "src/f32-argmaxpool/4x-neon-c4.c",
1455 "src/f32-argmaxpool/9p8x-neon-c4.c",
1456 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001457 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1458 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001462 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001466 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001467 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001469 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001471 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001473 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1475 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1477 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001479 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1489 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1497 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1510 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001520 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001521 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001522 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1523 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1526 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1530 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1531 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1532 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1536 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001537 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1538 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001539 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1540 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1541 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1542 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1546 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1547 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1548 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1552 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1553 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1554 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001555 "src/f32-ibilinear-chw/gen/neon-p4.c",
1556 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001557 "src/f32-ibilinear/gen/neon-c4.c",
1558 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001560 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001562 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1563 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001565 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1567 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1568 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1570 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1572 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001573 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1574 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001575 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1577 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001578 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1579 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001580 "src/f32-prelu/gen/neon-1x4.c",
1581 "src/f32-prelu/gen/neon-1x8.c",
1582 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001583 "src/f32-prelu/gen/neon-2x4.c",
1584 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001585 "src/f32-prelu/gen/neon-2x16.c",
1586 "src/f32-prelu/gen/neon-4x4.c",
1587 "src/f32-prelu/gen/neon-4x8.c",
1588 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001600 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1612 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001613 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001614 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1616 "src/f32-spmm/gen/4x1-minmax-neon.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1619 "src/f32-spmm/gen/8x1-minmax-neon.c",
1620 "src/f32-spmm/gen/12x1-minmax-neon.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1623 "src/f32-spmm/gen/16x1-minmax-neon.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1626 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001627 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1628 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1630 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001631 "src/f32-vbinary/gen/vmax-neon-x4.c",
1632 "src/f32-vbinary/gen/vmax-neon-x8.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1634 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1635 "src/f32-vbinary/gen/vmin-neon-x4.c",
1636 "src/f32-vbinary/gen/vmin-neon-x8.c",
1637 "src/f32-vbinary/gen/vminc-neon-x4.c",
1638 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001639 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1640 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1642 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1644 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001645 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1646 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1648 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001649 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1650 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1652 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001653 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1654 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1660 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1666 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001667 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1669 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001670 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1671 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001672 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1673 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001674 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1675 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001676 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1677 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1679 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1681 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1683 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1701 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001702 "src/f32-vunary/gen/vabs-neon-x4.c",
1703 "src/f32-vunary/gen/vabs-neon-x8.c",
1704 "src/f32-vunary/gen/vneg-neon-x4.c",
1705 "src/f32-vunary/gen/vneg-neon-x8.c",
1706 "src/f32-vunary/gen/vsqr-neon-x4.c",
1707 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001708 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1709 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/math/roundd-neon-addsub.c",
1711 "src/math/roundd-neon-cvt.c",
1712 "src/math/roundne-neon-addsub.c",
1713 "src/math/roundu-neon-addsub.c",
1714 "src/math/roundu-neon-cvt.c",
1715 "src/math/roundz-neon-addsub.c",
1716 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001717 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1719 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1720 "src/math/sqrt-neon-nr1rsqrts.c",
1721 "src/math/sqrt-neon-nr2rsqrts.c",
1722 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001723 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
1724 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
1725 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
1726 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
1727 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
1728 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
1729 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
1730 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001731 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1732 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1733 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1734 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001735 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1736 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1737 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1738 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001739 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1740 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1741 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1742 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1743 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1744 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1745 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1746 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1747 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1748 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1749 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1750 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1751 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1752 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1753 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1754 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1755 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1756 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1757 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1758 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1759 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1760 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1761 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1762 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1763 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1764 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1765 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1766 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1767 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1768 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1769 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1770 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1771 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1772 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1773 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1774 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1775 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1776 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1777 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1778 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1779 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1780 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1781 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1782 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1783 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1784 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1785 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1786 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1787 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1788 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1789 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1790 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1791 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1792 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1793 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1794 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1795 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1796 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1797 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1798 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1799 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1800 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1801 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1802 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1803 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1804 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1805 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1806 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1807 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1808 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1809 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1810 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1811 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1812 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1813 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1814 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1815 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1816 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1817 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1818 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1819 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1820 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1821 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1822 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1823 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1824 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1825 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1826 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1827 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1828 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1829 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1830 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1831 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1832 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1833 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1834 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1835 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1836 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
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1838 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1839 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1840 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
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1842 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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1846 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
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1848 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1849 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1850 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1851 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1852 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1853 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1854 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1855 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1856 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1857 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1858 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1859 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1860 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1861 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1862 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1863 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1864 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1865 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1866 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1867 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1868 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1869 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1870 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1871 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1872 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1873 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1874 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001875 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001876 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001877 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07001878 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001879 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1880 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1881 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1882 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1883 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1884 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1885 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1886 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001887 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1888 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1889 "src/qu8-dwconv/up8x9-minmax-neon.c",
1890 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1891 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1892 "src/qu8-gemm/4x8-minmax-neon.c",
1893 "src/qu8-gemm/8x8-minmax-neon.c",
1894 "src/qu8-igemm/4x8-minmax-neon.c",
1895 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001896 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001897 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001898 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001899 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001900 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001901 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001902 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001903 "src/x8-zip/x2-neon.c",
1904 "src/x8-zip/x3-neon.c",
1905 "src/x8-zip/x4-neon.c",
1906 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001907 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001908 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001909 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001910 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001911 "src/x32-zip/x2-neon.c",
1912 "src/x32-zip/x3-neon.c",
1913 "src/x32-zip/x4-neon.c",
1914 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001915]
1916
1917NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001918 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1919 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1920 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1921 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1922 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1923 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1924 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1925 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1926 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1927 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1928 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1929 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1930 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1931 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1932 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1933 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1934 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1935 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1936 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1937 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1938 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1939 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1940 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1941 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1942 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1943 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1944 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1945 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1946 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1947 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001948 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1949 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001950 "src/f32-ibilinear/gen/neonfma-c4.c",
1951 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001952 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001953 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001954 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001955 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1956 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001957 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1958 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001959 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1960 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001961 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1962 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001963 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001964 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001965 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001966 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1967 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001968 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001969 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1970 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001971 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001972 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1973 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001974 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1975 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1976 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1977 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1978 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1979 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1980 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1981 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1982 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1984 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1985 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1986 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08001987 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1988 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
1989 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1990 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1991 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
1992 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1993 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1994 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1995 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
1996 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1997 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
1998 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
1999 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002000 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2001 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2002 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2003 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2004 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2005 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2006 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2007 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2008 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2009 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2010 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2011 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002012 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2013 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002014 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2015 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2016 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2017 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2018 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2019 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2020 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2021 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2022 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2023 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2024 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2025 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2026 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2027 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2028 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2029 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2066 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2067 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002068 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2069 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2070 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2071 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2072 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2073 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2074 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2075 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2076 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2077 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2078 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2079 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2080 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2081 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2082 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2083 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2084 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2085 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2086 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2087 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002088 "src/math/exp-neonfma-rr2-lut64-p2.c",
2089 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002090 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2091 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002092 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2093 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2094 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002095 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2096 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2097 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002098 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2099 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2100 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002101 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2102 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2103 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002104 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2105 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2106 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002107 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2108 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2109 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002110 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2111 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2112 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002113 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002114 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002115 "src/math/sqrt-neonfma-nr2fma.c",
2116 "src/math/sqrt-neonfma-nr2fma1adj.c",
2117 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002118]
2119
2120AARCH64_NEONFMA_UKERNELS = [
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Marat Dukhance7a3f82020-05-17 21:46:44 -07002122 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002123 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
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Marat Dukhan56b10cd2020-05-18 09:35:49 -07002125 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002126 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002127 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002128 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002129 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002130 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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2132 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002133 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002134 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002135 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2138 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2139 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002140 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2141 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2142 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002143 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002144 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002145 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2146 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2147 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002148 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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2151 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002152 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002155 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002156 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002157 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002158 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002161 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002169 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002170 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002171 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2172 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2173 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
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2176 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2177 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2178 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2179 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2180 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2181 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2182 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2183 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2184 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2185 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2186 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2187 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2188 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2189 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2190 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002191 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2192 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002193 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2194 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2196 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002197 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2198 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002199 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2200 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002201 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2202 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2203 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2204 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2205 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2206 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
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2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2223 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2224 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002225 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2226 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002227 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002228 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002229 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002230 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002231 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002232 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002233]
2234
Marat Dukhan8853b822020-05-07 12:19:01 -07002235NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002236 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2237 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002238 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2239 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2240 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2241 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2242 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2243 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002244 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002245 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002246 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002247 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002248]
2249
Marat Dukhan08c4a432019-10-03 09:29:21 -07002250AARCH64_NEONFP16ARITH_UKERNELS = [
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2253 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2254 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002255 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
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2257 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2258 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2259 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
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2261 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
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Frank Barchard0bb49a72020-06-04 11:35:11 -07002263 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002265 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
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2274 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2275 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2276 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2277 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2278 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2279 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2280 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002281 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
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2283 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2284 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2285 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2286 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2287 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2288 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002289 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002290 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002291 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002292 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002293 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002294 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002295 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002296 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002297 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002298 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2299 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2300 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2301 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2302 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2303 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2304 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2305 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2306 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2307 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2308 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2309 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2310 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2311 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2312 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2313 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2314 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2315 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2316 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2317 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2318 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2319 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2320 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2321 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2322 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2323 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2324 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2325 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2326 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002327 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2328 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002329 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2330 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002331 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2332 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002333 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2334 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002335]
2336
Benoit Jacoba9644732020-08-13 12:48:55 -07002337NEONDOT_UKERNELS = [
Marat Dukhand65d20e2021-05-24 16:59:51 -07002338 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
2339 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
2340 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
2341 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
2342 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
2343 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
2344 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
2345 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
2346 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
2347 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
2348 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
2349 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
2350 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
2351 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
2352 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
2353 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002354]
2355
Marat Dukhan08c4a432019-10-03 09:29:21 -07002356SSE_UKERNELS = [
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Erich Elsenb1233402020-06-08 15:53:15 -07002359 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
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2363 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002365 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002367 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
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2369 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2370 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002371 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002373 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
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Marat Dukhan470078a2020-10-23 22:36:52 -07002376 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
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Marat Dukhan0ff97182020-10-25 19:14:03 -07002383 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
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2395 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
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2397 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
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2402 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
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Marat Dukhanccca2142020-10-30 17:32:45 -07002404 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
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2406 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
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2409 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002429 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
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2460 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2461 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002462 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002463 "src/f32-prelu/gen/sse-2x4.c",
2464 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002465 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002466 "src/f32-spmm/gen/4x1-minmax-sse.c",
2467 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002468 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002469 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002470 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2471 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2472 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2473 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2474 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2475 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2476 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2477 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002478 "src/f32-vbinary/gen/vmax-sse-x4.c",
2479 "src/f32-vbinary/gen/vmax-sse-x8.c",
2480 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2481 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2482 "src/f32-vbinary/gen/vmin-sse-x4.c",
2483 "src/f32-vbinary/gen/vmin-sse-x8.c",
2484 "src/f32-vbinary/gen/vminc-sse-x4.c",
2485 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002486 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2487 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2488 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2489 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2490 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2491 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2492 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2493 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002494 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2495 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2496 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2497 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002498 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2499 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2500 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2501 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002502 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2503 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002504 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2505 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002506 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2507 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002508 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2509 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002510 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2511 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002512 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2513 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002514 "src/f32-vunary/gen/vabs-sse-x4.c",
2515 "src/f32-vunary/gen/vabs-sse-x8.c",
2516 "src/f32-vunary/gen/vneg-sse-x4.c",
2517 "src/f32-vunary/gen/vneg-sse-x8.c",
2518 "src/f32-vunary/gen/vsqr-sse-x4.c",
2519 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002520 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002521 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002522 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002523 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002524 "src/math/sqrt-sse-hh1mac.c",
2525 "src/math/sqrt-sse-nr1mac.c",
2526 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002527 "src/x32-fill/sse.c",
2528 "src/x32-packx/x4-sse.c",
2529 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002530]
2531
2532SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002533 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002534 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002535 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002536 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2537 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2538 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2539 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2540 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2541 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2542 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2543 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2544 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2545 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2546 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2547 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002548 "src/f32-prelu/gen/sse2-2x4.c",
2549 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002550 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002551 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002552 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002553 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2554 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002555 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002556 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2557 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002558 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002559 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2560 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002561 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002562 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2563 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2564 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2565 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2566 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2567 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2568 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2569 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2570 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2571 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2572 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2573 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002574 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2575 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002576 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2577 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002578 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2579 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2580 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2581 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2582 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2583 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002584 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2585 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2586 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2587 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2588 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2589 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2590 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2591 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2592 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2593 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2594 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2595 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002596 "src/math/exp-sse2-rr2-lut64-p2.c",
2597 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002598 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002599 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002600 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002601 "src/math/roundd-sse2-cvt.c",
2602 "src/math/roundne-sse2-cvt.c",
2603 "src/math/roundu-sse2-cvt.c",
2604 "src/math/roundz-sse2-cvt.c",
2605 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2606 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2607 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2608 "src/math/sigmoid-sse2-rr2-p5-div.c",
2609 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2610 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002611 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
2612 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2613 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2614 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2615 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2616 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002617 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2618 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2619 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002620 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2621 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2622 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002623 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
2624 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
2625 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
2626 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
2627 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
2628 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
2629 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
2630 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
2631 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
2632 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
2633 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
2634 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
2635 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
2636 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
2637 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
2638 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
2639 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
2640 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
2641 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
2642 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
2643 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
2644 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
2645 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
2646 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
2647 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
2648 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
2649 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
2650 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
2651 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
2652 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
2653 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
2654 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
2655 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
2656 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
2657 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002658 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002659 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002660 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002661 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2662 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2663 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2664 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002665 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2666 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2667 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2668 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002669 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2670 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002671 "src/qu8-dwconv/up8x9-minmax-sse2.c",
2672 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2673 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
2674 "src/qu8-gemm/2x4c8-minmax-sse2.c",
2675 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002676 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002677 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002678 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002679 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002680 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002681 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002682 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002683 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002684 "src/x8-zip/x2-sse2.c",
2685 "src/x8-zip/x3-sse2.c",
2686 "src/x8-zip/x4-sse2.c",
2687 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002688 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002689 "src/x32-zip/x2-sse2.c",
2690 "src/x32-zip/x3-sse2.c",
2691 "src/x32-zip/x4-sse2.c",
2692 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07002693]
2694
2695SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07002696 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
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Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002699 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
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Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002701 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
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2705 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002706 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
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2708 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
2709 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
2710 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
2711 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002712 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
2713 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002715 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002718 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
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2720 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
2721 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
2722 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
2723 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
2724 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
2725 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
2726 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
2727 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
2728 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
2729 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
2730 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
2731 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
2732 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
2733 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
2734 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
2735 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
2736 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
2737 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
2738 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
2739 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
2740 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
2741 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
2742 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
2743 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
2744 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
2745 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
2746 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
2747 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
2748 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
2749 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
2750 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
2751 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
2752 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002753 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002754 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002755 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002756 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002757]
2758
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002759SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08002760 "src/f32-prelu/gen/sse41-2x4.c",
2761 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002762 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
2763 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
2764 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
2765 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
2766 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
2767 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
2768 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
2769 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
2770 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
2771 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
2772 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
2773 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002774 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
2775 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002776 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2777 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002778 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
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2780 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
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2782 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2783 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002784 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
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2787 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2788 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2789 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2790 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
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2792 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2793 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2794 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2795 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002796 "src/math/roundd-sse41.c",
2797 "src/math/roundne-sse41.c",
2798 "src/math/roundu-sse41.c",
2799 "src/math/roundz-sse41.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002800 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
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2802 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
2803 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
2804 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2805 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2806 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2807 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
2808 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2809 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2810 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
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Marat Dukhan159688f2020-08-06 10:34:29 -07002812 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002815 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002818 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
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2820 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
2821 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
2822 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
2823 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
2824 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
2825 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
2826 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
2827 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
2828 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
2829 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
2830 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
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2840 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
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2842 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
2843 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002853 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002854 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002855 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07002856 "src/qs8-requantization/rndnu-sse4.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002857 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
2858 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
2859 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
2860 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07002861 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
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2864 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002865 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
2866 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
2867 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
2868 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07002869 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
2870 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
2871 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
2872 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002873 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002874 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002875]
2876
Marat Dukhan08c4a432019-10-03 09:29:21 -07002877AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07002878 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07002880 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
2881 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002882 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
2883 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002884 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
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2886 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
2887 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
2888 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
2889 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002890 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002891 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002893 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002894 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002895 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002896 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002897 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
2898 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
2899 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
2900 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
2901 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
2902 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
2903 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
2904 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
2905 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
2906 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
2907 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002908 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002909 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
2910 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002911 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002912 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002913 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002914 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002915 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
2916 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07002917 "src/f32-prelu/gen/avx-2x8.c",
2918 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002919 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002920 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
2921 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
2922 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
2923 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
2924 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
2925 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
2926 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
2927 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08002928 "src/f32-vbinary/gen/vmax-avx-x8.c",
2929 "src/f32-vbinary/gen/vmax-avx-x16.c",
2930 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
2931 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
2932 "src/f32-vbinary/gen/vmin-avx-x8.c",
2933 "src/f32-vbinary/gen/vmin-avx-x16.c",
2934 "src/f32-vbinary/gen/vminc-avx-x8.c",
2935 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002936 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
2937 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
2938 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
2939 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
2940 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
2941 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
2942 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
2943 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002944 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
2945 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
2946 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
2947 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002948 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
2949 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
2950 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
2951 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002952 "src/f32-vclamp/gen/vclamp-avx-x8.c",
2953 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002954 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
2955 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
2956 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
2957 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
2958 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
2959 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
2960 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
2961 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
2962 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
2963 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
2964 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
2965 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
2966 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
2967 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
2968 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
2969 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
2970 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
2971 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002972 "src/f32-vhswish/gen/vhswish-avx-x8.c",
2973 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002974 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
2975 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002976 "src/f32-vrelu/gen/vrelu-avx-x8.c",
2977 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002978 "src/f32-vrnd/gen/vrndd-avx-x8.c",
2979 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002980 "src/f32-vrnd/gen/vrndne-avx-x8.c",
2981 "src/f32-vrnd/gen/vrndne-avx-x16.c",
2982 "src/f32-vrnd/gen/vrndu-avx-x8.c",
2983 "src/f32-vrnd/gen/vrndu-avx-x16.c",
2984 "src/f32-vrnd/gen/vrndz-avx-x8.c",
2985 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002986 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002987 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
2988 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
2989 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
2990 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
2991 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
2992 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
2993 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
2994 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
2995 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
2996 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
2997 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
2998 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
2999 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3000 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3001 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3002 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3003 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3004 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3005 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3006 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003007 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3008 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003009 "src/f32-vunary/gen/vabs-avx-x8.c",
3010 "src/f32-vunary/gen/vabs-avx-x16.c",
3011 "src/f32-vunary/gen/vneg-avx-x8.c",
3012 "src/f32-vunary/gen/vneg-avx-x16.c",
3013 "src/f32-vunary/gen/vsqr-avx-x8.c",
3014 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003015 "src/math/exp-avx-rr2-p5.c",
3016 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3017 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3018 "src/math/expm1minus-avx-rr2-p6.c",
3019 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3020 "src/math/sigmoid-avx-rr2-p5-div.c",
3021 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3022 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003023 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3024 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
3025 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3026 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3027 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3028 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3029 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3030 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3031 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3032 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3033 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3034 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003035 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3036 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
3037 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
3038 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3039 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
3040 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
3041 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3042 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
3043 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
3044 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3045 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
3046 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
3047 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3048 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
3049 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
3050 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3051 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
3052 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
3053 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
3054 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
3055 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
3056 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3057 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
3058 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3059 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
3060 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3061 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
3062 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3063 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
3064 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3065 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
3066 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3067 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
3068 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
3069 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003070 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3071 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3072 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3073 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3074 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3075 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3076 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3077 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3078 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3079 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3080 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3081 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3082 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3083 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3084 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3085 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003086]
3087
Marat Dukhan1566fee2020-08-02 21:55:41 -07003088XOP_UKERNELS = [
Marat Dukhane1ff2482021-05-24 17:48:47 -07003089 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
3090 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3091 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3092 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3093 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3094 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003095 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
3096 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld128.c",
3097 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
3098 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
3099 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
3100 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
3101 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
3102 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
3103 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
3104 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
3105 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
3106 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
3107 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
3108 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
3109 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
3110 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
3111 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
3112 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
3113 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
3114 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
3115 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
3116 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
3117 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-xop-ld128.c",
3118 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
3119 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
3120 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
3121 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
3122 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
3123 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
3124 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
3125 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
3126 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
3127 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
3128 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
3129 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003130 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3131 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3132 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3133 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3134 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3135 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3136 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3137 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003138]
3139
Marat Dukhanfda12b82019-11-21 12:27:59 -08003140FMA3_UKERNELS = [
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Marat Dukhan1c587112020-04-08 20:04:28 -07003143 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003145 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3146 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
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3152 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003158 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003161 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003162 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
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Marat Dukhan1c587112020-04-08 20:04:28 -07003164 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003167 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3168 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3169 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3170 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3171 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3172 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3173 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3174 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3175 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3176 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3177 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3178 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3179 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3180 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003181 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003182 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3183 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3184 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3185 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003186 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003187 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3188 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003189 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003190 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3191 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003192 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3193 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3194 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003195 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3196 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003197 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3198 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3199 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3200 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3201 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
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3203 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3204 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003205 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003206 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003207 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003208]
3209
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003210AVX2_UKERNELS = [
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3212 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003213 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003214 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003215 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003216 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003218 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003219 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
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3221 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003222 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003223 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
3224 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003225 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003226 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003227 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003228 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3229 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003230 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003231 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3232 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3233 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003234 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003235 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003237 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003238 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003239 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003240 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3241 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003242 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003243 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3244 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3245 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003246 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003247 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
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3251 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3252 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
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3255 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3256 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3257 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3258 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3259 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3260 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3261 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3262 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3263 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3264 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3265 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3266 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3267 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3268 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
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3270 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3271 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
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3273 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3274 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3275 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3276 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3277 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3278 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3279 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3280 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3281 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3282 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3283 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3284 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3285 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3286 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003287 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3288 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3289 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
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3291 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3292 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3293 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3294 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3295 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3296 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3297 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3298 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3299 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3300 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3301 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3302 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3303 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3304 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3305 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3306 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3307 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3308 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3309 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3310 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003311 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3312 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3313 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3314 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3315 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3316 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3317 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3318 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3319 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3320 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3321 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3322 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3323 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3324 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3325 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3326 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3327 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3328 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3329 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3330 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3331 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3332 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3333 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3334 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3335 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3336 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3337 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3338 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3339 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3340 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003341 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3342 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3343 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003344 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3345 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3346 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3347 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003348 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003349 "src/math/extexp-avx2-p5.c",
3350 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3351 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3352 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3353 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3354 "src/math/sigmoid-avx2-rr1-p5-div.c",
3355 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3356 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3357 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3358 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3359 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3360 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3361 "src/math/sigmoid-avx2-rr2-p5-div.c",
3362 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3363 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003364 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003365 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003366 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003367 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003368 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003369 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003370 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003371 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003372 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003373 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003374 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003375 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003376 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003377 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003378 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003379 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003380 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003381 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003382 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003383 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003384 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003385 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003386 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003387 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003388 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003389 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003390 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
3391 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003392 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003393 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
3394 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003395 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003396 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
3397 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003398 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003399 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003400 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003401 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003402 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003403 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3404 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3405 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3406 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3407 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3408 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3409 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3410 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003411]
3412
Marat Dukhan08c4a432019-10-03 09:29:21 -07003413AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003414 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3415 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003416 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3417 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003418 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3419 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003420 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3421 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3422 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3423 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3424 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3425 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003426 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3427 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3428 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3429 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3430 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3431 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003432 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3433 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3434 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3435 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3436 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3437 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003438 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3439 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3440 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3441 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3442 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3443 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003444 "src/f32-prelu/gen/avx512f-2x16.c",
3445 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003446 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3447 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003448 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003449 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003450 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003451 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3452 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003453 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003454 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3455 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3456 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003457 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003458 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3459 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003460 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003461 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003462 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003463 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3464 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003465 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003466 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3467 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3468 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003469 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003470 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3471 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003472 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003473 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003474 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003475 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3476 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003477 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003478 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3479 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3480 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003481 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003482 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003483 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3484 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3485 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3486 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3487 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3488 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3489 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3490 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003491 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3492 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3493 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3494 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3495 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3496 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3497 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3498 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003499 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3500 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3501 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3502 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3503 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3504 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3505 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3506 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003507 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3508 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3509 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3510 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003511 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3512 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3513 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3514 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003515 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3516 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003517 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3518 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3519 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3520 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3521 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3522 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3523 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3524 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3525 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3526 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3527 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3528 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3529 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3530 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3531 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3532 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003533 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3534 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003535 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3536 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003537 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3538 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003539 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3540 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3541 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3542 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3543 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3544 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3545 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3546 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003547 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003548 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3549 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3550 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3551 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3552 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3553 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3554 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3555 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3556 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3557 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3558 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3559 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3560 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3561 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3562 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3563 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3564 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3565 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3566 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3567 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3568 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3569 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3570 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3571 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003572 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3573 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3574 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3575 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3576 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3577 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3578 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3579 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3580 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3581 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3582 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3583 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3584 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3585 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3586 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3587 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3588 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3589 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3590 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3591 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3592 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3593 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3594 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3595 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3596 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3597 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3598 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3599 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3600 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3601 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3602 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3603 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3604 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3605 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3606 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3607 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3608 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3609 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3610 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3611 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3612 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3613 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3614 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3615 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3616 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
3617 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
3618 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
3619 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003620 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
3621 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
3622 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
3623 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
3624 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
3625 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
3626 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
3627 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003628 "src/f32-vunary/gen/vabs-avx512f-x16.c",
3629 "src/f32-vunary/gen/vabs-avx512f-x32.c",
3630 "src/f32-vunary/gen/vneg-avx512f-x16.c",
3631 "src/f32-vunary/gen/vneg-avx512f-x32.c",
3632 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
3633 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003634 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
3635 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
3636 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
3637 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
3638 "src/math/exp-avx512f-rr2-p5-scalef.c",
3639 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003640 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
3641 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07003642 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003643 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003644 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003645 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003646 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003647 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003648 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003649 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003650 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003651 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
3652 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
3653 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
3654 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
3655 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
3656 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
3657 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
3658 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
3659 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
3660 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003661 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003662 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003663 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
3664 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
3665 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
3666 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003667 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003668 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003669 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003670]
3671
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003672AVX512SKX_UKERNELS = [
Marat Dukhane1ff2482021-05-24 17:48:47 -07003673 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003674 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003675 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003676 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003677 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003678 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003679 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003680 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003681 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003682 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003683 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003684 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003685 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003686 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003687 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003688 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003689 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003690 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003691 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003692 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003693 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003694 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003695 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003696 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003697]
3698
Frank Barchardbcedc082020-08-17 18:00:51 -07003699WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07003700 "src/f32-vrelu/wasm_shr_x1.S",
3701 "src/f32-vrelu/wasm_shr_x2.S",
3702 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07003703]
3704
Marat Dukhan08c4a432019-10-03 09:29:21 -07003705AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07003706 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07003707 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003708 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
3709 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003710 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003711 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07003712 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003713 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003714 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
3715 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003716 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
3717 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
3718 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
3719 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003720]
3721
3722AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003723 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003724 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003725 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003726 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003727 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003728 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -07003729 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003730 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
3731 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
3732 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
3733 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
3734 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
3735 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
3736 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003737 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
3738 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003739 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3740 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3741 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003742 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
3743 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003744 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3745 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
3746 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3747 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003748 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003749 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
3750 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003751 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3752 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
3753 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3754 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003755 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003756 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003757 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003758 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003759 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
3760 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
3761 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
3762 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
3763 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
3764 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
3765 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
3766 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
3767 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
3768 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
3769 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
3770 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
3771 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
3772 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
3773 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
3774 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
3775 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
3776 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
3777 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
3778 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
3779 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
3780 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003781 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003782 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003783 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
3784 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003785 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
3786 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
3787 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
3788 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
3789 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
3790 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003791 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
3792 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
3793 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
3794 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003795 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
3796 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard1ecbf532021-05-27 14:12:58 -07003797 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3798 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
3799 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
3800 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3801 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
3802 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3803 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003804 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3805 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3806 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3807 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3808 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3809 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3810 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3811 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3812 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
3813 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchard1c538cd2021-05-27 16:37:30 -07003814 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3815 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
3816 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003817 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3818 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3819 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3820 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3821 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3822 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3823 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3824 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
3825 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
3826 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003827]
3828
Marat Dukhan1b354632020-03-23 12:50:22 -07003829INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003830 "src/xnnpack/argmaxpool.h",
3831 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003832 "src/xnnpack/common.h",
3833 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08003834 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003835 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07003836 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003837 "src/xnnpack/gavgpool.h",
3838 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07003839 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003840 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08003841 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003842 "src/xnnpack/lut.h",
3843 "src/xnnpack/math.h",
3844 "src/xnnpack/maxpool.h",
3845 "src/xnnpack/packx.h",
3846 "src/xnnpack/pad.h",
3847 "src/xnnpack/params.h",
3848 "src/xnnpack/pavgpool.h",
3849 "src/xnnpack/ppmm.h",
3850 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07003851 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07003852 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07003853 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003854 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003855 "src/xnnpack/spmm.h",
3856 "src/xnnpack/unpool.h",
3857 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08003858 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003859 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07003860 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07003861 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07003862 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08003863 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003864 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07003865]
3866
3867INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003868 "include/xnnpack.h",
3869 "src/xnnpack/allocator.h",
3870 "src/xnnpack/compute.h",
3871 "src/xnnpack/im2col.h",
3872 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003873 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07003874 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003875 "src/xnnpack/operator.h",
3876 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07003877 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003878 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003879 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08003880 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003881]
3882
Marat Dukhan1b354632020-03-23 12:50:22 -07003883ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003884 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003885]
3886
Marat Dukhan1b354632020-03-23 12:50:22 -07003887MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003888 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07003889 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003890]
3891
Marat Dukhan1b354632020-03-23 12:50:22 -07003892MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07003893 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003894 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07003895 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003896 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003897]
3898
3899OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003900 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07003901 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003902]
3903
3904WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07003905 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07003906 "src/xnnpack/operator.h",
3907 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003908]
3909
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07003910LOGGING_COPTS = select({
3911 # No logging in optimized mode
3912 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
3913 # Full logging in debug mode
3914 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
3915 # Error-only logging in default (fastbuild) mode
3916 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
3917})
3918
Marat Dukhan3b59de22020-06-03 20:15:19 -07003919LOGGING_SRCS = select({
3920 # No logging in optimized mode
3921 ":optimized_build": [],
3922 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07003923 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07003924 "src/operator-strings.c",
3925 "src/subgraph-strings.c",
3926 ],
3927})
3928
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07003929LOGGING_HDRS = [
3930 "src/xnnpack/log.h",
3931]
3932
Marat Dukhan08c4a432019-10-03 09:29:21 -07003933xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003934 name = "tables",
3935 srcs = TABLE_SRCS,
3936 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07003937 gcc_copts = xnnpack_gcc_std_copts(),
3938 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003939)
3940
3941xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07003942 name = "scalar_ukernels",
3943 srcs = SCALAR_UKERNELS,
3944 hdrs = INTERNAL_HDRS,
3945 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07003946 gcc_copts = xnnpack_gcc_std_copts(),
3947 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07003948 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003949 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003950 "@FP16",
3951 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08003952 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003953 ],
3954)
3955
3956xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07003957 name = "scalar_ukernels_test_mode",
3958 srcs = SCALAR_UKERNELS,
3959 hdrs = INTERNAL_HDRS,
3960 aarch32_copts = ["-marm"],
3961 copts = [
3962 "-UNDEBUG",
3963 "-DXNN_TEST_MODE=1",
3964 ],
3965 gcc_copts = xnnpack_gcc_std_copts(),
3966 msvc_copts = xnnpack_msvc_std_copts(),
3967 deps = [
3968 ":tables",
3969 "@FP16",
3970 "@FXdiv",
3971 "@pthreadpool",
3972 ],
3973)
3974
3975xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08003976 name = "wasm_ukernels",
3977 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07003978 gcc_copts = xnnpack_gcc_std_copts(),
3979 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08003980 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07003981 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08003982 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08003983 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08003984 "@FP16",
3985 "@FXdiv",
3986 "@pthreadpool",
3987 ],
3988)
3989
3990xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07003991 name = "wasm_ukernels_test_mode",
3992 hdrs = INTERNAL_HDRS,
3993 copts = [
3994 "-UNDEBUG",
3995 "-DXNN_TEST_MODE=1",
3996 ],
3997 gcc_copts = xnnpack_gcc_std_copts(),
3998 msvc_copts = xnnpack_msvc_std_copts(),
3999 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004000 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004001 deps = [
4002 ":tables",
4003 "@FP16",
4004 "@FXdiv",
4005 "@pthreadpool",
4006 ],
4007)
4008
4009xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004010 name = "neon_ukernels",
4011 hdrs = INTERNAL_HDRS,
4012 aarch32_copts = [
4013 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004014 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004015 "-mfpu=neon",
4016 ],
4017 aarch32_srcs = NEON_UKERNELS,
4018 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004019 gcc_copts = xnnpack_gcc_std_copts(),
4020 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004021 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004022 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004023 "@FP16",
4024 "@pthreadpool",
4025 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004026)
4027
4028xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004029 name = "neon_ukernels_test_mode",
4030 hdrs = INTERNAL_HDRS,
4031 aarch32_copts = [
4032 "-marm",
4033 "-march=armv7-a",
4034 "-mfpu=neon",
4035 ],
4036 aarch32_srcs = NEON_UKERNELS,
4037 aarch64_srcs = NEON_UKERNELS,
4038 copts = [
4039 "-UNDEBUG",
4040 "-DXNN_TEST_MODE=1",
4041 ],
4042 gcc_copts = xnnpack_gcc_std_copts(),
4043 msvc_copts = xnnpack_msvc_std_copts(),
4044 deps = [
4045 ":tables",
4046 "@FP16",
4047 "@pthreadpool",
4048 ],
4049)
4050
4051xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004052 name = "neonfma_ukernels",
4053 hdrs = INTERNAL_HDRS,
4054 aarch32_copts = [
4055 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004056 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004057 "-mfpu=neon-vfpv4",
4058 ],
4059 aarch32_srcs = NEONFMA_UKERNELS,
4060 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004061 apple_aarch32_copts = [
4062 "-mcpu=swift",
4063 "-mtune=generic",
4064 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004065 gcc_copts = xnnpack_gcc_std_copts(),
4066 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004067 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004068 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004069 "@FP16",
4070 "@pthreadpool",
4071 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004072)
4073
4074xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004075 name = "neonfma_ukernels_test_mode",
4076 hdrs = INTERNAL_HDRS,
4077 aarch32_copts = [
4078 "-marm",
4079 "-march=armv7-a",
4080 "-mfpu=neon-vfpv4",
4081 ],
4082 aarch32_srcs = NEONFMA_UKERNELS,
4083 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004084 apple_aarch32_copts = [
4085 "-mcpu=swift",
4086 "-mtune=generic",
4087 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004088 copts = [
4089 "-UNDEBUG",
4090 "-DXNN_TEST_MODE=1",
4091 ],
4092 gcc_copts = xnnpack_gcc_std_copts(),
4093 msvc_copts = xnnpack_msvc_std_copts(),
4094 deps = [
4095 ":tables",
4096 "@FP16",
4097 "@pthreadpool",
4098 ],
4099)
4100
4101xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004102 name = "neonv8_ukernels",
4103 hdrs = INTERNAL_HDRS,
4104 aarch32_copts = [
4105 "-marm",
4106 "-march=armv8-a",
4107 "-mfpu=neon-fp-armv8",
4108 ],
4109 aarch32_srcs = NEONV8_UKERNELS,
4110 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004111 apple_aarch32_copts = [
4112 "-mcpu=cyclone",
4113 "-mtune=generic",
4114 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004115 gcc_copts = xnnpack_gcc_std_copts(),
4116 msvc_copts = xnnpack_msvc_std_copts(),
4117 deps = [
4118 ":tables",
4119 "@FP16",
4120 "@pthreadpool",
4121 ],
4122)
4123
4124xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004125 name = "neonv8_ukernels_test_mode",
4126 hdrs = INTERNAL_HDRS,
4127 aarch32_copts = [
4128 "-marm",
4129 "-march=armv8-a",
4130 "-mfpu=neon-fp-armv8",
4131 ],
4132 aarch32_srcs = NEONV8_UKERNELS,
4133 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004134 apple_aarch32_copts = [
4135 "-mcpu=cyclone",
4136 "-mtune=generic",
4137 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004138 copts = [
4139 "-UNDEBUG",
4140 "-DXNN_TEST_MODE=1",
4141 ],
4142 gcc_copts = xnnpack_gcc_std_copts(),
4143 msvc_copts = xnnpack_msvc_std_copts(),
4144 deps = [
4145 ":tables",
4146 "@FP16",
4147 "@pthreadpool",
4148 ],
4149)
4150
4151xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004152 name = "neonfp16arith_ukernels",
4153 hdrs = INTERNAL_HDRS,
4154 aarch64_copts = ["-march=armv8.2-a+fp16"],
4155 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004156 gcc_copts = xnnpack_gcc_std_copts(),
4157 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004158 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004159 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004160 "@FP16",
4161 "@pthreadpool",
4162 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004163)
4164
4165xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004166 name = "neonfp16arith_ukernels_test_mode",
4167 hdrs = INTERNAL_HDRS,
4168 aarch64_copts = ["-march=armv8.2-a+fp16"],
4169 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4170 copts = [
4171 "-UNDEBUG",
4172 "-DXNN_TEST_MODE=1",
4173 ],
4174 gcc_copts = xnnpack_gcc_std_copts(),
4175 msvc_copts = xnnpack_msvc_std_copts(),
4176 deps = [
4177 ":tables",
4178 "@FP16",
4179 "@pthreadpool",
4180 ],
4181)
4182
4183xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004184 name = "neondot_ukernels",
4185 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004186 aarch32_copts = [
4187 "-marm",
4188 "-march=armv8.2-a+dotprod",
4189 "-mfpu=neon-fp-armv8",
4190 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004191 aarch32_srcs = NEONDOT_UKERNELS,
4192 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4193 aarch64_srcs = NEONDOT_UKERNELS,
4194 gcc_copts = xnnpack_gcc_std_copts(),
4195 msvc_copts = xnnpack_msvc_std_copts(),
4196 deps = [
4197 ":tables",
4198 "@FP16",
4199 "@pthreadpool",
4200 ],
4201)
4202
4203xnnpack_cc_library(
4204 name = "neondot_ukernels_test_mode",
4205 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004206 aarch32_copts = [
4207 "-marm",
4208 "-march=armv8.2-a+dotprod",
4209 "-mfpu=neon-fp-armv8",
4210 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004211 aarch32_srcs = NEONDOT_UKERNELS,
4212 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4213 aarch64_srcs = NEONDOT_UKERNELS,
4214 copts = [
4215 "-UNDEBUG",
4216 "-DXNN_TEST_MODE=1",
4217 ],
4218 gcc_copts = xnnpack_gcc_std_copts(),
4219 msvc_copts = xnnpack_msvc_std_copts(),
4220 deps = [
4221 ":tables",
4222 "@FP16",
4223 "@pthreadpool",
4224 ],
4225)
4226
4227xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004228 name = "sse2_ukernels",
4229 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004230 gcc_copts = xnnpack_gcc_std_copts(),
4231 gcc_x86_copts = ["-msse2"],
4232 msvc_copts = xnnpack_msvc_std_copts(),
4233 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004234 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004235 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004236 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004237 "@FP16",
4238 "@pthreadpool",
4239 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004240)
4241
4242xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004243 name = "sse2_ukernels_test_mode",
4244 hdrs = INTERNAL_HDRS,
4245 copts = [
4246 "-UNDEBUG",
4247 "-DXNN_TEST_MODE=1",
4248 ],
4249 gcc_copts = xnnpack_gcc_std_copts(),
4250 gcc_x86_copts = ["-msse2"],
4251 msvc_copts = xnnpack_msvc_std_copts(),
4252 msvc_x86_32_copts = ["/arch:SSE2"],
4253 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4254 deps = [
4255 ":tables",
4256 "@FP16",
4257 "@pthreadpool",
4258 ],
4259)
4260
4261xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004262 name = "ssse3_ukernels",
4263 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004264 gcc_copts = xnnpack_gcc_std_copts(),
4265 gcc_x86_copts = ["-mssse3"],
4266 msvc_copts = xnnpack_msvc_std_copts(),
4267 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004268 x86_srcs = SSSE3_UKERNELS,
4269 deps = [
4270 ":tables",
4271 "@FP16",
4272 "@pthreadpool",
4273 ],
4274)
4275
4276xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004277 name = "ssse3_ukernels_test_mode",
4278 hdrs = INTERNAL_HDRS,
4279 copts = [
4280 "-UNDEBUG",
4281 "-DXNN_TEST_MODE=1",
4282 ],
4283 gcc_copts = xnnpack_gcc_std_copts(),
4284 gcc_x86_copts = ["-mssse3"],
4285 msvc_copts = xnnpack_msvc_std_copts(),
4286 msvc_x86_32_copts = ["/arch:SSE2"],
4287 x86_srcs = SSSE3_UKERNELS,
4288 deps = [
4289 ":tables",
4290 "@FP16",
4291 "@pthreadpool",
4292 ],
4293)
4294
4295xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004296 name = "sse41_ukernels",
4297 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004298 gcc_copts = xnnpack_gcc_std_copts(),
4299 gcc_x86_copts = ["-msse4.1"],
4300 msvc_copts = xnnpack_msvc_std_copts(),
4301 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004302 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004303 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004304 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004305 "@FP16",
4306 "@pthreadpool",
4307 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004308)
4309
4310xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004311 name = "sse41_ukernels_test_mode",
4312 hdrs = INTERNAL_HDRS,
4313 copts = [
4314 "-UNDEBUG",
4315 "-DXNN_TEST_MODE=1",
4316 ],
4317 gcc_copts = xnnpack_gcc_std_copts(),
4318 gcc_x86_copts = ["-msse4.1"],
4319 msvc_copts = xnnpack_msvc_std_copts(),
4320 msvc_x86_32_copts = ["/arch:SSE2"],
4321 x86_srcs = SSE41_UKERNELS,
4322 deps = [
4323 ":tables",
4324 "@FP16",
4325 "@pthreadpool",
4326 ],
4327)
4328
4329xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004330 name = "avx_ukernels",
4331 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004332 gcc_copts = xnnpack_gcc_std_copts(),
4333 gcc_x86_copts = ["-mavx"],
4334 msvc_copts = xnnpack_msvc_std_copts(),
4335 msvc_x86_32_copts = ["/arch:AVX"],
4336 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004337 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004338 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004339 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004340 "@FP16",
4341 "@pthreadpool",
4342 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004343)
4344
4345xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004346 name = "avx_ukernels_test_mode",
4347 hdrs = INTERNAL_HDRS,
4348 copts = [
4349 "-UNDEBUG",
4350 "-DXNN_TEST_MODE=1",
4351 ],
4352 gcc_copts = xnnpack_gcc_std_copts(),
4353 gcc_x86_copts = ["-mavx"],
4354 msvc_copts = xnnpack_msvc_std_copts(),
4355 msvc_x86_32_copts = ["/arch:AVX"],
4356 msvc_x86_64_copts = ["/arch:AVX"],
4357 x86_srcs = AVX_UKERNELS,
4358 deps = [
4359 ":tables",
4360 "@FP16",
4361 "@pthreadpool",
4362 ],
4363)
4364
4365xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004366 name = "xop_ukernels",
4367 hdrs = INTERNAL_HDRS,
4368 gcc_copts = xnnpack_gcc_std_copts(),
4369 gcc_x86_copts = ["-mxop"],
4370 msvc_copts = xnnpack_msvc_std_copts(),
4371 msvc_x86_32_copts = ["/arch:AVX"],
4372 msvc_x86_64_copts = ["/arch:AVX"],
4373 x86_srcs = XOP_UKERNELS,
4374 deps = [
4375 ":tables",
4376 "@FP16",
4377 "@pthreadpool",
4378 ],
4379)
4380
4381xnnpack_cc_library(
4382 name = "xop_ukernels_test_mode",
4383 hdrs = INTERNAL_HDRS,
4384 copts = [
4385 "-UNDEBUG",
4386 "-DXNN_TEST_MODE=1",
4387 ],
4388 gcc_copts = xnnpack_gcc_std_copts(),
4389 gcc_x86_copts = ["-mxop"],
4390 msvc_copts = xnnpack_msvc_std_copts(),
4391 msvc_x86_32_copts = ["/arch:AVX"],
4392 msvc_x86_64_copts = ["/arch:AVX"],
4393 x86_srcs = XOP_UKERNELS,
4394 deps = [
4395 ":tables",
4396 "@FP16",
4397 "@pthreadpool",
4398 ],
4399)
4400
4401xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004402 name = "fma3_ukernels",
4403 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004404 gcc_copts = xnnpack_gcc_std_copts(),
4405 gcc_x86_copts = ["-mfma"],
4406 msvc_copts = xnnpack_msvc_std_copts(),
4407 msvc_x86_32_copts = ["/arch:AVX"],
4408 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004409 x86_srcs = FMA3_UKERNELS,
4410 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004411 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004412 "@FP16",
4413 "@pthreadpool",
4414 ],
4415)
4416
4417xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004418 name = "fma3_ukernels_test_mode",
4419 hdrs = INTERNAL_HDRS,
4420 copts = [
4421 "-UNDEBUG",
4422 "-DXNN_TEST_MODE=1",
4423 ],
4424 gcc_copts = xnnpack_gcc_std_copts(),
4425 gcc_x86_copts = ["-mfma"],
4426 msvc_copts = xnnpack_msvc_std_copts(),
4427 msvc_x86_32_copts = ["/arch:AVX"],
4428 msvc_x86_64_copts = ["/arch:AVX"],
4429 x86_srcs = FMA3_UKERNELS,
4430 deps = [
4431 ":tables",
4432 "@FP16",
4433 "@pthreadpool",
4434 ],
4435)
4436
4437xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004438 name = "avx2_ukernels",
4439 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004440 gcc_copts = xnnpack_gcc_std_copts(),
4441 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004442 "-mfma",
4443 "-mavx2",
4444 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004445 msvc_copts = xnnpack_msvc_std_copts(),
4446 msvc_x86_32_copts = ["/arch:AVX2"],
4447 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004448 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004449 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004450 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004451 "@FP16",
4452 "@pthreadpool",
4453 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004454)
4455
4456xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004457 name = "avx2_ukernels_test_mode",
4458 hdrs = INTERNAL_HDRS,
4459 copts = [
4460 "-UNDEBUG",
4461 "-DXNN_TEST_MODE=1",
4462 ],
4463 gcc_copts = xnnpack_gcc_std_copts(),
4464 gcc_x86_copts = [
4465 "-mfma",
4466 "-mavx2",
4467 ],
4468 msvc_copts = xnnpack_msvc_std_copts(),
4469 msvc_x86_32_copts = ["/arch:AVX2"],
4470 msvc_x86_64_copts = ["/arch:AVX2"],
4471 x86_srcs = AVX2_UKERNELS,
4472 deps = [
4473 ":tables",
4474 "@FP16",
4475 "@pthreadpool",
4476 ],
4477)
4478
4479xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004480 name = "avx512f_ukernels",
4481 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004482 gcc_copts = xnnpack_gcc_std_copts(),
4483 gcc_x86_copts = ["-mavx512f"],
4484 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4485 msvc_copts = xnnpack_msvc_std_copts(),
4486 msvc_x86_32_copts = ["/arch:AVX512"],
4487 msvc_x86_64_copts = ["/arch:AVX512"],
4488 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004489 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004490 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004491 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004492 "@FP16",
4493 "@pthreadpool",
4494 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004495)
4496
4497xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004498 name = "avx512f_ukernels_test_mode",
4499 hdrs = INTERNAL_HDRS,
4500 copts = [
4501 "-UNDEBUG",
4502 "-DXNN_TEST_MODE=1",
4503 ],
4504 gcc_copts = xnnpack_gcc_std_copts(),
4505 gcc_x86_copts = ["-mavx512f"],
4506 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4507 msvc_copts = xnnpack_msvc_std_copts(),
4508 msvc_x86_32_copts = ["/arch:AVX512"],
4509 msvc_x86_64_copts = ["/arch:AVX512"],
4510 msys_copts = ["-fno-asynchronous-unwind-tables"],
4511 x86_srcs = AVX512F_UKERNELS,
4512 deps = [
4513 ":tables",
4514 "@FP16",
4515 "@pthreadpool",
4516 ],
4517)
4518
4519xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004520 name = "avx512skx_ukernels",
4521 hdrs = INTERNAL_HDRS,
4522 gcc_copts = xnnpack_gcc_std_copts(),
4523 gcc_x86_copts = [
4524 "-mavx512f",
4525 "-mavx512cd",
4526 "-mavx512bw",
4527 "-mavx512dq",
4528 "-mavx512vl",
4529 ],
4530 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4531 msvc_copts = xnnpack_msvc_std_copts(),
4532 msvc_x86_32_copts = ["/arch:AVX512"],
4533 msvc_x86_64_copts = ["/arch:AVX512"],
4534 msys_copts = ["-fno-asynchronous-unwind-tables"],
4535 x86_srcs = AVX512SKX_UKERNELS,
4536 deps = [
4537 ":tables",
4538 "@FP16",
4539 "@pthreadpool",
4540 ],
4541)
4542
4543xnnpack_cc_library(
4544 name = "avx512skx_ukernels_test_mode",
4545 hdrs = INTERNAL_HDRS,
4546 copts = [
4547 "-UNDEBUG",
4548 "-DXNN_TEST_MODE=1",
4549 ],
4550 gcc_copts = xnnpack_gcc_std_copts(),
4551 gcc_x86_copts = [
4552 "-mavx512f",
4553 "-mavx512cd",
4554 "-mavx512bw",
4555 "-mavx512dq",
4556 "-mavx512vl",
4557 ],
4558 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4559 msvc_copts = xnnpack_msvc_std_copts(),
4560 msvc_x86_32_copts = ["/arch:AVX512"],
4561 msvc_x86_64_copts = ["/arch:AVX512"],
4562 msys_copts = ["-fno-asynchronous-unwind-tables"],
4563 x86_srcs = AVX512SKX_UKERNELS,
4564 deps = [
4565 ":tables",
4566 "@FP16",
4567 "@pthreadpool",
4568 ],
4569)
4570
4571xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004572 name = "asm_ukernels",
4573 hdrs = ["src/xnnpack/assembly.h"],
4574 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004575 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004576 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004577 wasm_srcs = WASM32_ASM_UKERNELS,
4578 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004579)
4580
Marat Dukhan3b59de22020-06-03 20:15:19 -07004581xnnpack_cc_library(
4582 name = "logging_utils",
4583 srcs = LOGGING_SRCS,
4584 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4585 copts = LOGGING_COPTS + [
4586 "-Isrc",
4587 "-Iinclude",
4588 ] + select({
4589 ":debug_build": [],
4590 "//conditions:default": xnnpack_min_size_copts(),
4591 }),
4592 gcc_copts = xnnpack_gcc_std_copts(),
4593 msvc_copts = xnnpack_msvc_std_copts(),
4594 visibility = xnnpack_visibility(),
4595 deps = [
4596 "@FP16",
4597 "@clog",
4598 "@pthreadpool",
4599 ],
4600)
4601
Marat Dukhan08c4a432019-10-03 09:29:21 -07004602xnnpack_aggregate_library(
4603 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004604 aarch32_ios_deps = [
4605 ":neon_ukernels",
4606 ":neonfma_ukernels",
4607 ":neonv8_ukernels",
4608 ":asm_ukernels",
4609 ],
4610 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004611 ":neon_ukernels",
4612 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004613 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004614 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004615 ":asm_ukernels",
4616 ],
4617 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004618 ":neon_ukernels",
4619 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004620 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004621 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004622 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004623 ":asm_ukernels",
4624 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004625 generic_deps = [
4626 ":scalar_ukernels",
4627 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004628 wasm_deps = [
4629 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004630 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004631 ],
4632 wasmsimd_deps = [
4633 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004634 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004635 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004636 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004637 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004638 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004639 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004640 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004641 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004642 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004643 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004644 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004645 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004646 ],
4647)
4648
Marat Dukhan33fcf782020-05-24 14:27:15 -07004649xnnpack_aggregate_library(
4650 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004651 aarch32_ios_deps = [
4652 ":neon_ukernels_test_mode",
4653 ":neonfma_ukernels_test_mode",
4654 ":neonv8_ukernels_test_mode",
4655 ":asm_ukernels",
4656 ],
4657 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07004658 ":neon_ukernels_test_mode",
4659 ":neonfma_ukernels_test_mode",
4660 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004661 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004662 ":asm_ukernels",
4663 ],
4664 aarch64_deps = [
4665 ":neon_ukernels_test_mode",
4666 ":neonfma_ukernels_test_mode",
4667 ":neonv8_ukernels_test_mode",
4668 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004669 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004670 ":asm_ukernels",
4671 ],
4672 generic_deps = [
4673 ":scalar_ukernels_test_mode",
4674 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004675 wasm_deps = [
4676 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004677 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004678 ],
4679 wasmsimd_deps = [
4680 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004681 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004682 ],
4683 x86_deps = [
4684 ":sse2_ukernels_test_mode",
4685 ":ssse3_ukernels_test_mode",
4686 ":sse41_ukernels_test_mode",
4687 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004688 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004689 ":fma3_ukernels_test_mode",
4690 ":avx2_ukernels_test_mode",
4691 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004692 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004693 ],
4694)
4695
Marat Dukhan08c4a432019-10-03 09:29:21 -07004696xnnpack_cc_library(
4697 name = "im2col",
4698 srcs = ["src/im2col.c"],
4699 hdrs = [
4700 "src/xnnpack/common.h",
4701 "src/xnnpack/im2col.h",
4702 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004703 gcc_copts = xnnpack_gcc_std_copts(),
4704 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004705)
4706
4707xnnpack_cc_library(
4708 name = "indirection",
4709 srcs = ["src/indirection.c"],
4710 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004711 gcc_copts = xnnpack_gcc_std_copts(),
4712 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004713 deps = [
4714 "@FP16",
4715 "@FXdiv",
4716 "@pthreadpool",
4717 ],
4718)
4719
4720xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004721 name = "indirection_test_mode",
4722 srcs = ["src/indirection.c"],
4723 hdrs = INTERNAL_HDRS,
4724 copts = [
4725 "-UNDEBUG",
4726 "-DXNN_TEST_MODE=1",
4727 ],
4728 gcc_copts = xnnpack_gcc_std_copts(),
4729 msvc_copts = xnnpack_msvc_std_copts(),
4730 deps = [
4731 "@FP16",
4732 "@FXdiv",
4733 "@pthreadpool",
4734 ],
4735)
4736
4737xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07004738 name = "packing",
4739 srcs = ["src/packing.c"],
4740 hdrs = INTERNAL_HDRS,
4741 gcc_copts = xnnpack_gcc_std_copts(),
4742 msvc_copts = xnnpack_msvc_std_copts(),
4743 deps = [
4744 "@FP16",
4745 "@FXdiv",
4746 "@pthreadpool",
4747 ],
4748)
4749
4750xnnpack_cc_library(
4751 name = "packing_test_mode",
4752 srcs = ["src/packing.c"],
4753 hdrs = INTERNAL_HDRS,
4754 copts = [
4755 "-UNDEBUG",
4756 "-DXNN_TEST_MODE=1",
4757 ],
4758 gcc_copts = xnnpack_gcc_std_copts(),
4759 msvc_copts = xnnpack_msvc_std_copts(),
4760 deps = [
4761 "@FP16",
4762 "@FXdiv",
4763 "@pthreadpool",
4764 ],
4765)
4766
4767xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004768 name = "operator_run",
4769 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004770 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004771 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07004772 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4773 "//conditions:default": [],
4774 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004775 gcc_copts = xnnpack_gcc_std_copts(),
4776 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004777 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004778 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004779 "@FP16",
4780 "@FXdiv",
4781 "@clog",
4782 "@pthreadpool",
4783 ],
4784)
4785
Chao Mei6ddfc602020-05-13 22:29:36 -07004786xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004787 name = "operator_run_test_mode",
4788 srcs = ["src/operator-run.c"],
4789 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4790 copts = LOGGING_COPTS + [
4791 "-UNDEBUG",
4792 "-DXNN_TEST_MODE=1",
4793 ] + select({
4794 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4795 "//conditions:default": [],
4796 }),
4797 gcc_copts = xnnpack_gcc_std_copts(),
4798 msvc_copts = xnnpack_msvc_std_copts(),
4799 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004800 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004801 "@FP16",
4802 "@FXdiv",
4803 "@clog",
4804 "@pthreadpool",
4805 ],
4806)
4807
4808xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07004809 name = "memory_planner",
4810 srcs = ["src/memory-planner.c"],
4811 hdrs = INTERNAL_HDRS,
4812 defines = select({
4813 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
4814 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
4815 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
4816 }),
4817 gcc_copts = xnnpack_gcc_std_copts(),
4818 msvc_copts = xnnpack_msvc_std_copts(),
4819 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004820 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07004821 "@pthreadpool",
4822 ],
4823)
4824
Marat Dukhan33fcf782020-05-24 14:27:15 -07004825xnnpack_cc_library(
4826 name = "memory_planner_test_mode",
4827 srcs = ["src/memory-planner.c"],
4828 hdrs = INTERNAL_HDRS,
4829 copts = [
4830 "-UNDEBUG",
4831 "-DXNN_TEST_MODE=1",
4832 ],
4833 defines = select({
4834 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
4835 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
4836 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
4837 }),
4838 gcc_copts = xnnpack_gcc_std_copts(),
4839 msvc_copts = xnnpack_msvc_std_copts(),
4840 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004841 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004842 "@pthreadpool",
4843 ],
4844)
4845
Marat Dukhan08c4a432019-10-03 09:29:21 -07004846cc_library(
4847 name = "enable_assembly",
4848 defines = select({
4849 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
4850 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07004851 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004852 }),
4853)
4854
Marat Dukhan9de90e02020-06-18 16:04:12 -07004855cc_library(
4856 name = "enable_sparse",
4857 defines = select({
4858 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
4859 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08004860 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07004861 }),
4862)
4863
Marat Dukhancf056b22019-10-07 10:26:29 -07004864xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004865 name = "operators",
4866 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07004867 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004868 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07004869 ],
4870 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004871 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004872 "-Isrc",
4873 "-Iinclude",
4874 ] + select({
4875 ":debug_build": [],
4876 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07004877 }) + select({
4878 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4879 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004880 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004881 gcc_copts = xnnpack_gcc_std_copts(),
4882 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004883 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004884 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004885 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07004886 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004887 "@FP16",
4888 "@FXdiv",
4889 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004890 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004891 ],
4892)
4893
Marat Dukhan10a38082020-04-17 03:58:35 -07004894xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004895 name = "operators_test_mode",
4896 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07004897 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004898 "src/operator-delete.c",
4899 ],
4900 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4901 copts = LOGGING_COPTS + [
4902 "-Isrc",
4903 "-Iinclude",
4904 "-UNDEBUG",
4905 "-DXNN_TEST_MODE=1",
4906 ] + select({
4907 ":debug_build": [],
4908 "//conditions:default": xnnpack_min_size_copts(),
4909 }) + select({
4910 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4911 "//conditions:default": [],
4912 }),
4913 gcc_copts = xnnpack_gcc_std_copts(),
4914 msvc_copts = xnnpack_msvc_std_copts(),
4915 deps = [
4916 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004917 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07004918 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004919 "@FP16",
4920 "@FXdiv",
4921 "@clog",
4922 "@pthreadpool",
4923 ],
4924)
4925
4926xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004927 name = "XNNPACK",
4928 srcs = [
4929 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08004930 "src/runtime.c",
4931 "src/subgraph.c",
4932 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07004933 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004934 hdrs = ["include/xnnpack.h"],
4935 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004936 "-Isrc",
4937 "-Iinclude",
4938 ] + select({
4939 ":debug_build": [],
4940 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07004941 }) + select({
4942 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4943 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004944 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004945 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004946 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004947 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004948 visibility = xnnpack_visibility(),
4949 deps = [
4950 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07004951 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004952 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07004953 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004954 ":operator_run",
4955 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004956 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004957 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07004958 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07004959 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07004960 ] + select({
4961 ":emscripten": [],
4962 "//conditions:default": ["@cpuinfo"],
4963 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004964)
4965
Marat Dukhan10a38082020-04-17 03:58:35 -07004966xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004967 name = "XNNPACK_test_mode",
4968 srcs = [
4969 "src/init.c",
4970 "src/runtime.c",
4971 "src/subgraph.c",
4972 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07004973 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004974 hdrs = ["include/xnnpack.h"],
4975 copts = LOGGING_COPTS + [
4976 "-Isrc",
4977 "-Iinclude",
4978 "-UNDEBUG",
4979 "-DXNN_TEST_MODE=1",
4980 ] + select({
4981 ":debug_build": [],
4982 "//conditions:default": xnnpack_min_size_copts(),
4983 }) + select({
4984 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4985 "//conditions:default": [],
4986 }),
4987 gcc_copts = xnnpack_gcc_std_copts(),
4988 includes = ["include"],
4989 msvc_copts = xnnpack_msvc_std_copts(),
4990 visibility = xnnpack_visibility(),
4991 deps = [
4992 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07004993 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004994 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004995 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004996 ":operator_run_test_mode",
4997 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004998 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004999 "@clog",
5000 "@FP16",
5001 "@pthreadpool",
5002 ] + select({
5003 ":emscripten": [],
5004 "//conditions:default": ["@cpuinfo"],
5005 }),
5006)
5007
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005008# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5009# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005010xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005011 name = "xnnpack_for_tflite",
5012 srcs = [
5013 "src/init.c",
5014 "src/runtime.c",
5015 "src/subgraph.c",
5016 "src/tensor.c",
5017 ] + SUBGRAPH_SRCS,
5018 hdrs = ["include/xnnpack.h"],
5019 copts = LOGGING_COPTS + [
5020 "-Isrc",
5021 "-Iinclude",
5022 ] + select({
5023 ":debug_build": [],
5024 "//conditions:default": xnnpack_min_size_copts(),
5025 }) + select({
5026 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5027 "//conditions:default": [],
5028 }),
5029 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005030 "XNN_NO_QU8_OPERATORS",
5031 "XNN_NO_U8_OPERATORS",
5032 "XNN_NO_X8_OPERATORS",
5033 "XNN_NO_F16_OPERATORS",
5034 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005035 ] + select({
5036 ":xnn_enable_qs8_explicit_true": [],
5037 ":xnn_enable_qs8_explicit_false": ["XNN_NO_QS8_OPERATORS"],
5038 "//conditions:default": ["XNN_NO_QS8_OPERATORS"],
5039 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005040 gcc_copts = xnnpack_gcc_std_copts(),
5041 includes = ["include"],
5042 msvc_copts = xnnpack_msvc_std_copts(),
5043 visibility = xnnpack_visibility(),
5044 deps = [
5045 ":enable_assembly",
5046 ":enable_sparse",
5047 ":logging_utils",
5048 ":memory_planner",
5049 ":operator_run",
5050 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005051 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005052 "@clog",
5053 "@FP16",
5054 "@pthreadpool",
5055 ] + select({
5056 ":emscripten": [],
5057 "//conditions:default": ["@cpuinfo"],
5058 }),
5059)
5060
5061# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5062# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5063xnnpack_cc_library(
5064 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005065 srcs = [
5066 "src/init.c",
5067 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005068 hdrs = ["include/xnnpack.h"],
5069 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005070 "-Isrc",
5071 "-Iinclude",
5072 ] + select({
5073 ":debug_build": [],
5074 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005075 }) + select({
5076 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5077 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005078 }),
5079 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005080 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005081 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005082 "XNN_NO_U8_OPERATORS",
5083 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005084 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005085 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005086 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005087 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005088 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005089 visibility = xnnpack_visibility(),
5090 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005091 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005092 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005093 ":operator_run",
5094 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005095 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005096 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005097 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005098 ] + select({
5099 ":emscripten": [],
5100 "//conditions:default": ["@cpuinfo"],
5101 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005102)
5103
Marat Dukhancf056b22019-10-07 10:26:29 -07005104xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005105 name = "bench_utils",
5106 srcs = ["bench/utils.cc"],
5107 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005108 deps = [
5109 "@com_google_benchmark//:benchmark",
5110 "@cpuinfo",
5111 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005112)
5113
Frank Barchard7e955972019-10-11 10:34:25 -07005114######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005115
5116xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005117 name = "qs8_gemm_bench",
5118 srcs = [
5119 "bench/gemm.h",
5120 "bench/qs8-gemm.cc",
5121 "src/xnnpack/AlignedAllocator.h",
5122 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005123 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5124 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005125)
5126
5127xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005128 name = "qs8_requantization_bench",
5129 srcs = [
5130 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005131 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005132 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005133 ] + MICROKERNEL_BENCHMARK_HDRS,
5134 deps = MICROKERNEL_BENCHMARK_DEPS,
5135)
5136
5137xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005138 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005139 srcs = [
5140 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005141 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005142 "src/xnnpack/AlignedAllocator.h",
5143 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005144 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005145 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005146)
5147
5148xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005149 name = "qu8_requantization_bench",
5150 srcs = [
5151 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005152 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005153 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005154 ] + MICROKERNEL_BENCHMARK_HDRS,
5155 deps = MICROKERNEL_BENCHMARK_DEPS,
5156)
5157
5158xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005159 name = "f16_igemm_bench",
5160 srcs = [
5161 "bench/f16-igemm.cc",
5162 "bench/conv.h",
5163 "bench/google/conv.h",
5164 "src/xnnpack/AlignedAllocator.h",
5165 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005166 deps = MICROKERNEL_BENCHMARK_DEPS + [
5167 ":indirection",
5168 ":packing",
5169 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005170)
5171
5172xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005173 name = "f16_gemm_bench",
5174 srcs = [
5175 "bench/f16-gemm.cc",
5176 "bench/gemm.h",
5177 "src/xnnpack/AlignedAllocator.h",
5178 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005179 deps = MICROKERNEL_BENCHMARK_DEPS + [
5180 ":packing",
5181 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005182)
5183
5184xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005185 name = "f16_spmm_bench",
5186 srcs = [
5187 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005188 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005189 "src/xnnpack/AlignedAllocator.h",
5190 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005191 deps = MICROKERNEL_BENCHMARK_DEPS,
5192)
5193
5194xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005195 name = "f16_vrelu_bench",
5196 srcs = [
5197 "bench/f16-vrelu.cc",
5198 "src/xnnpack/AlignedAllocator.h",
5199 ] + MICROKERNEL_BENCHMARK_HDRS,
5200 deps = MICROKERNEL_BENCHMARK_DEPS,
5201)
5202
5203xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005204 name = "f32_igemm_bench",
5205 srcs = [
5206 "bench/f32-igemm.cc",
5207 "bench/conv.h",
5208 "src/xnnpack/AlignedAllocator.h",
5209 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005210 deps = MICROKERNEL_BENCHMARK_DEPS + [
5211 ":indirection",
5212 ":packing",
5213 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005214)
5215
5216xnnpack_benchmark(
5217 name = "f32_conv_hwc_bench",
5218 srcs = [
5219 "bench/f32-conv-hwc.cc",
5220 "bench/dconv.h",
5221 "src/xnnpack/AlignedAllocator.h",
5222 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005223 deps = MICROKERNEL_BENCHMARK_DEPS + [
5224 ":packing",
5225 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005226)
5227
5228xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005229 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005230 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005231 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005232 "bench/dconv.h",
5233 "src/xnnpack/AlignedAllocator.h",
5234 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005235 deps = MICROKERNEL_BENCHMARK_DEPS + [
5236 ":packing",
5237 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005238)
5239
5240xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005241 name = "f16_dwconv_bench",
5242 srcs = [
5243 "bench/f16-dwconv.cc",
5244 "bench/dwconv.h",
5245 "bench/google/dwconv.h",
5246 "src/xnnpack/AlignedAllocator.h",
5247 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005248 deps = MICROKERNEL_BENCHMARK_DEPS + [
5249 ":indirection",
5250 ":packing",
5251 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005252)
5253
5254xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005255 name = "f32_dwconv_bench",
5256 srcs = [
5257 "bench/f32-dwconv.cc",
5258 "bench/dwconv.h",
5259 "src/xnnpack/AlignedAllocator.h",
5260 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005261 deps = MICROKERNEL_BENCHMARK_DEPS + [
5262 ":indirection",
5263 ":packing",
5264 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005265)
5266
5267xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005268 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005269 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005270 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005271 "bench/dwconv.h",
5272 "src/xnnpack/AlignedAllocator.h",
5273 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005274 deps = MICROKERNEL_BENCHMARK_DEPS + [
5275 ":indirection",
5276 ":packing",
5277 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005278)
5279
5280xnnpack_benchmark(
5281 name = "f32_gemm_bench",
5282 srcs = [
5283 "bench/f32-gemm.cc",
5284 "bench/gemm.h",
5285 "src/xnnpack/AlignedAllocator.h",
5286 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005287 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005288 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005289)
5290
5291xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005292 name = "f32_raddexpminusmax_bench",
5293 srcs = [
5294 "bench/f32-raddexpminusmax.cc",
5295 "src/xnnpack/AlignedAllocator.h",
5296 ] + MICROKERNEL_BENCHMARK_HDRS,
5297 deps = MICROKERNEL_BENCHMARK_DEPS,
5298)
5299
5300xnnpack_benchmark(
5301 name = "f32_raddextexp_bench",
5302 srcs = [
5303 "bench/f32-raddextexp.cc",
5304 "src/xnnpack/AlignedAllocator.h",
5305 ] + MICROKERNEL_BENCHMARK_HDRS,
5306 deps = MICROKERNEL_BENCHMARK_DEPS,
5307)
5308
5309xnnpack_benchmark(
5310 name = "f32_raddstoreexpminusmax_bench",
5311 srcs = [
5312 "bench/f32-raddstoreexpminusmax.cc",
5313 "src/xnnpack/AlignedAllocator.h",
5314 ] + MICROKERNEL_BENCHMARK_HDRS,
5315 deps = MICROKERNEL_BENCHMARK_DEPS,
5316)
5317
5318xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005319 name = "f32_rmax_bench",
5320 srcs = [
5321 "bench/f32-rmax.cc",
5322 "src/xnnpack/AlignedAllocator.h",
5323 ] + MICROKERNEL_BENCHMARK_HDRS,
5324 deps = MICROKERNEL_BENCHMARK_DEPS,
5325)
5326
5327xnnpack_benchmark(
5328 name = "f32_spmm_bench",
5329 srcs = [
5330 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005331 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005332 "src/xnnpack/AlignedAllocator.h",
5333 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005334 deps = MICROKERNEL_BENCHMARK_DEPS,
5335)
5336
5337xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005338 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005339 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005340 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005341 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005342 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005343 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005344)
5345
5346xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005347 name = "f32_velu_bench",
5348 srcs = [
5349 "bench/f32-velu.cc",
5350 "src/xnnpack/AlignedAllocator.h",
5351 ] + MICROKERNEL_BENCHMARK_HDRS,
5352 deps = MICROKERNEL_BENCHMARK_DEPS,
5353)
5354
5355xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005356 name = "f32_vhswish_bench",
5357 srcs = [
5358 "bench/f32-vhswish.cc",
5359 "src/xnnpack/AlignedAllocator.h",
5360 ] + MICROKERNEL_BENCHMARK_HDRS,
5361 deps = MICROKERNEL_BENCHMARK_DEPS,
5362)
5363
5364xnnpack_benchmark(
5365 name = "f32_vrelu_bench",
5366 srcs = [
5367 "bench/f32-vrelu.cc",
5368 "src/xnnpack/AlignedAllocator.h",
5369 ] + MICROKERNEL_BENCHMARK_HDRS,
5370 deps = MICROKERNEL_BENCHMARK_DEPS,
5371)
5372
5373xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005374 name = "f32_vscaleexpminusmax_bench",
5375 srcs = [
5376 "bench/f32-vscaleexpminusmax.cc",
5377 "src/xnnpack/AlignedAllocator.h",
5378 ] + MICROKERNEL_BENCHMARK_HDRS,
5379 deps = MICROKERNEL_BENCHMARK_DEPS,
5380)
5381
5382xnnpack_benchmark(
5383 name = "f32_vscaleextexp_bench",
5384 srcs = [
5385 "bench/f32-vscaleextexp.cc",
5386 "src/xnnpack/AlignedAllocator.h",
5387 ] + MICROKERNEL_BENCHMARK_HDRS,
5388 deps = MICROKERNEL_BENCHMARK_DEPS,
5389)
5390
5391xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005392 name = "f32_vsigmoid_bench",
5393 srcs = [
5394 "bench/f32-vsigmoid.cc",
5395 "src/xnnpack/AlignedAllocator.h",
5396 ] + MICROKERNEL_BENCHMARK_HDRS,
5397 deps = MICROKERNEL_BENCHMARK_DEPS,
5398)
5399
5400xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005401 name = "f32_vsqrt_bench",
5402 srcs = [
5403 "bench/f32-vsqrt.cc",
5404 "src/xnnpack/AlignedAllocator.h",
5405 ] + MICROKERNEL_BENCHMARK_HDRS,
5406 deps = MICROKERNEL_BENCHMARK_DEPS,
5407)
5408
5409xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005410 name = "f32_im2col_gemm_bench",
5411 srcs = [
5412 "bench/f32-im2col-gemm.cc",
5413 "bench/conv.h",
5414 "src/xnnpack/AlignedAllocator.h",
5415 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005416 deps = MICROKERNEL_BENCHMARK_DEPS + [
5417 ":im2col",
5418 ":packing",
5419 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005420)
5421
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005422xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005423 name = "rounding_bench",
5424 srcs = [
5425 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005426 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005427 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005428 ] + MICROKERNEL_BENCHMARK_HDRS,
5429 deps = MICROKERNEL_BENCHMARK_DEPS,
5430)
5431
Marat Dukhan08c4a432019-10-03 09:29:21 -07005432########################### Benchmarks for operators ###########################
5433
5434xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005435 name = "average_pooling_bench",
5436 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005437 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005438 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005439 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005440)
5441
5442xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005443 name = "bankers_rounding_bench",
5444 srcs = ["bench/bankers-rounding.cc"],
5445 copts = xnnpack_optional_tflite_copts(),
5446 tags = ["nowin32"],
5447 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5448)
5449
5450xnnpack_benchmark(
5451 name = "ceiling_bench",
5452 srcs = ["bench/ceiling.cc"],
5453 copts = xnnpack_optional_tflite_copts(),
5454 tags = ["nowin32"],
5455 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5456)
5457
5458xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005459 name = "channel_shuffle_bench",
5460 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005461 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005462)
5463
5464xnnpack_benchmark(
5465 name = "convolution_bench",
5466 srcs = ["bench/convolution.cc"],
5467 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005468 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005469 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005470)
5471
5472xnnpack_benchmark(
5473 name = "deconvolution_bench",
5474 srcs = ["bench/deconvolution.cc"],
5475 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005476 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005477 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005478)
5479
5480xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005481 name = "elu_bench",
5482 srcs = ["bench/elu.cc"],
5483 copts = xnnpack_optional_tflite_copts(),
5484 tags = ["nowin32"],
5485 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5486)
5487
5488xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005489 name = "floor_bench",
5490 srcs = ["bench/floor.cc"],
5491 copts = xnnpack_optional_tflite_copts(),
5492 tags = ["nowin32"],
5493 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5494)
5495
5496xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005497 name = "global_average_pooling_bench",
5498 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005499 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005500)
5501
5502xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005503 name = "hardswish_bench",
5504 srcs = ["bench/hardswish.cc"],
5505 copts = xnnpack_optional_tflite_copts(),
5506 tags = ["nowin32"],
5507 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5508)
5509
5510xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005511 name = "max_pooling_bench",
5512 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005513 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005514)
5515
5516xnnpack_benchmark(
5517 name = "sigmoid_bench",
5518 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005519 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005520 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005521 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005522)
5523
5524xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005525 name = "prelu_bench",
5526 srcs = ["bench/prelu.cc"],
5527 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005528 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005529 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005530)
5531
5532xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005533 name = "softmax_bench",
5534 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005535 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005536 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005537 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005538)
5539
Marat Dukhan87727142020-06-24 15:24:10 -07005540xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005541 name = "square_root_bench",
5542 srcs = ["bench/square-root.cc"],
5543 copts = xnnpack_optional_tflite_copts(),
5544 tags = ["nowin32"],
5545 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5546)
5547
5548xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005549 name = "truncation_bench",
5550 srcs = ["bench/truncation.cc"],
5551 deps = OPERATOR_BENCHMARK_DEPS,
5552)
5553
Marat Dukhanc068bb62019-10-04 13:24:39 -07005554############################# End-to-end benchmarks ############################
5555
5556cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005557 name = "fp32_mobilenet_v1",
5558 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005559 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005560 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005561 linkstatic = True,
5562 deps = [
5563 ":XNNPACK",
5564 "@pthreadpool",
5565 ],
5566)
5567
5568cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005569 name = "fp32_sparse_mobilenet_v1",
5570 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5571 hdrs = ["models/models.h"],
5572 copts = xnnpack_std_cxxopts(),
5573 linkstatic = True,
5574 deps = [
5575 ":XNNPACK",
5576 "@pthreadpool",
5577 ],
5578)
5579
5580cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005581 name = "fp16_mobilenet_v1",
5582 srcs = ["models/fp16-mobilenet-v1.cc"],
5583 hdrs = ["models/models.h"],
5584 copts = xnnpack_std_cxxopts(),
5585 linkstatic = True,
5586 deps = [
5587 ":XNNPACK",
5588 "@FP16",
5589 "@pthreadpool",
5590 ],
5591)
5592
5593cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005594 name = "qs8_mobilenet_v1",
5595 srcs = ["models/qs8-mobilenet-v1.cc"],
5596 hdrs = ["models/models.h"],
5597 copts = xnnpack_std_cxxopts(),
5598 linkstatic = True,
5599 deps = [
5600 ":XNNPACK",
5601 "@pthreadpool",
5602 ],
5603)
5604
5605cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07005606 name = "qs8_mobilenet_v2",
5607 srcs = ["models/qs8-mobilenet-v2.cc"],
5608 hdrs = ["models/models.h"],
5609 copts = xnnpack_std_cxxopts(),
5610 linkstatic = True,
5611 deps = [
5612 ":XNNPACK",
5613 "@pthreadpool",
5614 ],
5615)
5616
5617cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005618 name = "qu8_mobilenet_v1",
5619 srcs = ["models/qu8-mobilenet-v1.cc"],
5620 hdrs = ["models/models.h"],
5621 copts = xnnpack_std_cxxopts(),
5622 linkstatic = True,
5623 deps = [
5624 ":XNNPACK",
5625 "@pthreadpool",
5626 ],
5627)
5628
5629cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005630 name = "fp32_mobilenet_v2",
5631 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005632 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005633 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005634 linkstatic = True,
5635 deps = [
5636 ":XNNPACK",
5637 "@pthreadpool",
5638 ],
5639)
5640
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005641cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005642 name = "fp32_sparse_mobilenet_v2",
5643 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
5644 hdrs = ["models/models.h"],
5645 copts = xnnpack_std_cxxopts(),
5646 linkstatic = True,
5647 deps = [
5648 ":XNNPACK",
5649 "@pthreadpool",
5650 ],
5651)
5652
5653cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005654 name = "fp16_mobilenet_v2",
5655 srcs = ["models/fp16-mobilenet-v2.cc"],
5656 hdrs = ["models/models.h"],
5657 copts = xnnpack_std_cxxopts(),
5658 linkstatic = True,
5659 deps = [
5660 ":XNNPACK",
5661 "@FP16",
5662 "@pthreadpool",
5663 ],
5664)
5665
5666cc_library(
5667 name = "fp32_mobilenet_v3_large",
5668 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005669 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005670 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005671 linkstatic = True,
5672 deps = [
5673 ":XNNPACK",
5674 "@pthreadpool",
5675 ],
5676)
5677
5678cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005679 name = "fp32_sparse_mobilenet_v3_large",
5680 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
5681 hdrs = ["models/models.h"],
5682 copts = xnnpack_std_cxxopts(),
5683 linkstatic = True,
5684 deps = [
5685 ":XNNPACK",
5686 "@pthreadpool",
5687 ],
5688)
5689
5690cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005691 name = "fp16_mobilenet_v3_large",
5692 srcs = ["models/fp16-mobilenet-v3-large.cc"],
5693 hdrs = ["models/models.h"],
5694 copts = xnnpack_std_cxxopts(),
5695 linkstatic = True,
5696 deps = [
5697 ":XNNPACK",
5698 "@FP16",
5699 "@pthreadpool",
5700 ],
5701)
5702
5703cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005704 name = "fp32_mobilenet_v3_small",
5705 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005706 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005707 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005708 linkstatic = True,
5709 deps = [
5710 ":XNNPACK",
5711 "@pthreadpool",
5712 ],
5713)
5714
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005715cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005716 name = "fp32_sparse_mobilenet_v3_small",
5717 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
5718 hdrs = ["models/models.h"],
5719 copts = xnnpack_std_cxxopts(),
5720 linkstatic = True,
5721 deps = [
5722 ":XNNPACK",
5723 "@pthreadpool",
5724 ],
5725)
5726
5727cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005728 name = "fp16_mobilenet_v3_small",
5729 srcs = ["models/fp16-mobilenet-v3-small.cc"],
5730 hdrs = ["models/models.h"],
5731 copts = xnnpack_std_cxxopts(),
5732 linkstatic = True,
5733 deps = [
5734 ":XNNPACK",
5735 "@FP16",
5736 "@pthreadpool",
5737 ],
5738)
5739
Marat Dukhanc068bb62019-10-04 13:24:39 -07005740xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07005741 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005742 srcs = [
5743 "bench/f32-dwconv-e2e.cc",
5744 "bench/end2end.h",
5745 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07005746 deps = MICROKERNEL_BENCHMARK_DEPS + [
5747 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005748 ":fp32_mobilenet_v1",
5749 ":fp32_mobilenet_v2",
5750 ":fp32_mobilenet_v3_large",
5751 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07005752 ],
5753)
5754
5755xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07005756 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005757 srcs = [
5758 "bench/f32-gemm-e2e.cc",
5759 "bench/end2end.h",
5760 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07005761 deps = MICROKERNEL_BENCHMARK_DEPS + [
5762 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005763 ":fp32_mobilenet_v1",
5764 ":fp32_mobilenet_v2",
5765 ":fp32_mobilenet_v3_large",
5766 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07005767 ],
5768)
5769
5770xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08005771 name = "qs8_gemm_e2e_bench",
5772 srcs = [
5773 "bench/qs8-gemm-e2e.cc",
5774 "bench/end2end.h",
5775 ] + MICROKERNEL_BENCHMARK_HDRS,
5776 deps = MICROKERNEL_BENCHMARK_DEPS + [
5777 ":XNNPACK",
5778 ":qs8_mobilenet_v1",
5779 ":qs8_mobilenet_v2",
5780 ],
5781)
5782
5783xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07005784 name = "end2end_bench",
5785 srcs = ["bench/end2end.cc"],
5786 deps = [
5787 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07005788 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005789 ":fp16_mobilenet_v1",
5790 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005791 ":fp16_mobilenet_v3_large",
5792 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005793 ":fp32_mobilenet_v1",
5794 ":fp32_mobilenet_v2",
5795 ":fp32_mobilenet_v3_large",
5796 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08005797 ":fp32_sparse_mobilenet_v1",
5798 ":fp32_sparse_mobilenet_v2",
5799 ":fp32_sparse_mobilenet_v3_large",
5800 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005801 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07005802 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005803 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07005804 "@pthreadpool",
5805 ],
5806)
5807
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005808#################### Accuracy evaluation for math functions ####################
5809
5810xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005811 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005812 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005813 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005814 "src/xnnpack/AlignedAllocator.h",
5815 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08005816 deps = ACCURACY_EVAL_DEPS + [
5817 ":bench_utils",
5818 "@cpuinfo",
5819 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005820)
5821
Marat Dukhan515c9772019-10-17 18:07:57 -07005822xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005823 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07005824 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005825 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07005826 "src/xnnpack/AlignedAllocator.h",
5827 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08005828 deps = ACCURACY_EVAL_DEPS + [
5829 ":bench_utils",
5830 "@cpuinfo",
5831 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07005832)
5833
Marat Dukhan98ba4412019-10-23 02:14:28 -07005834xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005835 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08005836 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005837 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08005838 "src/xnnpack/AlignedAllocator.h",
5839 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08005840 deps = ACCURACY_EVAL_DEPS + [
5841 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08005842 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08005843 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08005844)
5845
5846xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005847 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07005848 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005849 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07005850 "src/xnnpack/AlignedAllocator.h",
5851 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08005852 deps = ACCURACY_EVAL_DEPS + [
5853 ":bench_utils",
5854 "@cpuinfo",
5855 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07005856)
5857
Marat Dukhanf44f0222020-12-14 11:53:27 -08005858xnnpack_benchmark(
5859 name = "f32_sigmoid_ulp_eval",
5860 srcs = [
5861 "eval/f32-sigmoid-ulp.cc",
5862 "src/xnnpack/AlignedAllocator.h",
5863 ] + ACCURACY_EVAL_HDRS,
5864 deps = ACCURACY_EVAL_DEPS + [
5865 ":bench_utils",
5866 "@cpuinfo",
5867 ],
5868)
5869
5870xnnpack_benchmark(
5871 name = "f32_sqrt_ulp_eval",
5872 srcs = [
5873 "eval/f32-sqrt-ulp.cc",
5874 "src/xnnpack/AlignedAllocator.h",
5875 ] + ACCURACY_EVAL_HDRS,
5876 deps = ACCURACY_EVAL_DEPS + [
5877 ":bench_utils",
5878 "@cpuinfo",
5879 ],
5880)
5881
5882################### Accuracy verification for math functions ##################
5883
5884xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08005885 name = "f32_exp_eval",
5886 srcs = [
5887 "eval/f32-exp.cc",
5888 "src/xnnpack/AlignedAllocator.h",
5889 "src/xnnpack/math-stubs.h",
5890 ] + MICROKERNEL_TEST_HDRS,
5891 automatic = False,
5892 deps = MICROKERNEL_TEST_DEPS,
5893)
5894
5895xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08005896 name = "f32_expm1minus_eval",
5897 srcs = [
5898 "eval/f32-expm1minus.cc",
5899 "src/xnnpack/AlignedAllocator.h",
5900 "src/xnnpack/math-stubs.h",
5901 ] + MICROKERNEL_TEST_HDRS,
5902 automatic = False,
5903 deps = MICROKERNEL_TEST_DEPS,
5904)
5905
Marat Dukhan8853b822020-05-07 12:19:01 -07005906xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08005907 name = "f32_expminus_eval",
5908 srcs = [
5909 "eval/f32-expminus.cc",
5910 "src/xnnpack/AlignedAllocator.h",
5911 "src/xnnpack/math-stubs.h",
5912 ] + MICROKERNEL_TEST_HDRS,
5913 automatic = False,
5914 deps = MICROKERNEL_TEST_DEPS,
5915)
5916
5917xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07005918 name = "f32_roundne_eval",
5919 srcs = [
5920 "eval/f32-roundne.cc",
5921 "src/xnnpack/AlignedAllocator.h",
5922 "src/xnnpack/math-stubs.h",
5923 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07005924 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07005925 deps = MICROKERNEL_TEST_DEPS,
5926)
5927
Marat Dukhan2dbb9442020-05-12 20:43:43 -07005928xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07005929 name = "f32_roundd_eval",
5930 srcs = [
5931 "eval/f32-roundd.cc",
5932 "src/xnnpack/AlignedAllocator.h",
5933 "src/xnnpack/math-stubs.h",
5934 ] + MICROKERNEL_TEST_HDRS,
5935 automatic = False,
5936 deps = MICROKERNEL_TEST_DEPS,
5937)
5938
5939xnnpack_unit_test(
5940 name = "f32_roundu_eval",
5941 srcs = [
5942 "eval/f32-roundu.cc",
5943 "src/xnnpack/AlignedAllocator.h",
5944 "src/xnnpack/math-stubs.h",
5945 ] + MICROKERNEL_TEST_HDRS,
5946 automatic = False,
5947 deps = MICROKERNEL_TEST_DEPS,
5948)
5949
5950xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07005951 name = "f32_roundz_eval",
5952 srcs = [
5953 "eval/f32-roundz.cc",
5954 "src/xnnpack/AlignedAllocator.h",
5955 "src/xnnpack/math-stubs.h",
5956 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07005957 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07005958 deps = MICROKERNEL_TEST_DEPS,
5959)
5960
Marat Dukhan08c4a432019-10-03 09:29:21 -07005961######################### Unit tests for micro-kernels #########################
5962
5963xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07005964 name = "f16_dwconv_minmax_test",
5965 srcs = [
5966 "test/f16-dwconv-minmax.cc",
5967 "test/dwconv-microkernel-tester.h",
5968 "src/xnnpack/AlignedAllocator.h",
5969 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
5970 deps = MICROKERNEL_TEST_DEPS + [":packing"],
5971)
5972
5973xnnpack_unit_test(
5974 name = "f16_gavgpool_minmax_test",
5975 srcs = [
5976 "test/f16-gavgpool-minmax.cc",
5977 "test/gavgpool-microkernel-tester.h",
5978 "src/xnnpack/AlignedAllocator.h",
5979 ] + MICROKERNEL_TEST_HDRS,
5980 deps = MICROKERNEL_TEST_DEPS,
5981)
5982
5983xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07005984 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005985 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07005986 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005987 "test/gemm-microkernel-tester.h",
5988 "src/xnnpack/AlignedAllocator.h",
5989 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005990 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005991)
5992
5993xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07005994 name = "f16_igemm_minmax_test",
5995 srcs = [
5996 "test/f16-igemm-minmax.cc",
5997 "test/gemm-microkernel-tester.h",
5998 "src/xnnpack/AlignedAllocator.h",
5999 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6000 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6001)
6002
6003xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006004 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006005 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006006 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006007 "test/spmm-microkernel-tester.h",
6008 "src/xnnpack/AlignedAllocator.h",
6009 ] + MICROKERNEL_TEST_HDRS,
6010 deps = MICROKERNEL_TEST_DEPS,
6011)
6012
6013xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006014 name = "f16_vadd_minmax_test",
6015 srcs = [
6016 "test/f16-vadd-minmax.cc",
6017 "test/vbinary-microkernel-tester.h",
6018 ] + MICROKERNEL_TEST_HDRS,
6019 deps = MICROKERNEL_TEST_DEPS,
6020)
6021
6022xnnpack_unit_test(
6023 name = "f16_vaddc_minmax_test",
6024 srcs = [
6025 "test/f16-vaddc-minmax.cc",
6026 "test/vbinaryc-microkernel-tester.h",
6027 ] + MICROKERNEL_TEST_HDRS,
6028 deps = MICROKERNEL_TEST_DEPS,
6029)
6030
6031xnnpack_unit_test(
6032 name = "f16_vclamp_test",
6033 srcs = [
6034 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006035 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006036 ] + MICROKERNEL_TEST_HDRS,
6037 deps = MICROKERNEL_TEST_DEPS,
6038)
6039
6040xnnpack_unit_test(
6041 name = "f16_vdiv_minmax_test",
6042 srcs = [
6043 "test/f16-vdiv-minmax.cc",
6044 "test/vbinary-microkernel-tester.h",
6045 ] + MICROKERNEL_TEST_HDRS,
6046 deps = MICROKERNEL_TEST_DEPS,
6047)
6048
6049xnnpack_unit_test(
6050 name = "f16_vdivc_minmax_test",
6051 srcs = [
6052 "test/f16-vdivc-minmax.cc",
6053 "test/vbinaryc-microkernel-tester.h",
6054 ] + MICROKERNEL_TEST_HDRS,
6055 deps = MICROKERNEL_TEST_DEPS,
6056)
6057
6058xnnpack_unit_test(
6059 name = "f16_vrdivc_minmax_test",
6060 srcs = [
6061 "test/f16-vrdivc-minmax.cc",
6062 "test/vbinaryc-microkernel-tester.h",
6063 ] + MICROKERNEL_TEST_HDRS,
6064 deps = MICROKERNEL_TEST_DEPS,
6065)
6066
6067xnnpack_unit_test(
6068 name = "f16_vhswish_test",
6069 srcs = [
6070 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006071 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006072 ] + MICROKERNEL_TEST_HDRS,
6073 deps = MICROKERNEL_TEST_DEPS,
6074)
6075
6076xnnpack_unit_test(
6077 name = "f16_vmax_test",
6078 srcs = [
6079 "test/f16-vmax.cc",
6080 "test/vbinary-microkernel-tester.h",
6081 ] + MICROKERNEL_TEST_HDRS,
6082 deps = MICROKERNEL_TEST_DEPS,
6083)
6084
6085xnnpack_unit_test(
6086 name = "f16_vmaxc_test",
6087 srcs = [
6088 "test/f16-vmaxc.cc",
6089 "test/vbinaryc-microkernel-tester.h",
6090 ] + MICROKERNEL_TEST_HDRS,
6091 deps = MICROKERNEL_TEST_DEPS,
6092)
6093
6094xnnpack_unit_test(
6095 name = "f16_vmin_test",
6096 srcs = [
6097 "test/f16-vmin.cc",
6098 "test/vbinary-microkernel-tester.h",
6099 ] + MICROKERNEL_TEST_HDRS,
6100 deps = MICROKERNEL_TEST_DEPS,
6101)
6102
6103xnnpack_unit_test(
6104 name = "f16_vminc_test",
6105 srcs = [
6106 "test/f16-vminc.cc",
6107 "test/vbinaryc-microkernel-tester.h",
6108 ] + MICROKERNEL_TEST_HDRS,
6109 deps = MICROKERNEL_TEST_DEPS,
6110)
6111
6112xnnpack_unit_test(
6113 name = "f16_vmul_minmax_test",
6114 srcs = [
6115 "test/f16-vmul-minmax.cc",
6116 "test/vbinary-microkernel-tester.h",
6117 ] + MICROKERNEL_TEST_HDRS,
6118 deps = MICROKERNEL_TEST_DEPS,
6119)
6120
6121xnnpack_unit_test(
6122 name = "f16_vmulc_minmax_test",
6123 srcs = [
6124 "test/f16-vmulc-minmax.cc",
6125 "test/vbinaryc-microkernel-tester.h",
6126 ] + MICROKERNEL_TEST_HDRS,
6127 deps = MICROKERNEL_TEST_DEPS,
6128)
6129
6130xnnpack_unit_test(
6131 name = "f16_vmulcaddc_minmax_test",
6132 srcs = [
6133 "test/f16-vmulcaddc-minmax.cc",
6134 "test/vmulcaddc-microkernel-tester.h",
6135 "src/xnnpack/AlignedAllocator.h",
6136 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6137 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6138)
6139
6140xnnpack_unit_test(
6141 name = "f16_vsub_minmax_test",
6142 srcs = [
6143 "test/f16-vsub-minmax.cc",
6144 "test/vbinary-microkernel-tester.h",
6145 ] + MICROKERNEL_TEST_HDRS,
6146 deps = MICROKERNEL_TEST_DEPS,
6147)
6148
6149xnnpack_unit_test(
6150 name = "f16_vsubc_minmax_test",
6151 srcs = [
6152 "test/f16-vsubc-minmax.cc",
6153 "test/vbinaryc-microkernel-tester.h",
6154 ] + MICROKERNEL_TEST_HDRS,
6155 deps = MICROKERNEL_TEST_DEPS,
6156)
6157
6158xnnpack_unit_test(
6159 name = "f16_vrsubc_minmax_test",
6160 srcs = [
6161 "test/f16-vrsubc-minmax.cc",
6162 "test/vbinaryc-microkernel-tester.h",
6163 ] + MICROKERNEL_TEST_HDRS,
6164 deps = MICROKERNEL_TEST_DEPS,
6165)
6166
6167xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006168 name = "f32_argmaxpool_test",
6169 srcs = [
6170 "test/f32-argmaxpool.cc",
6171 "test/argmaxpool-microkernel-tester.h",
6172 "src/xnnpack/AlignedAllocator.h",
6173 ] + MICROKERNEL_TEST_HDRS,
6174 deps = MICROKERNEL_TEST_DEPS,
6175)
6176
6177xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006178 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006179 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006180 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006181 "test/avgpool-microkernel-tester.h",
6182 "src/xnnpack/AlignedAllocator.h",
6183 ] + MICROKERNEL_TEST_HDRS,
6184 deps = MICROKERNEL_TEST_DEPS,
6185)
6186
6187xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006188 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006189 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006190 "test/f32-ibilinear.cc",
6191 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006192 "src/xnnpack/AlignedAllocator.h",
6193 ] + MICROKERNEL_TEST_HDRS,
6194 deps = MICROKERNEL_TEST_DEPS,
6195)
6196
6197xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006198 name = "f32_ibilinear_chw_test",
6199 srcs = [
6200 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006201 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006202 "src/xnnpack/AlignedAllocator.h",
6203 ] + MICROKERNEL_TEST_HDRS,
6204 deps = MICROKERNEL_TEST_DEPS,
6205)
6206
6207xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006208 name = "f32_igemm_test",
6209 srcs = [
6210 "test/f32-igemm.cc",
6211 "test/gemm-microkernel-tester.h",
6212 "src/xnnpack/AlignedAllocator.h",
6213 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006214 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006215)
6216
6217xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006218 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006219 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006220 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006221 "test/gemm-microkernel-tester.h",
6222 "src/xnnpack/AlignedAllocator.h",
6223 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006224 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006225)
6226
6227xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006228 name = "f32_igemm_minmax_test",
6229 srcs = [
6230 "test/f32-igemm-minmax.cc",
6231 "test/gemm-microkernel-tester.h",
6232 "src/xnnpack/AlignedAllocator.h",
6233 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006234 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006235)
6236
6237xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006238 name = "f32_conv_hwc_test",
6239 srcs = [
6240 "test/f32-conv-hwc.cc",
6241 "test/conv-hwc-microkernel-tester.h",
6242 "src/xnnpack/AlignedAllocator.h",
6243 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006244 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006245)
6246
6247xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006248 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006249 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006250 "test/f32-conv-hwc2chw.cc",
6251 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006252 "src/xnnpack/AlignedAllocator.h",
6253 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006254 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006255)
6256
6257xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006258 name = "f32_dwconv_test",
6259 srcs = [
6260 "test/f32-dwconv.cc",
6261 "test/dwconv-microkernel-tester.h",
6262 "src/xnnpack/AlignedAllocator.h",
6263 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006264 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006265)
6266
6267xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006268 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006269 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006270 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006271 "test/dwconv-microkernel-tester.h",
6272 "src/xnnpack/AlignedAllocator.h",
6273 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006274 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006275)
6276
6277xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006278 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006279 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006280 "test/f32-dwconv2d-chw.cc",
6281 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006282 "src/xnnpack/AlignedAllocator.h",
6283 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006284 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006285)
6286
6287xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006288 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006289 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006290 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006291 "test/gavgpool-microkernel-tester.h",
6292 "src/xnnpack/AlignedAllocator.h",
6293 ] + MICROKERNEL_TEST_HDRS,
6294 deps = MICROKERNEL_TEST_DEPS,
6295)
6296
6297xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006298 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006299 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006300 "test/f32-gavgpool-cw.cc",
6301 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006302 "src/xnnpack/AlignedAllocator.h",
6303 ] + MICROKERNEL_TEST_HDRS,
6304 deps = MICROKERNEL_TEST_DEPS,
6305)
6306
6307xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006308 name = "f32_gemm_test",
6309 srcs = [
6310 "test/f32-gemm.cc",
6311 "test/gemm-microkernel-tester.h",
6312 "src/xnnpack/AlignedAllocator.h",
6313 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006314 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006315)
6316
6317xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006318 name = "f32_gemm_relu_test",
6319 srcs = [
6320 "test/f32-gemm-relu.cc",
6321 "test/gemm-microkernel-tester.h",
6322 "src/xnnpack/AlignedAllocator.h",
6323 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006324 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006325)
6326
6327xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006328 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006329 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006330 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006331 "test/gemm-microkernel-tester.h",
6332 "src/xnnpack/AlignedAllocator.h",
6333 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006334 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006335)
6336
6337xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006338 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006339 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006340 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006341 "test/gemm-microkernel-tester.h",
6342 "src/xnnpack/AlignedAllocator.h",
6343 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006344 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006345)
6346
6347xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006348 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006349 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006350 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006351 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006352 ] + MICROKERNEL_TEST_HDRS,
6353 deps = MICROKERNEL_TEST_DEPS,
6354)
6355
6356xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006357 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006358 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006359 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006360 "test/maxpool-microkernel-tester.h",
6361 ] + MICROKERNEL_TEST_HDRS,
6362 deps = MICROKERNEL_TEST_DEPS,
6363)
6364
6365xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006366 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006367 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006368 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006369 "test/avgpool-microkernel-tester.h",
6370 "src/xnnpack/AlignedAllocator.h",
6371 ] + MICROKERNEL_TEST_HDRS,
6372 deps = MICROKERNEL_TEST_DEPS,
6373)
6374
6375xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006376 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006377 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006378 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006379 "test/gemm-microkernel-tester.h",
6380 "src/xnnpack/AlignedAllocator.h",
6381 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006382 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006383)
6384
6385xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006386 name = "f16_prelu_test",
6387 srcs = [
6388 "test/f16-prelu.cc",
6389 "test/prelu-microkernel-tester.h",
6390 "src/xnnpack/AlignedAllocator.h",
6391 ] + MICROKERNEL_TEST_HDRS,
6392 deps = MICROKERNEL_TEST_DEPS,
6393)
6394
6395xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006396 name = "f32_prelu_test",
6397 srcs = [
6398 "test/f32-prelu.cc",
6399 "test/prelu-microkernel-tester.h",
6400 "src/xnnpack/AlignedAllocator.h",
6401 ] + MICROKERNEL_TEST_HDRS,
6402 deps = MICROKERNEL_TEST_DEPS,
6403)
6404
6405xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006406 name = "f32_raddexpminusmax_test",
6407 srcs = [
6408 "test/f32-raddexpminusmax.cc",
6409 "test/raddexpminusmax-microkernel-tester.h",
6410 ] + MICROKERNEL_TEST_HDRS,
6411 deps = MICROKERNEL_TEST_DEPS,
6412)
6413
6414xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006415 name = "f32_raddextexp_test",
6416 srcs = [
6417 "test/f32-raddextexp.cc",
6418 "test/raddextexp-microkernel-tester.h",
6419 ] + MICROKERNEL_TEST_HDRS,
6420 deps = MICROKERNEL_TEST_DEPS,
6421)
6422
6423xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006424 name = "f32_raddstoreexpminusmax_test",
6425 srcs = [
6426 "test/f32-raddstoreexpminusmax.cc",
6427 "test/raddstoreexpminusmax-microkernel-tester.h",
6428 ] + MICROKERNEL_TEST_HDRS,
6429 deps = MICROKERNEL_TEST_DEPS,
6430)
6431
6432xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006433 name = "f32_rmax_test",
6434 srcs = [
6435 "test/f32-rmax.cc",
6436 "test/rmax-microkernel-tester.h",
6437 ] + MICROKERNEL_TEST_HDRS,
6438 deps = MICROKERNEL_TEST_DEPS,
6439)
6440
6441xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006442 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006443 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006444 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006445 "test/spmm-microkernel-tester.h",
6446 "src/xnnpack/AlignedAllocator.h",
6447 ] + MICROKERNEL_TEST_HDRS,
6448 deps = MICROKERNEL_TEST_DEPS,
6449)
6450
6451xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006452 name = "f32_vabs_test",
6453 srcs = [
6454 "test/f32-vabs.cc",
6455 "test/vunary-microkernel-tester.h",
6456 ] + MICROKERNEL_TEST_HDRS,
6457 deps = MICROKERNEL_TEST_DEPS,
6458)
6459
6460xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006461 name = "f32_vadd_test",
6462 srcs = [
6463 "test/f32-vadd.cc",
6464 "test/vbinary-microkernel-tester.h",
6465 ] + MICROKERNEL_TEST_HDRS,
6466 deps = MICROKERNEL_TEST_DEPS,
6467)
6468
6469xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006470 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006471 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006472 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006473 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006474 ] + MICROKERNEL_TEST_HDRS,
6475 deps = MICROKERNEL_TEST_DEPS,
6476)
6477
6478xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006479 name = "f32_vadd_relu_test",
6480 srcs = [
6481 "test/f32-vadd-relu.cc",
6482 "test/vbinary-microkernel-tester.h",
6483 ] + MICROKERNEL_TEST_HDRS,
6484 deps = MICROKERNEL_TEST_DEPS,
6485)
6486
6487xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006488 name = "f32_vaddc_test",
6489 srcs = [
6490 "test/f32-vaddc.cc",
6491 "test/vbinaryc-microkernel-tester.h",
6492 ] + MICROKERNEL_TEST_HDRS,
6493 deps = MICROKERNEL_TEST_DEPS,
6494)
6495
6496xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006497 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006498 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006499 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006500 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006501 ] + MICROKERNEL_TEST_HDRS,
6502 deps = MICROKERNEL_TEST_DEPS,
6503)
6504
6505xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006506 name = "f32_vaddc_relu_test",
6507 srcs = [
6508 "test/f32-vaddc-relu.cc",
6509 "test/vbinaryc-microkernel-tester.h",
6510 ] + MICROKERNEL_TEST_HDRS,
6511 deps = MICROKERNEL_TEST_DEPS,
6512)
6513
6514xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006515 name = "f32_vclamp_test",
6516 srcs = [
6517 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006518 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006519 ] + MICROKERNEL_TEST_HDRS,
6520 deps = MICROKERNEL_TEST_DEPS,
6521)
6522
6523xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006524 name = "f32_vdiv_test",
6525 srcs = [
6526 "test/f32-vdiv.cc",
6527 "test/vbinary-microkernel-tester.h",
6528 ] + MICROKERNEL_TEST_HDRS,
6529 deps = MICROKERNEL_TEST_DEPS,
6530)
6531
6532xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006533 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006534 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006535 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006536 "test/vbinary-microkernel-tester.h",
6537 ] + MICROKERNEL_TEST_HDRS,
6538 deps = MICROKERNEL_TEST_DEPS,
6539)
6540
6541xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006542 name = "f32_vdiv_relu_test",
6543 srcs = [
6544 "test/f32-vdiv-relu.cc",
6545 "test/vbinary-microkernel-tester.h",
6546 ] + MICROKERNEL_TEST_HDRS,
6547 deps = MICROKERNEL_TEST_DEPS,
6548)
6549
6550xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006551 name = "f32_vdivc_test",
6552 srcs = [
6553 "test/f32-vdivc.cc",
6554 "test/vbinaryc-microkernel-tester.h",
6555 ] + MICROKERNEL_TEST_HDRS,
6556 deps = MICROKERNEL_TEST_DEPS,
6557)
6558
6559xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006560 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006561 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006562 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006563 "test/vbinaryc-microkernel-tester.h",
6564 ] + MICROKERNEL_TEST_HDRS,
6565 deps = MICROKERNEL_TEST_DEPS,
6566)
6567
6568xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006569 name = "f32_vdivc_relu_test",
6570 srcs = [
6571 "test/f32-vdivc-relu.cc",
6572 "test/vbinaryc-microkernel-tester.h",
6573 ] + MICROKERNEL_TEST_HDRS,
6574 deps = MICROKERNEL_TEST_DEPS,
6575)
6576
6577xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006578 name = "f32_vrdivc_test",
6579 srcs = [
6580 "test/f32-vrdivc.cc",
6581 "test/vbinaryc-microkernel-tester.h",
6582 ] + MICROKERNEL_TEST_HDRS,
6583 deps = MICROKERNEL_TEST_DEPS,
6584)
6585
6586xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006587 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006588 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006589 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006590 "test/vbinaryc-microkernel-tester.h",
6591 ] + MICROKERNEL_TEST_HDRS,
6592 deps = MICROKERNEL_TEST_DEPS,
6593)
6594
6595xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006596 name = "f32_vrdivc_relu_test",
6597 srcs = [
6598 "test/f32-vrdivc-relu.cc",
6599 "test/vbinaryc-microkernel-tester.h",
6600 ] + MICROKERNEL_TEST_HDRS,
6601 deps = MICROKERNEL_TEST_DEPS,
6602)
6603
6604xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006605 name = "f32_velu_test",
6606 srcs = [
6607 "test/f32-velu.cc",
6608 "test/vunary-microkernel-tester.h",
6609 ] + MICROKERNEL_TEST_HDRS,
6610 deps = MICROKERNEL_TEST_DEPS,
6611)
6612
6613xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08006614 name = "f32_vmax_test",
6615 srcs = [
6616 "test/f32-vmax.cc",
6617 "test/vbinary-microkernel-tester.h",
6618 ] + MICROKERNEL_TEST_HDRS,
6619 deps = MICROKERNEL_TEST_DEPS,
6620)
6621
6622xnnpack_unit_test(
6623 name = "f32_vmaxc_test",
6624 srcs = [
6625 "test/f32-vmaxc.cc",
6626 "test/vbinaryc-microkernel-tester.h",
6627 ] + MICROKERNEL_TEST_HDRS,
6628 deps = MICROKERNEL_TEST_DEPS,
6629)
6630
6631xnnpack_unit_test(
6632 name = "f32_vmin_test",
6633 srcs = [
6634 "test/f32-vmin.cc",
6635 "test/vbinary-microkernel-tester.h",
6636 ] + MICROKERNEL_TEST_HDRS,
6637 deps = MICROKERNEL_TEST_DEPS,
6638)
6639
6640xnnpack_unit_test(
6641 name = "f32_vminc_test",
6642 srcs = [
6643 "test/f32-vminc.cc",
6644 "test/vbinaryc-microkernel-tester.h",
6645 ] + MICROKERNEL_TEST_HDRS,
6646 deps = MICROKERNEL_TEST_DEPS,
6647)
6648
6649xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006650 name = "f32_vmul_test",
6651 srcs = [
6652 "test/f32-vmul.cc",
6653 "test/vbinary-microkernel-tester.h",
6654 ] + MICROKERNEL_TEST_HDRS,
6655 deps = MICROKERNEL_TEST_DEPS,
6656)
6657
6658xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006659 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006660 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006661 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006662 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006663 ] + MICROKERNEL_TEST_HDRS,
6664 deps = MICROKERNEL_TEST_DEPS,
6665)
6666
6667xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006668 name = "f32_vmul_relu_test",
6669 srcs = [
6670 "test/f32-vmul-relu.cc",
6671 "test/vbinary-microkernel-tester.h",
6672 ] + MICROKERNEL_TEST_HDRS,
6673 deps = MICROKERNEL_TEST_DEPS,
6674)
6675
6676xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006677 name = "f32_vmulc_test",
6678 srcs = [
6679 "test/f32-vmulc.cc",
6680 "test/vbinaryc-microkernel-tester.h",
6681 ] + MICROKERNEL_TEST_HDRS,
6682 deps = MICROKERNEL_TEST_DEPS,
6683)
6684
6685xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006686 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006687 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006688 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006689 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006690 ] + MICROKERNEL_TEST_HDRS,
6691 deps = MICROKERNEL_TEST_DEPS,
6692)
6693
6694xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006695 name = "f32_vmulc_relu_test",
6696 srcs = [
6697 "test/f32-vmulc-relu.cc",
6698 "test/vbinaryc-microkernel-tester.h",
6699 ] + MICROKERNEL_TEST_HDRS,
6700 deps = MICROKERNEL_TEST_DEPS,
6701)
6702
6703xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006704 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006705 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006706 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006707 "test/vmulcaddc-microkernel-tester.h",
6708 "src/xnnpack/AlignedAllocator.h",
6709 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006710 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006711)
6712
6713xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07006714 name = "f32_vlrelu_test",
6715 srcs = [
6716 "test/f32-vlrelu.cc",
6717 "test/vunary-microkernel-tester.h",
6718 ] + MICROKERNEL_TEST_HDRS,
6719 deps = MICROKERNEL_TEST_DEPS,
6720)
6721
6722xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006723 name = "f32_vneg_test",
6724 srcs = [
6725 "test/f32-vneg.cc",
6726 "test/vunary-microkernel-tester.h",
6727 ] + MICROKERNEL_TEST_HDRS,
6728 deps = MICROKERNEL_TEST_DEPS,
6729)
6730
6731xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006732 name = "f32_vrelu_test",
6733 srcs = [
6734 "test/f32-vrelu.cc",
6735 "test/vunary-microkernel-tester.h",
6736 ] + MICROKERNEL_TEST_HDRS,
6737 deps = MICROKERNEL_TEST_DEPS,
6738)
6739
6740xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07006741 name = "f32_vrndne_test",
6742 srcs = [
6743 "test/f32-vrndne.cc",
6744 "test/vunary-microkernel-tester.h",
6745 ] + MICROKERNEL_TEST_HDRS,
6746 deps = MICROKERNEL_TEST_DEPS,
6747)
6748
6749xnnpack_unit_test(
6750 name = "f32_vrndz_test",
6751 srcs = [
6752 "test/f32-vrndz.cc",
6753 "test/vunary-microkernel-tester.h",
6754 ] + MICROKERNEL_TEST_HDRS,
6755 deps = MICROKERNEL_TEST_DEPS,
6756)
6757
6758xnnpack_unit_test(
6759 name = "f32_vrndu_test",
6760 srcs = [
6761 "test/f32-vrndu.cc",
6762 "test/vunary-microkernel-tester.h",
6763 ] + MICROKERNEL_TEST_HDRS,
6764 deps = MICROKERNEL_TEST_DEPS,
6765)
6766
6767xnnpack_unit_test(
6768 name = "f32_vrndd_test",
6769 srcs = [
6770 "test/f32-vrndd.cc",
6771 "test/vunary-microkernel-tester.h",
6772 ] + MICROKERNEL_TEST_HDRS,
6773 deps = MICROKERNEL_TEST_DEPS,
6774)
6775
6776xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07006777 name = "f32_vscale_test",
6778 srcs = [
6779 "test/f32-vscale.cc",
6780 "test/vscale-microkernel-tester.h",
6781 ] + MICROKERNEL_TEST_HDRS,
6782 deps = MICROKERNEL_TEST_DEPS,
6783)
6784
6785xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006786 name = "f32_vscaleexpminusmax_test",
6787 srcs = [
6788 "test/f32-vscaleexpminusmax.cc",
6789 "test/vscaleexpminusmax-microkernel-tester.h",
6790 ] + MICROKERNEL_TEST_HDRS,
6791 deps = MICROKERNEL_TEST_DEPS,
6792)
6793
6794xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006795 name = "f32_vscaleextexp_test",
6796 srcs = [
6797 "test/f32-vscaleextexp.cc",
6798 "test/vscaleextexp-microkernel-tester.h",
6799 ] + MICROKERNEL_TEST_HDRS,
6800 deps = MICROKERNEL_TEST_DEPS,
6801)
6802
6803xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006804 name = "f32_vsigmoid_test",
6805 srcs = [
6806 "test/f32-vsigmoid.cc",
6807 "test/vunary-microkernel-tester.h",
6808 ] + MICROKERNEL_TEST_HDRS,
6809 deps = MICROKERNEL_TEST_DEPS,
6810)
6811
6812xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006813 name = "f32_vsqr_test",
6814 srcs = [
6815 "test/f32-vsqr.cc",
6816 "test/vunary-microkernel-tester.h",
6817 ] + MICROKERNEL_TEST_HDRS,
6818 deps = MICROKERNEL_TEST_DEPS,
6819)
6820
6821xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07006822 name = "f32_vsqrdiff_test",
6823 srcs = [
6824 "test/f32-vsqrdiff.cc",
6825 "test/vbinary-microkernel-tester.h",
6826 ] + MICROKERNEL_TEST_HDRS,
6827 deps = MICROKERNEL_TEST_DEPS,
6828)
6829
6830xnnpack_unit_test(
6831 name = "f32_vsqrdiffc_test",
6832 srcs = [
6833 "test/f32-vsqrdiffc.cc",
6834 "test/vbinaryc-microkernel-tester.h",
6835 ] + MICROKERNEL_TEST_HDRS,
6836 deps = MICROKERNEL_TEST_DEPS,
6837)
6838
6839xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07006840 name = "f32_vsqrt_test",
6841 srcs = [
6842 "test/f32-vsqrt.cc",
6843 "test/vunary-microkernel-tester.h",
6844 ] + MICROKERNEL_TEST_HDRS,
6845 deps = MICROKERNEL_TEST_DEPS,
6846)
6847
6848xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006849 name = "f32_vsub_test",
6850 srcs = [
6851 "test/f32-vsub.cc",
6852 "test/vbinary-microkernel-tester.h",
6853 ] + MICROKERNEL_TEST_HDRS,
6854 deps = MICROKERNEL_TEST_DEPS,
6855)
6856
6857xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006858 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07006859 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006860 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006861 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006862 ] + MICROKERNEL_TEST_HDRS,
6863 deps = MICROKERNEL_TEST_DEPS,
6864)
6865
6866xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006867 name = "f32_vsub_relu_test",
6868 srcs = [
6869 "test/f32-vsub-relu.cc",
6870 "test/vbinary-microkernel-tester.h",
6871 ] + MICROKERNEL_TEST_HDRS,
6872 deps = MICROKERNEL_TEST_DEPS,
6873)
6874
6875xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006876 name = "f32_vsubc_test",
6877 srcs = [
6878 "test/f32-vsubc.cc",
6879 "test/vbinaryc-microkernel-tester.h",
6880 ] + MICROKERNEL_TEST_HDRS,
6881 deps = MICROKERNEL_TEST_DEPS,
6882)
6883
6884xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006885 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006886 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006887 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006888 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006889 ] + MICROKERNEL_TEST_HDRS,
6890 deps = MICROKERNEL_TEST_DEPS,
6891)
6892
6893xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006894 name = "f32_vsubc_relu_test",
6895 srcs = [
6896 "test/f32-vsubc-relu.cc",
6897 "test/vbinaryc-microkernel-tester.h",
6898 ] + MICROKERNEL_TEST_HDRS,
6899 deps = MICROKERNEL_TEST_DEPS,
6900)
6901
6902xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006903 name = "f32_vrsubc_test",
6904 srcs = [
6905 "test/f32-vrsubc.cc",
6906 "test/vbinaryc-microkernel-tester.h",
6907 ] + MICROKERNEL_TEST_HDRS,
6908 deps = MICROKERNEL_TEST_DEPS,
6909)
6910
6911xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006912 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006913 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006914 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006915 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07006916 ] + MICROKERNEL_TEST_HDRS,
6917 deps = MICROKERNEL_TEST_DEPS,
6918)
6919
6920xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006921 name = "f32_vrsubc_relu_test",
6922 srcs = [
6923 "test/f32-vrsubc-relu.cc",
6924 "test/vbinaryc-microkernel-tester.h",
6925 ] + MICROKERNEL_TEST_HDRS,
6926 deps = MICROKERNEL_TEST_DEPS,
6927)
6928
6929xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006930 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07006931 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006932 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07006933 "test/dwconv-microkernel-tester.h",
6934 "src/xnnpack/AlignedAllocator.h",
6935 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6936 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6937)
6938
6939xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07006940 name = "qs8_dwconv_minmax_fp32_test",
6941 srcs = [
6942 "test/qs8-dwconv-minmax-fp32.cc",
6943 "test/dwconv-microkernel-tester.h",
6944 "src/xnnpack/AlignedAllocator.h",
6945 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6946 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6947)
6948
6949xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07006950 name = "qs8_gavgpool_minmax_test",
6951 srcs = [
6952 "test/qs8-gavgpool-minmax.cc",
6953 "test/gavgpool-microkernel-tester.h",
6954 "src/xnnpack/AlignedAllocator.h",
6955 ] + MICROKERNEL_TEST_HDRS,
6956 deps = MICROKERNEL_TEST_DEPS,
6957)
6958
6959xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006960 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07006961 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07006962 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006963 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07006964 "test/gemm-microkernel-tester.h",
6965 "src/xnnpack/AlignedAllocator.h",
6966 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6967 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6968)
6969
6970xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07006971 name = "qs8_gemm_minmax_fp32_test",
6972 timeout = "moderate",
6973 srcs = [
6974 "test/qs8-gemm-minmax-fp32.cc",
6975 "test/gemm-microkernel-tester.h",
6976 "src/xnnpack/AlignedAllocator.h",
6977 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6978 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6979)
6980
6981xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006982 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07006983 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07006984 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07006985 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07006986 "test/gemm-microkernel-tester.h",
6987 "src/xnnpack/AlignedAllocator.h",
6988 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6989 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6990)
6991
6992xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07006993 name = "qs8_igemm_minmax_fp32_test",
6994 timeout = "moderate",
6995 srcs = [
6996 "test/qs8-igemm-minmax-fp32.cc",
6997 "test/gemm-microkernel-tester.h",
6998 "src/xnnpack/AlignedAllocator.h",
6999 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7000 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7001)
7002
7003xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007004 name = "qs8_requantization_test",
7005 srcs = [
7006 "src/xnnpack/requantization-stubs.h",
7007 "test/qs8-requantization.cc",
7008 "test/requantization-tester.h",
7009 ] + MICROKERNEL_TEST_HDRS,
7010 deps = MICROKERNEL_TEST_DEPS,
7011)
7012
7013xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007014 name = "qs8_vadd_minmax_test",
7015 srcs = [
7016 "test/qs8-vadd-minmax.cc",
7017 "test/vadd-microkernel-tester.h",
7018 ] + MICROKERNEL_TEST_HDRS,
7019 deps = MICROKERNEL_TEST_DEPS,
7020)
7021
7022xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007023 name = "qs8_vaddc_minmax_test",
7024 srcs = [
7025 "test/qs8-vaddc-minmax.cc",
7026 "test/vaddc-microkernel-tester.h",
7027 ] + MICROKERNEL_TEST_HDRS,
7028 deps = MICROKERNEL_TEST_DEPS,
7029)
7030
7031xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007032 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007033 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007034 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007035 "test/avgpool-microkernel-tester.h",
7036 "src/xnnpack/AlignedAllocator.h",
7037 ] + MICROKERNEL_TEST_HDRS,
7038 deps = MICROKERNEL_TEST_DEPS,
7039)
7040
7041xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007042 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007043 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007044 "test/qu8-dwconv-minmax.cc",
7045 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007046 "src/xnnpack/AlignedAllocator.h",
7047 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007048 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007049)
7050
7051xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007052 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007053 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007054 "test/qu8-igemm-minmax.cc",
7055 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007056 "src/xnnpack/AlignedAllocator.h",
7057 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007058 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007059)
7060
7061xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007062 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007063 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007064 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007065 "test/gavgpool-microkernel-tester.h",
7066 "src/xnnpack/AlignedAllocator.h",
7067 ] + MICROKERNEL_TEST_HDRS,
7068 deps = MICROKERNEL_TEST_DEPS,
7069)
7070
7071xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007072 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007073 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007074 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007075 "test/gemm-microkernel-tester.h",
7076 "src/xnnpack/AlignedAllocator.h",
7077 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007078 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007079)
7080
7081xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007082 name = "qu8_requantization_test",
7083 srcs = [
7084 "src/xnnpack/requantization-stubs.h",
7085 "test/qu8-requantization.cc",
7086 "test/requantization-tester.h",
7087 ] + MICROKERNEL_TEST_HDRS,
7088 deps = MICROKERNEL_TEST_DEPS,
7089)
7090
7091xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007092 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007093 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007094 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007095 "test/vadd-microkernel-tester.h",
7096 ] + MICROKERNEL_TEST_HDRS,
7097 deps = MICROKERNEL_TEST_DEPS,
7098)
7099
7100xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007101 name = "u8_lut32norm_test",
7102 srcs = [
7103 "test/u8-lut32norm.cc",
7104 "test/lut-norm-microkernel-tester.h",
7105 ] + MICROKERNEL_TEST_HDRS,
7106 deps = MICROKERNEL_TEST_DEPS,
7107)
7108
7109xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007110 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007111 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007112 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007113 "test/maxpool-microkernel-tester.h",
7114 ] + MICROKERNEL_TEST_HDRS,
7115 deps = MICROKERNEL_TEST_DEPS,
7116)
7117
7118xnnpack_unit_test(
7119 name = "u8_rmax_test",
7120 srcs = [
7121 "test/u8-rmax.cc",
7122 "test/rmax-microkernel-tester.h",
7123 ] + MICROKERNEL_TEST_HDRS,
7124 deps = MICROKERNEL_TEST_DEPS,
7125)
7126
7127xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007128 name = "u8_vclamp_test",
7129 srcs = [
7130 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007131 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007132 ] + MICROKERNEL_TEST_HDRS,
7133 deps = MICROKERNEL_TEST_DEPS,
7134)
7135
7136xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007137 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007138 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007139 "test/x32-depthtospace2d-chw2hwc.cc",
7140 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007141 ] + MICROKERNEL_TEST_HDRS,
7142 deps = MICROKERNEL_TEST_DEPS,
7143)
7144
7145xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007146 name = "x32_fill_test",
7147 srcs = [
7148 "test/x32-fill.cc",
7149 "test/fill-microkernel-tester.h",
7150 ] + MICROKERNEL_TEST_HDRS,
7151 deps = MICROKERNEL_TEST_DEPS,
7152)
7153
7154xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007155 name = "x32_packx_test",
7156 srcs = [
7157 "test/x32-packx.cc",
7158 "test/pack-microkernel-tester.h",
7159 "src/xnnpack/AlignedAllocator.h",
7160 ] + MICROKERNEL_TEST_HDRS,
7161 deps = MICROKERNEL_TEST_DEPS,
7162)
7163
7164xnnpack_unit_test(
7165 name = "x32_pad_test",
7166 srcs = [
7167 "test/x32-pad.cc",
7168 "test/pad-microkernel-tester.h",
7169 ] + MICROKERNEL_TEST_HDRS,
7170 deps = MICROKERNEL_TEST_DEPS,
7171)
7172
7173xnnpack_unit_test(
7174 name = "x32_unpool_test",
7175 srcs = [
7176 "test/x32-unpool.cc",
7177 "test/unpool-microkernel-tester.h",
7178 ] + MICROKERNEL_TEST_HDRS,
7179 deps = MICROKERNEL_TEST_DEPS,
7180)
7181
7182xnnpack_unit_test(
7183 name = "x32_zip_test",
7184 srcs = [
7185 "test/x32-zip.cc",
7186 "test/zip-microkernel-tester.h",
7187 ] + MICROKERNEL_TEST_HDRS,
7188 deps = MICROKERNEL_TEST_DEPS,
7189)
7190
7191xnnpack_unit_test(
7192 name = "x8_lut_test",
7193 srcs = [
7194 "test/x8-lut.cc",
7195 "test/lut-microkernel-tester.h",
7196 ] + MICROKERNEL_TEST_HDRS,
7197 deps = MICROKERNEL_TEST_DEPS,
7198)
7199
7200xnnpack_unit_test(
7201 name = "x8_zip_test",
7202 srcs = [
7203 "test/x8-zip.cc",
7204 "test/zip-microkernel-tester.h",
7205 ] + MICROKERNEL_TEST_HDRS,
7206 deps = MICROKERNEL_TEST_DEPS,
7207)
7208
Marat Dukhan20c3b922020-03-10 03:45:06 -07007209########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007210
7211xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007212 name = "operator_size_test",
7213 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007214 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007215)
7216
Marat Dukhan20c3b922020-03-10 03:45:06 -07007217xnnpack_binary(
7218 name = "subgraph_size_test",
7219 srcs = ["test/subgraph-size.c"],
7220 deps = [":XNNPACK"],
7221)
7222
7223########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007224
7225xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007226 name = "abs_nc_test",
7227 srcs = [
7228 "test/abs-nc.cc",
7229 "test/abs-operator-tester.h",
7230 ],
7231 deps = OPERATOR_TEST_DEPS,
7232)
7233
7234xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007235 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007236 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007237 srcs = [
7238 "test/add-nd.cc",
7239 "test/binary-elementwise-operator-tester.h",
7240 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007241 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007242)
7243
7244xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007245 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007246 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007247 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007248 "test/argmax-pooling-operator-tester.h",
7249 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007250 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007251)
7252
7253xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007254 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007255 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007256 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007257 "test/average-pooling-operator-tester.h",
7258 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007259 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007260)
7261
7262xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007263 name = "bankers_rounding_nc_test",
7264 srcs = [
7265 "test/bankers-rounding-nc.cc",
7266 "test/bankers-rounding-operator-tester.h",
7267 ],
7268 deps = OPERATOR_TEST_DEPS,
7269)
7270
7271xnnpack_unit_test(
7272 name = "ceiling_nc_test",
7273 srcs = [
7274 "test/ceiling-nc.cc",
7275 "test/ceiling-operator-tester.h",
7276 ],
7277 deps = OPERATOR_TEST_DEPS,
7278)
7279
7280xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007281 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007282 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007283 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007284 "test/channel-shuffle-operator-tester.h",
7285 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007286 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007287)
7288
7289xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007290 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007291 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007292 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007293 "test/clamp-operator-tester.h",
7294 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007295 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007296)
7297
7298xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007299 name = "constant_pad_nd_test",
7300 srcs = [
7301 "test/constant-pad-nd.cc",
7302 "test/constant-pad-operator-tester.h",
7303 ],
7304 deps = OPERATOR_TEST_DEPS,
7305)
7306
7307xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007308 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007309 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007310 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007311 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007312 "test/convolution-operator-tester.h",
7313 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007314 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007315)
7316
7317xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007318 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007319 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007320 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007321 "test/convolution-nchw.cc",
7322 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007323 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007324 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007325)
7326
7327xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007328 name = "copy_nc_test",
7329 srcs = [
7330 "test/copy-nc.cc",
7331 "test/copy-operator-tester.h",
7332 ],
7333 deps = OPERATOR_TEST_DEPS,
7334)
7335
7336xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007337 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007338 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007339 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007340 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007341 "test/deconvolution-operator-tester.h",
7342 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007343 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007344)
7345
7346xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007347 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007348 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007349 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007350 "test/depth-to-space-operator-tester.h",
7351 ] + OPERATOR_TEST_PARAMS_HDRS,
7352 deps = OPERATOR_TEST_DEPS,
7353)
7354
7355xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007356 name = "depth_to_space_nhwc_test",
7357 srcs = [
7358 "test/depth-to-space-nhwc.cc",
7359 "test/depth-to-space-operator-tester.h",
7360 ] + OPERATOR_TEST_PARAMS_HDRS,
7361 deps = OPERATOR_TEST_DEPS,
7362)
7363
7364xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007365 name = "divide_nd_test",
7366 srcs = [
7367 "test/binary-elementwise-operator-tester.h",
7368 "test/divide-nd.cc",
7369 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007370 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007371)
7372
7373xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007374 name = "elu_nc_test",
7375 srcs = [
7376 "test/elu-nc.cc",
7377 "test/elu-operator-tester.h",
7378 ],
7379 deps = OPERATOR_TEST_DEPS,
7380)
7381
7382xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007383 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007384 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007385 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007386 "test/fully-connected-operator-tester.h",
7387 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007388 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007389)
7390
7391xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007392 name = "floor_nc_test",
7393 srcs = [
7394 "test/floor-nc.cc",
7395 "test/floor-operator-tester.h",
7396 ],
7397 deps = OPERATOR_TEST_DEPS,
7398)
7399
7400xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007401 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007402 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007403 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007404 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007405 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007406 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007407)
7408
7409xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007410 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007411 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007412 "test/global-average-pooling-ncw.cc",
7413 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007414 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007415 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007416)
7417
7418xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007419 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007420 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007421 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007422 "test/hardswish-operator-tester.h",
7423 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007424 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007425)
7426
7427xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007428 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007429 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007430 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007431 "test/leaky-relu-operator-tester.h",
7432 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007433 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007434)
7435
7436xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007437 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007438 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007439 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007440 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007441 "test/max-pooling-operator-tester.h",
7442 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007443 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007444)
7445
7446xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007447 name = "maximum_nd_test",
7448 srcs = [
7449 "test/binary-elementwise-operator-tester.h",
7450 "test/maximum-nd.cc",
7451 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007452 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007453)
7454
7455xnnpack_unit_test(
7456 name = "minimum_nd_test",
7457 srcs = [
7458 "test/binary-elementwise-operator-tester.h",
7459 "test/minimum-nd.cc",
7460 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007461 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007462)
7463
7464xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007465 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007466 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007467 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007468 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007469 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007470 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007471)
7472
7473xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007474 name = "negate_nc_test",
7475 srcs = [
7476 "test/negate-nc.cc",
7477 "test/negate-operator-tester.h",
7478 ],
7479 deps = OPERATOR_TEST_DEPS,
7480)
7481
7482xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007483 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007484 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007485 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007486 "test/prelu-operator-tester.h",
7487 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007488 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007489)
7490
7491xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007492 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007493 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007494 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007495 "test/resize-bilinear-operator-tester.h",
7496 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007497 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007498)
7499
7500xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007501 name = "resize_bilinear_nchw_test",
7502 srcs = [
7503 "test/resize-bilinear-nchw.cc",
7504 "test/resize-bilinear-operator-tester.h",
7505 ] + OPERATOR_TEST_PARAMS_HDRS,
7506 deps = OPERATOR_TEST_DEPS,
7507)
7508
7509xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007510 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007511 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007512 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007513 "test/sigmoid-operator-tester.h",
7514 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007515 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007516)
7517
7518xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007519 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007520 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007521 "test/softmax-nc.cc",
7522 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007523 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007524 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007525)
7526
7527xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007528 name = "square_nc_test",
7529 srcs = [
7530 "test/square-nc.cc",
7531 "test/square-operator-tester.h",
7532 ],
7533 deps = OPERATOR_TEST_DEPS,
7534)
7535
7536xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007537 name = "square_root_nc_test",
7538 srcs = [
7539 "test/square-root-nc.cc",
7540 "test/square-root-operator-tester.h",
7541 ],
7542 deps = OPERATOR_TEST_DEPS,
7543)
7544
7545xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007546 name = "squared_difference_nd_test",
7547 srcs = [
7548 "test/binary-elementwise-operator-tester.h",
7549 "test/squared-difference-nd.cc",
7550 ],
7551 deps = OPERATOR_TEST_DEPS,
7552)
7553
7554xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007555 name = "subtract_nd_test",
7556 srcs = [
7557 "test/binary-elementwise-operator-tester.h",
7558 "test/subtract-nd.cc",
7559 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007560 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007561)
7562
7563xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007564 name = "truncation_nc_test",
7565 srcs = [
7566 "test/truncation-nc.cc",
7567 "test/truncation-operator-tester.h",
7568 ],
7569 deps = OPERATOR_TEST_DEPS,
7570)
7571
7572xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007573 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007574 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007575 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007576 "test/unpooling-operator-tester.h",
7577 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007578 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007579)
7580
Chao Mei6ddfc602020-05-13 22:29:36 -07007581############################### Misc unit tests ###############################
7582
7583xnnpack_unit_test(
7584 name = "memory_planner_test",
7585 srcs = [
7586 "test/memory-planner-test.cc",
7587 ],
7588 deps = [
7589 ":XNNPACK",
7590 ":memory_planner",
7591 ],
7592)
7593
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07007594xnnpack_unit_test(
7595 name = "subgraph_nchw_test",
7596 srcs = [
7597 "src/xnnpack/subgraph.h",
7598 "test/subgraph-nchw.cc",
7599 "test/subgraph-tester.h",
7600 ],
7601 deps = [
7602 ":XNNPACK",
7603 ],
7604)
7605
Marat Dukhan08c4a432019-10-03 09:29:21 -07007606############################# Build configurations #############################
7607
Marat Dukhanb8642352019-10-30 15:43:02 -07007608# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07007609config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007610 name = "xnn_enable_assembly_explicit_true",
7611 define_values = {"xnn_enable_assembly": "true"},
7612)
7613
7614# Disables usage of assembly kernels.
7615config_setting(
7616 name = "xnn_enable_assembly_explicit_false",
7617 define_values = {"xnn_enable_assembly": "false"},
7618)
7619
Marat Dukhan9de90e02020-06-18 16:04:12 -07007620# Enables usage of sparse inference.
7621config_setting(
7622 name = "xnn_enable_sparse_explicit_true",
7623 define_values = {"xnn_enable_sparse": "true"},
7624)
7625
7626# Disables usage of sparse inference.
7627config_setting(
7628 name = "xnn_enable_sparse_explicit_false",
7629 define_values = {"xnn_enable_sparse": "false"},
7630)
7631
Marat Dukhan05702cf2020-03-26 15:41:33 -07007632# Disables usage of HMP-aware optimizations.
7633config_setting(
7634 name = "xnn_enable_hmp_explicit_false",
7635 define_values = {"xnn_enable_hmp": "false"},
7636)
7637
Chao Mei6ddfc602020-05-13 22:29:36 -07007638# Enable usage of optimized memory allocation
7639config_setting(
7640 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07007641 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007642)
7643
7644# Disable usage of optimized memory allocation
7645config_setting(
7646 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07007647 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007648)
7649
Marat Dukhanb939cdb2021-03-30 18:51:51 -07007650# Enable QS8 inference in TFLite-specific version
7651config_setting(
7652 name = "xnn_enable_qs8_explicit_true",
7653 define_values = {"xnn_enable_qs8": "true"},
7654)
7655
7656# Disable QS8 inference in TFLite-specific version
7657config_setting(
7658 name = "xnn_enable_qs8_explicit_false",
7659 define_values = {"xnn_enable_qs8": "false"},
7660)
7661
Marat Dukhanb8642352019-10-30 15:43:02 -07007662# Builds with -c dbg
7663config_setting(
7664 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007665 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07007666 "compilation_mode": "dbg",
7667 },
7668)
7669
7670# Builds with -c opt
7671config_setting(
7672 name = "optimized_build",
7673 values = {
7674 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007675 },
7676)
7677
7678config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007679 name = "linux_k8",
7680 values = {"cpu": "k8"},
7681)
7682
7683config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007684 name = "linux_arm",
7685 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07007686)
7687
7688config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07007689 name = "linux_armeabi",
7690 values = {"cpu": "armeabi"},
7691)
7692
7693config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07007694 name = "linux_armhf",
7695 values = {"cpu": "armhf"},
7696)
7697
7698config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07007699 name = "linux_armv7a",
7700 values = {"cpu": "armv7a"},
7701)
7702
7703config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007704 name = "linux_aarch64",
7705 values = {"cpu": "aarch64"},
7706)
7707
7708config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007709 name = "android",
7710 values = {"crosstool_top": "//external:android/crosstool"},
7711)
7712
7713config_setting(
7714 name = "android_armv7",
7715 values = {
7716 "crosstool_top": "//external:android/crosstool",
7717 "cpu": "armeabi-v7a",
7718 },
7719)
7720
7721config_setting(
7722 name = "android_arm64",
7723 values = {
7724 "crosstool_top": "//external:android/crosstool",
7725 "cpu": "arm64-v8a",
7726 },
7727)
7728
7729config_setting(
7730 name = "android_x86",
7731 values = {
7732 "crosstool_top": "//external:android/crosstool",
7733 "cpu": "x86",
7734 },
7735)
7736
7737config_setting(
7738 name = "android_x86_64",
7739 values = {
7740 "crosstool_top": "//external:android/crosstool",
7741 "cpu": "x86_64",
7742 },
7743)
7744
7745config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007746 name = "windows_x86_64",
7747 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007748)
7749
7750config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007751 name = "windows_x86_64_clang",
7752 values = {
7753 "compiler": "clang-cl",
7754 "cpu": "x64_windows",
7755 },
7756)
7757
7758config_setting(
7759 name = "windows_x86_64_mingw",
7760 values = {
7761 "compiler": "mingw-gcc",
7762 "cpu": "x64_windows",
7763 },
7764)
7765
7766config_setting(
7767 name = "windows_x86_64_msys",
7768 values = {
7769 "compiler": "msys-gcc",
7770 "cpu": "x64_windows",
7771 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007772)
7773
7774config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07007775 name = "macos_x86_64",
7776 values = {
7777 "apple_platform_type": "macos",
7778 "cpu": "darwin",
7779 },
7780)
7781
7782config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01007783 name = "macos_arm64",
7784 values = {
7785 "apple_platform_type": "macos",
7786 "cpu": "darwin_arm64",
7787 },
7788)
7789
7790config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007791 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007792 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07007793)
7794
7795config_setting(
7796 name = "emscripten_wasm",
7797 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007798 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007799 "cpu": "wasm",
7800 },
7801)
7802
7803config_setting(
7804 name = "emscripten_wasmsimd",
7805 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007806 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007807 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07007808 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007809 },
7810)
7811
7812config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007813 name = "ios_armv7",
7814 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007815 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007816 "cpu": "ios_armv7",
7817 },
7818)
7819
7820config_setting(
7821 name = "ios_arm64",
7822 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007823 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007824 "cpu": "ios_arm64",
7825 },
7826)
7827
7828config_setting(
7829 name = "ios_arm64e",
7830 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007831 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007832 "cpu": "ios_arm64e",
7833 },
7834)
7835
7836config_setting(
7837 name = "ios_x86",
7838 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007839 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007840 "cpu": "ios_i386",
7841 },
7842)
7843
7844config_setting(
7845 name = "ios_x86_64",
7846 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007847 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007848 "cpu": "ios_x86_64",
7849 },
7850)
7851
7852config_setting(
7853 name = "watchos_armv7k",
7854 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007855 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007856 "cpu": "watchos_armv7k",
7857 },
7858)
7859
7860config_setting(
7861 name = "watchos_arm64_32",
7862 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007863 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007864 "cpu": "watchos_arm64_32",
7865 },
7866)
7867
7868config_setting(
7869 name = "watchos_x86",
7870 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007871 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007872 "cpu": "watchos_i386",
7873 },
7874)
7875
7876config_setting(
7877 name = "watchos_x86_64",
7878 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007879 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007880 "cpu": "watchos_x86_64",
7881 },
7882)
7883
7884config_setting(
7885 name = "tvos_arm64",
7886 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007887 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007888 "cpu": "tvos_arm64",
7889 },
7890)
7891
7892config_setting(
7893 name = "tvos_x86_64",
7894 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007895 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007896 "cpu": "tvos_x86_64",
7897 },
7898)