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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
sewardj2019a972011-03-07 16:04:07 +000037#include "libvex.h" /* needed for bb_to_IR.h */
florian933065d2011-07-11 01:48:02 +000038#include "libvex_s390x_common.h"
sewardj2019a972011-03-07 16:04:07 +000039#include "main_util.h" /* vassert */
40#include "main_globals.h" /* vex_traceflags */
41#include "guest_generic_bb_to_IR.h" /* DisResult */
42#include "guest_s390_defs.h" /* prototypes for this file's functions */
43#include "host_s390_disasm.h"
44#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
45
sewardj2019a972011-03-07 16:04:07 +000046
47/*------------------------------------------------------------*/
florianb4df7682011-07-05 02:09:01 +000048/*--- Forward declarations ---*/
49/*------------------------------------------------------------*/
50static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
florianb0bf6602012-05-05 00:01:16 +000051static void s390_irgen_xonc(IROp, IRTemp, IRTemp, IRTemp);
florian79e839e2012-05-05 02:20:30 +000052static void s390_irgen_CLC_EX(IRTemp, IRTemp, IRTemp);
florianb4df7682011-07-05 02:09:01 +000053
54
55/*------------------------------------------------------------*/
sewardj2019a972011-03-07 16:04:07 +000056/*--- Globals ---*/
57/*------------------------------------------------------------*/
58
59/* The IRSB* into which we're generating code. */
60static IRSB *irsb;
61
62/* The guest address for the instruction currently being
63 translated. */
64static Addr64 guest_IA_curr_instr;
65
66/* The guest address for the instruction following the current instruction. */
67static Addr64 guest_IA_next_instr;
68
69/* Result of disassembly step. */
70static DisResult *dis_res;
71
floriana64c2432011-07-16 02:11:50 +000072/* Resteer function and callback data */
73static Bool (*resteer_fn)(void *, Addr64);
74static void *resteer_data;
75
sewardj2019a972011-03-07 16:04:07 +000076/* The last seen execute target instruction */
77ULong last_execute_target;
78
79/* The possible outcomes of a decoding operation */
80typedef enum {
81 S390_DECODE_OK,
82 S390_DECODE_UNKNOWN_INSN,
83 S390_DECODE_UNIMPLEMENTED_INSN,
84 S390_DECODE_UNKNOWN_SPECIAL_INSN,
85 S390_DECODE_ERROR
86} s390_decode_t;
87
florian428dfdd2012-03-27 03:09:49 +000088
sewardj2019a972011-03-07 16:04:07 +000089/*------------------------------------------------------------*/
90/*--- Helpers for constructing IR. ---*/
91/*------------------------------------------------------------*/
92
93/* Sign extend a value with the given number of bits. This is a
94 macro because it allows us to overload the type of the value.
95 Note that VALUE must have a signed type! */
96#undef sign_extend
97#define sign_extend(value,num_bits) \
98(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
99 (sizeof(__typeof__(value)) * 8 - (num_bits)))
100
101
102/* Add a statement to the current irsb. */
103static __inline__ void
104stmt(IRStmt *st)
105{
106 addStmtToIRSB(irsb, st);
107}
108
109/* Allocate a new temporary of the given type. */
110static __inline__ IRTemp
111newTemp(IRType type)
112{
113 vassert(isPlausibleIRType(type));
114
115 return newIRTemp(irsb->tyenv, type);
116}
117
118/* Create an expression node for a temporary */
119static __inline__ IRExpr *
120mkexpr(IRTemp tmp)
121{
122 return IRExpr_RdTmp(tmp);
123}
124
florian8844a632012-04-13 04:04:06 +0000125/* Generate an expression node for an address. */
126static __inline__ IRExpr *
127mkaddr_expr(Addr64 addr)
128{
129 return IRExpr_Const(IRConst_U64(addr));
130}
131
sewardj2019a972011-03-07 16:04:07 +0000132/* Add a statement that assigns to a temporary */
133static __inline__ void
134assign(IRTemp dst, IRExpr *expr)
135{
136 stmt(IRStmt_WrTmp(dst, expr));
137}
138
florian8844a632012-04-13 04:04:06 +0000139/* Write an address into the guest_IA */
140static __inline__ void
141put_IA(IRExpr *address)
142{
143 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IA), address));
144}
145
146/* Add a dummy put to the guest_IA to satisfy an assert in bb_to_IR
147 that wants the last statement in an IRSB to be a put to the guest_IA.
148 Mostly used for insns that use the "counter" pseudo guest reg. */
149static __inline__ void
150dummy_put_IA(void)
151{
152 put_IA(IRExpr_Get(S390X_GUEST_OFFSET(guest_IA), Ity_I64));
153}
154
sewardj2019a972011-03-07 16:04:07 +0000155/* Create a temporary of the given type and assign the expression to it */
156static __inline__ IRTemp
157mktemp(IRType type, IRExpr *expr)
158{
159 IRTemp temp = newTemp(type);
160
161 assign(temp, expr);
162
163 return temp;
164}
165
166/* Create a unary expression */
167static __inline__ IRExpr *
168unop(IROp kind, IRExpr *op)
169{
170 return IRExpr_Unop(kind, op);
171}
172
173/* Create a binary expression */
174static __inline__ IRExpr *
175binop(IROp kind, IRExpr *op1, IRExpr *op2)
176{
177 return IRExpr_Binop(kind, op1, op2);
178}
179
180/* Create a ternary expression */
181static __inline__ IRExpr *
182triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
183{
184 return IRExpr_Triop(kind, op1, op2, op3);
185}
186
187/* Create a quaternary expression */
188static __inline__ IRExpr *
189qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
190{
191 return IRExpr_Qop(kind, op1, op2, op3, op4);
192}
193
194/* Create an expression node for an 8-bit integer constant */
195static __inline__ IRExpr *
196mkU8(UInt value)
197{
198 vassert(value < 256);
199
200 return IRExpr_Const(IRConst_U8((UChar)value));
201}
202
203/* Create an expression node for a 16-bit integer constant */
204static __inline__ IRExpr *
205mkU16(UInt value)
206{
207 vassert(value < 65536);
208
209 return IRExpr_Const(IRConst_U16((UShort)value));
210}
211
212/* Create an expression node for a 32-bit integer constant */
213static __inline__ IRExpr *
214mkU32(UInt value)
215{
216 return IRExpr_Const(IRConst_U32(value));
217}
218
219/* Create an expression node for a 64-bit integer constant */
220static __inline__ IRExpr *
221mkU64(ULong value)
222{
223 return IRExpr_Const(IRConst_U64(value));
224}
225
226/* Create an expression node for a 32-bit floating point constant
227 whose value is given by a bit pattern. */
228static __inline__ IRExpr *
229mkF32i(UInt value)
230{
231 return IRExpr_Const(IRConst_F32i(value));
232}
233
234/* Create an expression node for a 32-bit floating point constant
235 whose value is given by a bit pattern. */
236static __inline__ IRExpr *
237mkF64i(ULong value)
238{
239 return IRExpr_Const(IRConst_F64i(value));
240}
241
242/* Little helper function for my sanity. ITE = if-then-else */
243static IRExpr *
244mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
245{
246 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
247
248 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
249}
250
251/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
252static void __inline__
253store(IRExpr *addr, IRExpr *data)
254{
255 stmt(IRStmt_Store(Iend_BE, addr, data));
256}
257
258/* Create an expression that loads a TYPE sized value from ADDR.
259 This is a big-endian machine. */
260static __inline__ IRExpr *
261load(IRType type, IRExpr *addr)
262{
263 return IRExpr_Load(Iend_BE, type, addr);
264}
265
266/* Function call */
267static void
268call_function(IRExpr *callee_address)
269{
florian8844a632012-04-13 04:04:06 +0000270 put_IA(callee_address);
sewardj2019a972011-03-07 16:04:07 +0000271
florian8844a632012-04-13 04:04:06 +0000272 dis_res->whatNext = Dis_StopHere;
273 dis_res->jk_StopHere = Ijk_Call;
sewardj2019a972011-03-07 16:04:07 +0000274}
275
floriana64c2432011-07-16 02:11:50 +0000276/* Function call with known target. */
277static void
278call_function_and_chase(Addr64 callee_address)
279{
280 if (resteer_fn(resteer_data, callee_address)) {
281 dis_res->whatNext = Dis_ResteerU;
282 dis_res->continueAt = callee_address;
283 } else {
florian8844a632012-04-13 04:04:06 +0000284 put_IA(mkaddr_expr(callee_address));
285
floriana64c2432011-07-16 02:11:50 +0000286 dis_res->whatNext = Dis_StopHere;
florian8844a632012-04-13 04:04:06 +0000287 dis_res->jk_StopHere = Ijk_Call;
floriana64c2432011-07-16 02:11:50 +0000288 }
289}
290
sewardj2019a972011-03-07 16:04:07 +0000291/* Function return sequence */
292static void
293return_from_function(IRExpr *return_address)
294{
florian8844a632012-04-13 04:04:06 +0000295 put_IA(return_address);
sewardj2019a972011-03-07 16:04:07 +0000296
florian8844a632012-04-13 04:04:06 +0000297 dis_res->whatNext = Dis_StopHere;
298 dis_res->jk_StopHere = Ijk_Ret;
sewardj2019a972011-03-07 16:04:07 +0000299}
300
301/* A conditional branch whose target is not known at instrumentation time.
302
303 if (condition) goto computed_target;
304
305 Needs to be represented as:
306
307 if (! condition) goto next_instruction;
308 goto computed_target;
sewardj2019a972011-03-07 16:04:07 +0000309*/
310static void
florianf321da72012-07-21 20:32:57 +0000311if_condition_goto_computed(IRExpr *condition, IRExpr *target)
sewardj2019a972011-03-07 16:04:07 +0000312{
313 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
314
florianf321da72012-07-21 20:32:57 +0000315 condition = unop(Iop_Not1, condition);
316
florian8844a632012-04-13 04:04:06 +0000317 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr),
318 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +0000319
florian8844a632012-04-13 04:04:06 +0000320 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000321
florian8844a632012-04-13 04:04:06 +0000322 dis_res->whatNext = Dis_StopHere;
323 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000324}
325
326/* A conditional branch whose target is known at instrumentation time. */
327static void
328if_condition_goto(IRExpr *condition, Addr64 target)
329{
330 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
331
florian8844a632012-04-13 04:04:06 +0000332 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target),
333 S390X_GUEST_OFFSET(guest_IA)));
334
florian7346c7a2012-04-13 21:14:24 +0000335 put_IA(mkaddr_expr(guest_IA_next_instr));
florian8844a632012-04-13 04:04:06 +0000336
337 dis_res->whatNext = Dis_StopHere;
338 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000339}
340
341/* An unconditional branch. Target may or may not be known at instrumentation
342 time. */
343static void
344always_goto(IRExpr *target)
345{
florian8844a632012-04-13 04:04:06 +0000346 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000347
florian8844a632012-04-13 04:04:06 +0000348 dis_res->whatNext = Dis_StopHere;
349 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000350}
351
florian8844a632012-04-13 04:04:06 +0000352
floriana64c2432011-07-16 02:11:50 +0000353/* An unconditional branch to a known target. */
354static void
355always_goto_and_chase(Addr64 target)
356{
357 if (resteer_fn(resteer_data, target)) {
florian8844a632012-04-13 04:04:06 +0000358 /* Follow into the target */
floriana64c2432011-07-16 02:11:50 +0000359 dis_res->whatNext = Dis_ResteerU;
360 dis_res->continueAt = target;
361 } else {
florian8844a632012-04-13 04:04:06 +0000362 put_IA(mkaddr_expr(target));
363
364 dis_res->whatNext = Dis_StopHere;
365 dis_res->jk_StopHere = Ijk_Boring;
floriana64c2432011-07-16 02:11:50 +0000366 }
367}
368
sewardj2019a972011-03-07 16:04:07 +0000369/* A system call */
370static void
371system_call(IRExpr *sysno)
372{
373 /* Store the system call number in the pseudo register. */
florian428dfdd2012-03-27 03:09:49 +0000374 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_SYSNO), sysno));
sewardj2019a972011-03-07 16:04:07 +0000375
sewardj69007022011-04-28 20:13:45 +0000376 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
florian428dfdd2012-03-27 03:09:49 +0000377 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IP_AT_SYSCALL),
378 mkU64(guest_IA_curr_instr)));
sewardj2019a972011-03-07 16:04:07 +0000379
florian8844a632012-04-13 04:04:06 +0000380 put_IA(mkaddr_expr(guest_IA_next_instr));
381
sewardj2019a972011-03-07 16:04:07 +0000382 /* It's important that all ArchRegs carry their up-to-date value
383 at this point. So we declare an end-of-block here, which
384 forces any TempRegs caching ArchRegs to be flushed. */
florian8844a632012-04-13 04:04:06 +0000385 dis_res->whatNext = Dis_StopHere;
386 dis_res->jk_StopHere = Ijk_Sys_syscall;
sewardj2019a972011-03-07 16:04:07 +0000387}
388
389/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
390 instructions to VEX's IRRoundingMode. */
391static IRRoundingMode
392encode_rounding_mode(UChar mode)
393{
394 switch (mode) {
395 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
396 case S390_ROUND_ZERO: return Irrm_ZERO;
397 case S390_ROUND_POSINF: return Irrm_PosINF;
398 case S390_ROUND_NEGINF: return Irrm_NegINF;
399 }
400 vpanic("encode_rounding_mode");
401}
402
403static __inline__ IRExpr *get_fpr_dw0(UInt);
404static __inline__ void put_fpr_dw0(UInt, IRExpr *);
405
406/* Read a floating point register pair and combine their contents into a
407 128-bit value */
408static IRExpr *
409get_fpr_pair(UInt archreg)
410{
411 IRExpr *high = get_fpr_dw0(archreg);
412 IRExpr *low = get_fpr_dw0(archreg + 2);
413
414 return binop(Iop_F64HLtoF128, high, low);
415}
416
417/* Write a 128-bit floating point value into a register pair. */
418static void
419put_fpr_pair(UInt archreg, IRExpr *expr)
420{
421 IRExpr *high = unop(Iop_F128HItoF64, expr);
422 IRExpr *low = unop(Iop_F128LOtoF64, expr);
423
424 put_fpr_dw0(archreg, high);
425 put_fpr_dw0(archreg + 2, low);
426}
427
428
sewardj2019a972011-03-07 16:04:07 +0000429/*------------------------------------------------------------*/
430/*--- Build the flags thunk. ---*/
431/*------------------------------------------------------------*/
432
433/* Completely fill the flags thunk. We're always filling all fields.
434 Apparently, that is better for redundant PUT elimination. */
435static void
436s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
437{
438 UInt op_off, dep1_off, dep2_off, ndep_off;
439
florian428dfdd2012-03-27 03:09:49 +0000440 op_off = S390X_GUEST_OFFSET(guest_CC_OP);
441 dep1_off = S390X_GUEST_OFFSET(guest_CC_DEP1);
442 dep2_off = S390X_GUEST_OFFSET(guest_CC_DEP2);
443 ndep_off = S390X_GUEST_OFFSET(guest_CC_NDEP);
sewardj2019a972011-03-07 16:04:07 +0000444
445 stmt(IRStmt_Put(op_off, op));
446 stmt(IRStmt_Put(dep1_off, dep1));
447 stmt(IRStmt_Put(dep2_off, dep2));
448 stmt(IRStmt_Put(ndep_off, ndep));
449}
450
451
452/* Create an expression for V and widen the result to 64 bit. */
453static IRExpr *
454s390_cc_widen(IRTemp v, Bool sign_extend)
455{
456 IRExpr *expr;
457
458 expr = mkexpr(v);
459
460 switch (typeOfIRTemp(irsb->tyenv, v)) {
461 case Ity_I64:
462 break;
463 case Ity_I32:
464 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
465 break;
466 case Ity_I16:
467 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
468 break;
469 case Ity_I8:
470 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
471 break;
472 default:
473 vpanic("s390_cc_widen");
474 }
475
476 return expr;
477}
478
479static void
480s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
481{
482 IRExpr *op, *dep1, *dep2, *ndep;
483
484 op = mkU64(opc);
485 dep1 = s390_cc_widen(d1, sign_extend);
486 dep2 = mkU64(0);
487 ndep = mkU64(0);
488
489 s390_cc_thunk_fill(op, dep1, dep2, ndep);
490}
491
492
493static void
494s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
495{
496 IRExpr *op, *dep1, *dep2, *ndep;
497
498 op = mkU64(opc);
499 dep1 = s390_cc_widen(d1, sign_extend);
500 dep2 = s390_cc_widen(d2, sign_extend);
501 ndep = mkU64(0);
502
503 s390_cc_thunk_fill(op, dep1, dep2, ndep);
504}
505
506
507/* memcheck believes that the NDEP field in the flags thunk is always
508 defined. But for some flag computations (e.g. add with carry) that is
509 just not true. We therefore need to convey to memcheck that the value
510 of the ndep field does matter and therefore we make the DEP2 field
511 depend on it:
512
513 DEP2 = original_DEP2 ^ NDEP
514
515 In s390_calculate_cc we exploit that (a^b)^b == a
516 I.e. we xor the DEP2 value with the NDEP value to recover the
517 original_DEP2 value. */
518static void
519s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
520{
521 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
522
523 op = mkU64(opc);
524 dep1 = s390_cc_widen(d1, sign_extend);
525 dep2 = s390_cc_widen(d2, sign_extend);
526 ndep = s390_cc_widen(nd, sign_extend);
527
528 dep2x = binop(Iop_Xor64, dep2, ndep);
529
530 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
531}
532
533
534/* Write one floating point value into the flags thunk */
535static void
536s390_cc_thunk_put1f(UInt opc, IRTemp d1)
537{
538 IRExpr *op, *dep1, *dep2, *ndep;
539
540 op = mkU64(opc);
541 dep1 = mkexpr(d1);
542 dep2 = mkU64(0);
543 ndep = mkU64(0);
544
545 s390_cc_thunk_fill(op, dep1, dep2, ndep);
546}
547
548
549/* Write a floating point value and an integer into the flags thunk. The
550 integer value is zero-extended first. */
551static void
552s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
553{
554 IRExpr *op, *dep1, *dep2, *ndep;
555
556 op = mkU64(opc);
557 dep1 = mkexpr(d1);
558 dep2 = s390_cc_widen(d2, False);
559 ndep = mkU64(0);
560
561 s390_cc_thunk_fill(op, dep1, dep2, ndep);
562}
563
564
565/* Write a 128-bit floating point value into the flags thunk. This is
566 done by splitting the value into two 64-bits values. */
567static void
568s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
569{
570 IRExpr *op, *hi, *lo, *ndep;
571
572 op = mkU64(opc);
573 hi = unop(Iop_F128HItoF64, mkexpr(d1));
574 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
575 ndep = mkU64(0);
576
577 s390_cc_thunk_fill(op, hi, lo, ndep);
578}
579
580
581/* Write a 128-bit floating point value and an integer into the flags thunk.
582 The integer value is zero-extended first. */
583static void
584s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
585{
586 IRExpr *op, *hi, *lo, *lox, *ndep;
587
588 op = mkU64(opc);
589 hi = unop(Iop_F128HItoF64, mkexpr(d1));
590 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
591 ndep = s390_cc_widen(nd, False);
592
593 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
594
595 s390_cc_thunk_fill(op, hi, lox, ndep);
596}
597
598
599static void
600s390_cc_set(UInt val)
601{
602 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
603 mkU64(val), mkU64(0), mkU64(0));
604}
605
606/* Build IR to calculate the condition code from flags thunk.
607 Returns an expression of type Ity_I32 */
608static IRExpr *
609s390_call_calculate_cc(void)
610{
611 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
612
florian428dfdd2012-03-27 03:09:49 +0000613 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
614 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
615 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
616 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000617
618 args = mkIRExprVec_4(op, dep1, dep2, ndep);
619 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
620 "s390_calculate_cc", &s390_calculate_cc, args);
621
622 /* Exclude OP and NDEP from definedness checking. We're only
623 interested in DEP1 and DEP2. */
624 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
625
626 return call;
627}
628
629/* Build IR to calculate the internal condition code for a "compare and branch"
630 insn. Returns an expression of type Ity_I32 */
631static IRExpr *
florianff9613f2012-05-12 15:26:44 +0000632s390_call_calculate_icc(UInt m, UInt opc, IRTemp op1, IRTemp op2)
sewardj2019a972011-03-07 16:04:07 +0000633{
florianff9613f2012-05-12 15:26:44 +0000634 IRExpr **args, *call, *op, *dep1, *dep2, *mask;
sewardj2019a972011-03-07 16:04:07 +0000635
florianff9613f2012-05-12 15:26:44 +0000636 switch (opc) {
637 case S390_CC_OP_SIGNED_COMPARE:
638 dep1 = s390_cc_widen(op1, True);
639 dep2 = s390_cc_widen(op2, True);
640 break;
641
642 case S390_CC_OP_UNSIGNED_COMPARE:
643 dep1 = s390_cc_widen(op1, False);
644 dep2 = s390_cc_widen(op2, False);
645 break;
646
647 default:
648 vpanic("s390_call_calculate_icc");
649 }
650
651 mask = mkU64(m);
sewardj2019a972011-03-07 16:04:07 +0000652 op = mkU64(opc);
sewardj2019a972011-03-07 16:04:07 +0000653
florianff9613f2012-05-12 15:26:44 +0000654 args = mkIRExprVec_5(mask, op, dep1, dep2, mkU64(0) /* unused */);
sewardj2019a972011-03-07 16:04:07 +0000655 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
florianff9613f2012-05-12 15:26:44 +0000656 "s390_calculate_cond", &s390_calculate_cond, args);
sewardj2019a972011-03-07 16:04:07 +0000657
florianff9613f2012-05-12 15:26:44 +0000658 /* Exclude the requested condition, OP and NDEP from definedness
659 checking. We're only interested in DEP1 and DEP2. */
660 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
sewardj2019a972011-03-07 16:04:07 +0000661
662 return call;
663}
664
665/* Build IR to calculate the condition code from flags thunk.
666 Returns an expression of type Ity_I32 */
667static IRExpr *
668s390_call_calculate_cond(UInt m)
669{
670 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
671
672 mask = mkU64(m);
florian428dfdd2012-03-27 03:09:49 +0000673 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
674 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
675 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
676 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000677
678 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
679 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
680 "s390_calculate_cond", &s390_calculate_cond, args);
681
682 /* Exclude the requested condition, OP and NDEP from definedness
683 checking. We're only interested in DEP1 and DEP2. */
684 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
685
686 return call;
687}
688
689#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
690#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
691#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
692#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
693#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
694#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
695#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
696 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
697#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
698 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
sewardj2019a972011-03-07 16:04:07 +0000699
700
sewardj2019a972011-03-07 16:04:07 +0000701
702
703/*------------------------------------------------------------*/
704/*--- Guest register access ---*/
705/*------------------------------------------------------------*/
706
707
708/*------------------------------------------------------------*/
709/*--- ar registers ---*/
710/*------------------------------------------------------------*/
711
712/* Return the guest state offset of a ar register. */
713static UInt
714ar_offset(UInt archreg)
715{
716 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000717 S390X_GUEST_OFFSET(guest_a0),
718 S390X_GUEST_OFFSET(guest_a1),
719 S390X_GUEST_OFFSET(guest_a2),
720 S390X_GUEST_OFFSET(guest_a3),
721 S390X_GUEST_OFFSET(guest_a4),
722 S390X_GUEST_OFFSET(guest_a5),
723 S390X_GUEST_OFFSET(guest_a6),
724 S390X_GUEST_OFFSET(guest_a7),
725 S390X_GUEST_OFFSET(guest_a8),
726 S390X_GUEST_OFFSET(guest_a9),
727 S390X_GUEST_OFFSET(guest_a10),
728 S390X_GUEST_OFFSET(guest_a11),
729 S390X_GUEST_OFFSET(guest_a12),
730 S390X_GUEST_OFFSET(guest_a13),
731 S390X_GUEST_OFFSET(guest_a14),
732 S390X_GUEST_OFFSET(guest_a15),
sewardj2019a972011-03-07 16:04:07 +0000733 };
734
735 vassert(archreg < 16);
736
737 return offset[archreg];
738}
739
740
741/* Return the guest state offset of word #0 of a ar register. */
742static __inline__ UInt
743ar_w0_offset(UInt archreg)
744{
745 return ar_offset(archreg) + 0;
746}
747
748/* Write word #0 of a ar to the guest state. */
749static __inline__ void
750put_ar_w0(UInt archreg, IRExpr *expr)
751{
752 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
753
754 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
755}
756
757/* Read word #0 of a ar register. */
758static __inline__ IRExpr *
759get_ar_w0(UInt archreg)
760{
761 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
762}
763
764
765/*------------------------------------------------------------*/
766/*--- fpr registers ---*/
767/*------------------------------------------------------------*/
768
769/* Return the guest state offset of a fpr register. */
770static UInt
771fpr_offset(UInt archreg)
772{
773 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000774 S390X_GUEST_OFFSET(guest_f0),
775 S390X_GUEST_OFFSET(guest_f1),
776 S390X_GUEST_OFFSET(guest_f2),
777 S390X_GUEST_OFFSET(guest_f3),
778 S390X_GUEST_OFFSET(guest_f4),
779 S390X_GUEST_OFFSET(guest_f5),
780 S390X_GUEST_OFFSET(guest_f6),
781 S390X_GUEST_OFFSET(guest_f7),
782 S390X_GUEST_OFFSET(guest_f8),
783 S390X_GUEST_OFFSET(guest_f9),
784 S390X_GUEST_OFFSET(guest_f10),
785 S390X_GUEST_OFFSET(guest_f11),
786 S390X_GUEST_OFFSET(guest_f12),
787 S390X_GUEST_OFFSET(guest_f13),
788 S390X_GUEST_OFFSET(guest_f14),
789 S390X_GUEST_OFFSET(guest_f15),
sewardj2019a972011-03-07 16:04:07 +0000790 };
791
792 vassert(archreg < 16);
793
794 return offset[archreg];
795}
796
797
798/* Return the guest state offset of word #0 of a fpr register. */
799static __inline__ UInt
800fpr_w0_offset(UInt archreg)
801{
802 return fpr_offset(archreg) + 0;
803}
804
805/* Write word #0 of a fpr to the guest state. */
806static __inline__ void
807put_fpr_w0(UInt archreg, IRExpr *expr)
808{
809 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
810
811 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
812}
813
814/* Read word #0 of a fpr register. */
815static __inline__ IRExpr *
816get_fpr_w0(UInt archreg)
817{
818 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
819}
820
821/* Return the guest state offset of double word #0 of a fpr register. */
822static __inline__ UInt
823fpr_dw0_offset(UInt archreg)
824{
825 return fpr_offset(archreg) + 0;
826}
827
828/* Write double word #0 of a fpr to the guest state. */
829static __inline__ void
830put_fpr_dw0(UInt archreg, IRExpr *expr)
831{
832 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
833
834 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
835}
836
837/* Read double word #0 of a fpr register. */
838static __inline__ IRExpr *
839get_fpr_dw0(UInt archreg)
840{
841 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
842}
843
844
845/*------------------------------------------------------------*/
846/*--- gpr registers ---*/
847/*------------------------------------------------------------*/
848
849/* Return the guest state offset of a gpr register. */
850static UInt
851gpr_offset(UInt archreg)
852{
853 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000854 S390X_GUEST_OFFSET(guest_r0),
855 S390X_GUEST_OFFSET(guest_r1),
856 S390X_GUEST_OFFSET(guest_r2),
857 S390X_GUEST_OFFSET(guest_r3),
858 S390X_GUEST_OFFSET(guest_r4),
859 S390X_GUEST_OFFSET(guest_r5),
860 S390X_GUEST_OFFSET(guest_r6),
861 S390X_GUEST_OFFSET(guest_r7),
862 S390X_GUEST_OFFSET(guest_r8),
863 S390X_GUEST_OFFSET(guest_r9),
864 S390X_GUEST_OFFSET(guest_r10),
865 S390X_GUEST_OFFSET(guest_r11),
866 S390X_GUEST_OFFSET(guest_r12),
867 S390X_GUEST_OFFSET(guest_r13),
868 S390X_GUEST_OFFSET(guest_r14),
869 S390X_GUEST_OFFSET(guest_r15),
sewardj2019a972011-03-07 16:04:07 +0000870 };
871
872 vassert(archreg < 16);
873
874 return offset[archreg];
875}
876
877
878/* Return the guest state offset of word #0 of a gpr register. */
879static __inline__ UInt
880gpr_w0_offset(UInt archreg)
881{
882 return gpr_offset(archreg) + 0;
883}
884
885/* Write word #0 of a gpr to the guest state. */
886static __inline__ void
887put_gpr_w0(UInt archreg, IRExpr *expr)
888{
889 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
890
891 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
892}
893
894/* Read word #0 of a gpr register. */
895static __inline__ IRExpr *
896get_gpr_w0(UInt archreg)
897{
898 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
899}
900
901/* Return the guest state offset of double word #0 of a gpr register. */
902static __inline__ UInt
903gpr_dw0_offset(UInt archreg)
904{
905 return gpr_offset(archreg) + 0;
906}
907
908/* Write double word #0 of a gpr to the guest state. */
909static __inline__ void
910put_gpr_dw0(UInt archreg, IRExpr *expr)
911{
912 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
913
914 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
915}
916
917/* Read double word #0 of a gpr register. */
918static __inline__ IRExpr *
919get_gpr_dw0(UInt archreg)
920{
921 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
922}
923
924/* Return the guest state offset of half word #1 of a gpr register. */
925static __inline__ UInt
926gpr_hw1_offset(UInt archreg)
927{
928 return gpr_offset(archreg) + 2;
929}
930
931/* Write half word #1 of a gpr to the guest state. */
932static __inline__ void
933put_gpr_hw1(UInt archreg, IRExpr *expr)
934{
935 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
936
937 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
938}
939
940/* Read half word #1 of a gpr register. */
941static __inline__ IRExpr *
942get_gpr_hw1(UInt archreg)
943{
944 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
945}
946
947/* Return the guest state offset of byte #6 of a gpr register. */
948static __inline__ UInt
949gpr_b6_offset(UInt archreg)
950{
951 return gpr_offset(archreg) + 6;
952}
953
954/* Write byte #6 of a gpr to the guest state. */
955static __inline__ void
956put_gpr_b6(UInt archreg, IRExpr *expr)
957{
958 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
959
960 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
961}
962
963/* Read byte #6 of a gpr register. */
964static __inline__ IRExpr *
965get_gpr_b6(UInt archreg)
966{
967 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
968}
969
970/* Return the guest state offset of byte #3 of a gpr register. */
971static __inline__ UInt
972gpr_b3_offset(UInt archreg)
973{
974 return gpr_offset(archreg) + 3;
975}
976
977/* Write byte #3 of a gpr to the guest state. */
978static __inline__ void
979put_gpr_b3(UInt archreg, IRExpr *expr)
980{
981 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
982
983 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
984}
985
986/* Read byte #3 of a gpr register. */
987static __inline__ IRExpr *
988get_gpr_b3(UInt archreg)
989{
990 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
991}
992
993/* Return the guest state offset of byte #0 of a gpr register. */
994static __inline__ UInt
995gpr_b0_offset(UInt archreg)
996{
997 return gpr_offset(archreg) + 0;
998}
999
1000/* Write byte #0 of a gpr to the guest state. */
1001static __inline__ void
1002put_gpr_b0(UInt archreg, IRExpr *expr)
1003{
1004 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1005
1006 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
1007}
1008
1009/* Read byte #0 of a gpr register. */
1010static __inline__ IRExpr *
1011get_gpr_b0(UInt archreg)
1012{
1013 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
1014}
1015
1016/* Return the guest state offset of word #1 of a gpr register. */
1017static __inline__ UInt
1018gpr_w1_offset(UInt archreg)
1019{
1020 return gpr_offset(archreg) + 4;
1021}
1022
1023/* Write word #1 of a gpr to the guest state. */
1024static __inline__ void
1025put_gpr_w1(UInt archreg, IRExpr *expr)
1026{
1027 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1028
1029 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
1030}
1031
1032/* Read word #1 of a gpr register. */
1033static __inline__ IRExpr *
1034get_gpr_w1(UInt archreg)
1035{
1036 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
1037}
1038
1039/* Return the guest state offset of half word #3 of a gpr register. */
1040static __inline__ UInt
1041gpr_hw3_offset(UInt archreg)
1042{
1043 return gpr_offset(archreg) + 6;
1044}
1045
1046/* Write half word #3 of a gpr to the guest state. */
1047static __inline__ void
1048put_gpr_hw3(UInt archreg, IRExpr *expr)
1049{
1050 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1051
1052 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
1053}
1054
1055/* Read half word #3 of a gpr register. */
1056static __inline__ IRExpr *
1057get_gpr_hw3(UInt archreg)
1058{
1059 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
1060}
1061
1062/* Return the guest state offset of byte #7 of a gpr register. */
1063static __inline__ UInt
1064gpr_b7_offset(UInt archreg)
1065{
1066 return gpr_offset(archreg) + 7;
1067}
1068
1069/* Write byte #7 of a gpr to the guest state. */
1070static __inline__ void
1071put_gpr_b7(UInt archreg, IRExpr *expr)
1072{
1073 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1074
1075 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1076}
1077
1078/* Read byte #7 of a gpr register. */
1079static __inline__ IRExpr *
1080get_gpr_b7(UInt archreg)
1081{
1082 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1083}
1084
1085/* Return the guest state offset of half word #0 of a gpr register. */
1086static __inline__ UInt
1087gpr_hw0_offset(UInt archreg)
1088{
1089 return gpr_offset(archreg) + 0;
1090}
1091
1092/* Write half word #0 of a gpr to the guest state. */
1093static __inline__ void
1094put_gpr_hw0(UInt archreg, IRExpr *expr)
1095{
1096 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1097
1098 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1099}
1100
1101/* Read half word #0 of a gpr register. */
1102static __inline__ IRExpr *
1103get_gpr_hw0(UInt archreg)
1104{
1105 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1106}
1107
1108/* Return the guest state offset of byte #4 of a gpr register. */
1109static __inline__ UInt
1110gpr_b4_offset(UInt archreg)
1111{
1112 return gpr_offset(archreg) + 4;
1113}
1114
1115/* Write byte #4 of a gpr to the guest state. */
1116static __inline__ void
1117put_gpr_b4(UInt archreg, IRExpr *expr)
1118{
1119 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1120
1121 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1122}
1123
1124/* Read byte #4 of a gpr register. */
1125static __inline__ IRExpr *
1126get_gpr_b4(UInt archreg)
1127{
1128 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1129}
1130
1131/* Return the guest state offset of byte #1 of a gpr register. */
1132static __inline__ UInt
1133gpr_b1_offset(UInt archreg)
1134{
1135 return gpr_offset(archreg) + 1;
1136}
1137
1138/* Write byte #1 of a gpr to the guest state. */
1139static __inline__ void
1140put_gpr_b1(UInt archreg, IRExpr *expr)
1141{
1142 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1143
1144 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1145}
1146
1147/* Read byte #1 of a gpr register. */
1148static __inline__ IRExpr *
1149get_gpr_b1(UInt archreg)
1150{
1151 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1152}
1153
1154/* Return the guest state offset of half word #2 of a gpr register. */
1155static __inline__ UInt
1156gpr_hw2_offset(UInt archreg)
1157{
1158 return gpr_offset(archreg) + 4;
1159}
1160
1161/* Write half word #2 of a gpr to the guest state. */
1162static __inline__ void
1163put_gpr_hw2(UInt archreg, IRExpr *expr)
1164{
1165 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1166
1167 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1168}
1169
1170/* Read half word #2 of a gpr register. */
1171static __inline__ IRExpr *
1172get_gpr_hw2(UInt archreg)
1173{
1174 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1175}
1176
1177/* Return the guest state offset of byte #5 of a gpr register. */
1178static __inline__ UInt
1179gpr_b5_offset(UInt archreg)
1180{
1181 return gpr_offset(archreg) + 5;
1182}
1183
1184/* Write byte #5 of a gpr to the guest state. */
1185static __inline__ void
1186put_gpr_b5(UInt archreg, IRExpr *expr)
1187{
1188 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1189
1190 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1191}
1192
1193/* Read byte #5 of a gpr register. */
1194static __inline__ IRExpr *
1195get_gpr_b5(UInt archreg)
1196{
1197 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1198}
1199
1200/* Return the guest state offset of byte #2 of a gpr register. */
1201static __inline__ UInt
1202gpr_b2_offset(UInt archreg)
1203{
1204 return gpr_offset(archreg) + 2;
1205}
1206
1207/* Write byte #2 of a gpr to the guest state. */
1208static __inline__ void
1209put_gpr_b2(UInt archreg, IRExpr *expr)
1210{
1211 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1212
1213 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1214}
1215
1216/* Read byte #2 of a gpr register. */
1217static __inline__ IRExpr *
1218get_gpr_b2(UInt archreg)
1219{
1220 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1221}
1222
1223/* Return the guest state offset of the counter register. */
1224static UInt
1225counter_offset(void)
1226{
floriane88b3c92011-07-05 02:48:39 +00001227 return S390X_GUEST_OFFSET(guest_counter);
sewardj2019a972011-03-07 16:04:07 +00001228}
1229
1230/* Return the guest state offset of double word #0 of the counter register. */
1231static __inline__ UInt
1232counter_dw0_offset(void)
1233{
1234 return counter_offset() + 0;
1235}
1236
1237/* Write double word #0 of the counter to the guest state. */
1238static __inline__ void
1239put_counter_dw0(IRExpr *expr)
1240{
1241 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1242
1243 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1244}
1245
1246/* Read double word #0 of the counter register. */
1247static __inline__ IRExpr *
1248get_counter_dw0(void)
1249{
1250 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1251}
1252
1253/* Return the guest state offset of word #0 of the counter register. */
1254static __inline__ UInt
1255counter_w0_offset(void)
1256{
1257 return counter_offset() + 0;
1258}
1259
1260/* Return the guest state offset of word #1 of the counter register. */
1261static __inline__ UInt
1262counter_w1_offset(void)
1263{
1264 return counter_offset() + 4;
1265}
1266
1267/* Write word #0 of the counter to the guest state. */
1268static __inline__ void
1269put_counter_w0(IRExpr *expr)
1270{
1271 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1272
1273 stmt(IRStmt_Put(counter_w0_offset(), expr));
1274}
1275
1276/* Read word #0 of the counter register. */
1277static __inline__ IRExpr *
1278get_counter_w0(void)
1279{
1280 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1281}
1282
1283/* Write word #1 of the counter to the guest state. */
1284static __inline__ void
1285put_counter_w1(IRExpr *expr)
1286{
1287 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1288
1289 stmt(IRStmt_Put(counter_w1_offset(), expr));
1290}
1291
1292/* Read word #1 of the counter register. */
1293static __inline__ IRExpr *
1294get_counter_w1(void)
1295{
1296 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1297}
1298
1299/* Return the guest state offset of the fpc register. */
1300static UInt
1301fpc_offset(void)
1302{
floriane88b3c92011-07-05 02:48:39 +00001303 return S390X_GUEST_OFFSET(guest_fpc);
sewardj2019a972011-03-07 16:04:07 +00001304}
1305
1306/* Return the guest state offset of word #0 of the fpc register. */
1307static __inline__ UInt
1308fpc_w0_offset(void)
1309{
1310 return fpc_offset() + 0;
1311}
1312
1313/* Write word #0 of the fpc to the guest state. */
1314static __inline__ void
1315put_fpc_w0(IRExpr *expr)
1316{
1317 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1318
1319 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1320}
1321
1322/* Read word #0 of the fpc register. */
1323static __inline__ IRExpr *
1324get_fpc_w0(void)
1325{
1326 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1327}
1328
1329
1330/*------------------------------------------------------------*/
1331/*--- Build IR for formats ---*/
1332/*------------------------------------------------------------*/
1333static void
1334s390_format_I(HChar *(*irgen)(UChar i),
1335 UChar i)
1336{
1337 HChar *mnm = irgen(i);
1338
sewardj7ee97522011-05-09 21:45:04 +00001339 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001340 s390_disasm(ENC2(MNM, UINT), mnm, i);
1341}
1342
1343static void
1344s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1345 UChar r1, UShort i2)
1346{
1347 irgen(r1, i2);
1348}
1349
1350static void
1351s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1352 UChar r1, UShort i2)
1353{
1354 HChar *mnm = irgen(r1, i2);
1355
sewardj7ee97522011-05-09 21:45:04 +00001356 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001357 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1358}
1359
1360static void
1361s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1362 UChar r1, UShort i2)
1363{
1364 HChar *mnm = irgen(r1, i2);
1365
sewardj7ee97522011-05-09 21:45:04 +00001366 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001367 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1368}
1369
1370static void
1371s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1372 UChar r1, UShort i2)
1373{
1374 HChar *mnm = irgen(r1, i2);
1375
sewardj7ee97522011-05-09 21:45:04 +00001376 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001377 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1378}
1379
1380static void
1381s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1382 UChar r1, UChar r3, UShort i2)
1383{
1384 HChar *mnm = irgen(r1, r3, i2);
1385
sewardj7ee97522011-05-09 21:45:04 +00001386 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001387 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1388}
1389
1390static void
1391s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1392 UChar r1, UChar r3, UShort i2)
1393{
1394 HChar *mnm = irgen(r1, r3, i2);
1395
sewardj7ee97522011-05-09 21:45:04 +00001396 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001397 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1398}
1399
1400static void
1401s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1402 UChar i5),
1403 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1404{
1405 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1406
sewardj7ee97522011-05-09 21:45:04 +00001407 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001408 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1409 i5);
1410}
1411
1412static void
1413s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1414 UChar r1, UChar r2, UShort i4, UChar m3)
1415{
1416 HChar *mnm = irgen(r1, r2, i4, m3);
1417
sewardj7ee97522011-05-09 21:45:04 +00001418 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001419 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1420 r2, m3, (Int)(Short)i4);
1421}
1422
1423static void
1424s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1425 UChar r1, UChar m3, UShort i4, UChar i2)
1426{
1427 HChar *mnm = irgen(r1, m3, i4, i2);
1428
sewardj7ee97522011-05-09 21:45:04 +00001429 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001430 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1431 r1, i2, m3, (Int)(Short)i4);
1432}
1433
1434static void
1435s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1436 UChar r1, UChar m3, UShort i4, UChar i2)
1437{
1438 HChar *mnm = irgen(r1, m3, i4, i2);
1439
sewardj7ee97522011-05-09 21:45:04 +00001440 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001441 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1442 (Int)(Char)i2, m3, (Int)(Short)i4);
1443}
1444
1445static void
1446s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1447 UChar r1, UInt i2)
1448{
1449 irgen(r1, i2);
1450}
1451
1452static void
1453s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1454 UChar r1, UInt i2)
1455{
1456 HChar *mnm = irgen(r1, i2);
1457
sewardj7ee97522011-05-09 21:45:04 +00001458 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001459 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1460}
1461
1462static void
1463s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1464 UChar r1, UInt i2)
1465{
1466 HChar *mnm = irgen(r1, i2);
1467
sewardj7ee97522011-05-09 21:45:04 +00001468 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001469 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1470}
1471
1472static void
1473s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1474 UChar r1, UInt i2)
1475{
1476 HChar *mnm = irgen(r1, i2);
1477
sewardj7ee97522011-05-09 21:45:04 +00001478 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001479 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1480}
1481
1482static void
1483s390_format_RIL_UP(HChar *(*irgen)(void),
1484 UChar r1, UInt i2)
1485{
1486 HChar *mnm = irgen();
1487
sewardj7ee97522011-05-09 21:45:04 +00001488 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001489 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1490}
1491
1492static void
1493s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1494 IRTemp op4addr),
1495 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1496{
1497 HChar *mnm;
1498 IRTemp op4addr = newTemp(Ity_I64);
1499
1500 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1501 mkU64(0)));
1502
1503 mnm = irgen(r1, m3, i2, op4addr);
1504
sewardj7ee97522011-05-09 21:45:04 +00001505 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001506 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1507 (Int)(Char)i2, m3, d4, 0, b4);
1508}
1509
1510static void
1511s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1512 IRTemp op4addr),
1513 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1514{
1515 HChar *mnm;
1516 IRTemp op4addr = newTemp(Ity_I64);
1517
1518 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1519 mkU64(0)));
1520
1521 mnm = irgen(r1, m3, i2, op4addr);
1522
sewardj7ee97522011-05-09 21:45:04 +00001523 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001524 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1525 i2, m3, d4, 0, b4);
1526}
1527
1528static void
1529s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1530 UChar r1, UChar r2)
1531{
1532 irgen(r1, r2);
1533}
1534
1535static void
1536s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1537 UChar r1, UChar r2)
1538{
1539 HChar *mnm = irgen(r1, r2);
1540
sewardj7ee97522011-05-09 21:45:04 +00001541 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001542 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1543}
1544
1545static void
1546s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1547 UChar r1, UChar r2)
1548{
1549 HChar *mnm = irgen(r1, r2);
1550
sewardj7ee97522011-05-09 21:45:04 +00001551 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001552 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1553}
1554
1555static void
1556s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1557 UChar r1, UChar r2)
1558{
1559 irgen(r1, r2);
1560}
1561
1562static void
1563s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1564 UChar r1, UChar r2)
1565{
1566 HChar *mnm = irgen(r1, r2);
1567
sewardj7ee97522011-05-09 21:45:04 +00001568 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001569 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1570}
1571
1572static void
1573s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1574 UChar r1, UChar r2)
1575{
1576 HChar *mnm = irgen(r1, r2);
1577
sewardj7ee97522011-05-09 21:45:04 +00001578 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001579 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1580}
1581
1582static void
1583s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1584 UChar r1, UChar r2)
1585{
1586 HChar *mnm = irgen(r1, r2);
1587
sewardj7ee97522011-05-09 21:45:04 +00001588 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001589 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1590}
1591
1592static void
1593s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1594 UChar r1, UChar r2)
1595{
1596 HChar *mnm = irgen(r1, r2);
1597
sewardj7ee97522011-05-09 21:45:04 +00001598 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001599 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1600}
1601
1602static void
1603s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1604 UChar r1)
1605{
1606 HChar *mnm = irgen(r1);
1607
sewardj7ee97522011-05-09 21:45:04 +00001608 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001609 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1610}
1611
1612static void
1613s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1614 UChar r1)
1615{
1616 HChar *mnm = irgen(r1);
1617
sewardj7ee97522011-05-09 21:45:04 +00001618 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001619 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1620}
1621
1622static void
florian9af37692012-01-15 21:01:16 +00001623s390_format_RRF_M0RERE(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1624 UChar m3, UChar r1, UChar r2)
1625{
florianfed3ea32012-07-19 14:54:03 +00001626 HChar *mnm = irgen(m3, r1, r2);
florian9af37692012-01-15 21:01:16 +00001627
1628 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
florianfed3ea32012-07-19 14:54:03 +00001629 s390_disasm(ENC4(MNM, GPR, GPR, UINT), mnm, r1, r2, m3);
florian9af37692012-01-15 21:01:16 +00001630}
1631
1632static void
sewardj2019a972011-03-07 16:04:07 +00001633s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1634 UChar r1, UChar r3, UChar r2)
1635{
1636 HChar *mnm = irgen(r1, r3, r2);
1637
sewardj7ee97522011-05-09 21:45:04 +00001638 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001639 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1640}
1641
1642static void
sewardjd7bde722011-04-05 13:19:33 +00001643s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1644 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1645{
1646 irgen(m3, r1, r2);
1647
sewardj7ee97522011-05-09 21:45:04 +00001648 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001649 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1650}
1651
1652static void
sewardj2019a972011-03-07 16:04:07 +00001653s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1654 UChar r3, UChar r1, UChar r2)
1655{
1656 HChar *mnm = irgen(r3, r1, r2);
1657
sewardj7ee97522011-05-09 21:45:04 +00001658 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001659 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1660}
1661
1662static void
1663s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1664 UChar r3, UChar r1, UChar r2)
1665{
1666 HChar *mnm = irgen(r3, r1, r2);
1667
sewardj7ee97522011-05-09 21:45:04 +00001668 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001669 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1670}
1671
1672static void
1673s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1674 UChar r3, UChar r1, UChar r2)
1675{
1676 HChar *mnm = irgen(r3, r1, r2);
1677
sewardj7ee97522011-05-09 21:45:04 +00001678 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001679 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1680}
1681
1682static void
1683s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1684 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1685{
1686 HChar *mnm;
1687 IRTemp op4addr = newTemp(Ity_I64);
1688
1689 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1690 mkU64(0)));
1691
1692 mnm = irgen(r1, r2, m3, op4addr);
1693
sewardj7ee97522011-05-09 21:45:04 +00001694 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001695 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1696 r2, m3, d4, 0, b4);
1697}
1698
1699static void
1700s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1701 UChar r1, UChar b2, UShort d2)
1702{
1703 HChar *mnm;
1704 IRTemp op2addr = newTemp(Ity_I64);
1705
1706 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1707 mkU64(0)));
1708
1709 mnm = irgen(r1, op2addr);
1710
sewardj7ee97522011-05-09 21:45:04 +00001711 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001712 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1713}
1714
1715static void
1716s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1717 UChar r1, UChar r3, UChar b2, UShort d2)
1718{
1719 HChar *mnm;
1720 IRTemp op2addr = newTemp(Ity_I64);
1721
1722 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1723 mkU64(0)));
1724
1725 mnm = irgen(r1, r3, op2addr);
1726
sewardj7ee97522011-05-09 21:45:04 +00001727 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001728 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1729}
1730
1731static void
1732s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1733 UChar r1, UChar r3, UChar b2, UShort d2)
1734{
1735 HChar *mnm;
1736 IRTemp op2addr = newTemp(Ity_I64);
1737
1738 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1739 mkU64(0)));
1740
1741 mnm = irgen(r1, r3, op2addr);
1742
sewardj7ee97522011-05-09 21:45:04 +00001743 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001744 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1745}
1746
1747static void
1748s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1749 UChar r1, UChar r3, UChar b2, UShort d2)
1750{
1751 HChar *mnm;
1752 IRTemp op2addr = newTemp(Ity_I64);
1753
1754 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1755 mkU64(0)));
1756
1757 mnm = irgen(r1, r3, op2addr);
1758
sewardj7ee97522011-05-09 21:45:04 +00001759 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001760 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1761}
1762
1763static void
1764s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1765 UChar r1, UChar r3, UShort i2)
1766{
1767 HChar *mnm = irgen(r1, r3, i2);
1768
sewardj7ee97522011-05-09 21:45:04 +00001769 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001770 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1771}
1772
1773static void
1774s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1775 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1776{
1777 HChar *mnm;
1778 IRTemp op2addr = newTemp(Ity_I64);
1779 IRTemp d2 = newTemp(Ity_I64);
1780
1781 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1782 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1783 mkU64(0)));
1784
1785 mnm = irgen(r1, r3, op2addr);
1786
sewardj7ee97522011-05-09 21:45:04 +00001787 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001788 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1789}
1790
1791static void
1792s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1793 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1794{
1795 HChar *mnm;
1796 IRTemp op2addr = newTemp(Ity_I64);
1797 IRTemp d2 = newTemp(Ity_I64);
1798
1799 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1800 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1801 mkU64(0)));
1802
1803 mnm = irgen(r1, r3, op2addr);
1804
sewardj7ee97522011-05-09 21:45:04 +00001805 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001806 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1807}
1808
1809static void
1810s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1811 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1812{
1813 HChar *mnm;
1814 IRTemp op2addr = newTemp(Ity_I64);
1815 IRTemp d2 = newTemp(Ity_I64);
1816
1817 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1818 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1819 mkU64(0)));
1820
1821 mnm = irgen(r1, r3, op2addr);
1822
sewardj7ee97522011-05-09 21:45:04 +00001823 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001824 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1825}
1826
1827static void
sewardjd7bde722011-04-05 13:19:33 +00001828s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1829 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1830 Int xmnm_kind)
1831{
1832 IRTemp op2addr = newTemp(Ity_I64);
1833 IRTemp d2 = newTemp(Ity_I64);
1834
1835 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1836 guest_IA_next_instr);
1837 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1838 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1839 mkU64(0)));
1840
1841 irgen(r1, op2addr);
florianf9e1ed72012-04-17 02:41:56 +00001842 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00001843
sewardj7ee97522011-05-09 21:45:04 +00001844 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001845 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1846}
1847
1848static void
sewardj2019a972011-03-07 16:04:07 +00001849s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1850 IRTemp op2addr),
1851 UChar r1, UChar x2, UChar b2, UShort d2)
1852{
1853 IRTemp op2addr = newTemp(Ity_I64);
1854
1855 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1856 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1857 mkU64(0)));
1858
1859 irgen(r1, x2, b2, d2, op2addr);
1860}
1861
1862static void
1863s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1864 UChar r1, UChar x2, UChar b2, UShort d2)
1865{
1866 HChar *mnm;
1867 IRTemp op2addr = newTemp(Ity_I64);
1868
1869 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1870 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1871 mkU64(0)));
1872
1873 mnm = irgen(r1, op2addr);
1874
sewardj7ee97522011-05-09 21:45:04 +00001875 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001876 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1877}
1878
1879static void
1880s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1881 UChar r1, UChar x2, UChar b2, UShort d2)
1882{
1883 HChar *mnm;
1884 IRTemp op2addr = newTemp(Ity_I64);
1885
1886 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1887 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1888 mkU64(0)));
1889
1890 mnm = irgen(r1, op2addr);
1891
sewardj7ee97522011-05-09 21:45:04 +00001892 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001893 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1894}
1895
1896static void
1897s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1898 UChar r1, UChar x2, UChar b2, UShort d2)
1899{
1900 HChar *mnm;
1901 IRTemp op2addr = newTemp(Ity_I64);
1902
1903 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1904 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1905 mkU64(0)));
1906
1907 mnm = irgen(r1, op2addr);
1908
sewardj7ee97522011-05-09 21:45:04 +00001909 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001910 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1911}
1912
1913static void
1914s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1915 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1916{
1917 HChar *mnm;
1918 IRTemp op2addr = newTemp(Ity_I64);
1919
1920 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1921 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1922 mkU64(0)));
1923
1924 mnm = irgen(r3, op2addr, r1);
1925
sewardj7ee97522011-05-09 21:45:04 +00001926 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001927 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1928}
1929
1930static void
1931s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1932 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1933{
1934 HChar *mnm;
1935 IRTemp op2addr = newTemp(Ity_I64);
1936 IRTemp d2 = newTemp(Ity_I64);
1937
1938 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1939 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1940 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1941 mkU64(0)));
1942
1943 mnm = irgen(r1, op2addr);
1944
sewardj7ee97522011-05-09 21:45:04 +00001945 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001946 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1947}
1948
1949static void
1950s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1951 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1952{
1953 HChar *mnm;
1954 IRTemp op2addr = newTemp(Ity_I64);
1955 IRTemp d2 = newTemp(Ity_I64);
1956
1957 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1958 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1959 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1960 mkU64(0)));
1961
1962 mnm = irgen(r1, op2addr);
1963
sewardj7ee97522011-05-09 21:45:04 +00001964 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001965 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1966}
1967
1968static void
1969s390_format_RXY_URRD(HChar *(*irgen)(void),
1970 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1971{
1972 HChar *mnm;
1973 IRTemp op2addr = newTemp(Ity_I64);
1974 IRTemp d2 = newTemp(Ity_I64);
1975
1976 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1977 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1978 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1979 mkU64(0)));
1980
1981 mnm = irgen();
1982
sewardj7ee97522011-05-09 21:45:04 +00001983 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001984 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1985}
1986
1987static void
1988s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1989 UChar b2, UShort d2)
1990{
1991 HChar *mnm;
1992 IRTemp op2addr = newTemp(Ity_I64);
1993
1994 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1995 mkU64(0)));
1996
1997 mnm = irgen(op2addr);
1998
sewardj7ee97522011-05-09 21:45:04 +00001999 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002000 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
2001}
2002
2003static void
2004s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2005 UChar i2, UChar b1, UShort d1)
2006{
2007 HChar *mnm;
2008 IRTemp op1addr = newTemp(Ity_I64);
2009
2010 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2011 mkU64(0)));
2012
2013 mnm = irgen(i2, op1addr);
2014
sewardj7ee97522011-05-09 21:45:04 +00002015 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002016 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2017}
2018
2019static void
2020s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2021 UChar i2, UChar b1, UShort dl1, UChar dh1)
2022{
2023 HChar *mnm;
2024 IRTemp op1addr = newTemp(Ity_I64);
2025 IRTemp d1 = newTemp(Ity_I64);
2026
2027 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2028 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2029 mkU64(0)));
2030
2031 mnm = irgen(i2, op1addr);
2032
sewardj7ee97522011-05-09 21:45:04 +00002033 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002034 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
2035}
2036
2037static void
2038s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2039 UChar i2, UChar b1, UShort dl1, UChar dh1)
2040{
2041 HChar *mnm;
2042 IRTemp op1addr = newTemp(Ity_I64);
2043 IRTemp d1 = newTemp(Ity_I64);
2044
2045 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2046 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2047 mkU64(0)));
2048
2049 mnm = irgen(i2, op1addr);
2050
sewardj7ee97522011-05-09 21:45:04 +00002051 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002052 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
2053}
2054
2055static void
2056s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
2057 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
2058{
2059 HChar *mnm;
2060 IRTemp op1addr = newTemp(Ity_I64);
2061 IRTemp op2addr = newTemp(Ity_I64);
2062
2063 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2064 mkU64(0)));
2065 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
2066 mkU64(0)));
2067
2068 mnm = irgen(l, op1addr, op2addr);
2069
sewardj7ee97522011-05-09 21:45:04 +00002070 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002071 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
2072}
2073
2074static void
2075s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2076 UChar b1, UShort d1, UShort i2)
2077{
2078 HChar *mnm;
2079 IRTemp op1addr = newTemp(Ity_I64);
2080
2081 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2082 mkU64(0)));
2083
2084 mnm = irgen(i2, op1addr);
2085
sewardj7ee97522011-05-09 21:45:04 +00002086 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002087 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2088}
2089
2090static void
2091s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2092 UChar b1, UShort d1, UShort i2)
2093{
2094 HChar *mnm;
2095 IRTemp op1addr = newTemp(Ity_I64);
2096
2097 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2098 mkU64(0)));
2099
2100 mnm = irgen(i2, op1addr);
2101
sewardj7ee97522011-05-09 21:45:04 +00002102 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002103 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2104}
2105
2106
2107
2108/*------------------------------------------------------------*/
2109/*--- Build IR for opcodes ---*/
2110/*------------------------------------------------------------*/
2111
2112static HChar *
2113s390_irgen_AR(UChar r1, UChar r2)
2114{
2115 IRTemp op1 = newTemp(Ity_I32);
2116 IRTemp op2 = newTemp(Ity_I32);
2117 IRTemp result = newTemp(Ity_I32);
2118
2119 assign(op1, get_gpr_w1(r1));
2120 assign(op2, get_gpr_w1(r2));
2121 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2122 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2123 put_gpr_w1(r1, mkexpr(result));
2124
2125 return "ar";
2126}
2127
2128static HChar *
2129s390_irgen_AGR(UChar r1, UChar r2)
2130{
2131 IRTemp op1 = newTemp(Ity_I64);
2132 IRTemp op2 = newTemp(Ity_I64);
2133 IRTemp result = newTemp(Ity_I64);
2134
2135 assign(op1, get_gpr_dw0(r1));
2136 assign(op2, get_gpr_dw0(r2));
2137 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2138 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2139 put_gpr_dw0(r1, mkexpr(result));
2140
2141 return "agr";
2142}
2143
2144static HChar *
2145s390_irgen_AGFR(UChar r1, UChar r2)
2146{
2147 IRTemp op1 = newTemp(Ity_I64);
2148 IRTemp op2 = newTemp(Ity_I64);
2149 IRTemp result = newTemp(Ity_I64);
2150
2151 assign(op1, get_gpr_dw0(r1));
2152 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2153 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2154 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2155 put_gpr_dw0(r1, mkexpr(result));
2156
2157 return "agfr";
2158}
2159
2160static HChar *
2161s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2162{
2163 IRTemp op2 = newTemp(Ity_I32);
2164 IRTemp op3 = newTemp(Ity_I32);
2165 IRTemp result = newTemp(Ity_I32);
2166
2167 assign(op2, get_gpr_w1(r2));
2168 assign(op3, get_gpr_w1(r3));
2169 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2170 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2171 put_gpr_w1(r1, mkexpr(result));
2172
2173 return "ark";
2174}
2175
2176static HChar *
2177s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2178{
2179 IRTemp op2 = newTemp(Ity_I64);
2180 IRTemp op3 = newTemp(Ity_I64);
2181 IRTemp result = newTemp(Ity_I64);
2182
2183 assign(op2, get_gpr_dw0(r2));
2184 assign(op3, get_gpr_dw0(r3));
2185 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2186 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2187 put_gpr_dw0(r1, mkexpr(result));
2188
2189 return "agrk";
2190}
2191
2192static HChar *
2193s390_irgen_A(UChar r1, IRTemp op2addr)
2194{
2195 IRTemp op1 = newTemp(Ity_I32);
2196 IRTemp op2 = newTemp(Ity_I32);
2197 IRTemp result = newTemp(Ity_I32);
2198
2199 assign(op1, get_gpr_w1(r1));
2200 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2201 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2202 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2203 put_gpr_w1(r1, mkexpr(result));
2204
2205 return "a";
2206}
2207
2208static HChar *
2209s390_irgen_AY(UChar r1, IRTemp op2addr)
2210{
2211 IRTemp op1 = newTemp(Ity_I32);
2212 IRTemp op2 = newTemp(Ity_I32);
2213 IRTemp result = newTemp(Ity_I32);
2214
2215 assign(op1, get_gpr_w1(r1));
2216 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2217 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2218 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2219 put_gpr_w1(r1, mkexpr(result));
2220
2221 return "ay";
2222}
2223
2224static HChar *
2225s390_irgen_AG(UChar r1, IRTemp op2addr)
2226{
2227 IRTemp op1 = newTemp(Ity_I64);
2228 IRTemp op2 = newTemp(Ity_I64);
2229 IRTemp result = newTemp(Ity_I64);
2230
2231 assign(op1, get_gpr_dw0(r1));
2232 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2233 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2234 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2235 put_gpr_dw0(r1, mkexpr(result));
2236
2237 return "ag";
2238}
2239
2240static HChar *
2241s390_irgen_AGF(UChar r1, IRTemp op2addr)
2242{
2243 IRTemp op1 = newTemp(Ity_I64);
2244 IRTemp op2 = newTemp(Ity_I64);
2245 IRTemp result = newTemp(Ity_I64);
2246
2247 assign(op1, get_gpr_dw0(r1));
2248 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2249 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2250 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2251 put_gpr_dw0(r1, mkexpr(result));
2252
2253 return "agf";
2254}
2255
2256static HChar *
2257s390_irgen_AFI(UChar r1, UInt i2)
2258{
2259 IRTemp op1 = newTemp(Ity_I32);
2260 Int op2;
2261 IRTemp result = newTemp(Ity_I32);
2262
2263 assign(op1, get_gpr_w1(r1));
2264 op2 = (Int)i2;
2265 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2266 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2267 mkU32((UInt)op2)));
2268 put_gpr_w1(r1, mkexpr(result));
2269
2270 return "afi";
2271}
2272
2273static HChar *
2274s390_irgen_AGFI(UChar r1, UInt i2)
2275{
2276 IRTemp op1 = newTemp(Ity_I64);
2277 Long op2;
2278 IRTemp result = newTemp(Ity_I64);
2279
2280 assign(op1, get_gpr_dw0(r1));
2281 op2 = (Long)(Int)i2;
2282 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2283 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2284 mkU64((ULong)op2)));
2285 put_gpr_dw0(r1, mkexpr(result));
2286
2287 return "agfi";
2288}
2289
2290static HChar *
2291s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2292{
2293 Int op2;
2294 IRTemp op3 = newTemp(Ity_I32);
2295 IRTemp result = newTemp(Ity_I32);
2296
2297 op2 = (Int)(Short)i2;
2298 assign(op3, get_gpr_w1(r3));
2299 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2300 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2301 op2)), op3);
2302 put_gpr_w1(r1, mkexpr(result));
2303
2304 return "ahik";
2305}
2306
2307static HChar *
2308s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2309{
2310 Long op2;
2311 IRTemp op3 = newTemp(Ity_I64);
2312 IRTemp result = newTemp(Ity_I64);
2313
2314 op2 = (Long)(Short)i2;
2315 assign(op3, get_gpr_dw0(r3));
2316 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2317 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2318 op2)), op3);
2319 put_gpr_dw0(r1, mkexpr(result));
2320
2321 return "aghik";
2322}
2323
2324static HChar *
2325s390_irgen_ASI(UChar i2, IRTemp op1addr)
2326{
2327 IRTemp op1 = newTemp(Ity_I32);
2328 Int op2;
2329 IRTemp result = newTemp(Ity_I32);
2330
2331 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2332 op2 = (Int)(Char)i2;
2333 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2334 store(mkexpr(op1addr), mkexpr(result));
2335 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2336 mkU32((UInt)op2)));
2337
2338 return "asi";
2339}
2340
2341static HChar *
2342s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2343{
2344 IRTemp op1 = newTemp(Ity_I64);
2345 Long op2;
2346 IRTemp result = newTemp(Ity_I64);
2347
2348 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2349 op2 = (Long)(Char)i2;
2350 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2351 store(mkexpr(op1addr), mkexpr(result));
2352 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2353 mkU64((ULong)op2)));
2354
2355 return "agsi";
2356}
2357
2358static HChar *
2359s390_irgen_AH(UChar r1, IRTemp op2addr)
2360{
2361 IRTemp op1 = newTemp(Ity_I32);
2362 IRTemp op2 = newTemp(Ity_I32);
2363 IRTemp result = newTemp(Ity_I32);
2364
2365 assign(op1, get_gpr_w1(r1));
2366 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2367 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2368 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2369 put_gpr_w1(r1, mkexpr(result));
2370
2371 return "ah";
2372}
2373
2374static HChar *
2375s390_irgen_AHY(UChar r1, IRTemp op2addr)
2376{
2377 IRTemp op1 = newTemp(Ity_I32);
2378 IRTemp op2 = newTemp(Ity_I32);
2379 IRTemp result = newTemp(Ity_I32);
2380
2381 assign(op1, get_gpr_w1(r1));
2382 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2383 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2384 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2385 put_gpr_w1(r1, mkexpr(result));
2386
2387 return "ahy";
2388}
2389
2390static HChar *
2391s390_irgen_AHI(UChar r1, UShort i2)
2392{
2393 IRTemp op1 = newTemp(Ity_I32);
2394 Int op2;
2395 IRTemp result = newTemp(Ity_I32);
2396
2397 assign(op1, get_gpr_w1(r1));
2398 op2 = (Int)(Short)i2;
2399 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2400 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2401 mkU32((UInt)op2)));
2402 put_gpr_w1(r1, mkexpr(result));
2403
2404 return "ahi";
2405}
2406
2407static HChar *
2408s390_irgen_AGHI(UChar r1, UShort i2)
2409{
2410 IRTemp op1 = newTemp(Ity_I64);
2411 Long op2;
2412 IRTemp result = newTemp(Ity_I64);
2413
2414 assign(op1, get_gpr_dw0(r1));
2415 op2 = (Long)(Short)i2;
2416 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2417 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2418 mkU64((ULong)op2)));
2419 put_gpr_dw0(r1, mkexpr(result));
2420
2421 return "aghi";
2422}
2423
2424static HChar *
2425s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2426{
2427 IRTemp op2 = newTemp(Ity_I32);
2428 IRTemp op3 = newTemp(Ity_I32);
2429 IRTemp result = newTemp(Ity_I32);
2430
2431 assign(op2, get_gpr_w0(r2));
2432 assign(op3, get_gpr_w0(r3));
2433 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2434 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2435 put_gpr_w0(r1, mkexpr(result));
2436
2437 return "ahhhr";
2438}
2439
2440static HChar *
2441s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2442{
2443 IRTemp op2 = newTemp(Ity_I32);
2444 IRTemp op3 = newTemp(Ity_I32);
2445 IRTemp result = newTemp(Ity_I32);
2446
2447 assign(op2, get_gpr_w0(r2));
2448 assign(op3, get_gpr_w1(r3));
2449 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2450 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2451 put_gpr_w0(r1, mkexpr(result));
2452
2453 return "ahhlr";
2454}
2455
2456static HChar *
2457s390_irgen_AIH(UChar r1, UInt i2)
2458{
2459 IRTemp op1 = newTemp(Ity_I32);
2460 Int op2;
2461 IRTemp result = newTemp(Ity_I32);
2462
2463 assign(op1, get_gpr_w0(r1));
2464 op2 = (Int)i2;
2465 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2466 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2467 mkU32((UInt)op2)));
2468 put_gpr_w0(r1, mkexpr(result));
2469
2470 return "aih";
2471}
2472
2473static HChar *
2474s390_irgen_ALR(UChar r1, UChar r2)
2475{
2476 IRTemp op1 = newTemp(Ity_I32);
2477 IRTemp op2 = newTemp(Ity_I32);
2478 IRTemp result = newTemp(Ity_I32);
2479
2480 assign(op1, get_gpr_w1(r1));
2481 assign(op2, get_gpr_w1(r2));
2482 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2483 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2484 put_gpr_w1(r1, mkexpr(result));
2485
2486 return "alr";
2487}
2488
2489static HChar *
2490s390_irgen_ALGR(UChar r1, UChar r2)
2491{
2492 IRTemp op1 = newTemp(Ity_I64);
2493 IRTemp op2 = newTemp(Ity_I64);
2494 IRTemp result = newTemp(Ity_I64);
2495
2496 assign(op1, get_gpr_dw0(r1));
2497 assign(op2, get_gpr_dw0(r2));
2498 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2499 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2500 put_gpr_dw0(r1, mkexpr(result));
2501
2502 return "algr";
2503}
2504
2505static HChar *
2506s390_irgen_ALGFR(UChar r1, UChar r2)
2507{
2508 IRTemp op1 = newTemp(Ity_I64);
2509 IRTemp op2 = newTemp(Ity_I64);
2510 IRTemp result = newTemp(Ity_I64);
2511
2512 assign(op1, get_gpr_dw0(r1));
2513 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2514 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2515 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2516 put_gpr_dw0(r1, mkexpr(result));
2517
2518 return "algfr";
2519}
2520
2521static HChar *
2522s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2523{
2524 IRTemp op2 = newTemp(Ity_I32);
2525 IRTemp op3 = newTemp(Ity_I32);
2526 IRTemp result = newTemp(Ity_I32);
2527
2528 assign(op2, get_gpr_w1(r2));
2529 assign(op3, get_gpr_w1(r3));
2530 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2531 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2532 put_gpr_w1(r1, mkexpr(result));
2533
2534 return "alrk";
2535}
2536
2537static HChar *
2538s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2539{
2540 IRTemp op2 = newTemp(Ity_I64);
2541 IRTemp op3 = newTemp(Ity_I64);
2542 IRTemp result = newTemp(Ity_I64);
2543
2544 assign(op2, get_gpr_dw0(r2));
2545 assign(op3, get_gpr_dw0(r3));
2546 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2547 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2548 put_gpr_dw0(r1, mkexpr(result));
2549
2550 return "algrk";
2551}
2552
2553static HChar *
2554s390_irgen_AL(UChar r1, IRTemp op2addr)
2555{
2556 IRTemp op1 = newTemp(Ity_I32);
2557 IRTemp op2 = newTemp(Ity_I32);
2558 IRTemp result = newTemp(Ity_I32);
2559
2560 assign(op1, get_gpr_w1(r1));
2561 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2562 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2563 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2564 put_gpr_w1(r1, mkexpr(result));
2565
2566 return "al";
2567}
2568
2569static HChar *
2570s390_irgen_ALY(UChar r1, IRTemp op2addr)
2571{
2572 IRTemp op1 = newTemp(Ity_I32);
2573 IRTemp op2 = newTemp(Ity_I32);
2574 IRTemp result = newTemp(Ity_I32);
2575
2576 assign(op1, get_gpr_w1(r1));
2577 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2578 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2579 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2580 put_gpr_w1(r1, mkexpr(result));
2581
2582 return "aly";
2583}
2584
2585static HChar *
2586s390_irgen_ALG(UChar r1, IRTemp op2addr)
2587{
2588 IRTemp op1 = newTemp(Ity_I64);
2589 IRTemp op2 = newTemp(Ity_I64);
2590 IRTemp result = newTemp(Ity_I64);
2591
2592 assign(op1, get_gpr_dw0(r1));
2593 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2594 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2595 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2596 put_gpr_dw0(r1, mkexpr(result));
2597
2598 return "alg";
2599}
2600
2601static HChar *
2602s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2603{
2604 IRTemp op1 = newTemp(Ity_I64);
2605 IRTemp op2 = newTemp(Ity_I64);
2606 IRTemp result = newTemp(Ity_I64);
2607
2608 assign(op1, get_gpr_dw0(r1));
2609 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2610 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2611 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2612 put_gpr_dw0(r1, mkexpr(result));
2613
2614 return "algf";
2615}
2616
2617static HChar *
2618s390_irgen_ALFI(UChar r1, UInt i2)
2619{
2620 IRTemp op1 = newTemp(Ity_I32);
2621 UInt op2;
2622 IRTemp result = newTemp(Ity_I32);
2623
2624 assign(op1, get_gpr_w1(r1));
2625 op2 = i2;
2626 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2627 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2628 mkU32(op2)));
2629 put_gpr_w1(r1, mkexpr(result));
2630
2631 return "alfi";
2632}
2633
2634static HChar *
2635s390_irgen_ALGFI(UChar r1, UInt i2)
2636{
2637 IRTemp op1 = newTemp(Ity_I64);
2638 ULong op2;
2639 IRTemp result = newTemp(Ity_I64);
2640
2641 assign(op1, get_gpr_dw0(r1));
2642 op2 = (ULong)i2;
2643 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2644 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2645 mkU64(op2)));
2646 put_gpr_dw0(r1, mkexpr(result));
2647
2648 return "algfi";
2649}
2650
2651static HChar *
2652s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2653{
2654 IRTemp op2 = newTemp(Ity_I32);
2655 IRTemp op3 = newTemp(Ity_I32);
2656 IRTemp result = newTemp(Ity_I32);
2657
2658 assign(op2, get_gpr_w0(r2));
2659 assign(op3, get_gpr_w0(r3));
2660 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2661 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2662 put_gpr_w0(r1, mkexpr(result));
2663
2664 return "alhhhr";
2665}
2666
2667static HChar *
2668s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2669{
2670 IRTemp op2 = newTemp(Ity_I32);
2671 IRTemp op3 = newTemp(Ity_I32);
2672 IRTemp result = newTemp(Ity_I32);
2673
2674 assign(op2, get_gpr_w0(r2));
2675 assign(op3, get_gpr_w1(r3));
2676 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2677 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2678 put_gpr_w0(r1, mkexpr(result));
2679
2680 return "alhhlr";
2681}
2682
2683static HChar *
2684s390_irgen_ALCR(UChar r1, UChar r2)
2685{
2686 IRTemp op1 = newTemp(Ity_I32);
2687 IRTemp op2 = newTemp(Ity_I32);
2688 IRTemp result = newTemp(Ity_I32);
2689 IRTemp carry_in = newTemp(Ity_I32);
2690
2691 assign(op1, get_gpr_w1(r1));
2692 assign(op2, get_gpr_w1(r2));
2693 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2694 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2695 mkexpr(carry_in)));
2696 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2697 put_gpr_w1(r1, mkexpr(result));
2698
2699 return "alcr";
2700}
2701
2702static HChar *
2703s390_irgen_ALCGR(UChar r1, UChar r2)
2704{
2705 IRTemp op1 = newTemp(Ity_I64);
2706 IRTemp op2 = newTemp(Ity_I64);
2707 IRTemp result = newTemp(Ity_I64);
2708 IRTemp carry_in = newTemp(Ity_I64);
2709
2710 assign(op1, get_gpr_dw0(r1));
2711 assign(op2, get_gpr_dw0(r2));
2712 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2713 mkU8(1))));
2714 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2715 mkexpr(carry_in)));
2716 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2717 put_gpr_dw0(r1, mkexpr(result));
2718
2719 return "alcgr";
2720}
2721
2722static HChar *
2723s390_irgen_ALC(UChar r1, IRTemp op2addr)
2724{
2725 IRTemp op1 = newTemp(Ity_I32);
2726 IRTemp op2 = newTemp(Ity_I32);
2727 IRTemp result = newTemp(Ity_I32);
2728 IRTemp carry_in = newTemp(Ity_I32);
2729
2730 assign(op1, get_gpr_w1(r1));
2731 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2732 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2733 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2734 mkexpr(carry_in)));
2735 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2736 put_gpr_w1(r1, mkexpr(result));
2737
2738 return "alc";
2739}
2740
2741static HChar *
2742s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2743{
2744 IRTemp op1 = newTemp(Ity_I64);
2745 IRTemp op2 = newTemp(Ity_I64);
2746 IRTemp result = newTemp(Ity_I64);
2747 IRTemp carry_in = newTemp(Ity_I64);
2748
2749 assign(op1, get_gpr_dw0(r1));
2750 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2751 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2752 mkU8(1))));
2753 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2754 mkexpr(carry_in)));
2755 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2756 put_gpr_dw0(r1, mkexpr(result));
2757
2758 return "alcg";
2759}
2760
2761static HChar *
2762s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2763{
2764 IRTemp op1 = newTemp(Ity_I32);
2765 UInt op2;
2766 IRTemp result = newTemp(Ity_I32);
2767
2768 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2769 op2 = (UInt)(Int)(Char)i2;
2770 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2771 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2772 mkU32(op2)));
2773 store(mkexpr(op1addr), mkexpr(result));
2774
2775 return "alsi";
2776}
2777
2778static HChar *
2779s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2780{
2781 IRTemp op1 = newTemp(Ity_I64);
2782 ULong op2;
2783 IRTemp result = newTemp(Ity_I64);
2784
2785 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2786 op2 = (ULong)(Long)(Char)i2;
2787 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2788 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2789 mkU64(op2)));
2790 store(mkexpr(op1addr), mkexpr(result));
2791
2792 return "algsi";
2793}
2794
2795static HChar *
2796s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2797{
2798 UInt op2;
2799 IRTemp op3 = newTemp(Ity_I32);
2800 IRTemp result = newTemp(Ity_I32);
2801
2802 op2 = (UInt)(Int)(Short)i2;
2803 assign(op3, get_gpr_w1(r3));
2804 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2805 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2806 op3);
2807 put_gpr_w1(r1, mkexpr(result));
2808
2809 return "alhsik";
2810}
2811
2812static HChar *
2813s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2814{
2815 ULong op2;
2816 IRTemp op3 = newTemp(Ity_I64);
2817 IRTemp result = newTemp(Ity_I64);
2818
2819 op2 = (ULong)(Long)(Short)i2;
2820 assign(op3, get_gpr_dw0(r3));
2821 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2822 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2823 op3);
2824 put_gpr_dw0(r1, mkexpr(result));
2825
2826 return "alghsik";
2827}
2828
2829static HChar *
2830s390_irgen_ALSIH(UChar r1, UInt i2)
2831{
2832 IRTemp op1 = newTemp(Ity_I32);
2833 UInt op2;
2834 IRTemp result = newTemp(Ity_I32);
2835
2836 assign(op1, get_gpr_w0(r1));
2837 op2 = i2;
2838 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2839 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2840 mkU32(op2)));
2841 put_gpr_w0(r1, mkexpr(result));
2842
2843 return "alsih";
2844}
2845
2846static HChar *
2847s390_irgen_ALSIHN(UChar r1, UInt i2)
2848{
2849 IRTemp op1 = newTemp(Ity_I32);
2850 UInt op2;
2851 IRTemp result = newTemp(Ity_I32);
2852
2853 assign(op1, get_gpr_w0(r1));
2854 op2 = i2;
2855 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2856 put_gpr_w0(r1, mkexpr(result));
2857
2858 return "alsihn";
2859}
2860
2861static HChar *
2862s390_irgen_NR(UChar r1, UChar r2)
2863{
2864 IRTemp op1 = newTemp(Ity_I32);
2865 IRTemp op2 = newTemp(Ity_I32);
2866 IRTemp result = newTemp(Ity_I32);
2867
2868 assign(op1, get_gpr_w1(r1));
2869 assign(op2, get_gpr_w1(r2));
2870 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2871 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2872 put_gpr_w1(r1, mkexpr(result));
2873
2874 return "nr";
2875}
2876
2877static HChar *
2878s390_irgen_NGR(UChar r1, UChar r2)
2879{
2880 IRTemp op1 = newTemp(Ity_I64);
2881 IRTemp op2 = newTemp(Ity_I64);
2882 IRTemp result = newTemp(Ity_I64);
2883
2884 assign(op1, get_gpr_dw0(r1));
2885 assign(op2, get_gpr_dw0(r2));
2886 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2887 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2888 put_gpr_dw0(r1, mkexpr(result));
2889
2890 return "ngr";
2891}
2892
2893static HChar *
2894s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2895{
2896 IRTemp op2 = newTemp(Ity_I32);
2897 IRTemp op3 = newTemp(Ity_I32);
2898 IRTemp result = newTemp(Ity_I32);
2899
2900 assign(op2, get_gpr_w1(r2));
2901 assign(op3, get_gpr_w1(r3));
2902 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2903 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2904 put_gpr_w1(r1, mkexpr(result));
2905
2906 return "nrk";
2907}
2908
2909static HChar *
2910s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2911{
2912 IRTemp op2 = newTemp(Ity_I64);
2913 IRTemp op3 = newTemp(Ity_I64);
2914 IRTemp result = newTemp(Ity_I64);
2915
2916 assign(op2, get_gpr_dw0(r2));
2917 assign(op3, get_gpr_dw0(r3));
2918 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2919 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2920 put_gpr_dw0(r1, mkexpr(result));
2921
2922 return "ngrk";
2923}
2924
2925static HChar *
2926s390_irgen_N(UChar r1, IRTemp op2addr)
2927{
2928 IRTemp op1 = newTemp(Ity_I32);
2929 IRTemp op2 = newTemp(Ity_I32);
2930 IRTemp result = newTemp(Ity_I32);
2931
2932 assign(op1, get_gpr_w1(r1));
2933 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2934 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2935 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2936 put_gpr_w1(r1, mkexpr(result));
2937
2938 return "n";
2939}
2940
2941static HChar *
2942s390_irgen_NY(UChar r1, IRTemp op2addr)
2943{
2944 IRTemp op1 = newTemp(Ity_I32);
2945 IRTemp op2 = newTemp(Ity_I32);
2946 IRTemp result = newTemp(Ity_I32);
2947
2948 assign(op1, get_gpr_w1(r1));
2949 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2950 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2951 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2952 put_gpr_w1(r1, mkexpr(result));
2953
2954 return "ny";
2955}
2956
2957static HChar *
2958s390_irgen_NG(UChar r1, IRTemp op2addr)
2959{
2960 IRTemp op1 = newTemp(Ity_I64);
2961 IRTemp op2 = newTemp(Ity_I64);
2962 IRTemp result = newTemp(Ity_I64);
2963
2964 assign(op1, get_gpr_dw0(r1));
2965 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2966 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2967 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2968 put_gpr_dw0(r1, mkexpr(result));
2969
2970 return "ng";
2971}
2972
2973static HChar *
2974s390_irgen_NI(UChar i2, IRTemp op1addr)
2975{
2976 IRTemp op1 = newTemp(Ity_I8);
2977 UChar op2;
2978 IRTemp result = newTemp(Ity_I8);
2979
2980 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2981 op2 = i2;
2982 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2983 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2984 store(mkexpr(op1addr), mkexpr(result));
2985
2986 return "ni";
2987}
2988
2989static HChar *
2990s390_irgen_NIY(UChar i2, IRTemp op1addr)
2991{
2992 IRTemp op1 = newTemp(Ity_I8);
2993 UChar op2;
2994 IRTemp result = newTemp(Ity_I8);
2995
2996 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2997 op2 = i2;
2998 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2999 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3000 store(mkexpr(op1addr), mkexpr(result));
3001
3002 return "niy";
3003}
3004
3005static HChar *
3006s390_irgen_NIHF(UChar r1, UInt i2)
3007{
3008 IRTemp op1 = newTemp(Ity_I32);
3009 UInt op2;
3010 IRTemp result = newTemp(Ity_I32);
3011
3012 assign(op1, get_gpr_w0(r1));
3013 op2 = i2;
3014 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3015 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3016 put_gpr_w0(r1, mkexpr(result));
3017
3018 return "nihf";
3019}
3020
3021static HChar *
3022s390_irgen_NIHH(UChar r1, UShort i2)
3023{
3024 IRTemp op1 = newTemp(Ity_I16);
3025 UShort op2;
3026 IRTemp result = newTemp(Ity_I16);
3027
3028 assign(op1, get_gpr_hw0(r1));
3029 op2 = i2;
3030 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3031 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3032 put_gpr_hw0(r1, mkexpr(result));
3033
3034 return "nihh";
3035}
3036
3037static HChar *
3038s390_irgen_NIHL(UChar r1, UShort i2)
3039{
3040 IRTemp op1 = newTemp(Ity_I16);
3041 UShort op2;
3042 IRTemp result = newTemp(Ity_I16);
3043
3044 assign(op1, get_gpr_hw1(r1));
3045 op2 = i2;
3046 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3047 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3048 put_gpr_hw1(r1, mkexpr(result));
3049
3050 return "nihl";
3051}
3052
3053static HChar *
3054s390_irgen_NILF(UChar r1, UInt i2)
3055{
3056 IRTemp op1 = newTemp(Ity_I32);
3057 UInt op2;
3058 IRTemp result = newTemp(Ity_I32);
3059
3060 assign(op1, get_gpr_w1(r1));
3061 op2 = i2;
3062 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3063 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3064 put_gpr_w1(r1, mkexpr(result));
3065
3066 return "nilf";
3067}
3068
3069static HChar *
3070s390_irgen_NILH(UChar r1, UShort i2)
3071{
3072 IRTemp op1 = newTemp(Ity_I16);
3073 UShort op2;
3074 IRTemp result = newTemp(Ity_I16);
3075
3076 assign(op1, get_gpr_hw2(r1));
3077 op2 = i2;
3078 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3079 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3080 put_gpr_hw2(r1, mkexpr(result));
3081
3082 return "nilh";
3083}
3084
3085static HChar *
3086s390_irgen_NILL(UChar r1, UShort i2)
3087{
3088 IRTemp op1 = newTemp(Ity_I16);
3089 UShort op2;
3090 IRTemp result = newTemp(Ity_I16);
3091
3092 assign(op1, get_gpr_hw3(r1));
3093 op2 = i2;
3094 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3095 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3096 put_gpr_hw3(r1, mkexpr(result));
3097
3098 return "nill";
3099}
3100
3101static HChar *
3102s390_irgen_BASR(UChar r1, UChar r2)
3103{
3104 IRTemp target = newTemp(Ity_I64);
3105
3106 if (r2 == 0) {
3107 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3108 } else {
3109 if (r1 != r2) {
3110 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3111 call_function(get_gpr_dw0(r2));
3112 } else {
3113 assign(target, get_gpr_dw0(r2));
3114 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3115 call_function(mkexpr(target));
3116 }
3117 }
3118
3119 return "basr";
3120}
3121
3122static HChar *
3123s390_irgen_BAS(UChar r1, IRTemp op2addr)
3124{
3125 IRTemp target = newTemp(Ity_I64);
3126
3127 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3128 assign(target, mkexpr(op2addr));
3129 call_function(mkexpr(target));
3130
3131 return "bas";
3132}
3133
3134static HChar *
3135s390_irgen_BCR(UChar r1, UChar r2)
3136{
3137 IRTemp cond = newTemp(Ity_I32);
3138
sewardja52e37e2011-04-28 18:48:06 +00003139 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3140 stmt(IRStmt_MBE(Imbe_Fence));
3141 }
3142
sewardj2019a972011-03-07 16:04:07 +00003143 if ((r2 == 0) || (r1 == 0)) {
3144 } else {
3145 if (r1 == 15) {
3146 return_from_function(get_gpr_dw0(r2));
3147 } else {
3148 assign(cond, s390_call_calculate_cond(r1));
florianf321da72012-07-21 20:32:57 +00003149 if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3150 get_gpr_dw0(r2));
sewardj2019a972011-03-07 16:04:07 +00003151 }
3152 }
sewardj7ee97522011-05-09 21:45:04 +00003153 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003154 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3155
3156 return "bcr";
3157}
3158
3159static HChar *
3160s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3161{
3162 IRTemp cond = newTemp(Ity_I32);
3163
3164 if (r1 == 0) {
3165 } else {
3166 if (r1 == 15) {
3167 always_goto(mkexpr(op2addr));
3168 } else {
3169 assign(cond, s390_call_calculate_cond(r1));
florianf321da72012-07-21 20:32:57 +00003170 if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3171 mkexpr(op2addr));
sewardj2019a972011-03-07 16:04:07 +00003172 }
3173 }
sewardj7ee97522011-05-09 21:45:04 +00003174 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003175 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3176
3177 return "bc";
3178}
3179
3180static HChar *
3181s390_irgen_BCTR(UChar r1, UChar r2)
3182{
3183 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3184 if (r2 != 0) {
florianf321da72012-07-21 20:32:57 +00003185 if_condition_goto_computed(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3186 get_gpr_dw0(r2));
sewardj2019a972011-03-07 16:04:07 +00003187 }
3188
3189 return "bctr";
3190}
3191
3192static HChar *
3193s390_irgen_BCTGR(UChar r1, UChar r2)
3194{
3195 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3196 if (r2 != 0) {
florianf321da72012-07-21 20:32:57 +00003197 if_condition_goto_computed(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3198 get_gpr_dw0(r2));
sewardj2019a972011-03-07 16:04:07 +00003199 }
3200
3201 return "bctgr";
3202}
3203
3204static HChar *
3205s390_irgen_BCT(UChar r1, IRTemp op2addr)
3206{
3207 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
florianf321da72012-07-21 20:32:57 +00003208 if_condition_goto_computed(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3209 mkexpr(op2addr));
sewardj2019a972011-03-07 16:04:07 +00003210
3211 return "bct";
3212}
3213
3214static HChar *
3215s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3216{
3217 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
florianf321da72012-07-21 20:32:57 +00003218 if_condition_goto_computed(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3219 mkexpr(op2addr));
sewardj2019a972011-03-07 16:04:07 +00003220
3221 return "bctg";
3222}
3223
3224static HChar *
3225s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3226{
3227 IRTemp value = newTemp(Ity_I32);
3228
3229 assign(value, get_gpr_w1(r3 | 1));
3230 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
florianf321da72012-07-21 20:32:57 +00003231 if_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3232 get_gpr_w1(r1)), mkexpr(op2addr));
sewardj2019a972011-03-07 16:04:07 +00003233
3234 return "bxh";
3235}
3236
3237static HChar *
3238s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3239{
3240 IRTemp value = newTemp(Ity_I64);
3241
3242 assign(value, get_gpr_dw0(r3 | 1));
3243 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
florianf321da72012-07-21 20:32:57 +00003244 if_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3245 get_gpr_dw0(r1)), mkexpr(op2addr));
sewardj2019a972011-03-07 16:04:07 +00003246
3247 return "bxhg";
3248}
3249
3250static HChar *
3251s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3252{
3253 IRTemp value = newTemp(Ity_I32);
3254
3255 assign(value, get_gpr_w1(r3 | 1));
3256 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
florianf321da72012-07-21 20:32:57 +00003257 if_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3258 mkexpr(value)), mkexpr(op2addr));
sewardj2019a972011-03-07 16:04:07 +00003259
3260 return "bxle";
3261}
3262
3263static HChar *
3264s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3265{
3266 IRTemp value = newTemp(Ity_I64);
3267
3268 assign(value, get_gpr_dw0(r3 | 1));
3269 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
florianf321da72012-07-21 20:32:57 +00003270 if_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3271 mkexpr(value)), mkexpr(op2addr));
sewardj2019a972011-03-07 16:04:07 +00003272
3273 return "bxleg";
3274}
3275
3276static HChar *
3277s390_irgen_BRAS(UChar r1, UShort i2)
3278{
3279 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
floriana64c2432011-07-16 02:11:50 +00003280 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003281
3282 return "bras";
3283}
3284
3285static HChar *
3286s390_irgen_BRASL(UChar r1, UInt i2)
3287{
3288 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
floriana64c2432011-07-16 02:11:50 +00003289 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003290
3291 return "brasl";
3292}
3293
3294static HChar *
3295s390_irgen_BRC(UChar r1, UShort i2)
3296{
3297 IRTemp cond = newTemp(Ity_I32);
3298
3299 if (r1 == 0) {
3300 } else {
3301 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003302 always_goto_and_chase(
3303 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003304 } else {
3305 assign(cond, s390_call_calculate_cond(r1));
3306 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3307 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3308
3309 }
3310 }
sewardj7ee97522011-05-09 21:45:04 +00003311 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003312 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3313
3314 return "brc";
3315}
3316
3317static HChar *
3318s390_irgen_BRCL(UChar r1, UInt i2)
3319{
3320 IRTemp cond = newTemp(Ity_I32);
3321
3322 if (r1 == 0) {
3323 } else {
3324 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003325 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003326 } else {
3327 assign(cond, s390_call_calculate_cond(r1));
3328 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3329 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3330 }
3331 }
sewardj7ee97522011-05-09 21:45:04 +00003332 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003333 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3334
3335 return "brcl";
3336}
3337
3338static HChar *
3339s390_irgen_BRCT(UChar r1, UShort i2)
3340{
3341 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3342 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3343 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3344
3345 return "brct";
3346}
3347
3348static HChar *
3349s390_irgen_BRCTG(UChar r1, UShort i2)
3350{
3351 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3352 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3353 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3354
3355 return "brctg";
3356}
3357
3358static HChar *
3359s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3360{
3361 IRTemp value = newTemp(Ity_I32);
3362
3363 assign(value, get_gpr_w1(r3 | 1));
3364 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3365 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3366 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3367
3368 return "brxh";
3369}
3370
3371static HChar *
3372s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3373{
3374 IRTemp value = newTemp(Ity_I64);
3375
3376 assign(value, get_gpr_dw0(r3 | 1));
3377 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3378 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3379 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3380
3381 return "brxhg";
3382}
3383
3384static HChar *
3385s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3386{
3387 IRTemp value = newTemp(Ity_I32);
3388
3389 assign(value, get_gpr_w1(r3 | 1));
3390 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3391 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3392 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3393
3394 return "brxle";
3395}
3396
3397static HChar *
3398s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3399{
3400 IRTemp value = newTemp(Ity_I64);
3401
3402 assign(value, get_gpr_dw0(r3 | 1));
3403 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3404 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3405 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3406
3407 return "brxlg";
3408}
3409
3410static HChar *
3411s390_irgen_CR(UChar r1, UChar r2)
3412{
3413 IRTemp op1 = newTemp(Ity_I32);
3414 IRTemp op2 = newTemp(Ity_I32);
3415
3416 assign(op1, get_gpr_w1(r1));
3417 assign(op2, get_gpr_w1(r2));
3418 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3419
3420 return "cr";
3421}
3422
3423static HChar *
3424s390_irgen_CGR(UChar r1, UChar r2)
3425{
3426 IRTemp op1 = newTemp(Ity_I64);
3427 IRTemp op2 = newTemp(Ity_I64);
3428
3429 assign(op1, get_gpr_dw0(r1));
3430 assign(op2, get_gpr_dw0(r2));
3431 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3432
3433 return "cgr";
3434}
3435
3436static HChar *
3437s390_irgen_CGFR(UChar r1, UChar r2)
3438{
3439 IRTemp op1 = newTemp(Ity_I64);
3440 IRTemp op2 = newTemp(Ity_I64);
3441
3442 assign(op1, get_gpr_dw0(r1));
3443 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3444 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3445
3446 return "cgfr";
3447}
3448
3449static HChar *
3450s390_irgen_C(UChar r1, IRTemp op2addr)
3451{
3452 IRTemp op1 = newTemp(Ity_I32);
3453 IRTemp op2 = newTemp(Ity_I32);
3454
3455 assign(op1, get_gpr_w1(r1));
3456 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3457 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3458
3459 return "c";
3460}
3461
3462static HChar *
3463s390_irgen_CY(UChar r1, IRTemp op2addr)
3464{
3465 IRTemp op1 = newTemp(Ity_I32);
3466 IRTemp op2 = newTemp(Ity_I32);
3467
3468 assign(op1, get_gpr_w1(r1));
3469 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3470 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3471
3472 return "cy";
3473}
3474
3475static HChar *
3476s390_irgen_CG(UChar r1, IRTemp op2addr)
3477{
3478 IRTemp op1 = newTemp(Ity_I64);
3479 IRTemp op2 = newTemp(Ity_I64);
3480
3481 assign(op1, get_gpr_dw0(r1));
3482 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3483 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3484
3485 return "cg";
3486}
3487
3488static HChar *
3489s390_irgen_CGF(UChar r1, IRTemp op2addr)
3490{
3491 IRTemp op1 = newTemp(Ity_I64);
3492 IRTemp op2 = newTemp(Ity_I64);
3493
3494 assign(op1, get_gpr_dw0(r1));
3495 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3496 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3497
3498 return "cgf";
3499}
3500
3501static HChar *
3502s390_irgen_CFI(UChar r1, UInt i2)
3503{
3504 IRTemp op1 = newTemp(Ity_I32);
3505 Int op2;
3506
3507 assign(op1, get_gpr_w1(r1));
3508 op2 = (Int)i2;
3509 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3510 mkU32((UInt)op2)));
3511
3512 return "cfi";
3513}
3514
3515static HChar *
3516s390_irgen_CGFI(UChar r1, UInt i2)
3517{
3518 IRTemp op1 = newTemp(Ity_I64);
3519 Long op2;
3520
3521 assign(op1, get_gpr_dw0(r1));
3522 op2 = (Long)(Int)i2;
3523 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3524 mkU64((ULong)op2)));
3525
3526 return "cgfi";
3527}
3528
3529static HChar *
3530s390_irgen_CRL(UChar r1, UInt i2)
3531{
3532 IRTemp op1 = newTemp(Ity_I32);
3533 IRTemp op2 = newTemp(Ity_I32);
3534
3535 assign(op1, get_gpr_w1(r1));
3536 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3537 i2 << 1))));
3538 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3539
3540 return "crl";
3541}
3542
3543static HChar *
3544s390_irgen_CGRL(UChar r1, UInt i2)
3545{
3546 IRTemp op1 = newTemp(Ity_I64);
3547 IRTemp op2 = newTemp(Ity_I64);
3548
3549 assign(op1, get_gpr_dw0(r1));
3550 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3551 i2 << 1))));
3552 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3553
3554 return "cgrl";
3555}
3556
3557static HChar *
3558s390_irgen_CGFRL(UChar r1, UInt i2)
3559{
3560 IRTemp op1 = newTemp(Ity_I64);
3561 IRTemp op2 = newTemp(Ity_I64);
3562
3563 assign(op1, get_gpr_dw0(r1));
3564 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3565 ((ULong)(Long)(Int)i2 << 1)))));
3566 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3567
3568 return "cgfrl";
3569}
3570
3571static HChar *
3572s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3573{
3574 IRTemp op1 = newTemp(Ity_I32);
3575 IRTemp op2 = newTemp(Ity_I32);
sewardj2019a972011-03-07 16:04:07 +00003576 IRTemp cond = newTemp(Ity_I32);
3577
3578 if (m3 == 0) {
3579 } else {
3580 if (m3 == 14) {
3581 always_goto(mkexpr(op4addr));
3582 } else {
3583 assign(op1, get_gpr_w1(r1));
3584 assign(op2, get_gpr_w1(r2));
florianff9613f2012-05-12 15:26:44 +00003585 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE,
3586 op1, op2));
florianf321da72012-07-21 20:32:57 +00003587 if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond),
3588 mkU32(0)), mkexpr(op4addr));
sewardj2019a972011-03-07 16:04:07 +00003589 }
3590 }
3591
3592 return "crb";
3593}
3594
3595static HChar *
3596s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3597{
3598 IRTemp op1 = newTemp(Ity_I64);
3599 IRTemp op2 = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00003600 IRTemp cond = newTemp(Ity_I32);
3601
3602 if (m3 == 0) {
3603 } else {
3604 if (m3 == 14) {
3605 always_goto(mkexpr(op4addr));
3606 } else {
3607 assign(op1, get_gpr_dw0(r1));
3608 assign(op2, get_gpr_dw0(r2));
florianff9613f2012-05-12 15:26:44 +00003609 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE,
3610 op1, op2));
florianf321da72012-07-21 20:32:57 +00003611 if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond),
3612 mkU32(0)), mkexpr(op4addr));
sewardj2019a972011-03-07 16:04:07 +00003613 }
3614 }
3615
3616 return "cgrb";
3617}
3618
3619static HChar *
3620s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3621{
3622 IRTemp op1 = newTemp(Ity_I32);
3623 IRTemp op2 = newTemp(Ity_I32);
sewardj2019a972011-03-07 16:04:07 +00003624 IRTemp cond = newTemp(Ity_I32);
3625
3626 if (m3 == 0) {
3627 } else {
3628 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003629 always_goto_and_chase(
3630 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003631 } else {
3632 assign(op1, get_gpr_w1(r1));
3633 assign(op2, get_gpr_w1(r2));
florianff9613f2012-05-12 15:26:44 +00003634 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE,
3635 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00003636 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3637 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3638
3639 }
3640 }
3641
3642 return "crj";
3643}
3644
3645static HChar *
3646s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3647{
3648 IRTemp op1 = newTemp(Ity_I64);
3649 IRTemp op2 = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00003650 IRTemp cond = newTemp(Ity_I32);
3651
3652 if (m3 == 0) {
3653 } else {
3654 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003655 always_goto_and_chase(
3656 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003657 } else {
3658 assign(op1, get_gpr_dw0(r1));
3659 assign(op2, get_gpr_dw0(r2));
florianff9613f2012-05-12 15:26:44 +00003660 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE,
3661 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00003662 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3663 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3664
3665 }
3666 }
3667
3668 return "cgrj";
3669}
3670
3671static HChar *
3672s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3673{
3674 IRTemp op1 = newTemp(Ity_I32);
3675 Int op2;
sewardj2019a972011-03-07 16:04:07 +00003676 IRTemp cond = newTemp(Ity_I32);
3677
3678 if (m3 == 0) {
3679 } else {
3680 if (m3 == 14) {
3681 always_goto(mkexpr(op4addr));
3682 } else {
3683 assign(op1, get_gpr_w1(r1));
3684 op2 = (Int)(Char)i2;
florianff9613f2012-05-12 15:26:44 +00003685 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1,
3686 mktemp(Ity_I32, mkU32((UInt)op2))));
florianf321da72012-07-21 20:32:57 +00003687 if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3688 mkexpr(op4addr));
sewardj2019a972011-03-07 16:04:07 +00003689 }
3690 }
3691
3692 return "cib";
3693}
3694
3695static HChar *
3696s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3697{
3698 IRTemp op1 = newTemp(Ity_I64);
3699 Long op2;
sewardj2019a972011-03-07 16:04:07 +00003700 IRTemp cond = newTemp(Ity_I32);
3701
3702 if (m3 == 0) {
3703 } else {
3704 if (m3 == 14) {
3705 always_goto(mkexpr(op4addr));
3706 } else {
3707 assign(op1, get_gpr_dw0(r1));
3708 op2 = (Long)(Char)i2;
florianff9613f2012-05-12 15:26:44 +00003709 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1,
3710 mktemp(Ity_I64, mkU64((ULong)op2))));
florianf321da72012-07-21 20:32:57 +00003711 if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3712 mkexpr(op4addr));
sewardj2019a972011-03-07 16:04:07 +00003713 }
3714 }
3715
3716 return "cgib";
3717}
3718
3719static HChar *
3720s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3721{
3722 IRTemp op1 = newTemp(Ity_I32);
3723 Int op2;
sewardj2019a972011-03-07 16:04:07 +00003724 IRTemp cond = newTemp(Ity_I32);
3725
3726 if (m3 == 0) {
3727 } else {
3728 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003729 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003730 } else {
3731 assign(op1, get_gpr_w1(r1));
3732 op2 = (Int)(Char)i2;
florianff9613f2012-05-12 15:26:44 +00003733 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1,
3734 mktemp(Ity_I32, mkU32((UInt)op2))));
sewardj2019a972011-03-07 16:04:07 +00003735 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3736 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3737
3738 }
3739 }
3740
3741 return "cij";
3742}
3743
3744static HChar *
3745s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3746{
3747 IRTemp op1 = newTemp(Ity_I64);
3748 Long op2;
sewardj2019a972011-03-07 16:04:07 +00003749 IRTemp cond = newTemp(Ity_I32);
3750
3751 if (m3 == 0) {
3752 } else {
3753 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003754 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003755 } else {
3756 assign(op1, get_gpr_dw0(r1));
3757 op2 = (Long)(Char)i2;
florianff9613f2012-05-12 15:26:44 +00003758 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_SIGNED_COMPARE, op1,
3759 mktemp(Ity_I64, mkU64((ULong)op2))));
sewardj2019a972011-03-07 16:04:07 +00003760 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3761 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3762
3763 }
3764 }
3765
3766 return "cgij";
3767}
3768
3769static HChar *
3770s390_irgen_CH(UChar r1, IRTemp op2addr)
3771{
3772 IRTemp op1 = newTemp(Ity_I32);
3773 IRTemp op2 = newTemp(Ity_I32);
3774
3775 assign(op1, get_gpr_w1(r1));
3776 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3777 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3778
3779 return "ch";
3780}
3781
3782static HChar *
3783s390_irgen_CHY(UChar r1, IRTemp op2addr)
3784{
3785 IRTemp op1 = newTemp(Ity_I32);
3786 IRTemp op2 = newTemp(Ity_I32);
3787
3788 assign(op1, get_gpr_w1(r1));
3789 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3790 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3791
3792 return "chy";
3793}
3794
3795static HChar *
3796s390_irgen_CGH(UChar r1, IRTemp op2addr)
3797{
3798 IRTemp op1 = newTemp(Ity_I64);
3799 IRTemp op2 = newTemp(Ity_I64);
3800
3801 assign(op1, get_gpr_dw0(r1));
3802 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3803 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3804
3805 return "cgh";
3806}
3807
3808static HChar *
3809s390_irgen_CHI(UChar r1, UShort i2)
3810{
3811 IRTemp op1 = newTemp(Ity_I32);
3812 Int op2;
3813
3814 assign(op1, get_gpr_w1(r1));
3815 op2 = (Int)(Short)i2;
3816 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3817 mkU32((UInt)op2)));
3818
3819 return "chi";
3820}
3821
3822static HChar *
3823s390_irgen_CGHI(UChar r1, UShort i2)
3824{
3825 IRTemp op1 = newTemp(Ity_I64);
3826 Long op2;
3827
3828 assign(op1, get_gpr_dw0(r1));
3829 op2 = (Long)(Short)i2;
3830 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3831 mkU64((ULong)op2)));
3832
3833 return "cghi";
3834}
3835
3836static HChar *
3837s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3838{
3839 IRTemp op1 = newTemp(Ity_I16);
3840 Short op2;
3841
3842 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3843 op2 = (Short)i2;
3844 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3845 mkU16((UShort)op2)));
3846
3847 return "chhsi";
3848}
3849
3850static HChar *
3851s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3852{
3853 IRTemp op1 = newTemp(Ity_I32);
3854 Int op2;
3855
3856 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3857 op2 = (Int)(Short)i2;
3858 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3859 mkU32((UInt)op2)));
3860
3861 return "chsi";
3862}
3863
3864static HChar *
3865s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3866{
3867 IRTemp op1 = newTemp(Ity_I64);
3868 Long op2;
3869
3870 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3871 op2 = (Long)(Short)i2;
3872 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3873 mkU64((ULong)op2)));
3874
3875 return "cghsi";
3876}
3877
3878static HChar *
3879s390_irgen_CHRL(UChar r1, UInt i2)
3880{
3881 IRTemp op1 = newTemp(Ity_I32);
3882 IRTemp op2 = newTemp(Ity_I32);
3883
3884 assign(op1, get_gpr_w1(r1));
3885 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3886 ((ULong)(Long)(Int)i2 << 1)))));
3887 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3888
3889 return "chrl";
3890}
3891
3892static HChar *
3893s390_irgen_CGHRL(UChar r1, UInt i2)
3894{
3895 IRTemp op1 = newTemp(Ity_I64);
3896 IRTemp op2 = newTemp(Ity_I64);
3897
3898 assign(op1, get_gpr_dw0(r1));
3899 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3900 ((ULong)(Long)(Int)i2 << 1)))));
3901 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3902
3903 return "cghrl";
3904}
3905
3906static HChar *
3907s390_irgen_CHHR(UChar r1, UChar r2)
3908{
3909 IRTemp op1 = newTemp(Ity_I32);
3910 IRTemp op2 = newTemp(Ity_I32);
3911
3912 assign(op1, get_gpr_w0(r1));
3913 assign(op2, get_gpr_w0(r2));
3914 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3915
3916 return "chhr";
3917}
3918
3919static HChar *
3920s390_irgen_CHLR(UChar r1, UChar r2)
3921{
3922 IRTemp op1 = newTemp(Ity_I32);
3923 IRTemp op2 = newTemp(Ity_I32);
3924
3925 assign(op1, get_gpr_w0(r1));
3926 assign(op2, get_gpr_w1(r2));
3927 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3928
3929 return "chlr";
3930}
3931
3932static HChar *
3933s390_irgen_CHF(UChar r1, IRTemp op2addr)
3934{
3935 IRTemp op1 = newTemp(Ity_I32);
3936 IRTemp op2 = newTemp(Ity_I32);
3937
3938 assign(op1, get_gpr_w0(r1));
3939 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3940 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3941
3942 return "chf";
3943}
3944
3945static HChar *
3946s390_irgen_CIH(UChar r1, UInt i2)
3947{
3948 IRTemp op1 = newTemp(Ity_I32);
3949 Int op2;
3950
3951 assign(op1, get_gpr_w0(r1));
3952 op2 = (Int)i2;
3953 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3954 mkU32((UInt)op2)));
3955
3956 return "cih";
3957}
3958
3959static HChar *
3960s390_irgen_CLR(UChar r1, UChar r2)
3961{
3962 IRTemp op1 = newTemp(Ity_I32);
3963 IRTemp op2 = newTemp(Ity_I32);
3964
3965 assign(op1, get_gpr_w1(r1));
3966 assign(op2, get_gpr_w1(r2));
3967 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3968
3969 return "clr";
3970}
3971
3972static HChar *
3973s390_irgen_CLGR(UChar r1, UChar r2)
3974{
3975 IRTemp op1 = newTemp(Ity_I64);
3976 IRTemp op2 = newTemp(Ity_I64);
3977
3978 assign(op1, get_gpr_dw0(r1));
3979 assign(op2, get_gpr_dw0(r2));
3980 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3981
3982 return "clgr";
3983}
3984
3985static HChar *
3986s390_irgen_CLGFR(UChar r1, UChar r2)
3987{
3988 IRTemp op1 = newTemp(Ity_I64);
3989 IRTemp op2 = newTemp(Ity_I64);
3990
3991 assign(op1, get_gpr_dw0(r1));
3992 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
3993 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3994
3995 return "clgfr";
3996}
3997
3998static HChar *
3999s390_irgen_CL(UChar r1, IRTemp op2addr)
4000{
4001 IRTemp op1 = newTemp(Ity_I32);
4002 IRTemp op2 = newTemp(Ity_I32);
4003
4004 assign(op1, get_gpr_w1(r1));
4005 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4006 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4007
4008 return "cl";
4009}
4010
4011static HChar *
4012s390_irgen_CLY(UChar r1, IRTemp op2addr)
4013{
4014 IRTemp op1 = newTemp(Ity_I32);
4015 IRTemp op2 = newTemp(Ity_I32);
4016
4017 assign(op1, get_gpr_w1(r1));
4018 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4019 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4020
4021 return "cly";
4022}
4023
4024static HChar *
4025s390_irgen_CLG(UChar r1, IRTemp op2addr)
4026{
4027 IRTemp op1 = newTemp(Ity_I64);
4028 IRTemp op2 = newTemp(Ity_I64);
4029
4030 assign(op1, get_gpr_dw0(r1));
4031 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4032 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4033
4034 return "clg";
4035}
4036
4037static HChar *
4038s390_irgen_CLGF(UChar r1, IRTemp op2addr)
4039{
4040 IRTemp op1 = newTemp(Ity_I64);
4041 IRTemp op2 = newTemp(Ity_I64);
4042
4043 assign(op1, get_gpr_dw0(r1));
4044 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
4045 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4046
4047 return "clgf";
4048}
4049
4050static HChar *
4051s390_irgen_CLFI(UChar r1, UInt i2)
4052{
4053 IRTemp op1 = newTemp(Ity_I32);
4054 UInt op2;
4055
4056 assign(op1, get_gpr_w1(r1));
4057 op2 = i2;
4058 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4059 mkU32(op2)));
4060
4061 return "clfi";
4062}
4063
4064static HChar *
4065s390_irgen_CLGFI(UChar r1, UInt i2)
4066{
4067 IRTemp op1 = newTemp(Ity_I64);
4068 ULong op2;
4069
4070 assign(op1, get_gpr_dw0(r1));
4071 op2 = (ULong)i2;
4072 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4073 mkU64(op2)));
4074
4075 return "clgfi";
4076}
4077
4078static HChar *
4079s390_irgen_CLI(UChar i2, IRTemp op1addr)
4080{
4081 IRTemp op1 = newTemp(Ity_I8);
4082 UChar op2;
4083
4084 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4085 op2 = i2;
4086 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4087 mkU8(op2)));
4088
4089 return "cli";
4090}
4091
4092static HChar *
4093s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4094{
4095 IRTemp op1 = newTemp(Ity_I8);
4096 UChar op2;
4097
4098 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4099 op2 = i2;
4100 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4101 mkU8(op2)));
4102
4103 return "cliy";
4104}
4105
4106static HChar *
4107s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4108{
4109 IRTemp op1 = newTemp(Ity_I32);
4110 UInt op2;
4111
4112 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4113 op2 = (UInt)i2;
4114 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4115 mkU32(op2)));
4116
4117 return "clfhsi";
4118}
4119
4120static HChar *
4121s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4122{
4123 IRTemp op1 = newTemp(Ity_I64);
4124 ULong op2;
4125
4126 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4127 op2 = (ULong)i2;
4128 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4129 mkU64(op2)));
4130
4131 return "clghsi";
4132}
4133
4134static HChar *
4135s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4136{
4137 IRTemp op1 = newTemp(Ity_I16);
4138 UShort op2;
4139
4140 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4141 op2 = i2;
4142 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4143 mkU16(op2)));
4144
4145 return "clhhsi";
4146}
4147
4148static HChar *
4149s390_irgen_CLRL(UChar r1, UInt i2)
4150{
4151 IRTemp op1 = newTemp(Ity_I32);
4152 IRTemp op2 = newTemp(Ity_I32);
4153
4154 assign(op1, get_gpr_w1(r1));
4155 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4156 i2 << 1))));
4157 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4158
4159 return "clrl";
4160}
4161
4162static HChar *
4163s390_irgen_CLGRL(UChar r1, UInt i2)
4164{
4165 IRTemp op1 = newTemp(Ity_I64);
4166 IRTemp op2 = newTemp(Ity_I64);
4167
4168 assign(op1, get_gpr_dw0(r1));
4169 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4170 i2 << 1))));
4171 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4172
4173 return "clgrl";
4174}
4175
4176static HChar *
4177s390_irgen_CLGFRL(UChar r1, UInt i2)
4178{
4179 IRTemp op1 = newTemp(Ity_I64);
4180 IRTemp op2 = newTemp(Ity_I64);
4181
4182 assign(op1, get_gpr_dw0(r1));
4183 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4184 ((ULong)(Long)(Int)i2 << 1)))));
4185 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4186
4187 return "clgfrl";
4188}
4189
4190static HChar *
4191s390_irgen_CLHRL(UChar r1, UInt i2)
4192{
4193 IRTemp op1 = newTemp(Ity_I32);
4194 IRTemp op2 = newTemp(Ity_I32);
4195
4196 assign(op1, get_gpr_w1(r1));
4197 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4198 ((ULong)(Long)(Int)i2 << 1)))));
4199 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4200
4201 return "clhrl";
4202}
4203
4204static HChar *
4205s390_irgen_CLGHRL(UChar r1, UInt i2)
4206{
4207 IRTemp op1 = newTemp(Ity_I64);
4208 IRTemp op2 = newTemp(Ity_I64);
4209
4210 assign(op1, get_gpr_dw0(r1));
4211 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4212 ((ULong)(Long)(Int)i2 << 1)))));
4213 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4214
4215 return "clghrl";
4216}
4217
4218static HChar *
4219s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4220{
4221 IRTemp op1 = newTemp(Ity_I32);
4222 IRTemp op2 = newTemp(Ity_I32);
sewardj2019a972011-03-07 16:04:07 +00004223 IRTemp cond = newTemp(Ity_I32);
4224
4225 if (m3 == 0) {
4226 } else {
4227 if (m3 == 14) {
4228 always_goto(mkexpr(op4addr));
4229 } else {
4230 assign(op1, get_gpr_w1(r1));
4231 assign(op2, get_gpr_w1(r2));
florianff9613f2012-05-12 15:26:44 +00004232 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE,
4233 op1, op2));
florianf321da72012-07-21 20:32:57 +00004234 if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4235 mkexpr(op4addr));
sewardj2019a972011-03-07 16:04:07 +00004236 }
4237 }
4238
4239 return "clrb";
4240}
4241
4242static HChar *
4243s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4244{
4245 IRTemp op1 = newTemp(Ity_I64);
4246 IRTemp op2 = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00004247 IRTemp cond = newTemp(Ity_I32);
4248
4249 if (m3 == 0) {
4250 } else {
4251 if (m3 == 14) {
4252 always_goto(mkexpr(op4addr));
4253 } else {
4254 assign(op1, get_gpr_dw0(r1));
4255 assign(op2, get_gpr_dw0(r2));
florianff9613f2012-05-12 15:26:44 +00004256 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE,
4257 op1, op2));
florianf321da72012-07-21 20:32:57 +00004258 if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4259 mkexpr(op4addr));
sewardj2019a972011-03-07 16:04:07 +00004260 }
4261 }
4262
4263 return "clgrb";
4264}
4265
4266static HChar *
4267s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4268{
4269 IRTemp op1 = newTemp(Ity_I32);
4270 IRTemp op2 = newTemp(Ity_I32);
sewardj2019a972011-03-07 16:04:07 +00004271 IRTemp cond = newTemp(Ity_I32);
4272
4273 if (m3 == 0) {
4274 } else {
4275 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004276 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004277 } else {
4278 assign(op1, get_gpr_w1(r1));
4279 assign(op2, get_gpr_w1(r2));
florianff9613f2012-05-12 15:26:44 +00004280 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE,
4281 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00004282 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4283 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4284
4285 }
4286 }
4287
4288 return "clrj";
4289}
4290
4291static HChar *
4292s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4293{
4294 IRTemp op1 = newTemp(Ity_I64);
4295 IRTemp op2 = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00004296 IRTemp cond = newTemp(Ity_I32);
4297
4298 if (m3 == 0) {
4299 } else {
4300 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004301 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004302 } else {
4303 assign(op1, get_gpr_dw0(r1));
4304 assign(op2, get_gpr_dw0(r2));
florianff9613f2012-05-12 15:26:44 +00004305 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE,
4306 op1, op2));
sewardj2019a972011-03-07 16:04:07 +00004307 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4308 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4309
4310 }
4311 }
4312
4313 return "clgrj";
4314}
4315
4316static HChar *
4317s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4318{
4319 IRTemp op1 = newTemp(Ity_I32);
4320 UInt op2;
sewardj2019a972011-03-07 16:04:07 +00004321 IRTemp cond = newTemp(Ity_I32);
4322
4323 if (m3 == 0) {
4324 } else {
4325 if (m3 == 14) {
4326 always_goto(mkexpr(op4addr));
4327 } else {
4328 assign(op1, get_gpr_w1(r1));
4329 op2 = (UInt)i2;
florianff9613f2012-05-12 15:26:44 +00004330 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1,
4331 mktemp(Ity_I32, mkU32(op2))));
florianf321da72012-07-21 20:32:57 +00004332 if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4333 mkexpr(op4addr));
sewardj2019a972011-03-07 16:04:07 +00004334 }
4335 }
4336
4337 return "clib";
4338}
4339
4340static HChar *
4341s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4342{
4343 IRTemp op1 = newTemp(Ity_I64);
4344 ULong op2;
sewardj2019a972011-03-07 16:04:07 +00004345 IRTemp cond = newTemp(Ity_I32);
4346
4347 if (m3 == 0) {
4348 } else {
4349 if (m3 == 14) {
4350 always_goto(mkexpr(op4addr));
4351 } else {
4352 assign(op1, get_gpr_dw0(r1));
4353 op2 = (ULong)i2;
florianff9613f2012-05-12 15:26:44 +00004354 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1,
4355 mktemp(Ity_I64, mkU64(op2))));
florianf321da72012-07-21 20:32:57 +00004356 if_condition_goto_computed(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4357 mkexpr(op4addr));
sewardj2019a972011-03-07 16:04:07 +00004358 }
4359 }
4360
4361 return "clgib";
4362}
4363
4364static HChar *
4365s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4366{
4367 IRTemp op1 = newTemp(Ity_I32);
4368 UInt op2;
sewardj2019a972011-03-07 16:04:07 +00004369 IRTemp cond = newTemp(Ity_I32);
4370
4371 if (m3 == 0) {
4372 } else {
4373 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004374 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004375 } else {
4376 assign(op1, get_gpr_w1(r1));
4377 op2 = (UInt)i2;
florianff9613f2012-05-12 15:26:44 +00004378 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1,
4379 mktemp(Ity_I32, mkU32(op2))));
sewardj2019a972011-03-07 16:04:07 +00004380 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4381 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4382
4383 }
4384 }
4385
4386 return "clij";
4387}
4388
4389static HChar *
4390s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4391{
4392 IRTemp op1 = newTemp(Ity_I64);
4393 ULong op2;
sewardj2019a972011-03-07 16:04:07 +00004394 IRTemp cond = newTemp(Ity_I32);
4395
4396 if (m3 == 0) {
4397 } else {
4398 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004399 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004400 } else {
4401 assign(op1, get_gpr_dw0(r1));
4402 op2 = (ULong)i2;
florianff9613f2012-05-12 15:26:44 +00004403 assign(cond, s390_call_calculate_icc(m3, S390_CC_OP_UNSIGNED_COMPARE, op1,
4404 mktemp(Ity_I64, mkU64(op2))));
sewardj2019a972011-03-07 16:04:07 +00004405 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4406 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4407
4408 }
4409 }
4410
4411 return "clgij";
4412}
4413
4414static HChar *
4415s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4416{
4417 IRTemp op1 = newTemp(Ity_I32);
4418 IRTemp op2 = newTemp(Ity_I32);
4419 IRTemp b0 = newTemp(Ity_I32);
4420 IRTemp b1 = newTemp(Ity_I32);
4421 IRTemp b2 = newTemp(Ity_I32);
4422 IRTemp b3 = newTemp(Ity_I32);
4423 IRTemp c0 = newTemp(Ity_I32);
4424 IRTemp c1 = newTemp(Ity_I32);
4425 IRTemp c2 = newTemp(Ity_I32);
4426 IRTemp c3 = newTemp(Ity_I32);
4427 UChar n;
4428
4429 n = 0;
4430 if ((r3 & 8) != 0) {
4431 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4432 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4433 n = n + 1;
4434 } else {
4435 assign(b0, mkU32(0));
4436 assign(c0, mkU32(0));
4437 }
4438 if ((r3 & 4) != 0) {
4439 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4440 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4441 mkU64(n)))));
4442 n = n + 1;
4443 } else {
4444 assign(b1, mkU32(0));
4445 assign(c1, mkU32(0));
4446 }
4447 if ((r3 & 2) != 0) {
4448 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4449 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4450 mkU64(n)))));
4451 n = n + 1;
4452 } else {
4453 assign(b2, mkU32(0));
4454 assign(c2, mkU32(0));
4455 }
4456 if ((r3 & 1) != 0) {
4457 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4458 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4459 mkU64(n)))));
4460 n = n + 1;
4461 } else {
4462 assign(b3, mkU32(0));
4463 assign(c3, mkU32(0));
4464 }
4465 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4466 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4467 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4468 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4469 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4470 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4471 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4472
4473 return "clm";
4474}
4475
4476static HChar *
4477s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4478{
4479 IRTemp op1 = newTemp(Ity_I32);
4480 IRTemp op2 = newTemp(Ity_I32);
4481 IRTemp b0 = newTemp(Ity_I32);
4482 IRTemp b1 = newTemp(Ity_I32);
4483 IRTemp b2 = newTemp(Ity_I32);
4484 IRTemp b3 = newTemp(Ity_I32);
4485 IRTemp c0 = newTemp(Ity_I32);
4486 IRTemp c1 = newTemp(Ity_I32);
4487 IRTemp c2 = newTemp(Ity_I32);
4488 IRTemp c3 = newTemp(Ity_I32);
4489 UChar n;
4490
4491 n = 0;
4492 if ((r3 & 8) != 0) {
4493 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4494 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4495 n = n + 1;
4496 } else {
4497 assign(b0, mkU32(0));
4498 assign(c0, mkU32(0));
4499 }
4500 if ((r3 & 4) != 0) {
4501 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4502 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4503 mkU64(n)))));
4504 n = n + 1;
4505 } else {
4506 assign(b1, mkU32(0));
4507 assign(c1, mkU32(0));
4508 }
4509 if ((r3 & 2) != 0) {
4510 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4511 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4512 mkU64(n)))));
4513 n = n + 1;
4514 } else {
4515 assign(b2, mkU32(0));
4516 assign(c2, mkU32(0));
4517 }
4518 if ((r3 & 1) != 0) {
4519 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4520 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4521 mkU64(n)))));
4522 n = n + 1;
4523 } else {
4524 assign(b3, mkU32(0));
4525 assign(c3, mkU32(0));
4526 }
4527 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4528 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4529 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4530 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4531 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4532 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4533 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4534
4535 return "clmy";
4536}
4537
4538static HChar *
4539s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4540{
4541 IRTemp op1 = newTemp(Ity_I32);
4542 IRTemp op2 = newTemp(Ity_I32);
4543 IRTemp b0 = newTemp(Ity_I32);
4544 IRTemp b1 = newTemp(Ity_I32);
4545 IRTemp b2 = newTemp(Ity_I32);
4546 IRTemp b3 = newTemp(Ity_I32);
4547 IRTemp c0 = newTemp(Ity_I32);
4548 IRTemp c1 = newTemp(Ity_I32);
4549 IRTemp c2 = newTemp(Ity_I32);
4550 IRTemp c3 = newTemp(Ity_I32);
4551 UChar n;
4552
4553 n = 0;
4554 if ((r3 & 8) != 0) {
4555 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4556 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4557 n = n + 1;
4558 } else {
4559 assign(b0, mkU32(0));
4560 assign(c0, mkU32(0));
4561 }
4562 if ((r3 & 4) != 0) {
4563 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4564 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4565 mkU64(n)))));
4566 n = n + 1;
4567 } else {
4568 assign(b1, mkU32(0));
4569 assign(c1, mkU32(0));
4570 }
4571 if ((r3 & 2) != 0) {
4572 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4573 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4574 mkU64(n)))));
4575 n = n + 1;
4576 } else {
4577 assign(b2, mkU32(0));
4578 assign(c2, mkU32(0));
4579 }
4580 if ((r3 & 1) != 0) {
4581 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4582 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4583 mkU64(n)))));
4584 n = n + 1;
4585 } else {
4586 assign(b3, mkU32(0));
4587 assign(c3, mkU32(0));
4588 }
4589 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4590 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4591 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4592 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4593 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4594 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4595 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4596
4597 return "clmh";
4598}
4599
4600static HChar *
4601s390_irgen_CLHHR(UChar r1, UChar r2)
4602{
4603 IRTemp op1 = newTemp(Ity_I32);
4604 IRTemp op2 = newTemp(Ity_I32);
4605
4606 assign(op1, get_gpr_w0(r1));
4607 assign(op2, get_gpr_w0(r2));
4608 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4609
4610 return "clhhr";
4611}
4612
4613static HChar *
4614s390_irgen_CLHLR(UChar r1, UChar r2)
4615{
4616 IRTemp op1 = newTemp(Ity_I32);
4617 IRTemp op2 = newTemp(Ity_I32);
4618
4619 assign(op1, get_gpr_w0(r1));
4620 assign(op2, get_gpr_w1(r2));
4621 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4622
4623 return "clhlr";
4624}
4625
4626static HChar *
4627s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4628{
4629 IRTemp op1 = newTemp(Ity_I32);
4630 IRTemp op2 = newTemp(Ity_I32);
4631
4632 assign(op1, get_gpr_w0(r1));
4633 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4634 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4635
4636 return "clhf";
4637}
4638
4639static HChar *
4640s390_irgen_CLIH(UChar r1, UInt i2)
4641{
4642 IRTemp op1 = newTemp(Ity_I32);
4643 UInt op2;
4644
4645 assign(op1, get_gpr_w0(r1));
4646 op2 = i2;
4647 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4648 mkU32(op2)));
4649
4650 return "clih";
4651}
4652
4653static HChar *
4654s390_irgen_CPYA(UChar r1, UChar r2)
4655{
4656 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004657 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004658 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4659
4660 return "cpya";
4661}
4662
4663static HChar *
4664s390_irgen_XR(UChar r1, UChar r2)
4665{
4666 IRTemp op1 = newTemp(Ity_I32);
4667 IRTemp op2 = newTemp(Ity_I32);
4668 IRTemp result = newTemp(Ity_I32);
4669
4670 if (r1 == r2) {
4671 assign(result, mkU32(0));
4672 } else {
4673 assign(op1, get_gpr_w1(r1));
4674 assign(op2, get_gpr_w1(r2));
4675 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4676 }
4677 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4678 put_gpr_w1(r1, mkexpr(result));
4679
4680 return "xr";
4681}
4682
4683static HChar *
4684s390_irgen_XGR(UChar r1, UChar r2)
4685{
4686 IRTemp op1 = newTemp(Ity_I64);
4687 IRTemp op2 = newTemp(Ity_I64);
4688 IRTemp result = newTemp(Ity_I64);
4689
4690 if (r1 == r2) {
4691 assign(result, mkU64(0));
4692 } else {
4693 assign(op1, get_gpr_dw0(r1));
4694 assign(op2, get_gpr_dw0(r2));
4695 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4696 }
4697 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4698 put_gpr_dw0(r1, mkexpr(result));
4699
4700 return "xgr";
4701}
4702
4703static HChar *
4704s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4705{
4706 IRTemp op2 = newTemp(Ity_I32);
4707 IRTemp op3 = newTemp(Ity_I32);
4708 IRTemp result = newTemp(Ity_I32);
4709
4710 assign(op2, get_gpr_w1(r2));
4711 assign(op3, get_gpr_w1(r3));
4712 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4713 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4714 put_gpr_w1(r1, mkexpr(result));
4715
4716 return "xrk";
4717}
4718
4719static HChar *
4720s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4721{
4722 IRTemp op2 = newTemp(Ity_I64);
4723 IRTemp op3 = newTemp(Ity_I64);
4724 IRTemp result = newTemp(Ity_I64);
4725
4726 assign(op2, get_gpr_dw0(r2));
4727 assign(op3, get_gpr_dw0(r3));
4728 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4729 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4730 put_gpr_dw0(r1, mkexpr(result));
4731
4732 return "xgrk";
4733}
4734
4735static HChar *
4736s390_irgen_X(UChar r1, IRTemp op2addr)
4737{
4738 IRTemp op1 = newTemp(Ity_I32);
4739 IRTemp op2 = newTemp(Ity_I32);
4740 IRTemp result = newTemp(Ity_I32);
4741
4742 assign(op1, get_gpr_w1(r1));
4743 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4744 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4745 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4746 put_gpr_w1(r1, mkexpr(result));
4747
4748 return "x";
4749}
4750
4751static HChar *
4752s390_irgen_XY(UChar r1, IRTemp op2addr)
4753{
4754 IRTemp op1 = newTemp(Ity_I32);
4755 IRTemp op2 = newTemp(Ity_I32);
4756 IRTemp result = newTemp(Ity_I32);
4757
4758 assign(op1, get_gpr_w1(r1));
4759 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4760 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4761 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4762 put_gpr_w1(r1, mkexpr(result));
4763
4764 return "xy";
4765}
4766
4767static HChar *
4768s390_irgen_XG(UChar r1, IRTemp op2addr)
4769{
4770 IRTemp op1 = newTemp(Ity_I64);
4771 IRTemp op2 = newTemp(Ity_I64);
4772 IRTemp result = newTemp(Ity_I64);
4773
4774 assign(op1, get_gpr_dw0(r1));
4775 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4776 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4777 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4778 put_gpr_dw0(r1, mkexpr(result));
4779
4780 return "xg";
4781}
4782
4783static HChar *
4784s390_irgen_XI(UChar i2, IRTemp op1addr)
4785{
4786 IRTemp op1 = newTemp(Ity_I8);
4787 UChar op2;
4788 IRTemp result = newTemp(Ity_I8);
4789
4790 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4791 op2 = i2;
4792 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4793 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4794 store(mkexpr(op1addr), mkexpr(result));
4795
4796 return "xi";
4797}
4798
4799static HChar *
4800s390_irgen_XIY(UChar i2, IRTemp op1addr)
4801{
4802 IRTemp op1 = newTemp(Ity_I8);
4803 UChar op2;
4804 IRTemp result = newTemp(Ity_I8);
4805
4806 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4807 op2 = i2;
4808 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4809 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4810 store(mkexpr(op1addr), mkexpr(result));
4811
4812 return "xiy";
4813}
4814
4815static HChar *
4816s390_irgen_XIHF(UChar r1, UInt i2)
4817{
4818 IRTemp op1 = newTemp(Ity_I32);
4819 UInt op2;
4820 IRTemp result = newTemp(Ity_I32);
4821
4822 assign(op1, get_gpr_w0(r1));
4823 op2 = i2;
4824 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4825 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4826 put_gpr_w0(r1, mkexpr(result));
4827
4828 return "xihf";
4829}
4830
4831static HChar *
4832s390_irgen_XILF(UChar r1, UInt i2)
4833{
4834 IRTemp op1 = newTemp(Ity_I32);
4835 UInt op2;
4836 IRTemp result = newTemp(Ity_I32);
4837
4838 assign(op1, get_gpr_w1(r1));
4839 op2 = i2;
4840 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4841 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4842 put_gpr_w1(r1, mkexpr(result));
4843
4844 return "xilf";
4845}
4846
4847static HChar *
4848s390_irgen_EAR(UChar r1, UChar r2)
4849{
4850 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004851 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004852 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4853
4854 return "ear";
4855}
4856
4857static HChar *
4858s390_irgen_IC(UChar r1, IRTemp op2addr)
4859{
4860 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4861
4862 return "ic";
4863}
4864
4865static HChar *
4866s390_irgen_ICY(UChar r1, IRTemp op2addr)
4867{
4868 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4869
4870 return "icy";
4871}
4872
4873static HChar *
4874s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4875{
4876 UChar n;
4877 IRTemp result = newTemp(Ity_I32);
4878 UInt mask;
4879
4880 n = 0;
4881 mask = (UInt)r3;
4882 if ((mask & 8) != 0) {
4883 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4884 n = n + 1;
4885 }
4886 if ((mask & 4) != 0) {
4887 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4888
4889 n = n + 1;
4890 }
4891 if ((mask & 2) != 0) {
4892 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4893
4894 n = n + 1;
4895 }
4896 if ((mask & 1) != 0) {
4897 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4898
4899 n = n + 1;
4900 }
4901 assign(result, get_gpr_w1(r1));
4902 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4903 mkU32(mask)));
4904
4905 return "icm";
4906}
4907
4908static HChar *
4909s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4910{
4911 UChar n;
4912 IRTemp result = newTemp(Ity_I32);
4913 UInt mask;
4914
4915 n = 0;
4916 mask = (UInt)r3;
4917 if ((mask & 8) != 0) {
4918 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4919 n = n + 1;
4920 }
4921 if ((mask & 4) != 0) {
4922 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4923
4924 n = n + 1;
4925 }
4926 if ((mask & 2) != 0) {
4927 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4928
4929 n = n + 1;
4930 }
4931 if ((mask & 1) != 0) {
4932 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4933
4934 n = n + 1;
4935 }
4936 assign(result, get_gpr_w1(r1));
4937 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4938 mkU32(mask)));
4939
4940 return "icmy";
4941}
4942
4943static HChar *
4944s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
4945{
4946 UChar n;
4947 IRTemp result = newTemp(Ity_I32);
4948 UInt mask;
4949
4950 n = 0;
4951 mask = (UInt)r3;
4952 if ((mask & 8) != 0) {
4953 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
4954 n = n + 1;
4955 }
4956 if ((mask & 4) != 0) {
4957 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4958
4959 n = n + 1;
4960 }
4961 if ((mask & 2) != 0) {
4962 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4963
4964 n = n + 1;
4965 }
4966 if ((mask & 1) != 0) {
4967 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4968
4969 n = n + 1;
4970 }
4971 assign(result, get_gpr_w0(r1));
4972 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4973 mkU32(mask)));
4974
4975 return "icmh";
4976}
4977
4978static HChar *
4979s390_irgen_IIHF(UChar r1, UInt i2)
4980{
4981 put_gpr_w0(r1, mkU32(i2));
4982
4983 return "iihf";
4984}
4985
4986static HChar *
4987s390_irgen_IIHH(UChar r1, UShort i2)
4988{
4989 put_gpr_hw0(r1, mkU16(i2));
4990
4991 return "iihh";
4992}
4993
4994static HChar *
4995s390_irgen_IIHL(UChar r1, UShort i2)
4996{
4997 put_gpr_hw1(r1, mkU16(i2));
4998
4999 return "iihl";
5000}
5001
5002static HChar *
5003s390_irgen_IILF(UChar r1, UInt i2)
5004{
5005 put_gpr_w1(r1, mkU32(i2));
5006
5007 return "iilf";
5008}
5009
5010static HChar *
5011s390_irgen_IILH(UChar r1, UShort i2)
5012{
5013 put_gpr_hw2(r1, mkU16(i2));
5014
5015 return "iilh";
5016}
5017
5018static HChar *
5019s390_irgen_IILL(UChar r1, UShort i2)
5020{
5021 put_gpr_hw3(r1, mkU16(i2));
5022
5023 return "iill";
5024}
5025
5026static HChar *
5027s390_irgen_LR(UChar r1, UChar r2)
5028{
5029 put_gpr_w1(r1, get_gpr_w1(r2));
5030
5031 return "lr";
5032}
5033
5034static HChar *
5035s390_irgen_LGR(UChar r1, UChar r2)
5036{
5037 put_gpr_dw0(r1, get_gpr_dw0(r2));
5038
5039 return "lgr";
5040}
5041
5042static HChar *
5043s390_irgen_LGFR(UChar r1, UChar r2)
5044{
5045 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5046
5047 return "lgfr";
5048}
5049
5050static HChar *
5051s390_irgen_L(UChar r1, IRTemp op2addr)
5052{
5053 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5054
5055 return "l";
5056}
5057
5058static HChar *
5059s390_irgen_LY(UChar r1, IRTemp op2addr)
5060{
5061 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5062
5063 return "ly";
5064}
5065
5066static HChar *
5067s390_irgen_LG(UChar r1, IRTemp op2addr)
5068{
5069 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5070
5071 return "lg";
5072}
5073
5074static HChar *
5075s390_irgen_LGF(UChar r1, IRTemp op2addr)
5076{
5077 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5078
5079 return "lgf";
5080}
5081
5082static HChar *
5083s390_irgen_LGFI(UChar r1, UInt i2)
5084{
5085 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5086
5087 return "lgfi";
5088}
5089
5090static HChar *
5091s390_irgen_LRL(UChar r1, UInt i2)
5092{
5093 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5094 i2 << 1))));
5095
5096 return "lrl";
5097}
5098
5099static HChar *
5100s390_irgen_LGRL(UChar r1, UInt i2)
5101{
5102 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5103 i2 << 1))));
5104
5105 return "lgrl";
5106}
5107
5108static HChar *
5109s390_irgen_LGFRL(UChar r1, UInt i2)
5110{
5111 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5112 ((ULong)(Long)(Int)i2 << 1)))));
5113
5114 return "lgfrl";
5115}
5116
5117static HChar *
5118s390_irgen_LA(UChar r1, IRTemp op2addr)
5119{
5120 put_gpr_dw0(r1, mkexpr(op2addr));
5121
5122 return "la";
5123}
5124
5125static HChar *
5126s390_irgen_LAY(UChar r1, IRTemp op2addr)
5127{
5128 put_gpr_dw0(r1, mkexpr(op2addr));
5129
5130 return "lay";
5131}
5132
5133static HChar *
5134s390_irgen_LAE(UChar r1, IRTemp op2addr)
5135{
5136 put_gpr_dw0(r1, mkexpr(op2addr));
5137
5138 return "lae";
5139}
5140
5141static HChar *
5142s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5143{
5144 put_gpr_dw0(r1, mkexpr(op2addr));
5145
5146 return "laey";
5147}
5148
5149static HChar *
5150s390_irgen_LARL(UChar r1, UInt i2)
5151{
5152 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5153
5154 return "larl";
5155}
5156
5157static HChar *
5158s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5159{
5160 IRTemp op2 = newTemp(Ity_I32);
5161 IRTemp op3 = newTemp(Ity_I32);
5162 IRTemp result = newTemp(Ity_I32);
5163
5164 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5165 assign(op3, get_gpr_w1(r3));
5166 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5167 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5168 store(mkexpr(op2addr), mkexpr(result));
5169 put_gpr_w1(r1, mkexpr(op2));
5170
5171 return "laa";
5172}
5173
5174static HChar *
5175s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5176{
5177 IRTemp op2 = newTemp(Ity_I64);
5178 IRTemp op3 = newTemp(Ity_I64);
5179 IRTemp result = newTemp(Ity_I64);
5180
5181 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5182 assign(op3, get_gpr_dw0(r3));
5183 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5184 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5185 store(mkexpr(op2addr), mkexpr(result));
5186 put_gpr_dw0(r1, mkexpr(op2));
5187
5188 return "laag";
5189}
5190
5191static HChar *
5192s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5193{
5194 IRTemp op2 = newTemp(Ity_I32);
5195 IRTemp op3 = newTemp(Ity_I32);
5196 IRTemp result = newTemp(Ity_I32);
5197
5198 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5199 assign(op3, get_gpr_w1(r3));
5200 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5201 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5202 store(mkexpr(op2addr), mkexpr(result));
5203 put_gpr_w1(r1, mkexpr(op2));
5204
5205 return "laal";
5206}
5207
5208static HChar *
5209s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5210{
5211 IRTemp op2 = newTemp(Ity_I64);
5212 IRTemp op3 = newTemp(Ity_I64);
5213 IRTemp result = newTemp(Ity_I64);
5214
5215 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5216 assign(op3, get_gpr_dw0(r3));
5217 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5218 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5219 store(mkexpr(op2addr), mkexpr(result));
5220 put_gpr_dw0(r1, mkexpr(op2));
5221
5222 return "laalg";
5223}
5224
5225static HChar *
5226s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5227{
5228 IRTemp op2 = newTemp(Ity_I32);
5229 IRTemp op3 = newTemp(Ity_I32);
5230 IRTemp result = newTemp(Ity_I32);
5231
5232 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5233 assign(op3, get_gpr_w1(r3));
5234 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5235 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5236 store(mkexpr(op2addr), mkexpr(result));
5237 put_gpr_w1(r1, mkexpr(op2));
5238
5239 return "lan";
5240}
5241
5242static HChar *
5243s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5244{
5245 IRTemp op2 = newTemp(Ity_I64);
5246 IRTemp op3 = newTemp(Ity_I64);
5247 IRTemp result = newTemp(Ity_I64);
5248
5249 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5250 assign(op3, get_gpr_dw0(r3));
5251 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5252 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5253 store(mkexpr(op2addr), mkexpr(result));
5254 put_gpr_dw0(r1, mkexpr(op2));
5255
5256 return "lang";
5257}
5258
5259static HChar *
5260s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5261{
5262 IRTemp op2 = newTemp(Ity_I32);
5263 IRTemp op3 = newTemp(Ity_I32);
5264 IRTemp result = newTemp(Ity_I32);
5265
5266 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5267 assign(op3, get_gpr_w1(r3));
5268 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5269 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5270 store(mkexpr(op2addr), mkexpr(result));
5271 put_gpr_w1(r1, mkexpr(op2));
5272
5273 return "lax";
5274}
5275
5276static HChar *
5277s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5278{
5279 IRTemp op2 = newTemp(Ity_I64);
5280 IRTemp op3 = newTemp(Ity_I64);
5281 IRTemp result = newTemp(Ity_I64);
5282
5283 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5284 assign(op3, get_gpr_dw0(r3));
5285 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5286 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5287 store(mkexpr(op2addr), mkexpr(result));
5288 put_gpr_dw0(r1, mkexpr(op2));
5289
5290 return "laxg";
5291}
5292
5293static HChar *
5294s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5295{
5296 IRTemp op2 = newTemp(Ity_I32);
5297 IRTemp op3 = newTemp(Ity_I32);
5298 IRTemp result = newTemp(Ity_I32);
5299
5300 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5301 assign(op3, get_gpr_w1(r3));
5302 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5303 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5304 store(mkexpr(op2addr), mkexpr(result));
5305 put_gpr_w1(r1, mkexpr(op2));
5306
5307 return "lao";
5308}
5309
5310static HChar *
5311s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5312{
5313 IRTemp op2 = newTemp(Ity_I64);
5314 IRTemp op3 = newTemp(Ity_I64);
5315 IRTemp result = newTemp(Ity_I64);
5316
5317 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5318 assign(op3, get_gpr_dw0(r3));
5319 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5320 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5321 store(mkexpr(op2addr), mkexpr(result));
5322 put_gpr_dw0(r1, mkexpr(op2));
5323
5324 return "laog";
5325}
5326
5327static HChar *
5328s390_irgen_LTR(UChar r1, UChar r2)
5329{
5330 IRTemp op2 = newTemp(Ity_I32);
5331
5332 assign(op2, get_gpr_w1(r2));
5333 put_gpr_w1(r1, mkexpr(op2));
5334 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5335
5336 return "ltr";
5337}
5338
5339static HChar *
5340s390_irgen_LTGR(UChar r1, UChar r2)
5341{
5342 IRTemp op2 = newTemp(Ity_I64);
5343
5344 assign(op2, get_gpr_dw0(r2));
5345 put_gpr_dw0(r1, mkexpr(op2));
5346 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5347
5348 return "ltgr";
5349}
5350
5351static HChar *
5352s390_irgen_LTGFR(UChar r1, UChar r2)
5353{
5354 IRTemp op2 = newTemp(Ity_I64);
5355
5356 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5357 put_gpr_dw0(r1, mkexpr(op2));
5358 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5359
5360 return "ltgfr";
5361}
5362
5363static HChar *
5364s390_irgen_LT(UChar r1, IRTemp op2addr)
5365{
5366 IRTemp op2 = newTemp(Ity_I32);
5367
5368 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5369 put_gpr_w1(r1, mkexpr(op2));
5370 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5371
5372 return "lt";
5373}
5374
5375static HChar *
5376s390_irgen_LTG(UChar r1, IRTemp op2addr)
5377{
5378 IRTemp op2 = newTemp(Ity_I64);
5379
5380 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5381 put_gpr_dw0(r1, mkexpr(op2));
5382 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5383
5384 return "ltg";
5385}
5386
5387static HChar *
5388s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5389{
5390 IRTemp op2 = newTemp(Ity_I64);
5391
5392 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5393 put_gpr_dw0(r1, mkexpr(op2));
5394 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5395
5396 return "ltgf";
5397}
5398
5399static HChar *
5400s390_irgen_LBR(UChar r1, UChar r2)
5401{
5402 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5403
5404 return "lbr";
5405}
5406
5407static HChar *
5408s390_irgen_LGBR(UChar r1, UChar r2)
5409{
5410 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5411
5412 return "lgbr";
5413}
5414
5415static HChar *
5416s390_irgen_LB(UChar r1, IRTemp op2addr)
5417{
5418 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5419
5420 return "lb";
5421}
5422
5423static HChar *
5424s390_irgen_LGB(UChar r1, IRTemp op2addr)
5425{
5426 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5427
5428 return "lgb";
5429}
5430
5431static HChar *
5432s390_irgen_LBH(UChar r1, IRTemp op2addr)
5433{
5434 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5435
5436 return "lbh";
5437}
5438
5439static HChar *
5440s390_irgen_LCR(UChar r1, UChar r2)
5441{
5442 Int op1;
5443 IRTemp op2 = newTemp(Ity_I32);
5444 IRTemp result = newTemp(Ity_I32);
5445
5446 op1 = 0;
5447 assign(op2, get_gpr_w1(r2));
5448 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5449 put_gpr_w1(r1, mkexpr(result));
5450 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5451 op1)), op2);
5452
5453 return "lcr";
5454}
5455
5456static HChar *
5457s390_irgen_LCGR(UChar r1, UChar r2)
5458{
5459 Long op1;
5460 IRTemp op2 = newTemp(Ity_I64);
5461 IRTemp result = newTemp(Ity_I64);
5462
5463 op1 = 0ULL;
5464 assign(op2, get_gpr_dw0(r2));
5465 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5466 put_gpr_dw0(r1, mkexpr(result));
5467 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5468 op1)), op2);
5469
5470 return "lcgr";
5471}
5472
5473static HChar *
5474s390_irgen_LCGFR(UChar r1, UChar r2)
5475{
5476 Long op1;
5477 IRTemp op2 = newTemp(Ity_I64);
5478 IRTemp result = newTemp(Ity_I64);
5479
5480 op1 = 0ULL;
5481 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5482 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5483 put_gpr_dw0(r1, mkexpr(result));
5484 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5485 op1)), op2);
5486
5487 return "lcgfr";
5488}
5489
5490static HChar *
5491s390_irgen_LHR(UChar r1, UChar r2)
5492{
5493 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5494
5495 return "lhr";
5496}
5497
5498static HChar *
5499s390_irgen_LGHR(UChar r1, UChar r2)
5500{
5501 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5502
5503 return "lghr";
5504}
5505
5506static HChar *
5507s390_irgen_LH(UChar r1, IRTemp op2addr)
5508{
5509 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5510
5511 return "lh";
5512}
5513
5514static HChar *
5515s390_irgen_LHY(UChar r1, IRTemp op2addr)
5516{
5517 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5518
5519 return "lhy";
5520}
5521
5522static HChar *
5523s390_irgen_LGH(UChar r1, IRTemp op2addr)
5524{
5525 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5526
5527 return "lgh";
5528}
5529
5530static HChar *
5531s390_irgen_LHI(UChar r1, UShort i2)
5532{
5533 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5534
5535 return "lhi";
5536}
5537
5538static HChar *
5539s390_irgen_LGHI(UChar r1, UShort i2)
5540{
5541 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5542
5543 return "lghi";
5544}
5545
5546static HChar *
5547s390_irgen_LHRL(UChar r1, UInt i2)
5548{
5549 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5550 ((ULong)(Long)(Int)i2 << 1)))));
5551
5552 return "lhrl";
5553}
5554
5555static HChar *
5556s390_irgen_LGHRL(UChar r1, UInt i2)
5557{
5558 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5559 ((ULong)(Long)(Int)i2 << 1)))));
5560
5561 return "lghrl";
5562}
5563
5564static HChar *
5565s390_irgen_LHH(UChar r1, IRTemp op2addr)
5566{
5567 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5568
5569 return "lhh";
5570}
5571
5572static HChar *
5573s390_irgen_LFH(UChar r1, IRTemp op2addr)
5574{
5575 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5576
5577 return "lfh";
5578}
5579
5580static HChar *
5581s390_irgen_LLGFR(UChar r1, UChar r2)
5582{
5583 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5584
5585 return "llgfr";
5586}
5587
5588static HChar *
5589s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5590{
5591 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5592
5593 return "llgf";
5594}
5595
5596static HChar *
5597s390_irgen_LLGFRL(UChar r1, UInt i2)
5598{
5599 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5600 ((ULong)(Long)(Int)i2 << 1)))));
5601
5602 return "llgfrl";
5603}
5604
5605static HChar *
5606s390_irgen_LLCR(UChar r1, UChar r2)
5607{
5608 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5609
5610 return "llcr";
5611}
5612
5613static HChar *
5614s390_irgen_LLGCR(UChar r1, UChar r2)
5615{
5616 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5617
5618 return "llgcr";
5619}
5620
5621static HChar *
5622s390_irgen_LLC(UChar r1, IRTemp op2addr)
5623{
5624 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5625
5626 return "llc";
5627}
5628
5629static HChar *
5630s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5631{
5632 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5633
5634 return "llgc";
5635}
5636
5637static HChar *
5638s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5639{
5640 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5641
5642 return "llch";
5643}
5644
5645static HChar *
5646s390_irgen_LLHR(UChar r1, UChar r2)
5647{
5648 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5649
5650 return "llhr";
5651}
5652
5653static HChar *
5654s390_irgen_LLGHR(UChar r1, UChar r2)
5655{
5656 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5657
5658 return "llghr";
5659}
5660
5661static HChar *
5662s390_irgen_LLH(UChar r1, IRTemp op2addr)
5663{
5664 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5665
5666 return "llh";
5667}
5668
5669static HChar *
5670s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5671{
5672 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5673
5674 return "llgh";
5675}
5676
5677static HChar *
5678s390_irgen_LLHRL(UChar r1, UInt i2)
5679{
5680 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5681 ((ULong)(Long)(Int)i2 << 1)))));
5682
5683 return "llhrl";
5684}
5685
5686static HChar *
5687s390_irgen_LLGHRL(UChar r1, UInt i2)
5688{
5689 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5690 ((ULong)(Long)(Int)i2 << 1)))));
5691
5692 return "llghrl";
5693}
5694
5695static HChar *
5696s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5697{
5698 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5699
5700 return "llhh";
5701}
5702
5703static HChar *
5704s390_irgen_LLIHF(UChar r1, UInt i2)
5705{
5706 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5707
5708 return "llihf";
5709}
5710
5711static HChar *
5712s390_irgen_LLIHH(UChar r1, UShort i2)
5713{
5714 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5715
5716 return "llihh";
5717}
5718
5719static HChar *
5720s390_irgen_LLIHL(UChar r1, UShort i2)
5721{
5722 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5723
5724 return "llihl";
5725}
5726
5727static HChar *
5728s390_irgen_LLILF(UChar r1, UInt i2)
5729{
5730 put_gpr_dw0(r1, mkU64(i2));
5731
5732 return "llilf";
5733}
5734
5735static HChar *
5736s390_irgen_LLILH(UChar r1, UShort i2)
5737{
5738 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5739
5740 return "llilh";
5741}
5742
5743static HChar *
5744s390_irgen_LLILL(UChar r1, UShort i2)
5745{
5746 put_gpr_dw0(r1, mkU64(i2));
5747
5748 return "llill";
5749}
5750
5751static HChar *
5752s390_irgen_LLGTR(UChar r1, UChar r2)
5753{
5754 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5755 mkU32(2147483647))));
5756
5757 return "llgtr";
5758}
5759
5760static HChar *
5761s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5762{
5763 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5764 mkexpr(op2addr)), mkU32(2147483647))));
5765
5766 return "llgt";
5767}
5768
5769static HChar *
5770s390_irgen_LNR(UChar r1, UChar r2)
5771{
5772 IRTemp op2 = newTemp(Ity_I32);
5773 IRTemp result = newTemp(Ity_I32);
5774
5775 assign(op2, get_gpr_w1(r2));
5776 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5777 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5778 put_gpr_w1(r1, mkexpr(result));
5779 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5780
5781 return "lnr";
5782}
5783
5784static HChar *
5785s390_irgen_LNGR(UChar r1, UChar r2)
5786{
5787 IRTemp op2 = newTemp(Ity_I64);
5788 IRTemp result = newTemp(Ity_I64);
5789
5790 assign(op2, get_gpr_dw0(r2));
5791 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5792 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5793 put_gpr_dw0(r1, mkexpr(result));
5794 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5795
5796 return "lngr";
5797}
5798
5799static HChar *
5800s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5801{
5802 IRTemp op2 = newTemp(Ity_I64);
5803 IRTemp result = newTemp(Ity_I64);
5804
5805 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5806 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5807 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5808 put_gpr_dw0(r1, mkexpr(result));
5809 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5810
5811 return "lngfr";
5812}
5813
5814static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005815s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5816{
5817 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5818 guest_IA_next_instr);
5819 put_gpr_w1(r1, get_gpr_w1(r2));
florianf9e1ed72012-04-17 02:41:56 +00005820 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00005821
5822 return "locr";
5823}
5824
5825static HChar *
5826s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5827{
5828 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5829 guest_IA_next_instr);
5830 put_gpr_dw0(r1, get_gpr_dw0(r2));
florianf9e1ed72012-04-17 02:41:56 +00005831 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00005832
5833 return "locgr";
5834}
5835
5836static HChar *
5837s390_irgen_LOC(UChar r1, IRTemp op2addr)
5838{
5839 /* condition is checked in format handler */
5840 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5841
5842 return "loc";
5843}
5844
5845static HChar *
5846s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5847{
5848 /* condition is checked in format handler */
5849 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5850
5851 return "locg";
5852}
5853
5854static HChar *
sewardj2019a972011-03-07 16:04:07 +00005855s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5856{
5857 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5858 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5859 ));
5860
5861 return "lpq";
5862}
5863
5864static HChar *
5865s390_irgen_LPR(UChar r1, UChar r2)
5866{
5867 IRTemp op2 = newTemp(Ity_I32);
5868 IRTemp result = newTemp(Ity_I32);
5869
5870 assign(op2, get_gpr_w1(r2));
5871 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5872 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5873 put_gpr_w1(r1, mkexpr(result));
5874 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5875
5876 return "lpr";
5877}
5878
5879static HChar *
5880s390_irgen_LPGR(UChar r1, UChar r2)
5881{
5882 IRTemp op2 = newTemp(Ity_I64);
5883 IRTemp result = newTemp(Ity_I64);
5884
5885 assign(op2, get_gpr_dw0(r2));
5886 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5887 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5888 put_gpr_dw0(r1, mkexpr(result));
5889 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5890
5891 return "lpgr";
5892}
5893
5894static HChar *
5895s390_irgen_LPGFR(UChar r1, UChar r2)
5896{
5897 IRTemp op2 = newTemp(Ity_I64);
5898 IRTemp result = newTemp(Ity_I64);
5899
5900 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5901 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5902 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5903 put_gpr_dw0(r1, mkexpr(result));
5904 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5905
5906 return "lpgfr";
5907}
5908
5909static HChar *
5910s390_irgen_LRVR(UChar r1, UChar r2)
5911{
5912 IRTemp b0 = newTemp(Ity_I8);
5913 IRTemp b1 = newTemp(Ity_I8);
5914 IRTemp b2 = newTemp(Ity_I8);
5915 IRTemp b3 = newTemp(Ity_I8);
5916
5917 assign(b3, get_gpr_b7(r2));
5918 assign(b2, get_gpr_b6(r2));
5919 assign(b1, get_gpr_b5(r2));
5920 assign(b0, get_gpr_b4(r2));
5921 put_gpr_b4(r1, mkexpr(b3));
5922 put_gpr_b5(r1, mkexpr(b2));
5923 put_gpr_b6(r1, mkexpr(b1));
5924 put_gpr_b7(r1, mkexpr(b0));
5925
5926 return "lrvr";
5927}
5928
5929static HChar *
5930s390_irgen_LRVGR(UChar r1, UChar r2)
5931{
5932 IRTemp b0 = newTemp(Ity_I8);
5933 IRTemp b1 = newTemp(Ity_I8);
5934 IRTemp b2 = newTemp(Ity_I8);
5935 IRTemp b3 = newTemp(Ity_I8);
5936 IRTemp b4 = newTemp(Ity_I8);
5937 IRTemp b5 = newTemp(Ity_I8);
5938 IRTemp b6 = newTemp(Ity_I8);
5939 IRTemp b7 = newTemp(Ity_I8);
5940
5941 assign(b7, get_gpr_b7(r2));
5942 assign(b6, get_gpr_b6(r2));
5943 assign(b5, get_gpr_b5(r2));
5944 assign(b4, get_gpr_b4(r2));
5945 assign(b3, get_gpr_b3(r2));
5946 assign(b2, get_gpr_b2(r2));
5947 assign(b1, get_gpr_b1(r2));
5948 assign(b0, get_gpr_b0(r2));
5949 put_gpr_b0(r1, mkexpr(b7));
5950 put_gpr_b1(r1, mkexpr(b6));
5951 put_gpr_b2(r1, mkexpr(b5));
5952 put_gpr_b3(r1, mkexpr(b4));
5953 put_gpr_b4(r1, mkexpr(b3));
5954 put_gpr_b5(r1, mkexpr(b2));
5955 put_gpr_b6(r1, mkexpr(b1));
5956 put_gpr_b7(r1, mkexpr(b0));
5957
5958 return "lrvgr";
5959}
5960
5961static HChar *
5962s390_irgen_LRVH(UChar r1, IRTemp op2addr)
5963{
5964 IRTemp op2 = newTemp(Ity_I16);
5965
5966 assign(op2, load(Ity_I16, mkexpr(op2addr)));
5967 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
5968 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
5969
5970 return "lrvh";
5971}
5972
5973static HChar *
5974s390_irgen_LRV(UChar r1, IRTemp op2addr)
5975{
5976 IRTemp op2 = newTemp(Ity_I32);
5977
5978 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5979 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
5980 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5981 mkU8(8)), mkU32(255))));
5982 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5983 mkU8(16)), mkU32(255))));
5984 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5985 mkU8(24)), mkU32(255))));
5986
5987 return "lrv";
5988}
5989
5990static HChar *
5991s390_irgen_LRVG(UChar r1, IRTemp op2addr)
5992{
5993 IRTemp op2 = newTemp(Ity_I64);
5994
5995 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5996 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
5997 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5998 mkU8(8)), mkU64(255))));
5999 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6000 mkU8(16)), mkU64(255))));
6001 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6002 mkU8(24)), mkU64(255))));
6003 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6004 mkU8(32)), mkU64(255))));
6005 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6006 mkU8(40)), mkU64(255))));
6007 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6008 mkU8(48)), mkU64(255))));
6009 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6010 mkU8(56)), mkU64(255))));
6011
6012 return "lrvg";
6013}
6014
6015static HChar *
6016s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
6017{
6018 store(mkexpr(op1addr), mkU16(i2));
6019
6020 return "mvhhi";
6021}
6022
6023static HChar *
6024s390_irgen_MVHI(UShort i2, IRTemp op1addr)
6025{
6026 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6027
6028 return "mvhi";
6029}
6030
6031static HChar *
6032s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6033{
6034 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6035
6036 return "mvghi";
6037}
6038
6039static HChar *
6040s390_irgen_MVI(UChar i2, IRTemp op1addr)
6041{
6042 store(mkexpr(op1addr), mkU8(i2));
6043
6044 return "mvi";
6045}
6046
6047static HChar *
6048s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6049{
6050 store(mkexpr(op1addr), mkU8(i2));
6051
6052 return "mviy";
6053}
6054
6055static HChar *
6056s390_irgen_MR(UChar r1, UChar r2)
6057{
6058 IRTemp op1 = newTemp(Ity_I32);
6059 IRTemp op2 = newTemp(Ity_I32);
6060 IRTemp result = newTemp(Ity_I64);
6061
6062 assign(op1, get_gpr_w1(r1 + 1));
6063 assign(op2, get_gpr_w1(r2));
6064 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6065 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6066 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6067
6068 return "mr";
6069}
6070
6071static HChar *
6072s390_irgen_M(UChar r1, IRTemp op2addr)
6073{
6074 IRTemp op1 = newTemp(Ity_I32);
6075 IRTemp op2 = newTemp(Ity_I32);
6076 IRTemp result = newTemp(Ity_I64);
6077
6078 assign(op1, get_gpr_w1(r1 + 1));
6079 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6080 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6081 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6082 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6083
6084 return "m";
6085}
6086
6087static HChar *
6088s390_irgen_MFY(UChar r1, IRTemp op2addr)
6089{
6090 IRTemp op1 = newTemp(Ity_I32);
6091 IRTemp op2 = newTemp(Ity_I32);
6092 IRTemp result = newTemp(Ity_I64);
6093
6094 assign(op1, get_gpr_w1(r1 + 1));
6095 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6096 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6097 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6098 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6099
6100 return "mfy";
6101}
6102
6103static HChar *
6104s390_irgen_MH(UChar r1, IRTemp op2addr)
6105{
6106 IRTemp op1 = newTemp(Ity_I32);
6107 IRTemp op2 = newTemp(Ity_I16);
6108 IRTemp result = newTemp(Ity_I64);
6109
6110 assign(op1, get_gpr_w1(r1));
6111 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6112 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6113 ));
6114 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6115
6116 return "mh";
6117}
6118
6119static HChar *
6120s390_irgen_MHY(UChar r1, IRTemp op2addr)
6121{
6122 IRTemp op1 = newTemp(Ity_I32);
6123 IRTemp op2 = newTemp(Ity_I16);
6124 IRTemp result = newTemp(Ity_I64);
6125
6126 assign(op1, get_gpr_w1(r1));
6127 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6128 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6129 ));
6130 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6131
6132 return "mhy";
6133}
6134
6135static HChar *
6136s390_irgen_MHI(UChar r1, UShort i2)
6137{
6138 IRTemp op1 = newTemp(Ity_I32);
6139 Short op2;
6140 IRTemp result = newTemp(Ity_I64);
6141
6142 assign(op1, get_gpr_w1(r1));
6143 op2 = (Short)i2;
6144 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6145 mkU16((UShort)op2))));
6146 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6147
6148 return "mhi";
6149}
6150
6151static HChar *
6152s390_irgen_MGHI(UChar r1, UShort i2)
6153{
6154 IRTemp op1 = newTemp(Ity_I64);
6155 Short op2;
6156 IRTemp result = newTemp(Ity_I128);
6157
6158 assign(op1, get_gpr_dw0(r1));
6159 op2 = (Short)i2;
6160 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6161 mkU16((UShort)op2))));
6162 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6163
6164 return "mghi";
6165}
6166
6167static HChar *
6168s390_irgen_MLR(UChar r1, UChar r2)
6169{
6170 IRTemp op1 = newTemp(Ity_I32);
6171 IRTemp op2 = newTemp(Ity_I32);
6172 IRTemp result = newTemp(Ity_I64);
6173
6174 assign(op1, get_gpr_w1(r1 + 1));
6175 assign(op2, get_gpr_w1(r2));
6176 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6177 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6178 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6179
6180 return "mlr";
6181}
6182
6183static HChar *
6184s390_irgen_MLGR(UChar r1, UChar r2)
6185{
6186 IRTemp op1 = newTemp(Ity_I64);
6187 IRTemp op2 = newTemp(Ity_I64);
6188 IRTemp result = newTemp(Ity_I128);
6189
6190 assign(op1, get_gpr_dw0(r1 + 1));
6191 assign(op2, get_gpr_dw0(r2));
6192 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6193 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6194 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6195
6196 return "mlgr";
6197}
6198
6199static HChar *
6200s390_irgen_ML(UChar r1, IRTemp op2addr)
6201{
6202 IRTemp op1 = newTemp(Ity_I32);
6203 IRTemp op2 = newTemp(Ity_I32);
6204 IRTemp result = newTemp(Ity_I64);
6205
6206 assign(op1, get_gpr_w1(r1 + 1));
6207 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6208 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6209 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6210 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6211
6212 return "ml";
6213}
6214
6215static HChar *
6216s390_irgen_MLG(UChar r1, IRTemp op2addr)
6217{
6218 IRTemp op1 = newTemp(Ity_I64);
6219 IRTemp op2 = newTemp(Ity_I64);
6220 IRTemp result = newTemp(Ity_I128);
6221
6222 assign(op1, get_gpr_dw0(r1 + 1));
6223 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6224 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6225 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6226 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6227
6228 return "mlg";
6229}
6230
6231static HChar *
6232s390_irgen_MSR(UChar r1, UChar r2)
6233{
6234 IRTemp op1 = newTemp(Ity_I32);
6235 IRTemp op2 = newTemp(Ity_I32);
6236 IRTemp result = newTemp(Ity_I64);
6237
6238 assign(op1, get_gpr_w1(r1));
6239 assign(op2, get_gpr_w1(r2));
6240 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6241 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6242
6243 return "msr";
6244}
6245
6246static HChar *
6247s390_irgen_MSGR(UChar r1, UChar r2)
6248{
6249 IRTemp op1 = newTemp(Ity_I64);
6250 IRTemp op2 = newTemp(Ity_I64);
6251 IRTemp result = newTemp(Ity_I128);
6252
6253 assign(op1, get_gpr_dw0(r1));
6254 assign(op2, get_gpr_dw0(r2));
6255 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6256 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6257
6258 return "msgr";
6259}
6260
6261static HChar *
6262s390_irgen_MSGFR(UChar r1, UChar r2)
6263{
6264 IRTemp op1 = newTemp(Ity_I64);
6265 IRTemp op2 = newTemp(Ity_I32);
6266 IRTemp result = newTemp(Ity_I128);
6267
6268 assign(op1, get_gpr_dw0(r1));
6269 assign(op2, get_gpr_w1(r2));
6270 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6271 ));
6272 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6273
6274 return "msgfr";
6275}
6276
6277static HChar *
6278s390_irgen_MS(UChar r1, IRTemp op2addr)
6279{
6280 IRTemp op1 = newTemp(Ity_I32);
6281 IRTemp op2 = newTemp(Ity_I32);
6282 IRTemp result = newTemp(Ity_I64);
6283
6284 assign(op1, get_gpr_w1(r1));
6285 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6286 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6287 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6288
6289 return "ms";
6290}
6291
6292static HChar *
6293s390_irgen_MSY(UChar r1, IRTemp op2addr)
6294{
6295 IRTemp op1 = newTemp(Ity_I32);
6296 IRTemp op2 = newTemp(Ity_I32);
6297 IRTemp result = newTemp(Ity_I64);
6298
6299 assign(op1, get_gpr_w1(r1));
6300 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6301 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6302 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6303
6304 return "msy";
6305}
6306
6307static HChar *
6308s390_irgen_MSG(UChar r1, IRTemp op2addr)
6309{
6310 IRTemp op1 = newTemp(Ity_I64);
6311 IRTemp op2 = newTemp(Ity_I64);
6312 IRTemp result = newTemp(Ity_I128);
6313
6314 assign(op1, get_gpr_dw0(r1));
6315 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6316 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6317 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6318
6319 return "msg";
6320}
6321
6322static HChar *
6323s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6324{
6325 IRTemp op1 = newTemp(Ity_I64);
6326 IRTemp op2 = newTemp(Ity_I32);
6327 IRTemp result = newTemp(Ity_I128);
6328
6329 assign(op1, get_gpr_dw0(r1));
6330 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6331 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6332 ));
6333 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6334
6335 return "msgf";
6336}
6337
6338static HChar *
6339s390_irgen_MSFI(UChar r1, UInt i2)
6340{
6341 IRTemp op1 = newTemp(Ity_I32);
6342 Int op2;
6343 IRTemp result = newTemp(Ity_I64);
6344
6345 assign(op1, get_gpr_w1(r1));
6346 op2 = (Int)i2;
6347 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6348 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6349
6350 return "msfi";
6351}
6352
6353static HChar *
6354s390_irgen_MSGFI(UChar r1, UInt i2)
6355{
6356 IRTemp op1 = newTemp(Ity_I64);
6357 Int op2;
6358 IRTemp result = newTemp(Ity_I128);
6359
6360 assign(op1, get_gpr_dw0(r1));
6361 op2 = (Int)i2;
6362 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6363 op2))));
6364 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6365
6366 return "msgfi";
6367}
6368
6369static HChar *
6370s390_irgen_OR(UChar r1, UChar r2)
6371{
6372 IRTemp op1 = newTemp(Ity_I32);
6373 IRTemp op2 = newTemp(Ity_I32);
6374 IRTemp result = newTemp(Ity_I32);
6375
6376 assign(op1, get_gpr_w1(r1));
6377 assign(op2, get_gpr_w1(r2));
6378 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6379 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6380 put_gpr_w1(r1, mkexpr(result));
6381
6382 return "or";
6383}
6384
6385static HChar *
6386s390_irgen_OGR(UChar r1, UChar r2)
6387{
6388 IRTemp op1 = newTemp(Ity_I64);
6389 IRTemp op2 = newTemp(Ity_I64);
6390 IRTemp result = newTemp(Ity_I64);
6391
6392 assign(op1, get_gpr_dw0(r1));
6393 assign(op2, get_gpr_dw0(r2));
6394 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6395 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6396 put_gpr_dw0(r1, mkexpr(result));
6397
6398 return "ogr";
6399}
6400
6401static HChar *
6402s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6403{
6404 IRTemp op2 = newTemp(Ity_I32);
6405 IRTemp op3 = newTemp(Ity_I32);
6406 IRTemp result = newTemp(Ity_I32);
6407
6408 assign(op2, get_gpr_w1(r2));
6409 assign(op3, get_gpr_w1(r3));
6410 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6411 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6412 put_gpr_w1(r1, mkexpr(result));
6413
6414 return "ork";
6415}
6416
6417static HChar *
6418s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6419{
6420 IRTemp op2 = newTemp(Ity_I64);
6421 IRTemp op3 = newTemp(Ity_I64);
6422 IRTemp result = newTemp(Ity_I64);
6423
6424 assign(op2, get_gpr_dw0(r2));
6425 assign(op3, get_gpr_dw0(r3));
6426 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6427 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6428 put_gpr_dw0(r1, mkexpr(result));
6429
6430 return "ogrk";
6431}
6432
6433static HChar *
6434s390_irgen_O(UChar r1, IRTemp op2addr)
6435{
6436 IRTemp op1 = newTemp(Ity_I32);
6437 IRTemp op2 = newTemp(Ity_I32);
6438 IRTemp result = newTemp(Ity_I32);
6439
6440 assign(op1, get_gpr_w1(r1));
6441 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6442 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6443 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6444 put_gpr_w1(r1, mkexpr(result));
6445
6446 return "o";
6447}
6448
6449static HChar *
6450s390_irgen_OY(UChar r1, IRTemp op2addr)
6451{
6452 IRTemp op1 = newTemp(Ity_I32);
6453 IRTemp op2 = newTemp(Ity_I32);
6454 IRTemp result = newTemp(Ity_I32);
6455
6456 assign(op1, get_gpr_w1(r1));
6457 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6458 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6459 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6460 put_gpr_w1(r1, mkexpr(result));
6461
6462 return "oy";
6463}
6464
6465static HChar *
6466s390_irgen_OG(UChar r1, IRTemp op2addr)
6467{
6468 IRTemp op1 = newTemp(Ity_I64);
6469 IRTemp op2 = newTemp(Ity_I64);
6470 IRTemp result = newTemp(Ity_I64);
6471
6472 assign(op1, get_gpr_dw0(r1));
6473 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6474 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6475 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6476 put_gpr_dw0(r1, mkexpr(result));
6477
6478 return "og";
6479}
6480
6481static HChar *
6482s390_irgen_OI(UChar i2, IRTemp op1addr)
6483{
6484 IRTemp op1 = newTemp(Ity_I8);
6485 UChar op2;
6486 IRTemp result = newTemp(Ity_I8);
6487
6488 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6489 op2 = i2;
6490 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6491 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6492 store(mkexpr(op1addr), mkexpr(result));
6493
6494 return "oi";
6495}
6496
6497static HChar *
6498s390_irgen_OIY(UChar i2, IRTemp op1addr)
6499{
6500 IRTemp op1 = newTemp(Ity_I8);
6501 UChar op2;
6502 IRTemp result = newTemp(Ity_I8);
6503
6504 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6505 op2 = i2;
6506 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6507 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6508 store(mkexpr(op1addr), mkexpr(result));
6509
6510 return "oiy";
6511}
6512
6513static HChar *
6514s390_irgen_OIHF(UChar r1, UInt i2)
6515{
6516 IRTemp op1 = newTemp(Ity_I32);
6517 UInt op2;
6518 IRTemp result = newTemp(Ity_I32);
6519
6520 assign(op1, get_gpr_w0(r1));
6521 op2 = i2;
6522 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6523 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6524 put_gpr_w0(r1, mkexpr(result));
6525
6526 return "oihf";
6527}
6528
6529static HChar *
6530s390_irgen_OIHH(UChar r1, UShort i2)
6531{
6532 IRTemp op1 = newTemp(Ity_I16);
6533 UShort op2;
6534 IRTemp result = newTemp(Ity_I16);
6535
6536 assign(op1, get_gpr_hw0(r1));
6537 op2 = i2;
6538 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6539 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6540 put_gpr_hw0(r1, mkexpr(result));
6541
6542 return "oihh";
6543}
6544
6545static HChar *
6546s390_irgen_OIHL(UChar r1, UShort i2)
6547{
6548 IRTemp op1 = newTemp(Ity_I16);
6549 UShort op2;
6550 IRTemp result = newTemp(Ity_I16);
6551
6552 assign(op1, get_gpr_hw1(r1));
6553 op2 = i2;
6554 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6555 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6556 put_gpr_hw1(r1, mkexpr(result));
6557
6558 return "oihl";
6559}
6560
6561static HChar *
6562s390_irgen_OILF(UChar r1, UInt i2)
6563{
6564 IRTemp op1 = newTemp(Ity_I32);
6565 UInt op2;
6566 IRTemp result = newTemp(Ity_I32);
6567
6568 assign(op1, get_gpr_w1(r1));
6569 op2 = i2;
6570 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6571 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6572 put_gpr_w1(r1, mkexpr(result));
6573
6574 return "oilf";
6575}
6576
6577static HChar *
6578s390_irgen_OILH(UChar r1, UShort i2)
6579{
6580 IRTemp op1 = newTemp(Ity_I16);
6581 UShort op2;
6582 IRTemp result = newTemp(Ity_I16);
6583
6584 assign(op1, get_gpr_hw2(r1));
6585 op2 = i2;
6586 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6587 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6588 put_gpr_hw2(r1, mkexpr(result));
6589
6590 return "oilh";
6591}
6592
6593static HChar *
6594s390_irgen_OILL(UChar r1, UShort i2)
6595{
6596 IRTemp op1 = newTemp(Ity_I16);
6597 UShort op2;
6598 IRTemp result = newTemp(Ity_I16);
6599
6600 assign(op1, get_gpr_hw3(r1));
6601 op2 = i2;
6602 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6603 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6604 put_gpr_hw3(r1, mkexpr(result));
6605
6606 return "oill";
6607}
6608
6609static HChar *
6610s390_irgen_PFD(void)
6611{
6612
6613 return "pfd";
6614}
6615
6616static HChar *
6617s390_irgen_PFDRL(void)
6618{
6619
6620 return "pfdrl";
6621}
6622
6623static HChar *
6624s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6625{
6626 IRTemp amount = newTemp(Ity_I64);
6627 IRTemp op = newTemp(Ity_I32);
6628
6629 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6630 assign(op, get_gpr_w1(r3));
6631 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6632 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6633 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6634
6635 return "rll";
6636}
6637
6638static HChar *
6639s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6640{
6641 IRTemp amount = newTemp(Ity_I64);
6642 IRTemp op = newTemp(Ity_I64);
6643
6644 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6645 assign(op, get_gpr_dw0(r3));
6646 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6647 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6648 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6649
6650 return "rllg";
6651}
6652
6653static HChar *
6654s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6655{
6656 UChar from;
6657 UChar to;
6658 UChar rot;
6659 UChar t_bit;
6660 ULong mask;
6661 ULong maskc;
6662 IRTemp result = newTemp(Ity_I64);
6663 IRTemp op2 = newTemp(Ity_I64);
6664
6665 from = i3 & 63;
6666 to = i4 & 63;
6667 rot = i5 & 63;
6668 t_bit = i3 & 128;
6669 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6670 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6671 mkU8(64 - rot))));
6672 if (from <= to) {
6673 mask = ~0ULL;
6674 mask = (mask >> from) & (mask << (63 - to));
6675 maskc = ~mask;
6676 } else {
6677 maskc = ~0ULL;
6678 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6679 mask = ~maskc;
6680 }
6681 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6682 ), mkU64(mask)));
6683 if (t_bit == 0) {
6684 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6685 mkU64(maskc)), mkexpr(result)));
6686 }
6687 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6688
6689 return "rnsbg";
6690}
6691
6692static HChar *
6693s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6694{
6695 UChar from;
6696 UChar to;
6697 UChar rot;
6698 UChar t_bit;
6699 ULong mask;
6700 ULong maskc;
6701 IRTemp result = newTemp(Ity_I64);
6702 IRTemp op2 = newTemp(Ity_I64);
6703
6704 from = i3 & 63;
6705 to = i4 & 63;
6706 rot = i5 & 63;
6707 t_bit = i3 & 128;
6708 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6709 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6710 mkU8(64 - rot))));
6711 if (from <= to) {
6712 mask = ~0ULL;
6713 mask = (mask >> from) & (mask << (63 - to));
6714 maskc = ~mask;
6715 } else {
6716 maskc = ~0ULL;
6717 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6718 mask = ~maskc;
6719 }
6720 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6721 ), mkU64(mask)));
6722 if (t_bit == 0) {
6723 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6724 mkU64(maskc)), mkexpr(result)));
6725 }
6726 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6727
6728 return "rxsbg";
6729}
6730
6731static HChar *
6732s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6733{
6734 UChar from;
6735 UChar to;
6736 UChar rot;
6737 UChar t_bit;
6738 ULong mask;
6739 ULong maskc;
6740 IRTemp result = newTemp(Ity_I64);
6741 IRTemp op2 = newTemp(Ity_I64);
6742
6743 from = i3 & 63;
6744 to = i4 & 63;
6745 rot = i5 & 63;
6746 t_bit = i3 & 128;
6747 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6748 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6749 mkU8(64 - rot))));
6750 if (from <= to) {
6751 mask = ~0ULL;
6752 mask = (mask >> from) & (mask << (63 - to));
6753 maskc = ~mask;
6754 } else {
6755 maskc = ~0ULL;
6756 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6757 mask = ~maskc;
6758 }
6759 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6760 ), mkU64(mask)));
6761 if (t_bit == 0) {
6762 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6763 mkU64(maskc)), mkexpr(result)));
6764 }
6765 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6766
6767 return "rosbg";
6768}
6769
6770static HChar *
6771s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6772{
6773 UChar from;
6774 UChar to;
6775 UChar rot;
6776 UChar z_bit;
6777 ULong mask;
6778 ULong maskc;
6779 IRTemp op2 = newTemp(Ity_I64);
6780 IRTemp result = newTemp(Ity_I64);
6781
6782 from = i3 & 63;
6783 to = i4 & 63;
6784 rot = i5 & 63;
6785 z_bit = i4 & 128;
6786 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6787 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6788 mkU8(64 - rot))));
6789 if (from <= to) {
6790 mask = ~0ULL;
6791 mask = (mask >> from) & (mask << (63 - to));
6792 maskc = ~mask;
6793 } else {
6794 maskc = ~0ULL;
6795 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6796 mask = ~maskc;
6797 }
6798 if (z_bit == 0) {
6799 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6800 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6801 } else {
6802 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6803 }
6804 assign(result, get_gpr_dw0(r1));
6805 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6806
6807 return "risbg";
6808}
6809
6810static HChar *
6811s390_irgen_SAR(UChar r1, UChar r2)
6812{
6813 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006814 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006815 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6816
6817 return "sar";
6818}
6819
6820static HChar *
6821s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6822{
6823 IRTemp p1 = newTemp(Ity_I64);
6824 IRTemp p2 = newTemp(Ity_I64);
6825 IRTemp op = newTemp(Ity_I64);
6826 IRTemp result = newTemp(Ity_I64);
florian417b22d2012-07-13 13:41:41 +00006827 ULong sign_mask;
sewardj2019a972011-03-07 16:04:07 +00006828 IRTemp shift_amount = newTemp(Ity_I64);
6829
6830 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6831 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6832 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6833 ));
6834 sign_mask = 1ULL << 63;
6835 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6836 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
florian417b22d2012-07-13 13:41:41 +00006837 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6838 binop(Iop_And64, mkexpr(op), mkU64(sign_mask))));
sewardj2019a972011-03-07 16:04:07 +00006839 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6840 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6841 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6842
6843 return "slda";
6844}
6845
6846static HChar *
6847s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6848{
6849 IRTemp p1 = newTemp(Ity_I64);
6850 IRTemp p2 = newTemp(Ity_I64);
6851 IRTemp result = newTemp(Ity_I64);
6852
6853 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6854 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6855 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6856 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6857 mkexpr(op2addr), mkU64(63)))));
6858 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6859 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6860
6861 return "sldl";
6862}
6863
6864static HChar *
6865s390_irgen_SLA(UChar r1, IRTemp op2addr)
6866{
6867 IRTemp uop = newTemp(Ity_I32);
6868 IRTemp result = newTemp(Ity_I32);
6869 UInt sign_mask;
6870 IRTemp shift_amount = newTemp(Ity_I64);
6871 IRTemp op = newTemp(Ity_I32);
6872
6873 assign(op, get_gpr_w1(r1));
6874 assign(uop, get_gpr_w1(r1));
6875 sign_mask = 2147483648U;
6876 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6877 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6878 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6879 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6880 put_gpr_w1(r1, mkexpr(result));
6881 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6882
6883 return "sla";
6884}
6885
6886static HChar *
6887s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6888{
6889 IRTemp uop = newTemp(Ity_I32);
6890 IRTemp result = newTemp(Ity_I32);
6891 UInt sign_mask;
6892 IRTemp shift_amount = newTemp(Ity_I64);
6893 IRTemp op = newTemp(Ity_I32);
6894
6895 assign(op, get_gpr_w1(r3));
6896 assign(uop, get_gpr_w1(r3));
6897 sign_mask = 2147483648U;
6898 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6899 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6900 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6901 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6902 put_gpr_w1(r1, mkexpr(result));
6903 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6904
6905 return "slak";
6906}
6907
6908static HChar *
6909s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6910{
6911 IRTemp uop = newTemp(Ity_I64);
6912 IRTemp result = newTemp(Ity_I64);
6913 ULong sign_mask;
6914 IRTemp shift_amount = newTemp(Ity_I64);
6915 IRTemp op = newTemp(Ity_I64);
6916
6917 assign(op, get_gpr_dw0(r3));
6918 assign(uop, get_gpr_dw0(r3));
6919 sign_mask = 9223372036854775808ULL;
6920 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6921 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6922 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6923 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6924 put_gpr_dw0(r1, mkexpr(result));
6925 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6926
6927 return "slag";
6928}
6929
6930static HChar *
6931s390_irgen_SLL(UChar r1, IRTemp op2addr)
6932{
6933 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6934 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6935
6936 return "sll";
6937}
6938
6939static HChar *
6940s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6941{
6942 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6943 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6944
6945 return "sllk";
6946}
6947
6948static HChar *
6949s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
6950{
6951 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
6952 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6953
6954 return "sllg";
6955}
6956
6957static HChar *
6958s390_irgen_SRDA(UChar r1, IRTemp op2addr)
6959{
6960 IRTemp p1 = newTemp(Ity_I64);
6961 IRTemp p2 = newTemp(Ity_I64);
6962 IRTemp result = newTemp(Ity_I64);
6963
6964 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6965 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6966 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6967 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6968 mkexpr(op2addr), mkU64(63)))));
6969 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6970 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6971 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6972
6973 return "srda";
6974}
6975
6976static HChar *
6977s390_irgen_SRDL(UChar r1, IRTemp op2addr)
6978{
6979 IRTemp p1 = newTemp(Ity_I64);
6980 IRTemp p2 = newTemp(Ity_I64);
6981 IRTemp result = newTemp(Ity_I64);
6982
6983 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6984 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6985 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6986 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6987 mkexpr(op2addr), mkU64(63)))));
6988 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6989 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6990
6991 return "srdl";
6992}
6993
6994static HChar *
6995s390_irgen_SRA(UChar r1, IRTemp op2addr)
6996{
6997 IRTemp result = newTemp(Ity_I32);
6998 IRTemp op = newTemp(Ity_I32);
6999
7000 assign(op, get_gpr_w1(r1));
7001 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7002 mkexpr(op2addr), mkU64(63)))));
7003 put_gpr_w1(r1, mkexpr(result));
7004 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7005
7006 return "sra";
7007}
7008
7009static HChar *
7010s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
7011{
7012 IRTemp result = newTemp(Ity_I32);
7013 IRTemp op = newTemp(Ity_I32);
7014
7015 assign(op, get_gpr_w1(r3));
7016 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7017 mkexpr(op2addr), mkU64(63)))));
7018 put_gpr_w1(r1, mkexpr(result));
7019 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7020
7021 return "srak";
7022}
7023
7024static HChar *
7025s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7026{
7027 IRTemp result = newTemp(Ity_I64);
7028 IRTemp op = newTemp(Ity_I64);
7029
7030 assign(op, get_gpr_dw0(r3));
7031 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7032 mkexpr(op2addr), mkU64(63)))));
7033 put_gpr_dw0(r1, mkexpr(result));
7034 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7035
7036 return "srag";
7037}
7038
7039static HChar *
7040s390_irgen_SRL(UChar r1, IRTemp op2addr)
7041{
7042 IRTemp op = newTemp(Ity_I32);
7043
7044 assign(op, get_gpr_w1(r1));
7045 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7046 mkexpr(op2addr), mkU64(63)))));
7047
7048 return "srl";
7049}
7050
7051static HChar *
7052s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7053{
7054 IRTemp op = newTemp(Ity_I32);
7055
7056 assign(op, get_gpr_w1(r3));
7057 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7058 mkexpr(op2addr), mkU64(63)))));
7059
7060 return "srlk";
7061}
7062
7063static HChar *
7064s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7065{
7066 IRTemp op = newTemp(Ity_I64);
7067
7068 assign(op, get_gpr_dw0(r3));
7069 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7070 mkexpr(op2addr), mkU64(63)))));
7071
7072 return "srlg";
7073}
7074
7075static HChar *
7076s390_irgen_ST(UChar r1, IRTemp op2addr)
7077{
7078 store(mkexpr(op2addr), get_gpr_w1(r1));
7079
7080 return "st";
7081}
7082
7083static HChar *
7084s390_irgen_STY(UChar r1, IRTemp op2addr)
7085{
7086 store(mkexpr(op2addr), get_gpr_w1(r1));
7087
7088 return "sty";
7089}
7090
7091static HChar *
7092s390_irgen_STG(UChar r1, IRTemp op2addr)
7093{
7094 store(mkexpr(op2addr), get_gpr_dw0(r1));
7095
7096 return "stg";
7097}
7098
7099static HChar *
7100s390_irgen_STRL(UChar r1, UInt i2)
7101{
7102 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7103 get_gpr_w1(r1));
7104
7105 return "strl";
7106}
7107
7108static HChar *
7109s390_irgen_STGRL(UChar r1, UInt i2)
7110{
7111 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7112 get_gpr_dw0(r1));
7113
7114 return "stgrl";
7115}
7116
7117static HChar *
7118s390_irgen_STC(UChar r1, IRTemp op2addr)
7119{
7120 store(mkexpr(op2addr), get_gpr_b7(r1));
7121
7122 return "stc";
7123}
7124
7125static HChar *
7126s390_irgen_STCY(UChar r1, IRTemp op2addr)
7127{
7128 store(mkexpr(op2addr), get_gpr_b7(r1));
7129
7130 return "stcy";
7131}
7132
7133static HChar *
7134s390_irgen_STCH(UChar r1, IRTemp op2addr)
7135{
7136 store(mkexpr(op2addr), get_gpr_b3(r1));
7137
7138 return "stch";
7139}
7140
7141static HChar *
7142s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7143{
7144 UChar mask;
7145 UChar n;
7146
7147 mask = (UChar)r3;
7148 n = 0;
7149 if ((mask & 8) != 0) {
7150 store(mkexpr(op2addr), get_gpr_b4(r1));
7151 n = n + 1;
7152 }
7153 if ((mask & 4) != 0) {
7154 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7155 n = n + 1;
7156 }
7157 if ((mask & 2) != 0) {
7158 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7159 n = n + 1;
7160 }
7161 if ((mask & 1) != 0) {
7162 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7163 }
7164
7165 return "stcm";
7166}
7167
7168static HChar *
7169s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7170{
7171 UChar mask;
7172 UChar n;
7173
7174 mask = (UChar)r3;
7175 n = 0;
7176 if ((mask & 8) != 0) {
7177 store(mkexpr(op2addr), get_gpr_b4(r1));
7178 n = n + 1;
7179 }
7180 if ((mask & 4) != 0) {
7181 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7182 n = n + 1;
7183 }
7184 if ((mask & 2) != 0) {
7185 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7186 n = n + 1;
7187 }
7188 if ((mask & 1) != 0) {
7189 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7190 }
7191
7192 return "stcmy";
7193}
7194
7195static HChar *
7196s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7197{
7198 UChar mask;
7199 UChar n;
7200
7201 mask = (UChar)r3;
7202 n = 0;
7203 if ((mask & 8) != 0) {
7204 store(mkexpr(op2addr), get_gpr_b0(r1));
7205 n = n + 1;
7206 }
7207 if ((mask & 4) != 0) {
7208 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7209 n = n + 1;
7210 }
7211 if ((mask & 2) != 0) {
7212 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7213 n = n + 1;
7214 }
7215 if ((mask & 1) != 0) {
7216 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7217 }
7218
7219 return "stcmh";
7220}
7221
7222static HChar *
7223s390_irgen_STH(UChar r1, IRTemp op2addr)
7224{
7225 store(mkexpr(op2addr), get_gpr_hw3(r1));
7226
7227 return "sth";
7228}
7229
7230static HChar *
7231s390_irgen_STHY(UChar r1, IRTemp op2addr)
7232{
7233 store(mkexpr(op2addr), get_gpr_hw3(r1));
7234
7235 return "sthy";
7236}
7237
7238static HChar *
7239s390_irgen_STHRL(UChar r1, UInt i2)
7240{
7241 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7242 get_gpr_hw3(r1));
7243
7244 return "sthrl";
7245}
7246
7247static HChar *
7248s390_irgen_STHH(UChar r1, IRTemp op2addr)
7249{
7250 store(mkexpr(op2addr), get_gpr_hw1(r1));
7251
7252 return "sthh";
7253}
7254
7255static HChar *
7256s390_irgen_STFH(UChar r1, IRTemp op2addr)
7257{
7258 store(mkexpr(op2addr), get_gpr_w0(r1));
7259
7260 return "stfh";
7261}
7262
7263static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007264s390_irgen_STOC(UChar r1, IRTemp op2addr)
7265{
7266 /* condition is checked in format handler */
7267 store(mkexpr(op2addr), get_gpr_w1(r1));
7268
7269 return "stoc";
7270}
7271
7272static HChar *
7273s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7274{
7275 /* condition is checked in format handler */
7276 store(mkexpr(op2addr), get_gpr_dw0(r1));
7277
7278 return "stocg";
7279}
7280
7281static HChar *
sewardj2019a972011-03-07 16:04:07 +00007282s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7283{
7284 store(mkexpr(op2addr), get_gpr_dw0(r1));
7285 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7286
7287 return "stpq";
7288}
7289
7290static HChar *
7291s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7292{
7293 store(mkexpr(op2addr), get_gpr_b7(r1));
7294 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7295
7296 return "strvh";
7297}
7298
7299static HChar *
7300s390_irgen_STRV(UChar r1, IRTemp op2addr)
7301{
7302 store(mkexpr(op2addr), get_gpr_b7(r1));
7303 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7304 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7305 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7306
7307 return "strv";
7308}
7309
7310static HChar *
7311s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7312{
7313 store(mkexpr(op2addr), get_gpr_b7(r1));
7314 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7315 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7316 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7317 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7318 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7319 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7320 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7321
7322 return "strvg";
7323}
7324
7325static HChar *
7326s390_irgen_SR(UChar r1, UChar r2)
7327{
7328 IRTemp op1 = newTemp(Ity_I32);
7329 IRTemp op2 = newTemp(Ity_I32);
7330 IRTemp result = newTemp(Ity_I32);
7331
7332 assign(op1, get_gpr_w1(r1));
7333 assign(op2, get_gpr_w1(r2));
7334 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7335 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7336 put_gpr_w1(r1, mkexpr(result));
7337
7338 return "sr";
7339}
7340
7341static HChar *
7342s390_irgen_SGR(UChar r1, UChar r2)
7343{
7344 IRTemp op1 = newTemp(Ity_I64);
7345 IRTemp op2 = newTemp(Ity_I64);
7346 IRTemp result = newTemp(Ity_I64);
7347
7348 assign(op1, get_gpr_dw0(r1));
7349 assign(op2, get_gpr_dw0(r2));
7350 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7351 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7352 put_gpr_dw0(r1, mkexpr(result));
7353
7354 return "sgr";
7355}
7356
7357static HChar *
7358s390_irgen_SGFR(UChar r1, UChar r2)
7359{
7360 IRTemp op1 = newTemp(Ity_I64);
7361 IRTemp op2 = newTemp(Ity_I64);
7362 IRTemp result = newTemp(Ity_I64);
7363
7364 assign(op1, get_gpr_dw0(r1));
7365 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7366 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7367 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7368 put_gpr_dw0(r1, mkexpr(result));
7369
7370 return "sgfr";
7371}
7372
7373static HChar *
7374s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7375{
7376 IRTemp op2 = newTemp(Ity_I32);
7377 IRTemp op3 = newTemp(Ity_I32);
7378 IRTemp result = newTemp(Ity_I32);
7379
7380 assign(op2, get_gpr_w1(r2));
7381 assign(op3, get_gpr_w1(r3));
7382 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7383 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7384 put_gpr_w1(r1, mkexpr(result));
7385
7386 return "srk";
7387}
7388
7389static HChar *
7390s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7391{
7392 IRTemp op2 = newTemp(Ity_I64);
7393 IRTemp op3 = newTemp(Ity_I64);
7394 IRTemp result = newTemp(Ity_I64);
7395
7396 assign(op2, get_gpr_dw0(r2));
7397 assign(op3, get_gpr_dw0(r3));
7398 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7399 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7400 put_gpr_dw0(r1, mkexpr(result));
7401
7402 return "sgrk";
7403}
7404
7405static HChar *
7406s390_irgen_S(UChar r1, IRTemp op2addr)
7407{
7408 IRTemp op1 = newTemp(Ity_I32);
7409 IRTemp op2 = newTemp(Ity_I32);
7410 IRTemp result = newTemp(Ity_I32);
7411
7412 assign(op1, get_gpr_w1(r1));
7413 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7414 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7415 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7416 put_gpr_w1(r1, mkexpr(result));
7417
7418 return "s";
7419}
7420
7421static HChar *
7422s390_irgen_SY(UChar r1, IRTemp op2addr)
7423{
7424 IRTemp op1 = newTemp(Ity_I32);
7425 IRTemp op2 = newTemp(Ity_I32);
7426 IRTemp result = newTemp(Ity_I32);
7427
7428 assign(op1, get_gpr_w1(r1));
7429 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7430 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7431 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7432 put_gpr_w1(r1, mkexpr(result));
7433
7434 return "sy";
7435}
7436
7437static HChar *
7438s390_irgen_SG(UChar r1, IRTemp op2addr)
7439{
7440 IRTemp op1 = newTemp(Ity_I64);
7441 IRTemp op2 = newTemp(Ity_I64);
7442 IRTemp result = newTemp(Ity_I64);
7443
7444 assign(op1, get_gpr_dw0(r1));
7445 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7446 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7447 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7448 put_gpr_dw0(r1, mkexpr(result));
7449
7450 return "sg";
7451}
7452
7453static HChar *
7454s390_irgen_SGF(UChar r1, IRTemp op2addr)
7455{
7456 IRTemp op1 = newTemp(Ity_I64);
7457 IRTemp op2 = newTemp(Ity_I64);
7458 IRTemp result = newTemp(Ity_I64);
7459
7460 assign(op1, get_gpr_dw0(r1));
7461 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7462 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7463 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7464 put_gpr_dw0(r1, mkexpr(result));
7465
7466 return "sgf";
7467}
7468
7469static HChar *
7470s390_irgen_SH(UChar r1, IRTemp op2addr)
7471{
7472 IRTemp op1 = newTemp(Ity_I32);
7473 IRTemp op2 = newTemp(Ity_I32);
7474 IRTemp result = newTemp(Ity_I32);
7475
7476 assign(op1, get_gpr_w1(r1));
7477 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7478 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7479 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7480 put_gpr_w1(r1, mkexpr(result));
7481
7482 return "sh";
7483}
7484
7485static HChar *
7486s390_irgen_SHY(UChar r1, IRTemp op2addr)
7487{
7488 IRTemp op1 = newTemp(Ity_I32);
7489 IRTemp op2 = newTemp(Ity_I32);
7490 IRTemp result = newTemp(Ity_I32);
7491
7492 assign(op1, get_gpr_w1(r1));
7493 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7494 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7495 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7496 put_gpr_w1(r1, mkexpr(result));
7497
7498 return "shy";
7499}
7500
7501static HChar *
7502s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7503{
7504 IRTemp op2 = newTemp(Ity_I32);
7505 IRTemp op3 = newTemp(Ity_I32);
7506 IRTemp result = newTemp(Ity_I32);
7507
7508 assign(op2, get_gpr_w0(r1));
7509 assign(op3, get_gpr_w0(r2));
7510 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7511 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7512 put_gpr_w0(r1, mkexpr(result));
7513
7514 return "shhhr";
7515}
7516
7517static HChar *
7518s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7519{
7520 IRTemp op2 = newTemp(Ity_I32);
7521 IRTemp op3 = newTemp(Ity_I32);
7522 IRTemp result = newTemp(Ity_I32);
7523
7524 assign(op2, get_gpr_w0(r1));
7525 assign(op3, get_gpr_w1(r2));
7526 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7527 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7528 put_gpr_w0(r1, mkexpr(result));
7529
7530 return "shhlr";
7531}
7532
7533static HChar *
7534s390_irgen_SLR(UChar r1, UChar r2)
7535{
7536 IRTemp op1 = newTemp(Ity_I32);
7537 IRTemp op2 = newTemp(Ity_I32);
7538 IRTemp result = newTemp(Ity_I32);
7539
7540 assign(op1, get_gpr_w1(r1));
7541 assign(op2, get_gpr_w1(r2));
7542 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7543 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7544 put_gpr_w1(r1, mkexpr(result));
7545
7546 return "slr";
7547}
7548
7549static HChar *
7550s390_irgen_SLGR(UChar r1, UChar r2)
7551{
7552 IRTemp op1 = newTemp(Ity_I64);
7553 IRTemp op2 = newTemp(Ity_I64);
7554 IRTemp result = newTemp(Ity_I64);
7555
7556 assign(op1, get_gpr_dw0(r1));
7557 assign(op2, get_gpr_dw0(r2));
7558 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7559 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7560 put_gpr_dw0(r1, mkexpr(result));
7561
7562 return "slgr";
7563}
7564
7565static HChar *
7566s390_irgen_SLGFR(UChar r1, UChar r2)
7567{
7568 IRTemp op1 = newTemp(Ity_I64);
7569 IRTemp op2 = newTemp(Ity_I64);
7570 IRTemp result = newTemp(Ity_I64);
7571
7572 assign(op1, get_gpr_dw0(r1));
7573 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7574 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7575 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7576 put_gpr_dw0(r1, mkexpr(result));
7577
7578 return "slgfr";
7579}
7580
7581static HChar *
7582s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7583{
7584 IRTemp op2 = newTemp(Ity_I32);
7585 IRTemp op3 = newTemp(Ity_I32);
7586 IRTemp result = newTemp(Ity_I32);
7587
7588 assign(op2, get_gpr_w1(r2));
7589 assign(op3, get_gpr_w1(r3));
7590 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7591 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7592 put_gpr_w1(r1, mkexpr(result));
7593
7594 return "slrk";
7595}
7596
7597static HChar *
7598s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7599{
7600 IRTemp op2 = newTemp(Ity_I64);
7601 IRTemp op3 = newTemp(Ity_I64);
7602 IRTemp result = newTemp(Ity_I64);
7603
7604 assign(op2, get_gpr_dw0(r2));
7605 assign(op3, get_gpr_dw0(r3));
7606 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7607 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7608 put_gpr_dw0(r1, mkexpr(result));
7609
7610 return "slgrk";
7611}
7612
7613static HChar *
7614s390_irgen_SL(UChar r1, IRTemp op2addr)
7615{
7616 IRTemp op1 = newTemp(Ity_I32);
7617 IRTemp op2 = newTemp(Ity_I32);
7618 IRTemp result = newTemp(Ity_I32);
7619
7620 assign(op1, get_gpr_w1(r1));
7621 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7622 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7623 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7624 put_gpr_w1(r1, mkexpr(result));
7625
7626 return "sl";
7627}
7628
7629static HChar *
7630s390_irgen_SLY(UChar r1, IRTemp op2addr)
7631{
7632 IRTemp op1 = newTemp(Ity_I32);
7633 IRTemp op2 = newTemp(Ity_I32);
7634 IRTemp result = newTemp(Ity_I32);
7635
7636 assign(op1, get_gpr_w1(r1));
7637 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7638 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7639 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7640 put_gpr_w1(r1, mkexpr(result));
7641
7642 return "sly";
7643}
7644
7645static HChar *
7646s390_irgen_SLG(UChar r1, IRTemp op2addr)
7647{
7648 IRTemp op1 = newTemp(Ity_I64);
7649 IRTemp op2 = newTemp(Ity_I64);
7650 IRTemp result = newTemp(Ity_I64);
7651
7652 assign(op1, get_gpr_dw0(r1));
7653 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7654 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7655 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7656 put_gpr_dw0(r1, mkexpr(result));
7657
7658 return "slg";
7659}
7660
7661static HChar *
7662s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7663{
7664 IRTemp op1 = newTemp(Ity_I64);
7665 IRTemp op2 = newTemp(Ity_I64);
7666 IRTemp result = newTemp(Ity_I64);
7667
7668 assign(op1, get_gpr_dw0(r1));
7669 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7670 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7671 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7672 put_gpr_dw0(r1, mkexpr(result));
7673
7674 return "slgf";
7675}
7676
7677static HChar *
7678s390_irgen_SLFI(UChar r1, UInt i2)
7679{
7680 IRTemp op1 = newTemp(Ity_I32);
7681 UInt op2;
7682 IRTemp result = newTemp(Ity_I32);
7683
7684 assign(op1, get_gpr_w1(r1));
7685 op2 = i2;
7686 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7687 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7688 mkU32(op2)));
7689 put_gpr_w1(r1, mkexpr(result));
7690
7691 return "slfi";
7692}
7693
7694static HChar *
7695s390_irgen_SLGFI(UChar r1, UInt i2)
7696{
7697 IRTemp op1 = newTemp(Ity_I64);
7698 ULong op2;
7699 IRTemp result = newTemp(Ity_I64);
7700
7701 assign(op1, get_gpr_dw0(r1));
7702 op2 = (ULong)i2;
7703 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7704 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7705 mkU64(op2)));
7706 put_gpr_dw0(r1, mkexpr(result));
7707
7708 return "slgfi";
7709}
7710
7711static HChar *
7712s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7713{
7714 IRTemp op2 = newTemp(Ity_I32);
7715 IRTemp op3 = newTemp(Ity_I32);
7716 IRTemp result = newTemp(Ity_I32);
7717
7718 assign(op2, get_gpr_w0(r1));
7719 assign(op3, get_gpr_w0(r2));
7720 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7721 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7722 put_gpr_w0(r1, mkexpr(result));
7723
7724 return "slhhhr";
7725}
7726
7727static HChar *
7728s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7729{
7730 IRTemp op2 = newTemp(Ity_I32);
7731 IRTemp op3 = newTemp(Ity_I32);
7732 IRTemp result = newTemp(Ity_I32);
7733
7734 assign(op2, get_gpr_w0(r1));
7735 assign(op3, get_gpr_w1(r2));
7736 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7737 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7738 put_gpr_w0(r1, mkexpr(result));
7739
7740 return "slhhlr";
7741}
7742
7743static HChar *
7744s390_irgen_SLBR(UChar r1, UChar r2)
7745{
7746 IRTemp op1 = newTemp(Ity_I32);
7747 IRTemp op2 = newTemp(Ity_I32);
7748 IRTemp result = newTemp(Ity_I32);
7749 IRTemp borrow_in = newTemp(Ity_I32);
7750
7751 assign(op1, get_gpr_w1(r1));
7752 assign(op2, get_gpr_w1(r2));
7753 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7754 s390_call_calculate_cc(), mkU8(1))));
7755 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7756 mkexpr(borrow_in)));
7757 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7758 put_gpr_w1(r1, mkexpr(result));
7759
7760 return "slbr";
7761}
7762
7763static HChar *
7764s390_irgen_SLBGR(UChar r1, UChar r2)
7765{
7766 IRTemp op1 = newTemp(Ity_I64);
7767 IRTemp op2 = newTemp(Ity_I64);
7768 IRTemp result = newTemp(Ity_I64);
7769 IRTemp borrow_in = newTemp(Ity_I64);
7770
7771 assign(op1, get_gpr_dw0(r1));
7772 assign(op2, get_gpr_dw0(r2));
7773 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7774 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7775 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7776 mkexpr(borrow_in)));
7777 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7778 put_gpr_dw0(r1, mkexpr(result));
7779
7780 return "slbgr";
7781}
7782
7783static HChar *
7784s390_irgen_SLB(UChar r1, IRTemp op2addr)
7785{
7786 IRTemp op1 = newTemp(Ity_I32);
7787 IRTemp op2 = newTemp(Ity_I32);
7788 IRTemp result = newTemp(Ity_I32);
7789 IRTemp borrow_in = newTemp(Ity_I32);
7790
7791 assign(op1, get_gpr_w1(r1));
7792 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7793 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7794 s390_call_calculate_cc(), mkU8(1))));
7795 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7796 mkexpr(borrow_in)));
7797 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7798 put_gpr_w1(r1, mkexpr(result));
7799
7800 return "slb";
7801}
7802
7803static HChar *
7804s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7805{
7806 IRTemp op1 = newTemp(Ity_I64);
7807 IRTemp op2 = newTemp(Ity_I64);
7808 IRTemp result = newTemp(Ity_I64);
7809 IRTemp borrow_in = newTemp(Ity_I64);
7810
7811 assign(op1, get_gpr_dw0(r1));
7812 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7813 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7814 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7815 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7816 mkexpr(borrow_in)));
7817 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7818 put_gpr_dw0(r1, mkexpr(result));
7819
7820 return "slbg";
7821}
7822
7823static HChar *
7824s390_irgen_SVC(UChar i)
7825{
7826 IRTemp sysno = newTemp(Ity_I64);
7827
7828 if (i != 0) {
7829 assign(sysno, mkU64(i));
7830 } else {
7831 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7832 }
7833 system_call(mkexpr(sysno));
7834
7835 return "svc";
7836}
7837
7838static HChar *
sewardj2019a972011-03-07 16:04:07 +00007839s390_irgen_TM(UChar i2, IRTemp op1addr)
7840{
7841 UChar mask;
7842 IRTemp value = newTemp(Ity_I8);
7843
7844 mask = i2;
7845 assign(value, load(Ity_I8, mkexpr(op1addr)));
7846 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7847 mkU8(mask)));
7848
7849 return "tm";
7850}
7851
7852static HChar *
7853s390_irgen_TMY(UChar i2, IRTemp op1addr)
7854{
7855 UChar mask;
7856 IRTemp value = newTemp(Ity_I8);
7857
7858 mask = i2;
7859 assign(value, load(Ity_I8, mkexpr(op1addr)));
7860 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7861 mkU8(mask)));
7862
7863 return "tmy";
7864}
7865
7866static HChar *
7867s390_irgen_TMHH(UChar r1, UShort i2)
7868{
7869 UShort mask;
7870 IRTemp value = newTemp(Ity_I16);
7871
7872 mask = i2;
7873 assign(value, get_gpr_hw0(r1));
7874 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7875 mkU16(mask)));
7876
7877 return "tmhh";
7878}
7879
7880static HChar *
7881s390_irgen_TMHL(UChar r1, UShort i2)
7882{
7883 UShort mask;
7884 IRTemp value = newTemp(Ity_I16);
7885
7886 mask = i2;
7887 assign(value, get_gpr_hw1(r1));
7888 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7889 mkU16(mask)));
7890
7891 return "tmhl";
7892}
7893
7894static HChar *
7895s390_irgen_TMLH(UChar r1, UShort i2)
7896{
7897 UShort mask;
7898 IRTemp value = newTemp(Ity_I16);
7899
7900 mask = i2;
7901 assign(value, get_gpr_hw2(r1));
7902 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7903 mkU16(mask)));
7904
7905 return "tmlh";
7906}
7907
7908static HChar *
7909s390_irgen_TMLL(UChar r1, UShort i2)
7910{
7911 UShort mask;
7912 IRTemp value = newTemp(Ity_I16);
7913
7914 mask = i2;
7915 assign(value, get_gpr_hw3(r1));
7916 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7917 mkU16(mask)));
7918
7919 return "tmll";
7920}
7921
7922static HChar *
7923s390_irgen_EFPC(UChar r1)
7924{
7925 put_gpr_w1(r1, get_fpc_w0());
7926
7927 return "efpc";
7928}
7929
7930static HChar *
7931s390_irgen_LER(UChar r1, UChar r2)
7932{
7933 put_fpr_w0(r1, get_fpr_w0(r2));
7934
7935 return "ler";
7936}
7937
7938static HChar *
7939s390_irgen_LDR(UChar r1, UChar r2)
7940{
7941 put_fpr_dw0(r1, get_fpr_dw0(r2));
7942
7943 return "ldr";
7944}
7945
7946static HChar *
7947s390_irgen_LXR(UChar r1, UChar r2)
7948{
7949 put_fpr_dw0(r1, get_fpr_dw0(r2));
7950 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
7951
7952 return "lxr";
7953}
7954
7955static HChar *
7956s390_irgen_LE(UChar r1, IRTemp op2addr)
7957{
7958 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7959
7960 return "le";
7961}
7962
7963static HChar *
7964s390_irgen_LD(UChar r1, IRTemp op2addr)
7965{
7966 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7967
7968 return "ld";
7969}
7970
7971static HChar *
7972s390_irgen_LEY(UChar r1, IRTemp op2addr)
7973{
7974 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7975
7976 return "ley";
7977}
7978
7979static HChar *
7980s390_irgen_LDY(UChar r1, IRTemp op2addr)
7981{
7982 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7983
7984 return "ldy";
7985}
7986
7987static HChar *
7988s390_irgen_LFPC(IRTemp op2addr)
7989{
7990 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
7991
7992 return "lfpc";
7993}
7994
7995static HChar *
7996s390_irgen_LZER(UChar r1)
7997{
7998 put_fpr_w0(r1, mkF32i(0x0));
7999
8000 return "lzer";
8001}
8002
8003static HChar *
8004s390_irgen_LZDR(UChar r1)
8005{
8006 put_fpr_dw0(r1, mkF64i(0x0));
8007
8008 return "lzdr";
8009}
8010
8011static HChar *
8012s390_irgen_LZXR(UChar r1)
8013{
8014 put_fpr_dw0(r1, mkF64i(0x0));
8015 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8016
8017 return "lzxr";
8018}
8019
8020static HChar *
8021s390_irgen_SRNM(IRTemp op2addr)
8022{
8023 UInt mask;
8024
8025 mask = 3;
8026 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8027 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8028 );
8029
8030 return "srnm";
8031}
8032
8033static HChar *
8034s390_irgen_SFPC(UChar r1)
8035{
8036 put_fpc_w0(get_gpr_w1(r1));
8037
8038 return "sfpc";
8039}
8040
8041static HChar *
8042s390_irgen_STE(UChar r1, IRTemp op2addr)
8043{
8044 store(mkexpr(op2addr), get_fpr_w0(r1));
8045
8046 return "ste";
8047}
8048
8049static HChar *
8050s390_irgen_STD(UChar r1, IRTemp op2addr)
8051{
8052 store(mkexpr(op2addr), get_fpr_dw0(r1));
8053
8054 return "std";
8055}
8056
8057static HChar *
8058s390_irgen_STEY(UChar r1, IRTemp op2addr)
8059{
8060 store(mkexpr(op2addr), get_fpr_w0(r1));
8061
8062 return "stey";
8063}
8064
8065static HChar *
8066s390_irgen_STDY(UChar r1, IRTemp op2addr)
8067{
8068 store(mkexpr(op2addr), get_fpr_dw0(r1));
8069
8070 return "stdy";
8071}
8072
8073static HChar *
8074s390_irgen_STFPC(IRTemp op2addr)
8075{
8076 store(mkexpr(op2addr), get_fpc_w0());
8077
8078 return "stfpc";
8079}
8080
8081static HChar *
8082s390_irgen_AEBR(UChar r1, UChar r2)
8083{
8084 IRTemp op1 = newTemp(Ity_F32);
8085 IRTemp op2 = newTemp(Ity_F32);
8086 IRTemp result = newTemp(Ity_F32);
8087
8088 assign(op1, get_fpr_w0(r1));
8089 assign(op2, get_fpr_w0(r2));
8090 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8091 mkexpr(op2)));
8092 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8093 put_fpr_w0(r1, mkexpr(result));
8094
8095 return "aebr";
8096}
8097
8098static HChar *
8099s390_irgen_ADBR(UChar r1, UChar r2)
8100{
8101 IRTemp op1 = newTemp(Ity_F64);
8102 IRTemp op2 = newTemp(Ity_F64);
8103 IRTemp result = newTemp(Ity_F64);
8104
8105 assign(op1, get_fpr_dw0(r1));
8106 assign(op2, get_fpr_dw0(r2));
8107 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8108 mkexpr(op2)));
8109 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8110 put_fpr_dw0(r1, mkexpr(result));
8111
8112 return "adbr";
8113}
8114
8115static HChar *
8116s390_irgen_AEB(UChar r1, IRTemp op2addr)
8117{
8118 IRTemp op1 = newTemp(Ity_F32);
8119 IRTemp op2 = newTemp(Ity_F32);
8120 IRTemp result = newTemp(Ity_F32);
8121
8122 assign(op1, get_fpr_w0(r1));
8123 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8124 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8125 mkexpr(op2)));
8126 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8127 put_fpr_w0(r1, mkexpr(result));
8128
8129 return "aeb";
8130}
8131
8132static HChar *
8133s390_irgen_ADB(UChar r1, IRTemp op2addr)
8134{
8135 IRTemp op1 = newTemp(Ity_F64);
8136 IRTemp op2 = newTemp(Ity_F64);
8137 IRTemp result = newTemp(Ity_F64);
8138
8139 assign(op1, get_fpr_dw0(r1));
8140 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8141 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8142 mkexpr(op2)));
8143 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8144 put_fpr_dw0(r1, mkexpr(result));
8145
8146 return "adb";
8147}
8148
8149static HChar *
8150s390_irgen_CEFBR(UChar r1, UChar r2)
8151{
8152 IRTemp op2 = newTemp(Ity_I32);
8153
8154 assign(op2, get_gpr_w1(r2));
8155 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8156
8157 return "cefbr";
8158}
8159
8160static HChar *
8161s390_irgen_CDFBR(UChar r1, UChar r2)
8162{
8163 IRTemp op2 = newTemp(Ity_I32);
8164
8165 assign(op2, get_gpr_w1(r2));
8166 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8167
8168 return "cdfbr";
8169}
8170
8171static HChar *
8172s390_irgen_CEGBR(UChar r1, UChar r2)
8173{
8174 IRTemp op2 = newTemp(Ity_I64);
8175
8176 assign(op2, get_gpr_dw0(r2));
8177 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8178
8179 return "cegbr";
8180}
8181
8182static HChar *
8183s390_irgen_CDGBR(UChar r1, UChar r2)
8184{
8185 IRTemp op2 = newTemp(Ity_I64);
8186
8187 assign(op2, get_gpr_dw0(r2));
8188 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8189
8190 return "cdgbr";
8191}
8192
8193static HChar *
8194s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8195{
8196 IRTemp op = newTemp(Ity_F32);
8197 IRTemp result = newTemp(Ity_I32);
8198
8199 assign(op, get_fpr_w0(r2));
8200 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8201 mkexpr(op)));
8202 put_gpr_w1(r1, mkexpr(result));
8203 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8204
8205 return "cfebr";
8206}
8207
8208static HChar *
8209s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8210{
8211 IRTemp op = newTemp(Ity_F64);
8212 IRTemp result = newTemp(Ity_I32);
8213
8214 assign(op, get_fpr_dw0(r2));
8215 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8216 mkexpr(op)));
8217 put_gpr_w1(r1, mkexpr(result));
8218 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8219
8220 return "cfdbr";
8221}
8222
8223static HChar *
8224s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8225{
8226 IRTemp op = newTemp(Ity_F32);
8227 IRTemp result = newTemp(Ity_I64);
8228
8229 assign(op, get_fpr_w0(r2));
8230 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8231 mkexpr(op)));
8232 put_gpr_dw0(r1, mkexpr(result));
8233 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8234
8235 return "cgebr";
8236}
8237
8238static HChar *
8239s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8240{
8241 IRTemp op = newTemp(Ity_F64);
8242 IRTemp result = newTemp(Ity_I64);
8243
8244 assign(op, get_fpr_dw0(r2));
8245 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8246 mkexpr(op)));
8247 put_gpr_dw0(r1, mkexpr(result));
8248 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8249
8250 return "cgdbr";
8251}
8252
8253static HChar *
8254s390_irgen_DEBR(UChar r1, UChar r2)
8255{
8256 IRTemp op1 = newTemp(Ity_F32);
8257 IRTemp op2 = newTemp(Ity_F32);
8258 IRTemp result = newTemp(Ity_F32);
8259
8260 assign(op1, get_fpr_w0(r1));
8261 assign(op2, get_fpr_w0(r2));
8262 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8263 mkexpr(op2)));
8264 put_fpr_w0(r1, mkexpr(result));
8265
8266 return "debr";
8267}
8268
8269static HChar *
8270s390_irgen_DDBR(UChar r1, UChar r2)
8271{
8272 IRTemp op1 = newTemp(Ity_F64);
8273 IRTemp op2 = newTemp(Ity_F64);
8274 IRTemp result = newTemp(Ity_F64);
8275
8276 assign(op1, get_fpr_dw0(r1));
8277 assign(op2, get_fpr_dw0(r2));
8278 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8279 mkexpr(op2)));
8280 put_fpr_dw0(r1, mkexpr(result));
8281
8282 return "ddbr";
8283}
8284
8285static HChar *
8286s390_irgen_DEB(UChar r1, IRTemp op2addr)
8287{
8288 IRTemp op1 = newTemp(Ity_F32);
8289 IRTemp op2 = newTemp(Ity_F32);
8290 IRTemp result = newTemp(Ity_F32);
8291
8292 assign(op1, get_fpr_w0(r1));
8293 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8294 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8295 mkexpr(op2)));
8296 put_fpr_w0(r1, mkexpr(result));
8297
8298 return "deb";
8299}
8300
8301static HChar *
8302s390_irgen_DDB(UChar r1, IRTemp op2addr)
8303{
8304 IRTemp op1 = newTemp(Ity_F64);
8305 IRTemp op2 = newTemp(Ity_F64);
8306 IRTemp result = newTemp(Ity_F64);
8307
8308 assign(op1, get_fpr_dw0(r1));
8309 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8310 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8311 mkexpr(op2)));
8312 put_fpr_dw0(r1, mkexpr(result));
8313
8314 return "ddb";
8315}
8316
8317static HChar *
8318s390_irgen_LTEBR(UChar r1, UChar r2)
8319{
8320 IRTemp result = newTemp(Ity_F32);
8321
8322 assign(result, get_fpr_w0(r2));
8323 put_fpr_w0(r1, mkexpr(result));
8324 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8325
8326 return "ltebr";
8327}
8328
8329static HChar *
8330s390_irgen_LTDBR(UChar r1, UChar r2)
8331{
8332 IRTemp result = newTemp(Ity_F64);
8333
8334 assign(result, get_fpr_dw0(r2));
8335 put_fpr_dw0(r1, mkexpr(result));
8336 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8337
8338 return "ltdbr";
8339}
8340
8341static HChar *
8342s390_irgen_LCEBR(UChar r1, UChar r2)
8343{
8344 IRTemp result = newTemp(Ity_F32);
8345
8346 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8347 put_fpr_w0(r1, mkexpr(result));
8348 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8349
8350 return "lcebr";
8351}
8352
8353static HChar *
8354s390_irgen_LCDBR(UChar r1, UChar r2)
8355{
8356 IRTemp result = newTemp(Ity_F64);
8357
8358 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8359 put_fpr_dw0(r1, mkexpr(result));
8360 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8361
8362 return "lcdbr";
8363}
8364
8365static HChar *
8366s390_irgen_LDEBR(UChar r1, UChar r2)
8367{
8368 IRTemp op = newTemp(Ity_F32);
8369
8370 assign(op, get_fpr_w0(r2));
8371 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8372
8373 return "ldebr";
8374}
8375
8376static HChar *
8377s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8378{
8379 IRTemp op = newTemp(Ity_F32);
8380
8381 assign(op, load(Ity_F32, mkexpr(op2addr)));
8382 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8383
8384 return "ldeb";
8385}
8386
8387static HChar *
8388s390_irgen_LEDBR(UChar r1, UChar r2)
8389{
8390 IRTemp op = newTemp(Ity_F64);
8391
8392 assign(op, get_fpr_dw0(r2));
8393 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8394
8395 return "ledbr";
8396}
8397
8398static HChar *
8399s390_irgen_MEEBR(UChar r1, UChar r2)
8400{
8401 IRTemp op1 = newTemp(Ity_F32);
8402 IRTemp op2 = newTemp(Ity_F32);
8403 IRTemp result = newTemp(Ity_F32);
8404
8405 assign(op1, get_fpr_w0(r1));
8406 assign(op2, get_fpr_w0(r2));
8407 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8408 mkexpr(op2)));
8409 put_fpr_w0(r1, mkexpr(result));
8410
8411 return "meebr";
8412}
8413
8414static HChar *
8415s390_irgen_MDBR(UChar r1, UChar r2)
8416{
8417 IRTemp op1 = newTemp(Ity_F64);
8418 IRTemp op2 = newTemp(Ity_F64);
8419 IRTemp result = newTemp(Ity_F64);
8420
8421 assign(op1, get_fpr_dw0(r1));
8422 assign(op2, get_fpr_dw0(r2));
8423 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8424 mkexpr(op2)));
8425 put_fpr_dw0(r1, mkexpr(result));
8426
8427 return "mdbr";
8428}
8429
8430static HChar *
8431s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8432{
8433 IRTemp op1 = newTemp(Ity_F32);
8434 IRTemp op2 = newTemp(Ity_F32);
8435 IRTemp result = newTemp(Ity_F32);
8436
8437 assign(op1, get_fpr_w0(r1));
8438 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8439 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8440 mkexpr(op2)));
8441 put_fpr_w0(r1, mkexpr(result));
8442
8443 return "meeb";
8444}
8445
8446static HChar *
8447s390_irgen_MDB(UChar r1, IRTemp op2addr)
8448{
8449 IRTemp op1 = newTemp(Ity_F64);
8450 IRTemp op2 = newTemp(Ity_F64);
8451 IRTemp result = newTemp(Ity_F64);
8452
8453 assign(op1, get_fpr_dw0(r1));
8454 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8455 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8456 mkexpr(op2)));
8457 put_fpr_dw0(r1, mkexpr(result));
8458
8459 return "mdb";
8460}
8461
8462static HChar *
8463s390_irgen_SEBR(UChar r1, UChar r2)
8464{
8465 IRTemp op1 = newTemp(Ity_F32);
8466 IRTemp op2 = newTemp(Ity_F32);
8467 IRTemp result = newTemp(Ity_F32);
8468
8469 assign(op1, get_fpr_w0(r1));
8470 assign(op2, get_fpr_w0(r2));
8471 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8472 mkexpr(op2)));
8473 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8474 put_fpr_w0(r1, mkexpr(result));
8475
8476 return "sebr";
8477}
8478
8479static HChar *
8480s390_irgen_SDBR(UChar r1, UChar r2)
8481{
8482 IRTemp op1 = newTemp(Ity_F64);
8483 IRTemp op2 = newTemp(Ity_F64);
8484 IRTemp result = newTemp(Ity_F64);
8485
8486 assign(op1, get_fpr_dw0(r1));
8487 assign(op2, get_fpr_dw0(r2));
8488 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8489 mkexpr(op2)));
8490 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8491 put_fpr_dw0(r1, mkexpr(result));
8492
8493 return "sdbr";
8494}
8495
8496static HChar *
8497s390_irgen_SEB(UChar r1, IRTemp op2addr)
8498{
8499 IRTemp op1 = newTemp(Ity_F32);
8500 IRTemp op2 = newTemp(Ity_F32);
8501 IRTemp result = newTemp(Ity_F32);
8502
8503 assign(op1, get_fpr_w0(r1));
8504 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8505 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8506 mkexpr(op2)));
8507 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8508 put_fpr_w0(r1, mkexpr(result));
8509
8510 return "seb";
8511}
8512
8513static HChar *
8514s390_irgen_SDB(UChar r1, IRTemp op2addr)
8515{
8516 IRTemp op1 = newTemp(Ity_F64);
8517 IRTemp op2 = newTemp(Ity_F64);
8518 IRTemp result = newTemp(Ity_F64);
8519
8520 assign(op1, get_fpr_dw0(r1));
8521 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8522 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8523 mkexpr(op2)));
8524 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8525 put_fpr_dw0(r1, mkexpr(result));
8526
8527 return "sdb";
8528}
8529
8530
8531static HChar *
8532s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8533{
florian79e839e2012-05-05 02:20:30 +00008534 IRTemp len = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00008535
florian79e839e2012-05-05 02:20:30 +00008536 assign(len, mkU64(length));
8537 s390_irgen_CLC_EX(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00008538 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00008539
8540 return "clc";
8541}
8542
8543static HChar *
florianb0c9a132011-09-08 15:37:39 +00008544s390_irgen_CLCL(UChar r1, UChar r2)
8545{
8546 IRTemp addr1 = newTemp(Ity_I64);
8547 IRTemp addr2 = newTemp(Ity_I64);
8548 IRTemp addr1_load = newTemp(Ity_I64);
8549 IRTemp addr2_load = newTemp(Ity_I64);
8550 IRTemp len1 = newTemp(Ity_I32);
8551 IRTemp len2 = newTemp(Ity_I32);
8552 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
8553 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
8554 IRTemp single1 = newTemp(Ity_I8);
8555 IRTemp single2 = newTemp(Ity_I8);
8556 IRTemp pad = newTemp(Ity_I8);
8557
8558 assign(addr1, get_gpr_dw0(r1));
8559 assign(r1p1, get_gpr_w1(r1 + 1));
8560 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
8561 assign(addr2, get_gpr_dw0(r2));
8562 assign(r2p1, get_gpr_w1(r2 + 1));
8563 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
8564 assign(pad, get_gpr_b4(r2 + 1));
8565
8566 /* len1 == 0 and len2 == 0? Exit */
8567 s390_cc_set(0);
8568 if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1),
8569 mkexpr(len2)), mkU32(0)),
8570 guest_IA_next_instr);
8571
8572 /* Because mkite evaluates both the then-clause and the else-clause
8573 we cannot load directly from addr1 here. If len1 is 0, then adddr1
8574 may be NULL and loading from there would segfault. So we provide a
8575 valid dummy address in that case. Loading from there does no harm and
8576 the value will be discarded at runtime. */
8577 assign(addr1_load,
8578 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8579 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
8580 assign(single1,
8581 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8582 mkexpr(pad), load(Ity_I8, mkexpr(addr1_load))));
8583
8584 assign(addr2_load,
8585 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8586 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
8587 assign(single2,
8588 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8589 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
8590
8591 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False);
8592 /* Fields differ ? */
8593 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)),
8594 guest_IA_next_instr);
8595
8596 /* Update len1 and addr1, unless len1 == 0. */
8597 put_gpr_dw0(r1,
8598 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8599 mkexpr(addr1),
8600 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
8601
8602 /* When updating len1 we must not modify bits (r1+1)[0:39] */
8603 put_gpr_w1(r1 + 1,
8604 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8605 binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)),
8606 binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))));
8607
8608 /* Update len2 and addr2, unless len2 == 0. */
8609 put_gpr_dw0(r2,
8610 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8611 mkexpr(addr2),
8612 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
8613
8614 /* When updating len2 we must not modify bits (r2+1)[0:39] */
8615 put_gpr_w1(r2 + 1,
8616 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8617 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
8618 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
8619
8620 always_goto_and_chase(guest_IA_curr_instr);
8621
8622 return "clcl";
8623}
8624
8625static HChar *
sewardj2019a972011-03-07 16:04:07 +00008626s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8627{
8628 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8629
8630 addr1 = newTemp(Ity_I64);
8631 addr3 = newTemp(Ity_I64);
8632 addr1_load = newTemp(Ity_I64);
8633 addr3_load = newTemp(Ity_I64);
8634 len1 = newTemp(Ity_I64);
8635 len3 = newTemp(Ity_I64);
8636 single1 = newTemp(Ity_I8);
8637 single3 = newTemp(Ity_I8);
8638
8639 assign(addr1, get_gpr_dw0(r1));
8640 assign(len1, get_gpr_dw0(r1 + 1));
8641 assign(addr3, get_gpr_dw0(r3));
8642 assign(len3, get_gpr_dw0(r3 + 1));
8643
8644 /* len1 == 0 and len3 == 0? Exit */
8645 s390_cc_set(0);
8646 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8647 mkexpr(len3)), mkU64(0)),
8648 guest_IA_next_instr);
8649
8650 /* A mux requires both ways to be possible. This is a way to prevent clcle
8651 from reading from addr1 if it should read from the pad. Since the pad
8652 has no address, just read from the instruction, we discard that anyway */
8653 assign(addr1_load,
florian6ad49522011-09-09 02:38:55 +00008654 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8655 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
sewardj2019a972011-03-07 16:04:07 +00008656
8657 /* same for addr3 */
8658 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00008659 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8660 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00008661
8662 assign(single1,
florian6ad49522011-09-09 02:38:55 +00008663 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8664 unop(Iop_64to8, mkexpr(pad2)),
8665 load(Ity_I8, mkexpr(addr1_load))));
sewardj2019a972011-03-07 16:04:07 +00008666
8667 assign(single3,
florian6ad49522011-09-09 02:38:55 +00008668 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8669 unop(Iop_64to8, mkexpr(pad2)),
8670 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00008671
8672 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8673 /* Both fields differ ? */
8674 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8675 guest_IA_next_instr);
8676
8677 /* If a length in 0 we must not change this length and the address */
8678 put_gpr_dw0(r1,
florian6ad49522011-09-09 02:38:55 +00008679 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8680 mkexpr(addr1),
8681 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008682
8683 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +00008684 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8685 mkU64(0), binop(Iop_Sub64, mkexpr(len1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008686
8687 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00008688 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8689 mkexpr(addr3),
8690 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008691
8692 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00008693 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8694 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008695
floriana64c2432011-07-16 02:11:50 +00008696 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00008697
8698 return "clcle";
8699}
floriana64c2432011-07-16 02:11:50 +00008700
florianb0bf6602012-05-05 00:01:16 +00008701
sewardj2019a972011-03-07 16:04:07 +00008702static void
8703s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8704{
florianb0bf6602012-05-05 00:01:16 +00008705 s390_irgen_xonc(Iop_Xor8, length, start1, start2);
8706}
sewardj2019a972011-03-07 16:04:07 +00008707
sewardj2019a972011-03-07 16:04:07 +00008708
florianb0bf6602012-05-05 00:01:16 +00008709static void
8710s390_irgen_NC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8711{
8712 s390_irgen_xonc(Iop_And8, length, start1, start2);
8713}
sewardj2019a972011-03-07 16:04:07 +00008714
sewardj2019a972011-03-07 16:04:07 +00008715
florianb0bf6602012-05-05 00:01:16 +00008716static void
8717s390_irgen_OC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8718{
8719 s390_irgen_xonc(Iop_Or8, length, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00008720}
8721
8722
8723static void
8724s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8725{
8726 IRTemp current1 = newTemp(Ity_I8);
8727 IRTemp current2 = newTemp(Ity_I8);
8728 IRTemp counter = newTemp(Ity_I64);
8729
8730 assign(counter, get_counter_dw0());
8731 put_counter_dw0(mkU64(0));
8732
8733 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8734 mkexpr(counter))));
8735 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8736 mkexpr(counter))));
8737 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8738 False);
8739
8740 /* Both fields differ ? */
8741 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8742 guest_IA_next_instr);
8743
8744 /* Check for end of field */
8745 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8746 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8747 guest_IA_curr_instr);
8748 put_counter_dw0(mkU64(0));
8749}
8750
8751static void
8752s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8753{
8754 IRTemp counter = newTemp(Ity_I64);
8755
8756 assign(counter, get_counter_dw0());
8757
8758 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8759 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8760
8761 /* Check for end of field */
8762 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8763 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8764 guest_IA_curr_instr);
8765 put_counter_dw0(mkU64(0));
8766}
8767
florianf87d4fb2012-05-05 02:55:24 +00008768static void
8769s390_irgen_TR_EX(IRTemp length, IRTemp start1, IRTemp start2)
8770{
8771 IRTemp op = newTemp(Ity_I8);
8772 IRTemp op1 = newTemp(Ity_I8);
8773 IRTemp result = newTemp(Ity_I64);
8774 IRTemp counter = newTemp(Ity_I64);
8775
8776 assign(counter, get_counter_dw0());
8777
8778 assign(op, load(Ity_I8, binop(Iop_Add64, mkexpr(start1), mkexpr(counter))));
8779
8780 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)), mkexpr(start2)));
8781
8782 assign(op1, load(Ity_I8, mkexpr(result)));
8783 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)), mkexpr(op1));
8784
8785 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8786 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8787 guest_IA_curr_instr);
8788 put_counter_dw0(mkU64(0));
8789}
sewardj2019a972011-03-07 16:04:07 +00008790
8791
8792static void
8793s390_irgen_EX_SS(UChar r, IRTemp addr2,
8794void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8795{
8796 struct SS {
8797 unsigned int op : 8;
8798 unsigned int l : 8;
8799 unsigned int b1 : 4;
8800 unsigned int d1 : 12;
8801 unsigned int b2 : 4;
8802 unsigned int d2 : 12;
8803 };
8804 union {
8805 struct SS dec;
8806 unsigned long bytes;
8807 } ss;
8808 IRTemp cond;
8809 IRDirty *d;
8810 IRTemp torun;
8811
8812 IRTemp start1 = newTemp(Ity_I64);
8813 IRTemp start2 = newTemp(Ity_I64);
8814 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8815 cond = newTemp(Ity_I1);
8816 torun = newTemp(Ity_I64);
8817
8818 assign(torun, load(Ity_I64, mkexpr(addr2)));
8819 /* Start with a check that the saved code is still correct */
8820 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8821 /* If not, save the new value */
8822 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8823 mkIRExprVec_1(mkexpr(torun)));
8824 d->guard = mkexpr(cond);
8825 stmt(IRStmt_Dirty(d));
8826
8827 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008828 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8829 mkU64(guest_IA_curr_instr)));
8830 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008831 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval, IRConst_U64(guest_IA_curr_instr),
8832 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008833
8834 ss.bytes = last_execute_target;
8835 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8836 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8837 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8838 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8839 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8840 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8841 irgen(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00008842 dummy_put_IA();
8843
sewardj2019a972011-03-07 16:04:07 +00008844 last_execute_target = 0;
8845}
8846
8847static HChar *
8848s390_irgen_EX(UChar r1, IRTemp addr2)
8849{
8850 switch(last_execute_target & 0xff00000000000000ULL) {
8851 case 0:
8852 {
8853 /* no code information yet */
8854 IRDirty *d;
8855
8856 /* so safe the code... */
8857 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8858 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8859 stmt(IRStmt_Dirty(d));
8860 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008861 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8862 mkU64(guest_IA_curr_instr)));
8863 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008864 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8865 IRConst_U64(guest_IA_curr_instr),
8866 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008867 /* we know that this will be invalidated */
florianf9e1ed72012-04-17 02:41:56 +00008868 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +00008869 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +00008870 dis_res->jk_StopHere = Ijk_TInval;
sewardj2019a972011-03-07 16:04:07 +00008871 break;
8872 }
8873
8874 case 0xd200000000000000ULL:
8875 /* special case MVC */
8876 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8877 return "mvc via ex";
8878
8879 case 0xd500000000000000ULL:
8880 /* special case CLC */
8881 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8882 return "clc via ex";
8883
8884 case 0xd700000000000000ULL:
8885 /* special case XC */
8886 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8887 return "xc via ex";
8888
florianb0bf6602012-05-05 00:01:16 +00008889 case 0xd600000000000000ULL:
8890 /* special case OC */
8891 s390_irgen_EX_SS(r1, addr2, s390_irgen_OC_EX, 32);
8892 return "oc via ex";
8893
8894 case 0xd400000000000000ULL:
8895 /* special case NC */
8896 s390_irgen_EX_SS(r1, addr2, s390_irgen_NC_EX, 32);
8897 return "nc via ex";
sewardj2019a972011-03-07 16:04:07 +00008898
florianf87d4fb2012-05-05 02:55:24 +00008899 case 0xdc00000000000000ULL:
8900 /* special case TR */
8901 s390_irgen_EX_SS(r1, addr2, s390_irgen_TR_EX, 64);
8902 return "tr via ex";
8903
sewardj2019a972011-03-07 16:04:07 +00008904 default:
8905 {
8906 /* everything else will get a self checking prefix that also checks the
8907 register content */
8908 IRDirty *d;
8909 UChar *bytes;
8910 IRTemp cond;
8911 IRTemp orperand;
8912 IRTemp torun;
8913
8914 cond = newTemp(Ity_I1);
8915 orperand = newTemp(Ity_I64);
8916 torun = newTemp(Ity_I64);
8917
8918 if (r1 == 0)
8919 assign(orperand, mkU64(0));
8920 else
8921 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8922 /* This code is going to be translated */
8923 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8924 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8925
8926 /* Start with a check that saved code is still correct */
8927 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8928 mkU64(last_execute_target)));
8929 /* If not, save the new value */
8930 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8931 mkIRExprVec_1(mkexpr(torun)));
8932 d->guard = mkexpr(cond);
8933 stmt(IRStmt_Dirty(d));
8934
8935 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008936 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART), mkU64(guest_IA_curr_instr)));
8937 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008938 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8939 IRConst_U64(guest_IA_curr_instr),
8940 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008941
8942 /* Now comes the actual translation */
8943 bytes = (UChar *) &last_execute_target;
8944 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
8945 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00008946 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00008947 vex_printf(" which was executed by\n");
8948 /* dont make useless translations in the next execute */
8949 last_execute_target = 0;
florianf9e1ed72012-04-17 02:41:56 +00008950 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00008951 }
8952 }
8953 return "ex";
8954}
8955
8956static HChar *
8957s390_irgen_EXRL(UChar r1, UInt offset)
8958{
8959 IRTemp addr = newTemp(Ity_I64);
8960 /* we might save one round trip because we know the target */
8961 if (!last_execute_target)
8962 last_execute_target = *(ULong *)(HWord)
8963 (guest_IA_curr_instr + offset * 2UL);
8964 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
8965 s390_irgen_EX(r1, addr);
8966 return "exrl";
8967}
8968
8969static HChar *
8970s390_irgen_IPM(UChar r1)
8971{
8972 // As long as we dont support SPM, lets just assume 0 as program mask
8973 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
8974 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
8975
8976 return "ipm";
8977}
8978
8979
8980static HChar *
8981s390_irgen_SRST(UChar r1, UChar r2)
8982{
8983 IRTemp address = newTemp(Ity_I64);
8984 IRTemp next = newTemp(Ity_I64);
8985 IRTemp delim = newTemp(Ity_I8);
8986 IRTemp counter = newTemp(Ity_I64);
8987 IRTemp byte = newTemp(Ity_I8);
8988
8989 assign(address, get_gpr_dw0(r2));
8990 assign(next, get_gpr_dw0(r1));
8991
8992 assign(counter, get_counter_dw0());
8993 put_counter_dw0(mkU64(0));
8994
8995 // start = next? CC=2 and out r1 and r2 unchanged
8996 s390_cc_set(2);
8997 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
8998 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
8999 guest_IA_next_instr);
9000
9001 assign(byte, load(Ity_I8, mkexpr(address)));
9002 assign(delim, get_gpr_b7(0));
9003
9004 // byte = delim? CC=1, R1=address
9005 s390_cc_set(1);
9006 put_gpr_dw0(r1, mkexpr(address));
9007 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
9008 guest_IA_next_instr);
9009
9010 // else: all equal, no end yet, loop
9011 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9012 put_gpr_dw0(r1, mkexpr(next));
9013 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
floriancf87c942012-07-25 00:52:21 +00009014
9015 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00009016
9017 return "srst";
9018}
9019
9020static HChar *
9021s390_irgen_CLST(UChar r1, UChar r2)
9022{
9023 IRTemp address1 = newTemp(Ity_I64);
9024 IRTemp address2 = newTemp(Ity_I64);
9025 IRTemp end = newTemp(Ity_I8);
9026 IRTemp counter = newTemp(Ity_I64);
9027 IRTemp byte1 = newTemp(Ity_I8);
9028 IRTemp byte2 = newTemp(Ity_I8);
9029
9030 assign(address1, get_gpr_dw0(r1));
9031 assign(address2, get_gpr_dw0(r2));
9032 assign(end, get_gpr_b7(0));
9033 assign(counter, get_counter_dw0());
9034 put_counter_dw0(mkU64(0));
9035 assign(byte1, load(Ity_I8, mkexpr(address1)));
9036 assign(byte2, load(Ity_I8, mkexpr(address2)));
9037
9038 // end in both? all equal, reset r1 and r2 to start values
9039 s390_cc_set(0);
9040 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
9041 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
9042 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
9043 binop(Iop_Or8,
9044 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
9045 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
9046 guest_IA_next_instr);
9047
9048 put_gpr_dw0(r1, mkexpr(address1));
9049 put_gpr_dw0(r2, mkexpr(address2));
9050
9051 // End found in string1
9052 s390_cc_set(1);
9053 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
9054 guest_IA_next_instr);
9055
9056 // End found in string2
9057 s390_cc_set(2);
9058 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
9059 guest_IA_next_instr);
9060
9061 // string1 < string2
9062 s390_cc_set(1);
9063 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
9064 unop(Iop_8Uto32, mkexpr(byte2))),
9065 guest_IA_next_instr);
9066
9067 // string2 < string1
9068 s390_cc_set(2);
9069 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
9070 unop(Iop_8Uto32, mkexpr(byte1))),
9071 guest_IA_next_instr);
9072
9073 // else: all equal, no end yet, loop
9074 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9075 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
9076 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
floriancf87c942012-07-25 00:52:21 +00009077
9078 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00009079
9080 return "clst";
9081}
9082
9083static void
9084s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9085{
9086 UChar reg;
9087 IRTemp addr = newTemp(Ity_I64);
9088
9089 assign(addr, mkexpr(op2addr));
9090 reg = r1;
9091 do {
9092 IRTemp old = addr;
9093
9094 reg %= 16;
9095 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9096 addr = newTemp(Ity_I64);
9097 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9098 reg++;
9099 } while (reg != (r3 + 1));
9100}
9101
9102static HChar *
9103s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9104{
9105 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9106
9107 return "lm";
9108}
9109
9110static HChar *
9111s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9112{
9113 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9114
9115 return "lmy";
9116}
9117
9118static HChar *
9119s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9120{
9121 UChar reg;
9122 IRTemp addr = newTemp(Ity_I64);
9123
9124 assign(addr, mkexpr(op2addr));
9125 reg = r1;
9126 do {
9127 IRTemp old = addr;
9128
9129 reg %= 16;
9130 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9131 addr = newTemp(Ity_I64);
9132 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9133 reg++;
9134 } while (reg != (r3 + 1));
9135
9136 return "lmh";
9137}
9138
9139static HChar *
9140s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9141{
9142 UChar reg;
9143 IRTemp addr = newTemp(Ity_I64);
9144
9145 assign(addr, mkexpr(op2addr));
9146 reg = r1;
9147 do {
9148 IRTemp old = addr;
9149
9150 reg %= 16;
9151 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9152 addr = newTemp(Ity_I64);
9153 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9154 reg++;
9155 } while (reg != (r3 + 1));
9156
9157 return "lmg";
9158}
9159
9160static void
9161s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9162{
9163 UChar reg;
9164 IRTemp addr = newTemp(Ity_I64);
9165
9166 assign(addr, mkexpr(op2addr));
9167 reg = r1;
9168 do {
9169 IRTemp old = addr;
9170
9171 reg %= 16;
9172 store(mkexpr(addr), get_gpr_w1(reg));
9173 addr = newTemp(Ity_I64);
9174 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9175 reg++;
9176 } while( reg != (r3 + 1));
9177}
9178
9179static HChar *
9180s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9181{
9182 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9183
9184 return "stm";
9185}
9186
9187static HChar *
9188s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9189{
9190 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9191
9192 return "stmy";
9193}
9194
9195static HChar *
9196s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9197{
9198 UChar reg;
9199 IRTemp addr = newTemp(Ity_I64);
9200
9201 assign(addr, mkexpr(op2addr));
9202 reg = r1;
9203 do {
9204 IRTemp old = addr;
9205
9206 reg %= 16;
9207 store(mkexpr(addr), get_gpr_w0(reg));
9208 addr = newTemp(Ity_I64);
9209 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9210 reg++;
9211 } while( reg != (r3 + 1));
9212
9213 return "stmh";
9214}
9215
9216static HChar *
9217s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9218{
9219 UChar reg;
9220 IRTemp addr = newTemp(Ity_I64);
9221
9222 assign(addr, mkexpr(op2addr));
9223 reg = r1;
9224 do {
9225 IRTemp old = addr;
9226
9227 reg %= 16;
9228 store(mkexpr(addr), get_gpr_dw0(reg));
9229 addr = newTemp(Ity_I64);
9230 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9231 reg++;
9232 } while( reg != (r3 + 1));
9233
9234 return "stmg";
9235}
9236
9237static void
florianb0bf6602012-05-05 00:01:16 +00009238s390_irgen_xonc(IROp op, IRTemp length, IRTemp start1, IRTemp start2)
sewardj2019a972011-03-07 16:04:07 +00009239{
9240 IRTemp old1 = newTemp(Ity_I8);
9241 IRTemp old2 = newTemp(Ity_I8);
9242 IRTemp new1 = newTemp(Ity_I8);
9243 IRTemp counter = newTemp(Ity_I32);
9244 IRTemp addr1 = newTemp(Ity_I64);
9245
9246 assign(counter, get_counter_w0());
9247
9248 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9249 unop(Iop_32Uto64, mkexpr(counter))));
9250
9251 assign(old1, load(Ity_I8, mkexpr(addr1)));
9252 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9253 unop(Iop_32Uto64,mkexpr(counter)))));
9254 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9255
9256 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009257 if (op == Iop_Xor8) {
9258 store(mkexpr(addr1),
florian6ad49522011-09-09 02:38:55 +00009259 mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
9260 mkU8(0), mkexpr(new1)));
sewardj2019a972011-03-07 16:04:07 +00009261 } else
9262 store(mkexpr(addr1), mkexpr(new1));
9263 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9264 get_counter_w1()));
9265
9266 /* Check for end of field */
9267 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
florianb0bf6602012-05-05 00:01:16 +00009268 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
sewardj2019a972011-03-07 16:04:07 +00009269 guest_IA_curr_instr);
9270 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9271 False);
9272 put_counter_dw0(mkU64(0));
9273}
9274
9275static HChar *
9276s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9277{
florianb0bf6602012-05-05 00:01:16 +00009278 IRTemp len = newTemp(Ity_I32);
9279
9280 assign(len, mkU32(length));
9281 s390_irgen_xonc(Iop_Xor8, len, start1, start2);
florian79e839e2012-05-05 02:20:30 +00009282 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009283
9284 return "xc";
9285}
9286
sewardjb63967e2011-03-24 08:50:04 +00009287static void
9288s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9289{
9290 IRTemp counter = newTemp(Ity_I32);
9291 IRTemp start = newTemp(Ity_I64);
9292 IRTemp addr = newTemp(Ity_I64);
9293
9294 assign(start,
9295 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9296
9297 if (length < 8) {
9298 UInt i;
9299
9300 for (i = 0; i <= length; ++i) {
9301 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9302 }
9303 } else {
9304 assign(counter, get_counter_w0());
9305
9306 assign(addr, binop(Iop_Add64, mkexpr(start),
9307 unop(Iop_32Uto64, mkexpr(counter))));
9308
9309 store(mkexpr(addr), mkU8(0));
9310
9311 /* Check for end of field */
9312 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9313 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9314 guest_IA_curr_instr);
9315
9316 /* Reset counter */
9317 put_counter_dw0(mkU64(0));
9318 }
9319
9320 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
florianf9e1ed72012-04-17 02:41:56 +00009321 dummy_put_IA();
sewardjb63967e2011-03-24 08:50:04 +00009322
sewardj7ee97522011-05-09 21:45:04 +00009323 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009324 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9325}
9326
sewardj2019a972011-03-07 16:04:07 +00009327static HChar *
9328s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9329{
florianb0bf6602012-05-05 00:01:16 +00009330 IRTemp len = newTemp(Ity_I32);
9331
9332 assign(len, mkU32(length));
9333 s390_irgen_xonc(Iop_And8, len, start1, start2);
florian79e839e2012-05-05 02:20:30 +00009334 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009335
9336 return "nc";
9337}
9338
9339static HChar *
9340s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9341{
florianb0bf6602012-05-05 00:01:16 +00009342 IRTemp len = newTemp(Ity_I32);
9343
9344 assign(len, mkU32(length));
9345 s390_irgen_xonc(Iop_Or8, len, start1, start2);
florian79e839e2012-05-05 02:20:30 +00009346 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009347
9348 return "oc";
9349}
9350
9351
9352static HChar *
9353s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9354{
florian79e839e2012-05-05 02:20:30 +00009355 IRTemp len = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00009356
florian79e839e2012-05-05 02:20:30 +00009357 assign(len, mkU64(length));
9358 s390_irgen_MVC_EX(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00009359 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009360
9361 return "mvc";
9362}
9363
9364static HChar *
florianb0c9a132011-09-08 15:37:39 +00009365s390_irgen_MVCL(UChar r1, UChar r2)
9366{
9367 IRTemp addr1 = newTemp(Ity_I64);
9368 IRTemp addr2 = newTemp(Ity_I64);
9369 IRTemp addr2_load = newTemp(Ity_I64);
9370 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
9371 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
9372 IRTemp len1 = newTemp(Ity_I32);
9373 IRTemp len2 = newTemp(Ity_I32);
9374 IRTemp pad = newTemp(Ity_I8);
9375 IRTemp single = newTemp(Ity_I8);
9376
9377 assign(addr1, get_gpr_dw0(r1));
9378 assign(r1p1, get_gpr_w1(r1 + 1));
9379 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
9380 assign(addr2, get_gpr_dw0(r2));
9381 assign(r2p1, get_gpr_w1(r2 + 1));
9382 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
9383 assign(pad, get_gpr_b4(r2 + 1));
9384
9385 /* len1 == 0 ? */
9386 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9387 if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
9388 guest_IA_next_instr);
9389
9390 /* Check for destructive overlap:
9391 addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */
9392 s390_cc_set(3);
9393 IRTemp cond1 = newTemp(Ity_I32);
9394 assign(cond1, unop(Iop_1Uto32,
9395 binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1))));
9396 IRTemp cond2 = newTemp(Ity_I32);
9397 assign(cond2, unop(Iop_1Uto32,
9398 binop(Iop_CmpLT64U, mkexpr(addr1),
9399 binop(Iop_Add64, mkexpr(addr2),
9400 unop(Iop_32Uto64, mkexpr(len1))))));
9401 IRTemp cond3 = newTemp(Ity_I32);
9402 assign(cond3, unop(Iop_1Uto32,
9403 binop(Iop_CmpLT64U,
9404 mkexpr(addr1),
9405 binop(Iop_Add64, mkexpr(addr2),
9406 unop(Iop_32Uto64, mkexpr(len2))))));
9407
9408 if_condition_goto(binop(Iop_CmpEQ32,
9409 binop(Iop_And32,
9410 binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)),
9411 mkexpr(cond3)),
9412 mkU32(1)),
9413 guest_IA_next_instr);
9414
9415 /* See s390_irgen_CLCL for explanation why we cannot load directly
9416 and need two steps. */
9417 assign(addr2_load,
9418 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9419 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
9420 assign(single,
9421 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9422 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
9423
9424 store(mkexpr(addr1), mkexpr(single));
9425
9426 /* Update addr1 and len1 */
9427 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9428 put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)));
9429
9430 /* Update addr2 and len2 */
9431 put_gpr_dw0(r2,
9432 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9433 mkexpr(addr2),
9434 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
9435
9436 /* When updating len2 we must not modify bits (r2+1)[0:39] */
9437 put_gpr_w1(r2 + 1,
9438 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9439 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
9440 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
9441
9442 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9443 if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)),
9444 guest_IA_curr_instr);
9445
9446 return "mvcl";
9447}
9448
9449
9450static HChar *
sewardj2019a972011-03-07 16:04:07 +00009451s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9452{
9453 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9454
9455 addr1 = newTemp(Ity_I64);
9456 addr3 = newTemp(Ity_I64);
9457 addr3_load = newTemp(Ity_I64);
9458 len1 = newTemp(Ity_I64);
9459 len3 = newTemp(Ity_I64);
9460 single = newTemp(Ity_I8);
9461
9462 assign(addr1, get_gpr_dw0(r1));
9463 assign(len1, get_gpr_dw0(r1 + 1));
9464 assign(addr3, get_gpr_dw0(r3));
9465 assign(len3, get_gpr_dw0(r3 + 1));
9466
9467 // len1 == 0 ?
9468 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9469 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9470 guest_IA_next_instr);
9471
9472 /* This is a hack to prevent mvcle from reading from addr3 if it
9473 should read from the pad. Since the pad has no address, just
9474 read from the instruction, we discard that anyway */
9475 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00009476 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9477 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00009478
9479 assign(single,
florian6ad49522011-09-09 02:38:55 +00009480 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9481 unop(Iop_64to8, mkexpr(pad2)),
9482 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00009483 store(mkexpr(addr1), mkexpr(single));
9484
9485 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9486
9487 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9488
9489 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00009490 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9491 mkexpr(addr3),
9492 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009493
9494 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00009495 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9496 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009497
9498 /* We should set CC=3 (faked by overflow add) and leave after
9499 a maximum of ~4096 bytes have been processed. This is simpler:
9500 we leave whenever (len1 % 4096) == 0 */
9501 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
sewardj2019a972011-03-07 16:04:07 +00009502 mktemp(Ity_I64, mkU64(-1ULL)), False);
9503 if_condition_goto(binop(Iop_CmpEQ64,
9504 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9505 mkU64(0)),
9506 guest_IA_next_instr);
9507
9508 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9509 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9510 guest_IA_curr_instr);
9511
9512 return "mvcle";
9513}
9514
9515static HChar *
9516s390_irgen_MVST(UChar r1, UChar r2)
9517{
9518 IRTemp addr1 = newTemp(Ity_I64);
9519 IRTemp addr2 = newTemp(Ity_I64);
9520 IRTemp end = newTemp(Ity_I8);
9521 IRTemp byte = newTemp(Ity_I8);
9522 IRTemp counter = newTemp(Ity_I64);
9523
9524 assign(addr1, get_gpr_dw0(r1));
9525 assign(addr2, get_gpr_dw0(r2));
9526 assign(counter, get_counter_dw0());
9527 assign(end, get_gpr_b7(0));
9528 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9529 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9530
9531 // We use unlimited as cpu-determined number
9532 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9533 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9534 guest_IA_curr_instr);
9535
9536 // and always set cc=1 at the end + update r1
9537 s390_cc_set(1);
9538 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9539 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009540 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009541
9542 return "mvst";
9543}
9544
9545static void
9546s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9547{
9548 IRTemp op1 = newTemp(Ity_I64);
9549 IRTemp result = newTemp(Ity_I64);
9550
9551 assign(op1, binop(Iop_32HLto64,
9552 get_gpr_w1(r1), // high 32 bits
9553 get_gpr_w1(r1 + 1))); // low 32 bits
9554 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9555 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9556 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9557}
9558
9559static void
9560s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9561{
9562 IRTemp op1 = newTemp(Ity_I128);
9563 IRTemp result = newTemp(Ity_I128);
9564
9565 assign(op1, binop(Iop_64HLto128,
9566 get_gpr_dw0(r1), // high 64 bits
9567 get_gpr_dw0(r1 + 1))); // low 64 bits
9568 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9569 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9570 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9571}
9572
9573static void
9574s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9575{
9576 IRTemp op1 = newTemp(Ity_I64);
9577 IRTemp result = newTemp(Ity_I128);
9578
9579 assign(op1, get_gpr_dw0(r1 + 1));
9580 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9581 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9582 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9583}
9584
9585static HChar *
9586s390_irgen_DR(UChar r1, UChar r2)
9587{
9588 IRTemp op2 = newTemp(Ity_I32);
9589
9590 assign(op2, get_gpr_w1(r2));
9591
9592 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9593
9594 return "dr";
9595}
9596
9597static HChar *
9598s390_irgen_D(UChar r1, IRTemp op2addr)
9599{
9600 IRTemp op2 = newTemp(Ity_I32);
9601
9602 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9603
9604 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9605
9606 return "d";
9607}
9608
9609static HChar *
9610s390_irgen_DLR(UChar r1, UChar r2)
9611{
9612 IRTemp op2 = newTemp(Ity_I32);
9613
9614 assign(op2, get_gpr_w1(r2));
9615
9616 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9617
9618 return "dr";
9619}
9620
9621static HChar *
9622s390_irgen_DL(UChar r1, IRTemp op2addr)
9623{
9624 IRTemp op2 = newTemp(Ity_I32);
9625
9626 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9627
9628 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9629
9630 return "dl";
9631}
9632
9633static HChar *
9634s390_irgen_DLG(UChar r1, IRTemp op2addr)
9635{
9636 IRTemp op2 = newTemp(Ity_I64);
9637
9638 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9639
9640 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9641
9642 return "dlg";
9643}
9644
9645static HChar *
9646s390_irgen_DLGR(UChar r1, UChar r2)
9647{
9648 IRTemp op2 = newTemp(Ity_I64);
9649
9650 assign(op2, get_gpr_dw0(r2));
9651
9652 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9653
9654 return "dlgr";
9655}
9656
9657static HChar *
9658s390_irgen_DSGR(UChar r1, UChar r2)
9659{
9660 IRTemp op2 = newTemp(Ity_I64);
9661
9662 assign(op2, get_gpr_dw0(r2));
9663
9664 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9665
9666 return "dsgr";
9667}
9668
9669static HChar *
9670s390_irgen_DSG(UChar r1, IRTemp op2addr)
9671{
9672 IRTemp op2 = newTemp(Ity_I64);
9673
9674 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9675
9676 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9677
9678 return "dsg";
9679}
9680
9681static HChar *
9682s390_irgen_DSGFR(UChar r1, UChar r2)
9683{
9684 IRTemp op2 = newTemp(Ity_I64);
9685
9686 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9687
9688 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9689
9690 return "dsgfr";
9691}
9692
9693static HChar *
9694s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9695{
9696 IRTemp op2 = newTemp(Ity_I64);
9697
9698 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9699
9700 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9701
9702 return "dsgf";
9703}
9704
9705static void
9706s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9707{
9708 UChar reg;
9709 IRTemp addr = newTemp(Ity_I64);
9710
9711 assign(addr, mkexpr(op2addr));
9712 reg = r1;
9713 do {
9714 IRTemp old = addr;
9715
9716 reg %= 16;
9717 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9718 addr = newTemp(Ity_I64);
9719 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9720 reg++;
9721 } while (reg != (r3 + 1));
9722}
9723
9724static HChar *
9725s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9726{
9727 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9728
9729 return "lam";
9730}
9731
9732static HChar *
9733s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9734{
9735 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9736
9737 return "lamy";
9738}
9739
9740static void
9741s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9742{
9743 UChar reg;
9744 IRTemp addr = newTemp(Ity_I64);
9745
9746 assign(addr, mkexpr(op2addr));
9747 reg = r1;
9748 do {
9749 IRTemp old = addr;
9750
9751 reg %= 16;
9752 store(mkexpr(addr), get_ar_w0(reg));
9753 addr = newTemp(Ity_I64);
9754 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9755 reg++;
9756 } while (reg != (r3 + 1));
9757}
9758
9759static HChar *
9760s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9761{
9762 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9763
9764 return "stam";
9765}
9766
9767static HChar *
9768s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9769{
9770 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9771
9772 return "stamy";
9773}
9774
9775
9776/* Implementation for 32-bit compare-and-swap */
9777static void
9778s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9779{
9780 IRCAS *cas;
9781 IRTemp op1 = newTemp(Ity_I32);
9782 IRTemp old_mem = newTemp(Ity_I32);
9783 IRTemp op3 = newTemp(Ity_I32);
9784 IRTemp result = newTemp(Ity_I32);
9785 IRTemp nequal = newTemp(Ity_I1);
9786
9787 assign(op1, get_gpr_w1(r1));
9788 assign(op3, get_gpr_w1(r3));
9789
9790 /* The first and second operands are compared. If they are equal,
9791 the third operand is stored at the second- operand location. */
9792 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9793 Iend_BE, mkexpr(op2addr),
9794 NULL, mkexpr(op1), /* expected value */
9795 NULL, mkexpr(op3) /* new value */);
9796 stmt(IRStmt_CAS(cas));
9797
9798 /* Set CC. Operands compared equal -> 0, else 1. */
9799 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9800 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9801
9802 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9803 Otherwise, store the old_value from memory in r1 and yield. */
9804 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9805 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009806 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9807 IRConst_U64(guest_IA_next_instr),
9808 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009809}
9810
9811static HChar *
9812s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9813{
9814 s390_irgen_cas_32(r1, r3, op2addr);
9815
9816 return "cs";
9817}
9818
9819static HChar *
9820s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9821{
9822 s390_irgen_cas_32(r1, r3, op2addr);
9823
9824 return "csy";
9825}
9826
9827static HChar *
9828s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9829{
9830 IRCAS *cas;
9831 IRTemp op1 = newTemp(Ity_I64);
9832 IRTemp old_mem = newTemp(Ity_I64);
9833 IRTemp op3 = newTemp(Ity_I64);
9834 IRTemp result = newTemp(Ity_I64);
9835 IRTemp nequal = newTemp(Ity_I1);
9836
9837 assign(op1, get_gpr_dw0(r1));
9838 assign(op3, get_gpr_dw0(r3));
9839
9840 /* The first and second operands are compared. If they are equal,
9841 the third operand is stored at the second- operand location. */
9842 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9843 Iend_BE, mkexpr(op2addr),
9844 NULL, mkexpr(op1), /* expected value */
9845 NULL, mkexpr(op3) /* new value */);
9846 stmt(IRStmt_CAS(cas));
9847
9848 /* Set CC. Operands compared equal -> 0, else 1. */
9849 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9850 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9851
9852 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9853 Otherwise, store the old_value from memory in r1 and yield. */
9854 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9855 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009856 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9857 IRConst_U64(guest_IA_next_instr),
9858 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009859
9860 return "csg";
9861}
9862
florian448cbba2012-06-06 02:26:01 +00009863/* Implementation for 32-bit compare-double-and-swap */
9864static void
9865s390_irgen_cdas_32(UChar r1, UChar r3, IRTemp op2addr)
9866{
9867 IRCAS *cas;
9868 IRTemp op1_high = newTemp(Ity_I32);
9869 IRTemp op1_low = newTemp(Ity_I32);
9870 IRTemp old_mem_high = newTemp(Ity_I32);
9871 IRTemp old_mem_low = newTemp(Ity_I32);
9872 IRTemp op3_high = newTemp(Ity_I32);
9873 IRTemp op3_low = newTemp(Ity_I32);
9874 IRTemp result = newTemp(Ity_I32);
9875 IRTemp nequal = newTemp(Ity_I1);
9876
9877 assign(op1_high, get_gpr_w1(r1));
9878 assign(op1_low, get_gpr_w1(r1+1));
9879 assign(op3_high, get_gpr_w1(r3));
9880 assign(op3_low, get_gpr_w1(r3+1));
9881
9882 /* The first and second operands are compared. If they are equal,
9883 the third operand is stored at the second-operand location. */
9884 cas = mkIRCAS(old_mem_high, old_mem_low,
9885 Iend_BE, mkexpr(op2addr),
9886 mkexpr(op1_high), mkexpr(op1_low), /* expected value */
9887 mkexpr(op3_high), mkexpr(op3_low) /* new value */);
9888 stmt(IRStmt_CAS(cas));
9889
9890 /* Set CC. Operands compared equal -> 0, else 1. */
9891 assign(result, unop(Iop_1Uto32,
9892 binop(Iop_CmpNE32,
9893 binop(Iop_Or32,
9894 binop(Iop_Xor32, mkexpr(op1_high), mkexpr(old_mem_high)),
9895 binop(Iop_Xor32, mkexpr(op1_low), mkexpr(old_mem_low))),
9896 mkU32(0))));
9897
9898 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9899
9900 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9901 Otherwise, store the old_value from memory in r1 and yield. */
9902 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9903 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem_high), mkexpr(op1_high)));
9904 put_gpr_w1(r1+1, mkite(mkexpr(nequal), mkexpr(old_mem_low), mkexpr(op1_low)));
9905 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9906 IRConst_U64(guest_IA_next_instr),
9907 S390X_GUEST_OFFSET(guest_IA)));
9908}
9909
9910static HChar *
9911s390_irgen_CDS(UChar r1, UChar r3, IRTemp op2addr)
9912{
9913 s390_irgen_cdas_32(r1, r3, op2addr);
9914
9915 return "cds";
9916}
9917
9918static HChar *
9919s390_irgen_CDSY(UChar r1, UChar r3, IRTemp op2addr)
9920{
9921 s390_irgen_cdas_32(r1, r3, op2addr);
9922
9923 return "cdsy";
9924}
9925
9926static HChar *
9927s390_irgen_CDSG(UChar r1, UChar r3, IRTemp op2addr)
9928{
9929 IRCAS *cas;
9930 IRTemp op1_high = newTemp(Ity_I64);
9931 IRTemp op1_low = newTemp(Ity_I64);
9932 IRTemp old_mem_high = newTemp(Ity_I64);
9933 IRTemp old_mem_low = newTemp(Ity_I64);
9934 IRTemp op3_high = newTemp(Ity_I64);
9935 IRTemp op3_low = newTemp(Ity_I64);
9936 IRTemp result = newTemp(Ity_I64);
9937 IRTemp nequal = newTemp(Ity_I1);
9938
9939 assign(op1_high, get_gpr_dw0(r1));
9940 assign(op1_low, get_gpr_dw0(r1+1));
9941 assign(op3_high, get_gpr_dw0(r3));
9942 assign(op3_low, get_gpr_dw0(r3+1));
9943
9944 /* The first and second operands are compared. If they are equal,
9945 the third operand is stored at the second-operand location. */
9946 cas = mkIRCAS(old_mem_high, old_mem_low,
9947 Iend_BE, mkexpr(op2addr),
9948 mkexpr(op1_high), mkexpr(op1_low), /* expected value */
9949 mkexpr(op3_high), mkexpr(op3_low) /* new value */);
9950 stmt(IRStmt_CAS(cas));
9951
9952 /* Set CC. Operands compared equal -> 0, else 1. */
9953 assign(result, unop(Iop_1Uto64,
9954 binop(Iop_CmpNE64,
9955 binop(Iop_Or64,
9956 binop(Iop_Xor64, mkexpr(op1_high), mkexpr(old_mem_high)),
9957 binop(Iop_Xor64, mkexpr(op1_low), mkexpr(old_mem_low))),
9958 mkU64(0))));
9959
9960 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9961
9962 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9963 Otherwise, store the old_value from memory in r1 and yield. */
9964 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9965 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem_high), mkexpr(op1_high)));
9966 put_gpr_dw0(r1+1, mkite(mkexpr(nequal), mkexpr(old_mem_low), mkexpr(op1_low)));
9967 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9968 IRConst_U64(guest_IA_next_instr),
9969 S390X_GUEST_OFFSET(guest_IA)));
9970 return "cdsg";
9971}
9972
sewardj2019a972011-03-07 16:04:07 +00009973
9974/* Binary floating point */
9975
9976static HChar *
9977s390_irgen_AXBR(UChar r1, UChar r2)
9978{
9979 IRTemp op1 = newTemp(Ity_F128);
9980 IRTemp op2 = newTemp(Ity_F128);
9981 IRTemp result = newTemp(Ity_F128);
9982
9983 assign(op1, get_fpr_pair(r1));
9984 assign(op2, get_fpr_pair(r2));
9985 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9986 mkexpr(op2)));
9987 put_fpr_pair(r1, mkexpr(result));
9988
9989 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9990
9991 return "axbr";
9992}
9993
9994/* The result of a Iop_CmdFxx operation is a condition code. It is
9995 encoded using the values defined in type IRCmpFxxResult.
9996 Before we can store the condition code into the guest state (or do
9997 anything else with it for that matter) we need to convert it to
9998 the encoding that s390 uses. This is what this function does.
9999
10000 s390 VEX b6 b2 b0 cc.1 cc.0
10001 0 0x40 EQ 1 0 0 0 0
10002 1 0x01 LT 0 0 1 0 1
10003 2 0x00 GT 0 0 0 1 0
10004 3 0x45 Unordered 1 1 1 1 1
10005
10006 The following bits from the VEX encoding are interesting:
10007 b0, b2, b6 with b0 being the LSB. We observe:
10008
10009 cc.0 = b0;
10010 cc.1 = b2 | (~b0 & ~b6)
10011
10012 with cc being the s390 condition code.
10013*/
10014static IRExpr *
10015convert_vex_fpcc_to_s390(IRTemp vex_cc)
10016{
10017 IRTemp cc0 = newTemp(Ity_I32);
10018 IRTemp cc1 = newTemp(Ity_I32);
10019 IRTemp b0 = newTemp(Ity_I32);
10020 IRTemp b2 = newTemp(Ity_I32);
10021 IRTemp b6 = newTemp(Ity_I32);
10022
10023 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
10024 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
10025 mkU32(1)));
10026 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
10027 mkU32(1)));
10028
10029 assign(cc0, mkexpr(b0));
10030 assign(cc1, binop(Iop_Or32, mkexpr(b2),
10031 binop(Iop_And32,
10032 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
10033 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
10034 )));
10035
10036 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
10037}
10038
10039static HChar *
10040s390_irgen_CEBR(UChar r1, UChar r2)
10041{
10042 IRTemp op1 = newTemp(Ity_F32);
10043 IRTemp op2 = newTemp(Ity_F32);
10044 IRTemp cc_vex = newTemp(Ity_I32);
10045 IRTemp cc_s390 = newTemp(Ity_I32);
10046
10047 assign(op1, get_fpr_w0(r1));
10048 assign(op2, get_fpr_w0(r2));
10049 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10050
10051 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10052 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10053
10054 return "cebr";
10055}
10056
10057static HChar *
10058s390_irgen_CDBR(UChar r1, UChar r2)
10059{
10060 IRTemp op1 = newTemp(Ity_F64);
10061 IRTemp op2 = newTemp(Ity_F64);
10062 IRTemp cc_vex = newTemp(Ity_I32);
10063 IRTemp cc_s390 = newTemp(Ity_I32);
10064
10065 assign(op1, get_fpr_dw0(r1));
10066 assign(op2, get_fpr_dw0(r2));
10067 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10068
10069 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10070 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10071
10072 return "cdbr";
10073}
10074
10075static HChar *
10076s390_irgen_CXBR(UChar r1, UChar r2)
10077{
10078 IRTemp op1 = newTemp(Ity_F128);
10079 IRTemp op2 = newTemp(Ity_F128);
10080 IRTemp cc_vex = newTemp(Ity_I32);
10081 IRTemp cc_s390 = newTemp(Ity_I32);
10082
10083 assign(op1, get_fpr_pair(r1));
10084 assign(op2, get_fpr_pair(r2));
10085 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
10086
10087 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10088 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10089
10090 return "cxbr";
10091}
10092
10093static HChar *
10094s390_irgen_CEB(UChar r1, IRTemp op2addr)
10095{
10096 IRTemp op1 = newTemp(Ity_F32);
10097 IRTemp op2 = newTemp(Ity_F32);
10098 IRTemp cc_vex = newTemp(Ity_I32);
10099 IRTemp cc_s390 = newTemp(Ity_I32);
10100
10101 assign(op1, get_fpr_w0(r1));
10102 assign(op2, load(Ity_F32, mkexpr(op2addr)));
10103 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10104
10105 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10106 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10107
10108 return "ceb";
10109}
10110
10111static HChar *
10112s390_irgen_CDB(UChar r1, IRTemp op2addr)
10113{
10114 IRTemp op1 = newTemp(Ity_F64);
10115 IRTemp op2 = newTemp(Ity_F64);
10116 IRTemp cc_vex = newTemp(Ity_I32);
10117 IRTemp cc_s390 = newTemp(Ity_I32);
10118
10119 assign(op1, get_fpr_dw0(r1));
10120 assign(op2, load(Ity_F64, mkexpr(op2addr)));
10121 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10122
10123 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10124 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10125
10126 return "cdb";
10127}
10128
10129static HChar *
10130s390_irgen_CXFBR(UChar r1, UChar r2)
10131{
10132 IRTemp op2 = newTemp(Ity_I32);
10133
10134 assign(op2, get_gpr_w1(r2));
10135 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
10136
10137 return "cxfbr";
10138}
10139
10140static HChar *
10141s390_irgen_CXGBR(UChar r1, UChar r2)
10142{
10143 IRTemp op2 = newTemp(Ity_I64);
10144
10145 assign(op2, get_gpr_dw0(r2));
10146 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
10147
10148 return "cxgbr";
10149}
10150
10151static HChar *
10152s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
10153{
10154 IRTemp op = newTemp(Ity_F128);
10155 IRTemp result = newTemp(Ity_I32);
10156
10157 assign(op, get_fpr_pair(r2));
10158 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
10159 mkexpr(op)));
10160 put_gpr_w1(r1, mkexpr(result));
10161 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
10162
10163 return "cfxbr";
10164}
10165
10166static HChar *
10167s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
10168{
10169 IRTemp op = newTemp(Ity_F128);
10170 IRTemp result = newTemp(Ity_I64);
10171
10172 assign(op, get_fpr_pair(r2));
10173 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
10174 mkexpr(op)));
10175 put_gpr_dw0(r1, mkexpr(result));
10176 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
10177
10178 return "cgxbr";
10179}
10180
10181static HChar *
10182s390_irgen_DXBR(UChar r1, UChar r2)
10183{
10184 IRTemp op1 = newTemp(Ity_F128);
10185 IRTemp op2 = newTemp(Ity_F128);
10186 IRTemp result = newTemp(Ity_F128);
10187
10188 assign(op1, get_fpr_pair(r1));
10189 assign(op2, get_fpr_pair(r2));
10190 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10191 mkexpr(op2)));
10192 put_fpr_pair(r1, mkexpr(result));
10193
10194 return "dxbr";
10195}
10196
10197static HChar *
10198s390_irgen_LTXBR(UChar r1, UChar r2)
10199{
10200 IRTemp result = newTemp(Ity_F128);
10201
10202 assign(result, get_fpr_pair(r2));
10203 put_fpr_pair(r1, mkexpr(result));
10204 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10205
10206 return "ltxbr";
10207}
10208
10209static HChar *
10210s390_irgen_LCXBR(UChar r1, UChar r2)
10211{
10212 IRTemp result = newTemp(Ity_F128);
10213
10214 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
10215 put_fpr_pair(r1, mkexpr(result));
10216 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10217
10218 return "lcxbr";
10219}
10220
10221static HChar *
10222s390_irgen_LXDBR(UChar r1, UChar r2)
10223{
10224 IRTemp op = newTemp(Ity_F64);
10225
10226 assign(op, get_fpr_dw0(r2));
10227 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10228
10229 return "lxdbr";
10230}
10231
10232static HChar *
10233s390_irgen_LXEBR(UChar r1, UChar r2)
10234{
10235 IRTemp op = newTemp(Ity_F32);
10236
10237 assign(op, get_fpr_w0(r2));
10238 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10239
10240 return "lxebr";
10241}
10242
10243static HChar *
10244s390_irgen_LXDB(UChar r1, IRTemp op2addr)
10245{
10246 IRTemp op = newTemp(Ity_F64);
10247
10248 assign(op, load(Ity_F64, mkexpr(op2addr)));
10249 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10250
10251 return "lxdb";
10252}
10253
10254static HChar *
10255s390_irgen_LXEB(UChar r1, IRTemp op2addr)
10256{
10257 IRTemp op = newTemp(Ity_F32);
10258
10259 assign(op, load(Ity_F32, mkexpr(op2addr)));
10260 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10261
10262 return "lxeb";
10263}
10264
10265static HChar *
10266s390_irgen_LNEBR(UChar r1, UChar r2)
10267{
10268 IRTemp result = newTemp(Ity_F32);
10269
10270 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
10271 put_fpr_w0(r1, mkexpr(result));
10272 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10273
10274 return "lnebr";
10275}
10276
10277static HChar *
10278s390_irgen_LNDBR(UChar r1, UChar r2)
10279{
10280 IRTemp result = newTemp(Ity_F64);
10281
10282 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10283 put_fpr_dw0(r1, mkexpr(result));
10284 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10285
10286 return "lndbr";
10287}
10288
10289static HChar *
10290s390_irgen_LNXBR(UChar r1, UChar r2)
10291{
10292 IRTemp result = newTemp(Ity_F128);
10293
10294 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10295 put_fpr_pair(r1, mkexpr(result));
10296 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10297
10298 return "lnxbr";
10299}
10300
10301static HChar *
10302s390_irgen_LPEBR(UChar r1, UChar r2)
10303{
10304 IRTemp result = newTemp(Ity_F32);
10305
10306 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10307 put_fpr_w0(r1, mkexpr(result));
10308 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10309
10310 return "lpebr";
10311}
10312
10313static HChar *
10314s390_irgen_LPDBR(UChar r1, UChar r2)
10315{
10316 IRTemp result = newTemp(Ity_F64);
10317
10318 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10319 put_fpr_dw0(r1, mkexpr(result));
10320 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10321
10322 return "lpdbr";
10323}
10324
10325static HChar *
10326s390_irgen_LPXBR(UChar r1, UChar r2)
10327{
10328 IRTemp result = newTemp(Ity_F128);
10329
10330 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10331 put_fpr_pair(r1, mkexpr(result));
10332 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10333
10334 return "lpxbr";
10335}
10336
10337static HChar *
10338s390_irgen_LDXBR(UChar r1, UChar r2)
10339{
10340 IRTemp result = newTemp(Ity_F64);
10341
10342 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10343 put_fpr_dw0(r1, mkexpr(result));
10344
10345 return "ldxbr";
10346}
10347
10348static HChar *
10349s390_irgen_LEXBR(UChar r1, UChar r2)
10350{
10351 IRTemp result = newTemp(Ity_F32);
10352
10353 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10354 put_fpr_w0(r1, mkexpr(result));
10355
10356 return "lexbr";
10357}
10358
10359static HChar *
10360s390_irgen_MXBR(UChar r1, UChar r2)
10361{
10362 IRTemp op1 = newTemp(Ity_F128);
10363 IRTemp op2 = newTemp(Ity_F128);
10364 IRTemp result = newTemp(Ity_F128);
10365
10366 assign(op1, get_fpr_pair(r1));
10367 assign(op2, get_fpr_pair(r2));
10368 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10369 mkexpr(op2)));
10370 put_fpr_pair(r1, mkexpr(result));
10371
10372 return "mxbr";
10373}
10374
10375static HChar *
10376s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10377{
10378 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10379 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10380
10381 return "maebr";
10382}
10383
10384static HChar *
10385s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10386{
10387 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10388 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10389
10390 return "madbr";
10391}
10392
10393static HChar *
10394s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10395{
10396 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10397
10398 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10399 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10400
10401 return "maeb";
10402}
10403
10404static HChar *
10405s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10406{
10407 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10408
10409 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10410 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10411
10412 return "madb";
10413}
10414
10415static HChar *
10416s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10417{
10418 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10419 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10420
10421 return "msebr";
10422}
10423
10424static HChar *
10425s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10426{
10427 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10428 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10429
10430 return "msdbr";
10431}
10432
10433static HChar *
10434s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10435{
10436 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10437
10438 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10439 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10440
10441 return "mseb";
10442}
10443
10444static HChar *
10445s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10446{
10447 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10448
10449 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10450 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10451
10452 return "msdb";
10453}
10454
10455static HChar *
10456s390_irgen_SQEBR(UChar r1, UChar r2)
10457{
10458 IRTemp result = newTemp(Ity_F32);
10459
10460 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10461 put_fpr_w0(r1, mkexpr(result));
10462
10463 return "sqebr";
10464}
10465
10466static HChar *
10467s390_irgen_SQDBR(UChar r1, UChar r2)
10468{
10469 IRTemp result = newTemp(Ity_F64);
10470
10471 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10472 put_fpr_dw0(r1, mkexpr(result));
10473
10474 return "sqdbr";
10475}
10476
10477static HChar *
10478s390_irgen_SQXBR(UChar r1, UChar r2)
10479{
10480 IRTemp result = newTemp(Ity_F128);
10481
10482 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10483 put_fpr_pair(r1, mkexpr(result));
10484
10485 return "sqxbr";
10486}
10487
10488static HChar *
10489s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10490{
10491 IRTemp op = newTemp(Ity_F32);
10492
10493 assign(op, load(Ity_F32, mkexpr(op2addr)));
10494 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10495
10496 return "sqeb";
10497}
10498
10499static HChar *
10500s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10501{
10502 IRTemp op = newTemp(Ity_F64);
10503
10504 assign(op, load(Ity_F64, mkexpr(op2addr)));
10505 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10506
10507 return "sqdb";
10508}
10509
10510static HChar *
10511s390_irgen_SXBR(UChar r1, UChar r2)
10512{
10513 IRTemp op1 = newTemp(Ity_F128);
10514 IRTemp op2 = newTemp(Ity_F128);
10515 IRTemp result = newTemp(Ity_F128);
10516
10517 assign(op1, get_fpr_pair(r1));
10518 assign(op2, get_fpr_pair(r2));
10519 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10520 mkexpr(op2)));
10521 put_fpr_pair(r1, mkexpr(result));
10522 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10523
10524 return "sxbr";
10525}
10526
10527static HChar *
10528s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10529{
10530 IRTemp value = newTemp(Ity_F32);
10531
10532 assign(value, get_fpr_w0(r1));
10533
10534 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10535
10536 return "tceb";
10537}
10538
10539static HChar *
10540s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10541{
10542 IRTemp value = newTemp(Ity_F64);
10543
10544 assign(value, get_fpr_dw0(r1));
10545
10546 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10547
10548 return "tcdb";
10549}
10550
10551static HChar *
10552s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10553{
10554 IRTemp value = newTemp(Ity_F128);
10555
10556 assign(value, get_fpr_pair(r1));
10557
10558 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10559
10560 return "tcxb";
10561}
10562
10563static HChar *
10564s390_irgen_LCDFR(UChar r1, UChar r2)
10565{
10566 IRTemp result = newTemp(Ity_F64);
10567
10568 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10569 put_fpr_dw0(r1, mkexpr(result));
10570
10571 return "lcdfr";
10572}
10573
10574static HChar *
10575s390_irgen_LNDFR(UChar r1, UChar r2)
10576{
10577 IRTemp result = newTemp(Ity_F64);
10578
10579 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10580 put_fpr_dw0(r1, mkexpr(result));
10581
10582 return "lndfr";
10583}
10584
10585static HChar *
10586s390_irgen_LPDFR(UChar r1, UChar r2)
10587{
10588 IRTemp result = newTemp(Ity_F64);
10589
10590 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10591 put_fpr_dw0(r1, mkexpr(result));
10592
10593 return "lpdfr";
10594}
10595
10596static HChar *
10597s390_irgen_LDGR(UChar r1, UChar r2)
10598{
10599 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10600
10601 return "ldgr";
10602}
10603
10604static HChar *
10605s390_irgen_LGDR(UChar r1, UChar r2)
10606{
10607 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10608
10609 return "lgdr";
10610}
10611
10612
10613static HChar *
10614s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10615{
10616 IRTemp sign = newTemp(Ity_I64);
10617 IRTemp value = newTemp(Ity_I64);
10618
10619 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10620 mkU64(1ULL << 63)));
10621 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10622 mkU64((1ULL << 63) - 1)));
10623 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10624 mkexpr(sign))));
10625
10626 return "cpsdr";
10627}
10628
10629
sewardj2019a972011-03-07 16:04:07 +000010630static IRExpr *
10631s390_call_cvb(IRExpr *in)
10632{
10633 IRExpr **args, *call;
10634
10635 args = mkIRExprVec_1(in);
10636 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10637 "s390_do_cvb", &s390_do_cvb, args);
10638
10639 /* Nothing is excluded from definedness checking. */
10640 call->Iex.CCall.cee->mcx_mask = 0;
10641
10642 return call;
10643}
10644
10645static HChar *
10646s390_irgen_CVB(UChar r1, IRTemp op2addr)
10647{
10648 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10649
10650 return "cvb";
10651}
10652
10653static HChar *
10654s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10655{
10656 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10657
10658 return "cvby";
10659}
10660
10661
sewardj2019a972011-03-07 16:04:07 +000010662static IRExpr *
10663s390_call_cvd(IRExpr *in)
10664{
10665 IRExpr **args, *call;
10666
10667 args = mkIRExprVec_1(in);
10668 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10669 "s390_do_cvd", &s390_do_cvd, args);
10670
10671 /* Nothing is excluded from definedness checking. */
10672 call->Iex.CCall.cee->mcx_mask = 0;
10673
10674 return call;
10675}
10676
10677static HChar *
10678s390_irgen_CVD(UChar r1, IRTemp op2addr)
10679{
10680 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10681
10682 return "cvd";
10683}
10684
10685static HChar *
10686s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10687{
10688 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10689
10690 return "cvdy";
10691}
10692
10693static HChar *
10694s390_irgen_FLOGR(UChar r1, UChar r2)
10695{
10696 IRTemp input = newTemp(Ity_I64);
10697 IRTemp not_zero = newTemp(Ity_I64);
10698 IRTemp tmpnum = newTemp(Ity_I64);
10699 IRTemp num = newTemp(Ity_I64);
10700 IRTemp shift_amount = newTemp(Ity_I8);
10701
10702 /* We use the "count leading zeroes" operator because the number of
10703 leading zeroes is identical with the bit position of the first '1' bit.
10704 However, that operator does not work when the input value is zero.
10705 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10706 the modified value. If input == 0, then the result is 64. Otherwise,
10707 the result of Clz64 is what we want. */
10708
10709 assign(input, get_gpr_dw0(r2));
10710 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10711 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10712
10713 /* num = (input == 0) ? 64 : tmpnum */
10714 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10715 /* == 0 */ mkU64(64),
10716 /* != 0 */ mkexpr(tmpnum)));
10717
10718 put_gpr_dw0(r1, mkexpr(num));
10719
10720 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10721 is to first shift the input value by NUM + 1 bits to the left which
10722 causes the leftmost '1' bit to disappear. Then we shift logically to
10723 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10724 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10725 the width of the value-to-be-shifted, we need to special case
10726 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10727 For both such INPUT values the result will be 0. */
10728
10729 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10730 mkU64(1))));
10731
10732 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +000010733 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10734 /* == 0 || == 1*/ mkU64(0),
10735 /* otherwise */
10736 binop(Iop_Shr64,
10737 binop(Iop_Shl64, mkexpr(input),
10738 mkexpr(shift_amount)),
10739 mkexpr(shift_amount))));
sewardj2019a972011-03-07 16:04:07 +000010740
10741 /* Compare the original value as an unsigned integer with 0. */
10742 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10743 mktemp(Ity_I64, mkU64(0)), False);
10744
10745 return "flogr";
10746}
10747
sewardj1e5fea62011-05-17 16:18:36 +000010748static HChar *
10749s390_irgen_STCK(IRTemp op2addr)
10750{
10751 IRDirty *d;
10752 IRTemp cc = newTemp(Ity_I64);
10753
10754 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10755 &s390x_dirtyhelper_STCK,
10756 mkIRExprVec_1(mkexpr(op2addr)));
10757 d->mFx = Ifx_Write;
10758 d->mAddr = mkexpr(op2addr);
10759 d->mSize = 8;
10760 stmt(IRStmt_Dirty(d));
10761 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10762 mkexpr(cc), mkU64(0), mkU64(0));
10763 return "stck";
10764}
10765
10766static HChar *
10767s390_irgen_STCKF(IRTemp op2addr)
10768{
10769 IRDirty *d;
10770 IRTemp cc = newTemp(Ity_I64);
10771
10772 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10773 &s390x_dirtyhelper_STCKF,
10774 mkIRExprVec_1(mkexpr(op2addr)));
10775 d->mFx = Ifx_Write;
10776 d->mAddr = mkexpr(op2addr);
10777 d->mSize = 8;
10778 stmt(IRStmt_Dirty(d));
10779 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10780 mkexpr(cc), mkU64(0), mkU64(0));
10781 return "stckf";
10782}
10783
10784static HChar *
10785s390_irgen_STCKE(IRTemp op2addr)
10786{
10787 IRDirty *d;
10788 IRTemp cc = newTemp(Ity_I64);
10789
10790 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10791 &s390x_dirtyhelper_STCKE,
10792 mkIRExprVec_1(mkexpr(op2addr)));
10793 d->mFx = Ifx_Write;
10794 d->mAddr = mkexpr(op2addr);
10795 d->mSize = 16;
10796 stmt(IRStmt_Dirty(d));
10797 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10798 mkexpr(cc), mkU64(0), mkU64(0));
10799 return "stcke";
10800}
10801
florian933065d2011-07-11 01:48:02 +000010802static HChar *
10803s390_irgen_STFLE(IRTemp op2addr)
10804{
10805 IRDirty *d;
10806 IRTemp cc = newTemp(Ity_I64);
10807
10808 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
10809 &s390x_dirtyhelper_STFLE,
10810 mkIRExprVec_1(mkexpr(op2addr)));
10811
10812 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
10813
sewardjc9069f22012-06-01 16:09:50 +000010814 d->nFxState = 1;
10815 vex_bzero(&d->fxState, sizeof(d->fxState));
10816
florian933065d2011-07-11 01:48:02 +000010817 d->fxState[0].fx = Ifx_Modify; /* read then write */
10818 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
10819 d->fxState[0].size = sizeof(ULong);
florian933065d2011-07-11 01:48:02 +000010820
10821 d->mAddr = mkexpr(op2addr);
10822 /* Pretend all double words are written */
10823 d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
10824 d->mFx = Ifx_Write;
10825
10826 stmt(IRStmt_Dirty(d));
10827
10828 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
10829
10830 return "stfle";
10831}
10832
floriana4384a32011-08-11 16:58:45 +000010833static HChar *
10834s390_irgen_CKSM(UChar r1,UChar r2)
10835{
10836 IRTemp addr = newTemp(Ity_I64);
10837 IRTemp op = newTemp(Ity_I32);
10838 IRTemp len = newTemp(Ity_I64);
10839 IRTemp oldval = newTemp(Ity_I32);
10840 IRTemp mask = newTemp(Ity_I32);
10841 IRTemp newop = newTemp(Ity_I32);
10842 IRTemp result = newTemp(Ity_I32);
10843 IRTemp result1 = newTemp(Ity_I32);
10844 IRTemp inc = newTemp(Ity_I64);
10845
10846 assign(oldval, get_gpr_w1(r1));
10847 assign(addr, get_gpr_dw0(r2));
10848 assign(len, get_gpr_dw0(r2+1));
10849
10850 /* Condition code is always zero. */
10851 s390_cc_set(0);
10852
10853 /* If length is zero, there is no need to calculate the checksum */
10854 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)),
10855 guest_IA_next_instr);
10856
10857 /* Assiging the increment variable to adjust address and length
10858 later on. */
10859 assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10860 mkexpr(len), mkU64(4)));
10861
10862 /* If length < 4 the final 4-byte 2nd operand value is computed by
10863 appending the remaining bytes to the right with 0. This is done
10864 by AND'ing the 4 bytes loaded from memory with an appropriate
10865 mask. If length >= 4, that mask is simply 0xffffffff. */
10866
10867 assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10868 /* Mask computation when len < 4:
10869 0xffffffff << (32 - (len % 4)*8) */
10870 binop(Iop_Shl32, mkU32(0xffffffff),
10871 unop(Iop_32to8,
10872 binop(Iop_Sub32, mkU32(32),
10873 binop(Iop_Shl32,
10874 unop(Iop_64to32,
10875 binop(Iop_And64,
10876 mkexpr(len), mkU64(3))),
10877 mkU8(3))))),
10878 mkU32(0xffffffff)));
10879
10880 assign(op, load(Ity_I32, mkexpr(addr)));
10881 assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask)));
10882 assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval)));
10883
10884 /* Checking for carry */
10885 assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)),
10886 binop(Iop_Add32, mkexpr(result), mkU32(1)),
10887 mkexpr(result)));
10888
10889 put_gpr_w1(r1, mkexpr(result1));
10890 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc)));
10891 put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc)));
10892
10893 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)),
10894 guest_IA_curr_instr);
10895
10896 return "cksm";
10897}
10898
florian9af37692012-01-15 21:01:16 +000010899static HChar *
10900s390_irgen_TROO(UChar m3, UChar r1, UChar r2)
10901{
10902 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10903 src_addr = newTemp(Ity_I64);
10904 des_addr = newTemp(Ity_I64);
10905 tab_addr = newTemp(Ity_I64);
10906 test_byte = newTemp(Ity_I8);
10907 src_len = newTemp(Ity_I64);
10908
10909 assign(src_addr, get_gpr_dw0(r2));
10910 assign(des_addr, get_gpr_dw0(r1));
10911 assign(tab_addr, get_gpr_dw0(1));
florian53518532012-01-18 14:00:31 +000010912 assign(src_len, get_gpr_dw0(r1+1));
florian9af37692012-01-15 21:01:16 +000010913 assign(test_byte, get_gpr_b7(0));
10914
10915 IRTemp op = newTemp(Ity_I8);
10916 IRTemp op1 = newTemp(Ity_I8);
10917 IRTemp result = newTemp(Ity_I64);
10918
10919 /* End of source string? We're done; proceed to next insn */
10920 s390_cc_set(0);
10921 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10922 guest_IA_next_instr);
10923
10924 /* Load character from source string, index translation table and
10925 store translated character in op1. */
10926 assign(op, load(Ity_I8, mkexpr(src_addr)));
10927
10928 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
10929 mkexpr(tab_addr)));
10930 assign(op1, load(Ity_I8, mkexpr(result)));
10931
10932 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10933 s390_cc_set(1);
10934 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10935 guest_IA_next_instr);
10936 }
10937 store(get_gpr_dw0(r1), mkexpr(op1));
10938
10939 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10940 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
10941 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
10942
10943 always_goto_and_chase(guest_IA_curr_instr);
10944
10945 return "troo";
10946}
10947
florian730448f2012-02-04 17:07:07 +000010948static HChar *
10949s390_irgen_TRTO(UChar m3, UChar r1, UChar r2)
10950{
10951 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10952 src_addr = newTemp(Ity_I64);
10953 des_addr = newTemp(Ity_I64);
10954 tab_addr = newTemp(Ity_I64);
10955 test_byte = newTemp(Ity_I8);
10956 src_len = newTemp(Ity_I64);
10957
10958 assign(src_addr, get_gpr_dw0(r2));
10959 assign(des_addr, get_gpr_dw0(r1));
10960 assign(tab_addr, get_gpr_dw0(1));
10961 assign(src_len, get_gpr_dw0(r1+1));
10962 assign(test_byte, get_gpr_b7(0));
10963
10964 IRTemp op = newTemp(Ity_I16);
10965 IRTemp op1 = newTemp(Ity_I8);
10966 IRTemp result = newTemp(Ity_I64);
10967
10968 /* End of source string? We're done; proceed to next insn */
10969 s390_cc_set(0);
10970 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10971 guest_IA_next_instr);
10972
10973 /* Load character from source string, index translation table and
10974 store translated character in op1. */
10975 assign(op, load(Ity_I16, mkexpr(src_addr)));
10976
10977 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
10978 mkexpr(tab_addr)));
10979
10980 assign(op1, load(Ity_I8, mkexpr(result)));
10981
10982 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10983 s390_cc_set(1);
10984 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10985 guest_IA_next_instr);
10986 }
10987 store(get_gpr_dw0(r1), mkexpr(op1));
10988
10989 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
10990 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10991 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
10992
10993 always_goto_and_chase(guest_IA_curr_instr);
10994
10995 return "trto";
10996}
10997
10998static HChar *
10999s390_irgen_TROT(UChar m3, UChar r1, UChar r2)
11000{
11001 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
11002 src_addr = newTemp(Ity_I64);
11003 des_addr = newTemp(Ity_I64);
11004 tab_addr = newTemp(Ity_I64);
11005 test_byte = newTemp(Ity_I16);
11006 src_len = newTemp(Ity_I64);
11007
11008 assign(src_addr, get_gpr_dw0(r2));
11009 assign(des_addr, get_gpr_dw0(r1));
11010 assign(tab_addr, get_gpr_dw0(1));
11011 assign(src_len, get_gpr_dw0(r1+1));
11012 assign(test_byte, get_gpr_hw3(0));
11013
11014 IRTemp op = newTemp(Ity_I8);
11015 IRTemp op1 = newTemp(Ity_I16);
11016 IRTemp result = newTemp(Ity_I64);
11017
11018 /* End of source string? We're done; proceed to next insn */
11019 s390_cc_set(0);
11020 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11021 guest_IA_next_instr);
11022
11023 /* Load character from source string, index translation table and
11024 store translated character in op1. */
11025 assign(op, binop(Iop_Shl8, load(Ity_I8, mkexpr(src_addr)), mkU8(1)));
11026
11027 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11028 mkexpr(tab_addr)));
11029 assign(op1, load(Ity_I16, mkexpr(result)));
11030
11031 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11032 s390_cc_set(1);
11033 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11034 guest_IA_next_instr);
11035 }
11036 store(get_gpr_dw0(r1), mkexpr(op1));
11037
11038 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11039 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11040 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11041
11042 always_goto_and_chase(guest_IA_curr_instr);
11043
11044 return "trot";
11045}
11046
11047static HChar *
11048s390_irgen_TRTT(UChar m3, UChar r1, UChar r2)
11049{
11050 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
11051 src_addr = newTemp(Ity_I64);
11052 des_addr = newTemp(Ity_I64);
11053 tab_addr = newTemp(Ity_I64);
11054 test_byte = newTemp(Ity_I16);
11055 src_len = newTemp(Ity_I64);
11056
11057 assign(src_addr, get_gpr_dw0(r2));
11058 assign(des_addr, get_gpr_dw0(r1));
11059 assign(tab_addr, get_gpr_dw0(1));
11060 assign(src_len, get_gpr_dw0(r1+1));
11061 assign(test_byte, get_gpr_hw3(0));
11062
11063 IRTemp op = newTemp(Ity_I16);
11064 IRTemp op1 = newTemp(Ity_I16);
11065 IRTemp result = newTemp(Ity_I64);
11066
11067 /* End of source string? We're done; proceed to next insn */
11068 s390_cc_set(0);
11069 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11070 guest_IA_next_instr);
11071
11072 /* Load character from source string, index translation table and
11073 store translated character in op1. */
11074 assign(op, binop(Iop_Shl16, load(Ity_I16, mkexpr(src_addr)), mkU8(1)));
11075
11076 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
11077 mkexpr(tab_addr)));
11078 assign(op1, load(Ity_I16, mkexpr(result)));
11079
11080 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11081 s390_cc_set(1);
11082 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11083 guest_IA_next_instr);
11084 }
11085
11086 store(get_gpr_dw0(r1), mkexpr(op1));
11087
11088 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
11089 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11090 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
11091
11092 always_goto_and_chase(guest_IA_curr_instr);
11093
11094 return "trtt";
11095}
11096
11097static HChar *
11098s390_irgen_TR(UChar length, IRTemp start1, IRTemp start2)
11099{
florianf87d4fb2012-05-05 02:55:24 +000011100 IRTemp len = newTemp(Ity_I64);
florian730448f2012-02-04 17:07:07 +000011101
florianf87d4fb2012-05-05 02:55:24 +000011102 assign(len, mkU64(length));
11103 s390_irgen_TR_EX(len, start1, start2);
florian8844a632012-04-13 04:04:06 +000011104 dummy_put_IA();
florian730448f2012-02-04 17:07:07 +000011105
11106 return "tr";
11107}
11108
11109static HChar *
11110s390_irgen_TRE(UChar r1,UChar r2)
11111{
11112 IRTemp src_addr, tab_addr, src_len, test_byte;
11113 src_addr = newTemp(Ity_I64);
11114 tab_addr = newTemp(Ity_I64);
11115 src_len = newTemp(Ity_I64);
11116 test_byte = newTemp(Ity_I8);
11117
11118 assign(src_addr, get_gpr_dw0(r1));
11119 assign(src_len, get_gpr_dw0(r1+1));
11120 assign(tab_addr, get_gpr_dw0(r2));
11121 assign(test_byte, get_gpr_b7(0));
11122
11123 IRTemp op = newTemp(Ity_I8);
11124 IRTemp op1 = newTemp(Ity_I8);
11125 IRTemp result = newTemp(Ity_I64);
11126
11127 /* End of source string? We're done; proceed to next insn */
11128 s390_cc_set(0);
11129 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11130 guest_IA_next_instr);
11131
11132 /* Load character from source string and compare with test byte */
11133 assign(op, load(Ity_I8, mkexpr(src_addr)));
11134
11135 s390_cc_set(1);
11136 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op), mkexpr(test_byte)),
11137 guest_IA_next_instr);
11138
11139 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11140 mkexpr(tab_addr)));
11141
11142 assign(op1, load(Ity_I8, mkexpr(result)));
11143
11144 store(get_gpr_dw0(r1), mkexpr(op1));
11145 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11146 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11147
florian39815d62012-07-24 21:06:34 +000011148 always_goto_and_chase(guest_IA_curr_instr);
florian730448f2012-02-04 17:07:07 +000011149
11150 return "tre";
11151}
11152
floriana0100c92012-07-20 00:06:35 +000011153static IRExpr *
11154s390_call_cu21(IRExpr *srcval, IRExpr *low_surrogate)
11155{
11156 IRExpr **args, *call;
11157 args = mkIRExprVec_2(srcval, low_surrogate);
11158 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
11159 "s390_do_cu21", &s390_do_cu21, args);
11160
11161 /* Nothing is excluded from definedness checking. */
11162 call->Iex.CCall.cee->mcx_mask = 0;
11163
11164 return call;
11165}
11166
11167static HChar *
11168s390_irgen_CU21(UChar m3, UChar r1, UChar r2)
11169{
11170 IRTemp addr1 = newTemp(Ity_I64);
11171 IRTemp addr2 = newTemp(Ity_I64);
11172 IRTemp len1 = newTemp(Ity_I64);
11173 IRTemp len2 = newTemp(Ity_I64);
11174
11175 assign(addr1, get_gpr_dw0(r1));
11176 assign(addr2, get_gpr_dw0(r2));
11177 assign(len1, get_gpr_dw0(r1 + 1));
11178 assign(len2, get_gpr_dw0(r2 + 1));
11179
11180 /* We're processing the 2nd operand 2 bytes at a time. Therefore, if
11181 there are less than 2 bytes left, then the 2nd operand is exhausted
11182 and we're done here. cc = 0 */
11183 s390_cc_set(0);
11184 if_condition_goto(binop(Iop_CmpLT64U, mkexpr(len2), mkU64(2)),
11185 guest_IA_next_instr);
11186
11187 /* There are at least two bytes there. Read them. */
11188 IRTemp srcval = newTemp(Ity_I32);
11189 assign(srcval, unop(Iop_16Uto32, load(Ity_I16, mkexpr(addr2))));
11190
11191 /* Find out whether this is a high surrogate. I.e. SRCVAL lies
11192 inside the interval [0xd800 - 0xdbff] */
11193 IRTemp is_high_surrogate = newTemp(Ity_I32);
11194 IRExpr *flag1 = mkite(binop(Iop_CmpLE32U, mkU32(0xd800), mkexpr(srcval)),
11195 mkU32(1), mkU32(0));
11196 IRExpr *flag2 = mkite(binop(Iop_CmpLE32U, mkexpr(srcval), mkU32(0xdbff)),
11197 mkU32(1), mkU32(0));
11198 assign(is_high_surrogate, binop(Iop_And32, flag1, flag2));
11199
11200 /* If SRCVAL is a high surrogate and there are less than 4 bytes left,
11201 then the 2nd operand is exhausted and we're done here. cc = 0 */
11202 IRExpr *not_enough_bytes =
11203 mkite(binop(Iop_CmpLT64U, mkexpr(len2), mkU64(4)), mkU32(1), mkU32(0));
11204
11205 if_condition_goto(binop(Iop_CmpEQ32,
11206 binop(Iop_And32, mkexpr(is_high_surrogate),
11207 not_enough_bytes),
11208 mkU32(1)), guest_IA_next_instr);
11209
11210 /* The 2nd operand is not exhausted. If the first 2 bytes are a high
11211 surrogate, read the next two bytes (low surrogate). */
11212 IRTemp low_surrogate = newTemp(Ity_I32);
11213 IRExpr *low_surrogate_addr = binop(Iop_Add64, mkexpr(addr2), mkU64(2));
11214
11215 assign(low_surrogate,
11216 mkite(binop(Iop_CmpEQ32, mkexpr(is_high_surrogate), mkU32(1)),
11217 unop(Iop_16Uto32, load(Ity_I16, low_surrogate_addr)),
11218 mkU32(0))); // any value is fine; it will not be used
11219
11220 /* Call the helper */
11221 IRTemp retval = newTemp(Ity_I64);
11222 assign(retval, s390_call_cu21(mkexpr(srcval), mkexpr(low_surrogate)));
11223
11224 /* Before we can test whether the 1st operand is exhausted we need to
11225 test for an invalid low surrogate. Because cc=2 outranks cc=1. */
11226 if (s390_host_has_etf3 && (m3 & 0x1) == 1) {
11227 IRExpr *invalid_low_surrogate =
11228 binop(Iop_And64, mkexpr(retval), mkU64(0xff));
11229
11230 s390_cc_set(2);
11231 if_condition_goto(binop(Iop_CmpEQ64, invalid_low_surrogate, mkU64(1)),
11232 guest_IA_next_instr);
11233 }
11234
11235 /* Now test whether the 1st operand is exhausted */
11236 IRTemp num_bytes = newTemp(Ity_I64);
11237 assign(num_bytes, binop(Iop_And64,
11238 binop(Iop_Shr64, mkexpr(retval), mkU8(8)),
11239 mkU64(0xff)));
11240 s390_cc_set(1);
11241 if_condition_goto(binop(Iop_CmpLT64U, mkexpr(len1), mkexpr(num_bytes)),
11242 guest_IA_next_instr);
11243
11244 /* Extract the bytes to be stored at addr1 */
11245 IRTemp data = newTemp(Ity_I64);
11246 assign(data, binop(Iop_Shr64, mkexpr(retval), mkU8(16)));
11247
11248 /* To store the bytes construct 4 dirty helper calls. The helper calls
11249 are guarded (num_bytes == 1, num_bytes == 2, etc) such that only
11250 one of them will be called at runtime. */
11251 int i;
11252 for (i = 1; i <= 4; ++i) {
11253 IRDirty *d;
11254
11255 d = unsafeIRDirty_0_N(0 /* regparms */, "s390x_dirtyhelper_CUxy",
11256 &s390x_dirtyhelper_CUxy,
11257 mkIRExprVec_3(mkexpr(addr1), mkexpr(data),
11258 mkexpr(num_bytes)));
11259 d->guard = binop(Iop_CmpEQ64, mkexpr(num_bytes), mkU64(i));
11260 d->mFx = Ifx_Write;
11261 d->mAddr = mkexpr(addr1);
11262 d->mSize = i;
11263 stmt(IRStmt_Dirty(d));
11264 }
11265
11266 /* Update source address and length */
11267 IRTemp num_src_bytes = newTemp(Ity_I64);
11268 assign(num_src_bytes,
11269 mkite(binop(Iop_CmpEQ32, mkexpr(is_high_surrogate), mkU32(1)),
11270 mkU64(4), mkU64(2)));
11271 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr2), mkexpr(num_src_bytes)));
11272 put_gpr_dw0(r2 + 1, binop(Iop_Sub64, mkexpr(len2), mkexpr(num_src_bytes)));
11273
11274 /* Update destination address and length */
11275 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(num_bytes)));
11276 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkexpr(num_bytes)));
11277
11278 /* Iterate */
11279 always_goto_and_chase(guest_IA_curr_instr);
11280
11281 return "cu21";
11282}
11283
florian2a415a12012-07-21 17:41:36 +000011284static IRExpr *
11285s390_call_cu24(IRExpr *srcval, IRExpr *low_surrogate)
11286{
11287 IRExpr **args, *call;
11288 args = mkIRExprVec_2(srcval, low_surrogate);
11289 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
11290 "s390_do_cu24", &s390_do_cu24, args);
11291
11292 /* Nothing is excluded from definedness checking. */
11293 call->Iex.CCall.cee->mcx_mask = 0;
11294
11295 return call;
11296}
11297
11298static HChar *
11299s390_irgen_CU24(UChar m3, UChar r1, UChar r2)
11300{
11301 IRTemp addr1 = newTemp(Ity_I64);
11302 IRTemp addr2 = newTemp(Ity_I64);
11303 IRTemp len1 = newTemp(Ity_I64);
11304 IRTemp len2 = newTemp(Ity_I64);
11305
11306 assign(addr1, get_gpr_dw0(r1));
11307 assign(addr2, get_gpr_dw0(r2));
11308 assign(len1, get_gpr_dw0(r1 + 1));
11309 assign(len2, get_gpr_dw0(r2 + 1));
11310
11311 /* We're processing the 2nd operand 2 bytes at a time. Therefore, if
11312 there are less than 2 bytes left, then the 2nd operand is exhausted
11313 and we're done here. cc = 0 */
11314 s390_cc_set(0);
11315 if_condition_goto(binop(Iop_CmpLT64U, mkexpr(len2), mkU64(2)),
11316 guest_IA_next_instr);
11317
11318 /* There are at least two bytes there. Read them. */
11319 IRTemp srcval = newTemp(Ity_I32);
11320 assign(srcval, unop(Iop_16Uto32, load(Ity_I16, mkexpr(addr2))));
11321
11322 /* Find out whether this is a high surrogate. I.e. SRCVAL lies
11323 inside the interval [0xd800 - 0xdbff] */
11324 IRTemp is_high_surrogate = newTemp(Ity_I32);
11325 IRExpr *flag1 = mkite(binop(Iop_CmpLE32U, mkU32(0xd800), mkexpr(srcval)),
11326 mkU32(1), mkU32(0));
11327 IRExpr *flag2 = mkite(binop(Iop_CmpLE32U, mkexpr(srcval), mkU32(0xdbff)),
11328 mkU32(1), mkU32(0));
11329 assign(is_high_surrogate, binop(Iop_And32, flag1, flag2));
11330
11331 /* If SRCVAL is a high surrogate and there are less than 4 bytes left,
11332 then the 2nd operand is exhausted and we're done here. cc = 0 */
11333 IRExpr *not_enough_bytes =
11334 mkite(binop(Iop_CmpLT64U, mkexpr(len2), mkU64(4)), mkU32(1), mkU32(0));
11335
11336 if_condition_goto(binop(Iop_CmpEQ32,
11337 binop(Iop_And32, mkexpr(is_high_surrogate),
11338 not_enough_bytes),
11339 mkU32(1)), guest_IA_next_instr);
11340
11341 /* The 2nd operand is not exhausted. If the first 2 bytes are a high
11342 surrogate, read the next two bytes (low surrogate). */
11343 IRTemp low_surrogate = newTemp(Ity_I32);
11344 IRExpr *low_surrogate_addr = binop(Iop_Add64, mkexpr(addr2), mkU64(2));
11345
11346 assign(low_surrogate,
11347 mkite(binop(Iop_CmpEQ32, mkexpr(is_high_surrogate), mkU32(1)),
11348 unop(Iop_16Uto32, load(Ity_I16, low_surrogate_addr)),
11349 mkU32(0))); // any value is fine; it will not be used
11350
11351 /* Call the helper */
11352 IRTemp retval = newTemp(Ity_I64);
11353 assign(retval, s390_call_cu24(mkexpr(srcval), mkexpr(low_surrogate)));
11354
11355 /* Before we can test whether the 1st operand is exhausted we need to
11356 test for an invalid low surrogate. Because cc=2 outranks cc=1. */
11357 if (s390_host_has_etf3 && (m3 & 0x1) == 1) {
11358 IRExpr *invalid_low_surrogate =
11359 binop(Iop_And64, mkexpr(retval), mkU64(0xff));
11360
11361 s390_cc_set(2);
11362 if_condition_goto(binop(Iop_CmpEQ64, invalid_low_surrogate, mkU64(1)),
11363 guest_IA_next_instr);
11364 }
11365
11366 /* Now test whether the 1st operand is exhausted */
11367 s390_cc_set(1);
11368 if_condition_goto(binop(Iop_CmpLT64U, mkexpr(len1), mkU64(4)),
11369 guest_IA_next_instr);
11370
11371 /* Extract the bytes to be stored at addr1 */
11372 IRExpr *data = unop(Iop_64to32, binop(Iop_Shr64, mkexpr(retval), mkU8(8)));
11373
11374 store(mkexpr(addr1), data);
11375
11376 /* Update source address and length */
11377 IRTemp num_src_bytes = newTemp(Ity_I64);
11378 assign(num_src_bytes,
11379 mkite(binop(Iop_CmpEQ32, mkexpr(is_high_surrogate), mkU32(1)),
11380 mkU64(4), mkU64(2)));
11381 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr2), mkexpr(num_src_bytes)));
11382 put_gpr_dw0(r2 + 1, binop(Iop_Sub64, mkexpr(len2), mkexpr(num_src_bytes)));
11383
11384 /* Update destination address and length */
11385 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(4)));
11386 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(4)));
11387
11388 /* Iterate */
11389 always_goto_and_chase(guest_IA_curr_instr);
11390
11391 return "cu24";
11392}
floriana4384a32011-08-11 16:58:45 +000011393
sewardj2019a972011-03-07 16:04:07 +000011394/*------------------------------------------------------------*/
11395/*--- Build IR for special instructions ---*/
11396/*------------------------------------------------------------*/
11397
florianb4df7682011-07-05 02:09:01 +000011398static void
sewardj2019a972011-03-07 16:04:07 +000011399s390_irgen_client_request(void)
11400{
11401 if (0)
11402 vex_printf("%%R3 = client_request ( %%R2 )\n");
11403
florianf9e1ed72012-04-17 02:41:56 +000011404 Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE
11405 + S390_SPECIAL_OP_SIZE;
sewardj2019a972011-03-07 16:04:07 +000011406
florianf9e1ed72012-04-17 02:41:56 +000011407 dis_res->jk_StopHere = Ijk_ClientReq;
sewardj2019a972011-03-07 16:04:07 +000011408 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000011409
11410 put_IA(mkaddr_expr(next));
sewardj2019a972011-03-07 16:04:07 +000011411}
11412
florianb4df7682011-07-05 02:09:01 +000011413static void
sewardj2019a972011-03-07 16:04:07 +000011414s390_irgen_guest_NRADDR(void)
11415{
11416 if (0)
11417 vex_printf("%%R3 = guest_NRADDR\n");
11418
floriane88b3c92011-07-05 02:48:39 +000011419 put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
sewardj2019a972011-03-07 16:04:07 +000011420}
11421
florianb4df7682011-07-05 02:09:01 +000011422static void
sewardj2019a972011-03-07 16:04:07 +000011423s390_irgen_call_noredir(void)
11424{
florianf9e1ed72012-04-17 02:41:56 +000011425 Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE
11426 + S390_SPECIAL_OP_SIZE;
11427
sewardj2019a972011-03-07 16:04:07 +000011428 /* Continue after special op */
florianf9e1ed72012-04-17 02:41:56 +000011429 put_gpr_dw0(14, mkaddr_expr(next));
sewardj2019a972011-03-07 16:04:07 +000011430
11431 /* The address is in REG1, all parameters are in the right (guest) places */
florianf9e1ed72012-04-17 02:41:56 +000011432 put_IA(get_gpr_dw0(1));
sewardj2019a972011-03-07 16:04:07 +000011433
11434 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000011435 dis_res->jk_StopHere = Ijk_NoRedir;
sewardj2019a972011-03-07 16:04:07 +000011436}
11437
11438/* Force proper alignment for the structures below. */
11439#pragma pack(1)
11440
11441
11442static s390_decode_t
11443s390_decode_2byte_and_irgen(UChar *bytes)
11444{
11445 typedef union {
11446 struct {
11447 unsigned int op : 16;
11448 } E;
11449 struct {
11450 unsigned int op : 8;
11451 unsigned int i : 8;
11452 } I;
11453 struct {
11454 unsigned int op : 8;
11455 unsigned int r1 : 4;
11456 unsigned int r2 : 4;
11457 } RR;
11458 } formats;
11459 union {
11460 formats fmt;
11461 UShort value;
11462 } ovl;
11463
11464 vassert(sizeof(formats) == 2);
11465
11466 ((char *)(&ovl.value))[0] = bytes[0];
11467 ((char *)(&ovl.value))[1] = bytes[1];
11468
11469 switch (ovl.value & 0xffff) {
11470 case 0x0101: /* PR */ goto unimplemented;
11471 case 0x0102: /* UPT */ goto unimplemented;
11472 case 0x0104: /* PTFF */ goto unimplemented;
11473 case 0x0107: /* SCKPF */ goto unimplemented;
11474 case 0x010a: /* PFPO */ goto unimplemented;
11475 case 0x010b: /* TAM */ goto unimplemented;
11476 case 0x010c: /* SAM24 */ goto unimplemented;
11477 case 0x010d: /* SAM31 */ goto unimplemented;
11478 case 0x010e: /* SAM64 */ goto unimplemented;
11479 case 0x01ff: /* TRAP2 */ goto unimplemented;
11480 }
11481
11482 switch ((ovl.value & 0xff00) >> 8) {
11483 case 0x04: /* SPM */ goto unimplemented;
11484 case 0x05: /* BALR */ goto unimplemented;
11485 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11486 goto ok;
11487 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11488 goto ok;
11489 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
11490 case 0x0b: /* BSM */ goto unimplemented;
11491 case 0x0c: /* BASSM */ goto unimplemented;
11492 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11493 goto ok;
florianb0c9a132011-09-08 15:37:39 +000011494 case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11495 goto ok;
11496 case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11497 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011498 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11499 goto ok;
11500 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11501 goto ok;
11502 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11503 goto ok;
11504 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11505 goto ok;
11506 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11507 goto ok;
11508 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11509 goto ok;
11510 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11511 goto ok;
11512 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11513 goto ok;
11514 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11515 goto ok;
11516 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11517 goto ok;
11518 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11519 goto ok;
11520 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11521 goto ok;
11522 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11523 goto ok;
11524 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11525 goto ok;
11526 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11527 goto ok;
11528 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11529 goto ok;
11530 case 0x20: /* LPDR */ goto unimplemented;
11531 case 0x21: /* LNDR */ goto unimplemented;
11532 case 0x22: /* LTDR */ goto unimplemented;
11533 case 0x23: /* LCDR */ goto unimplemented;
11534 case 0x24: /* HDR */ goto unimplemented;
11535 case 0x25: /* LDXR */ goto unimplemented;
11536 case 0x26: /* MXR */ goto unimplemented;
11537 case 0x27: /* MXDR */ goto unimplemented;
11538 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11539 goto ok;
11540 case 0x29: /* CDR */ goto unimplemented;
11541 case 0x2a: /* ADR */ goto unimplemented;
11542 case 0x2b: /* SDR */ goto unimplemented;
11543 case 0x2c: /* MDR */ goto unimplemented;
11544 case 0x2d: /* DDR */ goto unimplemented;
11545 case 0x2e: /* AWR */ goto unimplemented;
11546 case 0x2f: /* SWR */ goto unimplemented;
11547 case 0x30: /* LPER */ goto unimplemented;
11548 case 0x31: /* LNER */ goto unimplemented;
11549 case 0x32: /* LTER */ goto unimplemented;
11550 case 0x33: /* LCER */ goto unimplemented;
11551 case 0x34: /* HER */ goto unimplemented;
11552 case 0x35: /* LEDR */ goto unimplemented;
11553 case 0x36: /* AXR */ goto unimplemented;
11554 case 0x37: /* SXR */ goto unimplemented;
11555 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11556 goto ok;
11557 case 0x39: /* CER */ goto unimplemented;
11558 case 0x3a: /* AER */ goto unimplemented;
11559 case 0x3b: /* SER */ goto unimplemented;
11560 case 0x3c: /* MDER */ goto unimplemented;
11561 case 0x3d: /* DER */ goto unimplemented;
11562 case 0x3e: /* AUR */ goto unimplemented;
11563 case 0x3f: /* SUR */ goto unimplemented;
11564 }
11565
11566 return S390_DECODE_UNKNOWN_INSN;
11567
11568ok:
11569 return S390_DECODE_OK;
11570
11571unimplemented:
11572 return S390_DECODE_UNIMPLEMENTED_INSN;
11573}
11574
11575static s390_decode_t
11576s390_decode_4byte_and_irgen(UChar *bytes)
11577{
11578 typedef union {
11579 struct {
11580 unsigned int op1 : 8;
11581 unsigned int r1 : 4;
11582 unsigned int op2 : 4;
11583 unsigned int i2 : 16;
11584 } RI;
11585 struct {
11586 unsigned int op : 16;
11587 unsigned int : 8;
11588 unsigned int r1 : 4;
11589 unsigned int r2 : 4;
11590 } RRE;
11591 struct {
11592 unsigned int op : 16;
11593 unsigned int r1 : 4;
11594 unsigned int : 4;
11595 unsigned int r3 : 4;
11596 unsigned int r2 : 4;
11597 } RRF;
11598 struct {
11599 unsigned int op : 16;
11600 unsigned int r3 : 4;
11601 unsigned int m4 : 4;
11602 unsigned int r1 : 4;
11603 unsigned int r2 : 4;
11604 } RRF2;
11605 struct {
11606 unsigned int op : 16;
11607 unsigned int r3 : 4;
11608 unsigned int : 4;
11609 unsigned int r1 : 4;
11610 unsigned int r2 : 4;
11611 } RRF3;
11612 struct {
11613 unsigned int op : 16;
11614 unsigned int r3 : 4;
11615 unsigned int : 4;
11616 unsigned int r1 : 4;
11617 unsigned int r2 : 4;
11618 } RRR;
11619 struct {
11620 unsigned int op : 16;
11621 unsigned int r3 : 4;
11622 unsigned int : 4;
11623 unsigned int r1 : 4;
11624 unsigned int r2 : 4;
11625 } RRF4;
11626 struct {
11627 unsigned int op : 8;
11628 unsigned int r1 : 4;
11629 unsigned int r3 : 4;
11630 unsigned int b2 : 4;
11631 unsigned int d2 : 12;
11632 } RS;
11633 struct {
11634 unsigned int op : 8;
11635 unsigned int r1 : 4;
11636 unsigned int r3 : 4;
11637 unsigned int i2 : 16;
11638 } RSI;
11639 struct {
11640 unsigned int op : 8;
11641 unsigned int r1 : 4;
11642 unsigned int x2 : 4;
11643 unsigned int b2 : 4;
11644 unsigned int d2 : 12;
11645 } RX;
11646 struct {
11647 unsigned int op : 16;
11648 unsigned int b2 : 4;
11649 unsigned int d2 : 12;
11650 } S;
11651 struct {
11652 unsigned int op : 8;
11653 unsigned int i2 : 8;
11654 unsigned int b1 : 4;
11655 unsigned int d1 : 12;
11656 } SI;
11657 } formats;
11658 union {
11659 formats fmt;
11660 UInt value;
11661 } ovl;
11662
11663 vassert(sizeof(formats) == 4);
11664
11665 ((char *)(&ovl.value))[0] = bytes[0];
11666 ((char *)(&ovl.value))[1] = bytes[1];
11667 ((char *)(&ovl.value))[2] = bytes[2];
11668 ((char *)(&ovl.value))[3] = bytes[3];
11669
11670 switch ((ovl.value & 0xff0f0000) >> 16) {
11671 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
11672 ovl.fmt.RI.i2); goto ok;
11673 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
11674 ovl.fmt.RI.i2); goto ok;
11675 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
11676 ovl.fmt.RI.i2); goto ok;
11677 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
11678 ovl.fmt.RI.i2); goto ok;
11679 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
11680 ovl.fmt.RI.i2); goto ok;
11681 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
11682 ovl.fmt.RI.i2); goto ok;
11683 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
11684 ovl.fmt.RI.i2); goto ok;
11685 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
11686 ovl.fmt.RI.i2); goto ok;
11687 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
11688 ovl.fmt.RI.i2); goto ok;
11689 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
11690 ovl.fmt.RI.i2); goto ok;
11691 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
11692 ovl.fmt.RI.i2); goto ok;
11693 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
11694 ovl.fmt.RI.i2); goto ok;
11695 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
11696 ovl.fmt.RI.i2); goto ok;
11697 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
11698 ovl.fmt.RI.i2); goto ok;
11699 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
11700 ovl.fmt.RI.i2); goto ok;
11701 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
11702 ovl.fmt.RI.i2); goto ok;
11703 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
11704 ovl.fmt.RI.i2); goto ok;
11705 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
11706 ovl.fmt.RI.i2); goto ok;
11707 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
11708 ovl.fmt.RI.i2); goto ok;
11709 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
11710 ovl.fmt.RI.i2); goto ok;
11711 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11712 goto ok;
11713 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
11714 ovl.fmt.RI.i2); goto ok;
11715 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
11716 ovl.fmt.RI.i2); goto ok;
11717 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
11718 ovl.fmt.RI.i2); goto ok;
11719 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11720 goto ok;
11721 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
11722 ovl.fmt.RI.i2); goto ok;
11723 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11724 goto ok;
11725 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
11726 ovl.fmt.RI.i2); goto ok;
11727 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11728 goto ok;
11729 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
11730 ovl.fmt.RI.i2); goto ok;
11731 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11732 goto ok;
11733 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
11734 ovl.fmt.RI.i2); goto ok;
11735 }
11736
11737 switch ((ovl.value & 0xffff0000) >> 16) {
11738 case 0x8000: /* SSM */ goto unimplemented;
11739 case 0x8200: /* LPSW */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011740 case 0x9300: /* TS */ goto unimplemented;
sewardj2019a972011-03-07 16:04:07 +000011741 case 0xb202: /* STIDP */ goto unimplemented;
11742 case 0xb204: /* SCK */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011743 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);
11744 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011745 case 0xb206: /* SCKC */ goto unimplemented;
11746 case 0xb207: /* STCKC */ goto unimplemented;
11747 case 0xb208: /* SPT */ goto unimplemented;
11748 case 0xb209: /* STPT */ goto unimplemented;
11749 case 0xb20a: /* SPKA */ goto unimplemented;
11750 case 0xb20b: /* IPK */ goto unimplemented;
11751 case 0xb20d: /* PTLB */ goto unimplemented;
11752 case 0xb210: /* SPX */ goto unimplemented;
11753 case 0xb211: /* STPX */ goto unimplemented;
11754 case 0xb212: /* STAP */ goto unimplemented;
11755 case 0xb214: /* SIE */ goto unimplemented;
11756 case 0xb218: /* PC */ goto unimplemented;
11757 case 0xb219: /* SAC */ goto unimplemented;
11758 case 0xb21a: /* CFC */ goto unimplemented;
11759 case 0xb221: /* IPTE */ goto unimplemented;
11760 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
11761 case 0xb223: /* IVSK */ goto unimplemented;
11762 case 0xb224: /* IAC */ goto unimplemented;
11763 case 0xb225: /* SSAR */ goto unimplemented;
11764 case 0xb226: /* EPAR */ goto unimplemented;
11765 case 0xb227: /* ESAR */ goto unimplemented;
11766 case 0xb228: /* PT */ goto unimplemented;
11767 case 0xb229: /* ISKE */ goto unimplemented;
11768 case 0xb22a: /* RRBE */ goto unimplemented;
11769 case 0xb22b: /* SSKE */ goto unimplemented;
11770 case 0xb22c: /* TB */ goto unimplemented;
11771 case 0xb22d: /* DXR */ goto unimplemented;
11772 case 0xb22e: /* PGIN */ goto unimplemented;
11773 case 0xb22f: /* PGOUT */ goto unimplemented;
11774 case 0xb230: /* CSCH */ goto unimplemented;
11775 case 0xb231: /* HSCH */ goto unimplemented;
11776 case 0xb232: /* MSCH */ goto unimplemented;
11777 case 0xb233: /* SSCH */ goto unimplemented;
11778 case 0xb234: /* STSCH */ goto unimplemented;
11779 case 0xb235: /* TSCH */ goto unimplemented;
11780 case 0xb236: /* TPI */ goto unimplemented;
11781 case 0xb237: /* SAL */ goto unimplemented;
11782 case 0xb238: /* RSCH */ goto unimplemented;
11783 case 0xb239: /* STCRW */ goto unimplemented;
11784 case 0xb23a: /* STCPS */ goto unimplemented;
11785 case 0xb23b: /* RCHP */ goto unimplemented;
11786 case 0xb23c: /* SCHM */ goto unimplemented;
11787 case 0xb240: /* BAKR */ goto unimplemented;
floriana4384a32011-08-11 16:58:45 +000011788 case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1,
11789 ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011790 case 0xb244: /* SQDR */ goto unimplemented;
11791 case 0xb245: /* SQER */ goto unimplemented;
11792 case 0xb246: /* STURA */ goto unimplemented;
11793 case 0xb247: /* MSTA */ goto unimplemented;
11794 case 0xb248: /* PALB */ goto unimplemented;
11795 case 0xb249: /* EREG */ goto unimplemented;
11796 case 0xb24a: /* ESTA */ goto unimplemented;
11797 case 0xb24b: /* LURA */ goto unimplemented;
11798 case 0xb24c: /* TAR */ goto unimplemented;
11799 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
11800 ovl.fmt.RRE.r2); goto ok;
11801 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11802 goto ok;
11803 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11804 goto ok;
11805 case 0xb250: /* CSP */ goto unimplemented;
11806 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
11807 ovl.fmt.RRE.r2); goto ok;
11808 case 0xb254: /* MVPG */ goto unimplemented;
11809 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
11810 ovl.fmt.RRE.r2); goto ok;
11811 case 0xb257: /* CUSE */ goto unimplemented;
11812 case 0xb258: /* BSG */ goto unimplemented;
11813 case 0xb25a: /* BSA */ goto unimplemented;
11814 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
11815 ovl.fmt.RRE.r2); goto ok;
11816 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
11817 ovl.fmt.RRE.r2); goto ok;
11818 case 0xb263: /* CMPSC */ goto unimplemented;
11819 case 0xb274: /* SIGA */ goto unimplemented;
11820 case 0xb276: /* XSCH */ goto unimplemented;
11821 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011822 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011823 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011824 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011825 case 0xb27d: /* STSI */ goto unimplemented;
11826 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
11827 goto ok;
11828 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11829 goto ok;
11830 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11831 goto ok;
florian730448f2012-02-04 17:07:07 +000011832 case 0xb2a5: s390_format_RRE_FF(s390_irgen_TRE, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); goto ok;
floriana0100c92012-07-20 00:06:35 +000011833 case 0xb2a6: s390_format_RRF_M0RERE(s390_irgen_CU21, ovl.fmt.RRF3.r3,
11834 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11835 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011836 case 0xb2a7: /* CU12 */ goto unimplemented;
florian933065d2011-07-11 01:48:02 +000011837 case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
11838 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011839 case 0xb2b1: /* STFL */ goto unimplemented;
11840 case 0xb2b2: /* LPSWE */ goto unimplemented;
11841 case 0xb2b8: /* SRNMB */ goto unimplemented;
11842 case 0xb2b9: /* SRNMT */ goto unimplemented;
11843 case 0xb2bd: /* LFAS */ goto unimplemented;
11844 case 0xb2ff: /* TRAP4 */ goto unimplemented;
11845 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
11846 ovl.fmt.RRE.r2); goto ok;
11847 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11848 ovl.fmt.RRE.r2); goto ok;
11849 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11850 ovl.fmt.RRE.r2); goto ok;
11851 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11852 ovl.fmt.RRE.r2); goto ok;
11853 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11854 ovl.fmt.RRE.r2); goto ok;
11855 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11856 ovl.fmt.RRE.r2); goto ok;
11857 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11858 ovl.fmt.RRE.r2); goto ok;
11859 case 0xb307: /* MXDBR */ goto unimplemented;
11860 case 0xb308: /* KEBR */ goto unimplemented;
11861 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11862 ovl.fmt.RRE.r2); goto ok;
11863 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11864 ovl.fmt.RRE.r2); goto ok;
11865 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11866 ovl.fmt.RRE.r2); goto ok;
11867 case 0xb30c: /* MDEBR */ goto unimplemented;
11868 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11869 ovl.fmt.RRE.r2); goto ok;
11870 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11871 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11872 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11873 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11874 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11875 ovl.fmt.RRE.r2); goto ok;
11876 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11877 ovl.fmt.RRE.r2); goto ok;
11878 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11879 ovl.fmt.RRE.r2); goto ok;
11880 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11881 ovl.fmt.RRE.r2); goto ok;
11882 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11883 ovl.fmt.RRE.r2); goto ok;
11884 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11885 ovl.fmt.RRE.r2); goto ok;
11886 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11887 ovl.fmt.RRE.r2); goto ok;
11888 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11889 ovl.fmt.RRE.r2); goto ok;
11890 case 0xb318: /* KDBR */ goto unimplemented;
11891 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11892 ovl.fmt.RRE.r2); goto ok;
11893 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11894 ovl.fmt.RRE.r2); goto ok;
11895 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11896 ovl.fmt.RRE.r2); goto ok;
11897 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11898 ovl.fmt.RRE.r2); goto ok;
11899 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11900 ovl.fmt.RRE.r2); goto ok;
11901 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11902 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11903 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11904 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11905 case 0xb324: /* LDER */ goto unimplemented;
11906 case 0xb325: /* LXDR */ goto unimplemented;
11907 case 0xb326: /* LXER */ goto unimplemented;
11908 case 0xb32e: /* MAER */ goto unimplemented;
11909 case 0xb32f: /* MSER */ goto unimplemented;
11910 case 0xb336: /* SQXR */ goto unimplemented;
11911 case 0xb337: /* MEER */ goto unimplemented;
11912 case 0xb338: /* MAYLR */ goto unimplemented;
11913 case 0xb339: /* MYLR */ goto unimplemented;
11914 case 0xb33a: /* MAYR */ goto unimplemented;
11915 case 0xb33b: /* MYR */ goto unimplemented;
11916 case 0xb33c: /* MAYHR */ goto unimplemented;
11917 case 0xb33d: /* MYHR */ goto unimplemented;
11918 case 0xb33e: /* MADR */ goto unimplemented;
11919 case 0xb33f: /* MSDR */ goto unimplemented;
11920 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11921 ovl.fmt.RRE.r2); goto ok;
11922 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11923 ovl.fmt.RRE.r2); goto ok;
11924 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11925 ovl.fmt.RRE.r2); goto ok;
11926 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11927 ovl.fmt.RRE.r2); goto ok;
11928 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11929 ovl.fmt.RRE.r2); goto ok;
11930 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11931 ovl.fmt.RRE.r2); goto ok;
11932 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11933 ovl.fmt.RRE.r2); goto ok;
11934 case 0xb347: /* FIXBR */ goto unimplemented;
11935 case 0xb348: /* KXBR */ goto unimplemented;
11936 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11937 ovl.fmt.RRE.r2); goto ok;
11938 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11939 ovl.fmt.RRE.r2); goto ok;
11940 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11941 ovl.fmt.RRE.r2); goto ok;
11942 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11943 ovl.fmt.RRE.r2); goto ok;
11944 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11945 ovl.fmt.RRE.r2); goto ok;
11946 case 0xb350: /* TBEDR */ goto unimplemented;
11947 case 0xb351: /* TBDR */ goto unimplemented;
11948 case 0xb353: /* DIEBR */ goto unimplemented;
11949 case 0xb357: /* FIEBR */ goto unimplemented;
11950 case 0xb358: /* THDER */ goto unimplemented;
11951 case 0xb359: /* THDR */ goto unimplemented;
11952 case 0xb35b: /* DIDBR */ goto unimplemented;
11953 case 0xb35f: /* FIDBR */ goto unimplemented;
11954 case 0xb360: /* LPXR */ goto unimplemented;
11955 case 0xb361: /* LNXR */ goto unimplemented;
11956 case 0xb362: /* LTXR */ goto unimplemented;
11957 case 0xb363: /* LCXR */ goto unimplemented;
11958 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11959 ovl.fmt.RRE.r2); goto ok;
11960 case 0xb366: /* LEXR */ goto unimplemented;
11961 case 0xb367: /* FIXR */ goto unimplemented;
11962 case 0xb369: /* CXR */ goto unimplemented;
11963 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11964 ovl.fmt.RRE.r2); goto ok;
11965 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11966 ovl.fmt.RRE.r2); goto ok;
11967 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11968 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11969 goto ok;
11970 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11971 ovl.fmt.RRE.r2); goto ok;
11972 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11973 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11974 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11975 case 0xb377: /* FIER */ goto unimplemented;
11976 case 0xb37f: /* FIDR */ goto unimplemented;
11977 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11978 case 0xb385: /* SFASR */ goto unimplemented;
11979 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11980 case 0xb390: /* CELFBR */ goto unimplemented;
11981 case 0xb391: /* CDLFBR */ goto unimplemented;
11982 case 0xb392: /* CXLFBR */ goto unimplemented;
11983 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11984 ovl.fmt.RRE.r2); goto ok;
11985 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11986 ovl.fmt.RRE.r2); goto ok;
11987 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11988 ovl.fmt.RRE.r2); goto ok;
11989 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11990 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11991 goto ok;
11992 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11993 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11994 goto ok;
11995 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11996 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11997 goto ok;
11998 case 0xb3a0: /* CELGBR */ goto unimplemented;
11999 case 0xb3a1: /* CDLGBR */ goto unimplemented;
12000 case 0xb3a2: /* CXLGBR */ goto unimplemented;
12001 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
12002 ovl.fmt.RRE.r2); goto ok;
12003 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
12004 ovl.fmt.RRE.r2); goto ok;
12005 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
12006 ovl.fmt.RRE.r2); goto ok;
12007 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
12008 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
12009 goto ok;
12010 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
12011 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
12012 goto ok;
12013 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
12014 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
12015 goto ok;
12016 case 0xb3b4: /* CEFR */ goto unimplemented;
12017 case 0xb3b5: /* CDFR */ goto unimplemented;
12018 case 0xb3b6: /* CXFR */ goto unimplemented;
12019 case 0xb3b8: /* CFER */ goto unimplemented;
12020 case 0xb3b9: /* CFDR */ goto unimplemented;
12021 case 0xb3ba: /* CFXR */ goto unimplemented;
12022 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
12023 ovl.fmt.RRE.r2); goto ok;
12024 case 0xb3c4: /* CEGR */ goto unimplemented;
12025 case 0xb3c5: /* CDGR */ goto unimplemented;
12026 case 0xb3c6: /* CXGR */ goto unimplemented;
12027 case 0xb3c8: /* CGER */ goto unimplemented;
12028 case 0xb3c9: /* CGDR */ goto unimplemented;
12029 case 0xb3ca: /* CGXR */ goto unimplemented;
12030 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
12031 ovl.fmt.RRE.r2); goto ok;
12032 case 0xb3d0: /* MDTR */ goto unimplemented;
12033 case 0xb3d1: /* DDTR */ goto unimplemented;
12034 case 0xb3d2: /* ADTR */ goto unimplemented;
12035 case 0xb3d3: /* SDTR */ goto unimplemented;
12036 case 0xb3d4: /* LDETR */ goto unimplemented;
12037 case 0xb3d5: /* LEDTR */ goto unimplemented;
12038 case 0xb3d6: /* LTDTR */ goto unimplemented;
12039 case 0xb3d7: /* FIDTR */ goto unimplemented;
12040 case 0xb3d8: /* MXTR */ goto unimplemented;
12041 case 0xb3d9: /* DXTR */ goto unimplemented;
12042 case 0xb3da: /* AXTR */ goto unimplemented;
12043 case 0xb3db: /* SXTR */ goto unimplemented;
12044 case 0xb3dc: /* LXDTR */ goto unimplemented;
12045 case 0xb3dd: /* LDXTR */ goto unimplemented;
12046 case 0xb3de: /* LTXTR */ goto unimplemented;
12047 case 0xb3df: /* FIXTR */ goto unimplemented;
12048 case 0xb3e0: /* KDTR */ goto unimplemented;
12049 case 0xb3e1: /* CGDTR */ goto unimplemented;
12050 case 0xb3e2: /* CUDTR */ goto unimplemented;
12051 case 0xb3e3: /* CSDTR */ goto unimplemented;
12052 case 0xb3e4: /* CDTR */ goto unimplemented;
12053 case 0xb3e5: /* EEDTR */ goto unimplemented;
12054 case 0xb3e7: /* ESDTR */ goto unimplemented;
12055 case 0xb3e8: /* KXTR */ goto unimplemented;
12056 case 0xb3e9: /* CGXTR */ goto unimplemented;
12057 case 0xb3ea: /* CUXTR */ goto unimplemented;
12058 case 0xb3eb: /* CSXTR */ goto unimplemented;
12059 case 0xb3ec: /* CXTR */ goto unimplemented;
12060 case 0xb3ed: /* EEXTR */ goto unimplemented;
12061 case 0xb3ef: /* ESXTR */ goto unimplemented;
12062 case 0xb3f1: /* CDGTR */ goto unimplemented;
12063 case 0xb3f2: /* CDUTR */ goto unimplemented;
12064 case 0xb3f3: /* CDSTR */ goto unimplemented;
12065 case 0xb3f4: /* CEDTR */ goto unimplemented;
12066 case 0xb3f5: /* QADTR */ goto unimplemented;
12067 case 0xb3f6: /* IEDTR */ goto unimplemented;
12068 case 0xb3f7: /* RRDTR */ goto unimplemented;
12069 case 0xb3f9: /* CXGTR */ goto unimplemented;
12070 case 0xb3fa: /* CXUTR */ goto unimplemented;
12071 case 0xb3fb: /* CXSTR */ goto unimplemented;
12072 case 0xb3fc: /* CEXTR */ goto unimplemented;
12073 case 0xb3fd: /* QAXTR */ goto unimplemented;
12074 case 0xb3fe: /* IEXTR */ goto unimplemented;
12075 case 0xb3ff: /* RRXTR */ goto unimplemented;
12076 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
12077 ovl.fmt.RRE.r2); goto ok;
12078 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
12079 ovl.fmt.RRE.r2); goto ok;
12080 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
12081 ovl.fmt.RRE.r2); goto ok;
12082 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
12083 ovl.fmt.RRE.r2); goto ok;
12084 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
12085 ovl.fmt.RRE.r2); goto ok;
12086 case 0xb905: /* LURAG */ goto unimplemented;
12087 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
12088 ovl.fmt.RRE.r2); goto ok;
12089 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
12090 ovl.fmt.RRE.r2); goto ok;
12091 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
12092 ovl.fmt.RRE.r2); goto ok;
12093 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
12094 ovl.fmt.RRE.r2); goto ok;
12095 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
12096 ovl.fmt.RRE.r2); goto ok;
12097 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
12098 ovl.fmt.RRE.r2); goto ok;
12099 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
12100 ovl.fmt.RRE.r2); goto ok;
12101 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
12102 ovl.fmt.RRE.r2); goto ok;
12103 case 0xb90e: /* EREGG */ goto unimplemented;
12104 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
12105 ovl.fmt.RRE.r2); goto ok;
12106 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
12107 ovl.fmt.RRE.r2); goto ok;
12108 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
12109 ovl.fmt.RRE.r2); goto ok;
12110 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
12111 ovl.fmt.RRE.r2); goto ok;
12112 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
12113 ovl.fmt.RRE.r2); goto ok;
12114 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
12115 ovl.fmt.RRE.r2); goto ok;
12116 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
12117 ovl.fmt.RRE.r2); goto ok;
12118 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
12119 ovl.fmt.RRE.r2); goto ok;
12120 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
12121 ovl.fmt.RRE.r2); goto ok;
12122 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
12123 ovl.fmt.RRE.r2); goto ok;
12124 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
12125 ovl.fmt.RRE.r2); goto ok;
12126 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
12127 ovl.fmt.RRE.r2); goto ok;
12128 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
12129 ovl.fmt.RRE.r2); goto ok;
12130 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
12131 ovl.fmt.RRE.r2); goto ok;
12132 case 0xb91e: /* KMAC */ goto unimplemented;
12133 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
12134 ovl.fmt.RRE.r2); goto ok;
12135 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
12136 ovl.fmt.RRE.r2); goto ok;
12137 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
12138 ovl.fmt.RRE.r2); goto ok;
12139 case 0xb925: /* STURG */ goto unimplemented;
12140 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
12141 ovl.fmt.RRE.r2); goto ok;
12142 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
12143 ovl.fmt.RRE.r2); goto ok;
12144 case 0xb928: /* PCKMO */ goto unimplemented;
12145 case 0xb92b: /* KMO */ goto unimplemented;
12146 case 0xb92c: /* PCC */ goto unimplemented;
12147 case 0xb92d: /* KMCTR */ goto unimplemented;
12148 case 0xb92e: /* KM */ goto unimplemented;
12149 case 0xb92f: /* KMC */ goto unimplemented;
12150 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
12151 ovl.fmt.RRE.r2); goto ok;
12152 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
12153 ovl.fmt.RRE.r2); goto ok;
12154 case 0xb93e: /* KIMD */ goto unimplemented;
12155 case 0xb93f: /* KLMD */ goto unimplemented;
12156 case 0xb941: /* CFDTR */ goto unimplemented;
12157 case 0xb942: /* CLGDTR */ goto unimplemented;
12158 case 0xb943: /* CLFDTR */ goto unimplemented;
12159 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
12160 ovl.fmt.RRE.r2); goto ok;
12161 case 0xb949: /* CFXTR */ goto unimplemented;
12162 case 0xb94a: /* CLGXTR */ goto unimplemented;
12163 case 0xb94b: /* CLFXTR */ goto unimplemented;
12164 case 0xb951: /* CDFTR */ goto unimplemented;
12165 case 0xb952: /* CDLGTR */ goto unimplemented;
12166 case 0xb953: /* CDLFTR */ goto unimplemented;
12167 case 0xb959: /* CXFTR */ goto unimplemented;
12168 case 0xb95a: /* CXLGTR */ goto unimplemented;
12169 case 0xb95b: /* CXLFTR */ goto unimplemented;
12170 case 0xb960: /* CGRT */ goto unimplemented;
12171 case 0xb961: /* CLGRT */ goto unimplemented;
12172 case 0xb972: /* CRT */ goto unimplemented;
12173 case 0xb973: /* CLRT */ goto unimplemented;
12174 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
12175 ovl.fmt.RRE.r2); goto ok;
12176 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
12177 ovl.fmt.RRE.r2); goto ok;
12178 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
12179 ovl.fmt.RRE.r2); goto ok;
12180 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
12181 ovl.fmt.RRE.r2); goto ok;
12182 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
12183 ovl.fmt.RRE.r2); goto ok;
12184 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
12185 ovl.fmt.RRE.r2); goto ok;
12186 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
12187 ovl.fmt.RRE.r2); goto ok;
12188 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
12189 ovl.fmt.RRE.r2); goto ok;
12190 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
12191 ovl.fmt.RRE.r2); goto ok;
12192 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
12193 ovl.fmt.RRE.r2); goto ok;
12194 case 0xb98a: /* CSPG */ goto unimplemented;
12195 case 0xb98d: /* EPSW */ goto unimplemented;
12196 case 0xb98e: /* IDTE */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000012197 case 0xb990: s390_format_RRF_M0RERE(s390_irgen_TRTT, ovl.fmt.RRF3.r3,
12198 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
12199 case 0xb991: s390_format_RRF_M0RERE(s390_irgen_TRTO, ovl.fmt.RRF3.r3,
12200 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
12201 case 0xb992: s390_format_RRF_M0RERE(s390_irgen_TROT, ovl.fmt.RRF3.r3,
12202 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
florian9af37692012-01-15 21:01:16 +000012203 case 0xb993: s390_format_RRF_M0RERE(s390_irgen_TROO, ovl.fmt.RRF3.r3,
12204 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012205 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
12206 ovl.fmt.RRE.r2); goto ok;
12207 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
12208 ovl.fmt.RRE.r2); goto ok;
12209 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
12210 ovl.fmt.RRE.r2); goto ok;
12211 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
12212 ovl.fmt.RRE.r2); goto ok;
12213 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
12214 ovl.fmt.RRE.r2); goto ok;
12215 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
12216 ovl.fmt.RRE.r2); goto ok;
12217 case 0xb99a: /* EPAIR */ goto unimplemented;
12218 case 0xb99b: /* ESAIR */ goto unimplemented;
12219 case 0xb99d: /* ESEA */ goto unimplemented;
12220 case 0xb99e: /* PTI */ goto unimplemented;
12221 case 0xb99f: /* SSAIR */ goto unimplemented;
12222 case 0xb9a2: /* PTF */ goto unimplemented;
12223 case 0xb9aa: /* LPTEA */ goto unimplemented;
12224 case 0xb9ae: /* RRBM */ goto unimplemented;
12225 case 0xb9af: /* PFMF */ goto unimplemented;
12226 case 0xb9b0: /* CU14 */ goto unimplemented;
florian2a415a12012-07-21 17:41:36 +000012227 case 0xb9b1: s390_format_RRF_M0RERE(s390_irgen_CU24, ovl.fmt.RRF3.r3,
12228 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
12229 goto ok;
sewardj2019a972011-03-07 16:04:07 +000012230 case 0xb9b2: /* CU41 */ goto unimplemented;
12231 case 0xb9b3: /* CU42 */ goto unimplemented;
12232 case 0xb9bd: /* TRTRE */ goto unimplemented;
12233 case 0xb9be: /* SRSTU */ goto unimplemented;
12234 case 0xb9bf: /* TRTE */ goto unimplemented;
12235 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
12236 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12237 goto ok;
12238 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
12239 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12240 goto ok;
12241 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
12242 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12243 goto ok;
12244 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
12245 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12246 goto ok;
12247 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
12248 ovl.fmt.RRE.r2); goto ok;
12249 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
12250 ovl.fmt.RRE.r2); goto ok;
12251 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
12252 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12253 goto ok;
12254 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
12255 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12256 goto ok;
12257 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
12258 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12259 goto ok;
12260 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
12261 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12262 goto ok;
12263 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
12264 ovl.fmt.RRE.r2); goto ok;
12265 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
12266 ovl.fmt.RRE.r2); goto ok;
12267 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000012268 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
12269 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12270 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012271 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
12272 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12273 goto ok;
12274 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
12275 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12276 goto ok;
12277 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
12278 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12279 goto ok;
12280 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
12281 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12282 goto ok;
12283 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
12284 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12285 goto ok;
12286 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
12287 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12288 goto ok;
12289 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
12290 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12291 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012292 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
12293 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12294 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012295 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
12296 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12297 goto ok;
12298 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
12299 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12300 goto ok;
12301 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
12302 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12303 goto ok;
12304 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
12305 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12306 goto ok;
12307 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
12308 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12309 goto ok;
12310 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
12311 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12312 goto ok;
12313 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
12314 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12315 goto ok;
12316 }
12317
12318 switch ((ovl.value & 0xff000000) >> 24) {
12319 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12320 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12321 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12322 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12323 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12324 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12325 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12326 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12327 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12328 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12329 case 0x45: /* BAL */ goto unimplemented;
12330 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12331 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12332 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12333 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12334 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12335 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12336 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12337 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12338 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12339 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12340 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12341 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12342 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12343 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12344 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12345 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12346 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12347 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12348 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12349 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12350 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12351 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12352 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12353 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12354 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12355 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12356 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12357 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12358 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12359 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12360 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12361 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12362 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12363 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12364 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12365 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12366 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12367 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12368 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12369 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12370 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12371 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12372 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12373 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12374 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12375 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12376 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12377 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12378 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12379 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12380 case 0x67: /* MXD */ goto unimplemented;
12381 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12382 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12383 case 0x69: /* CD */ goto unimplemented;
12384 case 0x6a: /* AD */ goto unimplemented;
12385 case 0x6b: /* SD */ goto unimplemented;
12386 case 0x6c: /* MD */ goto unimplemented;
12387 case 0x6d: /* DD */ goto unimplemented;
12388 case 0x6e: /* AW */ goto unimplemented;
12389 case 0x6f: /* SW */ goto unimplemented;
12390 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12391 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12392 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12393 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12394 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12395 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12396 case 0x79: /* CE */ goto unimplemented;
12397 case 0x7a: /* AE */ goto unimplemented;
12398 case 0x7b: /* SE */ goto unimplemented;
12399 case 0x7c: /* MDE */ goto unimplemented;
12400 case 0x7d: /* DE */ goto unimplemented;
12401 case 0x7e: /* AU */ goto unimplemented;
12402 case 0x7f: /* SU */ goto unimplemented;
12403 case 0x83: /* DIAG */ goto unimplemented;
12404 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
12405 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12406 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
12407 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12408 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12409 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12410 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12411 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12412 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12413 ovl.fmt.RS.d2); goto ok;
12414 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12415 ovl.fmt.RS.d2); goto ok;
12416 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12417 ovl.fmt.RS.d2); goto ok;
12418 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12419 ovl.fmt.RS.d2); goto ok;
12420 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12421 ovl.fmt.RS.d2); goto ok;
12422 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12423 ovl.fmt.RS.d2); goto ok;
12424 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12425 ovl.fmt.RS.d2); goto ok;
12426 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12427 ovl.fmt.RS.d2); goto ok;
12428 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12429 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12430 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12431 ovl.fmt.SI.d1); goto ok;
12432 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12433 ovl.fmt.SI.d1); goto ok;
12434 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12435 ovl.fmt.SI.d1); goto ok;
12436 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12437 ovl.fmt.SI.d1); goto ok;
12438 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12439 ovl.fmt.SI.d1); goto ok;
12440 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12441 ovl.fmt.SI.d1); goto ok;
12442 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12443 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12444 case 0x99: /* TRACE */ goto unimplemented;
12445 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12446 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12447 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12448 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12449 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
12450 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12451 goto ok;
12452 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
12453 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12454 goto ok;
12455 case 0xac: /* STNSM */ goto unimplemented;
12456 case 0xad: /* STOSM */ goto unimplemented;
12457 case 0xae: /* SIGP */ goto unimplemented;
12458 case 0xaf: /* MC */ goto unimplemented;
12459 case 0xb1: /* LRA */ goto unimplemented;
12460 case 0xb6: /* STCTL */ goto unimplemented;
12461 case 0xb7: /* LCTL */ goto unimplemented;
12462 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12463 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
florian448cbba2012-06-06 02:26:01 +000012464 case 0xbb: s390_format_RS_RRRD(s390_irgen_CDS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12465 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012466 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12467 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12468 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12469 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12470 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12471 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12472 }
12473
12474 return S390_DECODE_UNKNOWN_INSN;
12475
12476ok:
12477 return S390_DECODE_OK;
12478
12479unimplemented:
12480 return S390_DECODE_UNIMPLEMENTED_INSN;
12481}
12482
12483static s390_decode_t
12484s390_decode_6byte_and_irgen(UChar *bytes)
12485{
12486 typedef union {
12487 struct {
12488 unsigned int op1 : 8;
12489 unsigned int r1 : 4;
12490 unsigned int r3 : 4;
12491 unsigned int i2 : 16;
12492 unsigned int : 8;
12493 unsigned int op2 : 8;
12494 } RIE;
12495 struct {
12496 unsigned int op1 : 8;
12497 unsigned int r1 : 4;
12498 unsigned int r2 : 4;
12499 unsigned int i3 : 8;
12500 unsigned int i4 : 8;
12501 unsigned int i5 : 8;
12502 unsigned int op2 : 8;
12503 } RIE_RRUUU;
12504 struct {
12505 unsigned int op1 : 8;
12506 unsigned int r1 : 4;
12507 unsigned int : 4;
12508 unsigned int i2 : 16;
12509 unsigned int m3 : 4;
12510 unsigned int : 4;
12511 unsigned int op2 : 8;
12512 } RIEv1;
12513 struct {
12514 unsigned int op1 : 8;
12515 unsigned int r1 : 4;
12516 unsigned int r2 : 4;
12517 unsigned int i4 : 16;
12518 unsigned int m3 : 4;
12519 unsigned int : 4;
12520 unsigned int op2 : 8;
12521 } RIE_RRPU;
12522 struct {
12523 unsigned int op1 : 8;
12524 unsigned int r1 : 4;
12525 unsigned int m3 : 4;
12526 unsigned int i4 : 16;
12527 unsigned int i2 : 8;
12528 unsigned int op2 : 8;
12529 } RIEv3;
12530 struct {
12531 unsigned int op1 : 8;
12532 unsigned int r1 : 4;
12533 unsigned int op2 : 4;
12534 unsigned int i2 : 32;
12535 } RIL;
12536 struct {
12537 unsigned int op1 : 8;
12538 unsigned int r1 : 4;
12539 unsigned int m3 : 4;
12540 unsigned int b4 : 4;
12541 unsigned int d4 : 12;
12542 unsigned int i2 : 8;
12543 unsigned int op2 : 8;
12544 } RIS;
12545 struct {
12546 unsigned int op1 : 8;
12547 unsigned int r1 : 4;
12548 unsigned int r2 : 4;
12549 unsigned int b4 : 4;
12550 unsigned int d4 : 12;
12551 unsigned int m3 : 4;
12552 unsigned int : 4;
12553 unsigned int op2 : 8;
12554 } RRS;
12555 struct {
12556 unsigned int op1 : 8;
12557 unsigned int l1 : 4;
12558 unsigned int : 4;
12559 unsigned int b1 : 4;
12560 unsigned int d1 : 12;
12561 unsigned int : 8;
12562 unsigned int op2 : 8;
12563 } RSL;
12564 struct {
12565 unsigned int op1 : 8;
12566 unsigned int r1 : 4;
12567 unsigned int r3 : 4;
12568 unsigned int b2 : 4;
12569 unsigned int dl2 : 12;
12570 unsigned int dh2 : 8;
12571 unsigned int op2 : 8;
12572 } RSY;
12573 struct {
12574 unsigned int op1 : 8;
12575 unsigned int r1 : 4;
12576 unsigned int x2 : 4;
12577 unsigned int b2 : 4;
12578 unsigned int d2 : 12;
12579 unsigned int : 8;
12580 unsigned int op2 : 8;
12581 } RXE;
12582 struct {
12583 unsigned int op1 : 8;
12584 unsigned int r3 : 4;
12585 unsigned int x2 : 4;
12586 unsigned int b2 : 4;
12587 unsigned int d2 : 12;
12588 unsigned int r1 : 4;
12589 unsigned int : 4;
12590 unsigned int op2 : 8;
12591 } RXF;
12592 struct {
12593 unsigned int op1 : 8;
12594 unsigned int r1 : 4;
12595 unsigned int x2 : 4;
12596 unsigned int b2 : 4;
12597 unsigned int dl2 : 12;
12598 unsigned int dh2 : 8;
12599 unsigned int op2 : 8;
12600 } RXY;
12601 struct {
12602 unsigned int op1 : 8;
12603 unsigned int i2 : 8;
12604 unsigned int b1 : 4;
12605 unsigned int dl1 : 12;
12606 unsigned int dh1 : 8;
12607 unsigned int op2 : 8;
12608 } SIY;
12609 struct {
12610 unsigned int op : 8;
12611 unsigned int l : 8;
12612 unsigned int b1 : 4;
12613 unsigned int d1 : 12;
12614 unsigned int b2 : 4;
12615 unsigned int d2 : 12;
12616 } SS;
12617 struct {
12618 unsigned int op : 8;
12619 unsigned int l1 : 4;
12620 unsigned int l2 : 4;
12621 unsigned int b1 : 4;
12622 unsigned int d1 : 12;
12623 unsigned int b2 : 4;
12624 unsigned int d2 : 12;
12625 } SS_LLRDRD;
12626 struct {
12627 unsigned int op : 8;
12628 unsigned int r1 : 4;
12629 unsigned int r3 : 4;
12630 unsigned int b2 : 4;
12631 unsigned int d2 : 12;
12632 unsigned int b4 : 4;
12633 unsigned int d4 : 12;
12634 } SS_RRRDRD2;
12635 struct {
12636 unsigned int op : 16;
12637 unsigned int b1 : 4;
12638 unsigned int d1 : 12;
12639 unsigned int b2 : 4;
12640 unsigned int d2 : 12;
12641 } SSE;
12642 struct {
12643 unsigned int op1 : 8;
12644 unsigned int r3 : 4;
12645 unsigned int op2 : 4;
12646 unsigned int b1 : 4;
12647 unsigned int d1 : 12;
12648 unsigned int b2 : 4;
12649 unsigned int d2 : 12;
12650 } SSF;
12651 struct {
12652 unsigned int op : 16;
12653 unsigned int b1 : 4;
12654 unsigned int d1 : 12;
12655 unsigned int i2 : 16;
12656 } SIL;
12657 } formats;
12658 union {
12659 formats fmt;
12660 ULong value;
12661 } ovl;
12662
12663 vassert(sizeof(formats) == 6);
12664
12665 ((char *)(&ovl.value))[0] = bytes[0];
12666 ((char *)(&ovl.value))[1] = bytes[1];
12667 ((char *)(&ovl.value))[2] = bytes[2];
12668 ((char *)(&ovl.value))[3] = bytes[3];
12669 ((char *)(&ovl.value))[4] = bytes[4];
12670 ((char *)(&ovl.value))[5] = bytes[5];
12671 ((char *)(&ovl.value))[6] = 0x0;
12672 ((char *)(&ovl.value))[7] = 0x0;
12673
12674 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
12675 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
12676 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12677 ovl.fmt.RXY.dl2,
12678 ovl.fmt.RXY.dh2); goto ok;
12679 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
12680 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
12681 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12682 ovl.fmt.RXY.dl2,
12683 ovl.fmt.RXY.dh2); goto ok;
12684 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
12685 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12686 ovl.fmt.RXY.dl2,
12687 ovl.fmt.RXY.dh2); goto ok;
12688 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
12689 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12690 ovl.fmt.RXY.dl2,
12691 ovl.fmt.RXY.dh2); goto ok;
12692 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
12693 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12694 ovl.fmt.RXY.dl2,
12695 ovl.fmt.RXY.dh2); goto ok;
12696 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
12697 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12698 ovl.fmt.RXY.dl2,
12699 ovl.fmt.RXY.dh2); goto ok;
12700 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
12701 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12702 ovl.fmt.RXY.dl2,
12703 ovl.fmt.RXY.dh2); goto ok;
12704 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
12705 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12706 ovl.fmt.RXY.dl2,
12707 ovl.fmt.RXY.dh2); goto ok;
12708 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
12709 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12710 ovl.fmt.RXY.dl2,
12711 ovl.fmt.RXY.dh2); goto ok;
12712 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
12713 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
12714 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12715 ovl.fmt.RXY.dl2,
12716 ovl.fmt.RXY.dh2); goto ok;
12717 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
12718 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12719 ovl.fmt.RXY.dl2,
12720 ovl.fmt.RXY.dh2); goto ok;
12721 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
12722 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
12723 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12724 ovl.fmt.RXY.dl2,
12725 ovl.fmt.RXY.dh2); goto ok;
12726 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
12727 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12728 ovl.fmt.RXY.dl2,
12729 ovl.fmt.RXY.dh2); goto ok;
12730 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
12731 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12732 ovl.fmt.RXY.dl2,
12733 ovl.fmt.RXY.dh2); goto ok;
12734 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
12735 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12736 ovl.fmt.RXY.dl2,
12737 ovl.fmt.RXY.dh2); goto ok;
12738 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
12739 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12740 ovl.fmt.RXY.dl2,
12741 ovl.fmt.RXY.dh2); goto ok;
12742 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
12743 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12744 ovl.fmt.RXY.dl2,
12745 ovl.fmt.RXY.dh2); goto ok;
12746 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
12747 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12748 ovl.fmt.RXY.dl2,
12749 ovl.fmt.RXY.dh2); goto ok;
12750 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
12751 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12752 ovl.fmt.RXY.dl2,
12753 ovl.fmt.RXY.dh2); goto ok;
12754 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
12755 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12756 ovl.fmt.RXY.dl2,
12757 ovl.fmt.RXY.dh2); goto ok;
12758 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
12759 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12760 ovl.fmt.RXY.dl2,
12761 ovl.fmt.RXY.dh2); goto ok;
12762 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
12763 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12764 ovl.fmt.RXY.dl2,
12765 ovl.fmt.RXY.dh2); goto ok;
12766 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
12767 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12768 ovl.fmt.RXY.dl2,
12769 ovl.fmt.RXY.dh2); goto ok;
12770 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
12771 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12772 ovl.fmt.RXY.dl2,
12773 ovl.fmt.RXY.dh2); goto ok;
12774 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
12775 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12776 ovl.fmt.RXY.dl2,
12777 ovl.fmt.RXY.dh2); goto ok;
12778 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
12779 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12780 ovl.fmt.RXY.dl2,
12781 ovl.fmt.RXY.dh2); goto ok;
12782 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
12783 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12784 ovl.fmt.RXY.dl2,
12785 ovl.fmt.RXY.dh2); goto ok;
12786 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
12787 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
12788 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12789 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12790 ovl.fmt.RXY.dh2); goto ok;
12791 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
12792 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12793 ovl.fmt.RXY.dl2,
12794 ovl.fmt.RXY.dh2); goto ok;
12795 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
12796 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12797 ovl.fmt.RXY.dl2,
12798 ovl.fmt.RXY.dh2); goto ok;
12799 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
12800 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12801 ovl.fmt.RXY.dl2,
12802 ovl.fmt.RXY.dh2); goto ok;
12803 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
12804 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12805 ovl.fmt.RXY.dl2,
12806 ovl.fmt.RXY.dh2); goto ok;
12807 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
12808 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12809 ovl.fmt.RXY.dl2,
12810 ovl.fmt.RXY.dh2); goto ok;
12811 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
12812 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12813 ovl.fmt.RXY.dl2,
12814 ovl.fmt.RXY.dh2); goto ok;
12815 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
12816 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12817 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12818 ovl.fmt.RXY.dh2); goto ok;
12819 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
12820 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12821 ovl.fmt.RXY.dl2,
12822 ovl.fmt.RXY.dh2); goto ok;
12823 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
12824 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12825 ovl.fmt.RXY.dl2,
12826 ovl.fmt.RXY.dh2); goto ok;
12827 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
12828 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12829 ovl.fmt.RXY.dl2,
12830 ovl.fmt.RXY.dh2); goto ok;
12831 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
12832 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12833 ovl.fmt.RXY.dl2,
12834 ovl.fmt.RXY.dh2); goto ok;
12835 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
12836 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12837 ovl.fmt.RXY.dl2,
12838 ovl.fmt.RXY.dh2); goto ok;
12839 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
12840 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12841 ovl.fmt.RXY.dl2,
12842 ovl.fmt.RXY.dh2); goto ok;
12843 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
12844 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12845 ovl.fmt.RXY.dl2,
12846 ovl.fmt.RXY.dh2); goto ok;
12847 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
12848 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12849 ovl.fmt.RXY.dl2,
12850 ovl.fmt.RXY.dh2); goto ok;
12851 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
12852 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12853 ovl.fmt.RXY.dl2,
12854 ovl.fmt.RXY.dh2); goto ok;
12855 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12856 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12857 ovl.fmt.RXY.dl2,
12858 ovl.fmt.RXY.dh2); goto ok;
12859 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12860 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12861 ovl.fmt.RXY.dl2,
12862 ovl.fmt.RXY.dh2); goto ok;
12863 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12864 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12865 ovl.fmt.RXY.dl2,
12866 ovl.fmt.RXY.dh2); goto ok;
12867 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12868 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12869 ovl.fmt.RXY.dl2,
12870 ovl.fmt.RXY.dh2); goto ok;
12871 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12872 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12873 ovl.fmt.RXY.dl2,
12874 ovl.fmt.RXY.dh2); goto ok;
12875 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12876 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12877 ovl.fmt.RXY.dl2,
12878 ovl.fmt.RXY.dh2); goto ok;
12879 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12880 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12881 ovl.fmt.RXY.dl2,
12882 ovl.fmt.RXY.dh2); goto ok;
12883 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12884 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12885 ovl.fmt.RXY.dl2,
12886 ovl.fmt.RXY.dh2); goto ok;
12887 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12888 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12889 ovl.fmt.RXY.dl2,
12890 ovl.fmt.RXY.dh2); goto ok;
12891 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12892 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12893 ovl.fmt.RXY.dl2,
12894 ovl.fmt.RXY.dh2); goto ok;
12895 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12896 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12897 ovl.fmt.RXY.dl2,
12898 ovl.fmt.RXY.dh2); goto ok;
12899 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12900 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12901 ovl.fmt.RXY.dl2,
12902 ovl.fmt.RXY.dh2); goto ok;
12903 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12904 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12905 ovl.fmt.RXY.dl2,
12906 ovl.fmt.RXY.dh2); goto ok;
12907 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12908 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12909 ovl.fmt.RXY.dl2,
12910 ovl.fmt.RXY.dh2); goto ok;
12911 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12912 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12913 ovl.fmt.RXY.dl2,
12914 ovl.fmt.RXY.dh2); goto ok;
12915 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12916 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12917 ovl.fmt.RXY.dl2,
12918 ovl.fmt.RXY.dh2); goto ok;
12919 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12920 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12921 ovl.fmt.RXY.dl2,
12922 ovl.fmt.RXY.dh2); goto ok;
12923 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12924 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12925 ovl.fmt.RXY.dl2,
12926 ovl.fmt.RXY.dh2); goto ok;
12927 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12928 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12929 ovl.fmt.RXY.dl2,
12930 ovl.fmt.RXY.dh2); goto ok;
12931 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12932 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12933 ovl.fmt.RXY.dl2,
12934 ovl.fmt.RXY.dh2); goto ok;
12935 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12936 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12937 ovl.fmt.RXY.dl2,
12938 ovl.fmt.RXY.dh2); goto ok;
12939 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12940 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12941 ovl.fmt.RXY.dl2,
12942 ovl.fmt.RXY.dh2); goto ok;
12943 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12944 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12945 ovl.fmt.RXY.dl2,
12946 ovl.fmt.RXY.dh2); goto ok;
12947 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12948 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12949 ovl.fmt.RXY.dl2,
12950 ovl.fmt.RXY.dh2); goto ok;
12951 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12952 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12953 ovl.fmt.RXY.dl2,
12954 ovl.fmt.RXY.dh2); goto ok;
12955 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12956 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12957 ovl.fmt.RXY.dl2,
12958 ovl.fmt.RXY.dh2); goto ok;
12959 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12960 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12961 ovl.fmt.RXY.dl2,
12962 ovl.fmt.RXY.dh2); goto ok;
12963 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12964 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12965 ovl.fmt.RXY.dl2,
12966 ovl.fmt.RXY.dh2); goto ok;
12967 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12968 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12969 ovl.fmt.RXY.dl2,
12970 ovl.fmt.RXY.dh2); goto ok;
12971 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12972 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12973 ovl.fmt.RXY.dl2,
12974 ovl.fmt.RXY.dh2); goto ok;
12975 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12976 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12977 ovl.fmt.RXY.dl2,
12978 ovl.fmt.RXY.dh2); goto ok;
12979 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12980 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12981 ovl.fmt.RXY.dl2,
12982 ovl.fmt.RXY.dh2); goto ok;
12983 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12984 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12985 ovl.fmt.RXY.dl2,
12986 ovl.fmt.RXY.dh2); goto ok;
12987 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12988 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12989 ovl.fmt.RXY.dl2,
12990 ovl.fmt.RXY.dh2); goto ok;
12991 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12992 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12993 ovl.fmt.RXY.dl2,
12994 ovl.fmt.RXY.dh2); goto ok;
12995 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12996 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12997 ovl.fmt.RXY.dl2,
12998 ovl.fmt.RXY.dh2); goto ok;
12999 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
13000 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13001 ovl.fmt.RXY.dl2,
13002 ovl.fmt.RXY.dh2); goto ok;
13003 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
13004 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13005 ovl.fmt.RXY.dl2,
13006 ovl.fmt.RXY.dh2); goto ok;
13007 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
13008 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13009 ovl.fmt.RXY.dl2,
13010 ovl.fmt.RXY.dh2); goto ok;
13011 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
13012 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13013 ovl.fmt.RXY.dl2,
13014 ovl.fmt.RXY.dh2); goto ok;
13015 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
13016 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13017 ovl.fmt.RXY.dl2,
13018 ovl.fmt.RXY.dh2); goto ok;
13019 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
13020 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13021 ovl.fmt.RXY.dl2,
13022 ovl.fmt.RXY.dh2); goto ok;
13023 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
13024 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13025 ovl.fmt.RXY.dl2,
13026 ovl.fmt.RXY.dh2); goto ok;
13027 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
13028 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13029 ovl.fmt.RXY.dl2,
13030 ovl.fmt.RXY.dh2); goto ok;
13031 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
13032 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13033 ovl.fmt.RSY.dl2,
13034 ovl.fmt.RSY.dh2); goto ok;
13035 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
13036 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13037 ovl.fmt.RSY.dl2,
13038 ovl.fmt.RSY.dh2); goto ok;
13039 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
13040 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13041 ovl.fmt.RSY.dl2,
13042 ovl.fmt.RSY.dh2); goto ok;
13043 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
13044 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13045 ovl.fmt.RSY.dl2,
13046 ovl.fmt.RSY.dh2); goto ok;
13047 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
13048 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13049 ovl.fmt.RSY.dl2,
13050 ovl.fmt.RSY.dh2); goto ok;
13051 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
13052 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
13053 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13054 ovl.fmt.RSY.dl2,
13055 ovl.fmt.RSY.dh2); goto ok;
13056 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
13057 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13058 ovl.fmt.RSY.dl2,
13059 ovl.fmt.RSY.dh2); goto ok;
13060 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
13061 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13062 ovl.fmt.RSY.dl2,
13063 ovl.fmt.RSY.dh2); goto ok;
13064 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
13065 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13066 ovl.fmt.RSY.dl2,
13067 ovl.fmt.RSY.dh2); goto ok;
13068 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
13069 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13070 ovl.fmt.RSY.dl2,
13071 ovl.fmt.RSY.dh2); goto ok;
13072 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
13073 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13074 ovl.fmt.RSY.dl2,
13075 ovl.fmt.RSY.dh2); goto ok;
13076 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
13077 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
13078 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13079 ovl.fmt.RSY.dl2,
13080 ovl.fmt.RSY.dh2); goto ok;
13081 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
13082 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
13083 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
13084 ovl.fmt.RSY.dh2); goto ok;
13085 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
13086 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
13087 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
13088 ovl.fmt.RSY.dh2); goto ok;
13089 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
13090 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
13091 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13092 ovl.fmt.RSY.dl2,
13093 ovl.fmt.RSY.dh2); goto ok;
florian448cbba2012-06-06 02:26:01 +000013094 case 0xeb0000000031ULL: s390_format_RSY_RRRD(s390_irgen_CDSY, ovl.fmt.RSY.r1,
13095 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13096 ovl.fmt.RSY.dl2,
13097 ovl.fmt.RSY.dh2); goto ok;
13098 case 0xeb000000003eULL: s390_format_RSY_RRRD(s390_irgen_CDSG, ovl.fmt.RSY.r1,
13099 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13100 ovl.fmt.RSY.dl2,
13101 ovl.fmt.RSY.dh2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000013102 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
13103 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13104 ovl.fmt.RSY.dl2,
13105 ovl.fmt.RSY.dh2); goto ok;
13106 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
13107 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
13108 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
13109 ovl.fmt.RSY.dh2); goto ok;
13110 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
13111 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
13112 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
13113 ovl.fmt.SIY.dh1); goto ok;
13114 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
13115 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
13116 ovl.fmt.SIY.dh1); goto ok;
13117 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
13118 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
13119 ovl.fmt.SIY.dh1); goto ok;
13120 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
13121 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
13122 ovl.fmt.SIY.dh1); goto ok;
13123 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
13124 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
13125 ovl.fmt.SIY.dh1); goto ok;
13126 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
13127 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
13128 ovl.fmt.SIY.dh1); goto ok;
13129 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
13130 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
13131 ovl.fmt.SIY.dh1); goto ok;
13132 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
13133 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
13134 ovl.fmt.SIY.dh1); goto ok;
13135 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
13136 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
13137 ovl.fmt.SIY.dh1); goto ok;
13138 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
13139 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
13140 ovl.fmt.SIY.dh1); goto ok;
13141 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
13142 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13143 ovl.fmt.RSY.dl2,
13144 ovl.fmt.RSY.dh2); goto ok;
13145 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
13146 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13147 ovl.fmt.RSY.dl2,
13148 ovl.fmt.RSY.dh2); goto ok;
13149 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
13150 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
13151 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
13152 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13153 ovl.fmt.RSY.dl2,
13154 ovl.fmt.RSY.dh2); goto ok;
13155 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
13156 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13157 ovl.fmt.RSY.dl2,
13158 ovl.fmt.RSY.dh2); goto ok;
13159 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
13160 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13161 ovl.fmt.RSY.dl2,
13162 ovl.fmt.RSY.dh2); goto ok;
13163 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
13164 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13165 ovl.fmt.RSY.dl2,
13166 ovl.fmt.RSY.dh2); goto ok;
13167 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
13168 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
13169 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
13170 ovl.fmt.RSY.dh2); goto ok;
13171 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
13172 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
13173 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13174 ovl.fmt.RSY.dl2,
13175 ovl.fmt.RSY.dh2); goto ok;
13176 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
13177 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13178 ovl.fmt.RSY.dl2,
13179 ovl.fmt.RSY.dh2); goto ok;
13180 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
13181 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13182 ovl.fmt.RSY.dl2,
13183 ovl.fmt.RSY.dh2); goto ok;
13184 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
13185 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13186 ovl.fmt.RSY.dl2,
13187 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000013188 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
13189 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13190 ovl.fmt.RSY.dl2,
13191 ovl.fmt.RSY.dh2,
13192 S390_XMNM_LOCG); goto ok;
13193 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
13194 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
13195 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
13196 ovl.fmt.RSY.dh2,
13197 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000013198 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
13199 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13200 ovl.fmt.RSY.dl2,
13201 ovl.fmt.RSY.dh2); goto ok;
13202 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
13203 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13204 ovl.fmt.RSY.dl2,
13205 ovl.fmt.RSY.dh2); goto ok;
13206 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
13207 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13208 ovl.fmt.RSY.dl2,
13209 ovl.fmt.RSY.dh2); goto ok;
13210 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
13211 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13212 ovl.fmt.RSY.dl2,
13213 ovl.fmt.RSY.dh2); goto ok;
13214 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
13215 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
13216 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
13217 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000013218 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
13219 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13220 ovl.fmt.RSY.dl2,
13221 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
13222 goto ok;
13223 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
13224 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13225 ovl.fmt.RSY.dl2,
13226 ovl.fmt.RSY.dh2,
13227 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000013228 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
13229 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13230 ovl.fmt.RSY.dl2,
13231 ovl.fmt.RSY.dh2); goto ok;
13232 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
13233 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13234 ovl.fmt.RSY.dl2,
13235 ovl.fmt.RSY.dh2); goto ok;
13236 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
13237 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13238 ovl.fmt.RSY.dl2,
13239 ovl.fmt.RSY.dh2); goto ok;
13240 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
13241 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13242 ovl.fmt.RSY.dl2,
13243 ovl.fmt.RSY.dh2); goto ok;
13244 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
13245 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13246 ovl.fmt.RSY.dl2,
13247 ovl.fmt.RSY.dh2); goto ok;
13248 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
13249 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13250 goto ok;
13251 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
13252 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13253 goto ok;
13254 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
13255 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
13256 ovl.fmt.RIE_RRUUU.r1,
13257 ovl.fmt.RIE_RRUUU.r2,
13258 ovl.fmt.RIE_RRUUU.i3,
13259 ovl.fmt.RIE_RRUUU.i4,
13260 ovl.fmt.RIE_RRUUU.i5);
13261 goto ok;
13262 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
13263 ovl.fmt.RIE_RRUUU.r1,
13264 ovl.fmt.RIE_RRUUU.r2,
13265 ovl.fmt.RIE_RRUUU.i3,
13266 ovl.fmt.RIE_RRUUU.i4,
13267 ovl.fmt.RIE_RRUUU.i5);
13268 goto ok;
13269 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
13270 ovl.fmt.RIE_RRUUU.r1,
13271 ovl.fmt.RIE_RRUUU.r2,
13272 ovl.fmt.RIE_RRUUU.i3,
13273 ovl.fmt.RIE_RRUUU.i4,
13274 ovl.fmt.RIE_RRUUU.i5);
13275 goto ok;
13276 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
13277 ovl.fmt.RIE_RRUUU.r1,
13278 ovl.fmt.RIE_RRUUU.r2,
13279 ovl.fmt.RIE_RRUUU.i3,
13280 ovl.fmt.RIE_RRUUU.i4,
13281 ovl.fmt.RIE_RRUUU.i5);
13282 goto ok;
13283 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
13284 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
13285 ovl.fmt.RIE_RRPU.r1,
13286 ovl.fmt.RIE_RRPU.r2,
13287 ovl.fmt.RIE_RRPU.i4,
13288 ovl.fmt.RIE_RRPU.m3); goto ok;
13289 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
13290 ovl.fmt.RIE_RRPU.r1,
13291 ovl.fmt.RIE_RRPU.r2,
13292 ovl.fmt.RIE_RRPU.i4,
13293 ovl.fmt.RIE_RRPU.m3); goto ok;
13294 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
13295 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
13296 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
13297 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
13298 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
13299 ovl.fmt.RIE_RRPU.r1,
13300 ovl.fmt.RIE_RRPU.r2,
13301 ovl.fmt.RIE_RRPU.i4,
13302 ovl.fmt.RIE_RRPU.m3); goto ok;
13303 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
13304 ovl.fmt.RIE_RRPU.r1,
13305 ovl.fmt.RIE_RRPU.r2,
13306 ovl.fmt.RIE_RRPU.i4,
13307 ovl.fmt.RIE_RRPU.m3); goto ok;
13308 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
13309 ovl.fmt.RIEv3.r1,
13310 ovl.fmt.RIEv3.m3,
13311 ovl.fmt.RIEv3.i4,
13312 ovl.fmt.RIEv3.i2); goto ok;
13313 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
13314 ovl.fmt.RIEv3.r1,
13315 ovl.fmt.RIEv3.m3,
13316 ovl.fmt.RIEv3.i4,
13317 ovl.fmt.RIEv3.i2); goto ok;
13318 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
13319 ovl.fmt.RIEv3.r1,
13320 ovl.fmt.RIEv3.m3,
13321 ovl.fmt.RIEv3.i4,
13322 ovl.fmt.RIEv3.i2); goto ok;
13323 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
13324 ovl.fmt.RIEv3.r1,
13325 ovl.fmt.RIEv3.m3,
13326 ovl.fmt.RIEv3.i4,
13327 ovl.fmt.RIEv3.i2); goto ok;
13328 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
13329 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13330 goto ok;
13331 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
13332 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13333 ovl.fmt.RIE.i2); goto ok;
13334 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
13335 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13336 ovl.fmt.RIE.i2); goto ok;
13337 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
13338 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13339 ovl.fmt.RIE.i2); goto ok;
13340 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
13341 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13342 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13343 goto ok;
13344 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
13345 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13346 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13347 goto ok;
13348 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
13349 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13350 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13351 goto ok;
13352 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
13353 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13354 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13355 goto ok;
13356 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
13357 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13358 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13359 ovl.fmt.RIS.i2); goto ok;
13360 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
13361 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13362 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13363 ovl.fmt.RIS.i2); goto ok;
13364 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
13365 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
13366 ovl.fmt.RIS.d4,
13367 ovl.fmt.RIS.i2); goto ok;
13368 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
13369 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13370 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13371 ovl.fmt.RIS.i2); goto ok;
13372 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
13373 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13374 ovl.fmt.RXE.d2); goto ok;
13375 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
13376 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13377 ovl.fmt.RXE.d2); goto ok;
13378 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
13379 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13380 ovl.fmt.RXE.d2); goto ok;
13381 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
13382 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
13383 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
13384 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13385 ovl.fmt.RXE.d2); goto ok;
13386 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
13387 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13388 ovl.fmt.RXE.d2); goto ok;
13389 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
13390 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13391 ovl.fmt.RXE.d2); goto ok;
13392 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
13393 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
13394 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13395 ovl.fmt.RXE.d2); goto ok;
13396 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
13397 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13398 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13399 ovl.fmt.RXF.r1); goto ok;
13400 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
13401 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13402 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13403 ovl.fmt.RXF.r1); goto ok;
13404 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
13405 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13406 ovl.fmt.RXE.d2); goto ok;
13407 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
13408 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13409 ovl.fmt.RXE.d2); goto ok;
13410 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
13411 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13412 ovl.fmt.RXE.d2); goto ok;
13413 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
13414 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13415 ovl.fmt.RXE.d2); goto ok;
13416 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
13417 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13418 ovl.fmt.RXE.d2); goto ok;
13419 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
13420 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13421 ovl.fmt.RXE.d2); goto ok;
13422 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
13423 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
13424 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13425 ovl.fmt.RXE.d2); goto ok;
13426 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
13427 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13428 ovl.fmt.RXE.d2); goto ok;
13429 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
13430 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13431 ovl.fmt.RXE.d2); goto ok;
13432 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
13433 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13434 ovl.fmt.RXE.d2); goto ok;
13435 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
13436 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13437 ovl.fmt.RXE.d2); goto ok;
13438 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
13439 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13440 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13441 ovl.fmt.RXF.r1); goto ok;
13442 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
13443 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13444 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13445 ovl.fmt.RXF.r1); goto ok;
13446 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
13447 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
13448 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
13449 case 0xed000000002eULL: /* MAE */ goto unimplemented;
13450 case 0xed000000002fULL: /* MSE */ goto unimplemented;
13451 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
13452 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
13453 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
13454 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
13455 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
13456 case 0xed000000003aULL: /* MAY */ goto unimplemented;
13457 case 0xed000000003bULL: /* MY */ goto unimplemented;
13458 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
13459 case 0xed000000003dULL: /* MYH */ goto unimplemented;
13460 case 0xed000000003eULL: /* MAD */ goto unimplemented;
13461 case 0xed000000003fULL: /* MSD */ goto unimplemented;
13462 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
13463 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
13464 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
13465 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
13466 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
13467 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
13468 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
13469 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
13470 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
13471 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
13472 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
13473 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13474 ovl.fmt.RXY.dl2,
13475 ovl.fmt.RXY.dh2); goto ok;
13476 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
13477 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13478 ovl.fmt.RXY.dl2,
13479 ovl.fmt.RXY.dh2); goto ok;
13480 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
13481 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13482 ovl.fmt.RXY.dl2,
13483 ovl.fmt.RXY.dh2); goto ok;
13484 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
13485 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13486 ovl.fmt.RXY.dl2,
13487 ovl.fmt.RXY.dh2); goto ok;
13488 }
13489
13490 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
13491 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
13492 ovl.fmt.RIL.i2); goto ok;
13493 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
13494 ovl.fmt.RIL.i2); goto ok;
13495 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
13496 ovl.fmt.RIL.i2); goto ok;
13497 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
13498 ovl.fmt.RIL.i2); goto ok;
13499 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
13500 ovl.fmt.RIL.i2); goto ok;
13501 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
13502 ovl.fmt.RIL.i2); goto ok;
13503 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
13504 ovl.fmt.RIL.i2); goto ok;
13505 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
13506 ovl.fmt.RIL.i2); goto ok;
13507 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
13508 ovl.fmt.RIL.i2); goto ok;
13509 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
13510 ovl.fmt.RIL.i2); goto ok;
13511 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
13512 ovl.fmt.RIL.i2); goto ok;
13513 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
13514 ovl.fmt.RIL.i2); goto ok;
13515 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
13516 ovl.fmt.RIL.i2); goto ok;
13517 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
13518 ovl.fmt.RIL.i2); goto ok;
13519 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
13520 ovl.fmt.RIL.i2); goto ok;
13521 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
13522 ovl.fmt.RIL.i2); goto ok;
13523 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
13524 ovl.fmt.RIL.i2); goto ok;
13525 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
13526 ovl.fmt.RIL.i2); goto ok;
13527 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
13528 ovl.fmt.RIL.i2); goto ok;
13529 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
13530 ovl.fmt.RIL.i2); goto ok;
13531 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
13532 ovl.fmt.RIL.i2); goto ok;
13533 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
13534 ovl.fmt.RIL.i2); goto ok;
13535 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
13536 ovl.fmt.RIL.i2); goto ok;
13537 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
13538 ovl.fmt.RIL.i2); goto ok;
13539 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
13540 ovl.fmt.RIL.i2); goto ok;
13541 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
13542 ovl.fmt.RIL.i2); goto ok;
13543 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
13544 ovl.fmt.RIL.i2); goto ok;
13545 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
13546 ovl.fmt.RIL.i2); goto ok;
13547 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
13548 ovl.fmt.RIL.i2); goto ok;
13549 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
13550 ovl.fmt.RIL.i2); goto ok;
13551 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
13552 ovl.fmt.RIL.i2); goto ok;
13553 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
13554 ovl.fmt.RIL.i2); goto ok;
13555 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
13556 ovl.fmt.RIL.i2); goto ok;
13557 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
13558 ovl.fmt.RIL.i2); goto ok;
13559 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
13560 ovl.fmt.RIL.i2); goto ok;
13561 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
13562 ovl.fmt.RIL.i2); goto ok;
13563 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
13564 ovl.fmt.RIL.i2); goto ok;
13565 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
13566 ovl.fmt.RIL.i2); goto ok;
13567 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
13568 ovl.fmt.RIL.i2); goto ok;
13569 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
13570 ovl.fmt.RIL.i2); goto ok;
13571 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
13572 ovl.fmt.RIL.i2); goto ok;
13573 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
13574 ovl.fmt.RIL.i2); goto ok;
13575 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
13576 ovl.fmt.RIL.i2); goto ok;
13577 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
13578 ovl.fmt.RIL.i2); goto ok;
13579 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
13580 ovl.fmt.RIL.i2); goto ok;
13581 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
13582 ovl.fmt.RIL.i2); goto ok;
13583 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
13584 ovl.fmt.RIL.i2); goto ok;
13585 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
13586 ovl.fmt.RIL.i2); goto ok;
13587 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
13588 ovl.fmt.RIL.i2); goto ok;
13589 case 0xc800ULL: /* MVCOS */ goto unimplemented;
13590 case 0xc801ULL: /* ECTG */ goto unimplemented;
13591 case 0xc802ULL: /* CSST */ goto unimplemented;
13592 case 0xc804ULL: /* LPD */ goto unimplemented;
13593 case 0xc805ULL: /* LPDG */ goto unimplemented;
13594 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
13595 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
13596 ovl.fmt.RIL.i2); goto ok;
13597 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
13598 ovl.fmt.RIL.i2); goto ok;
13599 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
13600 ovl.fmt.RIL.i2); goto ok;
13601 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
13602 ovl.fmt.RIL.i2); goto ok;
13603 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
13604 ovl.fmt.RIL.i2); goto ok;
13605 }
13606
13607 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
13608 case 0xd0ULL: /* TRTR */ goto unimplemented;
13609 case 0xd1ULL: /* MVN */ goto unimplemented;
13610 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
13611 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13612 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13613 case 0xd3ULL: /* MVZ */ goto unimplemented;
13614 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
13615 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13616 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13617 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
13618 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13619 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13620 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
13621 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13622 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000013623 case 0xd7ULL:
13624 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
13625 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
13626 else
13627 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
13628 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13629 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
13630 goto ok;
sewardj2019a972011-03-07 16:04:07 +000013631 case 0xd9ULL: /* MVCK */ goto unimplemented;
13632 case 0xdaULL: /* MVCP */ goto unimplemented;
13633 case 0xdbULL: /* MVCS */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000013634 case 0xdcULL: s390_format_SS_L0RDRD(s390_irgen_TR, ovl.fmt.SS.l,
13635 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13636 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000013637 case 0xddULL: /* TRT */ goto unimplemented;
13638 case 0xdeULL: /* ED */ goto unimplemented;
13639 case 0xdfULL: /* EDMK */ goto unimplemented;
13640 case 0xe1ULL: /* PKU */ goto unimplemented;
13641 case 0xe2ULL: /* UNPKU */ goto unimplemented;
13642 case 0xe8ULL: /* MVCIN */ goto unimplemented;
13643 case 0xe9ULL: /* PKA */ goto unimplemented;
13644 case 0xeaULL: /* UNPKA */ goto unimplemented;
13645 case 0xeeULL: /* PLO */ goto unimplemented;
13646 case 0xefULL: /* LMD */ goto unimplemented;
13647 case 0xf0ULL: /* SRP */ goto unimplemented;
13648 case 0xf1ULL: /* MVO */ goto unimplemented;
13649 case 0xf2ULL: /* PACK */ goto unimplemented;
13650 case 0xf3ULL: /* UNPK */ goto unimplemented;
13651 case 0xf8ULL: /* ZAP */ goto unimplemented;
13652 case 0xf9ULL: /* CP */ goto unimplemented;
13653 case 0xfaULL: /* AP */ goto unimplemented;
13654 case 0xfbULL: /* SP */ goto unimplemented;
13655 case 0xfcULL: /* MP */ goto unimplemented;
13656 case 0xfdULL: /* DP */ goto unimplemented;
13657 }
13658
13659 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
13660 case 0xe500ULL: /* LASP */ goto unimplemented;
13661 case 0xe501ULL: /* TPROT */ goto unimplemented;
13662 case 0xe502ULL: /* STRAG */ goto unimplemented;
13663 case 0xe50eULL: /* MVCSK */ goto unimplemented;
13664 case 0xe50fULL: /* MVCDK */ goto unimplemented;
13665 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
13666 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13667 goto ok;
13668 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
13669 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13670 goto ok;
13671 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
13672 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13673 goto ok;
13674 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
13675 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13676 goto ok;
13677 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
13678 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13679 goto ok;
13680 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
13681 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13682 goto ok;
13683 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
13684 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13685 goto ok;
13686 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
13687 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13688 goto ok;
13689 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
13690 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13691 goto ok;
13692 }
13693
13694 return S390_DECODE_UNKNOWN_INSN;
13695
13696ok:
13697 return S390_DECODE_OK;
13698
13699unimplemented:
13700 return S390_DECODE_UNIMPLEMENTED_INSN;
13701}
13702
13703/* Handle "special" instructions. */
13704static s390_decode_t
13705s390_decode_special_and_irgen(UChar *bytes)
13706{
13707 s390_decode_t status = S390_DECODE_OK;
13708
13709 /* Got a "Special" instruction preamble. Which one is it? */
13710 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
13711 s390_irgen_client_request();
13712 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
13713 s390_irgen_guest_NRADDR();
13714 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
13715 s390_irgen_call_noredir();
13716 } else {
13717 /* We don't know what it is. */
13718 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
13719 }
13720
13721 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13722
13723 return status;
13724}
13725
13726
13727/* Function returns # bytes that were decoded or 0 in case of failure */
florianb4df7682011-07-05 02:09:01 +000013728static UInt
sewardj2019a972011-03-07 16:04:07 +000013729s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
13730{
13731 s390_decode_t status;
13732
13733 dis_res = dres;
13734
13735 /* Spot the 8-byte preamble: 18ff lr r15,r15
13736 1811 lr r1,r1
13737 1822 lr r2,r2
13738 1833 lr r3,r3 */
13739 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
13740 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
13741 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
13742
13743 /* Handle special instruction that follows that preamble. */
13744 if (0) vex_printf("special function handling...\n");
florian2c8ed942011-08-01 22:07:51 +000013745
13746 insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13747 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13748
13749 status =
13750 s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE);
sewardj2019a972011-03-07 16:04:07 +000013751 } else {
13752 /* Handle normal instructions. */
13753 switch (insn_length) {
13754 case 2:
13755 status = s390_decode_2byte_and_irgen(bytes);
13756 break;
13757
13758 case 4:
13759 status = s390_decode_4byte_and_irgen(bytes);
13760 break;
13761
13762 case 6:
13763 status = s390_decode_6byte_and_irgen(bytes);
13764 break;
13765
13766 default:
13767 status = S390_DECODE_ERROR;
13768 break;
13769 }
13770 }
florian5fcbba22011-07-27 20:40:22 +000013771 /* If next instruction is execute, stop here */
florianf9e1ed72012-04-17 02:41:56 +000013772 if (dis_res->whatNext == Dis_Continue && bytes[insn_length] == 0x44) {
13773 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +000013774 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000013775 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +000013776 }
13777
13778 if (status == S390_DECODE_OK) return insn_length; /* OK */
13779
13780 /* Decoding failed somehow */
13781 vex_printf("vex s390->IR: ");
13782 switch (status) {
13783 case S390_DECODE_UNKNOWN_INSN:
13784 vex_printf("unknown insn: ");
13785 break;
13786
13787 case S390_DECODE_UNIMPLEMENTED_INSN:
13788 vex_printf("unimplemented insn: ");
13789 break;
13790
13791 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
13792 vex_printf("unimplemented special insn: ");
13793 break;
13794
13795 default:
13796 case S390_DECODE_ERROR:
13797 vex_printf("decoding error: ");
13798 break;
13799 }
13800
13801 vex_printf("%02x%02x", bytes[0], bytes[1]);
13802 if (insn_length > 2) {
13803 vex_printf(" %02x%02x", bytes[2], bytes[3]);
13804 }
13805 if (insn_length > 4) {
13806 vex_printf(" %02x%02x", bytes[4], bytes[5]);
13807 }
13808 vex_printf("\n");
13809
13810 return 0; /* Failed */
13811}
13812
13813
sewardj2019a972011-03-07 16:04:07 +000013814/* Disassemble a single instruction INSN into IR. */
13815static DisResult
florian420c5012011-07-22 02:12:28 +000013816disInstr_S390_WRK(UChar *insn)
sewardj2019a972011-03-07 16:04:07 +000013817{
13818 UChar byte;
13819 UInt insn_length;
13820 DisResult dres;
13821
13822 /* ---------------------------------------------------- */
13823 /* --- Compute instruction length -- */
13824 /* ---------------------------------------------------- */
13825
13826 /* Get the first byte of the insn. */
13827 byte = insn[0];
13828
13829 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
13830 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
13831 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
13832
13833 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13834
13835 /* ---------------------------------------------------- */
13836 /* --- Initialise the DisResult data -- */
13837 /* ---------------------------------------------------- */
13838 dres.whatNext = Dis_Continue;
13839 dres.len = insn_length;
13840 dres.continueAt = 0;
florian8844a632012-04-13 04:04:06 +000013841 dres.jk_StopHere = Ijk_INVALID;
sewardj2019a972011-03-07 16:04:07 +000013842
floriana99f20e2011-07-17 14:16:41 +000013843 /* fixs390: consider chasing of conditional jumps */
13844
sewardj2019a972011-03-07 16:04:07 +000013845 /* Normal and special instruction handling starts here. */
13846 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
13847 /* All decode failures end up here. The decoder has already issued an
13848 error message.
13849 Tell the dispatcher that this insn cannot be decoded, and so has
florian8844a632012-04-13 04:04:06 +000013850 not been executed, and (is currently) the next to be executed. */
florian65b5b3f2012-04-22 02:51:27 +000013851 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +000013852
florian8844a632012-04-13 04:04:06 +000013853 dres.whatNext = Dis_StopHere;
13854 dres.jk_StopHere = Ijk_NoDecode;
13855 dres.continueAt = 0;
13856 dres.len = 0;
13857 } else {
13858 /* Decode success */
13859 switch (dres.whatNext) {
13860 case Dis_Continue:
florian8559e412012-04-19 14:23:48 +000013861 put_IA(mkaddr_expr(guest_IA_next_instr));
florian8844a632012-04-13 04:04:06 +000013862 break;
13863 case Dis_ResteerU:
13864 case Dis_ResteerC:
13865 put_IA(mkaddr_expr(dres.continueAt));
13866 break;
13867 case Dis_StopHere:
13868 break;
13869 default:
13870 vassert(0);
13871 }
sewardj2019a972011-03-07 16:04:07 +000013872 }
13873
13874 return dres;
13875}
13876
13877
13878/*------------------------------------------------------------*/
13879/*--- Top-level fn ---*/
13880/*------------------------------------------------------------*/
13881
13882/* Disassemble a single instruction into IR. The instruction
13883 is located in host memory at &guest_code[delta]. */
13884
13885DisResult
13886disInstr_S390(IRSB *irsb_IN,
sewardj2019a972011-03-07 16:04:07 +000013887 Bool (*resteerOkFn)(void *, Addr64),
13888 Bool resteerCisOk,
13889 void *callback_opaque,
13890 UChar *guest_code,
13891 Long delta,
13892 Addr64 guest_IP,
13893 VexArch guest_arch,
13894 VexArchInfo *archinfo,
13895 VexAbiInfo *abiinfo,
13896 Bool host_bigendian)
13897{
13898 vassert(guest_arch == VexArchS390X);
13899
13900 /* The instruction decoder requires a big-endian machine. */
13901 vassert(host_bigendian == True);
13902
13903 /* Set globals (see top of this file) */
13904 guest_IA_curr_instr = guest_IP;
sewardj2019a972011-03-07 16:04:07 +000013905 irsb = irsb_IN;
florian420c5012011-07-22 02:12:28 +000013906 resteer_fn = resteerOkFn;
13907 resteer_data = callback_opaque;
sewardj2019a972011-03-07 16:04:07 +000013908
florian420c5012011-07-22 02:12:28 +000013909 return disInstr_S390_WRK(guest_code + delta);
sewardj2019a972011-03-07 16:04:07 +000013910}
13911
13912/*---------------------------------------------------------------*/
13913/*--- end guest_s390_toIR.c ---*/
13914/*---------------------------------------------------------------*/