Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 3 | * hda_intel.c - Implementation of primary alsa driver code base |
| 4 | * for Intel HD Audio. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * Copyright(c) 2004 Intel Corporation. All rights reserved. |
| 7 | * |
| 8 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> |
| 9 | * PeiSen Hou <pshou@realtek.com.tw> |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify it |
| 12 | * under the terms of the GNU General Public License as published by the Free |
| 13 | * Software Foundation; either version 2 of the License, or (at your option) |
| 14 | * any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 19 | * more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License along with |
| 22 | * this program; if not, write to the Free Software Foundation, Inc., 59 |
| 23 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 24 | * |
| 25 | * CONTACTS: |
| 26 | * |
| 27 | * Matt Jared matt.jared@intel.com |
| 28 | * Andy Kopp andy.kopp@intel.com |
| 29 | * Dan Kogan dan.d.kogan@intel.com |
| 30 | * |
| 31 | * CHANGES: |
| 32 | * |
| 33 | * 2004.12.01 Major rewrite by tiwai, merged the work of pshou |
| 34 | * |
| 35 | */ |
| 36 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | #include <asm/io.h> |
| 38 | #include <linux/delay.h> |
| 39 | #include <linux/interrupt.h> |
Randy Dunlap | 362775e | 2005-11-07 14:43:23 +0100 | [diff] [blame] | 40 | #include <linux/kernel.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #include <linux/module.h> |
Andrew Morton | 24982c5 | 2008-03-04 10:08:58 +0100 | [diff] [blame] | 42 | #include <linux/dma-mapping.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | #include <linux/moduleparam.h> |
| 44 | #include <linux/init.h> |
| 45 | #include <linux/slab.h> |
| 46 | #include <linux/pci.h> |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 47 | #include <linux/mutex.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <sound/core.h> |
| 49 | #include <sound/initval.h> |
| 50 | #include "hda_codec.h" |
| 51 | |
| 52 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 53 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; |
| 54 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; |
| 55 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; |
| 56 | static char *model[SNDRV_CARDS]; |
| 57 | static int position_fix[SNDRV_CARDS]; |
| 58 | static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1}; |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 59 | static int single_cmd; |
Takashi Iwai | 134a11f | 2006-11-10 12:08:37 +0100 | [diff] [blame] | 60 | static int enable_msi; |
Takashi Iwai | 675f25d | 2008-06-10 17:53:20 +0200 | [diff] [blame] | 61 | static int bdl_pos_adj = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 63 | module_param_array(index, int, NULL, 0444); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | MODULE_PARM_DESC(index, "Index value for Intel HD audio interface."); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 65 | module_param_array(id, charp, NULL, 0444); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | MODULE_PARM_DESC(id, "ID string for Intel HD audio interface."); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 67 | module_param_array(enable, bool, NULL, 0444); |
| 68 | MODULE_PARM_DESC(enable, "Enable Intel HD audio interface."); |
| 69 | module_param_array(model, charp, NULL, 0444); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | MODULE_PARM_DESC(model, "Use the given board model."); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 71 | module_param_array(position_fix, int, NULL, 0444); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 72 | MODULE_PARM_DESC(position_fix, "Fix DMA pointer " |
Takashi Iwai | d2e1c97 | 2008-06-10 17:53:34 +0200 | [diff] [blame^] | 73 | "(0 = auto, 1 = none, 2 = POSBUF)."); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 74 | module_param_array(probe_mask, int, NULL, 0444); |
Takashi Iwai | 606ad75 | 2005-11-24 16:03:40 +0100 | [diff] [blame] | 75 | MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1)."); |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 76 | module_param(single_cmd, bool, 0444); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 77 | MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs " |
| 78 | "(for debugging only)."); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 79 | module_param(enable_msi, int, 0444); |
Takashi Iwai | 134a11f | 2006-11-10 12:08:37 +0100 | [diff] [blame] | 80 | MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)"); |
Takashi Iwai | 675f25d | 2008-06-10 17:53:20 +0200 | [diff] [blame] | 81 | module_param(bdl_pos_adj, int, 0644); |
| 82 | MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset"); |
Takashi Iwai | 606ad75 | 2005-11-24 16:03:40 +0100 | [diff] [blame] | 83 | |
Takashi Iwai | dee1b66 | 2007-08-13 16:10:30 +0200 | [diff] [blame] | 84 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 85 | /* power_save option is defined in hda_codec.c */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | |
Takashi Iwai | dee1b66 | 2007-08-13 16:10:30 +0200 | [diff] [blame] | 87 | /* reset the HD-audio controller in power save mode. |
| 88 | * this may give more power-saving, but will take longer time to |
| 89 | * wake up. |
| 90 | */ |
| 91 | static int power_save_controller = 1; |
| 92 | module_param(power_save_controller, bool, 0644); |
| 93 | MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode."); |
| 94 | #endif |
| 95 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | MODULE_LICENSE("GPL"); |
| 97 | MODULE_SUPPORTED_DEVICE("{{Intel, ICH6}," |
| 98 | "{Intel, ICH6M}," |
Jason Gaston | 2f1b381 | 2005-05-01 08:58:50 -0700 | [diff] [blame] | 99 | "{Intel, ICH7}," |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 100 | "{Intel, ESB2}," |
Jason Gaston | d298139 | 2006-01-10 11:07:37 +0100 | [diff] [blame] | 101 | "{Intel, ICH8}," |
Jason Gaston | f9cc8a8 | 2006-11-22 11:53:52 +0100 | [diff] [blame] | 102 | "{Intel, ICH9}," |
Jason Gaston | c34f5a0 | 2008-01-29 12:38:49 +0100 | [diff] [blame] | 103 | "{Intel, ICH10}," |
Tobin Davis | 4979bca | 2008-01-30 08:13:55 +0100 | [diff] [blame] | 104 | "{Intel, SCH}," |
Takashi Iwai | fc20a56 | 2005-05-12 15:00:41 +0200 | [diff] [blame] | 105 | "{ATI, SB450}," |
Felix Kuehling | 89be83f | 2006-03-31 12:33:59 +0200 | [diff] [blame] | 106 | "{ATI, SB600}," |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 107 | "{ATI, RS600}," |
Felix Kuehling | 5b15c95 | 2006-10-16 12:49:47 +0200 | [diff] [blame] | 108 | "{ATI, RS690}," |
Wolke Liu | e6db111 | 2007-04-27 12:20:57 +0200 | [diff] [blame] | 109 | "{ATI, RS780}," |
| 110 | "{ATI, R600}," |
Herton Ronaldo Krzesinski | 2797f72 | 2007-11-05 18:21:56 +0100 | [diff] [blame] | 111 | "{ATI, RV630}," |
| 112 | "{ATI, RV610}," |
Wolke Liu | 27da183 | 2007-11-16 11:06:30 +0100 | [diff] [blame] | 113 | "{ATI, RV670}," |
| 114 | "{ATI, RV635}," |
| 115 | "{ATI, RV620}," |
| 116 | "{ATI, RV770}," |
Takashi Iwai | fc20a56 | 2005-05-12 15:00:41 +0200 | [diff] [blame] | 117 | "{VIA, VT8251}," |
Takashi Iwai | 4767231 | 2005-08-12 16:44:04 +0200 | [diff] [blame] | 118 | "{VIA, VT8237A}," |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 119 | "{SiS, SIS966}," |
| 120 | "{ULI, M5461}}"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | MODULE_DESCRIPTION("Intel HDA driver"); |
| 122 | |
| 123 | #define SFX "hda-intel: " |
| 124 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 125 | |
| 126 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | * registers |
| 128 | */ |
| 129 | #define ICH6_REG_GCAP 0x00 |
| 130 | #define ICH6_REG_VMIN 0x02 |
| 131 | #define ICH6_REG_VMAJ 0x03 |
| 132 | #define ICH6_REG_OUTPAY 0x04 |
| 133 | #define ICH6_REG_INPAY 0x06 |
| 134 | #define ICH6_REG_GCTL 0x08 |
| 135 | #define ICH6_REG_WAKEEN 0x0c |
| 136 | #define ICH6_REG_STATESTS 0x0e |
| 137 | #define ICH6_REG_GSTS 0x10 |
| 138 | #define ICH6_REG_INTCTL 0x20 |
| 139 | #define ICH6_REG_INTSTS 0x24 |
| 140 | #define ICH6_REG_WALCLK 0x30 |
| 141 | #define ICH6_REG_SYNC 0x34 |
| 142 | #define ICH6_REG_CORBLBASE 0x40 |
| 143 | #define ICH6_REG_CORBUBASE 0x44 |
| 144 | #define ICH6_REG_CORBWP 0x48 |
| 145 | #define ICH6_REG_CORBRP 0x4A |
| 146 | #define ICH6_REG_CORBCTL 0x4c |
| 147 | #define ICH6_REG_CORBSTS 0x4d |
| 148 | #define ICH6_REG_CORBSIZE 0x4e |
| 149 | |
| 150 | #define ICH6_REG_RIRBLBASE 0x50 |
| 151 | #define ICH6_REG_RIRBUBASE 0x54 |
| 152 | #define ICH6_REG_RIRBWP 0x58 |
| 153 | #define ICH6_REG_RINTCNT 0x5a |
| 154 | #define ICH6_REG_RIRBCTL 0x5c |
| 155 | #define ICH6_REG_RIRBSTS 0x5d |
| 156 | #define ICH6_REG_RIRBSIZE 0x5e |
| 157 | |
| 158 | #define ICH6_REG_IC 0x60 |
| 159 | #define ICH6_REG_IR 0x64 |
| 160 | #define ICH6_REG_IRS 0x68 |
| 161 | #define ICH6_IRS_VALID (1<<1) |
| 162 | #define ICH6_IRS_BUSY (1<<0) |
| 163 | |
| 164 | #define ICH6_REG_DPLBASE 0x70 |
| 165 | #define ICH6_REG_DPUBASE 0x74 |
| 166 | #define ICH6_DPLBASE_ENABLE 0x1 /* Enable position buffer */ |
| 167 | |
| 168 | /* SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */ |
| 169 | enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; |
| 170 | |
| 171 | /* stream register offsets from stream base */ |
| 172 | #define ICH6_REG_SD_CTL 0x00 |
| 173 | #define ICH6_REG_SD_STS 0x03 |
| 174 | #define ICH6_REG_SD_LPIB 0x04 |
| 175 | #define ICH6_REG_SD_CBL 0x08 |
| 176 | #define ICH6_REG_SD_LVI 0x0c |
| 177 | #define ICH6_REG_SD_FIFOW 0x0e |
| 178 | #define ICH6_REG_SD_FIFOSIZE 0x10 |
| 179 | #define ICH6_REG_SD_FORMAT 0x12 |
| 180 | #define ICH6_REG_SD_BDLPL 0x18 |
| 181 | #define ICH6_REG_SD_BDLPU 0x1c |
| 182 | |
| 183 | /* PCI space */ |
| 184 | #define ICH6_PCIREG_TCSEL 0x44 |
| 185 | |
| 186 | /* |
| 187 | * other constants |
| 188 | */ |
| 189 | |
| 190 | /* max number of SDs */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 191 | /* ICH, ATI and VIA have 4 playback and 4 capture */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 192 | #define ICH6_NUM_CAPTURE 4 |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 193 | #define ICH6_NUM_PLAYBACK 4 |
| 194 | |
| 195 | /* ULI has 6 playback and 5 capture */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 196 | #define ULI_NUM_CAPTURE 5 |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 197 | #define ULI_NUM_PLAYBACK 6 |
| 198 | |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 199 | /* ATI HDMI has 1 playback and 0 capture */ |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 200 | #define ATIHDMI_NUM_CAPTURE 0 |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 201 | #define ATIHDMI_NUM_PLAYBACK 1 |
| 202 | |
Kailang Yang | f269002 | 2008-05-27 11:44:55 +0200 | [diff] [blame] | 203 | /* TERA has 4 playback and 3 capture */ |
| 204 | #define TERA_NUM_CAPTURE 3 |
| 205 | #define TERA_NUM_PLAYBACK 4 |
| 206 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 207 | /* this number is statically defined for simplicity */ |
| 208 | #define MAX_AZX_DEV 16 |
| 209 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | /* max number of fragments - we may use more if allocating more pages for BDL */ |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 211 | #define BDL_SIZE 4096 |
| 212 | #define AZX_MAX_BDL_ENTRIES (BDL_SIZE / 16) |
| 213 | #define AZX_MAX_FRAG 32 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 214 | /* max buffer size - no h/w limit, you can increase as you like */ |
| 215 | #define AZX_MAX_BUF_SIZE (1024*1024*1024) |
| 216 | /* max number of PCM devics per card */ |
Takashi Iwai | 7ba72ba | 2008-02-06 14:03:20 +0100 | [diff] [blame] | 217 | #define AZX_MAX_PCMS 8 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | |
| 219 | /* RIRB int mask: overrun[2], response[0] */ |
| 220 | #define RIRB_INT_RESPONSE 0x01 |
| 221 | #define RIRB_INT_OVERRUN 0x04 |
| 222 | #define RIRB_INT_MASK 0x05 |
| 223 | |
| 224 | /* STATESTS int mask: SD2,SD1,SD0 */ |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 225 | #define AZX_MAX_CODECS 3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | #define STATESTS_INT_MASK 0x07 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | |
| 228 | /* SD_CTL bits */ |
| 229 | #define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */ |
| 230 | #define SD_CTL_DMA_START 0x02 /* stream DMA start bit */ |
Takashi Iwai | 850f0e5 | 2008-03-18 17:11:05 +0100 | [diff] [blame] | 231 | #define SD_CTL_STRIPE (3 << 16) /* stripe control */ |
| 232 | #define SD_CTL_TRAFFIC_PRIO (1 << 18) /* traffic priority */ |
| 233 | #define SD_CTL_DIR (1 << 19) /* bi-directional stream */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | #define SD_CTL_STREAM_TAG_MASK (0xf << 20) |
| 235 | #define SD_CTL_STREAM_TAG_SHIFT 20 |
| 236 | |
| 237 | /* SD_CTL and SD_STS */ |
| 238 | #define SD_INT_DESC_ERR 0x10 /* descriptor error interrupt */ |
| 239 | #define SD_INT_FIFO_ERR 0x08 /* FIFO error interrupt */ |
| 240 | #define SD_INT_COMPLETE 0x04 /* completion interrupt */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 241 | #define SD_INT_MASK (SD_INT_DESC_ERR|SD_INT_FIFO_ERR|\ |
| 242 | SD_INT_COMPLETE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | |
| 244 | /* SD_STS */ |
| 245 | #define SD_STS_FIFO_READY 0x20 /* FIFO ready */ |
| 246 | |
| 247 | /* INTCTL and INTSTS */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 248 | #define ICH6_INT_ALL_STREAM 0xff /* all stream interrupts */ |
| 249 | #define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ |
| 250 | #define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | |
Matt | 41e2fce | 2005-07-04 17:49:55 +0200 | [diff] [blame] | 252 | /* GCTL unsolicited response enable bit */ |
| 253 | #define ICH6_GCTL_UREN (1<<8) |
| 254 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 255 | /* GCTL reset bit */ |
| 256 | #define ICH6_GCTL_RESET (1<<0) |
| 257 | |
| 258 | /* CORB/RIRB control, read/write pointer */ |
| 259 | #define ICH6_RBCTL_DMA_EN 0x02 /* enable DMA */ |
| 260 | #define ICH6_RBCTL_IRQ_EN 0x01 /* enable IRQ */ |
| 261 | #define ICH6_RBRWP_CLR 0x8000 /* read/write pointer clear */ |
| 262 | /* below are so far hardcoded - should read registers in future */ |
| 263 | #define ICH6_MAX_CORB_ENTRIES 256 |
| 264 | #define ICH6_MAX_RIRB_ENTRIES 256 |
| 265 | |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 266 | /* position fix mode */ |
| 267 | enum { |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 268 | POS_FIX_AUTO, |
Takashi Iwai | d2e1c97 | 2008-06-10 17:53:34 +0200 | [diff] [blame^] | 269 | POS_FIX_LPIB, |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 270 | POS_FIX_POSBUF, |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 271 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 272 | |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 273 | /* Defines for ATI HD Audio support in SB450 south bridge */ |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 274 | #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42 |
| 275 | #define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02 |
| 276 | |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 277 | /* Defines for Nvidia HDA support */ |
| 278 | #define NVIDIA_HDA_TRANSREG_ADDR 0x4e |
| 279 | #define NVIDIA_HDA_ENABLE_COHBITS 0x0f |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 280 | |
Takashi Iwai | 90a5ad5 | 2008-02-22 18:36:22 +0100 | [diff] [blame] | 281 | /* Defines for Intel SCH HDA snoop control */ |
| 282 | #define INTEL_SCH_HDA_DEVC 0x78 |
| 283 | #define INTEL_SCH_HDA_DEVC_NOSNOOP (0x1<<11) |
| 284 | |
| 285 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 286 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | */ |
| 288 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 289 | struct azx_dev { |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 290 | struct snd_dma_buffer bdl; /* BDL buffer */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 291 | u32 *posbuf; /* position buffer pointer */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 292 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 293 | unsigned int bufsize; /* size of the play buffer in bytes */ |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 294 | unsigned int period_bytes; /* size of the period in bytes */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 295 | unsigned int frags; /* number for period in the play buffer */ |
| 296 | unsigned int fifo_size; /* FIFO size */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 298 | void __iomem *sd_addr; /* stream descriptor pointer */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 300 | u32 sd_int_sta_mask; /* stream int status mask */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | |
| 302 | /* pcm support */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 303 | struct snd_pcm_substream *substream; /* assigned substream, |
| 304 | * set in PCM open |
| 305 | */ |
| 306 | unsigned int format_val; /* format value to be set in the |
| 307 | * controller and the codec |
| 308 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | unsigned char stream_tag; /* assigned stream */ |
| 310 | unsigned char index; /* stream index */ |
| 311 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 312 | unsigned int opened :1; |
| 313 | unsigned int running :1; |
Takashi Iwai | 675f25d | 2008-06-10 17:53:20 +0200 | [diff] [blame] | 314 | unsigned int irq_pending :1; |
| 315 | unsigned int irq_ignore :1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | }; |
| 317 | |
| 318 | /* CORB/RIRB */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 319 | struct azx_rb { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | u32 *buf; /* CORB/RIRB buffer |
| 321 | * Each CORB entry is 4byte, RIRB is 8byte |
| 322 | */ |
| 323 | dma_addr_t addr; /* physical address of CORB/RIRB buffer */ |
| 324 | /* for RIRB */ |
| 325 | unsigned short rp, wp; /* read/write pointers */ |
| 326 | int cmds; /* number of pending requests */ |
| 327 | u32 res; /* last read value */ |
| 328 | }; |
| 329 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 330 | struct azx { |
| 331 | struct snd_card *card; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | struct pci_dev *pci; |
| 333 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 334 | /* chip type specific */ |
| 335 | int driver_type; |
| 336 | int playback_streams; |
| 337 | int playback_index_offset; |
| 338 | int capture_streams; |
| 339 | int capture_index_offset; |
| 340 | int num_streams; |
| 341 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | /* pci resources */ |
| 343 | unsigned long addr; |
| 344 | void __iomem *remap_addr; |
| 345 | int irq; |
| 346 | |
| 347 | /* locks */ |
| 348 | spinlock_t reg_lock; |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 349 | struct mutex open_mutex; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 351 | /* streams (x num_streams) */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 352 | struct azx_dev *azx_dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | |
| 354 | /* PCM */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 355 | struct snd_pcm *pcm[AZX_MAX_PCMS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | |
| 357 | /* HD codec */ |
| 358 | unsigned short codec_mask; |
| 359 | struct hda_bus *bus; |
| 360 | |
| 361 | /* CORB/RIRB */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 362 | struct azx_rb corb; |
| 363 | struct azx_rb rirb; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 364 | |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 365 | /* CORB/RIRB and position buffers */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | struct snd_dma_buffer rb; |
| 367 | struct snd_dma_buffer posbuf; |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 368 | |
| 369 | /* flags */ |
| 370 | int position_fix; |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 371 | unsigned int running :1; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 372 | unsigned int initialized :1; |
| 373 | unsigned int single_cmd :1; |
| 374 | unsigned int polling_mode :1; |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 375 | unsigned int msi :1; |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 376 | |
| 377 | /* for debugging */ |
| 378 | unsigned int last_cmd; /* last issued command (to sync) */ |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 379 | |
| 380 | /* for pending irqs */ |
| 381 | struct work_struct irq_pending_work; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 382 | }; |
| 383 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 384 | /* driver types */ |
| 385 | enum { |
| 386 | AZX_DRIVER_ICH, |
Tobin Davis | 4979bca | 2008-01-30 08:13:55 +0100 | [diff] [blame] | 387 | AZX_DRIVER_SCH, |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 388 | AZX_DRIVER_ATI, |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 389 | AZX_DRIVER_ATIHDMI, |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 390 | AZX_DRIVER_VIA, |
| 391 | AZX_DRIVER_SIS, |
| 392 | AZX_DRIVER_ULI, |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 393 | AZX_DRIVER_NVIDIA, |
Kailang Yang | f269002 | 2008-05-27 11:44:55 +0200 | [diff] [blame] | 394 | AZX_DRIVER_TERA, |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 395 | }; |
| 396 | |
| 397 | static char *driver_short_names[] __devinitdata = { |
| 398 | [AZX_DRIVER_ICH] = "HDA Intel", |
Tobin Davis | 4979bca | 2008-01-30 08:13:55 +0100 | [diff] [blame] | 399 | [AZX_DRIVER_SCH] = "HDA Intel MID", |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 400 | [AZX_DRIVER_ATI] = "HDA ATI SB", |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 401 | [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI", |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 402 | [AZX_DRIVER_VIA] = "HDA VIA VT82xx", |
| 403 | [AZX_DRIVER_SIS] = "HDA SIS966", |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 404 | [AZX_DRIVER_ULI] = "HDA ULI M5461", |
| 405 | [AZX_DRIVER_NVIDIA] = "HDA NVidia", |
Kailang Yang | f269002 | 2008-05-27 11:44:55 +0200 | [diff] [blame] | 406 | [AZX_DRIVER_TERA] = "HDA Teradici", |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 407 | }; |
| 408 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 409 | /* |
| 410 | * macros for easy use |
| 411 | */ |
| 412 | #define azx_writel(chip,reg,value) \ |
| 413 | writel(value, (chip)->remap_addr + ICH6_REG_##reg) |
| 414 | #define azx_readl(chip,reg) \ |
| 415 | readl((chip)->remap_addr + ICH6_REG_##reg) |
| 416 | #define azx_writew(chip,reg,value) \ |
| 417 | writew(value, (chip)->remap_addr + ICH6_REG_##reg) |
| 418 | #define azx_readw(chip,reg) \ |
| 419 | readw((chip)->remap_addr + ICH6_REG_##reg) |
| 420 | #define azx_writeb(chip,reg,value) \ |
| 421 | writeb(value, (chip)->remap_addr + ICH6_REG_##reg) |
| 422 | #define azx_readb(chip,reg) \ |
| 423 | readb((chip)->remap_addr + ICH6_REG_##reg) |
| 424 | |
| 425 | #define azx_sd_writel(dev,reg,value) \ |
| 426 | writel(value, (dev)->sd_addr + ICH6_REG_##reg) |
| 427 | #define azx_sd_readl(dev,reg) \ |
| 428 | readl((dev)->sd_addr + ICH6_REG_##reg) |
| 429 | #define azx_sd_writew(dev,reg,value) \ |
| 430 | writew(value, (dev)->sd_addr + ICH6_REG_##reg) |
| 431 | #define azx_sd_readw(dev,reg) \ |
| 432 | readw((dev)->sd_addr + ICH6_REG_##reg) |
| 433 | #define azx_sd_writeb(dev,reg,value) \ |
| 434 | writeb(value, (dev)->sd_addr + ICH6_REG_##reg) |
| 435 | #define azx_sd_readb(dev,reg) \ |
| 436 | readb((dev)->sd_addr + ICH6_REG_##reg) |
| 437 | |
| 438 | /* for pcm support */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 439 | #define get_azx_dev(substream) (substream->runtime->private_data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 440 | |
| 441 | /* Get the upper 32bit of the given dma_addr_t |
| 442 | * Compiler should optimize and eliminate the code if dma_addr_t is 32bit |
| 443 | */ |
| 444 | #define upper_32bit(addr) (sizeof(addr) > 4 ? (u32)((addr) >> 32) : (u32)0) |
| 445 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 446 | static int azx_acquire_irq(struct azx *chip, int do_disconnect); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 447 | |
| 448 | /* |
| 449 | * Interface for HD codec |
| 450 | */ |
| 451 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | /* |
| 453 | * CORB / RIRB interface |
| 454 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 455 | static int azx_alloc_cmd_io(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | { |
| 457 | int err; |
| 458 | |
| 459 | /* single page (at least 4096 bytes) must suffice for both ringbuffes */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 460 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
| 461 | snd_dma_pci_data(chip->pci), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | PAGE_SIZE, &chip->rb); |
| 463 | if (err < 0) { |
| 464 | snd_printk(KERN_ERR SFX "cannot allocate CORB/RIRB\n"); |
| 465 | return err; |
| 466 | } |
| 467 | return 0; |
| 468 | } |
| 469 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 470 | static void azx_init_cmd_io(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 471 | { |
| 472 | /* CORB set up */ |
| 473 | chip->corb.addr = chip->rb.addr; |
| 474 | chip->corb.buf = (u32 *)chip->rb.area; |
| 475 | azx_writel(chip, CORBLBASE, (u32)chip->corb.addr); |
| 476 | azx_writel(chip, CORBUBASE, upper_32bit(chip->corb.addr)); |
| 477 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 478 | /* set the corb size to 256 entries (ULI requires explicitly) */ |
| 479 | azx_writeb(chip, CORBSIZE, 0x02); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 480 | /* set the corb write pointer to 0 */ |
| 481 | azx_writew(chip, CORBWP, 0); |
| 482 | /* reset the corb hw read pointer */ |
| 483 | azx_writew(chip, CORBRP, ICH6_RBRWP_CLR); |
| 484 | /* enable corb dma */ |
| 485 | azx_writeb(chip, CORBCTL, ICH6_RBCTL_DMA_EN); |
| 486 | |
| 487 | /* RIRB set up */ |
| 488 | chip->rirb.addr = chip->rb.addr + 2048; |
| 489 | chip->rirb.buf = (u32 *)(chip->rb.area + 2048); |
| 490 | azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); |
| 491 | azx_writel(chip, RIRBUBASE, upper_32bit(chip->rirb.addr)); |
| 492 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 493 | /* set the rirb size to 256 entries (ULI requires explicitly) */ |
| 494 | azx_writeb(chip, RIRBSIZE, 0x02); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 495 | /* reset the rirb hw write pointer */ |
| 496 | azx_writew(chip, RIRBWP, ICH6_RBRWP_CLR); |
| 497 | /* set N=1, get RIRB response interrupt for new entry */ |
| 498 | azx_writew(chip, RINTCNT, 1); |
| 499 | /* enable rirb dma and response irq */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 500 | azx_writeb(chip, RIRBCTL, ICH6_RBCTL_DMA_EN | ICH6_RBCTL_IRQ_EN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | chip->rirb.rp = chip->rirb.cmds = 0; |
| 502 | } |
| 503 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 504 | static void azx_free_cmd_io(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | { |
| 506 | /* disable ringbuffer DMAs */ |
| 507 | azx_writeb(chip, RIRBCTL, 0); |
| 508 | azx_writeb(chip, CORBCTL, 0); |
| 509 | } |
| 510 | |
| 511 | /* send a command */ |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 512 | static int azx_corb_send_cmd(struct hda_codec *codec, u32 val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 514 | struct azx *chip = codec->bus->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | unsigned int wp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 516 | |
| 517 | /* add command to corb */ |
| 518 | wp = azx_readb(chip, CORBWP); |
| 519 | wp++; |
| 520 | wp %= ICH6_MAX_CORB_ENTRIES; |
| 521 | |
| 522 | spin_lock_irq(&chip->reg_lock); |
| 523 | chip->rirb.cmds++; |
| 524 | chip->corb.buf[wp] = cpu_to_le32(val); |
| 525 | azx_writel(chip, CORBWP, wp); |
| 526 | spin_unlock_irq(&chip->reg_lock); |
| 527 | |
| 528 | return 0; |
| 529 | } |
| 530 | |
| 531 | #define ICH6_RIRB_EX_UNSOL_EV (1<<4) |
| 532 | |
| 533 | /* retrieve RIRB entry - called from interrupt handler */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 534 | static void azx_update_rirb(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 535 | { |
| 536 | unsigned int rp, wp; |
| 537 | u32 res, res_ex; |
| 538 | |
| 539 | wp = azx_readb(chip, RIRBWP); |
| 540 | if (wp == chip->rirb.wp) |
| 541 | return; |
| 542 | chip->rirb.wp = wp; |
| 543 | |
| 544 | while (chip->rirb.rp != wp) { |
| 545 | chip->rirb.rp++; |
| 546 | chip->rirb.rp %= ICH6_MAX_RIRB_ENTRIES; |
| 547 | |
| 548 | rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ |
| 549 | res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); |
| 550 | res = le32_to_cpu(chip->rirb.buf[rp]); |
| 551 | if (res_ex & ICH6_RIRB_EX_UNSOL_EV) |
| 552 | snd_hda_queue_unsol_event(chip->bus, res, res_ex); |
| 553 | else if (chip->rirb.cmds) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 554 | chip->rirb.res = res; |
Takashi Iwai | 2add9b9 | 2008-03-18 09:47:06 +0100 | [diff] [blame] | 555 | smp_wmb(); |
| 556 | chip->rirb.cmds--; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 557 | } |
| 558 | } |
| 559 | } |
| 560 | |
| 561 | /* receive a response */ |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 562 | static unsigned int azx_rirb_get_response(struct hda_codec *codec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 563 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 564 | struct azx *chip = codec->bus->private_data; |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 565 | unsigned long timeout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 566 | |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 567 | again: |
| 568 | timeout = jiffies + msecs_to_jiffies(1000); |
Takashi Iwai | 28a0d9d | 2008-01-18 15:32:32 +0100 | [diff] [blame] | 569 | for (;;) { |
Takashi Iwai | e96224a | 2006-08-21 17:57:44 +0200 | [diff] [blame] | 570 | if (chip->polling_mode) { |
| 571 | spin_lock_irq(&chip->reg_lock); |
| 572 | azx_update_rirb(chip); |
| 573 | spin_unlock_irq(&chip->reg_lock); |
| 574 | } |
Takashi Iwai | 2add9b9 | 2008-03-18 09:47:06 +0100 | [diff] [blame] | 575 | if (!chip->rirb.cmds) { |
| 576 | smp_rmb(); |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 577 | return chip->rirb.res; /* the last value */ |
Takashi Iwai | 2add9b9 | 2008-03-18 09:47:06 +0100 | [diff] [blame] | 578 | } |
Takashi Iwai | 28a0d9d | 2008-01-18 15:32:32 +0100 | [diff] [blame] | 579 | if (time_after(jiffies, timeout)) |
| 580 | break; |
Takashi Iwai | 5298765 | 2008-01-16 16:09:47 +0100 | [diff] [blame] | 581 | if (codec->bus->needs_damn_long_delay) |
| 582 | msleep(2); /* temporary workaround */ |
| 583 | else { |
| 584 | udelay(10); |
| 585 | cond_resched(); |
| 586 | } |
Takashi Iwai | 28a0d9d | 2008-01-18 15:32:32 +0100 | [diff] [blame] | 587 | } |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 588 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 589 | if (chip->msi) { |
| 590 | snd_printk(KERN_WARNING "hda_intel: No response from codec, " |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 591 | "disabling MSI: last cmd=0x%08x\n", chip->last_cmd); |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 592 | free_irq(chip->irq, chip); |
| 593 | chip->irq = -1; |
| 594 | pci_disable_msi(chip->pci); |
| 595 | chip->msi = 0; |
| 596 | if (azx_acquire_irq(chip, 1) < 0) |
| 597 | return -1; |
| 598 | goto again; |
| 599 | } |
| 600 | |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 601 | if (!chip->polling_mode) { |
| 602 | snd_printk(KERN_WARNING "hda_intel: azx_get_response timeout, " |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 603 | "switching to polling mode: last cmd=0x%08x\n", |
| 604 | chip->last_cmd); |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 605 | chip->polling_mode = 1; |
| 606 | goto again; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | } |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 608 | |
| 609 | snd_printk(KERN_ERR "hda_intel: azx_get_response timeout, " |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 610 | "switching to single_cmd mode: last cmd=0x%08x\n", |
| 611 | chip->last_cmd); |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 612 | chip->rirb.rp = azx_readb(chip, RIRBWP); |
| 613 | chip->rirb.cmds = 0; |
| 614 | /* switch to single_cmd mode */ |
| 615 | chip->single_cmd = 1; |
| 616 | azx_free_cmd_io(chip); |
| 617 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 618 | } |
| 619 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 620 | /* |
| 621 | * Use the single immediate command instead of CORB/RIRB for simplicity |
| 622 | * |
| 623 | * Note: according to Intel, this is not preferred use. The command was |
| 624 | * intended for the BIOS only, and may get confused with unsolicited |
| 625 | * responses. So, we shouldn't use it for normal operation from the |
| 626 | * driver. |
| 627 | * I left the codes, however, for debugging/testing purposes. |
| 628 | */ |
| 629 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 630 | /* send a command */ |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 631 | static int azx_single_send_cmd(struct hda_codec *codec, u32 val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 632 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 633 | struct azx *chip = codec->bus->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | int timeout = 50; |
| 635 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 636 | while (timeout--) { |
| 637 | /* check ICB busy bit */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 638 | if (!((azx_readw(chip, IRS) & ICH6_IRS_BUSY))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 639 | /* Clear IRV valid bit */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 640 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
| 641 | ICH6_IRS_VALID); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | azx_writel(chip, IC, val); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 643 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
| 644 | ICH6_IRS_BUSY); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 645 | return 0; |
| 646 | } |
| 647 | udelay(1); |
| 648 | } |
Marc Boucher | 1cfd52b | 2008-01-22 15:29:26 +0100 | [diff] [blame] | 649 | if (printk_ratelimit()) |
| 650 | snd_printd(SFX "send_cmd timeout: IRS=0x%x, val=0x%x\n", |
| 651 | azx_readw(chip, IRS), val); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 652 | return -EIO; |
| 653 | } |
| 654 | |
| 655 | /* receive a response */ |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 656 | static unsigned int azx_single_get_response(struct hda_codec *codec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 657 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 658 | struct azx *chip = codec->bus->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 659 | int timeout = 50; |
| 660 | |
| 661 | while (timeout--) { |
| 662 | /* check IRV busy bit */ |
| 663 | if (azx_readw(chip, IRS) & ICH6_IRS_VALID) |
| 664 | return azx_readl(chip, IR); |
| 665 | udelay(1); |
| 666 | } |
Marc Boucher | 1cfd52b | 2008-01-22 15:29:26 +0100 | [diff] [blame] | 667 | if (printk_ratelimit()) |
| 668 | snd_printd(SFX "get_response timeout: IRS=0x%x\n", |
| 669 | azx_readw(chip, IRS)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | return (unsigned int)-1; |
| 671 | } |
| 672 | |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 673 | /* |
| 674 | * The below are the main callbacks from hda_codec. |
| 675 | * |
| 676 | * They are just the skeleton to call sub-callbacks according to the |
| 677 | * current setting of chip->single_cmd. |
| 678 | */ |
| 679 | |
| 680 | /* send a command */ |
| 681 | static int azx_send_cmd(struct hda_codec *codec, hda_nid_t nid, |
| 682 | int direct, unsigned int verb, |
| 683 | unsigned int para) |
| 684 | { |
| 685 | struct azx *chip = codec->bus->private_data; |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 686 | u32 val; |
| 687 | |
| 688 | val = (u32)(codec->addr & 0x0f) << 28; |
| 689 | val |= (u32)direct << 27; |
| 690 | val |= (u32)nid << 20; |
| 691 | val |= verb << 8; |
| 692 | val |= para; |
| 693 | chip->last_cmd = val; |
| 694 | |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 695 | if (chip->single_cmd) |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 696 | return azx_single_send_cmd(codec, val); |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 697 | else |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 698 | return azx_corb_send_cmd(codec, val); |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 699 | } |
| 700 | |
| 701 | /* get a response */ |
| 702 | static unsigned int azx_get_response(struct hda_codec *codec) |
| 703 | { |
| 704 | struct azx *chip = codec->bus->private_data; |
| 705 | if (chip->single_cmd) |
| 706 | return azx_single_get_response(codec); |
| 707 | else |
| 708 | return azx_rirb_get_response(codec); |
| 709 | } |
| 710 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 711 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
| 712 | static void azx_power_notify(struct hda_codec *codec); |
| 713 | #endif |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 714 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | /* reset codec link */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 716 | static int azx_reset(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | { |
| 718 | int count; |
| 719 | |
Danny Tholen | e8a7f13 | 2007-09-11 21:41:56 +0200 | [diff] [blame] | 720 | /* clear STATESTS */ |
| 721 | azx_writeb(chip, STATESTS, STATESTS_INT_MASK); |
| 722 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | /* reset controller */ |
| 724 | azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~ICH6_GCTL_RESET); |
| 725 | |
| 726 | count = 50; |
| 727 | while (azx_readb(chip, GCTL) && --count) |
| 728 | msleep(1); |
| 729 | |
| 730 | /* delay for >= 100us for codec PLL to settle per spec |
| 731 | * Rev 0.9 section 5.5.1 |
| 732 | */ |
| 733 | msleep(1); |
| 734 | |
| 735 | /* Bring controller out of reset */ |
| 736 | azx_writeb(chip, GCTL, azx_readb(chip, GCTL) | ICH6_GCTL_RESET); |
| 737 | |
| 738 | count = 50; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 739 | while (!azx_readb(chip, GCTL) && --count) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | msleep(1); |
| 741 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 742 | /* Brent Chartrand said to wait >= 540us for codecs to initialize */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 743 | msleep(1); |
| 744 | |
| 745 | /* check to see if controller is ready */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 746 | if (!azx_readb(chip, GCTL)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 747 | snd_printd("azx_reset: controller not ready!\n"); |
| 748 | return -EBUSY; |
| 749 | } |
| 750 | |
Matt | 41e2fce | 2005-07-04 17:49:55 +0200 | [diff] [blame] | 751 | /* Accept unsolicited responses */ |
| 752 | azx_writel(chip, GCTL, azx_readl(chip, GCTL) | ICH6_GCTL_UREN); |
| 753 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 754 | /* detect codecs */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 755 | if (!chip->codec_mask) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 756 | chip->codec_mask = azx_readw(chip, STATESTS); |
| 757 | snd_printdd("codec_mask = 0x%x\n", chip->codec_mask); |
| 758 | } |
| 759 | |
| 760 | return 0; |
| 761 | } |
| 762 | |
| 763 | |
| 764 | /* |
| 765 | * Lowlevel interface |
| 766 | */ |
| 767 | |
| 768 | /* enable interrupts */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 769 | static void azx_int_enable(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 770 | { |
| 771 | /* enable controller CIE and GIE */ |
| 772 | azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) | |
| 773 | ICH6_INT_CTRL_EN | ICH6_INT_GLOBAL_EN); |
| 774 | } |
| 775 | |
| 776 | /* disable interrupts */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 777 | static void azx_int_disable(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 778 | { |
| 779 | int i; |
| 780 | |
| 781 | /* disable interrupts in stream descriptor */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 782 | for (i = 0; i < chip->num_streams; i++) { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 783 | struct azx_dev *azx_dev = &chip->azx_dev[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 784 | azx_sd_writeb(azx_dev, SD_CTL, |
| 785 | azx_sd_readb(azx_dev, SD_CTL) & ~SD_INT_MASK); |
| 786 | } |
| 787 | |
| 788 | /* disable SIE for all streams */ |
| 789 | azx_writeb(chip, INTCTL, 0); |
| 790 | |
| 791 | /* disable controller CIE and GIE */ |
| 792 | azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) & |
| 793 | ~(ICH6_INT_CTRL_EN | ICH6_INT_GLOBAL_EN)); |
| 794 | } |
| 795 | |
| 796 | /* clear interrupts */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 797 | static void azx_int_clear(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 798 | { |
| 799 | int i; |
| 800 | |
| 801 | /* clear stream status */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 802 | for (i = 0; i < chip->num_streams; i++) { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 803 | struct azx_dev *azx_dev = &chip->azx_dev[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 804 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); |
| 805 | } |
| 806 | |
| 807 | /* clear STATESTS */ |
| 808 | azx_writeb(chip, STATESTS, STATESTS_INT_MASK); |
| 809 | |
| 810 | /* clear rirb status */ |
| 811 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); |
| 812 | |
| 813 | /* clear int status */ |
| 814 | azx_writel(chip, INTSTS, ICH6_INT_CTRL_EN | ICH6_INT_ALL_STREAM); |
| 815 | } |
| 816 | |
| 817 | /* start a stream */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 818 | static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | { |
| 820 | /* enable SIE */ |
| 821 | azx_writeb(chip, INTCTL, |
| 822 | azx_readb(chip, INTCTL) | (1 << azx_dev->index)); |
| 823 | /* set DMA start and interrupt mask */ |
| 824 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | |
| 825 | SD_CTL_DMA_START | SD_INT_MASK); |
| 826 | } |
| 827 | |
| 828 | /* stop a stream */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 829 | static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 830 | { |
| 831 | /* stop DMA */ |
| 832 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & |
| 833 | ~(SD_CTL_DMA_START | SD_INT_MASK)); |
| 834 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */ |
| 835 | /* disable SIE */ |
| 836 | azx_writeb(chip, INTCTL, |
| 837 | azx_readb(chip, INTCTL) & ~(1 << azx_dev->index)); |
| 838 | } |
| 839 | |
| 840 | |
| 841 | /* |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 842 | * reset and start the controller registers |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 843 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 844 | static void azx_init_chip(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 845 | { |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 846 | if (chip->initialized) |
| 847 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 848 | |
| 849 | /* reset controller */ |
| 850 | azx_reset(chip); |
| 851 | |
| 852 | /* initialize interrupts */ |
| 853 | azx_int_clear(chip); |
| 854 | azx_int_enable(chip); |
| 855 | |
| 856 | /* initialize the codec command I/O */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 857 | if (!chip->single_cmd) |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 858 | azx_init_cmd_io(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 859 | |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 860 | /* program the position buffer */ |
| 861 | azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr); |
| 862 | azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr)); |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 863 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 864 | chip->initialized = 1; |
| 865 | } |
| 866 | |
| 867 | /* |
| 868 | * initialize the PCI registers |
| 869 | */ |
| 870 | /* update bits in a PCI register byte */ |
| 871 | static void update_pci_byte(struct pci_dev *pci, unsigned int reg, |
| 872 | unsigned char mask, unsigned char val) |
| 873 | { |
| 874 | unsigned char data; |
| 875 | |
| 876 | pci_read_config_byte(pci, reg, &data); |
| 877 | data &= ~mask; |
| 878 | data |= (val & mask); |
| 879 | pci_write_config_byte(pci, reg, data); |
| 880 | } |
| 881 | |
| 882 | static void azx_init_pci(struct azx *chip) |
| 883 | { |
Takashi Iwai | 90a5ad5 | 2008-02-22 18:36:22 +0100 | [diff] [blame] | 884 | unsigned short snoop; |
| 885 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 886 | /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44) |
| 887 | * TCSEL == Traffic Class Select Register, which sets PCI express QOS |
| 888 | * Ensuring these bits are 0 clears playback static on some HD Audio |
| 889 | * codecs |
| 890 | */ |
| 891 | update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0); |
| 892 | |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 893 | switch (chip->driver_type) { |
| 894 | case AZX_DRIVER_ATI: |
| 895 | /* For ATI SB450 azalia HD audio, we need to enable snoop */ |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 896 | update_pci_byte(chip->pci, |
| 897 | ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, |
| 898 | 0x07, ATI_SB450_HDAUDIO_ENABLE_SNOOP); |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 899 | break; |
| 900 | case AZX_DRIVER_NVIDIA: |
| 901 | /* For NVIDIA HDA, enable snoop */ |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 902 | update_pci_byte(chip->pci, |
| 903 | NVIDIA_HDA_TRANSREG_ADDR, |
| 904 | 0x0f, NVIDIA_HDA_ENABLE_COHBITS); |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 905 | break; |
Takashi Iwai | 90a5ad5 | 2008-02-22 18:36:22 +0100 | [diff] [blame] | 906 | case AZX_DRIVER_SCH: |
| 907 | pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop); |
| 908 | if (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) { |
| 909 | pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, \ |
| 910 | snoop & (~INTEL_SCH_HDA_DEVC_NOSNOOP)); |
| 911 | pci_read_config_word(chip->pci, |
| 912 | INTEL_SCH_HDA_DEVC, &snoop); |
| 913 | snd_printdd("HDA snoop disabled, enabling ... %s\n",\ |
| 914 | (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) \ |
| 915 | ? "Failed" : "OK"); |
| 916 | } |
| 917 | break; |
| 918 | |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 919 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 920 | } |
| 921 | |
| 922 | |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 923 | static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev); |
| 924 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 925 | /* |
| 926 | * interrupt handler |
| 927 | */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 928 | static irqreturn_t azx_interrupt(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 929 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 930 | struct azx *chip = dev_id; |
| 931 | struct azx_dev *azx_dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 932 | u32 status; |
| 933 | int i; |
| 934 | |
| 935 | spin_lock(&chip->reg_lock); |
| 936 | |
| 937 | status = azx_readl(chip, INTSTS); |
| 938 | if (status == 0) { |
| 939 | spin_unlock(&chip->reg_lock); |
| 940 | return IRQ_NONE; |
| 941 | } |
| 942 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 943 | for (i = 0; i < chip->num_streams; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 944 | azx_dev = &chip->azx_dev[i]; |
| 945 | if (status & azx_dev->sd_int_sta_mask) { |
| 946 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 947 | if (!azx_dev->substream || !azx_dev->running) |
| 948 | continue; |
Takashi Iwai | 675f25d | 2008-06-10 17:53:20 +0200 | [diff] [blame] | 949 | /* ignore the first dummy IRQ (due to pos_adj) */ |
| 950 | if (azx_dev->irq_ignore) { |
| 951 | azx_dev->irq_ignore = 0; |
| 952 | continue; |
| 953 | } |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 954 | /* check whether this IRQ is really acceptable */ |
| 955 | if (azx_position_ok(chip, azx_dev)) { |
| 956 | azx_dev->irq_pending = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 957 | spin_unlock(&chip->reg_lock); |
| 958 | snd_pcm_period_elapsed(azx_dev->substream); |
| 959 | spin_lock(&chip->reg_lock); |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 960 | } else { |
| 961 | /* bogus IRQ, process it later */ |
| 962 | azx_dev->irq_pending = 1; |
| 963 | schedule_work(&chip->irq_pending_work); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 964 | } |
| 965 | } |
| 966 | } |
| 967 | |
| 968 | /* clear rirb int */ |
| 969 | status = azx_readb(chip, RIRBSTS); |
| 970 | if (status & RIRB_INT_MASK) { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 971 | if (!chip->single_cmd && (status & RIRB_INT_RESPONSE)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 972 | azx_update_rirb(chip); |
| 973 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); |
| 974 | } |
| 975 | |
| 976 | #if 0 |
| 977 | /* clear state status int */ |
| 978 | if (azx_readb(chip, STATESTS) & 0x04) |
| 979 | azx_writeb(chip, STATESTS, 0x04); |
| 980 | #endif |
| 981 | spin_unlock(&chip->reg_lock); |
| 982 | |
| 983 | return IRQ_HANDLED; |
| 984 | } |
| 985 | |
| 986 | |
| 987 | /* |
Takashi Iwai | 675f25d | 2008-06-10 17:53:20 +0200 | [diff] [blame] | 988 | * set up a BDL entry |
| 989 | */ |
| 990 | static int setup_bdle(struct snd_pcm_substream *substream, |
| 991 | struct azx_dev *azx_dev, u32 **bdlp, |
| 992 | int ofs, int size, int with_ioc) |
| 993 | { |
| 994 | struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream); |
| 995 | u32 *bdl = *bdlp; |
| 996 | |
| 997 | while (size > 0) { |
| 998 | dma_addr_t addr; |
| 999 | int chunk; |
| 1000 | |
| 1001 | if (azx_dev->frags >= AZX_MAX_BDL_ENTRIES) |
| 1002 | return -EINVAL; |
| 1003 | |
| 1004 | addr = snd_pcm_sgbuf_get_addr(sgbuf, ofs); |
| 1005 | /* program the address field of the BDL entry */ |
| 1006 | bdl[0] = cpu_to_le32((u32)addr); |
| 1007 | bdl[1] = cpu_to_le32(upper_32bit(addr)); |
| 1008 | /* program the size field of the BDL entry */ |
| 1009 | chunk = PAGE_SIZE - (ofs % PAGE_SIZE); |
| 1010 | if (size < chunk) |
| 1011 | chunk = size; |
| 1012 | bdl[2] = cpu_to_le32(chunk); |
| 1013 | /* program the IOC to enable interrupt |
| 1014 | * only when the whole fragment is processed |
| 1015 | */ |
| 1016 | size -= chunk; |
| 1017 | bdl[3] = (size || !with_ioc) ? 0 : cpu_to_le32(0x01); |
| 1018 | bdl += 4; |
| 1019 | azx_dev->frags++; |
| 1020 | ofs += chunk; |
| 1021 | } |
| 1022 | *bdlp = bdl; |
| 1023 | return ofs; |
| 1024 | } |
| 1025 | |
| 1026 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1027 | * set up BDL entries |
| 1028 | */ |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1029 | static int azx_setup_periods(struct snd_pcm_substream *substream, |
| 1030 | struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1031 | { |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1032 | u32 *bdl; |
| 1033 | int i, ofs, periods, period_bytes; |
Takashi Iwai | 675f25d | 2008-06-10 17:53:20 +0200 | [diff] [blame] | 1034 | int pos_adj = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1035 | |
| 1036 | /* reset BDL address */ |
| 1037 | azx_sd_writel(azx_dev, SD_BDLPL, 0); |
| 1038 | azx_sd_writel(azx_dev, SD_BDLPU, 0); |
| 1039 | |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1040 | period_bytes = snd_pcm_lib_period_bytes(substream); |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 1041 | azx_dev->period_bytes = period_bytes; |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1042 | periods = azx_dev->bufsize / period_bytes; |
| 1043 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1044 | /* program the initial BDL entries */ |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1045 | bdl = (u32 *)azx_dev->bdl.area; |
| 1046 | ofs = 0; |
| 1047 | azx_dev->frags = 0; |
Takashi Iwai | 675f25d | 2008-06-10 17:53:20 +0200 | [diff] [blame] | 1048 | azx_dev->irq_ignore = 0; |
| 1049 | if (bdl_pos_adj > 0) { |
| 1050 | struct snd_pcm_runtime *runtime = substream->runtime; |
| 1051 | pos_adj = (bdl_pos_adj * runtime->rate + 47999) / 48000; |
| 1052 | if (!pos_adj) |
| 1053 | pos_adj = 1; |
| 1054 | pos_adj = frames_to_bytes(runtime, pos_adj); |
| 1055 | if (pos_adj >= period_bytes) { |
| 1056 | snd_printk(KERN_WARNING "Too big adjustment %d\n", |
| 1057 | bdl_pos_adj); |
| 1058 | pos_adj = 0; |
| 1059 | } else { |
| 1060 | ofs = setup_bdle(substream, azx_dev, |
| 1061 | &bdl, ofs, pos_adj, 1); |
| 1062 | if (ofs < 0) |
| 1063 | goto error; |
| 1064 | azx_dev->irq_ignore = 1; |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1065 | } |
Takashi Iwai | 675f25d | 2008-06-10 17:53:20 +0200 | [diff] [blame] | 1066 | } |
| 1067 | for (i = 0; i < periods; i++) { |
| 1068 | if (i == periods - 1 && pos_adj) |
| 1069 | ofs = setup_bdle(substream, azx_dev, &bdl, ofs, |
| 1070 | period_bytes - pos_adj, 0); |
| 1071 | else |
| 1072 | ofs = setup_bdle(substream, azx_dev, &bdl, ofs, |
| 1073 | period_bytes, 1); |
| 1074 | if (ofs < 0) |
| 1075 | goto error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1076 | } |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1077 | return 0; |
Takashi Iwai | 675f25d | 2008-06-10 17:53:20 +0200 | [diff] [blame] | 1078 | |
| 1079 | error: |
| 1080 | snd_printk(KERN_ERR "Too many BDL entries: buffer=%d, period=%d\n", |
| 1081 | azx_dev->bufsize, period_bytes); |
| 1082 | /* reset */ |
| 1083 | azx_sd_writel(azx_dev, SD_BDLPL, 0); |
| 1084 | azx_sd_writel(azx_dev, SD_BDLPU, 0); |
| 1085 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1086 | } |
| 1087 | |
| 1088 | /* |
| 1089 | * set up the SD for streaming |
| 1090 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1091 | static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1092 | { |
| 1093 | unsigned char val; |
| 1094 | int timeout; |
| 1095 | |
| 1096 | /* make sure the run bit is zero for SD */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1097 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & |
| 1098 | ~SD_CTL_DMA_START); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1099 | /* reset stream */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1100 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | |
| 1101 | SD_CTL_STREAM_RESET); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1102 | udelay(3); |
| 1103 | timeout = 300; |
| 1104 | while (!((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && |
| 1105 | --timeout) |
| 1106 | ; |
| 1107 | val &= ~SD_CTL_STREAM_RESET; |
| 1108 | azx_sd_writeb(azx_dev, SD_CTL, val); |
| 1109 | udelay(3); |
| 1110 | |
| 1111 | timeout = 300; |
| 1112 | /* waiting for hardware to report that the stream is out of reset */ |
| 1113 | while (((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && |
| 1114 | --timeout) |
| 1115 | ; |
| 1116 | |
| 1117 | /* program the stream_tag */ |
| 1118 | azx_sd_writel(azx_dev, SD_CTL, |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1119 | (azx_sd_readl(azx_dev, SD_CTL) & ~SD_CTL_STREAM_TAG_MASK)| |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1120 | (azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT)); |
| 1121 | |
| 1122 | /* program the length of samples in cyclic buffer */ |
| 1123 | azx_sd_writel(azx_dev, SD_CBL, azx_dev->bufsize); |
| 1124 | |
| 1125 | /* program the stream format */ |
| 1126 | /* this value needs to be the same as the one programmed */ |
| 1127 | azx_sd_writew(azx_dev, SD_FORMAT, azx_dev->format_val); |
| 1128 | |
| 1129 | /* program the stream LVI (last valid index) of the BDL */ |
| 1130 | azx_sd_writew(azx_dev, SD_LVI, azx_dev->frags - 1); |
| 1131 | |
| 1132 | /* program the BDL address */ |
| 1133 | /* lower BDL address */ |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1134 | azx_sd_writel(azx_dev, SD_BDLPL, (u32)azx_dev->bdl.addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1135 | /* upper BDL address */ |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1136 | azx_sd_writel(azx_dev, SD_BDLPU, upper_32bit(azx_dev->bdl.addr)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1137 | |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 1138 | /* enable the position buffer */ |
Takashi Iwai | ee9d6b9 | 2008-03-14 15:52:20 +0100 | [diff] [blame] | 1139 | if (chip->position_fix == POS_FIX_POSBUF || |
| 1140 | chip->position_fix == POS_FIX_AUTO) { |
| 1141 | if (!(azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE)) |
| 1142 | azx_writel(chip, DPLBASE, |
| 1143 | (u32)chip->posbuf.addr | ICH6_DPLBASE_ENABLE); |
| 1144 | } |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1145 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1146 | /* set the interrupt enable bits in the descriptor control register */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1147 | azx_sd_writel(azx_dev, SD_CTL, |
| 1148 | azx_sd_readl(azx_dev, SD_CTL) | SD_INT_MASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1149 | |
| 1150 | return 0; |
| 1151 | } |
| 1152 | |
| 1153 | |
| 1154 | /* |
| 1155 | * Codec initialization |
| 1156 | */ |
| 1157 | |
Takashi Iwai | a9995a3 | 2007-03-12 21:30:46 +0100 | [diff] [blame] | 1158 | static unsigned int azx_max_codecs[] __devinitdata = { |
Takashi Iwai | 607d982 | 2008-06-04 12:41:21 +0200 | [diff] [blame] | 1159 | [AZX_DRIVER_ICH] = 4, /* Some ICH9 boards use SD3 */ |
Takashi Iwai | 90a5ad5 | 2008-02-22 18:36:22 +0100 | [diff] [blame] | 1160 | [AZX_DRIVER_SCH] = 3, |
Takashi Iwai | a9995a3 | 2007-03-12 21:30:46 +0100 | [diff] [blame] | 1161 | [AZX_DRIVER_ATI] = 4, |
| 1162 | [AZX_DRIVER_ATIHDMI] = 4, |
| 1163 | [AZX_DRIVER_VIA] = 3, /* FIXME: correct? */ |
| 1164 | [AZX_DRIVER_SIS] = 3, /* FIXME: correct? */ |
| 1165 | [AZX_DRIVER_ULI] = 3, /* FIXME: correct? */ |
| 1166 | [AZX_DRIVER_NVIDIA] = 3, /* FIXME: correct? */ |
Kailang Yang | f269002 | 2008-05-27 11:44:55 +0200 | [diff] [blame] | 1167 | [AZX_DRIVER_TERA] = 1, |
Takashi Iwai | a9995a3 | 2007-03-12 21:30:46 +0100 | [diff] [blame] | 1168 | }; |
| 1169 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1170 | static int __devinit azx_codec_create(struct azx *chip, const char *model, |
| 1171 | unsigned int codec_probe_mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1172 | { |
| 1173 | struct hda_bus_template bus_temp; |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1174 | int c, codecs, audio_codecs, err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1175 | |
| 1176 | memset(&bus_temp, 0, sizeof(bus_temp)); |
| 1177 | bus_temp.private_data = chip; |
| 1178 | bus_temp.modelname = model; |
| 1179 | bus_temp.pci = chip->pci; |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 1180 | bus_temp.ops.command = azx_send_cmd; |
| 1181 | bus_temp.ops.get_response = azx_get_response; |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1182 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
| 1183 | bus_temp.ops.pm_notify = azx_power_notify; |
| 1184 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1185 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1186 | err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus); |
| 1187 | if (err < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1188 | return err; |
| 1189 | |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1190 | codecs = audio_codecs = 0; |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 1191 | for (c = 0; c < AZX_MAX_CODECS; c++) { |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1192 | if ((chip->codec_mask & (1 << c)) & codec_probe_mask) { |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1193 | struct hda_codec *codec; |
| 1194 | err = snd_hda_codec_new(chip->bus, c, &codec); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1195 | if (err < 0) |
| 1196 | continue; |
| 1197 | codecs++; |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1198 | if (codec->afg) |
| 1199 | audio_codecs++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1200 | } |
| 1201 | } |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1202 | if (!audio_codecs) { |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 1203 | /* probe additional slots if no codec is found */ |
| 1204 | for (; c < azx_max_codecs[chip->driver_type]; c++) { |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1205 | if ((chip->codec_mask & (1 << c)) & codec_probe_mask) { |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 1206 | err = snd_hda_codec_new(chip->bus, c, NULL); |
| 1207 | if (err < 0) |
| 1208 | continue; |
| 1209 | codecs++; |
| 1210 | } |
| 1211 | } |
| 1212 | } |
| 1213 | if (!codecs) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1214 | snd_printk(KERN_ERR SFX "no codecs initialized\n"); |
| 1215 | return -ENXIO; |
| 1216 | } |
| 1217 | |
| 1218 | return 0; |
| 1219 | } |
| 1220 | |
| 1221 | |
| 1222 | /* |
| 1223 | * PCM support |
| 1224 | */ |
| 1225 | |
| 1226 | /* assign a stream for the PCM */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1227 | static inline struct azx_dev *azx_assign_device(struct azx *chip, int stream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1228 | { |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1229 | int dev, i, nums; |
| 1230 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 1231 | dev = chip->playback_index_offset; |
| 1232 | nums = chip->playback_streams; |
| 1233 | } else { |
| 1234 | dev = chip->capture_index_offset; |
| 1235 | nums = chip->capture_streams; |
| 1236 | } |
| 1237 | for (i = 0; i < nums; i++, dev++) |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1238 | if (!chip->azx_dev[dev].opened) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1239 | chip->azx_dev[dev].opened = 1; |
| 1240 | return &chip->azx_dev[dev]; |
| 1241 | } |
| 1242 | return NULL; |
| 1243 | } |
| 1244 | |
| 1245 | /* release the assigned stream */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1246 | static inline void azx_release_device(struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1247 | { |
| 1248 | azx_dev->opened = 0; |
| 1249 | } |
| 1250 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1251 | static struct snd_pcm_hardware azx_pcm_hw = { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1252 | .info = (SNDRV_PCM_INFO_MMAP | |
| 1253 | SNDRV_PCM_INFO_INTERLEAVED | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1254 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
| 1255 | SNDRV_PCM_INFO_MMAP_VALID | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1256 | /* No full-resume yet implemented */ |
| 1257 | /* SNDRV_PCM_INFO_RESUME |*/ |
Takashi Iwai | 850f0e5 | 2008-03-18 17:11:05 +0100 | [diff] [blame] | 1258 | SNDRV_PCM_INFO_PAUSE | |
| 1259 | SNDRV_PCM_INFO_SYNC_START), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1260 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
| 1261 | .rates = SNDRV_PCM_RATE_48000, |
| 1262 | .rate_min = 48000, |
| 1263 | .rate_max = 48000, |
| 1264 | .channels_min = 2, |
| 1265 | .channels_max = 2, |
| 1266 | .buffer_bytes_max = AZX_MAX_BUF_SIZE, |
| 1267 | .period_bytes_min = 128, |
| 1268 | .period_bytes_max = AZX_MAX_BUF_SIZE / 2, |
| 1269 | .periods_min = 2, |
| 1270 | .periods_max = AZX_MAX_FRAG, |
| 1271 | .fifo_size = 0, |
| 1272 | }; |
| 1273 | |
| 1274 | struct azx_pcm { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1275 | struct azx *chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1276 | struct hda_codec *codec; |
| 1277 | struct hda_pcm_stream *hinfo[2]; |
| 1278 | }; |
| 1279 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1280 | static int azx_pcm_open(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1281 | { |
| 1282 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 1283 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1284 | struct azx *chip = apcm->chip; |
| 1285 | struct azx_dev *azx_dev; |
| 1286 | struct snd_pcm_runtime *runtime = substream->runtime; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1287 | unsigned long flags; |
| 1288 | int err; |
| 1289 | |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1290 | mutex_lock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1291 | azx_dev = azx_assign_device(chip, substream->stream); |
| 1292 | if (azx_dev == NULL) { |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1293 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1294 | return -EBUSY; |
| 1295 | } |
| 1296 | runtime->hw = azx_pcm_hw; |
| 1297 | runtime->hw.channels_min = hinfo->channels_min; |
| 1298 | runtime->hw.channels_max = hinfo->channels_max; |
| 1299 | runtime->hw.formats = hinfo->formats; |
| 1300 | runtime->hw.rates = hinfo->rates; |
| 1301 | snd_pcm_limit_hw_rates(runtime); |
| 1302 | snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); |
Joachim Deguara | 5f1545b | 2007-03-16 15:01:36 +0100 | [diff] [blame] | 1303 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, |
| 1304 | 128); |
| 1305 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, |
| 1306 | 128); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1307 | snd_hda_power_up(apcm->codec); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1308 | err = hinfo->ops.open(hinfo, apcm->codec, substream); |
| 1309 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1310 | azx_release_device(azx_dev); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1311 | snd_hda_power_down(apcm->codec); |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1312 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1313 | return err; |
| 1314 | } |
| 1315 | spin_lock_irqsave(&chip->reg_lock, flags); |
| 1316 | azx_dev->substream = substream; |
| 1317 | azx_dev->running = 0; |
| 1318 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
| 1319 | |
| 1320 | runtime->private_data = azx_dev; |
Takashi Iwai | 850f0e5 | 2008-03-18 17:11:05 +0100 | [diff] [blame] | 1321 | snd_pcm_set_sync(substream); |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1322 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1323 | return 0; |
| 1324 | } |
| 1325 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1326 | static int azx_pcm_close(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1327 | { |
| 1328 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 1329 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1330 | struct azx *chip = apcm->chip; |
| 1331 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1332 | unsigned long flags; |
| 1333 | |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1334 | mutex_lock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1335 | spin_lock_irqsave(&chip->reg_lock, flags); |
| 1336 | azx_dev->substream = NULL; |
| 1337 | azx_dev->running = 0; |
| 1338 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
| 1339 | azx_release_device(azx_dev); |
| 1340 | hinfo->ops.close(hinfo, apcm->codec, substream); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1341 | snd_hda_power_down(apcm->codec); |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1342 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1343 | return 0; |
| 1344 | } |
| 1345 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1346 | static int azx_pcm_hw_params(struct snd_pcm_substream *substream, |
| 1347 | struct snd_pcm_hw_params *hw_params) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1348 | { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1349 | return snd_pcm_lib_malloc_pages(substream, |
| 1350 | params_buffer_bytes(hw_params)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1351 | } |
| 1352 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1353 | static int azx_pcm_hw_free(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1354 | { |
| 1355 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1356 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1357 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
| 1358 | |
| 1359 | /* reset BDL address */ |
| 1360 | azx_sd_writel(azx_dev, SD_BDLPL, 0); |
| 1361 | azx_sd_writel(azx_dev, SD_BDLPU, 0); |
| 1362 | azx_sd_writel(azx_dev, SD_CTL, 0); |
| 1363 | |
| 1364 | hinfo->ops.cleanup(hinfo, apcm->codec, substream); |
| 1365 | |
| 1366 | return snd_pcm_lib_free_pages(substream); |
| 1367 | } |
| 1368 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1369 | static int azx_pcm_prepare(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1370 | { |
| 1371 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1372 | struct azx *chip = apcm->chip; |
| 1373 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1374 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1375 | struct snd_pcm_runtime *runtime = substream->runtime; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1376 | |
| 1377 | azx_dev->bufsize = snd_pcm_lib_buffer_bytes(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1378 | azx_dev->format_val = snd_hda_calc_stream_format(runtime->rate, |
| 1379 | runtime->channels, |
| 1380 | runtime->format, |
| 1381 | hinfo->maxbps); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1382 | if (!azx_dev->format_val) { |
| 1383 | snd_printk(KERN_ERR SFX |
| 1384 | "invalid format_val, rate=%d, ch=%d, format=%d\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1385 | runtime->rate, runtime->channels, runtime->format); |
| 1386 | return -EINVAL; |
| 1387 | } |
| 1388 | |
Takashi Iwai | 21c7b08 | 2008-02-07 12:06:32 +0100 | [diff] [blame] | 1389 | snd_printdd("azx_pcm_prepare: bufsize=0x%x, format=0x%x\n", |
| 1390 | azx_dev->bufsize, azx_dev->format_val); |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1391 | if (azx_setup_periods(substream, azx_dev) < 0) |
| 1392 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1393 | azx_setup_controller(chip, azx_dev); |
| 1394 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 1395 | azx_dev->fifo_size = azx_sd_readw(azx_dev, SD_FIFOSIZE) + 1; |
| 1396 | else |
| 1397 | azx_dev->fifo_size = 0; |
| 1398 | |
| 1399 | return hinfo->ops.prepare(hinfo, apcm->codec, azx_dev->stream_tag, |
| 1400 | azx_dev->format_val, substream); |
| 1401 | } |
| 1402 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1403 | static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1404 | { |
| 1405 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1406 | struct azx *chip = apcm->chip; |
Takashi Iwai | 850f0e5 | 2008-03-18 17:11:05 +0100 | [diff] [blame] | 1407 | struct azx_dev *azx_dev; |
| 1408 | struct snd_pcm_substream *s; |
| 1409 | int start, nsync = 0, sbits = 0; |
| 1410 | int nwait, timeout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1411 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1412 | switch (cmd) { |
| 1413 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 1414 | case SNDRV_PCM_TRIGGER_RESUME: |
| 1415 | case SNDRV_PCM_TRIGGER_START: |
Takashi Iwai | 850f0e5 | 2008-03-18 17:11:05 +0100 | [diff] [blame] | 1416 | start = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1417 | break; |
| 1418 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
Jaroslav Kysela | 4712319 | 2005-08-15 20:53:07 +0200 | [diff] [blame] | 1419 | case SNDRV_PCM_TRIGGER_SUSPEND: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1420 | case SNDRV_PCM_TRIGGER_STOP: |
Takashi Iwai | 850f0e5 | 2008-03-18 17:11:05 +0100 | [diff] [blame] | 1421 | start = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1422 | break; |
| 1423 | default: |
Takashi Iwai | 850f0e5 | 2008-03-18 17:11:05 +0100 | [diff] [blame] | 1424 | return -EINVAL; |
| 1425 | } |
| 1426 | |
| 1427 | snd_pcm_group_for_each_entry(s, substream) { |
| 1428 | if (s->pcm->card != substream->pcm->card) |
| 1429 | continue; |
| 1430 | azx_dev = get_azx_dev(s); |
| 1431 | sbits |= 1 << azx_dev->index; |
| 1432 | nsync++; |
| 1433 | snd_pcm_trigger_done(s, substream); |
| 1434 | } |
| 1435 | |
| 1436 | spin_lock(&chip->reg_lock); |
| 1437 | if (nsync > 1) { |
| 1438 | /* first, set SYNC bits of corresponding streams */ |
| 1439 | azx_writel(chip, SYNC, azx_readl(chip, SYNC) | sbits); |
| 1440 | } |
| 1441 | snd_pcm_group_for_each_entry(s, substream) { |
| 1442 | if (s->pcm->card != substream->pcm->card) |
| 1443 | continue; |
| 1444 | azx_dev = get_azx_dev(s); |
| 1445 | if (start) |
| 1446 | azx_stream_start(chip, azx_dev); |
| 1447 | else |
| 1448 | azx_stream_stop(chip, azx_dev); |
| 1449 | azx_dev->running = start; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1450 | } |
| 1451 | spin_unlock(&chip->reg_lock); |
Takashi Iwai | 850f0e5 | 2008-03-18 17:11:05 +0100 | [diff] [blame] | 1452 | if (start) { |
| 1453 | if (nsync == 1) |
| 1454 | return 0; |
| 1455 | /* wait until all FIFOs get ready */ |
| 1456 | for (timeout = 5000; timeout; timeout--) { |
| 1457 | nwait = 0; |
| 1458 | snd_pcm_group_for_each_entry(s, substream) { |
| 1459 | if (s->pcm->card != substream->pcm->card) |
| 1460 | continue; |
| 1461 | azx_dev = get_azx_dev(s); |
| 1462 | if (!(azx_sd_readb(azx_dev, SD_STS) & |
| 1463 | SD_STS_FIFO_READY)) |
| 1464 | nwait++; |
| 1465 | } |
| 1466 | if (!nwait) |
| 1467 | break; |
| 1468 | cpu_relax(); |
| 1469 | } |
| 1470 | } else { |
| 1471 | /* wait until all RUN bits are cleared */ |
| 1472 | for (timeout = 5000; timeout; timeout--) { |
| 1473 | nwait = 0; |
| 1474 | snd_pcm_group_for_each_entry(s, substream) { |
| 1475 | if (s->pcm->card != substream->pcm->card) |
| 1476 | continue; |
| 1477 | azx_dev = get_azx_dev(s); |
| 1478 | if (azx_sd_readb(azx_dev, SD_CTL) & |
| 1479 | SD_CTL_DMA_START) |
| 1480 | nwait++; |
| 1481 | } |
| 1482 | if (!nwait) |
| 1483 | break; |
| 1484 | cpu_relax(); |
| 1485 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1486 | } |
Takashi Iwai | 850f0e5 | 2008-03-18 17:11:05 +0100 | [diff] [blame] | 1487 | if (nsync > 1) { |
| 1488 | spin_lock(&chip->reg_lock); |
| 1489 | /* reset SYNC bits */ |
| 1490 | azx_writel(chip, SYNC, azx_readl(chip, SYNC) & ~sbits); |
| 1491 | spin_unlock(&chip->reg_lock); |
| 1492 | } |
| 1493 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1494 | } |
| 1495 | |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 1496 | static unsigned int azx_get_position(struct azx *chip, |
| 1497 | struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1498 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1499 | unsigned int pos; |
| 1500 | |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 1501 | if (chip->position_fix == POS_FIX_POSBUF || |
| 1502 | chip->position_fix == POS_FIX_AUTO) { |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1503 | /* use the position buffer */ |
Takashi Iwai | 929861c | 2006-08-31 16:55:40 +0200 | [diff] [blame] | 1504 | pos = le32_to_cpu(*azx_dev->posbuf); |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1505 | } else { |
| 1506 | /* read LPIB */ |
| 1507 | pos = azx_sd_readl(azx_dev, SD_LPIB); |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1508 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1509 | if (pos >= azx_dev->bufsize) |
| 1510 | pos = 0; |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 1511 | return pos; |
| 1512 | } |
| 1513 | |
| 1514 | static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream) |
| 1515 | { |
| 1516 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 1517 | struct azx *chip = apcm->chip; |
| 1518 | struct azx_dev *azx_dev = get_azx_dev(substream); |
| 1519 | return bytes_to_frames(substream->runtime, |
| 1520 | azx_get_position(chip, azx_dev)); |
| 1521 | } |
| 1522 | |
| 1523 | /* |
| 1524 | * Check whether the current DMA position is acceptable for updating |
| 1525 | * periods. Returns non-zero if it's OK. |
| 1526 | * |
| 1527 | * Many HD-audio controllers appear pretty inaccurate about |
| 1528 | * the update-IRQ timing. The IRQ is issued before actually the |
| 1529 | * data is processed. So, we need to process it afterwords in a |
| 1530 | * workqueue. |
| 1531 | */ |
| 1532 | static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev) |
| 1533 | { |
| 1534 | unsigned int pos; |
| 1535 | |
| 1536 | pos = azx_get_position(chip, azx_dev); |
| 1537 | if (chip->position_fix == POS_FIX_AUTO) { |
| 1538 | if (!pos) { |
| 1539 | printk(KERN_WARNING |
| 1540 | "hda-intel: Invalid position buffer, " |
| 1541 | "using LPIB read method instead.\n"); |
Takashi Iwai | d2e1c97 | 2008-06-10 17:53:34 +0200 | [diff] [blame^] | 1542 | chip->position_fix = POS_FIX_LPIB; |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 1543 | pos = azx_get_position(chip, azx_dev); |
| 1544 | } else |
| 1545 | chip->position_fix = POS_FIX_POSBUF; |
| 1546 | } |
| 1547 | |
| 1548 | if (pos % azx_dev->period_bytes > azx_dev->period_bytes / 2) |
| 1549 | return 0; /* NG - it's below the period boundary */ |
| 1550 | return 1; /* OK, it's fine */ |
| 1551 | } |
| 1552 | |
| 1553 | /* |
| 1554 | * The work for pending PCM period updates. |
| 1555 | */ |
| 1556 | static void azx_irq_pending_work(struct work_struct *work) |
| 1557 | { |
| 1558 | struct azx *chip = container_of(work, struct azx, irq_pending_work); |
| 1559 | int i, pending; |
| 1560 | |
| 1561 | for (;;) { |
| 1562 | pending = 0; |
| 1563 | spin_lock_irq(&chip->reg_lock); |
| 1564 | for (i = 0; i < chip->num_streams; i++) { |
| 1565 | struct azx_dev *azx_dev = &chip->azx_dev[i]; |
| 1566 | if (!azx_dev->irq_pending || |
| 1567 | !azx_dev->substream || |
| 1568 | !azx_dev->running) |
| 1569 | continue; |
| 1570 | if (azx_position_ok(chip, azx_dev)) { |
| 1571 | azx_dev->irq_pending = 0; |
| 1572 | spin_unlock(&chip->reg_lock); |
| 1573 | snd_pcm_period_elapsed(azx_dev->substream); |
| 1574 | spin_lock(&chip->reg_lock); |
| 1575 | } else |
| 1576 | pending++; |
| 1577 | } |
| 1578 | spin_unlock_irq(&chip->reg_lock); |
| 1579 | if (!pending) |
| 1580 | return; |
| 1581 | cond_resched(); |
| 1582 | } |
| 1583 | } |
| 1584 | |
| 1585 | /* clear irq_pending flags and assure no on-going workq */ |
| 1586 | static void azx_clear_irq_pending(struct azx *chip) |
| 1587 | { |
| 1588 | int i; |
| 1589 | |
| 1590 | spin_lock_irq(&chip->reg_lock); |
| 1591 | for (i = 0; i < chip->num_streams; i++) |
| 1592 | chip->azx_dev[i].irq_pending = 0; |
| 1593 | spin_unlock_irq(&chip->reg_lock); |
| 1594 | flush_scheduled_work(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1595 | } |
| 1596 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1597 | static struct snd_pcm_ops azx_pcm_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1598 | .open = azx_pcm_open, |
| 1599 | .close = azx_pcm_close, |
| 1600 | .ioctl = snd_pcm_lib_ioctl, |
| 1601 | .hw_params = azx_pcm_hw_params, |
| 1602 | .hw_free = azx_pcm_hw_free, |
| 1603 | .prepare = azx_pcm_prepare, |
| 1604 | .trigger = azx_pcm_trigger, |
| 1605 | .pointer = azx_pcm_pointer, |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1606 | .page = snd_pcm_sgbuf_ops_page, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1607 | }; |
| 1608 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1609 | static void azx_pcm_free(struct snd_pcm *pcm) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1610 | { |
| 1611 | kfree(pcm->private_data); |
| 1612 | } |
| 1613 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1614 | static int __devinit create_codec_pcm(struct azx *chip, struct hda_codec *codec, |
Takashi Iwai | 7ba72ba | 2008-02-06 14:03:20 +0100 | [diff] [blame] | 1615 | struct hda_pcm *cpcm) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1616 | { |
| 1617 | int err; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1618 | struct snd_pcm *pcm; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1619 | struct azx_pcm *apcm; |
| 1620 | |
Takashi Iwai | e08a007 | 2006-09-07 17:52:14 +0200 | [diff] [blame] | 1621 | /* if no substreams are defined for both playback and capture, |
| 1622 | * it's just a placeholder. ignore it. |
| 1623 | */ |
| 1624 | if (!cpcm->stream[0].substreams && !cpcm->stream[1].substreams) |
| 1625 | return 0; |
| 1626 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1627 | snd_assert(cpcm->name, return -EINVAL); |
| 1628 | |
Takashi Iwai | 7ba72ba | 2008-02-06 14:03:20 +0100 | [diff] [blame] | 1629 | err = snd_pcm_new(chip->card, cpcm->name, cpcm->device, |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1630 | cpcm->stream[0].substreams, |
| 1631 | cpcm->stream[1].substreams, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1632 | &pcm); |
| 1633 | if (err < 0) |
| 1634 | return err; |
| 1635 | strcpy(pcm->name, cpcm->name); |
| 1636 | apcm = kmalloc(sizeof(*apcm), GFP_KERNEL); |
| 1637 | if (apcm == NULL) |
| 1638 | return -ENOMEM; |
| 1639 | apcm->chip = chip; |
| 1640 | apcm->codec = codec; |
| 1641 | apcm->hinfo[0] = &cpcm->stream[0]; |
| 1642 | apcm->hinfo[1] = &cpcm->stream[1]; |
| 1643 | pcm->private_data = apcm; |
| 1644 | pcm->private_free = azx_pcm_free; |
| 1645 | if (cpcm->stream[0].substreams) |
| 1646 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &azx_pcm_ops); |
| 1647 | if (cpcm->stream[1].substreams) |
| 1648 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &azx_pcm_ops); |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1649 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1650 | snd_dma_pci_data(chip->pci), |
Jaroslav Kysela | b66b3cf | 2006-10-06 09:34:20 +0200 | [diff] [blame] | 1651 | 1024 * 64, 1024 * 1024); |
Takashi Iwai | 7ba72ba | 2008-02-06 14:03:20 +0100 | [diff] [blame] | 1652 | chip->pcm[cpcm->device] = pcm; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1653 | return 0; |
| 1654 | } |
| 1655 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1656 | static int __devinit azx_pcm_create(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1657 | { |
Takashi Iwai | 7ba72ba | 2008-02-06 14:03:20 +0100 | [diff] [blame] | 1658 | static const char *dev_name[HDA_PCM_NTYPES] = { |
| 1659 | "Audio", "SPDIF", "HDMI", "Modem" |
| 1660 | }; |
| 1661 | /* starting device index for each PCM type */ |
| 1662 | static int dev_idx[HDA_PCM_NTYPES] = { |
| 1663 | [HDA_PCM_TYPE_AUDIO] = 0, |
| 1664 | [HDA_PCM_TYPE_SPDIF] = 1, |
| 1665 | [HDA_PCM_TYPE_HDMI] = 3, |
| 1666 | [HDA_PCM_TYPE_MODEM] = 6 |
| 1667 | }; |
| 1668 | /* normal audio device indices; not linear to keep compatibility */ |
| 1669 | static int audio_idx[4] = { 0, 2, 4, 5 }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1670 | struct hda_codec *codec; |
| 1671 | int c, err; |
Takashi Iwai | 7ba72ba | 2008-02-06 14:03:20 +0100 | [diff] [blame] | 1672 | int num_devs[HDA_PCM_NTYPES]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1673 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1674 | err = snd_hda_build_pcms(chip->bus); |
| 1675 | if (err < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1676 | return err; |
| 1677 | |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1678 | /* create audio PCMs */ |
Takashi Iwai | 7ba72ba | 2008-02-06 14:03:20 +0100 | [diff] [blame] | 1679 | memset(num_devs, 0, sizeof(num_devs)); |
Matthias Kaehlcke | 33206e8 | 2007-09-17 14:40:04 +0200 | [diff] [blame] | 1680 | list_for_each_entry(codec, &chip->bus->codec_list, list) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1681 | for (c = 0; c < codec->num_pcms; c++) { |
Takashi Iwai | 7ba72ba | 2008-02-06 14:03:20 +0100 | [diff] [blame] | 1682 | struct hda_pcm *cpcm = &codec->pcm_info[c]; |
| 1683 | int type = cpcm->pcm_type; |
| 1684 | switch (type) { |
| 1685 | case HDA_PCM_TYPE_AUDIO: |
| 1686 | if (num_devs[type] >= ARRAY_SIZE(audio_idx)) { |
| 1687 | snd_printk(KERN_WARNING |
| 1688 | "Too many audio devices\n"); |
| 1689 | continue; |
| 1690 | } |
| 1691 | cpcm->device = audio_idx[num_devs[type]]; |
| 1692 | break; |
| 1693 | case HDA_PCM_TYPE_SPDIF: |
| 1694 | case HDA_PCM_TYPE_HDMI: |
| 1695 | case HDA_PCM_TYPE_MODEM: |
| 1696 | if (num_devs[type]) { |
| 1697 | snd_printk(KERN_WARNING |
| 1698 | "%s already defined\n", |
| 1699 | dev_name[type]); |
| 1700 | continue; |
| 1701 | } |
| 1702 | cpcm->device = dev_idx[type]; |
| 1703 | break; |
| 1704 | default: |
| 1705 | snd_printk(KERN_WARNING |
| 1706 | "Invalid PCM type %d\n", type); |
| 1707 | continue; |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1708 | } |
Takashi Iwai | 7ba72ba | 2008-02-06 14:03:20 +0100 | [diff] [blame] | 1709 | num_devs[type]++; |
| 1710 | err = create_codec_pcm(chip, codec, cpcm); |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1711 | if (err < 0) |
| 1712 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1713 | } |
| 1714 | } |
| 1715 | return 0; |
| 1716 | } |
| 1717 | |
| 1718 | /* |
| 1719 | * mixer creation - all stuff is implemented in hda module |
| 1720 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1721 | static int __devinit azx_mixer_create(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1722 | { |
| 1723 | return snd_hda_build_controls(chip->bus); |
| 1724 | } |
| 1725 | |
| 1726 | |
| 1727 | /* |
| 1728 | * initialize SD streams |
| 1729 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1730 | static int __devinit azx_init_stream(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1731 | { |
| 1732 | int i; |
| 1733 | |
| 1734 | /* initialize each stream (aka device) |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1735 | * assign the starting bdl address to each stream (device) |
| 1736 | * and initialize |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1737 | */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1738 | for (i = 0; i < chip->num_streams; i++) { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1739 | struct azx_dev *azx_dev = &chip->azx_dev[i]; |
Takashi Iwai | 929861c | 2006-08-31 16:55:40 +0200 | [diff] [blame] | 1740 | azx_dev->posbuf = (u32 __iomem *)(chip->posbuf.area + i * 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1741 | /* offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */ |
| 1742 | azx_dev->sd_addr = chip->remap_addr + (0x20 * i + 0x80); |
| 1743 | /* int mask: SDI0=0x01, SDI1=0x02, ... SDO3=0x80 */ |
| 1744 | azx_dev->sd_int_sta_mask = 1 << i; |
| 1745 | /* stream tag: must be non-zero and unique */ |
| 1746 | azx_dev->index = i; |
| 1747 | azx_dev->stream_tag = i + 1; |
| 1748 | } |
| 1749 | |
| 1750 | return 0; |
| 1751 | } |
| 1752 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1753 | static int azx_acquire_irq(struct azx *chip, int do_disconnect) |
| 1754 | { |
Takashi Iwai | 437a5a4 | 2006-11-21 12:14:23 +0100 | [diff] [blame] | 1755 | if (request_irq(chip->pci->irq, azx_interrupt, |
| 1756 | chip->msi ? 0 : IRQF_SHARED, |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1757 | "HDA Intel", chip)) { |
| 1758 | printk(KERN_ERR "hda-intel: unable to grab IRQ %d, " |
| 1759 | "disabling device\n", chip->pci->irq); |
| 1760 | if (do_disconnect) |
| 1761 | snd_card_disconnect(chip->card); |
| 1762 | return -1; |
| 1763 | } |
| 1764 | chip->irq = chip->pci->irq; |
Takashi Iwai | 69e1341 | 2006-11-21 12:10:55 +0100 | [diff] [blame] | 1765 | pci_intx(chip->pci, !chip->msi); |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1766 | return 0; |
| 1767 | } |
| 1768 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1769 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1770 | static void azx_stop_chip(struct azx *chip) |
| 1771 | { |
Takashi Iwai | 95e99fd | 2007-08-13 15:29:04 +0200 | [diff] [blame] | 1772 | if (!chip->initialized) |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1773 | return; |
| 1774 | |
| 1775 | /* disable interrupts */ |
| 1776 | azx_int_disable(chip); |
| 1777 | azx_int_clear(chip); |
| 1778 | |
| 1779 | /* disable CORB/RIRB */ |
| 1780 | azx_free_cmd_io(chip); |
| 1781 | |
| 1782 | /* disable position buffer */ |
| 1783 | azx_writel(chip, DPLBASE, 0); |
| 1784 | azx_writel(chip, DPUBASE, 0); |
| 1785 | |
| 1786 | chip->initialized = 0; |
| 1787 | } |
| 1788 | |
| 1789 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
| 1790 | /* power-up/down the controller */ |
| 1791 | static void azx_power_notify(struct hda_codec *codec) |
| 1792 | { |
| 1793 | struct azx *chip = codec->bus->private_data; |
| 1794 | struct hda_codec *c; |
| 1795 | int power_on = 0; |
| 1796 | |
| 1797 | list_for_each_entry(c, &codec->bus->codec_list, list) { |
| 1798 | if (c->power_on) { |
| 1799 | power_on = 1; |
| 1800 | break; |
| 1801 | } |
| 1802 | } |
| 1803 | if (power_on) |
| 1804 | azx_init_chip(chip); |
Takashi Iwai | dee1b66 | 2007-08-13 16:10:30 +0200 | [diff] [blame] | 1805 | else if (chip->running && power_save_controller) |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1806 | azx_stop_chip(chip); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1807 | } |
| 1808 | #endif /* CONFIG_SND_HDA_POWER_SAVE */ |
| 1809 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1810 | #ifdef CONFIG_PM |
| 1811 | /* |
| 1812 | * power management |
| 1813 | */ |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1814 | static int azx_suspend(struct pci_dev *pci, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1815 | { |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1816 | struct snd_card *card = pci_get_drvdata(pci); |
| 1817 | struct azx *chip = card->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1818 | int i; |
| 1819 | |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1820 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 1821 | azx_clear_irq_pending(chip); |
Takashi Iwai | 7ba72ba | 2008-02-06 14:03:20 +0100 | [diff] [blame] | 1822 | for (i = 0; i < AZX_MAX_PCMS; i++) |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1823 | snd_pcm_suspend_all(chip->pcm[i]); |
Takashi Iwai | 0b7a2e9 | 2007-08-14 15:18:26 +0200 | [diff] [blame] | 1824 | if (chip->initialized) |
| 1825 | snd_hda_suspend(chip->bus, state); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1826 | azx_stop_chip(chip); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1827 | if (chip->irq >= 0) { |
Takashi Iwai | 43001c9 | 2006-09-08 12:30:03 +0200 | [diff] [blame] | 1828 | free_irq(chip->irq, chip); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1829 | chip->irq = -1; |
| 1830 | } |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1831 | if (chip->msi) |
Takashi Iwai | 43001c9 | 2006-09-08 12:30:03 +0200 | [diff] [blame] | 1832 | pci_disable_msi(chip->pci); |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1833 | pci_disable_device(pci); |
| 1834 | pci_save_state(pci); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1835 | pci_set_power_state(pci, pci_choose_state(pci, state)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1836 | return 0; |
| 1837 | } |
| 1838 | |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1839 | static int azx_resume(struct pci_dev *pci) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1840 | { |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1841 | struct snd_card *card = pci_get_drvdata(pci); |
| 1842 | struct azx *chip = card->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1843 | |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1844 | pci_set_power_state(pci, PCI_D0); |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1845 | pci_restore_state(pci); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1846 | if (pci_enable_device(pci) < 0) { |
| 1847 | printk(KERN_ERR "hda-intel: pci_enable_device failed, " |
| 1848 | "disabling device\n"); |
| 1849 | snd_card_disconnect(card); |
| 1850 | return -EIO; |
| 1851 | } |
| 1852 | pci_set_master(pci); |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1853 | if (chip->msi) |
| 1854 | if (pci_enable_msi(pci) < 0) |
| 1855 | chip->msi = 0; |
| 1856 | if (azx_acquire_irq(chip, 1) < 0) |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1857 | return -EIO; |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1858 | azx_init_pci(chip); |
Maxim Levitsky | d804ad9 | 2007-09-03 15:28:04 +0200 | [diff] [blame] | 1859 | |
| 1860 | if (snd_hda_codecs_inuse(chip->bus)) |
| 1861 | azx_init_chip(chip); |
| 1862 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1863 | snd_hda_resume(chip->bus); |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1864 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1865 | return 0; |
| 1866 | } |
| 1867 | #endif /* CONFIG_PM */ |
| 1868 | |
| 1869 | |
| 1870 | /* |
| 1871 | * destructor |
| 1872 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1873 | static int azx_free(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1874 | { |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1875 | int i; |
| 1876 | |
Takashi Iwai | ce43fba | 2005-05-30 20:33:44 +0200 | [diff] [blame] | 1877 | if (chip->initialized) { |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 1878 | azx_clear_irq_pending(chip); |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1879 | for (i = 0; i < chip->num_streams; i++) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1880 | azx_stream_stop(chip, &chip->azx_dev[i]); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1881 | azx_stop_chip(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1882 | } |
| 1883 | |
Jeff Garzik | f000fd8 | 2008-04-22 13:50:34 +0200 | [diff] [blame] | 1884 | if (chip->irq >= 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1885 | free_irq(chip->irq, (void*)chip); |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1886 | if (chip->msi) |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1887 | pci_disable_msi(chip->pci); |
Takashi Iwai | f079c25 | 2006-06-01 11:42:14 +0200 | [diff] [blame] | 1888 | if (chip->remap_addr) |
| 1889 | iounmap(chip->remap_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1890 | |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1891 | if (chip->azx_dev) { |
| 1892 | for (i = 0; i < chip->num_streams; i++) |
| 1893 | if (chip->azx_dev[i].bdl.area) |
| 1894 | snd_dma_free_pages(&chip->azx_dev[i].bdl); |
| 1895 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1896 | if (chip->rb.area) |
| 1897 | snd_dma_free_pages(&chip->rb); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1898 | if (chip->posbuf.area) |
| 1899 | snd_dma_free_pages(&chip->posbuf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1900 | pci_release_regions(chip->pci); |
| 1901 | pci_disable_device(chip->pci); |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1902 | kfree(chip->azx_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1903 | kfree(chip); |
| 1904 | |
| 1905 | return 0; |
| 1906 | } |
| 1907 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1908 | static int azx_dev_free(struct snd_device *device) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1909 | { |
| 1910 | return azx_free(device->device_data); |
| 1911 | } |
| 1912 | |
| 1913 | /* |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1914 | * white/black-listing for position_fix |
| 1915 | */ |
Ralf Baechle | 623ec04 | 2007-03-13 15:29:47 +0100 | [diff] [blame] | 1916 | static struct snd_pci_quirk position_fix_list[] __devinitdata = { |
Takashi Iwai | d2e1c97 | 2008-06-10 17:53:34 +0200 | [diff] [blame^] | 1917 | SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB), |
| 1918 | SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB), |
| 1919 | SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB), |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1920 | {} |
| 1921 | }; |
| 1922 | |
| 1923 | static int __devinit check_position_fix(struct azx *chip, int fix) |
| 1924 | { |
| 1925 | const struct snd_pci_quirk *q; |
| 1926 | |
| 1927 | if (fix == POS_FIX_AUTO) { |
| 1928 | q = snd_pci_quirk_lookup(chip->pci, position_fix_list); |
| 1929 | if (q) { |
Takashi Iwai | 669ba27 | 2007-08-17 09:17:36 +0200 | [diff] [blame] | 1930 | printk(KERN_INFO |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1931 | "hda_intel: position_fix set to %d " |
| 1932 | "for device %04x:%04x\n", |
| 1933 | q->value, q->subvendor, q->subdevice); |
| 1934 | return q->value; |
| 1935 | } |
| 1936 | } |
| 1937 | return fix; |
| 1938 | } |
| 1939 | |
| 1940 | /* |
Takashi Iwai | 669ba27 | 2007-08-17 09:17:36 +0200 | [diff] [blame] | 1941 | * black-lists for probe_mask |
| 1942 | */ |
| 1943 | static struct snd_pci_quirk probe_mask_list[] __devinitdata = { |
| 1944 | /* Thinkpad often breaks the controller communication when accessing |
| 1945 | * to the non-working (or non-existing) modem codec slot. |
| 1946 | */ |
| 1947 | SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01), |
| 1948 | SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01), |
| 1949 | SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01), |
| 1950 | {} |
| 1951 | }; |
| 1952 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1953 | static void __devinit check_probe_mask(struct azx *chip, int dev) |
Takashi Iwai | 669ba27 | 2007-08-17 09:17:36 +0200 | [diff] [blame] | 1954 | { |
| 1955 | const struct snd_pci_quirk *q; |
| 1956 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1957 | if (probe_mask[dev] == -1) { |
Takashi Iwai | 669ba27 | 2007-08-17 09:17:36 +0200 | [diff] [blame] | 1958 | q = snd_pci_quirk_lookup(chip->pci, probe_mask_list); |
| 1959 | if (q) { |
| 1960 | printk(KERN_INFO |
| 1961 | "hda_intel: probe_mask set to 0x%x " |
| 1962 | "for device %04x:%04x\n", |
| 1963 | q->value, q->subvendor, q->subdevice); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1964 | probe_mask[dev] = q->value; |
Takashi Iwai | 669ba27 | 2007-08-17 09:17:36 +0200 | [diff] [blame] | 1965 | } |
| 1966 | } |
| 1967 | } |
| 1968 | |
| 1969 | |
| 1970 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1971 | * constructor |
| 1972 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1973 | static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1974 | int dev, int driver_type, |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1975 | struct azx **rchip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1976 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1977 | struct azx *chip; |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 1978 | int i, err; |
Tobin Davis | bcd7200 | 2008-01-15 11:23:55 +0100 | [diff] [blame] | 1979 | unsigned short gcap; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1980 | static struct snd_device_ops ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1981 | .dev_free = azx_dev_free, |
| 1982 | }; |
| 1983 | |
| 1984 | *rchip = NULL; |
Tobin Davis | bcd7200 | 2008-01-15 11:23:55 +0100 | [diff] [blame] | 1985 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1986 | err = pci_enable_device(pci); |
| 1987 | if (err < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1988 | return err; |
| 1989 | |
Takashi Iwai | e560d8d | 2005-09-09 14:21:46 +0200 | [diff] [blame] | 1990 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1991 | if (!chip) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1992 | snd_printk(KERN_ERR SFX "cannot allocate chip\n"); |
| 1993 | pci_disable_device(pci); |
| 1994 | return -ENOMEM; |
| 1995 | } |
| 1996 | |
| 1997 | spin_lock_init(&chip->reg_lock); |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1998 | mutex_init(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1999 | chip->card = card; |
| 2000 | chip->pci = pci; |
| 2001 | chip->irq = -1; |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 2002 | chip->driver_type = driver_type; |
Takashi Iwai | 134a11f | 2006-11-10 12:08:37 +0100 | [diff] [blame] | 2003 | chip->msi = enable_msi; |
Takashi Iwai | 9ad593f | 2008-05-16 12:34:47 +0200 | [diff] [blame] | 2004 | INIT_WORK(&chip->irq_pending_work, azx_irq_pending_work); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2005 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 2006 | chip->position_fix = check_position_fix(chip, position_fix[dev]); |
| 2007 | check_probe_mask(chip, dev); |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 2008 | |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 2009 | chip->single_cmd = single_cmd; |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 2010 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 2011 | #if BITS_PER_LONG != 64 |
| 2012 | /* Fix up base address on ULI M5461 */ |
| 2013 | if (chip->driver_type == AZX_DRIVER_ULI) { |
| 2014 | u16 tmp3; |
| 2015 | pci_read_config_word(pci, 0x40, &tmp3); |
| 2016 | pci_write_config_word(pci, 0x40, tmp3 | 0x10); |
| 2017 | pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0); |
| 2018 | } |
| 2019 | #endif |
| 2020 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 2021 | err = pci_request_regions(pci, "ICH HD audio"); |
| 2022 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2023 | kfree(chip); |
| 2024 | pci_disable_device(pci); |
| 2025 | return err; |
| 2026 | } |
| 2027 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 2028 | chip->addr = pci_resource_start(pci, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2029 | chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci,0)); |
| 2030 | if (chip->remap_addr == NULL) { |
| 2031 | snd_printk(KERN_ERR SFX "ioremap error\n"); |
| 2032 | err = -ENXIO; |
| 2033 | goto errout; |
| 2034 | } |
| 2035 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 2036 | if (chip->msi) |
| 2037 | if (pci_enable_msi(pci) < 0) |
| 2038 | chip->msi = 0; |
Stephen Hemminger | 7376d01 | 2006-08-21 19:17:46 +0200 | [diff] [blame] | 2039 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 2040 | if (azx_acquire_irq(chip, 0) < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2041 | err = -EBUSY; |
| 2042 | goto errout; |
| 2043 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2044 | |
| 2045 | pci_set_master(pci); |
| 2046 | synchronize_irq(chip->irq); |
| 2047 | |
Tobin Davis | bcd7200 | 2008-01-15 11:23:55 +0100 | [diff] [blame] | 2048 | gcap = azx_readw(chip, GCAP); |
| 2049 | snd_printdd("chipset global capabilities = 0x%x\n", gcap); |
| 2050 | |
Takashi Iwai | cf7aaca | 2008-02-06 15:05:57 +0100 | [diff] [blame] | 2051 | /* allow 64bit DMA address if supported by H/W */ |
| 2052 | if ((gcap & 0x01) && !pci_set_dma_mask(pci, DMA_64BIT_MASK)) |
| 2053 | pci_set_consistent_dma_mask(pci, DMA_64BIT_MASK); |
| 2054 | |
Takashi Iwai | 8b6ed8e | 2008-02-19 11:36:35 +0100 | [diff] [blame] | 2055 | /* read number of streams from GCAP register instead of using |
| 2056 | * hardcoded value |
| 2057 | */ |
| 2058 | chip->capture_streams = (gcap >> 8) & 0x0f; |
| 2059 | chip->playback_streams = (gcap >> 12) & 0x0f; |
| 2060 | if (!chip->playback_streams && !chip->capture_streams) { |
Tobin Davis | bcd7200 | 2008-01-15 11:23:55 +0100 | [diff] [blame] | 2061 | /* gcap didn't give any info, switching to old method */ |
| 2062 | |
| 2063 | switch (chip->driver_type) { |
| 2064 | case AZX_DRIVER_ULI: |
| 2065 | chip->playback_streams = ULI_NUM_PLAYBACK; |
| 2066 | chip->capture_streams = ULI_NUM_CAPTURE; |
Tobin Davis | bcd7200 | 2008-01-15 11:23:55 +0100 | [diff] [blame] | 2067 | break; |
| 2068 | case AZX_DRIVER_ATIHDMI: |
| 2069 | chip->playback_streams = ATIHDMI_NUM_PLAYBACK; |
| 2070 | chip->capture_streams = ATIHDMI_NUM_CAPTURE; |
Tobin Davis | bcd7200 | 2008-01-15 11:23:55 +0100 | [diff] [blame] | 2071 | break; |
| 2072 | default: |
| 2073 | chip->playback_streams = ICH6_NUM_PLAYBACK; |
| 2074 | chip->capture_streams = ICH6_NUM_CAPTURE; |
Tobin Davis | bcd7200 | 2008-01-15 11:23:55 +0100 | [diff] [blame] | 2075 | break; |
| 2076 | } |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 2077 | } |
Takashi Iwai | 8b6ed8e | 2008-02-19 11:36:35 +0100 | [diff] [blame] | 2078 | chip->capture_index_offset = 0; |
| 2079 | chip->playback_index_offset = chip->capture_streams; |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 2080 | chip->num_streams = chip->playback_streams + chip->capture_streams; |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2081 | chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev), |
| 2082 | GFP_KERNEL); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 2083 | if (!chip->azx_dev) { |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 2084 | snd_printk(KERN_ERR "cannot malloc azx_dev\n"); |
| 2085 | goto errout; |
| 2086 | } |
| 2087 | |
Takashi Iwai | 4ce107b | 2008-02-06 14:50:19 +0100 | [diff] [blame] | 2088 | for (i = 0; i < chip->num_streams; i++) { |
| 2089 | /* allocate memory for the BDL for each stream */ |
| 2090 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
| 2091 | snd_dma_pci_data(chip->pci), |
| 2092 | BDL_SIZE, &chip->azx_dev[i].bdl); |
| 2093 | if (err < 0) { |
| 2094 | snd_printk(KERN_ERR SFX "cannot allocate BDL\n"); |
| 2095 | goto errout; |
| 2096 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2097 | } |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 2098 | /* allocate memory for the position buffer */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2099 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
| 2100 | snd_dma_pci_data(chip->pci), |
| 2101 | chip->num_streams * 8, &chip->posbuf); |
| 2102 | if (err < 0) { |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 2103 | snd_printk(KERN_ERR SFX "cannot allocate posbuf\n"); |
| 2104 | goto errout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2105 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2106 | /* allocate CORB/RIRB */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2107 | if (!chip->single_cmd) { |
| 2108 | err = azx_alloc_cmd_io(chip); |
| 2109 | if (err < 0) |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 2110 | goto errout; |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2111 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2112 | |
| 2113 | /* initialize streams */ |
| 2114 | azx_init_stream(chip); |
| 2115 | |
| 2116 | /* initialize chip */ |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 2117 | azx_init_pci(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2118 | azx_init_chip(chip); |
| 2119 | |
| 2120 | /* codec detection */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 2121 | if (!chip->codec_mask) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2122 | snd_printk(KERN_ERR SFX "no codecs found!\n"); |
| 2123 | err = -ENODEV; |
| 2124 | goto errout; |
| 2125 | } |
| 2126 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2127 | err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); |
| 2128 | if (err <0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2129 | snd_printk(KERN_ERR SFX "Error creating device [card]!\n"); |
| 2130 | goto errout; |
| 2131 | } |
| 2132 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 2133 | strcpy(card->driver, "HDA-Intel"); |
| 2134 | strcpy(card->shortname, driver_short_names[chip->driver_type]); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2135 | sprintf(card->longname, "%s at 0x%lx irq %i", |
| 2136 | card->shortname, chip->addr, chip->irq); |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 2137 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2138 | *rchip = chip; |
| 2139 | return 0; |
| 2140 | |
| 2141 | errout: |
| 2142 | azx_free(chip); |
| 2143 | return err; |
| 2144 | } |
| 2145 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 2146 | static void power_down_all_codecs(struct azx *chip) |
| 2147 | { |
| 2148 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
| 2149 | /* The codecs were powered up in snd_hda_codec_new(). |
| 2150 | * Now all initialization done, so turn them down if possible |
| 2151 | */ |
| 2152 | struct hda_codec *codec; |
| 2153 | list_for_each_entry(codec, &chip->bus->codec_list, list) { |
| 2154 | snd_hda_power_down(codec); |
| 2155 | } |
| 2156 | #endif |
| 2157 | } |
| 2158 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2159 | static int __devinit azx_probe(struct pci_dev *pci, |
| 2160 | const struct pci_device_id *pci_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2161 | { |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 2162 | static int dev; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 2163 | struct snd_card *card; |
| 2164 | struct azx *chip; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 2165 | int err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2166 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 2167 | if (dev >= SNDRV_CARDS) |
| 2168 | return -ENODEV; |
| 2169 | if (!enable[dev]) { |
| 2170 | dev++; |
| 2171 | return -ENOENT; |
| 2172 | } |
| 2173 | |
| 2174 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 2175 | if (!card) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2176 | snd_printk(KERN_ERR SFX "Error creating card!\n"); |
| 2177 | return -ENOMEM; |
| 2178 | } |
| 2179 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 2180 | err = azx_create(card, pci, dev, pci_id->driver_data, &chip); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 2181 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2182 | snd_card_free(card); |
| 2183 | return err; |
| 2184 | } |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 2185 | card->private_data = chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2186 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2187 | /* create codec instances */ |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 2188 | err = azx_codec_create(chip, model[dev], probe_mask[dev]); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2189 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2190 | snd_card_free(card); |
| 2191 | return err; |
| 2192 | } |
| 2193 | |
| 2194 | /* create PCM streams */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2195 | err = azx_pcm_create(chip); |
| 2196 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2197 | snd_card_free(card); |
| 2198 | return err; |
| 2199 | } |
| 2200 | |
| 2201 | /* create mixer controls */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2202 | err = azx_mixer_create(chip); |
| 2203 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2204 | snd_card_free(card); |
| 2205 | return err; |
| 2206 | } |
| 2207 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2208 | snd_card_set_dev(card, &pci->dev); |
| 2209 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 2210 | err = snd_card_register(card); |
| 2211 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2212 | snd_card_free(card); |
| 2213 | return err; |
| 2214 | } |
| 2215 | |
| 2216 | pci_set_drvdata(pci, card); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 2217 | chip->running = 1; |
| 2218 | power_down_all_codecs(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2219 | |
Andrew Paprocki | e25bcdb | 2008-01-13 11:57:17 +0100 | [diff] [blame] | 2220 | dev++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2221 | return err; |
| 2222 | } |
| 2223 | |
| 2224 | static void __devexit azx_remove(struct pci_dev *pci) |
| 2225 | { |
| 2226 | snd_card_free(pci_get_drvdata(pci)); |
| 2227 | pci_set_drvdata(pci, NULL); |
| 2228 | } |
| 2229 | |
| 2230 | /* PCI IDs */ |
Takashi Iwai | f40b689 | 2006-07-05 16:51:05 +0200 | [diff] [blame] | 2231 | static struct pci_device_id azx_ids[] = { |
Takashi Iwai | 87218e9 | 2008-02-21 08:13:11 +0100 | [diff] [blame] | 2232 | /* ICH 6..10 */ |
| 2233 | { PCI_DEVICE(0x8086, 0x2668), .driver_data = AZX_DRIVER_ICH }, |
| 2234 | { PCI_DEVICE(0x8086, 0x27d8), .driver_data = AZX_DRIVER_ICH }, |
| 2235 | { PCI_DEVICE(0x8086, 0x269a), .driver_data = AZX_DRIVER_ICH }, |
| 2236 | { PCI_DEVICE(0x8086, 0x284b), .driver_data = AZX_DRIVER_ICH }, |
Kailang Yang | abbc9d1 | 2008-05-27 11:48:01 +0200 | [diff] [blame] | 2237 | { PCI_DEVICE(0x8086, 0x2911), .driver_data = AZX_DRIVER_ICH }, |
Takashi Iwai | 87218e9 | 2008-02-21 08:13:11 +0100 | [diff] [blame] | 2238 | { PCI_DEVICE(0x8086, 0x293e), .driver_data = AZX_DRIVER_ICH }, |
| 2239 | { PCI_DEVICE(0x8086, 0x293f), .driver_data = AZX_DRIVER_ICH }, |
| 2240 | { PCI_DEVICE(0x8086, 0x3a3e), .driver_data = AZX_DRIVER_ICH }, |
| 2241 | { PCI_DEVICE(0x8086, 0x3a6e), .driver_data = AZX_DRIVER_ICH }, |
| 2242 | /* SCH */ |
| 2243 | { PCI_DEVICE(0x8086, 0x811b), .driver_data = AZX_DRIVER_SCH }, |
| 2244 | /* ATI SB 450/600 */ |
| 2245 | { PCI_DEVICE(0x1002, 0x437b), .driver_data = AZX_DRIVER_ATI }, |
| 2246 | { PCI_DEVICE(0x1002, 0x4383), .driver_data = AZX_DRIVER_ATI }, |
| 2247 | /* ATI HDMI */ |
| 2248 | { PCI_DEVICE(0x1002, 0x793b), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2249 | { PCI_DEVICE(0x1002, 0x7919), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2250 | { PCI_DEVICE(0x1002, 0x960f), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2251 | { PCI_DEVICE(0x1002, 0xaa00), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2252 | { PCI_DEVICE(0x1002, 0xaa08), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2253 | { PCI_DEVICE(0x1002, 0xaa10), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2254 | { PCI_DEVICE(0x1002, 0xaa18), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2255 | { PCI_DEVICE(0x1002, 0xaa20), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2256 | { PCI_DEVICE(0x1002, 0xaa28), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2257 | { PCI_DEVICE(0x1002, 0xaa30), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2258 | { PCI_DEVICE(0x1002, 0xaa38), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2259 | { PCI_DEVICE(0x1002, 0xaa40), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2260 | { PCI_DEVICE(0x1002, 0xaa48), .driver_data = AZX_DRIVER_ATIHDMI }, |
| 2261 | /* VIA VT8251/VT8237A */ |
| 2262 | { PCI_DEVICE(0x1106, 0x3288), .driver_data = AZX_DRIVER_VIA }, |
| 2263 | /* SIS966 */ |
| 2264 | { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS }, |
| 2265 | /* ULI M5461 */ |
| 2266 | { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI }, |
| 2267 | /* NVIDIA MCP */ |
| 2268 | { PCI_DEVICE(0x10de, 0x026c), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2269 | { PCI_DEVICE(0x10de, 0x0371), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2270 | { PCI_DEVICE(0x10de, 0x03e4), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2271 | { PCI_DEVICE(0x10de, 0x03f0), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2272 | { PCI_DEVICE(0x10de, 0x044a), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2273 | { PCI_DEVICE(0x10de, 0x044b), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2274 | { PCI_DEVICE(0x10de, 0x055c), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2275 | { PCI_DEVICE(0x10de, 0x055d), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2276 | { PCI_DEVICE(0x10de, 0x0774), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2277 | { PCI_DEVICE(0x10de, 0x0775), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2278 | { PCI_DEVICE(0x10de, 0x0776), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2279 | { PCI_DEVICE(0x10de, 0x0777), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2280 | { PCI_DEVICE(0x10de, 0x07fc), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2281 | { PCI_DEVICE(0x10de, 0x07fd), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2282 | { PCI_DEVICE(0x10de, 0x0ac0), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2283 | { PCI_DEVICE(0x10de, 0x0ac1), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2284 | { PCI_DEVICE(0x10de, 0x0ac2), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2285 | { PCI_DEVICE(0x10de, 0x0ac3), .driver_data = AZX_DRIVER_NVIDIA }, |
Peer Chen | 487145a | 2008-03-06 15:15:11 +0100 | [diff] [blame] | 2286 | { PCI_DEVICE(0x10de, 0x0bd4), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2287 | { PCI_DEVICE(0x10de, 0x0bd5), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2288 | { PCI_DEVICE(0x10de, 0x0bd6), .driver_data = AZX_DRIVER_NVIDIA }, |
| 2289 | { PCI_DEVICE(0x10de, 0x0bd7), .driver_data = AZX_DRIVER_NVIDIA }, |
Kailang Yang | f269002 | 2008-05-27 11:44:55 +0200 | [diff] [blame] | 2290 | /* Teradici */ |
| 2291 | { PCI_DEVICE(0x6549, 0x1200), .driver_data = AZX_DRIVER_TERA }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2292 | { 0, } |
| 2293 | }; |
| 2294 | MODULE_DEVICE_TABLE(pci, azx_ids); |
| 2295 | |
| 2296 | /* pci_driver definition */ |
| 2297 | static struct pci_driver driver = { |
| 2298 | .name = "HDA Intel", |
| 2299 | .id_table = azx_ids, |
| 2300 | .probe = azx_probe, |
| 2301 | .remove = __devexit_p(azx_remove), |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 2302 | #ifdef CONFIG_PM |
| 2303 | .suspend = azx_suspend, |
| 2304 | .resume = azx_resume, |
| 2305 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2306 | }; |
| 2307 | |
| 2308 | static int __init alsa_card_azx_init(void) |
| 2309 | { |
Takashi Iwai | 01d25d4 | 2005-04-11 16:58:24 +0200 | [diff] [blame] | 2310 | return pci_register_driver(&driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2311 | } |
| 2312 | |
| 2313 | static void __exit alsa_card_azx_exit(void) |
| 2314 | { |
| 2315 | pci_unregister_driver(&driver); |
| 2316 | } |
| 2317 | |
| 2318 | module_init(alsa_card_azx_init) |
| 2319 | module_exit(alsa_card_azx_exit) |