blob: 8a52c860794b15b43fd128656f6888b16d75dfe3 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
Jiri Pirko22a67762017-02-03 10:29:07 +01003 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
Jiri Pirko56ade8f2015-10-16 14:01:37 +02005 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Yotam Gigi98d0f7b2017-01-23 11:07:11 +010060#include <net/tc_act/tc_sample.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020061
62#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020063#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020064#include "core.h"
65#include "reg.h"
66#include "port.h"
67#include "trap.h"
68#include "txheader.h"
69
70static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
71static const char mlxsw_sp_driver_version[] = "1.0";
72
73/* tx_hdr_version
74 * Tx header version.
75 * Must be set to 1.
76 */
77MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
78
79/* tx_hdr_ctl
80 * Packet control type.
81 * 0 - Ethernet control (e.g. EMADs, LACP)
82 * 1 - Ethernet data
83 */
84MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
85
86/* tx_hdr_proto
87 * Packet protocol type. Must be set to 1 (Ethernet).
88 */
89MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
90
91/* tx_hdr_rx_is_router
92 * Packet is sent from the router. Valid for data packets only.
93 */
94MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
95
96/* tx_hdr_fid_valid
97 * Indicates if the 'fid' field is valid and should be used for
98 * forwarding lookup. Valid for data packets only.
99 */
100MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
101
102/* tx_hdr_swid
103 * Switch partition ID. Must be set to 0.
104 */
105MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
106
107/* tx_hdr_control_tclass
108 * Indicates if the packet should use the control TClass and not one
109 * of the data TClasses.
110 */
111MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
112
113/* tx_hdr_etclass
114 * Egress TClass to be used on the egress device on the egress port.
115 */
116MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
117
118/* tx_hdr_port_mid
119 * Destination local port for unicast packets.
120 * Destination multicast ID for multicast packets.
121 *
122 * Control packets are directed to a specific egress port, while data
123 * packets are transmitted through the CPU port (0) into the switch partition,
124 * where forwarding rules are applied.
125 */
126MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
127
128/* tx_hdr_fid
129 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
130 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
131 * Valid for data packets only.
132 */
133MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
134
135/* tx_hdr_type
136 * 0 - Data packets
137 * 6 - Control packets
138 */
139MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
140
141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
Elad Raz5b090742016-10-28 21:35:46 +0200159 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200171 int i;
172
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200173 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200174 return -EIO;
175
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200176 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
177 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200178 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
179 sizeof(struct mlxsw_sp_span_entry),
180 GFP_KERNEL);
181 if (!mlxsw_sp->span.entries)
182 return -ENOMEM;
183
184 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
185 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
186
187 return 0;
188}
189
190static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
191{
192 int i;
193
194 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
195 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
196
197 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
198 }
199 kfree(mlxsw_sp->span.entries);
200}
201
202static struct mlxsw_sp_span_entry *
203mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
204{
205 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
206 struct mlxsw_sp_span_entry *span_entry;
207 char mpat_pl[MLXSW_REG_MPAT_LEN];
208 u8 local_port = port->local_port;
209 int index;
210 int i;
211 int err;
212
213 /* find a free entry to use */
214 index = -1;
215 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
216 if (!mlxsw_sp->span.entries[i].used) {
217 index = i;
218 span_entry = &mlxsw_sp->span.entries[i];
219 break;
220 }
221 }
222 if (index < 0)
223 return NULL;
224
225 /* create a new port analayzer entry for local_port */
226 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
227 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
228 if (err)
229 return NULL;
230
231 span_entry->used = true;
232 span_entry->id = index;
Yotam Gigi2d644d42016-11-11 16:34:25 +0100233 span_entry->ref_count = 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200234 span_entry->local_port = local_port;
235 return span_entry;
236}
237
238static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
239 struct mlxsw_sp_span_entry *span_entry)
240{
241 u8 local_port = span_entry->local_port;
242 char mpat_pl[MLXSW_REG_MPAT_LEN];
243 int pa_id = span_entry->id;
244
245 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
246 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
247 span_entry->used = false;
248}
249
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200250static struct mlxsw_sp_span_entry *
251mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200252{
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
254 int i;
255
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258
259 if (curr->used && curr->local_port == port->local_port)
260 return curr;
261 }
262 return NULL;
263}
264
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200265static struct mlxsw_sp_span_entry
266*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200267{
268 struct mlxsw_sp_span_entry *span_entry;
269
270 span_entry = mlxsw_sp_span_entry_find(port);
271 if (span_entry) {
Yotam Gigi2d644d42016-11-11 16:34:25 +0100272 /* Already exists, just take a reference */
Yotam Gigi763b4b72016-07-21 12:03:17 +0200273 span_entry->ref_count++;
274 return span_entry;
275 }
276
277 return mlxsw_sp_span_entry_create(port);
278}
279
280static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
281 struct mlxsw_sp_span_entry *span_entry)
282{
Yotam Gigi2d644d42016-11-11 16:34:25 +0100283 WARN_ON(!span_entry->ref_count);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200284 if (--span_entry->ref_count == 0)
285 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
286 return 0;
287}
288
289static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
290{
291 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
292 struct mlxsw_sp_span_inspected_port *p;
293 int i;
294
295 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
296 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
297
298 list_for_each_entry(p, &curr->bound_ports_list, list)
299 if (p->local_port == port->local_port &&
300 p->type == MLXSW_SP_SPAN_EGRESS)
301 return true;
302 }
303
304 return false;
305}
306
307static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
308{
309 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
310}
311
312static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
313{
314 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
315 char sbib_pl[MLXSW_REG_SBIB_LEN];
316 int err;
317
318 /* If port is egress mirrored, the shared buffer size should be
319 * updated according to the mtu value
320 */
321 if (mlxsw_sp_span_is_egress_mirror(port)) {
322 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
323 mlxsw_sp_span_mtu_to_buffsize(mtu));
324 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
325 if (err) {
326 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
327 return err;
328 }
329 }
330
331 return 0;
332}
333
334static struct mlxsw_sp_span_inspected_port *
335mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
336 struct mlxsw_sp_span_entry *span_entry)
337{
338 struct mlxsw_sp_span_inspected_port *p;
339
340 list_for_each_entry(p, &span_entry->bound_ports_list, list)
341 if (port->local_port == p->local_port)
342 return p;
343 return NULL;
344}
345
346static int
347mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
348 struct mlxsw_sp_span_entry *span_entry,
349 enum mlxsw_sp_span_type type)
350{
351 struct mlxsw_sp_span_inspected_port *inspected_port;
352 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
353 char mpar_pl[MLXSW_REG_MPAR_LEN];
354 char sbib_pl[MLXSW_REG_SBIB_LEN];
355 int pa_id = span_entry->id;
356 int err;
357
358 /* if it is an egress SPAN, bind a shared buffer to it */
359 if (type == MLXSW_SP_SPAN_EGRESS) {
360 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
361 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
362 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
363 if (err) {
364 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
365 return err;
366 }
367 }
368
369 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200370 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
371 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200372 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
373 if (err)
374 goto err_mpar_reg_write;
375
376 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
377 if (!inspected_port) {
378 err = -ENOMEM;
379 goto err_inspected_port_alloc;
380 }
381 inspected_port->local_port = port->local_port;
382 inspected_port->type = type;
383 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
384
385 return 0;
386
387err_mpar_reg_write:
388err_inspected_port_alloc:
389 if (type == MLXSW_SP_SPAN_EGRESS) {
390 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
391 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
392 }
393 return err;
394}
395
396static void
397mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
398 struct mlxsw_sp_span_entry *span_entry,
399 enum mlxsw_sp_span_type type)
400{
401 struct mlxsw_sp_span_inspected_port *inspected_port;
402 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
403 char mpar_pl[MLXSW_REG_MPAR_LEN];
404 char sbib_pl[MLXSW_REG_SBIB_LEN];
405 int pa_id = span_entry->id;
406
407 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
408 if (!inspected_port)
409 return;
410
411 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200412 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
413 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
415
416 /* remove the SBIB buffer if it was egress SPAN */
417 if (type == MLXSW_SP_SPAN_EGRESS) {
418 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
419 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
420 }
421
422 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
423
424 list_del(&inspected_port->list);
425 kfree(inspected_port);
426}
427
428static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
429 struct mlxsw_sp_port *to,
430 enum mlxsw_sp_span_type type)
431{
432 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
433 struct mlxsw_sp_span_entry *span_entry;
434 int err;
435
436 span_entry = mlxsw_sp_span_entry_get(to);
437 if (!span_entry)
438 return -ENOENT;
439
440 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
441 span_entry->id);
442
443 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
444 if (err)
445 goto err_port_bind;
446
447 return 0;
448
449err_port_bind:
450 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
451 return err;
452}
453
454static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
455 struct mlxsw_sp_port *to,
456 enum mlxsw_sp_span_type type)
457{
458 struct mlxsw_sp_span_entry *span_entry;
459
460 span_entry = mlxsw_sp_span_entry_find(to);
461 if (!span_entry) {
462 netdev_err(from->dev, "no span entry found\n");
463 return;
464 }
465
466 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
467 span_entry->id);
468 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
469}
470
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100471static int mlxsw_sp_port_sample_set(struct mlxsw_sp_port *mlxsw_sp_port,
472 bool enable, u32 rate)
473{
474 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
475 char mpsc_pl[MLXSW_REG_MPSC_LEN];
476
477 mlxsw_reg_mpsc_pack(mpsc_pl, mlxsw_sp_port->local_port, enable, rate);
478 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpsc), mpsc_pl);
479}
480
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200481static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
482 bool is_up)
483{
484 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
485 char paos_pl[MLXSW_REG_PAOS_LEN];
486
487 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
488 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
489 MLXSW_PORT_ADMIN_STATUS_DOWN);
490 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
491}
492
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200493static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
494 unsigned char *addr)
495{
496 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
497 char ppad_pl[MLXSW_REG_PPAD_LEN];
498
499 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
500 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
501 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
502}
503
504static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
505{
506 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
507 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
508
509 ether_addr_copy(addr, mlxsw_sp->base_mac);
510 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
511 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
512}
513
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200514static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
515{
516 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
517 char pmtu_pl[MLXSW_REG_PMTU_LEN];
518 int max_mtu;
519 int err;
520
521 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
522 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
523 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
524 if (err)
525 return err;
526 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
527
528 if (mtu > max_mtu)
529 return -EINVAL;
530
531 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
532 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
533}
534
Ido Schimmelbe945352016-06-09 09:51:39 +0200535static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
536 u8 swid)
537{
538 char pspa_pl[MLXSW_REG_PSPA_LEN];
539
540 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
541 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
542}
543
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200544static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
545{
546 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200547
Ido Schimmelbe945352016-06-09 09:51:39 +0200548 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
549 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200550}
551
552static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
553 bool enable)
554{
555 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
556 char svpe_pl[MLXSW_REG_SVPE_LEN];
557
558 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
559 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
560}
561
562int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
563 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
564 u16 vid)
565{
566 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
567 char svfa_pl[MLXSW_REG_SVFA_LEN];
568
569 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
570 fid, vid);
571 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
572}
573
Ido Schimmel584d73d2016-08-24 12:00:26 +0200574int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
575 u16 vid_begin, u16 vid_end,
576 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200577{
578 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
579 char *spvmlr_pl;
580 int err;
581
582 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
583 if (!spvmlr_pl)
584 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200585 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
586 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200587 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
588 kfree(spvmlr_pl);
589 return err;
590}
591
Ido Schimmel584d73d2016-08-24 12:00:26 +0200592static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
593 u16 vid, bool learn_enable)
594{
595 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
596 learn_enable);
597}
598
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200599static int
600mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
601{
602 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
603 char sspr_pl[MLXSW_REG_SSPR_LEN];
604
605 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
606 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
607}
608
Ido Schimmeld664b412016-06-09 09:51:40 +0200609static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
610 u8 local_port, u8 *p_module,
611 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200612{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200613 char pmlp_pl[MLXSW_REG_PMLP_LEN];
614 int err;
615
Ido Schimmel558c2d52016-02-26 17:32:29 +0100616 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200617 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
618 if (err)
619 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100620 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
621 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200622 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200623 return 0;
624}
625
Ido Schimmel18f1e702016-02-26 17:32:31 +0100626static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
627 u8 module, u8 width, u8 lane)
628{
629 char pmlp_pl[MLXSW_REG_PMLP_LEN];
630 int i;
631
632 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
633 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
634 for (i = 0; i < width; i++) {
635 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
636 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
637 }
638
639 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
640}
641
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100642static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
643{
644 char pmlp_pl[MLXSW_REG_PMLP_LEN];
645
646 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
647 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
648 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
649}
650
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200651static int mlxsw_sp_port_open(struct net_device *dev)
652{
653 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
654 int err;
655
656 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
657 if (err)
658 return err;
659 netif_start_queue(dev);
660 return 0;
661}
662
663static int mlxsw_sp_port_stop(struct net_device *dev)
664{
665 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
666
667 netif_stop_queue(dev);
668 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
669}
670
671static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
672 struct net_device *dev)
673{
674 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
675 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
676 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
677 const struct mlxsw_tx_info tx_info = {
678 .local_port = mlxsw_sp_port->local_port,
679 .is_emad = false,
680 };
681 u64 len;
682 int err;
683
Jiri Pirko307c2432016-04-08 19:11:22 +0200684 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200685 return NETDEV_TX_BUSY;
686
687 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
688 struct sk_buff *skb_orig = skb;
689
690 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
691 if (!skb) {
692 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
693 dev_kfree_skb_any(skb_orig);
694 return NETDEV_TX_OK;
695 }
Arkadi Sharshevsky36bf38d2017-01-12 09:10:37 +0100696 dev_consume_skb_any(skb_orig);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200697 }
698
699 if (eth_skb_pad(skb)) {
700 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
701 return NETDEV_TX_OK;
702 }
703
704 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200705 /* TX header is consumed by HW on the way so we shouldn't count its
706 * bytes as being sent.
707 */
708 len = skb->len - MLXSW_TXHDR_LEN;
709
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200710 /* Due to a race we might fail here because of a full queue. In that
711 * unlikely case we simply drop the packet.
712 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200713 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200714
715 if (!err) {
716 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
717 u64_stats_update_begin(&pcpu_stats->syncp);
718 pcpu_stats->tx_packets++;
719 pcpu_stats->tx_bytes += len;
720 u64_stats_update_end(&pcpu_stats->syncp);
721 } else {
722 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
723 dev_kfree_skb_any(skb);
724 }
725 return NETDEV_TX_OK;
726}
727
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100728static void mlxsw_sp_set_rx_mode(struct net_device *dev)
729{
730}
731
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200732static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
733{
734 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
735 struct sockaddr *addr = p;
736 int err;
737
738 if (!is_valid_ether_addr(addr->sa_data))
739 return -EADDRNOTAVAIL;
740
741 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
742 if (err)
743 return err;
744 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
745 return 0;
746}
747
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200748static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200749 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200750{
751 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
752
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200753 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
754 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200755
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200756 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200757 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200758 pg_size + delay, pg_size);
759 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200760 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761}
762
763int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200764 u8 *prio_tc, bool pause_en,
765 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200766{
767 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200768 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
769 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200770 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200771 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200772
773 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
774 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
775 if (err)
776 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200777
778 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
779 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200780 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200781
782 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
783 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200784 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200785 configure = true;
786 break;
787 }
788 }
789
790 if (!configure)
791 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200792 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200793 }
794
Ido Schimmelff6551e2016-04-06 17:10:03 +0200795 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
796}
797
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200798static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200799 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200800{
801 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
802 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200803 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200804 u8 *prio_tc;
805
806 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200807 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200808
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200809 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200810 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200811}
812
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200813static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
814{
815 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200816 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200817 int err;
818
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200819 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200820 if (err)
821 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200822 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
823 if (err)
824 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200825 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
826 if (err)
827 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200828 dev->mtu = mtu;
829 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200830
831err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200832 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
833err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200834 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200835 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200836}
837
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300838static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200839mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
840 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200841{
842 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
843 struct mlxsw_sp_port_pcpu_stats *p;
844 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
845 u32 tx_dropped = 0;
846 unsigned int start;
847 int i;
848
849 for_each_possible_cpu(i) {
850 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
851 do {
852 start = u64_stats_fetch_begin_irq(&p->syncp);
853 rx_packets = p->rx_packets;
854 rx_bytes = p->rx_bytes;
855 tx_packets = p->tx_packets;
856 tx_bytes = p->tx_bytes;
857 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
858
859 stats->rx_packets += rx_packets;
860 stats->rx_bytes += rx_bytes;
861 stats->tx_packets += tx_packets;
862 stats->tx_bytes += tx_bytes;
863 /* tx_dropped is u32, updated without syncp protection. */
864 tx_dropped += p->tx_dropped;
865 }
866 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200867 return 0;
868}
869
Or Gerlitz3df5b3c2016-11-22 23:09:54 +0200870static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200871{
872 switch (attr_id) {
873 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
874 return true;
875 }
876
877 return false;
878}
879
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300880static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
881 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200882{
883 switch (attr_id) {
884 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
885 return mlxsw_sp_port_get_sw_stats64(dev, sp);
886 }
887
888 return -EINVAL;
889}
890
891static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
892 int prio, char *ppcnt_pl)
893{
894 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
895 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
896
897 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
898 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
899}
900
901static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
902 struct rtnl_link_stats64 *stats)
903{
904 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
905 int err;
906
907 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
908 0, ppcnt_pl);
909 if (err)
910 goto out;
911
912 stats->tx_packets =
913 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
914 stats->rx_packets =
915 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
916 stats->tx_bytes =
917 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
918 stats->rx_bytes =
919 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
920 stats->multicast =
921 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
922
923 stats->rx_crc_errors =
924 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
925 stats->rx_frame_errors =
926 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
927
928 stats->rx_length_errors = (
929 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
930 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
931 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
932
933 stats->rx_errors = (stats->rx_crc_errors +
934 stats->rx_frame_errors + stats->rx_length_errors);
935
936out:
937 return err;
938}
939
940static void update_stats_cache(struct work_struct *work)
941{
942 struct mlxsw_sp_port *mlxsw_sp_port =
943 container_of(work, struct mlxsw_sp_port,
944 hw_stats.update_dw.work);
945
946 if (!netif_carrier_ok(mlxsw_sp_port->dev))
947 goto out;
948
949 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
950 mlxsw_sp_port->hw_stats.cache);
951
952out:
953 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
954 MLXSW_HW_STATS_UPDATE_TIME);
955}
956
957/* Return the stats from a cache that is updated periodically,
958 * as this function might get called in an atomic context.
959 */
stephen hemmingerbc1f4472017-01-06 19:12:52 -0800960static void
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200961mlxsw_sp_port_get_stats64(struct net_device *dev,
962 struct rtnl_link_stats64 *stats)
963{
964 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
965
966 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200967}
968
969int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
970 u16 vid_end, bool is_member, bool untagged)
971{
972 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
973 char *spvm_pl;
974 int err;
975
976 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
977 if (!spvm_pl)
978 return -ENOMEM;
979
980 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
981 vid_end, is_member, untagged);
982 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
983 kfree(spvm_pl);
984 return err;
985}
986
987static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
988{
989 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
990 u16 vid, last_visited_vid;
991 int err;
992
993 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
994 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
995 vid);
996 if (err) {
997 last_visited_vid = vid;
998 goto err_port_vid_to_fid_set;
999 }
1000 }
1001
1002 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
1003 if (err) {
1004 last_visited_vid = VLAN_N_VID;
1005 goto err_port_vid_to_fid_set;
1006 }
1007
1008 return 0;
1009
1010err_port_vid_to_fid_set:
1011 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1012 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1013 vid);
1014 return err;
1015}
1016
1017static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1018{
1019 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1020 u16 vid;
1021 int err;
1022
1023 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1024 if (err)
1025 return err;
1026
1027 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1028 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1029 vid, vid);
1030 if (err)
1031 return err;
1032 }
1033
1034 return 0;
1035}
1036
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001037static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001038mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001039{
1040 struct mlxsw_sp_port *mlxsw_sp_vport;
1041
1042 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1043 if (!mlxsw_sp_vport)
1044 return NULL;
1045
1046 /* dev will be set correctly after the VLAN device is linked
1047 * with the real device. In case of bridge SELF invocation, dev
1048 * will remain as is.
1049 */
1050 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1051 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1052 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1053 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001054 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1055 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001056 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001057
1058 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1059
1060 return mlxsw_sp_vport;
1061}
1062
1063static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1064{
1065 list_del(&mlxsw_sp_vport->vport.list);
1066 kfree(mlxsw_sp_vport);
1067}
1068
Ido Schimmel05978482016-08-17 16:39:30 +02001069static int mlxsw_sp_port_add_vid(struct net_device *dev,
1070 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001071{
1072 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001073 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001074 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001075 int err;
1076
1077 /* VLAN 0 is added to HW filter when device goes up, but it is
1078 * reserved in our case, so simply return.
1079 */
1080 if (!vid)
1081 return 0;
1082
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001083 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001084 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001085
Ido Schimmel0355b592016-06-20 23:04:13 +02001086 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001087 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001088 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001089
1090 /* When adding the first VLAN interface on a bridged port we need to
1091 * transition all the active 802.1Q bridge VLANs to use explicit
1092 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1093 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001094 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001095 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001096 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001097 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001098 }
1099
Ido Schimmel52697a92016-07-02 11:00:09 +02001100 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001101 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001102 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001103
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001104 return 0;
1105
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001106err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001107 if (list_is_singular(&mlxsw_sp_port->vports_list))
1108 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1109err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001110 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001111 return err;
1112}
1113
Ido Schimmel32d863f2016-07-02 11:00:10 +02001114static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1115 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001116{
1117 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001118 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001119 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001120
1121 /* VLAN 0 is removed from HW filter when device goes down, but
1122 * it is reserved in our case, so simply return.
1123 */
1124 if (!vid)
1125 return 0;
1126
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001127 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001128 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001129 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001130
Ido Schimmel7a355832016-08-17 16:39:28 +02001131 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001132
Ido Schimmel1c800752016-06-20 23:04:20 +02001133 /* Drop FID reference. If this was the last reference the
1134 * resources will be freed.
1135 */
1136 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1137 if (f && !WARN_ON(!f->leave))
1138 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001139
1140 /* When removing the last VLAN interface on a bridged port we need to
1141 * transition all active 802.1Q bridge VLANs to use VID to FID
1142 * mappings and set port's mode to VLAN mode.
1143 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001144 if (list_is_singular(&mlxsw_sp_port->vports_list))
1145 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001146
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001147 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1148
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001149 return 0;
1150}
1151
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001152static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1153 size_t len)
1154{
1155 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001156 u8 module = mlxsw_sp_port->mapping.module;
1157 u8 width = mlxsw_sp_port->mapping.width;
1158 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001159 int err;
1160
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001161 if (!mlxsw_sp_port->split)
1162 err = snprintf(name, len, "p%d", module + 1);
1163 else
1164 err = snprintf(name, len, "p%ds%d", module + 1,
1165 lane / width);
1166
1167 if (err >= len)
1168 return -EINVAL;
1169
1170 return 0;
1171}
1172
Yotam Gigi763b4b72016-07-21 12:03:17 +02001173static struct mlxsw_sp_port_mall_tc_entry *
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001174mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1175 unsigned long cookie) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001176 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1177
1178 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1179 if (mall_tc_entry->cookie == cookie)
1180 return mall_tc_entry;
1181
1182 return NULL;
1183}
1184
1185static int
1186mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001187 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001188 const struct tc_action *a,
1189 bool ingress)
1190{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001191 struct net *net = dev_net(mlxsw_sp_port->dev);
1192 enum mlxsw_sp_span_type span_type;
1193 struct mlxsw_sp_port *to_port;
1194 struct net_device *to_dev;
1195 int ifindex;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001196
1197 ifindex = tcf_mirred_ifindex(a);
1198 to_dev = __dev_get_by_index(net, ifindex);
1199 if (!to_dev) {
1200 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1201 return -EINVAL;
1202 }
1203
1204 if (!mlxsw_sp_port_dev_check(to_dev)) {
1205 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
Yotam Gigie915ac62017-01-09 11:25:48 +01001206 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001207 }
1208 to_port = netdev_priv(to_dev);
1209
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001210 mirror->to_local_port = to_port->local_port;
1211 mirror->ingress = ingress;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001212 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001213 return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1214}
Yotam Gigi763b4b72016-07-21 12:03:17 +02001215
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001216static void
1217mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1218 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1219{
1220 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1221 enum mlxsw_sp_span_type span_type;
1222 struct mlxsw_sp_port *to_port;
1223
1224 to_port = mlxsw_sp->ports[mirror->to_local_port];
1225 span_type = mirror->ingress ?
1226 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1227 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001228}
1229
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001230static int
1231mlxsw_sp_port_add_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port,
1232 struct tc_cls_matchall_offload *cls,
1233 const struct tc_action *a,
1234 bool ingress)
1235{
1236 int err;
1237
1238 if (!mlxsw_sp_port->sample)
1239 return -EOPNOTSUPP;
1240 if (rtnl_dereference(mlxsw_sp_port->sample->psample_group)) {
1241 netdev_err(mlxsw_sp_port->dev, "sample already active\n");
1242 return -EEXIST;
1243 }
1244 if (tcf_sample_rate(a) > MLXSW_REG_MPSC_RATE_MAX) {
1245 netdev_err(mlxsw_sp_port->dev, "sample rate not supported\n");
1246 return -EOPNOTSUPP;
1247 }
1248
1249 rcu_assign_pointer(mlxsw_sp_port->sample->psample_group,
1250 tcf_sample_psample_group(a));
1251 mlxsw_sp_port->sample->truncate = tcf_sample_truncate(a);
1252 mlxsw_sp_port->sample->trunc_size = tcf_sample_trunc_size(a);
1253 mlxsw_sp_port->sample->rate = tcf_sample_rate(a);
1254
1255 err = mlxsw_sp_port_sample_set(mlxsw_sp_port, true, tcf_sample_rate(a));
1256 if (err)
1257 goto err_port_sample_set;
1258 return 0;
1259
1260err_port_sample_set:
1261 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1262 return err;
1263}
1264
1265static void
1266mlxsw_sp_port_del_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port)
1267{
1268 if (!mlxsw_sp_port->sample)
1269 return;
1270
1271 mlxsw_sp_port_sample_set(mlxsw_sp_port, false, 1);
1272 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1273}
1274
Yotam Gigi763b4b72016-07-21 12:03:17 +02001275static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1276 __be16 protocol,
1277 struct tc_cls_matchall_offload *cls,
1278 bool ingress)
1279{
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001280 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001281 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001282 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001283 int err;
1284
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001285 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001286 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
Yotam Gigie915ac62017-01-09 11:25:48 +01001287 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001288 }
1289
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001290 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1291 if (!mall_tc_entry)
1292 return -ENOMEM;
1293 mall_tc_entry->cookie = cls->cookie;
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001294
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001295 tcf_exts_to_list(cls->exts, &actions);
1296 a = list_first_entry(&actions, struct tc_action, list);
1297
1298 if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1299 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1300
1301 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1302 mirror = &mall_tc_entry->mirror;
1303 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1304 mirror, a, ingress);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001305 } else if (is_tcf_sample(a) && protocol == htons(ETH_P_ALL)) {
1306 mall_tc_entry->type = MLXSW_SP_PORT_MALL_SAMPLE;
1307 err = mlxsw_sp_port_add_cls_matchall_sample(mlxsw_sp_port, cls,
1308 a, ingress);
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001309 } else {
1310 err = -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001311 }
1312
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001313 if (err)
1314 goto err_add_action;
1315
1316 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001317 return 0;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001318
1319err_add_action:
1320 kfree(mall_tc_entry);
1321 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001322}
1323
1324static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1325 struct tc_cls_matchall_offload *cls)
1326{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001327 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001328
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001329 mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1330 cls->cookie);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001331 if (!mall_tc_entry) {
1332 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1333 return;
1334 }
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001335 list_del(&mall_tc_entry->list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001336
1337 switch (mall_tc_entry->type) {
1338 case MLXSW_SP_PORT_MALL_MIRROR:
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001339 mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1340 &mall_tc_entry->mirror);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001341 break;
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001342 case MLXSW_SP_PORT_MALL_SAMPLE:
1343 mlxsw_sp_port_del_cls_matchall_sample(mlxsw_sp_port);
1344 break;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001345 default:
1346 WARN_ON(1);
1347 }
1348
Yotam Gigi763b4b72016-07-21 12:03:17 +02001349 kfree(mall_tc_entry);
1350}
1351
1352static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1353 __be16 proto, struct tc_to_netdev *tc)
1354{
1355 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1356 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1357
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001358 switch (tc->type) {
1359 case TC_SETUP_MATCHALL:
Yotam Gigi763b4b72016-07-21 12:03:17 +02001360 switch (tc->cls_mall->command) {
1361 case TC_CLSMATCHALL_REPLACE:
1362 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1363 proto,
1364 tc->cls_mall,
1365 ingress);
1366 case TC_CLSMATCHALL_DESTROY:
1367 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1368 tc->cls_mall);
1369 return 0;
1370 default:
1371 return -EINVAL;
1372 }
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001373 case TC_SETUP_CLSFLOWER:
1374 switch (tc->cls_flower->command) {
1375 case TC_CLSFLOWER_REPLACE:
1376 return mlxsw_sp_flower_replace(mlxsw_sp_port, ingress,
1377 proto, tc->cls_flower);
1378 case TC_CLSFLOWER_DESTROY:
1379 mlxsw_sp_flower_destroy(mlxsw_sp_port, ingress,
1380 tc->cls_flower);
1381 return 0;
1382 default:
1383 return -EOPNOTSUPP;
1384 }
Yotam Gigi763b4b72016-07-21 12:03:17 +02001385 }
1386
Yotam Gigie915ac62017-01-09 11:25:48 +01001387 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001388}
1389
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001390static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1391 .ndo_open = mlxsw_sp_port_open,
1392 .ndo_stop = mlxsw_sp_port_stop,
1393 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001394 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001395 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001396 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1397 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1398 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001399 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1400 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001401 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1402 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001403 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1404 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001405 .ndo_fdb_add = switchdev_port_fdb_add,
1406 .ndo_fdb_del = switchdev_port_fdb_del,
1407 .ndo_fdb_dump = switchdev_port_fdb_dump,
1408 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1409 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1410 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001411 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001412};
1413
1414static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1415 struct ethtool_drvinfo *drvinfo)
1416{
1417 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1418 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1419
1420 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1421 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1422 sizeof(drvinfo->version));
1423 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1424 "%d.%d.%d",
1425 mlxsw_sp->bus_info->fw_rev.major,
1426 mlxsw_sp->bus_info->fw_rev.minor,
1427 mlxsw_sp->bus_info->fw_rev.subminor);
1428 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1429 sizeof(drvinfo->bus_info));
1430}
1431
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001432static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1433 struct ethtool_pauseparam *pause)
1434{
1435 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1436
1437 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1438 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1439}
1440
1441static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1442 struct ethtool_pauseparam *pause)
1443{
1444 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1445
1446 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1447 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1448 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1449
1450 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1451 pfcc_pl);
1452}
1453
1454static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1455 struct ethtool_pauseparam *pause)
1456{
1457 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1458 bool pause_en = pause->tx_pause || pause->rx_pause;
1459 int err;
1460
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001461 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1462 netdev_err(dev, "PFC already enabled on port\n");
1463 return -EINVAL;
1464 }
1465
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001466 if (pause->autoneg) {
1467 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1468 return -EINVAL;
1469 }
1470
1471 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1472 if (err) {
1473 netdev_err(dev, "Failed to configure port's headroom\n");
1474 return err;
1475 }
1476
1477 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1478 if (err) {
1479 netdev_err(dev, "Failed to set PAUSE parameters\n");
1480 goto err_port_pause_configure;
1481 }
1482
1483 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1484 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1485
1486 return 0;
1487
1488err_port_pause_configure:
1489 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1490 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1491 return err;
1492}
1493
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001494struct mlxsw_sp_port_hw_stats {
1495 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001496 u64 (*getter)(const char *payload);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001497};
1498
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001499static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001500 {
1501 .str = "a_frames_transmitted_ok",
1502 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1503 },
1504 {
1505 .str = "a_frames_received_ok",
1506 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1507 },
1508 {
1509 .str = "a_frame_check_sequence_errors",
1510 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1511 },
1512 {
1513 .str = "a_alignment_errors",
1514 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1515 },
1516 {
1517 .str = "a_octets_transmitted_ok",
1518 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1519 },
1520 {
1521 .str = "a_octets_received_ok",
1522 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1523 },
1524 {
1525 .str = "a_multicast_frames_xmitted_ok",
1526 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1527 },
1528 {
1529 .str = "a_broadcast_frames_xmitted_ok",
1530 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1531 },
1532 {
1533 .str = "a_multicast_frames_received_ok",
1534 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1535 },
1536 {
1537 .str = "a_broadcast_frames_received_ok",
1538 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1539 },
1540 {
1541 .str = "a_in_range_length_errors",
1542 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1543 },
1544 {
1545 .str = "a_out_of_range_length_field",
1546 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1547 },
1548 {
1549 .str = "a_frame_too_long_errors",
1550 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1551 },
1552 {
1553 .str = "a_symbol_error_during_carrier",
1554 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1555 },
1556 {
1557 .str = "a_mac_control_frames_transmitted",
1558 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1559 },
1560 {
1561 .str = "a_mac_control_frames_received",
1562 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1563 },
1564 {
1565 .str = "a_unsupported_opcodes_received",
1566 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1567 },
1568 {
1569 .str = "a_pause_mac_ctrl_frames_received",
1570 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1571 },
1572 {
1573 .str = "a_pause_mac_ctrl_frames_xmitted",
1574 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1575 },
1576};
1577
1578#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1579
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001580static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1581 {
1582 .str = "rx_octets_prio",
1583 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1584 },
1585 {
1586 .str = "rx_frames_prio",
1587 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1588 },
1589 {
1590 .str = "tx_octets_prio",
1591 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1592 },
1593 {
1594 .str = "tx_frames_prio",
1595 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1596 },
1597 {
1598 .str = "rx_pause_prio",
1599 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1600 },
1601 {
1602 .str = "rx_pause_duration_prio",
1603 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1604 },
1605 {
1606 .str = "tx_pause_prio",
1607 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1608 },
1609 {
1610 .str = "tx_pause_duration_prio",
1611 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1612 },
1613};
1614
1615#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1616
Jiri Pirko412791d2016-10-21 16:07:19 +02001617static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001618{
1619 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1620
1621 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1622}
1623
1624static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1625 {
1626 .str = "tc_transmit_queue_tc",
1627 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1628 },
1629 {
1630 .str = "tc_no_buffer_discard_uc_tc",
1631 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1632 },
1633};
1634
1635#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1636
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001637#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001638 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1639 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001640 IEEE_8021QAZ_MAX_TCS)
1641
1642static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1643{
1644 int i;
1645
1646 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1647 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1648 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1649 *p += ETH_GSTRING_LEN;
1650 }
1651}
1652
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001653static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1654{
1655 int i;
1656
1657 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1658 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1659 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1660 *p += ETH_GSTRING_LEN;
1661 }
1662}
1663
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001664static void mlxsw_sp_port_get_strings(struct net_device *dev,
1665 u32 stringset, u8 *data)
1666{
1667 u8 *p = data;
1668 int i;
1669
1670 switch (stringset) {
1671 case ETH_SS_STATS:
1672 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1673 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1674 ETH_GSTRING_LEN);
1675 p += ETH_GSTRING_LEN;
1676 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001677
1678 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1679 mlxsw_sp_port_get_prio_strings(&p, i);
1680
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001681 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1682 mlxsw_sp_port_get_tc_strings(&p, i);
1683
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001684 break;
1685 }
1686}
1687
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001688static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1689 enum ethtool_phys_id_state state)
1690{
1691 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1692 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1693 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1694 bool active;
1695
1696 switch (state) {
1697 case ETHTOOL_ID_ACTIVE:
1698 active = true;
1699 break;
1700 case ETHTOOL_ID_INACTIVE:
1701 active = false;
1702 break;
1703 default:
1704 return -EOPNOTSUPP;
1705 }
1706
1707 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1708 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1709}
1710
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001711static int
1712mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1713 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1714{
1715 switch (grp) {
1716 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1717 *p_hw_stats = mlxsw_sp_port_hw_stats;
1718 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1719 break;
1720 case MLXSW_REG_PPCNT_PRIO_CNT:
1721 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1722 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1723 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001724 case MLXSW_REG_PPCNT_TC_CNT:
1725 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1726 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1727 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001728 default:
1729 WARN_ON(1);
Yotam Gigie915ac62017-01-09 11:25:48 +01001730 return -EOPNOTSUPP;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001731 }
1732 return 0;
1733}
1734
1735static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1736 enum mlxsw_reg_ppcnt_grp grp, int prio,
1737 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001738{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001739 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001740 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001741 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001742 int err;
1743
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001744 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1745 if (err)
1746 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001747 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001748 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001749 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001750}
1751
1752static void mlxsw_sp_port_get_stats(struct net_device *dev,
1753 struct ethtool_stats *stats, u64 *data)
1754{
1755 int i, data_index = 0;
1756
1757 /* IEEE 802.3 Counters */
1758 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1759 data, data_index);
1760 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1761
1762 /* Per-Priority Counters */
1763 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1764 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1765 data, data_index);
1766 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1767 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001768
1769 /* Per-TC Counters */
1770 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1771 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1772 data, data_index);
1773 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1774 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001775}
1776
1777static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1778{
1779 switch (sset) {
1780 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001781 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001782 default:
1783 return -EOPNOTSUPP;
1784 }
1785}
1786
1787struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001788 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001789 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001790 u32 speed;
1791};
1792
1793static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1794 {
1795 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001796 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1797 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001798 },
1799 {
1800 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1801 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001802 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1803 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001804 },
1805 {
1806 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001807 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1808 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001809 },
1810 {
1811 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1812 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001813 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1814 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001815 },
1816 {
1817 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1818 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1819 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1820 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001821 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1822 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001823 },
1824 {
1825 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001826 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1827 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001828 },
1829 {
1830 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001831 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1832 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001833 },
1834 {
1835 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001836 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1837 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001838 },
1839 {
1840 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001841 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1842 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001843 },
1844 {
1845 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001846 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1847 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001848 },
1849 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001850 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1851 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1852 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001853 },
1854 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001855 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1856 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1857 .speed = SPEED_25000,
1858 },
1859 {
1860 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1861 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1862 .speed = SPEED_25000,
1863 },
1864 {
1865 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1866 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1867 .speed = SPEED_25000,
1868 },
1869 {
1870 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1871 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1872 .speed = SPEED_50000,
1873 },
1874 {
1875 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1876 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1877 .speed = SPEED_50000,
1878 },
1879 {
1880 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1881 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1882 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001883 },
1884 {
1885 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001886 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1887 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001888 },
1889 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001890 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1891 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1892 .speed = SPEED_56000,
1893 },
1894 {
1895 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1896 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1897 .speed = SPEED_56000,
1898 },
1899 {
1900 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1901 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1902 .speed = SPEED_56000,
1903 },
1904 {
1905 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1906 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1907 .speed = SPEED_100000,
1908 },
1909 {
1910 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1911 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1912 .speed = SPEED_100000,
1913 },
1914 {
1915 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1916 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1917 .speed = SPEED_100000,
1918 },
1919 {
1920 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1921 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1922 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001923 },
1924};
1925
1926#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1927
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001928static void
1929mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1930 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001931{
1932 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1933 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1934 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1935 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1936 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1937 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001938 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001939
1940 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1941 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1942 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1943 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1944 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001945 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001946}
1947
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001948static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001949{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001950 int i;
1951
1952 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1953 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001954 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1955 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001956 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001957}
1958
1959static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001960 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001961{
1962 u32 speed = SPEED_UNKNOWN;
1963 u8 duplex = DUPLEX_UNKNOWN;
1964 int i;
1965
1966 if (!carrier_ok)
1967 goto out;
1968
1969 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1970 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1971 speed = mlxsw_sp_port_link_mode[i].speed;
1972 duplex = DUPLEX_FULL;
1973 break;
1974 }
1975 }
1976out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001977 cmd->base.speed = speed;
1978 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001979}
1980
1981static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1982{
1983 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1984 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1985 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1986 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1987 return PORT_FIBRE;
1988
1989 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1990 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1991 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1992 return PORT_DA;
1993
1994 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1995 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1996 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1997 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1998 return PORT_NONE;
1999
2000 return PORT_OTHER;
2001}
2002
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002003static u32
2004mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002005{
2006 u32 ptys_proto = 0;
2007 int i;
2008
2009 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002010 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2011 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002012 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2013 }
2014 return ptys_proto;
2015}
2016
2017static u32 mlxsw_sp_to_ptys_speed(u32 speed)
2018{
2019 u32 ptys_proto = 0;
2020 int i;
2021
2022 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2023 if (speed == mlxsw_sp_port_link_mode[i].speed)
2024 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2025 }
2026 return ptys_proto;
2027}
2028
Ido Schimmel18f1e702016-02-26 17:32:31 +01002029static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
2030{
2031 u32 ptys_proto = 0;
2032 int i;
2033
2034 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2035 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
2036 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2037 }
2038 return ptys_proto;
2039}
2040
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002041static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
2042 struct ethtool_link_ksettings *cmd)
2043{
2044 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
2045 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
2046 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
2047
2048 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
2049 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
2050}
2051
2052static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
2053 struct ethtool_link_ksettings *cmd)
2054{
2055 if (!autoneg)
2056 return;
2057
2058 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
2059 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
2060}
2061
2062static void
2063mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
2064 struct ethtool_link_ksettings *cmd)
2065{
2066 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
2067 return;
2068
2069 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
2070 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
2071}
2072
2073static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
2074 struct ethtool_link_ksettings *cmd)
2075{
2076 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2077 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2078 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2079 char ptys_pl[MLXSW_REG_PTYS_LEN];
2080 u8 autoneg_status;
2081 bool autoneg;
2082 int err;
2083
2084 autoneg = mlxsw_sp_port->link.autoneg;
Elad Raz401c8b42016-10-28 21:35:52 +02002085 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002086 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2087 if (err)
2088 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002089 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2090 &eth_proto_oper);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002091
2092 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2093
2094 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2095
2096 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2097 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2098 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2099
2100 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2101 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2102 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2103 cmd);
2104
2105 return 0;
2106}
2107
2108static int
2109mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2110 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002111{
2112 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2113 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2114 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002115 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002116 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002117 int err;
2118
Elad Raz401c8b42016-10-28 21:35:52 +02002119 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002120 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002121 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002122 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002123 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002124
2125 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2126 eth_proto_new = autoneg ?
2127 mlxsw_sp_to_ptys_advert_link(cmd) :
2128 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002129
2130 eth_proto_new = eth_proto_new & eth_proto_cap;
2131 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002132 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002133 return -EINVAL;
2134 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002135
Elad Raz401c8b42016-10-28 21:35:52 +02002136 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2137 eth_proto_new);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002138 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002139 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002140 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002141
Ido Schimmel6277d462016-07-15 11:14:58 +02002142 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002143 return 0;
2144
Ido Schimmel0c83f882016-09-12 13:26:23 +02002145 mlxsw_sp_port->link.autoneg = autoneg;
2146
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002147 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2148 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002149
2150 return 0;
2151}
2152
2153static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2154 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2155 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002156 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2157 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002158 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002159 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002160 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2161 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002162 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2163 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002164};
2165
Ido Schimmel18f1e702016-02-26 17:32:31 +01002166static int
2167mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2168{
2169 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2170 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2171 char ptys_pl[MLXSW_REG_PTYS_LEN];
2172 u32 eth_proto_admin;
2173
2174 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
Elad Raz401c8b42016-10-28 21:35:52 +02002175 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2176 eth_proto_admin);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002177 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2178}
2179
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002180int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2181 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2182 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002183{
2184 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2185 char qeec_pl[MLXSW_REG_QEEC_LEN];
2186
2187 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2188 next_index);
2189 mlxsw_reg_qeec_de_set(qeec_pl, true);
2190 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2191 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2192 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2193}
2194
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002195int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2196 enum mlxsw_reg_qeec_hr hr, u8 index,
2197 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002198{
2199 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2200 char qeec_pl[MLXSW_REG_QEEC_LEN];
2201
2202 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2203 next_index);
2204 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2205 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2206 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2207}
2208
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002209int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2210 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002211{
2212 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2213 char qtct_pl[MLXSW_REG_QTCT_LEN];
2214
2215 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2216 tclass);
2217 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2218}
2219
2220static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2221{
2222 int err, i;
2223
2224 /* Setup the elements hierarcy, so that each TC is linked to
2225 * one subgroup, which are all member in the same group.
2226 */
2227 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2228 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2229 0);
2230 if (err)
2231 return err;
2232 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2233 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2234 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2235 0, false, 0);
2236 if (err)
2237 return err;
2238 }
2239 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2240 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2241 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2242 false, 0);
2243 if (err)
2244 return err;
2245 }
2246
2247 /* Make sure the max shaper is disabled in all hierarcies that
2248 * support it.
2249 */
2250 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2251 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2252 MLXSW_REG_QEEC_MAS_DIS);
2253 if (err)
2254 return err;
2255 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2256 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2257 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2258 i, 0,
2259 MLXSW_REG_QEEC_MAS_DIS);
2260 if (err)
2261 return err;
2262 }
2263 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2264 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2265 MLXSW_REG_QEEC_HIERARCY_TC,
2266 i, i,
2267 MLXSW_REG_QEEC_MAS_DIS);
2268 if (err)
2269 return err;
2270 }
2271
2272 /* Map all priorities to traffic class 0. */
2273 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2274 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2275 if (err)
2276 return err;
2277 }
2278
2279 return 0;
2280}
2281
Ido Schimmel05978482016-08-17 16:39:30 +02002282static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2283{
2284 mlxsw_sp_port->pvid = 1;
2285
2286 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2287}
2288
2289static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2290{
2291 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2292}
2293
Jiri Pirko67963a32016-10-28 21:35:55 +02002294static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2295 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002296{
2297 struct mlxsw_sp_port *mlxsw_sp_port;
2298 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002299 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002300 int err;
2301
2302 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2303 if (!dev)
2304 return -ENOMEM;
Jiri Pirkof20a91f2016-10-27 15:13:00 +02002305 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002306 mlxsw_sp_port = netdev_priv(dev);
2307 mlxsw_sp_port->dev = dev;
2308 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2309 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002310 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002311 mlxsw_sp_port->mapping.module = module;
2312 mlxsw_sp_port->mapping.width = width;
2313 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002314 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002315 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2316 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2317 if (!mlxsw_sp_port->active_vlans) {
2318 err = -ENOMEM;
2319 goto err_port_active_vlans_alloc;
2320 }
Elad Razfc1273a2016-01-06 13:01:11 +01002321 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2322 if (!mlxsw_sp_port->untagged_vlans) {
2323 err = -ENOMEM;
2324 goto err_port_untagged_vlans_alloc;
2325 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002326 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002327 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002328
2329 mlxsw_sp_port->pcpu_stats =
2330 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2331 if (!mlxsw_sp_port->pcpu_stats) {
2332 err = -ENOMEM;
2333 goto err_alloc_stats;
2334 }
2335
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002336 mlxsw_sp_port->sample = kzalloc(sizeof(*mlxsw_sp_port->sample),
2337 GFP_KERNEL);
2338 if (!mlxsw_sp_port->sample) {
2339 err = -ENOMEM;
2340 goto err_alloc_sample;
2341 }
2342
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002343 mlxsw_sp_port->hw_stats.cache =
2344 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2345
2346 if (!mlxsw_sp_port->hw_stats.cache) {
2347 err = -ENOMEM;
2348 goto err_alloc_hw_stats;
2349 }
2350 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2351 &update_stats_cache);
2352
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002353 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2354 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2355
Ido Schimmel3247ff22016-09-08 08:16:02 +02002356 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2357 if (err) {
2358 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2359 mlxsw_sp_port->local_port);
2360 goto err_port_swid_set;
2361 }
2362
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002363 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2364 if (err) {
2365 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2366 mlxsw_sp_port->local_port);
2367 goto err_dev_addr_init;
2368 }
2369
2370 netif_carrier_off(dev);
2371
2372 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002373 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2374 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002375
Jarod Wilsond894be52016-10-20 13:55:16 -04002376 dev->min_mtu = 0;
2377 dev->max_mtu = ETH_MAX_MTU;
2378
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002379 /* Each packet needs to have a Tx header (metadata) on top all other
2380 * headers.
2381 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002382 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002383
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002384 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2385 if (err) {
2386 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2387 mlxsw_sp_port->local_port);
2388 goto err_port_system_port_mapping_set;
2389 }
2390
Ido Schimmel18f1e702016-02-26 17:32:31 +01002391 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2392 if (err) {
2393 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2394 mlxsw_sp_port->local_port);
2395 goto err_port_speed_by_width_set;
2396 }
2397
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002398 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2399 if (err) {
2400 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2401 mlxsw_sp_port->local_port);
2402 goto err_port_mtu_set;
2403 }
2404
2405 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2406 if (err)
2407 goto err_port_admin_status_set;
2408
2409 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2410 if (err) {
2411 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2412 mlxsw_sp_port->local_port);
2413 goto err_port_buffers_init;
2414 }
2415
Ido Schimmel90183b92016-04-06 17:10:08 +02002416 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2417 if (err) {
2418 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2419 mlxsw_sp_port->local_port);
2420 goto err_port_ets_init;
2421 }
2422
Ido Schimmelf00817d2016-04-06 17:10:09 +02002423 /* ETS and buffers must be initialized before DCB. */
2424 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2425 if (err) {
2426 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2427 mlxsw_sp_port->local_port);
2428 goto err_port_dcb_init;
2429 }
2430
Ido Schimmel05978482016-08-17 16:39:30 +02002431 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2432 if (err) {
2433 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2434 mlxsw_sp_port->local_port);
2435 goto err_port_pvid_vport_create;
2436 }
2437
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002438 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002439 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002440 err = register_netdev(dev);
2441 if (err) {
2442 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2443 mlxsw_sp_port->local_port);
2444 goto err_register_netdev;
2445 }
2446
Elad Razd808c7e2016-10-28 21:35:57 +02002447 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2448 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2449 module);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002450 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002451 return 0;
2452
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002453err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002454 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002455 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002456 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2457err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002458 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002459err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002460err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002461err_port_buffers_init:
2462err_port_admin_status_set:
2463err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002464err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002465err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002466err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002467 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2468err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002469 kfree(mlxsw_sp_port->hw_stats.cache);
2470err_alloc_hw_stats:
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002471 kfree(mlxsw_sp_port->sample);
2472err_alloc_sample:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002473 free_percpu(mlxsw_sp_port->pcpu_stats);
2474err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002475 kfree(mlxsw_sp_port->untagged_vlans);
2476err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002477 kfree(mlxsw_sp_port->active_vlans);
2478err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002479 free_netdev(dev);
2480 return err;
2481}
2482
Jiri Pirko67963a32016-10-28 21:35:55 +02002483static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2484 bool split, u8 module, u8 width, u8 lane)
2485{
2486 int err;
2487
2488 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2489 if (err) {
2490 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2491 local_port);
2492 return err;
2493 }
Ido Schimmel9a60c902016-12-16 19:29:03 +01002494 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split,
Jiri Pirko67963a32016-10-28 21:35:55 +02002495 module, width, lane);
2496 if (err)
2497 goto err_port_create;
2498 return 0;
2499
2500err_port_create:
2501 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2502 return err;
2503}
2504
2505static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002506{
2507 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2508
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002509 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko67963a32016-10-28 21:35:55 +02002510 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002511 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002512 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002513 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002514 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002515 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002516 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2517 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002518 kfree(mlxsw_sp_port->hw_stats.cache);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002519 kfree(mlxsw_sp_port->sample);
Yotam Gigi136f1442017-01-09 11:25:47 +01002520 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002521 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002522 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002523 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002524 free_netdev(mlxsw_sp_port->dev);
2525}
2526
Jiri Pirko67963a32016-10-28 21:35:55 +02002527static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2528{
2529 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2530 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2531}
2532
Jiri Pirkof83e2102016-10-28 21:35:49 +02002533static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2534{
2535 return mlxsw_sp->ports[local_port] != NULL;
2536}
2537
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002538static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2539{
2540 int i;
2541
2542 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002543 if (mlxsw_sp_port_created(mlxsw_sp, i))
2544 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002545 kfree(mlxsw_sp->ports);
2546}
2547
2548static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2549{
Ido Schimmeld664b412016-06-09 09:51:40 +02002550 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002551 size_t alloc_size;
2552 int i;
2553 int err;
2554
2555 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2556 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2557 if (!mlxsw_sp->ports)
2558 return -ENOMEM;
2559
2560 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002561 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002562 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002563 if (err)
2564 goto err_port_module_info_get;
2565 if (!width)
2566 continue;
2567 mlxsw_sp->port_to_module[i] = module;
Jiri Pirko67963a32016-10-28 21:35:55 +02002568 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2569 module, width, lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002570 if (err)
2571 goto err_port_create;
2572 }
2573 return 0;
2574
2575err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002576err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002577 for (i--; i >= 1; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002578 if (mlxsw_sp_port_created(mlxsw_sp, i))
2579 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002580 kfree(mlxsw_sp->ports);
2581 return err;
2582}
2583
Ido Schimmel18f1e702016-02-26 17:32:31 +01002584static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2585{
2586 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2587
2588 return local_port - offset;
2589}
2590
Ido Schimmelbe945352016-06-09 09:51:39 +02002591static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2592 u8 module, unsigned int count)
2593{
2594 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2595 int err, i;
2596
2597 for (i = 0; i < count; i++) {
2598 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2599 width, i * width);
2600 if (err)
2601 goto err_port_module_map;
2602 }
2603
2604 for (i = 0; i < count; i++) {
2605 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2606 if (err)
2607 goto err_port_swid_set;
2608 }
2609
2610 for (i = 0; i < count; i++) {
2611 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002612 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002613 if (err)
2614 goto err_port_create;
2615 }
2616
2617 return 0;
2618
2619err_port_create:
2620 for (i--; i >= 0; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002621 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2622 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmelbe945352016-06-09 09:51:39 +02002623 i = count;
2624err_port_swid_set:
2625 for (i--; i >= 0; i--)
2626 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2627 MLXSW_PORT_SWID_DISABLED_PORT);
2628 i = count;
2629err_port_module_map:
2630 for (i--; i >= 0; i--)
2631 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2632 return err;
2633}
2634
2635static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2636 u8 base_port, unsigned int count)
2637{
2638 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2639 int i;
2640
2641 /* Split by four means we need to re-create two ports, otherwise
2642 * only one.
2643 */
2644 count = count / 2;
2645
2646 for (i = 0; i < count; i++) {
2647 local_port = base_port + i * 2;
2648 module = mlxsw_sp->port_to_module[local_port];
2649
2650 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2651 0);
2652 }
2653
2654 for (i = 0; i < count; i++)
2655 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2656
2657 for (i = 0; i < count; i++) {
2658 local_port = base_port + i * 2;
2659 module = mlxsw_sp->port_to_module[local_port];
2660
2661 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002662 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002663 }
2664}
2665
Jiri Pirkob2f10572016-04-08 19:11:23 +02002666static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2667 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002668{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002669 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002670 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002671 u8 module, cur_width, base_port;
2672 int i;
2673 int err;
2674
2675 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2676 if (!mlxsw_sp_port) {
2677 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2678 local_port);
2679 return -EINVAL;
2680 }
2681
Ido Schimmeld664b412016-06-09 09:51:40 +02002682 module = mlxsw_sp_port->mapping.module;
2683 cur_width = mlxsw_sp_port->mapping.width;
2684
Ido Schimmel18f1e702016-02-26 17:32:31 +01002685 if (count != 2 && count != 4) {
2686 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2687 return -EINVAL;
2688 }
2689
Ido Schimmel18f1e702016-02-26 17:32:31 +01002690 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2691 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2692 return -EINVAL;
2693 }
2694
2695 /* Make sure we have enough slave (even) ports for the split. */
2696 if (count == 2) {
2697 base_port = local_port;
2698 if (mlxsw_sp->ports[base_port + 1]) {
2699 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2700 return -EINVAL;
2701 }
2702 } else {
2703 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2704 if (mlxsw_sp->ports[base_port + 1] ||
2705 mlxsw_sp->ports[base_port + 3]) {
2706 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2707 return -EINVAL;
2708 }
2709 }
2710
2711 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002712 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2713 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002714
Ido Schimmelbe945352016-06-09 09:51:39 +02002715 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2716 if (err) {
2717 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2718 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002719 }
2720
2721 return 0;
2722
Ido Schimmelbe945352016-06-09 09:51:39 +02002723err_port_split_create:
2724 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002725 return err;
2726}
2727
Jiri Pirkob2f10572016-04-08 19:11:23 +02002728static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002729{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002730 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002731 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002732 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002733 unsigned int count;
2734 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002735
2736 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2737 if (!mlxsw_sp_port) {
2738 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2739 local_port);
2740 return -EINVAL;
2741 }
2742
2743 if (!mlxsw_sp_port->split) {
2744 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2745 return -EINVAL;
2746 }
2747
Ido Schimmeld664b412016-06-09 09:51:40 +02002748 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002749 count = cur_width == 1 ? 4 : 2;
2750
2751 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2752
2753 /* Determine which ports to remove. */
2754 if (count == 2 && local_port >= base_port + 2)
2755 base_port = base_port + 2;
2756
2757 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002758 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2759 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002760
Ido Schimmelbe945352016-06-09 09:51:39 +02002761 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002762
2763 return 0;
2764}
2765
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002766static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2767 char *pude_pl, void *priv)
2768{
2769 struct mlxsw_sp *mlxsw_sp = priv;
2770 struct mlxsw_sp_port *mlxsw_sp_port;
2771 enum mlxsw_reg_pude_oper_status status;
2772 u8 local_port;
2773
2774 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2775 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002776 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002777 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002778
2779 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2780 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2781 netdev_info(mlxsw_sp_port->dev, "link up\n");
2782 netif_carrier_on(mlxsw_sp_port->dev);
2783 } else {
2784 netdev_info(mlxsw_sp_port->dev, "link down\n");
2785 netif_carrier_off(mlxsw_sp_port->dev);
2786 }
2787}
2788
Nogah Frankel14eeda92016-11-25 10:33:32 +01002789static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
2790 u8 local_port, void *priv)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002791{
2792 struct mlxsw_sp *mlxsw_sp = priv;
2793 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2794 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2795
2796 if (unlikely(!mlxsw_sp_port)) {
2797 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2798 local_port);
2799 return;
2800 }
2801
2802 skb->dev = mlxsw_sp_port->dev;
2803
2804 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2805 u64_stats_update_begin(&pcpu_stats->syncp);
2806 pcpu_stats->rx_packets++;
2807 pcpu_stats->rx_bytes += skb->len;
2808 u64_stats_update_end(&pcpu_stats->syncp);
2809
2810 skb->protocol = eth_type_trans(skb, skb->dev);
2811 netif_receive_skb(skb);
2812}
2813
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002814static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2815 void *priv)
2816{
2817 skb->offload_fwd_mark = 1;
Nogah Frankel14eeda92016-11-25 10:33:32 +01002818 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002819}
2820
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002821static void mlxsw_sp_rx_listener_sample_func(struct sk_buff *skb, u8 local_port,
2822 void *priv)
2823{
2824 struct mlxsw_sp *mlxsw_sp = priv;
2825 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2826 struct psample_group *psample_group;
2827 u32 size;
2828
2829 if (unlikely(!mlxsw_sp_port)) {
2830 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received for non-existent port\n",
2831 local_port);
2832 goto out;
2833 }
2834 if (unlikely(!mlxsw_sp_port->sample)) {
2835 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received on unsupported port\n",
2836 local_port);
2837 goto out;
2838 }
2839
2840 size = mlxsw_sp_port->sample->truncate ?
2841 mlxsw_sp_port->sample->trunc_size : skb->len;
2842
2843 rcu_read_lock();
2844 psample_group = rcu_dereference(mlxsw_sp_port->sample->psample_group);
2845 if (!psample_group)
2846 goto out_unlock;
2847 psample_sample_packet(psample_group, skb, size,
2848 mlxsw_sp_port->dev->ifindex, 0,
2849 mlxsw_sp_port->sample->rate);
2850out_unlock:
2851 rcu_read_unlock();
2852out:
2853 consume_skb(skb);
2854}
2855
Nogah Frankel117b0da2016-11-25 10:33:44 +01002856#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel0fb78a42016-11-25 10:33:39 +01002857 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002858 _is_ctrl, SP_##_trap_group, DISCARD)
Ido Schimmel93393b32016-08-25 18:42:38 +02002859
Nogah Frankel117b0da2016-11-25 10:33:44 +01002860#define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel14eeda92016-11-25 10:33:32 +01002861 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002862 _is_ctrl, SP_##_trap_group, DISCARD)
2863
2864#define MLXSW_SP_EVENTL(_func, _trap_id) \
2865 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
Nogah Frankel14eeda92016-11-25 10:33:32 +01002866
Nogah Frankel45449132016-11-25 10:33:35 +01002867static const struct mlxsw_listener mlxsw_sp_listener[] = {
2868 /* Events */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002869 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
Nogah Frankelee4a60d2016-11-25 10:33:29 +01002870 /* L2 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002871 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
2872 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
2873 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
2874 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
2875 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
2876 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
2877 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
2878 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
2879 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
2880 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
2881 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
Ido Schimmel93393b32016-08-25 18:42:38 +02002882 /* L3 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002883 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2884 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2885 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2886 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
2887 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
2888 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
2889 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
2890 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002891 /* PKT Sample trap */
2892 MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,
2893 false, SP_IP2ME, DISCARD)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002894};
2895
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002896static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
2897{
2898 char qpcr_pl[MLXSW_REG_QPCR_LEN];
2899 enum mlxsw_reg_qpcr_ir_units ir_units;
2900 int max_cpu_policers;
2901 bool is_bytes;
2902 u8 burst_size;
2903 u32 rate;
2904 int i, err;
2905
2906 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
2907 return -EIO;
2908
2909 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
2910
2911 ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
2912 for (i = 0; i < max_cpu_policers; i++) {
2913 is_bytes = false;
2914 switch (i) {
2915 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2916 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2917 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2918 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2919 rate = 128;
2920 burst_size = 7;
2921 break;
2922 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2923 rate = 16 * 1024;
2924 burst_size = 10;
2925 break;
2926 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2927 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2928 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2929 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2930 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2931 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2932 rate = 1024;
2933 burst_size = 7;
2934 break;
2935 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2936 is_bytes = true;
2937 rate = 4 * 1024;
2938 burst_size = 4;
2939 break;
2940 default:
2941 continue;
2942 }
2943
2944 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
2945 burst_size);
2946 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
2947 if (err)
2948 return err;
2949 }
2950
2951 return 0;
2952}
2953
Nogah Frankel579c82e2016-11-25 10:33:42 +01002954static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002955{
2956 char htgt_pl[MLXSW_REG_HTGT_LEN];
Nogah Frankel117b0da2016-11-25 10:33:44 +01002957 enum mlxsw_reg_htgt_trap_group i;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002958 int max_cpu_policers;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002959 int max_trap_groups;
2960 u8 priority, tc;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002961 u16 policer_id;
Nogah Frankel117b0da2016-11-25 10:33:44 +01002962 int err;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002963
2964 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
2965 return -EIO;
2966
2967 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002968 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
Nogah Frankel579c82e2016-11-25 10:33:42 +01002969
2970 for (i = 0; i < max_trap_groups; i++) {
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002971 policer_id = i;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002972 switch (i) {
Nogah Frankel117b0da2016-11-25 10:33:44 +01002973 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2974 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2975 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2976 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2977 priority = 5;
2978 tc = 5;
2979 break;
2980 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2981 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2982 priority = 4;
2983 tc = 4;
2984 break;
2985 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2986 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2987 priority = 3;
2988 tc = 3;
2989 break;
2990 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2991 priority = 2;
2992 tc = 2;
2993 break;
2994 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2995 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2996 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2997 priority = 1;
2998 tc = 1;
2999 break;
3000 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
Nogah Frankel579c82e2016-11-25 10:33:42 +01003001 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
3002 tc = MLXSW_REG_HTGT_DEFAULT_TC;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003003 policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003004 break;
3005 default:
3006 continue;
3007 }
Nogah Frankel117b0da2016-11-25 10:33:44 +01003008
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003009 if (max_cpu_policers <= policer_id &&
3010 policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
3011 return -EIO;
3012
3013 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
Nogah Frankel579c82e2016-11-25 10:33:42 +01003014 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3015 if (err)
3016 return err;
3017 }
3018
3019 return 0;
3020}
3021
3022static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
3023{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003024 int i;
3025 int err;
3026
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003027 err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
3028 if (err)
3029 return err;
3030
Nogah Frankel579c82e2016-11-25 10:33:42 +01003031 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003032 if (err)
3033 return err;
3034
Nogah Frankel45449132016-11-25 10:33:35 +01003035 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003036 err = mlxsw_core_trap_register(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003037 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003038 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003039 if (err)
Nogah Frankel45449132016-11-25 10:33:35 +01003040 goto err_listener_register;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003041
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003042 }
3043 return 0;
3044
Nogah Frankel45449132016-11-25 10:33:35 +01003045err_listener_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003046 for (i--; i >= 0; i--) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003047 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003048 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003049 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003050 }
3051 return err;
3052}
3053
3054static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
3055{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003056 int i;
3057
Nogah Frankel45449132016-11-25 10:33:35 +01003058 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003059 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003060 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003061 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003062 }
3063}
3064
3065static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
3066 enum mlxsw_reg_sfgc_type type,
3067 enum mlxsw_reg_sfgc_bridge_type bridge_type)
3068{
3069 enum mlxsw_flood_table_type table_type;
3070 enum mlxsw_sp_flood_table flood_table;
3071 char sfgc_pl[MLXSW_REG_SFGC_LEN];
3072
Ido Schimmel19ae6122015-12-15 16:03:39 +01003073 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003074 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003075 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003076 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003077
3078 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
3079 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
3080 else
3081 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003082
3083 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
3084 flood_table);
3085 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
3086}
3087
3088static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
3089{
3090 int type, err;
3091
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003092 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
3093 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
3094 continue;
3095
3096 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3097 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
3098 if (err)
3099 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003100
3101 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3102 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
3103 if (err)
3104 return err;
3105 }
3106
3107 return 0;
3108}
3109
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003110static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
3111{
3112 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003113 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003114
3115 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
3116 MLXSW_REG_SLCR_LAG_HASH_DMAC |
3117 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
3118 MLXSW_REG_SLCR_LAG_HASH_VLANID |
3119 MLXSW_REG_SLCR_LAG_HASH_SIP |
3120 MLXSW_REG_SLCR_LAG_HASH_DIP |
3121 MLXSW_REG_SLCR_LAG_HASH_SPORT |
3122 MLXSW_REG_SLCR_LAG_HASH_DPORT |
3123 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003124 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3125 if (err)
3126 return err;
3127
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003128 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3129 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003130 return -EIO;
3131
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003132 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003133 sizeof(struct mlxsw_sp_upper),
3134 GFP_KERNEL);
3135 if (!mlxsw_sp->lags)
3136 return -ENOMEM;
3137
3138 return 0;
3139}
3140
3141static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3142{
3143 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003144}
3145
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003146static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3147{
3148 char htgt_pl[MLXSW_REG_HTGT_LEN];
3149
Nogah Frankel579c82e2016-11-25 10:33:42 +01003150 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3151 MLXSW_REG_HTGT_INVALID_POLICER,
3152 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3153 MLXSW_REG_HTGT_DEFAULT_TC);
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003154 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3155}
3156
Jiri Pirkob2f10572016-04-08 19:11:23 +02003157static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003158 const struct mlxsw_bus_info *mlxsw_bus_info)
3159{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003160 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003161 int err;
3162
3163 mlxsw_sp->core = mlxsw_core;
3164 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02003165 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003166 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01003167 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003168
3169 err = mlxsw_sp_base_mac_get(mlxsw_sp);
3170 if (err) {
3171 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3172 return err;
3173 }
3174
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003175 err = mlxsw_sp_traps_init(mlxsw_sp);
3176 if (err) {
Nogah Frankel45449132016-11-25 10:33:35 +01003177 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3178 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003179 }
3180
3181 err = mlxsw_sp_flood_init(mlxsw_sp);
3182 if (err) {
3183 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
3184 goto err_flood_init;
3185 }
3186
3187 err = mlxsw_sp_buffers_init(mlxsw_sp);
3188 if (err) {
3189 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3190 goto err_buffers_init;
3191 }
3192
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003193 err = mlxsw_sp_lag_init(mlxsw_sp);
3194 if (err) {
3195 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3196 goto err_lag_init;
3197 }
3198
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003199 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3200 if (err) {
3201 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3202 goto err_switchdev_init;
3203 }
3204
Ido Schimmel464dce12016-07-02 11:00:15 +02003205 err = mlxsw_sp_router_init(mlxsw_sp);
3206 if (err) {
3207 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3208 goto err_router_init;
3209 }
3210
Yotam Gigi763b4b72016-07-21 12:03:17 +02003211 err = mlxsw_sp_span_init(mlxsw_sp);
3212 if (err) {
3213 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3214 goto err_span_init;
3215 }
3216
Jiri Pirko22a67762017-02-03 10:29:07 +01003217 err = mlxsw_sp_acl_init(mlxsw_sp);
3218 if (err) {
3219 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL\n");
3220 goto err_acl_init;
3221 }
3222
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003223 err = mlxsw_sp_ports_create(mlxsw_sp);
3224 if (err) {
3225 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3226 goto err_ports_create;
3227 }
3228
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003229 return 0;
3230
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003231err_ports_create:
Jiri Pirko22a67762017-02-03 10:29:07 +01003232 mlxsw_sp_acl_fini(mlxsw_sp);
3233err_acl_init:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003234 mlxsw_sp_span_fini(mlxsw_sp);
3235err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003236 mlxsw_sp_router_fini(mlxsw_sp);
3237err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003238 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003239err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003240 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003241err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003242 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003243err_buffers_init:
3244err_flood_init:
3245 mlxsw_sp_traps_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003246 return err;
3247}
3248
Jiri Pirkob2f10572016-04-08 19:11:23 +02003249static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003250{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003251 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003252
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003253 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko22a67762017-02-03 10:29:07 +01003254 mlxsw_sp_acl_fini(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003255 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003256 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003257 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003258 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003259 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003260 mlxsw_sp_traps_fini(mlxsw_sp);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003261 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003262 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003263}
3264
3265static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3266 .used_max_vepa_channels = 1,
3267 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003268 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003269 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003270 .used_max_pgt = 1,
3271 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003272 .used_flood_tables = 1,
3273 .used_flood_mode = 1,
3274 .flood_mode = 3,
3275 .max_fid_offset_flood_tables = 2,
3276 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003277 .max_fid_flood_tables = 2,
3278 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003279 .used_max_ib_mc = 1,
3280 .max_ib_mc = 0,
3281 .used_max_pkey = 1,
3282 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003283 .used_kvd_split_data = 1,
3284 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3285 .kvd_hash_single_parts = 2,
3286 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003287 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003288 .swid_config = {
3289 {
3290 .used_type = 1,
3291 .type = MLXSW_PORT_SWID_TYPE_ETH,
3292 }
3293 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003294 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003295};
3296
3297static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003298 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003299 .priv_size = sizeof(struct mlxsw_sp),
3300 .init = mlxsw_sp_init,
3301 .fini = mlxsw_sp_fini,
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003302 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003303 .port_split = mlxsw_sp_port_split,
3304 .port_unsplit = mlxsw_sp_port_unsplit,
3305 .sb_pool_get = mlxsw_sp_sb_pool_get,
3306 .sb_pool_set = mlxsw_sp_sb_pool_set,
3307 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3308 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3309 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3310 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3311 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3312 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3313 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3314 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3315 .txhdr_construct = mlxsw_sp_txhdr_construct,
3316 .txhdr_len = MLXSW_TXHDR_LEN,
3317 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003318};
3319
Jiri Pirko22a67762017-02-03 10:29:07 +01003320bool mlxsw_sp_port_dev_check(const struct net_device *dev)
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003321{
3322 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3323}
3324
David Aherndd823642016-10-17 19:15:49 -07003325static int mlxsw_lower_dev_walk(struct net_device *lower_dev, void *data)
3326{
3327 struct mlxsw_sp_port **port = data;
3328 int ret = 0;
3329
3330 if (mlxsw_sp_port_dev_check(lower_dev)) {
3331 *port = netdev_priv(lower_dev);
3332 ret = 1;
3333 }
3334
3335 return ret;
3336}
3337
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003338static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3339{
David Aherndd823642016-10-17 19:15:49 -07003340 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003341
3342 if (mlxsw_sp_port_dev_check(dev))
3343 return netdev_priv(dev);
3344
David Aherndd823642016-10-17 19:15:49 -07003345 port = NULL;
3346 netdev_walk_all_lower_dev(dev, mlxsw_lower_dev_walk, &port);
3347
3348 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003349}
3350
3351static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3352{
3353 struct mlxsw_sp_port *mlxsw_sp_port;
3354
3355 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3356 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3357}
3358
3359static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3360{
David Aherndd823642016-10-17 19:15:49 -07003361 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003362
3363 if (mlxsw_sp_port_dev_check(dev))
3364 return netdev_priv(dev);
3365
David Aherndd823642016-10-17 19:15:49 -07003366 port = NULL;
3367 netdev_walk_all_lower_dev_rcu(dev, mlxsw_lower_dev_walk, &port);
3368
3369 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003370}
3371
3372struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3373{
3374 struct mlxsw_sp_port *mlxsw_sp_port;
3375
3376 rcu_read_lock();
3377 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3378 if (mlxsw_sp_port)
3379 dev_hold(mlxsw_sp_port->dev);
3380 rcu_read_unlock();
3381 return mlxsw_sp_port;
3382}
3383
3384void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3385{
3386 dev_put(mlxsw_sp_port->dev);
3387}
3388
Ido Schimmel99724c12016-07-04 08:23:14 +02003389static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3390 unsigned long event)
3391{
3392 switch (event) {
3393 case NETDEV_UP:
3394 if (!r)
3395 return true;
3396 r->ref_count++;
3397 return false;
3398 case NETDEV_DOWN:
3399 if (r && --r->ref_count == 0)
3400 return true;
3401 /* It is possible we already removed the RIF ourselves
3402 * if it was assigned to a netdev that is now a bridge
3403 * or LAG slave.
3404 */
3405 return false;
3406 }
3407
3408 return false;
3409}
3410
3411static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3412{
3413 int i;
3414
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003415 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
Ido Schimmel99724c12016-07-04 08:23:14 +02003416 if (!mlxsw_sp->rifs[i])
3417 return i;
3418
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003419 return MLXSW_SP_INVALID_RIF;
Ido Schimmel99724c12016-07-04 08:23:14 +02003420}
3421
3422static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3423 bool *p_lagged, u16 *p_system_port)
3424{
3425 u8 local_port = mlxsw_sp_vport->local_port;
3426
3427 *p_lagged = mlxsw_sp_vport->lagged;
3428 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3429}
3430
3431static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3432 struct net_device *l3_dev, u16 rif,
3433 bool create)
3434{
3435 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3436 bool lagged = mlxsw_sp_vport->lagged;
3437 char ritr_pl[MLXSW_REG_RITR_LEN];
3438 u16 system_port;
3439
3440 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3441 l3_dev->mtu, l3_dev->dev_addr);
3442
3443 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3444 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3445 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3446
3447 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3448}
3449
3450static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3451
3452static struct mlxsw_sp_fid *
3453mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3454{
3455 struct mlxsw_sp_fid *f;
3456
3457 f = kzalloc(sizeof(*f), GFP_KERNEL);
3458 if (!f)
3459 return NULL;
3460
3461 f->leave = mlxsw_sp_vport_rif_sp_leave;
3462 f->ref_count = 0;
3463 f->dev = l3_dev;
3464 f->fid = fid;
3465
3466 return f;
3467}
3468
3469static struct mlxsw_sp_rif *
3470mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3471{
3472 struct mlxsw_sp_rif *r;
3473
3474 r = kzalloc(sizeof(*r), GFP_KERNEL);
3475 if (!r)
3476 return NULL;
3477
3478 ether_addr_copy(r->addr, l3_dev->dev_addr);
3479 r->mtu = l3_dev->mtu;
3480 r->ref_count = 1;
3481 r->dev = l3_dev;
3482 r->rif = rif;
3483 r->f = f;
3484
3485 return r;
3486}
3487
3488static struct mlxsw_sp_rif *
3489mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3490 struct net_device *l3_dev)
3491{
3492 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3493 struct mlxsw_sp_fid *f;
3494 struct mlxsw_sp_rif *r;
3495 u16 fid, rif;
3496 int err;
3497
3498 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003499 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99724c12016-07-04 08:23:14 +02003500 return ERR_PTR(-ERANGE);
3501
3502 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3503 if (err)
3504 return ERR_PTR(err);
3505
3506 fid = mlxsw_sp_rif_sp_to_fid(rif);
3507 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3508 if (err)
3509 goto err_rif_fdb_op;
3510
3511 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3512 if (!f) {
3513 err = -ENOMEM;
3514 goto err_rfid_alloc;
3515 }
3516
3517 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3518 if (!r) {
3519 err = -ENOMEM;
3520 goto err_rif_alloc;
3521 }
3522
3523 f->r = r;
3524 mlxsw_sp->rifs[rif] = r;
3525
3526 return r;
3527
3528err_rif_alloc:
3529 kfree(f);
3530err_rfid_alloc:
3531 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3532err_rif_fdb_op:
3533 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3534 return ERR_PTR(err);
3535}
3536
3537static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3538 struct mlxsw_sp_rif *r)
3539{
3540 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3541 struct net_device *l3_dev = r->dev;
3542 struct mlxsw_sp_fid *f = r->f;
3543 u16 fid = f->fid;
3544 u16 rif = r->rif;
3545
3546 mlxsw_sp->rifs[rif] = NULL;
3547 f->r = NULL;
3548
3549 kfree(r);
3550
3551 kfree(f);
3552
3553 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3554
3555 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3556}
3557
3558static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3559 struct net_device *l3_dev)
3560{
3561 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3562 struct mlxsw_sp_rif *r;
3563
3564 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3565 if (!r) {
3566 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3567 if (IS_ERR(r))
3568 return PTR_ERR(r);
3569 }
3570
3571 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3572 r->f->ref_count++;
3573
3574 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3575
3576 return 0;
3577}
3578
3579static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3580{
3581 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3582
3583 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3584
3585 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3586 if (--f->ref_count == 0)
3587 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3588}
3589
3590static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3591 struct net_device *port_dev,
3592 unsigned long event, u16 vid)
3593{
3594 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3595 struct mlxsw_sp_port *mlxsw_sp_vport;
3596
3597 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3598 if (WARN_ON(!mlxsw_sp_vport))
3599 return -EINVAL;
3600
3601 switch (event) {
3602 case NETDEV_UP:
3603 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3604 case NETDEV_DOWN:
3605 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3606 break;
3607 }
3608
3609 return 0;
3610}
3611
3612static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3613 unsigned long event)
3614{
3615 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3616 return 0;
3617
3618 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3619}
3620
3621static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3622 struct net_device *lag_dev,
3623 unsigned long event, u16 vid)
3624{
3625 struct net_device *port_dev;
3626 struct list_head *iter;
3627 int err;
3628
3629 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3630 if (mlxsw_sp_port_dev_check(port_dev)) {
3631 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3632 event, vid);
3633 if (err)
3634 return err;
3635 }
3636 }
3637
3638 return 0;
3639}
3640
3641static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3642 unsigned long event)
3643{
3644 if (netif_is_bridge_port(lag_dev))
3645 return 0;
3646
3647 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3648}
3649
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003650static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3651 struct net_device *l3_dev)
3652{
3653 u16 fid;
3654
3655 if (is_vlan_dev(l3_dev))
3656 fid = vlan_dev_vlan_id(l3_dev);
3657 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3658 fid = 1;
3659 else
3660 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3661
3662 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3663}
3664
Ido Schimmelf888f582016-08-24 11:18:51 +02003665static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3666{
3667 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3668 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3669}
3670
3671static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3672{
3673 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3674}
3675
3676static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3677 bool set)
3678{
3679 enum mlxsw_flood_table_type table_type;
3680 char *sftr_pl;
3681 u16 index;
3682 int err;
3683
3684 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3685 if (!sftr_pl)
3686 return -ENOMEM;
3687
3688 table_type = mlxsw_sp_flood_table_type_get(fid);
3689 index = mlxsw_sp_flood_table_index_get(fid);
3690 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3691 1, MLXSW_PORT_ROUTER_PORT, set);
3692 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3693
3694 kfree(sftr_pl);
3695 return err;
3696}
3697
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003698static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3699{
3700 if (mlxsw_sp_fid_is_vfid(fid))
3701 return MLXSW_REG_RITR_FID_IF;
3702 else
3703 return MLXSW_REG_RITR_VLAN_IF;
3704}
3705
3706static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3707 struct net_device *l3_dev,
3708 u16 fid, u16 rif,
3709 bool create)
3710{
3711 enum mlxsw_reg_ritr_if_type rif_type;
3712 char ritr_pl[MLXSW_REG_RITR_LEN];
3713
3714 rif_type = mlxsw_sp_rif_type_get(fid);
3715 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3716 l3_dev->dev_addr);
3717 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3718
3719 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3720}
3721
3722static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3723 struct net_device *l3_dev,
3724 struct mlxsw_sp_fid *f)
3725{
3726 struct mlxsw_sp_rif *r;
3727 u16 rif;
3728 int err;
3729
3730 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003731 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003732 return -ERANGE;
3733
Ido Schimmelf888f582016-08-24 11:18:51 +02003734 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003735 if (err)
3736 return err;
3737
Ido Schimmelf888f582016-08-24 11:18:51 +02003738 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3739 if (err)
3740 goto err_rif_bridge_op;
3741
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003742 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3743 if (err)
3744 goto err_rif_fdb_op;
3745
3746 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3747 if (!r) {
3748 err = -ENOMEM;
3749 goto err_rif_alloc;
3750 }
3751
3752 f->r = r;
3753 mlxsw_sp->rifs[rif] = r;
3754
3755 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3756
3757 return 0;
3758
3759err_rif_alloc:
3760 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3761err_rif_fdb_op:
3762 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003763err_rif_bridge_op:
3764 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003765 return err;
3766}
3767
3768void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3769 struct mlxsw_sp_rif *r)
3770{
3771 struct net_device *l3_dev = r->dev;
3772 struct mlxsw_sp_fid *f = r->f;
3773 u16 rif = r->rif;
3774
3775 mlxsw_sp->rifs[rif] = NULL;
3776 f->r = NULL;
3777
3778 kfree(r);
3779
3780 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3781
3782 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3783
Ido Schimmelf888f582016-08-24 11:18:51 +02003784 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3785
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003786 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3787}
3788
3789static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3790 struct net_device *br_dev,
3791 unsigned long event)
3792{
3793 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3794 struct mlxsw_sp_fid *f;
3795
3796 /* FID can either be an actual FID if the L3 device is the
3797 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3798 * L3 device is a VLAN-unaware bridge and we get a vFID.
3799 */
3800 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3801 if (WARN_ON(!f))
3802 return -EINVAL;
3803
3804 switch (event) {
3805 case NETDEV_UP:
3806 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3807 case NETDEV_DOWN:
3808 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3809 break;
3810 }
3811
3812 return 0;
3813}
3814
Ido Schimmel99724c12016-07-04 08:23:14 +02003815static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3816 unsigned long event)
3817{
3818 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003819 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003820 u16 vid = vlan_dev_vlan_id(vlan_dev);
3821
3822 if (mlxsw_sp_port_dev_check(real_dev))
3823 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3824 vid);
3825 else if (netif_is_lag_master(real_dev))
3826 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3827 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003828 else if (netif_is_bridge_master(real_dev) &&
3829 mlxsw_sp->master_bridge.dev == real_dev)
3830 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3831 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003832
3833 return 0;
3834}
3835
3836static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3837 unsigned long event, void *ptr)
3838{
3839 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3840 struct net_device *dev = ifa->ifa_dev->dev;
3841 struct mlxsw_sp *mlxsw_sp;
3842 struct mlxsw_sp_rif *r;
3843 int err = 0;
3844
3845 mlxsw_sp = mlxsw_sp_lower_get(dev);
3846 if (!mlxsw_sp)
3847 goto out;
3848
3849 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3850 if (!mlxsw_sp_rif_should_config(r, event))
3851 goto out;
3852
3853 if (mlxsw_sp_port_dev_check(dev))
3854 err = mlxsw_sp_inetaddr_port_event(dev, event);
3855 else if (netif_is_lag_master(dev))
3856 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003857 else if (netif_is_bridge_master(dev))
3858 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003859 else if (is_vlan_dev(dev))
3860 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3861
3862out:
3863 return notifier_from_errno(err);
3864}
3865
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003866static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3867 const char *mac, int mtu)
3868{
3869 char ritr_pl[MLXSW_REG_RITR_LEN];
3870 int err;
3871
3872 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3873 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3874 if (err)
3875 return err;
3876
3877 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3878 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3879 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3880 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3881}
3882
3883static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3884{
3885 struct mlxsw_sp *mlxsw_sp;
3886 struct mlxsw_sp_rif *r;
3887 int err;
3888
3889 mlxsw_sp = mlxsw_sp_lower_get(dev);
3890 if (!mlxsw_sp)
3891 return 0;
3892
3893 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3894 if (!r)
3895 return 0;
3896
3897 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3898 if (err)
3899 return err;
3900
3901 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3902 if (err)
3903 goto err_rif_edit;
3904
3905 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3906 if (err)
3907 goto err_rif_fdb_op;
3908
3909 ether_addr_copy(r->addr, dev->dev_addr);
3910 r->mtu = dev->mtu;
3911
3912 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3913
3914 return 0;
3915
3916err_rif_fdb_op:
3917 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3918err_rif_edit:
3919 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3920 return err;
3921}
3922
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003923static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3924 u16 fid)
3925{
3926 if (mlxsw_sp_fid_is_vfid(fid))
3927 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3928 else
3929 return test_bit(fid, lag_port->active_vlans);
3930}
3931
3932static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3933 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003934{
3935 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003936 u8 local_port = mlxsw_sp_port->local_port;
3937 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003938 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003939 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003940
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003941 if (!mlxsw_sp_port->lagged)
3942 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003943
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003944 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3945 MAX_LAG_MEMBERS);
3946 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003947 struct mlxsw_sp_port *lag_port;
3948
3949 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3950 if (!lag_port || lag_port->local_port == local_port)
3951 continue;
3952 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3953 count++;
3954 }
3955
3956 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003957}
3958
3959static int
3960mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3961 u16 fid)
3962{
3963 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3964 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3965
3966 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3967 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3968 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3969 mlxsw_sp_port->local_port);
3970
Ido Schimmel22305372016-06-20 23:04:21 +02003971 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3972 mlxsw_sp_port->local_port, fid);
3973
Ido Schimmel039c49a2016-01-27 15:20:18 +01003974 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3975}
3976
3977static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003978mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3979 u16 fid)
3980{
3981 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3982 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3983
3984 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3985 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3986 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3987
Ido Schimmel22305372016-06-20 23:04:21 +02003988 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3989 mlxsw_sp_port->lag_id, fid);
3990
Ido Schimmel039c49a2016-01-27 15:20:18 +01003991 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3992}
3993
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003994int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003995{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003996 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3997 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003998
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003999 if (mlxsw_sp_port->lagged)
4000 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01004001 fid);
4002 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004003 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01004004}
4005
Ido Schimmel701b1862016-07-04 08:23:16 +02004006static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
4007{
4008 struct mlxsw_sp_fid *f, *tmp;
4009
4010 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
4011 if (--f->ref_count == 0)
4012 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4013 else
4014 WARN_ON_ONCE(1);
4015}
4016
Ido Schimmel7117a572016-06-20 23:04:06 +02004017static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
4018 struct net_device *br_dev)
4019{
4020 return !mlxsw_sp->master_bridge.dev ||
4021 mlxsw_sp->master_bridge.dev == br_dev;
4022}
4023
4024static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
4025 struct net_device *br_dev)
4026{
4027 mlxsw_sp->master_bridge.dev = br_dev;
4028 mlxsw_sp->master_bridge.ref_count++;
4029}
4030
4031static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
4032{
Ido Schimmel701b1862016-07-04 08:23:16 +02004033 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004034 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02004035 /* It's possible upper VLAN devices are still holding
4036 * references to underlying FIDs. Drop the reference
4037 * and release the resources if it was the last one.
4038 * If it wasn't, then something bad happened.
4039 */
4040 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
4041 }
Ido Schimmel7117a572016-06-20 23:04:06 +02004042}
4043
4044static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
4045 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004046{
4047 struct net_device *dev = mlxsw_sp_port->dev;
4048 int err;
4049
4050 /* When port is not bridged untagged packets are tagged with
4051 * PVID=VID=1, thereby creating an implicit VLAN interface in
4052 * the device. Remove it and let bridge code take care of its
4053 * own VLANs.
4054 */
4055 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004056 if (err)
4057 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004058
Ido Schimmel7117a572016-06-20 23:04:06 +02004059 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
4060
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004061 mlxsw_sp_port->learning = 1;
4062 mlxsw_sp_port->learning_sync = 1;
4063 mlxsw_sp_port->uc_flood = 1;
4064 mlxsw_sp_port->bridged = 1;
4065
4066 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004067}
4068
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004069static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004070{
4071 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01004072
Ido Schimmel28a01d22016-02-18 11:30:02 +01004073 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
4074
Ido Schimmel7117a572016-06-20 23:04:06 +02004075 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
4076
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004077 mlxsw_sp_port->learning = 0;
4078 mlxsw_sp_port->learning_sync = 0;
4079 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01004080 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004081
4082 /* Add implicit VLAN interface in the device, so that untagged
4083 * packets will be classified to the default vFID.
4084 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02004085 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004086}
4087
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004088static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004089{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004090 char sldr_pl[MLXSW_REG_SLDR_LEN];
4091
4092 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
4093 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4094}
4095
4096static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
4097{
4098 char sldr_pl[MLXSW_REG_SLDR_LEN];
4099
4100 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
4101 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4102}
4103
4104static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4105 u16 lag_id, u8 port_index)
4106{
4107 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4108 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4109
4110 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
4111 lag_id, port_index);
4112 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4113}
4114
4115static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4116 u16 lag_id)
4117{
4118 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4119 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4120
4121 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
4122 lag_id);
4123 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4124}
4125
4126static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
4127 u16 lag_id)
4128{
4129 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4130 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4131
4132 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
4133 lag_id);
4134 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4135}
4136
4137static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
4138 u16 lag_id)
4139{
4140 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4141 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4142
4143 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
4144 lag_id);
4145 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4146}
4147
4148static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4149 struct net_device *lag_dev,
4150 u16 *p_lag_id)
4151{
4152 struct mlxsw_sp_upper *lag;
4153 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004154 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004155 int i;
4156
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004157 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
4158 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004159 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
4160 if (lag->ref_count) {
4161 if (lag->dev == lag_dev) {
4162 *p_lag_id = i;
4163 return 0;
4164 }
4165 } else if (free_lag_id < 0) {
4166 free_lag_id = i;
4167 }
4168 }
4169 if (free_lag_id < 0)
4170 return -EBUSY;
4171 *p_lag_id = free_lag_id;
4172 return 0;
4173}
4174
4175static bool
4176mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
4177 struct net_device *lag_dev,
4178 struct netdev_lag_upper_info *lag_upper_info)
4179{
4180 u16 lag_id;
4181
4182 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
4183 return false;
4184 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
4185 return false;
4186 return true;
4187}
4188
4189static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4190 u16 lag_id, u8 *p_port_index)
4191{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004192 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004193 int i;
4194
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004195 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
4196 MAX_LAG_MEMBERS);
4197 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004198 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
4199 *p_port_index = i;
4200 return 0;
4201 }
4202 }
4203 return -EBUSY;
4204}
4205
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004206static void
4207mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4208 u16 lag_id)
4209{
4210 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004211 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004212
4213 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4214 if (WARN_ON(!mlxsw_sp_vport))
4215 return;
4216
Ido Schimmel11943ff2016-07-02 11:00:12 +02004217 /* If vPort is assigned a RIF, then leave it since it's no
4218 * longer valid.
4219 */
4220 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4221 if (f)
4222 f->leave(mlxsw_sp_vport);
4223
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004224 mlxsw_sp_vport->lag_id = lag_id;
4225 mlxsw_sp_vport->lagged = 1;
4226}
4227
4228static void
4229mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4230{
4231 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004232 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004233
4234 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4235 if (WARN_ON(!mlxsw_sp_vport))
4236 return;
4237
Ido Schimmel11943ff2016-07-02 11:00:12 +02004238 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4239 if (f)
4240 f->leave(mlxsw_sp_vport);
4241
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004242 mlxsw_sp_vport->lagged = 0;
4243}
4244
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004245static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4246 struct net_device *lag_dev)
4247{
4248 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4249 struct mlxsw_sp_upper *lag;
4250 u16 lag_id;
4251 u8 port_index;
4252 int err;
4253
4254 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4255 if (err)
4256 return err;
4257 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4258 if (!lag->ref_count) {
4259 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4260 if (err)
4261 return err;
4262 lag->dev = lag_dev;
4263 }
4264
4265 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4266 if (err)
4267 return err;
4268 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4269 if (err)
4270 goto err_col_port_add;
4271 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4272 if (err)
4273 goto err_col_port_enable;
4274
4275 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4276 mlxsw_sp_port->local_port);
4277 mlxsw_sp_port->lag_id = lag_id;
4278 mlxsw_sp_port->lagged = 1;
4279 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004280
4281 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4282
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004283 return 0;
4284
Ido Schimmel51554db2016-05-06 22:18:39 +02004285err_col_port_enable:
4286 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004287err_col_port_add:
4288 if (!lag->ref_count)
4289 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004290 return err;
4291}
4292
Ido Schimmel82e6db02016-06-20 23:04:04 +02004293static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4294 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004295{
4296 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004297 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004298 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004299
4300 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004301 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004302 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4303 WARN_ON(lag->ref_count == 0);
4304
Ido Schimmel82e6db02016-06-20 23:04:04 +02004305 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4306 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004307
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004308 if (mlxsw_sp_port->bridged) {
4309 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004310 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004311 }
4312
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004313 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004314 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004315
4316 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4317 mlxsw_sp_port->local_port);
4318 mlxsw_sp_port->lagged = 0;
4319 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004320
4321 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004322}
4323
Jiri Pirko74581202015-12-03 12:12:30 +01004324static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4325 u16 lag_id)
4326{
4327 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4328 char sldr_pl[MLXSW_REG_SLDR_LEN];
4329
4330 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4331 mlxsw_sp_port->local_port);
4332 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4333}
4334
4335static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4336 u16 lag_id)
4337{
4338 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4339 char sldr_pl[MLXSW_REG_SLDR_LEN];
4340
4341 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4342 mlxsw_sp_port->local_port);
4343 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4344}
4345
4346static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4347 bool lag_tx_enabled)
4348{
4349 if (lag_tx_enabled)
4350 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4351 mlxsw_sp_port->lag_id);
4352 else
4353 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4354 mlxsw_sp_port->lag_id);
4355}
4356
4357static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4358 struct netdev_lag_lower_state_info *info)
4359{
4360 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4361}
4362
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004363static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4364 struct net_device *vlan_dev)
4365{
4366 struct mlxsw_sp_port *mlxsw_sp_vport;
4367 u16 vid = vlan_dev_vlan_id(vlan_dev);
4368
4369 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004370 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004371 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004372
4373 mlxsw_sp_vport->dev = vlan_dev;
4374
4375 return 0;
4376}
4377
Ido Schimmel82e6db02016-06-20 23:04:04 +02004378static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4379 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004380{
4381 struct mlxsw_sp_port *mlxsw_sp_vport;
4382 u16 vid = vlan_dev_vlan_id(vlan_dev);
4383
4384 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004385 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004386 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004387
4388 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004389}
4390
Jiri Pirko74581202015-12-03 12:12:30 +01004391static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4392 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004393{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004394 struct netdev_notifier_changeupper_info *info;
4395 struct mlxsw_sp_port *mlxsw_sp_port;
4396 struct net_device *upper_dev;
4397 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004398 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004399
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004400 mlxsw_sp_port = netdev_priv(dev);
4401 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4402 info = ptr;
4403
4404 switch (event) {
4405 case NETDEV_PRECHANGEUPPER:
4406 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004407 if (!is_vlan_dev(upper_dev) &&
4408 !netif_is_lag_master(upper_dev) &&
4409 !netif_is_bridge_master(upper_dev))
4410 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004411 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004412 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004413 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004414 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004415 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004416 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004417 if (netif_is_lag_master(upper_dev) &&
4418 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4419 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004420 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004421 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4422 return -EINVAL;
4423 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4424 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4425 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004426 break;
4427 case NETDEV_CHANGEUPPER:
4428 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004429 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004430 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004431 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4432 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004433 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004434 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4435 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004436 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004437 if (info->linking)
4438 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4439 upper_dev);
4440 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004441 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004442 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004443 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004444 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4445 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004446 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004447 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4448 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004449 } else {
4450 err = -EINVAL;
4451 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004452 }
4453 break;
4454 }
4455
Ido Schimmel80bedf12016-06-20 23:03:59 +02004456 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004457}
4458
Jiri Pirko74581202015-12-03 12:12:30 +01004459static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4460 unsigned long event, void *ptr)
4461{
4462 struct netdev_notifier_changelowerstate_info *info;
4463 struct mlxsw_sp_port *mlxsw_sp_port;
4464 int err;
4465
4466 mlxsw_sp_port = netdev_priv(dev);
4467 info = ptr;
4468
4469 switch (event) {
4470 case NETDEV_CHANGELOWERSTATE:
4471 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4472 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4473 info->lower_state_info);
4474 if (err)
4475 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4476 }
4477 break;
4478 }
4479
Ido Schimmel80bedf12016-06-20 23:03:59 +02004480 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004481}
4482
4483static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4484 unsigned long event, void *ptr)
4485{
4486 switch (event) {
4487 case NETDEV_PRECHANGEUPPER:
4488 case NETDEV_CHANGEUPPER:
4489 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4490 case NETDEV_CHANGELOWERSTATE:
4491 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4492 }
4493
Ido Schimmel80bedf12016-06-20 23:03:59 +02004494 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004495}
4496
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004497static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4498 unsigned long event, void *ptr)
4499{
4500 struct net_device *dev;
4501 struct list_head *iter;
4502 int ret;
4503
4504 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4505 if (mlxsw_sp_port_dev_check(dev)) {
4506 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004507 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004508 return ret;
4509 }
4510 }
4511
Ido Schimmel80bedf12016-06-20 23:03:59 +02004512 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004513}
4514
Ido Schimmel701b1862016-07-04 08:23:16 +02004515static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4516 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004517{
Ido Schimmel701b1862016-07-04 08:23:16 +02004518 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004519 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004520
Ido Schimmel701b1862016-07-04 08:23:16 +02004521 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4522 if (!f) {
4523 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4524 if (IS_ERR(f))
4525 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004526 }
4527
Ido Schimmel701b1862016-07-04 08:23:16 +02004528 f->ref_count++;
4529
4530 return 0;
4531}
4532
4533static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4534 struct net_device *vlan_dev)
4535{
4536 u16 fid = vlan_dev_vlan_id(vlan_dev);
4537 struct mlxsw_sp_fid *f;
4538
4539 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004540 if (f && f->r)
4541 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004542 if (f && --f->ref_count == 0)
4543 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4544}
4545
4546static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4547 unsigned long event, void *ptr)
4548{
4549 struct netdev_notifier_changeupper_info *info;
4550 struct net_device *upper_dev;
4551 struct mlxsw_sp *mlxsw_sp;
4552 int err;
4553
4554 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4555 if (!mlxsw_sp)
4556 return 0;
4557 if (br_dev != mlxsw_sp->master_bridge.dev)
4558 return 0;
4559
4560 info = ptr;
4561
4562 switch (event) {
4563 case NETDEV_CHANGEUPPER:
4564 upper_dev = info->upper_dev;
4565 if (!is_vlan_dev(upper_dev))
4566 break;
4567 if (info->linking) {
4568 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4569 upper_dev);
4570 if (err)
4571 return err;
4572 } else {
4573 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4574 }
4575 break;
4576 }
4577
4578 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004579}
4580
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004581static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004582{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004583 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004584 MLXSW_SP_VFID_MAX);
4585}
4586
4587static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4588{
4589 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4590
4591 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4592 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004593}
4594
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004595static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004596
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004597static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4598 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004599{
4600 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004601 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004602 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004603 int err;
4604
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004605 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004606 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004607 dev_err(dev, "No available vFIDs\n");
4608 return ERR_PTR(-ERANGE);
4609 }
4610
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004611 fid = mlxsw_sp_vfid_to_fid(vfid);
4612 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004613 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004614 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004615 return ERR_PTR(err);
4616 }
4617
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004618 f = kzalloc(sizeof(*f), GFP_KERNEL);
4619 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004620 goto err_allocate_vfid;
4621
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004622 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004623 f->fid = fid;
4624 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004625
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004626 list_add(&f->list, &mlxsw_sp->vfids.list);
4627 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004628
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004629 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004630
4631err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004632 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004633 return ERR_PTR(-ENOMEM);
4634}
4635
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004636static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4637 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004638{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004639 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004640 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004641
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004642 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004643 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004644
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004645 if (f->r)
4646 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004647
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004648 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004649
4650 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004651}
4652
Ido Schimmel99724c12016-07-04 08:23:14 +02004653static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4654 bool valid)
4655{
4656 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4657 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4658
4659 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4660 vid);
4661}
4662
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004663static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4664 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004665{
Ido Schimmel0355b592016-06-20 23:04:13 +02004666 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004667 int err;
4668
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004669 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004670 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004671 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004672 if (IS_ERR(f))
4673 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004674 }
4675
Ido Schimmel0355b592016-06-20 23:04:13 +02004676 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4677 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004678 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004679
Ido Schimmel0355b592016-06-20 23:04:13 +02004680 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4681 if (err)
4682 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004683
Ido Schimmel41b996c2016-06-20 23:04:17 +02004684 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004685 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004686
Ido Schimmel22305372016-06-20 23:04:21 +02004687 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4688
Ido Schimmel0355b592016-06-20 23:04:13 +02004689 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004690
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004691err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004692 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4693err_vport_flood_set:
4694 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004695 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004696 return err;
4697}
4698
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004699static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004700{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004701 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004702
Ido Schimmel22305372016-06-20 23:04:21 +02004703 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4704
Ido Schimmel0355b592016-06-20 23:04:13 +02004705 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4706
4707 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4708
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004709 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4710
Ido Schimmel41b996c2016-06-20 23:04:17 +02004711 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004712 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004713 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004714}
4715
4716static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4717 struct net_device *br_dev)
4718{
Ido Schimmel99724c12016-07-04 08:23:14 +02004719 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004720 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4721 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004722 int err;
4723
Ido Schimmel99724c12016-07-04 08:23:14 +02004724 if (f && !WARN_ON(!f->leave))
4725 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004726
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004727 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004728 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004729 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004730 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004731 }
4732
4733 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4734 if (err) {
4735 netdev_err(dev, "Failed to enable learning\n");
4736 goto err_port_vid_learning_set;
4737 }
4738
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004739 mlxsw_sp_vport->learning = 1;
4740 mlxsw_sp_vport->learning_sync = 1;
4741 mlxsw_sp_vport->uc_flood = 1;
4742 mlxsw_sp_vport->bridged = 1;
4743
4744 return 0;
4745
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004746err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004747 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004748 return err;
4749}
4750
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004751static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004752{
4753 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004754
4755 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4756
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004757 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004758
Ido Schimmel0355b592016-06-20 23:04:13 +02004759 mlxsw_sp_vport->learning = 0;
4760 mlxsw_sp_vport->learning_sync = 0;
4761 mlxsw_sp_vport->uc_flood = 0;
4762 mlxsw_sp_vport->bridged = 0;
4763}
4764
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004765static bool
4766mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4767 const struct net_device *br_dev)
4768{
4769 struct mlxsw_sp_port *mlxsw_sp_vport;
4770
4771 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4772 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004773 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004774
4775 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004776 return false;
4777 }
4778
4779 return true;
4780}
4781
4782static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4783 unsigned long event, void *ptr,
4784 u16 vid)
4785{
4786 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4787 struct netdev_notifier_changeupper_info *info = ptr;
4788 struct mlxsw_sp_port *mlxsw_sp_vport;
4789 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004790 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004791
4792 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4793
4794 switch (event) {
4795 case NETDEV_PRECHANGEUPPER:
4796 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004797 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004798 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004799 if (!info->linking)
4800 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004801 /* We can't have multiple VLAN interfaces configured on
4802 * the same port and being members in the same bridge.
4803 */
4804 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4805 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004806 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004807 break;
4808 case NETDEV_CHANGEUPPER:
4809 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004810 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004811 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004812 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004813 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4814 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004815 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004816 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004817 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004818 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004819 }
4820 }
4821
Ido Schimmel80bedf12016-06-20 23:03:59 +02004822 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004823}
4824
Ido Schimmel272c4472015-12-15 16:03:47 +01004825static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4826 unsigned long event, void *ptr,
4827 u16 vid)
4828{
4829 struct net_device *dev;
4830 struct list_head *iter;
4831 int ret;
4832
4833 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4834 if (mlxsw_sp_port_dev_check(dev)) {
4835 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4836 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004837 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004838 return ret;
4839 }
4840 }
4841
Ido Schimmel80bedf12016-06-20 23:03:59 +02004842 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004843}
4844
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004845static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4846 unsigned long event, void *ptr)
4847{
4848 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4849 u16 vid = vlan_dev_vlan_id(vlan_dev);
4850
Ido Schimmel272c4472015-12-15 16:03:47 +01004851 if (mlxsw_sp_port_dev_check(real_dev))
4852 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4853 vid);
4854 else if (netif_is_lag_master(real_dev))
4855 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4856 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004857
Ido Schimmel80bedf12016-06-20 23:03:59 +02004858 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004859}
4860
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004861static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4862 unsigned long event, void *ptr)
4863{
4864 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004865 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004866
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004867 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4868 err = mlxsw_sp_netdevice_router_port_event(dev);
4869 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004870 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4871 else if (netif_is_lag_master(dev))
4872 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004873 else if (netif_is_bridge_master(dev))
4874 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004875 else if (is_vlan_dev(dev))
4876 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004877
Ido Schimmel80bedf12016-06-20 23:03:59 +02004878 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004879}
4880
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004881static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4882 .notifier_call = mlxsw_sp_netdevice_event,
4883};
4884
Ido Schimmel99724c12016-07-04 08:23:14 +02004885static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4886 .notifier_call = mlxsw_sp_inetaddr_event,
4887 .priority = 10, /* Must be called before FIB notifier block */
4888};
4889
Jiri Pirkoe7322632016-09-01 10:37:43 +02004890static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4891 .notifier_call = mlxsw_sp_router_netevent_event,
4892};
4893
Jiri Pirko1d20d232016-10-27 15:12:59 +02004894static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4895 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4896 {0, },
4897};
4898
4899static struct pci_driver mlxsw_sp_pci_driver = {
4900 .name = mlxsw_sp_driver_name,
4901 .id_table = mlxsw_sp_pci_id_table,
4902};
4903
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004904static int __init mlxsw_sp_module_init(void)
4905{
4906 int err;
4907
4908 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004909 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004910 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4911
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004912 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4913 if (err)
4914 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004915
4916 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4917 if (err)
4918 goto err_pci_driver_register;
4919
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004920 return 0;
4921
Jiri Pirko1d20d232016-10-27 15:12:59 +02004922err_pci_driver_register:
4923 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004924err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004925 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004926 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004927 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4928 return err;
4929}
4930
4931static void __exit mlxsw_sp_module_exit(void)
4932{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004933 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004934 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004935 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004936 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004937 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4938}
4939
4940module_init(mlxsw_sp_module_init);
4941module_exit(mlxsw_sp_module_exit);
4942
4943MODULE_LICENSE("Dual BSD/GPL");
4944MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4945MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004946MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);