blob: 3d17709bc30c70270c6463245cfcf39a32e80aee [file] [log] [blame]
Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
Ariel Levkovich24da0012018-04-05 18:53:27 +030095 MLX5_CMD_OP_ALLOC_MEMIC = 0x205,
96 MLX5_CMD_OP_DEALLOC_MEMIC = 0x206,
Eli Cohend29b7962014-10-02 12:19:43 +030097 MLX5_CMD_OP_CREATE_EQ = 0x301,
98 MLX5_CMD_OP_DESTROY_EQ = 0x302,
99 MLX5_CMD_OP_QUERY_EQ = 0x303,
100 MLX5_CMD_OP_GEN_EQE = 0x304,
101 MLX5_CMD_OP_CREATE_CQ = 0x400,
102 MLX5_CMD_OP_DESTROY_CQ = 0x401,
103 MLX5_CMD_OP_QUERY_CQ = 0x402,
104 MLX5_CMD_OP_MODIFY_CQ = 0x403,
105 MLX5_CMD_OP_CREATE_QP = 0x500,
106 MLX5_CMD_OP_DESTROY_QP = 0x501,
107 MLX5_CMD_OP_RST2INIT_QP = 0x502,
108 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
109 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
110 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
111 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
112 MLX5_CMD_OP_2ERR_QP = 0x507,
113 MLX5_CMD_OP_2RST_QP = 0x50a,
114 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300115 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300116 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
117 MLX5_CMD_OP_CREATE_PSV = 0x600,
118 MLX5_CMD_OP_DESTROY_PSV = 0x601,
119 MLX5_CMD_OP_CREATE_SRQ = 0x700,
120 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
121 MLX5_CMD_OP_QUERY_SRQ = 0x702,
122 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300123 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
124 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
125 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
126 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300127 MLX5_CMD_OP_CREATE_DCT = 0x710,
128 MLX5_CMD_OP_DESTROY_DCT = 0x711,
129 MLX5_CMD_OP_DRAIN_DCT = 0x712,
130 MLX5_CMD_OP_QUERY_DCT = 0x713,
131 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300132 MLX5_CMD_OP_CREATE_XRQ = 0x717,
133 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
134 MLX5_CMD_OP_QUERY_XRQ = 0x719,
135 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300136 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
137 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
138 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
139 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
140 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
141 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300143 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300144 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
145 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
146 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
147 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200148 MLX5_CMD_OP_QUERY_VNIC_ENV = 0x76f,
Eli Cohend29b7962014-10-02 12:19:43 +0300149 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
150 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
151 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
152 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200153 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300154 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300155 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
156 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
157 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
158 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
159 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
160 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300161 MLX5_CMD_OP_ALLOC_PD = 0x800,
162 MLX5_CMD_OP_DEALLOC_PD = 0x801,
163 MLX5_CMD_OP_ALLOC_UAR = 0x802,
164 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
165 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
166 MLX5_CMD_OP_ACCESS_REG = 0x805,
167 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300168 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300169 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
170 MLX5_CMD_OP_MAD_IFC = 0x50d,
171 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
172 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
173 MLX5_CMD_OP_NOP = 0x80d,
174 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
175 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300176 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
177 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
178 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
179 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
180 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
181 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
182 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
183 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
184 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
185 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
186 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
187 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200188 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
189 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300190 MLX5_CMD_OP_CREATE_LAG = 0x840,
191 MLX5_CMD_OP_MODIFY_LAG = 0x841,
192 MLX5_CMD_OP_QUERY_LAG = 0x842,
193 MLX5_CMD_OP_DESTROY_LAG = 0x843,
194 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
195 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300196 MLX5_CMD_OP_CREATE_TIR = 0x900,
197 MLX5_CMD_OP_MODIFY_TIR = 0x901,
198 MLX5_CMD_OP_DESTROY_TIR = 0x902,
199 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300200 MLX5_CMD_OP_CREATE_SQ = 0x904,
201 MLX5_CMD_OP_MODIFY_SQ = 0x905,
202 MLX5_CMD_OP_DESTROY_SQ = 0x906,
203 MLX5_CMD_OP_QUERY_SQ = 0x907,
204 MLX5_CMD_OP_CREATE_RQ = 0x908,
205 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300206 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300207 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
208 MLX5_CMD_OP_QUERY_RQ = 0x90b,
209 MLX5_CMD_OP_CREATE_RMP = 0x90c,
210 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
211 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
212 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300213 MLX5_CMD_OP_CREATE_TIS = 0x912,
214 MLX5_CMD_OP_MODIFY_TIS = 0x913,
215 MLX5_CMD_OP_DESTROY_TIS = 0x914,
216 MLX5_CMD_OP_QUERY_TIS = 0x915,
217 MLX5_CMD_OP_CREATE_RQT = 0x916,
218 MLX5_CMD_OP_MODIFY_RQT = 0x917,
219 MLX5_CMD_OP_DESTROY_RQT = 0x918,
220 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200221 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300222 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
223 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
224 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
225 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
226 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
227 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
228 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
229 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200230 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000231 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
232 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
233 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300234 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300235 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
236 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200237 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
238 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300239 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
240 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
241 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
242 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
243 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300244 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300245};
246
247struct mlx5_ifc_flow_table_fields_supported_bits {
248 u8 outer_dmac[0x1];
249 u8 outer_smac[0x1];
250 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300251 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300252 u8 outer_first_prio[0x1];
253 u8 outer_first_cfi[0x1];
254 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300255 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300256 u8 outer_second_prio[0x1];
257 u8 outer_second_cfi[0x1];
258 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200259 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300260 u8 outer_sip[0x1];
261 u8 outer_dip[0x1];
262 u8 outer_frag[0x1];
263 u8 outer_ip_protocol[0x1];
264 u8 outer_ip_ecn[0x1];
265 u8 outer_ip_dscp[0x1];
266 u8 outer_udp_sport[0x1];
267 u8 outer_udp_dport[0x1];
268 u8 outer_tcp_sport[0x1];
269 u8 outer_tcp_dport[0x1];
270 u8 outer_tcp_flags[0x1];
271 u8 outer_gre_protocol[0x1];
272 u8 outer_gre_key[0x1];
273 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200274 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300275 u8 source_eswitch_port[0x1];
276
277 u8 inner_dmac[0x1];
278 u8 inner_smac[0x1];
279 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300280 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300281 u8 inner_first_prio[0x1];
282 u8 inner_first_cfi[0x1];
283 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200284 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300285 u8 inner_second_prio[0x1];
286 u8 inner_second_cfi[0x1];
287 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200288 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300289 u8 inner_sip[0x1];
290 u8 inner_dip[0x1];
291 u8 inner_frag[0x1];
292 u8 inner_ip_protocol[0x1];
293 u8 inner_ip_ecn[0x1];
294 u8 inner_ip_dscp[0x1];
295 u8 inner_udp_sport[0x1];
296 u8 inner_udp_dport[0x1];
297 u8 inner_tcp_sport[0x1];
298 u8 inner_tcp_dport[0x1];
299 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200300 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300301 u8 reserved_at_40[0x17];
302 u8 outer_esp_spi[0x1];
303 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300304 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300305
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300306 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300307};
308
309struct mlx5_ifc_flow_table_prop_layout_bits {
310 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000311 u8 reserved_at_1[0x1];
312 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200313 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200314 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200315 u8 identified_miss_table_mode[0x1];
316 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300317 u8 encap[0x1];
318 u8 decap[0x1];
Or Gerlitz0c068972018-01-28 20:14:20 +0200319 u8 reserved_at_9[0x1];
320 u8 pop_vlan[0x1];
321 u8 push_vlan[0x1];
322 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300325 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200326 u8 log_max_modify_header_context[0x8];
327 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328 u8 max_ft_level[0x8];
329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300331
Matan Barakb4ff3a32016-02-09 14:57:42 +0200332 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200333 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300334
Matan Barakb4ff3a32016-02-09 14:57:42 +0200335 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200336 u8 log_max_destination[0x8];
337
Raed Salem16f1c5b2017-07-30 11:02:51 +0300338 u8 log_max_flow_counter[0x8];
339 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300340 u8 log_max_flow[0x8];
341
Matan Barakb4ff3a32016-02-09 14:57:42 +0200342 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300343
344 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
345
346 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
347};
348
349struct mlx5_ifc_odp_per_transport_service_cap_bits {
350 u8 send[0x1];
351 u8 receive[0x1];
352 u8 write[0x1];
353 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200354 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300355 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200356 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300357};
358
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200359struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200360 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200361
362 u8 ipv4[0x20];
363};
364
365struct mlx5_ifc_ipv6_layout_bits {
366 u8 ipv6[16][0x8];
367};
368
369union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
370 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
371 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200372 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200373};
374
Saeed Mahameede2816822015-05-28 22:28:40 +0300375struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
376 u8 smac_47_16[0x20];
377
378 u8 smac_15_0[0x10];
379 u8 ethertype[0x10];
380
381 u8 dmac_47_16[0x20];
382
383 u8 dmac_15_0[0x10];
384 u8 first_prio[0x3];
385 u8 first_cfi[0x1];
386 u8 first_vid[0xc];
387
388 u8 ip_protocol[0x8];
389 u8 ip_dscp[0x6];
390 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300391 u8 cvlan_tag[0x1];
392 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300393 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300394 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300395 u8 tcp_flags[0x9];
396
397 u8 tcp_sport[0x10];
398 u8 tcp_dport[0x10];
399
Or Gerlitza8ade552017-06-07 17:49:56 +0300400 u8 reserved_at_c0[0x18];
401 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300402
403 u8 udp_sport[0x10];
404 u8 udp_dport[0x10];
405
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200406 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300407
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200408 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300409};
410
411struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300412 u8 reserved_at_0[0x8];
413 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300414
Matan Barakb4ff3a32016-02-09 14:57:42 +0200415 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300416 u8 source_port[0x10];
417
418 u8 outer_second_prio[0x3];
419 u8 outer_second_cfi[0x1];
420 u8 outer_second_vid[0xc];
421 u8 inner_second_prio[0x3];
422 u8 inner_second_cfi[0x1];
423 u8 inner_second_vid[0xc];
424
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300425 u8 outer_second_cvlan_tag[0x1];
426 u8 inner_second_cvlan_tag[0x1];
427 u8 outer_second_svlan_tag[0x1];
428 u8 inner_second_svlan_tag[0x1];
429 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300430 u8 gre_protocol[0x10];
431
432 u8 gre_key_h[0x18];
433 u8 gre_key_l[0x8];
434
435 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200436 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300437
Matan Barakb4ff3a32016-02-09 14:57:42 +0200438 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300439
Matan Barakb4ff3a32016-02-09 14:57:42 +0200440 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300441 u8 outer_ipv6_flow_label[0x14];
442
Matan Barakb4ff3a32016-02-09 14:57:42 +0200443 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300444 u8 inner_ipv6_flow_label[0x14];
445
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300446 u8 reserved_at_120[0x28];
447 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300448 u8 reserved_at_160[0x20];
449 u8 outer_esp_spi[0x20];
450 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300451};
452
453struct mlx5_ifc_cmd_pas_bits {
454 u8 pa_h[0x20];
455
456 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200457 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300458};
459
460struct mlx5_ifc_uint64_bits {
461 u8 hi[0x20];
462
463 u8 lo[0x20];
464};
465
466enum {
467 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
468 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
469 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
470 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
471 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
472 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
473 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
474 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
475 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
476 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
477};
478
479struct mlx5_ifc_ads_bits {
480 u8 fl[0x1];
481 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200482 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300483 u8 pkey_index[0x10];
484
Matan Barakb4ff3a32016-02-09 14:57:42 +0200485 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300486 u8 grh[0x1];
487 u8 mlid[0x7];
488 u8 rlid[0x10];
489
490 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200491 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300492 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200493 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300494 u8 stat_rate[0x4];
495 u8 hop_limit[0x8];
496
Matan Barakb4ff3a32016-02-09 14:57:42 +0200497 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300498 u8 tclass[0x8];
499 u8 flow_label[0x14];
500
501 u8 rgid_rip[16][0x8];
502
Matan Barakb4ff3a32016-02-09 14:57:42 +0200503 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300504 u8 f_dscp[0x1];
505 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200506 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300507 u8 f_eth_prio[0x1];
508 u8 ecn[0x2];
509 u8 dscp[0x6];
510 u8 udp_sport[0x10];
511
512 u8 dei_cfi[0x1];
513 u8 eth_prio[0x3];
514 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200515 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300516 u8 rmac_47_32[0x10];
517
518 u8 rmac_31_0[0x20];
519};
520
521struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200522 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300523 u8 nic_rx_multi_path_tirs_fts[0x1];
524 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
525 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
532
533 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
534
Matan Barakb4ff3a32016-02-09 14:57:42 +0200535 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300536
537 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
538
Matan Barakb4ff3a32016-02-09 14:57:42 +0200539 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300540};
541
Saeed Mahameed495716b2015-12-01 18:03:19 +0200542struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200543 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200544
545 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
546
547 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
548
549 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
550
Matan Barakb4ff3a32016-02-09 14:57:42 +0200551 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200552};
553
Saeed Mahameedd6666752015-12-01 18:03:22 +0200554struct mlx5_ifc_e_switch_cap_bits {
555 u8 vport_svlan_strip[0x1];
556 u8 vport_cvlan_strip[0x1];
557 u8 vport_svlan_insert[0x1];
558 u8 vport_cvlan_insert_if_not_exist[0x1];
559 u8 vport_cvlan_insert_overwrite[0x1];
Roi Dayana6d04562017-12-05 10:38:58 +0200560 u8 reserved_at_5[0x18];
561 u8 merged_eswitch[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300562 u8 nic_vport_node_guid_modify[0x1];
563 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200564
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300565 u8 vxlan_encap_decap[0x1];
566 u8 nvgre_encap_decap[0x1];
567 u8 reserved_at_22[0x9];
568 u8 log_max_encap_headers[0x5];
569 u8 reserved_2b[0x6];
570 u8 max_encap_header_size[0xa];
571
572 u8 reserved_40[0x7c0];
573
Saeed Mahameedd6666752015-12-01 18:03:22 +0200574};
575
Saeed Mahameed74862162016-06-09 15:11:34 +0300576struct mlx5_ifc_qos_cap_bits {
577 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300578 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200579 u8 esw_bw_share[0x1];
580 u8 esw_rate_limit[0x1];
Bodong Wang05d3ac92018-03-19 15:10:29 +0200581 u8 reserved_at_4[0x1];
582 u8 packet_pacing_burst_bound[0x1];
583 u8 packet_pacing_typical_size[0x1];
584 u8 reserved_at_7[0x19];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300585
586 u8 reserved_at_20[0x20];
587
Saeed Mahameed74862162016-06-09 15:11:34 +0300588 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300589
Saeed Mahameed74862162016-06-09 15:11:34 +0300590 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300591
592 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300593 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300594
595 u8 esw_element_type[0x10];
596 u8 esw_tsar_type[0x10];
597
598 u8 reserved_at_c0[0x10];
599 u8 max_qos_para_vport[0x10];
600
601 u8 max_tsar_bw_share[0x20];
602
603 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300604};
605
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300606struct mlx5_ifc_debug_cap_bits {
607 u8 reserved_at_0[0x20];
608
609 u8 reserved_at_20[0x2];
610 u8 stall_detect[0x1];
611 u8 reserved_at_23[0x1d];
612
613 u8 reserved_at_40[0x7c0];
614};
615
Saeed Mahameede2816822015-05-28 22:28:40 +0300616struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
617 u8 csum_cap[0x1];
618 u8 vlan_cap[0x1];
619 u8 lro_cap[0x1];
620 u8 lro_psh_flag[0x1];
621 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200622 u8 reserved_at_5[0x2];
623 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200624 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200625 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300626 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200627 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300628 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300630 u8 reg_umr_sq[0x1];
631 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300632 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300633 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200634 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300635 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636 u8 tunnel_stateless_vxlan[0x1];
637
Ilan Tayari547eede2017-04-18 16:04:28 +0300638 u8 swp[0x1];
639 u8 swp_csum[0x1];
640 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300641 u8 reserved_at_23[0x1b];
642 u8 max_geneve_opt_len[0x1];
643 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300644
Matan Barakb4ff3a32016-02-09 14:57:42 +0200645 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300646 u8 lro_min_mss_size[0x10];
647
Matan Barakb4ff3a32016-02-09 14:57:42 +0200648 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300649
650 u8 lro_timer_supported_periods[4][0x20];
651
Matan Barakb4ff3a32016-02-09 14:57:42 +0200652 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300653};
654
655struct mlx5_ifc_roce_cap_bits {
656 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200657 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300658
Matan Barakb4ff3a32016-02-09 14:57:42 +0200659 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300660
Matan Barakb4ff3a32016-02-09 14:57:42 +0200661 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300662 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200663 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300664 u8 roce_version[0x8];
665
Matan Barakb4ff3a32016-02-09 14:57:42 +0200666 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300667 u8 r_roce_dest_udp_port[0x10];
668
669 u8 r_roce_max_src_udp_port[0x10];
670 u8 r_roce_min_src_udp_port[0x10];
671
Matan Barakb4ff3a32016-02-09 14:57:42 +0200672 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300673 u8 roce_address_table_size[0x10];
674
Matan Barakb4ff3a32016-02-09 14:57:42 +0200675 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300676};
677
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300678struct mlx5_ifc_device_mem_cap_bits {
679 u8 memic[0x1];
680 u8 reserved_at_1[0x1f];
681
682 u8 reserved_at_20[0xb];
683 u8 log_min_memic_alloc_size[0x5];
684 u8 reserved_at_30[0x8];
685 u8 log_max_memic_addr_alignment[0x8];
686
687 u8 memic_bar_start_addr[0x40];
688
689 u8 memic_bar_size[0x20];
690
691 u8 max_memic_size[0x20];
692
693 u8 reserved_at_c0[0x740];
694};
695
Saeed Mahameede2816822015-05-28 22:28:40 +0300696enum {
697 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
698 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
699 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
700 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
701 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
702 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
703 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
704 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
705 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
706};
707
708enum {
709 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
710 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
711 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
712 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
713 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
714 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
715 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
716 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
717 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
718};
719
720struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200721 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300722
Or Gerlitzbd108382017-05-28 15:24:17 +0300723 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200724 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300725 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300726
Matan Barakb4ff3a32016-02-09 14:57:42 +0200727 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300728
Matan Barakb4ff3a32016-02-09 14:57:42 +0200729 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300730
Matan Barakb4ff3a32016-02-09 14:57:42 +0200731 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200732 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300733
Matan Barakb4ff3a32016-02-09 14:57:42 +0200734 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200735 u8 atomic_size_qp[0x10];
736
Matan Barakb4ff3a32016-02-09 14:57:42 +0200737 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300738 u8 atomic_size_dc[0x10];
739
Matan Barakb4ff3a32016-02-09 14:57:42 +0200740 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300741};
742
743struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200744 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300745
746 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200747 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300748
Matan Barakb4ff3a32016-02-09 14:57:42 +0200749 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300750
751 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
752
753 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
754
755 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
756
Matan Barakb4ff3a32016-02-09 14:57:42 +0200757 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300758};
759
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200760struct mlx5_ifc_calc_op {
761 u8 reserved_at_0[0x10];
762 u8 reserved_at_10[0x9];
763 u8 op_swap_endianness[0x1];
764 u8 op_min[0x1];
765 u8 op_xor[0x1];
766 u8 op_or[0x1];
767 u8 op_and[0x1];
768 u8 op_max[0x1];
769 u8 op_add[0x1];
770};
771
772struct mlx5_ifc_vector_calc_cap_bits {
773 u8 calc_matrix[0x1];
774 u8 reserved_at_1[0x1f];
775 u8 reserved_at_20[0x8];
776 u8 max_vec_count[0x8];
777 u8 reserved_at_30[0xd];
778 u8 max_chunk_size[0x3];
779 struct mlx5_ifc_calc_op calc0;
780 struct mlx5_ifc_calc_op calc1;
781 struct mlx5_ifc_calc_op calc2;
782 struct mlx5_ifc_calc_op calc3;
783
784 u8 reserved_at_e0[0x720];
785};
786
Saeed Mahameede2816822015-05-28 22:28:40 +0300787enum {
788 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
789 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300790 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300791 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300792};
793
794enum {
795 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
796 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
797};
798
799enum {
800 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
801 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
802 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
803 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
804 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
805};
806
807enum {
808 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
809 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
810 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
811 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
812 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
813 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
814};
815
816enum {
817 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
818 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
819};
820
821enum {
822 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
823 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
824 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
825};
826
827enum {
828 MLX5_CAP_PORT_TYPE_IB = 0x0,
829 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300830};
831
Max Gurtovoy1410a902017-05-28 10:53:10 +0300832enum {
833 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
834 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
835 MLX5_CAP_UMR_FENCE_NONE = 0x2,
836};
837
Eli Cohenb7755162014-10-02 12:19:44 +0300838struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200839 u8 reserved_at_0[0x30];
840 u8 vhca_id[0x10];
841
842 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300843
844 u8 log_max_srq_sz[0x8];
845 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200846 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300847 u8 log_max_qp[0x5];
848
Matan Barakb4ff3a32016-02-09 14:57:42 +0200849 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300850 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200851 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300852
Matan Barakb4ff3a32016-02-09 14:57:42 +0200853 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300854 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200855 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300856 u8 log_max_cq[0x5];
857
858 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200859 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300860 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200861 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300862 u8 log_max_eq[0x4];
863
864 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200865 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300866 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200867 u8 force_teardown[0x1];
868 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300869 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200870 u8 umr_extended_translation_offset[0x1];
871 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300872 u8 log_max_klm_list_size[0x6];
873
Matan Barakb4ff3a32016-02-09 14:57:42 +0200874 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300875 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200876 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300877 u8 log_max_ra_res_dc[0x6];
878
Matan Barakb4ff3a32016-02-09 14:57:42 +0200879 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300880 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200881 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300882 u8 log_max_ra_res_qp[0x6];
883
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200884 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300885 u8 cc_query_allowed[0x1];
886 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200887 u8 start_pad[0x1];
888 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500889 u8 reserved_at_165[0xa];
890 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300891 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300892
Saeed Mahameede2816822015-05-28 22:28:40 +0300893 u8 out_of_seq_cnt[0x1];
894 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300895 u8 retransmission_q_counters[0x1];
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300896 u8 debug[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300897 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300898 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300899 u8 max_qp_cnt[0xa];
900 u8 pkey_table_size[0x10];
901
Saeed Mahameede2816822015-05-28 22:28:40 +0300902 u8 vport_group_manager[0x1];
903 u8 vhca_group_manager[0x1];
904 u8 ib_virt[0x1];
905 u8 eth_virt[0x1];
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200906 u8 vnic_env_queue_counters[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300907 u8 ets[0x1];
908 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200909 u8 eswitch_flow_table[0x1];
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300910 u8 device_memory[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200911 u8 mcam_reg[0x1];
912 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300913 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200914 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300915 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300916 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200917 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300918 u8 disable_link_up[0x1];
919 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300920 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300921 u8 num_ports[0x8];
922
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300923 u8 reserved_at_1c0[0x1];
924 u8 pps[0x1];
925 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300926 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300927 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200928 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300929 u8 reserved_at_1d0[0x1];
930 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300931 u8 general_notification_event[0x1];
932 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200933 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200934 u8 rol_s[0x1];
935 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300936 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200937 u8 wol_s[0x1];
938 u8 wol_g[0x1];
939 u8 wol_a[0x1];
940 u8 wol_b[0x1];
941 u8 wol_m[0x1];
942 u8 wol_u[0x1];
943 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300944
945 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300946 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300947 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300948
Saeed Mahameede2816822015-05-28 22:28:40 +0300949 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300950 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300951 u8 reserved_at_202[0x1];
952 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200953 u8 ipoib_basic_offloads[0x1];
Majd Dibbinyc8d75a92018-03-22 15:34:04 +0200954 u8 reserved_at_205[0x1];
955 u8 repeated_block_disabled[0x1];
956 u8 umr_modify_entity_size_disabled[0x1];
957 u8 umr_modify_atomic_disabled[0x1];
958 u8 umr_indirect_mkey_disabled[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300959 u8 umr_fence[0x2];
960 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300961 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300962 u8 cmdif_checksum[0x2];
963 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300964 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300965 u8 wq_signature[0x1];
966 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300967 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300968 u8 sho[0x1];
969 u8 tph[0x1];
970 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300971 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300972 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300973 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300974 u8 roce[0x1];
975 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300976 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300977
978 u8 cq_oi[0x1];
979 u8 cq_resize[0x1];
980 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300981 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300982 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300983 u8 pg[0x1];
984 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300985 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300986 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300987 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300988 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200991 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300992 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200993 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300994 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300995 u8 qkv[0x1];
996 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200997 u8 set_deth_sqpn[0x1];
998 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300999 u8 xrc[0x1];
1000 u8 ud[0x1];
1001 u8 uc[0x1];
1002 u8 rc[0x1];
1003
Eli Cohena6d51b62017-01-03 23:55:23 +02001004 u8 uar_4k[0x1];
1005 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +03001006 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001008 u8 log_pg_sz[0x8];
1009
1010 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02001011 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001012 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001013 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001014 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +03001015
1016 u8 reserved_at_270[0xb];
1017 u8 lag_master[0x1];
1018 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +03001019
Tariq Toukane1c9c622016-04-11 23:10:21 +03001020 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001021 u8 max_wqe_sz_sq[0x10];
1022
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001024 u8 max_wqe_sz_rq[0x10];
1025
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001026 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001027 u8 max_wqe_sz_sq_dc[0x10];
1028
Tariq Toukane1c9c622016-04-11 23:10:21 +03001029 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +03001030 u8 max_qp_mcg[0x19];
1031
Tariq Toukane1c9c622016-04-11 23:10:21 +03001032 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001033 u8 log_max_mcg[0x8];
1034
Tariq Toukane1c9c622016-04-11 23:10:21 +03001035 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001036 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001037 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001038 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001039 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001040 u8 log_max_xrcd[0x5];
1041
Moshe Shemesh5c298142017-12-26 16:46:29 +02001042 u8 nic_receive_steering_discard[0x1];
Moshe Shemeshaaabd072018-01-14 00:56:25 +02001043 u8 receive_discard_vport_down[0x1];
1044 u8 transmit_discard_vport_down[0x1];
1045 u8 reserved_at_343[0x5];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001046 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001047 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001048
Eli Cohenb7755162014-10-02 12:19:44 +03001049
Tariq Toukane1c9c622016-04-11 23:10:21 +03001050 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001051 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001052 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001053 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001054 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001055 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001056 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001057 u8 log_max_tis[0x5];
1058
Saeed Mahameede2816822015-05-28 22:28:40 +03001059 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001060 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001061 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001062 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001063 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001064 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001065 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001066 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001067 u8 log_max_tis_per_sq[0x5];
1068
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001069 u8 ext_stride_num_range[0x1];
1070 u8 reserved_at_3a1[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001071 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001072 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001073 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001074 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001075 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001076 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001077 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001078
Or Gerlitz40817cd2017-06-25 12:38:45 +03001079 u8 hairpin[0x1];
1080 u8 reserved_at_3c1[0x2];
1081 u8 log_max_hairpin_queues[0x5];
1082 u8 reserved_at_3c8[0x3];
1083 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001084 u8 reserved_at_3d0[0x3];
1085 u8 log_max_hairpin_num_packets[0x5];
1086 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001087 u8 log_max_wq_sz[0x5];
1088
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001089 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001090 u8 disable_local_lb_uc[0x1];
1091 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001092 u8 log_min_hairpin_wq_data_sz[0x5];
1093 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001094 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001095 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001096 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001097 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001098 u8 log_max_current_uc_list[0x5];
1099
Tariq Toukane1c9c622016-04-11 23:10:21 +03001100 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001101
Tariq Toukane1c9c622016-04-11 23:10:21 +03001102 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001103 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001104 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001105 u8 log_uar_page_sz[0x10];
1106
Tariq Toukane1c9c622016-04-11 23:10:21 +03001107 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001108 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001109 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001110
Eli Cohena6d51b62017-01-03 23:55:23 +02001111 u8 reserved_at_500[0x20];
1112 u8 num_of_uars_per_page[0x20];
1113 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001114
Guy Levi0ff8e792017-10-19 08:25:51 +03001115 u8 reserved_at_580[0x3d];
1116 u8 cqe_128_always[0x1];
1117 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001118 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001119
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001120 u8 cqe_compression_timeout[0x10];
1121 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001122
Saeed Mahameed74862162016-06-09 15:11:34 +03001123 u8 reserved_at_5e0[0x10];
1124 u8 tag_matching[0x1];
1125 u8 rndv_offload_rc[0x1];
1126 u8 rndv_offload_dc[0x1];
1127 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001128 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001129 u8 log_max_xrq[0x5];
1130
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001131 u8 affiliate_nic_vport_criteria[0x8];
1132 u8 native_port_num[0x8];
1133 u8 num_vhca_ports[0x8];
1134 u8 reserved_at_618[0x6];
1135 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001136 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001137};
1138
Saeed Mahameed81848732015-12-01 18:03:20 +02001139enum mlx5_flow_destination_type {
1140 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1141 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1142 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001143
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001144 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001145 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001146};
1147
1148struct mlx5_ifc_dest_format_struct_bits {
1149 u8 destination_type[0x8];
1150 u8 destination_id[0x18];
Shahar Kleinb17f7fc2018-03-22 12:32:12 +02001151 u8 destination_eswitch_owner_vhca_id_valid[0x1];
1152 u8 reserved_at_21[0xf];
1153 u8 destination_eswitch_owner_vhca_id[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001154};
1155
Amir Vadai9dc0b282016-05-13 12:55:39 +00001156struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001157 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001158
1159 u8 reserved_at_20[0x20];
1160};
1161
1162union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1163 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1164 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1165 u8 reserved_at_0[0x40];
1166};
1167
Saeed Mahameede2816822015-05-28 22:28:40 +03001168struct mlx5_ifc_fte_match_param_bits {
1169 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1170
1171 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1172
1173 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1174
Matan Barakb4ff3a32016-02-09 14:57:42 +02001175 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001176};
1177
1178enum {
1179 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1180 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1181 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1182 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1183 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1184};
1185
1186struct mlx5_ifc_rx_hash_field_select_bits {
1187 u8 l3_prot_type[0x1];
1188 u8 l4_prot_type[0x1];
1189 u8 selected_fields[0x1e];
1190};
1191
1192enum {
1193 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1194 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1195};
1196
1197enum {
1198 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1199 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1200};
1201
1202struct mlx5_ifc_wq_bits {
1203 u8 wq_type[0x4];
1204 u8 wq_signature[0x1];
1205 u8 end_padding_mode[0x2];
1206 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001207 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001208
1209 u8 hds_skip_first_sge[0x1];
1210 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001211 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001212 u8 page_offset[0x5];
1213 u8 lwm[0x10];
1214
Matan Barakb4ff3a32016-02-09 14:57:42 +02001215 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001216 u8 pd[0x18];
1217
Matan Barakb4ff3a32016-02-09 14:57:42 +02001218 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001219 u8 uar_page[0x18];
1220
1221 u8 dbr_addr[0x40];
1222
1223 u8 hw_counter[0x20];
1224
1225 u8 sw_counter[0x20];
1226
Matan Barakb4ff3a32016-02-09 14:57:42 +02001227 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001228 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001229 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001230 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001231 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001232 u8 log_wq_sz[0x5];
1233
Or Gerlitz4d533e02018-01-04 12:26:21 +02001234 u8 reserved_at_120[0x3];
1235 u8 log_hairpin_num_packets[0x5];
1236 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001237 u8 log_hairpin_data_sz[0x5];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001238
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001239 u8 reserved_at_130[0x4];
1240 u8 log_wqe_num_of_strides[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001241 u8 two_byte_shift_en[0x1];
1242 u8 reserved_at_139[0x4];
1243 u8 log_wqe_stride_size[0x3];
1244
1245 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001246
1247 struct mlx5_ifc_cmd_pas_bits pas[0];
1248};
1249
1250struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001251 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001252 u8 rq_num[0x18];
1253};
1254
1255struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001256 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001257 u8 mac_addr_47_32[0x10];
1258
1259 u8 mac_addr_31_0[0x20];
1260};
1261
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001262struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001263 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001264 u8 vlan[0x0c];
1265
Matan Barakb4ff3a32016-02-09 14:57:42 +02001266 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001267};
1268
Saeed Mahameede2816822015-05-28 22:28:40 +03001269struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001270 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001271
1272 u8 min_time_between_cnps[0x20];
1273
Matan Barakb4ff3a32016-02-09 14:57:42 +02001274 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001275 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001276 u8 reserved_at_d8[0x4];
1277 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001278 u8 cnp_802p_prio[0x3];
1279
Matan Barakb4ff3a32016-02-09 14:57:42 +02001280 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001281};
1282
1283struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001284 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001285
Matan Barakb4ff3a32016-02-09 14:57:42 +02001286 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001287 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001288 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001289 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001290 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001291
Matan Barakb4ff3a32016-02-09 14:57:42 +02001292 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001293
1294 u8 rpg_time_reset[0x20];
1295
1296 u8 rpg_byte_reset[0x20];
1297
1298 u8 rpg_threshold[0x20];
1299
1300 u8 rpg_max_rate[0x20];
1301
1302 u8 rpg_ai_rate[0x20];
1303
1304 u8 rpg_hai_rate[0x20];
1305
1306 u8 rpg_gd[0x20];
1307
1308 u8 rpg_min_dec_fac[0x20];
1309
1310 u8 rpg_min_rate[0x20];
1311
Matan Barakb4ff3a32016-02-09 14:57:42 +02001312 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001313
1314 u8 rate_to_set_on_first_cnp[0x20];
1315
1316 u8 dce_tcp_g[0x20];
1317
1318 u8 dce_tcp_rtt[0x20];
1319
1320 u8 rate_reduce_monitor_period[0x20];
1321
Matan Barakb4ff3a32016-02-09 14:57:42 +02001322 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001323
1324 u8 initial_alpha_value[0x20];
1325
Matan Barakb4ff3a32016-02-09 14:57:42 +02001326 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001327};
1328
1329struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001330 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001331
1332 u8 rppp_max_rps[0x20];
1333
1334 u8 rpg_time_reset[0x20];
1335
1336 u8 rpg_byte_reset[0x20];
1337
1338 u8 rpg_threshold[0x20];
1339
1340 u8 rpg_max_rate[0x20];
1341
1342 u8 rpg_ai_rate[0x20];
1343
1344 u8 rpg_hai_rate[0x20];
1345
1346 u8 rpg_gd[0x20];
1347
1348 u8 rpg_min_dec_fac[0x20];
1349
1350 u8 rpg_min_rate[0x20];
1351
Matan Barakb4ff3a32016-02-09 14:57:42 +02001352 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001353};
1354
1355enum {
1356 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1357 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1358 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1359};
1360
1361struct mlx5_ifc_resize_field_select_bits {
1362 u8 resize_field_select[0x20];
1363};
1364
1365enum {
1366 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1367 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1368 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1369 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1370};
1371
1372struct mlx5_ifc_modify_field_select_bits {
1373 u8 modify_field_select[0x20];
1374};
1375
1376struct mlx5_ifc_field_select_r_roce_np_bits {
1377 u8 field_select_r_roce_np[0x20];
1378};
1379
1380struct mlx5_ifc_field_select_r_roce_rp_bits {
1381 u8 field_select_r_roce_rp[0x20];
1382};
1383
1384enum {
1385 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1386 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1387 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1388 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1389 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1390 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1391 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1392 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1393 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1394 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1395};
1396
1397struct mlx5_ifc_field_select_802_1qau_rp_bits {
1398 u8 field_select_8021qaurp[0x20];
1399};
1400
1401struct mlx5_ifc_phys_layer_cntrs_bits {
1402 u8 time_since_last_clear_high[0x20];
1403
1404 u8 time_since_last_clear_low[0x20];
1405
1406 u8 symbol_errors_high[0x20];
1407
1408 u8 symbol_errors_low[0x20];
1409
1410 u8 sync_headers_errors_high[0x20];
1411
1412 u8 sync_headers_errors_low[0x20];
1413
1414 u8 edpl_bip_errors_lane0_high[0x20];
1415
1416 u8 edpl_bip_errors_lane0_low[0x20];
1417
1418 u8 edpl_bip_errors_lane1_high[0x20];
1419
1420 u8 edpl_bip_errors_lane1_low[0x20];
1421
1422 u8 edpl_bip_errors_lane2_high[0x20];
1423
1424 u8 edpl_bip_errors_lane2_low[0x20];
1425
1426 u8 edpl_bip_errors_lane3_high[0x20];
1427
1428 u8 edpl_bip_errors_lane3_low[0x20];
1429
1430 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1431
1432 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1433
1434 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1435
1436 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1437
1438 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1439
1440 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1441
1442 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1443
1444 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1445
1446 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1447
1448 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1449
1450 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1451
1452 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1453
1454 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1455
1456 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1457
1458 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1459
1460 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1461
1462 u8 rs_fec_corrected_blocks_high[0x20];
1463
1464 u8 rs_fec_corrected_blocks_low[0x20];
1465
1466 u8 rs_fec_uncorrectable_blocks_high[0x20];
1467
1468 u8 rs_fec_uncorrectable_blocks_low[0x20];
1469
1470 u8 rs_fec_no_errors_blocks_high[0x20];
1471
1472 u8 rs_fec_no_errors_blocks_low[0x20];
1473
1474 u8 rs_fec_single_error_blocks_high[0x20];
1475
1476 u8 rs_fec_single_error_blocks_low[0x20];
1477
1478 u8 rs_fec_corrected_symbols_total_high[0x20];
1479
1480 u8 rs_fec_corrected_symbols_total_low[0x20];
1481
1482 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1483
1484 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1485
1486 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1487
1488 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1489
1490 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1491
1492 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1493
1494 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1495
1496 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1497
1498 u8 link_down_events[0x20];
1499
1500 u8 successful_recovery_events[0x20];
1501
Matan Barakb4ff3a32016-02-09 14:57:42 +02001502 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001503};
1504
Gal Pressmand8dc0502016-09-27 17:04:51 +03001505struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1506 u8 time_since_last_clear_high[0x20];
1507
1508 u8 time_since_last_clear_low[0x20];
1509
1510 u8 phy_received_bits_high[0x20];
1511
1512 u8 phy_received_bits_low[0x20];
1513
1514 u8 phy_symbol_errors_high[0x20];
1515
1516 u8 phy_symbol_errors_low[0x20];
1517
1518 u8 phy_corrected_bits_high[0x20];
1519
1520 u8 phy_corrected_bits_low[0x20];
1521
1522 u8 phy_corrected_bits_lane0_high[0x20];
1523
1524 u8 phy_corrected_bits_lane0_low[0x20];
1525
1526 u8 phy_corrected_bits_lane1_high[0x20];
1527
1528 u8 phy_corrected_bits_lane1_low[0x20];
1529
1530 u8 phy_corrected_bits_lane2_high[0x20];
1531
1532 u8 phy_corrected_bits_lane2_low[0x20];
1533
1534 u8 phy_corrected_bits_lane3_high[0x20];
1535
1536 u8 phy_corrected_bits_lane3_low[0x20];
1537
1538 u8 reserved_at_200[0x5c0];
1539};
1540
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001541struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1542 u8 symbol_error_counter[0x10];
1543
1544 u8 link_error_recovery_counter[0x8];
1545
1546 u8 link_downed_counter[0x8];
1547
1548 u8 port_rcv_errors[0x10];
1549
1550 u8 port_rcv_remote_physical_errors[0x10];
1551
1552 u8 port_rcv_switch_relay_errors[0x10];
1553
1554 u8 port_xmit_discards[0x10];
1555
1556 u8 port_xmit_constraint_errors[0x8];
1557
1558 u8 port_rcv_constraint_errors[0x8];
1559
1560 u8 reserved_at_70[0x8];
1561
1562 u8 link_overrun_errors[0x8];
1563
1564 u8 reserved_at_80[0x10];
1565
1566 u8 vl_15_dropped[0x10];
1567
Tim Wright133bea02017-05-01 17:30:08 +01001568 u8 reserved_at_a0[0x80];
1569
1570 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001571};
1572
Saeed Mahameede2816822015-05-28 22:28:40 +03001573struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1574 u8 transmit_queue_high[0x20];
1575
1576 u8 transmit_queue_low[0x20];
1577
Matan Barakb4ff3a32016-02-09 14:57:42 +02001578 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001579};
1580
1581struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1582 u8 rx_octets_high[0x20];
1583
1584 u8 rx_octets_low[0x20];
1585
Matan Barakb4ff3a32016-02-09 14:57:42 +02001586 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001587
1588 u8 rx_frames_high[0x20];
1589
1590 u8 rx_frames_low[0x20];
1591
1592 u8 tx_octets_high[0x20];
1593
1594 u8 tx_octets_low[0x20];
1595
Matan Barakb4ff3a32016-02-09 14:57:42 +02001596 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001597
1598 u8 tx_frames_high[0x20];
1599
1600 u8 tx_frames_low[0x20];
1601
1602 u8 rx_pause_high[0x20];
1603
1604 u8 rx_pause_low[0x20];
1605
1606 u8 rx_pause_duration_high[0x20];
1607
1608 u8 rx_pause_duration_low[0x20];
1609
1610 u8 tx_pause_high[0x20];
1611
1612 u8 tx_pause_low[0x20];
1613
1614 u8 tx_pause_duration_high[0x20];
1615
1616 u8 tx_pause_duration_low[0x20];
1617
1618 u8 rx_pause_transition_high[0x20];
1619
1620 u8 rx_pause_transition_low[0x20];
1621
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03001622 u8 reserved_at_3c0[0x40];
1623
1624 u8 device_stall_minor_watermark_cnt_high[0x20];
1625
1626 u8 device_stall_minor_watermark_cnt_low[0x20];
1627
1628 u8 device_stall_critical_watermark_cnt_high[0x20];
1629
1630 u8 device_stall_critical_watermark_cnt_low[0x20];
1631
1632 u8 reserved_at_480[0x340];
Saeed Mahameede2816822015-05-28 22:28:40 +03001633};
1634
1635struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1636 u8 port_transmit_wait_high[0x20];
1637
1638 u8 port_transmit_wait_low[0x20];
1639
Gal Pressman2dba0792017-06-18 14:56:45 +03001640 u8 reserved_at_40[0x100];
1641
1642 u8 rx_buffer_almost_full_high[0x20];
1643
1644 u8 rx_buffer_almost_full_low[0x20];
1645
1646 u8 rx_buffer_full_high[0x20];
1647
1648 u8 rx_buffer_full_low[0x20];
1649
1650 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001651};
1652
1653struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1654 u8 dot3stats_alignment_errors_high[0x20];
1655
1656 u8 dot3stats_alignment_errors_low[0x20];
1657
1658 u8 dot3stats_fcs_errors_high[0x20];
1659
1660 u8 dot3stats_fcs_errors_low[0x20];
1661
1662 u8 dot3stats_single_collision_frames_high[0x20];
1663
1664 u8 dot3stats_single_collision_frames_low[0x20];
1665
1666 u8 dot3stats_multiple_collision_frames_high[0x20];
1667
1668 u8 dot3stats_multiple_collision_frames_low[0x20];
1669
1670 u8 dot3stats_sqe_test_errors_high[0x20];
1671
1672 u8 dot3stats_sqe_test_errors_low[0x20];
1673
1674 u8 dot3stats_deferred_transmissions_high[0x20];
1675
1676 u8 dot3stats_deferred_transmissions_low[0x20];
1677
1678 u8 dot3stats_late_collisions_high[0x20];
1679
1680 u8 dot3stats_late_collisions_low[0x20];
1681
1682 u8 dot3stats_excessive_collisions_high[0x20];
1683
1684 u8 dot3stats_excessive_collisions_low[0x20];
1685
1686 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1687
1688 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1689
1690 u8 dot3stats_carrier_sense_errors_high[0x20];
1691
1692 u8 dot3stats_carrier_sense_errors_low[0x20];
1693
1694 u8 dot3stats_frame_too_longs_high[0x20];
1695
1696 u8 dot3stats_frame_too_longs_low[0x20];
1697
1698 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1699
1700 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1701
1702 u8 dot3stats_symbol_errors_high[0x20];
1703
1704 u8 dot3stats_symbol_errors_low[0x20];
1705
1706 u8 dot3control_in_unknown_opcodes_high[0x20];
1707
1708 u8 dot3control_in_unknown_opcodes_low[0x20];
1709
1710 u8 dot3in_pause_frames_high[0x20];
1711
1712 u8 dot3in_pause_frames_low[0x20];
1713
1714 u8 dot3out_pause_frames_high[0x20];
1715
1716 u8 dot3out_pause_frames_low[0x20];
1717
Matan Barakb4ff3a32016-02-09 14:57:42 +02001718 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001719};
1720
1721struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1722 u8 ether_stats_drop_events_high[0x20];
1723
1724 u8 ether_stats_drop_events_low[0x20];
1725
1726 u8 ether_stats_octets_high[0x20];
1727
1728 u8 ether_stats_octets_low[0x20];
1729
1730 u8 ether_stats_pkts_high[0x20];
1731
1732 u8 ether_stats_pkts_low[0x20];
1733
1734 u8 ether_stats_broadcast_pkts_high[0x20];
1735
1736 u8 ether_stats_broadcast_pkts_low[0x20];
1737
1738 u8 ether_stats_multicast_pkts_high[0x20];
1739
1740 u8 ether_stats_multicast_pkts_low[0x20];
1741
1742 u8 ether_stats_crc_align_errors_high[0x20];
1743
1744 u8 ether_stats_crc_align_errors_low[0x20];
1745
1746 u8 ether_stats_undersize_pkts_high[0x20];
1747
1748 u8 ether_stats_undersize_pkts_low[0x20];
1749
1750 u8 ether_stats_oversize_pkts_high[0x20];
1751
1752 u8 ether_stats_oversize_pkts_low[0x20];
1753
1754 u8 ether_stats_fragments_high[0x20];
1755
1756 u8 ether_stats_fragments_low[0x20];
1757
1758 u8 ether_stats_jabbers_high[0x20];
1759
1760 u8 ether_stats_jabbers_low[0x20];
1761
1762 u8 ether_stats_collisions_high[0x20];
1763
1764 u8 ether_stats_collisions_low[0x20];
1765
1766 u8 ether_stats_pkts64octets_high[0x20];
1767
1768 u8 ether_stats_pkts64octets_low[0x20];
1769
1770 u8 ether_stats_pkts65to127octets_high[0x20];
1771
1772 u8 ether_stats_pkts65to127octets_low[0x20];
1773
1774 u8 ether_stats_pkts128to255octets_high[0x20];
1775
1776 u8 ether_stats_pkts128to255octets_low[0x20];
1777
1778 u8 ether_stats_pkts256to511octets_high[0x20];
1779
1780 u8 ether_stats_pkts256to511octets_low[0x20];
1781
1782 u8 ether_stats_pkts512to1023octets_high[0x20];
1783
1784 u8 ether_stats_pkts512to1023octets_low[0x20];
1785
1786 u8 ether_stats_pkts1024to1518octets_high[0x20];
1787
1788 u8 ether_stats_pkts1024to1518octets_low[0x20];
1789
1790 u8 ether_stats_pkts1519to2047octets_high[0x20];
1791
1792 u8 ether_stats_pkts1519to2047octets_low[0x20];
1793
1794 u8 ether_stats_pkts2048to4095octets_high[0x20];
1795
1796 u8 ether_stats_pkts2048to4095octets_low[0x20];
1797
1798 u8 ether_stats_pkts4096to8191octets_high[0x20];
1799
1800 u8 ether_stats_pkts4096to8191octets_low[0x20];
1801
1802 u8 ether_stats_pkts8192to10239octets_high[0x20];
1803
1804 u8 ether_stats_pkts8192to10239octets_low[0x20];
1805
Matan Barakb4ff3a32016-02-09 14:57:42 +02001806 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001807};
1808
1809struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1810 u8 if_in_octets_high[0x20];
1811
1812 u8 if_in_octets_low[0x20];
1813
1814 u8 if_in_ucast_pkts_high[0x20];
1815
1816 u8 if_in_ucast_pkts_low[0x20];
1817
1818 u8 if_in_discards_high[0x20];
1819
1820 u8 if_in_discards_low[0x20];
1821
1822 u8 if_in_errors_high[0x20];
1823
1824 u8 if_in_errors_low[0x20];
1825
1826 u8 if_in_unknown_protos_high[0x20];
1827
1828 u8 if_in_unknown_protos_low[0x20];
1829
1830 u8 if_out_octets_high[0x20];
1831
1832 u8 if_out_octets_low[0x20];
1833
1834 u8 if_out_ucast_pkts_high[0x20];
1835
1836 u8 if_out_ucast_pkts_low[0x20];
1837
1838 u8 if_out_discards_high[0x20];
1839
1840 u8 if_out_discards_low[0x20];
1841
1842 u8 if_out_errors_high[0x20];
1843
1844 u8 if_out_errors_low[0x20];
1845
1846 u8 if_in_multicast_pkts_high[0x20];
1847
1848 u8 if_in_multicast_pkts_low[0x20];
1849
1850 u8 if_in_broadcast_pkts_high[0x20];
1851
1852 u8 if_in_broadcast_pkts_low[0x20];
1853
1854 u8 if_out_multicast_pkts_high[0x20];
1855
1856 u8 if_out_multicast_pkts_low[0x20];
1857
1858 u8 if_out_broadcast_pkts_high[0x20];
1859
1860 u8 if_out_broadcast_pkts_low[0x20];
1861
Matan Barakb4ff3a32016-02-09 14:57:42 +02001862 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001863};
1864
1865struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1866 u8 a_frames_transmitted_ok_high[0x20];
1867
1868 u8 a_frames_transmitted_ok_low[0x20];
1869
1870 u8 a_frames_received_ok_high[0x20];
1871
1872 u8 a_frames_received_ok_low[0x20];
1873
1874 u8 a_frame_check_sequence_errors_high[0x20];
1875
1876 u8 a_frame_check_sequence_errors_low[0x20];
1877
1878 u8 a_alignment_errors_high[0x20];
1879
1880 u8 a_alignment_errors_low[0x20];
1881
1882 u8 a_octets_transmitted_ok_high[0x20];
1883
1884 u8 a_octets_transmitted_ok_low[0x20];
1885
1886 u8 a_octets_received_ok_high[0x20];
1887
1888 u8 a_octets_received_ok_low[0x20];
1889
1890 u8 a_multicast_frames_xmitted_ok_high[0x20];
1891
1892 u8 a_multicast_frames_xmitted_ok_low[0x20];
1893
1894 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1895
1896 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1897
1898 u8 a_multicast_frames_received_ok_high[0x20];
1899
1900 u8 a_multicast_frames_received_ok_low[0x20];
1901
1902 u8 a_broadcast_frames_received_ok_high[0x20];
1903
1904 u8 a_broadcast_frames_received_ok_low[0x20];
1905
1906 u8 a_in_range_length_errors_high[0x20];
1907
1908 u8 a_in_range_length_errors_low[0x20];
1909
1910 u8 a_out_of_range_length_field_high[0x20];
1911
1912 u8 a_out_of_range_length_field_low[0x20];
1913
1914 u8 a_frame_too_long_errors_high[0x20];
1915
1916 u8 a_frame_too_long_errors_low[0x20];
1917
1918 u8 a_symbol_error_during_carrier_high[0x20];
1919
1920 u8 a_symbol_error_during_carrier_low[0x20];
1921
1922 u8 a_mac_control_frames_transmitted_high[0x20];
1923
1924 u8 a_mac_control_frames_transmitted_low[0x20];
1925
1926 u8 a_mac_control_frames_received_high[0x20];
1927
1928 u8 a_mac_control_frames_received_low[0x20];
1929
1930 u8 a_unsupported_opcodes_received_high[0x20];
1931
1932 u8 a_unsupported_opcodes_received_low[0x20];
1933
1934 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1935
1936 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1937
1938 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1939
1940 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1941
Matan Barakb4ff3a32016-02-09 14:57:42 +02001942 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001943};
1944
Gal Pressman8ed1a632016-11-17 13:46:01 +02001945struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1946 u8 life_time_counter_high[0x20];
1947
1948 u8 life_time_counter_low[0x20];
1949
1950 u8 rx_errors[0x20];
1951
1952 u8 tx_errors[0x20];
1953
1954 u8 l0_to_recovery_eieos[0x20];
1955
1956 u8 l0_to_recovery_ts[0x20];
1957
1958 u8 l0_to_recovery_framing[0x20];
1959
1960 u8 l0_to_recovery_retrain[0x20];
1961
1962 u8 crc_error_dllp[0x20];
1963
1964 u8 crc_error_tlp[0x20];
1965
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001966 u8 tx_overflow_buffer_pkt_high[0x20];
1967
1968 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001969
1970 u8 outbound_stalled_reads[0x20];
1971
1972 u8 outbound_stalled_writes[0x20];
1973
1974 u8 outbound_stalled_reads_events[0x20];
1975
1976 u8 outbound_stalled_writes_events[0x20];
1977
1978 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001979};
1980
Saeed Mahameede2816822015-05-28 22:28:40 +03001981struct mlx5_ifc_cmd_inter_comp_event_bits {
1982 u8 command_completion_vector[0x20];
1983
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985};
1986
1987struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001988 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001989 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001990 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001991 u8 vl[0x4];
1992
Matan Barakb4ff3a32016-02-09 14:57:42 +02001993 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001994};
1995
1996struct mlx5_ifc_db_bf_congestion_event_bits {
1997 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001998 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001999 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002000 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002001
Matan Barakb4ff3a32016-02-09 14:57:42 +02002002 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002003};
2004
2005struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002006 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002007
2008 u8 gpio_event_hi[0x20];
2009
2010 u8 gpio_event_lo[0x20];
2011
Matan Barakb4ff3a32016-02-09 14:57:42 +02002012 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002013};
2014
2015struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002016 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002017
2018 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002019 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002020
Matan Barakb4ff3a32016-02-09 14:57:42 +02002021 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002022};
2023
2024struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002025 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002026};
2027
2028enum {
2029 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
2030 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
2031};
2032
2033struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002034 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002035 u8 cqn[0x18];
2036
Matan Barakb4ff3a32016-02-09 14:57:42 +02002037 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002038
Matan Barakb4ff3a32016-02-09 14:57:42 +02002039 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002040 u8 syndrome[0x8];
2041
Matan Barakb4ff3a32016-02-09 14:57:42 +02002042 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002043};
2044
2045struct mlx5_ifc_rdma_page_fault_event_bits {
2046 u8 bytes_committed[0x20];
2047
2048 u8 r_key[0x20];
2049
Matan Barakb4ff3a32016-02-09 14:57:42 +02002050 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002051 u8 packet_len[0x10];
2052
2053 u8 rdma_op_len[0x20];
2054
2055 u8 rdma_va[0x40];
2056
Matan Barakb4ff3a32016-02-09 14:57:42 +02002057 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002058 u8 rdma[0x1];
2059 u8 write[0x1];
2060 u8 requestor[0x1];
2061 u8 qp_number[0x18];
2062};
2063
2064struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2065 u8 bytes_committed[0x20];
2066
Matan Barakb4ff3a32016-02-09 14:57:42 +02002067 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002068 u8 wqe_index[0x10];
2069
Matan Barakb4ff3a32016-02-09 14:57:42 +02002070 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002071 u8 len[0x10];
2072
Matan Barakb4ff3a32016-02-09 14:57:42 +02002073 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002074
Matan Barakb4ff3a32016-02-09 14:57:42 +02002075 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002076 u8 rdma[0x1];
2077 u8 write_read[0x1];
2078 u8 requestor[0x1];
2079 u8 qpn[0x18];
2080};
2081
2082struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002083 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002084
2085 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002086 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002087
Matan Barakb4ff3a32016-02-09 14:57:42 +02002088 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002089 u8 qpn_rqn_sqn[0x18];
2090};
2091
2092struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002093 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002094
Matan Barakb4ff3a32016-02-09 14:57:42 +02002095 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002096 u8 dct_number[0x18];
2097};
2098
2099struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002100 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002101
Matan Barakb4ff3a32016-02-09 14:57:42 +02002102 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002103 u8 cq_number[0x18];
2104};
2105
2106enum {
2107 MLX5_QPC_STATE_RST = 0x0,
2108 MLX5_QPC_STATE_INIT = 0x1,
2109 MLX5_QPC_STATE_RTR = 0x2,
2110 MLX5_QPC_STATE_RTS = 0x3,
2111 MLX5_QPC_STATE_SQER = 0x4,
2112 MLX5_QPC_STATE_ERR = 0x6,
2113 MLX5_QPC_STATE_SQD = 0x7,
2114 MLX5_QPC_STATE_SUSPENDED = 0x9,
2115};
2116
2117enum {
2118 MLX5_QPC_ST_RC = 0x0,
2119 MLX5_QPC_ST_UC = 0x1,
2120 MLX5_QPC_ST_UD = 0x2,
2121 MLX5_QPC_ST_XRC = 0x3,
2122 MLX5_QPC_ST_DCI = 0x5,
2123 MLX5_QPC_ST_QP0 = 0x7,
2124 MLX5_QPC_ST_QP1 = 0x8,
2125 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2126 MLX5_QPC_ST_REG_UMR = 0xc,
2127};
2128
2129enum {
2130 MLX5_QPC_PM_STATE_ARMED = 0x0,
2131 MLX5_QPC_PM_STATE_REARM = 0x1,
2132 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2133 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2134};
2135
2136enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002137 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2138};
2139
2140enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002141 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2142 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2143};
2144
2145enum {
2146 MLX5_QPC_MTU_256_BYTES = 0x1,
2147 MLX5_QPC_MTU_512_BYTES = 0x2,
2148 MLX5_QPC_MTU_1K_BYTES = 0x3,
2149 MLX5_QPC_MTU_2K_BYTES = 0x4,
2150 MLX5_QPC_MTU_4K_BYTES = 0x5,
2151 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2152};
2153
2154enum {
2155 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2156 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2157 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2158 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2159 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2160 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2161 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2162 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2163};
2164
2165enum {
2166 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2167 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2168 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2169};
2170
2171enum {
2172 MLX5_QPC_CS_RES_DISABLE = 0x0,
2173 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2174 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2175};
2176
2177struct mlx5_ifc_qpc_bits {
2178 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002179 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002180 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002181 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002182 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002183 u8 reserved_at_15[0x3];
2184 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002185 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002186 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002187
2188 u8 wq_signature[0x1];
2189 u8 block_lb_mc[0x1];
2190 u8 atomic_like_write_en[0x1];
2191 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002192 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002193 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002194 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002195 u8 pd[0x18];
2196
2197 u8 mtu[0x3];
2198 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002199 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002200 u8 log_rq_size[0x4];
2201 u8 log_rq_stride[0x3];
2202 u8 no_sq[0x1];
2203 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002204 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002205 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002206 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002207
2208 u8 counter_set_id[0x8];
2209 u8 uar_page[0x18];
2210
Matan Barakb4ff3a32016-02-09 14:57:42 +02002211 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002212 u8 user_index[0x18];
2213
Matan Barakb4ff3a32016-02-09 14:57:42 +02002214 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002215 u8 log_page_size[0x5];
2216 u8 remote_qpn[0x18];
2217
2218 struct mlx5_ifc_ads_bits primary_address_path;
2219
2220 struct mlx5_ifc_ads_bits secondary_address_path;
2221
2222 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002223 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002224 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002225 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002226 u8 retry_count[0x3];
2227 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002228 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002229 u8 fre[0x1];
2230 u8 cur_rnr_retry[0x3];
2231 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002232 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002233
Matan Barakb4ff3a32016-02-09 14:57:42 +02002234 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002235
Matan Barakb4ff3a32016-02-09 14:57:42 +02002236 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002237 u8 next_send_psn[0x18];
2238
Matan Barakb4ff3a32016-02-09 14:57:42 +02002239 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002240 u8 cqn_snd[0x18];
2241
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002242 u8 reserved_at_400[0x8];
2243 u8 deth_sqpn[0x18];
2244
2245 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002246
Matan Barakb4ff3a32016-02-09 14:57:42 +02002247 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002248 u8 last_acked_psn[0x18];
2249
Matan Barakb4ff3a32016-02-09 14:57:42 +02002250 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002251 u8 ssn[0x18];
2252
Matan Barakb4ff3a32016-02-09 14:57:42 +02002253 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002255 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002256 u8 atomic_mode[0x4];
2257 u8 rre[0x1];
2258 u8 rwe[0x1];
2259 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002260 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002261 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002262 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002263 u8 cd_slave_receive[0x1];
2264 u8 cd_slave_send[0x1];
2265 u8 cd_master[0x1];
2266
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268 u8 min_rnr_nak[0x5];
2269 u8 next_rcv_psn[0x18];
2270
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272 u8 xrcd[0x18];
2273
Matan Barakb4ff3a32016-02-09 14:57:42 +02002274 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002275 u8 cqn_rcv[0x18];
2276
2277 u8 dbr_addr[0x40];
2278
2279 u8 q_key[0x20];
2280
Matan Barakb4ff3a32016-02-09 14:57:42 +02002281 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002282 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002283 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002284
Matan Barakb4ff3a32016-02-09 14:57:42 +02002285 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002286 u8 rmsn[0x18];
2287
2288 u8 hw_sq_wqebb_counter[0x10];
2289 u8 sw_sq_wqebb_counter[0x10];
2290
2291 u8 hw_rq_counter[0x20];
2292
2293 u8 sw_rq_counter[0x20];
2294
Matan Barakb4ff3a32016-02-09 14:57:42 +02002295 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002296
Matan Barakb4ff3a32016-02-09 14:57:42 +02002297 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002298 u8 cgs[0x1];
2299 u8 cs_req[0x8];
2300 u8 cs_res[0x8];
2301
2302 u8 dc_access_key[0x40];
2303
Matan Barakb4ff3a32016-02-09 14:57:42 +02002304 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002305};
2306
2307struct mlx5_ifc_roce_addr_layout_bits {
2308 u8 source_l3_address[16][0x8];
2309
Matan Barakb4ff3a32016-02-09 14:57:42 +02002310 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002311 u8 vlan_valid[0x1];
2312 u8 vlan_id[0xc];
2313 u8 source_mac_47_32[0x10];
2314
2315 u8 source_mac_31_0[0x20];
2316
Matan Barakb4ff3a32016-02-09 14:57:42 +02002317 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002318 u8 roce_l3_type[0x4];
2319 u8 roce_version[0x8];
2320
Matan Barakb4ff3a32016-02-09 14:57:42 +02002321 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002322};
2323
2324union mlx5_ifc_hca_cap_union_bits {
2325 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2326 struct mlx5_ifc_odp_cap_bits odp_cap;
2327 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2328 struct mlx5_ifc_roce_cap_bits roce_cap;
2329 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2330 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002331 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002332 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002333 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002334 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002335 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002336 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002337};
2338
2339enum {
2340 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2341 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2342 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002343 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002344 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2345 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002346 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Or Gerlitz0c068972018-01-28 20:14:20 +02002347 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
2348 MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH = 0x100,
2349};
2350
2351struct mlx5_ifc_vlan_bits {
2352 u8 ethtype[0x10];
2353 u8 prio[0x3];
2354 u8 cfi[0x1];
2355 u8 vid[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002356};
2357
2358struct mlx5_ifc_flow_context_bits {
Or Gerlitz0c068972018-01-28 20:14:20 +02002359 struct mlx5_ifc_vlan_bits push_vlan;
Saeed Mahameede2816822015-05-28 22:28:40 +03002360
2361 u8 group_id[0x20];
2362
Matan Barakb4ff3a32016-02-09 14:57:42 +02002363 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002364 u8 flow_tag[0x18];
2365
Matan Barakb4ff3a32016-02-09 14:57:42 +02002366 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002367 u8 action[0x10];
2368
Matan Barakb4ff3a32016-02-09 14:57:42 +02002369 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002370 u8 destination_list_size[0x18];
2371
Amir Vadai9dc0b282016-05-13 12:55:39 +00002372 u8 reserved_at_a0[0x8];
2373 u8 flow_counter_list_size[0x18];
2374
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002375 u8 encap_id[0x20];
2376
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002377 u8 modify_header_id[0x20];
2378
2379 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002380
2381 struct mlx5_ifc_fte_match_param_bits match_value;
2382
Matan Barakb4ff3a32016-02-09 14:57:42 +02002383 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002384
Amir Vadai9dc0b282016-05-13 12:55:39 +00002385 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002386};
2387
2388enum {
2389 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2390 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2391};
2392
2393struct mlx5_ifc_xrc_srqc_bits {
2394 u8 state[0x4];
2395 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002396 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002397
2398 u8 wq_signature[0x1];
2399 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002400 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002401 u8 rlky[0x1];
2402 u8 basic_cyclic_rcv_wqe[0x1];
2403 u8 log_rq_stride[0x3];
2404 u8 xrcd[0x18];
2405
2406 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002407 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408 u8 cqn[0x18];
2409
Matan Barakb4ff3a32016-02-09 14:57:42 +02002410 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002411
2412 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002413 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002414 u8 log_page_size[0x6];
2415 u8 user_index[0x18];
2416
Matan Barakb4ff3a32016-02-09 14:57:42 +02002417 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002418
Matan Barakb4ff3a32016-02-09 14:57:42 +02002419 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002420 u8 pd[0x18];
2421
2422 u8 lwm[0x10];
2423 u8 wqe_cnt[0x10];
2424
Matan Barakb4ff3a32016-02-09 14:57:42 +02002425 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002426
2427 u8 db_record_addr_h[0x20];
2428
2429 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002430 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002431
Matan Barakb4ff3a32016-02-09 14:57:42 +02002432 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002433};
2434
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02002435struct mlx5_ifc_vnic_diagnostic_statistics_bits {
2436 u8 counter_error_queues[0x20];
2437
2438 u8 total_error_queues[0x20];
2439
2440 u8 send_queue_priority_update_flow[0x20];
2441
2442 u8 reserved_at_60[0x20];
2443
2444 u8 nic_receive_steering_discard[0x40];
2445
2446 u8 receive_discard_vport_down[0x40];
2447
2448 u8 transmit_discard_vport_down[0x40];
2449
2450 u8 reserved_at_140[0xec0];
2451};
2452
Saeed Mahameede2816822015-05-28 22:28:40 +03002453struct mlx5_ifc_traffic_counter_bits {
2454 u8 packets[0x40];
2455
2456 u8 octets[0x40];
2457};
2458
2459struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002460 u8 strict_lag_tx_port_affinity[0x1];
2461 u8 reserved_at_1[0x3];
2462 u8 lag_tx_port_affinity[0x04];
2463
2464 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002465 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002466 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002467
Matan Barakb4ff3a32016-02-09 14:57:42 +02002468 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002469
Matan Barakb4ff3a32016-02-09 14:57:42 +02002470 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002471 u8 transport_domain[0x18];
2472
Erez Shitrit500a3d02017-04-13 06:36:51 +03002473 u8 reserved_at_140[0x8];
2474 u8 underlay_qpn[0x18];
2475 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002476};
2477
2478enum {
2479 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2480 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2481};
2482
2483enum {
2484 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2485 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2486};
2487
2488enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002489 MLX5_RX_HASH_FN_NONE = 0x0,
2490 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2491 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002492};
2493
2494enum {
2495 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2496 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2497};
2498
2499struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002500 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002501
2502 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002503 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002504
Matan Barakb4ff3a32016-02-09 14:57:42 +02002505 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002506
Matan Barakb4ff3a32016-02-09 14:57:42 +02002507 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002508 u8 lro_timeout_period_usecs[0x10];
2509 u8 lro_enable_mask[0x4];
2510 u8 lro_max_ip_payload_size[0x8];
2511
Matan Barakb4ff3a32016-02-09 14:57:42 +02002512 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002513
Matan Barakb4ff3a32016-02-09 14:57:42 +02002514 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002515 u8 inline_rqn[0x18];
2516
2517 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002518 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002519 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002520 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002521 u8 indirect_table[0x18];
2522
2523 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002524 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002525 u8 self_lb_block[0x2];
2526 u8 transport_domain[0x18];
2527
2528 u8 rx_hash_toeplitz_key[10][0x20];
2529
2530 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2531
2532 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2533
Matan Barakb4ff3a32016-02-09 14:57:42 +02002534 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002535};
2536
2537enum {
2538 MLX5_SRQC_STATE_GOOD = 0x0,
2539 MLX5_SRQC_STATE_ERROR = 0x1,
2540};
2541
2542struct mlx5_ifc_srqc_bits {
2543 u8 state[0x4];
2544 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002545 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002546
2547 u8 wq_signature[0x1];
2548 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002549 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002550 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002551 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002552 u8 log_rq_stride[0x3];
2553 u8 xrcd[0x18];
2554
2555 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002556 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002557 u8 cqn[0x18];
2558
Matan Barakb4ff3a32016-02-09 14:57:42 +02002559 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002560
Matan Barakb4ff3a32016-02-09 14:57:42 +02002561 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002562 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002563 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002564
Matan Barakb4ff3a32016-02-09 14:57:42 +02002565 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002566
Matan Barakb4ff3a32016-02-09 14:57:42 +02002567 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002568 u8 pd[0x18];
2569
2570 u8 lwm[0x10];
2571 u8 wqe_cnt[0x10];
2572
Matan Barakb4ff3a32016-02-09 14:57:42 +02002573 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002574
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002575 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002576
Matan Barakb4ff3a32016-02-09 14:57:42 +02002577 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002578};
2579
2580enum {
2581 MLX5_SQC_STATE_RST = 0x0,
2582 MLX5_SQC_STATE_RDY = 0x1,
2583 MLX5_SQC_STATE_ERR = 0x3,
2584};
2585
2586struct mlx5_ifc_sqc_bits {
2587 u8 rlky[0x1];
2588 u8 cd_master[0x1];
2589 u8 fre[0x1];
2590 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002591 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002592 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002593 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002594 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002595 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002596 u8 hairpin[0x1];
2597 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002598
Matan Barakb4ff3a32016-02-09 14:57:42 +02002599 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002600 u8 user_index[0x18];
2601
Matan Barakb4ff3a32016-02-09 14:57:42 +02002602 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002603 u8 cqn[0x18];
2604
Or Gerlitz40817cd2017-06-25 12:38:45 +03002605 u8 reserved_at_60[0x8];
2606 u8 hairpin_peer_rq[0x18];
2607
2608 u8 reserved_at_80[0x10];
2609 u8 hairpin_peer_vhca[0x10];
2610
2611 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002612
Saeed Mahameed74862162016-06-09 15:11:34 +03002613 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002614 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002615 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002616
Matan Barakb4ff3a32016-02-09 14:57:42 +02002617 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002618
Matan Barakb4ff3a32016-02-09 14:57:42 +02002619 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002620 u8 tis_num_0[0x18];
2621
2622 struct mlx5_ifc_wq_bits wq;
2623};
2624
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002625enum {
2626 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2627 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2628 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2629 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2630};
2631
2632struct mlx5_ifc_scheduling_context_bits {
2633 u8 element_type[0x8];
2634 u8 reserved_at_8[0x18];
2635
2636 u8 element_attributes[0x20];
2637
2638 u8 parent_element_id[0x20];
2639
2640 u8 reserved_at_60[0x40];
2641
2642 u8 bw_share[0x20];
2643
2644 u8 max_average_bw[0x20];
2645
2646 u8 reserved_at_e0[0x120];
2647};
2648
Saeed Mahameede2816822015-05-28 22:28:40 +03002649struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002650 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002651
Matan Barakb4ff3a32016-02-09 14:57:42 +02002652 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002653 u8 rqt_max_size[0x10];
2654
Matan Barakb4ff3a32016-02-09 14:57:42 +02002655 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002656 u8 rqt_actual_size[0x10];
2657
Matan Barakb4ff3a32016-02-09 14:57:42 +02002658 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002659
2660 struct mlx5_ifc_rq_num_bits rq_num[0];
2661};
2662
2663enum {
2664 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2665 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2666};
2667
2668enum {
2669 MLX5_RQC_STATE_RST = 0x0,
2670 MLX5_RQC_STATE_RDY = 0x1,
2671 MLX5_RQC_STATE_ERR = 0x3,
2672};
2673
2674struct mlx5_ifc_rqc_bits {
2675 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002676 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002677 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002678 u8 vsd[0x1];
2679 u8 mem_rq_type[0x4];
2680 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002681 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002682 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002683 u8 hairpin[0x1];
2684 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002685
Matan Barakb4ff3a32016-02-09 14:57:42 +02002686 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002687 u8 user_index[0x18];
2688
Matan Barakb4ff3a32016-02-09 14:57:42 +02002689 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002690 u8 cqn[0x18];
2691
2692 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002693 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002694
Matan Barakb4ff3a32016-02-09 14:57:42 +02002695 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002696 u8 rmpn[0x18];
2697
Or Gerlitz40817cd2017-06-25 12:38:45 +03002698 u8 reserved_at_a0[0x8];
2699 u8 hairpin_peer_sq[0x18];
2700
2701 u8 reserved_at_c0[0x10];
2702 u8 hairpin_peer_vhca[0x10];
2703
2704 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002705
2706 struct mlx5_ifc_wq_bits wq;
2707};
2708
2709enum {
2710 MLX5_RMPC_STATE_RDY = 0x1,
2711 MLX5_RMPC_STATE_ERR = 0x3,
2712};
2713
2714struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002715 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002716 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002717 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002718
2719 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002720 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002721
Matan Barakb4ff3a32016-02-09 14:57:42 +02002722 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002723
2724 struct mlx5_ifc_wq_bits wq;
2725};
2726
Saeed Mahameede2816822015-05-28 22:28:40 +03002727struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002728 u8 reserved_at_0[0x5];
2729 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002730 u8 reserved_at_8[0x15];
2731 u8 disable_mc_local_lb[0x1];
2732 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002733 u8 roce_en[0x1];
2734
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002735 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002736 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002737 u8 event_on_mtu[0x1];
2738 u8 event_on_promisc_change[0x1];
2739 u8 event_on_vlan_change[0x1];
2740 u8 event_on_mc_address_change[0x1];
2741 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002742
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002743 u8 reserved_at_40[0xc];
2744
2745 u8 affiliation_criteria[0x4];
2746 u8 affiliated_vhca_id[0x10];
2747
2748 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002749
2750 u8 mtu[0x10];
2751
Achiad Shochat9efa7522015-12-23 18:47:20 +02002752 u8 system_image_guid[0x40];
2753 u8 port_guid[0x40];
2754 u8 node_guid[0x40];
2755
Matan Barakb4ff3a32016-02-09 14:57:42 +02002756 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002757 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002758 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002759
2760 u8 promisc_uc[0x1];
2761 u8 promisc_mc[0x1];
2762 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002763 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002764 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002765 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002766 u8 allowed_list_size[0xc];
2767
2768 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2769
Matan Barakb4ff3a32016-02-09 14:57:42 +02002770 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002771
2772 u8 current_uc_mac_address[0][0x40];
2773};
2774
2775enum {
2776 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2777 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2778 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002779 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002780 MLX5_MKC_ACCESS_MODE_MEMIC = 0x5,
Saeed Mahameede2816822015-05-28 22:28:40 +03002781};
2782
2783struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002784 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002785 u8 free[0x1];
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002786 u8 reserved_at_2[0x1];
2787 u8 access_mode_4_2[0x3];
2788 u8 reserved_at_6[0x7];
2789 u8 relaxed_ordering_write[0x1];
2790 u8 reserved_at_e[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002791 u8 small_fence_on_rdma_read_response[0x1];
2792 u8 umr_en[0x1];
2793 u8 a[0x1];
2794 u8 rw[0x1];
2795 u8 rr[0x1];
2796 u8 lw[0x1];
2797 u8 lr[0x1];
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002798 u8 access_mode_1_0[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002799 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002800
2801 u8 qpn[0x18];
2802 u8 mkey_7_0[0x8];
2803
Matan Barakb4ff3a32016-02-09 14:57:42 +02002804 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002805
2806 u8 length64[0x1];
2807 u8 bsf_en[0x1];
2808 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002809 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002810 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002811 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002812 u8 en_rinval[0x1];
2813 u8 pd[0x18];
2814
2815 u8 start_addr[0x40];
2816
2817 u8 len[0x40];
2818
2819 u8 bsf_octword_size[0x20];
2820
Matan Barakb4ff3a32016-02-09 14:57:42 +02002821 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002822
2823 u8 translations_octword_size[0x20];
2824
Matan Barakb4ff3a32016-02-09 14:57:42 +02002825 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002826 u8 log_page_size[0x5];
2827
Matan Barakb4ff3a32016-02-09 14:57:42 +02002828 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002829};
2830
2831struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002832 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002833 u8 pkey[0x10];
2834};
2835
2836struct mlx5_ifc_array128_auto_bits {
2837 u8 array128_auto[16][0x8];
2838};
2839
2840struct mlx5_ifc_hca_vport_context_bits {
2841 u8 field_select[0x20];
2842
Matan Barakb4ff3a32016-02-09 14:57:42 +02002843 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002844
2845 u8 sm_virt_aware[0x1];
2846 u8 has_smi[0x1];
2847 u8 has_raw[0x1];
2848 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002849 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002850 u8 port_physical_state[0x4];
2851 u8 vport_state_policy[0x4];
2852 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002853 u8 vport_state[0x4];
2854
Matan Barakb4ff3a32016-02-09 14:57:42 +02002855 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002856
2857 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002858
2859 u8 port_guid[0x40];
2860
2861 u8 node_guid[0x40];
2862
2863 u8 cap_mask1[0x20];
2864
2865 u8 cap_mask1_field_select[0x20];
2866
2867 u8 cap_mask2[0x20];
2868
2869 u8 cap_mask2_field_select[0x20];
2870
Matan Barakb4ff3a32016-02-09 14:57:42 +02002871 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002872
2873 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002874 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002875 u8 init_type_reply[0x4];
2876 u8 lmc[0x3];
2877 u8 subnet_timeout[0x5];
2878
2879 u8 sm_lid[0x10];
2880 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002881 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002882
2883 u8 qkey_violation_counter[0x10];
2884 u8 pkey_violation_counter[0x10];
2885
Matan Barakb4ff3a32016-02-09 14:57:42 +02002886 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002887};
2888
Saeed Mahameedd6666752015-12-01 18:03:22 +02002889struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002891 u8 vport_svlan_strip[0x1];
2892 u8 vport_cvlan_strip[0x1];
2893 u8 vport_svlan_insert[0x1];
2894 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002895 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002896
Matan Barakb4ff3a32016-02-09 14:57:42 +02002897 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002898
2899 u8 svlan_cfi[0x1];
2900 u8 svlan_pcp[0x3];
2901 u8 svlan_id[0xc];
2902 u8 cvlan_cfi[0x1];
2903 u8 cvlan_pcp[0x3];
2904 u8 cvlan_id[0xc];
2905
Matan Barakb4ff3a32016-02-09 14:57:42 +02002906 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002907};
2908
Saeed Mahameede2816822015-05-28 22:28:40 +03002909enum {
2910 MLX5_EQC_STATUS_OK = 0x0,
2911 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2912};
2913
2914enum {
2915 MLX5_EQC_ST_ARMED = 0x9,
2916 MLX5_EQC_ST_FIRED = 0xa,
2917};
2918
2919struct mlx5_ifc_eqc_bits {
2920 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002921 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002922 u8 ec[0x1];
2923 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002925 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002926 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002927
Matan Barakb4ff3a32016-02-09 14:57:42 +02002928 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002929
Matan Barakb4ff3a32016-02-09 14:57:42 +02002930 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002931 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002932 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002933
Matan Barakb4ff3a32016-02-09 14:57:42 +02002934 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002935 u8 log_eq_size[0x5];
2936 u8 uar_page[0x18];
2937
Matan Barakb4ff3a32016-02-09 14:57:42 +02002938 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002939
Matan Barakb4ff3a32016-02-09 14:57:42 +02002940 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002941 u8 intr[0x8];
2942
Matan Barakb4ff3a32016-02-09 14:57:42 +02002943 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002944 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002945 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002946
Matan Barakb4ff3a32016-02-09 14:57:42 +02002947 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002948
Matan Barakb4ff3a32016-02-09 14:57:42 +02002949 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002950 u8 consumer_counter[0x18];
2951
Matan Barakb4ff3a32016-02-09 14:57:42 +02002952 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002953 u8 producer_counter[0x18];
2954
Matan Barakb4ff3a32016-02-09 14:57:42 +02002955 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002956};
2957
2958enum {
2959 MLX5_DCTC_STATE_ACTIVE = 0x0,
2960 MLX5_DCTC_STATE_DRAINING = 0x1,
2961 MLX5_DCTC_STATE_DRAINED = 0x2,
2962};
2963
2964enum {
2965 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2966 MLX5_DCTC_CS_RES_NA = 0x1,
2967 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2968};
2969
2970enum {
2971 MLX5_DCTC_MTU_256_BYTES = 0x1,
2972 MLX5_DCTC_MTU_512_BYTES = 0x2,
2973 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2974 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2975 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2976};
2977
2978struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002979 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002980 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002981 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002982
Matan Barakb4ff3a32016-02-09 14:57:42 +02002983 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002984 u8 user_index[0x18];
2985
Matan Barakb4ff3a32016-02-09 14:57:42 +02002986 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002987 u8 cqn[0x18];
2988
2989 u8 counter_set_id[0x8];
2990 u8 atomic_mode[0x4];
2991 u8 rre[0x1];
2992 u8 rwe[0x1];
2993 u8 rae[0x1];
2994 u8 atomic_like_write_en[0x1];
2995 u8 latency_sensitive[0x1];
2996 u8 rlky[0x1];
2997 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002998 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002999
Matan Barakb4ff3a32016-02-09 14:57:42 +02003000 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003001 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003002 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003003 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003004 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003005
Matan Barakb4ff3a32016-02-09 14:57:42 +02003006 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03003007 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003008
Matan Barakb4ff3a32016-02-09 14:57:42 +02003009 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003010 u8 pd[0x18];
3011
3012 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003013 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003014 u8 flow_label[0x14];
3015
3016 u8 dc_access_key[0x40];
3017
Matan Barakb4ff3a32016-02-09 14:57:42 +02003018 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03003019 u8 mtu[0x3];
3020 u8 port[0x8];
3021 u8 pkey_index[0x10];
3022
Matan Barakb4ff3a32016-02-09 14:57:42 +02003023 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003024 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003025 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003026 u8 hop_limit[0x8];
3027
3028 u8 dc_access_key_violation_count[0x20];
3029
Matan Barakb4ff3a32016-02-09 14:57:42 +02003030 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003031 u8 dei_cfi[0x1];
3032 u8 eth_prio[0x3];
3033 u8 ecn[0x2];
3034 u8 dscp[0x6];
3035
Matan Barakb4ff3a32016-02-09 14:57:42 +02003036 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003037};
3038
3039enum {
3040 MLX5_CQC_STATUS_OK = 0x0,
3041 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
3042 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
3043};
3044
3045enum {
3046 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
3047 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
3048};
3049
3050enum {
3051 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
3052 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
3053 MLX5_CQC_ST_FIRED = 0xa,
3054};
3055
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003056enum {
3057 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
3058 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03003059 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003060};
3061
Saeed Mahameede2816822015-05-28 22:28:40 +03003062struct mlx5_ifc_cqc_bits {
3063 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003064 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003065 u8 cqe_sz[0x3];
3066 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003067 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003068 u8 scqe_break_moderation_en[0x1];
3069 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003070 u8 cq_period_mode[0x2];
3071 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003072 u8 mini_cqe_res_format[0x2];
3073 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003074 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003075
Matan Barakb4ff3a32016-02-09 14:57:42 +02003076 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003077
Matan Barakb4ff3a32016-02-09 14:57:42 +02003078 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003079 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003080 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003081
Matan Barakb4ff3a32016-02-09 14:57:42 +02003082 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003083 u8 log_cq_size[0x5];
3084 u8 uar_page[0x18];
3085
Matan Barakb4ff3a32016-02-09 14:57:42 +02003086 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003087 u8 cq_period[0xc];
3088 u8 cq_max_count[0x10];
3089
Matan Barakb4ff3a32016-02-09 14:57:42 +02003090 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003091 u8 c_eqn[0x8];
3092
Matan Barakb4ff3a32016-02-09 14:57:42 +02003093 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003094 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003095 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003096
Matan Barakb4ff3a32016-02-09 14:57:42 +02003097 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003098
Matan Barakb4ff3a32016-02-09 14:57:42 +02003099 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003100 u8 last_notified_index[0x18];
3101
Matan Barakb4ff3a32016-02-09 14:57:42 +02003102 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003103 u8 last_solicit_index[0x18];
3104
Matan Barakb4ff3a32016-02-09 14:57:42 +02003105 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003106 u8 consumer_counter[0x18];
3107
Matan Barakb4ff3a32016-02-09 14:57:42 +02003108 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003109 u8 producer_counter[0x18];
3110
Matan Barakb4ff3a32016-02-09 14:57:42 +02003111 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003112
3113 u8 dbr_addr[0x40];
3114};
3115
3116union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3117 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3118 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3119 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003120 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003121};
3122
3123struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003124 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003125
Matan Barakb4ff3a32016-02-09 14:57:42 +02003126 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003127 u8 ieee_vendor_id[0x18];
3128
Matan Barakb4ff3a32016-02-09 14:57:42 +02003129 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003130 u8 vsd_vendor_id[0x10];
3131
3132 u8 vsd[208][0x8];
3133
3134 u8 vsd_contd_psid[16][0x8];
3135};
3136
Saeed Mahameed74862162016-06-09 15:11:34 +03003137enum {
3138 MLX5_XRQC_STATE_GOOD = 0x0,
3139 MLX5_XRQC_STATE_ERROR = 0x1,
3140};
3141
3142enum {
3143 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3144 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3145};
3146
3147enum {
3148 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3149};
3150
3151struct mlx5_ifc_tag_matching_topology_context_bits {
3152 u8 log_matching_list_sz[0x4];
3153 u8 reserved_at_4[0xc];
3154 u8 append_next_index[0x10];
3155
3156 u8 sw_phase_cnt[0x10];
3157 u8 hw_phase_cnt[0x10];
3158
3159 u8 reserved_at_40[0x40];
3160};
3161
3162struct mlx5_ifc_xrqc_bits {
3163 u8 state[0x4];
3164 u8 rlkey[0x1];
3165 u8 reserved_at_5[0xf];
3166 u8 topology[0x4];
3167 u8 reserved_at_18[0x4];
3168 u8 offload[0x4];
3169
3170 u8 reserved_at_20[0x8];
3171 u8 user_index[0x18];
3172
3173 u8 reserved_at_40[0x8];
3174 u8 cqn[0x18];
3175
3176 u8 reserved_at_60[0xa0];
3177
3178 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3179
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003180 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003181
3182 struct mlx5_ifc_wq_bits wq;
3183};
3184
Saeed Mahameede2816822015-05-28 22:28:40 +03003185union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3186 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3187 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003188 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003189};
3190
3191union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3192 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3193 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3194 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196};
3197
3198union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3199 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3200 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3201 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3202 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3203 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3204 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3205 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003206 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003207 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003208 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003209 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003210};
3211
Gal Pressman8ed1a632016-11-17 13:46:01 +02003212union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3213 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3214 u8 reserved_at_0[0x7c0];
3215};
3216
Saeed Mahameede2816822015-05-28 22:28:40 +03003217union mlx5_ifc_event_auto_bits {
3218 struct mlx5_ifc_comp_event_bits comp_event;
3219 struct mlx5_ifc_dct_events_bits dct_events;
3220 struct mlx5_ifc_qp_events_bits qp_events;
3221 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3222 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3223 struct mlx5_ifc_cq_error_bits cq_error;
3224 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3225 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3226 struct mlx5_ifc_gpio_event_bits gpio_event;
3227 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3228 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3229 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003230 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003231};
3232
3233struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003234 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003235
3236 u8 assert_existptr[0x20];
3237
3238 u8 assert_callra[0x20];
3239
Matan Barakb4ff3a32016-02-09 14:57:42 +02003240 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003241
3242 u8 fw_version[0x20];
3243
3244 u8 hw_id[0x20];
3245
Matan Barakb4ff3a32016-02-09 14:57:42 +02003246 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003247
3248 u8 irisc_index[0x8];
3249 u8 synd[0x8];
3250 u8 ext_synd[0x10];
3251};
3252
3253struct mlx5_ifc_register_loopback_control_bits {
3254 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003255 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003256 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258
Matan Barakb4ff3a32016-02-09 14:57:42 +02003259 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003260};
3261
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003262struct mlx5_ifc_vport_tc_element_bits {
3263 u8 traffic_class[0x4];
3264 u8 reserved_at_4[0xc];
3265 u8 vport_number[0x10];
3266};
3267
3268struct mlx5_ifc_vport_element_bits {
3269 u8 reserved_at_0[0x10];
3270 u8 vport_number[0x10];
3271};
3272
3273enum {
3274 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3275 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3276 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3277};
3278
3279struct mlx5_ifc_tsar_element_bits {
3280 u8 reserved_at_0[0x8];
3281 u8 tsar_type[0x8];
3282 u8 reserved_at_10[0x10];
3283};
3284
Majd Dibbiny8812c242017-02-09 14:20:12 +02003285enum {
3286 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3287 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3288};
3289
Saeed Mahameede2816822015-05-28 22:28:40 +03003290struct mlx5_ifc_teardown_hca_out_bits {
3291 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003292 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003293
3294 u8 syndrome[0x20];
3295
Majd Dibbiny8812c242017-02-09 14:20:12 +02003296 u8 reserved_at_40[0x3f];
3297
3298 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003299};
3300
3301enum {
3302 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003303 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003304};
3305
3306struct mlx5_ifc_teardown_hca_in_bits {
3307 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309
Matan Barakb4ff3a32016-02-09 14:57:42 +02003310 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003311 u8 op_mod[0x10];
3312
Matan Barakb4ff3a32016-02-09 14:57:42 +02003313 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003314 u8 profile[0x10];
3315
Matan Barakb4ff3a32016-02-09 14:57:42 +02003316 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003317};
3318
3319struct mlx5_ifc_sqerr2rts_qp_out_bits {
3320 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003321 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003322
3323 u8 syndrome[0x20];
3324
Matan Barakb4ff3a32016-02-09 14:57:42 +02003325 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003326};
3327
3328struct mlx5_ifc_sqerr2rts_qp_in_bits {
3329 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003330 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003331
Matan Barakb4ff3a32016-02-09 14:57:42 +02003332 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003333 u8 op_mod[0x10];
3334
Matan Barakb4ff3a32016-02-09 14:57:42 +02003335 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003336 u8 qpn[0x18];
3337
Matan Barakb4ff3a32016-02-09 14:57:42 +02003338 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339
3340 u8 opt_param_mask[0x20];
3341
Matan Barakb4ff3a32016-02-09 14:57:42 +02003342 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003343
3344 struct mlx5_ifc_qpc_bits qpc;
3345
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347};
3348
3349struct mlx5_ifc_sqd2rts_qp_out_bits {
3350 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003351 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003352
3353 u8 syndrome[0x20];
3354
Matan Barakb4ff3a32016-02-09 14:57:42 +02003355 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003356};
3357
3358struct mlx5_ifc_sqd2rts_qp_in_bits {
3359 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003360 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003361
Matan Barakb4ff3a32016-02-09 14:57:42 +02003362 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003363 u8 op_mod[0x10];
3364
Matan Barakb4ff3a32016-02-09 14:57:42 +02003365 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003366 u8 qpn[0x18];
3367
Matan Barakb4ff3a32016-02-09 14:57:42 +02003368 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003369
3370 u8 opt_param_mask[0x20];
3371
Matan Barakb4ff3a32016-02-09 14:57:42 +02003372 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003373
3374 struct mlx5_ifc_qpc_bits qpc;
3375
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377};
3378
3379struct mlx5_ifc_set_roce_address_out_bits {
3380 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382
3383 u8 syndrome[0x20];
3384
Matan Barakb4ff3a32016-02-09 14:57:42 +02003385 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003386};
3387
3388struct mlx5_ifc_set_roce_address_in_bits {
3389 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003390 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003391
Matan Barakb4ff3a32016-02-09 14:57:42 +02003392 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003393 u8 op_mod[0x10];
3394
3395 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003396 u8 reserved_at_50[0xc];
3397 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398
Matan Barakb4ff3a32016-02-09 14:57:42 +02003399 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400
3401 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3402};
3403
3404struct mlx5_ifc_set_mad_demux_out_bits {
3405 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407
3408 u8 syndrome[0x20];
3409
Matan Barakb4ff3a32016-02-09 14:57:42 +02003410 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003411};
3412
3413enum {
3414 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3415 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3416};
3417
3418struct mlx5_ifc_set_mad_demux_in_bits {
3419 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003420 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003421
Matan Barakb4ff3a32016-02-09 14:57:42 +02003422 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003423 u8 op_mod[0x10];
3424
Matan Barakb4ff3a32016-02-09 14:57:42 +02003425 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003426
Matan Barakb4ff3a32016-02-09 14:57:42 +02003427 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003428 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430};
3431
3432struct mlx5_ifc_set_l2_table_entry_out_bits {
3433 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003434 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003435
3436 u8 syndrome[0x20];
3437
Matan Barakb4ff3a32016-02-09 14:57:42 +02003438 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003439};
3440
3441struct mlx5_ifc_set_l2_table_entry_in_bits {
3442 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003443 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003444
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446 u8 op_mod[0x10];
3447
Matan Barakb4ff3a32016-02-09 14:57:42 +02003448 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003449
Matan Barakb4ff3a32016-02-09 14:57:42 +02003450 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003451 u8 table_index[0x18];
3452
Matan Barakb4ff3a32016-02-09 14:57:42 +02003453 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003454
Matan Barakb4ff3a32016-02-09 14:57:42 +02003455 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003456 u8 vlan_valid[0x1];
3457 u8 vlan[0xc];
3458
3459 struct mlx5_ifc_mac_address_layout_bits mac_address;
3460
Matan Barakb4ff3a32016-02-09 14:57:42 +02003461 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003462};
3463
3464struct mlx5_ifc_set_issi_out_bits {
3465 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003466 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003467
3468 u8 syndrome[0x20];
3469
Matan Barakb4ff3a32016-02-09 14:57:42 +02003470 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003471};
3472
3473struct mlx5_ifc_set_issi_in_bits {
3474 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003475 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003476
Matan Barakb4ff3a32016-02-09 14:57:42 +02003477 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003478 u8 op_mod[0x10];
3479
Matan Barakb4ff3a32016-02-09 14:57:42 +02003480 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003481 u8 current_issi[0x10];
3482
Matan Barakb4ff3a32016-02-09 14:57:42 +02003483 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003484};
3485
3486struct mlx5_ifc_set_hca_cap_out_bits {
3487 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003488 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003489
3490 u8 syndrome[0x20];
3491
Matan Barakb4ff3a32016-02-09 14:57:42 +02003492 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003493};
3494
3495struct mlx5_ifc_set_hca_cap_in_bits {
3496 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003497 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003498
Matan Barakb4ff3a32016-02-09 14:57:42 +02003499 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003500 u8 op_mod[0x10];
3501
Matan Barakb4ff3a32016-02-09 14:57:42 +02003502 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003503
Saeed Mahameede2816822015-05-28 22:28:40 +03003504 union mlx5_ifc_hca_cap_union_bits capability;
3505};
3506
Maor Gottlieb26a81452015-12-10 17:12:39 +02003507enum {
3508 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3509 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3510 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3511 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3512};
3513
Saeed Mahameede2816822015-05-28 22:28:40 +03003514struct mlx5_ifc_set_fte_out_bits {
3515 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003516 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003517
3518 u8 syndrome[0x20];
3519
Matan Barakb4ff3a32016-02-09 14:57:42 +02003520 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003521};
3522
3523struct mlx5_ifc_set_fte_in_bits {
3524 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003525 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003526
Matan Barakb4ff3a32016-02-09 14:57:42 +02003527 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003528 u8 op_mod[0x10];
3529
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003530 u8 other_vport[0x1];
3531 u8 reserved_at_41[0xf];
3532 u8 vport_number[0x10];
3533
3534 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003535
3536 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003537 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003538
Matan Barakb4ff3a32016-02-09 14:57:42 +02003539 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003540 u8 table_id[0x18];
3541
Matan Barakb4ff3a32016-02-09 14:57:42 +02003542 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003543 u8 modify_enable_mask[0x8];
3544
Matan Barakb4ff3a32016-02-09 14:57:42 +02003545 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003546
3547 u8 flow_index[0x20];
3548
Matan Barakb4ff3a32016-02-09 14:57:42 +02003549 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003550
3551 struct mlx5_ifc_flow_context_bits flow_context;
3552};
3553
3554struct mlx5_ifc_rts2rts_qp_out_bits {
3555 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003556 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003557
3558 u8 syndrome[0x20];
3559
Matan Barakb4ff3a32016-02-09 14:57:42 +02003560 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003561};
3562
3563struct mlx5_ifc_rts2rts_qp_in_bits {
3564 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003565 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003566
Matan Barakb4ff3a32016-02-09 14:57:42 +02003567 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003568 u8 op_mod[0x10];
3569
Matan Barakb4ff3a32016-02-09 14:57:42 +02003570 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003571 u8 qpn[0x18];
3572
Matan Barakb4ff3a32016-02-09 14:57:42 +02003573 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003574
3575 u8 opt_param_mask[0x20];
3576
Matan Barakb4ff3a32016-02-09 14:57:42 +02003577 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003578
3579 struct mlx5_ifc_qpc_bits qpc;
3580
Matan Barakb4ff3a32016-02-09 14:57:42 +02003581 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003582};
3583
3584struct mlx5_ifc_rtr2rts_qp_out_bits {
3585 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003586 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003587
3588 u8 syndrome[0x20];
3589
Matan Barakb4ff3a32016-02-09 14:57:42 +02003590 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003591};
3592
3593struct mlx5_ifc_rtr2rts_qp_in_bits {
3594 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003595 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003596
Matan Barakb4ff3a32016-02-09 14:57:42 +02003597 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003598 u8 op_mod[0x10];
3599
Matan Barakb4ff3a32016-02-09 14:57:42 +02003600 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003601 u8 qpn[0x18];
3602
Matan Barakb4ff3a32016-02-09 14:57:42 +02003603 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003604
3605 u8 opt_param_mask[0x20];
3606
Matan Barakb4ff3a32016-02-09 14:57:42 +02003607 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003608
3609 struct mlx5_ifc_qpc_bits qpc;
3610
Matan Barakb4ff3a32016-02-09 14:57:42 +02003611 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003612};
3613
3614struct mlx5_ifc_rst2init_qp_out_bits {
3615 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003616 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003617
3618 u8 syndrome[0x20];
3619
Matan Barakb4ff3a32016-02-09 14:57:42 +02003620 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003621};
3622
3623struct mlx5_ifc_rst2init_qp_in_bits {
3624 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003625 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003626
Matan Barakb4ff3a32016-02-09 14:57:42 +02003627 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003628 u8 op_mod[0x10];
3629
Matan Barakb4ff3a32016-02-09 14:57:42 +02003630 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003631 u8 qpn[0x18];
3632
Matan Barakb4ff3a32016-02-09 14:57:42 +02003633 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003634
3635 u8 opt_param_mask[0x20];
3636
Matan Barakb4ff3a32016-02-09 14:57:42 +02003637 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003638
3639 struct mlx5_ifc_qpc_bits qpc;
3640
Matan Barakb4ff3a32016-02-09 14:57:42 +02003641 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003642};
3643
Saeed Mahameed74862162016-06-09 15:11:34 +03003644struct mlx5_ifc_query_xrq_out_bits {
3645 u8 status[0x8];
3646 u8 reserved_at_8[0x18];
3647
3648 u8 syndrome[0x20];
3649
3650 u8 reserved_at_40[0x40];
3651
3652 struct mlx5_ifc_xrqc_bits xrq_context;
3653};
3654
3655struct mlx5_ifc_query_xrq_in_bits {
3656 u8 opcode[0x10];
3657 u8 reserved_at_10[0x10];
3658
3659 u8 reserved_at_20[0x10];
3660 u8 op_mod[0x10];
3661
3662 u8 reserved_at_40[0x8];
3663 u8 xrqn[0x18];
3664
3665 u8 reserved_at_60[0x20];
3666};
3667
Saeed Mahameede2816822015-05-28 22:28:40 +03003668struct mlx5_ifc_query_xrc_srq_out_bits {
3669 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003670 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003671
3672 u8 syndrome[0x20];
3673
Matan Barakb4ff3a32016-02-09 14:57:42 +02003674 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003675
3676 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3677
Matan Barakb4ff3a32016-02-09 14:57:42 +02003678 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003679
3680 u8 pas[0][0x40];
3681};
3682
3683struct mlx5_ifc_query_xrc_srq_in_bits {
3684 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003685 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003686
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688 u8 op_mod[0x10];
3689
Matan Barakb4ff3a32016-02-09 14:57:42 +02003690 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003691 u8 xrc_srqn[0x18];
3692
Matan Barakb4ff3a32016-02-09 14:57:42 +02003693 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003694};
3695
3696enum {
3697 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3698 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3699};
3700
3701struct mlx5_ifc_query_vport_state_out_bits {
3702 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003703 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003704
3705 u8 syndrome[0x20];
3706
Matan Barakb4ff3a32016-02-09 14:57:42 +02003707 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003708
Matan Barakb4ff3a32016-02-09 14:57:42 +02003709 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003710 u8 admin_state[0x4];
3711 u8 state[0x4];
3712};
3713
3714enum {
3715 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003716 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003717};
3718
3719struct mlx5_ifc_query_vport_state_in_bits {
3720 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003721 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003722
Matan Barakb4ff3a32016-02-09 14:57:42 +02003723 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003724 u8 op_mod[0x10];
3725
3726 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003727 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003728 u8 vport_number[0x10];
3729
Matan Barakb4ff3a32016-02-09 14:57:42 +02003730 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003731};
3732
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02003733struct mlx5_ifc_query_vnic_env_out_bits {
3734 u8 status[0x8];
3735 u8 reserved_at_8[0x18];
3736
3737 u8 syndrome[0x20];
3738
3739 u8 reserved_at_40[0x40];
3740
3741 struct mlx5_ifc_vnic_diagnostic_statistics_bits vport_env;
3742};
3743
3744enum {
3745 MLX5_QUERY_VNIC_ENV_IN_OP_MOD_VPORT_DIAG_STATISTICS = 0x0,
3746};
3747
3748struct mlx5_ifc_query_vnic_env_in_bits {
3749 u8 opcode[0x10];
3750 u8 reserved_at_10[0x10];
3751
3752 u8 reserved_at_20[0x10];
3753 u8 op_mod[0x10];
3754
3755 u8 other_vport[0x1];
3756 u8 reserved_at_41[0xf];
3757 u8 vport_number[0x10];
3758
3759 u8 reserved_at_60[0x20];
3760};
3761
Saeed Mahameede2816822015-05-28 22:28:40 +03003762struct mlx5_ifc_query_vport_counter_out_bits {
3763 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003764 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003765
3766 u8 syndrome[0x20];
3767
Matan Barakb4ff3a32016-02-09 14:57:42 +02003768 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003769
3770 struct mlx5_ifc_traffic_counter_bits received_errors;
3771
3772 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3773
3774 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3775
3776 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3777
3778 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3779
3780 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3781
3782 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3783
3784 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3785
3786 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3787
3788 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3789
3790 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3791
3792 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3793
Matan Barakb4ff3a32016-02-09 14:57:42 +02003794 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003795};
3796
3797enum {
3798 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3799};
3800
3801struct mlx5_ifc_query_vport_counter_in_bits {
3802 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003803 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003804
Matan Barakb4ff3a32016-02-09 14:57:42 +02003805 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003806 u8 op_mod[0x10];
3807
3808 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003809 u8 reserved_at_41[0xb];
3810 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003811 u8 vport_number[0x10];
3812
Matan Barakb4ff3a32016-02-09 14:57:42 +02003813 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003814
3815 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003816 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003817
Matan Barakb4ff3a32016-02-09 14:57:42 +02003818 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003819};
3820
3821struct mlx5_ifc_query_tis_out_bits {
3822 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003823 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003824
3825 u8 syndrome[0x20];
3826
Matan Barakb4ff3a32016-02-09 14:57:42 +02003827 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003828
3829 struct mlx5_ifc_tisc_bits tis_context;
3830};
3831
3832struct mlx5_ifc_query_tis_in_bits {
3833 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003834 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003835
Matan Barakb4ff3a32016-02-09 14:57:42 +02003836 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003837 u8 op_mod[0x10];
3838
Matan Barakb4ff3a32016-02-09 14:57:42 +02003839 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003840 u8 tisn[0x18];
3841
Matan Barakb4ff3a32016-02-09 14:57:42 +02003842 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003843};
3844
3845struct mlx5_ifc_query_tir_out_bits {
3846 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003847 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003848
3849 u8 syndrome[0x20];
3850
Matan Barakb4ff3a32016-02-09 14:57:42 +02003851 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003852
3853 struct mlx5_ifc_tirc_bits tir_context;
3854};
3855
3856struct mlx5_ifc_query_tir_in_bits {
3857 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003858 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003859
Matan Barakb4ff3a32016-02-09 14:57:42 +02003860 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003861 u8 op_mod[0x10];
3862
Matan Barakb4ff3a32016-02-09 14:57:42 +02003863 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003864 u8 tirn[0x18];
3865
Matan Barakb4ff3a32016-02-09 14:57:42 +02003866 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003867};
3868
3869struct mlx5_ifc_query_srq_out_bits {
3870 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003871 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003872
3873 u8 syndrome[0x20];
3874
Matan Barakb4ff3a32016-02-09 14:57:42 +02003875 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003876
3877 struct mlx5_ifc_srqc_bits srq_context_entry;
3878
Matan Barakb4ff3a32016-02-09 14:57:42 +02003879 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003880
3881 u8 pas[0][0x40];
3882};
3883
3884struct mlx5_ifc_query_srq_in_bits {
3885 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003886 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003887
Matan Barakb4ff3a32016-02-09 14:57:42 +02003888 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003889 u8 op_mod[0x10];
3890
Matan Barakb4ff3a32016-02-09 14:57:42 +02003891 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003892 u8 srqn[0x18];
3893
Matan Barakb4ff3a32016-02-09 14:57:42 +02003894 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003895};
3896
3897struct mlx5_ifc_query_sq_out_bits {
3898 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003899 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900
3901 u8 syndrome[0x20];
3902
Matan Barakb4ff3a32016-02-09 14:57:42 +02003903 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003904
3905 struct mlx5_ifc_sqc_bits sq_context;
3906};
3907
3908struct mlx5_ifc_query_sq_in_bits {
3909 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003910 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003911
Matan Barakb4ff3a32016-02-09 14:57:42 +02003912 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003913 u8 op_mod[0x10];
3914
Matan Barakb4ff3a32016-02-09 14:57:42 +02003915 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003916 u8 sqn[0x18];
3917
Matan Barakb4ff3a32016-02-09 14:57:42 +02003918 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003919};
3920
3921struct mlx5_ifc_query_special_contexts_out_bits {
3922 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003923 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003924
3925 u8 syndrome[0x20];
3926
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003927 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003928
3929 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003930
3931 u8 null_mkey[0x20];
3932
3933 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003934};
3935
3936struct mlx5_ifc_query_special_contexts_in_bits {
3937 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003938 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003939
Matan Barakb4ff3a32016-02-09 14:57:42 +02003940 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003941 u8 op_mod[0x10];
3942
Matan Barakb4ff3a32016-02-09 14:57:42 +02003943 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003944};
3945
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003946struct mlx5_ifc_query_scheduling_element_out_bits {
3947 u8 opcode[0x10];
3948 u8 reserved_at_10[0x10];
3949
3950 u8 reserved_at_20[0x10];
3951 u8 op_mod[0x10];
3952
3953 u8 reserved_at_40[0xc0];
3954
3955 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3956
3957 u8 reserved_at_300[0x100];
3958};
3959
3960enum {
3961 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3962};
3963
3964struct mlx5_ifc_query_scheduling_element_in_bits {
3965 u8 opcode[0x10];
3966 u8 reserved_at_10[0x10];
3967
3968 u8 reserved_at_20[0x10];
3969 u8 op_mod[0x10];
3970
3971 u8 scheduling_hierarchy[0x8];
3972 u8 reserved_at_48[0x18];
3973
3974 u8 scheduling_element_id[0x20];
3975
3976 u8 reserved_at_80[0x180];
3977};
3978
Saeed Mahameede2816822015-05-28 22:28:40 +03003979struct mlx5_ifc_query_rqt_out_bits {
3980 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003981 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003982
3983 u8 syndrome[0x20];
3984
Matan Barakb4ff3a32016-02-09 14:57:42 +02003985 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003986
3987 struct mlx5_ifc_rqtc_bits rqt_context;
3988};
3989
3990struct mlx5_ifc_query_rqt_in_bits {
3991 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003992 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003993
Matan Barakb4ff3a32016-02-09 14:57:42 +02003994 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003995 u8 op_mod[0x10];
3996
Matan Barakb4ff3a32016-02-09 14:57:42 +02003997 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003998 u8 rqtn[0x18];
3999
Matan Barakb4ff3a32016-02-09 14:57:42 +02004000 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004001};
4002
4003struct mlx5_ifc_query_rq_out_bits {
4004 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004005 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004006
4007 u8 syndrome[0x20];
4008
Matan Barakb4ff3a32016-02-09 14:57:42 +02004009 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004010
4011 struct mlx5_ifc_rqc_bits rq_context;
4012};
4013
4014struct mlx5_ifc_query_rq_in_bits {
4015 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004016 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004017
Matan Barakb4ff3a32016-02-09 14:57:42 +02004018 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004019 u8 op_mod[0x10];
4020
Matan Barakb4ff3a32016-02-09 14:57:42 +02004021 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004022 u8 rqn[0x18];
4023
Matan Barakb4ff3a32016-02-09 14:57:42 +02004024 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004025};
4026
4027struct mlx5_ifc_query_roce_address_out_bits {
4028 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004029 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004030
4031 u8 syndrome[0x20];
4032
Matan Barakb4ff3a32016-02-09 14:57:42 +02004033 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034
4035 struct mlx5_ifc_roce_addr_layout_bits roce_address;
4036};
4037
4038struct mlx5_ifc_query_roce_address_in_bits {
4039 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004040 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004041
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043 u8 op_mod[0x10];
4044
4045 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02004046 u8 reserved_at_50[0xc];
4047 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004048
Matan Barakb4ff3a32016-02-09 14:57:42 +02004049 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004050};
4051
4052struct mlx5_ifc_query_rmp_out_bits {
4053 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004054 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004055
4056 u8 syndrome[0x20];
4057
Matan Barakb4ff3a32016-02-09 14:57:42 +02004058 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004059
4060 struct mlx5_ifc_rmpc_bits rmp_context;
4061};
4062
4063struct mlx5_ifc_query_rmp_in_bits {
4064 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004065 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004066
Matan Barakb4ff3a32016-02-09 14:57:42 +02004067 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004068 u8 op_mod[0x10];
4069
Matan Barakb4ff3a32016-02-09 14:57:42 +02004070 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004071 u8 rmpn[0x18];
4072
Matan Barakb4ff3a32016-02-09 14:57:42 +02004073 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004074};
4075
4076struct mlx5_ifc_query_qp_out_bits {
4077 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004078 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004079
4080 u8 syndrome[0x20];
4081
Matan Barakb4ff3a32016-02-09 14:57:42 +02004082 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004083
4084 u8 opt_param_mask[0x20];
4085
Matan Barakb4ff3a32016-02-09 14:57:42 +02004086 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004087
4088 struct mlx5_ifc_qpc_bits qpc;
4089
Matan Barakb4ff3a32016-02-09 14:57:42 +02004090 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004091
4092 u8 pas[0][0x40];
4093};
4094
4095struct mlx5_ifc_query_qp_in_bits {
4096 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004097 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004098
Matan Barakb4ff3a32016-02-09 14:57:42 +02004099 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004100 u8 op_mod[0x10];
4101
Matan Barakb4ff3a32016-02-09 14:57:42 +02004102 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004103 u8 qpn[0x18];
4104
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106};
4107
4108struct mlx5_ifc_query_q_counter_out_bits {
4109 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111
4112 u8 syndrome[0x20];
4113
Matan Barakb4ff3a32016-02-09 14:57:42 +02004114 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004115
4116 u8 rx_write_requests[0x20];
4117
Matan Barakb4ff3a32016-02-09 14:57:42 +02004118 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004119
4120 u8 rx_read_requests[0x20];
4121
Matan Barakb4ff3a32016-02-09 14:57:42 +02004122 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004123
4124 u8 rx_atomic_requests[0x20];
4125
Matan Barakb4ff3a32016-02-09 14:57:42 +02004126 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004127
4128 u8 rx_dct_connect[0x20];
4129
Matan Barakb4ff3a32016-02-09 14:57:42 +02004130 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004131
4132 u8 out_of_buffer[0x20];
4133
Matan Barakb4ff3a32016-02-09 14:57:42 +02004134 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004135
4136 u8 out_of_sequence[0x20];
4137
Saeed Mahameed74862162016-06-09 15:11:34 +03004138 u8 reserved_at_1e0[0x20];
4139
4140 u8 duplicate_request[0x20];
4141
4142 u8 reserved_at_220[0x20];
4143
4144 u8 rnr_nak_retry_err[0x20];
4145
4146 u8 reserved_at_260[0x20];
4147
4148 u8 packet_seq_err[0x20];
4149
4150 u8 reserved_at_2a0[0x20];
4151
4152 u8 implied_nak_seq_err[0x20];
4153
4154 u8 reserved_at_2e0[0x20];
4155
4156 u8 local_ack_timeout_err[0x20];
4157
Parav Pandit58dcb602017-06-19 07:19:37 +03004158 u8 reserved_at_320[0xa0];
4159
4160 u8 resp_local_length_error[0x20];
4161
4162 u8 req_local_length_error[0x20];
4163
4164 u8 resp_local_qp_error[0x20];
4165
4166 u8 local_operation_error[0x20];
4167
4168 u8 resp_local_protection[0x20];
4169
4170 u8 req_local_protection[0x20];
4171
4172 u8 resp_cqe_error[0x20];
4173
4174 u8 req_cqe_error[0x20];
4175
4176 u8 req_mw_binding[0x20];
4177
4178 u8 req_bad_response[0x20];
4179
4180 u8 req_remote_invalid_request[0x20];
4181
4182 u8 resp_remote_invalid_request[0x20];
4183
4184 u8 req_remote_access_errors[0x20];
4185
4186 u8 resp_remote_access_errors[0x20];
4187
4188 u8 req_remote_operation_errors[0x20];
4189
4190 u8 req_transport_retries_exceeded[0x20];
4191
4192 u8 cq_overflow[0x20];
4193
4194 u8 resp_cqe_flush_error[0x20];
4195
4196 u8 req_cqe_flush_error[0x20];
4197
4198 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004199};
4200
4201struct mlx5_ifc_query_q_counter_in_bits {
4202 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204
Matan Barakb4ff3a32016-02-09 14:57:42 +02004205 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004206 u8 op_mod[0x10];
4207
Matan Barakb4ff3a32016-02-09 14:57:42 +02004208 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004209
4210 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004211 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004212
Matan Barakb4ff3a32016-02-09 14:57:42 +02004213 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004214 u8 counter_set_id[0x8];
4215};
4216
4217struct mlx5_ifc_query_pages_out_bits {
4218 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004219 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004220
4221 u8 syndrome[0x20];
4222
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004224 u8 function_id[0x10];
4225
4226 u8 num_pages[0x20];
4227};
4228
4229enum {
4230 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4231 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4232 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4233};
4234
4235struct mlx5_ifc_query_pages_in_bits {
4236 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004237 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004238
Matan Barakb4ff3a32016-02-09 14:57:42 +02004239 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004240 u8 op_mod[0x10];
4241
Matan Barakb4ff3a32016-02-09 14:57:42 +02004242 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004243 u8 function_id[0x10];
4244
Matan Barakb4ff3a32016-02-09 14:57:42 +02004245 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004246};
4247
4248struct mlx5_ifc_query_nic_vport_context_out_bits {
4249 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004250 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004251
4252 u8 syndrome[0x20];
4253
Matan Barakb4ff3a32016-02-09 14:57:42 +02004254 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004255
4256 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4257};
4258
4259struct mlx5_ifc_query_nic_vport_context_in_bits {
4260 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004261 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004262
Matan Barakb4ff3a32016-02-09 14:57:42 +02004263 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004264 u8 op_mod[0x10];
4265
4266 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004267 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004268 u8 vport_number[0x10];
4269
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004272 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004273};
4274
4275struct mlx5_ifc_query_mkey_out_bits {
4276 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004278
4279 u8 syndrome[0x20];
4280
Matan Barakb4ff3a32016-02-09 14:57:42 +02004281 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004282
4283 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4284
Matan Barakb4ff3a32016-02-09 14:57:42 +02004285 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004286
4287 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4288
4289 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4290};
4291
4292struct mlx5_ifc_query_mkey_in_bits {
4293 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004294 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295
Matan Barakb4ff3a32016-02-09 14:57:42 +02004296 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004297 u8 op_mod[0x10];
4298
Matan Barakb4ff3a32016-02-09 14:57:42 +02004299 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004300 u8 mkey_index[0x18];
4301
4302 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004303 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004304};
4305
4306struct mlx5_ifc_query_mad_demux_out_bits {
4307 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004308 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004309
4310 u8 syndrome[0x20];
4311
Matan Barakb4ff3a32016-02-09 14:57:42 +02004312 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004313
4314 u8 mad_dumux_parameters_block[0x20];
4315};
4316
4317struct mlx5_ifc_query_mad_demux_in_bits {
4318 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004319 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004320
Matan Barakb4ff3a32016-02-09 14:57:42 +02004321 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004322 u8 op_mod[0x10];
4323
Matan Barakb4ff3a32016-02-09 14:57:42 +02004324 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004325};
4326
4327struct mlx5_ifc_query_l2_table_entry_out_bits {
4328 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004329 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004330
4331 u8 syndrome[0x20];
4332
Matan Barakb4ff3a32016-02-09 14:57:42 +02004333 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004334
Matan Barakb4ff3a32016-02-09 14:57:42 +02004335 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004336 u8 vlan_valid[0x1];
4337 u8 vlan[0xc];
4338
4339 struct mlx5_ifc_mac_address_layout_bits mac_address;
4340
Matan Barakb4ff3a32016-02-09 14:57:42 +02004341 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004342};
4343
4344struct mlx5_ifc_query_l2_table_entry_in_bits {
4345 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004346 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004347
Matan Barakb4ff3a32016-02-09 14:57:42 +02004348 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004349 u8 op_mod[0x10];
4350
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352
Matan Barakb4ff3a32016-02-09 14:57:42 +02004353 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004354 u8 table_index[0x18];
4355
Matan Barakb4ff3a32016-02-09 14:57:42 +02004356 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004357};
4358
4359struct mlx5_ifc_query_issi_out_bits {
4360 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004361 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004362
4363 u8 syndrome[0x20];
4364
Matan Barakb4ff3a32016-02-09 14:57:42 +02004365 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004366 u8 current_issi[0x10];
4367
Matan Barakb4ff3a32016-02-09 14:57:42 +02004368 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004369
Matan Barakb4ff3a32016-02-09 14:57:42 +02004370 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004371 u8 supported_issi_dw0[0x20];
4372};
4373
4374struct mlx5_ifc_query_issi_in_bits {
4375 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004376 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004377
Matan Barakb4ff3a32016-02-09 14:57:42 +02004378 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004379 u8 op_mod[0x10];
4380
Matan Barakb4ff3a32016-02-09 14:57:42 +02004381 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004382};
4383
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004384struct mlx5_ifc_set_driver_version_out_bits {
4385 u8 status[0x8];
4386 u8 reserved_0[0x18];
4387
4388 u8 syndrome[0x20];
4389 u8 reserved_1[0x40];
4390};
4391
4392struct mlx5_ifc_set_driver_version_in_bits {
4393 u8 opcode[0x10];
4394 u8 reserved_0[0x10];
4395
4396 u8 reserved_1[0x10];
4397 u8 op_mod[0x10];
4398
4399 u8 reserved_2[0x40];
4400 u8 driver_version[64][0x8];
4401};
4402
Saeed Mahameede2816822015-05-28 22:28:40 +03004403struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4404 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004405 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004406
4407 u8 syndrome[0x20];
4408
Matan Barakb4ff3a32016-02-09 14:57:42 +02004409 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004410
4411 struct mlx5_ifc_pkey_bits pkey[0];
4412};
4413
4414struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4415 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004416 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004417
Matan Barakb4ff3a32016-02-09 14:57:42 +02004418 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004419 u8 op_mod[0x10];
4420
4421 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004423 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004424 u8 vport_number[0x10];
4425
Matan Barakb4ff3a32016-02-09 14:57:42 +02004426 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004427 u8 pkey_index[0x10];
4428};
4429
Eli Coheneff901d2016-03-11 22:58:42 +02004430enum {
4431 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4432 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4433 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4434};
4435
Saeed Mahameede2816822015-05-28 22:28:40 +03004436struct mlx5_ifc_query_hca_vport_gid_out_bits {
4437 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004439
4440 u8 syndrome[0x20];
4441
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004443
4444 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004445 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004446
4447 struct mlx5_ifc_array128_auto_bits gid[0];
4448};
4449
4450struct mlx5_ifc_query_hca_vport_gid_in_bits {
4451 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004452 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004453
Matan Barakb4ff3a32016-02-09 14:57:42 +02004454 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004455 u8 op_mod[0x10];
4456
4457 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004458 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004459 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004460 u8 vport_number[0x10];
4461
Matan Barakb4ff3a32016-02-09 14:57:42 +02004462 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004463 u8 gid_index[0x10];
4464};
4465
4466struct mlx5_ifc_query_hca_vport_context_out_bits {
4467 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004468 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004469
4470 u8 syndrome[0x20];
4471
Matan Barakb4ff3a32016-02-09 14:57:42 +02004472 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004473
4474 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4475};
4476
4477struct mlx5_ifc_query_hca_vport_context_in_bits {
4478 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004480
Matan Barakb4ff3a32016-02-09 14:57:42 +02004481 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004482 u8 op_mod[0x10];
4483
4484 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004485 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004486 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004487 u8 vport_number[0x10];
4488
Matan Barakb4ff3a32016-02-09 14:57:42 +02004489 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004490};
4491
4492struct mlx5_ifc_query_hca_cap_out_bits {
4493 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004494 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004495
4496 u8 syndrome[0x20];
4497
Matan Barakb4ff3a32016-02-09 14:57:42 +02004498 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004499
4500 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004501};
4502
4503struct mlx5_ifc_query_hca_cap_in_bits {
4504 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004505 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004506
Matan Barakb4ff3a32016-02-09 14:57:42 +02004507 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004508 u8 op_mod[0x10];
4509
Matan Barakb4ff3a32016-02-09 14:57:42 +02004510 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004511};
4512
Saeed Mahameede2816822015-05-28 22:28:40 +03004513struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004514 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004515 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004516
4517 u8 syndrome[0x20];
4518
Matan Barakb4ff3a32016-02-09 14:57:42 +02004519 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004520
Matan Barakb4ff3a32016-02-09 14:57:42 +02004521 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004522 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004523 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004524 u8 log_size[0x8];
4525
Matan Barakb4ff3a32016-02-09 14:57:42 +02004526 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004527};
4528
Saeed Mahameede2816822015-05-28 22:28:40 +03004529struct mlx5_ifc_query_flow_table_in_bits {
4530 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004531 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004532
Matan Barakb4ff3a32016-02-09 14:57:42 +02004533 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004534 u8 op_mod[0x10];
4535
Matan Barakb4ff3a32016-02-09 14:57:42 +02004536 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004537
4538 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004539 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004540
Matan Barakb4ff3a32016-02-09 14:57:42 +02004541 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004542 u8 table_id[0x18];
4543
Matan Barakb4ff3a32016-02-09 14:57:42 +02004544 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004545};
4546
4547struct mlx5_ifc_query_fte_out_bits {
4548 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004549 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004550
4551 u8 syndrome[0x20];
4552
Matan Barakb4ff3a32016-02-09 14:57:42 +02004553 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004554
4555 struct mlx5_ifc_flow_context_bits flow_context;
4556};
4557
4558struct mlx5_ifc_query_fte_in_bits {
4559 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004560 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004561
Matan Barakb4ff3a32016-02-09 14:57:42 +02004562 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004563 u8 op_mod[0x10];
4564
Matan Barakb4ff3a32016-02-09 14:57:42 +02004565 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004566
4567 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004568 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004569
Matan Barakb4ff3a32016-02-09 14:57:42 +02004570 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004571 u8 table_id[0x18];
4572
Matan Barakb4ff3a32016-02-09 14:57:42 +02004573 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004574
4575 u8 flow_index[0x20];
4576
Matan Barakb4ff3a32016-02-09 14:57:42 +02004577 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004578};
4579
4580enum {
4581 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4582 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4583 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4584};
4585
4586struct mlx5_ifc_query_flow_group_out_bits {
4587 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004588 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004589
4590 u8 syndrome[0x20];
4591
Matan Barakb4ff3a32016-02-09 14:57:42 +02004592 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004593
4594 u8 start_flow_index[0x20];
4595
Matan Barakb4ff3a32016-02-09 14:57:42 +02004596 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004597
4598 u8 end_flow_index[0x20];
4599
Matan Barakb4ff3a32016-02-09 14:57:42 +02004600 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004601
Matan Barakb4ff3a32016-02-09 14:57:42 +02004602 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004603 u8 match_criteria_enable[0x8];
4604
4605 struct mlx5_ifc_fte_match_param_bits match_criteria;
4606
Matan Barakb4ff3a32016-02-09 14:57:42 +02004607 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004608};
4609
4610struct mlx5_ifc_query_flow_group_in_bits {
4611 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004612 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004613
Matan Barakb4ff3a32016-02-09 14:57:42 +02004614 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004615 u8 op_mod[0x10];
4616
Matan Barakb4ff3a32016-02-09 14:57:42 +02004617 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004618
4619 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004620 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004621
Matan Barakb4ff3a32016-02-09 14:57:42 +02004622 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004623 u8 table_id[0x18];
4624
4625 u8 group_id[0x20];
4626
Matan Barakb4ff3a32016-02-09 14:57:42 +02004627 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004628};
4629
Amir Vadai9dc0b282016-05-13 12:55:39 +00004630struct mlx5_ifc_query_flow_counter_out_bits {
4631 u8 status[0x8];
4632 u8 reserved_at_8[0x18];
4633
4634 u8 syndrome[0x20];
4635
4636 u8 reserved_at_40[0x40];
4637
4638 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4639};
4640
4641struct mlx5_ifc_query_flow_counter_in_bits {
4642 u8 opcode[0x10];
4643 u8 reserved_at_10[0x10];
4644
4645 u8 reserved_at_20[0x10];
4646 u8 op_mod[0x10];
4647
4648 u8 reserved_at_40[0x80];
4649
4650 u8 clear[0x1];
4651 u8 reserved_at_c1[0xf];
4652 u8 num_of_counters[0x10];
4653
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004654 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004655};
4656
Saeed Mahameedd6666752015-12-01 18:03:22 +02004657struct mlx5_ifc_query_esw_vport_context_out_bits {
4658 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004659 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004660
4661 u8 syndrome[0x20];
4662
Matan Barakb4ff3a32016-02-09 14:57:42 +02004663 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004664
4665 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4666};
4667
4668struct mlx5_ifc_query_esw_vport_context_in_bits {
4669 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004670 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004671
Matan Barakb4ff3a32016-02-09 14:57:42 +02004672 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004673 u8 op_mod[0x10];
4674
4675 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004676 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004677 u8 vport_number[0x10];
4678
Matan Barakb4ff3a32016-02-09 14:57:42 +02004679 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004680};
4681
4682struct mlx5_ifc_modify_esw_vport_context_out_bits {
4683 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004684 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004685
4686 u8 syndrome[0x20];
4687
Matan Barakb4ff3a32016-02-09 14:57:42 +02004688 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004689};
4690
4691struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004692 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004693 u8 vport_cvlan_insert[0x1];
4694 u8 vport_svlan_insert[0x1];
4695 u8 vport_cvlan_strip[0x1];
4696 u8 vport_svlan_strip[0x1];
4697};
4698
4699struct mlx5_ifc_modify_esw_vport_context_in_bits {
4700 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004701 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004702
Matan Barakb4ff3a32016-02-09 14:57:42 +02004703 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004704 u8 op_mod[0x10];
4705
4706 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004707 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004708 u8 vport_number[0x10];
4709
4710 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4711
4712 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4713};
4714
Saeed Mahameede2816822015-05-28 22:28:40 +03004715struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004716 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004717 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004718
4719 u8 syndrome[0x20];
4720
Matan Barakb4ff3a32016-02-09 14:57:42 +02004721 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004722
4723 struct mlx5_ifc_eqc_bits eq_context_entry;
4724
Matan Barakb4ff3a32016-02-09 14:57:42 +02004725 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004726
4727 u8 event_bitmask[0x40];
4728
Matan Barakb4ff3a32016-02-09 14:57:42 +02004729 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004730
4731 u8 pas[0][0x40];
4732};
4733
4734struct mlx5_ifc_query_eq_in_bits {
4735 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004736 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004737
Matan Barakb4ff3a32016-02-09 14:57:42 +02004738 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004739 u8 op_mod[0x10];
4740
Matan Barakb4ff3a32016-02-09 14:57:42 +02004741 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004742 u8 eq_number[0x8];
4743
Matan Barakb4ff3a32016-02-09 14:57:42 +02004744 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004745};
4746
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004747struct mlx5_ifc_encap_header_in_bits {
4748 u8 reserved_at_0[0x5];
4749 u8 header_type[0x3];
4750 u8 reserved_at_8[0xe];
4751 u8 encap_header_size[0xa];
4752
4753 u8 reserved_at_20[0x10];
4754 u8 encap_header[2][0x8];
4755
4756 u8 more_encap_header[0][0x8];
4757};
4758
4759struct mlx5_ifc_query_encap_header_out_bits {
4760 u8 status[0x8];
4761 u8 reserved_at_8[0x18];
4762
4763 u8 syndrome[0x20];
4764
4765 u8 reserved_at_40[0xa0];
4766
4767 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4768};
4769
4770struct mlx5_ifc_query_encap_header_in_bits {
4771 u8 opcode[0x10];
4772 u8 reserved_at_10[0x10];
4773
4774 u8 reserved_at_20[0x10];
4775 u8 op_mod[0x10];
4776
4777 u8 encap_id[0x20];
4778
4779 u8 reserved_at_60[0xa0];
4780};
4781
4782struct mlx5_ifc_alloc_encap_header_out_bits {
4783 u8 status[0x8];
4784 u8 reserved_at_8[0x18];
4785
4786 u8 syndrome[0x20];
4787
4788 u8 encap_id[0x20];
4789
4790 u8 reserved_at_60[0x20];
4791};
4792
4793struct mlx5_ifc_alloc_encap_header_in_bits {
4794 u8 opcode[0x10];
4795 u8 reserved_at_10[0x10];
4796
4797 u8 reserved_at_20[0x10];
4798 u8 op_mod[0x10];
4799
4800 u8 reserved_at_40[0xa0];
4801
4802 struct mlx5_ifc_encap_header_in_bits encap_header;
4803};
4804
4805struct mlx5_ifc_dealloc_encap_header_out_bits {
4806 u8 status[0x8];
4807 u8 reserved_at_8[0x18];
4808
4809 u8 syndrome[0x20];
4810
4811 u8 reserved_at_40[0x40];
4812};
4813
4814struct mlx5_ifc_dealloc_encap_header_in_bits {
4815 u8 opcode[0x10];
4816 u8 reserved_at_10[0x10];
4817
4818 u8 reserved_20[0x10];
4819 u8 op_mod[0x10];
4820
4821 u8 encap_id[0x20];
4822
4823 u8 reserved_60[0x20];
4824};
4825
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004826struct mlx5_ifc_set_action_in_bits {
4827 u8 action_type[0x4];
4828 u8 field[0xc];
4829 u8 reserved_at_10[0x3];
4830 u8 offset[0x5];
4831 u8 reserved_at_18[0x3];
4832 u8 length[0x5];
4833
4834 u8 data[0x20];
4835};
4836
4837struct mlx5_ifc_add_action_in_bits {
4838 u8 action_type[0x4];
4839 u8 field[0xc];
4840 u8 reserved_at_10[0x10];
4841
4842 u8 data[0x20];
4843};
4844
4845union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4846 struct mlx5_ifc_set_action_in_bits set_action_in;
4847 struct mlx5_ifc_add_action_in_bits add_action_in;
4848 u8 reserved_at_0[0x40];
4849};
4850
4851enum {
4852 MLX5_ACTION_TYPE_SET = 0x1,
4853 MLX5_ACTION_TYPE_ADD = 0x2,
4854};
4855
4856enum {
4857 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4858 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4859 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4860 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4861 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4862 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4863 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4864 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4865 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4866 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4867 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4868 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4869 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4870 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4871 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4872 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4873 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4874 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4875 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4876 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4877 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4878 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004879 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004880};
4881
4882struct mlx5_ifc_alloc_modify_header_context_out_bits {
4883 u8 status[0x8];
4884 u8 reserved_at_8[0x18];
4885
4886 u8 syndrome[0x20];
4887
4888 u8 modify_header_id[0x20];
4889
4890 u8 reserved_at_60[0x20];
4891};
4892
4893struct mlx5_ifc_alloc_modify_header_context_in_bits {
4894 u8 opcode[0x10];
4895 u8 reserved_at_10[0x10];
4896
4897 u8 reserved_at_20[0x10];
4898 u8 op_mod[0x10];
4899
4900 u8 reserved_at_40[0x20];
4901
4902 u8 table_type[0x8];
4903 u8 reserved_at_68[0x10];
4904 u8 num_of_actions[0x8];
4905
4906 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4907};
4908
4909struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4910 u8 status[0x8];
4911 u8 reserved_at_8[0x18];
4912
4913 u8 syndrome[0x20];
4914
4915 u8 reserved_at_40[0x40];
4916};
4917
4918struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4919 u8 opcode[0x10];
4920 u8 reserved_at_10[0x10];
4921
4922 u8 reserved_at_20[0x10];
4923 u8 op_mod[0x10];
4924
4925 u8 modify_header_id[0x20];
4926
4927 u8 reserved_at_60[0x20];
4928};
4929
Saeed Mahameede2816822015-05-28 22:28:40 +03004930struct mlx5_ifc_query_dct_out_bits {
4931 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004932 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933
4934 u8 syndrome[0x20];
4935
Matan Barakb4ff3a32016-02-09 14:57:42 +02004936 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004937
4938 struct mlx5_ifc_dctc_bits dct_context_entry;
4939
Matan Barakb4ff3a32016-02-09 14:57:42 +02004940 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004941};
4942
4943struct mlx5_ifc_query_dct_in_bits {
4944 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004945 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004946
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948 u8 op_mod[0x10];
4949
Matan Barakb4ff3a32016-02-09 14:57:42 +02004950 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004951 u8 dctn[0x18];
4952
Matan Barakb4ff3a32016-02-09 14:57:42 +02004953 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004954};
4955
4956struct mlx5_ifc_query_cq_out_bits {
4957 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004958 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004959
4960 u8 syndrome[0x20];
4961
Matan Barakb4ff3a32016-02-09 14:57:42 +02004962 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004963
4964 struct mlx5_ifc_cqc_bits cq_context;
4965
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967
4968 u8 pas[0][0x40];
4969};
4970
4971struct mlx5_ifc_query_cq_in_bits {
4972 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004973 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004974
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004976 u8 op_mod[0x10];
4977
Matan Barakb4ff3a32016-02-09 14:57:42 +02004978 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004979 u8 cqn[0x18];
4980
Matan Barakb4ff3a32016-02-09 14:57:42 +02004981 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004982};
4983
4984struct mlx5_ifc_query_cong_status_out_bits {
4985 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004986 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004987
4988 u8 syndrome[0x20];
4989
Matan Barakb4ff3a32016-02-09 14:57:42 +02004990 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004991
4992 u8 enable[0x1];
4993 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004994 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004995};
4996
4997struct mlx5_ifc_query_cong_status_in_bits {
4998 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004999 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005000
Matan Barakb4ff3a32016-02-09 14:57:42 +02005001 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005002 u8 op_mod[0x10];
5003
Matan Barakb4ff3a32016-02-09 14:57:42 +02005004 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005005 u8 priority[0x4];
5006 u8 cong_protocol[0x4];
5007
Matan Barakb4ff3a32016-02-09 14:57:42 +02005008 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005009};
5010
5011struct mlx5_ifc_query_cong_statistics_out_bits {
5012 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005013 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005014
5015 u8 syndrome[0x20];
5016
Matan Barakb4ff3a32016-02-09 14:57:42 +02005017 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005018
Parav Pandite1f24a72017-04-16 07:29:29 +03005019 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005020
5021 u8 sum_flows[0x20];
5022
Parav Pandite1f24a72017-04-16 07:29:29 +03005023 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005024
Parav Pandite1f24a72017-04-16 07:29:29 +03005025 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005026
Parav Pandite1f24a72017-04-16 07:29:29 +03005027 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005028
Parav Pandite1f24a72017-04-16 07:29:29 +03005029 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005030
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032
5033 u8 time_stamp_high[0x20];
5034
5035 u8 time_stamp_low[0x20];
5036
5037 u8 accumulators_period[0x20];
5038
Parav Pandite1f24a72017-04-16 07:29:29 +03005039 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005040
Parav Pandite1f24a72017-04-16 07:29:29 +03005041 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005042
Parav Pandite1f24a72017-04-16 07:29:29 +03005043 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005044
Parav Pandite1f24a72017-04-16 07:29:29 +03005045 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005046
Matan Barakb4ff3a32016-02-09 14:57:42 +02005047 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03005048};
5049
5050struct mlx5_ifc_query_cong_statistics_in_bits {
5051 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005052 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005053
Matan Barakb4ff3a32016-02-09 14:57:42 +02005054 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005055 u8 op_mod[0x10];
5056
5057 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005058 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03005059
Matan Barakb4ff3a32016-02-09 14:57:42 +02005060 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005061};
5062
5063struct mlx5_ifc_query_cong_params_out_bits {
5064 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005065 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005066
5067 u8 syndrome[0x20];
5068
Matan Barakb4ff3a32016-02-09 14:57:42 +02005069 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005070
5071 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5072};
5073
5074struct mlx5_ifc_query_cong_params_in_bits {
5075 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005076 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005077
Matan Barakb4ff3a32016-02-09 14:57:42 +02005078 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005079 u8 op_mod[0x10];
5080
Matan Barakb4ff3a32016-02-09 14:57:42 +02005081 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005082 u8 cong_protocol[0x4];
5083
Matan Barakb4ff3a32016-02-09 14:57:42 +02005084 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005085};
5086
5087struct mlx5_ifc_query_adapter_out_bits {
5088 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005089 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005090
5091 u8 syndrome[0x20];
5092
Matan Barakb4ff3a32016-02-09 14:57:42 +02005093 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005094
5095 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
5096};
5097
5098struct mlx5_ifc_query_adapter_in_bits {
5099 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005100 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005101
Matan Barakb4ff3a32016-02-09 14:57:42 +02005102 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005103 u8 op_mod[0x10];
5104
Matan Barakb4ff3a32016-02-09 14:57:42 +02005105 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005106};
5107
5108struct mlx5_ifc_qp_2rst_out_bits {
5109 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005110 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005111
5112 u8 syndrome[0x20];
5113
Matan Barakb4ff3a32016-02-09 14:57:42 +02005114 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005115};
5116
5117struct mlx5_ifc_qp_2rst_in_bits {
5118 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005119 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005120
Matan Barakb4ff3a32016-02-09 14:57:42 +02005121 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005122 u8 op_mod[0x10];
5123
Matan Barakb4ff3a32016-02-09 14:57:42 +02005124 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005125 u8 qpn[0x18];
5126
Matan Barakb4ff3a32016-02-09 14:57:42 +02005127 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005128};
5129
5130struct mlx5_ifc_qp_2err_out_bits {
5131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133
5134 u8 syndrome[0x20];
5135
Matan Barakb4ff3a32016-02-09 14:57:42 +02005136 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137};
5138
5139struct mlx5_ifc_qp_2err_in_bits {
5140 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005142
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005144 u8 op_mod[0x10];
5145
Matan Barakb4ff3a32016-02-09 14:57:42 +02005146 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005147 u8 qpn[0x18];
5148
Matan Barakb4ff3a32016-02-09 14:57:42 +02005149 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005150};
5151
5152struct mlx5_ifc_page_fault_resume_out_bits {
5153 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005154 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005155
5156 u8 syndrome[0x20];
5157
Matan Barakb4ff3a32016-02-09 14:57:42 +02005158 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005159};
5160
5161struct mlx5_ifc_page_fault_resume_in_bits {
5162 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005164
Matan Barakb4ff3a32016-02-09 14:57:42 +02005165 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005166 u8 op_mod[0x10];
5167
5168 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005169 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005170 u8 page_fault_type[0x3];
5171 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005172
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005173 u8 reserved_at_60[0x8];
5174 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005175};
5176
5177struct mlx5_ifc_nop_out_bits {
5178 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005179 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005180
5181 u8 syndrome[0x20];
5182
Matan Barakb4ff3a32016-02-09 14:57:42 +02005183 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005184};
5185
5186struct mlx5_ifc_nop_in_bits {
5187 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005188 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005189
Matan Barakb4ff3a32016-02-09 14:57:42 +02005190 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005191 u8 op_mod[0x10];
5192
Matan Barakb4ff3a32016-02-09 14:57:42 +02005193 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005194};
5195
5196struct mlx5_ifc_modify_vport_state_out_bits {
5197 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005198 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005199
5200 u8 syndrome[0x20];
5201
Matan Barakb4ff3a32016-02-09 14:57:42 +02005202 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005203};
5204
5205struct mlx5_ifc_modify_vport_state_in_bits {
5206 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005207 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005208
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005210 u8 op_mod[0x10];
5211
5212 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005213 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005214 u8 vport_number[0x10];
5215
Matan Barakb4ff3a32016-02-09 14:57:42 +02005216 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005217 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005218 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005219};
5220
5221struct mlx5_ifc_modify_tis_out_bits {
5222 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005223 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005224
5225 u8 syndrome[0x20];
5226
Matan Barakb4ff3a32016-02-09 14:57:42 +02005227 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005228};
5229
majd@mellanox.com75850d02016-01-14 19:13:06 +02005230struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005231 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005232
Aviv Heller84df61e2016-05-10 13:47:50 +03005233 u8 reserved_at_20[0x1d];
5234 u8 lag_tx_port_affinity[0x1];
5235 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005236 u8 prio[0x1];
5237};
5238
Saeed Mahameede2816822015-05-28 22:28:40 +03005239struct mlx5_ifc_modify_tis_in_bits {
5240 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005241 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005242
Matan Barakb4ff3a32016-02-09 14:57:42 +02005243 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005244 u8 op_mod[0x10];
5245
Matan Barakb4ff3a32016-02-09 14:57:42 +02005246 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005247 u8 tisn[0x18];
5248
Matan Barakb4ff3a32016-02-09 14:57:42 +02005249 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005250
majd@mellanox.com75850d02016-01-14 19:13:06 +02005251 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005252
Matan Barakb4ff3a32016-02-09 14:57:42 +02005253 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005254
5255 struct mlx5_ifc_tisc_bits ctx;
5256};
5257
Achiad Shochatd9eea402015-08-04 14:05:42 +03005258struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005259 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005260
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005262 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005263 u8 reserved_at_3c[0x1];
5264 u8 hash[0x1];
5265 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005266 u8 lro[0x1];
5267};
5268
Saeed Mahameede2816822015-05-28 22:28:40 +03005269struct mlx5_ifc_modify_tir_out_bits {
5270 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005271 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005272
5273 u8 syndrome[0x20];
5274
Matan Barakb4ff3a32016-02-09 14:57:42 +02005275 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005276};
5277
5278struct mlx5_ifc_modify_tir_in_bits {
5279 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005280 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005281
Matan Barakb4ff3a32016-02-09 14:57:42 +02005282 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005283 u8 op_mod[0x10];
5284
Matan Barakb4ff3a32016-02-09 14:57:42 +02005285 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005286 u8 tirn[0x18];
5287
Matan Barakb4ff3a32016-02-09 14:57:42 +02005288 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005289
Achiad Shochatd9eea402015-08-04 14:05:42 +03005290 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005291
Matan Barakb4ff3a32016-02-09 14:57:42 +02005292 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005293
5294 struct mlx5_ifc_tirc_bits ctx;
5295};
5296
5297struct mlx5_ifc_modify_sq_out_bits {
5298 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005299 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005300
5301 u8 syndrome[0x20];
5302
Matan Barakb4ff3a32016-02-09 14:57:42 +02005303 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005304};
5305
5306struct mlx5_ifc_modify_sq_in_bits {
5307 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005308 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005309
Matan Barakb4ff3a32016-02-09 14:57:42 +02005310 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005311 u8 op_mod[0x10];
5312
5313 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005314 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005315 u8 sqn[0x18];
5316
Matan Barakb4ff3a32016-02-09 14:57:42 +02005317 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005318
5319 u8 modify_bitmask[0x40];
5320
Matan Barakb4ff3a32016-02-09 14:57:42 +02005321 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005322
5323 struct mlx5_ifc_sqc_bits ctx;
5324};
5325
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005326struct mlx5_ifc_modify_scheduling_element_out_bits {
5327 u8 status[0x8];
5328 u8 reserved_at_8[0x18];
5329
5330 u8 syndrome[0x20];
5331
5332 u8 reserved_at_40[0x1c0];
5333};
5334
5335enum {
5336 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5337 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5338};
5339
5340struct mlx5_ifc_modify_scheduling_element_in_bits {
5341 u8 opcode[0x10];
5342 u8 reserved_at_10[0x10];
5343
5344 u8 reserved_at_20[0x10];
5345 u8 op_mod[0x10];
5346
5347 u8 scheduling_hierarchy[0x8];
5348 u8 reserved_at_48[0x18];
5349
5350 u8 scheduling_element_id[0x20];
5351
5352 u8 reserved_at_80[0x20];
5353
5354 u8 modify_bitmask[0x20];
5355
5356 u8 reserved_at_c0[0x40];
5357
5358 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5359
5360 u8 reserved_at_300[0x100];
5361};
5362
Saeed Mahameede2816822015-05-28 22:28:40 +03005363struct mlx5_ifc_modify_rqt_out_bits {
5364 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005365 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005366
5367 u8 syndrome[0x20];
5368
Matan Barakb4ff3a32016-02-09 14:57:42 +02005369 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005370};
5371
Achiad Shochat5c503682015-08-04 14:05:43 +03005372struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005373 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005374
Matan Barakb4ff3a32016-02-09 14:57:42 +02005375 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005376 u8 rqn_list[0x1];
5377};
5378
Saeed Mahameede2816822015-05-28 22:28:40 +03005379struct mlx5_ifc_modify_rqt_in_bits {
5380 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005381 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005382
Matan Barakb4ff3a32016-02-09 14:57:42 +02005383 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005384 u8 op_mod[0x10];
5385
Matan Barakb4ff3a32016-02-09 14:57:42 +02005386 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005387 u8 rqtn[0x18];
5388
Matan Barakb4ff3a32016-02-09 14:57:42 +02005389 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005390
Achiad Shochat5c503682015-08-04 14:05:43 +03005391 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005392
Matan Barakb4ff3a32016-02-09 14:57:42 +02005393 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005394
5395 struct mlx5_ifc_rqtc_bits ctx;
5396};
5397
5398struct mlx5_ifc_modify_rq_out_bits {
5399 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005400 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005401
5402 u8 syndrome[0x20];
5403
Matan Barakb4ff3a32016-02-09 14:57:42 +02005404 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005405};
5406
Alex Vesker83b502a2016-08-04 17:32:02 +03005407enum {
5408 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005409 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005410 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005411};
5412
Saeed Mahameede2816822015-05-28 22:28:40 +03005413struct mlx5_ifc_modify_rq_in_bits {
5414 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005415 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005416
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418 u8 op_mod[0x10];
5419
5420 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005421 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422 u8 rqn[0x18];
5423
Matan Barakb4ff3a32016-02-09 14:57:42 +02005424 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005425
5426 u8 modify_bitmask[0x40];
5427
Matan Barakb4ff3a32016-02-09 14:57:42 +02005428 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005429
5430 struct mlx5_ifc_rqc_bits ctx;
5431};
5432
5433struct mlx5_ifc_modify_rmp_out_bits {
5434 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005435 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005436
5437 u8 syndrome[0x20];
5438
Matan Barakb4ff3a32016-02-09 14:57:42 +02005439 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005440};
5441
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005442struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005443 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005444
Matan Barakb4ff3a32016-02-09 14:57:42 +02005445 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005446 u8 lwm[0x1];
5447};
5448
Saeed Mahameede2816822015-05-28 22:28:40 +03005449struct mlx5_ifc_modify_rmp_in_bits {
5450 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005451 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005452
Matan Barakb4ff3a32016-02-09 14:57:42 +02005453 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005454 u8 op_mod[0x10];
5455
5456 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005457 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005458 u8 rmpn[0x18];
5459
Matan Barakb4ff3a32016-02-09 14:57:42 +02005460 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005461
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005462 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005463
Matan Barakb4ff3a32016-02-09 14:57:42 +02005464 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005465
5466 struct mlx5_ifc_rmpc_bits ctx;
5467};
5468
5469struct mlx5_ifc_modify_nic_vport_context_out_bits {
5470 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005471 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005472
5473 u8 syndrome[0x20];
5474
Matan Barakb4ff3a32016-02-09 14:57:42 +02005475 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005476};
5477
5478struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005479 u8 reserved_at_0[0x12];
5480 u8 affiliation[0x1];
5481 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005482 u8 disable_uc_local_lb[0x1];
5483 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005484 u8 node_guid[0x1];
5485 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005486 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005487 u8 mtu[0x1];
5488 u8 change_event[0x1];
5489 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005490 u8 permanent_address[0x1];
5491 u8 addresses_list[0x1];
5492 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494};
5495
5496struct mlx5_ifc_modify_nic_vport_context_in_bits {
5497 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005498 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005499
Matan Barakb4ff3a32016-02-09 14:57:42 +02005500 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005501 u8 op_mod[0x10];
5502
5503 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505 u8 vport_number[0x10];
5506
5507 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5508
Matan Barakb4ff3a32016-02-09 14:57:42 +02005509 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005510
5511 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5512};
5513
5514struct mlx5_ifc_modify_hca_vport_context_out_bits {
5515 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005516 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005517
5518 u8 syndrome[0x20];
5519
Matan Barakb4ff3a32016-02-09 14:57:42 +02005520 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005521};
5522
5523struct mlx5_ifc_modify_hca_vport_context_in_bits {
5524 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005525 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005526
Matan Barakb4ff3a32016-02-09 14:57:42 +02005527 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005528 u8 op_mod[0x10];
5529
5530 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005531 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005532 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005533 u8 vport_number[0x10];
5534
Matan Barakb4ff3a32016-02-09 14:57:42 +02005535 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005536
5537 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5538};
5539
5540struct mlx5_ifc_modify_cq_out_bits {
5541 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543
5544 u8 syndrome[0x20];
5545
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547};
5548
5549enum {
5550 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5551 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5552};
5553
5554struct mlx5_ifc_modify_cq_in_bits {
5555 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005556 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005557
Matan Barakb4ff3a32016-02-09 14:57:42 +02005558 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005559 u8 op_mod[0x10];
5560
Matan Barakb4ff3a32016-02-09 14:57:42 +02005561 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005562 u8 cqn[0x18];
5563
5564 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5565
5566 struct mlx5_ifc_cqc_bits cq_context;
5567
Matan Barakb4ff3a32016-02-09 14:57:42 +02005568 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005569
5570 u8 pas[0][0x40];
5571};
5572
5573struct mlx5_ifc_modify_cong_status_out_bits {
5574 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005575 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005576
5577 u8 syndrome[0x20];
5578
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580};
5581
5582struct mlx5_ifc_modify_cong_status_in_bits {
5583 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005584 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005585
Matan Barakb4ff3a32016-02-09 14:57:42 +02005586 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005587 u8 op_mod[0x10];
5588
Matan Barakb4ff3a32016-02-09 14:57:42 +02005589 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005590 u8 priority[0x4];
5591 u8 cong_protocol[0x4];
5592
5593 u8 enable[0x1];
5594 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005595 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596};
5597
5598struct mlx5_ifc_modify_cong_params_out_bits {
5599 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005600 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005601
5602 u8 syndrome[0x20];
5603
Matan Barakb4ff3a32016-02-09 14:57:42 +02005604 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005605};
5606
5607struct mlx5_ifc_modify_cong_params_in_bits {
5608 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005609 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005610
Matan Barakb4ff3a32016-02-09 14:57:42 +02005611 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005612 u8 op_mod[0x10];
5613
Matan Barakb4ff3a32016-02-09 14:57:42 +02005614 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005615 u8 cong_protocol[0x4];
5616
5617 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5618
Matan Barakb4ff3a32016-02-09 14:57:42 +02005619 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005620
5621 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5622};
5623
5624struct mlx5_ifc_manage_pages_out_bits {
5625 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005626 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005627
5628 u8 syndrome[0x20];
5629
5630 u8 output_num_entries[0x20];
5631
Matan Barakb4ff3a32016-02-09 14:57:42 +02005632 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005633
5634 u8 pas[0][0x40];
5635};
5636
5637enum {
5638 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5639 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5640 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5641};
5642
5643struct mlx5_ifc_manage_pages_in_bits {
5644 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005645 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005646
Matan Barakb4ff3a32016-02-09 14:57:42 +02005647 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005648 u8 op_mod[0x10];
5649
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651 u8 function_id[0x10];
5652
5653 u8 input_num_entries[0x20];
5654
5655 u8 pas[0][0x40];
5656};
5657
5658struct mlx5_ifc_mad_ifc_out_bits {
5659 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005660 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005661
5662 u8 syndrome[0x20];
5663
Matan Barakb4ff3a32016-02-09 14:57:42 +02005664 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005665
5666 u8 response_mad_packet[256][0x8];
5667};
5668
5669struct mlx5_ifc_mad_ifc_in_bits {
5670 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005671 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005672
Matan Barakb4ff3a32016-02-09 14:57:42 +02005673 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005674 u8 op_mod[0x10];
5675
5676 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678 u8 port[0x8];
5679
Matan Barakb4ff3a32016-02-09 14:57:42 +02005680 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005681
5682 u8 mad[256][0x8];
5683};
5684
5685struct mlx5_ifc_init_hca_out_bits {
5686 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005687 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005688
5689 u8 syndrome[0x20];
5690
Matan Barakb4ff3a32016-02-09 14:57:42 +02005691 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005692};
5693
5694struct mlx5_ifc_init_hca_in_bits {
5695 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005696 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005697
Matan Barakb4ff3a32016-02-09 14:57:42 +02005698 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005699 u8 op_mod[0x10];
5700
Matan Barakb4ff3a32016-02-09 14:57:42 +02005701 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005702 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703};
5704
5705struct mlx5_ifc_init2rtr_qp_out_bits {
5706 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708
5709 u8 syndrome[0x20];
5710
Matan Barakb4ff3a32016-02-09 14:57:42 +02005711 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005712};
5713
5714struct mlx5_ifc_init2rtr_qp_in_bits {
5715 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717
Matan Barakb4ff3a32016-02-09 14:57:42 +02005718 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005719 u8 op_mod[0x10];
5720
Matan Barakb4ff3a32016-02-09 14:57:42 +02005721 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005722 u8 qpn[0x18];
5723
Matan Barakb4ff3a32016-02-09 14:57:42 +02005724 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005725
5726 u8 opt_param_mask[0x20];
5727
Matan Barakb4ff3a32016-02-09 14:57:42 +02005728 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005729
5730 struct mlx5_ifc_qpc_bits qpc;
5731
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733};
5734
5735struct mlx5_ifc_init2init_qp_out_bits {
5736 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005737 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005738
5739 u8 syndrome[0x20];
5740
Matan Barakb4ff3a32016-02-09 14:57:42 +02005741 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005742};
5743
5744struct mlx5_ifc_init2init_qp_in_bits {
5745 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005746 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005747
Matan Barakb4ff3a32016-02-09 14:57:42 +02005748 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005749 u8 op_mod[0x10];
5750
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752 u8 qpn[0x18];
5753
Matan Barakb4ff3a32016-02-09 14:57:42 +02005754 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005755
5756 u8 opt_param_mask[0x20];
5757
Matan Barakb4ff3a32016-02-09 14:57:42 +02005758 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005759
5760 struct mlx5_ifc_qpc_bits qpc;
5761
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763};
5764
5765struct mlx5_ifc_get_dropped_packet_log_out_bits {
5766 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005767 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005768
5769 u8 syndrome[0x20];
5770
Matan Barakb4ff3a32016-02-09 14:57:42 +02005771 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005772
5773 u8 packet_headers_log[128][0x8];
5774
5775 u8 packet_syndrome[64][0x8];
5776};
5777
5778struct mlx5_ifc_get_dropped_packet_log_in_bits {
5779 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005780 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005781
Matan Barakb4ff3a32016-02-09 14:57:42 +02005782 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005783 u8 op_mod[0x10];
5784
Matan Barakb4ff3a32016-02-09 14:57:42 +02005785 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005786};
5787
5788struct mlx5_ifc_gen_eqe_in_bits {
5789 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005790 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005791
Matan Barakb4ff3a32016-02-09 14:57:42 +02005792 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005793 u8 op_mod[0x10];
5794
Matan Barakb4ff3a32016-02-09 14:57:42 +02005795 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005796 u8 eq_number[0x8];
5797
Matan Barakb4ff3a32016-02-09 14:57:42 +02005798 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005799
5800 u8 eqe[64][0x8];
5801};
5802
5803struct mlx5_ifc_gen_eq_out_bits {
5804 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005805 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005806
5807 u8 syndrome[0x20];
5808
Matan Barakb4ff3a32016-02-09 14:57:42 +02005809 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005810};
5811
5812struct mlx5_ifc_enable_hca_out_bits {
5813 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005814 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005815
5816 u8 syndrome[0x20];
5817
Matan Barakb4ff3a32016-02-09 14:57:42 +02005818 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005819};
5820
5821struct mlx5_ifc_enable_hca_in_bits {
5822 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005823 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005824
Matan Barakb4ff3a32016-02-09 14:57:42 +02005825 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005826 u8 op_mod[0x10];
5827
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829 u8 function_id[0x10];
5830
Matan Barakb4ff3a32016-02-09 14:57:42 +02005831 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005832};
5833
5834struct mlx5_ifc_drain_dct_out_bits {
5835 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005836 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005837
5838 u8 syndrome[0x20];
5839
Matan Barakb4ff3a32016-02-09 14:57:42 +02005840 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005841};
5842
5843struct mlx5_ifc_drain_dct_in_bits {
5844 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005845 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005846
Matan Barakb4ff3a32016-02-09 14:57:42 +02005847 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005848 u8 op_mod[0x10];
5849
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851 u8 dctn[0x18];
5852
Matan Barakb4ff3a32016-02-09 14:57:42 +02005853 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005854};
5855
5856struct mlx5_ifc_disable_hca_out_bits {
5857 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005858 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005859
5860 u8 syndrome[0x20];
5861
Matan Barakb4ff3a32016-02-09 14:57:42 +02005862 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005863};
5864
5865struct mlx5_ifc_disable_hca_in_bits {
5866 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005867 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005868
Matan Barakb4ff3a32016-02-09 14:57:42 +02005869 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005870 u8 op_mod[0x10];
5871
Matan Barakb4ff3a32016-02-09 14:57:42 +02005872 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005873 u8 function_id[0x10];
5874
Matan Barakb4ff3a32016-02-09 14:57:42 +02005875 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005876};
5877
5878struct mlx5_ifc_detach_from_mcg_out_bits {
5879 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005880 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005881
5882 u8 syndrome[0x20];
5883
Matan Barakb4ff3a32016-02-09 14:57:42 +02005884 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005885};
5886
5887struct mlx5_ifc_detach_from_mcg_in_bits {
5888 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005889 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005890
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892 u8 op_mod[0x10];
5893
Matan Barakb4ff3a32016-02-09 14:57:42 +02005894 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005895 u8 qpn[0x18];
5896
Matan Barakb4ff3a32016-02-09 14:57:42 +02005897 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005898
5899 u8 multicast_gid[16][0x8];
5900};
5901
Saeed Mahameed74862162016-06-09 15:11:34 +03005902struct mlx5_ifc_destroy_xrq_out_bits {
5903 u8 status[0x8];
5904 u8 reserved_at_8[0x18];
5905
5906 u8 syndrome[0x20];
5907
5908 u8 reserved_at_40[0x40];
5909};
5910
5911struct mlx5_ifc_destroy_xrq_in_bits {
5912 u8 opcode[0x10];
5913 u8 reserved_at_10[0x10];
5914
5915 u8 reserved_at_20[0x10];
5916 u8 op_mod[0x10];
5917
5918 u8 reserved_at_40[0x8];
5919 u8 xrqn[0x18];
5920
5921 u8 reserved_at_60[0x20];
5922};
5923
Saeed Mahameede2816822015-05-28 22:28:40 +03005924struct mlx5_ifc_destroy_xrc_srq_out_bits {
5925 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005926 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005927
5928 u8 syndrome[0x20];
5929
Matan Barakb4ff3a32016-02-09 14:57:42 +02005930 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005931};
5932
5933struct mlx5_ifc_destroy_xrc_srq_in_bits {
5934 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005935 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005936
Matan Barakb4ff3a32016-02-09 14:57:42 +02005937 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005938 u8 op_mod[0x10];
5939
Matan Barakb4ff3a32016-02-09 14:57:42 +02005940 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005941 u8 xrc_srqn[0x18];
5942
Matan Barakb4ff3a32016-02-09 14:57:42 +02005943 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005944};
5945
5946struct mlx5_ifc_destroy_tis_out_bits {
5947 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005948 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005949
5950 u8 syndrome[0x20];
5951
Matan Barakb4ff3a32016-02-09 14:57:42 +02005952 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005953};
5954
5955struct mlx5_ifc_destroy_tis_in_bits {
5956 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005957 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958
Matan Barakb4ff3a32016-02-09 14:57:42 +02005959 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005960 u8 op_mod[0x10];
5961
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963 u8 tisn[0x18];
5964
Matan Barakb4ff3a32016-02-09 14:57:42 +02005965 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005966};
5967
5968struct mlx5_ifc_destroy_tir_out_bits {
5969 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971
5972 u8 syndrome[0x20];
5973
Matan Barakb4ff3a32016-02-09 14:57:42 +02005974 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005975};
5976
5977struct mlx5_ifc_destroy_tir_in_bits {
5978 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005979 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005980
Matan Barakb4ff3a32016-02-09 14:57:42 +02005981 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005982 u8 op_mod[0x10];
5983
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985 u8 tirn[0x18];
5986
Matan Barakb4ff3a32016-02-09 14:57:42 +02005987 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005988};
5989
5990struct mlx5_ifc_destroy_srq_out_bits {
5991 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005992 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005993
5994 u8 syndrome[0x20];
5995
Matan Barakb4ff3a32016-02-09 14:57:42 +02005996 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005997};
5998
5999struct mlx5_ifc_destroy_srq_in_bits {
6000 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002
Matan Barakb4ff3a32016-02-09 14:57:42 +02006003 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006004 u8 op_mod[0x10];
6005
Matan Barakb4ff3a32016-02-09 14:57:42 +02006006 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006007 u8 srqn[0x18];
6008
Matan Barakb4ff3a32016-02-09 14:57:42 +02006009 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006010};
6011
6012struct mlx5_ifc_destroy_sq_out_bits {
6013 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006014 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006015
6016 u8 syndrome[0x20];
6017
Matan Barakb4ff3a32016-02-09 14:57:42 +02006018 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019};
6020
6021struct mlx5_ifc_destroy_sq_in_bits {
6022 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006023 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006024
Matan Barakb4ff3a32016-02-09 14:57:42 +02006025 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006026 u8 op_mod[0x10];
6027
Matan Barakb4ff3a32016-02-09 14:57:42 +02006028 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006029 u8 sqn[0x18];
6030
Matan Barakb4ff3a32016-02-09 14:57:42 +02006031 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006032};
6033
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006034struct mlx5_ifc_destroy_scheduling_element_out_bits {
6035 u8 status[0x8];
6036 u8 reserved_at_8[0x18];
6037
6038 u8 syndrome[0x20];
6039
6040 u8 reserved_at_40[0x1c0];
6041};
6042
6043struct mlx5_ifc_destroy_scheduling_element_in_bits {
6044 u8 opcode[0x10];
6045 u8 reserved_at_10[0x10];
6046
6047 u8 reserved_at_20[0x10];
6048 u8 op_mod[0x10];
6049
6050 u8 scheduling_hierarchy[0x8];
6051 u8 reserved_at_48[0x18];
6052
6053 u8 scheduling_element_id[0x20];
6054
6055 u8 reserved_at_80[0x180];
6056};
6057
Saeed Mahameede2816822015-05-28 22:28:40 +03006058struct mlx5_ifc_destroy_rqt_out_bits {
6059 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006060 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006061
6062 u8 syndrome[0x20];
6063
Matan Barakb4ff3a32016-02-09 14:57:42 +02006064 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006065};
6066
6067struct mlx5_ifc_destroy_rqt_in_bits {
6068 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006069 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006070
Matan Barakb4ff3a32016-02-09 14:57:42 +02006071 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006072 u8 op_mod[0x10];
6073
Matan Barakb4ff3a32016-02-09 14:57:42 +02006074 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006075 u8 rqtn[0x18];
6076
Matan Barakb4ff3a32016-02-09 14:57:42 +02006077 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006078};
6079
6080struct mlx5_ifc_destroy_rq_out_bits {
6081 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006082 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006083
6084 u8 syndrome[0x20];
6085
Matan Barakb4ff3a32016-02-09 14:57:42 +02006086 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006087};
6088
6089struct mlx5_ifc_destroy_rq_in_bits {
6090 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006091 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006092
Matan Barakb4ff3a32016-02-09 14:57:42 +02006093 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006094 u8 op_mod[0x10];
6095
Matan Barakb4ff3a32016-02-09 14:57:42 +02006096 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006097 u8 rqn[0x18];
6098
Matan Barakb4ff3a32016-02-09 14:57:42 +02006099 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006100};
6101
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006102struct mlx5_ifc_set_delay_drop_params_in_bits {
6103 u8 opcode[0x10];
6104 u8 reserved_at_10[0x10];
6105
6106 u8 reserved_at_20[0x10];
6107 u8 op_mod[0x10];
6108
6109 u8 reserved_at_40[0x20];
6110
6111 u8 reserved_at_60[0x10];
6112 u8 delay_drop_timeout[0x10];
6113};
6114
6115struct mlx5_ifc_set_delay_drop_params_out_bits {
6116 u8 status[0x8];
6117 u8 reserved_at_8[0x18];
6118
6119 u8 syndrome[0x20];
6120
6121 u8 reserved_at_40[0x40];
6122};
6123
Saeed Mahameede2816822015-05-28 22:28:40 +03006124struct mlx5_ifc_destroy_rmp_out_bits {
6125 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006126 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006127
6128 u8 syndrome[0x20];
6129
Matan Barakb4ff3a32016-02-09 14:57:42 +02006130 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006131};
6132
6133struct mlx5_ifc_destroy_rmp_in_bits {
6134 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006135 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006136
Matan Barakb4ff3a32016-02-09 14:57:42 +02006137 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006138 u8 op_mod[0x10];
6139
Matan Barakb4ff3a32016-02-09 14:57:42 +02006140 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006141 u8 rmpn[0x18];
6142
Matan Barakb4ff3a32016-02-09 14:57:42 +02006143 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006144};
6145
6146struct mlx5_ifc_destroy_qp_out_bits {
6147 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006148 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006149
6150 u8 syndrome[0x20];
6151
Matan Barakb4ff3a32016-02-09 14:57:42 +02006152 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006153};
6154
6155struct mlx5_ifc_destroy_qp_in_bits {
6156 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006157 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006158
Matan Barakb4ff3a32016-02-09 14:57:42 +02006159 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006160 u8 op_mod[0x10];
6161
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163 u8 qpn[0x18];
6164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166};
6167
6168struct mlx5_ifc_destroy_psv_out_bits {
6169 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006170 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006171
6172 u8 syndrome[0x20];
6173
Matan Barakb4ff3a32016-02-09 14:57:42 +02006174 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006175};
6176
6177struct mlx5_ifc_destroy_psv_in_bits {
6178 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006179 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006180
Matan Barakb4ff3a32016-02-09 14:57:42 +02006181 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006182 u8 op_mod[0x10];
6183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185 u8 psvn[0x18];
6186
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188};
6189
6190struct mlx5_ifc_destroy_mkey_out_bits {
6191 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006192 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006193
6194 u8 syndrome[0x20];
6195
Matan Barakb4ff3a32016-02-09 14:57:42 +02006196 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006197};
6198
6199struct mlx5_ifc_destroy_mkey_in_bits {
6200 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006201 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006202
Matan Barakb4ff3a32016-02-09 14:57:42 +02006203 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006204 u8 op_mod[0x10];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207 u8 mkey_index[0x18];
6208
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210};
6211
6212struct mlx5_ifc_destroy_flow_table_out_bits {
6213 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006214 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006215
6216 u8 syndrome[0x20];
6217
Matan Barakb4ff3a32016-02-09 14:57:42 +02006218 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219};
6220
6221struct mlx5_ifc_destroy_flow_table_in_bits {
6222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006224
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226 u8 op_mod[0x10];
6227
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006228 u8 other_vport[0x1];
6229 u8 reserved_at_41[0xf];
6230 u8 vport_number[0x10];
6231
6232 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006233
6234 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006235 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006236
Matan Barakb4ff3a32016-02-09 14:57:42 +02006237 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006238 u8 table_id[0x18];
6239
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241};
6242
6243struct mlx5_ifc_destroy_flow_group_out_bits {
6244 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006245 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006246
6247 u8 syndrome[0x20];
6248
Matan Barakb4ff3a32016-02-09 14:57:42 +02006249 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006250};
6251
6252struct mlx5_ifc_destroy_flow_group_in_bits {
6253 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006254 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006255
Matan Barakb4ff3a32016-02-09 14:57:42 +02006256 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006257 u8 op_mod[0x10];
6258
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006259 u8 other_vport[0x1];
6260 u8 reserved_at_41[0xf];
6261 u8 vport_number[0x10];
6262
6263 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006264
6265 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006266 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006267
Matan Barakb4ff3a32016-02-09 14:57:42 +02006268 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006269 u8 table_id[0x18];
6270
6271 u8 group_id[0x20];
6272
Matan Barakb4ff3a32016-02-09 14:57:42 +02006273 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006274};
6275
6276struct mlx5_ifc_destroy_eq_out_bits {
6277 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006278 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006279
6280 u8 syndrome[0x20];
6281
Matan Barakb4ff3a32016-02-09 14:57:42 +02006282 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006283};
6284
6285struct mlx5_ifc_destroy_eq_in_bits {
6286 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006287 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006288
Matan Barakb4ff3a32016-02-09 14:57:42 +02006289 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006290 u8 op_mod[0x10];
6291
Matan Barakb4ff3a32016-02-09 14:57:42 +02006292 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006293 u8 eq_number[0x8];
6294
Matan Barakb4ff3a32016-02-09 14:57:42 +02006295 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296};
6297
6298struct mlx5_ifc_destroy_dct_out_bits {
6299 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301
6302 u8 syndrome[0x20];
6303
Matan Barakb4ff3a32016-02-09 14:57:42 +02006304 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006305};
6306
6307struct mlx5_ifc_destroy_dct_in_bits {
6308 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006309 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006310
Matan Barakb4ff3a32016-02-09 14:57:42 +02006311 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006312 u8 op_mod[0x10];
6313
Matan Barakb4ff3a32016-02-09 14:57:42 +02006314 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006315 u8 dctn[0x18];
6316
Matan Barakb4ff3a32016-02-09 14:57:42 +02006317 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318};
6319
6320struct mlx5_ifc_destroy_cq_out_bits {
6321 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006322 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006323
6324 u8 syndrome[0x20];
6325
Matan Barakb4ff3a32016-02-09 14:57:42 +02006326 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006327};
6328
6329struct mlx5_ifc_destroy_cq_in_bits {
6330 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332
Matan Barakb4ff3a32016-02-09 14:57:42 +02006333 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006334 u8 op_mod[0x10];
6335
Matan Barakb4ff3a32016-02-09 14:57:42 +02006336 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006337 u8 cqn[0x18];
6338
Matan Barakb4ff3a32016-02-09 14:57:42 +02006339 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006340};
6341
6342struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6343 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006344 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006345
6346 u8 syndrome[0x20];
6347
Matan Barakb4ff3a32016-02-09 14:57:42 +02006348 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006349};
6350
6351struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6352 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006353 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006354
Matan Barakb4ff3a32016-02-09 14:57:42 +02006355 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006356 u8 op_mod[0x10];
6357
Matan Barakb4ff3a32016-02-09 14:57:42 +02006358 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006359
Matan Barakb4ff3a32016-02-09 14:57:42 +02006360 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006361 u8 vxlan_udp_port[0x10];
6362};
6363
6364struct mlx5_ifc_delete_l2_table_entry_out_bits {
6365 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367
6368 u8 syndrome[0x20];
6369
Matan Barakb4ff3a32016-02-09 14:57:42 +02006370 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006371};
6372
6373struct mlx5_ifc_delete_l2_table_entry_in_bits {
6374 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006375 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006376
Matan Barakb4ff3a32016-02-09 14:57:42 +02006377 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006378 u8 op_mod[0x10];
6379
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381
Matan Barakb4ff3a32016-02-09 14:57:42 +02006382 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006383 u8 table_index[0x18];
6384
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386};
6387
6388struct mlx5_ifc_delete_fte_out_bits {
6389 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006390 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006391
6392 u8 syndrome[0x20];
6393
Matan Barakb4ff3a32016-02-09 14:57:42 +02006394 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006395};
6396
6397struct mlx5_ifc_delete_fte_in_bits {
6398 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006399 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006400
Matan Barakb4ff3a32016-02-09 14:57:42 +02006401 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006402 u8 op_mod[0x10];
6403
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006404 u8 other_vport[0x1];
6405 u8 reserved_at_41[0xf];
6406 u8 vport_number[0x10];
6407
6408 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006409
6410 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006411 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006412
Matan Barakb4ff3a32016-02-09 14:57:42 +02006413 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006414 u8 table_id[0x18];
6415
Matan Barakb4ff3a32016-02-09 14:57:42 +02006416 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006417
6418 u8 flow_index[0x20];
6419
Matan Barakb4ff3a32016-02-09 14:57:42 +02006420 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006421};
6422
6423struct mlx5_ifc_dealloc_xrcd_out_bits {
6424 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006425 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006426
6427 u8 syndrome[0x20];
6428
Matan Barakb4ff3a32016-02-09 14:57:42 +02006429 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006430};
6431
6432struct mlx5_ifc_dealloc_xrcd_in_bits {
6433 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006434 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006435
Matan Barakb4ff3a32016-02-09 14:57:42 +02006436 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006437 u8 op_mod[0x10];
6438
Matan Barakb4ff3a32016-02-09 14:57:42 +02006439 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006440 u8 xrcd[0x18];
6441
Matan Barakb4ff3a32016-02-09 14:57:42 +02006442 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006443};
6444
6445struct mlx5_ifc_dealloc_uar_out_bits {
6446 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006447 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006448
6449 u8 syndrome[0x20];
6450
Matan Barakb4ff3a32016-02-09 14:57:42 +02006451 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006452};
6453
6454struct mlx5_ifc_dealloc_uar_in_bits {
6455 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006456 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006457
Matan Barakb4ff3a32016-02-09 14:57:42 +02006458 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006459 u8 op_mod[0x10];
6460
Matan Barakb4ff3a32016-02-09 14:57:42 +02006461 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006462 u8 uar[0x18];
6463
Matan Barakb4ff3a32016-02-09 14:57:42 +02006464 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006465};
6466
6467struct mlx5_ifc_dealloc_transport_domain_out_bits {
6468 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470
6471 u8 syndrome[0x20];
6472
Matan Barakb4ff3a32016-02-09 14:57:42 +02006473 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006474};
6475
6476struct mlx5_ifc_dealloc_transport_domain_in_bits {
6477 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006478 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006479
Matan Barakb4ff3a32016-02-09 14:57:42 +02006480 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006481 u8 op_mod[0x10];
6482
Matan Barakb4ff3a32016-02-09 14:57:42 +02006483 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006484 u8 transport_domain[0x18];
6485
Matan Barakb4ff3a32016-02-09 14:57:42 +02006486 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006487};
6488
6489struct mlx5_ifc_dealloc_q_counter_out_bits {
6490 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006491 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006492
6493 u8 syndrome[0x20];
6494
Matan Barakb4ff3a32016-02-09 14:57:42 +02006495 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006496};
6497
6498struct mlx5_ifc_dealloc_q_counter_in_bits {
6499 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006500 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006501
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503 u8 op_mod[0x10];
6504
Matan Barakb4ff3a32016-02-09 14:57:42 +02006505 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006506 u8 counter_set_id[0x8];
6507
Matan Barakb4ff3a32016-02-09 14:57:42 +02006508 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006509};
6510
6511struct mlx5_ifc_dealloc_pd_out_bits {
6512 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006513 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006514
6515 u8 syndrome[0x20];
6516
Matan Barakb4ff3a32016-02-09 14:57:42 +02006517 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006518};
6519
6520struct mlx5_ifc_dealloc_pd_in_bits {
6521 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006522 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006523
Matan Barakb4ff3a32016-02-09 14:57:42 +02006524 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006525 u8 op_mod[0x10];
6526
Matan Barakb4ff3a32016-02-09 14:57:42 +02006527 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006528 u8 pd[0x18];
6529
Matan Barakb4ff3a32016-02-09 14:57:42 +02006530 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006531};
6532
Amir Vadai9dc0b282016-05-13 12:55:39 +00006533struct mlx5_ifc_dealloc_flow_counter_out_bits {
6534 u8 status[0x8];
6535 u8 reserved_at_8[0x18];
6536
6537 u8 syndrome[0x20];
6538
6539 u8 reserved_at_40[0x40];
6540};
6541
6542struct mlx5_ifc_dealloc_flow_counter_in_bits {
6543 u8 opcode[0x10];
6544 u8 reserved_at_10[0x10];
6545
6546 u8 reserved_at_20[0x10];
6547 u8 op_mod[0x10];
6548
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006549 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006550
6551 u8 reserved_at_60[0x20];
6552};
6553
Saeed Mahameed74862162016-06-09 15:11:34 +03006554struct mlx5_ifc_create_xrq_out_bits {
6555 u8 status[0x8];
6556 u8 reserved_at_8[0x18];
6557
6558 u8 syndrome[0x20];
6559
6560 u8 reserved_at_40[0x8];
6561 u8 xrqn[0x18];
6562
6563 u8 reserved_at_60[0x20];
6564};
6565
6566struct mlx5_ifc_create_xrq_in_bits {
6567 u8 opcode[0x10];
6568 u8 reserved_at_10[0x10];
6569
6570 u8 reserved_at_20[0x10];
6571 u8 op_mod[0x10];
6572
6573 u8 reserved_at_40[0x40];
6574
6575 struct mlx5_ifc_xrqc_bits xrq_context;
6576};
6577
Saeed Mahameede2816822015-05-28 22:28:40 +03006578struct mlx5_ifc_create_xrc_srq_out_bits {
6579 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581
6582 u8 syndrome[0x20];
6583
Matan Barakb4ff3a32016-02-09 14:57:42 +02006584 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006585 u8 xrc_srqn[0x18];
6586
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588};
6589
6590struct mlx5_ifc_create_xrc_srq_in_bits {
6591 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593
Matan Barakb4ff3a32016-02-09 14:57:42 +02006594 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006595 u8 op_mod[0x10];
6596
Matan Barakb4ff3a32016-02-09 14:57:42 +02006597 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006598
6599 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6600
Matan Barakb4ff3a32016-02-09 14:57:42 +02006601 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006602
6603 u8 pas[0][0x40];
6604};
6605
6606struct mlx5_ifc_create_tis_out_bits {
6607 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609
6610 u8 syndrome[0x20];
6611
Matan Barakb4ff3a32016-02-09 14:57:42 +02006612 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006613 u8 tisn[0x18];
6614
Matan Barakb4ff3a32016-02-09 14:57:42 +02006615 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006616};
6617
6618struct mlx5_ifc_create_tis_in_bits {
6619 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621
Matan Barakb4ff3a32016-02-09 14:57:42 +02006622 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006623 u8 op_mod[0x10];
6624
Matan Barakb4ff3a32016-02-09 14:57:42 +02006625 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006626
6627 struct mlx5_ifc_tisc_bits ctx;
6628};
6629
6630struct mlx5_ifc_create_tir_out_bits {
6631 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006632 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006633
6634 u8 syndrome[0x20];
6635
Matan Barakb4ff3a32016-02-09 14:57:42 +02006636 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006637 u8 tirn[0x18];
6638
Matan Barakb4ff3a32016-02-09 14:57:42 +02006639 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006640};
6641
6642struct mlx5_ifc_create_tir_in_bits {
6643 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006644 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006645
Matan Barakb4ff3a32016-02-09 14:57:42 +02006646 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006647 u8 op_mod[0x10];
6648
Matan Barakb4ff3a32016-02-09 14:57:42 +02006649 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006650
6651 struct mlx5_ifc_tirc_bits ctx;
6652};
6653
6654struct mlx5_ifc_create_srq_out_bits {
6655 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006656 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006657
6658 u8 syndrome[0x20];
6659
Matan Barakb4ff3a32016-02-09 14:57:42 +02006660 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006661 u8 srqn[0x18];
6662
Matan Barakb4ff3a32016-02-09 14:57:42 +02006663 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006664};
6665
6666struct mlx5_ifc_create_srq_in_bits {
6667 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669
Matan Barakb4ff3a32016-02-09 14:57:42 +02006670 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006671 u8 op_mod[0x10];
6672
Matan Barakb4ff3a32016-02-09 14:57:42 +02006673 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006674
6675 struct mlx5_ifc_srqc_bits srq_context_entry;
6676
Matan Barakb4ff3a32016-02-09 14:57:42 +02006677 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006678
6679 u8 pas[0][0x40];
6680};
6681
6682struct mlx5_ifc_create_sq_out_bits {
6683 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006684 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006685
6686 u8 syndrome[0x20];
6687
Matan Barakb4ff3a32016-02-09 14:57:42 +02006688 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006689 u8 sqn[0x18];
6690
Matan Barakb4ff3a32016-02-09 14:57:42 +02006691 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006692};
6693
6694struct mlx5_ifc_create_sq_in_bits {
6695 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006696 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006697
Matan Barakb4ff3a32016-02-09 14:57:42 +02006698 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006699 u8 op_mod[0x10];
6700
Matan Barakb4ff3a32016-02-09 14:57:42 +02006701 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006702
6703 struct mlx5_ifc_sqc_bits ctx;
6704};
6705
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006706struct mlx5_ifc_create_scheduling_element_out_bits {
6707 u8 status[0x8];
6708 u8 reserved_at_8[0x18];
6709
6710 u8 syndrome[0x20];
6711
6712 u8 reserved_at_40[0x40];
6713
6714 u8 scheduling_element_id[0x20];
6715
6716 u8 reserved_at_a0[0x160];
6717};
6718
6719struct mlx5_ifc_create_scheduling_element_in_bits {
6720 u8 opcode[0x10];
6721 u8 reserved_at_10[0x10];
6722
6723 u8 reserved_at_20[0x10];
6724 u8 op_mod[0x10];
6725
6726 u8 scheduling_hierarchy[0x8];
6727 u8 reserved_at_48[0x18];
6728
6729 u8 reserved_at_60[0xa0];
6730
6731 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6732
6733 u8 reserved_at_300[0x100];
6734};
6735
Saeed Mahameede2816822015-05-28 22:28:40 +03006736struct mlx5_ifc_create_rqt_out_bits {
6737 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006738 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006739
6740 u8 syndrome[0x20];
6741
Matan Barakb4ff3a32016-02-09 14:57:42 +02006742 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006743 u8 rqtn[0x18];
6744
Matan Barakb4ff3a32016-02-09 14:57:42 +02006745 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006746};
6747
6748struct mlx5_ifc_create_rqt_in_bits {
6749 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006750 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006751
Matan Barakb4ff3a32016-02-09 14:57:42 +02006752 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006753 u8 op_mod[0x10];
6754
Matan Barakb4ff3a32016-02-09 14:57:42 +02006755 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006756
6757 struct mlx5_ifc_rqtc_bits rqt_context;
6758};
6759
6760struct mlx5_ifc_create_rq_out_bits {
6761 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006762 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006763
6764 u8 syndrome[0x20];
6765
Matan Barakb4ff3a32016-02-09 14:57:42 +02006766 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006767 u8 rqn[0x18];
6768
Matan Barakb4ff3a32016-02-09 14:57:42 +02006769 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006770};
6771
6772struct mlx5_ifc_create_rq_in_bits {
6773 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006774 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006775
Matan Barakb4ff3a32016-02-09 14:57:42 +02006776 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006777 u8 op_mod[0x10];
6778
Matan Barakb4ff3a32016-02-09 14:57:42 +02006779 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006780
6781 struct mlx5_ifc_rqc_bits ctx;
6782};
6783
6784struct mlx5_ifc_create_rmp_out_bits {
6785 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006786 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006787
6788 u8 syndrome[0x20];
6789
Matan Barakb4ff3a32016-02-09 14:57:42 +02006790 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006791 u8 rmpn[0x18];
6792
Matan Barakb4ff3a32016-02-09 14:57:42 +02006793 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006794};
6795
6796struct mlx5_ifc_create_rmp_in_bits {
6797 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006798 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006799
Matan Barakb4ff3a32016-02-09 14:57:42 +02006800 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006801 u8 op_mod[0x10];
6802
Matan Barakb4ff3a32016-02-09 14:57:42 +02006803 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006804
6805 struct mlx5_ifc_rmpc_bits ctx;
6806};
6807
6808struct mlx5_ifc_create_qp_out_bits {
6809 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006810 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006811
6812 u8 syndrome[0x20];
6813
Matan Barakb4ff3a32016-02-09 14:57:42 +02006814 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006815 u8 qpn[0x18];
6816
Matan Barakb4ff3a32016-02-09 14:57:42 +02006817 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006818};
6819
6820struct mlx5_ifc_create_qp_in_bits {
6821 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006822 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006823
Matan Barakb4ff3a32016-02-09 14:57:42 +02006824 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006825 u8 op_mod[0x10];
6826
Matan Barakb4ff3a32016-02-09 14:57:42 +02006827 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006828
6829 u8 opt_param_mask[0x20];
6830
Matan Barakb4ff3a32016-02-09 14:57:42 +02006831 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006832
6833 struct mlx5_ifc_qpc_bits qpc;
6834
Matan Barakb4ff3a32016-02-09 14:57:42 +02006835 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006836
6837 u8 pas[0][0x40];
6838};
6839
6840struct mlx5_ifc_create_psv_out_bits {
6841 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006842 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006843
6844 u8 syndrome[0x20];
6845
Matan Barakb4ff3a32016-02-09 14:57:42 +02006846 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006847
Matan Barakb4ff3a32016-02-09 14:57:42 +02006848 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006849 u8 psv0_index[0x18];
6850
Matan Barakb4ff3a32016-02-09 14:57:42 +02006851 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006852 u8 psv1_index[0x18];
6853
Matan Barakb4ff3a32016-02-09 14:57:42 +02006854 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006855 u8 psv2_index[0x18];
6856
Matan Barakb4ff3a32016-02-09 14:57:42 +02006857 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006858 u8 psv3_index[0x18];
6859};
6860
6861struct mlx5_ifc_create_psv_in_bits {
6862 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864
Matan Barakb4ff3a32016-02-09 14:57:42 +02006865 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006866 u8 op_mod[0x10];
6867
6868 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006869 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006870 u8 pd[0x18];
6871
Matan Barakb4ff3a32016-02-09 14:57:42 +02006872 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873};
6874
6875struct mlx5_ifc_create_mkey_out_bits {
6876 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006877 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006878
6879 u8 syndrome[0x20];
6880
Matan Barakb4ff3a32016-02-09 14:57:42 +02006881 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006882 u8 mkey_index[0x18];
6883
Matan Barakb4ff3a32016-02-09 14:57:42 +02006884 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006885};
6886
6887struct mlx5_ifc_create_mkey_in_bits {
6888 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006889 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006890
Matan Barakb4ff3a32016-02-09 14:57:42 +02006891 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006892 u8 op_mod[0x10];
6893
Matan Barakb4ff3a32016-02-09 14:57:42 +02006894 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006895
6896 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006897 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006898
6899 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6900
Matan Barakb4ff3a32016-02-09 14:57:42 +02006901 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006902
6903 u8 translations_octword_actual_size[0x20];
6904
Matan Barakb4ff3a32016-02-09 14:57:42 +02006905 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006906
6907 u8 klm_pas_mtt[0][0x20];
6908};
6909
6910struct mlx5_ifc_create_flow_table_out_bits {
6911 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006912 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006913
6914 u8 syndrome[0x20];
6915
Matan Barakb4ff3a32016-02-09 14:57:42 +02006916 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006917 u8 table_id[0x18];
6918
Matan Barakb4ff3a32016-02-09 14:57:42 +02006919 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006920};
6921
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006922struct mlx5_ifc_flow_table_context_bits {
6923 u8 encap_en[0x1];
6924 u8 decap_en[0x1];
6925 u8 reserved_at_2[0x2];
6926 u8 table_miss_action[0x4];
6927 u8 level[0x8];
6928 u8 reserved_at_10[0x8];
6929 u8 log_size[0x8];
6930
6931 u8 reserved_at_20[0x8];
6932 u8 table_miss_id[0x18];
6933
6934 u8 reserved_at_40[0x8];
6935 u8 lag_master_next_table_id[0x18];
6936
6937 u8 reserved_at_60[0xe0];
6938};
6939
Saeed Mahameede2816822015-05-28 22:28:40 +03006940struct mlx5_ifc_create_flow_table_in_bits {
6941 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006942 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006943
Matan Barakb4ff3a32016-02-09 14:57:42 +02006944 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006945 u8 op_mod[0x10];
6946
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006947 u8 other_vport[0x1];
6948 u8 reserved_at_41[0xf];
6949 u8 vport_number[0x10];
6950
6951 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006952
6953 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006954 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006955
Matan Barakb4ff3a32016-02-09 14:57:42 +02006956 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006957
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006958 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006959};
6960
6961struct mlx5_ifc_create_flow_group_out_bits {
6962 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006963 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006964
6965 u8 syndrome[0x20];
6966
Matan Barakb4ff3a32016-02-09 14:57:42 +02006967 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006968 u8 group_id[0x18];
6969
Matan Barakb4ff3a32016-02-09 14:57:42 +02006970 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006971};
6972
6973enum {
6974 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6975 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6976 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6977};
6978
6979struct mlx5_ifc_create_flow_group_in_bits {
6980 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006981 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006982
Matan Barakb4ff3a32016-02-09 14:57:42 +02006983 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006984 u8 op_mod[0x10];
6985
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006986 u8 other_vport[0x1];
6987 u8 reserved_at_41[0xf];
6988 u8 vport_number[0x10];
6989
6990 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006991
6992 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006993 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006994
Matan Barakb4ff3a32016-02-09 14:57:42 +02006995 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006996 u8 table_id[0x18];
6997
Matan Barakb4ff3a32016-02-09 14:57:42 +02006998 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006999
7000 u8 start_flow_index[0x20];
7001
Matan Barakb4ff3a32016-02-09 14:57:42 +02007002 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007003
7004 u8 end_flow_index[0x20];
7005
Matan Barakb4ff3a32016-02-09 14:57:42 +02007006 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007007
Matan Barakb4ff3a32016-02-09 14:57:42 +02007008 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007009 u8 match_criteria_enable[0x8];
7010
7011 struct mlx5_ifc_fte_match_param_bits match_criteria;
7012
Matan Barakb4ff3a32016-02-09 14:57:42 +02007013 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03007014};
7015
7016struct mlx5_ifc_create_eq_out_bits {
7017 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007018 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007019
7020 u8 syndrome[0x20];
7021
Matan Barakb4ff3a32016-02-09 14:57:42 +02007022 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007023 u8 eq_number[0x8];
7024
Matan Barakb4ff3a32016-02-09 14:57:42 +02007025 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007026};
7027
7028struct mlx5_ifc_create_eq_in_bits {
7029 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007030 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007031
Matan Barakb4ff3a32016-02-09 14:57:42 +02007032 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007033 u8 op_mod[0x10];
7034
Matan Barakb4ff3a32016-02-09 14:57:42 +02007035 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007036
7037 struct mlx5_ifc_eqc_bits eq_context_entry;
7038
Matan Barakb4ff3a32016-02-09 14:57:42 +02007039 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007040
7041 u8 event_bitmask[0x40];
7042
Matan Barakb4ff3a32016-02-09 14:57:42 +02007043 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03007044
7045 u8 pas[0][0x40];
7046};
7047
7048struct mlx5_ifc_create_dct_out_bits {
7049 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007050 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007051
7052 u8 syndrome[0x20];
7053
Matan Barakb4ff3a32016-02-09 14:57:42 +02007054 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007055 u8 dctn[0x18];
7056
Matan Barakb4ff3a32016-02-09 14:57:42 +02007057 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007058};
7059
7060struct mlx5_ifc_create_dct_in_bits {
7061 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007062 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007063
Matan Barakb4ff3a32016-02-09 14:57:42 +02007064 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007065 u8 op_mod[0x10];
7066
Matan Barakb4ff3a32016-02-09 14:57:42 +02007067 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007068
7069 struct mlx5_ifc_dctc_bits dct_context_entry;
7070
Matan Barakb4ff3a32016-02-09 14:57:42 +02007071 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007072};
7073
7074struct mlx5_ifc_create_cq_out_bits {
7075 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007076 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007077
7078 u8 syndrome[0x20];
7079
Matan Barakb4ff3a32016-02-09 14:57:42 +02007080 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007081 u8 cqn[0x18];
7082
Matan Barakb4ff3a32016-02-09 14:57:42 +02007083 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007084};
7085
7086struct mlx5_ifc_create_cq_in_bits {
7087 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007088 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007089
Matan Barakb4ff3a32016-02-09 14:57:42 +02007090 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007091 u8 op_mod[0x10];
7092
Matan Barakb4ff3a32016-02-09 14:57:42 +02007093 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007094
7095 struct mlx5_ifc_cqc_bits cq_context;
7096
Matan Barakb4ff3a32016-02-09 14:57:42 +02007097 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007098
7099 u8 pas[0][0x40];
7100};
7101
7102struct mlx5_ifc_config_int_moderation_out_bits {
7103 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007104 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007105
7106 u8 syndrome[0x20];
7107
Matan Barakb4ff3a32016-02-09 14:57:42 +02007108 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007109 u8 min_delay[0xc];
7110 u8 int_vector[0x10];
7111
Matan Barakb4ff3a32016-02-09 14:57:42 +02007112 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007113};
7114
7115enum {
7116 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7117 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7118};
7119
7120struct mlx5_ifc_config_int_moderation_in_bits {
7121 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007122 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007123
Matan Barakb4ff3a32016-02-09 14:57:42 +02007124 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007125 u8 op_mod[0x10];
7126
Matan Barakb4ff3a32016-02-09 14:57:42 +02007127 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007128 u8 min_delay[0xc];
7129 u8 int_vector[0x10];
7130
Matan Barakb4ff3a32016-02-09 14:57:42 +02007131 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007132};
7133
7134struct mlx5_ifc_attach_to_mcg_out_bits {
7135 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007136 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007137
7138 u8 syndrome[0x20];
7139
Matan Barakb4ff3a32016-02-09 14:57:42 +02007140 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007141};
7142
7143struct mlx5_ifc_attach_to_mcg_in_bits {
7144 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007145 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007146
Matan Barakb4ff3a32016-02-09 14:57:42 +02007147 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007148 u8 op_mod[0x10];
7149
Matan Barakb4ff3a32016-02-09 14:57:42 +02007150 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007151 u8 qpn[0x18];
7152
Matan Barakb4ff3a32016-02-09 14:57:42 +02007153 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007154
7155 u8 multicast_gid[16][0x8];
7156};
7157
Saeed Mahameed74862162016-06-09 15:11:34 +03007158struct mlx5_ifc_arm_xrq_out_bits {
7159 u8 status[0x8];
7160 u8 reserved_at_8[0x18];
7161
7162 u8 syndrome[0x20];
7163
7164 u8 reserved_at_40[0x40];
7165};
7166
7167struct mlx5_ifc_arm_xrq_in_bits {
7168 u8 opcode[0x10];
7169 u8 reserved_at_10[0x10];
7170
7171 u8 reserved_at_20[0x10];
7172 u8 op_mod[0x10];
7173
7174 u8 reserved_at_40[0x8];
7175 u8 xrqn[0x18];
7176
7177 u8 reserved_at_60[0x10];
7178 u8 lwm[0x10];
7179};
7180
Saeed Mahameede2816822015-05-28 22:28:40 +03007181struct mlx5_ifc_arm_xrc_srq_out_bits {
7182 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007183 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007184
7185 u8 syndrome[0x20];
7186
Matan Barakb4ff3a32016-02-09 14:57:42 +02007187 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007188};
7189
7190enum {
7191 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7192};
7193
7194struct mlx5_ifc_arm_xrc_srq_in_bits {
7195 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007196 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007197
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199 u8 op_mod[0x10];
7200
Matan Barakb4ff3a32016-02-09 14:57:42 +02007201 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007202 u8 xrc_srqn[0x18];
7203
Matan Barakb4ff3a32016-02-09 14:57:42 +02007204 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007205 u8 lwm[0x10];
7206};
7207
7208struct mlx5_ifc_arm_rq_out_bits {
7209 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007210 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007211
7212 u8 syndrome[0x20];
7213
Matan Barakb4ff3a32016-02-09 14:57:42 +02007214 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007215};
7216
7217enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007218 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7219 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007220};
7221
7222struct mlx5_ifc_arm_rq_in_bits {
7223 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007224 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007225
Matan Barakb4ff3a32016-02-09 14:57:42 +02007226 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007227 u8 op_mod[0x10];
7228
Matan Barakb4ff3a32016-02-09 14:57:42 +02007229 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007230 u8 srq_number[0x18];
7231
Matan Barakb4ff3a32016-02-09 14:57:42 +02007232 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007233 u8 lwm[0x10];
7234};
7235
7236struct mlx5_ifc_arm_dct_out_bits {
7237 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007238 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007239
7240 u8 syndrome[0x20];
7241
Matan Barakb4ff3a32016-02-09 14:57:42 +02007242 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007243};
7244
7245struct mlx5_ifc_arm_dct_in_bits {
7246 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007247 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007248
Matan Barakb4ff3a32016-02-09 14:57:42 +02007249 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007250 u8 op_mod[0x10];
7251
Matan Barakb4ff3a32016-02-09 14:57:42 +02007252 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007253 u8 dct_number[0x18];
7254
Matan Barakb4ff3a32016-02-09 14:57:42 +02007255 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007256};
7257
7258struct mlx5_ifc_alloc_xrcd_out_bits {
7259 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007260 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007261
7262 u8 syndrome[0x20];
7263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265 u8 xrcd[0x18];
7266
Matan Barakb4ff3a32016-02-09 14:57:42 +02007267 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007268};
7269
7270struct mlx5_ifc_alloc_xrcd_in_bits {
7271 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007272 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007273
Matan Barakb4ff3a32016-02-09 14:57:42 +02007274 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007275 u8 op_mod[0x10];
7276
Matan Barakb4ff3a32016-02-09 14:57:42 +02007277 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007278};
7279
7280struct mlx5_ifc_alloc_uar_out_bits {
7281 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283
7284 u8 syndrome[0x20];
7285
Matan Barakb4ff3a32016-02-09 14:57:42 +02007286 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007287 u8 uar[0x18];
7288
Matan Barakb4ff3a32016-02-09 14:57:42 +02007289 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007290};
7291
7292struct mlx5_ifc_alloc_uar_in_bits {
7293 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007294 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007295
Matan Barakb4ff3a32016-02-09 14:57:42 +02007296 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007297 u8 op_mod[0x10];
7298
Matan Barakb4ff3a32016-02-09 14:57:42 +02007299 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007300};
7301
7302struct mlx5_ifc_alloc_transport_domain_out_bits {
7303 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007304 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007305
7306 u8 syndrome[0x20];
7307
Matan Barakb4ff3a32016-02-09 14:57:42 +02007308 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007309 u8 transport_domain[0x18];
7310
Matan Barakb4ff3a32016-02-09 14:57:42 +02007311 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007312};
7313
7314struct mlx5_ifc_alloc_transport_domain_in_bits {
7315 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007316 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007317
Matan Barakb4ff3a32016-02-09 14:57:42 +02007318 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319 u8 op_mod[0x10];
7320
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322};
7323
7324struct mlx5_ifc_alloc_q_counter_out_bits {
7325 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007326 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007327
7328 u8 syndrome[0x20];
7329
Matan Barakb4ff3a32016-02-09 14:57:42 +02007330 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007331 u8 counter_set_id[0x8];
7332
Matan Barakb4ff3a32016-02-09 14:57:42 +02007333 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007334};
7335
7336struct mlx5_ifc_alloc_q_counter_in_bits {
7337 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007338 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007339
Matan Barakb4ff3a32016-02-09 14:57:42 +02007340 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007341 u8 op_mod[0x10];
7342
Matan Barakb4ff3a32016-02-09 14:57:42 +02007343 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007344};
7345
7346struct mlx5_ifc_alloc_pd_out_bits {
7347 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007348 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007349
7350 u8 syndrome[0x20];
7351
Matan Barakb4ff3a32016-02-09 14:57:42 +02007352 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007353 u8 pd[0x18];
7354
Matan Barakb4ff3a32016-02-09 14:57:42 +02007355 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007356};
7357
7358struct mlx5_ifc_alloc_pd_in_bits {
7359 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007360 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007361
Matan Barakb4ff3a32016-02-09 14:57:42 +02007362 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007363 u8 op_mod[0x10];
7364
Matan Barakb4ff3a32016-02-09 14:57:42 +02007365 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007366};
7367
Amir Vadai9dc0b282016-05-13 12:55:39 +00007368struct mlx5_ifc_alloc_flow_counter_out_bits {
7369 u8 status[0x8];
7370 u8 reserved_at_8[0x18];
7371
7372 u8 syndrome[0x20];
7373
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007374 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007375
7376 u8 reserved_at_60[0x20];
7377};
7378
7379struct mlx5_ifc_alloc_flow_counter_in_bits {
7380 u8 opcode[0x10];
7381 u8 reserved_at_10[0x10];
7382
7383 u8 reserved_at_20[0x10];
7384 u8 op_mod[0x10];
7385
7386 u8 reserved_at_40[0x40];
7387};
7388
Saeed Mahameede2816822015-05-28 22:28:40 +03007389struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7390 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007391 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007392
7393 u8 syndrome[0x20];
7394
Matan Barakb4ff3a32016-02-09 14:57:42 +02007395 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007396};
7397
7398struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7399 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007400 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007401
Matan Barakb4ff3a32016-02-09 14:57:42 +02007402 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007403 u8 op_mod[0x10];
7404
Matan Barakb4ff3a32016-02-09 14:57:42 +02007405 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007406
Matan Barakb4ff3a32016-02-09 14:57:42 +02007407 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007408 u8 vxlan_udp_port[0x10];
7409};
7410
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007411struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007412 u8 status[0x8];
7413 u8 reserved_at_8[0x18];
7414
7415 u8 syndrome[0x20];
7416
7417 u8 reserved_at_40[0x40];
7418};
7419
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007420struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007421 u8 opcode[0x10];
7422 u8 reserved_at_10[0x10];
7423
7424 u8 reserved_at_20[0x10];
7425 u8 op_mod[0x10];
7426
7427 u8 reserved_at_40[0x10];
7428 u8 rate_limit_index[0x10];
7429
7430 u8 reserved_at_60[0x20];
7431
7432 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007433
Bodong Wang05d3ac92018-03-19 15:10:29 +02007434 u8 burst_upper_bound[0x20];
7435
7436 u8 reserved_at_c0[0x10];
7437 u8 typical_packet_size[0x10];
7438
7439 u8 reserved_at_e0[0x120];
Saeed Mahameed74862162016-06-09 15:11:34 +03007440};
7441
Saeed Mahameede2816822015-05-28 22:28:40 +03007442struct mlx5_ifc_access_register_out_bits {
7443 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007444 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007445
7446 u8 syndrome[0x20];
7447
Matan Barakb4ff3a32016-02-09 14:57:42 +02007448 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007449
7450 u8 register_data[0][0x20];
7451};
7452
7453enum {
7454 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7455 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7456};
7457
7458struct mlx5_ifc_access_register_in_bits {
7459 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007460 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007461
Matan Barakb4ff3a32016-02-09 14:57:42 +02007462 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007463 u8 op_mod[0x10];
7464
Matan Barakb4ff3a32016-02-09 14:57:42 +02007465 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007466 u8 register_id[0x10];
7467
7468 u8 argument[0x20];
7469
7470 u8 register_data[0][0x20];
7471};
7472
7473struct mlx5_ifc_sltp_reg_bits {
7474 u8 status[0x4];
7475 u8 version[0x4];
7476 u8 local_port[0x8];
7477 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007480 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007481
Matan Barakb4ff3a32016-02-09 14:57:42 +02007482 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007483
Matan Barakb4ff3a32016-02-09 14:57:42 +02007484 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007485 u8 polarity[0x1];
7486 u8 ob_tap0[0x8];
7487 u8 ob_tap1[0x8];
7488 u8 ob_tap2[0x8];
7489
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491 u8 ob_preemp_mode[0x4];
7492 u8 ob_reg[0x8];
7493 u8 ob_bias[0x8];
7494
Matan Barakb4ff3a32016-02-09 14:57:42 +02007495 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007496};
7497
7498struct mlx5_ifc_slrg_reg_bits {
7499 u8 status[0x4];
7500 u8 version[0x4];
7501 u8 local_port[0x8];
7502 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007503 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007504 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007505 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007506
7507 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007508 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007509 u8 grade_lane_speed[0x4];
7510
7511 u8 grade_version[0x8];
7512 u8 grade[0x18];
7513
Matan Barakb4ff3a32016-02-09 14:57:42 +02007514 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007515 u8 height_grade_type[0x4];
7516 u8 height_grade[0x18];
7517
7518 u8 height_dz[0x10];
7519 u8 height_dv[0x10];
7520
Matan Barakb4ff3a32016-02-09 14:57:42 +02007521 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007522 u8 height_sigma[0x10];
7523
Matan Barakb4ff3a32016-02-09 14:57:42 +02007524 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007525
Matan Barakb4ff3a32016-02-09 14:57:42 +02007526 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007527 u8 phase_grade_type[0x4];
7528 u8 phase_grade[0x18];
7529
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007532 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007533 u8 phase_eo_neg[0x8];
7534
7535 u8 ffe_set_tested[0x10];
7536 u8 test_errors_per_lane[0x10];
7537};
7538
7539struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007540 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007541 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007542 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007543
Matan Barakb4ff3a32016-02-09 14:57:42 +02007544 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007545 u8 vl_hw_cap[0x4];
7546
Matan Barakb4ff3a32016-02-09 14:57:42 +02007547 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007548 u8 vl_admin[0x4];
7549
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551 u8 vl_operational[0x4];
7552};
7553
7554struct mlx5_ifc_pude_reg_bits {
7555 u8 swid[0x8];
7556 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007557 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007559 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007560 u8 oper_status[0x4];
7561
Matan Barakb4ff3a32016-02-09 14:57:42 +02007562 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007563};
7564
7565struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007566 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007567 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007568 u8 an_disable_cap[0x1];
7569 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007570 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007571 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007572 u8 proto_mask[0x3];
7573
Saeed Mahameed74862162016-06-09 15:11:34 +03007574 u8 an_status[0x4];
7575 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007576
7577 u8 eth_proto_capability[0x20];
7578
7579 u8 ib_link_width_capability[0x10];
7580 u8 ib_proto_capability[0x10];
7581
Matan Barakb4ff3a32016-02-09 14:57:42 +02007582 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007583
7584 u8 eth_proto_admin[0x20];
7585
7586 u8 ib_link_width_admin[0x10];
7587 u8 ib_proto_admin[0x10];
7588
Matan Barakb4ff3a32016-02-09 14:57:42 +02007589 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007590
7591 u8 eth_proto_oper[0x20];
7592
7593 u8 ib_link_width_oper[0x10];
7594 u8 ib_proto_oper[0x10];
7595
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007596 u8 reserved_at_160[0x1c];
7597 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007598
7599 u8 eth_proto_lp_advertise[0x20];
7600
Matan Barakb4ff3a32016-02-09 14:57:42 +02007601 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007602};
7603
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007604struct mlx5_ifc_mlcr_reg_bits {
7605 u8 reserved_at_0[0x8];
7606 u8 local_port[0x8];
7607 u8 reserved_at_10[0x20];
7608
7609 u8 beacon_duration[0x10];
7610 u8 reserved_at_40[0x10];
7611
7612 u8 beacon_remain[0x10];
7613};
7614
Saeed Mahameede2816822015-05-28 22:28:40 +03007615struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007616 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007617
7618 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007619 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007620 u8 repetitions_mode[0x4];
7621 u8 num_of_repetitions[0x8];
7622
7623 u8 grade_version[0x8];
7624 u8 height_grade_type[0x4];
7625 u8 phase_grade_type[0x4];
7626 u8 height_grade_weight[0x8];
7627 u8 phase_grade_weight[0x8];
7628
7629 u8 gisim_measure_bits[0x10];
7630 u8 adaptive_tap_measure_bits[0x10];
7631
7632 u8 ber_bath_high_error_threshold[0x10];
7633 u8 ber_bath_mid_error_threshold[0x10];
7634
7635 u8 ber_bath_low_error_threshold[0x10];
7636 u8 one_ratio_high_threshold[0x10];
7637
7638 u8 one_ratio_high_mid_threshold[0x10];
7639 u8 one_ratio_low_mid_threshold[0x10];
7640
7641 u8 one_ratio_low_threshold[0x10];
7642 u8 ndeo_error_threshold[0x10];
7643
7644 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007645 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007646 u8 mix90_phase_for_voltage_bath[0x8];
7647
7648 u8 mixer_offset_start[0x10];
7649 u8 mixer_offset_end[0x10];
7650
Matan Barakb4ff3a32016-02-09 14:57:42 +02007651 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007652 u8 ber_test_time[0xb];
7653};
7654
7655struct mlx5_ifc_pspa_reg_bits {
7656 u8 swid[0x8];
7657 u8 local_port[0x8];
7658 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007659 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007660
Matan Barakb4ff3a32016-02-09 14:57:42 +02007661 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007662};
7663
7664struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007667 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007668 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007669 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007670 u8 mode[0x2];
7671
Matan Barakb4ff3a32016-02-09 14:57:42 +02007672 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007673
Matan Barakb4ff3a32016-02-09 14:57:42 +02007674 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007675 u8 min_threshold[0x10];
7676
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678 u8 max_threshold[0x10];
7679
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681 u8 mark_probability_denominator[0x10];
7682
Matan Barakb4ff3a32016-02-09 14:57:42 +02007683 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007684};
7685
7686struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690
Matan Barakb4ff3a32016-02-09 14:57:42 +02007691 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007692
Matan Barakb4ff3a32016-02-09 14:57:42 +02007693 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007694 u8 wrps_admin[0x4];
7695
Matan Barakb4ff3a32016-02-09 14:57:42 +02007696 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007697 u8 wrps_status[0x4];
7698
Matan Barakb4ff3a32016-02-09 14:57:42 +02007699 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007700 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007701 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007702 u8 down_threshold[0x8];
7703
Matan Barakb4ff3a32016-02-09 14:57:42 +02007704 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007705
Matan Barakb4ff3a32016-02-09 14:57:42 +02007706 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007707 u8 srps_admin[0x4];
7708
Matan Barakb4ff3a32016-02-09 14:57:42 +02007709 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007710 u8 srps_status[0x4];
7711
Matan Barakb4ff3a32016-02-09 14:57:42 +02007712 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007713};
7714
7715struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007716 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007717 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007718 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007719
Matan Barakb4ff3a32016-02-09 14:57:42 +02007720 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007721 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007722 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007723 u8 lb_en[0x8];
7724};
7725
7726struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007727 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007728 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007729 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007730
Matan Barakb4ff3a32016-02-09 14:57:42 +02007731 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007732
7733 u8 port_profile_mode[0x8];
7734 u8 static_port_profile[0x8];
7735 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007736 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007737
7738 u8 retransmission_active[0x8];
7739 u8 fec_mode_active[0x18];
7740
Matan Barakb4ff3a32016-02-09 14:57:42 +02007741 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007742};
7743
7744struct mlx5_ifc_ppcnt_reg_bits {
7745 u8 swid[0x8];
7746 u8 local_port[0x8];
7747 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007748 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007749 u8 grp[0x6];
7750
7751 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007752 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007753 u8 prio_tc[0x3];
7754
7755 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7756};
7757
Gal Pressman8ed1a632016-11-17 13:46:01 +02007758struct mlx5_ifc_mpcnt_reg_bits {
7759 u8 reserved_at_0[0x8];
7760 u8 pcie_index[0x8];
7761 u8 reserved_at_10[0xa];
7762 u8 grp[0x6];
7763
7764 u8 clr[0x1];
7765 u8 reserved_at_21[0x1f];
7766
7767 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7768};
7769
Saeed Mahameede2816822015-05-28 22:28:40 +03007770struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007771 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007772 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007773 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007774 u8 local_port[0x8];
7775 u8 mac_47_32[0x10];
7776
7777 u8 mac_31_0[0x20];
7778
Matan Barakb4ff3a32016-02-09 14:57:42 +02007779 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007780};
7781
7782struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007783 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007784 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007785 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007786
7787 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007788 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007789
7790 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007791 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007792
7793 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007794 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007795};
7796
7797struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007798 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007799 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007800 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007801
Matan Barakb4ff3a32016-02-09 14:57:42 +02007802 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007803 u8 attenuation_5g[0x8];
7804
Matan Barakb4ff3a32016-02-09 14:57:42 +02007805 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007806 u8 attenuation_7g[0x8];
7807
Matan Barakb4ff3a32016-02-09 14:57:42 +02007808 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007809 u8 attenuation_12g[0x8];
7810};
7811
7812struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007813 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007814 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007815 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007816 u8 module_status[0x4];
7817
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819};
7820
7821struct mlx5_ifc_pmpc_reg_bits {
7822 u8 module_state_updated[32][0x8];
7823};
7824
7825struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007826 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007827 u8 mlpn_status[0x4];
7828 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007829 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007830
7831 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007832 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007833};
7834
7835struct mlx5_ifc_pmlp_reg_bits {
7836 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007837 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007838 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007839 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007840 u8 width[0x8];
7841
7842 u8 lane0_module_mapping[0x20];
7843
7844 u8 lane1_module_mapping[0x20];
7845
7846 u8 lane2_module_mapping[0x20];
7847
7848 u8 lane3_module_mapping[0x20];
7849
Matan Barakb4ff3a32016-02-09 14:57:42 +02007850 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007851};
7852
7853struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007854 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007855 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007856 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007857 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007858 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007859 u8 oper_status[0x4];
7860
7861 u8 ase[0x1];
7862 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007863 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007864 u8 e[0x2];
7865
Matan Barakb4ff3a32016-02-09 14:57:42 +02007866 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007867};
7868
7869struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007870 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007871 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007872 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007873 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007874 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007875
Matan Barakb4ff3a32016-02-09 14:57:42 +02007876 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007877 u8 lane_speed[0x10];
7878
Matan Barakb4ff3a32016-02-09 14:57:42 +02007879 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007880 u8 lpbf[0x1];
7881 u8 fec_mode_policy[0x8];
7882
7883 u8 retransmission_capability[0x8];
7884 u8 fec_mode_capability[0x18];
7885
7886 u8 retransmission_support_admin[0x8];
7887 u8 fec_mode_support_admin[0x18];
7888
7889 u8 retransmission_request_admin[0x8];
7890 u8 fec_mode_request_admin[0x18];
7891
Matan Barakb4ff3a32016-02-09 14:57:42 +02007892 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007893};
7894
7895struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007896 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007897 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007898 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007899 u8 ib_port[0x8];
7900
Matan Barakb4ff3a32016-02-09 14:57:42 +02007901 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007902};
7903
7904struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007905 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007906 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007907 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007908 u8 lbf_mode[0x3];
7909
Matan Barakb4ff3a32016-02-09 14:57:42 +02007910 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007911};
7912
7913struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007914 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007915 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007916 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007917
7918 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007919 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007920 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007921 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007922};
7923
7924struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007925 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007926 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007927 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007928
Matan Barakb4ff3a32016-02-09 14:57:42 +02007929 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007930
7931 u8 port_filter[8][0x20];
7932
7933 u8 port_filter_update_en[8][0x20];
7934};
7935
7936struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007937 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007938 u8 local_port[0x8];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007939 u8 reserved_at_10[0xb];
7940 u8 ppan_mask_n[0x1];
7941 u8 minor_stall_mask[0x1];
7942 u8 critical_stall_mask[0x1];
7943 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007944
7945 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007946 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007947 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007948 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007949 u8 prio_mask_rx[0x8];
7950
7951 u8 pptx[0x1];
7952 u8 aptx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007953 u8 pptx_mask_n[0x1];
7954 u8 reserved_at_43[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007955 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007956 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007957
7958 u8 pprx[0x1];
7959 u8 aprx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007960 u8 pprx_mask_n[0x1];
7961 u8 reserved_at_63[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007962 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007963 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007964
Inbar Karmy2afa6092017-11-20 18:06:20 +02007965 u8 device_stall_minor_watermark[0x10];
7966 u8 device_stall_critical_watermark[0x10];
7967
7968 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007969};
7970
7971struct mlx5_ifc_pelc_reg_bits {
7972 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007973 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007974 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007975 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007976
7977 u8 op_admin[0x8];
7978 u8 op_capability[0x8];
7979 u8 op_request[0x8];
7980 u8 op_active[0x8];
7981
7982 u8 admin[0x40];
7983
7984 u8 capability[0x40];
7985
7986 u8 request[0x40];
7987
7988 u8 active[0x40];
7989
Matan Barakb4ff3a32016-02-09 14:57:42 +02007990 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007991};
7992
7993struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007994 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007995 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007996 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007997
Matan Barakb4ff3a32016-02-09 14:57:42 +02007998 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007999 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008000 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008001
Matan Barakb4ff3a32016-02-09 14:57:42 +02008002 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008003 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008004 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008005 u8 error_type[0x8];
8006};
8007
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008008struct mlx5_ifc_pcam_enhanced_features_bits {
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03008009 u8 reserved_at_0[0x76];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008010
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03008011 u8 pfcc_mask[0x1];
8012 u8 reserved_at_77[0x4];
Gal Pressman2dba0792017-06-18 14:56:45 +03008013 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02008014 u8 ptys_connector_type[0x1];
8015 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008016 u8 ppcnt_discard_group[0x1];
8017 u8 ppcnt_statistical_group[0x1];
8018};
8019
8020struct mlx5_ifc_pcam_reg_bits {
8021 u8 reserved_at_0[0x8];
8022 u8 feature_group[0x8];
8023 u8 reserved_at_10[0x8];
8024 u8 access_reg_group[0x8];
8025
8026 u8 reserved_at_20[0x20];
8027
8028 union {
8029 u8 reserved_at_0[0x80];
8030 } port_access_reg_cap_mask;
8031
8032 u8 reserved_at_c0[0x80];
8033
8034 union {
8035 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
8036 u8 reserved_at_0[0x80];
8037 } feature_cap_mask;
8038
8039 u8 reserved_at_1c0[0xc0];
8040};
8041
8042struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03008043 u8 reserved_at_0[0x7b];
8044 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03008045 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008046 u8 mtpps_enh_out_per_adj[0x1];
8047 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008048 u8 pcie_performance_group[0x1];
8049};
8050
Or Gerlitz0ab87742017-06-11 15:25:38 +03008051struct mlx5_ifc_mcam_access_reg_bits {
8052 u8 reserved_at_0[0x1c];
8053 u8 mcda[0x1];
8054 u8 mcc[0x1];
8055 u8 mcqi[0x1];
8056 u8 reserved_at_1f[0x1];
8057
8058 u8 regs_95_to_64[0x20];
8059 u8 regs_63_to_32[0x20];
8060 u8 regs_31_to_0[0x20];
8061};
8062
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008063struct mlx5_ifc_mcam_reg_bits {
8064 u8 reserved_at_0[0x8];
8065 u8 feature_group[0x8];
8066 u8 reserved_at_10[0x8];
8067 u8 access_reg_group[0x8];
8068
8069 u8 reserved_at_20[0x20];
8070
8071 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03008072 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008073 u8 reserved_at_0[0x80];
8074 } mng_access_reg_cap_mask;
8075
8076 u8 reserved_at_c0[0x80];
8077
8078 union {
8079 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
8080 u8 reserved_at_0[0x80];
8081 } mng_feature_cap_mask;
8082
8083 u8 reserved_at_1c0[0x80];
8084};
8085
Huy Nguyenc02762e2017-07-18 16:03:17 -05008086struct mlx5_ifc_qcam_access_reg_cap_mask {
8087 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
8088 u8 qpdpm[0x1];
8089 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
8090 u8 qdpm[0x1];
8091 u8 qpts[0x1];
8092 u8 qcap[0x1];
8093 u8 qcam_access_reg_cap_mask_0[0x1];
8094};
8095
8096struct mlx5_ifc_qcam_qos_feature_cap_mask {
8097 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
8098 u8 qpts_trust_both[0x1];
8099};
8100
8101struct mlx5_ifc_qcam_reg_bits {
8102 u8 reserved_at_0[0x8];
8103 u8 feature_group[0x8];
8104 u8 reserved_at_10[0x8];
8105 u8 access_reg_group[0x8];
8106 u8 reserved_at_20[0x20];
8107
8108 union {
8109 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
8110 u8 reserved_at_0[0x80];
8111 } qos_access_reg_cap_mask;
8112
8113 u8 reserved_at_c0[0x80];
8114
8115 union {
8116 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8117 u8 reserved_at_0[0x80];
8118 } qos_feature_cap_mask;
8119
8120 u8 reserved_at_1c0[0x80];
8121};
8122
Saeed Mahameede2816822015-05-28 22:28:40 +03008123struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008124 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008125 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008126 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008127
8128 u8 port_capability_mask[4][0x20];
8129};
8130
8131struct mlx5_ifc_paos_reg_bits {
8132 u8 swid[0x8];
8133 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008134 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008135 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008136 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008137 u8 oper_status[0x4];
8138
8139 u8 ase[0x1];
8140 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008141 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008142 u8 e[0x2];
8143
Matan Barakb4ff3a32016-02-09 14:57:42 +02008144 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008145};
8146
8147struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008148 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008149 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008150 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008151 u8 opamp_group_type[0x4];
8152
8153 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008154 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008155 u8 num_of_indices[0xc];
8156
8157 u8 index_data[18][0x10];
8158};
8159
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008160struct mlx5_ifc_pcmr_reg_bits {
8161 u8 reserved_at_0[0x8];
8162 u8 local_port[0x8];
8163 u8 reserved_at_10[0x2e];
8164 u8 fcs_cap[0x1];
8165 u8 reserved_at_3f[0x1f];
8166 u8 fcs_chk[0x1];
8167 u8 reserved_at_5f[0x1];
8168};
8169
Saeed Mahameede2816822015-05-28 22:28:40 +03008170struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008171 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008172 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008173 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008174 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008175 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008176 u8 module[0x8];
8177};
8178
8179struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008180 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008181 u8 lossy[0x1];
8182 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008183 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008184 u8 size[0xc];
8185
8186 u8 xoff_threshold[0x10];
8187 u8 xon_threshold[0x10];
8188};
8189
8190struct mlx5_ifc_set_node_in_bits {
8191 u8 node_description[64][0x8];
8192};
8193
8194struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008195 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008196 u8 power_settings_level[0x8];
8197
Matan Barakb4ff3a32016-02-09 14:57:42 +02008198 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008199};
8200
8201struct mlx5_ifc_register_host_endianness_bits {
8202 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008203 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008204
Matan Barakb4ff3a32016-02-09 14:57:42 +02008205 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008206};
8207
8208struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008209 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008210
8211 u8 mkey[0x20];
8212
8213 u8 addressh_63_32[0x20];
8214
8215 u8 addressl_31_0[0x20];
8216};
8217
8218struct mlx5_ifc_ud_adrs_vector_bits {
8219 u8 dc_key[0x40];
8220
8221 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008222 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008223 u8 destination_qp_dct[0x18];
8224
8225 u8 static_rate[0x4];
8226 u8 sl_eth_prio[0x4];
8227 u8 fl[0x1];
8228 u8 mlid[0x7];
8229 u8 rlid_udp_sport[0x10];
8230
Matan Barakb4ff3a32016-02-09 14:57:42 +02008231 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008232
8233 u8 rmac_47_16[0x20];
8234
8235 u8 rmac_15_0[0x10];
8236 u8 tclass[0x8];
8237 u8 hop_limit[0x8];
8238
Matan Barakb4ff3a32016-02-09 14:57:42 +02008239 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008240 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008241 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008242 u8 src_addr_index[0x8];
8243 u8 flow_label[0x14];
8244
8245 u8 rgid_rip[16][0x8];
8246};
8247
8248struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008249 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008250 u8 function_id[0x10];
8251
8252 u8 num_pages[0x20];
8253
Matan Barakb4ff3a32016-02-09 14:57:42 +02008254 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008255};
8256
8257struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008258 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008259 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008260 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008261 u8 event_sub_type[0x8];
8262
Matan Barakb4ff3a32016-02-09 14:57:42 +02008263 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008264
8265 union mlx5_ifc_event_auto_bits event_data;
8266
Matan Barakb4ff3a32016-02-09 14:57:42 +02008267 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008268 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008269 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008270 u8 owner[0x1];
8271};
8272
8273enum {
8274 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8275};
8276
8277struct mlx5_ifc_cmd_queue_entry_bits {
8278 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008279 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008280
8281 u8 input_length[0x20];
8282
8283 u8 input_mailbox_pointer_63_32[0x20];
8284
8285 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008286 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008287
8288 u8 command_input_inline_data[16][0x8];
8289
8290 u8 command_output_inline_data[16][0x8];
8291
8292 u8 output_mailbox_pointer_63_32[0x20];
8293
8294 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008295 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008296
8297 u8 output_length[0x20];
8298
8299 u8 token[0x8];
8300 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008301 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008302 u8 status[0x7];
8303 u8 ownership[0x1];
8304};
8305
8306struct mlx5_ifc_cmd_out_bits {
8307 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008308 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008309
8310 u8 syndrome[0x20];
8311
8312 u8 command_output[0x20];
8313};
8314
8315struct mlx5_ifc_cmd_in_bits {
8316 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008317 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008318
Matan Barakb4ff3a32016-02-09 14:57:42 +02008319 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008320 u8 op_mod[0x10];
8321
8322 u8 command[0][0x20];
8323};
8324
8325struct mlx5_ifc_cmd_if_box_bits {
8326 u8 mailbox_data[512][0x8];
8327
Matan Barakb4ff3a32016-02-09 14:57:42 +02008328 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008329
8330 u8 next_pointer_63_32[0x20];
8331
8332 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008333 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008334
8335 u8 block_number[0x20];
8336
Matan Barakb4ff3a32016-02-09 14:57:42 +02008337 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008338 u8 token[0x8];
8339 u8 ctrl_signature[0x8];
8340 u8 signature[0x8];
8341};
8342
8343struct mlx5_ifc_mtt_bits {
8344 u8 ptag_63_32[0x20];
8345
8346 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008347 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008348 u8 wr_en[0x1];
8349 u8 rd_en[0x1];
8350};
8351
Tariq Toukan928cfe82016-02-22 18:17:29 +02008352struct mlx5_ifc_query_wol_rol_out_bits {
8353 u8 status[0x8];
8354 u8 reserved_at_8[0x18];
8355
8356 u8 syndrome[0x20];
8357
8358 u8 reserved_at_40[0x10];
8359 u8 rol_mode[0x8];
8360 u8 wol_mode[0x8];
8361
8362 u8 reserved_at_60[0x20];
8363};
8364
8365struct mlx5_ifc_query_wol_rol_in_bits {
8366 u8 opcode[0x10];
8367 u8 reserved_at_10[0x10];
8368
8369 u8 reserved_at_20[0x10];
8370 u8 op_mod[0x10];
8371
8372 u8 reserved_at_40[0x40];
8373};
8374
8375struct mlx5_ifc_set_wol_rol_out_bits {
8376 u8 status[0x8];
8377 u8 reserved_at_8[0x18];
8378
8379 u8 syndrome[0x20];
8380
8381 u8 reserved_at_40[0x40];
8382};
8383
8384struct mlx5_ifc_set_wol_rol_in_bits {
8385 u8 opcode[0x10];
8386 u8 reserved_at_10[0x10];
8387
8388 u8 reserved_at_20[0x10];
8389 u8 op_mod[0x10];
8390
8391 u8 rol_mode_valid[0x1];
8392 u8 wol_mode_valid[0x1];
8393 u8 reserved_at_42[0xe];
8394 u8 rol_mode[0x8];
8395 u8 wol_mode[0x8];
8396
8397 u8 reserved_at_60[0x20];
8398};
8399
Saeed Mahameede2816822015-05-28 22:28:40 +03008400enum {
8401 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8402 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8403 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8404};
8405
8406enum {
8407 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8408 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8409 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8410};
8411
8412enum {
8413 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8414 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8415 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8416 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8417 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8418 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8419 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8420 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8421 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8422 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8423 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8424};
8425
8426struct mlx5_ifc_initial_seg_bits {
8427 u8 fw_rev_minor[0x10];
8428 u8 fw_rev_major[0x10];
8429
8430 u8 cmd_interface_rev[0x10];
8431 u8 fw_rev_subminor[0x10];
8432
Matan Barakb4ff3a32016-02-09 14:57:42 +02008433 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008434
8435 u8 cmdq_phy_addr_63_32[0x20];
8436
8437 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008438 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008439 u8 nic_interface[0x2];
8440 u8 log_cmdq_size[0x4];
8441 u8 log_cmdq_stride[0x4];
8442
8443 u8 command_doorbell_vector[0x20];
8444
Matan Barakb4ff3a32016-02-09 14:57:42 +02008445 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008446
8447 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008448 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008449 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008450 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008451
8452 struct mlx5_ifc_health_buffer_bits health_buffer;
8453
8454 u8 no_dram_nic_offset[0x20];
8455
Matan Barakb4ff3a32016-02-09 14:57:42 +02008456 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008457
Matan Barakb4ff3a32016-02-09 14:57:42 +02008458 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008459 u8 clear_int[0x1];
8460
8461 u8 health_syndrome[0x8];
8462 u8 health_counter[0x18];
8463
Matan Barakb4ff3a32016-02-09 14:57:42 +02008464 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008465};
8466
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008467struct mlx5_ifc_mtpps_reg_bits {
8468 u8 reserved_at_0[0xc];
8469 u8 cap_number_of_pps_pins[0x4];
8470 u8 reserved_at_10[0x4];
8471 u8 cap_max_num_of_pps_in_pins[0x4];
8472 u8 reserved_at_18[0x4];
8473 u8 cap_max_num_of_pps_out_pins[0x4];
8474
8475 u8 reserved_at_20[0x24];
8476 u8 cap_pin_3_mode[0x4];
8477 u8 reserved_at_48[0x4];
8478 u8 cap_pin_2_mode[0x4];
8479 u8 reserved_at_50[0x4];
8480 u8 cap_pin_1_mode[0x4];
8481 u8 reserved_at_58[0x4];
8482 u8 cap_pin_0_mode[0x4];
8483
8484 u8 reserved_at_60[0x4];
8485 u8 cap_pin_7_mode[0x4];
8486 u8 reserved_at_68[0x4];
8487 u8 cap_pin_6_mode[0x4];
8488 u8 reserved_at_70[0x4];
8489 u8 cap_pin_5_mode[0x4];
8490 u8 reserved_at_78[0x4];
8491 u8 cap_pin_4_mode[0x4];
8492
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008493 u8 field_select[0x20];
8494 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008495
8496 u8 enable[0x1];
8497 u8 reserved_at_101[0xb];
8498 u8 pattern[0x4];
8499 u8 reserved_at_110[0x4];
8500 u8 pin_mode[0x4];
8501 u8 pin[0x8];
8502
8503 u8 reserved_at_120[0x20];
8504
8505 u8 time_stamp[0x40];
8506
8507 u8 out_pulse_duration[0x10];
8508 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008509 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008510
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008511 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008512};
8513
8514struct mlx5_ifc_mtppse_reg_bits {
8515 u8 reserved_at_0[0x18];
8516 u8 pin[0x8];
8517 u8 event_arm[0x1];
8518 u8 reserved_at_21[0x1b];
8519 u8 event_generation_mode[0x4];
8520 u8 reserved_at_40[0x40];
8521};
8522
Or Gerlitz47176282017-04-18 13:35:39 +03008523struct mlx5_ifc_mcqi_cap_bits {
8524 u8 supported_info_bitmask[0x20];
8525
8526 u8 component_size[0x20];
8527
8528 u8 max_component_size[0x20];
8529
8530 u8 log_mcda_word_size[0x4];
8531 u8 reserved_at_64[0xc];
8532 u8 mcda_max_write_size[0x10];
8533
8534 u8 rd_en[0x1];
8535 u8 reserved_at_81[0x1];
8536 u8 match_chip_id[0x1];
8537 u8 match_psid[0x1];
8538 u8 check_user_timestamp[0x1];
8539 u8 match_base_guid_mac[0x1];
8540 u8 reserved_at_86[0x1a];
8541};
8542
8543struct mlx5_ifc_mcqi_reg_bits {
8544 u8 read_pending_component[0x1];
8545 u8 reserved_at_1[0xf];
8546 u8 component_index[0x10];
8547
8548 u8 reserved_at_20[0x20];
8549
8550 u8 reserved_at_40[0x1b];
8551 u8 info_type[0x5];
8552
8553 u8 info_size[0x20];
8554
8555 u8 offset[0x20];
8556
8557 u8 reserved_at_a0[0x10];
8558 u8 data_size[0x10];
8559
8560 u8 data[0][0x20];
8561};
8562
8563struct mlx5_ifc_mcc_reg_bits {
8564 u8 reserved_at_0[0x4];
8565 u8 time_elapsed_since_last_cmd[0xc];
8566 u8 reserved_at_10[0x8];
8567 u8 instruction[0x8];
8568
8569 u8 reserved_at_20[0x10];
8570 u8 component_index[0x10];
8571
8572 u8 reserved_at_40[0x8];
8573 u8 update_handle[0x18];
8574
8575 u8 handle_owner_type[0x4];
8576 u8 handle_owner_host_id[0x4];
8577 u8 reserved_at_68[0x1];
8578 u8 control_progress[0x7];
8579 u8 error_code[0x8];
8580 u8 reserved_at_78[0x4];
8581 u8 control_state[0x4];
8582
8583 u8 component_size[0x20];
8584
8585 u8 reserved_at_a0[0x60];
8586};
8587
8588struct mlx5_ifc_mcda_reg_bits {
8589 u8 reserved_at_0[0x8];
8590 u8 update_handle[0x18];
8591
8592 u8 offset[0x20];
8593
8594 u8 reserved_at_40[0x10];
8595 u8 size[0x10];
8596
8597 u8 reserved_at_60[0x20];
8598
8599 u8 data[0][0x20];
8600};
8601
Saeed Mahameede2816822015-05-28 22:28:40 +03008602union mlx5_ifc_ports_control_registers_document_bits {
8603 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8604 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8605 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8606 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8607 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8608 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8609 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8610 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8611 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8612 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8613 struct mlx5_ifc_paos_reg_bits paos_reg;
8614 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8615 struct mlx5_ifc_peir_reg_bits peir_reg;
8616 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8617 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008618 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008619 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8620 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8621 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8622 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8623 struct mlx5_ifc_plib_reg_bits plib_reg;
8624 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8625 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8626 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8627 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8628 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8629 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8630 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8631 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8632 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8633 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008634 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008635 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8636 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8637 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8638 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8639 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8640 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8641 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008642 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008643 struct mlx5_ifc_pude_reg_bits pude_reg;
8644 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8645 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8646 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008647 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8648 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008649 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008650 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8651 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008652 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8653 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8654 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008655 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008656};
8657
8658union mlx5_ifc_debug_enhancements_document_bits {
8659 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008660 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008661};
8662
8663union mlx5_ifc_uplink_pci_interface_document_bits {
8664 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008665 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008666};
8667
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008668struct mlx5_ifc_set_flow_table_root_out_bits {
8669 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008670 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008671
8672 u8 syndrome[0x20];
8673
Matan Barakb4ff3a32016-02-09 14:57:42 +02008674 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008675};
8676
8677struct mlx5_ifc_set_flow_table_root_in_bits {
8678 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008679 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008680
Matan Barakb4ff3a32016-02-09 14:57:42 +02008681 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008682 u8 op_mod[0x10];
8683
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008684 u8 other_vport[0x1];
8685 u8 reserved_at_41[0xf];
8686 u8 vport_number[0x10];
8687
8688 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008689
8690 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008691 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008692
Matan Barakb4ff3a32016-02-09 14:57:42 +02008693 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008694 u8 table_id[0x18];
8695
Erez Shitrit500a3d02017-04-13 06:36:51 +03008696 u8 reserved_at_c0[0x8];
8697 u8 underlay_qpn[0x18];
8698 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008699};
8700
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008701enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008702 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8703 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008704};
8705
8706struct mlx5_ifc_modify_flow_table_out_bits {
8707 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008708 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008709
8710 u8 syndrome[0x20];
8711
Matan Barakb4ff3a32016-02-09 14:57:42 +02008712 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008713};
8714
8715struct mlx5_ifc_modify_flow_table_in_bits {
8716 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008717 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008718
Matan Barakb4ff3a32016-02-09 14:57:42 +02008719 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008720 u8 op_mod[0x10];
8721
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008722 u8 other_vport[0x1];
8723 u8 reserved_at_41[0xf];
8724 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008725
Matan Barakb4ff3a32016-02-09 14:57:42 +02008726 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008727 u8 modify_field_select[0x10];
8728
8729 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008730 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008731
Matan Barakb4ff3a32016-02-09 14:57:42 +02008732 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008733 u8 table_id[0x18];
8734
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008735 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008736};
8737
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008738struct mlx5_ifc_ets_tcn_config_reg_bits {
8739 u8 g[0x1];
8740 u8 b[0x1];
8741 u8 r[0x1];
8742 u8 reserved_at_3[0x9];
8743 u8 group[0x4];
8744 u8 reserved_at_10[0x9];
8745 u8 bw_allocation[0x7];
8746
8747 u8 reserved_at_20[0xc];
8748 u8 max_bw_units[0x4];
8749 u8 reserved_at_30[0x8];
8750 u8 max_bw_value[0x8];
8751};
8752
8753struct mlx5_ifc_ets_global_config_reg_bits {
8754 u8 reserved_at_0[0x2];
8755 u8 r[0x1];
8756 u8 reserved_at_3[0x1d];
8757
8758 u8 reserved_at_20[0xc];
8759 u8 max_bw_units[0x4];
8760 u8 reserved_at_30[0x8];
8761 u8 max_bw_value[0x8];
8762};
8763
8764struct mlx5_ifc_qetc_reg_bits {
8765 u8 reserved_at_0[0x8];
8766 u8 port_number[0x8];
8767 u8 reserved_at_10[0x30];
8768
8769 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8770 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8771};
8772
Huy Nguyen415a64a2017-07-18 16:08:46 -05008773struct mlx5_ifc_qpdpm_dscp_reg_bits {
8774 u8 e[0x1];
8775 u8 reserved_at_01[0x0b];
8776 u8 prio[0x04];
8777};
8778
8779struct mlx5_ifc_qpdpm_reg_bits {
8780 u8 reserved_at_0[0x8];
8781 u8 local_port[0x8];
8782 u8 reserved_at_10[0x10];
8783 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8784};
8785
8786struct mlx5_ifc_qpts_reg_bits {
8787 u8 reserved_at_0[0x8];
8788 u8 local_port[0x8];
8789 u8 reserved_at_10[0x2d];
8790 u8 trust_state[0x3];
8791};
8792
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008793struct mlx5_ifc_qtct_reg_bits {
8794 u8 reserved_at_0[0x8];
8795 u8 port_number[0x8];
8796 u8 reserved_at_10[0xd];
8797 u8 prio[0x3];
8798
8799 u8 reserved_at_20[0x1d];
8800 u8 tclass[0x3];
8801};
8802
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008803struct mlx5_ifc_mcia_reg_bits {
8804 u8 l[0x1];
8805 u8 reserved_at_1[0x7];
8806 u8 module[0x8];
8807 u8 reserved_at_10[0x8];
8808 u8 status[0x8];
8809
8810 u8 i2c_device_address[0x8];
8811 u8 page_number[0x8];
8812 u8 device_address[0x10];
8813
8814 u8 reserved_at_40[0x10];
8815 u8 size[0x10];
8816
8817 u8 reserved_at_60[0x20];
8818
8819 u8 dword_0[0x20];
8820 u8 dword_1[0x20];
8821 u8 dword_2[0x20];
8822 u8 dword_3[0x20];
8823 u8 dword_4[0x20];
8824 u8 dword_5[0x20];
8825 u8 dword_6[0x20];
8826 u8 dword_7[0x20];
8827 u8 dword_8[0x20];
8828 u8 dword_9[0x20];
8829 u8 dword_10[0x20];
8830 u8 dword_11[0x20];
8831};
8832
Saeed Mahameed74862162016-06-09 15:11:34 +03008833struct mlx5_ifc_dcbx_param_bits {
8834 u8 dcbx_cee_cap[0x1];
8835 u8 dcbx_ieee_cap[0x1];
8836 u8 dcbx_standby_cap[0x1];
8837 u8 reserved_at_0[0x5];
8838 u8 port_number[0x8];
8839 u8 reserved_at_10[0xa];
8840 u8 max_application_table_size[6];
8841 u8 reserved_at_20[0x15];
8842 u8 version_oper[0x3];
8843 u8 reserved_at_38[5];
8844 u8 version_admin[0x3];
8845 u8 willing_admin[0x1];
8846 u8 reserved_at_41[0x3];
8847 u8 pfc_cap_oper[0x4];
8848 u8 reserved_at_48[0x4];
8849 u8 pfc_cap_admin[0x4];
8850 u8 reserved_at_50[0x4];
8851 u8 num_of_tc_oper[0x4];
8852 u8 reserved_at_58[0x4];
8853 u8 num_of_tc_admin[0x4];
8854 u8 remote_willing[0x1];
8855 u8 reserved_at_61[3];
8856 u8 remote_pfc_cap[4];
8857 u8 reserved_at_68[0x14];
8858 u8 remote_num_of_tc[0x4];
8859 u8 reserved_at_80[0x18];
8860 u8 error[0x8];
8861 u8 reserved_at_a0[0x160];
8862};
Aviv Heller84df61e2016-05-10 13:47:50 +03008863
8864struct mlx5_ifc_lagc_bits {
8865 u8 reserved_at_0[0x1d];
8866 u8 lag_state[0x3];
8867
8868 u8 reserved_at_20[0x14];
8869 u8 tx_remap_affinity_2[0x4];
8870 u8 reserved_at_38[0x4];
8871 u8 tx_remap_affinity_1[0x4];
8872};
8873
8874struct mlx5_ifc_create_lag_out_bits {
8875 u8 status[0x8];
8876 u8 reserved_at_8[0x18];
8877
8878 u8 syndrome[0x20];
8879
8880 u8 reserved_at_40[0x40];
8881};
8882
8883struct mlx5_ifc_create_lag_in_bits {
8884 u8 opcode[0x10];
8885 u8 reserved_at_10[0x10];
8886
8887 u8 reserved_at_20[0x10];
8888 u8 op_mod[0x10];
8889
8890 struct mlx5_ifc_lagc_bits ctx;
8891};
8892
8893struct mlx5_ifc_modify_lag_out_bits {
8894 u8 status[0x8];
8895 u8 reserved_at_8[0x18];
8896
8897 u8 syndrome[0x20];
8898
8899 u8 reserved_at_40[0x40];
8900};
8901
8902struct mlx5_ifc_modify_lag_in_bits {
8903 u8 opcode[0x10];
8904 u8 reserved_at_10[0x10];
8905
8906 u8 reserved_at_20[0x10];
8907 u8 op_mod[0x10];
8908
8909 u8 reserved_at_40[0x20];
8910 u8 field_select[0x20];
8911
8912 struct mlx5_ifc_lagc_bits ctx;
8913};
8914
8915struct mlx5_ifc_query_lag_out_bits {
8916 u8 status[0x8];
8917 u8 reserved_at_8[0x18];
8918
8919 u8 syndrome[0x20];
8920
8921 u8 reserved_at_40[0x40];
8922
8923 struct mlx5_ifc_lagc_bits ctx;
8924};
8925
8926struct mlx5_ifc_query_lag_in_bits {
8927 u8 opcode[0x10];
8928 u8 reserved_at_10[0x10];
8929
8930 u8 reserved_at_20[0x10];
8931 u8 op_mod[0x10];
8932
8933 u8 reserved_at_40[0x40];
8934};
8935
8936struct mlx5_ifc_destroy_lag_out_bits {
8937 u8 status[0x8];
8938 u8 reserved_at_8[0x18];
8939
8940 u8 syndrome[0x20];
8941
8942 u8 reserved_at_40[0x40];
8943};
8944
8945struct mlx5_ifc_destroy_lag_in_bits {
8946 u8 opcode[0x10];
8947 u8 reserved_at_10[0x10];
8948
8949 u8 reserved_at_20[0x10];
8950 u8 op_mod[0x10];
8951
8952 u8 reserved_at_40[0x40];
8953};
8954
8955struct mlx5_ifc_create_vport_lag_out_bits {
8956 u8 status[0x8];
8957 u8 reserved_at_8[0x18];
8958
8959 u8 syndrome[0x20];
8960
8961 u8 reserved_at_40[0x40];
8962};
8963
8964struct mlx5_ifc_create_vport_lag_in_bits {
8965 u8 opcode[0x10];
8966 u8 reserved_at_10[0x10];
8967
8968 u8 reserved_at_20[0x10];
8969 u8 op_mod[0x10];
8970
8971 u8 reserved_at_40[0x40];
8972};
8973
8974struct mlx5_ifc_destroy_vport_lag_out_bits {
8975 u8 status[0x8];
8976 u8 reserved_at_8[0x18];
8977
8978 u8 syndrome[0x20];
8979
8980 u8 reserved_at_40[0x40];
8981};
8982
8983struct mlx5_ifc_destroy_vport_lag_in_bits {
8984 u8 opcode[0x10];
8985 u8 reserved_at_10[0x10];
8986
8987 u8 reserved_at_20[0x10];
8988 u8 op_mod[0x10];
8989
8990 u8 reserved_at_40[0x40];
8991};
8992
Ariel Levkovich24da0012018-04-05 18:53:27 +03008993struct mlx5_ifc_alloc_memic_in_bits {
8994 u8 opcode[0x10];
8995 u8 reserved_at_10[0x10];
8996
8997 u8 reserved_at_20[0x10];
8998 u8 op_mod[0x10];
8999
9000 u8 reserved_at_30[0x20];
9001
9002 u8 reserved_at_40[0x18];
9003 u8 log_memic_addr_alignment[0x8];
9004
9005 u8 range_start_addr[0x40];
9006
9007 u8 range_size[0x20];
9008
9009 u8 memic_size[0x20];
9010};
9011
9012struct mlx5_ifc_alloc_memic_out_bits {
9013 u8 status[0x8];
9014 u8 reserved_at_8[0x18];
9015
9016 u8 syndrome[0x20];
9017
9018 u8 memic_start_addr[0x40];
9019};
9020
9021struct mlx5_ifc_dealloc_memic_in_bits {
9022 u8 opcode[0x10];
9023 u8 reserved_at_10[0x10];
9024
9025 u8 reserved_at_20[0x10];
9026 u8 op_mod[0x10];
9027
9028 u8 reserved_at_40[0x40];
9029
9030 u8 memic_start_addr[0x40];
9031
9032 u8 memic_size[0x20];
9033
9034 u8 reserved_at_e0[0x20];
9035};
9036
9037struct mlx5_ifc_dealloc_memic_out_bits {
9038 u8 status[0x8];
9039 u8 reserved_at_8[0x18];
9040
9041 u8 syndrome[0x20];
9042
9043 u8 reserved_at_40[0x40];
9044};
9045
Eli Cohend29b7962014-10-02 12:19:43 +03009046#endif /* MLX5_IFC_H */