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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
Ariel Levkovich24da0012018-04-05 18:53:27 +030095 MLX5_CMD_OP_ALLOC_MEMIC = 0x205,
96 MLX5_CMD_OP_DEALLOC_MEMIC = 0x206,
Eli Cohend29b7962014-10-02 12:19:43 +030097 MLX5_CMD_OP_CREATE_EQ = 0x301,
98 MLX5_CMD_OP_DESTROY_EQ = 0x302,
99 MLX5_CMD_OP_QUERY_EQ = 0x303,
100 MLX5_CMD_OP_GEN_EQE = 0x304,
101 MLX5_CMD_OP_CREATE_CQ = 0x400,
102 MLX5_CMD_OP_DESTROY_CQ = 0x401,
103 MLX5_CMD_OP_QUERY_CQ = 0x402,
104 MLX5_CMD_OP_MODIFY_CQ = 0x403,
105 MLX5_CMD_OP_CREATE_QP = 0x500,
106 MLX5_CMD_OP_DESTROY_QP = 0x501,
107 MLX5_CMD_OP_RST2INIT_QP = 0x502,
108 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
109 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
110 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
111 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
112 MLX5_CMD_OP_2ERR_QP = 0x507,
113 MLX5_CMD_OP_2RST_QP = 0x50a,
114 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300115 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300116 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
117 MLX5_CMD_OP_CREATE_PSV = 0x600,
118 MLX5_CMD_OP_DESTROY_PSV = 0x601,
119 MLX5_CMD_OP_CREATE_SRQ = 0x700,
120 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
121 MLX5_CMD_OP_QUERY_SRQ = 0x702,
122 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300123 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
124 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
125 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
126 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300127 MLX5_CMD_OP_CREATE_DCT = 0x710,
128 MLX5_CMD_OP_DESTROY_DCT = 0x711,
129 MLX5_CMD_OP_DRAIN_DCT = 0x712,
130 MLX5_CMD_OP_QUERY_DCT = 0x713,
131 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300132 MLX5_CMD_OP_CREATE_XRQ = 0x717,
133 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
134 MLX5_CMD_OP_QUERY_XRQ = 0x719,
135 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300136 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
137 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
138 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
139 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
140 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
141 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300143 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300144 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
145 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
146 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
147 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200148 MLX5_CMD_OP_QUERY_VNIC_ENV = 0x76f,
Eli Cohend29b7962014-10-02 12:19:43 +0300149 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
150 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
151 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
152 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200153 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300154 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300155 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
156 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
157 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
158 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
159 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
160 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300161 MLX5_CMD_OP_ALLOC_PD = 0x800,
162 MLX5_CMD_OP_DEALLOC_PD = 0x801,
163 MLX5_CMD_OP_ALLOC_UAR = 0x802,
164 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
165 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
166 MLX5_CMD_OP_ACCESS_REG = 0x805,
167 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300168 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300169 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
170 MLX5_CMD_OP_MAD_IFC = 0x50d,
171 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
172 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
173 MLX5_CMD_OP_NOP = 0x80d,
174 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
175 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300176 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
177 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
178 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
179 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
180 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
181 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
182 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
183 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
184 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
185 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
186 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
187 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200188 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
189 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300190 MLX5_CMD_OP_CREATE_LAG = 0x840,
191 MLX5_CMD_OP_MODIFY_LAG = 0x841,
192 MLX5_CMD_OP_QUERY_LAG = 0x842,
193 MLX5_CMD_OP_DESTROY_LAG = 0x843,
194 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
195 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300196 MLX5_CMD_OP_CREATE_TIR = 0x900,
197 MLX5_CMD_OP_MODIFY_TIR = 0x901,
198 MLX5_CMD_OP_DESTROY_TIR = 0x902,
199 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300200 MLX5_CMD_OP_CREATE_SQ = 0x904,
201 MLX5_CMD_OP_MODIFY_SQ = 0x905,
202 MLX5_CMD_OP_DESTROY_SQ = 0x906,
203 MLX5_CMD_OP_QUERY_SQ = 0x907,
204 MLX5_CMD_OP_CREATE_RQ = 0x908,
205 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300206 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300207 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
208 MLX5_CMD_OP_QUERY_RQ = 0x90b,
209 MLX5_CMD_OP_CREATE_RMP = 0x90c,
210 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
211 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
212 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300213 MLX5_CMD_OP_CREATE_TIS = 0x912,
214 MLX5_CMD_OP_MODIFY_TIS = 0x913,
215 MLX5_CMD_OP_DESTROY_TIS = 0x914,
216 MLX5_CMD_OP_QUERY_TIS = 0x915,
217 MLX5_CMD_OP_CREATE_RQT = 0x916,
218 MLX5_CMD_OP_MODIFY_RQT = 0x917,
219 MLX5_CMD_OP_DESTROY_RQT = 0x918,
220 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200221 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300222 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
223 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
224 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
225 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
226 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
227 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
228 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
229 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200230 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000231 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
232 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
233 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300234 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300235 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
236 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200237 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
238 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300239 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
240 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
241 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
242 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
243 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300244 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300245};
246
247struct mlx5_ifc_flow_table_fields_supported_bits {
248 u8 outer_dmac[0x1];
249 u8 outer_smac[0x1];
250 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300251 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300252 u8 outer_first_prio[0x1];
253 u8 outer_first_cfi[0x1];
254 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300255 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300256 u8 outer_second_prio[0x1];
257 u8 outer_second_cfi[0x1];
258 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200259 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300260 u8 outer_sip[0x1];
261 u8 outer_dip[0x1];
262 u8 outer_frag[0x1];
263 u8 outer_ip_protocol[0x1];
264 u8 outer_ip_ecn[0x1];
265 u8 outer_ip_dscp[0x1];
266 u8 outer_udp_sport[0x1];
267 u8 outer_udp_dport[0x1];
268 u8 outer_tcp_sport[0x1];
269 u8 outer_tcp_dport[0x1];
270 u8 outer_tcp_flags[0x1];
271 u8 outer_gre_protocol[0x1];
272 u8 outer_gre_key[0x1];
273 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200274 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300275 u8 source_eswitch_port[0x1];
276
277 u8 inner_dmac[0x1];
278 u8 inner_smac[0x1];
279 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300280 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300281 u8 inner_first_prio[0x1];
282 u8 inner_first_cfi[0x1];
283 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200284 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300285 u8 inner_second_prio[0x1];
286 u8 inner_second_cfi[0x1];
287 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200288 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300289 u8 inner_sip[0x1];
290 u8 inner_dip[0x1];
291 u8 inner_frag[0x1];
292 u8 inner_ip_protocol[0x1];
293 u8 inner_ip_ecn[0x1];
294 u8 inner_ip_dscp[0x1];
295 u8 inner_udp_sport[0x1];
296 u8 inner_udp_dport[0x1];
297 u8 inner_tcp_sport[0x1];
298 u8 inner_tcp_dport[0x1];
299 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200300 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300301 u8 reserved_at_40[0x17];
302 u8 outer_esp_spi[0x1];
303 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300304 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300305
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300306 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300307};
308
309struct mlx5_ifc_flow_table_prop_layout_bits {
310 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000311 u8 reserved_at_1[0x1];
312 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200313 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200314 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200315 u8 identified_miss_table_mode[0x1];
316 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300317 u8 encap[0x1];
318 u8 decap[0x1];
Or Gerlitz0c068972018-01-28 20:14:20 +0200319 u8 reserved_at_9[0x1];
320 u8 pop_vlan[0x1];
321 u8 push_vlan[0x1];
322 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300325 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200326 u8 log_max_modify_header_context[0x8];
327 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328 u8 max_ft_level[0x8];
329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300331
Matan Barakb4ff3a32016-02-09 14:57:42 +0200332 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200333 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300334
Matan Barakb4ff3a32016-02-09 14:57:42 +0200335 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200336 u8 log_max_destination[0x8];
337
Raed Salem16f1c5b2017-07-30 11:02:51 +0300338 u8 log_max_flow_counter[0x8];
339 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300340 u8 log_max_flow[0x8];
341
Matan Barakb4ff3a32016-02-09 14:57:42 +0200342 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300343
344 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
345
346 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
347};
348
349struct mlx5_ifc_odp_per_transport_service_cap_bits {
350 u8 send[0x1];
351 u8 receive[0x1];
352 u8 write[0x1];
353 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200354 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300355 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200356 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300357};
358
359struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
360 u8 smac_47_16[0x20];
361
362 u8 smac_15_0[0x10];
363 u8 ethertype[0x10];
364
365 u8 dmac_47_16[0x20];
366
367 u8 dmac_15_0[0x10];
368 u8 first_prio[0x3];
369 u8 first_cfi[0x1];
370 u8 first_vid[0xc];
371
372 u8 ip_protocol[0x8];
373 u8 ip_dscp[0x6];
374 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300375 u8 cvlan_tag[0x1];
376 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300377 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300378 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300379 u8 tcp_flags[0x9];
380
381 u8 tcp_sport[0x10];
382 u8 tcp_dport[0x10];
383
Or Gerlitza8ade552017-06-07 17:49:56 +0300384 u8 reserved_at_c0[0x18];
385 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300386
387 u8 udp_sport[0x10];
388 u8 udp_dport[0x10];
389
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200390 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300391
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200392 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300393};
394
395struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300396 u8 reserved_at_0[0x8];
397 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300398
Shahar Klein3e99df82018-03-18 09:02:06 +0200399 u8 source_eswitch_owner_vhca_id[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300400 u8 source_port[0x10];
401
402 u8 outer_second_prio[0x3];
403 u8 outer_second_cfi[0x1];
404 u8 outer_second_vid[0xc];
405 u8 inner_second_prio[0x3];
406 u8 inner_second_cfi[0x1];
407 u8 inner_second_vid[0xc];
408
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300409 u8 outer_second_cvlan_tag[0x1];
410 u8 inner_second_cvlan_tag[0x1];
411 u8 outer_second_svlan_tag[0x1];
412 u8 inner_second_svlan_tag[0x1];
413 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300414 u8 gre_protocol[0x10];
415
416 u8 gre_key_h[0x18];
417 u8 gre_key_l[0x8];
418
419 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200420 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300421
Matan Barakb4ff3a32016-02-09 14:57:42 +0200422 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300423
Matan Barakb4ff3a32016-02-09 14:57:42 +0200424 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300425 u8 outer_ipv6_flow_label[0x14];
426
Matan Barakb4ff3a32016-02-09 14:57:42 +0200427 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300428 u8 inner_ipv6_flow_label[0x14];
429
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300430 u8 reserved_at_120[0x28];
431 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300432 u8 reserved_at_160[0x20];
433 u8 outer_esp_spi[0x20];
434 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435};
436
437struct mlx5_ifc_cmd_pas_bits {
438 u8 pa_h[0x20];
439
440 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200441 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300442};
443
444struct mlx5_ifc_uint64_bits {
445 u8 hi[0x20];
446
447 u8 lo[0x20];
448};
449
450enum {
451 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
452 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
453 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
454 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
455 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
456 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
457 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
458 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
459 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
460 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
461};
462
463struct mlx5_ifc_ads_bits {
464 u8 fl[0x1];
465 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200466 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300467 u8 pkey_index[0x10];
468
Matan Barakb4ff3a32016-02-09 14:57:42 +0200469 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300470 u8 grh[0x1];
471 u8 mlid[0x7];
472 u8 rlid[0x10];
473
474 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200477 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300478 u8 stat_rate[0x4];
479 u8 hop_limit[0x8];
480
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 tclass[0x8];
483 u8 flow_label[0x14];
484
485 u8 rgid_rip[16][0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 f_dscp[0x1];
489 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200490 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300491 u8 f_eth_prio[0x1];
492 u8 ecn[0x2];
493 u8 dscp[0x6];
494 u8 udp_sport[0x10];
495
496 u8 dei_cfi[0x1];
497 u8 eth_prio[0x3];
498 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200499 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300500 u8 rmac_47_32[0x10];
501
502 u8 rmac_31_0[0x20];
503};
504
505struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200506 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300507 u8 nic_rx_multi_path_tirs_fts[0x1];
508 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
509 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510
511 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
512
Matan Barakb4ff3a32016-02-09 14:57:42 +0200513 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300514
515 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524};
525
Saeed Mahameed495716b2015-12-01 18:03:19 +0200526struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200527 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200528
529 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
532
533 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
534
Matan Barakb4ff3a32016-02-09 14:57:42 +0200535 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200536};
537
Saeed Mahameedd6666752015-12-01 18:03:22 +0200538struct mlx5_ifc_e_switch_cap_bits {
539 u8 vport_svlan_strip[0x1];
540 u8 vport_cvlan_strip[0x1];
541 u8 vport_svlan_insert[0x1];
542 u8 vport_cvlan_insert_if_not_exist[0x1];
543 u8 vport_cvlan_insert_overwrite[0x1];
Roi Dayana6d04562017-12-05 10:38:58 +0200544 u8 reserved_at_5[0x18];
545 u8 merged_eswitch[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300546 u8 nic_vport_node_guid_modify[0x1];
547 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200548
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300549 u8 vxlan_encap_decap[0x1];
550 u8 nvgre_encap_decap[0x1];
551 u8 reserved_at_22[0x9];
552 u8 log_max_encap_headers[0x5];
553 u8 reserved_2b[0x6];
554 u8 max_encap_header_size[0xa];
555
556 u8 reserved_40[0x7c0];
557
Saeed Mahameedd6666752015-12-01 18:03:22 +0200558};
559
Saeed Mahameed74862162016-06-09 15:11:34 +0300560struct mlx5_ifc_qos_cap_bits {
561 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300562 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200563 u8 esw_bw_share[0x1];
564 u8 esw_rate_limit[0x1];
Bodong Wang05d3ac92018-03-19 15:10:29 +0200565 u8 reserved_at_4[0x1];
566 u8 packet_pacing_burst_bound[0x1];
567 u8 packet_pacing_typical_size[0x1];
568 u8 reserved_at_7[0x19];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300569
570 u8 reserved_at_20[0x20];
571
Saeed Mahameed74862162016-06-09 15:11:34 +0300572 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300573
Saeed Mahameed74862162016-06-09 15:11:34 +0300574 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
576 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300577 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300578
579 u8 esw_element_type[0x10];
580 u8 esw_tsar_type[0x10];
581
582 u8 reserved_at_c0[0x10];
583 u8 max_qos_para_vport[0x10];
584
585 u8 max_tsar_bw_share[0x20];
586
587 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300588};
589
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300590struct mlx5_ifc_debug_cap_bits {
591 u8 reserved_at_0[0x20];
592
593 u8 reserved_at_20[0x2];
594 u8 stall_detect[0x1];
595 u8 reserved_at_23[0x1d];
596
597 u8 reserved_at_40[0x7c0];
598};
599
Saeed Mahameede2816822015-05-28 22:28:40 +0300600struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
601 u8 csum_cap[0x1];
602 u8 vlan_cap[0x1];
603 u8 lro_cap[0x1];
604 u8 lro_psh_flag[0x1];
605 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200606 u8 reserved_at_5[0x2];
607 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200608 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200609 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300610 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200611 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300612 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300613 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300614 u8 reg_umr_sq[0x1];
615 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300616 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300617 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200618 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300619 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620 u8 tunnel_stateless_vxlan[0x1];
621
Ilan Tayari547eede2017-04-18 16:04:28 +0300622 u8 swp[0x1];
623 u8 swp_csum[0x1];
624 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300625 u8 reserved_at_23[0x1b];
626 u8 max_geneve_opt_len[0x1];
627 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300628
Matan Barakb4ff3a32016-02-09 14:57:42 +0200629 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300630 u8 lro_min_mss_size[0x10];
631
Matan Barakb4ff3a32016-02-09 14:57:42 +0200632 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300633
634 u8 lro_timer_supported_periods[4][0x20];
635
Matan Barakb4ff3a32016-02-09 14:57:42 +0200636 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300637};
638
639struct mlx5_ifc_roce_cap_bits {
640 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200641 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300642
Matan Barakb4ff3a32016-02-09 14:57:42 +0200643 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300644
Matan Barakb4ff3a32016-02-09 14:57:42 +0200645 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300646 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200647 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300648 u8 roce_version[0x8];
649
Matan Barakb4ff3a32016-02-09 14:57:42 +0200650 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300651 u8 r_roce_dest_udp_port[0x10];
652
653 u8 r_roce_max_src_udp_port[0x10];
654 u8 r_roce_min_src_udp_port[0x10];
655
Matan Barakb4ff3a32016-02-09 14:57:42 +0200656 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300657 u8 roce_address_table_size[0x10];
658
Matan Barakb4ff3a32016-02-09 14:57:42 +0200659 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300660};
661
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300662struct mlx5_ifc_device_mem_cap_bits {
663 u8 memic[0x1];
664 u8 reserved_at_1[0x1f];
665
666 u8 reserved_at_20[0xb];
667 u8 log_min_memic_alloc_size[0x5];
668 u8 reserved_at_30[0x8];
669 u8 log_max_memic_addr_alignment[0x8];
670
671 u8 memic_bar_start_addr[0x40];
672
673 u8 memic_bar_size[0x20];
674
675 u8 max_memic_size[0x20];
676
677 u8 reserved_at_c0[0x740];
678};
679
Saeed Mahameede2816822015-05-28 22:28:40 +0300680enum {
681 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
682 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
683 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
684 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
685 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
686 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
687 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
688 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
689 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
690};
691
692enum {
693 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
694 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
695 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
696 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
697 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
698 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
699 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
700 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
701 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
702};
703
704struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200705 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706
Or Gerlitzbd108382017-05-28 15:24:17 +0300707 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200708 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300709 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300710
Matan Barakb4ff3a32016-02-09 14:57:42 +0200711 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300712
Matan Barakb4ff3a32016-02-09 14:57:42 +0200713 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300714
Matan Barakb4ff3a32016-02-09 14:57:42 +0200715 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200716 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300717
Matan Barakb4ff3a32016-02-09 14:57:42 +0200718 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200719 u8 atomic_size_qp[0x10];
720
Matan Barakb4ff3a32016-02-09 14:57:42 +0200721 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300722 u8 atomic_size_dc[0x10];
723
Matan Barakb4ff3a32016-02-09 14:57:42 +0200724 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300725};
726
727struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200728 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300729
730 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200731 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300732
Matan Barakb4ff3a32016-02-09 14:57:42 +0200733 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300734
735 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
736
737 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
738
739 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
740
Matan Barakb4ff3a32016-02-09 14:57:42 +0200741 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300742};
743
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200744struct mlx5_ifc_calc_op {
745 u8 reserved_at_0[0x10];
746 u8 reserved_at_10[0x9];
747 u8 op_swap_endianness[0x1];
748 u8 op_min[0x1];
749 u8 op_xor[0x1];
750 u8 op_or[0x1];
751 u8 op_and[0x1];
752 u8 op_max[0x1];
753 u8 op_add[0x1];
754};
755
756struct mlx5_ifc_vector_calc_cap_bits {
757 u8 calc_matrix[0x1];
758 u8 reserved_at_1[0x1f];
759 u8 reserved_at_20[0x8];
760 u8 max_vec_count[0x8];
761 u8 reserved_at_30[0xd];
762 u8 max_chunk_size[0x3];
763 struct mlx5_ifc_calc_op calc0;
764 struct mlx5_ifc_calc_op calc1;
765 struct mlx5_ifc_calc_op calc2;
766 struct mlx5_ifc_calc_op calc3;
767
768 u8 reserved_at_e0[0x720];
769};
770
Saeed Mahameede2816822015-05-28 22:28:40 +0300771enum {
772 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
773 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300774 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300775 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300776};
777
778enum {
779 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
780 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
781};
782
783enum {
784 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
785 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
786 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
787 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
788 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
789};
790
791enum {
792 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
793 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
794 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
795 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
796 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
797 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
798};
799
800enum {
801 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
802 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
803};
804
805enum {
806 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
807 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
808 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
809};
810
811enum {
812 MLX5_CAP_PORT_TYPE_IB = 0x0,
813 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300814};
815
Max Gurtovoy1410a902017-05-28 10:53:10 +0300816enum {
817 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
818 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
819 MLX5_CAP_UMR_FENCE_NONE = 0x2,
820};
821
Eli Cohenb7755162014-10-02 12:19:44 +0300822struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200823 u8 reserved_at_0[0x30];
824 u8 vhca_id[0x10];
825
826 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300827
828 u8 log_max_srq_sz[0x8];
829 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200830 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300831 u8 log_max_qp[0x5];
832
Matan Barakb4ff3a32016-02-09 14:57:42 +0200833 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300834 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200835 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300836
Matan Barakb4ff3a32016-02-09 14:57:42 +0200837 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300838 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200839 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300840 u8 log_max_cq[0x5];
841
842 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200843 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300844 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200845 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300846 u8 log_max_eq[0x4];
847
848 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200849 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300850 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200851 u8 force_teardown[0x1];
852 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300853 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200854 u8 umr_extended_translation_offset[0x1];
855 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300856 u8 log_max_klm_list_size[0x6];
857
Matan Barakb4ff3a32016-02-09 14:57:42 +0200858 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300859 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200860 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300861 u8 log_max_ra_res_dc[0x6];
862
Matan Barakb4ff3a32016-02-09 14:57:42 +0200863 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300864 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200865 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300866 u8 log_max_ra_res_qp[0x6];
867
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200868 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300869 u8 cc_query_allowed[0x1];
870 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200871 u8 start_pad[0x1];
872 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500873 u8 reserved_at_165[0xa];
874 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300875 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300876
Saeed Mahameede2816822015-05-28 22:28:40 +0300877 u8 out_of_seq_cnt[0x1];
878 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300879 u8 retransmission_q_counters[0x1];
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300880 u8 debug[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300881 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300882 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300883 u8 max_qp_cnt[0xa];
884 u8 pkey_table_size[0x10];
885
Saeed Mahameede2816822015-05-28 22:28:40 +0300886 u8 vport_group_manager[0x1];
887 u8 vhca_group_manager[0x1];
888 u8 ib_virt[0x1];
889 u8 eth_virt[0x1];
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200890 u8 vnic_env_queue_counters[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300891 u8 ets[0x1];
892 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200893 u8 eswitch_flow_table[0x1];
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300894 u8 device_memory[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200895 u8 mcam_reg[0x1];
896 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300897 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200898 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300899 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300900 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200901 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300902 u8 disable_link_up[0x1];
903 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300904 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300905 u8 num_ports[0x8];
906
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300907 u8 reserved_at_1c0[0x1];
908 u8 pps[0x1];
909 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300910 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300911 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200912 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300913 u8 reserved_at_1d0[0x1];
914 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300915 u8 general_notification_event[0x1];
916 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200917 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200918 u8 rol_s[0x1];
919 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300920 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200921 u8 wol_s[0x1];
922 u8 wol_g[0x1];
923 u8 wol_a[0x1];
924 u8 wol_b[0x1];
925 u8 wol_m[0x1];
926 u8 wol_u[0x1];
927 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300928
929 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300930 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300931 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300932
Saeed Mahameede2816822015-05-28 22:28:40 +0300933 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300934 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300935 u8 reserved_at_202[0x1];
936 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200937 u8 ipoib_basic_offloads[0x1];
Majd Dibbinyc8d75a92018-03-22 15:34:04 +0200938 u8 reserved_at_205[0x1];
939 u8 repeated_block_disabled[0x1];
940 u8 umr_modify_entity_size_disabled[0x1];
941 u8 umr_modify_atomic_disabled[0x1];
942 u8 umr_indirect_mkey_disabled[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300943 u8 umr_fence[0x2];
944 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300945 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 cmdif_checksum[0x2];
947 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300948 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300949 u8 wq_signature[0x1];
950 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300951 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300952 u8 sho[0x1];
953 u8 tph[0x1];
954 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300955 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300956 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300957 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300958 u8 roce[0x1];
959 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300960 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300961
962 u8 cq_oi[0x1];
963 u8 cq_resize[0x1];
964 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300965 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300966 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 pg[0x1];
968 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300969 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300970 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300971 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300972 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300973 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300974 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200975 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300976 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200977 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300978 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300979 u8 qkv[0x1];
980 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200981 u8 set_deth_sqpn[0x1];
982 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300983 u8 xrc[0x1];
984 u8 ud[0x1];
985 u8 uc[0x1];
986 u8 rc[0x1];
987
Eli Cohena6d51b62017-01-03 23:55:23 +0200988 u8 uar_4k[0x1];
989 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300991 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300992 u8 log_pg_sz[0x8];
993
994 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200995 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300996 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300998 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300999
1000 u8 reserved_at_270[0xb];
1001 u8 lag_master[0x1];
1002 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +03001003
Tariq Toukane1c9c622016-04-11 23:10:21 +03001004 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001005 u8 max_wqe_sz_sq[0x10];
1006
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001008 u8 max_wqe_sz_rq[0x10];
1009
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001010 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001011 u8 max_wqe_sz_sq_dc[0x10];
1012
Tariq Toukane1c9c622016-04-11 23:10:21 +03001013 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +03001014 u8 max_qp_mcg[0x19];
1015
Tariq Toukane1c9c622016-04-11 23:10:21 +03001016 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001017 u8 log_max_mcg[0x8];
1018
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001020 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001022 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001024 u8 log_max_xrcd[0x5];
1025
Moshe Shemesh5c298142017-12-26 16:46:29 +02001026 u8 nic_receive_steering_discard[0x1];
Moshe Shemeshaaabd072018-01-14 00:56:25 +02001027 u8 receive_discard_vport_down[0x1];
1028 u8 transmit_discard_vport_down[0x1];
1029 u8 reserved_at_343[0x5];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001030 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001031 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001032
Eli Cohenb7755162014-10-02 12:19:44 +03001033
Tariq Toukane1c9c622016-04-11 23:10:21 +03001034 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001035 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001037 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001038 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001039 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001041 u8 log_max_tis[0x5];
1042
Saeed Mahameede2816822015-05-28 22:28:40 +03001043 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001044 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001045 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001046 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001047 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001048 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001049 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001050 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001051 u8 log_max_tis_per_sq[0x5];
1052
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001053 u8 ext_stride_num_range[0x1];
1054 u8 reserved_at_3a1[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001055 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001056 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001057 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001058 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001059 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001060 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001061 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001062
Or Gerlitz40817cd2017-06-25 12:38:45 +03001063 u8 hairpin[0x1];
1064 u8 reserved_at_3c1[0x2];
1065 u8 log_max_hairpin_queues[0x5];
1066 u8 reserved_at_3c8[0x3];
1067 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001068 u8 reserved_at_3d0[0x3];
1069 u8 log_max_hairpin_num_packets[0x5];
1070 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001071 u8 log_max_wq_sz[0x5];
1072
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001073 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001074 u8 disable_local_lb_uc[0x1];
1075 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001076 u8 log_min_hairpin_wq_data_sz[0x5];
1077 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001078 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001079 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001080 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001081 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001082 u8 log_max_current_uc_list[0x5];
1083
Tariq Toukane1c9c622016-04-11 23:10:21 +03001084 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001085
Tariq Toukane1c9c622016-04-11 23:10:21 +03001086 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001087 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001088 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001089 u8 log_uar_page_sz[0x10];
1090
Tariq Toukane1c9c622016-04-11 23:10:21 +03001091 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001092 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001093 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001094
Eli Cohena6d51b62017-01-03 23:55:23 +02001095 u8 reserved_at_500[0x20];
1096 u8 num_of_uars_per_page[0x20];
1097 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001098
Guy Levi0ff8e792017-10-19 08:25:51 +03001099 u8 reserved_at_580[0x3d];
1100 u8 cqe_128_always[0x1];
1101 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001102 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001103
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001104 u8 cqe_compression_timeout[0x10];
1105 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001106
Saeed Mahameed74862162016-06-09 15:11:34 +03001107 u8 reserved_at_5e0[0x10];
1108 u8 tag_matching[0x1];
1109 u8 rndv_offload_rc[0x1];
1110 u8 rndv_offload_dc[0x1];
1111 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001112 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001113 u8 log_max_xrq[0x5];
1114
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001115 u8 affiliate_nic_vport_criteria[0x8];
1116 u8 native_port_num[0x8];
1117 u8 num_vhca_ports[0x8];
1118 u8 reserved_at_618[0x6];
1119 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001120 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001121};
1122
Saeed Mahameed81848732015-12-01 18:03:20 +02001123enum mlx5_flow_destination_type {
1124 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1125 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1126 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001127
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001128 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001129 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001130};
1131
1132struct mlx5_ifc_dest_format_struct_bits {
1133 u8 destination_type[0x8];
1134 u8 destination_id[0x18];
Shahar Kleinb17f7fc2018-03-22 12:32:12 +02001135 u8 destination_eswitch_owner_vhca_id_valid[0x1];
1136 u8 reserved_at_21[0xf];
1137 u8 destination_eswitch_owner_vhca_id[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001138};
1139
Amir Vadai9dc0b282016-05-13 12:55:39 +00001140struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001141 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001142
1143 u8 reserved_at_20[0x20];
1144};
1145
1146union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1147 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1148 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1149 u8 reserved_at_0[0x40];
1150};
1151
Saeed Mahameede2816822015-05-28 22:28:40 +03001152struct mlx5_ifc_fte_match_param_bits {
1153 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1154
1155 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1156
1157 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1158
Matan Barakb4ff3a32016-02-09 14:57:42 +02001159 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001160};
1161
1162enum {
1163 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1164 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1165 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1166 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1167 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1168};
1169
1170struct mlx5_ifc_rx_hash_field_select_bits {
1171 u8 l3_prot_type[0x1];
1172 u8 l4_prot_type[0x1];
1173 u8 selected_fields[0x1e];
1174};
1175
1176enum {
1177 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1178 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1179};
1180
1181enum {
1182 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1183 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1184};
1185
1186struct mlx5_ifc_wq_bits {
1187 u8 wq_type[0x4];
1188 u8 wq_signature[0x1];
1189 u8 end_padding_mode[0x2];
1190 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192
1193 u8 hds_skip_first_sge[0x1];
1194 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001195 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001196 u8 page_offset[0x5];
1197 u8 lwm[0x10];
1198
Matan Barakb4ff3a32016-02-09 14:57:42 +02001199 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001200 u8 pd[0x18];
1201
Matan Barakb4ff3a32016-02-09 14:57:42 +02001202 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001203 u8 uar_page[0x18];
1204
1205 u8 dbr_addr[0x40];
1206
1207 u8 hw_counter[0x20];
1208
1209 u8 sw_counter[0x20];
1210
Matan Barakb4ff3a32016-02-09 14:57:42 +02001211 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001212 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001213 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001214 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001215 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001216 u8 log_wq_sz[0x5];
1217
Or Gerlitz4d533e02018-01-04 12:26:21 +02001218 u8 reserved_at_120[0x3];
1219 u8 log_hairpin_num_packets[0x5];
1220 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001221 u8 log_hairpin_data_sz[0x5];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001222
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001223 u8 reserved_at_130[0x4];
1224 u8 log_wqe_num_of_strides[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001225 u8 two_byte_shift_en[0x1];
1226 u8 reserved_at_139[0x4];
1227 u8 log_wqe_stride_size[0x3];
1228
1229 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001230
1231 struct mlx5_ifc_cmd_pas_bits pas[0];
1232};
1233
1234struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001235 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001236 u8 rq_num[0x18];
1237};
1238
1239struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001240 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001241 u8 mac_addr_47_32[0x10];
1242
1243 u8 mac_addr_31_0[0x20];
1244};
1245
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001246struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001247 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001248 u8 vlan[0x0c];
1249
Matan Barakb4ff3a32016-02-09 14:57:42 +02001250 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001251};
1252
Saeed Mahameede2816822015-05-28 22:28:40 +03001253struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001254 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001255
1256 u8 min_time_between_cnps[0x20];
1257
Matan Barakb4ff3a32016-02-09 14:57:42 +02001258 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001259 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001260 u8 reserved_at_d8[0x4];
1261 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001262 u8 cnp_802p_prio[0x3];
1263
Matan Barakb4ff3a32016-02-09 14:57:42 +02001264 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001265};
1266
1267struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001268 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001269
Matan Barakb4ff3a32016-02-09 14:57:42 +02001270 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001271 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001272 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001273 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001274 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001275
Matan Barakb4ff3a32016-02-09 14:57:42 +02001276 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001277
1278 u8 rpg_time_reset[0x20];
1279
1280 u8 rpg_byte_reset[0x20];
1281
1282 u8 rpg_threshold[0x20];
1283
1284 u8 rpg_max_rate[0x20];
1285
1286 u8 rpg_ai_rate[0x20];
1287
1288 u8 rpg_hai_rate[0x20];
1289
1290 u8 rpg_gd[0x20];
1291
1292 u8 rpg_min_dec_fac[0x20];
1293
1294 u8 rpg_min_rate[0x20];
1295
Matan Barakb4ff3a32016-02-09 14:57:42 +02001296 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001297
1298 u8 rate_to_set_on_first_cnp[0x20];
1299
1300 u8 dce_tcp_g[0x20];
1301
1302 u8 dce_tcp_rtt[0x20];
1303
1304 u8 rate_reduce_monitor_period[0x20];
1305
Matan Barakb4ff3a32016-02-09 14:57:42 +02001306 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001307
1308 u8 initial_alpha_value[0x20];
1309
Matan Barakb4ff3a32016-02-09 14:57:42 +02001310 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001311};
1312
1313struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001314 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001315
1316 u8 rppp_max_rps[0x20];
1317
1318 u8 rpg_time_reset[0x20];
1319
1320 u8 rpg_byte_reset[0x20];
1321
1322 u8 rpg_threshold[0x20];
1323
1324 u8 rpg_max_rate[0x20];
1325
1326 u8 rpg_ai_rate[0x20];
1327
1328 u8 rpg_hai_rate[0x20];
1329
1330 u8 rpg_gd[0x20];
1331
1332 u8 rpg_min_dec_fac[0x20];
1333
1334 u8 rpg_min_rate[0x20];
1335
Matan Barakb4ff3a32016-02-09 14:57:42 +02001336 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001337};
1338
1339enum {
1340 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1341 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1342 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1343};
1344
1345struct mlx5_ifc_resize_field_select_bits {
1346 u8 resize_field_select[0x20];
1347};
1348
1349enum {
1350 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1351 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1352 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1353 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1354};
1355
1356struct mlx5_ifc_modify_field_select_bits {
1357 u8 modify_field_select[0x20];
1358};
1359
1360struct mlx5_ifc_field_select_r_roce_np_bits {
1361 u8 field_select_r_roce_np[0x20];
1362};
1363
1364struct mlx5_ifc_field_select_r_roce_rp_bits {
1365 u8 field_select_r_roce_rp[0x20];
1366};
1367
1368enum {
1369 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1370 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1371 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1372 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1373 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1374 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1375 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1376 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1377 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1378 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1379};
1380
1381struct mlx5_ifc_field_select_802_1qau_rp_bits {
1382 u8 field_select_8021qaurp[0x20];
1383};
1384
1385struct mlx5_ifc_phys_layer_cntrs_bits {
1386 u8 time_since_last_clear_high[0x20];
1387
1388 u8 time_since_last_clear_low[0x20];
1389
1390 u8 symbol_errors_high[0x20];
1391
1392 u8 symbol_errors_low[0x20];
1393
1394 u8 sync_headers_errors_high[0x20];
1395
1396 u8 sync_headers_errors_low[0x20];
1397
1398 u8 edpl_bip_errors_lane0_high[0x20];
1399
1400 u8 edpl_bip_errors_lane0_low[0x20];
1401
1402 u8 edpl_bip_errors_lane1_high[0x20];
1403
1404 u8 edpl_bip_errors_lane1_low[0x20];
1405
1406 u8 edpl_bip_errors_lane2_high[0x20];
1407
1408 u8 edpl_bip_errors_lane2_low[0x20];
1409
1410 u8 edpl_bip_errors_lane3_high[0x20];
1411
1412 u8 edpl_bip_errors_lane3_low[0x20];
1413
1414 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1415
1416 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1417
1418 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1419
1420 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1421
1422 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1423
1424 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1425
1426 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1427
1428 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1429
1430 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1431
1432 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1433
1434 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1435
1436 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1437
1438 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1439
1440 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1441
1442 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1443
1444 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1445
1446 u8 rs_fec_corrected_blocks_high[0x20];
1447
1448 u8 rs_fec_corrected_blocks_low[0x20];
1449
1450 u8 rs_fec_uncorrectable_blocks_high[0x20];
1451
1452 u8 rs_fec_uncorrectable_blocks_low[0x20];
1453
1454 u8 rs_fec_no_errors_blocks_high[0x20];
1455
1456 u8 rs_fec_no_errors_blocks_low[0x20];
1457
1458 u8 rs_fec_single_error_blocks_high[0x20];
1459
1460 u8 rs_fec_single_error_blocks_low[0x20];
1461
1462 u8 rs_fec_corrected_symbols_total_high[0x20];
1463
1464 u8 rs_fec_corrected_symbols_total_low[0x20];
1465
1466 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1467
1468 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1469
1470 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1471
1472 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1473
1474 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1475
1476 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1477
1478 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1479
1480 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1481
1482 u8 link_down_events[0x20];
1483
1484 u8 successful_recovery_events[0x20];
1485
Matan Barakb4ff3a32016-02-09 14:57:42 +02001486 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001487};
1488
Gal Pressmand8dc0502016-09-27 17:04:51 +03001489struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1490 u8 time_since_last_clear_high[0x20];
1491
1492 u8 time_since_last_clear_low[0x20];
1493
1494 u8 phy_received_bits_high[0x20];
1495
1496 u8 phy_received_bits_low[0x20];
1497
1498 u8 phy_symbol_errors_high[0x20];
1499
1500 u8 phy_symbol_errors_low[0x20];
1501
1502 u8 phy_corrected_bits_high[0x20];
1503
1504 u8 phy_corrected_bits_low[0x20];
1505
1506 u8 phy_corrected_bits_lane0_high[0x20];
1507
1508 u8 phy_corrected_bits_lane0_low[0x20];
1509
1510 u8 phy_corrected_bits_lane1_high[0x20];
1511
1512 u8 phy_corrected_bits_lane1_low[0x20];
1513
1514 u8 phy_corrected_bits_lane2_high[0x20];
1515
1516 u8 phy_corrected_bits_lane2_low[0x20];
1517
1518 u8 phy_corrected_bits_lane3_high[0x20];
1519
1520 u8 phy_corrected_bits_lane3_low[0x20];
1521
1522 u8 reserved_at_200[0x5c0];
1523};
1524
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001525struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1526 u8 symbol_error_counter[0x10];
1527
1528 u8 link_error_recovery_counter[0x8];
1529
1530 u8 link_downed_counter[0x8];
1531
1532 u8 port_rcv_errors[0x10];
1533
1534 u8 port_rcv_remote_physical_errors[0x10];
1535
1536 u8 port_rcv_switch_relay_errors[0x10];
1537
1538 u8 port_xmit_discards[0x10];
1539
1540 u8 port_xmit_constraint_errors[0x8];
1541
1542 u8 port_rcv_constraint_errors[0x8];
1543
1544 u8 reserved_at_70[0x8];
1545
1546 u8 link_overrun_errors[0x8];
1547
1548 u8 reserved_at_80[0x10];
1549
1550 u8 vl_15_dropped[0x10];
1551
Tim Wright133bea02017-05-01 17:30:08 +01001552 u8 reserved_at_a0[0x80];
1553
1554 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001555};
1556
Saeed Mahameede2816822015-05-28 22:28:40 +03001557struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1558 u8 transmit_queue_high[0x20];
1559
1560 u8 transmit_queue_low[0x20];
1561
Matan Barakb4ff3a32016-02-09 14:57:42 +02001562 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001563};
1564
1565struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1566 u8 rx_octets_high[0x20];
1567
1568 u8 rx_octets_low[0x20];
1569
Matan Barakb4ff3a32016-02-09 14:57:42 +02001570 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001571
1572 u8 rx_frames_high[0x20];
1573
1574 u8 rx_frames_low[0x20];
1575
1576 u8 tx_octets_high[0x20];
1577
1578 u8 tx_octets_low[0x20];
1579
Matan Barakb4ff3a32016-02-09 14:57:42 +02001580 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001581
1582 u8 tx_frames_high[0x20];
1583
1584 u8 tx_frames_low[0x20];
1585
1586 u8 rx_pause_high[0x20];
1587
1588 u8 rx_pause_low[0x20];
1589
1590 u8 rx_pause_duration_high[0x20];
1591
1592 u8 rx_pause_duration_low[0x20];
1593
1594 u8 tx_pause_high[0x20];
1595
1596 u8 tx_pause_low[0x20];
1597
1598 u8 tx_pause_duration_high[0x20];
1599
1600 u8 tx_pause_duration_low[0x20];
1601
1602 u8 rx_pause_transition_high[0x20];
1603
1604 u8 rx_pause_transition_low[0x20];
1605
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03001606 u8 reserved_at_3c0[0x40];
1607
1608 u8 device_stall_minor_watermark_cnt_high[0x20];
1609
1610 u8 device_stall_minor_watermark_cnt_low[0x20];
1611
1612 u8 device_stall_critical_watermark_cnt_high[0x20];
1613
1614 u8 device_stall_critical_watermark_cnt_low[0x20];
1615
1616 u8 reserved_at_480[0x340];
Saeed Mahameede2816822015-05-28 22:28:40 +03001617};
1618
1619struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1620 u8 port_transmit_wait_high[0x20];
1621
1622 u8 port_transmit_wait_low[0x20];
1623
Gal Pressman2dba0792017-06-18 14:56:45 +03001624 u8 reserved_at_40[0x100];
1625
1626 u8 rx_buffer_almost_full_high[0x20];
1627
1628 u8 rx_buffer_almost_full_low[0x20];
1629
1630 u8 rx_buffer_full_high[0x20];
1631
1632 u8 rx_buffer_full_low[0x20];
1633
1634 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001635};
1636
1637struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1638 u8 dot3stats_alignment_errors_high[0x20];
1639
1640 u8 dot3stats_alignment_errors_low[0x20];
1641
1642 u8 dot3stats_fcs_errors_high[0x20];
1643
1644 u8 dot3stats_fcs_errors_low[0x20];
1645
1646 u8 dot3stats_single_collision_frames_high[0x20];
1647
1648 u8 dot3stats_single_collision_frames_low[0x20];
1649
1650 u8 dot3stats_multiple_collision_frames_high[0x20];
1651
1652 u8 dot3stats_multiple_collision_frames_low[0x20];
1653
1654 u8 dot3stats_sqe_test_errors_high[0x20];
1655
1656 u8 dot3stats_sqe_test_errors_low[0x20];
1657
1658 u8 dot3stats_deferred_transmissions_high[0x20];
1659
1660 u8 dot3stats_deferred_transmissions_low[0x20];
1661
1662 u8 dot3stats_late_collisions_high[0x20];
1663
1664 u8 dot3stats_late_collisions_low[0x20];
1665
1666 u8 dot3stats_excessive_collisions_high[0x20];
1667
1668 u8 dot3stats_excessive_collisions_low[0x20];
1669
1670 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1671
1672 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1673
1674 u8 dot3stats_carrier_sense_errors_high[0x20];
1675
1676 u8 dot3stats_carrier_sense_errors_low[0x20];
1677
1678 u8 dot3stats_frame_too_longs_high[0x20];
1679
1680 u8 dot3stats_frame_too_longs_low[0x20];
1681
1682 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1683
1684 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1685
1686 u8 dot3stats_symbol_errors_high[0x20];
1687
1688 u8 dot3stats_symbol_errors_low[0x20];
1689
1690 u8 dot3control_in_unknown_opcodes_high[0x20];
1691
1692 u8 dot3control_in_unknown_opcodes_low[0x20];
1693
1694 u8 dot3in_pause_frames_high[0x20];
1695
1696 u8 dot3in_pause_frames_low[0x20];
1697
1698 u8 dot3out_pause_frames_high[0x20];
1699
1700 u8 dot3out_pause_frames_low[0x20];
1701
Matan Barakb4ff3a32016-02-09 14:57:42 +02001702 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001703};
1704
1705struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1706 u8 ether_stats_drop_events_high[0x20];
1707
1708 u8 ether_stats_drop_events_low[0x20];
1709
1710 u8 ether_stats_octets_high[0x20];
1711
1712 u8 ether_stats_octets_low[0x20];
1713
1714 u8 ether_stats_pkts_high[0x20];
1715
1716 u8 ether_stats_pkts_low[0x20];
1717
1718 u8 ether_stats_broadcast_pkts_high[0x20];
1719
1720 u8 ether_stats_broadcast_pkts_low[0x20];
1721
1722 u8 ether_stats_multicast_pkts_high[0x20];
1723
1724 u8 ether_stats_multicast_pkts_low[0x20];
1725
1726 u8 ether_stats_crc_align_errors_high[0x20];
1727
1728 u8 ether_stats_crc_align_errors_low[0x20];
1729
1730 u8 ether_stats_undersize_pkts_high[0x20];
1731
1732 u8 ether_stats_undersize_pkts_low[0x20];
1733
1734 u8 ether_stats_oversize_pkts_high[0x20];
1735
1736 u8 ether_stats_oversize_pkts_low[0x20];
1737
1738 u8 ether_stats_fragments_high[0x20];
1739
1740 u8 ether_stats_fragments_low[0x20];
1741
1742 u8 ether_stats_jabbers_high[0x20];
1743
1744 u8 ether_stats_jabbers_low[0x20];
1745
1746 u8 ether_stats_collisions_high[0x20];
1747
1748 u8 ether_stats_collisions_low[0x20];
1749
1750 u8 ether_stats_pkts64octets_high[0x20];
1751
1752 u8 ether_stats_pkts64octets_low[0x20];
1753
1754 u8 ether_stats_pkts65to127octets_high[0x20];
1755
1756 u8 ether_stats_pkts65to127octets_low[0x20];
1757
1758 u8 ether_stats_pkts128to255octets_high[0x20];
1759
1760 u8 ether_stats_pkts128to255octets_low[0x20];
1761
1762 u8 ether_stats_pkts256to511octets_high[0x20];
1763
1764 u8 ether_stats_pkts256to511octets_low[0x20];
1765
1766 u8 ether_stats_pkts512to1023octets_high[0x20];
1767
1768 u8 ether_stats_pkts512to1023octets_low[0x20];
1769
1770 u8 ether_stats_pkts1024to1518octets_high[0x20];
1771
1772 u8 ether_stats_pkts1024to1518octets_low[0x20];
1773
1774 u8 ether_stats_pkts1519to2047octets_high[0x20];
1775
1776 u8 ether_stats_pkts1519to2047octets_low[0x20];
1777
1778 u8 ether_stats_pkts2048to4095octets_high[0x20];
1779
1780 u8 ether_stats_pkts2048to4095octets_low[0x20];
1781
1782 u8 ether_stats_pkts4096to8191octets_high[0x20];
1783
1784 u8 ether_stats_pkts4096to8191octets_low[0x20];
1785
1786 u8 ether_stats_pkts8192to10239octets_high[0x20];
1787
1788 u8 ether_stats_pkts8192to10239octets_low[0x20];
1789
Matan Barakb4ff3a32016-02-09 14:57:42 +02001790 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001791};
1792
1793struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1794 u8 if_in_octets_high[0x20];
1795
1796 u8 if_in_octets_low[0x20];
1797
1798 u8 if_in_ucast_pkts_high[0x20];
1799
1800 u8 if_in_ucast_pkts_low[0x20];
1801
1802 u8 if_in_discards_high[0x20];
1803
1804 u8 if_in_discards_low[0x20];
1805
1806 u8 if_in_errors_high[0x20];
1807
1808 u8 if_in_errors_low[0x20];
1809
1810 u8 if_in_unknown_protos_high[0x20];
1811
1812 u8 if_in_unknown_protos_low[0x20];
1813
1814 u8 if_out_octets_high[0x20];
1815
1816 u8 if_out_octets_low[0x20];
1817
1818 u8 if_out_ucast_pkts_high[0x20];
1819
1820 u8 if_out_ucast_pkts_low[0x20];
1821
1822 u8 if_out_discards_high[0x20];
1823
1824 u8 if_out_discards_low[0x20];
1825
1826 u8 if_out_errors_high[0x20];
1827
1828 u8 if_out_errors_low[0x20];
1829
1830 u8 if_in_multicast_pkts_high[0x20];
1831
1832 u8 if_in_multicast_pkts_low[0x20];
1833
1834 u8 if_in_broadcast_pkts_high[0x20];
1835
1836 u8 if_in_broadcast_pkts_low[0x20];
1837
1838 u8 if_out_multicast_pkts_high[0x20];
1839
1840 u8 if_out_multicast_pkts_low[0x20];
1841
1842 u8 if_out_broadcast_pkts_high[0x20];
1843
1844 u8 if_out_broadcast_pkts_low[0x20];
1845
Matan Barakb4ff3a32016-02-09 14:57:42 +02001846 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001847};
1848
1849struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1850 u8 a_frames_transmitted_ok_high[0x20];
1851
1852 u8 a_frames_transmitted_ok_low[0x20];
1853
1854 u8 a_frames_received_ok_high[0x20];
1855
1856 u8 a_frames_received_ok_low[0x20];
1857
1858 u8 a_frame_check_sequence_errors_high[0x20];
1859
1860 u8 a_frame_check_sequence_errors_low[0x20];
1861
1862 u8 a_alignment_errors_high[0x20];
1863
1864 u8 a_alignment_errors_low[0x20];
1865
1866 u8 a_octets_transmitted_ok_high[0x20];
1867
1868 u8 a_octets_transmitted_ok_low[0x20];
1869
1870 u8 a_octets_received_ok_high[0x20];
1871
1872 u8 a_octets_received_ok_low[0x20];
1873
1874 u8 a_multicast_frames_xmitted_ok_high[0x20];
1875
1876 u8 a_multicast_frames_xmitted_ok_low[0x20];
1877
1878 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1879
1880 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1881
1882 u8 a_multicast_frames_received_ok_high[0x20];
1883
1884 u8 a_multicast_frames_received_ok_low[0x20];
1885
1886 u8 a_broadcast_frames_received_ok_high[0x20];
1887
1888 u8 a_broadcast_frames_received_ok_low[0x20];
1889
1890 u8 a_in_range_length_errors_high[0x20];
1891
1892 u8 a_in_range_length_errors_low[0x20];
1893
1894 u8 a_out_of_range_length_field_high[0x20];
1895
1896 u8 a_out_of_range_length_field_low[0x20];
1897
1898 u8 a_frame_too_long_errors_high[0x20];
1899
1900 u8 a_frame_too_long_errors_low[0x20];
1901
1902 u8 a_symbol_error_during_carrier_high[0x20];
1903
1904 u8 a_symbol_error_during_carrier_low[0x20];
1905
1906 u8 a_mac_control_frames_transmitted_high[0x20];
1907
1908 u8 a_mac_control_frames_transmitted_low[0x20];
1909
1910 u8 a_mac_control_frames_received_high[0x20];
1911
1912 u8 a_mac_control_frames_received_low[0x20];
1913
1914 u8 a_unsupported_opcodes_received_high[0x20];
1915
1916 u8 a_unsupported_opcodes_received_low[0x20];
1917
1918 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1919
1920 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1921
1922 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1923
1924 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1925
Matan Barakb4ff3a32016-02-09 14:57:42 +02001926 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001927};
1928
Gal Pressman8ed1a632016-11-17 13:46:01 +02001929struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1930 u8 life_time_counter_high[0x20];
1931
1932 u8 life_time_counter_low[0x20];
1933
1934 u8 rx_errors[0x20];
1935
1936 u8 tx_errors[0x20];
1937
1938 u8 l0_to_recovery_eieos[0x20];
1939
1940 u8 l0_to_recovery_ts[0x20];
1941
1942 u8 l0_to_recovery_framing[0x20];
1943
1944 u8 l0_to_recovery_retrain[0x20];
1945
1946 u8 crc_error_dllp[0x20];
1947
1948 u8 crc_error_tlp[0x20];
1949
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001950 u8 tx_overflow_buffer_pkt_high[0x20];
1951
1952 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001953
1954 u8 outbound_stalled_reads[0x20];
1955
1956 u8 outbound_stalled_writes[0x20];
1957
1958 u8 outbound_stalled_reads_events[0x20];
1959
1960 u8 outbound_stalled_writes_events[0x20];
1961
1962 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001963};
1964
Saeed Mahameede2816822015-05-28 22:28:40 +03001965struct mlx5_ifc_cmd_inter_comp_event_bits {
1966 u8 command_completion_vector[0x20];
1967
Matan Barakb4ff3a32016-02-09 14:57:42 +02001968 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001969};
1970
1971struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001972 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001973 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001974 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001975 u8 vl[0x4];
1976
Matan Barakb4ff3a32016-02-09 14:57:42 +02001977 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001978};
1979
1980struct mlx5_ifc_db_bf_congestion_event_bits {
1981 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001982 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001983 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985
Matan Barakb4ff3a32016-02-09 14:57:42 +02001986 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001987};
1988
1989struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001990 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001991
1992 u8 gpio_event_hi[0x20];
1993
1994 u8 gpio_event_lo[0x20];
1995
Matan Barakb4ff3a32016-02-09 14:57:42 +02001996 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001997};
1998
1999struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002000 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002001
2002 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002003 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002004
Matan Barakb4ff3a32016-02-09 14:57:42 +02002005 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002006};
2007
2008struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002009 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002010};
2011
2012enum {
2013 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
2014 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
2015};
2016
2017struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002018 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002019 u8 cqn[0x18];
2020
Matan Barakb4ff3a32016-02-09 14:57:42 +02002021 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002022
Matan Barakb4ff3a32016-02-09 14:57:42 +02002023 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002024 u8 syndrome[0x8];
2025
Matan Barakb4ff3a32016-02-09 14:57:42 +02002026 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002027};
2028
2029struct mlx5_ifc_rdma_page_fault_event_bits {
2030 u8 bytes_committed[0x20];
2031
2032 u8 r_key[0x20];
2033
Matan Barakb4ff3a32016-02-09 14:57:42 +02002034 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002035 u8 packet_len[0x10];
2036
2037 u8 rdma_op_len[0x20];
2038
2039 u8 rdma_va[0x40];
2040
Matan Barakb4ff3a32016-02-09 14:57:42 +02002041 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002042 u8 rdma[0x1];
2043 u8 write[0x1];
2044 u8 requestor[0x1];
2045 u8 qp_number[0x18];
2046};
2047
2048struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2049 u8 bytes_committed[0x20];
2050
Matan Barakb4ff3a32016-02-09 14:57:42 +02002051 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002052 u8 wqe_index[0x10];
2053
Matan Barakb4ff3a32016-02-09 14:57:42 +02002054 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002055 u8 len[0x10];
2056
Matan Barakb4ff3a32016-02-09 14:57:42 +02002057 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002058
Matan Barakb4ff3a32016-02-09 14:57:42 +02002059 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002060 u8 rdma[0x1];
2061 u8 write_read[0x1];
2062 u8 requestor[0x1];
2063 u8 qpn[0x18];
2064};
2065
2066struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002067 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002068
2069 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002070 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002071
Matan Barakb4ff3a32016-02-09 14:57:42 +02002072 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002073 u8 qpn_rqn_sqn[0x18];
2074};
2075
2076struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002077 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002078
Matan Barakb4ff3a32016-02-09 14:57:42 +02002079 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002080 u8 dct_number[0x18];
2081};
2082
2083struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002084 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002085
Matan Barakb4ff3a32016-02-09 14:57:42 +02002086 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002087 u8 cq_number[0x18];
2088};
2089
2090enum {
2091 MLX5_QPC_STATE_RST = 0x0,
2092 MLX5_QPC_STATE_INIT = 0x1,
2093 MLX5_QPC_STATE_RTR = 0x2,
2094 MLX5_QPC_STATE_RTS = 0x3,
2095 MLX5_QPC_STATE_SQER = 0x4,
2096 MLX5_QPC_STATE_ERR = 0x6,
2097 MLX5_QPC_STATE_SQD = 0x7,
2098 MLX5_QPC_STATE_SUSPENDED = 0x9,
2099};
2100
2101enum {
2102 MLX5_QPC_ST_RC = 0x0,
2103 MLX5_QPC_ST_UC = 0x1,
2104 MLX5_QPC_ST_UD = 0x2,
2105 MLX5_QPC_ST_XRC = 0x3,
2106 MLX5_QPC_ST_DCI = 0x5,
2107 MLX5_QPC_ST_QP0 = 0x7,
2108 MLX5_QPC_ST_QP1 = 0x8,
2109 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2110 MLX5_QPC_ST_REG_UMR = 0xc,
2111};
2112
2113enum {
2114 MLX5_QPC_PM_STATE_ARMED = 0x0,
2115 MLX5_QPC_PM_STATE_REARM = 0x1,
2116 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2117 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2118};
2119
2120enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002121 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2122};
2123
2124enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002125 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2126 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2127};
2128
2129enum {
2130 MLX5_QPC_MTU_256_BYTES = 0x1,
2131 MLX5_QPC_MTU_512_BYTES = 0x2,
2132 MLX5_QPC_MTU_1K_BYTES = 0x3,
2133 MLX5_QPC_MTU_2K_BYTES = 0x4,
2134 MLX5_QPC_MTU_4K_BYTES = 0x5,
2135 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2136};
2137
2138enum {
2139 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2140 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2141 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2142 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2143 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2144 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2145 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2146 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2147};
2148
2149enum {
2150 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2151 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2152 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2153};
2154
2155enum {
2156 MLX5_QPC_CS_RES_DISABLE = 0x0,
2157 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2158 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2159};
2160
2161struct mlx5_ifc_qpc_bits {
2162 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002163 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002164 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002165 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002166 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002167 u8 reserved_at_15[0x3];
2168 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002169 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002170 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171
2172 u8 wq_signature[0x1];
2173 u8 block_lb_mc[0x1];
2174 u8 atomic_like_write_en[0x1];
2175 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002176 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002177 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002178 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002179 u8 pd[0x18];
2180
2181 u8 mtu[0x3];
2182 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002183 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002184 u8 log_rq_size[0x4];
2185 u8 log_rq_stride[0x3];
2186 u8 no_sq[0x1];
2187 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002188 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002189 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002190 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002191
2192 u8 counter_set_id[0x8];
2193 u8 uar_page[0x18];
2194
Matan Barakb4ff3a32016-02-09 14:57:42 +02002195 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002196 u8 user_index[0x18];
2197
Matan Barakb4ff3a32016-02-09 14:57:42 +02002198 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002199 u8 log_page_size[0x5];
2200 u8 remote_qpn[0x18];
2201
2202 struct mlx5_ifc_ads_bits primary_address_path;
2203
2204 struct mlx5_ifc_ads_bits secondary_address_path;
2205
2206 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002207 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002208 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002209 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002210 u8 retry_count[0x3];
2211 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002212 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002213 u8 fre[0x1];
2214 u8 cur_rnr_retry[0x3];
2215 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002216 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002217
Matan Barakb4ff3a32016-02-09 14:57:42 +02002218 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002219
Matan Barakb4ff3a32016-02-09 14:57:42 +02002220 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221 u8 next_send_psn[0x18];
2222
Matan Barakb4ff3a32016-02-09 14:57:42 +02002223 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002224 u8 cqn_snd[0x18];
2225
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002226 u8 reserved_at_400[0x8];
2227 u8 deth_sqpn[0x18];
2228
2229 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002230
Matan Barakb4ff3a32016-02-09 14:57:42 +02002231 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002232 u8 last_acked_psn[0x18];
2233
Matan Barakb4ff3a32016-02-09 14:57:42 +02002234 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002235 u8 ssn[0x18];
2236
Matan Barakb4ff3a32016-02-09 14:57:42 +02002237 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002238 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002239 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002240 u8 atomic_mode[0x4];
2241 u8 rre[0x1];
2242 u8 rwe[0x1];
2243 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002244 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002245 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002246 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002247 u8 cd_slave_receive[0x1];
2248 u8 cd_slave_send[0x1];
2249 u8 cd_master[0x1];
2250
Matan Barakb4ff3a32016-02-09 14:57:42 +02002251 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002252 u8 min_rnr_nak[0x5];
2253 u8 next_rcv_psn[0x18];
2254
Matan Barakb4ff3a32016-02-09 14:57:42 +02002255 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002256 u8 xrcd[0x18];
2257
Matan Barakb4ff3a32016-02-09 14:57:42 +02002258 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002259 u8 cqn_rcv[0x18];
2260
2261 u8 dbr_addr[0x40];
2262
2263 u8 q_key[0x20];
2264
Matan Barakb4ff3a32016-02-09 14:57:42 +02002265 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002266 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002267 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268
Matan Barakb4ff3a32016-02-09 14:57:42 +02002269 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002270 u8 rmsn[0x18];
2271
2272 u8 hw_sq_wqebb_counter[0x10];
2273 u8 sw_sq_wqebb_counter[0x10];
2274
2275 u8 hw_rq_counter[0x20];
2276
2277 u8 sw_rq_counter[0x20];
2278
Matan Barakb4ff3a32016-02-09 14:57:42 +02002279 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002280
Matan Barakb4ff3a32016-02-09 14:57:42 +02002281 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002282 u8 cgs[0x1];
2283 u8 cs_req[0x8];
2284 u8 cs_res[0x8];
2285
2286 u8 dc_access_key[0x40];
2287
Matan Barakb4ff3a32016-02-09 14:57:42 +02002288 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002289};
2290
2291struct mlx5_ifc_roce_addr_layout_bits {
2292 u8 source_l3_address[16][0x8];
2293
Matan Barakb4ff3a32016-02-09 14:57:42 +02002294 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002295 u8 vlan_valid[0x1];
2296 u8 vlan_id[0xc];
2297 u8 source_mac_47_32[0x10];
2298
2299 u8 source_mac_31_0[0x20];
2300
Matan Barakb4ff3a32016-02-09 14:57:42 +02002301 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002302 u8 roce_l3_type[0x4];
2303 u8 roce_version[0x8];
2304
Matan Barakb4ff3a32016-02-09 14:57:42 +02002305 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002306};
2307
2308union mlx5_ifc_hca_cap_union_bits {
2309 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2310 struct mlx5_ifc_odp_cap_bits odp_cap;
2311 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2312 struct mlx5_ifc_roce_cap_bits roce_cap;
2313 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2314 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002315 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002316 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002317 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002318 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002319 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002320 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002321};
2322
2323enum {
2324 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2325 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2326 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002327 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002328 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2329 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002330 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Or Gerlitz0c068972018-01-28 20:14:20 +02002331 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
2332 MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH = 0x100,
2333};
2334
2335struct mlx5_ifc_vlan_bits {
2336 u8 ethtype[0x10];
2337 u8 prio[0x3];
2338 u8 cfi[0x1];
2339 u8 vid[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002340};
2341
2342struct mlx5_ifc_flow_context_bits {
Or Gerlitz0c068972018-01-28 20:14:20 +02002343 struct mlx5_ifc_vlan_bits push_vlan;
Saeed Mahameede2816822015-05-28 22:28:40 +03002344
2345 u8 group_id[0x20];
2346
Matan Barakb4ff3a32016-02-09 14:57:42 +02002347 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002348 u8 flow_tag[0x18];
2349
Matan Barakb4ff3a32016-02-09 14:57:42 +02002350 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002351 u8 action[0x10];
2352
Matan Barakb4ff3a32016-02-09 14:57:42 +02002353 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002354 u8 destination_list_size[0x18];
2355
Amir Vadai9dc0b282016-05-13 12:55:39 +00002356 u8 reserved_at_a0[0x8];
2357 u8 flow_counter_list_size[0x18];
2358
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002359 u8 encap_id[0x20];
2360
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002361 u8 modify_header_id[0x20];
2362
2363 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002364
2365 struct mlx5_ifc_fte_match_param_bits match_value;
2366
Matan Barakb4ff3a32016-02-09 14:57:42 +02002367 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002368
Amir Vadai9dc0b282016-05-13 12:55:39 +00002369 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002370};
2371
2372enum {
2373 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2374 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2375};
2376
2377struct mlx5_ifc_xrc_srqc_bits {
2378 u8 state[0x4];
2379 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002380 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002381
2382 u8 wq_signature[0x1];
2383 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002384 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002385 u8 rlky[0x1];
2386 u8 basic_cyclic_rcv_wqe[0x1];
2387 u8 log_rq_stride[0x3];
2388 u8 xrcd[0x18];
2389
2390 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002391 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002392 u8 cqn[0x18];
2393
Matan Barakb4ff3a32016-02-09 14:57:42 +02002394 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002395
2396 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002397 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002398 u8 log_page_size[0x6];
2399 u8 user_index[0x18];
2400
Matan Barakb4ff3a32016-02-09 14:57:42 +02002401 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002402
Matan Barakb4ff3a32016-02-09 14:57:42 +02002403 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002404 u8 pd[0x18];
2405
2406 u8 lwm[0x10];
2407 u8 wqe_cnt[0x10];
2408
Matan Barakb4ff3a32016-02-09 14:57:42 +02002409 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002410
2411 u8 db_record_addr_h[0x20];
2412
2413 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002414 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002415
Matan Barakb4ff3a32016-02-09 14:57:42 +02002416 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002417};
2418
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02002419struct mlx5_ifc_vnic_diagnostic_statistics_bits {
2420 u8 counter_error_queues[0x20];
2421
2422 u8 total_error_queues[0x20];
2423
2424 u8 send_queue_priority_update_flow[0x20];
2425
2426 u8 reserved_at_60[0x20];
2427
2428 u8 nic_receive_steering_discard[0x40];
2429
2430 u8 receive_discard_vport_down[0x40];
2431
2432 u8 transmit_discard_vport_down[0x40];
2433
2434 u8 reserved_at_140[0xec0];
2435};
2436
Saeed Mahameede2816822015-05-28 22:28:40 +03002437struct mlx5_ifc_traffic_counter_bits {
2438 u8 packets[0x40];
2439
2440 u8 octets[0x40];
2441};
2442
2443struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002444 u8 strict_lag_tx_port_affinity[0x1];
2445 u8 reserved_at_1[0x3];
2446 u8 lag_tx_port_affinity[0x04];
2447
2448 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002449 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002450 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002451
Matan Barakb4ff3a32016-02-09 14:57:42 +02002452 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002453
Matan Barakb4ff3a32016-02-09 14:57:42 +02002454 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002455 u8 transport_domain[0x18];
2456
Erez Shitrit500a3d02017-04-13 06:36:51 +03002457 u8 reserved_at_140[0x8];
2458 u8 underlay_qpn[0x18];
2459 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002460};
2461
2462enum {
2463 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2464 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2465};
2466
2467enum {
2468 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2469 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2470};
2471
2472enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002473 MLX5_RX_HASH_FN_NONE = 0x0,
2474 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2475 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002476};
2477
2478enum {
2479 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2480 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2481};
2482
2483struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002484 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002485
2486 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002487 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002488
Matan Barakb4ff3a32016-02-09 14:57:42 +02002489 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002490
Matan Barakb4ff3a32016-02-09 14:57:42 +02002491 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002492 u8 lro_timeout_period_usecs[0x10];
2493 u8 lro_enable_mask[0x4];
2494 u8 lro_max_ip_payload_size[0x8];
2495
Matan Barakb4ff3a32016-02-09 14:57:42 +02002496 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497
Matan Barakb4ff3a32016-02-09 14:57:42 +02002498 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002499 u8 inline_rqn[0x18];
2500
2501 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002502 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002503 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002504 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002505 u8 indirect_table[0x18];
2506
2507 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002508 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002509 u8 self_lb_block[0x2];
2510 u8 transport_domain[0x18];
2511
2512 u8 rx_hash_toeplitz_key[10][0x20];
2513
2514 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2515
2516 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2517
Matan Barakb4ff3a32016-02-09 14:57:42 +02002518 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002519};
2520
2521enum {
2522 MLX5_SRQC_STATE_GOOD = 0x0,
2523 MLX5_SRQC_STATE_ERROR = 0x1,
2524};
2525
2526struct mlx5_ifc_srqc_bits {
2527 u8 state[0x4];
2528 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002529 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002530
2531 u8 wq_signature[0x1];
2532 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002533 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536 u8 log_rq_stride[0x3];
2537 u8 xrcd[0x18];
2538
2539 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002540 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002541 u8 cqn[0x18];
2542
Matan Barakb4ff3a32016-02-09 14:57:42 +02002543 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002544
Matan Barakb4ff3a32016-02-09 14:57:42 +02002545 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002546 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002547 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002548
Matan Barakb4ff3a32016-02-09 14:57:42 +02002549 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002550
Matan Barakb4ff3a32016-02-09 14:57:42 +02002551 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002552 u8 pd[0x18];
2553
2554 u8 lwm[0x10];
2555 u8 wqe_cnt[0x10];
2556
Matan Barakb4ff3a32016-02-09 14:57:42 +02002557 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002558
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002559 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002560
Matan Barakb4ff3a32016-02-09 14:57:42 +02002561 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002562};
2563
2564enum {
2565 MLX5_SQC_STATE_RST = 0x0,
2566 MLX5_SQC_STATE_RDY = 0x1,
2567 MLX5_SQC_STATE_ERR = 0x3,
2568};
2569
2570struct mlx5_ifc_sqc_bits {
2571 u8 rlky[0x1];
2572 u8 cd_master[0x1];
2573 u8 fre[0x1];
2574 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002575 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002576 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002577 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002578 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002579 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002580 u8 hairpin[0x1];
2581 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002582
Matan Barakb4ff3a32016-02-09 14:57:42 +02002583 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002584 u8 user_index[0x18];
2585
Matan Barakb4ff3a32016-02-09 14:57:42 +02002586 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002587 u8 cqn[0x18];
2588
Or Gerlitz40817cd2017-06-25 12:38:45 +03002589 u8 reserved_at_60[0x8];
2590 u8 hairpin_peer_rq[0x18];
2591
2592 u8 reserved_at_80[0x10];
2593 u8 hairpin_peer_vhca[0x10];
2594
2595 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002596
Saeed Mahameed74862162016-06-09 15:11:34 +03002597 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002598 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002599 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002600
Matan Barakb4ff3a32016-02-09 14:57:42 +02002601 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002602
Matan Barakb4ff3a32016-02-09 14:57:42 +02002603 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002604 u8 tis_num_0[0x18];
2605
2606 struct mlx5_ifc_wq_bits wq;
2607};
2608
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002609enum {
2610 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2611 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2612 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2613 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2614};
2615
2616struct mlx5_ifc_scheduling_context_bits {
2617 u8 element_type[0x8];
2618 u8 reserved_at_8[0x18];
2619
2620 u8 element_attributes[0x20];
2621
2622 u8 parent_element_id[0x20];
2623
2624 u8 reserved_at_60[0x40];
2625
2626 u8 bw_share[0x20];
2627
2628 u8 max_average_bw[0x20];
2629
2630 u8 reserved_at_e0[0x120];
2631};
2632
Saeed Mahameede2816822015-05-28 22:28:40 +03002633struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002634 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002635
Matan Barakb4ff3a32016-02-09 14:57:42 +02002636 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002637 u8 rqt_max_size[0x10];
2638
Matan Barakb4ff3a32016-02-09 14:57:42 +02002639 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002640 u8 rqt_actual_size[0x10];
2641
Matan Barakb4ff3a32016-02-09 14:57:42 +02002642 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002643
2644 struct mlx5_ifc_rq_num_bits rq_num[0];
2645};
2646
2647enum {
2648 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2649 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2650};
2651
2652enum {
2653 MLX5_RQC_STATE_RST = 0x0,
2654 MLX5_RQC_STATE_RDY = 0x1,
2655 MLX5_RQC_STATE_ERR = 0x3,
2656};
2657
2658struct mlx5_ifc_rqc_bits {
2659 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002660 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002661 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002662 u8 vsd[0x1];
2663 u8 mem_rq_type[0x4];
2664 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002665 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002666 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002667 u8 hairpin[0x1];
2668 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002669
Matan Barakb4ff3a32016-02-09 14:57:42 +02002670 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002671 u8 user_index[0x18];
2672
Matan Barakb4ff3a32016-02-09 14:57:42 +02002673 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002674 u8 cqn[0x18];
2675
2676 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002677 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002678
Matan Barakb4ff3a32016-02-09 14:57:42 +02002679 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002680 u8 rmpn[0x18];
2681
Or Gerlitz40817cd2017-06-25 12:38:45 +03002682 u8 reserved_at_a0[0x8];
2683 u8 hairpin_peer_sq[0x18];
2684
2685 u8 reserved_at_c0[0x10];
2686 u8 hairpin_peer_vhca[0x10];
2687
2688 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002689
2690 struct mlx5_ifc_wq_bits wq;
2691};
2692
2693enum {
2694 MLX5_RMPC_STATE_RDY = 0x1,
2695 MLX5_RMPC_STATE_ERR = 0x3,
2696};
2697
2698struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002699 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002700 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002701 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002702
2703 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002704 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002705
Matan Barakb4ff3a32016-02-09 14:57:42 +02002706 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002707
2708 struct mlx5_ifc_wq_bits wq;
2709};
2710
Saeed Mahameede2816822015-05-28 22:28:40 +03002711struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002712 u8 reserved_at_0[0x5];
2713 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002714 u8 reserved_at_8[0x15];
2715 u8 disable_mc_local_lb[0x1];
2716 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002717 u8 roce_en[0x1];
2718
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002719 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002720 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002721 u8 event_on_mtu[0x1];
2722 u8 event_on_promisc_change[0x1];
2723 u8 event_on_vlan_change[0x1];
2724 u8 event_on_mc_address_change[0x1];
2725 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002726
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002727 u8 reserved_at_40[0xc];
2728
2729 u8 affiliation_criteria[0x4];
2730 u8 affiliated_vhca_id[0x10];
2731
2732 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002733
2734 u8 mtu[0x10];
2735
Achiad Shochat9efa7522015-12-23 18:47:20 +02002736 u8 system_image_guid[0x40];
2737 u8 port_guid[0x40];
2738 u8 node_guid[0x40];
2739
Matan Barakb4ff3a32016-02-09 14:57:42 +02002740 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002741 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002742 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002743
2744 u8 promisc_uc[0x1];
2745 u8 promisc_mc[0x1];
2746 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002747 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002748 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002749 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002750 u8 allowed_list_size[0xc];
2751
2752 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2753
Matan Barakb4ff3a32016-02-09 14:57:42 +02002754 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002755
2756 u8 current_uc_mac_address[0][0x40];
2757};
2758
2759enum {
2760 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2761 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2762 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002763 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002764 MLX5_MKC_ACCESS_MODE_MEMIC = 0x5,
Saeed Mahameede2816822015-05-28 22:28:40 +03002765};
2766
2767struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002768 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002769 u8 free[0x1];
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002770 u8 reserved_at_2[0x1];
2771 u8 access_mode_4_2[0x3];
2772 u8 reserved_at_6[0x7];
2773 u8 relaxed_ordering_write[0x1];
2774 u8 reserved_at_e[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002775 u8 small_fence_on_rdma_read_response[0x1];
2776 u8 umr_en[0x1];
2777 u8 a[0x1];
2778 u8 rw[0x1];
2779 u8 rr[0x1];
2780 u8 lw[0x1];
2781 u8 lr[0x1];
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002782 u8 access_mode_1_0[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002783 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002784
2785 u8 qpn[0x18];
2786 u8 mkey_7_0[0x8];
2787
Matan Barakb4ff3a32016-02-09 14:57:42 +02002788 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002789
2790 u8 length64[0x1];
2791 u8 bsf_en[0x1];
2792 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002793 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002794 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002795 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002796 u8 en_rinval[0x1];
2797 u8 pd[0x18];
2798
2799 u8 start_addr[0x40];
2800
2801 u8 len[0x40];
2802
2803 u8 bsf_octword_size[0x20];
2804
Matan Barakb4ff3a32016-02-09 14:57:42 +02002805 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002806
2807 u8 translations_octword_size[0x20];
2808
Matan Barakb4ff3a32016-02-09 14:57:42 +02002809 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002810 u8 log_page_size[0x5];
2811
Matan Barakb4ff3a32016-02-09 14:57:42 +02002812 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002813};
2814
2815struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002816 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002817 u8 pkey[0x10];
2818};
2819
2820struct mlx5_ifc_array128_auto_bits {
2821 u8 array128_auto[16][0x8];
2822};
2823
2824struct mlx5_ifc_hca_vport_context_bits {
2825 u8 field_select[0x20];
2826
Matan Barakb4ff3a32016-02-09 14:57:42 +02002827 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002828
2829 u8 sm_virt_aware[0x1];
2830 u8 has_smi[0x1];
2831 u8 has_raw[0x1];
2832 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002833 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002834 u8 port_physical_state[0x4];
2835 u8 vport_state_policy[0x4];
2836 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002837 u8 vport_state[0x4];
2838
Matan Barakb4ff3a32016-02-09 14:57:42 +02002839 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002840
2841 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002842
2843 u8 port_guid[0x40];
2844
2845 u8 node_guid[0x40];
2846
2847 u8 cap_mask1[0x20];
2848
2849 u8 cap_mask1_field_select[0x20];
2850
2851 u8 cap_mask2[0x20];
2852
2853 u8 cap_mask2_field_select[0x20];
2854
Matan Barakb4ff3a32016-02-09 14:57:42 +02002855 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002856
2857 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002858 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002859 u8 init_type_reply[0x4];
2860 u8 lmc[0x3];
2861 u8 subnet_timeout[0x5];
2862
2863 u8 sm_lid[0x10];
2864 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002865 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002866
2867 u8 qkey_violation_counter[0x10];
2868 u8 pkey_violation_counter[0x10];
2869
Matan Barakb4ff3a32016-02-09 14:57:42 +02002870 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002871};
2872
Saeed Mahameedd6666752015-12-01 18:03:22 +02002873struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002874 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002875 u8 vport_svlan_strip[0x1];
2876 u8 vport_cvlan_strip[0x1];
2877 u8 vport_svlan_insert[0x1];
2878 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002879 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002880
Matan Barakb4ff3a32016-02-09 14:57:42 +02002881 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002882
2883 u8 svlan_cfi[0x1];
2884 u8 svlan_pcp[0x3];
2885 u8 svlan_id[0xc];
2886 u8 cvlan_cfi[0x1];
2887 u8 cvlan_pcp[0x3];
2888 u8 cvlan_id[0xc];
2889
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002891};
2892
Saeed Mahameede2816822015-05-28 22:28:40 +03002893enum {
2894 MLX5_EQC_STATUS_OK = 0x0,
2895 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2896};
2897
2898enum {
2899 MLX5_EQC_ST_ARMED = 0x9,
2900 MLX5_EQC_ST_FIRED = 0xa,
2901};
2902
2903struct mlx5_ifc_eqc_bits {
2904 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906 u8 ec[0x1];
2907 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002908 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002909 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002910 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002911
Matan Barakb4ff3a32016-02-09 14:57:42 +02002912 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002913
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002916 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002917
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919 u8 log_eq_size[0x5];
2920 u8 uar_page[0x18];
2921
Matan Barakb4ff3a32016-02-09 14:57:42 +02002922 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002923
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002925 u8 intr[0x8];
2926
Matan Barakb4ff3a32016-02-09 14:57:42 +02002927 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002928 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002929 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002930
Matan Barakb4ff3a32016-02-09 14:57:42 +02002931 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932
Matan Barakb4ff3a32016-02-09 14:57:42 +02002933 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002934 u8 consumer_counter[0x18];
2935
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937 u8 producer_counter[0x18];
2938
Matan Barakb4ff3a32016-02-09 14:57:42 +02002939 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002940};
2941
2942enum {
2943 MLX5_DCTC_STATE_ACTIVE = 0x0,
2944 MLX5_DCTC_STATE_DRAINING = 0x1,
2945 MLX5_DCTC_STATE_DRAINED = 0x2,
2946};
2947
2948enum {
2949 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2950 MLX5_DCTC_CS_RES_NA = 0x1,
2951 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2952};
2953
2954enum {
2955 MLX5_DCTC_MTU_256_BYTES = 0x1,
2956 MLX5_DCTC_MTU_512_BYTES = 0x2,
2957 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2958 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2959 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2960};
2961
2962struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002963 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002964 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002965 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002966
Matan Barakb4ff3a32016-02-09 14:57:42 +02002967 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002968 u8 user_index[0x18];
2969
Matan Barakb4ff3a32016-02-09 14:57:42 +02002970 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002971 u8 cqn[0x18];
2972
2973 u8 counter_set_id[0x8];
2974 u8 atomic_mode[0x4];
2975 u8 rre[0x1];
2976 u8 rwe[0x1];
2977 u8 rae[0x1];
2978 u8 atomic_like_write_en[0x1];
2979 u8 latency_sensitive[0x1];
2980 u8 rlky[0x1];
2981 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002982 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002983
Matan Barakb4ff3a32016-02-09 14:57:42 +02002984 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002985 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002986 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002987 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002988 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002989
Matan Barakb4ff3a32016-02-09 14:57:42 +02002990 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002991 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002992
Matan Barakb4ff3a32016-02-09 14:57:42 +02002993 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002994 u8 pd[0x18];
2995
2996 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002997 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002998 u8 flow_label[0x14];
2999
3000 u8 dc_access_key[0x40];
3001
Matan Barakb4ff3a32016-02-09 14:57:42 +02003002 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03003003 u8 mtu[0x3];
3004 u8 port[0x8];
3005 u8 pkey_index[0x10];
3006
Matan Barakb4ff3a32016-02-09 14:57:42 +02003007 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003008 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003009 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003010 u8 hop_limit[0x8];
3011
3012 u8 dc_access_key_violation_count[0x20];
3013
Matan Barakb4ff3a32016-02-09 14:57:42 +02003014 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003015 u8 dei_cfi[0x1];
3016 u8 eth_prio[0x3];
3017 u8 ecn[0x2];
3018 u8 dscp[0x6];
3019
Matan Barakb4ff3a32016-02-09 14:57:42 +02003020 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003021};
3022
3023enum {
3024 MLX5_CQC_STATUS_OK = 0x0,
3025 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
3026 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
3027};
3028
3029enum {
3030 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
3031 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
3032};
3033
3034enum {
3035 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
3036 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
3037 MLX5_CQC_ST_FIRED = 0xa,
3038};
3039
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003040enum {
3041 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
3042 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03003043 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003044};
3045
Saeed Mahameede2816822015-05-28 22:28:40 +03003046struct mlx5_ifc_cqc_bits {
3047 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003048 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003049 u8 cqe_sz[0x3];
3050 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003051 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003052 u8 scqe_break_moderation_en[0x1];
3053 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003054 u8 cq_period_mode[0x2];
3055 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003056 u8 mini_cqe_res_format[0x2];
3057 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003058 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003059
Matan Barakb4ff3a32016-02-09 14:57:42 +02003060 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003061
Matan Barakb4ff3a32016-02-09 14:57:42 +02003062 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003063 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003064 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003065
Matan Barakb4ff3a32016-02-09 14:57:42 +02003066 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003067 u8 log_cq_size[0x5];
3068 u8 uar_page[0x18];
3069
Matan Barakb4ff3a32016-02-09 14:57:42 +02003070 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003071 u8 cq_period[0xc];
3072 u8 cq_max_count[0x10];
3073
Matan Barakb4ff3a32016-02-09 14:57:42 +02003074 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003075 u8 c_eqn[0x8];
3076
Matan Barakb4ff3a32016-02-09 14:57:42 +02003077 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003078 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003079 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003080
Matan Barakb4ff3a32016-02-09 14:57:42 +02003081 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003082
Matan Barakb4ff3a32016-02-09 14:57:42 +02003083 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003084 u8 last_notified_index[0x18];
3085
Matan Barakb4ff3a32016-02-09 14:57:42 +02003086 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003087 u8 last_solicit_index[0x18];
3088
Matan Barakb4ff3a32016-02-09 14:57:42 +02003089 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003090 u8 consumer_counter[0x18];
3091
Matan Barakb4ff3a32016-02-09 14:57:42 +02003092 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003093 u8 producer_counter[0x18];
3094
Matan Barakb4ff3a32016-02-09 14:57:42 +02003095 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003096
3097 u8 dbr_addr[0x40];
3098};
3099
3100union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3101 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3102 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3103 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003104 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003105};
3106
3107struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003108 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003109
Matan Barakb4ff3a32016-02-09 14:57:42 +02003110 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003111 u8 ieee_vendor_id[0x18];
3112
Matan Barakb4ff3a32016-02-09 14:57:42 +02003113 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003114 u8 vsd_vendor_id[0x10];
3115
3116 u8 vsd[208][0x8];
3117
3118 u8 vsd_contd_psid[16][0x8];
3119};
3120
Saeed Mahameed74862162016-06-09 15:11:34 +03003121enum {
3122 MLX5_XRQC_STATE_GOOD = 0x0,
3123 MLX5_XRQC_STATE_ERROR = 0x1,
3124};
3125
3126enum {
3127 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3128 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3129};
3130
3131enum {
3132 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3133};
3134
3135struct mlx5_ifc_tag_matching_topology_context_bits {
3136 u8 log_matching_list_sz[0x4];
3137 u8 reserved_at_4[0xc];
3138 u8 append_next_index[0x10];
3139
3140 u8 sw_phase_cnt[0x10];
3141 u8 hw_phase_cnt[0x10];
3142
3143 u8 reserved_at_40[0x40];
3144};
3145
3146struct mlx5_ifc_xrqc_bits {
3147 u8 state[0x4];
3148 u8 rlkey[0x1];
3149 u8 reserved_at_5[0xf];
3150 u8 topology[0x4];
3151 u8 reserved_at_18[0x4];
3152 u8 offload[0x4];
3153
3154 u8 reserved_at_20[0x8];
3155 u8 user_index[0x18];
3156
3157 u8 reserved_at_40[0x8];
3158 u8 cqn[0x18];
3159
3160 u8 reserved_at_60[0xa0];
3161
3162 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3163
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003164 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003165
3166 struct mlx5_ifc_wq_bits wq;
3167};
3168
Saeed Mahameede2816822015-05-28 22:28:40 +03003169union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3170 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3171 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003172 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003173};
3174
3175union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3176 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3177 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3178 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003179 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003180};
3181
3182union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3183 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3184 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3185 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3186 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3187 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3188 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3189 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003190 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003191 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003192 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003193 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003194};
3195
Gal Pressman8ed1a632016-11-17 13:46:01 +02003196union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3197 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3198 u8 reserved_at_0[0x7c0];
3199};
3200
Saeed Mahameede2816822015-05-28 22:28:40 +03003201union mlx5_ifc_event_auto_bits {
3202 struct mlx5_ifc_comp_event_bits comp_event;
3203 struct mlx5_ifc_dct_events_bits dct_events;
3204 struct mlx5_ifc_qp_events_bits qp_events;
3205 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3206 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3207 struct mlx5_ifc_cq_error_bits cq_error;
3208 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3209 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3210 struct mlx5_ifc_gpio_event_bits gpio_event;
3211 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3212 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3213 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003214 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003215};
3216
3217struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003218 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003219
3220 u8 assert_existptr[0x20];
3221
3222 u8 assert_callra[0x20];
3223
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225
3226 u8 fw_version[0x20];
3227
3228 u8 hw_id[0x20];
3229
Matan Barakb4ff3a32016-02-09 14:57:42 +02003230 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003231
3232 u8 irisc_index[0x8];
3233 u8 synd[0x8];
3234 u8 ext_synd[0x10];
3235};
3236
3237struct mlx5_ifc_register_loopback_control_bits {
3238 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003239 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003240 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003241 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003242
Matan Barakb4ff3a32016-02-09 14:57:42 +02003243 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003244};
3245
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003246struct mlx5_ifc_vport_tc_element_bits {
3247 u8 traffic_class[0x4];
3248 u8 reserved_at_4[0xc];
3249 u8 vport_number[0x10];
3250};
3251
3252struct mlx5_ifc_vport_element_bits {
3253 u8 reserved_at_0[0x10];
3254 u8 vport_number[0x10];
3255};
3256
3257enum {
3258 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3259 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3260 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3261};
3262
3263struct mlx5_ifc_tsar_element_bits {
3264 u8 reserved_at_0[0x8];
3265 u8 tsar_type[0x8];
3266 u8 reserved_at_10[0x10];
3267};
3268
Majd Dibbiny8812c242017-02-09 14:20:12 +02003269enum {
3270 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3271 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3272};
3273
Saeed Mahameede2816822015-05-28 22:28:40 +03003274struct mlx5_ifc_teardown_hca_out_bits {
3275 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003276 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003277
3278 u8 syndrome[0x20];
3279
Majd Dibbiny8812c242017-02-09 14:20:12 +02003280 u8 reserved_at_40[0x3f];
3281
3282 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003283};
3284
3285enum {
3286 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003287 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003288};
3289
3290struct mlx5_ifc_teardown_hca_in_bits {
3291 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003292 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003293
Matan Barakb4ff3a32016-02-09 14:57:42 +02003294 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003295 u8 op_mod[0x10];
3296
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298 u8 profile[0x10];
3299
Matan Barakb4ff3a32016-02-09 14:57:42 +02003300 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003301};
3302
3303struct mlx5_ifc_sqerr2rts_qp_out_bits {
3304 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003305 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003306
3307 u8 syndrome[0x20];
3308
Matan Barakb4ff3a32016-02-09 14:57:42 +02003309 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003310};
3311
3312struct mlx5_ifc_sqerr2rts_qp_in_bits {
3313 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003314 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003315
Matan Barakb4ff3a32016-02-09 14:57:42 +02003316 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003317 u8 op_mod[0x10];
3318
Matan Barakb4ff3a32016-02-09 14:57:42 +02003319 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003320 u8 qpn[0x18];
3321
Matan Barakb4ff3a32016-02-09 14:57:42 +02003322 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003323
3324 u8 opt_param_mask[0x20];
3325
Matan Barakb4ff3a32016-02-09 14:57:42 +02003326 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003327
3328 struct mlx5_ifc_qpc_bits qpc;
3329
Matan Barakb4ff3a32016-02-09 14:57:42 +02003330 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003331};
3332
3333struct mlx5_ifc_sqd2rts_qp_out_bits {
3334 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003335 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003336
3337 u8 syndrome[0x20];
3338
Matan Barakb4ff3a32016-02-09 14:57:42 +02003339 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003340};
3341
3342struct mlx5_ifc_sqd2rts_qp_in_bits {
3343 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003344 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003345
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347 u8 op_mod[0x10];
3348
Matan Barakb4ff3a32016-02-09 14:57:42 +02003349 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003350 u8 qpn[0x18];
3351
Matan Barakb4ff3a32016-02-09 14:57:42 +02003352 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003353
3354 u8 opt_param_mask[0x20];
3355
Matan Barakb4ff3a32016-02-09 14:57:42 +02003356 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003357
3358 struct mlx5_ifc_qpc_bits qpc;
3359
Matan Barakb4ff3a32016-02-09 14:57:42 +02003360 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003361};
3362
3363struct mlx5_ifc_set_roce_address_out_bits {
3364 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003365 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003366
3367 u8 syndrome[0x20];
3368
Matan Barakb4ff3a32016-02-09 14:57:42 +02003369 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003370};
3371
3372struct mlx5_ifc_set_roce_address_in_bits {
3373 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003374 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003375
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377 u8 op_mod[0x10];
3378
3379 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003380 u8 reserved_at_50[0xc];
3381 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382
Matan Barakb4ff3a32016-02-09 14:57:42 +02003383 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003384
3385 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3386};
3387
3388struct mlx5_ifc_set_mad_demux_out_bits {
3389 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003390 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003391
3392 u8 syndrome[0x20];
3393
Matan Barakb4ff3a32016-02-09 14:57:42 +02003394 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003395};
3396
3397enum {
3398 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3399 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3400};
3401
3402struct mlx5_ifc_set_mad_demux_in_bits {
3403 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003404 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003405
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407 u8 op_mod[0x10];
3408
Matan Barakb4ff3a32016-02-09 14:57:42 +02003409 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003410
Matan Barakb4ff3a32016-02-09 14:57:42 +02003411 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003412 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414};
3415
3416struct mlx5_ifc_set_l2_table_entry_out_bits {
3417 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419
3420 u8 syndrome[0x20];
3421
Matan Barakb4ff3a32016-02-09 14:57:42 +02003422 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003423};
3424
3425struct mlx5_ifc_set_l2_table_entry_in_bits {
3426 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003427 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003428
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430 u8 op_mod[0x10];
3431
Matan Barakb4ff3a32016-02-09 14:57:42 +02003432 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003433
Matan Barakb4ff3a32016-02-09 14:57:42 +02003434 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003435 u8 table_index[0x18];
3436
Matan Barakb4ff3a32016-02-09 14:57:42 +02003437 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003438
Matan Barakb4ff3a32016-02-09 14:57:42 +02003439 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003440 u8 vlan_valid[0x1];
3441 u8 vlan[0xc];
3442
3443 struct mlx5_ifc_mac_address_layout_bits mac_address;
3444
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446};
3447
3448struct mlx5_ifc_set_issi_out_bits {
3449 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003450 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003451
3452 u8 syndrome[0x20];
3453
Matan Barakb4ff3a32016-02-09 14:57:42 +02003454 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003455};
3456
3457struct mlx5_ifc_set_issi_in_bits {
3458 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003459 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003460
Matan Barakb4ff3a32016-02-09 14:57:42 +02003461 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003462 u8 op_mod[0x10];
3463
Matan Barakb4ff3a32016-02-09 14:57:42 +02003464 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003465 u8 current_issi[0x10];
3466
Matan Barakb4ff3a32016-02-09 14:57:42 +02003467 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003468};
3469
3470struct mlx5_ifc_set_hca_cap_out_bits {
3471 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003472 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003473
3474 u8 syndrome[0x20];
3475
Matan Barakb4ff3a32016-02-09 14:57:42 +02003476 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003477};
3478
3479struct mlx5_ifc_set_hca_cap_in_bits {
3480 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003481 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003482
Matan Barakb4ff3a32016-02-09 14:57:42 +02003483 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003484 u8 op_mod[0x10];
3485
Matan Barakb4ff3a32016-02-09 14:57:42 +02003486 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003487
Saeed Mahameede2816822015-05-28 22:28:40 +03003488 union mlx5_ifc_hca_cap_union_bits capability;
3489};
3490
Maor Gottlieb26a81452015-12-10 17:12:39 +02003491enum {
3492 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3493 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3494 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3495 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3496};
3497
Saeed Mahameede2816822015-05-28 22:28:40 +03003498struct mlx5_ifc_set_fte_out_bits {
3499 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003500 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003501
3502 u8 syndrome[0x20];
3503
Matan Barakb4ff3a32016-02-09 14:57:42 +02003504 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003505};
3506
3507struct mlx5_ifc_set_fte_in_bits {
3508 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003509 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003510
Matan Barakb4ff3a32016-02-09 14:57:42 +02003511 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003512 u8 op_mod[0x10];
3513
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003514 u8 other_vport[0x1];
3515 u8 reserved_at_41[0xf];
3516 u8 vport_number[0x10];
3517
3518 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003519
3520 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003521 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003522
Matan Barakb4ff3a32016-02-09 14:57:42 +02003523 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003524 u8 table_id[0x18];
3525
Matan Barakb4ff3a32016-02-09 14:57:42 +02003526 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003527 u8 modify_enable_mask[0x8];
3528
Matan Barakb4ff3a32016-02-09 14:57:42 +02003529 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003530
3531 u8 flow_index[0x20];
3532
Matan Barakb4ff3a32016-02-09 14:57:42 +02003533 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003534
3535 struct mlx5_ifc_flow_context_bits flow_context;
3536};
3537
3538struct mlx5_ifc_rts2rts_qp_out_bits {
3539 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003540 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003541
3542 u8 syndrome[0x20];
3543
Matan Barakb4ff3a32016-02-09 14:57:42 +02003544 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003545};
3546
3547struct mlx5_ifc_rts2rts_qp_in_bits {
3548 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003549 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003550
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552 u8 op_mod[0x10];
3553
Matan Barakb4ff3a32016-02-09 14:57:42 +02003554 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003555 u8 qpn[0x18];
3556
Matan Barakb4ff3a32016-02-09 14:57:42 +02003557 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003558
3559 u8 opt_param_mask[0x20];
3560
Matan Barakb4ff3a32016-02-09 14:57:42 +02003561 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003562
3563 struct mlx5_ifc_qpc_bits qpc;
3564
Matan Barakb4ff3a32016-02-09 14:57:42 +02003565 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003566};
3567
3568struct mlx5_ifc_rtr2rts_qp_out_bits {
3569 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003570 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003571
3572 u8 syndrome[0x20];
3573
Matan Barakb4ff3a32016-02-09 14:57:42 +02003574 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003575};
3576
3577struct mlx5_ifc_rtr2rts_qp_in_bits {
3578 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003579 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003580
Matan Barakb4ff3a32016-02-09 14:57:42 +02003581 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003582 u8 op_mod[0x10];
3583
Matan Barakb4ff3a32016-02-09 14:57:42 +02003584 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003585 u8 qpn[0x18];
3586
Matan Barakb4ff3a32016-02-09 14:57:42 +02003587 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003588
3589 u8 opt_param_mask[0x20];
3590
Matan Barakb4ff3a32016-02-09 14:57:42 +02003591 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003592
3593 struct mlx5_ifc_qpc_bits qpc;
3594
Matan Barakb4ff3a32016-02-09 14:57:42 +02003595 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003596};
3597
3598struct mlx5_ifc_rst2init_qp_out_bits {
3599 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003600 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003601
3602 u8 syndrome[0x20];
3603
Matan Barakb4ff3a32016-02-09 14:57:42 +02003604 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003605};
3606
3607struct mlx5_ifc_rst2init_qp_in_bits {
3608 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003609 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003610
Matan Barakb4ff3a32016-02-09 14:57:42 +02003611 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003612 u8 op_mod[0x10];
3613
Matan Barakb4ff3a32016-02-09 14:57:42 +02003614 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003615 u8 qpn[0x18];
3616
Matan Barakb4ff3a32016-02-09 14:57:42 +02003617 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003618
3619 u8 opt_param_mask[0x20];
3620
Matan Barakb4ff3a32016-02-09 14:57:42 +02003621 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003622
3623 struct mlx5_ifc_qpc_bits qpc;
3624
Matan Barakb4ff3a32016-02-09 14:57:42 +02003625 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003626};
3627
Saeed Mahameed74862162016-06-09 15:11:34 +03003628struct mlx5_ifc_query_xrq_out_bits {
3629 u8 status[0x8];
3630 u8 reserved_at_8[0x18];
3631
3632 u8 syndrome[0x20];
3633
3634 u8 reserved_at_40[0x40];
3635
3636 struct mlx5_ifc_xrqc_bits xrq_context;
3637};
3638
3639struct mlx5_ifc_query_xrq_in_bits {
3640 u8 opcode[0x10];
3641 u8 reserved_at_10[0x10];
3642
3643 u8 reserved_at_20[0x10];
3644 u8 op_mod[0x10];
3645
3646 u8 reserved_at_40[0x8];
3647 u8 xrqn[0x18];
3648
3649 u8 reserved_at_60[0x20];
3650};
3651
Saeed Mahameede2816822015-05-28 22:28:40 +03003652struct mlx5_ifc_query_xrc_srq_out_bits {
3653 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003654 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003655
3656 u8 syndrome[0x20];
3657
Matan Barakb4ff3a32016-02-09 14:57:42 +02003658 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003659
3660 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3661
Matan Barakb4ff3a32016-02-09 14:57:42 +02003662 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003663
3664 u8 pas[0][0x40];
3665};
3666
3667struct mlx5_ifc_query_xrc_srq_in_bits {
3668 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003669 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003670
Matan Barakb4ff3a32016-02-09 14:57:42 +02003671 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003672 u8 op_mod[0x10];
3673
Matan Barakb4ff3a32016-02-09 14:57:42 +02003674 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003675 u8 xrc_srqn[0x18];
3676
Matan Barakb4ff3a32016-02-09 14:57:42 +02003677 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003678};
3679
3680enum {
3681 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3682 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3683};
3684
3685struct mlx5_ifc_query_vport_state_out_bits {
3686 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688
3689 u8 syndrome[0x20];
3690
Matan Barakb4ff3a32016-02-09 14:57:42 +02003691 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003692
Matan Barakb4ff3a32016-02-09 14:57:42 +02003693 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003694 u8 admin_state[0x4];
3695 u8 state[0x4];
3696};
3697
3698enum {
3699 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003700 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003701};
3702
3703struct mlx5_ifc_query_vport_state_in_bits {
3704 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003705 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003706
Matan Barakb4ff3a32016-02-09 14:57:42 +02003707 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003708 u8 op_mod[0x10];
3709
3710 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003711 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003712 u8 vport_number[0x10];
3713
Matan Barakb4ff3a32016-02-09 14:57:42 +02003714 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003715};
3716
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02003717struct mlx5_ifc_query_vnic_env_out_bits {
3718 u8 status[0x8];
3719 u8 reserved_at_8[0x18];
3720
3721 u8 syndrome[0x20];
3722
3723 u8 reserved_at_40[0x40];
3724
3725 struct mlx5_ifc_vnic_diagnostic_statistics_bits vport_env;
3726};
3727
3728enum {
3729 MLX5_QUERY_VNIC_ENV_IN_OP_MOD_VPORT_DIAG_STATISTICS = 0x0,
3730};
3731
3732struct mlx5_ifc_query_vnic_env_in_bits {
3733 u8 opcode[0x10];
3734 u8 reserved_at_10[0x10];
3735
3736 u8 reserved_at_20[0x10];
3737 u8 op_mod[0x10];
3738
3739 u8 other_vport[0x1];
3740 u8 reserved_at_41[0xf];
3741 u8 vport_number[0x10];
3742
3743 u8 reserved_at_60[0x20];
3744};
3745
Saeed Mahameede2816822015-05-28 22:28:40 +03003746struct mlx5_ifc_query_vport_counter_out_bits {
3747 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003748 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003749
3750 u8 syndrome[0x20];
3751
Matan Barakb4ff3a32016-02-09 14:57:42 +02003752 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003753
3754 struct mlx5_ifc_traffic_counter_bits received_errors;
3755
3756 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3757
3758 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3759
3760 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3761
3762 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3763
3764 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3765
3766 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3767
3768 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3769
3770 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3771
3772 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3773
3774 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3775
3776 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3777
Matan Barakb4ff3a32016-02-09 14:57:42 +02003778 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003779};
3780
3781enum {
3782 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3783};
3784
3785struct mlx5_ifc_query_vport_counter_in_bits {
3786 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003787 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003788
Matan Barakb4ff3a32016-02-09 14:57:42 +02003789 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003790 u8 op_mod[0x10];
3791
3792 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003793 u8 reserved_at_41[0xb];
3794 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003795 u8 vport_number[0x10];
3796
Matan Barakb4ff3a32016-02-09 14:57:42 +02003797 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003798
3799 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003800 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003801
Matan Barakb4ff3a32016-02-09 14:57:42 +02003802 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003803};
3804
3805struct mlx5_ifc_query_tis_out_bits {
3806 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003807 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003808
3809 u8 syndrome[0x20];
3810
Matan Barakb4ff3a32016-02-09 14:57:42 +02003811 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003812
3813 struct mlx5_ifc_tisc_bits tis_context;
3814};
3815
3816struct mlx5_ifc_query_tis_in_bits {
3817 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003818 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003819
Matan Barakb4ff3a32016-02-09 14:57:42 +02003820 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003821 u8 op_mod[0x10];
3822
Matan Barakb4ff3a32016-02-09 14:57:42 +02003823 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003824 u8 tisn[0x18];
3825
Matan Barakb4ff3a32016-02-09 14:57:42 +02003826 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003827};
3828
3829struct mlx5_ifc_query_tir_out_bits {
3830 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003831 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003832
3833 u8 syndrome[0x20];
3834
Matan Barakb4ff3a32016-02-09 14:57:42 +02003835 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003836
3837 struct mlx5_ifc_tirc_bits tir_context;
3838};
3839
3840struct mlx5_ifc_query_tir_in_bits {
3841 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003842 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003843
Matan Barakb4ff3a32016-02-09 14:57:42 +02003844 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003845 u8 op_mod[0x10];
3846
Matan Barakb4ff3a32016-02-09 14:57:42 +02003847 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003848 u8 tirn[0x18];
3849
Matan Barakb4ff3a32016-02-09 14:57:42 +02003850 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003851};
3852
3853struct mlx5_ifc_query_srq_out_bits {
3854 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003855 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003856
3857 u8 syndrome[0x20];
3858
Matan Barakb4ff3a32016-02-09 14:57:42 +02003859 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003860
3861 struct mlx5_ifc_srqc_bits srq_context_entry;
3862
Matan Barakb4ff3a32016-02-09 14:57:42 +02003863 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003864
3865 u8 pas[0][0x40];
3866};
3867
3868struct mlx5_ifc_query_srq_in_bits {
3869 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003870 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003871
Matan Barakb4ff3a32016-02-09 14:57:42 +02003872 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003873 u8 op_mod[0x10];
3874
Matan Barakb4ff3a32016-02-09 14:57:42 +02003875 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003876 u8 srqn[0x18];
3877
Matan Barakb4ff3a32016-02-09 14:57:42 +02003878 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003879};
3880
3881struct mlx5_ifc_query_sq_out_bits {
3882 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003883 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003884
3885 u8 syndrome[0x20];
3886
Matan Barakb4ff3a32016-02-09 14:57:42 +02003887 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003888
3889 struct mlx5_ifc_sqc_bits sq_context;
3890};
3891
3892struct mlx5_ifc_query_sq_in_bits {
3893 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003894 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003895
Matan Barakb4ff3a32016-02-09 14:57:42 +02003896 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003897 u8 op_mod[0x10];
3898
Matan Barakb4ff3a32016-02-09 14:57:42 +02003899 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900 u8 sqn[0x18];
3901
Matan Barakb4ff3a32016-02-09 14:57:42 +02003902 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003903};
3904
3905struct mlx5_ifc_query_special_contexts_out_bits {
3906 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003907 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003908
3909 u8 syndrome[0x20];
3910
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003911 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003912
3913 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003914
3915 u8 null_mkey[0x20];
3916
3917 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003918};
3919
3920struct mlx5_ifc_query_special_contexts_in_bits {
3921 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003922 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003923
Matan Barakb4ff3a32016-02-09 14:57:42 +02003924 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003925 u8 op_mod[0x10];
3926
Matan Barakb4ff3a32016-02-09 14:57:42 +02003927 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003928};
3929
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003930struct mlx5_ifc_query_scheduling_element_out_bits {
3931 u8 opcode[0x10];
3932 u8 reserved_at_10[0x10];
3933
3934 u8 reserved_at_20[0x10];
3935 u8 op_mod[0x10];
3936
3937 u8 reserved_at_40[0xc0];
3938
3939 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3940
3941 u8 reserved_at_300[0x100];
3942};
3943
3944enum {
3945 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3946};
3947
3948struct mlx5_ifc_query_scheduling_element_in_bits {
3949 u8 opcode[0x10];
3950 u8 reserved_at_10[0x10];
3951
3952 u8 reserved_at_20[0x10];
3953 u8 op_mod[0x10];
3954
3955 u8 scheduling_hierarchy[0x8];
3956 u8 reserved_at_48[0x18];
3957
3958 u8 scheduling_element_id[0x20];
3959
3960 u8 reserved_at_80[0x180];
3961};
3962
Saeed Mahameede2816822015-05-28 22:28:40 +03003963struct mlx5_ifc_query_rqt_out_bits {
3964 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003965 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003966
3967 u8 syndrome[0x20];
3968
Matan Barakb4ff3a32016-02-09 14:57:42 +02003969 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003970
3971 struct mlx5_ifc_rqtc_bits rqt_context;
3972};
3973
3974struct mlx5_ifc_query_rqt_in_bits {
3975 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003976 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003977
Matan Barakb4ff3a32016-02-09 14:57:42 +02003978 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003979 u8 op_mod[0x10];
3980
Matan Barakb4ff3a32016-02-09 14:57:42 +02003981 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003982 u8 rqtn[0x18];
3983
Matan Barakb4ff3a32016-02-09 14:57:42 +02003984 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003985};
3986
3987struct mlx5_ifc_query_rq_out_bits {
3988 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003989 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003990
3991 u8 syndrome[0x20];
3992
Matan Barakb4ff3a32016-02-09 14:57:42 +02003993 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003994
3995 struct mlx5_ifc_rqc_bits rq_context;
3996};
3997
3998struct mlx5_ifc_query_rq_in_bits {
3999 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004000 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004001
Matan Barakb4ff3a32016-02-09 14:57:42 +02004002 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004003 u8 op_mod[0x10];
4004
Matan Barakb4ff3a32016-02-09 14:57:42 +02004005 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004006 u8 rqn[0x18];
4007
Matan Barakb4ff3a32016-02-09 14:57:42 +02004008 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004009};
4010
4011struct mlx5_ifc_query_roce_address_out_bits {
4012 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004013 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004014
4015 u8 syndrome[0x20];
4016
Matan Barakb4ff3a32016-02-09 14:57:42 +02004017 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004018
4019 struct mlx5_ifc_roce_addr_layout_bits roce_address;
4020};
4021
4022struct mlx5_ifc_query_roce_address_in_bits {
4023 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004024 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004025
Matan Barakb4ff3a32016-02-09 14:57:42 +02004026 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004027 u8 op_mod[0x10];
4028
4029 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02004030 u8 reserved_at_50[0xc];
4031 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004032
Matan Barakb4ff3a32016-02-09 14:57:42 +02004033 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034};
4035
4036struct mlx5_ifc_query_rmp_out_bits {
4037 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004038 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004039
4040 u8 syndrome[0x20];
4041
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043
4044 struct mlx5_ifc_rmpc_bits rmp_context;
4045};
4046
4047struct mlx5_ifc_query_rmp_in_bits {
4048 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004049 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004050
Matan Barakb4ff3a32016-02-09 14:57:42 +02004051 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004052 u8 op_mod[0x10];
4053
Matan Barakb4ff3a32016-02-09 14:57:42 +02004054 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004055 u8 rmpn[0x18];
4056
Matan Barakb4ff3a32016-02-09 14:57:42 +02004057 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004058};
4059
4060struct mlx5_ifc_query_qp_out_bits {
4061 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004062 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004063
4064 u8 syndrome[0x20];
4065
Matan Barakb4ff3a32016-02-09 14:57:42 +02004066 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004067
4068 u8 opt_param_mask[0x20];
4069
Matan Barakb4ff3a32016-02-09 14:57:42 +02004070 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004071
4072 struct mlx5_ifc_qpc_bits qpc;
4073
Matan Barakb4ff3a32016-02-09 14:57:42 +02004074 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004075
4076 u8 pas[0][0x40];
4077};
4078
4079struct mlx5_ifc_query_qp_in_bits {
4080 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004081 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004082
Matan Barakb4ff3a32016-02-09 14:57:42 +02004083 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004084 u8 op_mod[0x10];
4085
Matan Barakb4ff3a32016-02-09 14:57:42 +02004086 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004087 u8 qpn[0x18];
4088
Matan Barakb4ff3a32016-02-09 14:57:42 +02004089 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004090};
4091
4092struct mlx5_ifc_query_q_counter_out_bits {
4093 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004094 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004095
4096 u8 syndrome[0x20];
4097
Matan Barakb4ff3a32016-02-09 14:57:42 +02004098 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004099
4100 u8 rx_write_requests[0x20];
4101
Matan Barakb4ff3a32016-02-09 14:57:42 +02004102 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004103
4104 u8 rx_read_requests[0x20];
4105
Matan Barakb4ff3a32016-02-09 14:57:42 +02004106 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004107
4108 u8 rx_atomic_requests[0x20];
4109
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111
4112 u8 rx_dct_connect[0x20];
4113
Matan Barakb4ff3a32016-02-09 14:57:42 +02004114 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004115
4116 u8 out_of_buffer[0x20];
4117
Matan Barakb4ff3a32016-02-09 14:57:42 +02004118 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004119
4120 u8 out_of_sequence[0x20];
4121
Saeed Mahameed74862162016-06-09 15:11:34 +03004122 u8 reserved_at_1e0[0x20];
4123
4124 u8 duplicate_request[0x20];
4125
4126 u8 reserved_at_220[0x20];
4127
4128 u8 rnr_nak_retry_err[0x20];
4129
4130 u8 reserved_at_260[0x20];
4131
4132 u8 packet_seq_err[0x20];
4133
4134 u8 reserved_at_2a0[0x20];
4135
4136 u8 implied_nak_seq_err[0x20];
4137
4138 u8 reserved_at_2e0[0x20];
4139
4140 u8 local_ack_timeout_err[0x20];
4141
Parav Pandit58dcb602017-06-19 07:19:37 +03004142 u8 reserved_at_320[0xa0];
4143
4144 u8 resp_local_length_error[0x20];
4145
4146 u8 req_local_length_error[0x20];
4147
4148 u8 resp_local_qp_error[0x20];
4149
4150 u8 local_operation_error[0x20];
4151
4152 u8 resp_local_protection[0x20];
4153
4154 u8 req_local_protection[0x20];
4155
4156 u8 resp_cqe_error[0x20];
4157
4158 u8 req_cqe_error[0x20];
4159
4160 u8 req_mw_binding[0x20];
4161
4162 u8 req_bad_response[0x20];
4163
4164 u8 req_remote_invalid_request[0x20];
4165
4166 u8 resp_remote_invalid_request[0x20];
4167
4168 u8 req_remote_access_errors[0x20];
4169
4170 u8 resp_remote_access_errors[0x20];
4171
4172 u8 req_remote_operation_errors[0x20];
4173
4174 u8 req_transport_retries_exceeded[0x20];
4175
4176 u8 cq_overflow[0x20];
4177
4178 u8 resp_cqe_flush_error[0x20];
4179
4180 u8 req_cqe_flush_error[0x20];
4181
4182 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004183};
4184
4185struct mlx5_ifc_query_q_counter_in_bits {
4186 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004187 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004188
Matan Barakb4ff3a32016-02-09 14:57:42 +02004189 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004190 u8 op_mod[0x10];
4191
Matan Barakb4ff3a32016-02-09 14:57:42 +02004192 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004193
4194 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004195 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004196
Matan Barakb4ff3a32016-02-09 14:57:42 +02004197 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004198 u8 counter_set_id[0x8];
4199};
4200
4201struct mlx5_ifc_query_pages_out_bits {
4202 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204
4205 u8 syndrome[0x20];
4206
Matan Barakb4ff3a32016-02-09 14:57:42 +02004207 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004208 u8 function_id[0x10];
4209
4210 u8 num_pages[0x20];
4211};
4212
4213enum {
4214 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4215 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4216 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4217};
4218
4219struct mlx5_ifc_query_pages_in_bits {
4220 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004221 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004222
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004224 u8 op_mod[0x10];
4225
Matan Barakb4ff3a32016-02-09 14:57:42 +02004226 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004227 u8 function_id[0x10];
4228
Matan Barakb4ff3a32016-02-09 14:57:42 +02004229 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004230};
4231
4232struct mlx5_ifc_query_nic_vport_context_out_bits {
4233 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004234 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004235
4236 u8 syndrome[0x20];
4237
Matan Barakb4ff3a32016-02-09 14:57:42 +02004238 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004239
4240 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4241};
4242
4243struct mlx5_ifc_query_nic_vport_context_in_bits {
4244 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004245 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004246
Matan Barakb4ff3a32016-02-09 14:57:42 +02004247 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004248 u8 op_mod[0x10];
4249
4250 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004251 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004252 u8 vport_number[0x10];
4253
Matan Barakb4ff3a32016-02-09 14:57:42 +02004254 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004255 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004256 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004257};
4258
4259struct mlx5_ifc_query_mkey_out_bits {
4260 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004261 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004262
4263 u8 syndrome[0x20];
4264
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004266
4267 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4268
Matan Barakb4ff3a32016-02-09 14:57:42 +02004269 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004270
4271 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4272
4273 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4274};
4275
4276struct mlx5_ifc_query_mkey_in_bits {
4277 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004278 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004279
Matan Barakb4ff3a32016-02-09 14:57:42 +02004280 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004281 u8 op_mod[0x10];
4282
Matan Barakb4ff3a32016-02-09 14:57:42 +02004283 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004284 u8 mkey_index[0x18];
4285
4286 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288};
4289
4290struct mlx5_ifc_query_mad_demux_out_bits {
4291 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004292 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004293
4294 u8 syndrome[0x20];
4295
Matan Barakb4ff3a32016-02-09 14:57:42 +02004296 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004297
4298 u8 mad_dumux_parameters_block[0x20];
4299};
4300
4301struct mlx5_ifc_query_mad_demux_in_bits {
4302 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004303 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004304
Matan Barakb4ff3a32016-02-09 14:57:42 +02004305 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004306 u8 op_mod[0x10];
4307
Matan Barakb4ff3a32016-02-09 14:57:42 +02004308 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004309};
4310
4311struct mlx5_ifc_query_l2_table_entry_out_bits {
4312 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004313 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004314
4315 u8 syndrome[0x20];
4316
Matan Barakb4ff3a32016-02-09 14:57:42 +02004317 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004318
Matan Barakb4ff3a32016-02-09 14:57:42 +02004319 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004320 u8 vlan_valid[0x1];
4321 u8 vlan[0xc];
4322
4323 struct mlx5_ifc_mac_address_layout_bits mac_address;
4324
Matan Barakb4ff3a32016-02-09 14:57:42 +02004325 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004326};
4327
4328struct mlx5_ifc_query_l2_table_entry_in_bits {
4329 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004330 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004331
Matan Barakb4ff3a32016-02-09 14:57:42 +02004332 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004333 u8 op_mod[0x10];
4334
Matan Barakb4ff3a32016-02-09 14:57:42 +02004335 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004336
Matan Barakb4ff3a32016-02-09 14:57:42 +02004337 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004338 u8 table_index[0x18];
4339
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004341};
4342
4343struct mlx5_ifc_query_issi_out_bits {
4344 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004345 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004346
4347 u8 syndrome[0x20];
4348
Matan Barakb4ff3a32016-02-09 14:57:42 +02004349 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004350 u8 current_issi[0x10];
4351
Matan Barakb4ff3a32016-02-09 14:57:42 +02004352 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004353
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004355 u8 supported_issi_dw0[0x20];
4356};
4357
4358struct mlx5_ifc_query_issi_in_bits {
4359 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004360 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004361
Matan Barakb4ff3a32016-02-09 14:57:42 +02004362 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004363 u8 op_mod[0x10];
4364
Matan Barakb4ff3a32016-02-09 14:57:42 +02004365 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004366};
4367
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004368struct mlx5_ifc_set_driver_version_out_bits {
4369 u8 status[0x8];
4370 u8 reserved_0[0x18];
4371
4372 u8 syndrome[0x20];
4373 u8 reserved_1[0x40];
4374};
4375
4376struct mlx5_ifc_set_driver_version_in_bits {
4377 u8 opcode[0x10];
4378 u8 reserved_0[0x10];
4379
4380 u8 reserved_1[0x10];
4381 u8 op_mod[0x10];
4382
4383 u8 reserved_2[0x40];
4384 u8 driver_version[64][0x8];
4385};
4386
Saeed Mahameede2816822015-05-28 22:28:40 +03004387struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4388 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004389 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004390
4391 u8 syndrome[0x20];
4392
Matan Barakb4ff3a32016-02-09 14:57:42 +02004393 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004394
4395 struct mlx5_ifc_pkey_bits pkey[0];
4396};
4397
4398struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4399 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004400 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004401
Matan Barakb4ff3a32016-02-09 14:57:42 +02004402 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004403 u8 op_mod[0x10];
4404
4405 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004406 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004407 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004408 u8 vport_number[0x10];
4409
Matan Barakb4ff3a32016-02-09 14:57:42 +02004410 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004411 u8 pkey_index[0x10];
4412};
4413
Eli Coheneff901d2016-03-11 22:58:42 +02004414enum {
4415 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4416 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4417 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4418};
4419
Saeed Mahameede2816822015-05-28 22:28:40 +03004420struct mlx5_ifc_query_hca_vport_gid_out_bits {
4421 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004423
4424 u8 syndrome[0x20];
4425
Matan Barakb4ff3a32016-02-09 14:57:42 +02004426 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004427
4428 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004429 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004430
4431 struct mlx5_ifc_array128_auto_bits gid[0];
4432};
4433
4434struct mlx5_ifc_query_hca_vport_gid_in_bits {
4435 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004436 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004437
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004439 u8 op_mod[0x10];
4440
4441 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004443 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004444 u8 vport_number[0x10];
4445
Matan Barakb4ff3a32016-02-09 14:57:42 +02004446 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004447 u8 gid_index[0x10];
4448};
4449
4450struct mlx5_ifc_query_hca_vport_context_out_bits {
4451 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004452 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004453
4454 u8 syndrome[0x20];
4455
Matan Barakb4ff3a32016-02-09 14:57:42 +02004456 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004457
4458 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4459};
4460
4461struct mlx5_ifc_query_hca_vport_context_in_bits {
4462 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004463 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004464
Matan Barakb4ff3a32016-02-09 14:57:42 +02004465 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004466 u8 op_mod[0x10];
4467
4468 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004469 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004470 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004471 u8 vport_number[0x10];
4472
Matan Barakb4ff3a32016-02-09 14:57:42 +02004473 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004474};
4475
4476struct mlx5_ifc_query_hca_cap_out_bits {
4477 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004478 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004479
4480 u8 syndrome[0x20];
4481
Matan Barakb4ff3a32016-02-09 14:57:42 +02004482 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004483
4484 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004485};
4486
4487struct mlx5_ifc_query_hca_cap_in_bits {
4488 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004489 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004490
Matan Barakb4ff3a32016-02-09 14:57:42 +02004491 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004492 u8 op_mod[0x10];
4493
Matan Barakb4ff3a32016-02-09 14:57:42 +02004494 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004495};
4496
Saeed Mahameede2816822015-05-28 22:28:40 +03004497struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004498 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004499 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004500
4501 u8 syndrome[0x20];
4502
Matan Barakb4ff3a32016-02-09 14:57:42 +02004503 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004504
Matan Barakb4ff3a32016-02-09 14:57:42 +02004505 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004506 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004507 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004508 u8 log_size[0x8];
4509
Matan Barakb4ff3a32016-02-09 14:57:42 +02004510 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004511};
4512
Saeed Mahameede2816822015-05-28 22:28:40 +03004513struct mlx5_ifc_query_flow_table_in_bits {
4514 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004515 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004516
Matan Barakb4ff3a32016-02-09 14:57:42 +02004517 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004518 u8 op_mod[0x10];
4519
Matan Barakb4ff3a32016-02-09 14:57:42 +02004520 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004521
4522 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004523 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004524
Matan Barakb4ff3a32016-02-09 14:57:42 +02004525 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004526 u8 table_id[0x18];
4527
Matan Barakb4ff3a32016-02-09 14:57:42 +02004528 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004529};
4530
4531struct mlx5_ifc_query_fte_out_bits {
4532 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004533 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004534
4535 u8 syndrome[0x20];
4536
Matan Barakb4ff3a32016-02-09 14:57:42 +02004537 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004538
4539 struct mlx5_ifc_flow_context_bits flow_context;
4540};
4541
4542struct mlx5_ifc_query_fte_in_bits {
4543 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004544 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004545
Matan Barakb4ff3a32016-02-09 14:57:42 +02004546 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004547 u8 op_mod[0x10];
4548
Matan Barakb4ff3a32016-02-09 14:57:42 +02004549 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004550
4551 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004552 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004553
Matan Barakb4ff3a32016-02-09 14:57:42 +02004554 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004555 u8 table_id[0x18];
4556
Matan Barakb4ff3a32016-02-09 14:57:42 +02004557 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004558
4559 u8 flow_index[0x20];
4560
Matan Barakb4ff3a32016-02-09 14:57:42 +02004561 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004562};
4563
4564enum {
4565 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4566 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4567 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4568};
4569
4570struct mlx5_ifc_query_flow_group_out_bits {
4571 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004572 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004573
4574 u8 syndrome[0x20];
4575
Matan Barakb4ff3a32016-02-09 14:57:42 +02004576 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004577
4578 u8 start_flow_index[0x20];
4579
Matan Barakb4ff3a32016-02-09 14:57:42 +02004580 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004581
4582 u8 end_flow_index[0x20];
4583
Matan Barakb4ff3a32016-02-09 14:57:42 +02004584 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004585
Matan Barakb4ff3a32016-02-09 14:57:42 +02004586 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004587 u8 match_criteria_enable[0x8];
4588
4589 struct mlx5_ifc_fte_match_param_bits match_criteria;
4590
Matan Barakb4ff3a32016-02-09 14:57:42 +02004591 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004592};
4593
4594struct mlx5_ifc_query_flow_group_in_bits {
4595 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004596 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004597
Matan Barakb4ff3a32016-02-09 14:57:42 +02004598 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004599 u8 op_mod[0x10];
4600
Matan Barakb4ff3a32016-02-09 14:57:42 +02004601 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004602
4603 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004604 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004605
Matan Barakb4ff3a32016-02-09 14:57:42 +02004606 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004607 u8 table_id[0x18];
4608
4609 u8 group_id[0x20];
4610
Matan Barakb4ff3a32016-02-09 14:57:42 +02004611 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004612};
4613
Amir Vadai9dc0b282016-05-13 12:55:39 +00004614struct mlx5_ifc_query_flow_counter_out_bits {
4615 u8 status[0x8];
4616 u8 reserved_at_8[0x18];
4617
4618 u8 syndrome[0x20];
4619
4620 u8 reserved_at_40[0x40];
4621
4622 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4623};
4624
4625struct mlx5_ifc_query_flow_counter_in_bits {
4626 u8 opcode[0x10];
4627 u8 reserved_at_10[0x10];
4628
4629 u8 reserved_at_20[0x10];
4630 u8 op_mod[0x10];
4631
4632 u8 reserved_at_40[0x80];
4633
4634 u8 clear[0x1];
4635 u8 reserved_at_c1[0xf];
4636 u8 num_of_counters[0x10];
4637
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004638 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004639};
4640
Saeed Mahameedd6666752015-12-01 18:03:22 +02004641struct mlx5_ifc_query_esw_vport_context_out_bits {
4642 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004643 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004644
4645 u8 syndrome[0x20];
4646
Matan Barakb4ff3a32016-02-09 14:57:42 +02004647 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004648
4649 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4650};
4651
4652struct mlx5_ifc_query_esw_vport_context_in_bits {
4653 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004654 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004655
Matan Barakb4ff3a32016-02-09 14:57:42 +02004656 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004657 u8 op_mod[0x10];
4658
4659 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004660 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004661 u8 vport_number[0x10];
4662
Matan Barakb4ff3a32016-02-09 14:57:42 +02004663 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004664};
4665
4666struct mlx5_ifc_modify_esw_vport_context_out_bits {
4667 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004668 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004669
4670 u8 syndrome[0x20];
4671
Matan Barakb4ff3a32016-02-09 14:57:42 +02004672 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004673};
4674
4675struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004676 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004677 u8 vport_cvlan_insert[0x1];
4678 u8 vport_svlan_insert[0x1];
4679 u8 vport_cvlan_strip[0x1];
4680 u8 vport_svlan_strip[0x1];
4681};
4682
4683struct mlx5_ifc_modify_esw_vport_context_in_bits {
4684 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004685 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004686
Matan Barakb4ff3a32016-02-09 14:57:42 +02004687 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004688 u8 op_mod[0x10];
4689
4690 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004691 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004692 u8 vport_number[0x10];
4693
4694 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4695
4696 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4697};
4698
Saeed Mahameede2816822015-05-28 22:28:40 +03004699struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004700 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004701 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004702
4703 u8 syndrome[0x20];
4704
Matan Barakb4ff3a32016-02-09 14:57:42 +02004705 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004706
4707 struct mlx5_ifc_eqc_bits eq_context_entry;
4708
Matan Barakb4ff3a32016-02-09 14:57:42 +02004709 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004710
4711 u8 event_bitmask[0x40];
4712
Matan Barakb4ff3a32016-02-09 14:57:42 +02004713 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004714
4715 u8 pas[0][0x40];
4716};
4717
4718struct mlx5_ifc_query_eq_in_bits {
4719 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004720 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004721
Matan Barakb4ff3a32016-02-09 14:57:42 +02004722 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004723 u8 op_mod[0x10];
4724
Matan Barakb4ff3a32016-02-09 14:57:42 +02004725 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004726 u8 eq_number[0x8];
4727
Matan Barakb4ff3a32016-02-09 14:57:42 +02004728 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004729};
4730
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004731struct mlx5_ifc_encap_header_in_bits {
4732 u8 reserved_at_0[0x5];
4733 u8 header_type[0x3];
4734 u8 reserved_at_8[0xe];
4735 u8 encap_header_size[0xa];
4736
4737 u8 reserved_at_20[0x10];
4738 u8 encap_header[2][0x8];
4739
4740 u8 more_encap_header[0][0x8];
4741};
4742
4743struct mlx5_ifc_query_encap_header_out_bits {
4744 u8 status[0x8];
4745 u8 reserved_at_8[0x18];
4746
4747 u8 syndrome[0x20];
4748
4749 u8 reserved_at_40[0xa0];
4750
4751 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4752};
4753
4754struct mlx5_ifc_query_encap_header_in_bits {
4755 u8 opcode[0x10];
4756 u8 reserved_at_10[0x10];
4757
4758 u8 reserved_at_20[0x10];
4759 u8 op_mod[0x10];
4760
4761 u8 encap_id[0x20];
4762
4763 u8 reserved_at_60[0xa0];
4764};
4765
4766struct mlx5_ifc_alloc_encap_header_out_bits {
4767 u8 status[0x8];
4768 u8 reserved_at_8[0x18];
4769
4770 u8 syndrome[0x20];
4771
4772 u8 encap_id[0x20];
4773
4774 u8 reserved_at_60[0x20];
4775};
4776
4777struct mlx5_ifc_alloc_encap_header_in_bits {
4778 u8 opcode[0x10];
4779 u8 reserved_at_10[0x10];
4780
4781 u8 reserved_at_20[0x10];
4782 u8 op_mod[0x10];
4783
4784 u8 reserved_at_40[0xa0];
4785
4786 struct mlx5_ifc_encap_header_in_bits encap_header;
4787};
4788
4789struct mlx5_ifc_dealloc_encap_header_out_bits {
4790 u8 status[0x8];
4791 u8 reserved_at_8[0x18];
4792
4793 u8 syndrome[0x20];
4794
4795 u8 reserved_at_40[0x40];
4796};
4797
4798struct mlx5_ifc_dealloc_encap_header_in_bits {
4799 u8 opcode[0x10];
4800 u8 reserved_at_10[0x10];
4801
4802 u8 reserved_20[0x10];
4803 u8 op_mod[0x10];
4804
4805 u8 encap_id[0x20];
4806
4807 u8 reserved_60[0x20];
4808};
4809
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004810struct mlx5_ifc_set_action_in_bits {
4811 u8 action_type[0x4];
4812 u8 field[0xc];
4813 u8 reserved_at_10[0x3];
4814 u8 offset[0x5];
4815 u8 reserved_at_18[0x3];
4816 u8 length[0x5];
4817
4818 u8 data[0x20];
4819};
4820
4821struct mlx5_ifc_add_action_in_bits {
4822 u8 action_type[0x4];
4823 u8 field[0xc];
4824 u8 reserved_at_10[0x10];
4825
4826 u8 data[0x20];
4827};
4828
4829union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4830 struct mlx5_ifc_set_action_in_bits set_action_in;
4831 struct mlx5_ifc_add_action_in_bits add_action_in;
4832 u8 reserved_at_0[0x40];
4833};
4834
4835enum {
4836 MLX5_ACTION_TYPE_SET = 0x1,
4837 MLX5_ACTION_TYPE_ADD = 0x2,
4838};
4839
4840enum {
4841 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4842 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4843 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4844 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4845 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4846 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4847 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4848 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4849 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4850 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4851 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4852 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4853 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4854 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4855 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4856 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4857 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4858 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4859 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4860 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4861 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4862 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004863 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004864};
4865
4866struct mlx5_ifc_alloc_modify_header_context_out_bits {
4867 u8 status[0x8];
4868 u8 reserved_at_8[0x18];
4869
4870 u8 syndrome[0x20];
4871
4872 u8 modify_header_id[0x20];
4873
4874 u8 reserved_at_60[0x20];
4875};
4876
4877struct mlx5_ifc_alloc_modify_header_context_in_bits {
4878 u8 opcode[0x10];
4879 u8 reserved_at_10[0x10];
4880
4881 u8 reserved_at_20[0x10];
4882 u8 op_mod[0x10];
4883
4884 u8 reserved_at_40[0x20];
4885
4886 u8 table_type[0x8];
4887 u8 reserved_at_68[0x10];
4888 u8 num_of_actions[0x8];
4889
4890 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4891};
4892
4893struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4894 u8 status[0x8];
4895 u8 reserved_at_8[0x18];
4896
4897 u8 syndrome[0x20];
4898
4899 u8 reserved_at_40[0x40];
4900};
4901
4902struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4903 u8 opcode[0x10];
4904 u8 reserved_at_10[0x10];
4905
4906 u8 reserved_at_20[0x10];
4907 u8 op_mod[0x10];
4908
4909 u8 modify_header_id[0x20];
4910
4911 u8 reserved_at_60[0x20];
4912};
4913
Saeed Mahameede2816822015-05-28 22:28:40 +03004914struct mlx5_ifc_query_dct_out_bits {
4915 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004916 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004917
4918 u8 syndrome[0x20];
4919
Matan Barakb4ff3a32016-02-09 14:57:42 +02004920 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004921
4922 struct mlx5_ifc_dctc_bits dct_context_entry;
4923
Matan Barakb4ff3a32016-02-09 14:57:42 +02004924 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004925};
4926
4927struct mlx5_ifc_query_dct_in_bits {
4928 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004929 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004930
Matan Barakb4ff3a32016-02-09 14:57:42 +02004931 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004932 u8 op_mod[0x10];
4933
Matan Barakb4ff3a32016-02-09 14:57:42 +02004934 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004935 u8 dctn[0x18];
4936
Matan Barakb4ff3a32016-02-09 14:57:42 +02004937 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004938};
4939
4940struct mlx5_ifc_query_cq_out_bits {
4941 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004942 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004943
4944 u8 syndrome[0x20];
4945
Matan Barakb4ff3a32016-02-09 14:57:42 +02004946 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004947
4948 struct mlx5_ifc_cqc_bits cq_context;
4949
Matan Barakb4ff3a32016-02-09 14:57:42 +02004950 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004951
4952 u8 pas[0][0x40];
4953};
4954
4955struct mlx5_ifc_query_cq_in_bits {
4956 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004957 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004958
Matan Barakb4ff3a32016-02-09 14:57:42 +02004959 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004960 u8 op_mod[0x10];
4961
Matan Barakb4ff3a32016-02-09 14:57:42 +02004962 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004963 u8 cqn[0x18];
4964
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966};
4967
4968struct mlx5_ifc_query_cong_status_out_bits {
4969 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004970 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004971
4972 u8 syndrome[0x20];
4973
Matan Barakb4ff3a32016-02-09 14:57:42 +02004974 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004975
4976 u8 enable[0x1];
4977 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004978 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004979};
4980
4981struct mlx5_ifc_query_cong_status_in_bits {
4982 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004983 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004984
Matan Barakb4ff3a32016-02-09 14:57:42 +02004985 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004986 u8 op_mod[0x10];
4987
Matan Barakb4ff3a32016-02-09 14:57:42 +02004988 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004989 u8 priority[0x4];
4990 u8 cong_protocol[0x4];
4991
Matan Barakb4ff3a32016-02-09 14:57:42 +02004992 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004993};
4994
4995struct mlx5_ifc_query_cong_statistics_out_bits {
4996 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004997 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004998
4999 u8 syndrome[0x20];
5000
Matan Barakb4ff3a32016-02-09 14:57:42 +02005001 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005002
Parav Pandite1f24a72017-04-16 07:29:29 +03005003 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005004
5005 u8 sum_flows[0x20];
5006
Parav Pandite1f24a72017-04-16 07:29:29 +03005007 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005008
Parav Pandite1f24a72017-04-16 07:29:29 +03005009 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005010
Parav Pandite1f24a72017-04-16 07:29:29 +03005011 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005012
Parav Pandite1f24a72017-04-16 07:29:29 +03005013 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005014
Matan Barakb4ff3a32016-02-09 14:57:42 +02005015 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03005016
5017 u8 time_stamp_high[0x20];
5018
5019 u8 time_stamp_low[0x20];
5020
5021 u8 accumulators_period[0x20];
5022
Parav Pandite1f24a72017-04-16 07:29:29 +03005023 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005024
Parav Pandite1f24a72017-04-16 07:29:29 +03005025 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005026
Parav Pandite1f24a72017-04-16 07:29:29 +03005027 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005028
Parav Pandite1f24a72017-04-16 07:29:29 +03005029 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005030
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032};
5033
5034struct mlx5_ifc_query_cong_statistics_in_bits {
5035 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005036 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005037
Matan Barakb4ff3a32016-02-09 14:57:42 +02005038 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005039 u8 op_mod[0x10];
5040
5041 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005042 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03005043
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045};
5046
5047struct mlx5_ifc_query_cong_params_out_bits {
5048 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005049 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005050
5051 u8 syndrome[0x20];
5052
Matan Barakb4ff3a32016-02-09 14:57:42 +02005053 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005054
5055 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5056};
5057
5058struct mlx5_ifc_query_cong_params_in_bits {
5059 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005060 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005061
Matan Barakb4ff3a32016-02-09 14:57:42 +02005062 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005063 u8 op_mod[0x10];
5064
Matan Barakb4ff3a32016-02-09 14:57:42 +02005065 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005066 u8 cong_protocol[0x4];
5067
Matan Barakb4ff3a32016-02-09 14:57:42 +02005068 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005069};
5070
5071struct mlx5_ifc_query_adapter_out_bits {
5072 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005073 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005074
5075 u8 syndrome[0x20];
5076
Matan Barakb4ff3a32016-02-09 14:57:42 +02005077 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005078
5079 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
5080};
5081
5082struct mlx5_ifc_query_adapter_in_bits {
5083 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005084 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005085
Matan Barakb4ff3a32016-02-09 14:57:42 +02005086 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005087 u8 op_mod[0x10];
5088
Matan Barakb4ff3a32016-02-09 14:57:42 +02005089 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005090};
5091
5092struct mlx5_ifc_qp_2rst_out_bits {
5093 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005094 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005095
5096 u8 syndrome[0x20];
5097
Matan Barakb4ff3a32016-02-09 14:57:42 +02005098 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005099};
5100
5101struct mlx5_ifc_qp_2rst_in_bits {
5102 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005103 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005104
Matan Barakb4ff3a32016-02-09 14:57:42 +02005105 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005106 u8 op_mod[0x10];
5107
Matan Barakb4ff3a32016-02-09 14:57:42 +02005108 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005109 u8 qpn[0x18];
5110
Matan Barakb4ff3a32016-02-09 14:57:42 +02005111 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005112};
5113
5114struct mlx5_ifc_qp_2err_out_bits {
5115 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005116 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005117
5118 u8 syndrome[0x20];
5119
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005121};
5122
5123struct mlx5_ifc_qp_2err_in_bits {
5124 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005125 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005126
Matan Barakb4ff3a32016-02-09 14:57:42 +02005127 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005128 u8 op_mod[0x10];
5129
Matan Barakb4ff3a32016-02-09 14:57:42 +02005130 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005131 u8 qpn[0x18];
5132
Matan Barakb4ff3a32016-02-09 14:57:42 +02005133 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005134};
5135
5136struct mlx5_ifc_page_fault_resume_out_bits {
5137 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005138 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005139
5140 u8 syndrome[0x20];
5141
Matan Barakb4ff3a32016-02-09 14:57:42 +02005142 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005143};
5144
5145struct mlx5_ifc_page_fault_resume_in_bits {
5146 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005147 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005148
Matan Barakb4ff3a32016-02-09 14:57:42 +02005149 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005150 u8 op_mod[0x10];
5151
5152 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005153 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005154 u8 page_fault_type[0x3];
5155 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005156
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005157 u8 reserved_at_60[0x8];
5158 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005159};
5160
5161struct mlx5_ifc_nop_out_bits {
5162 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005163 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005164
5165 u8 syndrome[0x20];
5166
Matan Barakb4ff3a32016-02-09 14:57:42 +02005167 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005168};
5169
5170struct mlx5_ifc_nop_in_bits {
5171 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005172 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005173
Matan Barakb4ff3a32016-02-09 14:57:42 +02005174 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005175 u8 op_mod[0x10];
5176
Matan Barakb4ff3a32016-02-09 14:57:42 +02005177 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005178};
5179
5180struct mlx5_ifc_modify_vport_state_out_bits {
5181 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005182 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005183
5184 u8 syndrome[0x20];
5185
Matan Barakb4ff3a32016-02-09 14:57:42 +02005186 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005187};
5188
5189struct mlx5_ifc_modify_vport_state_in_bits {
5190 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005191 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005192
Matan Barakb4ff3a32016-02-09 14:57:42 +02005193 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005194 u8 op_mod[0x10];
5195
5196 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005197 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005198 u8 vport_number[0x10];
5199
Matan Barakb4ff3a32016-02-09 14:57:42 +02005200 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005201 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005202 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005203};
5204
5205struct mlx5_ifc_modify_tis_out_bits {
5206 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005207 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005208
5209 u8 syndrome[0x20];
5210
Matan Barakb4ff3a32016-02-09 14:57:42 +02005211 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005212};
5213
majd@mellanox.com75850d02016-01-14 19:13:06 +02005214struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005215 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005216
Aviv Heller84df61e2016-05-10 13:47:50 +03005217 u8 reserved_at_20[0x1d];
5218 u8 lag_tx_port_affinity[0x1];
5219 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005220 u8 prio[0x1];
5221};
5222
Saeed Mahameede2816822015-05-28 22:28:40 +03005223struct mlx5_ifc_modify_tis_in_bits {
5224 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005225 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005226
Matan Barakb4ff3a32016-02-09 14:57:42 +02005227 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005228 u8 op_mod[0x10];
5229
Matan Barakb4ff3a32016-02-09 14:57:42 +02005230 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005231 u8 tisn[0x18];
5232
Matan Barakb4ff3a32016-02-09 14:57:42 +02005233 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005234
majd@mellanox.com75850d02016-01-14 19:13:06 +02005235 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005236
Matan Barakb4ff3a32016-02-09 14:57:42 +02005237 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005238
5239 struct mlx5_ifc_tisc_bits ctx;
5240};
5241
Achiad Shochatd9eea402015-08-04 14:05:42 +03005242struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005243 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005244
Matan Barakb4ff3a32016-02-09 14:57:42 +02005245 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005246 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005247 u8 reserved_at_3c[0x1];
5248 u8 hash[0x1];
5249 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005250 u8 lro[0x1];
5251};
5252
Saeed Mahameede2816822015-05-28 22:28:40 +03005253struct mlx5_ifc_modify_tir_out_bits {
5254 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005255 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005256
5257 u8 syndrome[0x20];
5258
Matan Barakb4ff3a32016-02-09 14:57:42 +02005259 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005260};
5261
5262struct mlx5_ifc_modify_tir_in_bits {
5263 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005264 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005265
Matan Barakb4ff3a32016-02-09 14:57:42 +02005266 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005267 u8 op_mod[0x10];
5268
Matan Barakb4ff3a32016-02-09 14:57:42 +02005269 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005270 u8 tirn[0x18];
5271
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273
Achiad Shochatd9eea402015-08-04 14:05:42 +03005274 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005275
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005277
5278 struct mlx5_ifc_tirc_bits ctx;
5279};
5280
5281struct mlx5_ifc_modify_sq_out_bits {
5282 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005283 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005284
5285 u8 syndrome[0x20];
5286
Matan Barakb4ff3a32016-02-09 14:57:42 +02005287 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005288};
5289
5290struct mlx5_ifc_modify_sq_in_bits {
5291 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005292 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005293
Matan Barakb4ff3a32016-02-09 14:57:42 +02005294 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005295 u8 op_mod[0x10];
5296
5297 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005298 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005299 u8 sqn[0x18];
5300
Matan Barakb4ff3a32016-02-09 14:57:42 +02005301 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005302
5303 u8 modify_bitmask[0x40];
5304
Matan Barakb4ff3a32016-02-09 14:57:42 +02005305 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005306
5307 struct mlx5_ifc_sqc_bits ctx;
5308};
5309
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005310struct mlx5_ifc_modify_scheduling_element_out_bits {
5311 u8 status[0x8];
5312 u8 reserved_at_8[0x18];
5313
5314 u8 syndrome[0x20];
5315
5316 u8 reserved_at_40[0x1c0];
5317};
5318
5319enum {
5320 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5321 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5322};
5323
5324struct mlx5_ifc_modify_scheduling_element_in_bits {
5325 u8 opcode[0x10];
5326 u8 reserved_at_10[0x10];
5327
5328 u8 reserved_at_20[0x10];
5329 u8 op_mod[0x10];
5330
5331 u8 scheduling_hierarchy[0x8];
5332 u8 reserved_at_48[0x18];
5333
5334 u8 scheduling_element_id[0x20];
5335
5336 u8 reserved_at_80[0x20];
5337
5338 u8 modify_bitmask[0x20];
5339
5340 u8 reserved_at_c0[0x40];
5341
5342 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5343
5344 u8 reserved_at_300[0x100];
5345};
5346
Saeed Mahameede2816822015-05-28 22:28:40 +03005347struct mlx5_ifc_modify_rqt_out_bits {
5348 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005349 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005350
5351 u8 syndrome[0x20];
5352
Matan Barakb4ff3a32016-02-09 14:57:42 +02005353 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005354};
5355
Achiad Shochat5c503682015-08-04 14:05:43 +03005356struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005358
Matan Barakb4ff3a32016-02-09 14:57:42 +02005359 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005360 u8 rqn_list[0x1];
5361};
5362
Saeed Mahameede2816822015-05-28 22:28:40 +03005363struct mlx5_ifc_modify_rqt_in_bits {
5364 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005365 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005366
Matan Barakb4ff3a32016-02-09 14:57:42 +02005367 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005368 u8 op_mod[0x10];
5369
Matan Barakb4ff3a32016-02-09 14:57:42 +02005370 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005371 u8 rqtn[0x18];
5372
Matan Barakb4ff3a32016-02-09 14:57:42 +02005373 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005374
Achiad Shochat5c503682015-08-04 14:05:43 +03005375 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005376
Matan Barakb4ff3a32016-02-09 14:57:42 +02005377 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005378
5379 struct mlx5_ifc_rqtc_bits ctx;
5380};
5381
5382struct mlx5_ifc_modify_rq_out_bits {
5383 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005384 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005385
5386 u8 syndrome[0x20];
5387
Matan Barakb4ff3a32016-02-09 14:57:42 +02005388 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005389};
5390
Alex Vesker83b502a2016-08-04 17:32:02 +03005391enum {
5392 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005393 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005394 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005395};
5396
Saeed Mahameede2816822015-05-28 22:28:40 +03005397struct mlx5_ifc_modify_rq_in_bits {
5398 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005399 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005400
Matan Barakb4ff3a32016-02-09 14:57:42 +02005401 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005402 u8 op_mod[0x10];
5403
5404 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005405 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005406 u8 rqn[0x18];
5407
Matan Barakb4ff3a32016-02-09 14:57:42 +02005408 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005409
5410 u8 modify_bitmask[0x40];
5411
Matan Barakb4ff3a32016-02-09 14:57:42 +02005412 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005413
5414 struct mlx5_ifc_rqc_bits ctx;
5415};
5416
5417struct mlx5_ifc_modify_rmp_out_bits {
5418 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005419 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005420
5421 u8 syndrome[0x20];
5422
Matan Barakb4ff3a32016-02-09 14:57:42 +02005423 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005424};
5425
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005426struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005427 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005428
Matan Barakb4ff3a32016-02-09 14:57:42 +02005429 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005430 u8 lwm[0x1];
5431};
5432
Saeed Mahameede2816822015-05-28 22:28:40 +03005433struct mlx5_ifc_modify_rmp_in_bits {
5434 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005435 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005436
Matan Barakb4ff3a32016-02-09 14:57:42 +02005437 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005438 u8 op_mod[0x10];
5439
5440 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005441 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005442 u8 rmpn[0x18];
5443
Matan Barakb4ff3a32016-02-09 14:57:42 +02005444 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005445
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005446 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005447
Matan Barakb4ff3a32016-02-09 14:57:42 +02005448 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005449
5450 struct mlx5_ifc_rmpc_bits ctx;
5451};
5452
5453struct mlx5_ifc_modify_nic_vport_context_out_bits {
5454 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005455 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005456
5457 u8 syndrome[0x20];
5458
Matan Barakb4ff3a32016-02-09 14:57:42 +02005459 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005460};
5461
5462struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005463 u8 reserved_at_0[0x12];
5464 u8 affiliation[0x1];
5465 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005466 u8 disable_uc_local_lb[0x1];
5467 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005468 u8 node_guid[0x1];
5469 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005470 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005471 u8 mtu[0x1];
5472 u8 change_event[0x1];
5473 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005474 u8 permanent_address[0x1];
5475 u8 addresses_list[0x1];
5476 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478};
5479
5480struct mlx5_ifc_modify_nic_vport_context_in_bits {
5481 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005482 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005483
Matan Barakb4ff3a32016-02-09 14:57:42 +02005484 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005485 u8 op_mod[0x10];
5486
5487 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005488 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005489 u8 vport_number[0x10];
5490
5491 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5492
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494
5495 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5496};
5497
5498struct mlx5_ifc_modify_hca_vport_context_out_bits {
5499 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005500 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005501
5502 u8 syndrome[0x20];
5503
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505};
5506
5507struct mlx5_ifc_modify_hca_vport_context_in_bits {
5508 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005509 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005510
Matan Barakb4ff3a32016-02-09 14:57:42 +02005511 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512 u8 op_mod[0x10];
5513
5514 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005515 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005516 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005517 u8 vport_number[0x10];
5518
Matan Barakb4ff3a32016-02-09 14:57:42 +02005519 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005520
5521 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5522};
5523
5524struct mlx5_ifc_modify_cq_out_bits {
5525 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005526 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005527
5528 u8 syndrome[0x20];
5529
Matan Barakb4ff3a32016-02-09 14:57:42 +02005530 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005531};
5532
5533enum {
5534 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5535 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5536};
5537
5538struct mlx5_ifc_modify_cq_in_bits {
5539 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005540 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005541
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543 u8 op_mod[0x10];
5544
Matan Barakb4ff3a32016-02-09 14:57:42 +02005545 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005546 u8 cqn[0x18];
5547
5548 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5549
5550 struct mlx5_ifc_cqc_bits cq_context;
5551
Matan Barakb4ff3a32016-02-09 14:57:42 +02005552 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005553
5554 u8 pas[0][0x40];
5555};
5556
5557struct mlx5_ifc_modify_cong_status_out_bits {
5558 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005559 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005560
5561 u8 syndrome[0x20];
5562
Matan Barakb4ff3a32016-02-09 14:57:42 +02005563 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005564};
5565
5566struct mlx5_ifc_modify_cong_status_in_bits {
5567 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005568 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005569
Matan Barakb4ff3a32016-02-09 14:57:42 +02005570 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005571 u8 op_mod[0x10];
5572
Matan Barakb4ff3a32016-02-09 14:57:42 +02005573 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005574 u8 priority[0x4];
5575 u8 cong_protocol[0x4];
5576
5577 u8 enable[0x1];
5578 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580};
5581
5582struct mlx5_ifc_modify_cong_params_out_bits {
5583 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005584 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005585
5586 u8 syndrome[0x20];
5587
Matan Barakb4ff3a32016-02-09 14:57:42 +02005588 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005589};
5590
5591struct mlx5_ifc_modify_cong_params_in_bits {
5592 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005593 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005594
Matan Barakb4ff3a32016-02-09 14:57:42 +02005595 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596 u8 op_mod[0x10];
5597
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599 u8 cong_protocol[0x4];
5600
5601 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5602
Matan Barakb4ff3a32016-02-09 14:57:42 +02005603 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005604
5605 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5606};
5607
5608struct mlx5_ifc_manage_pages_out_bits {
5609 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005610 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005611
5612 u8 syndrome[0x20];
5613
5614 u8 output_num_entries[0x20];
5615
Matan Barakb4ff3a32016-02-09 14:57:42 +02005616 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005617
5618 u8 pas[0][0x40];
5619};
5620
5621enum {
5622 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5623 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5624 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5625};
5626
5627struct mlx5_ifc_manage_pages_in_bits {
5628 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005629 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005630
Matan Barakb4ff3a32016-02-09 14:57:42 +02005631 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005632 u8 op_mod[0x10];
5633
Matan Barakb4ff3a32016-02-09 14:57:42 +02005634 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005635 u8 function_id[0x10];
5636
5637 u8 input_num_entries[0x20];
5638
5639 u8 pas[0][0x40];
5640};
5641
5642struct mlx5_ifc_mad_ifc_out_bits {
5643 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005644 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005645
5646 u8 syndrome[0x20];
5647
Matan Barakb4ff3a32016-02-09 14:57:42 +02005648 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005649
5650 u8 response_mad_packet[256][0x8];
5651};
5652
5653struct mlx5_ifc_mad_ifc_in_bits {
5654 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005655 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005656
Matan Barakb4ff3a32016-02-09 14:57:42 +02005657 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005658 u8 op_mod[0x10];
5659
5660 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005661 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005662 u8 port[0x8];
5663
Matan Barakb4ff3a32016-02-09 14:57:42 +02005664 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005665
5666 u8 mad[256][0x8];
5667};
5668
5669struct mlx5_ifc_init_hca_out_bits {
5670 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005671 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005672
5673 u8 syndrome[0x20];
5674
Matan Barakb4ff3a32016-02-09 14:57:42 +02005675 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005676};
5677
5678struct mlx5_ifc_init_hca_in_bits {
5679 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005680 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005681
Matan Barakb4ff3a32016-02-09 14:57:42 +02005682 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005683 u8 op_mod[0x10];
5684
Matan Barakb4ff3a32016-02-09 14:57:42 +02005685 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005686 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005687};
5688
5689struct mlx5_ifc_init2rtr_qp_out_bits {
5690 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005691 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005692
5693 u8 syndrome[0x20];
5694
Matan Barakb4ff3a32016-02-09 14:57:42 +02005695 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005696};
5697
5698struct mlx5_ifc_init2rtr_qp_in_bits {
5699 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005700 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005701
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703 u8 op_mod[0x10];
5704
Matan Barakb4ff3a32016-02-09 14:57:42 +02005705 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005706 u8 qpn[0x18];
5707
Matan Barakb4ff3a32016-02-09 14:57:42 +02005708 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005709
5710 u8 opt_param_mask[0x20];
5711
Matan Barakb4ff3a32016-02-09 14:57:42 +02005712 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005713
5714 struct mlx5_ifc_qpc_bits qpc;
5715
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717};
5718
5719struct mlx5_ifc_init2init_qp_out_bits {
5720 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005721 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005722
5723 u8 syndrome[0x20];
5724
Matan Barakb4ff3a32016-02-09 14:57:42 +02005725 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005726};
5727
5728struct mlx5_ifc_init2init_qp_in_bits {
5729 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005730 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005731
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733 u8 op_mod[0x10];
5734
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736 u8 qpn[0x18];
5737
Matan Barakb4ff3a32016-02-09 14:57:42 +02005738 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005739
5740 u8 opt_param_mask[0x20];
5741
Matan Barakb4ff3a32016-02-09 14:57:42 +02005742 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005743
5744 struct mlx5_ifc_qpc_bits qpc;
5745
Matan Barakb4ff3a32016-02-09 14:57:42 +02005746 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005747};
5748
5749struct mlx5_ifc_get_dropped_packet_log_out_bits {
5750 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752
5753 u8 syndrome[0x20];
5754
Matan Barakb4ff3a32016-02-09 14:57:42 +02005755 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005756
5757 u8 packet_headers_log[128][0x8];
5758
5759 u8 packet_syndrome[64][0x8];
5760};
5761
5762struct mlx5_ifc_get_dropped_packet_log_in_bits {
5763 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005764 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005765
Matan Barakb4ff3a32016-02-09 14:57:42 +02005766 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005767 u8 op_mod[0x10];
5768
Matan Barakb4ff3a32016-02-09 14:57:42 +02005769 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005770};
5771
5772struct mlx5_ifc_gen_eqe_in_bits {
5773 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005774 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005775
Matan Barakb4ff3a32016-02-09 14:57:42 +02005776 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005777 u8 op_mod[0x10];
5778
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780 u8 eq_number[0x8];
5781
Matan Barakb4ff3a32016-02-09 14:57:42 +02005782 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005783
5784 u8 eqe[64][0x8];
5785};
5786
5787struct mlx5_ifc_gen_eq_out_bits {
5788 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005789 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005790
5791 u8 syndrome[0x20];
5792
Matan Barakb4ff3a32016-02-09 14:57:42 +02005793 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005794};
5795
5796struct mlx5_ifc_enable_hca_out_bits {
5797 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005798 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005799
5800 u8 syndrome[0x20];
5801
Matan Barakb4ff3a32016-02-09 14:57:42 +02005802 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005803};
5804
5805struct mlx5_ifc_enable_hca_in_bits {
5806 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005807 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005808
Matan Barakb4ff3a32016-02-09 14:57:42 +02005809 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005810 u8 op_mod[0x10];
5811
Matan Barakb4ff3a32016-02-09 14:57:42 +02005812 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005813 u8 function_id[0x10];
5814
Matan Barakb4ff3a32016-02-09 14:57:42 +02005815 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005816};
5817
5818struct mlx5_ifc_drain_dct_out_bits {
5819 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005820 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005821
5822 u8 syndrome[0x20];
5823
Matan Barakb4ff3a32016-02-09 14:57:42 +02005824 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005825};
5826
5827struct mlx5_ifc_drain_dct_in_bits {
5828 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005829 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005830
Matan Barakb4ff3a32016-02-09 14:57:42 +02005831 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005832 u8 op_mod[0x10];
5833
Matan Barakb4ff3a32016-02-09 14:57:42 +02005834 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005835 u8 dctn[0x18];
5836
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838};
5839
5840struct mlx5_ifc_disable_hca_out_bits {
5841 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005842 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005843
5844 u8 syndrome[0x20];
5845
Matan Barakb4ff3a32016-02-09 14:57:42 +02005846 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005847};
5848
5849struct mlx5_ifc_disable_hca_in_bits {
5850 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005851 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005852
Matan Barakb4ff3a32016-02-09 14:57:42 +02005853 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005854 u8 op_mod[0x10];
5855
Matan Barakb4ff3a32016-02-09 14:57:42 +02005856 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005857 u8 function_id[0x10];
5858
Matan Barakb4ff3a32016-02-09 14:57:42 +02005859 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005860};
5861
5862struct mlx5_ifc_detach_from_mcg_out_bits {
5863 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005864 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005865
5866 u8 syndrome[0x20];
5867
Matan Barakb4ff3a32016-02-09 14:57:42 +02005868 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005869};
5870
5871struct mlx5_ifc_detach_from_mcg_in_bits {
5872 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005873 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005874
Matan Barakb4ff3a32016-02-09 14:57:42 +02005875 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005876 u8 op_mod[0x10];
5877
Matan Barakb4ff3a32016-02-09 14:57:42 +02005878 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005879 u8 qpn[0x18];
5880
Matan Barakb4ff3a32016-02-09 14:57:42 +02005881 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005882
5883 u8 multicast_gid[16][0x8];
5884};
5885
Saeed Mahameed74862162016-06-09 15:11:34 +03005886struct mlx5_ifc_destroy_xrq_out_bits {
5887 u8 status[0x8];
5888 u8 reserved_at_8[0x18];
5889
5890 u8 syndrome[0x20];
5891
5892 u8 reserved_at_40[0x40];
5893};
5894
5895struct mlx5_ifc_destroy_xrq_in_bits {
5896 u8 opcode[0x10];
5897 u8 reserved_at_10[0x10];
5898
5899 u8 reserved_at_20[0x10];
5900 u8 op_mod[0x10];
5901
5902 u8 reserved_at_40[0x8];
5903 u8 xrqn[0x18];
5904
5905 u8 reserved_at_60[0x20];
5906};
5907
Saeed Mahameede2816822015-05-28 22:28:40 +03005908struct mlx5_ifc_destroy_xrc_srq_out_bits {
5909 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005910 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005911
5912 u8 syndrome[0x20];
5913
Matan Barakb4ff3a32016-02-09 14:57:42 +02005914 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005915};
5916
5917struct mlx5_ifc_destroy_xrc_srq_in_bits {
5918 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005919 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005920
Matan Barakb4ff3a32016-02-09 14:57:42 +02005921 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005922 u8 op_mod[0x10];
5923
Matan Barakb4ff3a32016-02-09 14:57:42 +02005924 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005925 u8 xrc_srqn[0x18];
5926
Matan Barakb4ff3a32016-02-09 14:57:42 +02005927 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005928};
5929
5930struct mlx5_ifc_destroy_tis_out_bits {
5931 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005932 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005933
5934 u8 syndrome[0x20];
5935
Matan Barakb4ff3a32016-02-09 14:57:42 +02005936 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005937};
5938
5939struct mlx5_ifc_destroy_tis_in_bits {
5940 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005941 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005942
Matan Barakb4ff3a32016-02-09 14:57:42 +02005943 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005944 u8 op_mod[0x10];
5945
Matan Barakb4ff3a32016-02-09 14:57:42 +02005946 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005947 u8 tisn[0x18];
5948
Matan Barakb4ff3a32016-02-09 14:57:42 +02005949 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005950};
5951
5952struct mlx5_ifc_destroy_tir_out_bits {
5953 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005954 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005955
5956 u8 syndrome[0x20];
5957
Matan Barakb4ff3a32016-02-09 14:57:42 +02005958 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005959};
5960
5961struct mlx5_ifc_destroy_tir_in_bits {
5962 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005963 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005964
Matan Barakb4ff3a32016-02-09 14:57:42 +02005965 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005966 u8 op_mod[0x10];
5967
Matan Barakb4ff3a32016-02-09 14:57:42 +02005968 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005969 u8 tirn[0x18];
5970
Matan Barakb4ff3a32016-02-09 14:57:42 +02005971 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005972};
5973
5974struct mlx5_ifc_destroy_srq_out_bits {
5975 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005976 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005977
5978 u8 syndrome[0x20];
5979
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981};
5982
5983struct mlx5_ifc_destroy_srq_in_bits {
5984 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005985 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005986
Matan Barakb4ff3a32016-02-09 14:57:42 +02005987 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005988 u8 op_mod[0x10];
5989
Matan Barakb4ff3a32016-02-09 14:57:42 +02005990 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005991 u8 srqn[0x18];
5992
Matan Barakb4ff3a32016-02-09 14:57:42 +02005993 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005994};
5995
5996struct mlx5_ifc_destroy_sq_out_bits {
5997 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005998 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005999
6000 u8 syndrome[0x20];
6001
Matan Barakb4ff3a32016-02-09 14:57:42 +02006002 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006003};
6004
6005struct mlx5_ifc_destroy_sq_in_bits {
6006 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006007 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006008
Matan Barakb4ff3a32016-02-09 14:57:42 +02006009 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006010 u8 op_mod[0x10];
6011
Matan Barakb4ff3a32016-02-09 14:57:42 +02006012 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006013 u8 sqn[0x18];
6014
Matan Barakb4ff3a32016-02-09 14:57:42 +02006015 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006016};
6017
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006018struct mlx5_ifc_destroy_scheduling_element_out_bits {
6019 u8 status[0x8];
6020 u8 reserved_at_8[0x18];
6021
6022 u8 syndrome[0x20];
6023
6024 u8 reserved_at_40[0x1c0];
6025};
6026
6027struct mlx5_ifc_destroy_scheduling_element_in_bits {
6028 u8 opcode[0x10];
6029 u8 reserved_at_10[0x10];
6030
6031 u8 reserved_at_20[0x10];
6032 u8 op_mod[0x10];
6033
6034 u8 scheduling_hierarchy[0x8];
6035 u8 reserved_at_48[0x18];
6036
6037 u8 scheduling_element_id[0x20];
6038
6039 u8 reserved_at_80[0x180];
6040};
6041
Saeed Mahameede2816822015-05-28 22:28:40 +03006042struct mlx5_ifc_destroy_rqt_out_bits {
6043 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006044 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006045
6046 u8 syndrome[0x20];
6047
Matan Barakb4ff3a32016-02-09 14:57:42 +02006048 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006049};
6050
6051struct mlx5_ifc_destroy_rqt_in_bits {
6052 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006053 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006054
Matan Barakb4ff3a32016-02-09 14:57:42 +02006055 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006056 u8 op_mod[0x10];
6057
Matan Barakb4ff3a32016-02-09 14:57:42 +02006058 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006059 u8 rqtn[0x18];
6060
Matan Barakb4ff3a32016-02-09 14:57:42 +02006061 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006062};
6063
6064struct mlx5_ifc_destroy_rq_out_bits {
6065 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006066 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006067
6068 u8 syndrome[0x20];
6069
Matan Barakb4ff3a32016-02-09 14:57:42 +02006070 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006071};
6072
6073struct mlx5_ifc_destroy_rq_in_bits {
6074 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006075 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006076
Matan Barakb4ff3a32016-02-09 14:57:42 +02006077 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006078 u8 op_mod[0x10];
6079
Matan Barakb4ff3a32016-02-09 14:57:42 +02006080 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006081 u8 rqn[0x18];
6082
Matan Barakb4ff3a32016-02-09 14:57:42 +02006083 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006084};
6085
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006086struct mlx5_ifc_set_delay_drop_params_in_bits {
6087 u8 opcode[0x10];
6088 u8 reserved_at_10[0x10];
6089
6090 u8 reserved_at_20[0x10];
6091 u8 op_mod[0x10];
6092
6093 u8 reserved_at_40[0x20];
6094
6095 u8 reserved_at_60[0x10];
6096 u8 delay_drop_timeout[0x10];
6097};
6098
6099struct mlx5_ifc_set_delay_drop_params_out_bits {
6100 u8 status[0x8];
6101 u8 reserved_at_8[0x18];
6102
6103 u8 syndrome[0x20];
6104
6105 u8 reserved_at_40[0x40];
6106};
6107
Saeed Mahameede2816822015-05-28 22:28:40 +03006108struct mlx5_ifc_destroy_rmp_out_bits {
6109 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006110 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006111
6112 u8 syndrome[0x20];
6113
Matan Barakb4ff3a32016-02-09 14:57:42 +02006114 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006115};
6116
6117struct mlx5_ifc_destroy_rmp_in_bits {
6118 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006119 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006120
Matan Barakb4ff3a32016-02-09 14:57:42 +02006121 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006122 u8 op_mod[0x10];
6123
Matan Barakb4ff3a32016-02-09 14:57:42 +02006124 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006125 u8 rmpn[0x18];
6126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128};
6129
6130struct mlx5_ifc_destroy_qp_out_bits {
6131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006133
6134 u8 syndrome[0x20];
6135
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137};
6138
6139struct mlx5_ifc_destroy_qp_in_bits {
6140 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006141 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006142
Matan Barakb4ff3a32016-02-09 14:57:42 +02006143 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006144 u8 op_mod[0x10];
6145
Matan Barakb4ff3a32016-02-09 14:57:42 +02006146 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006147 u8 qpn[0x18];
6148
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150};
6151
6152struct mlx5_ifc_destroy_psv_out_bits {
6153 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006154 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006155
6156 u8 syndrome[0x20];
6157
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159};
6160
6161struct mlx5_ifc_destroy_psv_in_bits {
6162 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166 u8 op_mod[0x10];
6167
Matan Barakb4ff3a32016-02-09 14:57:42 +02006168 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006169 u8 psvn[0x18];
6170
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172};
6173
6174struct mlx5_ifc_destroy_mkey_out_bits {
6175 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006176 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006177
6178 u8 syndrome[0x20];
6179
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181};
6182
6183struct mlx5_ifc_destroy_mkey_in_bits {
6184 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188 u8 op_mod[0x10];
6189
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191 u8 mkey_index[0x18];
6192
Matan Barakb4ff3a32016-02-09 14:57:42 +02006193 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006194};
6195
6196struct mlx5_ifc_destroy_flow_table_out_bits {
6197 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006198 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006199
6200 u8 syndrome[0x20];
6201
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203};
6204
6205struct mlx5_ifc_destroy_flow_table_in_bits {
6206 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006207 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006208
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210 u8 op_mod[0x10];
6211
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006212 u8 other_vport[0x1];
6213 u8 reserved_at_41[0xf];
6214 u8 vport_number[0x10];
6215
6216 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217
6218 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006219 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006220
Matan Barakb4ff3a32016-02-09 14:57:42 +02006221 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006222 u8 table_id[0x18];
6223
Matan Barakb4ff3a32016-02-09 14:57:42 +02006224 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006225};
6226
6227struct mlx5_ifc_destroy_flow_group_out_bits {
6228 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006229 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006230
6231 u8 syndrome[0x20];
6232
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234};
6235
6236struct mlx5_ifc_destroy_flow_group_in_bits {
6237 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006238 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006239
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241 u8 op_mod[0x10];
6242
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006243 u8 other_vport[0x1];
6244 u8 reserved_at_41[0xf];
6245 u8 vport_number[0x10];
6246
6247 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248
6249 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006250 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006251
Matan Barakb4ff3a32016-02-09 14:57:42 +02006252 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006253 u8 table_id[0x18];
6254
6255 u8 group_id[0x20];
6256
Matan Barakb4ff3a32016-02-09 14:57:42 +02006257 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006258};
6259
6260struct mlx5_ifc_destroy_eq_out_bits {
6261 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006262 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006263
6264 u8 syndrome[0x20];
6265
Matan Barakb4ff3a32016-02-09 14:57:42 +02006266 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006267};
6268
6269struct mlx5_ifc_destroy_eq_in_bits {
6270 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006271 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006272
Matan Barakb4ff3a32016-02-09 14:57:42 +02006273 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006274 u8 op_mod[0x10];
6275
Matan Barakb4ff3a32016-02-09 14:57:42 +02006276 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006277 u8 eq_number[0x8];
6278
Matan Barakb4ff3a32016-02-09 14:57:42 +02006279 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006280};
6281
6282struct mlx5_ifc_destroy_dct_out_bits {
6283 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006284 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006285
6286 u8 syndrome[0x20];
6287
Matan Barakb4ff3a32016-02-09 14:57:42 +02006288 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006289};
6290
6291struct mlx5_ifc_destroy_dct_in_bits {
6292 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006293 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006294
Matan Barakb4ff3a32016-02-09 14:57:42 +02006295 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296 u8 op_mod[0x10];
6297
Matan Barakb4ff3a32016-02-09 14:57:42 +02006298 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006299 u8 dctn[0x18];
6300
Matan Barakb4ff3a32016-02-09 14:57:42 +02006301 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006302};
6303
6304struct mlx5_ifc_destroy_cq_out_bits {
6305 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006306 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006307
6308 u8 syndrome[0x20];
6309
Matan Barakb4ff3a32016-02-09 14:57:42 +02006310 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006311};
6312
6313struct mlx5_ifc_destroy_cq_in_bits {
6314 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006315 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006316
Matan Barakb4ff3a32016-02-09 14:57:42 +02006317 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318 u8 op_mod[0x10];
6319
Matan Barakb4ff3a32016-02-09 14:57:42 +02006320 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006321 u8 cqn[0x18];
6322
Matan Barakb4ff3a32016-02-09 14:57:42 +02006323 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006324};
6325
6326struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6327 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006328 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006329
6330 u8 syndrome[0x20];
6331
Matan Barakb4ff3a32016-02-09 14:57:42 +02006332 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006333};
6334
6335struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6336 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006337 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006338
Matan Barakb4ff3a32016-02-09 14:57:42 +02006339 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006340 u8 op_mod[0x10];
6341
Matan Barakb4ff3a32016-02-09 14:57:42 +02006342 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006343
Matan Barakb4ff3a32016-02-09 14:57:42 +02006344 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006345 u8 vxlan_udp_port[0x10];
6346};
6347
6348struct mlx5_ifc_delete_l2_table_entry_out_bits {
6349 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006350 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006351
6352 u8 syndrome[0x20];
6353
Matan Barakb4ff3a32016-02-09 14:57:42 +02006354 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006355};
6356
6357struct mlx5_ifc_delete_l2_table_entry_in_bits {
6358 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006359 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006360
Matan Barakb4ff3a32016-02-09 14:57:42 +02006361 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006362 u8 op_mod[0x10];
6363
Matan Barakb4ff3a32016-02-09 14:57:42 +02006364 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006365
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367 u8 table_index[0x18];
6368
Matan Barakb4ff3a32016-02-09 14:57:42 +02006369 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006370};
6371
6372struct mlx5_ifc_delete_fte_out_bits {
6373 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006374 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006375
6376 u8 syndrome[0x20];
6377
Matan Barakb4ff3a32016-02-09 14:57:42 +02006378 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006379};
6380
6381struct mlx5_ifc_delete_fte_in_bits {
6382 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006383 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006384
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386 u8 op_mod[0x10];
6387
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006388 u8 other_vport[0x1];
6389 u8 reserved_at_41[0xf];
6390 u8 vport_number[0x10];
6391
6392 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006393
6394 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006395 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006396
Matan Barakb4ff3a32016-02-09 14:57:42 +02006397 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006398 u8 table_id[0x18];
6399
Matan Barakb4ff3a32016-02-09 14:57:42 +02006400 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006401
6402 u8 flow_index[0x20];
6403
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405};
6406
6407struct mlx5_ifc_dealloc_xrcd_out_bits {
6408 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006409 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006410
6411 u8 syndrome[0x20];
6412
Matan Barakb4ff3a32016-02-09 14:57:42 +02006413 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006414};
6415
6416struct mlx5_ifc_dealloc_xrcd_in_bits {
6417 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006418 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006419
Matan Barakb4ff3a32016-02-09 14:57:42 +02006420 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006421 u8 op_mod[0x10];
6422
Matan Barakb4ff3a32016-02-09 14:57:42 +02006423 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006424 u8 xrcd[0x18];
6425
Matan Barakb4ff3a32016-02-09 14:57:42 +02006426 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006427};
6428
6429struct mlx5_ifc_dealloc_uar_out_bits {
6430 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006431 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006432
6433 u8 syndrome[0x20];
6434
Matan Barakb4ff3a32016-02-09 14:57:42 +02006435 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006436};
6437
6438struct mlx5_ifc_dealloc_uar_in_bits {
6439 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006440 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006441
Matan Barakb4ff3a32016-02-09 14:57:42 +02006442 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006443 u8 op_mod[0x10];
6444
Matan Barakb4ff3a32016-02-09 14:57:42 +02006445 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006446 u8 uar[0x18];
6447
Matan Barakb4ff3a32016-02-09 14:57:42 +02006448 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006449};
6450
6451struct mlx5_ifc_dealloc_transport_domain_out_bits {
6452 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006453 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006454
6455 u8 syndrome[0x20];
6456
Matan Barakb4ff3a32016-02-09 14:57:42 +02006457 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006458};
6459
6460struct mlx5_ifc_dealloc_transport_domain_in_bits {
6461 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006462 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006463
Matan Barakb4ff3a32016-02-09 14:57:42 +02006464 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006465 u8 op_mod[0x10];
6466
Matan Barakb4ff3a32016-02-09 14:57:42 +02006467 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006468 u8 transport_domain[0x18];
6469
Matan Barakb4ff3a32016-02-09 14:57:42 +02006470 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006471};
6472
6473struct mlx5_ifc_dealloc_q_counter_out_bits {
6474 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006475 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006476
6477 u8 syndrome[0x20];
6478
Matan Barakb4ff3a32016-02-09 14:57:42 +02006479 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006480};
6481
6482struct mlx5_ifc_dealloc_q_counter_in_bits {
6483 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006484 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006485
Matan Barakb4ff3a32016-02-09 14:57:42 +02006486 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006487 u8 op_mod[0x10];
6488
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490 u8 counter_set_id[0x8];
6491
Matan Barakb4ff3a32016-02-09 14:57:42 +02006492 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006493};
6494
6495struct mlx5_ifc_dealloc_pd_out_bits {
6496 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006497 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006498
6499 u8 syndrome[0x20];
6500
Matan Barakb4ff3a32016-02-09 14:57:42 +02006501 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006502};
6503
6504struct mlx5_ifc_dealloc_pd_in_bits {
6505 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006506 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006507
Matan Barakb4ff3a32016-02-09 14:57:42 +02006508 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006509 u8 op_mod[0x10];
6510
Matan Barakb4ff3a32016-02-09 14:57:42 +02006511 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006512 u8 pd[0x18];
6513
Matan Barakb4ff3a32016-02-09 14:57:42 +02006514 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006515};
6516
Amir Vadai9dc0b282016-05-13 12:55:39 +00006517struct mlx5_ifc_dealloc_flow_counter_out_bits {
6518 u8 status[0x8];
6519 u8 reserved_at_8[0x18];
6520
6521 u8 syndrome[0x20];
6522
6523 u8 reserved_at_40[0x40];
6524};
6525
6526struct mlx5_ifc_dealloc_flow_counter_in_bits {
6527 u8 opcode[0x10];
6528 u8 reserved_at_10[0x10];
6529
6530 u8 reserved_at_20[0x10];
6531 u8 op_mod[0x10];
6532
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006533 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006534
6535 u8 reserved_at_60[0x20];
6536};
6537
Saeed Mahameed74862162016-06-09 15:11:34 +03006538struct mlx5_ifc_create_xrq_out_bits {
6539 u8 status[0x8];
6540 u8 reserved_at_8[0x18];
6541
6542 u8 syndrome[0x20];
6543
6544 u8 reserved_at_40[0x8];
6545 u8 xrqn[0x18];
6546
6547 u8 reserved_at_60[0x20];
6548};
6549
6550struct mlx5_ifc_create_xrq_in_bits {
6551 u8 opcode[0x10];
6552 u8 reserved_at_10[0x10];
6553
6554 u8 reserved_at_20[0x10];
6555 u8 op_mod[0x10];
6556
6557 u8 reserved_at_40[0x40];
6558
6559 struct mlx5_ifc_xrqc_bits xrq_context;
6560};
6561
Saeed Mahameede2816822015-05-28 22:28:40 +03006562struct mlx5_ifc_create_xrc_srq_out_bits {
6563 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006564 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006565
6566 u8 syndrome[0x20];
6567
Matan Barakb4ff3a32016-02-09 14:57:42 +02006568 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006569 u8 xrc_srqn[0x18];
6570
Matan Barakb4ff3a32016-02-09 14:57:42 +02006571 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006572};
6573
6574struct mlx5_ifc_create_xrc_srq_in_bits {
6575 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006576 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006577
Matan Barakb4ff3a32016-02-09 14:57:42 +02006578 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006579 u8 op_mod[0x10];
6580
Matan Barakb4ff3a32016-02-09 14:57:42 +02006581 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006582
6583 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6584
Matan Barakb4ff3a32016-02-09 14:57:42 +02006585 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006586
6587 u8 pas[0][0x40];
6588};
6589
6590struct mlx5_ifc_create_tis_out_bits {
6591 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593
6594 u8 syndrome[0x20];
6595
Matan Barakb4ff3a32016-02-09 14:57:42 +02006596 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006597 u8 tisn[0x18];
6598
Matan Barakb4ff3a32016-02-09 14:57:42 +02006599 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006600};
6601
6602struct mlx5_ifc_create_tis_in_bits {
6603 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605
Matan Barakb4ff3a32016-02-09 14:57:42 +02006606 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006607 u8 op_mod[0x10];
6608
Matan Barakb4ff3a32016-02-09 14:57:42 +02006609 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006610
6611 struct mlx5_ifc_tisc_bits ctx;
6612};
6613
6614struct mlx5_ifc_create_tir_out_bits {
6615 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006616 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006617
6618 u8 syndrome[0x20];
6619
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621 u8 tirn[0x18];
6622
Matan Barakb4ff3a32016-02-09 14:57:42 +02006623 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006624};
6625
6626struct mlx5_ifc_create_tir_in_bits {
6627 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006628 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006629
Matan Barakb4ff3a32016-02-09 14:57:42 +02006630 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006631 u8 op_mod[0x10];
6632
Matan Barakb4ff3a32016-02-09 14:57:42 +02006633 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006634
6635 struct mlx5_ifc_tirc_bits ctx;
6636};
6637
6638struct mlx5_ifc_create_srq_out_bits {
6639 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006640 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006641
6642 u8 syndrome[0x20];
6643
Matan Barakb4ff3a32016-02-09 14:57:42 +02006644 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006645 u8 srqn[0x18];
6646
Matan Barakb4ff3a32016-02-09 14:57:42 +02006647 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006648};
6649
6650struct mlx5_ifc_create_srq_in_bits {
6651 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006652 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006653
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655 u8 op_mod[0x10];
6656
Matan Barakb4ff3a32016-02-09 14:57:42 +02006657 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658
6659 struct mlx5_ifc_srqc_bits srq_context_entry;
6660
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662
6663 u8 pas[0][0x40];
6664};
6665
6666struct mlx5_ifc_create_sq_out_bits {
6667 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669
6670 u8 syndrome[0x20];
6671
Matan Barakb4ff3a32016-02-09 14:57:42 +02006672 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006673 u8 sqn[0x18];
6674
Matan Barakb4ff3a32016-02-09 14:57:42 +02006675 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006676};
6677
6678struct mlx5_ifc_create_sq_in_bits {
6679 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006680 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006681
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683 u8 op_mod[0x10];
6684
Matan Barakb4ff3a32016-02-09 14:57:42 +02006685 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006686
6687 struct mlx5_ifc_sqc_bits ctx;
6688};
6689
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006690struct mlx5_ifc_create_scheduling_element_out_bits {
6691 u8 status[0x8];
6692 u8 reserved_at_8[0x18];
6693
6694 u8 syndrome[0x20];
6695
6696 u8 reserved_at_40[0x40];
6697
6698 u8 scheduling_element_id[0x20];
6699
6700 u8 reserved_at_a0[0x160];
6701};
6702
6703struct mlx5_ifc_create_scheduling_element_in_bits {
6704 u8 opcode[0x10];
6705 u8 reserved_at_10[0x10];
6706
6707 u8 reserved_at_20[0x10];
6708 u8 op_mod[0x10];
6709
6710 u8 scheduling_hierarchy[0x8];
6711 u8 reserved_at_48[0x18];
6712
6713 u8 reserved_at_60[0xa0];
6714
6715 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6716
6717 u8 reserved_at_300[0x100];
6718};
6719
Saeed Mahameede2816822015-05-28 22:28:40 +03006720struct mlx5_ifc_create_rqt_out_bits {
6721 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006722 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006723
6724 u8 syndrome[0x20];
6725
Matan Barakb4ff3a32016-02-09 14:57:42 +02006726 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006727 u8 rqtn[0x18];
6728
Matan Barakb4ff3a32016-02-09 14:57:42 +02006729 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006730};
6731
6732struct mlx5_ifc_create_rqt_in_bits {
6733 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006734 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006735
Matan Barakb4ff3a32016-02-09 14:57:42 +02006736 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006737 u8 op_mod[0x10];
6738
Matan Barakb4ff3a32016-02-09 14:57:42 +02006739 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006740
6741 struct mlx5_ifc_rqtc_bits rqt_context;
6742};
6743
6744struct mlx5_ifc_create_rq_out_bits {
6745 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006746 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006747
6748 u8 syndrome[0x20];
6749
Matan Barakb4ff3a32016-02-09 14:57:42 +02006750 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006751 u8 rqn[0x18];
6752
Matan Barakb4ff3a32016-02-09 14:57:42 +02006753 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006754};
6755
6756struct mlx5_ifc_create_rq_in_bits {
6757 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006758 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006759
Matan Barakb4ff3a32016-02-09 14:57:42 +02006760 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006761 u8 op_mod[0x10];
6762
Matan Barakb4ff3a32016-02-09 14:57:42 +02006763 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006764
6765 struct mlx5_ifc_rqc_bits ctx;
6766};
6767
6768struct mlx5_ifc_create_rmp_out_bits {
6769 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771
6772 u8 syndrome[0x20];
6773
Matan Barakb4ff3a32016-02-09 14:57:42 +02006774 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006775 u8 rmpn[0x18];
6776
Matan Barakb4ff3a32016-02-09 14:57:42 +02006777 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006778};
6779
6780struct mlx5_ifc_create_rmp_in_bits {
6781 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006782 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006783
Matan Barakb4ff3a32016-02-09 14:57:42 +02006784 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006785 u8 op_mod[0x10];
6786
Matan Barakb4ff3a32016-02-09 14:57:42 +02006787 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006788
6789 struct mlx5_ifc_rmpc_bits ctx;
6790};
6791
6792struct mlx5_ifc_create_qp_out_bits {
6793 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006794 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006795
6796 u8 syndrome[0x20];
6797
Matan Barakb4ff3a32016-02-09 14:57:42 +02006798 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006799 u8 qpn[0x18];
6800
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802};
6803
6804struct mlx5_ifc_create_qp_in_bits {
6805 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006806 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006807
Matan Barakb4ff3a32016-02-09 14:57:42 +02006808 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006809 u8 op_mod[0x10];
6810
Matan Barakb4ff3a32016-02-09 14:57:42 +02006811 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006812
6813 u8 opt_param_mask[0x20];
6814
Matan Barakb4ff3a32016-02-09 14:57:42 +02006815 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006816
6817 struct mlx5_ifc_qpc_bits qpc;
6818
Matan Barakb4ff3a32016-02-09 14:57:42 +02006819 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006820
6821 u8 pas[0][0x40];
6822};
6823
6824struct mlx5_ifc_create_psv_out_bits {
6825 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006826 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006827
6828 u8 syndrome[0x20];
6829
Matan Barakb4ff3a32016-02-09 14:57:42 +02006830 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006831
Matan Barakb4ff3a32016-02-09 14:57:42 +02006832 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006833 u8 psv0_index[0x18];
6834
Matan Barakb4ff3a32016-02-09 14:57:42 +02006835 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006836 u8 psv1_index[0x18];
6837
Matan Barakb4ff3a32016-02-09 14:57:42 +02006838 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006839 u8 psv2_index[0x18];
6840
Matan Barakb4ff3a32016-02-09 14:57:42 +02006841 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006842 u8 psv3_index[0x18];
6843};
6844
6845struct mlx5_ifc_create_psv_in_bits {
6846 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006847 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006848
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850 u8 op_mod[0x10];
6851
6852 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006853 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854 u8 pd[0x18];
6855
Matan Barakb4ff3a32016-02-09 14:57:42 +02006856 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006857};
6858
6859struct mlx5_ifc_create_mkey_out_bits {
6860 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006861 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006862
6863 u8 syndrome[0x20];
6864
Matan Barakb4ff3a32016-02-09 14:57:42 +02006865 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006866 u8 mkey_index[0x18];
6867
Matan Barakb4ff3a32016-02-09 14:57:42 +02006868 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006869};
6870
6871struct mlx5_ifc_create_mkey_in_bits {
6872 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006873 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006874
Matan Barakb4ff3a32016-02-09 14:57:42 +02006875 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006876 u8 op_mod[0x10];
6877
Matan Barakb4ff3a32016-02-09 14:57:42 +02006878 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006879
6880 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006881 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006882
6883 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6884
Matan Barakb4ff3a32016-02-09 14:57:42 +02006885 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006886
6887 u8 translations_octword_actual_size[0x20];
6888
Matan Barakb4ff3a32016-02-09 14:57:42 +02006889 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006890
6891 u8 klm_pas_mtt[0][0x20];
6892};
6893
6894struct mlx5_ifc_create_flow_table_out_bits {
6895 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006896 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006897
6898 u8 syndrome[0x20];
6899
Matan Barakb4ff3a32016-02-09 14:57:42 +02006900 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006901 u8 table_id[0x18];
6902
Matan Barakb4ff3a32016-02-09 14:57:42 +02006903 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006904};
6905
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006906struct mlx5_ifc_flow_table_context_bits {
6907 u8 encap_en[0x1];
6908 u8 decap_en[0x1];
6909 u8 reserved_at_2[0x2];
6910 u8 table_miss_action[0x4];
6911 u8 level[0x8];
6912 u8 reserved_at_10[0x8];
6913 u8 log_size[0x8];
6914
6915 u8 reserved_at_20[0x8];
6916 u8 table_miss_id[0x18];
6917
6918 u8 reserved_at_40[0x8];
6919 u8 lag_master_next_table_id[0x18];
6920
6921 u8 reserved_at_60[0xe0];
6922};
6923
Saeed Mahameede2816822015-05-28 22:28:40 +03006924struct mlx5_ifc_create_flow_table_in_bits {
6925 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006926 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006927
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929 u8 op_mod[0x10];
6930
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006931 u8 other_vport[0x1];
6932 u8 reserved_at_41[0xf];
6933 u8 vport_number[0x10];
6934
6935 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006936
6937 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006938 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006939
Matan Barakb4ff3a32016-02-09 14:57:42 +02006940 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006941
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006942 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006943};
6944
6945struct mlx5_ifc_create_flow_group_out_bits {
6946 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006947 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006948
6949 u8 syndrome[0x20];
6950
Matan Barakb4ff3a32016-02-09 14:57:42 +02006951 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006952 u8 group_id[0x18];
6953
Matan Barakb4ff3a32016-02-09 14:57:42 +02006954 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006955};
6956
6957enum {
6958 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6959 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6960 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6961};
6962
6963struct mlx5_ifc_create_flow_group_in_bits {
6964 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006965 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006966
Matan Barakb4ff3a32016-02-09 14:57:42 +02006967 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006968 u8 op_mod[0x10];
6969
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006970 u8 other_vport[0x1];
6971 u8 reserved_at_41[0xf];
6972 u8 vport_number[0x10];
6973
6974 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006975
6976 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006977 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006978
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980 u8 table_id[0x18];
6981
Shahar Klein3e99df82018-03-18 09:02:06 +02006982 u8 source_eswitch_owner_vhca_id_valid[0x1];
6983
6984 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006985
6986 u8 start_flow_index[0x20];
6987
Matan Barakb4ff3a32016-02-09 14:57:42 +02006988 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006989
6990 u8 end_flow_index[0x20];
6991
Matan Barakb4ff3a32016-02-09 14:57:42 +02006992 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006993
Matan Barakb4ff3a32016-02-09 14:57:42 +02006994 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006995 u8 match_criteria_enable[0x8];
6996
6997 struct mlx5_ifc_fte_match_param_bits match_criteria;
6998
Matan Barakb4ff3a32016-02-09 14:57:42 +02006999 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03007000};
7001
7002struct mlx5_ifc_create_eq_out_bits {
7003 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007004 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007005
7006 u8 syndrome[0x20];
7007
Matan Barakb4ff3a32016-02-09 14:57:42 +02007008 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007009 u8 eq_number[0x8];
7010
Matan Barakb4ff3a32016-02-09 14:57:42 +02007011 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007012};
7013
7014struct mlx5_ifc_create_eq_in_bits {
7015 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007016 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007017
Matan Barakb4ff3a32016-02-09 14:57:42 +02007018 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007019 u8 op_mod[0x10];
7020
Matan Barakb4ff3a32016-02-09 14:57:42 +02007021 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007022
7023 struct mlx5_ifc_eqc_bits eq_context_entry;
7024
Matan Barakb4ff3a32016-02-09 14:57:42 +02007025 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007026
7027 u8 event_bitmask[0x40];
7028
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030
7031 u8 pas[0][0x40];
7032};
7033
7034struct mlx5_ifc_create_dct_out_bits {
7035 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007036 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007037
7038 u8 syndrome[0x20];
7039
Matan Barakb4ff3a32016-02-09 14:57:42 +02007040 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007041 u8 dctn[0x18];
7042
Matan Barakb4ff3a32016-02-09 14:57:42 +02007043 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007044};
7045
7046struct mlx5_ifc_create_dct_in_bits {
7047 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007048 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007049
Matan Barakb4ff3a32016-02-09 14:57:42 +02007050 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007051 u8 op_mod[0x10];
7052
Matan Barakb4ff3a32016-02-09 14:57:42 +02007053 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007054
7055 struct mlx5_ifc_dctc_bits dct_context_entry;
7056
Matan Barakb4ff3a32016-02-09 14:57:42 +02007057 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007058};
7059
7060struct mlx5_ifc_create_cq_out_bits {
7061 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007062 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007063
7064 u8 syndrome[0x20];
7065
Matan Barakb4ff3a32016-02-09 14:57:42 +02007066 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007067 u8 cqn[0x18];
7068
Matan Barakb4ff3a32016-02-09 14:57:42 +02007069 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007070};
7071
7072struct mlx5_ifc_create_cq_in_bits {
7073 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007074 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007075
Matan Barakb4ff3a32016-02-09 14:57:42 +02007076 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007077 u8 op_mod[0x10];
7078
Matan Barakb4ff3a32016-02-09 14:57:42 +02007079 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007080
7081 struct mlx5_ifc_cqc_bits cq_context;
7082
Matan Barakb4ff3a32016-02-09 14:57:42 +02007083 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007084
7085 u8 pas[0][0x40];
7086};
7087
7088struct mlx5_ifc_config_int_moderation_out_bits {
7089 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007090 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007091
7092 u8 syndrome[0x20];
7093
Matan Barakb4ff3a32016-02-09 14:57:42 +02007094 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007095 u8 min_delay[0xc];
7096 u8 int_vector[0x10];
7097
Matan Barakb4ff3a32016-02-09 14:57:42 +02007098 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007099};
7100
7101enum {
7102 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7103 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7104};
7105
7106struct mlx5_ifc_config_int_moderation_in_bits {
7107 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007108 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007109
Matan Barakb4ff3a32016-02-09 14:57:42 +02007110 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007111 u8 op_mod[0x10];
7112
Matan Barakb4ff3a32016-02-09 14:57:42 +02007113 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007114 u8 min_delay[0xc];
7115 u8 int_vector[0x10];
7116
Matan Barakb4ff3a32016-02-09 14:57:42 +02007117 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007118};
7119
7120struct mlx5_ifc_attach_to_mcg_out_bits {
7121 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007122 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007123
7124 u8 syndrome[0x20];
7125
Matan Barakb4ff3a32016-02-09 14:57:42 +02007126 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007127};
7128
7129struct mlx5_ifc_attach_to_mcg_in_bits {
7130 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007131 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007132
Matan Barakb4ff3a32016-02-09 14:57:42 +02007133 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007134 u8 op_mod[0x10];
7135
Matan Barakb4ff3a32016-02-09 14:57:42 +02007136 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007137 u8 qpn[0x18];
7138
Matan Barakb4ff3a32016-02-09 14:57:42 +02007139 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007140
7141 u8 multicast_gid[16][0x8];
7142};
7143
Saeed Mahameed74862162016-06-09 15:11:34 +03007144struct mlx5_ifc_arm_xrq_out_bits {
7145 u8 status[0x8];
7146 u8 reserved_at_8[0x18];
7147
7148 u8 syndrome[0x20];
7149
7150 u8 reserved_at_40[0x40];
7151};
7152
7153struct mlx5_ifc_arm_xrq_in_bits {
7154 u8 opcode[0x10];
7155 u8 reserved_at_10[0x10];
7156
7157 u8 reserved_at_20[0x10];
7158 u8 op_mod[0x10];
7159
7160 u8 reserved_at_40[0x8];
7161 u8 xrqn[0x18];
7162
7163 u8 reserved_at_60[0x10];
7164 u8 lwm[0x10];
7165};
7166
Saeed Mahameede2816822015-05-28 22:28:40 +03007167struct mlx5_ifc_arm_xrc_srq_out_bits {
7168 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007169 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007170
7171 u8 syndrome[0x20];
7172
Matan Barakb4ff3a32016-02-09 14:57:42 +02007173 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007174};
7175
7176enum {
7177 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7178};
7179
7180struct mlx5_ifc_arm_xrc_srq_in_bits {
7181 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007182 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007183
Matan Barakb4ff3a32016-02-09 14:57:42 +02007184 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007185 u8 op_mod[0x10];
7186
Matan Barakb4ff3a32016-02-09 14:57:42 +02007187 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007188 u8 xrc_srqn[0x18];
7189
Matan Barakb4ff3a32016-02-09 14:57:42 +02007190 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007191 u8 lwm[0x10];
7192};
7193
7194struct mlx5_ifc_arm_rq_out_bits {
7195 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007196 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007197
7198 u8 syndrome[0x20];
7199
Matan Barakb4ff3a32016-02-09 14:57:42 +02007200 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007201};
7202
7203enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007204 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7205 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007206};
7207
7208struct mlx5_ifc_arm_rq_in_bits {
7209 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007210 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007211
Matan Barakb4ff3a32016-02-09 14:57:42 +02007212 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007213 u8 op_mod[0x10];
7214
Matan Barakb4ff3a32016-02-09 14:57:42 +02007215 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007216 u8 srq_number[0x18];
7217
Matan Barakb4ff3a32016-02-09 14:57:42 +02007218 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007219 u8 lwm[0x10];
7220};
7221
7222struct mlx5_ifc_arm_dct_out_bits {
7223 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007224 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007225
7226 u8 syndrome[0x20];
7227
Matan Barakb4ff3a32016-02-09 14:57:42 +02007228 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007229};
7230
7231struct mlx5_ifc_arm_dct_in_bits {
7232 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007233 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007234
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236 u8 op_mod[0x10];
7237
Matan Barakb4ff3a32016-02-09 14:57:42 +02007238 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007239 u8 dct_number[0x18];
7240
Matan Barakb4ff3a32016-02-09 14:57:42 +02007241 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007242};
7243
7244struct mlx5_ifc_alloc_xrcd_out_bits {
7245 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007246 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007247
7248 u8 syndrome[0x20];
7249
Matan Barakb4ff3a32016-02-09 14:57:42 +02007250 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007251 u8 xrcd[0x18];
7252
Matan Barakb4ff3a32016-02-09 14:57:42 +02007253 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007254};
7255
7256struct mlx5_ifc_alloc_xrcd_in_bits {
7257 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007258 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007259
Matan Barakb4ff3a32016-02-09 14:57:42 +02007260 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007261 u8 op_mod[0x10];
7262
Matan Barakb4ff3a32016-02-09 14:57:42 +02007263 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007264};
7265
7266struct mlx5_ifc_alloc_uar_out_bits {
7267 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007268 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007269
7270 u8 syndrome[0x20];
7271
Matan Barakb4ff3a32016-02-09 14:57:42 +02007272 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007273 u8 uar[0x18];
7274
Matan Barakb4ff3a32016-02-09 14:57:42 +02007275 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007276};
7277
7278struct mlx5_ifc_alloc_uar_in_bits {
7279 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007280 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007281
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283 u8 op_mod[0x10];
7284
Matan Barakb4ff3a32016-02-09 14:57:42 +02007285 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007286};
7287
7288struct mlx5_ifc_alloc_transport_domain_out_bits {
7289 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007290 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007291
7292 u8 syndrome[0x20];
7293
Matan Barakb4ff3a32016-02-09 14:57:42 +02007294 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007295 u8 transport_domain[0x18];
7296
Matan Barakb4ff3a32016-02-09 14:57:42 +02007297 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007298};
7299
7300struct mlx5_ifc_alloc_transport_domain_in_bits {
7301 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007302 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007303
Matan Barakb4ff3a32016-02-09 14:57:42 +02007304 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007305 u8 op_mod[0x10];
7306
Matan Barakb4ff3a32016-02-09 14:57:42 +02007307 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007308};
7309
7310struct mlx5_ifc_alloc_q_counter_out_bits {
7311 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007312 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007313
7314 u8 syndrome[0x20];
7315
Matan Barakb4ff3a32016-02-09 14:57:42 +02007316 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007317 u8 counter_set_id[0x8];
7318
Matan Barakb4ff3a32016-02-09 14:57:42 +02007319 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007320};
7321
7322struct mlx5_ifc_alloc_q_counter_in_bits {
7323 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007324 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007325
Matan Barakb4ff3a32016-02-09 14:57:42 +02007326 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007327 u8 op_mod[0x10];
7328
Matan Barakb4ff3a32016-02-09 14:57:42 +02007329 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007330};
7331
7332struct mlx5_ifc_alloc_pd_out_bits {
7333 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007334 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007335
7336 u8 syndrome[0x20];
7337
Matan Barakb4ff3a32016-02-09 14:57:42 +02007338 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007339 u8 pd[0x18];
7340
Matan Barakb4ff3a32016-02-09 14:57:42 +02007341 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007342};
7343
7344struct mlx5_ifc_alloc_pd_in_bits {
7345 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007346 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007347
Matan Barakb4ff3a32016-02-09 14:57:42 +02007348 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007349 u8 op_mod[0x10];
7350
Matan Barakb4ff3a32016-02-09 14:57:42 +02007351 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007352};
7353
Amir Vadai9dc0b282016-05-13 12:55:39 +00007354struct mlx5_ifc_alloc_flow_counter_out_bits {
7355 u8 status[0x8];
7356 u8 reserved_at_8[0x18];
7357
7358 u8 syndrome[0x20];
7359
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007360 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007361
7362 u8 reserved_at_60[0x20];
7363};
7364
7365struct mlx5_ifc_alloc_flow_counter_in_bits {
7366 u8 opcode[0x10];
7367 u8 reserved_at_10[0x10];
7368
7369 u8 reserved_at_20[0x10];
7370 u8 op_mod[0x10];
7371
7372 u8 reserved_at_40[0x40];
7373};
7374
Saeed Mahameede2816822015-05-28 22:28:40 +03007375struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7376 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007377 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007378
7379 u8 syndrome[0x20];
7380
Matan Barakb4ff3a32016-02-09 14:57:42 +02007381 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007382};
7383
7384struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7385 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007386 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007387
Matan Barakb4ff3a32016-02-09 14:57:42 +02007388 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007389 u8 op_mod[0x10];
7390
Matan Barakb4ff3a32016-02-09 14:57:42 +02007391 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007392
Matan Barakb4ff3a32016-02-09 14:57:42 +02007393 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007394 u8 vxlan_udp_port[0x10];
7395};
7396
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007397struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007398 u8 status[0x8];
7399 u8 reserved_at_8[0x18];
7400
7401 u8 syndrome[0x20];
7402
7403 u8 reserved_at_40[0x40];
7404};
7405
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007406struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007407 u8 opcode[0x10];
7408 u8 reserved_at_10[0x10];
7409
7410 u8 reserved_at_20[0x10];
7411 u8 op_mod[0x10];
7412
7413 u8 reserved_at_40[0x10];
7414 u8 rate_limit_index[0x10];
7415
7416 u8 reserved_at_60[0x20];
7417
7418 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007419
Bodong Wang05d3ac92018-03-19 15:10:29 +02007420 u8 burst_upper_bound[0x20];
7421
7422 u8 reserved_at_c0[0x10];
7423 u8 typical_packet_size[0x10];
7424
7425 u8 reserved_at_e0[0x120];
Saeed Mahameed74862162016-06-09 15:11:34 +03007426};
7427
Saeed Mahameede2816822015-05-28 22:28:40 +03007428struct mlx5_ifc_access_register_out_bits {
7429 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007430 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007431
7432 u8 syndrome[0x20];
7433
Matan Barakb4ff3a32016-02-09 14:57:42 +02007434 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007435
7436 u8 register_data[0][0x20];
7437};
7438
7439enum {
7440 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7441 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7442};
7443
7444struct mlx5_ifc_access_register_in_bits {
7445 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007446 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007447
Matan Barakb4ff3a32016-02-09 14:57:42 +02007448 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007449 u8 op_mod[0x10];
7450
Matan Barakb4ff3a32016-02-09 14:57:42 +02007451 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007452 u8 register_id[0x10];
7453
7454 u8 argument[0x20];
7455
7456 u8 register_data[0][0x20];
7457};
7458
7459struct mlx5_ifc_sltp_reg_bits {
7460 u8 status[0x4];
7461 u8 version[0x4];
7462 u8 local_port[0x8];
7463 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007464 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007465 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007466 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007467
Matan Barakb4ff3a32016-02-09 14:57:42 +02007468 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007469
Matan Barakb4ff3a32016-02-09 14:57:42 +02007470 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007471 u8 polarity[0x1];
7472 u8 ob_tap0[0x8];
7473 u8 ob_tap1[0x8];
7474 u8 ob_tap2[0x8];
7475
Matan Barakb4ff3a32016-02-09 14:57:42 +02007476 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007477 u8 ob_preemp_mode[0x4];
7478 u8 ob_reg[0x8];
7479 u8 ob_bias[0x8];
7480
Matan Barakb4ff3a32016-02-09 14:57:42 +02007481 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007482};
7483
7484struct mlx5_ifc_slrg_reg_bits {
7485 u8 status[0x4];
7486 u8 version[0x4];
7487 u8 local_port[0x8];
7488 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007489 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007490 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492
7493 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007494 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007495 u8 grade_lane_speed[0x4];
7496
7497 u8 grade_version[0x8];
7498 u8 grade[0x18];
7499
Matan Barakb4ff3a32016-02-09 14:57:42 +02007500 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007501 u8 height_grade_type[0x4];
7502 u8 height_grade[0x18];
7503
7504 u8 height_dz[0x10];
7505 u8 height_dv[0x10];
7506
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508 u8 height_sigma[0x10];
7509
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511
Matan Barakb4ff3a32016-02-09 14:57:42 +02007512 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007513 u8 phase_grade_type[0x4];
7514 u8 phase_grade[0x18];
7515
Matan Barakb4ff3a32016-02-09 14:57:42 +02007516 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007517 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007518 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007519 u8 phase_eo_neg[0x8];
7520
7521 u8 ffe_set_tested[0x10];
7522 u8 test_errors_per_lane[0x10];
7523};
7524
7525struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007526 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007527 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531 u8 vl_hw_cap[0x4];
7532
Matan Barakb4ff3a32016-02-09 14:57:42 +02007533 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007534 u8 vl_admin[0x4];
7535
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537 u8 vl_operational[0x4];
7538};
7539
7540struct mlx5_ifc_pude_reg_bits {
7541 u8 swid[0x8];
7542 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007543 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007544 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007545 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007546 u8 oper_status[0x4];
7547
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549};
7550
7551struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007552 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007553 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007554 u8 an_disable_cap[0x1];
7555 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007556 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007557 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558 u8 proto_mask[0x3];
7559
Saeed Mahameed74862162016-06-09 15:11:34 +03007560 u8 an_status[0x4];
7561 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007562
7563 u8 eth_proto_capability[0x20];
7564
7565 u8 ib_link_width_capability[0x10];
7566 u8 ib_proto_capability[0x10];
7567
Matan Barakb4ff3a32016-02-09 14:57:42 +02007568 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007569
7570 u8 eth_proto_admin[0x20];
7571
7572 u8 ib_link_width_admin[0x10];
7573 u8 ib_proto_admin[0x10];
7574
Matan Barakb4ff3a32016-02-09 14:57:42 +02007575 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007576
7577 u8 eth_proto_oper[0x20];
7578
7579 u8 ib_link_width_oper[0x10];
7580 u8 ib_proto_oper[0x10];
7581
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007582 u8 reserved_at_160[0x1c];
7583 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007584
7585 u8 eth_proto_lp_advertise[0x20];
7586
Matan Barakb4ff3a32016-02-09 14:57:42 +02007587 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007588};
7589
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007590struct mlx5_ifc_mlcr_reg_bits {
7591 u8 reserved_at_0[0x8];
7592 u8 local_port[0x8];
7593 u8 reserved_at_10[0x20];
7594
7595 u8 beacon_duration[0x10];
7596 u8 reserved_at_40[0x10];
7597
7598 u8 beacon_remain[0x10];
7599};
7600
Saeed Mahameede2816822015-05-28 22:28:40 +03007601struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007602 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007603
7604 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007605 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007606 u8 repetitions_mode[0x4];
7607 u8 num_of_repetitions[0x8];
7608
7609 u8 grade_version[0x8];
7610 u8 height_grade_type[0x4];
7611 u8 phase_grade_type[0x4];
7612 u8 height_grade_weight[0x8];
7613 u8 phase_grade_weight[0x8];
7614
7615 u8 gisim_measure_bits[0x10];
7616 u8 adaptive_tap_measure_bits[0x10];
7617
7618 u8 ber_bath_high_error_threshold[0x10];
7619 u8 ber_bath_mid_error_threshold[0x10];
7620
7621 u8 ber_bath_low_error_threshold[0x10];
7622 u8 one_ratio_high_threshold[0x10];
7623
7624 u8 one_ratio_high_mid_threshold[0x10];
7625 u8 one_ratio_low_mid_threshold[0x10];
7626
7627 u8 one_ratio_low_threshold[0x10];
7628 u8 ndeo_error_threshold[0x10];
7629
7630 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007631 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007632 u8 mix90_phase_for_voltage_bath[0x8];
7633
7634 u8 mixer_offset_start[0x10];
7635 u8 mixer_offset_end[0x10];
7636
Matan Barakb4ff3a32016-02-09 14:57:42 +02007637 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007638 u8 ber_test_time[0xb];
7639};
7640
7641struct mlx5_ifc_pspa_reg_bits {
7642 u8 swid[0x8];
7643 u8 local_port[0x8];
7644 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007645 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007646
Matan Barakb4ff3a32016-02-09 14:57:42 +02007647 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007648};
7649
7650struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007651 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007652 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007653 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007654 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007655 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007656 u8 mode[0x2];
7657
Matan Barakb4ff3a32016-02-09 14:57:42 +02007658 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007659
Matan Barakb4ff3a32016-02-09 14:57:42 +02007660 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007661 u8 min_threshold[0x10];
7662
Matan Barakb4ff3a32016-02-09 14:57:42 +02007663 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007664 u8 max_threshold[0x10];
7665
Matan Barakb4ff3a32016-02-09 14:57:42 +02007666 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007667 u8 mark_probability_denominator[0x10];
7668
Matan Barakb4ff3a32016-02-09 14:57:42 +02007669 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007670};
7671
7672struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007673 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007674 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007675 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007676
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680 u8 wrps_admin[0x4];
7681
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683 u8 wrps_status[0x4];
7684
Matan Barakb4ff3a32016-02-09 14:57:42 +02007685 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007686 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688 u8 down_threshold[0x8];
7689
Matan Barakb4ff3a32016-02-09 14:57:42 +02007690 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007691
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693 u8 srps_admin[0x4];
7694
Matan Barakb4ff3a32016-02-09 14:57:42 +02007695 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007696 u8 srps_status[0x4];
7697
Matan Barakb4ff3a32016-02-09 14:57:42 +02007698 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007699};
7700
7701struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007704 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007705
Matan Barakb4ff3a32016-02-09 14:57:42 +02007706 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007707 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007708 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007709 u8 lb_en[0x8];
7710};
7711
7712struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007713 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007714 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007715 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007716
Matan Barakb4ff3a32016-02-09 14:57:42 +02007717 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007718
7719 u8 port_profile_mode[0x8];
7720 u8 static_port_profile[0x8];
7721 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007722 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007723
7724 u8 retransmission_active[0x8];
7725 u8 fec_mode_active[0x18];
7726
Matan Barakb4ff3a32016-02-09 14:57:42 +02007727 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007728};
7729
7730struct mlx5_ifc_ppcnt_reg_bits {
7731 u8 swid[0x8];
7732 u8 local_port[0x8];
7733 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007734 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007735 u8 grp[0x6];
7736
7737 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007738 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007739 u8 prio_tc[0x3];
7740
7741 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7742};
7743
Gal Pressman8ed1a632016-11-17 13:46:01 +02007744struct mlx5_ifc_mpcnt_reg_bits {
7745 u8 reserved_at_0[0x8];
7746 u8 pcie_index[0x8];
7747 u8 reserved_at_10[0xa];
7748 u8 grp[0x6];
7749
7750 u8 clr[0x1];
7751 u8 reserved_at_21[0x1f];
7752
7753 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7754};
7755
Saeed Mahameede2816822015-05-28 22:28:40 +03007756struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007757 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007758 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760 u8 local_port[0x8];
7761 u8 mac_47_32[0x10];
7762
7763 u8 mac_31_0[0x20];
7764
Matan Barakb4ff3a32016-02-09 14:57:42 +02007765 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007766};
7767
7768struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007769 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007770 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007771 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007772
7773 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007774 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007775
7776 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007777 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007778
7779 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007780 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007781};
7782
7783struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007784 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007785 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007786 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007787
Matan Barakb4ff3a32016-02-09 14:57:42 +02007788 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007789 u8 attenuation_5g[0x8];
7790
Matan Barakb4ff3a32016-02-09 14:57:42 +02007791 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007792 u8 attenuation_7g[0x8];
7793
Matan Barakb4ff3a32016-02-09 14:57:42 +02007794 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007795 u8 attenuation_12g[0x8];
7796};
7797
7798struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007799 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007800 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007801 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007802 u8 module_status[0x4];
7803
Matan Barakb4ff3a32016-02-09 14:57:42 +02007804 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007805};
7806
7807struct mlx5_ifc_pmpc_reg_bits {
7808 u8 module_state_updated[32][0x8];
7809};
7810
7811struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007812 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007813 u8 mlpn_status[0x4];
7814 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007815 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007816
7817 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819};
7820
7821struct mlx5_ifc_pmlp_reg_bits {
7822 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007823 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007824 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007825 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007826 u8 width[0x8];
7827
7828 u8 lane0_module_mapping[0x20];
7829
7830 u8 lane1_module_mapping[0x20];
7831
7832 u8 lane2_module_mapping[0x20];
7833
7834 u8 lane3_module_mapping[0x20];
7835
Matan Barakb4ff3a32016-02-09 14:57:42 +02007836 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007837};
7838
7839struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007842 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007843 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007844 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007845 u8 oper_status[0x4];
7846
7847 u8 ase[0x1];
7848 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007849 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007850 u8 e[0x2];
7851
Matan Barakb4ff3a32016-02-09 14:57:42 +02007852 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007853};
7854
7855struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007856 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007857 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007858 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007859 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007860 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007861
Matan Barakb4ff3a32016-02-09 14:57:42 +02007862 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007863 u8 lane_speed[0x10];
7864
Matan Barakb4ff3a32016-02-09 14:57:42 +02007865 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007866 u8 lpbf[0x1];
7867 u8 fec_mode_policy[0x8];
7868
7869 u8 retransmission_capability[0x8];
7870 u8 fec_mode_capability[0x18];
7871
7872 u8 retransmission_support_admin[0x8];
7873 u8 fec_mode_support_admin[0x18];
7874
7875 u8 retransmission_request_admin[0x8];
7876 u8 fec_mode_request_admin[0x18];
7877
Matan Barakb4ff3a32016-02-09 14:57:42 +02007878 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007879};
7880
7881struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007882 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007883 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007884 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007885 u8 ib_port[0x8];
7886
Matan Barakb4ff3a32016-02-09 14:57:42 +02007887 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007888};
7889
7890struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007891 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007892 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007893 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007894 u8 lbf_mode[0x3];
7895
Matan Barakb4ff3a32016-02-09 14:57:42 +02007896 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007897};
7898
7899struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007900 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007901 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007902 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007903
7904 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007905 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007906 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007907 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007908};
7909
7910struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007911 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007912 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007913 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007914
Matan Barakb4ff3a32016-02-09 14:57:42 +02007915 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007916
7917 u8 port_filter[8][0x20];
7918
7919 u8 port_filter_update_en[8][0x20];
7920};
7921
7922struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007923 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007924 u8 local_port[0x8];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007925 u8 reserved_at_10[0xb];
7926 u8 ppan_mask_n[0x1];
7927 u8 minor_stall_mask[0x1];
7928 u8 critical_stall_mask[0x1];
7929 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007930
7931 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007932 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007933 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007934 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007935 u8 prio_mask_rx[0x8];
7936
7937 u8 pptx[0x1];
7938 u8 aptx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007939 u8 pptx_mask_n[0x1];
7940 u8 reserved_at_43[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007941 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007942 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007943
7944 u8 pprx[0x1];
7945 u8 aprx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007946 u8 pprx_mask_n[0x1];
7947 u8 reserved_at_63[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007948 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007949 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007950
Inbar Karmy2afa6092017-11-20 18:06:20 +02007951 u8 device_stall_minor_watermark[0x10];
7952 u8 device_stall_critical_watermark[0x10];
7953
7954 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007955};
7956
7957struct mlx5_ifc_pelc_reg_bits {
7958 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007959 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007960 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007961 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007962
7963 u8 op_admin[0x8];
7964 u8 op_capability[0x8];
7965 u8 op_request[0x8];
7966 u8 op_active[0x8];
7967
7968 u8 admin[0x40];
7969
7970 u8 capability[0x40];
7971
7972 u8 request[0x40];
7973
7974 u8 active[0x40];
7975
Matan Barakb4ff3a32016-02-09 14:57:42 +02007976 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007977};
7978
7979struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007980 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007981 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007982 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007983
Matan Barakb4ff3a32016-02-09 14:57:42 +02007984 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007985 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007986 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007987
Matan Barakb4ff3a32016-02-09 14:57:42 +02007988 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007989 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007990 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007991 u8 error_type[0x8];
7992};
7993
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007994struct mlx5_ifc_pcam_enhanced_features_bits {
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007995 u8 reserved_at_0[0x76];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007996
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007997 u8 pfcc_mask[0x1];
7998 u8 reserved_at_77[0x4];
Gal Pressman2dba0792017-06-18 14:56:45 +03007999 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02008000 u8 ptys_connector_type[0x1];
8001 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008002 u8 ppcnt_discard_group[0x1];
8003 u8 ppcnt_statistical_group[0x1];
8004};
8005
Huy Nguyendf5f1362018-02-28 14:16:47 -06008006struct mlx5_ifc_pcam_regs_5000_to_507f_bits {
8007 u8 port_access_reg_cap_mask_127_to_96[0x20];
8008 u8 port_access_reg_cap_mask_95_to_64[0x20];
8009 u8 port_access_reg_cap_mask_63_to_32[0x20];
8010
8011 u8 port_access_reg_cap_mask_31_to_13[0x13];
8012 u8 pbmc[0x1];
8013 u8 pptb[0x1];
8014 u8 port_access_reg_cap_mask_10_to_0[0xb];
8015};
8016
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008017struct mlx5_ifc_pcam_reg_bits {
8018 u8 reserved_at_0[0x8];
8019 u8 feature_group[0x8];
8020 u8 reserved_at_10[0x8];
8021 u8 access_reg_group[0x8];
8022
8023 u8 reserved_at_20[0x20];
8024
8025 union {
Huy Nguyendf5f1362018-02-28 14:16:47 -06008026 struct mlx5_ifc_pcam_regs_5000_to_507f_bits regs_5000_to_507f;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008027 u8 reserved_at_0[0x80];
8028 } port_access_reg_cap_mask;
8029
8030 u8 reserved_at_c0[0x80];
8031
8032 union {
8033 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
8034 u8 reserved_at_0[0x80];
8035 } feature_cap_mask;
8036
8037 u8 reserved_at_1c0[0xc0];
8038};
8039
8040struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03008041 u8 reserved_at_0[0x7b];
8042 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03008043 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008044 u8 mtpps_enh_out_per_adj[0x1];
8045 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008046 u8 pcie_performance_group[0x1];
8047};
8048
Or Gerlitz0ab87742017-06-11 15:25:38 +03008049struct mlx5_ifc_mcam_access_reg_bits {
8050 u8 reserved_at_0[0x1c];
8051 u8 mcda[0x1];
8052 u8 mcc[0x1];
8053 u8 mcqi[0x1];
8054 u8 reserved_at_1f[0x1];
8055
8056 u8 regs_95_to_64[0x20];
8057 u8 regs_63_to_32[0x20];
8058 u8 regs_31_to_0[0x20];
8059};
8060
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008061struct mlx5_ifc_mcam_reg_bits {
8062 u8 reserved_at_0[0x8];
8063 u8 feature_group[0x8];
8064 u8 reserved_at_10[0x8];
8065 u8 access_reg_group[0x8];
8066
8067 u8 reserved_at_20[0x20];
8068
8069 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03008070 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008071 u8 reserved_at_0[0x80];
8072 } mng_access_reg_cap_mask;
8073
8074 u8 reserved_at_c0[0x80];
8075
8076 union {
8077 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
8078 u8 reserved_at_0[0x80];
8079 } mng_feature_cap_mask;
8080
8081 u8 reserved_at_1c0[0x80];
8082};
8083
Huy Nguyenc02762e2017-07-18 16:03:17 -05008084struct mlx5_ifc_qcam_access_reg_cap_mask {
8085 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
8086 u8 qpdpm[0x1];
8087 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
8088 u8 qdpm[0x1];
8089 u8 qpts[0x1];
8090 u8 qcap[0x1];
8091 u8 qcam_access_reg_cap_mask_0[0x1];
8092};
8093
8094struct mlx5_ifc_qcam_qos_feature_cap_mask {
8095 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
8096 u8 qpts_trust_both[0x1];
8097};
8098
8099struct mlx5_ifc_qcam_reg_bits {
8100 u8 reserved_at_0[0x8];
8101 u8 feature_group[0x8];
8102 u8 reserved_at_10[0x8];
8103 u8 access_reg_group[0x8];
8104 u8 reserved_at_20[0x20];
8105
8106 union {
8107 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
8108 u8 reserved_at_0[0x80];
8109 } qos_access_reg_cap_mask;
8110
8111 u8 reserved_at_c0[0x80];
8112
8113 union {
8114 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8115 u8 reserved_at_0[0x80];
8116 } qos_feature_cap_mask;
8117
8118 u8 reserved_at_1c0[0x80];
8119};
8120
Saeed Mahameede2816822015-05-28 22:28:40 +03008121struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008122 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008123 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008124 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008125
8126 u8 port_capability_mask[4][0x20];
8127};
8128
8129struct mlx5_ifc_paos_reg_bits {
8130 u8 swid[0x8];
8131 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008132 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008133 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008134 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008135 u8 oper_status[0x4];
8136
8137 u8 ase[0x1];
8138 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008139 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008140 u8 e[0x2];
8141
Matan Barakb4ff3a32016-02-09 14:57:42 +02008142 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008143};
8144
8145struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008146 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008147 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008148 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008149 u8 opamp_group_type[0x4];
8150
8151 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008152 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008153 u8 num_of_indices[0xc];
8154
8155 u8 index_data[18][0x10];
8156};
8157
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008158struct mlx5_ifc_pcmr_reg_bits {
8159 u8 reserved_at_0[0x8];
8160 u8 local_port[0x8];
8161 u8 reserved_at_10[0x2e];
8162 u8 fcs_cap[0x1];
8163 u8 reserved_at_3f[0x1f];
8164 u8 fcs_chk[0x1];
8165 u8 reserved_at_5f[0x1];
8166};
8167
Saeed Mahameede2816822015-05-28 22:28:40 +03008168struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008169 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008170 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008171 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008172 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008173 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008174 u8 module[0x8];
8175};
8176
8177struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008178 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008179 u8 lossy[0x1];
8180 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008181 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008182 u8 size[0xc];
8183
8184 u8 xoff_threshold[0x10];
8185 u8 xon_threshold[0x10];
8186};
8187
8188struct mlx5_ifc_set_node_in_bits {
8189 u8 node_description[64][0x8];
8190};
8191
8192struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008193 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008194 u8 power_settings_level[0x8];
8195
Matan Barakb4ff3a32016-02-09 14:57:42 +02008196 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008197};
8198
8199struct mlx5_ifc_register_host_endianness_bits {
8200 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008201 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008202
Matan Barakb4ff3a32016-02-09 14:57:42 +02008203 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008204};
8205
8206struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008207 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008208
8209 u8 mkey[0x20];
8210
8211 u8 addressh_63_32[0x20];
8212
8213 u8 addressl_31_0[0x20];
8214};
8215
8216struct mlx5_ifc_ud_adrs_vector_bits {
8217 u8 dc_key[0x40];
8218
8219 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008220 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008221 u8 destination_qp_dct[0x18];
8222
8223 u8 static_rate[0x4];
8224 u8 sl_eth_prio[0x4];
8225 u8 fl[0x1];
8226 u8 mlid[0x7];
8227 u8 rlid_udp_sport[0x10];
8228
Matan Barakb4ff3a32016-02-09 14:57:42 +02008229 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008230
8231 u8 rmac_47_16[0x20];
8232
8233 u8 rmac_15_0[0x10];
8234 u8 tclass[0x8];
8235 u8 hop_limit[0x8];
8236
Matan Barakb4ff3a32016-02-09 14:57:42 +02008237 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008238 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008239 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008240 u8 src_addr_index[0x8];
8241 u8 flow_label[0x14];
8242
8243 u8 rgid_rip[16][0x8];
8244};
8245
8246struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008247 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008248 u8 function_id[0x10];
8249
8250 u8 num_pages[0x20];
8251
Matan Barakb4ff3a32016-02-09 14:57:42 +02008252 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008253};
8254
8255struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008256 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008257 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008258 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008259 u8 event_sub_type[0x8];
8260
Matan Barakb4ff3a32016-02-09 14:57:42 +02008261 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008262
8263 union mlx5_ifc_event_auto_bits event_data;
8264
Matan Barakb4ff3a32016-02-09 14:57:42 +02008265 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008266 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008267 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008268 u8 owner[0x1];
8269};
8270
8271enum {
8272 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8273};
8274
8275struct mlx5_ifc_cmd_queue_entry_bits {
8276 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008277 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008278
8279 u8 input_length[0x20];
8280
8281 u8 input_mailbox_pointer_63_32[0x20];
8282
8283 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008284 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008285
8286 u8 command_input_inline_data[16][0x8];
8287
8288 u8 command_output_inline_data[16][0x8];
8289
8290 u8 output_mailbox_pointer_63_32[0x20];
8291
8292 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008293 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008294
8295 u8 output_length[0x20];
8296
8297 u8 token[0x8];
8298 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008299 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008300 u8 status[0x7];
8301 u8 ownership[0x1];
8302};
8303
8304struct mlx5_ifc_cmd_out_bits {
8305 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008306 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008307
8308 u8 syndrome[0x20];
8309
8310 u8 command_output[0x20];
8311};
8312
8313struct mlx5_ifc_cmd_in_bits {
8314 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008315 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008316
Matan Barakb4ff3a32016-02-09 14:57:42 +02008317 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008318 u8 op_mod[0x10];
8319
8320 u8 command[0][0x20];
8321};
8322
8323struct mlx5_ifc_cmd_if_box_bits {
8324 u8 mailbox_data[512][0x8];
8325
Matan Barakb4ff3a32016-02-09 14:57:42 +02008326 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008327
8328 u8 next_pointer_63_32[0x20];
8329
8330 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008331 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008332
8333 u8 block_number[0x20];
8334
Matan Barakb4ff3a32016-02-09 14:57:42 +02008335 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008336 u8 token[0x8];
8337 u8 ctrl_signature[0x8];
8338 u8 signature[0x8];
8339};
8340
8341struct mlx5_ifc_mtt_bits {
8342 u8 ptag_63_32[0x20];
8343
8344 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008345 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008346 u8 wr_en[0x1];
8347 u8 rd_en[0x1];
8348};
8349
Tariq Toukan928cfe82016-02-22 18:17:29 +02008350struct mlx5_ifc_query_wol_rol_out_bits {
8351 u8 status[0x8];
8352 u8 reserved_at_8[0x18];
8353
8354 u8 syndrome[0x20];
8355
8356 u8 reserved_at_40[0x10];
8357 u8 rol_mode[0x8];
8358 u8 wol_mode[0x8];
8359
8360 u8 reserved_at_60[0x20];
8361};
8362
8363struct mlx5_ifc_query_wol_rol_in_bits {
8364 u8 opcode[0x10];
8365 u8 reserved_at_10[0x10];
8366
8367 u8 reserved_at_20[0x10];
8368 u8 op_mod[0x10];
8369
8370 u8 reserved_at_40[0x40];
8371};
8372
8373struct mlx5_ifc_set_wol_rol_out_bits {
8374 u8 status[0x8];
8375 u8 reserved_at_8[0x18];
8376
8377 u8 syndrome[0x20];
8378
8379 u8 reserved_at_40[0x40];
8380};
8381
8382struct mlx5_ifc_set_wol_rol_in_bits {
8383 u8 opcode[0x10];
8384 u8 reserved_at_10[0x10];
8385
8386 u8 reserved_at_20[0x10];
8387 u8 op_mod[0x10];
8388
8389 u8 rol_mode_valid[0x1];
8390 u8 wol_mode_valid[0x1];
8391 u8 reserved_at_42[0xe];
8392 u8 rol_mode[0x8];
8393 u8 wol_mode[0x8];
8394
8395 u8 reserved_at_60[0x20];
8396};
8397
Saeed Mahameede2816822015-05-28 22:28:40 +03008398enum {
8399 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8400 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8401 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8402};
8403
8404enum {
8405 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8406 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8407 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8408};
8409
8410enum {
8411 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8412 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8413 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8414 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8415 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8416 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8417 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8418 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8419 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8420 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8421 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8422};
8423
8424struct mlx5_ifc_initial_seg_bits {
8425 u8 fw_rev_minor[0x10];
8426 u8 fw_rev_major[0x10];
8427
8428 u8 cmd_interface_rev[0x10];
8429 u8 fw_rev_subminor[0x10];
8430
Matan Barakb4ff3a32016-02-09 14:57:42 +02008431 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008432
8433 u8 cmdq_phy_addr_63_32[0x20];
8434
8435 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008436 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008437 u8 nic_interface[0x2];
8438 u8 log_cmdq_size[0x4];
8439 u8 log_cmdq_stride[0x4];
8440
8441 u8 command_doorbell_vector[0x20];
8442
Matan Barakb4ff3a32016-02-09 14:57:42 +02008443 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008444
8445 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008446 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008447 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008448 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008449
8450 struct mlx5_ifc_health_buffer_bits health_buffer;
8451
8452 u8 no_dram_nic_offset[0x20];
8453
Matan Barakb4ff3a32016-02-09 14:57:42 +02008454 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008455
Matan Barakb4ff3a32016-02-09 14:57:42 +02008456 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008457 u8 clear_int[0x1];
8458
8459 u8 health_syndrome[0x8];
8460 u8 health_counter[0x18];
8461
Matan Barakb4ff3a32016-02-09 14:57:42 +02008462 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008463};
8464
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008465struct mlx5_ifc_mtpps_reg_bits {
8466 u8 reserved_at_0[0xc];
8467 u8 cap_number_of_pps_pins[0x4];
8468 u8 reserved_at_10[0x4];
8469 u8 cap_max_num_of_pps_in_pins[0x4];
8470 u8 reserved_at_18[0x4];
8471 u8 cap_max_num_of_pps_out_pins[0x4];
8472
8473 u8 reserved_at_20[0x24];
8474 u8 cap_pin_3_mode[0x4];
8475 u8 reserved_at_48[0x4];
8476 u8 cap_pin_2_mode[0x4];
8477 u8 reserved_at_50[0x4];
8478 u8 cap_pin_1_mode[0x4];
8479 u8 reserved_at_58[0x4];
8480 u8 cap_pin_0_mode[0x4];
8481
8482 u8 reserved_at_60[0x4];
8483 u8 cap_pin_7_mode[0x4];
8484 u8 reserved_at_68[0x4];
8485 u8 cap_pin_6_mode[0x4];
8486 u8 reserved_at_70[0x4];
8487 u8 cap_pin_5_mode[0x4];
8488 u8 reserved_at_78[0x4];
8489 u8 cap_pin_4_mode[0x4];
8490
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008491 u8 field_select[0x20];
8492 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008493
8494 u8 enable[0x1];
8495 u8 reserved_at_101[0xb];
8496 u8 pattern[0x4];
8497 u8 reserved_at_110[0x4];
8498 u8 pin_mode[0x4];
8499 u8 pin[0x8];
8500
8501 u8 reserved_at_120[0x20];
8502
8503 u8 time_stamp[0x40];
8504
8505 u8 out_pulse_duration[0x10];
8506 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008507 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008508
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008509 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008510};
8511
8512struct mlx5_ifc_mtppse_reg_bits {
8513 u8 reserved_at_0[0x18];
8514 u8 pin[0x8];
8515 u8 event_arm[0x1];
8516 u8 reserved_at_21[0x1b];
8517 u8 event_generation_mode[0x4];
8518 u8 reserved_at_40[0x40];
8519};
8520
Or Gerlitz47176282017-04-18 13:35:39 +03008521struct mlx5_ifc_mcqi_cap_bits {
8522 u8 supported_info_bitmask[0x20];
8523
8524 u8 component_size[0x20];
8525
8526 u8 max_component_size[0x20];
8527
8528 u8 log_mcda_word_size[0x4];
8529 u8 reserved_at_64[0xc];
8530 u8 mcda_max_write_size[0x10];
8531
8532 u8 rd_en[0x1];
8533 u8 reserved_at_81[0x1];
8534 u8 match_chip_id[0x1];
8535 u8 match_psid[0x1];
8536 u8 check_user_timestamp[0x1];
8537 u8 match_base_guid_mac[0x1];
8538 u8 reserved_at_86[0x1a];
8539};
8540
8541struct mlx5_ifc_mcqi_reg_bits {
8542 u8 read_pending_component[0x1];
8543 u8 reserved_at_1[0xf];
8544 u8 component_index[0x10];
8545
8546 u8 reserved_at_20[0x20];
8547
8548 u8 reserved_at_40[0x1b];
8549 u8 info_type[0x5];
8550
8551 u8 info_size[0x20];
8552
8553 u8 offset[0x20];
8554
8555 u8 reserved_at_a0[0x10];
8556 u8 data_size[0x10];
8557
8558 u8 data[0][0x20];
8559};
8560
8561struct mlx5_ifc_mcc_reg_bits {
8562 u8 reserved_at_0[0x4];
8563 u8 time_elapsed_since_last_cmd[0xc];
8564 u8 reserved_at_10[0x8];
8565 u8 instruction[0x8];
8566
8567 u8 reserved_at_20[0x10];
8568 u8 component_index[0x10];
8569
8570 u8 reserved_at_40[0x8];
8571 u8 update_handle[0x18];
8572
8573 u8 handle_owner_type[0x4];
8574 u8 handle_owner_host_id[0x4];
8575 u8 reserved_at_68[0x1];
8576 u8 control_progress[0x7];
8577 u8 error_code[0x8];
8578 u8 reserved_at_78[0x4];
8579 u8 control_state[0x4];
8580
8581 u8 component_size[0x20];
8582
8583 u8 reserved_at_a0[0x60];
8584};
8585
8586struct mlx5_ifc_mcda_reg_bits {
8587 u8 reserved_at_0[0x8];
8588 u8 update_handle[0x18];
8589
8590 u8 offset[0x20];
8591
8592 u8 reserved_at_40[0x10];
8593 u8 size[0x10];
8594
8595 u8 reserved_at_60[0x20];
8596
8597 u8 data[0][0x20];
8598};
8599
Saeed Mahameede2816822015-05-28 22:28:40 +03008600union mlx5_ifc_ports_control_registers_document_bits {
8601 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8602 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8603 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8604 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8605 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8606 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8607 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8608 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8609 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8610 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8611 struct mlx5_ifc_paos_reg_bits paos_reg;
8612 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8613 struct mlx5_ifc_peir_reg_bits peir_reg;
8614 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8615 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008616 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008617 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8618 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8619 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8620 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8621 struct mlx5_ifc_plib_reg_bits plib_reg;
8622 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8623 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8624 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8625 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8626 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8627 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8628 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8629 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8630 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8631 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008632 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008633 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8634 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8635 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8636 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8637 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8638 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8639 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008640 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008641 struct mlx5_ifc_pude_reg_bits pude_reg;
8642 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8643 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8644 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008645 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8646 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008647 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008648 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8649 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008650 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8651 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8652 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008653 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008654};
8655
8656union mlx5_ifc_debug_enhancements_document_bits {
8657 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008658 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008659};
8660
8661union mlx5_ifc_uplink_pci_interface_document_bits {
8662 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008663 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008664};
8665
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008666struct mlx5_ifc_set_flow_table_root_out_bits {
8667 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008668 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008669
8670 u8 syndrome[0x20];
8671
Matan Barakb4ff3a32016-02-09 14:57:42 +02008672 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008673};
8674
8675struct mlx5_ifc_set_flow_table_root_in_bits {
8676 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008677 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008678
Matan Barakb4ff3a32016-02-09 14:57:42 +02008679 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008680 u8 op_mod[0x10];
8681
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008682 u8 other_vport[0x1];
8683 u8 reserved_at_41[0xf];
8684 u8 vport_number[0x10];
8685
8686 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008687
8688 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008689 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008690
Matan Barakb4ff3a32016-02-09 14:57:42 +02008691 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008692 u8 table_id[0x18];
8693
Erez Shitrit500a3d02017-04-13 06:36:51 +03008694 u8 reserved_at_c0[0x8];
8695 u8 underlay_qpn[0x18];
8696 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008697};
8698
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008699enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008700 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8701 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008702};
8703
8704struct mlx5_ifc_modify_flow_table_out_bits {
8705 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008706 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008707
8708 u8 syndrome[0x20];
8709
Matan Barakb4ff3a32016-02-09 14:57:42 +02008710 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008711};
8712
8713struct mlx5_ifc_modify_flow_table_in_bits {
8714 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008715 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008716
Matan Barakb4ff3a32016-02-09 14:57:42 +02008717 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008718 u8 op_mod[0x10];
8719
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008720 u8 other_vport[0x1];
8721 u8 reserved_at_41[0xf];
8722 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008723
Matan Barakb4ff3a32016-02-09 14:57:42 +02008724 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008725 u8 modify_field_select[0x10];
8726
8727 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008728 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008729
Matan Barakb4ff3a32016-02-09 14:57:42 +02008730 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008731 u8 table_id[0x18];
8732
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008733 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008734};
8735
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008736struct mlx5_ifc_ets_tcn_config_reg_bits {
8737 u8 g[0x1];
8738 u8 b[0x1];
8739 u8 r[0x1];
8740 u8 reserved_at_3[0x9];
8741 u8 group[0x4];
8742 u8 reserved_at_10[0x9];
8743 u8 bw_allocation[0x7];
8744
8745 u8 reserved_at_20[0xc];
8746 u8 max_bw_units[0x4];
8747 u8 reserved_at_30[0x8];
8748 u8 max_bw_value[0x8];
8749};
8750
8751struct mlx5_ifc_ets_global_config_reg_bits {
8752 u8 reserved_at_0[0x2];
8753 u8 r[0x1];
8754 u8 reserved_at_3[0x1d];
8755
8756 u8 reserved_at_20[0xc];
8757 u8 max_bw_units[0x4];
8758 u8 reserved_at_30[0x8];
8759 u8 max_bw_value[0x8];
8760};
8761
8762struct mlx5_ifc_qetc_reg_bits {
8763 u8 reserved_at_0[0x8];
8764 u8 port_number[0x8];
8765 u8 reserved_at_10[0x30];
8766
8767 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8768 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8769};
8770
Huy Nguyen415a64a2017-07-18 16:08:46 -05008771struct mlx5_ifc_qpdpm_dscp_reg_bits {
8772 u8 e[0x1];
8773 u8 reserved_at_01[0x0b];
8774 u8 prio[0x04];
8775};
8776
8777struct mlx5_ifc_qpdpm_reg_bits {
8778 u8 reserved_at_0[0x8];
8779 u8 local_port[0x8];
8780 u8 reserved_at_10[0x10];
8781 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8782};
8783
8784struct mlx5_ifc_qpts_reg_bits {
8785 u8 reserved_at_0[0x8];
8786 u8 local_port[0x8];
8787 u8 reserved_at_10[0x2d];
8788 u8 trust_state[0x3];
8789};
8790
Huy Nguyen50b4a3c2018-03-02 15:47:01 -06008791struct mlx5_ifc_pptb_reg_bits {
8792 u8 reserved_at_0[0x2];
8793 u8 mm[0x2];
8794 u8 reserved_at_4[0x4];
8795 u8 local_port[0x8];
8796 u8 reserved_at_10[0x6];
8797 u8 cm[0x1];
8798 u8 um[0x1];
8799 u8 pm[0x8];
8800
8801 u8 prio_x_buff[0x20];
8802
8803 u8 pm_msb[0x8];
8804 u8 reserved_at_48[0x10];
8805 u8 ctrl_buff[0x4];
8806 u8 untagged_buff[0x4];
8807};
8808
8809struct mlx5_ifc_pbmc_reg_bits {
8810 u8 reserved_at_0[0x8];
8811 u8 local_port[0x8];
8812 u8 reserved_at_10[0x10];
8813
8814 u8 xoff_timer_value[0x10];
8815 u8 xoff_refresh[0x10];
8816
8817 u8 reserved_at_40[0x9];
8818 u8 fullness_threshold[0x7];
8819 u8 port_buffer_size[0x10];
8820
8821 struct mlx5_ifc_bufferx_reg_bits buffer[10];
8822
8823 u8 reserved_at_2e0[0x40];
8824};
8825
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008826struct mlx5_ifc_qtct_reg_bits {
8827 u8 reserved_at_0[0x8];
8828 u8 port_number[0x8];
8829 u8 reserved_at_10[0xd];
8830 u8 prio[0x3];
8831
8832 u8 reserved_at_20[0x1d];
8833 u8 tclass[0x3];
8834};
8835
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008836struct mlx5_ifc_mcia_reg_bits {
8837 u8 l[0x1];
8838 u8 reserved_at_1[0x7];
8839 u8 module[0x8];
8840 u8 reserved_at_10[0x8];
8841 u8 status[0x8];
8842
8843 u8 i2c_device_address[0x8];
8844 u8 page_number[0x8];
8845 u8 device_address[0x10];
8846
8847 u8 reserved_at_40[0x10];
8848 u8 size[0x10];
8849
8850 u8 reserved_at_60[0x20];
8851
8852 u8 dword_0[0x20];
8853 u8 dword_1[0x20];
8854 u8 dword_2[0x20];
8855 u8 dword_3[0x20];
8856 u8 dword_4[0x20];
8857 u8 dword_5[0x20];
8858 u8 dword_6[0x20];
8859 u8 dword_7[0x20];
8860 u8 dword_8[0x20];
8861 u8 dword_9[0x20];
8862 u8 dword_10[0x20];
8863 u8 dword_11[0x20];
8864};
8865
Saeed Mahameed74862162016-06-09 15:11:34 +03008866struct mlx5_ifc_dcbx_param_bits {
8867 u8 dcbx_cee_cap[0x1];
8868 u8 dcbx_ieee_cap[0x1];
8869 u8 dcbx_standby_cap[0x1];
8870 u8 reserved_at_0[0x5];
8871 u8 port_number[0x8];
8872 u8 reserved_at_10[0xa];
8873 u8 max_application_table_size[6];
8874 u8 reserved_at_20[0x15];
8875 u8 version_oper[0x3];
8876 u8 reserved_at_38[5];
8877 u8 version_admin[0x3];
8878 u8 willing_admin[0x1];
8879 u8 reserved_at_41[0x3];
8880 u8 pfc_cap_oper[0x4];
8881 u8 reserved_at_48[0x4];
8882 u8 pfc_cap_admin[0x4];
8883 u8 reserved_at_50[0x4];
8884 u8 num_of_tc_oper[0x4];
8885 u8 reserved_at_58[0x4];
8886 u8 num_of_tc_admin[0x4];
8887 u8 remote_willing[0x1];
8888 u8 reserved_at_61[3];
8889 u8 remote_pfc_cap[4];
8890 u8 reserved_at_68[0x14];
8891 u8 remote_num_of_tc[0x4];
8892 u8 reserved_at_80[0x18];
8893 u8 error[0x8];
8894 u8 reserved_at_a0[0x160];
8895};
Aviv Heller84df61e2016-05-10 13:47:50 +03008896
8897struct mlx5_ifc_lagc_bits {
8898 u8 reserved_at_0[0x1d];
8899 u8 lag_state[0x3];
8900
8901 u8 reserved_at_20[0x14];
8902 u8 tx_remap_affinity_2[0x4];
8903 u8 reserved_at_38[0x4];
8904 u8 tx_remap_affinity_1[0x4];
8905};
8906
8907struct mlx5_ifc_create_lag_out_bits {
8908 u8 status[0x8];
8909 u8 reserved_at_8[0x18];
8910
8911 u8 syndrome[0x20];
8912
8913 u8 reserved_at_40[0x40];
8914};
8915
8916struct mlx5_ifc_create_lag_in_bits {
8917 u8 opcode[0x10];
8918 u8 reserved_at_10[0x10];
8919
8920 u8 reserved_at_20[0x10];
8921 u8 op_mod[0x10];
8922
8923 struct mlx5_ifc_lagc_bits ctx;
8924};
8925
8926struct mlx5_ifc_modify_lag_out_bits {
8927 u8 status[0x8];
8928 u8 reserved_at_8[0x18];
8929
8930 u8 syndrome[0x20];
8931
8932 u8 reserved_at_40[0x40];
8933};
8934
8935struct mlx5_ifc_modify_lag_in_bits {
8936 u8 opcode[0x10];
8937 u8 reserved_at_10[0x10];
8938
8939 u8 reserved_at_20[0x10];
8940 u8 op_mod[0x10];
8941
8942 u8 reserved_at_40[0x20];
8943 u8 field_select[0x20];
8944
8945 struct mlx5_ifc_lagc_bits ctx;
8946};
8947
8948struct mlx5_ifc_query_lag_out_bits {
8949 u8 status[0x8];
8950 u8 reserved_at_8[0x18];
8951
8952 u8 syndrome[0x20];
8953
8954 u8 reserved_at_40[0x40];
8955
8956 struct mlx5_ifc_lagc_bits ctx;
8957};
8958
8959struct mlx5_ifc_query_lag_in_bits {
8960 u8 opcode[0x10];
8961 u8 reserved_at_10[0x10];
8962
8963 u8 reserved_at_20[0x10];
8964 u8 op_mod[0x10];
8965
8966 u8 reserved_at_40[0x40];
8967};
8968
8969struct mlx5_ifc_destroy_lag_out_bits {
8970 u8 status[0x8];
8971 u8 reserved_at_8[0x18];
8972
8973 u8 syndrome[0x20];
8974
8975 u8 reserved_at_40[0x40];
8976};
8977
8978struct mlx5_ifc_destroy_lag_in_bits {
8979 u8 opcode[0x10];
8980 u8 reserved_at_10[0x10];
8981
8982 u8 reserved_at_20[0x10];
8983 u8 op_mod[0x10];
8984
8985 u8 reserved_at_40[0x40];
8986};
8987
8988struct mlx5_ifc_create_vport_lag_out_bits {
8989 u8 status[0x8];
8990 u8 reserved_at_8[0x18];
8991
8992 u8 syndrome[0x20];
8993
8994 u8 reserved_at_40[0x40];
8995};
8996
8997struct mlx5_ifc_create_vport_lag_in_bits {
8998 u8 opcode[0x10];
8999 u8 reserved_at_10[0x10];
9000
9001 u8 reserved_at_20[0x10];
9002 u8 op_mod[0x10];
9003
9004 u8 reserved_at_40[0x40];
9005};
9006
9007struct mlx5_ifc_destroy_vport_lag_out_bits {
9008 u8 status[0x8];
9009 u8 reserved_at_8[0x18];
9010
9011 u8 syndrome[0x20];
9012
9013 u8 reserved_at_40[0x40];
9014};
9015
9016struct mlx5_ifc_destroy_vport_lag_in_bits {
9017 u8 opcode[0x10];
9018 u8 reserved_at_10[0x10];
9019
9020 u8 reserved_at_20[0x10];
9021 u8 op_mod[0x10];
9022
9023 u8 reserved_at_40[0x40];
9024};
9025
Ariel Levkovich24da0012018-04-05 18:53:27 +03009026struct mlx5_ifc_alloc_memic_in_bits {
9027 u8 opcode[0x10];
9028 u8 reserved_at_10[0x10];
9029
9030 u8 reserved_at_20[0x10];
9031 u8 op_mod[0x10];
9032
9033 u8 reserved_at_30[0x20];
9034
9035 u8 reserved_at_40[0x18];
9036 u8 log_memic_addr_alignment[0x8];
9037
9038 u8 range_start_addr[0x40];
9039
9040 u8 range_size[0x20];
9041
9042 u8 memic_size[0x20];
9043};
9044
9045struct mlx5_ifc_alloc_memic_out_bits {
9046 u8 status[0x8];
9047 u8 reserved_at_8[0x18];
9048
9049 u8 syndrome[0x20];
9050
9051 u8 memic_start_addr[0x40];
9052};
9053
9054struct mlx5_ifc_dealloc_memic_in_bits {
9055 u8 opcode[0x10];
9056 u8 reserved_at_10[0x10];
9057
9058 u8 reserved_at_20[0x10];
9059 u8 op_mod[0x10];
9060
9061 u8 reserved_at_40[0x40];
9062
9063 u8 memic_start_addr[0x40];
9064
9065 u8 memic_size[0x20];
9066
9067 u8 reserved_at_e0[0x20];
9068};
9069
9070struct mlx5_ifc_dealloc_memic_out_bits {
9071 u8 status[0x8];
9072 u8 reserved_at_8[0x18];
9073
9074 u8 syndrome[0x20];
9075
9076 u8 reserved_at_40[0x40];
9077};
9078
Eli Cohend29b7962014-10-02 12:19:43 +03009079#endif /* MLX5_IFC_H */