blob: 035da29d9a1151f8b692268fe138ee3c9668db64 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700252 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
474 "src/math/expm1minus-scalar-rr2-p5.c",
475 "src/math/expm1minus-scalar-rr2-p6.c",
Frank Barchard22136062020-11-24 18:44:46 -0800476 "src/math/expminus-scalar-rr2-lut64-p2.c",
477 "src/math/expminus-scalar-rr2-lut2048-p1.c",
478 "src/math/expminus-scalar-rr2-p5.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
483 "src/math/roundne-scalar-nearbyint.c",
484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
489 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
495 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
496 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
497 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
498 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
499 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700500 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
501 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
502 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
503 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
504 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
505 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
507 "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c",
508 "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c",
509 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
510 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
511 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
512 "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c",
513 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
514 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
515 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
516 "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c",
517 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
519 "src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c",
520 "src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c",
521 "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
523 "src/qs8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700524 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
526 "src/qs8-requantization/rndna-scalar-unsigned32.c",
527 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan062bee32021-05-27 20:31:07 -0700528 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700529 "src/qs8-vadd/gen/minmax-scalar-x1.c",
530 "src/qs8-vadd/gen/minmax-scalar-x2.c",
531 "src/qs8-vadd/gen/minmax-scalar-x4.c",
532 "src/qs8-vaddc/gen/minmax-scalar-x1.c",
533 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
534 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700535 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
536 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
537 "src/qu8-dwconv/up1x9-minmax-scalar.c",
538 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
539 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/qu8-gemm/2x2-minmax-scalar.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700541 "src/qu8-igemm/2x2-minmax-scalar.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700542 "src/qu8-requantization/fp32-scalar-lrintf.c",
543 "src/qu8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700544 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700545 "src/qu8-requantization/rndna-scalar-signed64.c",
546 "src/qu8-requantization/rndna-scalar-unsigned32.c",
547 "src/qu8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700548 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700549 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700550 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700551 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700553 "src/x8-lut/scalar.c",
554 "src/x8-zip/x2-scalar.c",
555 "src/x8-zip/x3-scalar.c",
556 "src/x8-zip/x4-scalar.c",
557 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800558 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700559 "src/x32-fill/scalar-float.c",
560 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700561 "src/x32-packx/x2-scalar.c",
562 "src/x32-packx/x3-scalar.c",
563 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700564 "src/x32-pad/scalar-float.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700565 "src/x32-pad/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700566 "src/x32-unpool/scalar.c",
567 "src/x32-zip/x2-scalar.c",
568 "src/x32-zip/x3-scalar.c",
569 "src/x32-zip/x4-scalar.c",
570 "src/x32-zip/xm-scalar.c",
Marat Dukhan048931b2020-11-24 20:53:54 -0800571 "src/xx-copy/memcpy.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700572]
573
Marat Dukhan436ebe62019-12-04 15:10:12 -0800574WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700575 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
576 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700577 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
578 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700579 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
580 "src/f32-dwconv/gen/up1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700581 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
582 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700583 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
584 "src/f32-dwconv/gen/up1x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700585 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
586 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700587 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
588 "src/f32-dwconv/gen/up1x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700589 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
590 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700591 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
592 "src/f32-dwconv/gen/up2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700593 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
594 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700595 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
596 "src/f32-dwconv/gen/up2x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700597 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
598 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700599 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
600 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700601 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
602 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700603 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
604 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
605 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
606 "src/f32-gemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700607 "src/f32-gemm/gen/1x4-relu-wasm.c",
608 "src/f32-gemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700609 "src/f32-gemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700610 "src/f32-gemm/gen/2x4-relu-wasm.c",
611 "src/f32-gemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700612 "src/f32-gemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700613 "src/f32-gemm/gen/4x2-relu-wasm.c",
614 "src/f32-gemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700615 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700616 "src/f32-gemm/gen/4x4-relu-wasm.c",
617 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700618 "src/f32-igemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700619 "src/f32-igemm/gen/1x4-relu-wasm.c",
620 "src/f32-igemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700621 "src/f32-igemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700622 "src/f32-igemm/gen/2x4-relu-wasm.c",
623 "src/f32-igemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700624 "src/f32-igemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700625 "src/f32-igemm/gen/4x2-relu-wasm.c",
626 "src/f32-igemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700627 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700628 "src/f32-igemm/gen/4x4-relu-wasm.c",
629 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700630 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
631 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
632 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700633 "src/f32-prelu/gen/wasm-2x1.c",
634 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700635 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
636 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
637 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700638 "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700639 "src/f32-vbinary/gen/vadd-relu-wasm-x1.c",
640 "src/f32-vbinary/gen/vadd-relu-wasm-x2.c",
641 "src/f32-vbinary/gen/vadd-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700642 "src/f32-vbinary/gen/vadd-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700643 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
644 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
645 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
646 "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700647 "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c",
648 "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c",
649 "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700650 "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700651 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
652 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
653 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
654 "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700655 "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c",
656 "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c",
657 "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700658 "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700659 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
660 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
661 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
662 "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700663 "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c",
664 "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c",
665 "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700666 "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800667 "src/f32-vbinary/gen/vmax-wasm-x1.c",
668 "src/f32-vbinary/gen/vmax-wasm-x2.c",
669 "src/f32-vbinary/gen/vmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700670 "src/f32-vbinary/gen/vmax-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800671 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
672 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
673 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700674 "src/f32-vbinary/gen/vmaxc-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800675 "src/f32-vbinary/gen/vmin-wasm-x1.c",
676 "src/f32-vbinary/gen/vmin-wasm-x2.c",
677 "src/f32-vbinary/gen/vmin-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700678 "src/f32-vbinary/gen/vmin-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800679 "src/f32-vbinary/gen/vminc-wasm-x1.c",
680 "src/f32-vbinary/gen/vminc-wasm-x2.c",
681 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700682 "src/f32-vbinary/gen/vminc-wasm-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700683 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
684 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
685 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700686 "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700687 "src/f32-vbinary/gen/vmul-relu-wasm-x1.c",
688 "src/f32-vbinary/gen/vmul-relu-wasm-x2.c",
689 "src/f32-vbinary/gen/vmul-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700690 "src/f32-vbinary/gen/vmul-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700691 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
692 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
693 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
694 "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700695 "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c",
696 "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c",
697 "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700698 "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700699 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
700 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
701 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
702 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700703 "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c",
704 "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c",
705 "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700706 "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700707 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
708 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
709 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
710 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700711 "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c",
712 "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c",
713 "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700714 "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700715 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
716 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
717 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
718 "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700719 "src/f32-vbinary/gen/vsub-relu-wasm-x1.c",
720 "src/f32-vbinary/gen/vsub-relu-wasm-x2.c",
721 "src/f32-vbinary/gen/vsub-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700722 "src/f32-vbinary/gen/vsub-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700723 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
724 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
725 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
726 "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700727 "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c",
728 "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c",
729 "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700730 "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700731 "src/f32-vclamp/gen/vclamp-wasm-x1.c",
732 "src/f32-vclamp/gen/vclamp-wasm-x2.c",
733 "src/f32-vclamp/gen/vclamp-wasm-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800734 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c",
735 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c",
736 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c",
737 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c",
738 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c",
739 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c",
740 "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c",
741 "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c",
742 "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c",
743 "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c",
744 "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c",
745 "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700746 "src/f32-vhswish/gen/vhswish-wasm-x1.c",
747 "src/f32-vhswish/gen/vhswish-wasm-x2.c",
748 "src/f32-vhswish/gen/vhswish-wasm-x4.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700749 "src/f32-vlrelu/gen/vlrelu-wasm-x1.c",
750 "src/f32-vlrelu/gen/vlrelu-wasm-x2.c",
751 "src/f32-vlrelu/gen/vlrelu-wasm-x4.c",
Frank Barchardd4416d62021-05-17 15:51:37 -0700752 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
753 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
754 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700755 "src/f32-vrelu/gen/vrelu-wasm-x1.c",
756 "src/f32-vrelu/gen/vrelu-wasm-x2.c",
757 "src/f32-vrelu/gen/vrelu-wasm-x4.c",
758 "src/f32-vrelu/gen/vrelu-wasm-x8.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800759]
760
Marat Dukhan290055c2020-06-09 12:24:29 -0700761WASMSIMD_UKERNELS = [
Marat Dukhan40f05522020-07-16 22:33:12 -0700762 "src/f32-argmaxpool/4x-wasmsimd-c4.c",
763 "src/f32-argmaxpool/9p8x-wasmsimd-c4.c",
764 "src/f32-argmaxpool/9x-wasmsimd-c4.c",
Marat Dukhan3b7432d2020-07-16 17:46:32 -0700765 "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c",
766 "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c",
767 "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c",
768 "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard22136062020-11-24 18:44:46 -0800769 "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800770 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700771 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800772 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700773 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700774 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800775 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700776 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800777 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700778 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700779 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800780 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700781 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800782 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700783 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
784 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800785 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700786 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800787 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700788 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700789 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800790 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700791 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800792 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700793 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700794 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800795 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700796 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800797 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700798 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
799 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800800 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
801 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
802 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
803 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
804 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
805 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
806 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
807 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
808 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c",
809 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800810 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
811 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
812 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
813 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c",
814 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
815 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c",
816 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c",
817 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c",
818 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c",
819 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800820 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
821 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
822 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
823 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
824 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
825 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
826 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
827 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
828 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c",
829 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800830 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
831 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
832 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
833 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c",
834 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
835 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c",
836 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c",
837 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c",
838 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c",
839 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c",
Frank Barchardc5704bf2020-12-21 23:09:00 -0800840 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
841 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
842 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
843 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
844 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
845 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
846 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
847 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800848 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
849 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
850 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
851 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c",
852 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
853 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c",
854 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c",
855 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c",
Frank Barchardcadd4222021-01-20 16:27:25 -0800856 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
857 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
858 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
859 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
860 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
861 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
862 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
863 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800864 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
865 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
866 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
867 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c",
868 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
869 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c",
870 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c",
871 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -0800872 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
873 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
874 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
875 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
876 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
877 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
878 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
879 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
880 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
881 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
882 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c",
883 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c",
884 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800885 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
886 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
887 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
888 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
889 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c",
890 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
891 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
892 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c",
893 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
894 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c",
895 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c",
896 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c",
897 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -0800898 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
899 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
900 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
901 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
902 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
903 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
904 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
905 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
906 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
907 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
908 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c",
909 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c",
910 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800911 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
912 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
913 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
914 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
915 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c",
916 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
917 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
918 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c",
919 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
920 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c",
921 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c",
922 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c",
923 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -0800924 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
925 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
926 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
927 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
928 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
929 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
930 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
931 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
932 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
933 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800934 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
935 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
936 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
937 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
938 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c",
939 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
940 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
941 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c",
942 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
943 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -0800944 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
945 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
946 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
947 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
948 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
949 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
950 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
951 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
952 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
953 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800954 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
955 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
956 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
957 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
958 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c",
959 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
960 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
961 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c",
962 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
963 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700964 "src/f32-gavgpool-cw/wasmsimd-arm-x4.c",
965 "src/f32-gavgpool-cw/wasmsimd-x86-x4.c",
Marat Dukhanc6016802020-07-16 18:51:28 -0700966 "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c",
967 "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c",
968 "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c",
969 "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800970 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c",
971 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c",
972 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c",
973 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700974 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
975 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800976 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c",
977 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c",
978 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c",
979 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700980 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
981 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800982 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c",
983 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c",
984 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c",
985 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700986 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
987 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800988 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c",
989 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c",
990 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c",
991 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700992 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
993 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800994 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c",
995 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c",
996 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c",
997 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700998 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
999 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001000 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1001 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1002 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1003 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001004 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c",
1005 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
1006 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1007 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001008 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1009 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1010 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1011 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001012 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1013 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1014 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1015 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1016 "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c",
1017 "src/f32-gemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001018 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1019 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1020 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1021 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001022 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c",
1023 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
1024 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1025 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001026 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1027 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1028 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1029 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001030 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c",
1031 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
1032 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1033 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001034 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1035 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1036 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1037 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001038 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1039 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
XNNPACK Team965272b2020-10-23 21:10:15 -07001040 "src/f32-ibilinear-chw/gen/wasmsimd-p4.c",
1041 "src/f32-ibilinear-chw/gen/wasmsimd-p8.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001042 "src/f32-ibilinear/gen/wasmsimd-c4.c",
1043 "src/f32-ibilinear/gen/wasmsimd-c8.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001044 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1045 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1046 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1047 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001048 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c",
1049 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
1050 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1051 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001052 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1053 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1054 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1055 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001056 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1057 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1058 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1059 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1060 "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c",
1061 "src/f32-igemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001062 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1063 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1064 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1065 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001066 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c",
1067 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
1068 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1069 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001070 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1071 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1072 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1073 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001074 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c",
1075 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
1076 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1077 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001078 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1079 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1080 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1081 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001082 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1083 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhanf6e24802020-07-08 22:20:40 -07001084 "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c",
1085 "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c",
Marat Dukhan1483c532020-07-16 18:08:19 -07001086 "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c",
1087 "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c",
1088 "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c",
1089 "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001090 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1091 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001092 "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c",
1093 "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c",
1094 "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001095 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
1096 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001097 "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c",
1098 "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c",
1099 "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c",
1100 "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c",
1101 "src/f32-prelu/gen/wasmsimd-minmax-1x4.c",
1102 "src/f32-prelu/gen/wasmsimd-minmax-1x8.c",
1103 "src/f32-prelu/gen/wasmsimd-minmax-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001104 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
1105 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001106 "src/f32-prelu/gen/wasmsimd-minmax-2x16.c",
1107 "src/f32-prelu/gen/wasmsimd-minmax-4x4.c",
1108 "src/f32-prelu/gen/wasmsimd-minmax-4x8.c",
1109 "src/f32-prelu/gen/wasmsimd-minmax-4x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001110 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001111 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001112 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001113 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c",
1114 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001115 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001116 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c",
1117 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001118 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001119 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c",
1120 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001121 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c",
Marat Dukhan8c417962020-07-08 12:27:50 -07001122 "src/f32-rmax/wasmsimd-arm.c",
1123 "src/f32-rmax/wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001124 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c",
1125 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001126 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c",
1127 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001128 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001129 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c",
1130 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001131 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c",
1132 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001133 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001134 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c",
1135 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001136 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c",
1137 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001138 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001139 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c",
1140 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001141 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c",
1142 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001143 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001144 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c",
1145 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001146 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c",
1147 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001148 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001149 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c",
1150 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001151 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c",
1152 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001153 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001154 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c",
1155 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001156 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c",
1157 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001158 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001159 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c",
1160 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001161 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c",
1162 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001163 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001164 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
1165 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001166 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001167 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
1168 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001169 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001170 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c",
1171 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001172 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001173 "src/f32-vbinary/gen/vadd-wasmsimd-x4.c",
1174 "src/f32-vbinary/gen/vadd-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001175 "src/f32-vbinary/gen/vadd-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001176 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
1177 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001178 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001179 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
1180 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001181 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001182 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c",
1183 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001184 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001185 "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c",
1186 "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001187 "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001188 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
1189 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001190 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001191 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
1192 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001193 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001194 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c",
1195 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001196 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001197 "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c",
1198 "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001199 "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001200 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
1201 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001202 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001203 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
1204 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001205 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001206 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c",
1207 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001208 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001209 "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c",
1210 "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001211 "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001212 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
1213 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001214 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001215 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
1216 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001217 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001218 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
1219 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001220 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001221 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
1222 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001223 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001224 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
1225 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001226 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001227 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
1228 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001229 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001230 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
1231 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001232 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001233 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
1234 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001235 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001236 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
1237 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001238 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001239 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
1240 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001241 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001242 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c",
1243 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001244 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001245 "src/f32-vbinary/gen/vmul-wasmsimd-x4.c",
1246 "src/f32-vbinary/gen/vmul-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001247 "src/f32-vbinary/gen/vmul-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001248 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
1249 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001250 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001251 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
1252 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001253 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001254 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c",
1255 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001256 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001257 "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c",
1258 "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001259 "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001260 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
1261 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001262 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001263 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
1264 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001265 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001266 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c",
1267 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001268 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001269 "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c",
1270 "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001271 "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001272 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
1273 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001274 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001275 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
1276 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001277 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001278 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c",
1279 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001280 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001281 "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c",
1282 "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001283 "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001284 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
1285 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001286 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001287 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
1288 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001289 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001290 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
1291 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001292 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001293 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
1294 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001295 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001296 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c",
1297 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001298 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001299 "src/f32-vbinary/gen/vsub-wasmsimd-x4.c",
1300 "src/f32-vbinary/gen/vsub-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001301 "src/f32-vbinary/gen/vsub-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001302 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
1303 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001304 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001305 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
1306 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001307 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001308 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c",
1309 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001310 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001311 "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c",
1312 "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001313 "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001314 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
1315 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c",
1316 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c",
1317 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001318 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
1319 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c",
1320 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c",
1321 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c",
1322 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c",
1323 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001324 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c",
1325 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c",
1326 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c",
1327 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c",
1328 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c",
1329 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08001330 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c",
1331 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c",
1332 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c",
1333 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c",
1334 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c",
1335 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001336 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c",
1337 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c",
1338 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c",
1339 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c",
1340 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c",
1341 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001342 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1343 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1344 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001345 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1346 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1347 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1348 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001349 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001350 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001351 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001352 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001353 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1354 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1355 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001356 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1357 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1358 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1359 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001360 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1361 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
1362 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1363 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1364 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1365 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
1366 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1367 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1368 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1369 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001370 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1371 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1372 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1373 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1374 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1375 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1376 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1377 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1378 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1379 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1380 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1381 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001382 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1383 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001384 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1385 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1386 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1387 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1388 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1389 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001390 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1391 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1393 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001394 "src/math/roundd-wasmsimd-addsub.c",
1395 "src/math/roundd-wasmsimd-cvt.c",
1396 "src/math/roundne-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-addsub.c",
1398 "src/math/roundu-wasmsimd-cvt.c",
1399 "src/math/roundz-wasmsimd-addsub.c",
1400 "src/math/roundz-wasmsimd-cvt.c",
1401 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1402 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001403 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
1404 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c",
1405 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
1406 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c",
1407 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
1408 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07001409 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
1410 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
1411 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001412 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
1413 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
1414 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001415 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1416 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1417 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-wasmsimd.c",
1418 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1419 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1420 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-wasmsimd.c",
1421 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1422 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1423 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
1424 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1425 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1426 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1427 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1428 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1429 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001430 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001431 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001432 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1433 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
1434 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
1435 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1436 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1437 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1438 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1439 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001440 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001441 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001442 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001443 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001444 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001445 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001446 "src/x32-zip/x2-wasmsimd.c",
1447 "src/x32-zip/x3-wasmsimd.c",
1448 "src/x32-zip/x4-wasmsimd.c",
1449 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001450]
1451
Marat Dukhan08c4a432019-10-03 09:29:21 -07001452# ISA-specific micro-kernels
1453NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001454 "src/f32-argmaxpool/4x-neon-c4.c",
1455 "src/f32-argmaxpool/9p8x-neon-c4.c",
1456 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001457 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1458 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001462 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001466 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001467 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001469 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001471 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001473 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1475 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1477 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001479 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1489 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1497 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1510 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001520 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001521 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001522 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1523 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1526 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1530 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1531 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1532 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1536 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001537 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1538 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001539 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1540 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1541 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1542 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1546 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1547 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1548 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1552 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1553 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1554 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001555 "src/f32-ibilinear-chw/gen/neon-p4.c",
1556 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001557 "src/f32-ibilinear/gen/neon-c4.c",
1558 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001560 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001562 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1563 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001565 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1567 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1568 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1570 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1572 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001573 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1574 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001575 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1577 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001578 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1579 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001580 "src/f32-prelu/gen/neon-1x4.c",
1581 "src/f32-prelu/gen/neon-1x8.c",
1582 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001583 "src/f32-prelu/gen/neon-2x4.c",
1584 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001585 "src/f32-prelu/gen/neon-2x16.c",
1586 "src/f32-prelu/gen/neon-4x4.c",
1587 "src/f32-prelu/gen/neon-4x8.c",
1588 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001600 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1612 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001613 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001614 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1616 "src/f32-spmm/gen/4x1-minmax-neon.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1619 "src/f32-spmm/gen/8x1-minmax-neon.c",
1620 "src/f32-spmm/gen/12x1-minmax-neon.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1623 "src/f32-spmm/gen/16x1-minmax-neon.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1626 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001627 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1628 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1630 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001631 "src/f32-vbinary/gen/vmax-neon-x4.c",
1632 "src/f32-vbinary/gen/vmax-neon-x8.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1634 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1635 "src/f32-vbinary/gen/vmin-neon-x4.c",
1636 "src/f32-vbinary/gen/vmin-neon-x8.c",
1637 "src/f32-vbinary/gen/vminc-neon-x4.c",
1638 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001639 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1640 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1642 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1644 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001645 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1646 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1648 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001649 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1650 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1652 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001653 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1654 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1660 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1666 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001667 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1669 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001670 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1671 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001672 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1673 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001674 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1675 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001676 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1677 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1679 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1681 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1683 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1701 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001702 "src/f32-vunary/gen/vabs-neon-x4.c",
1703 "src/f32-vunary/gen/vabs-neon-x8.c",
1704 "src/f32-vunary/gen/vneg-neon-x4.c",
1705 "src/f32-vunary/gen/vneg-neon-x8.c",
1706 "src/f32-vunary/gen/vsqr-neon-x4.c",
1707 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001708 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1709 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/math/roundd-neon-addsub.c",
1711 "src/math/roundd-neon-cvt.c",
1712 "src/math/roundne-neon-addsub.c",
1713 "src/math/roundu-neon-addsub.c",
1714 "src/math/roundu-neon-cvt.c",
1715 "src/math/roundz-neon-addsub.c",
1716 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001717 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1719 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1720 "src/math/sqrt-neon-nr1rsqrts.c",
1721 "src/math/sqrt-neon-nr2rsqrts.c",
1722 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001723 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
1724 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
1725 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
1726 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
1727 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
1728 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
1729 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
1730 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001731 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1732 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1733 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1734 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001735 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1736 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1737 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1738 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001739 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1740 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1741 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1742 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1743 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1744 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1745 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1746 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1747 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1748 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1749 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1750 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1751 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1752 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1753 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1754 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1755 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1756 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1757 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1758 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1759 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1760 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1761 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1762 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1763 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1764 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1765 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1766 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1767 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1768 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1769 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1770 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1771 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1772 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1773 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1774 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1775 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1776 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1777 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1778 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1779 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1780 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1781 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1782 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1783 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1784 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1785 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1786 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1787 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1788 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1789 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1790 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1791 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1792 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1793 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1794 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1795 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1796 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1797 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1798 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1799 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1800 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1801 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1802 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1803 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1804 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1805 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1806 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1807 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1808 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1809 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1810 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1811 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1812 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1813 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1814 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1815 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1816 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1817 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1818 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1819 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1820 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1821 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1822 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1823 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1824 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1825 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1826 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1827 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1828 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1829 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1830 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1831 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1832 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1833 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1834 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1835 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1836 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1837 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1838 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1839 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1840 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1841 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1842 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1843 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1844 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1845 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1846 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1847 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1848 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1849 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1850 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1851 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1852 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1853 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1854 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1855 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1856 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1857 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1858 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1859 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1860 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1861 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1862 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1863 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1864 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1865 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1866 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1867 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1868 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1869 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1870 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1871 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1872 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1873 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1874 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001875 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001876 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001877 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07001878 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001879 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1880 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1881 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1882 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1883 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1884 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1885 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1886 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001887 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1888 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1889 "src/qu8-dwconv/up8x9-minmax-neon.c",
1890 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1891 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1892 "src/qu8-gemm/4x8-minmax-neon.c",
1893 "src/qu8-gemm/8x8-minmax-neon.c",
1894 "src/qu8-igemm/4x8-minmax-neon.c",
1895 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001896 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001897 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001898 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001899 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001900 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001901 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001902 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001903 "src/x8-zip/x2-neon.c",
1904 "src/x8-zip/x3-neon.c",
1905 "src/x8-zip/x4-neon.c",
1906 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001907 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001908 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001909 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001910 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001911 "src/x32-zip/x2-neon.c",
1912 "src/x32-zip/x3-neon.c",
1913 "src/x32-zip/x4-neon.c",
1914 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001915]
1916
1917NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001918 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1919 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1920 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1921 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1922 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1923 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1924 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1925 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1926 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1927 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1928 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1929 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1930 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1931 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1932 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1933 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1934 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1935 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1936 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1937 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1938 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1939 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1940 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1941 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1942 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1943 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1944 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1945 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1946 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1947 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001948 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1949 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001950 "src/f32-ibilinear/gen/neonfma-c4.c",
1951 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001952 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001953 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001954 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001955 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1956 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001957 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1958 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001959 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1960 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001961 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1962 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001963 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001964 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001965 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001966 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1967 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001968 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001969 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1970 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001971 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001972 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1973 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001974 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1975 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1976 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1977 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1978 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1979 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1980 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1981 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1982 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1984 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1985 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1986 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08001987 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1988 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
1989 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1990 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1991 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
1992 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1993 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1994 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1995 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
1996 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1997 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
1998 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
1999 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002000 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2001 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2002 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2003 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2004 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2005 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2006 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2007 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2008 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2009 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2010 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2011 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002012 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2013 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002014 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2015 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2016 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2017 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2018 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2019 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2020 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2021 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2022 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2023 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2024 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2025 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2026 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2027 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2028 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2029 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2066 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2067 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002068 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2069 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2070 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2071 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2072 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2073 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2074 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2075 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2076 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2077 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2078 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2079 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2080 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2081 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2082 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2083 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2084 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2085 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2086 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2087 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002088 "src/math/exp-neonfma-rr2-lut64-p2.c",
2089 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002090 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2091 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002092 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2093 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2094 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002095 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2096 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2097 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002098 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2099 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2100 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002101 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2102 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2103 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002104 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2105 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2106 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002107 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2108 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2109 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002110 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2111 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2112 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002113 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002114 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002115 "src/math/sqrt-neonfma-nr2fma.c",
2116 "src/math/sqrt-neonfma-nr2fma1adj.c",
2117 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002118]
2119
2120AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002121 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002122 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002123 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002124 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002125 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002126 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002127 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002128 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002129 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002130 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2131 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
2132 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002133 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002134 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002135 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
2136 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
2137 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
2138 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2139 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002140 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2141 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2142 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002143 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002144 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002145 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2146 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2147 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002148 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2149 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2150 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2151 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002152 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2154 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002155 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002156 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002157 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002158 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002159 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2160 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002161 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2162 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2163 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2164 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2165 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2166 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2167 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2168 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002169 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002170 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002171 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2172 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2173 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2174 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2175 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2176 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2177 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2178 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2179 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2180 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2181 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2182 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2183 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2184 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2185 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2186 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2187 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2188 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2189 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2190 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002191 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2192 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002193 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2194 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2196 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002197 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2198 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002199 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2200 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002201 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2202 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2203 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2204 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2205 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2206 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2209 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2223 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2224 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002225 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2226 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002227 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002228 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002229 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002230 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002231 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002232 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002233]
2234
Marat Dukhan8853b822020-05-07 12:19:01 -07002235NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002236 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2237 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002238 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2239 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2240 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2241 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2242 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2243 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002244 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002245 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002246 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002247 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002248]
2249
Marat Dukhan08c4a432019-10-03 09:29:21 -07002250AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchard5a599a62020-06-04 20:12:44 -07002251 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
2252 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
2253 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2254 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002255 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2256 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2257 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2258 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2259 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2260 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2261 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2262 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002263 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2264 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002265 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
2266 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
2267 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2268 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2269 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2270 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
2271 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2272 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2273 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2274 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2275 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2276 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2277 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2278 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2279 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2280 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002281 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2282 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2283 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2284 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2285 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2286 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2287 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2288 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002289 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002290 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002291 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002292 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002293 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002294 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002295 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002296 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002297 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002298 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2299 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2300 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2301 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2302 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2303 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2304 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2305 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2306 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2307 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2308 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2309 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2310 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2311 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2312 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2313 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2314 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2315 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2316 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2317 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2318 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2319 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2320 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2321 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2322 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2323 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2324 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2325 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2326 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002327 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2328 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002329 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2330 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002331 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2332 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002333 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2334 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002335]
2336
Benoit Jacoba9644732020-08-13 12:48:55 -07002337NEONDOT_UKERNELS = [
Marat Dukhand65d20e2021-05-24 16:59:51 -07002338 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
2339 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
2340 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
2341 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
2342 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
2343 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
2344 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
2345 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
2346 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
2347 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
2348 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
2349 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
2350 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
2351 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
2352 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
2353 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002354]
2355
Marat Dukhan08c4a432019-10-03 09:29:21 -07002356SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -07002357 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
2358 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07002359 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
2360 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002361 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
2362 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
2363 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
2364 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002365 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2366 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002367 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2368 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2369 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2370 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002371 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2372 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002373 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2374 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2375 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002376 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002377 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002378 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2379 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2380 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2381 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2382 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002383 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2384 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2385 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002386 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002387 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002388 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2389 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2390 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002391 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2392 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2393 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2394 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2395 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2396 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2397 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2398 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2399 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2400 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2401 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2402 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2403 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002404 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2405 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2406 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2407 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2408 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2409 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2410 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2411 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002412 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002413 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002414 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002415 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2416 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002417 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2418 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2419 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002420 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2421 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2422 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002423 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2424 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2425 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002426 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2427 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2428 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002429 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2430 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2431 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002432 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2433 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2434 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002435 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2436 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2437 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2438 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002439 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2440 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2441 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002442 "src/f32-ibilinear-chw/gen/sse-p4.c",
2443 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002444 "src/f32-ibilinear/gen/sse-c4.c",
2445 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002446 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2447 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2448 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002449 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2450 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2451 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002452 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2453 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2454 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2455 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002456 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2457 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2458 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002459 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2460 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2461 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002462 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002463 "src/f32-prelu/gen/sse-2x4.c",
2464 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002465 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002466 "src/f32-spmm/gen/4x1-minmax-sse.c",
2467 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002468 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002469 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002470 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2471 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2472 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2473 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2474 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2475 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2476 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2477 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002478 "src/f32-vbinary/gen/vmax-sse-x4.c",
2479 "src/f32-vbinary/gen/vmax-sse-x8.c",
2480 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2481 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2482 "src/f32-vbinary/gen/vmin-sse-x4.c",
2483 "src/f32-vbinary/gen/vmin-sse-x8.c",
2484 "src/f32-vbinary/gen/vminc-sse-x4.c",
2485 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002486 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2487 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2488 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2489 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2490 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2491 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2492 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2493 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002494 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2495 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2496 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2497 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002498 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2499 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2500 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2501 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002502 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2503 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002504 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2505 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002506 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2507 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002508 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2509 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002510 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2511 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002512 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2513 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002514 "src/f32-vunary/gen/vabs-sse-x4.c",
2515 "src/f32-vunary/gen/vabs-sse-x8.c",
2516 "src/f32-vunary/gen/vneg-sse-x4.c",
2517 "src/f32-vunary/gen/vneg-sse-x8.c",
2518 "src/f32-vunary/gen/vsqr-sse-x4.c",
2519 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002520 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002521 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002522 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002523 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002524 "src/math/sqrt-sse-hh1mac.c",
2525 "src/math/sqrt-sse-nr1mac.c",
2526 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002527 "src/x32-fill/sse.c",
2528 "src/x32-packx/x4-sse.c",
2529 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002530]
2531
2532SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002533 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002534 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002535 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002536 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2537 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2538 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2539 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2540 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2541 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2542 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2543 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2544 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2545 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2546 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2547 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002548 "src/f32-prelu/gen/sse2-2x4.c",
2549 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002550 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002551 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002552 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002553 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2554 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002555 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002556 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2557 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002558 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002559 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2560 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002561 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002562 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2563 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2564 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2565 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2566 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2567 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2568 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2569 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2570 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2571 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2572 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2573 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002574 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2575 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002576 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2577 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002578 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2579 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2580 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2581 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2582 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2583 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002584 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2585 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2586 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2587 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2588 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2589 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2590 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2591 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2592 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2593 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2594 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2595 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002596 "src/math/exp-sse2-rr2-lut64-p2.c",
2597 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002598 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002599 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002600 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002601 "src/math/roundd-sse2-cvt.c",
2602 "src/math/roundne-sse2-cvt.c",
2603 "src/math/roundu-sse2-cvt.c",
2604 "src/math/roundz-sse2-cvt.c",
2605 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2606 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2607 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2608 "src/math/sigmoid-sse2-rr2-p5-div.c",
2609 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2610 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002611 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002612 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002613 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2614 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2615 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002616 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002617 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2618 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2619 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2620 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2621 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2622 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002623 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2624 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2625 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002626 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2627 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2628 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002629 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2630 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002631 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002632 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002633 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002634 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2635 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002636 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002637 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002638 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002639 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2640 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002641 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002642 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002643 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002644 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
2645 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002646 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002647 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002648 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002649 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2650 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002651 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002652 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002653 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002654 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2655 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002656 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002657 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002658 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002659 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
2660 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002661 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002662 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002663 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002664 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2665 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002666 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002667 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
2668 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2669 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002670 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002671 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
2672 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2673 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002674 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002675 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
2676 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
2677 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002678 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002679 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
2680 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2681 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002682 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002683 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
2684 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2685 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002686 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002687 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
2688 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
2689 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002690 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002691 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002692 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002693 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002694 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002695 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2696 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2697 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2698 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002699 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2700 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2701 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2702 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002703 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2704 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002705 "src/qu8-dwconv/up8x9-minmax-sse2.c",
2706 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2707 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
2708 "src/qu8-gemm/2x4c8-minmax-sse2.c",
2709 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002710 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002711 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002712 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002713 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002714 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002715 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002716 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002717 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002718 "src/x8-zip/x2-sse2.c",
2719 "src/x8-zip/x3-sse2.c",
2720 "src/x8-zip/x4-sse2.c",
2721 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002722 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002723 "src/x32-zip/x2-sse2.c",
2724 "src/x32-zip/x3-sse2.c",
2725 "src/x32-zip/x4-sse2.c",
2726 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07002727]
2728
2729SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07002730 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
2731 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c",
2732 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002733 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002734 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002735 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
2736 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c",
2737 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c",
2738 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
2739 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002740 "src/qs8-dwconv/gen/up16x25-minmax-fp32-ssse3-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002741 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002742 "src/qs8-dwconv/gen/up16x9-minmax-fp32-ssse3-mul16.c",
2743 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
2744 "src/qs8-dwconv/gen/up24x25-minmax-fp32-ssse3-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002745 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002746 "src/qs8-dwconv/gen/up24x9-minmax-fp32-ssse3-mul16.c",
2747 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
2748 "src/qs8-dwconv/gen/up8x25-minmax-fp32-ssse3-mul16.c",
2749 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c",
2750 "src/qs8-dwconv/gen/up8x9-minmax-fp32-ssse3-mul16.c",
2751 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002752 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
2753 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
2754 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002755 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
2756 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c",
2757 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002758 "src/qs8-gemm/gen/1x4c2-minmax-fp32-ssse3-ld128.c",
2759 "src/qs8-gemm/gen/1x4c2-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002760 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002761 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002762 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002763 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
2764 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002765 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002766 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002767 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002768 "src/qs8-gemm/gen/2x4c2-minmax-fp32-ssse3-ld128.c",
2769 "src/qs8-gemm/gen/2x4c2-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002770 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002771 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002772 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002773 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
2774 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002775 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002776 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002777 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002778 "src/qs8-gemm/gen/3x4c2-minmax-fp32-ssse3-ld128.c",
2779 "src/qs8-gemm/gen/3x4c2-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002780 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002781 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002782 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002783 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
2784 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002785 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002786 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002787 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002788 "src/qs8-gemm/gen/4x4c2-minmax-fp32-ssse3-ld128.c",
2789 "src/qs8-gemm/gen/4x4c2-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002790 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002791 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002792 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002793 "src/qs8-igemm/gen/1x4c2-minmax-fp32-ssse3-ld128.c",
2794 "src/qs8-igemm/gen/1x4c2-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002795 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002796 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
2797 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
2798 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002799 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002800 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
2801 "src/qs8-igemm/gen/2x4c2-minmax-fp32-ssse3-ld128.c",
2802 "src/qs8-igemm/gen/2x4c2-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002803 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002804 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
2805 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
2806 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002807 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002808 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
2809 "src/qs8-igemm/gen/3x4c2-minmax-fp32-ssse3-ld128.c",
2810 "src/qs8-igemm/gen/3x4c2-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002811 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002812 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
2813 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
2814 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002815 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002816 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
2817 "src/qs8-igemm/gen/4x4c2-minmax-fp32-ssse3-ld128.c",
2818 "src/qs8-igemm/gen/4x4c2-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002819 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002820 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002821 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002822 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002823 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002824 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002825]
2826
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002827SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08002828 "src/f32-prelu/gen/sse41-2x4.c",
2829 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002830 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
2831 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
2832 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
2833 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
2834 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
2835 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
2836 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
2837 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
2838 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
2839 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
2840 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
2841 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002842 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
2843 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002844 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2845 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002846 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
2847 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
2848 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
2849 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
2850 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2851 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002852 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
2853 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
2854 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
2855 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2856 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2857 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2858 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
2859 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
2860 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2861 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2862 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2863 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002864 "src/math/roundd-sse41.c",
2865 "src/math/roundne-sse41.c",
2866 "src/math/roundu-sse41.c",
2867 "src/math/roundz-sse41.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002868 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2869 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002870 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2871 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002872 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2873 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2874 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2875 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2876 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2877 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002878 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
2879 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002880 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2881 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2882 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2883 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2884 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2885 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2886 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
2887 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
2888 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2889 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2890 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
2891 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002892 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
2893 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
2894 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002895 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
2896 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
2897 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002898 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2899 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002900 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002901 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002902 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002903 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
2904 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002905 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002906 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002907 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002908 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
2909 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002910 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002911 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002912 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002913 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
2914 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002915 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002916 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002917 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002918 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
2919 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002920 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002921 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002922 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002923 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
2924 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002925 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002926 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002927 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002928 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
2929 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002930 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002931 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002932 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002933 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2934 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002935 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002936 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
2937 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
2938 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002939 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002940 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
2941 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
2942 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002943 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002944 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
2945 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
2946 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002947 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002948 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
2949 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
2950 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002951 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002952 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
2953 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
2954 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002955 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002956 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
2957 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
2958 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002959 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002960 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002961 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002962 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002963 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07002964 "src/qs8-requantization/rndnu-sse4.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002965 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
2966 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
2967 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
2968 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07002969 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
2970 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
2971 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
2972 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002973 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
2974 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
2975 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
2976 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07002977 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
2978 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
2979 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
2980 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002981 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002982 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002983]
2984
Marat Dukhan08c4a432019-10-03 09:29:21 -07002985AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07002986 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
2987 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002988 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
2989 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002990 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
2991 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002992 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
2993 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
2994 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
2995 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
2996 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
2997 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002998 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002999 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3000 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003001 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003002 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003003 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003004 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003005 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3006 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3007 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3008 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3009 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3010 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3011 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3012 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3013 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3014 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3015 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003016 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003017 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3018 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003019 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003020 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003021 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003022 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003023 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3024 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003025 "src/f32-prelu/gen/avx-2x8.c",
3026 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003027 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003028 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3029 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3030 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3031 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3032 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3033 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3034 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3035 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003036 "src/f32-vbinary/gen/vmax-avx-x8.c",
3037 "src/f32-vbinary/gen/vmax-avx-x16.c",
3038 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3039 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3040 "src/f32-vbinary/gen/vmin-avx-x8.c",
3041 "src/f32-vbinary/gen/vmin-avx-x16.c",
3042 "src/f32-vbinary/gen/vminc-avx-x8.c",
3043 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003044 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3045 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3046 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3047 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3048 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3049 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3050 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3051 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003052 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3053 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3054 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3055 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003056 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3057 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3058 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3059 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003060 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3061 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003062 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3063 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3064 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3065 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3066 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3067 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3068 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3069 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3070 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3071 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3072 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3073 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3074 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3075 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3076 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3077 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3078 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3079 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003080 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3081 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003082 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3083 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003084 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3085 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003086 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3087 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003088 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3089 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3090 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3091 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3092 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3093 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003094 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003095 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3096 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3097 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3098 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3099 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3100 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3101 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3102 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3103 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3104 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3105 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3106 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3107 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3108 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3109 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3110 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3111 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3112 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3113 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3114 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003115 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3116 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003117 "src/f32-vunary/gen/vabs-avx-x8.c",
3118 "src/f32-vunary/gen/vabs-avx-x16.c",
3119 "src/f32-vunary/gen/vneg-avx-x8.c",
3120 "src/f32-vunary/gen/vneg-avx-x16.c",
3121 "src/f32-vunary/gen/vsqr-avx-x8.c",
3122 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003123 "src/math/exp-avx-rr2-p5.c",
3124 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3125 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3126 "src/math/expm1minus-avx-rr2-p6.c",
3127 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3128 "src/math/sigmoid-avx-rr2-p5-div.c",
3129 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3130 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003131 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3132 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003133 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3134 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003135 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3136 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3137 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3138 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3139 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3140 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003141 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3142 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003143 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3144 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3145 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3146 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3147 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3148 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3149 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3150 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3151 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3152 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3153 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3154 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003155 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3156 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003157 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003158 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003159 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003160 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3161 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003162 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003163 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003164 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003165 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3166 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003167 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003168 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003169 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003170 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3171 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003172 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003173 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003174 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003175 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3176 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003177 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003178 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003179 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003180 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3181 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003182 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003183 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003184 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003185 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3186 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003187 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003188 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003189 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003190 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3191 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003192 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003193 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3194 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3195 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003196 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003197 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3198 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3199 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003200 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003201 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3202 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3203 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003204 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003205 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3206 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3207 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003208 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003209 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3210 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3211 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003212 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003213 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3214 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3215 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003216 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003217 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003218 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3219 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3220 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3221 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3222 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3223 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3224 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3225 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3226 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3227 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3228 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3229 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3230 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3231 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3232 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3233 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003234]
3235
Marat Dukhan1566fee2020-08-02 21:55:41 -07003236XOP_UKERNELS = [
Marat Dukhancaf48312021-06-01 20:20:58 -07003237 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003238 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003239 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3240 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3241 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003242 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003243 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3244 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3245 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3246 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3247 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3248 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003249 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3250 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003251 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003252 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003253 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003254 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3255 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003256 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003257 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003258 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003259 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3260 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003261 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003262 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003263 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003264 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3265 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003266 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003267 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003268 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003269 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3270 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003271 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003272 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003273 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003274 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3275 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003276 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003277 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003278 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003279 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3280 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003281 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003282 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003283 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003284 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3285 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003286 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003287 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
3288 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3289 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003290 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003291 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
3292 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3293 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003294 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003295 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
3296 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3297 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003298 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003299 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
3300 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3301 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003302 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003303 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
3304 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3305 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003306 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003307 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
3308 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3309 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003310 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003311 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003312 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3313 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3314 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3315 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3316 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3317 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3318 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3319 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003320]
3321
Marat Dukhanfda12b82019-11-21 12:27:59 -08003322FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003323 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
3324 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003325 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3326 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003327 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3328 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003329 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
3330 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
3331 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
3332 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
3333 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3334 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003335 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003336 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3337 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3338 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3339 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003340 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003341 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
3342 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003343 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003344 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
3345 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003346 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3347 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3348 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003349 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3350 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3351 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3352 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3353 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3354 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3355 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3356 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3357 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3358 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3359 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3360 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3361 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3362 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003363 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003364 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3365 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3366 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3367 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003368 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003369 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3370 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003371 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003372 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3373 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003374 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3375 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3376 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003377 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3378 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003379 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3380 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3381 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3382 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3383 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3384 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3385 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3386 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003387 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003388 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003389 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003390]
3391
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003392AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003393 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
3394 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003395 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003396 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003397 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003398 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
3399 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003400 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003401 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
3402 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
3403 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003404 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003405 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
3406 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003407 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003408 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003409 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003410 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3411 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003412 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003413 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3414 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3415 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003416 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003417 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3418 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003419 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003420 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003421 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003422 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3423 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003424 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003425 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3426 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3427 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003428 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003429 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3430 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3431 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3432 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3433 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3434 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3435 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3436 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3437 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3438 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3439 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3440 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3441 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3442 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3443 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3444 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3445 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3446 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3447 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3448 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3449 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3450 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3451 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3452 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3453 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3454 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3455 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3456 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3457 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3458 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3459 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3460 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3461 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3462 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3463 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3464 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3465 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3466 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3467 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3468 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003469 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3470 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3471 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3472 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3473 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3474 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3475 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3476 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3477 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3478 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3479 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3480 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3481 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3482 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3483 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3484 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3485 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3486 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3487 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3488 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3489 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3490 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3491 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3492 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003493 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3494 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3495 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3496 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3497 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3498 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3499 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3500 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3501 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3502 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3503 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3504 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3505 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3506 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3507 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3508 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3509 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3510 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3511 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3512 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3513 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3514 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3515 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3516 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3517 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3518 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3519 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3520 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3521 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3522 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003523 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3524 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3525 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003526 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3527 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3528 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3529 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003530 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003531 "src/math/extexp-avx2-p5.c",
3532 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3533 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3534 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3535 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3536 "src/math/sigmoid-avx2-rr1-p5-div.c",
3537 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3538 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3539 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3540 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3541 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3542 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3543 "src/math/sigmoid-avx2-rr2-p5-div.c",
3544 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3545 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003546 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003547 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003548 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003549 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003550 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003551 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003552 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3553 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003554 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003555 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003556 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3557 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003558 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003559 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003560 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003561 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003562 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003563 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003564 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3565 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003566 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003567 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003568 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3569 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003570 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003571 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003572 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003573 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003574 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003575 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003576 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003577 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003578 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003579 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003580 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003581 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003582 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003583 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003584 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003585 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3586 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3587 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3588 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3589 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3590 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3591 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3592 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003593]
3594
Marat Dukhan08c4a432019-10-03 09:29:21 -07003595AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003596 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3597 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003598 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3599 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003600 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3601 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003602 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3603 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3604 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3605 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3606 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3607 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003608 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3609 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3610 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3611 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3612 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3613 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003614 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3615 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3616 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3617 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3618 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3619 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003620 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3621 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3622 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3623 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3624 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3625 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003626 "src/f32-prelu/gen/avx512f-2x16.c",
3627 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003628 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3629 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003630 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003631 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003632 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003633 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3634 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003635 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003636 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3637 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3638 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003639 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003640 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3641 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003642 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003643 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003644 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003645 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3646 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003647 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003648 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3649 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3650 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003651 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003652 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3653 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003654 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003655 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003656 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003657 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3658 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003659 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003660 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3661 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3662 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003663 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003664 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003665 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3666 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3667 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3668 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3669 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3670 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3671 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3672 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003673 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3674 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3675 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3676 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3677 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3678 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3679 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3680 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003681 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3682 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3683 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3684 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3685 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3686 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3687 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3688 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003689 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3690 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3691 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3692 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003693 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3694 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3695 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3696 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003697 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3698 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003699 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3700 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3701 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3702 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3703 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3704 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3705 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3706 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3707 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3708 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3709 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3710 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3711 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3712 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3713 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3714 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003715 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3716 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003717 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3718 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003719 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3720 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003721 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3722 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3723 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3724 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3725 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3726 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3727 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3728 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003729 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003730 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3731 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3732 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3733 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3734 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3735 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3736 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3737 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3738 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3739 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3740 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3741 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3742 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3743 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3744 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3745 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3746 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3747 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3748 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3749 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3750 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3751 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3752 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3753 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003754 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3755 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3756 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3757 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3758 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3759 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3760 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3761 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3762 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3763 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3764 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3765 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3766 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3767 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3768 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3769 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3770 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3771 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3772 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3773 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3774 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3775 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3776 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3777 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3778 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3779 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3780 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3781 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3782 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3783 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3784 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3785 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3786 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3787 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3788 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3789 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3790 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3791 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3792 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3793 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3794 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3795 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3796 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3797 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3798 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
3799 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
3800 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
3801 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003802 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
3803 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
3804 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
3805 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
3806 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
3807 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
3808 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
3809 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003810 "src/f32-vunary/gen/vabs-avx512f-x16.c",
3811 "src/f32-vunary/gen/vabs-avx512f-x32.c",
3812 "src/f32-vunary/gen/vneg-avx512f-x16.c",
3813 "src/f32-vunary/gen/vneg-avx512f-x32.c",
3814 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
3815 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003816 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
3817 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
3818 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
3819 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
3820 "src/math/exp-avx512f-rr2-p5-scalef.c",
3821 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003822 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
3823 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07003824 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003825 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003826 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003827 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003828 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003829 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003830 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003831 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003832 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003833 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
3834 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
3835 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
3836 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
3837 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
3838 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
3839 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
3840 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
3841 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
3842 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003843 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003844 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003845 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
3846 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
3847 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
3848 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003849 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003850 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003851 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003852]
3853
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003854AVX512SKX_UKERNELS = [
Marat Dukhan71855ee2021-05-25 19:05:06 -07003855 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003856 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003857 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003858 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003859 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003860 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003861 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003862 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003863 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003864 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003865 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003866 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003867 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003868 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003869 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003870 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003871 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003872 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003873 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003874 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003875 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003876 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003877 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003878 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003879]
3880
Frank Barchardbcedc082020-08-17 18:00:51 -07003881WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07003882 "src/f32-vrelu/wasm_shr_x1.S",
3883 "src/f32-vrelu/wasm_shr_x2.S",
3884 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07003885]
3886
Marat Dukhan08c4a432019-10-03 09:29:21 -07003887AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07003888 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07003889 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003890 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
3891 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003892 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003893 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07003894 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003895 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003896 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
3897 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07003898 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
3899 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
3900 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
3901 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003902]
3903
3904AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003905 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003906 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003907 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003908 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07003909 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003910 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -07003911 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003912 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
3913 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
3914 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
3915 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
3916 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
3917 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
3918 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003919 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
3920 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003921 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3922 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3923 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003924 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
3925 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003926 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3927 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
3928 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3929 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003930 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003931 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
3932 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003933 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
3934 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
3935 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
3936 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003937 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003938 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003939 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003940 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003941 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
3942 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
3943 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
3944 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
3945 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
3946 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
3947 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
3948 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
3949 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
3950 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
3951 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
3952 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
3953 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
3954 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
3955 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
3956 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
3957 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
3958 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
3959 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
3960 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
3961 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
3962 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003963 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003964 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003965 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
3966 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07003967 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
3968 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
3969 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
3970 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
3971 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
3972 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003973 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
3974 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
3975 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
3976 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003977 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
3978 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003979 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3980 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3981 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3982 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07003983 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3984 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003985 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3986 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3987 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3988 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07003989 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
3990 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003991 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
3992 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07003993 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
3994 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3995 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003996 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3997 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3998 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3999 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
4000 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4001 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4002 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4003 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004004 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004005 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4006 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004007 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4008 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004009]
4010
Marat Dukhan1b354632020-03-23 12:50:22 -07004011INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004012 "src/xnnpack/argmaxpool.h",
4013 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004014 "src/xnnpack/common.h",
4015 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004016 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004017 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004018 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004019 "src/xnnpack/gavgpool.h",
4020 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004021 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004022 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004023 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004024 "src/xnnpack/lut.h",
4025 "src/xnnpack/math.h",
4026 "src/xnnpack/maxpool.h",
4027 "src/xnnpack/packx.h",
4028 "src/xnnpack/pad.h",
4029 "src/xnnpack/params.h",
4030 "src/xnnpack/pavgpool.h",
4031 "src/xnnpack/ppmm.h",
4032 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004033 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004034 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004035 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004036 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004037 "src/xnnpack/spmm.h",
4038 "src/xnnpack/unpool.h",
4039 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004040 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004041 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004042 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004043 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004044 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004045 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004046 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004047]
4048
4049INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004050 "include/xnnpack.h",
4051 "src/xnnpack/allocator.h",
4052 "src/xnnpack/compute.h",
4053 "src/xnnpack/im2col.h",
4054 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004055 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004056 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004057 "src/xnnpack/operator.h",
4058 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004059 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004060 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004061 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004062 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004063]
4064
Marat Dukhan1b354632020-03-23 12:50:22 -07004065ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004066 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004067]
4068
Marat Dukhan1b354632020-03-23 12:50:22 -07004069MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004070 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004071 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004072]
4073
Marat Dukhan1b354632020-03-23 12:50:22 -07004074MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004075 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004076 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004077 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004078 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004079]
4080
4081OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004082 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004083 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004084]
4085
4086WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004087 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004088 "src/xnnpack/operator.h",
4089 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004090]
4091
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004092LOGGING_COPTS = select({
4093 # No logging in optimized mode
4094 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4095 # Full logging in debug mode
4096 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4097 # Error-only logging in default (fastbuild) mode
4098 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4099})
4100
Marat Dukhan3b59de22020-06-03 20:15:19 -07004101LOGGING_SRCS = select({
4102 # No logging in optimized mode
4103 ":optimized_build": [],
4104 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004105 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004106 "src/operator-strings.c",
4107 "src/subgraph-strings.c",
4108 ],
4109})
4110
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004111LOGGING_HDRS = [
4112 "src/xnnpack/log.h",
4113]
4114
Marat Dukhan08c4a432019-10-03 09:29:21 -07004115xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004116 name = "tables",
4117 srcs = TABLE_SRCS,
4118 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004119 gcc_copts = xnnpack_gcc_std_copts(),
4120 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004121)
4122
4123xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004124 name = "scalar_ukernels",
4125 srcs = SCALAR_UKERNELS,
4126 hdrs = INTERNAL_HDRS,
4127 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004128 gcc_copts = xnnpack_gcc_std_copts(),
4129 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004130 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004131 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004132 "@FP16",
4133 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004134 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004135 ],
4136)
4137
4138xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004139 name = "scalar_ukernels_test_mode",
4140 srcs = SCALAR_UKERNELS,
4141 hdrs = INTERNAL_HDRS,
4142 aarch32_copts = ["-marm"],
4143 copts = [
4144 "-UNDEBUG",
4145 "-DXNN_TEST_MODE=1",
4146 ],
4147 gcc_copts = xnnpack_gcc_std_copts(),
4148 msvc_copts = xnnpack_msvc_std_copts(),
4149 deps = [
4150 ":tables",
4151 "@FP16",
4152 "@FXdiv",
4153 "@pthreadpool",
4154 ],
4155)
4156
4157xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004158 name = "wasm_ukernels",
4159 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004160 gcc_copts = xnnpack_gcc_std_copts(),
4161 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004162 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004163 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004164 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004165 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004166 "@FP16",
4167 "@FXdiv",
4168 "@pthreadpool",
4169 ],
4170)
4171
4172xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004173 name = "wasm_ukernels_test_mode",
4174 hdrs = INTERNAL_HDRS,
4175 copts = [
4176 "-UNDEBUG",
4177 "-DXNN_TEST_MODE=1",
4178 ],
4179 gcc_copts = xnnpack_gcc_std_copts(),
4180 msvc_copts = xnnpack_msvc_std_copts(),
4181 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004182 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004183 deps = [
4184 ":tables",
4185 "@FP16",
4186 "@FXdiv",
4187 "@pthreadpool",
4188 ],
4189)
4190
4191xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004192 name = "neon_ukernels",
4193 hdrs = INTERNAL_HDRS,
4194 aarch32_copts = [
4195 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004196 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004197 "-mfpu=neon",
4198 ],
4199 aarch32_srcs = NEON_UKERNELS,
4200 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004201 gcc_copts = xnnpack_gcc_std_copts(),
4202 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004203 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004204 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004205 "@FP16",
4206 "@pthreadpool",
4207 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004208)
4209
4210xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004211 name = "neon_ukernels_test_mode",
4212 hdrs = INTERNAL_HDRS,
4213 aarch32_copts = [
4214 "-marm",
4215 "-march=armv7-a",
4216 "-mfpu=neon",
4217 ],
4218 aarch32_srcs = NEON_UKERNELS,
4219 aarch64_srcs = NEON_UKERNELS,
4220 copts = [
4221 "-UNDEBUG",
4222 "-DXNN_TEST_MODE=1",
4223 ],
4224 gcc_copts = xnnpack_gcc_std_copts(),
4225 msvc_copts = xnnpack_msvc_std_copts(),
4226 deps = [
4227 ":tables",
4228 "@FP16",
4229 "@pthreadpool",
4230 ],
4231)
4232
4233xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004234 name = "neonfma_ukernels",
4235 hdrs = INTERNAL_HDRS,
4236 aarch32_copts = [
4237 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004238 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004239 "-mfpu=neon-vfpv4",
4240 ],
4241 aarch32_srcs = NEONFMA_UKERNELS,
4242 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004243 apple_aarch32_copts = [
4244 "-mcpu=swift",
4245 "-mtune=generic",
4246 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004247 gcc_copts = xnnpack_gcc_std_copts(),
4248 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004249 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004250 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004251 "@FP16",
4252 "@pthreadpool",
4253 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004254)
4255
4256xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004257 name = "neonfma_ukernels_test_mode",
4258 hdrs = INTERNAL_HDRS,
4259 aarch32_copts = [
4260 "-marm",
4261 "-march=armv7-a",
4262 "-mfpu=neon-vfpv4",
4263 ],
4264 aarch32_srcs = NEONFMA_UKERNELS,
4265 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004266 apple_aarch32_copts = [
4267 "-mcpu=swift",
4268 "-mtune=generic",
4269 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004270 copts = [
4271 "-UNDEBUG",
4272 "-DXNN_TEST_MODE=1",
4273 ],
4274 gcc_copts = xnnpack_gcc_std_copts(),
4275 msvc_copts = xnnpack_msvc_std_copts(),
4276 deps = [
4277 ":tables",
4278 "@FP16",
4279 "@pthreadpool",
4280 ],
4281)
4282
4283xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004284 name = "neonv8_ukernels",
4285 hdrs = INTERNAL_HDRS,
4286 aarch32_copts = [
4287 "-marm",
4288 "-march=armv8-a",
4289 "-mfpu=neon-fp-armv8",
4290 ],
4291 aarch32_srcs = NEONV8_UKERNELS,
4292 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004293 apple_aarch32_copts = [
4294 "-mcpu=cyclone",
4295 "-mtune=generic",
4296 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004297 gcc_copts = xnnpack_gcc_std_copts(),
4298 msvc_copts = xnnpack_msvc_std_copts(),
4299 deps = [
4300 ":tables",
4301 "@FP16",
4302 "@pthreadpool",
4303 ],
4304)
4305
4306xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004307 name = "neonv8_ukernels_test_mode",
4308 hdrs = INTERNAL_HDRS,
4309 aarch32_copts = [
4310 "-marm",
4311 "-march=armv8-a",
4312 "-mfpu=neon-fp-armv8",
4313 ],
4314 aarch32_srcs = NEONV8_UKERNELS,
4315 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004316 apple_aarch32_copts = [
4317 "-mcpu=cyclone",
4318 "-mtune=generic",
4319 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004320 copts = [
4321 "-UNDEBUG",
4322 "-DXNN_TEST_MODE=1",
4323 ],
4324 gcc_copts = xnnpack_gcc_std_copts(),
4325 msvc_copts = xnnpack_msvc_std_copts(),
4326 deps = [
4327 ":tables",
4328 "@FP16",
4329 "@pthreadpool",
4330 ],
4331)
4332
4333xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004334 name = "neonfp16arith_ukernels",
4335 hdrs = INTERNAL_HDRS,
4336 aarch64_copts = ["-march=armv8.2-a+fp16"],
4337 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004338 gcc_copts = xnnpack_gcc_std_copts(),
4339 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004340 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004341 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004342 "@FP16",
4343 "@pthreadpool",
4344 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004345)
4346
4347xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004348 name = "neonfp16arith_ukernels_test_mode",
4349 hdrs = INTERNAL_HDRS,
4350 aarch64_copts = ["-march=armv8.2-a+fp16"],
4351 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4352 copts = [
4353 "-UNDEBUG",
4354 "-DXNN_TEST_MODE=1",
4355 ],
4356 gcc_copts = xnnpack_gcc_std_copts(),
4357 msvc_copts = xnnpack_msvc_std_copts(),
4358 deps = [
4359 ":tables",
4360 "@FP16",
4361 "@pthreadpool",
4362 ],
4363)
4364
4365xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004366 name = "neondot_ukernels",
4367 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004368 aarch32_copts = [
4369 "-marm",
4370 "-march=armv8.2-a+dotprod",
4371 "-mfpu=neon-fp-armv8",
4372 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004373 aarch32_srcs = NEONDOT_UKERNELS,
4374 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4375 aarch64_srcs = NEONDOT_UKERNELS,
4376 gcc_copts = xnnpack_gcc_std_copts(),
4377 msvc_copts = xnnpack_msvc_std_copts(),
4378 deps = [
4379 ":tables",
4380 "@FP16",
4381 "@pthreadpool",
4382 ],
4383)
4384
4385xnnpack_cc_library(
4386 name = "neondot_ukernels_test_mode",
4387 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004388 aarch32_copts = [
4389 "-marm",
4390 "-march=armv8.2-a+dotprod",
4391 "-mfpu=neon-fp-armv8",
4392 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004393 aarch32_srcs = NEONDOT_UKERNELS,
4394 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4395 aarch64_srcs = NEONDOT_UKERNELS,
4396 copts = [
4397 "-UNDEBUG",
4398 "-DXNN_TEST_MODE=1",
4399 ],
4400 gcc_copts = xnnpack_gcc_std_copts(),
4401 msvc_copts = xnnpack_msvc_std_copts(),
4402 deps = [
4403 ":tables",
4404 "@FP16",
4405 "@pthreadpool",
4406 ],
4407)
4408
4409xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004410 name = "sse2_ukernels",
4411 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004412 gcc_copts = xnnpack_gcc_std_copts(),
4413 gcc_x86_copts = ["-msse2"],
4414 msvc_copts = xnnpack_msvc_std_copts(),
4415 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004416 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004417 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004418 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004419 "@FP16",
4420 "@pthreadpool",
4421 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004422)
4423
4424xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004425 name = "sse2_ukernels_test_mode",
4426 hdrs = INTERNAL_HDRS,
4427 copts = [
4428 "-UNDEBUG",
4429 "-DXNN_TEST_MODE=1",
4430 ],
4431 gcc_copts = xnnpack_gcc_std_copts(),
4432 gcc_x86_copts = ["-msse2"],
4433 msvc_copts = xnnpack_msvc_std_copts(),
4434 msvc_x86_32_copts = ["/arch:SSE2"],
4435 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4436 deps = [
4437 ":tables",
4438 "@FP16",
4439 "@pthreadpool",
4440 ],
4441)
4442
4443xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004444 name = "ssse3_ukernels",
4445 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004446 gcc_copts = xnnpack_gcc_std_copts(),
4447 gcc_x86_copts = ["-mssse3"],
4448 msvc_copts = xnnpack_msvc_std_copts(),
4449 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004450 x86_srcs = SSSE3_UKERNELS,
4451 deps = [
4452 ":tables",
4453 "@FP16",
4454 "@pthreadpool",
4455 ],
4456)
4457
4458xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004459 name = "ssse3_ukernels_test_mode",
4460 hdrs = INTERNAL_HDRS,
4461 copts = [
4462 "-UNDEBUG",
4463 "-DXNN_TEST_MODE=1",
4464 ],
4465 gcc_copts = xnnpack_gcc_std_copts(),
4466 gcc_x86_copts = ["-mssse3"],
4467 msvc_copts = xnnpack_msvc_std_copts(),
4468 msvc_x86_32_copts = ["/arch:SSE2"],
4469 x86_srcs = SSSE3_UKERNELS,
4470 deps = [
4471 ":tables",
4472 "@FP16",
4473 "@pthreadpool",
4474 ],
4475)
4476
4477xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004478 name = "sse41_ukernels",
4479 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004480 gcc_copts = xnnpack_gcc_std_copts(),
4481 gcc_x86_copts = ["-msse4.1"],
4482 msvc_copts = xnnpack_msvc_std_copts(),
4483 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004484 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004485 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004486 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004487 "@FP16",
4488 "@pthreadpool",
4489 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004490)
4491
4492xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004493 name = "sse41_ukernels_test_mode",
4494 hdrs = INTERNAL_HDRS,
4495 copts = [
4496 "-UNDEBUG",
4497 "-DXNN_TEST_MODE=1",
4498 ],
4499 gcc_copts = xnnpack_gcc_std_copts(),
4500 gcc_x86_copts = ["-msse4.1"],
4501 msvc_copts = xnnpack_msvc_std_copts(),
4502 msvc_x86_32_copts = ["/arch:SSE2"],
4503 x86_srcs = SSE41_UKERNELS,
4504 deps = [
4505 ":tables",
4506 "@FP16",
4507 "@pthreadpool",
4508 ],
4509)
4510
4511xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004512 name = "avx_ukernels",
4513 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004514 gcc_copts = xnnpack_gcc_std_copts(),
4515 gcc_x86_copts = ["-mavx"],
4516 msvc_copts = xnnpack_msvc_std_copts(),
4517 msvc_x86_32_copts = ["/arch:AVX"],
4518 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004519 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004520 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004521 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004522 "@FP16",
4523 "@pthreadpool",
4524 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004525)
4526
4527xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004528 name = "avx_ukernels_test_mode",
4529 hdrs = INTERNAL_HDRS,
4530 copts = [
4531 "-UNDEBUG",
4532 "-DXNN_TEST_MODE=1",
4533 ],
4534 gcc_copts = xnnpack_gcc_std_copts(),
4535 gcc_x86_copts = ["-mavx"],
4536 msvc_copts = xnnpack_msvc_std_copts(),
4537 msvc_x86_32_copts = ["/arch:AVX"],
4538 msvc_x86_64_copts = ["/arch:AVX"],
4539 x86_srcs = AVX_UKERNELS,
4540 deps = [
4541 ":tables",
4542 "@FP16",
4543 "@pthreadpool",
4544 ],
4545)
4546
4547xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004548 name = "xop_ukernels",
4549 hdrs = INTERNAL_HDRS,
4550 gcc_copts = xnnpack_gcc_std_copts(),
4551 gcc_x86_copts = ["-mxop"],
4552 msvc_copts = xnnpack_msvc_std_copts(),
4553 msvc_x86_32_copts = ["/arch:AVX"],
4554 msvc_x86_64_copts = ["/arch:AVX"],
4555 x86_srcs = XOP_UKERNELS,
4556 deps = [
4557 ":tables",
4558 "@FP16",
4559 "@pthreadpool",
4560 ],
4561)
4562
4563xnnpack_cc_library(
4564 name = "xop_ukernels_test_mode",
4565 hdrs = INTERNAL_HDRS,
4566 copts = [
4567 "-UNDEBUG",
4568 "-DXNN_TEST_MODE=1",
4569 ],
4570 gcc_copts = xnnpack_gcc_std_copts(),
4571 gcc_x86_copts = ["-mxop"],
4572 msvc_copts = xnnpack_msvc_std_copts(),
4573 msvc_x86_32_copts = ["/arch:AVX"],
4574 msvc_x86_64_copts = ["/arch:AVX"],
4575 x86_srcs = XOP_UKERNELS,
4576 deps = [
4577 ":tables",
4578 "@FP16",
4579 "@pthreadpool",
4580 ],
4581)
4582
4583xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004584 name = "fma3_ukernels",
4585 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004586 gcc_copts = xnnpack_gcc_std_copts(),
4587 gcc_x86_copts = ["-mfma"],
4588 msvc_copts = xnnpack_msvc_std_copts(),
4589 msvc_x86_32_copts = ["/arch:AVX"],
4590 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004591 x86_srcs = FMA3_UKERNELS,
4592 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004593 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004594 "@FP16",
4595 "@pthreadpool",
4596 ],
4597)
4598
4599xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004600 name = "fma3_ukernels_test_mode",
4601 hdrs = INTERNAL_HDRS,
4602 copts = [
4603 "-UNDEBUG",
4604 "-DXNN_TEST_MODE=1",
4605 ],
4606 gcc_copts = xnnpack_gcc_std_copts(),
4607 gcc_x86_copts = ["-mfma"],
4608 msvc_copts = xnnpack_msvc_std_copts(),
4609 msvc_x86_32_copts = ["/arch:AVX"],
4610 msvc_x86_64_copts = ["/arch:AVX"],
4611 x86_srcs = FMA3_UKERNELS,
4612 deps = [
4613 ":tables",
4614 "@FP16",
4615 "@pthreadpool",
4616 ],
4617)
4618
4619xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004620 name = "avx2_ukernels",
4621 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004622 gcc_copts = xnnpack_gcc_std_copts(),
4623 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004624 "-mfma",
4625 "-mavx2",
4626 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004627 msvc_copts = xnnpack_msvc_std_copts(),
4628 msvc_x86_32_copts = ["/arch:AVX2"],
4629 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004630 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004631 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004632 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004633 "@FP16",
4634 "@pthreadpool",
4635 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004636)
4637
4638xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004639 name = "avx2_ukernels_test_mode",
4640 hdrs = INTERNAL_HDRS,
4641 copts = [
4642 "-UNDEBUG",
4643 "-DXNN_TEST_MODE=1",
4644 ],
4645 gcc_copts = xnnpack_gcc_std_copts(),
4646 gcc_x86_copts = [
4647 "-mfma",
4648 "-mavx2",
4649 ],
4650 msvc_copts = xnnpack_msvc_std_copts(),
4651 msvc_x86_32_copts = ["/arch:AVX2"],
4652 msvc_x86_64_copts = ["/arch:AVX2"],
4653 x86_srcs = AVX2_UKERNELS,
4654 deps = [
4655 ":tables",
4656 "@FP16",
4657 "@pthreadpool",
4658 ],
4659)
4660
4661xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004662 name = "avx512f_ukernels",
4663 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004664 gcc_copts = xnnpack_gcc_std_copts(),
4665 gcc_x86_copts = ["-mavx512f"],
4666 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4667 msvc_copts = xnnpack_msvc_std_copts(),
4668 msvc_x86_32_copts = ["/arch:AVX512"],
4669 msvc_x86_64_copts = ["/arch:AVX512"],
4670 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004671 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004672 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004673 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004674 "@FP16",
4675 "@pthreadpool",
4676 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004677)
4678
4679xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004680 name = "avx512f_ukernels_test_mode",
4681 hdrs = INTERNAL_HDRS,
4682 copts = [
4683 "-UNDEBUG",
4684 "-DXNN_TEST_MODE=1",
4685 ],
4686 gcc_copts = xnnpack_gcc_std_copts(),
4687 gcc_x86_copts = ["-mavx512f"],
4688 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4689 msvc_copts = xnnpack_msvc_std_copts(),
4690 msvc_x86_32_copts = ["/arch:AVX512"],
4691 msvc_x86_64_copts = ["/arch:AVX512"],
4692 msys_copts = ["-fno-asynchronous-unwind-tables"],
4693 x86_srcs = AVX512F_UKERNELS,
4694 deps = [
4695 ":tables",
4696 "@FP16",
4697 "@pthreadpool",
4698 ],
4699)
4700
4701xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004702 name = "avx512skx_ukernels",
4703 hdrs = INTERNAL_HDRS,
4704 gcc_copts = xnnpack_gcc_std_copts(),
4705 gcc_x86_copts = [
4706 "-mavx512f",
4707 "-mavx512cd",
4708 "-mavx512bw",
4709 "-mavx512dq",
4710 "-mavx512vl",
4711 ],
4712 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4713 msvc_copts = xnnpack_msvc_std_copts(),
4714 msvc_x86_32_copts = ["/arch:AVX512"],
4715 msvc_x86_64_copts = ["/arch:AVX512"],
4716 msys_copts = ["-fno-asynchronous-unwind-tables"],
4717 x86_srcs = AVX512SKX_UKERNELS,
4718 deps = [
4719 ":tables",
4720 "@FP16",
4721 "@pthreadpool",
4722 ],
4723)
4724
4725xnnpack_cc_library(
4726 name = "avx512skx_ukernels_test_mode",
4727 hdrs = INTERNAL_HDRS,
4728 copts = [
4729 "-UNDEBUG",
4730 "-DXNN_TEST_MODE=1",
4731 ],
4732 gcc_copts = xnnpack_gcc_std_copts(),
4733 gcc_x86_copts = [
4734 "-mavx512f",
4735 "-mavx512cd",
4736 "-mavx512bw",
4737 "-mavx512dq",
4738 "-mavx512vl",
4739 ],
4740 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4741 msvc_copts = xnnpack_msvc_std_copts(),
4742 msvc_x86_32_copts = ["/arch:AVX512"],
4743 msvc_x86_64_copts = ["/arch:AVX512"],
4744 msys_copts = ["-fno-asynchronous-unwind-tables"],
4745 x86_srcs = AVX512SKX_UKERNELS,
4746 deps = [
4747 ":tables",
4748 "@FP16",
4749 "@pthreadpool",
4750 ],
4751)
4752
4753xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004754 name = "asm_ukernels",
4755 hdrs = ["src/xnnpack/assembly.h"],
4756 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004757 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004758 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004759 wasm_srcs = WASM32_ASM_UKERNELS,
4760 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004761)
4762
Marat Dukhan3b59de22020-06-03 20:15:19 -07004763xnnpack_cc_library(
4764 name = "logging_utils",
4765 srcs = LOGGING_SRCS,
4766 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4767 copts = LOGGING_COPTS + [
4768 "-Isrc",
4769 "-Iinclude",
4770 ] + select({
4771 ":debug_build": [],
4772 "//conditions:default": xnnpack_min_size_copts(),
4773 }),
4774 gcc_copts = xnnpack_gcc_std_copts(),
4775 msvc_copts = xnnpack_msvc_std_copts(),
4776 visibility = xnnpack_visibility(),
4777 deps = [
4778 "@FP16",
4779 "@clog",
4780 "@pthreadpool",
4781 ],
4782)
4783
Marat Dukhan08c4a432019-10-03 09:29:21 -07004784xnnpack_aggregate_library(
4785 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004786 aarch32_ios_deps = [
4787 ":neon_ukernels",
4788 ":neonfma_ukernels",
4789 ":neonv8_ukernels",
4790 ":asm_ukernels",
4791 ],
4792 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004793 ":neon_ukernels",
4794 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004795 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004796 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004797 ":asm_ukernels",
4798 ],
4799 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004800 ":neon_ukernels",
4801 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004802 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004803 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004804 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004805 ":asm_ukernels",
4806 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004807 generic_deps = [
4808 ":scalar_ukernels",
4809 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004810 wasm_deps = [
4811 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004812 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004813 ],
4814 wasmsimd_deps = [
4815 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004816 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004817 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004818 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004819 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004820 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004821 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004822 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004823 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004824 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004825 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004826 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004827 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004828 ],
4829)
4830
Marat Dukhan33fcf782020-05-24 14:27:15 -07004831xnnpack_aggregate_library(
4832 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004833 aarch32_ios_deps = [
4834 ":neon_ukernels_test_mode",
4835 ":neonfma_ukernels_test_mode",
4836 ":neonv8_ukernels_test_mode",
4837 ":asm_ukernels",
4838 ],
4839 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07004840 ":neon_ukernels_test_mode",
4841 ":neonfma_ukernels_test_mode",
4842 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004843 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004844 ":asm_ukernels",
4845 ],
4846 aarch64_deps = [
4847 ":neon_ukernels_test_mode",
4848 ":neonfma_ukernels_test_mode",
4849 ":neonv8_ukernels_test_mode",
4850 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004851 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004852 ":asm_ukernels",
4853 ],
4854 generic_deps = [
4855 ":scalar_ukernels_test_mode",
4856 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004857 wasm_deps = [
4858 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004859 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004860 ],
4861 wasmsimd_deps = [
4862 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004863 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004864 ],
4865 x86_deps = [
4866 ":sse2_ukernels_test_mode",
4867 ":ssse3_ukernels_test_mode",
4868 ":sse41_ukernels_test_mode",
4869 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004870 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004871 ":fma3_ukernels_test_mode",
4872 ":avx2_ukernels_test_mode",
4873 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004874 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004875 ],
4876)
4877
Marat Dukhan08c4a432019-10-03 09:29:21 -07004878xnnpack_cc_library(
4879 name = "im2col",
4880 srcs = ["src/im2col.c"],
4881 hdrs = [
4882 "src/xnnpack/common.h",
4883 "src/xnnpack/im2col.h",
4884 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004885 gcc_copts = xnnpack_gcc_std_copts(),
4886 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004887)
4888
4889xnnpack_cc_library(
4890 name = "indirection",
4891 srcs = ["src/indirection.c"],
4892 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004893 gcc_copts = xnnpack_gcc_std_copts(),
4894 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004895 deps = [
4896 "@FP16",
4897 "@FXdiv",
4898 "@pthreadpool",
4899 ],
4900)
4901
4902xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004903 name = "indirection_test_mode",
4904 srcs = ["src/indirection.c"],
4905 hdrs = INTERNAL_HDRS,
4906 copts = [
4907 "-UNDEBUG",
4908 "-DXNN_TEST_MODE=1",
4909 ],
4910 gcc_copts = xnnpack_gcc_std_copts(),
4911 msvc_copts = xnnpack_msvc_std_copts(),
4912 deps = [
4913 "@FP16",
4914 "@FXdiv",
4915 "@pthreadpool",
4916 ],
4917)
4918
4919xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07004920 name = "packing",
4921 srcs = ["src/packing.c"],
4922 hdrs = INTERNAL_HDRS,
4923 gcc_copts = xnnpack_gcc_std_copts(),
4924 msvc_copts = xnnpack_msvc_std_copts(),
4925 deps = [
4926 "@FP16",
4927 "@FXdiv",
4928 "@pthreadpool",
4929 ],
4930)
4931
4932xnnpack_cc_library(
4933 name = "packing_test_mode",
4934 srcs = ["src/packing.c"],
4935 hdrs = INTERNAL_HDRS,
4936 copts = [
4937 "-UNDEBUG",
4938 "-DXNN_TEST_MODE=1",
4939 ],
4940 gcc_copts = xnnpack_gcc_std_copts(),
4941 msvc_copts = xnnpack_msvc_std_copts(),
4942 deps = [
4943 "@FP16",
4944 "@FXdiv",
4945 "@pthreadpool",
4946 ],
4947)
4948
4949xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004950 name = "operator_run",
4951 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004952 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004953 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07004954 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4955 "//conditions:default": [],
4956 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004957 gcc_copts = xnnpack_gcc_std_copts(),
4958 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004959 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004960 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004961 "@FP16",
4962 "@FXdiv",
4963 "@clog",
4964 "@pthreadpool",
4965 ],
4966)
4967
Chao Mei6ddfc602020-05-13 22:29:36 -07004968xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004969 name = "operator_run_test_mode",
4970 srcs = ["src/operator-run.c"],
4971 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4972 copts = LOGGING_COPTS + [
4973 "-UNDEBUG",
4974 "-DXNN_TEST_MODE=1",
4975 ] + select({
4976 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4977 "//conditions:default": [],
4978 }),
4979 gcc_copts = xnnpack_gcc_std_copts(),
4980 msvc_copts = xnnpack_msvc_std_copts(),
4981 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004982 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004983 "@FP16",
4984 "@FXdiv",
4985 "@clog",
4986 "@pthreadpool",
4987 ],
4988)
4989
4990xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07004991 name = "memory_planner",
4992 srcs = ["src/memory-planner.c"],
4993 hdrs = INTERNAL_HDRS,
4994 defines = select({
4995 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
4996 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
4997 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
4998 }),
4999 gcc_copts = xnnpack_gcc_std_copts(),
5000 msvc_copts = xnnpack_msvc_std_copts(),
5001 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005002 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005003 "@pthreadpool",
5004 ],
5005)
5006
Marat Dukhan33fcf782020-05-24 14:27:15 -07005007xnnpack_cc_library(
5008 name = "memory_planner_test_mode",
5009 srcs = ["src/memory-planner.c"],
5010 hdrs = INTERNAL_HDRS,
5011 copts = [
5012 "-UNDEBUG",
5013 "-DXNN_TEST_MODE=1",
5014 ],
5015 defines = select({
5016 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5017 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5018 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5019 }),
5020 gcc_copts = xnnpack_gcc_std_copts(),
5021 msvc_copts = xnnpack_msvc_std_copts(),
5022 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005023 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005024 "@pthreadpool",
5025 ],
5026)
5027
Marat Dukhan08c4a432019-10-03 09:29:21 -07005028cc_library(
5029 name = "enable_assembly",
5030 defines = select({
5031 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5032 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005033 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005034 }),
5035)
5036
Marat Dukhan9de90e02020-06-18 16:04:12 -07005037cc_library(
5038 name = "enable_sparse",
5039 defines = select({
5040 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5041 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005042 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005043 }),
5044)
5045
Marat Dukhancf056b22019-10-07 10:26:29 -07005046xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005047 name = "operators",
5048 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005049 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005050 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005051 ],
5052 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005053 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005054 "-Isrc",
5055 "-Iinclude",
5056 ] + select({
5057 ":debug_build": [],
5058 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005059 }) + select({
5060 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5061 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005062 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005063 gcc_copts = xnnpack_gcc_std_copts(),
5064 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005065 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005066 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005067 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005068 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005069 "@FP16",
5070 "@FXdiv",
5071 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005072 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005073 ],
5074)
5075
Marat Dukhan10a38082020-04-17 03:58:35 -07005076xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005077 name = "operators_test_mode",
5078 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005079 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005080 "src/operator-delete.c",
5081 ],
5082 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5083 copts = LOGGING_COPTS + [
5084 "-Isrc",
5085 "-Iinclude",
5086 "-UNDEBUG",
5087 "-DXNN_TEST_MODE=1",
5088 ] + select({
5089 ":debug_build": [],
5090 "//conditions:default": xnnpack_min_size_copts(),
5091 }) + select({
5092 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5093 "//conditions:default": [],
5094 }),
5095 gcc_copts = xnnpack_gcc_std_copts(),
5096 msvc_copts = xnnpack_msvc_std_copts(),
5097 deps = [
5098 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005099 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005100 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005101 "@FP16",
5102 "@FXdiv",
5103 "@clog",
5104 "@pthreadpool",
5105 ],
5106)
5107
5108xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005109 name = "XNNPACK",
5110 srcs = [
5111 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005112 "src/runtime.c",
5113 "src/subgraph.c",
5114 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005115 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005116 hdrs = ["include/xnnpack.h"],
5117 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005118 "-Isrc",
5119 "-Iinclude",
5120 ] + select({
5121 ":debug_build": [],
5122 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005123 }) + select({
5124 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5125 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005126 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005127 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005128 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005129 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005130 visibility = xnnpack_visibility(),
5131 deps = [
5132 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005133 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005134 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005135 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005136 ":operator_run",
5137 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005138 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005139 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005140 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005141 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005142 ] + select({
5143 ":emscripten": [],
5144 "//conditions:default": ["@cpuinfo"],
5145 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005146)
5147
Marat Dukhan10a38082020-04-17 03:58:35 -07005148xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005149 name = "XNNPACK_test_mode",
5150 srcs = [
5151 "src/init.c",
5152 "src/runtime.c",
5153 "src/subgraph.c",
5154 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005155 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005156 hdrs = ["include/xnnpack.h"],
5157 copts = LOGGING_COPTS + [
5158 "-Isrc",
5159 "-Iinclude",
5160 "-UNDEBUG",
5161 "-DXNN_TEST_MODE=1",
5162 ] + select({
5163 ":debug_build": [],
5164 "//conditions:default": xnnpack_min_size_copts(),
5165 }) + select({
5166 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5167 "//conditions:default": [],
5168 }),
5169 gcc_copts = xnnpack_gcc_std_copts(),
5170 includes = ["include"],
5171 msvc_copts = xnnpack_msvc_std_copts(),
5172 visibility = xnnpack_visibility(),
5173 deps = [
5174 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005175 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005176 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005177 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005178 ":operator_run_test_mode",
5179 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005180 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005181 "@clog",
5182 "@FP16",
5183 "@pthreadpool",
5184 ] + select({
5185 ":emscripten": [],
5186 "//conditions:default": ["@cpuinfo"],
5187 }),
5188)
5189
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005190# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5191# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005192xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005193 name = "xnnpack_for_tflite",
5194 srcs = [
5195 "src/init.c",
5196 "src/runtime.c",
5197 "src/subgraph.c",
5198 "src/tensor.c",
5199 ] + SUBGRAPH_SRCS,
5200 hdrs = ["include/xnnpack.h"],
5201 copts = LOGGING_COPTS + [
5202 "-Isrc",
5203 "-Iinclude",
5204 ] + select({
5205 ":debug_build": [],
5206 "//conditions:default": xnnpack_min_size_copts(),
5207 }) + select({
5208 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5209 "//conditions:default": [],
5210 }),
5211 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005212 "XNN_NO_QU8_OPERATORS",
5213 "XNN_NO_U8_OPERATORS",
5214 "XNN_NO_X8_OPERATORS",
5215 "XNN_NO_F16_OPERATORS",
5216 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005217 ] + select({
5218 ":xnn_enable_qs8_explicit_true": [],
5219 ":xnn_enable_qs8_explicit_false": ["XNN_NO_QS8_OPERATORS"],
5220 "//conditions:default": ["XNN_NO_QS8_OPERATORS"],
5221 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005222 gcc_copts = xnnpack_gcc_std_copts(),
5223 includes = ["include"],
5224 msvc_copts = xnnpack_msvc_std_copts(),
5225 visibility = xnnpack_visibility(),
5226 deps = [
5227 ":enable_assembly",
5228 ":enable_sparse",
5229 ":logging_utils",
5230 ":memory_planner",
5231 ":operator_run",
5232 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005233 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005234 "@clog",
5235 "@FP16",
5236 "@pthreadpool",
5237 ] + select({
5238 ":emscripten": [],
5239 "//conditions:default": ["@cpuinfo"],
5240 }),
5241)
5242
5243# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5244# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5245xnnpack_cc_library(
5246 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005247 srcs = [
5248 "src/init.c",
5249 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005250 hdrs = ["include/xnnpack.h"],
5251 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005252 "-Isrc",
5253 "-Iinclude",
5254 ] + select({
5255 ":debug_build": [],
5256 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005257 }) + select({
5258 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5259 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005260 }),
5261 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005262 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005263 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005264 "XNN_NO_U8_OPERATORS",
5265 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005266 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005267 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005268 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005269 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005270 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005271 visibility = xnnpack_visibility(),
5272 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005273 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005274 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005275 ":operator_run",
5276 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005277 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005278 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005279 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005280 ] + select({
5281 ":emscripten": [],
5282 "//conditions:default": ["@cpuinfo"],
5283 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005284)
5285
Marat Dukhancf056b22019-10-07 10:26:29 -07005286xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005287 name = "bench_utils",
5288 srcs = ["bench/utils.cc"],
5289 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005290 deps = [
5291 "@com_google_benchmark//:benchmark",
5292 "@cpuinfo",
5293 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005294)
5295
Frank Barchard7e955972019-10-11 10:34:25 -07005296######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005297
5298xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005299 name = "qs8_gemm_bench",
5300 srcs = [
5301 "bench/gemm.h",
5302 "bench/qs8-gemm.cc",
5303 "src/xnnpack/AlignedAllocator.h",
5304 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005305 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5306 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005307)
5308
5309xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005310 name = "qs8_requantization_bench",
5311 srcs = [
5312 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005313 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005314 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005315 ] + MICROKERNEL_BENCHMARK_HDRS,
5316 deps = MICROKERNEL_BENCHMARK_DEPS,
5317)
5318
5319xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005320 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005321 srcs = [
5322 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005323 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005324 "src/xnnpack/AlignedAllocator.h",
5325 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005326 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005327 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005328)
5329
5330xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005331 name = "qu8_requantization_bench",
5332 srcs = [
5333 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005334 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005335 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005336 ] + MICROKERNEL_BENCHMARK_HDRS,
5337 deps = MICROKERNEL_BENCHMARK_DEPS,
5338)
5339
5340xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005341 name = "f16_igemm_bench",
5342 srcs = [
5343 "bench/f16-igemm.cc",
5344 "bench/conv.h",
5345 "bench/google/conv.h",
5346 "src/xnnpack/AlignedAllocator.h",
5347 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005348 deps = MICROKERNEL_BENCHMARK_DEPS + [
5349 ":indirection",
5350 ":packing",
5351 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005352)
5353
5354xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005355 name = "f16_gemm_bench",
5356 srcs = [
5357 "bench/f16-gemm.cc",
5358 "bench/gemm.h",
5359 "src/xnnpack/AlignedAllocator.h",
5360 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005361 deps = MICROKERNEL_BENCHMARK_DEPS + [
5362 ":packing",
5363 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005364)
5365
5366xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005367 name = "f16_spmm_bench",
5368 srcs = [
5369 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005370 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005371 "src/xnnpack/AlignedAllocator.h",
5372 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005373 deps = MICROKERNEL_BENCHMARK_DEPS,
5374)
5375
5376xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005377 name = "f16_vrelu_bench",
5378 srcs = [
5379 "bench/f16-vrelu.cc",
5380 "src/xnnpack/AlignedAllocator.h",
5381 ] + MICROKERNEL_BENCHMARK_HDRS,
5382 deps = MICROKERNEL_BENCHMARK_DEPS,
5383)
5384
5385xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005386 name = "f32_igemm_bench",
5387 srcs = [
5388 "bench/f32-igemm.cc",
5389 "bench/conv.h",
5390 "src/xnnpack/AlignedAllocator.h",
5391 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005392 deps = MICROKERNEL_BENCHMARK_DEPS + [
5393 ":indirection",
5394 ":packing",
5395 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005396)
5397
5398xnnpack_benchmark(
5399 name = "f32_conv_hwc_bench",
5400 srcs = [
5401 "bench/f32-conv-hwc.cc",
5402 "bench/dconv.h",
5403 "src/xnnpack/AlignedAllocator.h",
5404 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005405 deps = MICROKERNEL_BENCHMARK_DEPS + [
5406 ":packing",
5407 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005408)
5409
5410xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005411 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005412 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005413 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005414 "bench/dconv.h",
5415 "src/xnnpack/AlignedAllocator.h",
5416 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005417 deps = MICROKERNEL_BENCHMARK_DEPS + [
5418 ":packing",
5419 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005420)
5421
5422xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005423 name = "f16_dwconv_bench",
5424 srcs = [
5425 "bench/f16-dwconv.cc",
5426 "bench/dwconv.h",
5427 "bench/google/dwconv.h",
5428 "src/xnnpack/AlignedAllocator.h",
5429 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005430 deps = MICROKERNEL_BENCHMARK_DEPS + [
5431 ":indirection",
5432 ":packing",
5433 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005434)
5435
5436xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005437 name = "f32_dwconv_bench",
5438 srcs = [
5439 "bench/f32-dwconv.cc",
5440 "bench/dwconv.h",
5441 "src/xnnpack/AlignedAllocator.h",
5442 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005443 deps = MICROKERNEL_BENCHMARK_DEPS + [
5444 ":indirection",
5445 ":packing",
5446 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005447)
5448
5449xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005450 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005451 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005452 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005453 "bench/dwconv.h",
5454 "src/xnnpack/AlignedAllocator.h",
5455 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005456 deps = MICROKERNEL_BENCHMARK_DEPS + [
5457 ":indirection",
5458 ":packing",
5459 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005460)
5461
5462xnnpack_benchmark(
5463 name = "f32_gemm_bench",
5464 srcs = [
5465 "bench/f32-gemm.cc",
5466 "bench/gemm.h",
5467 "src/xnnpack/AlignedAllocator.h",
5468 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005469 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005470 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005471)
5472
5473xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005474 name = "f32_raddexpminusmax_bench",
5475 srcs = [
5476 "bench/f32-raddexpminusmax.cc",
5477 "src/xnnpack/AlignedAllocator.h",
5478 ] + MICROKERNEL_BENCHMARK_HDRS,
5479 deps = MICROKERNEL_BENCHMARK_DEPS,
5480)
5481
5482xnnpack_benchmark(
5483 name = "f32_raddextexp_bench",
5484 srcs = [
5485 "bench/f32-raddextexp.cc",
5486 "src/xnnpack/AlignedAllocator.h",
5487 ] + MICROKERNEL_BENCHMARK_HDRS,
5488 deps = MICROKERNEL_BENCHMARK_DEPS,
5489)
5490
5491xnnpack_benchmark(
5492 name = "f32_raddstoreexpminusmax_bench",
5493 srcs = [
5494 "bench/f32-raddstoreexpminusmax.cc",
5495 "src/xnnpack/AlignedAllocator.h",
5496 ] + MICROKERNEL_BENCHMARK_HDRS,
5497 deps = MICROKERNEL_BENCHMARK_DEPS,
5498)
5499
5500xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005501 name = "f32_rmax_bench",
5502 srcs = [
5503 "bench/f32-rmax.cc",
5504 "src/xnnpack/AlignedAllocator.h",
5505 ] + MICROKERNEL_BENCHMARK_HDRS,
5506 deps = MICROKERNEL_BENCHMARK_DEPS,
5507)
5508
5509xnnpack_benchmark(
5510 name = "f32_spmm_bench",
5511 srcs = [
5512 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005513 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005514 "src/xnnpack/AlignedAllocator.h",
5515 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005516 deps = MICROKERNEL_BENCHMARK_DEPS,
5517)
5518
5519xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005520 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005521 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005522 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005523 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005524 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005525 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005526)
5527
5528xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005529 name = "f32_velu_bench",
5530 srcs = [
5531 "bench/f32-velu.cc",
5532 "src/xnnpack/AlignedAllocator.h",
5533 ] + MICROKERNEL_BENCHMARK_HDRS,
5534 deps = MICROKERNEL_BENCHMARK_DEPS,
5535)
5536
5537xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005538 name = "f32_vhswish_bench",
5539 srcs = [
5540 "bench/f32-vhswish.cc",
5541 "src/xnnpack/AlignedAllocator.h",
5542 ] + MICROKERNEL_BENCHMARK_HDRS,
5543 deps = MICROKERNEL_BENCHMARK_DEPS,
5544)
5545
5546xnnpack_benchmark(
5547 name = "f32_vrelu_bench",
5548 srcs = [
5549 "bench/f32-vrelu.cc",
5550 "src/xnnpack/AlignedAllocator.h",
5551 ] + MICROKERNEL_BENCHMARK_HDRS,
5552 deps = MICROKERNEL_BENCHMARK_DEPS,
5553)
5554
5555xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005556 name = "f32_vscaleexpminusmax_bench",
5557 srcs = [
5558 "bench/f32-vscaleexpminusmax.cc",
5559 "src/xnnpack/AlignedAllocator.h",
5560 ] + MICROKERNEL_BENCHMARK_HDRS,
5561 deps = MICROKERNEL_BENCHMARK_DEPS,
5562)
5563
5564xnnpack_benchmark(
5565 name = "f32_vscaleextexp_bench",
5566 srcs = [
5567 "bench/f32-vscaleextexp.cc",
5568 "src/xnnpack/AlignedAllocator.h",
5569 ] + MICROKERNEL_BENCHMARK_HDRS,
5570 deps = MICROKERNEL_BENCHMARK_DEPS,
5571)
5572
5573xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005574 name = "f32_vsigmoid_bench",
5575 srcs = [
5576 "bench/f32-vsigmoid.cc",
5577 "src/xnnpack/AlignedAllocator.h",
5578 ] + MICROKERNEL_BENCHMARK_HDRS,
5579 deps = MICROKERNEL_BENCHMARK_DEPS,
5580)
5581
5582xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005583 name = "f32_vsqrt_bench",
5584 srcs = [
5585 "bench/f32-vsqrt.cc",
5586 "src/xnnpack/AlignedAllocator.h",
5587 ] + MICROKERNEL_BENCHMARK_HDRS,
5588 deps = MICROKERNEL_BENCHMARK_DEPS,
5589)
5590
5591xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005592 name = "f32_im2col_gemm_bench",
5593 srcs = [
5594 "bench/f32-im2col-gemm.cc",
5595 "bench/conv.h",
5596 "src/xnnpack/AlignedAllocator.h",
5597 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005598 deps = MICROKERNEL_BENCHMARK_DEPS + [
5599 ":im2col",
5600 ":packing",
5601 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005602)
5603
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005604xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005605 name = "rounding_bench",
5606 srcs = [
5607 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005608 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005609 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005610 ] + MICROKERNEL_BENCHMARK_HDRS,
5611 deps = MICROKERNEL_BENCHMARK_DEPS,
5612)
5613
Marat Dukhan08c4a432019-10-03 09:29:21 -07005614########################### Benchmarks for operators ###########################
5615
5616xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005617 name = "average_pooling_bench",
5618 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005619 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005620 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005621 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005622)
5623
5624xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005625 name = "bankers_rounding_bench",
5626 srcs = ["bench/bankers-rounding.cc"],
5627 copts = xnnpack_optional_tflite_copts(),
5628 tags = ["nowin32"],
5629 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5630)
5631
5632xnnpack_benchmark(
5633 name = "ceiling_bench",
5634 srcs = ["bench/ceiling.cc"],
5635 copts = xnnpack_optional_tflite_copts(),
5636 tags = ["nowin32"],
5637 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5638)
5639
5640xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005641 name = "channel_shuffle_bench",
5642 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005643 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005644)
5645
5646xnnpack_benchmark(
5647 name = "convolution_bench",
5648 srcs = ["bench/convolution.cc"],
5649 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005650 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005651 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005652)
5653
5654xnnpack_benchmark(
5655 name = "deconvolution_bench",
5656 srcs = ["bench/deconvolution.cc"],
5657 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005658 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005659 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005660)
5661
5662xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005663 name = "elu_bench",
5664 srcs = ["bench/elu.cc"],
5665 copts = xnnpack_optional_tflite_copts(),
5666 tags = ["nowin32"],
5667 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5668)
5669
5670xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005671 name = "floor_bench",
5672 srcs = ["bench/floor.cc"],
5673 copts = xnnpack_optional_tflite_copts(),
5674 tags = ["nowin32"],
5675 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5676)
5677
5678xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005679 name = "global_average_pooling_bench",
5680 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005681 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005682)
5683
5684xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005685 name = "hardswish_bench",
5686 srcs = ["bench/hardswish.cc"],
5687 copts = xnnpack_optional_tflite_copts(),
5688 tags = ["nowin32"],
5689 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5690)
5691
5692xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005693 name = "max_pooling_bench",
5694 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005695 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005696)
5697
5698xnnpack_benchmark(
5699 name = "sigmoid_bench",
5700 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005701 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005702 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005703 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005704)
5705
5706xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005707 name = "prelu_bench",
5708 srcs = ["bench/prelu.cc"],
5709 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005710 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005711 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005712)
5713
5714xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005715 name = "softmax_bench",
5716 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005717 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005718 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005719 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005720)
5721
Marat Dukhan87727142020-06-24 15:24:10 -07005722xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005723 name = "square_root_bench",
5724 srcs = ["bench/square-root.cc"],
5725 copts = xnnpack_optional_tflite_copts(),
5726 tags = ["nowin32"],
5727 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5728)
5729
5730xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005731 name = "truncation_bench",
5732 srcs = ["bench/truncation.cc"],
5733 deps = OPERATOR_BENCHMARK_DEPS,
5734)
5735
Marat Dukhanc068bb62019-10-04 13:24:39 -07005736############################# End-to-end benchmarks ############################
5737
5738cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005739 name = "fp32_mobilenet_v1",
5740 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005741 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005742 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005743 linkstatic = True,
5744 deps = [
5745 ":XNNPACK",
5746 "@pthreadpool",
5747 ],
5748)
5749
5750cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005751 name = "fp32_sparse_mobilenet_v1",
5752 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5753 hdrs = ["models/models.h"],
5754 copts = xnnpack_std_cxxopts(),
5755 linkstatic = True,
5756 deps = [
5757 ":XNNPACK",
5758 "@pthreadpool",
5759 ],
5760)
5761
5762cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005763 name = "fp16_mobilenet_v1",
5764 srcs = ["models/fp16-mobilenet-v1.cc"],
5765 hdrs = ["models/models.h"],
5766 copts = xnnpack_std_cxxopts(),
5767 linkstatic = True,
5768 deps = [
5769 ":XNNPACK",
5770 "@FP16",
5771 "@pthreadpool",
5772 ],
5773)
5774
5775cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005776 name = "qs8_mobilenet_v1",
5777 srcs = ["models/qs8-mobilenet-v1.cc"],
5778 hdrs = ["models/models.h"],
5779 copts = xnnpack_std_cxxopts(),
5780 linkstatic = True,
5781 deps = [
5782 ":XNNPACK",
5783 "@pthreadpool",
5784 ],
5785)
5786
5787cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07005788 name = "qs8_mobilenet_v2",
5789 srcs = ["models/qs8-mobilenet-v2.cc"],
5790 hdrs = ["models/models.h"],
5791 copts = xnnpack_std_cxxopts(),
5792 linkstatic = True,
5793 deps = [
5794 ":XNNPACK",
5795 "@pthreadpool",
5796 ],
5797)
5798
5799cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005800 name = "qu8_mobilenet_v1",
5801 srcs = ["models/qu8-mobilenet-v1.cc"],
5802 hdrs = ["models/models.h"],
5803 copts = xnnpack_std_cxxopts(),
5804 linkstatic = True,
5805 deps = [
5806 ":XNNPACK",
5807 "@pthreadpool",
5808 ],
5809)
5810
5811cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005812 name = "fp32_mobilenet_v2",
5813 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005814 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005815 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005816 linkstatic = True,
5817 deps = [
5818 ":XNNPACK",
5819 "@pthreadpool",
5820 ],
5821)
5822
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005823cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005824 name = "fp32_sparse_mobilenet_v2",
5825 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
5826 hdrs = ["models/models.h"],
5827 copts = xnnpack_std_cxxopts(),
5828 linkstatic = True,
5829 deps = [
5830 ":XNNPACK",
5831 "@pthreadpool",
5832 ],
5833)
5834
5835cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005836 name = "fp16_mobilenet_v2",
5837 srcs = ["models/fp16-mobilenet-v2.cc"],
5838 hdrs = ["models/models.h"],
5839 copts = xnnpack_std_cxxopts(),
5840 linkstatic = True,
5841 deps = [
5842 ":XNNPACK",
5843 "@FP16",
5844 "@pthreadpool",
5845 ],
5846)
5847
5848cc_library(
5849 name = "fp32_mobilenet_v3_large",
5850 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005851 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005852 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005853 linkstatic = True,
5854 deps = [
5855 ":XNNPACK",
5856 "@pthreadpool",
5857 ],
5858)
5859
5860cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005861 name = "fp32_sparse_mobilenet_v3_large",
5862 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
5863 hdrs = ["models/models.h"],
5864 copts = xnnpack_std_cxxopts(),
5865 linkstatic = True,
5866 deps = [
5867 ":XNNPACK",
5868 "@pthreadpool",
5869 ],
5870)
5871
5872cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005873 name = "fp16_mobilenet_v3_large",
5874 srcs = ["models/fp16-mobilenet-v3-large.cc"],
5875 hdrs = ["models/models.h"],
5876 copts = xnnpack_std_cxxopts(),
5877 linkstatic = True,
5878 deps = [
5879 ":XNNPACK",
5880 "@FP16",
5881 "@pthreadpool",
5882 ],
5883)
5884
5885cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005886 name = "fp32_mobilenet_v3_small",
5887 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005888 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005889 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005890 linkstatic = True,
5891 deps = [
5892 ":XNNPACK",
5893 "@pthreadpool",
5894 ],
5895)
5896
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005897cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005898 name = "fp32_sparse_mobilenet_v3_small",
5899 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
5900 hdrs = ["models/models.h"],
5901 copts = xnnpack_std_cxxopts(),
5902 linkstatic = True,
5903 deps = [
5904 ":XNNPACK",
5905 "@pthreadpool",
5906 ],
5907)
5908
5909cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005910 name = "fp16_mobilenet_v3_small",
5911 srcs = ["models/fp16-mobilenet-v3-small.cc"],
5912 hdrs = ["models/models.h"],
5913 copts = xnnpack_std_cxxopts(),
5914 linkstatic = True,
5915 deps = [
5916 ":XNNPACK",
5917 "@FP16",
5918 "@pthreadpool",
5919 ],
5920)
5921
Marat Dukhanc068bb62019-10-04 13:24:39 -07005922xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07005923 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005924 srcs = [
5925 "bench/f32-dwconv-e2e.cc",
5926 "bench/end2end.h",
5927 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07005928 deps = MICROKERNEL_BENCHMARK_DEPS + [
5929 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005930 ":fp32_mobilenet_v1",
5931 ":fp32_mobilenet_v2",
5932 ":fp32_mobilenet_v3_large",
5933 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07005934 ],
5935)
5936
5937xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07005938 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005939 srcs = [
5940 "bench/f32-gemm-e2e.cc",
5941 "bench/end2end.h",
5942 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07005943 deps = MICROKERNEL_BENCHMARK_DEPS + [
5944 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005945 ":fp32_mobilenet_v1",
5946 ":fp32_mobilenet_v2",
5947 ":fp32_mobilenet_v3_large",
5948 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07005949 ],
5950)
5951
5952xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08005953 name = "qs8_gemm_e2e_bench",
5954 srcs = [
5955 "bench/qs8-gemm-e2e.cc",
5956 "bench/end2end.h",
5957 ] + MICROKERNEL_BENCHMARK_HDRS,
5958 deps = MICROKERNEL_BENCHMARK_DEPS + [
5959 ":XNNPACK",
5960 ":qs8_mobilenet_v1",
5961 ":qs8_mobilenet_v2",
5962 ],
5963)
5964
5965xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07005966 name = "end2end_bench",
5967 srcs = ["bench/end2end.cc"],
5968 deps = [
5969 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07005970 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005971 ":fp16_mobilenet_v1",
5972 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005973 ":fp16_mobilenet_v3_large",
5974 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005975 ":fp32_mobilenet_v1",
5976 ":fp32_mobilenet_v2",
5977 ":fp32_mobilenet_v3_large",
5978 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08005979 ":fp32_sparse_mobilenet_v1",
5980 ":fp32_sparse_mobilenet_v2",
5981 ":fp32_sparse_mobilenet_v3_large",
5982 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005983 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07005984 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005985 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07005986 "@pthreadpool",
5987 ],
5988)
5989
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005990#################### Accuracy evaluation for math functions ####################
5991
5992xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005993 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005994 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005995 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005996 "src/xnnpack/AlignedAllocator.h",
5997 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08005998 deps = ACCURACY_EVAL_DEPS + [
5999 ":bench_utils",
6000 "@cpuinfo",
6001 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006002)
6003
Marat Dukhan515c9772019-10-17 18:07:57 -07006004xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006005 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006006 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006007 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006008 "src/xnnpack/AlignedAllocator.h",
6009 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006010 deps = ACCURACY_EVAL_DEPS + [
6011 ":bench_utils",
6012 "@cpuinfo",
6013 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006014)
6015
Marat Dukhan98ba4412019-10-23 02:14:28 -07006016xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006017 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006018 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006019 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006020 "src/xnnpack/AlignedAllocator.h",
6021 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006022 deps = ACCURACY_EVAL_DEPS + [
6023 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006024 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006025 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006026)
6027
6028xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006029 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006030 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006031 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006032 "src/xnnpack/AlignedAllocator.h",
6033 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006034 deps = ACCURACY_EVAL_DEPS + [
6035 ":bench_utils",
6036 "@cpuinfo",
6037 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006038)
6039
Marat Dukhanf44f0222020-12-14 11:53:27 -08006040xnnpack_benchmark(
6041 name = "f32_sigmoid_ulp_eval",
6042 srcs = [
6043 "eval/f32-sigmoid-ulp.cc",
6044 "src/xnnpack/AlignedAllocator.h",
6045 ] + ACCURACY_EVAL_HDRS,
6046 deps = ACCURACY_EVAL_DEPS + [
6047 ":bench_utils",
6048 "@cpuinfo",
6049 ],
6050)
6051
6052xnnpack_benchmark(
6053 name = "f32_sqrt_ulp_eval",
6054 srcs = [
6055 "eval/f32-sqrt-ulp.cc",
6056 "src/xnnpack/AlignedAllocator.h",
6057 ] + ACCURACY_EVAL_HDRS,
6058 deps = ACCURACY_EVAL_DEPS + [
6059 ":bench_utils",
6060 "@cpuinfo",
6061 ],
6062)
6063
6064################### Accuracy verification for math functions ##################
6065
6066xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006067 name = "f32_exp_eval",
6068 srcs = [
6069 "eval/f32-exp.cc",
6070 "src/xnnpack/AlignedAllocator.h",
6071 "src/xnnpack/math-stubs.h",
6072 ] + MICROKERNEL_TEST_HDRS,
6073 automatic = False,
6074 deps = MICROKERNEL_TEST_DEPS,
6075)
6076
6077xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006078 name = "f32_expm1minus_eval",
6079 srcs = [
6080 "eval/f32-expm1minus.cc",
6081 "src/xnnpack/AlignedAllocator.h",
6082 "src/xnnpack/math-stubs.h",
6083 ] + MICROKERNEL_TEST_HDRS,
6084 automatic = False,
6085 deps = MICROKERNEL_TEST_DEPS,
6086)
6087
Marat Dukhan8853b822020-05-07 12:19:01 -07006088xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006089 name = "f32_expminus_eval",
6090 srcs = [
6091 "eval/f32-expminus.cc",
6092 "src/xnnpack/AlignedAllocator.h",
6093 "src/xnnpack/math-stubs.h",
6094 ] + MICROKERNEL_TEST_HDRS,
6095 automatic = False,
6096 deps = MICROKERNEL_TEST_DEPS,
6097)
6098
6099xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006100 name = "f32_roundne_eval",
6101 srcs = [
6102 "eval/f32-roundne.cc",
6103 "src/xnnpack/AlignedAllocator.h",
6104 "src/xnnpack/math-stubs.h",
6105 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006106 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006107 deps = MICROKERNEL_TEST_DEPS,
6108)
6109
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006110xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006111 name = "f32_roundd_eval",
6112 srcs = [
6113 "eval/f32-roundd.cc",
6114 "src/xnnpack/AlignedAllocator.h",
6115 "src/xnnpack/math-stubs.h",
6116 ] + MICROKERNEL_TEST_HDRS,
6117 automatic = False,
6118 deps = MICROKERNEL_TEST_DEPS,
6119)
6120
6121xnnpack_unit_test(
6122 name = "f32_roundu_eval",
6123 srcs = [
6124 "eval/f32-roundu.cc",
6125 "src/xnnpack/AlignedAllocator.h",
6126 "src/xnnpack/math-stubs.h",
6127 ] + MICROKERNEL_TEST_HDRS,
6128 automatic = False,
6129 deps = MICROKERNEL_TEST_DEPS,
6130)
6131
6132xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006133 name = "f32_roundz_eval",
6134 srcs = [
6135 "eval/f32-roundz.cc",
6136 "src/xnnpack/AlignedAllocator.h",
6137 "src/xnnpack/math-stubs.h",
6138 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006139 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006140 deps = MICROKERNEL_TEST_DEPS,
6141)
6142
Marat Dukhan08c4a432019-10-03 09:29:21 -07006143######################### Unit tests for micro-kernels #########################
6144
6145xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006146 name = "f16_dwconv_minmax_test",
6147 srcs = [
6148 "test/f16-dwconv-minmax.cc",
6149 "test/dwconv-microkernel-tester.h",
6150 "src/xnnpack/AlignedAllocator.h",
6151 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6152 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6153)
6154
6155xnnpack_unit_test(
6156 name = "f16_gavgpool_minmax_test",
6157 srcs = [
6158 "test/f16-gavgpool-minmax.cc",
6159 "test/gavgpool-microkernel-tester.h",
6160 "src/xnnpack/AlignedAllocator.h",
6161 ] + MICROKERNEL_TEST_HDRS,
6162 deps = MICROKERNEL_TEST_DEPS,
6163)
6164
6165xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006166 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006167 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006168 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006169 "test/gemm-microkernel-tester.h",
6170 "src/xnnpack/AlignedAllocator.h",
6171 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006172 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006173)
6174
6175xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006176 name = "f16_igemm_minmax_test",
6177 srcs = [
6178 "test/f16-igemm-minmax.cc",
6179 "test/gemm-microkernel-tester.h",
6180 "src/xnnpack/AlignedAllocator.h",
6181 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6182 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6183)
6184
6185xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006186 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006187 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006188 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006189 "test/spmm-microkernel-tester.h",
6190 "src/xnnpack/AlignedAllocator.h",
6191 ] + MICROKERNEL_TEST_HDRS,
6192 deps = MICROKERNEL_TEST_DEPS,
6193)
6194
6195xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006196 name = "f16_vadd_minmax_test",
6197 srcs = [
6198 "test/f16-vadd-minmax.cc",
6199 "test/vbinary-microkernel-tester.h",
6200 ] + MICROKERNEL_TEST_HDRS,
6201 deps = MICROKERNEL_TEST_DEPS,
6202)
6203
6204xnnpack_unit_test(
6205 name = "f16_vaddc_minmax_test",
6206 srcs = [
6207 "test/f16-vaddc-minmax.cc",
6208 "test/vbinaryc-microkernel-tester.h",
6209 ] + MICROKERNEL_TEST_HDRS,
6210 deps = MICROKERNEL_TEST_DEPS,
6211)
6212
6213xnnpack_unit_test(
6214 name = "f16_vclamp_test",
6215 srcs = [
6216 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006217 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006218 ] + MICROKERNEL_TEST_HDRS,
6219 deps = MICROKERNEL_TEST_DEPS,
6220)
6221
6222xnnpack_unit_test(
6223 name = "f16_vdiv_minmax_test",
6224 srcs = [
6225 "test/f16-vdiv-minmax.cc",
6226 "test/vbinary-microkernel-tester.h",
6227 ] + MICROKERNEL_TEST_HDRS,
6228 deps = MICROKERNEL_TEST_DEPS,
6229)
6230
6231xnnpack_unit_test(
6232 name = "f16_vdivc_minmax_test",
6233 srcs = [
6234 "test/f16-vdivc-minmax.cc",
6235 "test/vbinaryc-microkernel-tester.h",
6236 ] + MICROKERNEL_TEST_HDRS,
6237 deps = MICROKERNEL_TEST_DEPS,
6238)
6239
6240xnnpack_unit_test(
6241 name = "f16_vrdivc_minmax_test",
6242 srcs = [
6243 "test/f16-vrdivc-minmax.cc",
6244 "test/vbinaryc-microkernel-tester.h",
6245 ] + MICROKERNEL_TEST_HDRS,
6246 deps = MICROKERNEL_TEST_DEPS,
6247)
6248
6249xnnpack_unit_test(
6250 name = "f16_vhswish_test",
6251 srcs = [
6252 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006253 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006254 ] + MICROKERNEL_TEST_HDRS,
6255 deps = MICROKERNEL_TEST_DEPS,
6256)
6257
6258xnnpack_unit_test(
6259 name = "f16_vmax_test",
6260 srcs = [
6261 "test/f16-vmax.cc",
6262 "test/vbinary-microkernel-tester.h",
6263 ] + MICROKERNEL_TEST_HDRS,
6264 deps = MICROKERNEL_TEST_DEPS,
6265)
6266
6267xnnpack_unit_test(
6268 name = "f16_vmaxc_test",
6269 srcs = [
6270 "test/f16-vmaxc.cc",
6271 "test/vbinaryc-microkernel-tester.h",
6272 ] + MICROKERNEL_TEST_HDRS,
6273 deps = MICROKERNEL_TEST_DEPS,
6274)
6275
6276xnnpack_unit_test(
6277 name = "f16_vmin_test",
6278 srcs = [
6279 "test/f16-vmin.cc",
6280 "test/vbinary-microkernel-tester.h",
6281 ] + MICROKERNEL_TEST_HDRS,
6282 deps = MICROKERNEL_TEST_DEPS,
6283)
6284
6285xnnpack_unit_test(
6286 name = "f16_vminc_test",
6287 srcs = [
6288 "test/f16-vminc.cc",
6289 "test/vbinaryc-microkernel-tester.h",
6290 ] + MICROKERNEL_TEST_HDRS,
6291 deps = MICROKERNEL_TEST_DEPS,
6292)
6293
6294xnnpack_unit_test(
6295 name = "f16_vmul_minmax_test",
6296 srcs = [
6297 "test/f16-vmul-minmax.cc",
6298 "test/vbinary-microkernel-tester.h",
6299 ] + MICROKERNEL_TEST_HDRS,
6300 deps = MICROKERNEL_TEST_DEPS,
6301)
6302
6303xnnpack_unit_test(
6304 name = "f16_vmulc_minmax_test",
6305 srcs = [
6306 "test/f16-vmulc-minmax.cc",
6307 "test/vbinaryc-microkernel-tester.h",
6308 ] + MICROKERNEL_TEST_HDRS,
6309 deps = MICROKERNEL_TEST_DEPS,
6310)
6311
6312xnnpack_unit_test(
6313 name = "f16_vmulcaddc_minmax_test",
6314 srcs = [
6315 "test/f16-vmulcaddc-minmax.cc",
6316 "test/vmulcaddc-microkernel-tester.h",
6317 "src/xnnpack/AlignedAllocator.h",
6318 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6319 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6320)
6321
6322xnnpack_unit_test(
6323 name = "f16_vsub_minmax_test",
6324 srcs = [
6325 "test/f16-vsub-minmax.cc",
6326 "test/vbinary-microkernel-tester.h",
6327 ] + MICROKERNEL_TEST_HDRS,
6328 deps = MICROKERNEL_TEST_DEPS,
6329)
6330
6331xnnpack_unit_test(
6332 name = "f16_vsubc_minmax_test",
6333 srcs = [
6334 "test/f16-vsubc-minmax.cc",
6335 "test/vbinaryc-microkernel-tester.h",
6336 ] + MICROKERNEL_TEST_HDRS,
6337 deps = MICROKERNEL_TEST_DEPS,
6338)
6339
6340xnnpack_unit_test(
6341 name = "f16_vrsubc_minmax_test",
6342 srcs = [
6343 "test/f16-vrsubc-minmax.cc",
6344 "test/vbinaryc-microkernel-tester.h",
6345 ] + MICROKERNEL_TEST_HDRS,
6346 deps = MICROKERNEL_TEST_DEPS,
6347)
6348
6349xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006350 name = "f32_argmaxpool_test",
6351 srcs = [
6352 "test/f32-argmaxpool.cc",
6353 "test/argmaxpool-microkernel-tester.h",
6354 "src/xnnpack/AlignedAllocator.h",
6355 ] + MICROKERNEL_TEST_HDRS,
6356 deps = MICROKERNEL_TEST_DEPS,
6357)
6358
6359xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006360 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006361 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006362 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006363 "test/avgpool-microkernel-tester.h",
6364 "src/xnnpack/AlignedAllocator.h",
6365 ] + MICROKERNEL_TEST_HDRS,
6366 deps = MICROKERNEL_TEST_DEPS,
6367)
6368
6369xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006370 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006371 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006372 "test/f32-ibilinear.cc",
6373 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006374 "src/xnnpack/AlignedAllocator.h",
6375 ] + MICROKERNEL_TEST_HDRS,
6376 deps = MICROKERNEL_TEST_DEPS,
6377)
6378
6379xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006380 name = "f32_ibilinear_chw_test",
6381 srcs = [
6382 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006383 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006384 "src/xnnpack/AlignedAllocator.h",
6385 ] + MICROKERNEL_TEST_HDRS,
6386 deps = MICROKERNEL_TEST_DEPS,
6387)
6388
6389xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006390 name = "f32_igemm_test",
6391 srcs = [
6392 "test/f32-igemm.cc",
6393 "test/gemm-microkernel-tester.h",
6394 "src/xnnpack/AlignedAllocator.h",
6395 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006396 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006397)
6398
6399xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006400 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006401 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006402 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006403 "test/gemm-microkernel-tester.h",
6404 "src/xnnpack/AlignedAllocator.h",
6405 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006406 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006407)
6408
6409xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006410 name = "f32_igemm_minmax_test",
6411 srcs = [
6412 "test/f32-igemm-minmax.cc",
6413 "test/gemm-microkernel-tester.h",
6414 "src/xnnpack/AlignedAllocator.h",
6415 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006416 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006417)
6418
6419xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006420 name = "f32_conv_hwc_test",
6421 srcs = [
6422 "test/f32-conv-hwc.cc",
6423 "test/conv-hwc-microkernel-tester.h",
6424 "src/xnnpack/AlignedAllocator.h",
6425 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006426 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006427)
6428
6429xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006430 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006431 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006432 "test/f32-conv-hwc2chw.cc",
6433 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006434 "src/xnnpack/AlignedAllocator.h",
6435 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006436 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006437)
6438
6439xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006440 name = "f32_dwconv_test",
6441 srcs = [
6442 "test/f32-dwconv.cc",
6443 "test/dwconv-microkernel-tester.h",
6444 "src/xnnpack/AlignedAllocator.h",
6445 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006446 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006447)
6448
6449xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006450 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006451 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006452 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006453 "test/dwconv-microkernel-tester.h",
6454 "src/xnnpack/AlignedAllocator.h",
6455 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006456 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006457)
6458
6459xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006460 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006461 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006462 "test/f32-dwconv2d-chw.cc",
6463 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006464 "src/xnnpack/AlignedAllocator.h",
6465 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006466 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006467)
6468
6469xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006470 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006471 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006472 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006473 "test/gavgpool-microkernel-tester.h",
6474 "src/xnnpack/AlignedAllocator.h",
6475 ] + MICROKERNEL_TEST_HDRS,
6476 deps = MICROKERNEL_TEST_DEPS,
6477)
6478
6479xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006480 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006481 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006482 "test/f32-gavgpool-cw.cc",
6483 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006484 "src/xnnpack/AlignedAllocator.h",
6485 ] + MICROKERNEL_TEST_HDRS,
6486 deps = MICROKERNEL_TEST_DEPS,
6487)
6488
6489xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006490 name = "f32_gemm_test",
6491 srcs = [
6492 "test/f32-gemm.cc",
6493 "test/gemm-microkernel-tester.h",
6494 "src/xnnpack/AlignedAllocator.h",
6495 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006496 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006497)
6498
6499xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006500 name = "f32_gemm_relu_test",
6501 srcs = [
6502 "test/f32-gemm-relu.cc",
6503 "test/gemm-microkernel-tester.h",
6504 "src/xnnpack/AlignedAllocator.h",
6505 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006506 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006507)
6508
6509xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006510 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006511 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006512 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006513 "test/gemm-microkernel-tester.h",
6514 "src/xnnpack/AlignedAllocator.h",
6515 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006516 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006517)
6518
6519xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006520 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006521 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006522 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006523 "test/gemm-microkernel-tester.h",
6524 "src/xnnpack/AlignedAllocator.h",
6525 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006526 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006527)
6528
6529xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006530 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006531 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006532 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006533 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006534 ] + MICROKERNEL_TEST_HDRS,
6535 deps = MICROKERNEL_TEST_DEPS,
6536)
6537
6538xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006539 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006540 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006541 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006542 "test/maxpool-microkernel-tester.h",
6543 ] + MICROKERNEL_TEST_HDRS,
6544 deps = MICROKERNEL_TEST_DEPS,
6545)
6546
6547xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006548 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006549 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006550 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006551 "test/avgpool-microkernel-tester.h",
6552 "src/xnnpack/AlignedAllocator.h",
6553 ] + MICROKERNEL_TEST_HDRS,
6554 deps = MICROKERNEL_TEST_DEPS,
6555)
6556
6557xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006558 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006559 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006560 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006561 "test/gemm-microkernel-tester.h",
6562 "src/xnnpack/AlignedAllocator.h",
6563 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006564 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006565)
6566
6567xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006568 name = "f16_prelu_test",
6569 srcs = [
6570 "test/f16-prelu.cc",
6571 "test/prelu-microkernel-tester.h",
6572 "src/xnnpack/AlignedAllocator.h",
6573 ] + MICROKERNEL_TEST_HDRS,
6574 deps = MICROKERNEL_TEST_DEPS,
6575)
6576
6577xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006578 name = "f32_prelu_test",
6579 srcs = [
6580 "test/f32-prelu.cc",
6581 "test/prelu-microkernel-tester.h",
6582 "src/xnnpack/AlignedAllocator.h",
6583 ] + MICROKERNEL_TEST_HDRS,
6584 deps = MICROKERNEL_TEST_DEPS,
6585)
6586
6587xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006588 name = "f32_raddexpminusmax_test",
6589 srcs = [
6590 "test/f32-raddexpminusmax.cc",
6591 "test/raddexpminusmax-microkernel-tester.h",
6592 ] + MICROKERNEL_TEST_HDRS,
6593 deps = MICROKERNEL_TEST_DEPS,
6594)
6595
6596xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006597 name = "f32_raddextexp_test",
6598 srcs = [
6599 "test/f32-raddextexp.cc",
6600 "test/raddextexp-microkernel-tester.h",
6601 ] + MICROKERNEL_TEST_HDRS,
6602 deps = MICROKERNEL_TEST_DEPS,
6603)
6604
6605xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006606 name = "f32_raddstoreexpminusmax_test",
6607 srcs = [
6608 "test/f32-raddstoreexpminusmax.cc",
6609 "test/raddstoreexpminusmax-microkernel-tester.h",
6610 ] + MICROKERNEL_TEST_HDRS,
6611 deps = MICROKERNEL_TEST_DEPS,
6612)
6613
6614xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006615 name = "f32_rmax_test",
6616 srcs = [
6617 "test/f32-rmax.cc",
6618 "test/rmax-microkernel-tester.h",
6619 ] + MICROKERNEL_TEST_HDRS,
6620 deps = MICROKERNEL_TEST_DEPS,
6621)
6622
6623xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006624 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006625 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006626 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006627 "test/spmm-microkernel-tester.h",
6628 "src/xnnpack/AlignedAllocator.h",
6629 ] + MICROKERNEL_TEST_HDRS,
6630 deps = MICROKERNEL_TEST_DEPS,
6631)
6632
6633xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006634 name = "f32_vabs_test",
6635 srcs = [
6636 "test/f32-vabs.cc",
6637 "test/vunary-microkernel-tester.h",
6638 ] + MICROKERNEL_TEST_HDRS,
6639 deps = MICROKERNEL_TEST_DEPS,
6640)
6641
6642xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006643 name = "f32_vadd_test",
6644 srcs = [
6645 "test/f32-vadd.cc",
6646 "test/vbinary-microkernel-tester.h",
6647 ] + MICROKERNEL_TEST_HDRS,
6648 deps = MICROKERNEL_TEST_DEPS,
6649)
6650
6651xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006652 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006653 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006654 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006655 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006656 ] + MICROKERNEL_TEST_HDRS,
6657 deps = MICROKERNEL_TEST_DEPS,
6658)
6659
6660xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006661 name = "f32_vadd_relu_test",
6662 srcs = [
6663 "test/f32-vadd-relu.cc",
6664 "test/vbinary-microkernel-tester.h",
6665 ] + MICROKERNEL_TEST_HDRS,
6666 deps = MICROKERNEL_TEST_DEPS,
6667)
6668
6669xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006670 name = "f32_vaddc_test",
6671 srcs = [
6672 "test/f32-vaddc.cc",
6673 "test/vbinaryc-microkernel-tester.h",
6674 ] + MICROKERNEL_TEST_HDRS,
6675 deps = MICROKERNEL_TEST_DEPS,
6676)
6677
6678xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006679 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006680 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006681 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006682 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006683 ] + MICROKERNEL_TEST_HDRS,
6684 deps = MICROKERNEL_TEST_DEPS,
6685)
6686
6687xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006688 name = "f32_vaddc_relu_test",
6689 srcs = [
6690 "test/f32-vaddc-relu.cc",
6691 "test/vbinaryc-microkernel-tester.h",
6692 ] + MICROKERNEL_TEST_HDRS,
6693 deps = MICROKERNEL_TEST_DEPS,
6694)
6695
6696xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006697 name = "f32_vclamp_test",
6698 srcs = [
6699 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006700 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006701 ] + MICROKERNEL_TEST_HDRS,
6702 deps = MICROKERNEL_TEST_DEPS,
6703)
6704
6705xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006706 name = "f32_vdiv_test",
6707 srcs = [
6708 "test/f32-vdiv.cc",
6709 "test/vbinary-microkernel-tester.h",
6710 ] + MICROKERNEL_TEST_HDRS,
6711 deps = MICROKERNEL_TEST_DEPS,
6712)
6713
6714xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006715 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006716 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006717 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006718 "test/vbinary-microkernel-tester.h",
6719 ] + MICROKERNEL_TEST_HDRS,
6720 deps = MICROKERNEL_TEST_DEPS,
6721)
6722
6723xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006724 name = "f32_vdiv_relu_test",
6725 srcs = [
6726 "test/f32-vdiv-relu.cc",
6727 "test/vbinary-microkernel-tester.h",
6728 ] + MICROKERNEL_TEST_HDRS,
6729 deps = MICROKERNEL_TEST_DEPS,
6730)
6731
6732xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006733 name = "f32_vdivc_test",
6734 srcs = [
6735 "test/f32-vdivc.cc",
6736 "test/vbinaryc-microkernel-tester.h",
6737 ] + MICROKERNEL_TEST_HDRS,
6738 deps = MICROKERNEL_TEST_DEPS,
6739)
6740
6741xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006742 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006743 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006744 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006745 "test/vbinaryc-microkernel-tester.h",
6746 ] + MICROKERNEL_TEST_HDRS,
6747 deps = MICROKERNEL_TEST_DEPS,
6748)
6749
6750xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006751 name = "f32_vdivc_relu_test",
6752 srcs = [
6753 "test/f32-vdivc-relu.cc",
6754 "test/vbinaryc-microkernel-tester.h",
6755 ] + MICROKERNEL_TEST_HDRS,
6756 deps = MICROKERNEL_TEST_DEPS,
6757)
6758
6759xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006760 name = "f32_vrdivc_test",
6761 srcs = [
6762 "test/f32-vrdivc.cc",
6763 "test/vbinaryc-microkernel-tester.h",
6764 ] + MICROKERNEL_TEST_HDRS,
6765 deps = MICROKERNEL_TEST_DEPS,
6766)
6767
6768xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006769 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006770 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006771 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006772 "test/vbinaryc-microkernel-tester.h",
6773 ] + MICROKERNEL_TEST_HDRS,
6774 deps = MICROKERNEL_TEST_DEPS,
6775)
6776
6777xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006778 name = "f32_vrdivc_relu_test",
6779 srcs = [
6780 "test/f32-vrdivc-relu.cc",
6781 "test/vbinaryc-microkernel-tester.h",
6782 ] + MICROKERNEL_TEST_HDRS,
6783 deps = MICROKERNEL_TEST_DEPS,
6784)
6785
6786xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006787 name = "f32_velu_test",
6788 srcs = [
6789 "test/f32-velu.cc",
6790 "test/vunary-microkernel-tester.h",
6791 ] + MICROKERNEL_TEST_HDRS,
6792 deps = MICROKERNEL_TEST_DEPS,
6793)
6794
6795xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08006796 name = "f32_vmax_test",
6797 srcs = [
6798 "test/f32-vmax.cc",
6799 "test/vbinary-microkernel-tester.h",
6800 ] + MICROKERNEL_TEST_HDRS,
6801 deps = MICROKERNEL_TEST_DEPS,
6802)
6803
6804xnnpack_unit_test(
6805 name = "f32_vmaxc_test",
6806 srcs = [
6807 "test/f32-vmaxc.cc",
6808 "test/vbinaryc-microkernel-tester.h",
6809 ] + MICROKERNEL_TEST_HDRS,
6810 deps = MICROKERNEL_TEST_DEPS,
6811)
6812
6813xnnpack_unit_test(
6814 name = "f32_vmin_test",
6815 srcs = [
6816 "test/f32-vmin.cc",
6817 "test/vbinary-microkernel-tester.h",
6818 ] + MICROKERNEL_TEST_HDRS,
6819 deps = MICROKERNEL_TEST_DEPS,
6820)
6821
6822xnnpack_unit_test(
6823 name = "f32_vminc_test",
6824 srcs = [
6825 "test/f32-vminc.cc",
6826 "test/vbinaryc-microkernel-tester.h",
6827 ] + MICROKERNEL_TEST_HDRS,
6828 deps = MICROKERNEL_TEST_DEPS,
6829)
6830
6831xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006832 name = "f32_vmul_test",
6833 srcs = [
6834 "test/f32-vmul.cc",
6835 "test/vbinary-microkernel-tester.h",
6836 ] + MICROKERNEL_TEST_HDRS,
6837 deps = MICROKERNEL_TEST_DEPS,
6838)
6839
6840xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006841 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006842 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006843 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006844 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006845 ] + MICROKERNEL_TEST_HDRS,
6846 deps = MICROKERNEL_TEST_DEPS,
6847)
6848
6849xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006850 name = "f32_vmul_relu_test",
6851 srcs = [
6852 "test/f32-vmul-relu.cc",
6853 "test/vbinary-microkernel-tester.h",
6854 ] + MICROKERNEL_TEST_HDRS,
6855 deps = MICROKERNEL_TEST_DEPS,
6856)
6857
6858xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006859 name = "f32_vmulc_test",
6860 srcs = [
6861 "test/f32-vmulc.cc",
6862 "test/vbinaryc-microkernel-tester.h",
6863 ] + MICROKERNEL_TEST_HDRS,
6864 deps = MICROKERNEL_TEST_DEPS,
6865)
6866
6867xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006868 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006869 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006870 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006871 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006872 ] + MICROKERNEL_TEST_HDRS,
6873 deps = MICROKERNEL_TEST_DEPS,
6874)
6875
6876xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006877 name = "f32_vmulc_relu_test",
6878 srcs = [
6879 "test/f32-vmulc-relu.cc",
6880 "test/vbinaryc-microkernel-tester.h",
6881 ] + MICROKERNEL_TEST_HDRS,
6882 deps = MICROKERNEL_TEST_DEPS,
6883)
6884
6885xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006886 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006887 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006888 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006889 "test/vmulcaddc-microkernel-tester.h",
6890 "src/xnnpack/AlignedAllocator.h",
6891 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006892 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006893)
6894
6895xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07006896 name = "f32_vlrelu_test",
6897 srcs = [
6898 "test/f32-vlrelu.cc",
6899 "test/vunary-microkernel-tester.h",
6900 ] + MICROKERNEL_TEST_HDRS,
6901 deps = MICROKERNEL_TEST_DEPS,
6902)
6903
6904xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006905 name = "f32_vneg_test",
6906 srcs = [
6907 "test/f32-vneg.cc",
6908 "test/vunary-microkernel-tester.h",
6909 ] + MICROKERNEL_TEST_HDRS,
6910 deps = MICROKERNEL_TEST_DEPS,
6911)
6912
6913xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006914 name = "f32_vrelu_test",
6915 srcs = [
6916 "test/f32-vrelu.cc",
6917 "test/vunary-microkernel-tester.h",
6918 ] + MICROKERNEL_TEST_HDRS,
6919 deps = MICROKERNEL_TEST_DEPS,
6920)
6921
6922xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07006923 name = "f32_vrndne_test",
6924 srcs = [
6925 "test/f32-vrndne.cc",
6926 "test/vunary-microkernel-tester.h",
6927 ] + MICROKERNEL_TEST_HDRS,
6928 deps = MICROKERNEL_TEST_DEPS,
6929)
6930
6931xnnpack_unit_test(
6932 name = "f32_vrndz_test",
6933 srcs = [
6934 "test/f32-vrndz.cc",
6935 "test/vunary-microkernel-tester.h",
6936 ] + MICROKERNEL_TEST_HDRS,
6937 deps = MICROKERNEL_TEST_DEPS,
6938)
6939
6940xnnpack_unit_test(
6941 name = "f32_vrndu_test",
6942 srcs = [
6943 "test/f32-vrndu.cc",
6944 "test/vunary-microkernel-tester.h",
6945 ] + MICROKERNEL_TEST_HDRS,
6946 deps = MICROKERNEL_TEST_DEPS,
6947)
6948
6949xnnpack_unit_test(
6950 name = "f32_vrndd_test",
6951 srcs = [
6952 "test/f32-vrndd.cc",
6953 "test/vunary-microkernel-tester.h",
6954 ] + MICROKERNEL_TEST_HDRS,
6955 deps = MICROKERNEL_TEST_DEPS,
6956)
6957
6958xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07006959 name = "f32_vscale_test",
6960 srcs = [
6961 "test/f32-vscale.cc",
6962 "test/vscale-microkernel-tester.h",
6963 ] + MICROKERNEL_TEST_HDRS,
6964 deps = MICROKERNEL_TEST_DEPS,
6965)
6966
6967xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006968 name = "f32_vscaleexpminusmax_test",
6969 srcs = [
6970 "test/f32-vscaleexpminusmax.cc",
6971 "test/vscaleexpminusmax-microkernel-tester.h",
6972 ] + MICROKERNEL_TEST_HDRS,
6973 deps = MICROKERNEL_TEST_DEPS,
6974)
6975
6976xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006977 name = "f32_vscaleextexp_test",
6978 srcs = [
6979 "test/f32-vscaleextexp.cc",
6980 "test/vscaleextexp-microkernel-tester.h",
6981 ] + MICROKERNEL_TEST_HDRS,
6982 deps = MICROKERNEL_TEST_DEPS,
6983)
6984
6985xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006986 name = "f32_vsigmoid_test",
6987 srcs = [
6988 "test/f32-vsigmoid.cc",
6989 "test/vunary-microkernel-tester.h",
6990 ] + MICROKERNEL_TEST_HDRS,
6991 deps = MICROKERNEL_TEST_DEPS,
6992)
6993
6994xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006995 name = "f32_vsqr_test",
6996 srcs = [
6997 "test/f32-vsqr.cc",
6998 "test/vunary-microkernel-tester.h",
6999 ] + MICROKERNEL_TEST_HDRS,
7000 deps = MICROKERNEL_TEST_DEPS,
7001)
7002
7003xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007004 name = "f32_vsqrdiff_test",
7005 srcs = [
7006 "test/f32-vsqrdiff.cc",
7007 "test/vbinary-microkernel-tester.h",
7008 ] + MICROKERNEL_TEST_HDRS,
7009 deps = MICROKERNEL_TEST_DEPS,
7010)
7011
7012xnnpack_unit_test(
7013 name = "f32_vsqrdiffc_test",
7014 srcs = [
7015 "test/f32-vsqrdiffc.cc",
7016 "test/vbinaryc-microkernel-tester.h",
7017 ] + MICROKERNEL_TEST_HDRS,
7018 deps = MICROKERNEL_TEST_DEPS,
7019)
7020
7021xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007022 name = "f32_vsqrt_test",
7023 srcs = [
7024 "test/f32-vsqrt.cc",
7025 "test/vunary-microkernel-tester.h",
7026 ] + MICROKERNEL_TEST_HDRS,
7027 deps = MICROKERNEL_TEST_DEPS,
7028)
7029
7030xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007031 name = "f32_vsub_test",
7032 srcs = [
7033 "test/f32-vsub.cc",
7034 "test/vbinary-microkernel-tester.h",
7035 ] + MICROKERNEL_TEST_HDRS,
7036 deps = MICROKERNEL_TEST_DEPS,
7037)
7038
7039xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007040 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007041 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007042 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007043 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007044 ] + MICROKERNEL_TEST_HDRS,
7045 deps = MICROKERNEL_TEST_DEPS,
7046)
7047
7048xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007049 name = "f32_vsub_relu_test",
7050 srcs = [
7051 "test/f32-vsub-relu.cc",
7052 "test/vbinary-microkernel-tester.h",
7053 ] + MICROKERNEL_TEST_HDRS,
7054 deps = MICROKERNEL_TEST_DEPS,
7055)
7056
7057xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007058 name = "f32_vsubc_test",
7059 srcs = [
7060 "test/f32-vsubc.cc",
7061 "test/vbinaryc-microkernel-tester.h",
7062 ] + MICROKERNEL_TEST_HDRS,
7063 deps = MICROKERNEL_TEST_DEPS,
7064)
7065
7066xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007067 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007068 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007069 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007070 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007071 ] + MICROKERNEL_TEST_HDRS,
7072 deps = MICROKERNEL_TEST_DEPS,
7073)
7074
7075xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007076 name = "f32_vsubc_relu_test",
7077 srcs = [
7078 "test/f32-vsubc-relu.cc",
7079 "test/vbinaryc-microkernel-tester.h",
7080 ] + MICROKERNEL_TEST_HDRS,
7081 deps = MICROKERNEL_TEST_DEPS,
7082)
7083
7084xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007085 name = "f32_vrsubc_test",
7086 srcs = [
7087 "test/f32-vrsubc.cc",
7088 "test/vbinaryc-microkernel-tester.h",
7089 ] + MICROKERNEL_TEST_HDRS,
7090 deps = MICROKERNEL_TEST_DEPS,
7091)
7092
7093xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007094 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007095 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007096 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007097 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007098 ] + MICROKERNEL_TEST_HDRS,
7099 deps = MICROKERNEL_TEST_DEPS,
7100)
7101
7102xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007103 name = "f32_vrsubc_relu_test",
7104 srcs = [
7105 "test/f32-vrsubc-relu.cc",
7106 "test/vbinaryc-microkernel-tester.h",
7107 ] + MICROKERNEL_TEST_HDRS,
7108 deps = MICROKERNEL_TEST_DEPS,
7109)
7110
7111xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007112 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007113 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007114 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007115 "test/dwconv-microkernel-tester.h",
7116 "src/xnnpack/AlignedAllocator.h",
7117 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7118 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7119)
7120
7121xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007122 name = "qs8_dwconv_minmax_fp32_test",
7123 srcs = [
7124 "test/qs8-dwconv-minmax-fp32.cc",
7125 "test/dwconv-microkernel-tester.h",
7126 "src/xnnpack/AlignedAllocator.h",
7127 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7128 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7129)
7130
7131xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007132 name = "qs8_gavgpool_minmax_test",
7133 srcs = [
7134 "test/qs8-gavgpool-minmax.cc",
7135 "test/gavgpool-microkernel-tester.h",
7136 "src/xnnpack/AlignedAllocator.h",
7137 ] + MICROKERNEL_TEST_HDRS,
7138 deps = MICROKERNEL_TEST_DEPS,
7139)
7140
7141xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007142 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007143 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007144 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007145 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007146 "test/gemm-microkernel-tester.h",
7147 "src/xnnpack/AlignedAllocator.h",
7148 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7149 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7150)
7151
7152xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007153 name = "qs8_gemm_minmax_fp32_test",
7154 timeout = "moderate",
7155 srcs = [
7156 "test/qs8-gemm-minmax-fp32.cc",
7157 "test/gemm-microkernel-tester.h",
7158 "src/xnnpack/AlignedAllocator.h",
7159 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7160 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7161)
7162
7163xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007164 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007165 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007166 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007167 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007168 "test/gemm-microkernel-tester.h",
7169 "src/xnnpack/AlignedAllocator.h",
7170 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7171 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7172)
7173
7174xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007175 name = "qs8_igemm_minmax_fp32_test",
7176 timeout = "moderate",
7177 srcs = [
7178 "test/qs8-igemm-minmax-fp32.cc",
7179 "test/gemm-microkernel-tester.h",
7180 "src/xnnpack/AlignedAllocator.h",
7181 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7182 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7183)
7184
7185xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007186 name = "qs8_requantization_test",
7187 srcs = [
7188 "src/xnnpack/requantization-stubs.h",
7189 "test/qs8-requantization.cc",
7190 "test/requantization-tester.h",
7191 ] + MICROKERNEL_TEST_HDRS,
7192 deps = MICROKERNEL_TEST_DEPS,
7193)
7194
7195xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007196 name = "qs8_vadd_minmax_test",
7197 srcs = [
7198 "test/qs8-vadd-minmax.cc",
7199 "test/vadd-microkernel-tester.h",
7200 ] + MICROKERNEL_TEST_HDRS,
7201 deps = MICROKERNEL_TEST_DEPS,
7202)
7203
7204xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007205 name = "qs8_vaddc_minmax_test",
7206 srcs = [
7207 "test/qs8-vaddc-minmax.cc",
7208 "test/vaddc-microkernel-tester.h",
7209 ] + MICROKERNEL_TEST_HDRS,
7210 deps = MICROKERNEL_TEST_DEPS,
7211)
7212
7213xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007214 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007215 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007216 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007217 "test/avgpool-microkernel-tester.h",
7218 "src/xnnpack/AlignedAllocator.h",
7219 ] + MICROKERNEL_TEST_HDRS,
7220 deps = MICROKERNEL_TEST_DEPS,
7221)
7222
7223xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007224 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007225 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007226 "test/qu8-dwconv-minmax.cc",
7227 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007228 "src/xnnpack/AlignedAllocator.h",
7229 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007230 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007231)
7232
7233xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007234 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007235 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007236 "test/qu8-igemm-minmax.cc",
7237 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007238 "src/xnnpack/AlignedAllocator.h",
7239 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007240 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007241)
7242
7243xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007244 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007245 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007246 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007247 "test/gavgpool-microkernel-tester.h",
7248 "src/xnnpack/AlignedAllocator.h",
7249 ] + MICROKERNEL_TEST_HDRS,
7250 deps = MICROKERNEL_TEST_DEPS,
7251)
7252
7253xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007254 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007255 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007256 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007257 "test/gemm-microkernel-tester.h",
7258 "src/xnnpack/AlignedAllocator.h",
7259 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007260 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007261)
7262
7263xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007264 name = "qu8_requantization_test",
7265 srcs = [
7266 "src/xnnpack/requantization-stubs.h",
7267 "test/qu8-requantization.cc",
7268 "test/requantization-tester.h",
7269 ] + MICROKERNEL_TEST_HDRS,
7270 deps = MICROKERNEL_TEST_DEPS,
7271)
7272
7273xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007274 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007275 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007276 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007277 "test/vadd-microkernel-tester.h",
7278 ] + MICROKERNEL_TEST_HDRS,
7279 deps = MICROKERNEL_TEST_DEPS,
7280)
7281
7282xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007283 name = "u8_lut32norm_test",
7284 srcs = [
7285 "test/u8-lut32norm.cc",
7286 "test/lut-norm-microkernel-tester.h",
7287 ] + MICROKERNEL_TEST_HDRS,
7288 deps = MICROKERNEL_TEST_DEPS,
7289)
7290
7291xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007292 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007293 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007294 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007295 "test/maxpool-microkernel-tester.h",
7296 ] + MICROKERNEL_TEST_HDRS,
7297 deps = MICROKERNEL_TEST_DEPS,
7298)
7299
7300xnnpack_unit_test(
7301 name = "u8_rmax_test",
7302 srcs = [
7303 "test/u8-rmax.cc",
7304 "test/rmax-microkernel-tester.h",
7305 ] + MICROKERNEL_TEST_HDRS,
7306 deps = MICROKERNEL_TEST_DEPS,
7307)
7308
7309xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007310 name = "u8_vclamp_test",
7311 srcs = [
7312 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007313 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007314 ] + MICROKERNEL_TEST_HDRS,
7315 deps = MICROKERNEL_TEST_DEPS,
7316)
7317
7318xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007319 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007320 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007321 "test/x32-depthtospace2d-chw2hwc.cc",
7322 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007323 ] + MICROKERNEL_TEST_HDRS,
7324 deps = MICROKERNEL_TEST_DEPS,
7325)
7326
7327xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007328 name = "x32_fill_test",
7329 srcs = [
7330 "test/x32-fill.cc",
7331 "test/fill-microkernel-tester.h",
7332 ] + MICROKERNEL_TEST_HDRS,
7333 deps = MICROKERNEL_TEST_DEPS,
7334)
7335
7336xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007337 name = "x32_packx_test",
7338 srcs = [
7339 "test/x32-packx.cc",
7340 "test/pack-microkernel-tester.h",
7341 "src/xnnpack/AlignedAllocator.h",
7342 ] + MICROKERNEL_TEST_HDRS,
7343 deps = MICROKERNEL_TEST_DEPS,
7344)
7345
7346xnnpack_unit_test(
7347 name = "x32_pad_test",
7348 srcs = [
7349 "test/x32-pad.cc",
7350 "test/pad-microkernel-tester.h",
7351 ] + MICROKERNEL_TEST_HDRS,
7352 deps = MICROKERNEL_TEST_DEPS,
7353)
7354
7355xnnpack_unit_test(
7356 name = "x32_unpool_test",
7357 srcs = [
7358 "test/x32-unpool.cc",
7359 "test/unpool-microkernel-tester.h",
7360 ] + MICROKERNEL_TEST_HDRS,
7361 deps = MICROKERNEL_TEST_DEPS,
7362)
7363
7364xnnpack_unit_test(
7365 name = "x32_zip_test",
7366 srcs = [
7367 "test/x32-zip.cc",
7368 "test/zip-microkernel-tester.h",
7369 ] + MICROKERNEL_TEST_HDRS,
7370 deps = MICROKERNEL_TEST_DEPS,
7371)
7372
7373xnnpack_unit_test(
7374 name = "x8_lut_test",
7375 srcs = [
7376 "test/x8-lut.cc",
7377 "test/lut-microkernel-tester.h",
7378 ] + MICROKERNEL_TEST_HDRS,
7379 deps = MICROKERNEL_TEST_DEPS,
7380)
7381
7382xnnpack_unit_test(
7383 name = "x8_zip_test",
7384 srcs = [
7385 "test/x8-zip.cc",
7386 "test/zip-microkernel-tester.h",
7387 ] + MICROKERNEL_TEST_HDRS,
7388 deps = MICROKERNEL_TEST_DEPS,
7389)
7390
Marat Dukhan20c3b922020-03-10 03:45:06 -07007391########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007392
7393xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007394 name = "operator_size_test",
7395 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007396 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007397)
7398
Marat Dukhan20c3b922020-03-10 03:45:06 -07007399xnnpack_binary(
7400 name = "subgraph_size_test",
7401 srcs = ["test/subgraph-size.c"],
7402 deps = [":XNNPACK"],
7403)
7404
7405########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007406
7407xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007408 name = "abs_nc_test",
7409 srcs = [
7410 "test/abs-nc.cc",
7411 "test/abs-operator-tester.h",
7412 ],
7413 deps = OPERATOR_TEST_DEPS,
7414)
7415
7416xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007417 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007418 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007419 srcs = [
7420 "test/add-nd.cc",
7421 "test/binary-elementwise-operator-tester.h",
7422 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007423 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007424)
7425
7426xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007427 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007428 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007429 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007430 "test/argmax-pooling-operator-tester.h",
7431 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007432 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007433)
7434
7435xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007436 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007437 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007438 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007439 "test/average-pooling-operator-tester.h",
7440 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007441 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007442)
7443
7444xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007445 name = "bankers_rounding_nc_test",
7446 srcs = [
7447 "test/bankers-rounding-nc.cc",
7448 "test/bankers-rounding-operator-tester.h",
7449 ],
7450 deps = OPERATOR_TEST_DEPS,
7451)
7452
7453xnnpack_unit_test(
7454 name = "ceiling_nc_test",
7455 srcs = [
7456 "test/ceiling-nc.cc",
7457 "test/ceiling-operator-tester.h",
7458 ],
7459 deps = OPERATOR_TEST_DEPS,
7460)
7461
7462xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007463 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007464 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007465 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007466 "test/channel-shuffle-operator-tester.h",
7467 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007468 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007469)
7470
7471xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007472 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007473 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007474 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007475 "test/clamp-operator-tester.h",
7476 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007477 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007478)
7479
7480xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007481 name = "constant_pad_nd_test",
7482 srcs = [
7483 "test/constant-pad-nd.cc",
7484 "test/constant-pad-operator-tester.h",
7485 ],
7486 deps = OPERATOR_TEST_DEPS,
7487)
7488
7489xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007490 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007491 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007492 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007493 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007494 "test/convolution-operator-tester.h",
7495 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007496 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007497)
7498
7499xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007500 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007501 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007502 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007503 "test/convolution-nchw.cc",
7504 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007505 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007506 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007507)
7508
7509xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007510 name = "copy_nc_test",
7511 srcs = [
7512 "test/copy-nc.cc",
7513 "test/copy-operator-tester.h",
7514 ],
7515 deps = OPERATOR_TEST_DEPS,
7516)
7517
7518xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007519 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007520 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007521 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007522 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007523 "test/deconvolution-operator-tester.h",
7524 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007525 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007526)
7527
7528xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007529 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007530 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007531 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007532 "test/depth-to-space-operator-tester.h",
7533 ] + OPERATOR_TEST_PARAMS_HDRS,
7534 deps = OPERATOR_TEST_DEPS,
7535)
7536
7537xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007538 name = "depth_to_space_nhwc_test",
7539 srcs = [
7540 "test/depth-to-space-nhwc.cc",
7541 "test/depth-to-space-operator-tester.h",
7542 ] + OPERATOR_TEST_PARAMS_HDRS,
7543 deps = OPERATOR_TEST_DEPS,
7544)
7545
7546xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007547 name = "divide_nd_test",
7548 srcs = [
7549 "test/binary-elementwise-operator-tester.h",
7550 "test/divide-nd.cc",
7551 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007552 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007553)
7554
7555xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007556 name = "elu_nc_test",
7557 srcs = [
7558 "test/elu-nc.cc",
7559 "test/elu-operator-tester.h",
7560 ],
7561 deps = OPERATOR_TEST_DEPS,
7562)
7563
7564xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007565 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007566 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007567 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007568 "test/fully-connected-operator-tester.h",
7569 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007570 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007571)
7572
7573xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007574 name = "floor_nc_test",
7575 srcs = [
7576 "test/floor-nc.cc",
7577 "test/floor-operator-tester.h",
7578 ],
7579 deps = OPERATOR_TEST_DEPS,
7580)
7581
7582xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007583 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007584 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007585 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007586 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007587 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007588 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007589)
7590
7591xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007592 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007593 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007594 "test/global-average-pooling-ncw.cc",
7595 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007596 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007597 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007598)
7599
7600xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007601 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007602 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007603 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007604 "test/hardswish-operator-tester.h",
7605 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007606 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007607)
7608
7609xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007610 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007611 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007612 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007613 "test/leaky-relu-operator-tester.h",
7614 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007615 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007616)
7617
7618xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007619 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007620 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007621 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007622 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007623 "test/max-pooling-operator-tester.h",
7624 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007625 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007626)
7627
7628xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007629 name = "maximum_nd_test",
7630 srcs = [
7631 "test/binary-elementwise-operator-tester.h",
7632 "test/maximum-nd.cc",
7633 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007634 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007635)
7636
7637xnnpack_unit_test(
7638 name = "minimum_nd_test",
7639 srcs = [
7640 "test/binary-elementwise-operator-tester.h",
7641 "test/minimum-nd.cc",
7642 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007643 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007644)
7645
7646xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007647 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007648 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007649 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007650 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007651 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007652 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007653)
7654
7655xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007656 name = "negate_nc_test",
7657 srcs = [
7658 "test/negate-nc.cc",
7659 "test/negate-operator-tester.h",
7660 ],
7661 deps = OPERATOR_TEST_DEPS,
7662)
7663
7664xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007665 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007666 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007667 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007668 "test/prelu-operator-tester.h",
7669 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007670 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007671)
7672
7673xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007674 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007675 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007676 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007677 "test/resize-bilinear-operator-tester.h",
7678 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007679 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007680)
7681
7682xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007683 name = "resize_bilinear_nchw_test",
7684 srcs = [
7685 "test/resize-bilinear-nchw.cc",
7686 "test/resize-bilinear-operator-tester.h",
7687 ] + OPERATOR_TEST_PARAMS_HDRS,
7688 deps = OPERATOR_TEST_DEPS,
7689)
7690
7691xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007692 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007693 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007694 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007695 "test/sigmoid-operator-tester.h",
7696 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007697 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007698)
7699
7700xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007701 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007702 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007703 "test/softmax-nc.cc",
7704 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007705 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007706 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007707)
7708
7709xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007710 name = "square_nc_test",
7711 srcs = [
7712 "test/square-nc.cc",
7713 "test/square-operator-tester.h",
7714 ],
7715 deps = OPERATOR_TEST_DEPS,
7716)
7717
7718xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007719 name = "square_root_nc_test",
7720 srcs = [
7721 "test/square-root-nc.cc",
7722 "test/square-root-operator-tester.h",
7723 ],
7724 deps = OPERATOR_TEST_DEPS,
7725)
7726
7727xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007728 name = "squared_difference_nd_test",
7729 srcs = [
7730 "test/binary-elementwise-operator-tester.h",
7731 "test/squared-difference-nd.cc",
7732 ],
7733 deps = OPERATOR_TEST_DEPS,
7734)
7735
7736xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007737 name = "subtract_nd_test",
7738 srcs = [
7739 "test/binary-elementwise-operator-tester.h",
7740 "test/subtract-nd.cc",
7741 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007742 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007743)
7744
7745xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007746 name = "truncation_nc_test",
7747 srcs = [
7748 "test/truncation-nc.cc",
7749 "test/truncation-operator-tester.h",
7750 ],
7751 deps = OPERATOR_TEST_DEPS,
7752)
7753
7754xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007755 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007756 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007757 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007758 "test/unpooling-operator-tester.h",
7759 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007760 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007761)
7762
Chao Mei6ddfc602020-05-13 22:29:36 -07007763############################### Misc unit tests ###############################
7764
7765xnnpack_unit_test(
7766 name = "memory_planner_test",
7767 srcs = [
7768 "test/memory-planner-test.cc",
7769 ],
7770 deps = [
7771 ":XNNPACK",
7772 ":memory_planner",
7773 ],
7774)
7775
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07007776xnnpack_unit_test(
7777 name = "subgraph_nchw_test",
7778 srcs = [
7779 "src/xnnpack/subgraph.h",
7780 "test/subgraph-nchw.cc",
7781 "test/subgraph-tester.h",
7782 ],
7783 deps = [
7784 ":XNNPACK",
7785 ],
7786)
7787
Marat Dukhan08c4a432019-10-03 09:29:21 -07007788############################# Build configurations #############################
7789
Marat Dukhanb8642352019-10-30 15:43:02 -07007790# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07007791config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007792 name = "xnn_enable_assembly_explicit_true",
7793 define_values = {"xnn_enable_assembly": "true"},
7794)
7795
7796# Disables usage of assembly kernels.
7797config_setting(
7798 name = "xnn_enable_assembly_explicit_false",
7799 define_values = {"xnn_enable_assembly": "false"},
7800)
7801
Marat Dukhan9de90e02020-06-18 16:04:12 -07007802# Enables usage of sparse inference.
7803config_setting(
7804 name = "xnn_enable_sparse_explicit_true",
7805 define_values = {"xnn_enable_sparse": "true"},
7806)
7807
7808# Disables usage of sparse inference.
7809config_setting(
7810 name = "xnn_enable_sparse_explicit_false",
7811 define_values = {"xnn_enable_sparse": "false"},
7812)
7813
Marat Dukhan05702cf2020-03-26 15:41:33 -07007814# Disables usage of HMP-aware optimizations.
7815config_setting(
7816 name = "xnn_enable_hmp_explicit_false",
7817 define_values = {"xnn_enable_hmp": "false"},
7818)
7819
Chao Mei6ddfc602020-05-13 22:29:36 -07007820# Enable usage of optimized memory allocation
7821config_setting(
7822 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07007823 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007824)
7825
7826# Disable usage of optimized memory allocation
7827config_setting(
7828 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07007829 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007830)
7831
Marat Dukhanb939cdb2021-03-30 18:51:51 -07007832# Enable QS8 inference in TFLite-specific version
7833config_setting(
7834 name = "xnn_enable_qs8_explicit_true",
7835 define_values = {"xnn_enable_qs8": "true"},
7836)
7837
7838# Disable QS8 inference in TFLite-specific version
7839config_setting(
7840 name = "xnn_enable_qs8_explicit_false",
7841 define_values = {"xnn_enable_qs8": "false"},
7842)
7843
Marat Dukhanb8642352019-10-30 15:43:02 -07007844# Builds with -c dbg
7845config_setting(
7846 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007847 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07007848 "compilation_mode": "dbg",
7849 },
7850)
7851
7852# Builds with -c opt
7853config_setting(
7854 name = "optimized_build",
7855 values = {
7856 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007857 },
7858)
7859
7860config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007861 name = "linux_k8",
7862 values = {"cpu": "k8"},
7863)
7864
7865config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007866 name = "linux_arm",
7867 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07007868)
7869
7870config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07007871 name = "linux_armeabi",
7872 values = {"cpu": "armeabi"},
7873)
7874
7875config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07007876 name = "linux_armhf",
7877 values = {"cpu": "armhf"},
7878)
7879
7880config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07007881 name = "linux_armv7a",
7882 values = {"cpu": "armv7a"},
7883)
7884
7885config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007886 name = "linux_aarch64",
7887 values = {"cpu": "aarch64"},
7888)
7889
7890config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007891 name = "android",
7892 values = {"crosstool_top": "//external:android/crosstool"},
7893)
7894
7895config_setting(
7896 name = "android_armv7",
7897 values = {
7898 "crosstool_top": "//external:android/crosstool",
7899 "cpu": "armeabi-v7a",
7900 },
7901)
7902
7903config_setting(
7904 name = "android_arm64",
7905 values = {
7906 "crosstool_top": "//external:android/crosstool",
7907 "cpu": "arm64-v8a",
7908 },
7909)
7910
7911config_setting(
7912 name = "android_x86",
7913 values = {
7914 "crosstool_top": "//external:android/crosstool",
7915 "cpu": "x86",
7916 },
7917)
7918
7919config_setting(
7920 name = "android_x86_64",
7921 values = {
7922 "crosstool_top": "//external:android/crosstool",
7923 "cpu": "x86_64",
7924 },
7925)
7926
7927config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007928 name = "windows_x86_64",
7929 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007930)
7931
7932config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007933 name = "windows_x86_64_clang",
7934 values = {
7935 "compiler": "clang-cl",
7936 "cpu": "x64_windows",
7937 },
7938)
7939
7940config_setting(
7941 name = "windows_x86_64_mingw",
7942 values = {
7943 "compiler": "mingw-gcc",
7944 "cpu": "x64_windows",
7945 },
7946)
7947
7948config_setting(
7949 name = "windows_x86_64_msys",
7950 values = {
7951 "compiler": "msys-gcc",
7952 "cpu": "x64_windows",
7953 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007954)
7955
7956config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07007957 name = "macos_x86_64",
7958 values = {
7959 "apple_platform_type": "macos",
7960 "cpu": "darwin",
7961 },
7962)
7963
7964config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01007965 name = "macos_arm64",
7966 values = {
7967 "apple_platform_type": "macos",
7968 "cpu": "darwin_arm64",
7969 },
7970)
7971
7972config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007973 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007974 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07007975)
7976
7977config_setting(
7978 name = "emscripten_wasm",
7979 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007980 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007981 "cpu": "wasm",
7982 },
7983)
7984
7985config_setting(
7986 name = "emscripten_wasmsimd",
7987 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007988 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007989 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07007990 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007991 },
7992)
7993
7994config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007995 name = "ios_armv7",
7996 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08007997 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08007998 "cpu": "ios_armv7",
7999 },
8000)
8001
8002config_setting(
8003 name = "ios_arm64",
8004 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008005 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008006 "cpu": "ios_arm64",
8007 },
8008)
8009
8010config_setting(
8011 name = "ios_arm64e",
8012 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008013 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008014 "cpu": "ios_arm64e",
8015 },
8016)
8017
8018config_setting(
8019 name = "ios_x86",
8020 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008021 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008022 "cpu": "ios_i386",
8023 },
8024)
8025
8026config_setting(
8027 name = "ios_x86_64",
8028 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008029 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008030 "cpu": "ios_x86_64",
8031 },
8032)
8033
8034config_setting(
8035 name = "watchos_armv7k",
8036 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008037 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008038 "cpu": "watchos_armv7k",
8039 },
8040)
8041
8042config_setting(
8043 name = "watchos_arm64_32",
8044 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008045 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008046 "cpu": "watchos_arm64_32",
8047 },
8048)
8049
8050config_setting(
8051 name = "watchos_x86",
8052 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008053 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008054 "cpu": "watchos_i386",
8055 },
8056)
8057
8058config_setting(
8059 name = "watchos_x86_64",
8060 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008061 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008062 "cpu": "watchos_x86_64",
8063 },
8064)
8065
8066config_setting(
8067 name = "tvos_arm64",
8068 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008069 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008070 "cpu": "tvos_arm64",
8071 },
8072)
8073
8074config_setting(
8075 name = "tvos_x86_64",
8076 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008077 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008078 "cpu": "tvos_x86_64",
8079 },
8080)