Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 1 | /* |
| 2 | * XGL |
| 3 | * |
| 4 | * Copyright (C) 2014 LunarG, Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included |
| 14 | * in all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
Chia-I Wu | 44e4236 | 2014-09-02 08:32:09 +0800 | [diff] [blame] | 23 | * |
| 24 | * Authors: |
| 25 | * Chia-I Wu <olv@lunarg.com> |
| 26 | * Courtney Goeltzenleuchter <courtney@lunarg.com> |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 27 | */ |
| 28 | |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 29 | #include "genhw/genhw.h" |
| 30 | #include "kmd/winsys.h" |
| 31 | #include "dev.h" |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 32 | #include "mem.h" |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 33 | #include "obj.h" |
Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 34 | #include "cmd_priv.h" |
Jon Ashburn | c04b4dc | 2015-01-08 18:48:10 -0700 | [diff] [blame] | 35 | #include "fb.h" |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 36 | |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 37 | /** |
| 38 | * Free all resources used by a writer. Note that the initial size is not |
| 39 | * reset. |
| 40 | */ |
| 41 | static void cmd_writer_reset(struct intel_cmd *cmd, |
| 42 | enum intel_cmd_writer_type which) |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 43 | { |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 44 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 45 | |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 46 | if (writer->ptr) { |
| 47 | intel_bo_unmap(writer->bo); |
| 48 | writer->ptr = NULL; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 49 | } |
| 50 | |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 51 | if (writer->bo) { |
| 52 | intel_bo_unreference(writer->bo); |
| 53 | writer->bo = NULL; |
| 54 | } |
| 55 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 56 | writer->used = 0; |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 57 | |
| 58 | if (writer->items) { |
| 59 | icd_free(writer->items); |
Courtney Goeltzenleuchter | 2ba7016 | 2014-09-25 18:14:53 -0600 | [diff] [blame] | 60 | writer->items = NULL; |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 61 | writer->item_alloc = 0; |
| 62 | writer->item_used = 0; |
| 63 | } |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | /** |
| 67 | * Discard everything written so far. |
| 68 | */ |
| 69 | static void cmd_writer_discard(struct intel_cmd *cmd, |
| 70 | enum intel_cmd_writer_type which) |
| 71 | { |
| 72 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
| 73 | |
| 74 | intel_bo_truncate_relocs(writer->bo, 0); |
| 75 | writer->used = 0; |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 76 | writer->item_used = 0; |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 77 | } |
| 78 | |
| 79 | static struct intel_bo *alloc_writer_bo(struct intel_winsys *winsys, |
| 80 | enum intel_cmd_writer_type which, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 81 | size_t size) |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 82 | { |
| 83 | static const char *writer_names[INTEL_CMD_WRITER_COUNT] = { |
| 84 | [INTEL_CMD_WRITER_BATCH] = "batch", |
Chia-I Wu | 15cccf7 | 2015-02-10 04:07:40 +0800 | [diff] [blame^] | 85 | [INTEL_CMD_WRITER_SURFACE] = "surface", |
| 86 | [INTEL_CMD_WRITER_STATE] = "state", |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 87 | [INTEL_CMD_WRITER_INSTRUCTION] = "instruction", |
| 88 | }; |
| 89 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 90 | return intel_winsys_alloc_buffer(winsys, writer_names[which], size, true); |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 91 | } |
| 92 | |
| 93 | /** |
| 94 | * Allocate and map the buffer for writing. |
| 95 | */ |
| 96 | static XGL_RESULT cmd_writer_alloc_and_map(struct intel_cmd *cmd, |
| 97 | enum intel_cmd_writer_type which) |
| 98 | { |
| 99 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
| 100 | struct intel_bo *bo; |
| 101 | |
| 102 | bo = alloc_writer_bo(cmd->dev->winsys, which, writer->size); |
| 103 | if (bo) { |
| 104 | if (writer->bo) |
| 105 | intel_bo_unreference(writer->bo); |
| 106 | writer->bo = bo; |
| 107 | } else if (writer->bo) { |
| 108 | /* reuse the old bo */ |
| 109 | cmd_writer_discard(cmd, which); |
| 110 | } else { |
| 111 | return XGL_ERROR_OUT_OF_GPU_MEMORY; |
| 112 | } |
| 113 | |
| 114 | writer->used = 0; |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 115 | writer->item_used = 0; |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 116 | |
| 117 | writer->ptr = intel_bo_map(writer->bo, true); |
| 118 | if (!writer->ptr) |
| 119 | return XGL_ERROR_UNKNOWN; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 120 | |
| 121 | return XGL_SUCCESS; |
| 122 | } |
| 123 | |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 124 | /** |
| 125 | * Unmap the buffer for submission. |
| 126 | */ |
| 127 | static void cmd_writer_unmap(struct intel_cmd *cmd, |
| 128 | enum intel_cmd_writer_type which) |
Chia-I Wu | 5e25c27 | 2014-08-21 20:19:12 +0800 | [diff] [blame] | 129 | { |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 130 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
| 131 | |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 132 | intel_bo_unmap(writer->bo); |
| 133 | writer->ptr = NULL; |
| 134 | } |
| 135 | |
| 136 | /** |
| 137 | * Grow a mapped writer to at least \p new_size. Failures are handled |
| 138 | * silently. |
| 139 | */ |
| 140 | void cmd_writer_grow(struct intel_cmd *cmd, |
| 141 | enum intel_cmd_writer_type which, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 142 | size_t new_size) |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 143 | { |
| 144 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
| 145 | struct intel_bo *new_bo; |
| 146 | void *new_ptr; |
| 147 | |
| 148 | if (new_size < writer->size << 1) |
| 149 | new_size = writer->size << 1; |
| 150 | /* STATE_BASE_ADDRESS requires page-aligned buffers */ |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 151 | new_size = u_align(new_size, 4096); |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 152 | |
| 153 | new_bo = alloc_writer_bo(cmd->dev->winsys, which, new_size); |
| 154 | if (!new_bo) { |
| 155 | cmd_writer_discard(cmd, which); |
| 156 | cmd->result = XGL_ERROR_OUT_OF_GPU_MEMORY; |
| 157 | return; |
| 158 | } |
| 159 | |
| 160 | /* map and copy the data over */ |
| 161 | new_ptr = intel_bo_map(new_bo, true); |
| 162 | if (!new_ptr) { |
| 163 | intel_bo_unreference(new_bo); |
| 164 | cmd_writer_discard(cmd, which); |
| 165 | cmd->result = XGL_ERROR_UNKNOWN; |
| 166 | return; |
| 167 | } |
| 168 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 169 | memcpy(new_ptr, writer->ptr, writer->used); |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 170 | |
| 171 | intel_bo_unmap(writer->bo); |
| 172 | intel_bo_unreference(writer->bo); |
| 173 | |
| 174 | writer->size = new_size; |
| 175 | writer->bo = new_bo; |
| 176 | writer->ptr = new_ptr; |
Chia-I Wu | 5e25c27 | 2014-08-21 20:19:12 +0800 | [diff] [blame] | 177 | } |
| 178 | |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 179 | /** |
| 180 | * Record an item for later decoding. |
| 181 | */ |
| 182 | void cmd_writer_record(struct intel_cmd *cmd, |
| 183 | enum intel_cmd_writer_type which, |
| 184 | enum intel_cmd_item_type type, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 185 | size_t offset, size_t size) |
Chia-I Wu | 00b51a8 | 2014-09-09 12:07:37 +0800 | [diff] [blame] | 186 | { |
| 187 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
| 188 | struct intel_cmd_item *item; |
| 189 | |
| 190 | if (writer->item_used == writer->item_alloc) { |
| 191 | const unsigned new_alloc = (writer->item_alloc) ? |
| 192 | writer->item_alloc << 1 : 256; |
| 193 | struct intel_cmd_item *items; |
| 194 | |
| 195 | items = icd_alloc(sizeof(writer->items[0]) * new_alloc, |
| 196 | 0, XGL_SYSTEM_ALLOC_DEBUG); |
| 197 | if (!items) { |
| 198 | writer->item_used = 0; |
| 199 | cmd->result = XGL_ERROR_OUT_OF_MEMORY; |
| 200 | return; |
| 201 | } |
| 202 | |
| 203 | memcpy(items, writer->items, |
| 204 | sizeof(writer->items[0]) * writer->item_alloc); |
| 205 | |
| 206 | icd_free(writer->items); |
| 207 | |
| 208 | writer->items = items; |
| 209 | writer->item_alloc = new_alloc; |
| 210 | } |
| 211 | |
| 212 | item = &writer->items[writer->item_used++]; |
| 213 | item->type = type; |
| 214 | item->offset = offset; |
| 215 | item->size = size; |
| 216 | } |
| 217 | |
Chia-I Wu | 5e25c27 | 2014-08-21 20:19:12 +0800 | [diff] [blame] | 218 | static void cmd_writer_patch(struct intel_cmd *cmd, |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 219 | enum intel_cmd_writer_type which, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 220 | size_t offset, uint32_t val) |
Chia-I Wu | 5e25c27 | 2014-08-21 20:19:12 +0800 | [diff] [blame] | 221 | { |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 222 | struct intel_cmd_writer *writer = &cmd->writers[which]; |
| 223 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 224 | assert(offset + sizeof(val) <= writer->used); |
| 225 | *((uint32_t *) ((char *) writer->ptr + offset)) = val; |
Chia-I Wu | 5e25c27 | 2014-08-21 20:19:12 +0800 | [diff] [blame] | 226 | } |
| 227 | |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 228 | static void cmd_reset(struct intel_cmd *cmd) |
| 229 | { |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 230 | uint32_t i; |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 231 | |
| 232 | for (i = 0; i < INTEL_CMD_WRITER_COUNT; i++) |
| 233 | cmd_writer_reset(cmd, i); |
Chia-I Wu | e97aa0e | 2014-08-27 12:51:26 +0800 | [diff] [blame] | 234 | |
Chia-I Wu | a57761b | 2014-10-14 14:27:44 +0800 | [diff] [blame] | 235 | if (cmd->bind.shader_cache.entries) |
| 236 | icd_free(cmd->bind.shader_cache.entries); |
| 237 | |
Chia-I Wu | f838506 | 2015-01-04 16:27:24 +0800 | [diff] [blame] | 238 | if (cmd->bind.dset.graphics_dynamic_offsets) |
| 239 | icd_free(cmd->bind.dset.graphics_dynamic_offsets); |
| 240 | if (cmd->bind.dset.compute_dynamic_offsets) |
| 241 | icd_free(cmd->bind.dset.compute_dynamic_offsets); |
| 242 | |
Chia-I Wu | e97aa0e | 2014-08-27 12:51:26 +0800 | [diff] [blame] | 243 | memset(&cmd->bind, 0, sizeof(cmd->bind)); |
| 244 | |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 245 | cmd->reloc_used = 0; |
Chia-I Wu | 0496670 | 2014-08-20 15:05:03 +0800 | [diff] [blame] | 246 | cmd->result = XGL_SUCCESS; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 247 | } |
| 248 | |
| 249 | static void cmd_destroy(struct intel_obj *obj) |
| 250 | { |
| 251 | struct intel_cmd *cmd = intel_cmd_from_obj(obj); |
| 252 | |
| 253 | intel_cmd_destroy(cmd); |
| 254 | } |
| 255 | |
| 256 | XGL_RESULT intel_cmd_create(struct intel_dev *dev, |
| 257 | const XGL_CMD_BUFFER_CREATE_INFO *info, |
| 258 | struct intel_cmd **cmd_ret) |
| 259 | { |
Chia-I Wu | 6388329 | 2014-08-25 13:50:26 +0800 | [diff] [blame] | 260 | int pipeline_select; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 261 | struct intel_cmd *cmd; |
| 262 | |
Chia-I Wu | 6388329 | 2014-08-25 13:50:26 +0800 | [diff] [blame] | 263 | switch (info->queueType) { |
| 264 | case XGL_QUEUE_TYPE_GRAPHICS: |
| 265 | pipeline_select = GEN6_PIPELINE_SELECT_DW0_SELECT_3D; |
| 266 | break; |
| 267 | case XGL_QUEUE_TYPE_COMPUTE: |
| 268 | pipeline_select = GEN6_PIPELINE_SELECT_DW0_SELECT_MEDIA; |
| 269 | break; |
| 270 | case XGL_QUEUE_TYPE_DMA: |
| 271 | pipeline_select = -1; |
| 272 | break; |
| 273 | default: |
| 274 | return XGL_ERROR_INVALID_VALUE; |
| 275 | break; |
| 276 | } |
| 277 | |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 278 | cmd = (struct intel_cmd *) intel_base_create(dev, sizeof(*cmd), |
| 279 | dev->base.dbg, XGL_DBG_OBJECT_CMD_BUFFER, info, 0); |
| 280 | if (!cmd) |
| 281 | return XGL_ERROR_OUT_OF_MEMORY; |
| 282 | |
| 283 | cmd->obj.destroy = cmd_destroy; |
| 284 | |
| 285 | cmd->dev = dev; |
Chia-I Wu | 0b78444 | 2014-08-25 22:54:16 +0800 | [diff] [blame] | 286 | cmd->scratch_bo = dev->cmd_scratch_bo; |
Chia-I Wu | 6388329 | 2014-08-25 13:50:26 +0800 | [diff] [blame] | 287 | cmd->pipeline_select = pipeline_select; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 288 | |
Chia-I Wu | e0cdd83 | 2014-08-25 12:38:56 +0800 | [diff] [blame] | 289 | /* |
| 290 | * XXX This is not quite right. intel_gpu sets maxMemRefsPerSubmission to |
| 291 | * batch_buffer_reloc_count, but we may emit up to two relocs, for start |
| 292 | * and end offsets, for each referenced memories. |
| 293 | */ |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 294 | cmd->reloc_count = dev->gpu->batch_buffer_reloc_count; |
| 295 | cmd->relocs = icd_alloc(sizeof(cmd->relocs[0]) * cmd->reloc_count, |
| 296 | 4096, XGL_SYSTEM_ALLOC_INTERNAL); |
| 297 | if (!cmd->relocs) { |
| 298 | intel_cmd_destroy(cmd); |
| 299 | return XGL_ERROR_OUT_OF_MEMORY; |
| 300 | } |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 301 | |
| 302 | *cmd_ret = cmd; |
| 303 | |
| 304 | return XGL_SUCCESS; |
| 305 | } |
| 306 | |
| 307 | void intel_cmd_destroy(struct intel_cmd *cmd) |
| 308 | { |
| 309 | cmd_reset(cmd); |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 310 | |
| 311 | icd_free(cmd->relocs); |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 312 | intel_base_destroy(&cmd->obj.base); |
| 313 | } |
| 314 | |
Jon Ashburn | c04b4dc | 2015-01-08 18:48:10 -0700 | [diff] [blame] | 315 | XGL_RESULT intel_cmd_begin(struct intel_cmd *cmd, const XGL_CMD_BUFFER_BEGIN_INFO* info) |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 316 | { |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 317 | XGL_RESULT ret; |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 318 | uint32_t i; |
Jon Ashburn | c04b4dc | 2015-01-08 18:48:10 -0700 | [diff] [blame] | 319 | XGL_FLAGS flags = 0; |
| 320 | XGL_CMD_BUFFER_BEGIN_INFO* next= (XGL_CMD_BUFFER_BEGIN_INFO*) info; |
| 321 | XGL_CMD_BUFFER_GRAPHICS_BEGIN_INFO *ginfo; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 322 | |
| 323 | cmd_reset(cmd); |
| 324 | |
Jon Ashburn | c04b4dc | 2015-01-08 18:48:10 -0700 | [diff] [blame] | 325 | while (next != NULL) { |
| 326 | switch (next->sType) { |
| 327 | case XGL_STRUCTURE_TYPE_CMD_BUFFER_BEGIN_INFO: |
| 328 | flags = next->flags; |
| 329 | break; |
| 330 | case XGL_STRUCTURE_TYPE_CMD_BUFFER_GRAPHICS_BEGIN_INFO: |
| 331 | ginfo = (XGL_CMD_BUFFER_GRAPHICS_BEGIN_INFO *) next; |
Jon Ashburn | b1dbb37 | 2015-02-02 09:58:11 -0700 | [diff] [blame] | 332 | intel_cmd_begin_render_pass(cmd, (struct intel_render_pass *) |
| 333 | ginfo->renderPass); |
Jon Ashburn | c04b4dc | 2015-01-08 18:48:10 -0700 | [diff] [blame] | 334 | break; |
| 335 | default: |
| 336 | return XGL_ERROR_INVALID_VALUE; |
| 337 | break; |
| 338 | } |
| 339 | next = (XGL_CMD_BUFFER_BEGIN_INFO*) next->pNext; |
| 340 | } |
| 341 | |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 342 | if (cmd->flags != flags) { |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 343 | cmd->flags = flags; |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 344 | cmd->writers[INTEL_CMD_WRITER_BATCH].size = 0; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 345 | } |
| 346 | |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 347 | if (!cmd->writers[INTEL_CMD_WRITER_BATCH].size) { |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 348 | const uint32_t size = cmd->dev->gpu->max_batch_buffer_size / 2; |
| 349 | uint32_t divider = 1; |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 350 | |
| 351 | if (flags & XGL_CMD_BUFFER_OPTIMIZE_GPU_SMALL_BATCH_BIT) |
| 352 | divider *= 4; |
| 353 | |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 354 | cmd->writers[INTEL_CMD_WRITER_BATCH].size = size / divider; |
Chia-I Wu | 15cccf7 | 2015-02-10 04:07:40 +0800 | [diff] [blame^] | 355 | cmd->writers[INTEL_CMD_WRITER_SURFACE].size = size / divider / 2; |
| 356 | cmd->writers[INTEL_CMD_WRITER_STATE].size = size / divider / 2; |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 357 | cmd->writers[INTEL_CMD_WRITER_INSTRUCTION].size = 16384 / divider; |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 358 | } |
| 359 | |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 360 | for (i = 0; i < INTEL_CMD_WRITER_COUNT; i++) { |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 361 | ret = cmd_writer_alloc_and_map(cmd, i); |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 362 | if (ret != XGL_SUCCESS) { |
| 363 | cmd_reset(cmd); |
| 364 | return ret; |
| 365 | } |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 366 | } |
| 367 | |
Chia-I Wu | 79dfbb3 | 2014-08-25 12:19:02 +0800 | [diff] [blame] | 368 | cmd_batch_begin(cmd); |
| 369 | |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 370 | return XGL_SUCCESS; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 371 | } |
| 372 | |
| 373 | XGL_RESULT intel_cmd_end(struct intel_cmd *cmd) |
| 374 | { |
| 375 | struct intel_winsys *winsys = cmd->dev->winsys; |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 376 | uint32_t i; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 377 | |
Chia-I Wu | b876212 | 2014-12-01 22:51:03 +0800 | [diff] [blame] | 378 | /* no matching intel_cmd_begin() */ |
| 379 | if (!cmd->writers[INTEL_CMD_WRITER_BATCH].ptr) |
| 380 | return XGL_ERROR_INCOMPLETE_COMMAND_BUFFER; |
| 381 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 382 | cmd_batch_end(cmd); |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 383 | |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 384 | /* TODO we need a more "explicit" winsys */ |
Chia-I Wu | fdfb8ed | 2014-08-21 15:40:07 +0800 | [diff] [blame] | 385 | for (i = 0; i < cmd->reloc_used; i++) { |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 386 | const struct intel_cmd_reloc *reloc = &cmd->relocs[i]; |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 387 | const struct intel_cmd_writer *writer = &cmd->writers[reloc->which]; |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 388 | uint64_t presumed_offset; |
| 389 | int err; |
| 390 | |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 391 | /* |
| 392 | * Once a bo is used as a reloc target, libdrm_intel disallows more |
| 393 | * relocs to be added to it. That may happen when |
| 394 | * INTEL_CMD_RELOC_TARGET_IS_WRITER is set. We have to process them |
| 395 | * in another pass. |
| 396 | */ |
| 397 | if (reloc->flags & INTEL_CMD_RELOC_TARGET_IS_WRITER) |
| 398 | continue; |
| 399 | |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 400 | err = intel_bo_add_reloc(writer->bo, reloc->offset, |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 401 | (struct intel_bo *) reloc->target, reloc->target_offset, |
Chia-I Wu | 32a2246 | 2014-08-26 14:13:46 +0800 | [diff] [blame] | 402 | reloc->flags, &presumed_offset); |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 403 | if (err) { |
| 404 | cmd->result = XGL_ERROR_UNKNOWN; |
| 405 | break; |
| 406 | } |
| 407 | |
| 408 | assert(presumed_offset == (uint64_t) (uint32_t) presumed_offset); |
Chia-I Wu | 72292b7 | 2014-09-09 10:48:33 +0800 | [diff] [blame] | 409 | cmd_writer_patch(cmd, reloc->which, reloc->offset, |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 410 | (uint32_t) presumed_offset); |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 411 | } |
Chia-I Wu | d7d1e48 | 2014-10-18 13:25:10 +0800 | [diff] [blame] | 412 | for (i = 0; i < cmd->reloc_used; i++) { |
| 413 | const struct intel_cmd_reloc *reloc = &cmd->relocs[i]; |
| 414 | const struct intel_cmd_writer *writer = &cmd->writers[reloc->which]; |
| 415 | uint64_t presumed_offset; |
| 416 | int err; |
| 417 | |
| 418 | if (!(reloc->flags & INTEL_CMD_RELOC_TARGET_IS_WRITER)) |
| 419 | continue; |
| 420 | |
| 421 | err = intel_bo_add_reloc(writer->bo, reloc->offset, |
| 422 | cmd->writers[reloc->target].bo, reloc->target_offset, |
| 423 | reloc->flags & ~INTEL_CMD_RELOC_TARGET_IS_WRITER, |
| 424 | &presumed_offset); |
| 425 | if (err) { |
| 426 | cmd->result = XGL_ERROR_UNKNOWN; |
| 427 | break; |
| 428 | } |
| 429 | |
| 430 | assert(presumed_offset == (uint64_t) (uint32_t) presumed_offset); |
| 431 | cmd_writer_patch(cmd, reloc->which, reloc->offset, |
| 432 | (uint32_t) presumed_offset); |
| 433 | } |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 434 | |
Chia-I Wu | 3c3edc0 | 2014-09-09 10:32:59 +0800 | [diff] [blame] | 435 | for (i = 0; i < INTEL_CMD_WRITER_COUNT; i++) |
| 436 | cmd_writer_unmap(cmd, i); |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 437 | |
Chia-I Wu | 0496670 | 2014-08-20 15:05:03 +0800 | [diff] [blame] | 438 | if (cmd->result != XGL_SUCCESS) |
| 439 | return cmd->result; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 440 | |
Chia-I Wu | 68f319d | 2014-09-09 09:43:21 +0800 | [diff] [blame] | 441 | if (intel_winsys_can_submit_bo(winsys, |
| 442 | &cmd->writers[INTEL_CMD_WRITER_BATCH].bo, 1)) |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 443 | return XGL_SUCCESS; |
| 444 | else |
| 445 | return XGL_ERROR_TOO_MANY_MEMORY_REFERENCES; |
| 446 | } |
| 447 | |
Chia-I Wu | 9617727 | 2015-01-03 15:27:41 +0800 | [diff] [blame] | 448 | ICD_EXPORT XGL_RESULT XGLAPI xglCreateCommandBuffer( |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 449 | XGL_DEVICE device, |
| 450 | const XGL_CMD_BUFFER_CREATE_INFO* pCreateInfo, |
| 451 | XGL_CMD_BUFFER* pCmdBuffer) |
| 452 | { |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 453 | struct intel_dev *dev = intel_dev(device); |
| 454 | |
| 455 | return intel_cmd_create(dev, pCreateInfo, |
| 456 | (struct intel_cmd **) pCmdBuffer); |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 457 | } |
| 458 | |
Chia-I Wu | 9617727 | 2015-01-03 15:27:41 +0800 | [diff] [blame] | 459 | ICD_EXPORT XGL_RESULT XGLAPI xglBeginCommandBuffer( |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 460 | XGL_CMD_BUFFER cmdBuffer, |
Jon Ashburn | c04b4dc | 2015-01-08 18:48:10 -0700 | [diff] [blame] | 461 | const XGL_CMD_BUFFER_BEGIN_INFO *info) |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 462 | { |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 463 | struct intel_cmd *cmd = intel_cmd(cmdBuffer); |
| 464 | |
Jon Ashburn | c04b4dc | 2015-01-08 18:48:10 -0700 | [diff] [blame] | 465 | return intel_cmd_begin(cmd, info); |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 466 | } |
| 467 | |
Chia-I Wu | 9617727 | 2015-01-03 15:27:41 +0800 | [diff] [blame] | 468 | ICD_EXPORT XGL_RESULT XGLAPI xglEndCommandBuffer( |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 469 | XGL_CMD_BUFFER cmdBuffer) |
| 470 | { |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 471 | struct intel_cmd *cmd = intel_cmd(cmdBuffer); |
| 472 | |
| 473 | return intel_cmd_end(cmd); |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 474 | } |
| 475 | |
Chia-I Wu | 9617727 | 2015-01-03 15:27:41 +0800 | [diff] [blame] | 476 | ICD_EXPORT XGL_RESULT XGLAPI xglResetCommandBuffer( |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 477 | XGL_CMD_BUFFER cmdBuffer) |
| 478 | { |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 479 | struct intel_cmd *cmd = intel_cmd(cmdBuffer); |
| 480 | |
| 481 | cmd_reset(cmd); |
| 482 | |
| 483 | return XGL_SUCCESS; |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 484 | } |
| 485 | |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 486 | ICD_EXPORT void XGLAPI xglCmdInitAtomicCounters( |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 487 | XGL_CMD_BUFFER cmdBuffer, |
| 488 | XGL_PIPELINE_BIND_POINT pipelineBindPoint, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 489 | uint32_t startCounter, |
| 490 | uint32_t counterCount, |
| 491 | const uint32_t* pData) |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 492 | { |
| 493 | } |
| 494 | |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 495 | ICD_EXPORT void XGLAPI xglCmdLoadAtomicCounters( |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 496 | XGL_CMD_BUFFER cmdBuffer, |
| 497 | XGL_PIPELINE_BIND_POINT pipelineBindPoint, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 498 | uint32_t startCounter, |
| 499 | uint32_t counterCount, |
Chia-I Wu | 714df45 | 2015-01-01 07:55:04 +0800 | [diff] [blame] | 500 | XGL_BUFFER srcBuffer, |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 501 | XGL_GPU_SIZE srcOffset) |
| 502 | { |
| 503 | } |
| 504 | |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 505 | ICD_EXPORT void XGLAPI xglCmdSaveAtomicCounters( |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 506 | XGL_CMD_BUFFER cmdBuffer, |
| 507 | XGL_PIPELINE_BIND_POINT pipelineBindPoint, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 508 | uint32_t startCounter, |
| 509 | uint32_t counterCount, |
Chia-I Wu | 714df45 | 2015-01-01 07:55:04 +0800 | [diff] [blame] | 510 | XGL_BUFFER destBuffer, |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 511 | XGL_GPU_SIZE destOffset) |
| 512 | { |
| 513 | } |
| 514 | |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 515 | ICD_EXPORT void XGLAPI xglCmdDbgMarkerBegin( |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 516 | XGL_CMD_BUFFER cmdBuffer, |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 517 | const char* pMarker) |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 518 | { |
| 519 | } |
| 520 | |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 521 | ICD_EXPORT void XGLAPI xglCmdDbgMarkerEnd( |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 522 | XGL_CMD_BUFFER cmdBuffer) |
| 523 | { |
| 524 | } |