blob: b8237f98d47038873e3ea70d81586adcf591de3a [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
Jiri Pirko22a67762017-02-03 10:29:07 +01003 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
Jiri Pirko56ade8f2015-10-16 14:01:37 +02005 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Yotam Gigi98d0f7b2017-01-23 11:07:11 +010060#include <net/tc_act/tc_sample.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020061
62#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020063#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020064#include "core.h"
65#include "reg.h"
66#include "port.h"
67#include "trap.h"
68#include "txheader.h"
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +010069#include "spectrum_cnt.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020070
71static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
72static const char mlxsw_sp_driver_version[] = "1.0";
73
74/* tx_hdr_version
75 * Tx header version.
76 * Must be set to 1.
77 */
78MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
79
80/* tx_hdr_ctl
81 * Packet control type.
82 * 0 - Ethernet control (e.g. EMADs, LACP)
83 * 1 - Ethernet data
84 */
85MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
86
87/* tx_hdr_proto
88 * Packet protocol type. Must be set to 1 (Ethernet).
89 */
90MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
91
92/* tx_hdr_rx_is_router
93 * Packet is sent from the router. Valid for data packets only.
94 */
95MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
96
97/* tx_hdr_fid_valid
98 * Indicates if the 'fid' field is valid and should be used for
99 * forwarding lookup. Valid for data packets only.
100 */
101MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
102
103/* tx_hdr_swid
104 * Switch partition ID. Must be set to 0.
105 */
106MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
107
108/* tx_hdr_control_tclass
109 * Indicates if the packet should use the control TClass and not one
110 * of the data TClasses.
111 */
112MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
113
114/* tx_hdr_etclass
115 * Egress TClass to be used on the egress device on the egress port.
116 */
117MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
118
119/* tx_hdr_port_mid
120 * Destination local port for unicast packets.
121 * Destination multicast ID for multicast packets.
122 *
123 * Control packets are directed to a specific egress port, while data
124 * packets are transmitted through the CPU port (0) into the switch partition,
125 * where forwarding rules are applied.
126 */
127MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
128
129/* tx_hdr_fid
130 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
131 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
132 * Valid for data packets only.
133 */
134MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
135
136/* tx_hdr_type
137 * 0 - Data packets
138 * 6 - Control packets
139 */
140MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
141
142static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
143 const struct mlxsw_tx_info *tx_info)
144{
145 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
146
147 memset(txhdr, 0, MLXSW_TXHDR_LEN);
148
149 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
150 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
151 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
152 mlxsw_tx_hdr_swid_set(txhdr, 0);
153 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
154 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
155 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
156}
157
158static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
159{
Elad Raz5b090742016-10-28 21:35:46 +0200160 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200161 int err;
162
163 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
164 if (err)
165 return err;
166 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
167 return 0;
168}
169
Yotam Gigi763b4b72016-07-21 12:03:17 +0200170static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
171{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200172 int i;
173
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200174 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200175 return -EIO;
176
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200177 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
178 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
Yotam Gigi2d644d42016-11-11 16:34:25 +0100234 span_entry->ref_count = 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200251static struct mlxsw_sp_span_entry *
252mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200253{
254 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
255 int i;
256
257 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
258 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
259
260 if (curr->used && curr->local_port == port->local_port)
261 return curr;
262 }
263 return NULL;
264}
265
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200266static struct mlxsw_sp_span_entry
267*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200268{
269 struct mlxsw_sp_span_entry *span_entry;
270
271 span_entry = mlxsw_sp_span_entry_find(port);
272 if (span_entry) {
Yotam Gigi2d644d42016-11-11 16:34:25 +0100273 /* Already exists, just take a reference */
Yotam Gigi763b4b72016-07-21 12:03:17 +0200274 span_entry->ref_count++;
275 return span_entry;
276 }
277
278 return mlxsw_sp_span_entry_create(port);
279}
280
281static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
282 struct mlxsw_sp_span_entry *span_entry)
283{
Yotam Gigi2d644d42016-11-11 16:34:25 +0100284 WARN_ON(!span_entry->ref_count);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200285 if (--span_entry->ref_count == 0)
286 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
287 return 0;
288}
289
290static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
291{
292 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
293 struct mlxsw_sp_span_inspected_port *p;
294 int i;
295
296 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
297 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
298
299 list_for_each_entry(p, &curr->bound_ports_list, list)
300 if (p->local_port == port->local_port &&
301 p->type == MLXSW_SP_SPAN_EGRESS)
302 return true;
303 }
304
305 return false;
306}
307
308static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
309{
310 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
311}
312
313static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
314{
315 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
316 char sbib_pl[MLXSW_REG_SBIB_LEN];
317 int err;
318
319 /* If port is egress mirrored, the shared buffer size should be
320 * updated according to the mtu value
321 */
322 if (mlxsw_sp_span_is_egress_mirror(port)) {
323 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
324 mlxsw_sp_span_mtu_to_buffsize(mtu));
325 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
326 if (err) {
327 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
328 return err;
329 }
330 }
331
332 return 0;
333}
334
335static struct mlxsw_sp_span_inspected_port *
336mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
337 struct mlxsw_sp_span_entry *span_entry)
338{
339 struct mlxsw_sp_span_inspected_port *p;
340
341 list_for_each_entry(p, &span_entry->bound_ports_list, list)
342 if (port->local_port == p->local_port)
343 return p;
344 return NULL;
345}
346
347static int
348mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
349 struct mlxsw_sp_span_entry *span_entry,
350 enum mlxsw_sp_span_type type)
351{
352 struct mlxsw_sp_span_inspected_port *inspected_port;
353 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
354 char mpar_pl[MLXSW_REG_MPAR_LEN];
355 char sbib_pl[MLXSW_REG_SBIB_LEN];
356 int pa_id = span_entry->id;
357 int err;
358
359 /* if it is an egress SPAN, bind a shared buffer to it */
360 if (type == MLXSW_SP_SPAN_EGRESS) {
361 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
362 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
363 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
364 if (err) {
365 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
366 return err;
367 }
368 }
369
370 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200371 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
372 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200373 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
374 if (err)
375 goto err_mpar_reg_write;
376
377 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
378 if (!inspected_port) {
379 err = -ENOMEM;
380 goto err_inspected_port_alloc;
381 }
382 inspected_port->local_port = port->local_port;
383 inspected_port->type = type;
384 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
385
386 return 0;
387
388err_mpar_reg_write:
389err_inspected_port_alloc:
390 if (type == MLXSW_SP_SPAN_EGRESS) {
391 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
392 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
393 }
394 return err;
395}
396
397static void
398mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
399 struct mlxsw_sp_span_entry *span_entry,
400 enum mlxsw_sp_span_type type)
401{
402 struct mlxsw_sp_span_inspected_port *inspected_port;
403 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
404 char mpar_pl[MLXSW_REG_MPAR_LEN];
405 char sbib_pl[MLXSW_REG_SBIB_LEN];
406 int pa_id = span_entry->id;
407
408 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
409 if (!inspected_port)
410 return;
411
412 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200413 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
414 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200415 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
416
417 /* remove the SBIB buffer if it was egress SPAN */
418 if (type == MLXSW_SP_SPAN_EGRESS) {
419 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
420 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
421 }
422
423 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
424
425 list_del(&inspected_port->list);
426 kfree(inspected_port);
427}
428
429static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
430 struct mlxsw_sp_port *to,
431 enum mlxsw_sp_span_type type)
432{
433 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
434 struct mlxsw_sp_span_entry *span_entry;
435 int err;
436
437 span_entry = mlxsw_sp_span_entry_get(to);
438 if (!span_entry)
439 return -ENOENT;
440
441 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
442 span_entry->id);
443
444 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
445 if (err)
446 goto err_port_bind;
447
448 return 0;
449
450err_port_bind:
451 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
452 return err;
453}
454
455static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
456 struct mlxsw_sp_port *to,
457 enum mlxsw_sp_span_type type)
458{
459 struct mlxsw_sp_span_entry *span_entry;
460
461 span_entry = mlxsw_sp_span_entry_find(to);
462 if (!span_entry) {
463 netdev_err(from->dev, "no span entry found\n");
464 return;
465 }
466
467 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
468 span_entry->id);
469 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
470}
471
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100472static int mlxsw_sp_port_sample_set(struct mlxsw_sp_port *mlxsw_sp_port,
473 bool enable, u32 rate)
474{
475 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
476 char mpsc_pl[MLXSW_REG_MPSC_LEN];
477
478 mlxsw_reg_mpsc_pack(mpsc_pl, mlxsw_sp_port->local_port, enable, rate);
479 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpsc), mpsc_pl);
480}
481
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200482static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
483 bool is_up)
484{
485 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
486 char paos_pl[MLXSW_REG_PAOS_LEN];
487
488 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
489 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
490 MLXSW_PORT_ADMIN_STATUS_DOWN);
491 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
492}
493
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200494static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
495 unsigned char *addr)
496{
497 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
498 char ppad_pl[MLXSW_REG_PPAD_LEN];
499
500 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
501 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
502 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
503}
504
505static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
506{
507 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
508 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
509
510 ether_addr_copy(addr, mlxsw_sp->base_mac);
511 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
512 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
513}
514
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200515static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
516{
517 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
518 char pmtu_pl[MLXSW_REG_PMTU_LEN];
519 int max_mtu;
520 int err;
521
522 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
523 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
524 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
525 if (err)
526 return err;
527 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
528
529 if (mtu > max_mtu)
530 return -EINVAL;
531
532 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
533 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
534}
535
Ido Schimmelbe945352016-06-09 09:51:39 +0200536static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
537 u8 swid)
538{
539 char pspa_pl[MLXSW_REG_PSPA_LEN];
540
541 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
542 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
543}
544
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200545static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
546{
547 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200548
Ido Schimmelbe945352016-06-09 09:51:39 +0200549 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
550 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200551}
552
553static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
554 bool enable)
555{
556 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
557 char svpe_pl[MLXSW_REG_SVPE_LEN];
558
559 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
560 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
561}
562
563int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
564 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
565 u16 vid)
566{
567 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
568 char svfa_pl[MLXSW_REG_SVFA_LEN];
569
570 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
571 fid, vid);
572 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
573}
574
Ido Schimmel584d73d2016-08-24 12:00:26 +0200575int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
576 u16 vid_begin, u16 vid_end,
577 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200578{
579 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
580 char *spvmlr_pl;
581 int err;
582
583 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
584 if (!spvmlr_pl)
585 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200586 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
587 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200588 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
589 kfree(spvmlr_pl);
590 return err;
591}
592
Ido Schimmel584d73d2016-08-24 12:00:26 +0200593static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
594 u16 vid, bool learn_enable)
595{
596 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
597 learn_enable);
598}
599
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200600static int
601mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
602{
603 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
604 char sspr_pl[MLXSW_REG_SSPR_LEN];
605
606 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
607 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
608}
609
Ido Schimmeld664b412016-06-09 09:51:40 +0200610static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
611 u8 local_port, u8 *p_module,
612 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200613{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200614 char pmlp_pl[MLXSW_REG_PMLP_LEN];
615 int err;
616
Ido Schimmel558c2d52016-02-26 17:32:29 +0100617 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200618 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
619 if (err)
620 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100621 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
622 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200623 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200624 return 0;
625}
626
Ido Schimmel18f1e702016-02-26 17:32:31 +0100627static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
628 u8 module, u8 width, u8 lane)
629{
630 char pmlp_pl[MLXSW_REG_PMLP_LEN];
631 int i;
632
633 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
634 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
635 for (i = 0; i < width; i++) {
636 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
637 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
638 }
639
640 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
641}
642
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100643static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
644{
645 char pmlp_pl[MLXSW_REG_PMLP_LEN];
646
647 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
648 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
649 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
650}
651
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200652static int mlxsw_sp_port_open(struct net_device *dev)
653{
654 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
655 int err;
656
657 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
658 if (err)
659 return err;
660 netif_start_queue(dev);
661 return 0;
662}
663
664static int mlxsw_sp_port_stop(struct net_device *dev)
665{
666 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
667
668 netif_stop_queue(dev);
669 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
670}
671
672static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
673 struct net_device *dev)
674{
675 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
676 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
677 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
678 const struct mlxsw_tx_info tx_info = {
679 .local_port = mlxsw_sp_port->local_port,
680 .is_emad = false,
681 };
682 u64 len;
683 int err;
684
Jiri Pirko307c2432016-04-08 19:11:22 +0200685 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200686 return NETDEV_TX_BUSY;
687
688 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
689 struct sk_buff *skb_orig = skb;
690
691 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
692 if (!skb) {
693 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
694 dev_kfree_skb_any(skb_orig);
695 return NETDEV_TX_OK;
696 }
Arkadi Sharshevsky36bf38d2017-01-12 09:10:37 +0100697 dev_consume_skb_any(skb_orig);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200698 }
699
700 if (eth_skb_pad(skb)) {
701 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
702 return NETDEV_TX_OK;
703 }
704
705 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200706 /* TX header is consumed by HW on the way so we shouldn't count its
707 * bytes as being sent.
708 */
709 len = skb->len - MLXSW_TXHDR_LEN;
710
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200711 /* Due to a race we might fail here because of a full queue. In that
712 * unlikely case we simply drop the packet.
713 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200714 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200715
716 if (!err) {
717 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
718 u64_stats_update_begin(&pcpu_stats->syncp);
719 pcpu_stats->tx_packets++;
720 pcpu_stats->tx_bytes += len;
721 u64_stats_update_end(&pcpu_stats->syncp);
722 } else {
723 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
724 dev_kfree_skb_any(skb);
725 }
726 return NETDEV_TX_OK;
727}
728
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100729static void mlxsw_sp_set_rx_mode(struct net_device *dev)
730{
731}
732
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200733static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
734{
735 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
736 struct sockaddr *addr = p;
737 int err;
738
739 if (!is_valid_ether_addr(addr->sa_data))
740 return -EADDRNOTAVAIL;
741
742 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
743 if (err)
744 return err;
745 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
746 return 0;
747}
748
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200749static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200750 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200751{
752 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
753
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200754 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
755 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200756
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200757 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200758 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200759 pg_size + delay, pg_size);
760 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200761 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200762}
763
764int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200765 u8 *prio_tc, bool pause_en,
766 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200767{
768 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200769 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
770 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200771 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200772 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200773
774 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
775 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
776 if (err)
777 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200778
779 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
780 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200781 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200782
783 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
784 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200785 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200786 configure = true;
787 break;
788 }
789 }
790
791 if (!configure)
792 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200793 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200794 }
795
Ido Schimmelff6551e2016-04-06 17:10:03 +0200796 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
797}
798
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200799static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200800 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200801{
802 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
803 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200804 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200805 u8 *prio_tc;
806
807 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200808 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200809
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200810 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200811 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200812}
813
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200814static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
815{
816 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200817 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200818 int err;
819
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200820 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200821 if (err)
822 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200823 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
824 if (err)
825 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200826 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
827 if (err)
828 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200829 dev->mtu = mtu;
830 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200831
832err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200833 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
834err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200835 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200836 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200837}
838
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300839static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200840mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
841 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200842{
843 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
844 struct mlxsw_sp_port_pcpu_stats *p;
845 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
846 u32 tx_dropped = 0;
847 unsigned int start;
848 int i;
849
850 for_each_possible_cpu(i) {
851 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
852 do {
853 start = u64_stats_fetch_begin_irq(&p->syncp);
854 rx_packets = p->rx_packets;
855 rx_bytes = p->rx_bytes;
856 tx_packets = p->tx_packets;
857 tx_bytes = p->tx_bytes;
858 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
859
860 stats->rx_packets += rx_packets;
861 stats->rx_bytes += rx_bytes;
862 stats->tx_packets += tx_packets;
863 stats->tx_bytes += tx_bytes;
864 /* tx_dropped is u32, updated without syncp protection. */
865 tx_dropped += p->tx_dropped;
866 }
867 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200868 return 0;
869}
870
Or Gerlitz3df5b3c2016-11-22 23:09:54 +0200871static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200872{
873 switch (attr_id) {
874 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
875 return true;
876 }
877
878 return false;
879}
880
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300881static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
882 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200883{
884 switch (attr_id) {
885 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
886 return mlxsw_sp_port_get_sw_stats64(dev, sp);
887 }
888
889 return -EINVAL;
890}
891
892static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
893 int prio, char *ppcnt_pl)
894{
895 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
896 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
897
898 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
899 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
900}
901
902static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
903 struct rtnl_link_stats64 *stats)
904{
905 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
906 int err;
907
908 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
909 0, ppcnt_pl);
910 if (err)
911 goto out;
912
913 stats->tx_packets =
914 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
915 stats->rx_packets =
916 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
917 stats->tx_bytes =
918 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
919 stats->rx_bytes =
920 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
921 stats->multicast =
922 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
923
924 stats->rx_crc_errors =
925 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
926 stats->rx_frame_errors =
927 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
928
929 stats->rx_length_errors = (
930 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
931 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
932 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
933
934 stats->rx_errors = (stats->rx_crc_errors +
935 stats->rx_frame_errors + stats->rx_length_errors);
936
937out:
938 return err;
939}
940
941static void update_stats_cache(struct work_struct *work)
942{
943 struct mlxsw_sp_port *mlxsw_sp_port =
944 container_of(work, struct mlxsw_sp_port,
945 hw_stats.update_dw.work);
946
947 if (!netif_carrier_ok(mlxsw_sp_port->dev))
948 goto out;
949
950 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
951 mlxsw_sp_port->hw_stats.cache);
952
953out:
954 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
955 MLXSW_HW_STATS_UPDATE_TIME);
956}
957
958/* Return the stats from a cache that is updated periodically,
959 * as this function might get called in an atomic context.
960 */
stephen hemmingerbc1f4472017-01-06 19:12:52 -0800961static void
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200962mlxsw_sp_port_get_stats64(struct net_device *dev,
963 struct rtnl_link_stats64 *stats)
964{
965 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
966
967 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200968}
969
970int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
971 u16 vid_end, bool is_member, bool untagged)
972{
973 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
974 char *spvm_pl;
975 int err;
976
977 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
978 if (!spvm_pl)
979 return -ENOMEM;
980
981 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
982 vid_end, is_member, untagged);
983 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
984 kfree(spvm_pl);
985 return err;
986}
987
988static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
989{
990 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
991 u16 vid, last_visited_vid;
992 int err;
993
994 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
995 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
996 vid);
997 if (err) {
998 last_visited_vid = vid;
999 goto err_port_vid_to_fid_set;
1000 }
1001 }
1002
1003 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
1004 if (err) {
1005 last_visited_vid = VLAN_N_VID;
1006 goto err_port_vid_to_fid_set;
1007 }
1008
1009 return 0;
1010
1011err_port_vid_to_fid_set:
1012 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1013 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1014 vid);
1015 return err;
1016}
1017
1018static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1019{
1020 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1021 u16 vid;
1022 int err;
1023
1024 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1025 if (err)
1026 return err;
1027
1028 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1029 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1030 vid, vid);
1031 if (err)
1032 return err;
1033 }
1034
1035 return 0;
1036}
1037
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001038static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001039mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001040{
1041 struct mlxsw_sp_port *mlxsw_sp_vport;
1042
1043 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1044 if (!mlxsw_sp_vport)
1045 return NULL;
1046
1047 /* dev will be set correctly after the VLAN device is linked
1048 * with the real device. In case of bridge SELF invocation, dev
1049 * will remain as is.
1050 */
1051 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1052 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1053 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1054 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001055 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1056 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001057 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001058
1059 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1060
1061 return mlxsw_sp_vport;
1062}
1063
1064static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1065{
1066 list_del(&mlxsw_sp_vport->vport.list);
1067 kfree(mlxsw_sp_vport);
1068}
1069
Ido Schimmel05978482016-08-17 16:39:30 +02001070static int mlxsw_sp_port_add_vid(struct net_device *dev,
1071 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001072{
1073 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001074 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001075 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001076 int err;
1077
1078 /* VLAN 0 is added to HW filter when device goes up, but it is
1079 * reserved in our case, so simply return.
1080 */
1081 if (!vid)
1082 return 0;
1083
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001084 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001085 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001086
Ido Schimmel0355b592016-06-20 23:04:13 +02001087 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001088 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001089 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001090
1091 /* When adding the first VLAN interface on a bridged port we need to
1092 * transition all the active 802.1Q bridge VLANs to use explicit
1093 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1094 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001095 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001096 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001097 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001098 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001099 }
1100
Ido Schimmel52697a92016-07-02 11:00:09 +02001101 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001102 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001103 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001104
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001105 return 0;
1106
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001107err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001108 if (list_is_singular(&mlxsw_sp_port->vports_list))
1109 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1110err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001111 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001112 return err;
1113}
1114
Ido Schimmel32d863f2016-07-02 11:00:10 +02001115static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1116 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001117{
1118 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001119 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001120 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001121
1122 /* VLAN 0 is removed from HW filter when device goes down, but
1123 * it is reserved in our case, so simply return.
1124 */
1125 if (!vid)
1126 return 0;
1127
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001128 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001129 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001130 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001131
Ido Schimmel7a355832016-08-17 16:39:28 +02001132 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001133
Ido Schimmel1c800752016-06-20 23:04:20 +02001134 /* Drop FID reference. If this was the last reference the
1135 * resources will be freed.
1136 */
1137 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1138 if (f && !WARN_ON(!f->leave))
1139 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001140
1141 /* When removing the last VLAN interface on a bridged port we need to
1142 * transition all active 802.1Q bridge VLANs to use VID to FID
1143 * mappings and set port's mode to VLAN mode.
1144 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001145 if (list_is_singular(&mlxsw_sp_port->vports_list))
1146 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001147
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001148 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1149
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001150 return 0;
1151}
1152
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001153static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1154 size_t len)
1155{
1156 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001157 u8 module = mlxsw_sp_port->mapping.module;
1158 u8 width = mlxsw_sp_port->mapping.width;
1159 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001160 int err;
1161
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001162 if (!mlxsw_sp_port->split)
1163 err = snprintf(name, len, "p%d", module + 1);
1164 else
1165 err = snprintf(name, len, "p%ds%d", module + 1,
1166 lane / width);
1167
1168 if (err >= len)
1169 return -EINVAL;
1170
1171 return 0;
1172}
1173
Yotam Gigi763b4b72016-07-21 12:03:17 +02001174static struct mlxsw_sp_port_mall_tc_entry *
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001175mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1176 unsigned long cookie) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001177 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1178
1179 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1180 if (mall_tc_entry->cookie == cookie)
1181 return mall_tc_entry;
1182
1183 return NULL;
1184}
1185
1186static int
1187mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001188 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001189 const struct tc_action *a,
1190 bool ingress)
1191{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001192 struct net *net = dev_net(mlxsw_sp_port->dev);
1193 enum mlxsw_sp_span_type span_type;
1194 struct mlxsw_sp_port *to_port;
1195 struct net_device *to_dev;
1196 int ifindex;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001197
1198 ifindex = tcf_mirred_ifindex(a);
1199 to_dev = __dev_get_by_index(net, ifindex);
1200 if (!to_dev) {
1201 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1202 return -EINVAL;
1203 }
1204
1205 if (!mlxsw_sp_port_dev_check(to_dev)) {
1206 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
Yotam Gigie915ac62017-01-09 11:25:48 +01001207 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001208 }
1209 to_port = netdev_priv(to_dev);
1210
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001211 mirror->to_local_port = to_port->local_port;
1212 mirror->ingress = ingress;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001213 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001214 return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1215}
Yotam Gigi763b4b72016-07-21 12:03:17 +02001216
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001217static void
1218mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1219 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1220{
1221 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1222 enum mlxsw_sp_span_type span_type;
1223 struct mlxsw_sp_port *to_port;
1224
1225 to_port = mlxsw_sp->ports[mirror->to_local_port];
1226 span_type = mirror->ingress ?
1227 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1228 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001229}
1230
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001231static int
1232mlxsw_sp_port_add_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port,
1233 struct tc_cls_matchall_offload *cls,
1234 const struct tc_action *a,
1235 bool ingress)
1236{
1237 int err;
1238
1239 if (!mlxsw_sp_port->sample)
1240 return -EOPNOTSUPP;
1241 if (rtnl_dereference(mlxsw_sp_port->sample->psample_group)) {
1242 netdev_err(mlxsw_sp_port->dev, "sample already active\n");
1243 return -EEXIST;
1244 }
1245 if (tcf_sample_rate(a) > MLXSW_REG_MPSC_RATE_MAX) {
1246 netdev_err(mlxsw_sp_port->dev, "sample rate not supported\n");
1247 return -EOPNOTSUPP;
1248 }
1249
1250 rcu_assign_pointer(mlxsw_sp_port->sample->psample_group,
1251 tcf_sample_psample_group(a));
1252 mlxsw_sp_port->sample->truncate = tcf_sample_truncate(a);
1253 mlxsw_sp_port->sample->trunc_size = tcf_sample_trunc_size(a);
1254 mlxsw_sp_port->sample->rate = tcf_sample_rate(a);
1255
1256 err = mlxsw_sp_port_sample_set(mlxsw_sp_port, true, tcf_sample_rate(a));
1257 if (err)
1258 goto err_port_sample_set;
1259 return 0;
1260
1261err_port_sample_set:
1262 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1263 return err;
1264}
1265
1266static void
1267mlxsw_sp_port_del_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port)
1268{
1269 if (!mlxsw_sp_port->sample)
1270 return;
1271
1272 mlxsw_sp_port_sample_set(mlxsw_sp_port, false, 1);
1273 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1274}
1275
Yotam Gigi763b4b72016-07-21 12:03:17 +02001276static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1277 __be16 protocol,
1278 struct tc_cls_matchall_offload *cls,
1279 bool ingress)
1280{
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001281 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001282 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001283 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001284 int err;
1285
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001286 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001287 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
Yotam Gigie915ac62017-01-09 11:25:48 +01001288 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001289 }
1290
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001291 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1292 if (!mall_tc_entry)
1293 return -ENOMEM;
1294 mall_tc_entry->cookie = cls->cookie;
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001295
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001296 tcf_exts_to_list(cls->exts, &actions);
1297 a = list_first_entry(&actions, struct tc_action, list);
1298
1299 if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1300 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1301
1302 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1303 mirror = &mall_tc_entry->mirror;
1304 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1305 mirror, a, ingress);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001306 } else if (is_tcf_sample(a) && protocol == htons(ETH_P_ALL)) {
1307 mall_tc_entry->type = MLXSW_SP_PORT_MALL_SAMPLE;
1308 err = mlxsw_sp_port_add_cls_matchall_sample(mlxsw_sp_port, cls,
1309 a, ingress);
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001310 } else {
1311 err = -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001312 }
1313
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001314 if (err)
1315 goto err_add_action;
1316
1317 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001318 return 0;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001319
1320err_add_action:
1321 kfree(mall_tc_entry);
1322 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001323}
1324
1325static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1326 struct tc_cls_matchall_offload *cls)
1327{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001328 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001329
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001330 mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1331 cls->cookie);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001332 if (!mall_tc_entry) {
1333 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1334 return;
1335 }
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001336 list_del(&mall_tc_entry->list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001337
1338 switch (mall_tc_entry->type) {
1339 case MLXSW_SP_PORT_MALL_MIRROR:
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001340 mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1341 &mall_tc_entry->mirror);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001342 break;
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001343 case MLXSW_SP_PORT_MALL_SAMPLE:
1344 mlxsw_sp_port_del_cls_matchall_sample(mlxsw_sp_port);
1345 break;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001346 default:
1347 WARN_ON(1);
1348 }
1349
Yotam Gigi763b4b72016-07-21 12:03:17 +02001350 kfree(mall_tc_entry);
1351}
1352
1353static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1354 __be16 proto, struct tc_to_netdev *tc)
1355{
1356 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1357 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1358
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001359 switch (tc->type) {
1360 case TC_SETUP_MATCHALL:
Yotam Gigi763b4b72016-07-21 12:03:17 +02001361 switch (tc->cls_mall->command) {
1362 case TC_CLSMATCHALL_REPLACE:
1363 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1364 proto,
1365 tc->cls_mall,
1366 ingress);
1367 case TC_CLSMATCHALL_DESTROY:
1368 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1369 tc->cls_mall);
1370 return 0;
1371 default:
1372 return -EINVAL;
1373 }
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001374 case TC_SETUP_CLSFLOWER:
1375 switch (tc->cls_flower->command) {
1376 case TC_CLSFLOWER_REPLACE:
1377 return mlxsw_sp_flower_replace(mlxsw_sp_port, ingress,
1378 proto, tc->cls_flower);
1379 case TC_CLSFLOWER_DESTROY:
1380 mlxsw_sp_flower_destroy(mlxsw_sp_port, ingress,
1381 tc->cls_flower);
1382 return 0;
1383 default:
1384 return -EOPNOTSUPP;
1385 }
Yotam Gigi763b4b72016-07-21 12:03:17 +02001386 }
1387
Yotam Gigie915ac62017-01-09 11:25:48 +01001388 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001389}
1390
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001391static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1392 .ndo_open = mlxsw_sp_port_open,
1393 .ndo_stop = mlxsw_sp_port_stop,
1394 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001395 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001396 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001397 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1398 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1399 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001400 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1401 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001402 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1403 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
1404 .ndo_fdb_add = switchdev_port_fdb_add,
1405 .ndo_fdb_del = switchdev_port_fdb_del,
1406 .ndo_fdb_dump = switchdev_port_fdb_dump,
1407 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1408 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1409 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001410 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001411};
1412
1413static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1414 struct ethtool_drvinfo *drvinfo)
1415{
1416 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1417 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1418
1419 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1420 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1421 sizeof(drvinfo->version));
1422 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1423 "%d.%d.%d",
1424 mlxsw_sp->bus_info->fw_rev.major,
1425 mlxsw_sp->bus_info->fw_rev.minor,
1426 mlxsw_sp->bus_info->fw_rev.subminor);
1427 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1428 sizeof(drvinfo->bus_info));
1429}
1430
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001431static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1432 struct ethtool_pauseparam *pause)
1433{
1434 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1435
1436 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1437 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1438}
1439
1440static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1441 struct ethtool_pauseparam *pause)
1442{
1443 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1444
1445 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1446 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1447 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1448
1449 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1450 pfcc_pl);
1451}
1452
1453static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1454 struct ethtool_pauseparam *pause)
1455{
1456 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1457 bool pause_en = pause->tx_pause || pause->rx_pause;
1458 int err;
1459
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001460 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1461 netdev_err(dev, "PFC already enabled on port\n");
1462 return -EINVAL;
1463 }
1464
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001465 if (pause->autoneg) {
1466 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1467 return -EINVAL;
1468 }
1469
1470 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1471 if (err) {
1472 netdev_err(dev, "Failed to configure port's headroom\n");
1473 return err;
1474 }
1475
1476 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1477 if (err) {
1478 netdev_err(dev, "Failed to set PAUSE parameters\n");
1479 goto err_port_pause_configure;
1480 }
1481
1482 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1483 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1484
1485 return 0;
1486
1487err_port_pause_configure:
1488 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1489 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1490 return err;
1491}
1492
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001493struct mlxsw_sp_port_hw_stats {
1494 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001495 u64 (*getter)(const char *payload);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001496};
1497
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001498static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001499 {
1500 .str = "a_frames_transmitted_ok",
1501 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1502 },
1503 {
1504 .str = "a_frames_received_ok",
1505 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1506 },
1507 {
1508 .str = "a_frame_check_sequence_errors",
1509 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1510 },
1511 {
1512 .str = "a_alignment_errors",
1513 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1514 },
1515 {
1516 .str = "a_octets_transmitted_ok",
1517 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1518 },
1519 {
1520 .str = "a_octets_received_ok",
1521 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1522 },
1523 {
1524 .str = "a_multicast_frames_xmitted_ok",
1525 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1526 },
1527 {
1528 .str = "a_broadcast_frames_xmitted_ok",
1529 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1530 },
1531 {
1532 .str = "a_multicast_frames_received_ok",
1533 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1534 },
1535 {
1536 .str = "a_broadcast_frames_received_ok",
1537 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1538 },
1539 {
1540 .str = "a_in_range_length_errors",
1541 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1542 },
1543 {
1544 .str = "a_out_of_range_length_field",
1545 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1546 },
1547 {
1548 .str = "a_frame_too_long_errors",
1549 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1550 },
1551 {
1552 .str = "a_symbol_error_during_carrier",
1553 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1554 },
1555 {
1556 .str = "a_mac_control_frames_transmitted",
1557 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1558 },
1559 {
1560 .str = "a_mac_control_frames_received",
1561 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1562 },
1563 {
1564 .str = "a_unsupported_opcodes_received",
1565 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1566 },
1567 {
1568 .str = "a_pause_mac_ctrl_frames_received",
1569 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1570 },
1571 {
1572 .str = "a_pause_mac_ctrl_frames_xmitted",
1573 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1574 },
1575};
1576
1577#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1578
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001579static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1580 {
1581 .str = "rx_octets_prio",
1582 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1583 },
1584 {
1585 .str = "rx_frames_prio",
1586 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1587 },
1588 {
1589 .str = "tx_octets_prio",
1590 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1591 },
1592 {
1593 .str = "tx_frames_prio",
1594 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1595 },
1596 {
1597 .str = "rx_pause_prio",
1598 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1599 },
1600 {
1601 .str = "rx_pause_duration_prio",
1602 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1603 },
1604 {
1605 .str = "tx_pause_prio",
1606 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1607 },
1608 {
1609 .str = "tx_pause_duration_prio",
1610 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1611 },
1612};
1613
1614#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1615
Jiri Pirko412791d2016-10-21 16:07:19 +02001616static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001617{
1618 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1619
1620 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1621}
1622
1623static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1624 {
1625 .str = "tc_transmit_queue_tc",
1626 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1627 },
1628 {
1629 .str = "tc_no_buffer_discard_uc_tc",
1630 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1631 },
1632};
1633
1634#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1635
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001636#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001637 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1638 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001639 IEEE_8021QAZ_MAX_TCS)
1640
1641static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1642{
1643 int i;
1644
1645 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1646 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1647 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1648 *p += ETH_GSTRING_LEN;
1649 }
1650}
1651
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001652static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1653{
1654 int i;
1655
1656 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1657 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1658 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1659 *p += ETH_GSTRING_LEN;
1660 }
1661}
1662
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001663static void mlxsw_sp_port_get_strings(struct net_device *dev,
1664 u32 stringset, u8 *data)
1665{
1666 u8 *p = data;
1667 int i;
1668
1669 switch (stringset) {
1670 case ETH_SS_STATS:
1671 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1672 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1673 ETH_GSTRING_LEN);
1674 p += ETH_GSTRING_LEN;
1675 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001676
1677 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1678 mlxsw_sp_port_get_prio_strings(&p, i);
1679
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001680 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1681 mlxsw_sp_port_get_tc_strings(&p, i);
1682
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001683 break;
1684 }
1685}
1686
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001687static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1688 enum ethtool_phys_id_state state)
1689{
1690 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1691 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1692 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1693 bool active;
1694
1695 switch (state) {
1696 case ETHTOOL_ID_ACTIVE:
1697 active = true;
1698 break;
1699 case ETHTOOL_ID_INACTIVE:
1700 active = false;
1701 break;
1702 default:
1703 return -EOPNOTSUPP;
1704 }
1705
1706 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1707 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1708}
1709
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001710static int
1711mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1712 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1713{
1714 switch (grp) {
1715 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1716 *p_hw_stats = mlxsw_sp_port_hw_stats;
1717 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1718 break;
1719 case MLXSW_REG_PPCNT_PRIO_CNT:
1720 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1721 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1722 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001723 case MLXSW_REG_PPCNT_TC_CNT:
1724 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1725 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1726 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001727 default:
1728 WARN_ON(1);
Yotam Gigie915ac62017-01-09 11:25:48 +01001729 return -EOPNOTSUPP;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001730 }
1731 return 0;
1732}
1733
1734static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1735 enum mlxsw_reg_ppcnt_grp grp, int prio,
1736 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001737{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001738 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001739 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001740 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001741 int err;
1742
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001743 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1744 if (err)
1745 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001746 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001747 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001748 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001749}
1750
1751static void mlxsw_sp_port_get_stats(struct net_device *dev,
1752 struct ethtool_stats *stats, u64 *data)
1753{
1754 int i, data_index = 0;
1755
1756 /* IEEE 802.3 Counters */
1757 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1758 data, data_index);
1759 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1760
1761 /* Per-Priority Counters */
1762 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1763 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1764 data, data_index);
1765 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1766 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001767
1768 /* Per-TC Counters */
1769 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1770 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1771 data, data_index);
1772 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1773 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001774}
1775
1776static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1777{
1778 switch (sset) {
1779 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001780 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001781 default:
1782 return -EOPNOTSUPP;
1783 }
1784}
1785
1786struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001787 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001788 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001789 u32 speed;
1790};
1791
1792static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1793 {
1794 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001795 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1796 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001797 },
1798 {
1799 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1800 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001801 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1802 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001803 },
1804 {
1805 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001806 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1807 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001808 },
1809 {
1810 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1811 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001812 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1813 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001814 },
1815 {
1816 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1817 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1818 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1819 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001820 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1821 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001822 },
1823 {
1824 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001825 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1826 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001827 },
1828 {
1829 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001830 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1831 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001832 },
1833 {
1834 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001835 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1836 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001837 },
1838 {
1839 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001840 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1841 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001842 },
1843 {
1844 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001845 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1846 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001847 },
1848 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001849 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1850 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1851 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001852 },
1853 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001854 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1855 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1856 .speed = SPEED_25000,
1857 },
1858 {
1859 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1860 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1861 .speed = SPEED_25000,
1862 },
1863 {
1864 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1865 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1866 .speed = SPEED_25000,
1867 },
1868 {
1869 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1870 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1871 .speed = SPEED_50000,
1872 },
1873 {
1874 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1875 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1876 .speed = SPEED_50000,
1877 },
1878 {
1879 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1880 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1881 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001882 },
1883 {
1884 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001885 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1886 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001887 },
1888 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001889 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1890 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1891 .speed = SPEED_56000,
1892 },
1893 {
1894 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1895 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1896 .speed = SPEED_56000,
1897 },
1898 {
1899 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1900 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1901 .speed = SPEED_56000,
1902 },
1903 {
1904 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1905 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1906 .speed = SPEED_100000,
1907 },
1908 {
1909 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1910 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1911 .speed = SPEED_100000,
1912 },
1913 {
1914 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1915 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1916 .speed = SPEED_100000,
1917 },
1918 {
1919 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1920 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1921 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001922 },
1923};
1924
1925#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1926
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001927static void
1928mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1929 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001930{
1931 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1932 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1933 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1934 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1935 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1936 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001937 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001938
1939 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1940 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1941 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1942 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1943 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001944 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001945}
1946
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001947static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001948{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001949 int i;
1950
1951 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1952 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001953 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1954 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001955 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001956}
1957
1958static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001959 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001960{
1961 u32 speed = SPEED_UNKNOWN;
1962 u8 duplex = DUPLEX_UNKNOWN;
1963 int i;
1964
1965 if (!carrier_ok)
1966 goto out;
1967
1968 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1969 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1970 speed = mlxsw_sp_port_link_mode[i].speed;
1971 duplex = DUPLEX_FULL;
1972 break;
1973 }
1974 }
1975out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001976 cmd->base.speed = speed;
1977 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001978}
1979
1980static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1981{
1982 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1983 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1984 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1985 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1986 return PORT_FIBRE;
1987
1988 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1989 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1990 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1991 return PORT_DA;
1992
1993 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1994 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1995 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1996 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1997 return PORT_NONE;
1998
1999 return PORT_OTHER;
2000}
2001
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002002static u32
2003mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002004{
2005 u32 ptys_proto = 0;
2006 int i;
2007
2008 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002009 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2010 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002011 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2012 }
2013 return ptys_proto;
2014}
2015
2016static u32 mlxsw_sp_to_ptys_speed(u32 speed)
2017{
2018 u32 ptys_proto = 0;
2019 int i;
2020
2021 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2022 if (speed == mlxsw_sp_port_link_mode[i].speed)
2023 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2024 }
2025 return ptys_proto;
2026}
2027
Ido Schimmel18f1e702016-02-26 17:32:31 +01002028static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
2029{
2030 u32 ptys_proto = 0;
2031 int i;
2032
2033 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2034 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
2035 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2036 }
2037 return ptys_proto;
2038}
2039
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002040static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
2041 struct ethtool_link_ksettings *cmd)
2042{
2043 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
2044 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
2045 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
2046
2047 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
2048 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
2049}
2050
2051static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
2052 struct ethtool_link_ksettings *cmd)
2053{
2054 if (!autoneg)
2055 return;
2056
2057 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
2058 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
2059}
2060
2061static void
2062mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
2063 struct ethtool_link_ksettings *cmd)
2064{
2065 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
2066 return;
2067
2068 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
2069 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
2070}
2071
2072static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
2073 struct ethtool_link_ksettings *cmd)
2074{
2075 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2076 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2077 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2078 char ptys_pl[MLXSW_REG_PTYS_LEN];
2079 u8 autoneg_status;
2080 bool autoneg;
2081 int err;
2082
2083 autoneg = mlxsw_sp_port->link.autoneg;
Elad Raz401c8b42016-10-28 21:35:52 +02002084 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002085 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2086 if (err)
2087 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002088 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2089 &eth_proto_oper);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002090
2091 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2092
2093 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2094
2095 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2096 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2097 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2098
2099 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2100 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2101 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2102 cmd);
2103
2104 return 0;
2105}
2106
2107static int
2108mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2109 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002110{
2111 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2112 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2113 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002114 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002115 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002116 int err;
2117
Elad Raz401c8b42016-10-28 21:35:52 +02002118 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002119 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002120 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002121 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002122 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002123
2124 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2125 eth_proto_new = autoneg ?
2126 mlxsw_sp_to_ptys_advert_link(cmd) :
2127 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002128
2129 eth_proto_new = eth_proto_new & eth_proto_cap;
2130 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002131 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002132 return -EINVAL;
2133 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002134
Elad Raz401c8b42016-10-28 21:35:52 +02002135 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2136 eth_proto_new);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002137 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002138 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002139 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002140
Ido Schimmel6277d462016-07-15 11:14:58 +02002141 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002142 return 0;
2143
Ido Schimmel0c83f882016-09-12 13:26:23 +02002144 mlxsw_sp_port->link.autoneg = autoneg;
2145
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002146 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2147 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002148
2149 return 0;
2150}
2151
2152static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2153 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2154 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002155 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2156 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002157 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002158 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002159 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2160 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002161 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2162 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002163};
2164
Ido Schimmel18f1e702016-02-26 17:32:31 +01002165static int
2166mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2167{
2168 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2169 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2170 char ptys_pl[MLXSW_REG_PTYS_LEN];
2171 u32 eth_proto_admin;
2172
2173 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
Elad Raz401c8b42016-10-28 21:35:52 +02002174 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2175 eth_proto_admin);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002176 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2177}
2178
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002179int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2180 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2181 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002182{
2183 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2184 char qeec_pl[MLXSW_REG_QEEC_LEN];
2185
2186 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2187 next_index);
2188 mlxsw_reg_qeec_de_set(qeec_pl, true);
2189 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2190 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2191 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2192}
2193
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002194int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2195 enum mlxsw_reg_qeec_hr hr, u8 index,
2196 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002197{
2198 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2199 char qeec_pl[MLXSW_REG_QEEC_LEN];
2200
2201 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2202 next_index);
2203 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2204 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2205 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2206}
2207
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002208int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2209 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002210{
2211 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2212 char qtct_pl[MLXSW_REG_QTCT_LEN];
2213
2214 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2215 tclass);
2216 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2217}
2218
2219static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2220{
2221 int err, i;
2222
2223 /* Setup the elements hierarcy, so that each TC is linked to
2224 * one subgroup, which are all member in the same group.
2225 */
2226 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2227 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2228 0);
2229 if (err)
2230 return err;
2231 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2232 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2233 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2234 0, false, 0);
2235 if (err)
2236 return err;
2237 }
2238 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2239 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2240 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2241 false, 0);
2242 if (err)
2243 return err;
2244 }
2245
2246 /* Make sure the max shaper is disabled in all hierarcies that
2247 * support it.
2248 */
2249 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2250 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2251 MLXSW_REG_QEEC_MAS_DIS);
2252 if (err)
2253 return err;
2254 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2255 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2256 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2257 i, 0,
2258 MLXSW_REG_QEEC_MAS_DIS);
2259 if (err)
2260 return err;
2261 }
2262 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2263 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2264 MLXSW_REG_QEEC_HIERARCY_TC,
2265 i, i,
2266 MLXSW_REG_QEEC_MAS_DIS);
2267 if (err)
2268 return err;
2269 }
2270
2271 /* Map all priorities to traffic class 0. */
2272 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2273 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2274 if (err)
2275 return err;
2276 }
2277
2278 return 0;
2279}
2280
Ido Schimmel05978482016-08-17 16:39:30 +02002281static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2282{
2283 mlxsw_sp_port->pvid = 1;
2284
2285 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2286}
2287
2288static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2289{
2290 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2291}
2292
Jiri Pirko67963a32016-10-28 21:35:55 +02002293static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2294 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002295{
2296 struct mlxsw_sp_port *mlxsw_sp_port;
2297 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002298 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002299 int err;
2300
2301 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2302 if (!dev)
2303 return -ENOMEM;
Jiri Pirkof20a91f2016-10-27 15:13:00 +02002304 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002305 mlxsw_sp_port = netdev_priv(dev);
2306 mlxsw_sp_port->dev = dev;
2307 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2308 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002309 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002310 mlxsw_sp_port->mapping.module = module;
2311 mlxsw_sp_port->mapping.width = width;
2312 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002313 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002314 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2315 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2316 if (!mlxsw_sp_port->active_vlans) {
2317 err = -ENOMEM;
2318 goto err_port_active_vlans_alloc;
2319 }
Elad Razfc1273a2016-01-06 13:01:11 +01002320 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2321 if (!mlxsw_sp_port->untagged_vlans) {
2322 err = -ENOMEM;
2323 goto err_port_untagged_vlans_alloc;
2324 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002325 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002326 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002327
2328 mlxsw_sp_port->pcpu_stats =
2329 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2330 if (!mlxsw_sp_port->pcpu_stats) {
2331 err = -ENOMEM;
2332 goto err_alloc_stats;
2333 }
2334
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002335 mlxsw_sp_port->sample = kzalloc(sizeof(*mlxsw_sp_port->sample),
2336 GFP_KERNEL);
2337 if (!mlxsw_sp_port->sample) {
2338 err = -ENOMEM;
2339 goto err_alloc_sample;
2340 }
2341
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002342 mlxsw_sp_port->hw_stats.cache =
2343 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2344
2345 if (!mlxsw_sp_port->hw_stats.cache) {
2346 err = -ENOMEM;
2347 goto err_alloc_hw_stats;
2348 }
2349 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2350 &update_stats_cache);
2351
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002352 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2353 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2354
Ido Schimmel3247ff22016-09-08 08:16:02 +02002355 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2356 if (err) {
2357 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2358 mlxsw_sp_port->local_port);
2359 goto err_port_swid_set;
2360 }
2361
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002362 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2363 if (err) {
2364 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2365 mlxsw_sp_port->local_port);
2366 goto err_dev_addr_init;
2367 }
2368
2369 netif_carrier_off(dev);
2370
2371 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002372 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2373 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002374
Jarod Wilsond894be52016-10-20 13:55:16 -04002375 dev->min_mtu = 0;
2376 dev->max_mtu = ETH_MAX_MTU;
2377
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002378 /* Each packet needs to have a Tx header (metadata) on top all other
2379 * headers.
2380 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002381 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002382
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002383 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2384 if (err) {
2385 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2386 mlxsw_sp_port->local_port);
2387 goto err_port_system_port_mapping_set;
2388 }
2389
Ido Schimmel18f1e702016-02-26 17:32:31 +01002390 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2391 if (err) {
2392 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2393 mlxsw_sp_port->local_port);
2394 goto err_port_speed_by_width_set;
2395 }
2396
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002397 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2398 if (err) {
2399 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2400 mlxsw_sp_port->local_port);
2401 goto err_port_mtu_set;
2402 }
2403
2404 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2405 if (err)
2406 goto err_port_admin_status_set;
2407
2408 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2409 if (err) {
2410 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2411 mlxsw_sp_port->local_port);
2412 goto err_port_buffers_init;
2413 }
2414
Ido Schimmel90183b92016-04-06 17:10:08 +02002415 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2416 if (err) {
2417 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2418 mlxsw_sp_port->local_port);
2419 goto err_port_ets_init;
2420 }
2421
Ido Schimmelf00817d2016-04-06 17:10:09 +02002422 /* ETS and buffers must be initialized before DCB. */
2423 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2424 if (err) {
2425 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2426 mlxsw_sp_port->local_port);
2427 goto err_port_dcb_init;
2428 }
2429
Ido Schimmel05978482016-08-17 16:39:30 +02002430 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2431 if (err) {
2432 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2433 mlxsw_sp_port->local_port);
2434 goto err_port_pvid_vport_create;
2435 }
2436
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002437 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002438 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002439 err = register_netdev(dev);
2440 if (err) {
2441 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2442 mlxsw_sp_port->local_port);
2443 goto err_register_netdev;
2444 }
2445
Elad Razd808c7e2016-10-28 21:35:57 +02002446 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2447 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2448 module);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002449 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002450 return 0;
2451
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002452err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002453 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002454 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002455 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2456err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002457 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002458err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002459err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002460err_port_buffers_init:
2461err_port_admin_status_set:
2462err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002463err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002464err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002465err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002466 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2467err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002468 kfree(mlxsw_sp_port->hw_stats.cache);
2469err_alloc_hw_stats:
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002470 kfree(mlxsw_sp_port->sample);
2471err_alloc_sample:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002472 free_percpu(mlxsw_sp_port->pcpu_stats);
2473err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002474 kfree(mlxsw_sp_port->untagged_vlans);
2475err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002476 kfree(mlxsw_sp_port->active_vlans);
2477err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002478 free_netdev(dev);
2479 return err;
2480}
2481
Jiri Pirko67963a32016-10-28 21:35:55 +02002482static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2483 bool split, u8 module, u8 width, u8 lane)
2484{
2485 int err;
2486
2487 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2488 if (err) {
2489 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2490 local_port);
2491 return err;
2492 }
Ido Schimmel9a60c902016-12-16 19:29:03 +01002493 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split,
Jiri Pirko67963a32016-10-28 21:35:55 +02002494 module, width, lane);
2495 if (err)
2496 goto err_port_create;
2497 return 0;
2498
2499err_port_create:
2500 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2501 return err;
2502}
2503
2504static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002505{
2506 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2507
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002508 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko67963a32016-10-28 21:35:55 +02002509 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002510 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002511 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002512 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002513 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002514 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002515 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2516 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002517 kfree(mlxsw_sp_port->hw_stats.cache);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002518 kfree(mlxsw_sp_port->sample);
Yotam Gigi136f1442017-01-09 11:25:47 +01002519 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002520 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002521 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002522 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002523 free_netdev(mlxsw_sp_port->dev);
2524}
2525
Jiri Pirko67963a32016-10-28 21:35:55 +02002526static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2527{
2528 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2529 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2530}
2531
Jiri Pirkof83e2102016-10-28 21:35:49 +02002532static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2533{
2534 return mlxsw_sp->ports[local_port] != NULL;
2535}
2536
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002537static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2538{
2539 int i;
2540
2541 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002542 if (mlxsw_sp_port_created(mlxsw_sp, i))
2543 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002544 kfree(mlxsw_sp->ports);
2545}
2546
2547static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2548{
Ido Schimmeld664b412016-06-09 09:51:40 +02002549 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002550 size_t alloc_size;
2551 int i;
2552 int err;
2553
2554 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2555 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2556 if (!mlxsw_sp->ports)
2557 return -ENOMEM;
2558
2559 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002560 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002561 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002562 if (err)
2563 goto err_port_module_info_get;
2564 if (!width)
2565 continue;
2566 mlxsw_sp->port_to_module[i] = module;
Jiri Pirko67963a32016-10-28 21:35:55 +02002567 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2568 module, width, lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002569 if (err)
2570 goto err_port_create;
2571 }
2572 return 0;
2573
2574err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002575err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002576 for (i--; i >= 1; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002577 if (mlxsw_sp_port_created(mlxsw_sp, i))
2578 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002579 kfree(mlxsw_sp->ports);
2580 return err;
2581}
2582
Ido Schimmel18f1e702016-02-26 17:32:31 +01002583static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2584{
2585 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2586
2587 return local_port - offset;
2588}
2589
Ido Schimmelbe945352016-06-09 09:51:39 +02002590static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2591 u8 module, unsigned int count)
2592{
2593 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2594 int err, i;
2595
2596 for (i = 0; i < count; i++) {
2597 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2598 width, i * width);
2599 if (err)
2600 goto err_port_module_map;
2601 }
2602
2603 for (i = 0; i < count; i++) {
2604 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2605 if (err)
2606 goto err_port_swid_set;
2607 }
2608
2609 for (i = 0; i < count; i++) {
2610 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002611 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002612 if (err)
2613 goto err_port_create;
2614 }
2615
2616 return 0;
2617
2618err_port_create:
2619 for (i--; i >= 0; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002620 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2621 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmelbe945352016-06-09 09:51:39 +02002622 i = count;
2623err_port_swid_set:
2624 for (i--; i >= 0; i--)
2625 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2626 MLXSW_PORT_SWID_DISABLED_PORT);
2627 i = count;
2628err_port_module_map:
2629 for (i--; i >= 0; i--)
2630 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2631 return err;
2632}
2633
2634static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2635 u8 base_port, unsigned int count)
2636{
2637 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2638 int i;
2639
2640 /* Split by four means we need to re-create two ports, otherwise
2641 * only one.
2642 */
2643 count = count / 2;
2644
2645 for (i = 0; i < count; i++) {
2646 local_port = base_port + i * 2;
2647 module = mlxsw_sp->port_to_module[local_port];
2648
2649 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2650 0);
2651 }
2652
2653 for (i = 0; i < count; i++)
2654 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2655
2656 for (i = 0; i < count; i++) {
2657 local_port = base_port + i * 2;
2658 module = mlxsw_sp->port_to_module[local_port];
2659
2660 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002661 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002662 }
2663}
2664
Jiri Pirkob2f10572016-04-08 19:11:23 +02002665static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2666 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002667{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002668 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002669 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002670 u8 module, cur_width, base_port;
2671 int i;
2672 int err;
2673
2674 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2675 if (!mlxsw_sp_port) {
2676 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2677 local_port);
2678 return -EINVAL;
2679 }
2680
Ido Schimmeld664b412016-06-09 09:51:40 +02002681 module = mlxsw_sp_port->mapping.module;
2682 cur_width = mlxsw_sp_port->mapping.width;
2683
Ido Schimmel18f1e702016-02-26 17:32:31 +01002684 if (count != 2 && count != 4) {
2685 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2686 return -EINVAL;
2687 }
2688
Ido Schimmel18f1e702016-02-26 17:32:31 +01002689 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2690 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2691 return -EINVAL;
2692 }
2693
2694 /* Make sure we have enough slave (even) ports for the split. */
2695 if (count == 2) {
2696 base_port = local_port;
2697 if (mlxsw_sp->ports[base_port + 1]) {
2698 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2699 return -EINVAL;
2700 }
2701 } else {
2702 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2703 if (mlxsw_sp->ports[base_port + 1] ||
2704 mlxsw_sp->ports[base_port + 3]) {
2705 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2706 return -EINVAL;
2707 }
2708 }
2709
2710 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002711 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2712 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002713
Ido Schimmelbe945352016-06-09 09:51:39 +02002714 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2715 if (err) {
2716 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2717 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002718 }
2719
2720 return 0;
2721
Ido Schimmelbe945352016-06-09 09:51:39 +02002722err_port_split_create:
2723 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002724 return err;
2725}
2726
Jiri Pirkob2f10572016-04-08 19:11:23 +02002727static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002728{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002729 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002730 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002731 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002732 unsigned int count;
2733 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002734
2735 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2736 if (!mlxsw_sp_port) {
2737 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2738 local_port);
2739 return -EINVAL;
2740 }
2741
2742 if (!mlxsw_sp_port->split) {
2743 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2744 return -EINVAL;
2745 }
2746
Ido Schimmeld664b412016-06-09 09:51:40 +02002747 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002748 count = cur_width == 1 ? 4 : 2;
2749
2750 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2751
2752 /* Determine which ports to remove. */
2753 if (count == 2 && local_port >= base_port + 2)
2754 base_port = base_port + 2;
2755
2756 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002757 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2758 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002759
Ido Schimmelbe945352016-06-09 09:51:39 +02002760 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002761
2762 return 0;
2763}
2764
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002765static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2766 char *pude_pl, void *priv)
2767{
2768 struct mlxsw_sp *mlxsw_sp = priv;
2769 struct mlxsw_sp_port *mlxsw_sp_port;
2770 enum mlxsw_reg_pude_oper_status status;
2771 u8 local_port;
2772
2773 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2774 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002775 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002776 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002777
2778 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2779 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2780 netdev_info(mlxsw_sp_port->dev, "link up\n");
2781 netif_carrier_on(mlxsw_sp_port->dev);
2782 } else {
2783 netdev_info(mlxsw_sp_port->dev, "link down\n");
2784 netif_carrier_off(mlxsw_sp_port->dev);
2785 }
2786}
2787
Nogah Frankel14eeda92016-11-25 10:33:32 +01002788static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
2789 u8 local_port, void *priv)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002790{
2791 struct mlxsw_sp *mlxsw_sp = priv;
2792 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2793 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2794
2795 if (unlikely(!mlxsw_sp_port)) {
2796 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2797 local_port);
2798 return;
2799 }
2800
2801 skb->dev = mlxsw_sp_port->dev;
2802
2803 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2804 u64_stats_update_begin(&pcpu_stats->syncp);
2805 pcpu_stats->rx_packets++;
2806 pcpu_stats->rx_bytes += skb->len;
2807 u64_stats_update_end(&pcpu_stats->syncp);
2808
2809 skb->protocol = eth_type_trans(skb, skb->dev);
2810 netif_receive_skb(skb);
2811}
2812
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002813static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2814 void *priv)
2815{
2816 skb->offload_fwd_mark = 1;
Nogah Frankel14eeda92016-11-25 10:33:32 +01002817 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002818}
2819
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002820static void mlxsw_sp_rx_listener_sample_func(struct sk_buff *skb, u8 local_port,
2821 void *priv)
2822{
2823 struct mlxsw_sp *mlxsw_sp = priv;
2824 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2825 struct psample_group *psample_group;
2826 u32 size;
2827
2828 if (unlikely(!mlxsw_sp_port)) {
2829 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received for non-existent port\n",
2830 local_port);
2831 goto out;
2832 }
2833 if (unlikely(!mlxsw_sp_port->sample)) {
2834 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received on unsupported port\n",
2835 local_port);
2836 goto out;
2837 }
2838
2839 size = mlxsw_sp_port->sample->truncate ?
2840 mlxsw_sp_port->sample->trunc_size : skb->len;
2841
2842 rcu_read_lock();
2843 psample_group = rcu_dereference(mlxsw_sp_port->sample->psample_group);
2844 if (!psample_group)
2845 goto out_unlock;
2846 psample_sample_packet(psample_group, skb, size,
2847 mlxsw_sp_port->dev->ifindex, 0,
2848 mlxsw_sp_port->sample->rate);
2849out_unlock:
2850 rcu_read_unlock();
2851out:
2852 consume_skb(skb);
2853}
2854
Nogah Frankel117b0da2016-11-25 10:33:44 +01002855#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel0fb78a42016-11-25 10:33:39 +01002856 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002857 _is_ctrl, SP_##_trap_group, DISCARD)
Ido Schimmel93393b32016-08-25 18:42:38 +02002858
Nogah Frankel117b0da2016-11-25 10:33:44 +01002859#define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel14eeda92016-11-25 10:33:32 +01002860 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002861 _is_ctrl, SP_##_trap_group, DISCARD)
2862
2863#define MLXSW_SP_EVENTL(_func, _trap_id) \
2864 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
Nogah Frankel14eeda92016-11-25 10:33:32 +01002865
Nogah Frankel45449132016-11-25 10:33:35 +01002866static const struct mlxsw_listener mlxsw_sp_listener[] = {
2867 /* Events */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002868 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
Nogah Frankelee4a60d2016-11-25 10:33:29 +01002869 /* L2 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002870 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
2871 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
2872 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
2873 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
2874 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
2875 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
2876 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
2877 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
2878 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
2879 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
2880 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
Ido Schimmel93393b32016-08-25 18:42:38 +02002881 /* L3 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002882 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2883 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2884 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2885 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
2886 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
2887 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
2888 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
2889 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002890 /* PKT Sample trap */
2891 MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,
2892 false, SP_IP2ME, DISCARD)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002893};
2894
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002895static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
2896{
2897 char qpcr_pl[MLXSW_REG_QPCR_LEN];
2898 enum mlxsw_reg_qpcr_ir_units ir_units;
2899 int max_cpu_policers;
2900 bool is_bytes;
2901 u8 burst_size;
2902 u32 rate;
2903 int i, err;
2904
2905 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
2906 return -EIO;
2907
2908 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
2909
2910 ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
2911 for (i = 0; i < max_cpu_policers; i++) {
2912 is_bytes = false;
2913 switch (i) {
2914 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2915 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2916 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2917 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2918 rate = 128;
2919 burst_size = 7;
2920 break;
2921 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2922 rate = 16 * 1024;
2923 burst_size = 10;
2924 break;
2925 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2926 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2927 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2928 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2929 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2930 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2931 rate = 1024;
2932 burst_size = 7;
2933 break;
2934 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2935 is_bytes = true;
2936 rate = 4 * 1024;
2937 burst_size = 4;
2938 break;
2939 default:
2940 continue;
2941 }
2942
2943 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
2944 burst_size);
2945 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
2946 if (err)
2947 return err;
2948 }
2949
2950 return 0;
2951}
2952
Nogah Frankel579c82e2016-11-25 10:33:42 +01002953static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002954{
2955 char htgt_pl[MLXSW_REG_HTGT_LEN];
Nogah Frankel117b0da2016-11-25 10:33:44 +01002956 enum mlxsw_reg_htgt_trap_group i;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002957 int max_cpu_policers;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002958 int max_trap_groups;
2959 u8 priority, tc;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002960 u16 policer_id;
Nogah Frankel117b0da2016-11-25 10:33:44 +01002961 int err;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002962
2963 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
2964 return -EIO;
2965
2966 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002967 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
Nogah Frankel579c82e2016-11-25 10:33:42 +01002968
2969 for (i = 0; i < max_trap_groups; i++) {
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002970 policer_id = i;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002971 switch (i) {
Nogah Frankel117b0da2016-11-25 10:33:44 +01002972 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2973 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2974 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2975 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2976 priority = 5;
2977 tc = 5;
2978 break;
2979 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2980 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2981 priority = 4;
2982 tc = 4;
2983 break;
2984 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2985 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2986 priority = 3;
2987 tc = 3;
2988 break;
2989 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2990 priority = 2;
2991 tc = 2;
2992 break;
2993 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2994 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2995 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2996 priority = 1;
2997 tc = 1;
2998 break;
2999 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
Nogah Frankel579c82e2016-11-25 10:33:42 +01003000 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
3001 tc = MLXSW_REG_HTGT_DEFAULT_TC;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003002 policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003003 break;
3004 default:
3005 continue;
3006 }
Nogah Frankel117b0da2016-11-25 10:33:44 +01003007
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003008 if (max_cpu_policers <= policer_id &&
3009 policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
3010 return -EIO;
3011
3012 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
Nogah Frankel579c82e2016-11-25 10:33:42 +01003013 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3014 if (err)
3015 return err;
3016 }
3017
3018 return 0;
3019}
3020
3021static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
3022{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003023 int i;
3024 int err;
3025
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003026 err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
3027 if (err)
3028 return err;
3029
Nogah Frankel579c82e2016-11-25 10:33:42 +01003030 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003031 if (err)
3032 return err;
3033
Nogah Frankel45449132016-11-25 10:33:35 +01003034 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003035 err = mlxsw_core_trap_register(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003036 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003037 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003038 if (err)
Nogah Frankel45449132016-11-25 10:33:35 +01003039 goto err_listener_register;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003040
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003041 }
3042 return 0;
3043
Nogah Frankel45449132016-11-25 10:33:35 +01003044err_listener_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003045 for (i--; i >= 0; i--) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003046 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003047 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003048 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003049 }
3050 return err;
3051}
3052
3053static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
3054{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003055 int i;
3056
Nogah Frankel45449132016-11-25 10:33:35 +01003057 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003058 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003059 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003060 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003061 }
3062}
3063
3064static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
3065 enum mlxsw_reg_sfgc_type type,
3066 enum mlxsw_reg_sfgc_bridge_type bridge_type)
3067{
3068 enum mlxsw_flood_table_type table_type;
3069 enum mlxsw_sp_flood_table flood_table;
3070 char sfgc_pl[MLXSW_REG_SFGC_LEN];
3071
Ido Schimmel19ae6122015-12-15 16:03:39 +01003072 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003073 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003074 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003075 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003076
Nogah Frankel71c365b2017-02-09 14:54:46 +01003077 switch (type) {
3078 case MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST:
Ido Schimmel19ae6122015-12-15 16:03:39 +01003079 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
Nogah Frankel71c365b2017-02-09 14:54:46 +01003080 break;
3081 case MLXSW_REG_SFGC_TYPE_UNREGISTERED_MULTICAST_IPV4:
Nogah Frankel71c365b2017-02-09 14:54:46 +01003082 flood_table = MLXSW_SP_FLOOD_TABLE_MC;
3083 break;
3084 default:
3085 flood_table = MLXSW_SP_FLOOD_TABLE_BC;
3086 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003087
3088 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
3089 flood_table);
3090 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
3091}
3092
3093static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
3094{
3095 int type, err;
3096
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003097 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
3098 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
3099 continue;
3100
3101 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3102 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
3103 if (err)
3104 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003105
3106 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3107 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
3108 if (err)
3109 return err;
3110 }
3111
3112 return 0;
3113}
3114
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003115static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
3116{
3117 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003118 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003119
3120 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
3121 MLXSW_REG_SLCR_LAG_HASH_DMAC |
3122 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
3123 MLXSW_REG_SLCR_LAG_HASH_VLANID |
3124 MLXSW_REG_SLCR_LAG_HASH_SIP |
3125 MLXSW_REG_SLCR_LAG_HASH_DIP |
3126 MLXSW_REG_SLCR_LAG_HASH_SPORT |
3127 MLXSW_REG_SLCR_LAG_HASH_DPORT |
3128 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003129 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3130 if (err)
3131 return err;
3132
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003133 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3134 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003135 return -EIO;
3136
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003137 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003138 sizeof(struct mlxsw_sp_upper),
3139 GFP_KERNEL);
3140 if (!mlxsw_sp->lags)
3141 return -ENOMEM;
3142
3143 return 0;
3144}
3145
3146static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3147{
3148 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003149}
3150
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003151static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3152{
3153 char htgt_pl[MLXSW_REG_HTGT_LEN];
3154
Nogah Frankel579c82e2016-11-25 10:33:42 +01003155 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3156 MLXSW_REG_HTGT_INVALID_POLICER,
3157 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3158 MLXSW_REG_HTGT_DEFAULT_TC);
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003159 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3160}
3161
Jiri Pirkob2f10572016-04-08 19:11:23 +02003162static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003163 const struct mlxsw_bus_info *mlxsw_bus_info)
3164{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003165 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003166 int err;
3167
3168 mlxsw_sp->core = mlxsw_core;
3169 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02003170 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003171 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01003172 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003173
3174 err = mlxsw_sp_base_mac_get(mlxsw_sp);
3175 if (err) {
3176 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3177 return err;
3178 }
3179
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003180 err = mlxsw_sp_traps_init(mlxsw_sp);
3181 if (err) {
Nogah Frankel45449132016-11-25 10:33:35 +01003182 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3183 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003184 }
3185
3186 err = mlxsw_sp_flood_init(mlxsw_sp);
3187 if (err) {
3188 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
3189 goto err_flood_init;
3190 }
3191
3192 err = mlxsw_sp_buffers_init(mlxsw_sp);
3193 if (err) {
3194 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3195 goto err_buffers_init;
3196 }
3197
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003198 err = mlxsw_sp_lag_init(mlxsw_sp);
3199 if (err) {
3200 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3201 goto err_lag_init;
3202 }
3203
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003204 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3205 if (err) {
3206 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3207 goto err_switchdev_init;
3208 }
3209
Ido Schimmel464dce12016-07-02 11:00:15 +02003210 err = mlxsw_sp_router_init(mlxsw_sp);
3211 if (err) {
3212 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3213 goto err_router_init;
3214 }
3215
Yotam Gigi763b4b72016-07-21 12:03:17 +02003216 err = mlxsw_sp_span_init(mlxsw_sp);
3217 if (err) {
3218 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3219 goto err_span_init;
3220 }
3221
Jiri Pirko22a67762017-02-03 10:29:07 +01003222 err = mlxsw_sp_acl_init(mlxsw_sp);
3223 if (err) {
3224 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL\n");
3225 goto err_acl_init;
3226 }
3227
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +01003228 err = mlxsw_sp_counter_pool_init(mlxsw_sp);
3229 if (err) {
3230 dev_err(mlxsw_sp->bus_info->dev, "Failed to init counter pool\n");
3231 goto err_counter_pool_init;
3232 }
3233
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003234 err = mlxsw_sp_ports_create(mlxsw_sp);
3235 if (err) {
3236 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3237 goto err_ports_create;
3238 }
3239
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003240 return 0;
3241
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003242err_ports_create:
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +01003243 mlxsw_sp_counter_pool_fini(mlxsw_sp);
3244err_counter_pool_init:
Jiri Pirko22a67762017-02-03 10:29:07 +01003245 mlxsw_sp_acl_fini(mlxsw_sp);
3246err_acl_init:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003247 mlxsw_sp_span_fini(mlxsw_sp);
3248err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003249 mlxsw_sp_router_fini(mlxsw_sp);
3250err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003251 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003252err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003253 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003254err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003255 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003256err_buffers_init:
3257err_flood_init:
3258 mlxsw_sp_traps_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003259 return err;
3260}
3261
Jiri Pirkob2f10572016-04-08 19:11:23 +02003262static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003263{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003264 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003265
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003266 mlxsw_sp_ports_remove(mlxsw_sp);
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +01003267 mlxsw_sp_counter_pool_fini(mlxsw_sp);
Jiri Pirko22a67762017-02-03 10:29:07 +01003268 mlxsw_sp_acl_fini(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003269 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003270 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003271 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003272 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003273 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003274 mlxsw_sp_traps_fini(mlxsw_sp);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003275 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003276 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003277}
3278
3279static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3280 .used_max_vepa_channels = 1,
3281 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003282 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003283 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003284 .used_max_pgt = 1,
3285 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003286 .used_flood_tables = 1,
3287 .used_flood_mode = 1,
3288 .flood_mode = 3,
Nogah Frankel71c365b2017-02-09 14:54:46 +01003289 .max_fid_offset_flood_tables = 3,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003290 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Nogah Frankel71c365b2017-02-09 14:54:46 +01003291 .max_fid_flood_tables = 3,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003292 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003293 .used_max_ib_mc = 1,
3294 .max_ib_mc = 0,
3295 .used_max_pkey = 1,
3296 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003297 .used_kvd_split_data = 1,
3298 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3299 .kvd_hash_single_parts = 2,
3300 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003301 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003302 .swid_config = {
3303 {
3304 .used_type = 1,
3305 .type = MLXSW_PORT_SWID_TYPE_ETH,
3306 }
3307 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003308 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003309};
3310
3311static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003312 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003313 .priv_size = sizeof(struct mlxsw_sp),
3314 .init = mlxsw_sp_init,
3315 .fini = mlxsw_sp_fini,
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003316 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003317 .port_split = mlxsw_sp_port_split,
3318 .port_unsplit = mlxsw_sp_port_unsplit,
3319 .sb_pool_get = mlxsw_sp_sb_pool_get,
3320 .sb_pool_set = mlxsw_sp_sb_pool_set,
3321 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3322 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3323 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3324 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3325 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3326 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3327 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3328 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3329 .txhdr_construct = mlxsw_sp_txhdr_construct,
3330 .txhdr_len = MLXSW_TXHDR_LEN,
3331 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003332};
3333
Jiri Pirko22a67762017-02-03 10:29:07 +01003334bool mlxsw_sp_port_dev_check(const struct net_device *dev)
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003335{
3336 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3337}
3338
Jiri Pirko1182e532017-03-06 21:25:20 +01003339static int mlxsw_sp_lower_dev_walk(struct net_device *lower_dev, void *data)
David Aherndd823642016-10-17 19:15:49 -07003340{
Jiri Pirko1182e532017-03-06 21:25:20 +01003341 struct mlxsw_sp_port **p_mlxsw_sp_port = data;
David Aherndd823642016-10-17 19:15:49 -07003342 int ret = 0;
3343
3344 if (mlxsw_sp_port_dev_check(lower_dev)) {
Jiri Pirko1182e532017-03-06 21:25:20 +01003345 *p_mlxsw_sp_port = netdev_priv(lower_dev);
David Aherndd823642016-10-17 19:15:49 -07003346 ret = 1;
3347 }
3348
3349 return ret;
3350}
3351
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003352static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3353{
Jiri Pirko1182e532017-03-06 21:25:20 +01003354 struct mlxsw_sp_port *mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003355
3356 if (mlxsw_sp_port_dev_check(dev))
3357 return netdev_priv(dev);
3358
Jiri Pirko1182e532017-03-06 21:25:20 +01003359 mlxsw_sp_port = NULL;
3360 netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &mlxsw_sp_port);
David Aherndd823642016-10-17 19:15:49 -07003361
Jiri Pirko1182e532017-03-06 21:25:20 +01003362 return mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003363}
3364
Ido Schimmel4724ba562017-03-10 08:53:39 +01003365struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003366{
3367 struct mlxsw_sp_port *mlxsw_sp_port;
3368
3369 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3370 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3371}
3372
3373static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3374{
Jiri Pirko1182e532017-03-06 21:25:20 +01003375 struct mlxsw_sp_port *mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003376
3377 if (mlxsw_sp_port_dev_check(dev))
3378 return netdev_priv(dev);
3379
Jiri Pirko1182e532017-03-06 21:25:20 +01003380 mlxsw_sp_port = NULL;
3381 netdev_walk_all_lower_dev_rcu(dev, mlxsw_sp_lower_dev_walk,
3382 &mlxsw_sp_port);
David Aherndd823642016-10-17 19:15:49 -07003383
Jiri Pirko1182e532017-03-06 21:25:20 +01003384 return mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003385}
3386
3387struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3388{
3389 struct mlxsw_sp_port *mlxsw_sp_port;
3390
3391 rcu_read_lock();
3392 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3393 if (mlxsw_sp_port)
3394 dev_hold(mlxsw_sp_port->dev);
3395 rcu_read_unlock();
3396 return mlxsw_sp_port;
3397}
3398
3399void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3400{
3401 dev_put(mlxsw_sp_port->dev);
3402}
3403
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003404static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3405 u16 fid)
3406{
3407 if (mlxsw_sp_fid_is_vfid(fid))
3408 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3409 else
3410 return test_bit(fid, lag_port->active_vlans);
3411}
3412
3413static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3414 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003415{
3416 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003417 u8 local_port = mlxsw_sp_port->local_port;
3418 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003419 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003420 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003421
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003422 if (!mlxsw_sp_port->lagged)
3423 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003424
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003425 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3426 MAX_LAG_MEMBERS);
3427 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003428 struct mlxsw_sp_port *lag_port;
3429
3430 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3431 if (!lag_port || lag_port->local_port == local_port)
3432 continue;
3433 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3434 count++;
3435 }
3436
3437 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003438}
3439
3440static int
3441mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3442 u16 fid)
3443{
3444 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3445 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3446
3447 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3448 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3449 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3450 mlxsw_sp_port->local_port);
3451
Ido Schimmel22305372016-06-20 23:04:21 +02003452 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3453 mlxsw_sp_port->local_port, fid);
3454
Ido Schimmel039c49a2016-01-27 15:20:18 +01003455 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3456}
3457
3458static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003459mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3460 u16 fid)
3461{
3462 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3463 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3464
3465 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3466 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3467 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3468
Ido Schimmel22305372016-06-20 23:04:21 +02003469 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3470 mlxsw_sp_port->lag_id, fid);
3471
Ido Schimmel039c49a2016-01-27 15:20:18 +01003472 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3473}
3474
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003475int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003476{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003477 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3478 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003479
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003480 if (mlxsw_sp_port->lagged)
3481 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003482 fid);
3483 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003484 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003485}
3486
Ido Schimmel701b1862016-07-04 08:23:16 +02003487static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3488{
3489 struct mlxsw_sp_fid *f, *tmp;
3490
3491 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3492 if (--f->ref_count == 0)
3493 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3494 else
3495 WARN_ON_ONCE(1);
3496}
3497
Ido Schimmel7117a572016-06-20 23:04:06 +02003498static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3499 struct net_device *br_dev)
3500{
3501 return !mlxsw_sp->master_bridge.dev ||
3502 mlxsw_sp->master_bridge.dev == br_dev;
3503}
3504
3505static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3506 struct net_device *br_dev)
3507{
3508 mlxsw_sp->master_bridge.dev = br_dev;
3509 mlxsw_sp->master_bridge.ref_count++;
3510}
3511
3512static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3513{
Ido Schimmel701b1862016-07-04 08:23:16 +02003514 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003515 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003516 /* It's possible upper VLAN devices are still holding
3517 * references to underlying FIDs. Drop the reference
3518 * and release the resources if it was the last one.
3519 * If it wasn't, then something bad happened.
3520 */
3521 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3522 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003523}
3524
3525static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3526 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003527{
3528 struct net_device *dev = mlxsw_sp_port->dev;
3529 int err;
3530
3531 /* When port is not bridged untagged packets are tagged with
3532 * PVID=VID=1, thereby creating an implicit VLAN interface in
3533 * the device. Remove it and let bridge code take care of its
3534 * own VLANs.
3535 */
3536 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003537 if (err)
3538 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003539
Ido Schimmel7117a572016-06-20 23:04:06 +02003540 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3541
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003542 mlxsw_sp_port->learning = 1;
3543 mlxsw_sp_port->learning_sync = 1;
3544 mlxsw_sp_port->uc_flood = 1;
Nogah Frankel71c365b2017-02-09 14:54:46 +01003545 mlxsw_sp_port->mc_flood = 1;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01003546 mlxsw_sp_port->mc_router = 0;
3547 mlxsw_sp_port->mc_disabled = 1;
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003548 mlxsw_sp_port->bridged = 1;
3549
3550 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003551}
3552
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003553static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003554{
3555 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003556
Ido Schimmel28a01d22016-02-18 11:30:02 +01003557 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3558
Ido Schimmel7117a572016-06-20 23:04:06 +02003559 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3560
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003561 mlxsw_sp_port->learning = 0;
3562 mlxsw_sp_port->learning_sync = 0;
3563 mlxsw_sp_port->uc_flood = 0;
Nogah Frankel71c365b2017-02-09 14:54:46 +01003564 mlxsw_sp_port->mc_flood = 0;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01003565 mlxsw_sp_port->mc_router = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003566 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003567
3568 /* Add implicit VLAN interface in the device, so that untagged
3569 * packets will be classified to the default vFID.
3570 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003571 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003572}
3573
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003574static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003575{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003576 char sldr_pl[MLXSW_REG_SLDR_LEN];
3577
3578 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3579 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3580}
3581
3582static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3583{
3584 char sldr_pl[MLXSW_REG_SLDR_LEN];
3585
3586 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3587 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3588}
3589
3590static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3591 u16 lag_id, u8 port_index)
3592{
3593 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3594 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3595
3596 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3597 lag_id, port_index);
3598 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3599}
3600
3601static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3602 u16 lag_id)
3603{
3604 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3605 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3606
3607 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3608 lag_id);
3609 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3610}
3611
3612static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3613 u16 lag_id)
3614{
3615 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3616 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3617
3618 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3619 lag_id);
3620 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3621}
3622
3623static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3624 u16 lag_id)
3625{
3626 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3627 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3628
3629 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3630 lag_id);
3631 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3632}
3633
3634static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3635 struct net_device *lag_dev,
3636 u16 *p_lag_id)
3637{
3638 struct mlxsw_sp_upper *lag;
3639 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003640 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003641 int i;
3642
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003643 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
3644 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003645 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3646 if (lag->ref_count) {
3647 if (lag->dev == lag_dev) {
3648 *p_lag_id = i;
3649 return 0;
3650 }
3651 } else if (free_lag_id < 0) {
3652 free_lag_id = i;
3653 }
3654 }
3655 if (free_lag_id < 0)
3656 return -EBUSY;
3657 *p_lag_id = free_lag_id;
3658 return 0;
3659}
3660
3661static bool
3662mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3663 struct net_device *lag_dev,
3664 struct netdev_lag_upper_info *lag_upper_info)
3665{
3666 u16 lag_id;
3667
3668 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3669 return false;
3670 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3671 return false;
3672 return true;
3673}
3674
3675static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3676 u16 lag_id, u8 *p_port_index)
3677{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003678 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003679 int i;
3680
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003681 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3682 MAX_LAG_MEMBERS);
3683 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003684 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3685 *p_port_index = i;
3686 return 0;
3687 }
3688 }
3689 return -EBUSY;
3690}
3691
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003692static void
3693mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel186962e2017-03-10 08:53:36 +01003694 struct net_device *lag_dev, u16 lag_id)
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003695{
3696 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003697 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003698
3699 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3700 if (WARN_ON(!mlxsw_sp_vport))
3701 return;
3702
Ido Schimmel11943ff2016-07-02 11:00:12 +02003703 /* If vPort is assigned a RIF, then leave it since it's no
3704 * longer valid.
3705 */
3706 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3707 if (f)
3708 f->leave(mlxsw_sp_vport);
3709
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003710 mlxsw_sp_vport->lag_id = lag_id;
3711 mlxsw_sp_vport->lagged = 1;
Ido Schimmel186962e2017-03-10 08:53:36 +01003712 mlxsw_sp_vport->dev = lag_dev;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003713}
3714
3715static void
3716mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3717{
3718 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003719 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003720
3721 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3722 if (WARN_ON(!mlxsw_sp_vport))
3723 return;
3724
Ido Schimmel11943ff2016-07-02 11:00:12 +02003725 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3726 if (f)
3727 f->leave(mlxsw_sp_vport);
3728
Ido Schimmel186962e2017-03-10 08:53:36 +01003729 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003730 mlxsw_sp_vport->lagged = 0;
3731}
3732
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003733static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3734 struct net_device *lag_dev)
3735{
3736 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3737 struct mlxsw_sp_upper *lag;
3738 u16 lag_id;
3739 u8 port_index;
3740 int err;
3741
3742 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3743 if (err)
3744 return err;
3745 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3746 if (!lag->ref_count) {
3747 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3748 if (err)
3749 return err;
3750 lag->dev = lag_dev;
3751 }
3752
3753 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3754 if (err)
3755 return err;
3756 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3757 if (err)
3758 goto err_col_port_add;
3759 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3760 if (err)
3761 goto err_col_port_enable;
3762
3763 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3764 mlxsw_sp_port->local_port);
3765 mlxsw_sp_port->lag_id = lag_id;
3766 mlxsw_sp_port->lagged = 1;
3767 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003768
Ido Schimmel186962e2017-03-10 08:53:36 +01003769 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_dev, lag_id);
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003770
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003771 return 0;
3772
Ido Schimmel51554db2016-05-06 22:18:39 +02003773err_col_port_enable:
3774 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003775err_col_port_add:
3776 if (!lag->ref_count)
3777 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003778 return err;
3779}
3780
Ido Schimmel82e6db02016-06-20 23:04:04 +02003781static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3782 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003783{
3784 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003785 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02003786 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003787
3788 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003789 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003790 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3791 WARN_ON(lag->ref_count == 0);
3792
Ido Schimmel82e6db02016-06-20 23:04:04 +02003793 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3794 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003795
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003796 if (mlxsw_sp_port->bridged) {
3797 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003798 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003799 }
3800
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003801 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003802 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003803
3804 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3805 mlxsw_sp_port->local_port);
3806 mlxsw_sp_port->lagged = 0;
3807 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003808
3809 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003810}
3811
Jiri Pirko74581202015-12-03 12:12:30 +01003812static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3813 u16 lag_id)
3814{
3815 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3816 char sldr_pl[MLXSW_REG_SLDR_LEN];
3817
3818 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3819 mlxsw_sp_port->local_port);
3820 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3821}
3822
3823static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3824 u16 lag_id)
3825{
3826 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3827 char sldr_pl[MLXSW_REG_SLDR_LEN];
3828
3829 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3830 mlxsw_sp_port->local_port);
3831 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3832}
3833
3834static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3835 bool lag_tx_enabled)
3836{
3837 if (lag_tx_enabled)
3838 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3839 mlxsw_sp_port->lag_id);
3840 else
3841 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3842 mlxsw_sp_port->lag_id);
3843}
3844
3845static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3846 struct netdev_lag_lower_state_info *info)
3847{
3848 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3849}
3850
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003851static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3852 struct net_device *vlan_dev)
3853{
3854 struct mlxsw_sp_port *mlxsw_sp_vport;
3855 u16 vid = vlan_dev_vlan_id(vlan_dev);
3856
3857 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003858 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003859 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003860
3861 mlxsw_sp_vport->dev = vlan_dev;
3862
3863 return 0;
3864}
3865
Ido Schimmel82e6db02016-06-20 23:04:04 +02003866static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
3867 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003868{
3869 struct mlxsw_sp_port *mlxsw_sp_vport;
3870 u16 vid = vlan_dev_vlan_id(vlan_dev);
3871
3872 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003873 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02003874 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003875
3876 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003877}
3878
Jiri Pirko74581202015-12-03 12:12:30 +01003879static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
3880 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003881{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003882 struct netdev_notifier_changeupper_info *info;
3883 struct mlxsw_sp_port *mlxsw_sp_port;
3884 struct net_device *upper_dev;
3885 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02003886 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003887
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003888 mlxsw_sp_port = netdev_priv(dev);
3889 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3890 info = ptr;
3891
3892 switch (event) {
3893 case NETDEV_PRECHANGEUPPER:
3894 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02003895 if (!is_vlan_dev(upper_dev) &&
3896 !netif_is_lag_master(upper_dev) &&
3897 !netif_is_bridge_master(upper_dev))
3898 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02003899 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003900 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003901 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003902 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003903 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02003904 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003905 if (netif_is_lag_master(upper_dev) &&
3906 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
3907 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02003908 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02003909 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
3910 return -EINVAL;
3911 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
3912 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
3913 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003914 break;
3915 case NETDEV_CHANGEUPPER:
3916 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003917 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02003918 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003919 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
3920 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02003921 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02003922 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
3923 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003924 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003925 if (info->linking)
3926 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
3927 upper_dev);
3928 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003929 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003930 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02003931 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003932 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
3933 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02003934 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02003935 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
3936 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02003937 } else {
3938 err = -EINVAL;
3939 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003940 }
3941 break;
3942 }
3943
Ido Schimmel80bedf12016-06-20 23:03:59 +02003944 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003945}
3946
Jiri Pirko74581202015-12-03 12:12:30 +01003947static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
3948 unsigned long event, void *ptr)
3949{
3950 struct netdev_notifier_changelowerstate_info *info;
3951 struct mlxsw_sp_port *mlxsw_sp_port;
3952 int err;
3953
3954 mlxsw_sp_port = netdev_priv(dev);
3955 info = ptr;
3956
3957 switch (event) {
3958 case NETDEV_CHANGELOWERSTATE:
3959 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
3960 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
3961 info->lower_state_info);
3962 if (err)
3963 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
3964 }
3965 break;
3966 }
3967
Ido Schimmel80bedf12016-06-20 23:03:59 +02003968 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01003969}
3970
3971static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
3972 unsigned long event, void *ptr)
3973{
3974 switch (event) {
3975 case NETDEV_PRECHANGEUPPER:
3976 case NETDEV_CHANGEUPPER:
3977 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
3978 case NETDEV_CHANGELOWERSTATE:
3979 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
3980 }
3981
Ido Schimmel80bedf12016-06-20 23:03:59 +02003982 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01003983}
3984
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003985static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
3986 unsigned long event, void *ptr)
3987{
3988 struct net_device *dev;
3989 struct list_head *iter;
3990 int ret;
3991
3992 netdev_for_each_lower_dev(lag_dev, dev, iter) {
3993 if (mlxsw_sp_port_dev_check(dev)) {
3994 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02003995 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003996 return ret;
3997 }
3998 }
3999
Ido Schimmel80bedf12016-06-20 23:03:59 +02004000 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004001}
4002
Ido Schimmel701b1862016-07-04 08:23:16 +02004003static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4004 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004005{
Ido Schimmel701b1862016-07-04 08:23:16 +02004006 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004007 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004008
Ido Schimmel701b1862016-07-04 08:23:16 +02004009 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4010 if (!f) {
4011 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4012 if (IS_ERR(f))
4013 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004014 }
4015
Ido Schimmel701b1862016-07-04 08:23:16 +02004016 f->ref_count++;
4017
4018 return 0;
4019}
4020
4021static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4022 struct net_device *vlan_dev)
4023{
4024 u16 fid = vlan_dev_vlan_id(vlan_dev);
4025 struct mlxsw_sp_fid *f;
4026
4027 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004028 if (f && f->r)
4029 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004030 if (f && --f->ref_count == 0)
4031 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4032}
4033
4034static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4035 unsigned long event, void *ptr)
4036{
4037 struct netdev_notifier_changeupper_info *info;
4038 struct net_device *upper_dev;
4039 struct mlxsw_sp *mlxsw_sp;
Ido Schimmelb4149702017-03-10 08:53:34 +01004040 int err = 0;
Ido Schimmel701b1862016-07-04 08:23:16 +02004041
4042 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4043 if (!mlxsw_sp)
4044 return 0;
Ido Schimmel701b1862016-07-04 08:23:16 +02004045
4046 info = ptr;
4047
4048 switch (event) {
Ido Schimmelb4149702017-03-10 08:53:34 +01004049 case NETDEV_PRECHANGEUPPER:
Ido Schimmel701b1862016-07-04 08:23:16 +02004050 upper_dev = info->upper_dev;
4051 if (!is_vlan_dev(upper_dev))
Ido Schimmelb4149702017-03-10 08:53:34 +01004052 return -EINVAL;
4053 if (is_vlan_dev(upper_dev) &&
4054 br_dev != mlxsw_sp->master_bridge.dev)
4055 return -EINVAL;
4056 break;
4057 case NETDEV_CHANGEUPPER:
4058 upper_dev = info->upper_dev;
4059 if (is_vlan_dev(upper_dev)) {
4060 if (info->linking)
4061 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4062 upper_dev);
4063 else
4064 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp,
4065 upper_dev);
Ido Schimmel701b1862016-07-04 08:23:16 +02004066 } else {
Ido Schimmelb4149702017-03-10 08:53:34 +01004067 err = -EINVAL;
4068 WARN_ON(1);
Ido Schimmel701b1862016-07-04 08:23:16 +02004069 }
4070 break;
4071 }
4072
Ido Schimmelb4149702017-03-10 08:53:34 +01004073 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004074}
4075
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004076static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004077{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004078 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004079 MLXSW_SP_VFID_MAX);
4080}
4081
4082static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4083{
4084 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4085
4086 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4087 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004088}
4089
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004090static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004091
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004092static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4093 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004094{
4095 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004096 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004097 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004098 int err;
4099
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004100 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004101 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004102 dev_err(dev, "No available vFIDs\n");
4103 return ERR_PTR(-ERANGE);
4104 }
4105
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004106 fid = mlxsw_sp_vfid_to_fid(vfid);
4107 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004108 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004109 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004110 return ERR_PTR(err);
4111 }
4112
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004113 f = kzalloc(sizeof(*f), GFP_KERNEL);
4114 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004115 goto err_allocate_vfid;
4116
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004117 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004118 f->fid = fid;
4119 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004120
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004121 list_add(&f->list, &mlxsw_sp->vfids.list);
4122 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004123
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004124 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004125
4126err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004127 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004128 return ERR_PTR(-ENOMEM);
4129}
4130
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004131static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4132 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004133{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004134 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004135 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004136
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004137 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004138 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004139
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004140 if (f->r)
4141 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004142
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004143 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004144
4145 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004146}
4147
Ido Schimmel99724c12016-07-04 08:23:14 +02004148static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4149 bool valid)
4150{
4151 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4152 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4153
4154 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4155 vid);
4156}
4157
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004158static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4159 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004160{
Ido Schimmel0355b592016-06-20 23:04:13 +02004161 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004162 int err;
4163
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004164 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004165 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004166 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004167 if (IS_ERR(f))
4168 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004169 }
4170
Ido Schimmel0355b592016-06-20 23:04:13 +02004171 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4172 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004173 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004174
Ido Schimmel0355b592016-06-20 23:04:13 +02004175 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4176 if (err)
4177 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004178
Ido Schimmel41b996c2016-06-20 23:04:17 +02004179 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004180 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004181
Ido Schimmel22305372016-06-20 23:04:21 +02004182 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4183
Ido Schimmel0355b592016-06-20 23:04:13 +02004184 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004185
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004186err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004187 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4188err_vport_flood_set:
4189 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004190 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004191 return err;
4192}
4193
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004194static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004195{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004196 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004197
Ido Schimmel22305372016-06-20 23:04:21 +02004198 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4199
Ido Schimmel0355b592016-06-20 23:04:13 +02004200 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4201
4202 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4203
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004204 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4205
Ido Schimmel41b996c2016-06-20 23:04:17 +02004206 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004207 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004208 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004209}
4210
4211static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4212 struct net_device *br_dev)
4213{
Ido Schimmel99724c12016-07-04 08:23:14 +02004214 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004215 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4216 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004217 int err;
4218
Ido Schimmel99724c12016-07-04 08:23:14 +02004219 if (f && !WARN_ON(!f->leave))
4220 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004221
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004222 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004223 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004224 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004225 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004226 }
4227
4228 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4229 if (err) {
4230 netdev_err(dev, "Failed to enable learning\n");
4231 goto err_port_vid_learning_set;
4232 }
4233
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004234 mlxsw_sp_vport->learning = 1;
4235 mlxsw_sp_vport->learning_sync = 1;
4236 mlxsw_sp_vport->uc_flood = 1;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004237 mlxsw_sp_vport->mc_flood = 1;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01004238 mlxsw_sp_vport->mc_router = 0;
4239 mlxsw_sp_vport->mc_disabled = 1;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004240 mlxsw_sp_vport->bridged = 1;
4241
4242 return 0;
4243
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004244err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004245 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004246 return err;
4247}
4248
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004249static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004250{
4251 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004252
4253 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4254
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004255 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004256
Ido Schimmel0355b592016-06-20 23:04:13 +02004257 mlxsw_sp_vport->learning = 0;
4258 mlxsw_sp_vport->learning_sync = 0;
4259 mlxsw_sp_vport->uc_flood = 0;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004260 mlxsw_sp_vport->mc_flood = 0;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01004261 mlxsw_sp_vport->mc_router = 0;
Ido Schimmel0355b592016-06-20 23:04:13 +02004262 mlxsw_sp_vport->bridged = 0;
4263}
4264
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004265static bool
4266mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4267 const struct net_device *br_dev)
4268{
4269 struct mlxsw_sp_port *mlxsw_sp_vport;
4270
4271 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4272 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004273 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004274
4275 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004276 return false;
4277 }
4278
4279 return true;
4280}
4281
4282static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4283 unsigned long event, void *ptr,
4284 u16 vid)
4285{
4286 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4287 struct netdev_notifier_changeupper_info *info = ptr;
4288 struct mlxsw_sp_port *mlxsw_sp_vport;
4289 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004290 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004291
4292 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel1f880612017-03-10 08:53:35 +01004293 if (!mlxsw_sp_vport)
4294 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004295
4296 switch (event) {
4297 case NETDEV_PRECHANGEUPPER:
4298 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004299 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004300 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004301 if (!info->linking)
4302 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004303 /* We can't have multiple VLAN interfaces configured on
4304 * the same port and being members in the same bridge.
4305 */
4306 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4307 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004308 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004309 break;
4310 case NETDEV_CHANGEUPPER:
4311 upper_dev = info->upper_dev;
Ido Schimmel1f880612017-03-10 08:53:35 +01004312 if (netif_is_bridge_master(upper_dev)) {
4313 if (info->linking)
4314 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4315 upper_dev);
4316 else
4317 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004318 } else {
Ido Schimmel1f880612017-03-10 08:53:35 +01004319 err = -EINVAL;
4320 WARN_ON(1);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004321 }
Ido Schimmel1f880612017-03-10 08:53:35 +01004322 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004323 }
4324
Ido Schimmel80bedf12016-06-20 23:03:59 +02004325 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004326}
4327
Ido Schimmel272c4472015-12-15 16:03:47 +01004328static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4329 unsigned long event, void *ptr,
4330 u16 vid)
4331{
4332 struct net_device *dev;
4333 struct list_head *iter;
4334 int ret;
4335
4336 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4337 if (mlxsw_sp_port_dev_check(dev)) {
4338 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4339 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004340 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004341 return ret;
4342 }
4343 }
4344
Ido Schimmel80bedf12016-06-20 23:03:59 +02004345 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004346}
4347
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004348static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4349 unsigned long event, void *ptr)
4350{
4351 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4352 u16 vid = vlan_dev_vlan_id(vlan_dev);
4353
Ido Schimmel272c4472015-12-15 16:03:47 +01004354 if (mlxsw_sp_port_dev_check(real_dev))
4355 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4356 vid);
4357 else if (netif_is_lag_master(real_dev))
4358 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4359 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004360
Ido Schimmel80bedf12016-06-20 23:03:59 +02004361 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004362}
4363
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004364static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4365 unsigned long event, void *ptr)
4366{
4367 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004368 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004369
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004370 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4371 err = mlxsw_sp_netdevice_router_port_event(dev);
4372 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004373 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4374 else if (netif_is_lag_master(dev))
4375 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004376 else if (netif_is_bridge_master(dev))
4377 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004378 else if (is_vlan_dev(dev))
4379 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004380
Ido Schimmel80bedf12016-06-20 23:03:59 +02004381 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004382}
4383
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004384static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4385 .notifier_call = mlxsw_sp_netdevice_event,
4386};
4387
Ido Schimmel99724c12016-07-04 08:23:14 +02004388static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4389 .notifier_call = mlxsw_sp_inetaddr_event,
4390 .priority = 10, /* Must be called before FIB notifier block */
4391};
4392
Jiri Pirkoe7322632016-09-01 10:37:43 +02004393static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4394 .notifier_call = mlxsw_sp_router_netevent_event,
4395};
4396
Jiri Pirko1d20d232016-10-27 15:12:59 +02004397static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4398 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4399 {0, },
4400};
4401
4402static struct pci_driver mlxsw_sp_pci_driver = {
4403 .name = mlxsw_sp_driver_name,
4404 .id_table = mlxsw_sp_pci_id_table,
4405};
4406
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004407static int __init mlxsw_sp_module_init(void)
4408{
4409 int err;
4410
4411 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004412 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004413 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4414
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004415 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4416 if (err)
4417 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004418
4419 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4420 if (err)
4421 goto err_pci_driver_register;
4422
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004423 return 0;
4424
Jiri Pirko1d20d232016-10-27 15:12:59 +02004425err_pci_driver_register:
4426 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004427err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004428 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004429 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004430 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4431 return err;
4432}
4433
4434static void __exit mlxsw_sp_module_exit(void)
4435{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004436 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004437 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004438 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004439 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004440 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4441}
4442
4443module_init(mlxsw_sp_module_init);
4444module_exit(mlxsw_sp_module_exit);
4445
4446MODULE_LICENSE("Dual BSD/GPL");
4447MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4448MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004449MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);