blob: 747e8d31051271e317a0de53c52130ba8b2655d5 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
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Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
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518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
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Marat Dukhan062bee32021-05-27 20:31:07 -0700528 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700529 "src/qs8-vadd/gen/minmax-scalar-x1.c",
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533 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
534 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700535 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/qu8-gemm/2x2-minmax-scalar.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700542 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700544 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700545 "src/qu8-requantization/rndna-scalar-signed64.c",
546 "src/qu8-requantization/rndna-scalar-unsigned32.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -0700548 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700549 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700550 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700551 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700553 "src/x8-lut/scalar.c",
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556 "src/x8-zip/x4-scalar.c",
557 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800558 "src/x32-depthtospace2d-chw2hwc/scalar.c",
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560 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700561 "src/x32-packx/x2-scalar.c",
562 "src/x32-packx/x3-scalar.c",
563 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700564 "src/x32-pad/scalar-float.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700566 "src/x32-unpool/scalar.c",
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Marat Dukhan436ebe62019-12-04 15:10:12 -0800574WASM_UKERNELS = [
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001314 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
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Marat Dukhaned6baaf2020-12-01 15:07:08 -08001318 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07001345 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001356 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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1365 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001370 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
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1372 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
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1375 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
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1378 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
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1380 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07001382 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
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1385 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1386 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
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1388 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1389 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001390 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1391 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1393 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001394 "src/math/roundd-wasmsimd-addsub.c",
1395 "src/math/roundd-wasmsimd-cvt.c",
1396 "src/math/roundne-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-addsub.c",
1398 "src/math/roundu-wasmsimd-cvt.c",
1399 "src/math/roundz-wasmsimd-addsub.c",
1400 "src/math/roundz-wasmsimd-cvt.c",
1401 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1402 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001403 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1405 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1407 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
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Marat Dukhanb5e3d172020-08-06 13:29:53 -07001409 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
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1423 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
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1428 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1429 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001430 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001431 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001432 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1433 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
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1435 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001440 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001441 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001442 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001443 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001444 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001445 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001446 "src/x32-zip/x2-wasmsimd.c",
1447 "src/x32-zip/x3-wasmsimd.c",
1448 "src/x32-zip/x4-wasmsimd.c",
1449 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001450]
1451
Marat Dukhan08c4a432019-10-03 09:29:21 -07001452# ISA-specific micro-kernels
1453NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001454 "src/f32-argmaxpool/4x-neon-c4.c",
1455 "src/f32-argmaxpool/9p8x-neon-c4.c",
1456 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001457 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1458 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001462 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001466 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001467 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001469 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001471 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001473 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1475 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1477 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001479 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1489 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1497 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1510 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001520 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001521 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001522 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1523 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1526 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1530 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1531 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1532 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1536 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001537 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1538 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001539 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1540 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1541 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1542 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1546 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1547 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1548 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1552 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1553 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1554 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001555 "src/f32-ibilinear-chw/gen/neon-p4.c",
1556 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001557 "src/f32-ibilinear/gen/neon-c4.c",
1558 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001560 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001562 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1563 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001565 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1567 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1568 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1570 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1572 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001573 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1574 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001575 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1577 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001578 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1579 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001580 "src/f32-prelu/gen/neon-1x4.c",
1581 "src/f32-prelu/gen/neon-1x8.c",
1582 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001583 "src/f32-prelu/gen/neon-2x4.c",
1584 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001585 "src/f32-prelu/gen/neon-2x16.c",
1586 "src/f32-prelu/gen/neon-4x4.c",
1587 "src/f32-prelu/gen/neon-4x8.c",
1588 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001600 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1612 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001613 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001614 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1616 "src/f32-spmm/gen/4x1-minmax-neon.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1619 "src/f32-spmm/gen/8x1-minmax-neon.c",
1620 "src/f32-spmm/gen/12x1-minmax-neon.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1623 "src/f32-spmm/gen/16x1-minmax-neon.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1626 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001627 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1628 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1630 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001631 "src/f32-vbinary/gen/vmax-neon-x4.c",
1632 "src/f32-vbinary/gen/vmax-neon-x8.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1634 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1635 "src/f32-vbinary/gen/vmin-neon-x4.c",
1636 "src/f32-vbinary/gen/vmin-neon-x8.c",
1637 "src/f32-vbinary/gen/vminc-neon-x4.c",
1638 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001639 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1640 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1642 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1644 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001645 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1646 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1648 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001649 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1650 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1652 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001653 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1654 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1660 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1666 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001667 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1669 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001670 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1671 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001672 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1673 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001674 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1675 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001676 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1677 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1679 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1681 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1683 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1701 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001702 "src/f32-vunary/gen/vabs-neon-x4.c",
1703 "src/f32-vunary/gen/vabs-neon-x8.c",
1704 "src/f32-vunary/gen/vneg-neon-x4.c",
1705 "src/f32-vunary/gen/vneg-neon-x8.c",
1706 "src/f32-vunary/gen/vsqr-neon-x4.c",
1707 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001708 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1709 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/math/roundd-neon-addsub.c",
1711 "src/math/roundd-neon-cvt.c",
1712 "src/math/roundne-neon-addsub.c",
1713 "src/math/roundu-neon-addsub.c",
1714 "src/math/roundu-neon-cvt.c",
1715 "src/math/roundz-neon-addsub.c",
1716 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001717 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1719 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1720 "src/math/sqrt-neon-nr1rsqrts.c",
1721 "src/math/sqrt-neon-nr2rsqrts.c",
1722 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001723 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
1724 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
1725 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
1726 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
1727 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
1728 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
1729 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
1730 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001731 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1732 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1733 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1734 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001735 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1736 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1737 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1738 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001739 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1740 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1741 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1742 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1743 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1744 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1745 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1746 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1747 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1748 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1749 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1750 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1751 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1752 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1753 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1754 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1755 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1756 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1757 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1758 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1759 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1760 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1761 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1762 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1763 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1764 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1765 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1766 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1767 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1768 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1769 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1770 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1771 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1772 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1773 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1774 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1775 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1776 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1777 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1778 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1779 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1780 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1781 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1782 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1783 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1784 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1785 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1786 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1787 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1788 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1789 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1790 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1791 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1792 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1793 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1794 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1795 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1796 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1797 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1798 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1799 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1800 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1801 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1802 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1803 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1804 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1805 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1806 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1807 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1808 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1809 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1810 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1811 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1812 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1813 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1814 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1815 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1816 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1817 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1818 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1819 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1820 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1821 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1822 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1823 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1824 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1825 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1826 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1827 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1828 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1829 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1830 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1831 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1832 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1833 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1834 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1835 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1836 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
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1838 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1839 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1840 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
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1842 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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1846 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
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1848 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1849 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1850 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1851 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1852 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1853 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1854 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1855 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1856 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1857 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1858 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1859 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1860 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1861 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1862 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1863 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1864 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1865 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1866 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1867 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1868 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1869 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1870 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1871 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1872 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1873 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1874 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001875 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001876 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001877 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07001878 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001879 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1880 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1881 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1882 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1883 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1884 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1885 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1886 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001887 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1888 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1889 "src/qu8-dwconv/up8x9-minmax-neon.c",
1890 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1891 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1892 "src/qu8-gemm/4x8-minmax-neon.c",
1893 "src/qu8-gemm/8x8-minmax-neon.c",
1894 "src/qu8-igemm/4x8-minmax-neon.c",
1895 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001896 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001897 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001898 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001899 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001900 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001901 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001902 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001903 "src/x8-zip/x2-neon.c",
1904 "src/x8-zip/x3-neon.c",
1905 "src/x8-zip/x4-neon.c",
1906 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001907 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001908 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001909 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001910 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001911 "src/x32-zip/x2-neon.c",
1912 "src/x32-zip/x3-neon.c",
1913 "src/x32-zip/x4-neon.c",
1914 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001915]
1916
1917NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001918 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1919 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1920 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1921 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1922 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1923 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1924 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1925 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1926 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1927 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1928 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1929 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1930 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1931 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1932 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1933 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1934 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1935 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1936 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1937 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1938 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1939 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1940 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1941 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1942 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1943 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1944 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1945 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1946 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1947 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001948 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1949 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001950 "src/f32-ibilinear/gen/neonfma-c4.c",
1951 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001952 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001953 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001954 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001955 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1956 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001957 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1958 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001959 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1960 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001961 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1962 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001963 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001964 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001965 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001966 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1967 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001968 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001969 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1970 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001971 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001972 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1973 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001974 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1975 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1976 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1977 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1978 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1979 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1980 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1981 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1982 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1984 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1985 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1986 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08001987 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1988 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
1989 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1990 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1991 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
1992 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1993 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1994 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1995 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
1996 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1997 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
1998 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
1999 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002000 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2001 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2002 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2003 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2004 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2005 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2006 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2007 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2008 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2009 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2010 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2011 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002012 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2013 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002014 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2015 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2016 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2017 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2018 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2019 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2020 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2021 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2022 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2023 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2024 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2025 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2026 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2027 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2028 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2029 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2066 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2067 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002068 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2069 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2070 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2071 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2072 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2073 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2074 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2075 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2076 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2077 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2078 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2079 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2080 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2081 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2082 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2083 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2084 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2085 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2086 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2087 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002088 "src/math/exp-neonfma-rr2-lut64-p2.c",
2089 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002090 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2091 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002092 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2093 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2094 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002095 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2096 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2097 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002098 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2099 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2100 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002101 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2102 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2103 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002104 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2105 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2106 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002107 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2108 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2109 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002110 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2111 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2112 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002113 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002114 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002115 "src/math/sqrt-neonfma-nr2fma.c",
2116 "src/math/sqrt-neonfma-nr2fma1adj.c",
2117 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002118]
2119
2120AARCH64_NEONFMA_UKERNELS = [
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Marat Dukhance7a3f82020-05-17 21:46:44 -07002122 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002123 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
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Marat Dukhan56b10cd2020-05-18 09:35:49 -07002125 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002126 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002127 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002128 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002129 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002130 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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2132 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002133 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002134 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002135 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2138 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2139 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002140 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2141 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2142 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002143 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002144 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002145 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2146 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2147 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002148 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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2151 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002152 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002155 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002156 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002157 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002158 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002161 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002169 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002170 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002171 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2172 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2173 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
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2176 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2177 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2178 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2179 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2180 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2181 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2182 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2183 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2184 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2185 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2186 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2187 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2188 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2189 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2190 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002191 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2192 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002193 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2194 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2196 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002197 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2198 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002199 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2200 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002201 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2202 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2203 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2204 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2205 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2206 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
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2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2223 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2224 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002225 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2226 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002227 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002228 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002229 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002230 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002231 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002232 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002233]
2234
Marat Dukhan8853b822020-05-07 12:19:01 -07002235NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002236 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2237 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002238 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2239 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2240 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2241 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2242 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2243 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002244 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002245 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002246 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002247 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002248]
2249
Marat Dukhan08c4a432019-10-03 09:29:21 -07002250AARCH64_NEONFP16ARITH_UKERNELS = [
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2452 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2453 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2454 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002455 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2456 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2457 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002458 "src/f32-ibilinear-chw/gen/sse-p4.c",
2459 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002460 "src/f32-ibilinear/gen/sse-c4.c",
2461 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002462 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2463 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2464 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002465 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2466 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2467 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002468 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2469 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2470 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2471 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002472 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2473 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2474 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002475 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2476 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2477 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002478 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002479 "src/f32-prelu/gen/sse-2x4.c",
2480 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002481 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002482 "src/f32-spmm/gen/4x1-minmax-sse.c",
2483 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002484 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002485 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002486 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2487 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2488 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2489 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2490 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2491 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2492 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2493 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002494 "src/f32-vbinary/gen/vmax-sse-x4.c",
2495 "src/f32-vbinary/gen/vmax-sse-x8.c",
2496 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2497 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2498 "src/f32-vbinary/gen/vmin-sse-x4.c",
2499 "src/f32-vbinary/gen/vmin-sse-x8.c",
2500 "src/f32-vbinary/gen/vminc-sse-x4.c",
2501 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002502 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2503 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2504 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2505 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2506 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2507 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2508 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2509 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002510 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2511 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2512 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2513 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002514 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2515 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2516 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2517 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002518 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2519 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002520 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2521 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002522 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2523 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002524 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2525 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002526 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2527 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002528 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2529 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002530 "src/f32-vunary/gen/vabs-sse-x4.c",
2531 "src/f32-vunary/gen/vabs-sse-x8.c",
2532 "src/f32-vunary/gen/vneg-sse-x4.c",
2533 "src/f32-vunary/gen/vneg-sse-x8.c",
2534 "src/f32-vunary/gen/vsqr-sse-x4.c",
2535 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002536 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002537 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002538 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002539 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002540 "src/math/sqrt-sse-hh1mac.c",
2541 "src/math/sqrt-sse-nr1mac.c",
2542 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002543 "src/x32-fill/sse.c",
2544 "src/x32-packx/x4-sse.c",
2545 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002546]
2547
2548SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002549 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002550 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002551 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002552 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2553 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2554 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2555 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2556 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2557 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2558 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2559 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2560 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2561 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2562 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2563 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002564 "src/f32-prelu/gen/sse2-2x4.c",
2565 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002566 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002567 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002568 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002569 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2570 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002571 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002572 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2573 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002574 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002575 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2576 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002577 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002578 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2579 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2580 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2581 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2582 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2583 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2584 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2585 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2586 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2587 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2588 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2589 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002590 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2591 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002592 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2593 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002594 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2595 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2596 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2597 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2598 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2599 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002600 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2601 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2602 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2603 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2604 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2605 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2606 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2607 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2608 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2609 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2610 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2611 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002612 "src/math/exp-sse2-rr2-lut64-p2.c",
2613 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002614 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002615 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002616 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002617 "src/math/roundd-sse2-cvt.c",
2618 "src/math/roundne-sse2-cvt.c",
2619 "src/math/roundu-sse2-cvt.c",
2620 "src/math/roundz-sse2-cvt.c",
2621 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2622 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2623 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2624 "src/math/sigmoid-sse2-rr2-p5-div.c",
2625 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2626 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002627 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002628 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002629 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2630 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2631 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002632 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002633 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2634 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2635 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2636 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2637 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2638 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002639 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2640 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2641 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002642 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2643 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2644 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002645 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2646 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002647 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002648 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002649 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002650 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2651 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002652 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002653 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002654 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002655 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2656 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002657 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002658 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002659 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002660 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
2661 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002662 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002663 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002664 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002665 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002686 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002702 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
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Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002708 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002709 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002710 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002711 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07002715 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07002719 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07002721 "src/qu8-dwconv/up8x9-minmax-sse2.c",
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2725 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002726 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002727 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002728 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002729 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002730 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002731 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002732 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002733 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002734 "src/x8-zip/x2-sse2.c",
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2736 "src/x8-zip/x4-sse2.c",
2737 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002738 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002739 "src/x32-zip/x2-sse2.c",
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2741 "src/x32-zip/x4-sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07002743]
2744
2745SSSE3_UKERNELS = [
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Marat Dukhan06716242021-05-26 15:56:39 -07002816 "src/qs8-requantization/rndna-ssse3.c",
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2820
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002821SSE41_UKERNELS = [
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07002836 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
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Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002838 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2839 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002840 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
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2842 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
2843 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
2844 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2845 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002846 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
2847 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
2848 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
2849 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2850 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2851 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2852 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
2853 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
2854 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2855 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2856 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2857 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002858 "src/math/roundd-sse41.c",
2859 "src/math/roundne-sse41.c",
2860 "src/math/roundu-sse41.c",
2861 "src/math/roundz-sse41.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002862 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2863 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002864 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2865 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002866 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2867 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2868 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2869 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2870 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2871 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002872 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
2873 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002874 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2875 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2876 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2877 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2878 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2879 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2880 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
2881 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
2882 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2883 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2884 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
2885 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002886 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
2887 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
2888 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002889 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
2890 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
2891 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002892 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2893 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002894 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002895 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002896 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002897 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002899 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002900 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002901 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002902 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002904 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002905 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002906 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002907 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002909 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002910 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002911 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002912 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002914 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002915 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002916 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002917 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002919 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002920 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002921 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002924 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002925 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002926 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002927 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002933 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002937 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002938 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002955 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002956 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002957 "src/qs8-requantization/rndna-sse4.c",
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Marat Dukhand9f3ad42020-08-10 12:30:58 -07002959 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07002967 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -07002975 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002976 "src/qu8-requantization/rndna-sse4.c",
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2978
Marat Dukhan08c4a432019-10-03 09:29:21 -07002979AVX_UKERNELS = [
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3023 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3024 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3025 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3026 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3027 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3028 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3029 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003030 "src/f32-vbinary/gen/vmax-avx-x8.c",
3031 "src/f32-vbinary/gen/vmax-avx-x16.c",
3032 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3033 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3034 "src/f32-vbinary/gen/vmin-avx-x8.c",
3035 "src/f32-vbinary/gen/vmin-avx-x16.c",
3036 "src/f32-vbinary/gen/vminc-avx-x8.c",
3037 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003038 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3039 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3040 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3041 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3042 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3043 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3044 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3045 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003046 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3047 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3048 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3049 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003050 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3051 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3052 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3053 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003054 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3055 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003056 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3057 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3058 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3059 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3060 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3061 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3062 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3063 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3064 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3065 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3066 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3067 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3068 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3069 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3070 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3071 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3072 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3073 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003074 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3075 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003076 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3077 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003078 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3079 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003080 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3081 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003082 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3083 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3084 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3085 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3086 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3087 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003088 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003089 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3090 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3091 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3092 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3093 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3094 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3095 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3096 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3097 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3098 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3099 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3100 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3101 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3102 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3103 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3104 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3105 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3106 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3107 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3108 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003109 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3110 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003111 "src/f32-vunary/gen/vabs-avx-x8.c",
3112 "src/f32-vunary/gen/vabs-avx-x16.c",
3113 "src/f32-vunary/gen/vneg-avx-x8.c",
3114 "src/f32-vunary/gen/vneg-avx-x16.c",
3115 "src/f32-vunary/gen/vsqr-avx-x8.c",
3116 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003117 "src/math/exp-avx-rr2-p5.c",
3118 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3119 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3120 "src/math/expm1minus-avx-rr2-p6.c",
3121 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3122 "src/math/sigmoid-avx-rr2-p5-div.c",
3123 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3124 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003125 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3126 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003127 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3128 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003129 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3130 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3131 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3132 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3133 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3134 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003135 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3136 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003137 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3138 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3139 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3140 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3141 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3142 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3143 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3144 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3145 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3146 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3147 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3148 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003149 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3150 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003151 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003152 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003153 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003154 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3155 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003156 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003157 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003158 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003159 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3160 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003161 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003162 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003163 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003164 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3165 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003166 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003167 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003168 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003169 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3170 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003171 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003172 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003173 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003174 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3175 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003176 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003177 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003178 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003179 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3180 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003181 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003182 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003183 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003184 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3185 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003186 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003187 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3188 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3189 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003190 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003191 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3192 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3193 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003194 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003195 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3196 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3197 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003198 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003199 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3200 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3201 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003202 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003203 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3204 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3205 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003206 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003207 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3208 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3209 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003210 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003211 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003212 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3213 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3214 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3215 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3216 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3217 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3218 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3219 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3220 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3221 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3222 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3223 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3224 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3225 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3226 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07003228]
3229
Marat Dukhan1566fee2020-08-02 21:55:41 -07003230XOP_UKERNELS = [
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Marat Dukhan1566fee2020-08-02 21:55:41 -07003314]
3315
Marat Dukhanfda12b82019-11-21 12:27:59 -08003316FMA3_UKERNELS = [
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Marat Dukhan6adff4e2019-10-14 18:32:07 -07003386AVX2_UKERNELS = [
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08003411 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003413 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003414 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003415 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003416 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3417 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003418 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003419 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3420 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3421 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003422 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003423 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3424 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3425 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3426 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3427 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3428 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3429 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3430 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3431 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3432 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3433 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3434 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3435 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3436 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3437 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3438 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3439 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3440 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3441 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3442 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3443 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3444 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3445 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3446 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3447 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3448 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3449 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3450 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3451 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3452 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3453 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3454 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3455 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3456 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3457 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3458 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3459 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3460 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3461 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3462 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003463 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3464 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3465 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3466 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3467 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3468 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3469 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3470 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3471 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3472 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3473 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3474 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3475 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3476 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3477 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3478 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3479 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3480 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3481 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3482 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3483 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3484 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3485 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3486 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003487 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3488 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3489 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3490 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3491 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3492 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3493 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3494 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3495 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3496 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3497 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3498 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3499 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3500 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3501 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3502 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3503 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3504 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3505 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3506 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3507 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3508 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3509 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3510 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3511 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3512 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3513 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3514 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3515 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3516 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003517 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3518 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3519 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003520 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3521 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3522 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3523 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003524 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003525 "src/math/extexp-avx2-p5.c",
3526 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3527 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3528 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3529 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3530 "src/math/sigmoid-avx2-rr1-p5-div.c",
3531 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3532 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3533 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3534 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3535 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3536 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3537 "src/math/sigmoid-avx2-rr2-p5-div.c",
3538 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3539 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003540 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3541 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3542 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3543 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3544 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3545 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003546 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003547 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003548 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003549 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003550 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003551 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003552 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3553 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003554 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003555 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003556 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3557 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003558 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003559 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003560 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003561 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003562 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003563 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003564 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3565 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003566 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003567 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003568 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3569 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003570 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003571 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003572 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003573 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003574 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003575 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003576 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003577 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003578 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003579 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003580 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003581 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003582 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003583 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003584 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003585 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003586 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003587 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003588 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3589 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3590 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3591 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3592 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3593 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3594 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3595 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003596]
3597
Marat Dukhan08c4a432019-10-03 09:29:21 -07003598AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003599 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3600 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003601 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3602 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003603 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3604 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003605 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3606 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3607 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3608 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3609 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3610 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003611 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3612 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3613 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3614 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3615 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3616 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003617 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3618 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3619 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3620 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3621 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3622 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003623 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3624 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3625 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3626 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3627 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3628 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003629 "src/f32-prelu/gen/avx512f-2x16.c",
3630 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003631 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3632 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003633 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003634 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003635 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003636 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3637 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003638 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003639 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3640 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3641 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003642 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003643 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3644 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003645 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003646 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003647 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003648 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3649 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003650 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003651 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3652 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3653 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003654 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003655 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3656 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003657 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003658 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003659 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003660 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3661 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003662 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003663 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3664 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3665 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003666 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003667 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003668 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3669 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3670 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3671 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3672 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3673 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3674 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3675 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003676 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3677 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3678 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3679 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3680 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3681 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3682 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3683 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003684 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3685 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3686 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3687 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3688 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3689 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3690 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3691 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003692 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3693 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3694 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3695 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003696 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3697 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3698 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3699 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003700 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3701 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003702 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3703 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3704 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3705 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3706 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3707 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3708 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3709 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3710 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3711 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3712 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3713 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3714 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3715 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3716 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3717 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003718 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3719 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003720 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3721 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003722 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3723 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003724 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3725 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3726 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3727 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3728 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3729 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3730 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3731 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003732 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003733 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3734 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3735 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3736 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3737 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3738 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3739 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3740 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3741 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3742 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3743 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3744 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3745 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3746 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3747 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3748 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3749 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3750 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3751 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3752 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3753 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3754 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3755 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3756 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003757 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3758 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3759 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3760 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3761 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3762 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3763 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3764 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3765 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3766 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3767 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3768 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3769 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3770 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3771 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3772 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3773 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3774 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3775 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3776 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3777 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3778 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3779 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3780 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3781 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3782 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3783 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3784 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3785 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3786 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3787 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3788 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3789 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3790 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3791 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3792 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3793 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3794 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3795 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3796 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3797 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3798 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3799 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3800 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3801 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
3802 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
3803 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
3804 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003805 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
3806 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
3807 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
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3815 "src/f32-vunary/gen/vneg-avx512f-x16.c",
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3856
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003857AVX512SKX_UKERNELS = [
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3883
Frank Barchardbcedc082020-08-17 18:00:51 -07003884WASM32_ASM_UKERNELS = [
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Marat Dukhan08c4a432019-10-03 09:29:21 -07003890AARCH32_ASM_UKERNELS = [
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3906
3907AARCH64_ASM_UKERNELS = [
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3984 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3985 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07003986 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3987 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003988 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3989 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3990 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3991 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07003992 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
3993 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003994 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
3995 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07003996 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
3997 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3998 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003999 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4000 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4001 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4002 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
4003 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4004 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4005 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4006 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004007 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004008 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4009 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004010 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4011 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004012]
4013
Marat Dukhan1b354632020-03-23 12:50:22 -07004014INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004015 "src/xnnpack/argmaxpool.h",
4016 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004017 "src/xnnpack/common.h",
4018 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004019 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004020 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004021 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004022 "src/xnnpack/gavgpool.h",
4023 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004024 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004025 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004026 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004027 "src/xnnpack/lut.h",
4028 "src/xnnpack/math.h",
4029 "src/xnnpack/maxpool.h",
4030 "src/xnnpack/packx.h",
4031 "src/xnnpack/pad.h",
4032 "src/xnnpack/params.h",
4033 "src/xnnpack/pavgpool.h",
4034 "src/xnnpack/ppmm.h",
4035 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004036 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004037 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004038 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004039 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004040 "src/xnnpack/spmm.h",
4041 "src/xnnpack/unpool.h",
4042 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004043 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004044 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004045 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004046 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004047 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004048 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004049 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004050]
4051
4052INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004053 "include/xnnpack.h",
4054 "src/xnnpack/allocator.h",
4055 "src/xnnpack/compute.h",
4056 "src/xnnpack/im2col.h",
4057 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004058 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004059 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004060 "src/xnnpack/operator.h",
4061 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004062 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004063 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004064 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004065 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004066]
4067
Marat Dukhan1b354632020-03-23 12:50:22 -07004068ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004069 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004070]
4071
Marat Dukhan1b354632020-03-23 12:50:22 -07004072MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004073 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004074 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004075]
4076
Marat Dukhan1b354632020-03-23 12:50:22 -07004077MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004078 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004079 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004080 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004081 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004082]
4083
4084OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004085 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004086 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004087]
4088
4089WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004090 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004091 "src/xnnpack/operator.h",
4092 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004093]
4094
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004095LOGGING_COPTS = select({
4096 # No logging in optimized mode
4097 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4098 # Full logging in debug mode
4099 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4100 # Error-only logging in default (fastbuild) mode
4101 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4102})
4103
Marat Dukhan3b59de22020-06-03 20:15:19 -07004104LOGGING_SRCS = select({
4105 # No logging in optimized mode
4106 ":optimized_build": [],
4107 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004108 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004109 "src/operator-strings.c",
4110 "src/subgraph-strings.c",
4111 ],
4112})
4113
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004114LOGGING_HDRS = [
4115 "src/xnnpack/log.h",
4116]
4117
Marat Dukhan08c4a432019-10-03 09:29:21 -07004118xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004119 name = "tables",
4120 srcs = TABLE_SRCS,
4121 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004122 gcc_copts = xnnpack_gcc_std_copts(),
4123 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004124)
4125
4126xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004127 name = "scalar_ukernels",
4128 srcs = SCALAR_UKERNELS,
4129 hdrs = INTERNAL_HDRS,
4130 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004131 gcc_copts = xnnpack_gcc_std_copts(),
4132 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004133 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004134 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004135 "@FP16",
4136 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004137 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004138 ],
4139)
4140
4141xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004142 name = "scalar_ukernels_test_mode",
4143 srcs = SCALAR_UKERNELS,
4144 hdrs = INTERNAL_HDRS,
4145 aarch32_copts = ["-marm"],
4146 copts = [
4147 "-UNDEBUG",
4148 "-DXNN_TEST_MODE=1",
4149 ],
4150 gcc_copts = xnnpack_gcc_std_copts(),
4151 msvc_copts = xnnpack_msvc_std_copts(),
4152 deps = [
4153 ":tables",
4154 "@FP16",
4155 "@FXdiv",
4156 "@pthreadpool",
4157 ],
4158)
4159
4160xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004161 name = "wasm_ukernels",
4162 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004163 gcc_copts = xnnpack_gcc_std_copts(),
4164 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004165 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004166 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004167 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004168 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004169 "@FP16",
4170 "@FXdiv",
4171 "@pthreadpool",
4172 ],
4173)
4174
4175xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004176 name = "wasm_ukernels_test_mode",
4177 hdrs = INTERNAL_HDRS,
4178 copts = [
4179 "-UNDEBUG",
4180 "-DXNN_TEST_MODE=1",
4181 ],
4182 gcc_copts = xnnpack_gcc_std_copts(),
4183 msvc_copts = xnnpack_msvc_std_copts(),
4184 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004185 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004186 deps = [
4187 ":tables",
4188 "@FP16",
4189 "@FXdiv",
4190 "@pthreadpool",
4191 ],
4192)
4193
4194xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004195 name = "neon_ukernels",
4196 hdrs = INTERNAL_HDRS,
4197 aarch32_copts = [
4198 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004199 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004200 "-mfpu=neon",
4201 ],
4202 aarch32_srcs = NEON_UKERNELS,
4203 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004204 gcc_copts = xnnpack_gcc_std_copts(),
4205 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004206 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004207 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004208 "@FP16",
4209 "@pthreadpool",
4210 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004211)
4212
4213xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004214 name = "neon_ukernels_test_mode",
4215 hdrs = INTERNAL_HDRS,
4216 aarch32_copts = [
4217 "-marm",
4218 "-march=armv7-a",
4219 "-mfpu=neon",
4220 ],
4221 aarch32_srcs = NEON_UKERNELS,
4222 aarch64_srcs = NEON_UKERNELS,
4223 copts = [
4224 "-UNDEBUG",
4225 "-DXNN_TEST_MODE=1",
4226 ],
4227 gcc_copts = xnnpack_gcc_std_copts(),
4228 msvc_copts = xnnpack_msvc_std_copts(),
4229 deps = [
4230 ":tables",
4231 "@FP16",
4232 "@pthreadpool",
4233 ],
4234)
4235
4236xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004237 name = "neonfma_ukernels",
4238 hdrs = INTERNAL_HDRS,
4239 aarch32_copts = [
4240 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004241 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004242 "-mfpu=neon-vfpv4",
4243 ],
4244 aarch32_srcs = NEONFMA_UKERNELS,
4245 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004246 apple_aarch32_copts = [
4247 "-mcpu=swift",
4248 "-mtune=generic",
4249 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004250 gcc_copts = xnnpack_gcc_std_copts(),
4251 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004252 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004253 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004254 "@FP16",
4255 "@pthreadpool",
4256 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004257)
4258
4259xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004260 name = "neonfma_ukernels_test_mode",
4261 hdrs = INTERNAL_HDRS,
4262 aarch32_copts = [
4263 "-marm",
4264 "-march=armv7-a",
4265 "-mfpu=neon-vfpv4",
4266 ],
4267 aarch32_srcs = NEONFMA_UKERNELS,
4268 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004269 apple_aarch32_copts = [
4270 "-mcpu=swift",
4271 "-mtune=generic",
4272 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004273 copts = [
4274 "-UNDEBUG",
4275 "-DXNN_TEST_MODE=1",
4276 ],
4277 gcc_copts = xnnpack_gcc_std_copts(),
4278 msvc_copts = xnnpack_msvc_std_copts(),
4279 deps = [
4280 ":tables",
4281 "@FP16",
4282 "@pthreadpool",
4283 ],
4284)
4285
4286xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004287 name = "neonv8_ukernels",
4288 hdrs = INTERNAL_HDRS,
4289 aarch32_copts = [
4290 "-marm",
4291 "-march=armv8-a",
4292 "-mfpu=neon-fp-armv8",
4293 ],
4294 aarch32_srcs = NEONV8_UKERNELS,
4295 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004296 apple_aarch32_copts = [
4297 "-mcpu=cyclone",
4298 "-mtune=generic",
4299 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004300 gcc_copts = xnnpack_gcc_std_copts(),
4301 msvc_copts = xnnpack_msvc_std_copts(),
4302 deps = [
4303 ":tables",
4304 "@FP16",
4305 "@pthreadpool",
4306 ],
4307)
4308
4309xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004310 name = "neonv8_ukernels_test_mode",
4311 hdrs = INTERNAL_HDRS,
4312 aarch32_copts = [
4313 "-marm",
4314 "-march=armv8-a",
4315 "-mfpu=neon-fp-armv8",
4316 ],
4317 aarch32_srcs = NEONV8_UKERNELS,
4318 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004319 apple_aarch32_copts = [
4320 "-mcpu=cyclone",
4321 "-mtune=generic",
4322 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004323 copts = [
4324 "-UNDEBUG",
4325 "-DXNN_TEST_MODE=1",
4326 ],
4327 gcc_copts = xnnpack_gcc_std_copts(),
4328 msvc_copts = xnnpack_msvc_std_copts(),
4329 deps = [
4330 ":tables",
4331 "@FP16",
4332 "@pthreadpool",
4333 ],
4334)
4335
4336xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004337 name = "neonfp16arith_ukernels",
4338 hdrs = INTERNAL_HDRS,
4339 aarch64_copts = ["-march=armv8.2-a+fp16"],
4340 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004341 gcc_copts = xnnpack_gcc_std_copts(),
4342 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004343 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004344 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004345 "@FP16",
4346 "@pthreadpool",
4347 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004348)
4349
4350xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004351 name = "neonfp16arith_ukernels_test_mode",
4352 hdrs = INTERNAL_HDRS,
4353 aarch64_copts = ["-march=armv8.2-a+fp16"],
4354 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4355 copts = [
4356 "-UNDEBUG",
4357 "-DXNN_TEST_MODE=1",
4358 ],
4359 gcc_copts = xnnpack_gcc_std_copts(),
4360 msvc_copts = xnnpack_msvc_std_copts(),
4361 deps = [
4362 ":tables",
4363 "@FP16",
4364 "@pthreadpool",
4365 ],
4366)
4367
4368xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004369 name = "neondot_ukernels",
4370 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004371 aarch32_copts = [
4372 "-marm",
4373 "-march=armv8.2-a+dotprod",
4374 "-mfpu=neon-fp-armv8",
4375 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004376 aarch32_srcs = NEONDOT_UKERNELS,
4377 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4378 aarch64_srcs = NEONDOT_UKERNELS,
4379 gcc_copts = xnnpack_gcc_std_copts(),
4380 msvc_copts = xnnpack_msvc_std_copts(),
4381 deps = [
4382 ":tables",
4383 "@FP16",
4384 "@pthreadpool",
4385 ],
4386)
4387
4388xnnpack_cc_library(
4389 name = "neondot_ukernels_test_mode",
4390 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004391 aarch32_copts = [
4392 "-marm",
4393 "-march=armv8.2-a+dotprod",
4394 "-mfpu=neon-fp-armv8",
4395 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004396 aarch32_srcs = NEONDOT_UKERNELS,
4397 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4398 aarch64_srcs = NEONDOT_UKERNELS,
4399 copts = [
4400 "-UNDEBUG",
4401 "-DXNN_TEST_MODE=1",
4402 ],
4403 gcc_copts = xnnpack_gcc_std_copts(),
4404 msvc_copts = xnnpack_msvc_std_copts(),
4405 deps = [
4406 ":tables",
4407 "@FP16",
4408 "@pthreadpool",
4409 ],
4410)
4411
4412xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004413 name = "sse2_ukernels",
4414 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004415 gcc_copts = xnnpack_gcc_std_copts(),
4416 gcc_x86_copts = ["-msse2"],
4417 msvc_copts = xnnpack_msvc_std_copts(),
4418 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004419 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004420 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004421 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004422 "@FP16",
4423 "@pthreadpool",
4424 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004425)
4426
4427xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004428 name = "sse2_ukernels_test_mode",
4429 hdrs = INTERNAL_HDRS,
4430 copts = [
4431 "-UNDEBUG",
4432 "-DXNN_TEST_MODE=1",
4433 ],
4434 gcc_copts = xnnpack_gcc_std_copts(),
4435 gcc_x86_copts = ["-msse2"],
4436 msvc_copts = xnnpack_msvc_std_copts(),
4437 msvc_x86_32_copts = ["/arch:SSE2"],
4438 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4439 deps = [
4440 ":tables",
4441 "@FP16",
4442 "@pthreadpool",
4443 ],
4444)
4445
4446xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004447 name = "ssse3_ukernels",
4448 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004449 gcc_copts = xnnpack_gcc_std_copts(),
4450 gcc_x86_copts = ["-mssse3"],
4451 msvc_copts = xnnpack_msvc_std_copts(),
4452 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004453 x86_srcs = SSSE3_UKERNELS,
4454 deps = [
4455 ":tables",
4456 "@FP16",
4457 "@pthreadpool",
4458 ],
4459)
4460
4461xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004462 name = "ssse3_ukernels_test_mode",
4463 hdrs = INTERNAL_HDRS,
4464 copts = [
4465 "-UNDEBUG",
4466 "-DXNN_TEST_MODE=1",
4467 ],
4468 gcc_copts = xnnpack_gcc_std_copts(),
4469 gcc_x86_copts = ["-mssse3"],
4470 msvc_copts = xnnpack_msvc_std_copts(),
4471 msvc_x86_32_copts = ["/arch:SSE2"],
4472 x86_srcs = SSSE3_UKERNELS,
4473 deps = [
4474 ":tables",
4475 "@FP16",
4476 "@pthreadpool",
4477 ],
4478)
4479
4480xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004481 name = "sse41_ukernels",
4482 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004483 gcc_copts = xnnpack_gcc_std_copts(),
4484 gcc_x86_copts = ["-msse4.1"],
4485 msvc_copts = xnnpack_msvc_std_copts(),
4486 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004487 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004488 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004489 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004490 "@FP16",
4491 "@pthreadpool",
4492 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004493)
4494
4495xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004496 name = "sse41_ukernels_test_mode",
4497 hdrs = INTERNAL_HDRS,
4498 copts = [
4499 "-UNDEBUG",
4500 "-DXNN_TEST_MODE=1",
4501 ],
4502 gcc_copts = xnnpack_gcc_std_copts(),
4503 gcc_x86_copts = ["-msse4.1"],
4504 msvc_copts = xnnpack_msvc_std_copts(),
4505 msvc_x86_32_copts = ["/arch:SSE2"],
4506 x86_srcs = SSE41_UKERNELS,
4507 deps = [
4508 ":tables",
4509 "@FP16",
4510 "@pthreadpool",
4511 ],
4512)
4513
4514xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004515 name = "avx_ukernels",
4516 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004517 gcc_copts = xnnpack_gcc_std_copts(),
4518 gcc_x86_copts = ["-mavx"],
4519 msvc_copts = xnnpack_msvc_std_copts(),
4520 msvc_x86_32_copts = ["/arch:AVX"],
4521 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004522 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004523 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004524 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004525 "@FP16",
4526 "@pthreadpool",
4527 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004528)
4529
4530xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004531 name = "avx_ukernels_test_mode",
4532 hdrs = INTERNAL_HDRS,
4533 copts = [
4534 "-UNDEBUG",
4535 "-DXNN_TEST_MODE=1",
4536 ],
4537 gcc_copts = xnnpack_gcc_std_copts(),
4538 gcc_x86_copts = ["-mavx"],
4539 msvc_copts = xnnpack_msvc_std_copts(),
4540 msvc_x86_32_copts = ["/arch:AVX"],
4541 msvc_x86_64_copts = ["/arch:AVX"],
4542 x86_srcs = AVX_UKERNELS,
4543 deps = [
4544 ":tables",
4545 "@FP16",
4546 "@pthreadpool",
4547 ],
4548)
4549
4550xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004551 name = "xop_ukernels",
4552 hdrs = INTERNAL_HDRS,
4553 gcc_copts = xnnpack_gcc_std_copts(),
4554 gcc_x86_copts = ["-mxop"],
4555 msvc_copts = xnnpack_msvc_std_copts(),
4556 msvc_x86_32_copts = ["/arch:AVX"],
4557 msvc_x86_64_copts = ["/arch:AVX"],
4558 x86_srcs = XOP_UKERNELS,
4559 deps = [
4560 ":tables",
4561 "@FP16",
4562 "@pthreadpool",
4563 ],
4564)
4565
4566xnnpack_cc_library(
4567 name = "xop_ukernels_test_mode",
4568 hdrs = INTERNAL_HDRS,
4569 copts = [
4570 "-UNDEBUG",
4571 "-DXNN_TEST_MODE=1",
4572 ],
4573 gcc_copts = xnnpack_gcc_std_copts(),
4574 gcc_x86_copts = ["-mxop"],
4575 msvc_copts = xnnpack_msvc_std_copts(),
4576 msvc_x86_32_copts = ["/arch:AVX"],
4577 msvc_x86_64_copts = ["/arch:AVX"],
4578 x86_srcs = XOP_UKERNELS,
4579 deps = [
4580 ":tables",
4581 "@FP16",
4582 "@pthreadpool",
4583 ],
4584)
4585
4586xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004587 name = "fma3_ukernels",
4588 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004589 gcc_copts = xnnpack_gcc_std_copts(),
4590 gcc_x86_copts = ["-mfma"],
4591 msvc_copts = xnnpack_msvc_std_copts(),
4592 msvc_x86_32_copts = ["/arch:AVX"],
4593 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004594 x86_srcs = FMA3_UKERNELS,
4595 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004596 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004597 "@FP16",
4598 "@pthreadpool",
4599 ],
4600)
4601
4602xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004603 name = "fma3_ukernels_test_mode",
4604 hdrs = INTERNAL_HDRS,
4605 copts = [
4606 "-UNDEBUG",
4607 "-DXNN_TEST_MODE=1",
4608 ],
4609 gcc_copts = xnnpack_gcc_std_copts(),
4610 gcc_x86_copts = ["-mfma"],
4611 msvc_copts = xnnpack_msvc_std_copts(),
4612 msvc_x86_32_copts = ["/arch:AVX"],
4613 msvc_x86_64_copts = ["/arch:AVX"],
4614 x86_srcs = FMA3_UKERNELS,
4615 deps = [
4616 ":tables",
4617 "@FP16",
4618 "@pthreadpool",
4619 ],
4620)
4621
4622xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004623 name = "avx2_ukernels",
4624 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004625 gcc_copts = xnnpack_gcc_std_copts(),
4626 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004627 "-mfma",
4628 "-mavx2",
4629 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004630 msvc_copts = xnnpack_msvc_std_copts(),
4631 msvc_x86_32_copts = ["/arch:AVX2"],
4632 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004633 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004634 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004635 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004636 "@FP16",
4637 "@pthreadpool",
4638 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004639)
4640
4641xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004642 name = "avx2_ukernels_test_mode",
4643 hdrs = INTERNAL_HDRS,
4644 copts = [
4645 "-UNDEBUG",
4646 "-DXNN_TEST_MODE=1",
4647 ],
4648 gcc_copts = xnnpack_gcc_std_copts(),
4649 gcc_x86_copts = [
4650 "-mfma",
4651 "-mavx2",
4652 ],
4653 msvc_copts = xnnpack_msvc_std_copts(),
4654 msvc_x86_32_copts = ["/arch:AVX2"],
4655 msvc_x86_64_copts = ["/arch:AVX2"],
4656 x86_srcs = AVX2_UKERNELS,
4657 deps = [
4658 ":tables",
4659 "@FP16",
4660 "@pthreadpool",
4661 ],
4662)
4663
4664xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004665 name = "avx512f_ukernels",
4666 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004667 gcc_copts = xnnpack_gcc_std_copts(),
4668 gcc_x86_copts = ["-mavx512f"],
4669 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4670 msvc_copts = xnnpack_msvc_std_copts(),
4671 msvc_x86_32_copts = ["/arch:AVX512"],
4672 msvc_x86_64_copts = ["/arch:AVX512"],
4673 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004674 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004675 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004676 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004677 "@FP16",
4678 "@pthreadpool",
4679 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004680)
4681
4682xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004683 name = "avx512f_ukernels_test_mode",
4684 hdrs = INTERNAL_HDRS,
4685 copts = [
4686 "-UNDEBUG",
4687 "-DXNN_TEST_MODE=1",
4688 ],
4689 gcc_copts = xnnpack_gcc_std_copts(),
4690 gcc_x86_copts = ["-mavx512f"],
4691 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4692 msvc_copts = xnnpack_msvc_std_copts(),
4693 msvc_x86_32_copts = ["/arch:AVX512"],
4694 msvc_x86_64_copts = ["/arch:AVX512"],
4695 msys_copts = ["-fno-asynchronous-unwind-tables"],
4696 x86_srcs = AVX512F_UKERNELS,
4697 deps = [
4698 ":tables",
4699 "@FP16",
4700 "@pthreadpool",
4701 ],
4702)
4703
4704xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004705 name = "avx512skx_ukernels",
4706 hdrs = INTERNAL_HDRS,
4707 gcc_copts = xnnpack_gcc_std_copts(),
4708 gcc_x86_copts = [
4709 "-mavx512f",
4710 "-mavx512cd",
4711 "-mavx512bw",
4712 "-mavx512dq",
4713 "-mavx512vl",
4714 ],
4715 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4716 msvc_copts = xnnpack_msvc_std_copts(),
4717 msvc_x86_32_copts = ["/arch:AVX512"],
4718 msvc_x86_64_copts = ["/arch:AVX512"],
4719 msys_copts = ["-fno-asynchronous-unwind-tables"],
4720 x86_srcs = AVX512SKX_UKERNELS,
4721 deps = [
4722 ":tables",
4723 "@FP16",
4724 "@pthreadpool",
4725 ],
4726)
4727
4728xnnpack_cc_library(
4729 name = "avx512skx_ukernels_test_mode",
4730 hdrs = INTERNAL_HDRS,
4731 copts = [
4732 "-UNDEBUG",
4733 "-DXNN_TEST_MODE=1",
4734 ],
4735 gcc_copts = xnnpack_gcc_std_copts(),
4736 gcc_x86_copts = [
4737 "-mavx512f",
4738 "-mavx512cd",
4739 "-mavx512bw",
4740 "-mavx512dq",
4741 "-mavx512vl",
4742 ],
4743 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4744 msvc_copts = xnnpack_msvc_std_copts(),
4745 msvc_x86_32_copts = ["/arch:AVX512"],
4746 msvc_x86_64_copts = ["/arch:AVX512"],
4747 msys_copts = ["-fno-asynchronous-unwind-tables"],
4748 x86_srcs = AVX512SKX_UKERNELS,
4749 deps = [
4750 ":tables",
4751 "@FP16",
4752 "@pthreadpool",
4753 ],
4754)
4755
4756xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004757 name = "asm_ukernels",
4758 hdrs = ["src/xnnpack/assembly.h"],
4759 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004760 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004761 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004762 wasm_srcs = WASM32_ASM_UKERNELS,
4763 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004764)
4765
Marat Dukhan3b59de22020-06-03 20:15:19 -07004766xnnpack_cc_library(
4767 name = "logging_utils",
4768 srcs = LOGGING_SRCS,
4769 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4770 copts = LOGGING_COPTS + [
4771 "-Isrc",
4772 "-Iinclude",
4773 ] + select({
4774 ":debug_build": [],
4775 "//conditions:default": xnnpack_min_size_copts(),
4776 }),
4777 gcc_copts = xnnpack_gcc_std_copts(),
4778 msvc_copts = xnnpack_msvc_std_copts(),
4779 visibility = xnnpack_visibility(),
4780 deps = [
4781 "@FP16",
4782 "@clog",
4783 "@pthreadpool",
4784 ],
4785)
4786
Marat Dukhan08c4a432019-10-03 09:29:21 -07004787xnnpack_aggregate_library(
4788 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004789 aarch32_ios_deps = [
4790 ":neon_ukernels",
4791 ":neonfma_ukernels",
4792 ":neonv8_ukernels",
4793 ":asm_ukernels",
4794 ],
4795 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004796 ":neon_ukernels",
4797 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004798 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004799 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004800 ":asm_ukernels",
4801 ],
4802 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004803 ":neon_ukernels",
4804 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004805 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004806 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004807 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004808 ":asm_ukernels",
4809 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004810 generic_deps = [
4811 ":scalar_ukernels",
4812 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004813 wasm_deps = [
4814 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004815 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004816 ],
4817 wasmsimd_deps = [
4818 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004819 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004820 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004821 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004822 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004823 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004824 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004825 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004826 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004827 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004828 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004829 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004830 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004831 ],
4832)
4833
Marat Dukhan33fcf782020-05-24 14:27:15 -07004834xnnpack_aggregate_library(
4835 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004836 aarch32_ios_deps = [
4837 ":neon_ukernels_test_mode",
4838 ":neonfma_ukernels_test_mode",
4839 ":neonv8_ukernels_test_mode",
4840 ":asm_ukernels",
4841 ],
4842 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07004843 ":neon_ukernels_test_mode",
4844 ":neonfma_ukernels_test_mode",
4845 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004846 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004847 ":asm_ukernels",
4848 ],
4849 aarch64_deps = [
4850 ":neon_ukernels_test_mode",
4851 ":neonfma_ukernels_test_mode",
4852 ":neonv8_ukernels_test_mode",
4853 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004854 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004855 ":asm_ukernels",
4856 ],
4857 generic_deps = [
4858 ":scalar_ukernels_test_mode",
4859 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004860 wasm_deps = [
4861 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004862 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004863 ],
4864 wasmsimd_deps = [
4865 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004866 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004867 ],
4868 x86_deps = [
4869 ":sse2_ukernels_test_mode",
4870 ":ssse3_ukernels_test_mode",
4871 ":sse41_ukernels_test_mode",
4872 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004873 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004874 ":fma3_ukernels_test_mode",
4875 ":avx2_ukernels_test_mode",
4876 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004877 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004878 ],
4879)
4880
Marat Dukhan08c4a432019-10-03 09:29:21 -07004881xnnpack_cc_library(
4882 name = "im2col",
4883 srcs = ["src/im2col.c"],
4884 hdrs = [
4885 "src/xnnpack/common.h",
4886 "src/xnnpack/im2col.h",
4887 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004888 gcc_copts = xnnpack_gcc_std_copts(),
4889 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004890)
4891
4892xnnpack_cc_library(
4893 name = "indirection",
4894 srcs = ["src/indirection.c"],
4895 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004896 gcc_copts = xnnpack_gcc_std_copts(),
4897 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004898 deps = [
4899 "@FP16",
4900 "@FXdiv",
4901 "@pthreadpool",
4902 ],
4903)
4904
4905xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004906 name = "indirection_test_mode",
4907 srcs = ["src/indirection.c"],
4908 hdrs = INTERNAL_HDRS,
4909 copts = [
4910 "-UNDEBUG",
4911 "-DXNN_TEST_MODE=1",
4912 ],
4913 gcc_copts = xnnpack_gcc_std_copts(),
4914 msvc_copts = xnnpack_msvc_std_copts(),
4915 deps = [
4916 "@FP16",
4917 "@FXdiv",
4918 "@pthreadpool",
4919 ],
4920)
4921
4922xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07004923 name = "packing",
4924 srcs = ["src/packing.c"],
4925 hdrs = INTERNAL_HDRS,
4926 gcc_copts = xnnpack_gcc_std_copts(),
4927 msvc_copts = xnnpack_msvc_std_copts(),
4928 deps = [
4929 "@FP16",
4930 "@FXdiv",
4931 "@pthreadpool",
4932 ],
4933)
4934
4935xnnpack_cc_library(
4936 name = "packing_test_mode",
4937 srcs = ["src/packing.c"],
4938 hdrs = INTERNAL_HDRS,
4939 copts = [
4940 "-UNDEBUG",
4941 "-DXNN_TEST_MODE=1",
4942 ],
4943 gcc_copts = xnnpack_gcc_std_copts(),
4944 msvc_copts = xnnpack_msvc_std_copts(),
4945 deps = [
4946 "@FP16",
4947 "@FXdiv",
4948 "@pthreadpool",
4949 ],
4950)
4951
4952xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004953 name = "operator_run",
4954 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004955 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004956 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07004957 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4958 "//conditions:default": [],
4959 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004960 gcc_copts = xnnpack_gcc_std_copts(),
4961 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004962 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004963 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004964 "@FP16",
4965 "@FXdiv",
4966 "@clog",
4967 "@pthreadpool",
4968 ],
4969)
4970
Chao Mei6ddfc602020-05-13 22:29:36 -07004971xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004972 name = "operator_run_test_mode",
4973 srcs = ["src/operator-run.c"],
4974 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4975 copts = LOGGING_COPTS + [
4976 "-UNDEBUG",
4977 "-DXNN_TEST_MODE=1",
4978 ] + select({
4979 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4980 "//conditions:default": [],
4981 }),
4982 gcc_copts = xnnpack_gcc_std_copts(),
4983 msvc_copts = xnnpack_msvc_std_copts(),
4984 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004985 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004986 "@FP16",
4987 "@FXdiv",
4988 "@clog",
4989 "@pthreadpool",
4990 ],
4991)
4992
4993xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07004994 name = "memory_planner",
4995 srcs = ["src/memory-planner.c"],
4996 hdrs = INTERNAL_HDRS,
4997 defines = select({
4998 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
4999 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5000 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5001 }),
5002 gcc_copts = xnnpack_gcc_std_copts(),
5003 msvc_copts = xnnpack_msvc_std_copts(),
5004 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005005 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005006 "@pthreadpool",
5007 ],
5008)
5009
Marat Dukhan33fcf782020-05-24 14:27:15 -07005010xnnpack_cc_library(
5011 name = "memory_planner_test_mode",
5012 srcs = ["src/memory-planner.c"],
5013 hdrs = INTERNAL_HDRS,
5014 copts = [
5015 "-UNDEBUG",
5016 "-DXNN_TEST_MODE=1",
5017 ],
5018 defines = select({
5019 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5020 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5021 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5022 }),
5023 gcc_copts = xnnpack_gcc_std_copts(),
5024 msvc_copts = xnnpack_msvc_std_copts(),
5025 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005026 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005027 "@pthreadpool",
5028 ],
5029)
5030
Marat Dukhan08c4a432019-10-03 09:29:21 -07005031cc_library(
5032 name = "enable_assembly",
5033 defines = select({
5034 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5035 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005036 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005037 }),
5038)
5039
Marat Dukhan9de90e02020-06-18 16:04:12 -07005040cc_library(
5041 name = "enable_sparse",
5042 defines = select({
5043 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5044 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005045 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005046 }),
5047)
5048
Marat Dukhancf056b22019-10-07 10:26:29 -07005049xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005050 name = "operators",
5051 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005052 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005053 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005054 ],
5055 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005056 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005057 "-Isrc",
5058 "-Iinclude",
5059 ] + select({
5060 ":debug_build": [],
5061 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005062 }) + select({
5063 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5064 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005065 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005066 gcc_copts = xnnpack_gcc_std_copts(),
5067 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005068 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005069 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005070 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005071 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005072 "@FP16",
5073 "@FXdiv",
5074 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005075 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005076 ],
5077)
5078
Marat Dukhan10a38082020-04-17 03:58:35 -07005079xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005080 name = "operators_test_mode",
5081 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005082 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005083 "src/operator-delete.c",
5084 ],
5085 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5086 copts = LOGGING_COPTS + [
5087 "-Isrc",
5088 "-Iinclude",
5089 "-UNDEBUG",
5090 "-DXNN_TEST_MODE=1",
5091 ] + select({
5092 ":debug_build": [],
5093 "//conditions:default": xnnpack_min_size_copts(),
5094 }) + select({
5095 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5096 "//conditions:default": [],
5097 }),
5098 gcc_copts = xnnpack_gcc_std_copts(),
5099 msvc_copts = xnnpack_msvc_std_copts(),
5100 deps = [
5101 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005102 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005103 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005104 "@FP16",
5105 "@FXdiv",
5106 "@clog",
5107 "@pthreadpool",
5108 ],
5109)
5110
5111xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005112 name = "XNNPACK",
5113 srcs = [
5114 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005115 "src/runtime.c",
5116 "src/subgraph.c",
5117 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005118 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005119 hdrs = ["include/xnnpack.h"],
5120 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005121 "-Isrc",
5122 "-Iinclude",
5123 ] + select({
5124 ":debug_build": [],
5125 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005126 }) + select({
5127 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5128 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005129 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005130 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005131 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005132 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005133 visibility = xnnpack_visibility(),
5134 deps = [
5135 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005136 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005137 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005138 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005139 ":operator_run",
5140 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005141 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005142 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005143 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005144 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005145 ] + select({
5146 ":emscripten": [],
5147 "//conditions:default": ["@cpuinfo"],
5148 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005149)
5150
Marat Dukhan10a38082020-04-17 03:58:35 -07005151xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005152 name = "XNNPACK_test_mode",
5153 srcs = [
5154 "src/init.c",
5155 "src/runtime.c",
5156 "src/subgraph.c",
5157 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005158 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005159 hdrs = ["include/xnnpack.h"],
5160 copts = LOGGING_COPTS + [
5161 "-Isrc",
5162 "-Iinclude",
5163 "-UNDEBUG",
5164 "-DXNN_TEST_MODE=1",
5165 ] + select({
5166 ":debug_build": [],
5167 "//conditions:default": xnnpack_min_size_copts(),
5168 }) + select({
5169 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5170 "//conditions:default": [],
5171 }),
5172 gcc_copts = xnnpack_gcc_std_copts(),
5173 includes = ["include"],
5174 msvc_copts = xnnpack_msvc_std_copts(),
5175 visibility = xnnpack_visibility(),
5176 deps = [
5177 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005178 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005179 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005180 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005181 ":operator_run_test_mode",
5182 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005183 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005184 "@clog",
5185 "@FP16",
5186 "@pthreadpool",
5187 ] + select({
5188 ":emscripten": [],
5189 "//conditions:default": ["@cpuinfo"],
5190 }),
5191)
5192
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005193# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5194# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005195xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005196 name = "xnnpack_for_tflite",
5197 srcs = [
5198 "src/init.c",
5199 "src/runtime.c",
5200 "src/subgraph.c",
5201 "src/tensor.c",
5202 ] + SUBGRAPH_SRCS,
5203 hdrs = ["include/xnnpack.h"],
5204 copts = LOGGING_COPTS + [
5205 "-Isrc",
5206 "-Iinclude",
5207 ] + select({
5208 ":debug_build": [],
5209 "//conditions:default": xnnpack_min_size_copts(),
5210 }) + select({
5211 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5212 "//conditions:default": [],
5213 }),
5214 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005215 "XNN_NO_QU8_OPERATORS",
5216 "XNN_NO_U8_OPERATORS",
5217 "XNN_NO_X8_OPERATORS",
5218 "XNN_NO_F16_OPERATORS",
5219 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005220 ] + select({
5221 ":xnn_enable_qs8_explicit_true": [],
5222 ":xnn_enable_qs8_explicit_false": ["XNN_NO_QS8_OPERATORS"],
5223 "//conditions:default": ["XNN_NO_QS8_OPERATORS"],
5224 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005225 gcc_copts = xnnpack_gcc_std_copts(),
5226 includes = ["include"],
5227 msvc_copts = xnnpack_msvc_std_copts(),
5228 visibility = xnnpack_visibility(),
5229 deps = [
5230 ":enable_assembly",
5231 ":enable_sparse",
5232 ":logging_utils",
5233 ":memory_planner",
5234 ":operator_run",
5235 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005236 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005237 "@clog",
5238 "@FP16",
5239 "@pthreadpool",
5240 ] + select({
5241 ":emscripten": [],
5242 "//conditions:default": ["@cpuinfo"],
5243 }),
5244)
5245
5246# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5247# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5248xnnpack_cc_library(
5249 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005250 srcs = [
5251 "src/init.c",
5252 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005253 hdrs = ["include/xnnpack.h"],
5254 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005255 "-Isrc",
5256 "-Iinclude",
5257 ] + select({
5258 ":debug_build": [],
5259 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005260 }) + select({
5261 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5262 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005263 }),
5264 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005265 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005266 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005267 "XNN_NO_U8_OPERATORS",
5268 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005269 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005270 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005271 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005272 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005273 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005274 visibility = xnnpack_visibility(),
5275 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005276 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005277 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005278 ":operator_run",
5279 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005280 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005281 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005282 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005283 ] + select({
5284 ":emscripten": [],
5285 "//conditions:default": ["@cpuinfo"],
5286 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005287)
5288
Marat Dukhancf056b22019-10-07 10:26:29 -07005289xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005290 name = "bench_utils",
5291 srcs = ["bench/utils.cc"],
5292 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005293 deps = [
5294 "@com_google_benchmark//:benchmark",
5295 "@cpuinfo",
5296 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005297)
5298
Frank Barchard7e955972019-10-11 10:34:25 -07005299######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005300
5301xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005302 name = "qs8_gemm_bench",
5303 srcs = [
5304 "bench/gemm.h",
5305 "bench/qs8-gemm.cc",
5306 "src/xnnpack/AlignedAllocator.h",
5307 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005308 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5309 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005310)
5311
5312xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005313 name = "qs8_requantization_bench",
5314 srcs = [
5315 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005316 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005317 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005318 ] + MICROKERNEL_BENCHMARK_HDRS,
5319 deps = MICROKERNEL_BENCHMARK_DEPS,
5320)
5321
5322xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005323 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005324 srcs = [
5325 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005326 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005327 "src/xnnpack/AlignedAllocator.h",
5328 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005329 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005330 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005331)
5332
5333xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005334 name = "qu8_requantization_bench",
5335 srcs = [
5336 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005337 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005338 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005339 ] + MICROKERNEL_BENCHMARK_HDRS,
5340 deps = MICROKERNEL_BENCHMARK_DEPS,
5341)
5342
5343xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005344 name = "f16_igemm_bench",
5345 srcs = [
5346 "bench/f16-igemm.cc",
5347 "bench/conv.h",
5348 "bench/google/conv.h",
5349 "src/xnnpack/AlignedAllocator.h",
5350 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005351 deps = MICROKERNEL_BENCHMARK_DEPS + [
5352 ":indirection",
5353 ":packing",
5354 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005355)
5356
5357xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005358 name = "f16_gemm_bench",
5359 srcs = [
5360 "bench/f16-gemm.cc",
5361 "bench/gemm.h",
5362 "src/xnnpack/AlignedAllocator.h",
5363 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005364 deps = MICROKERNEL_BENCHMARK_DEPS + [
5365 ":packing",
5366 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005367)
5368
5369xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005370 name = "f16_spmm_bench",
5371 srcs = [
5372 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005373 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005374 "src/xnnpack/AlignedAllocator.h",
5375 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005376 deps = MICROKERNEL_BENCHMARK_DEPS,
5377)
5378
5379xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005380 name = "f16_vrelu_bench",
5381 srcs = [
5382 "bench/f16-vrelu.cc",
5383 "src/xnnpack/AlignedAllocator.h",
5384 ] + MICROKERNEL_BENCHMARK_HDRS,
5385 deps = MICROKERNEL_BENCHMARK_DEPS,
5386)
5387
5388xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005389 name = "f32_igemm_bench",
5390 srcs = [
5391 "bench/f32-igemm.cc",
5392 "bench/conv.h",
5393 "src/xnnpack/AlignedAllocator.h",
5394 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005395 deps = MICROKERNEL_BENCHMARK_DEPS + [
5396 ":indirection",
5397 ":packing",
5398 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005399)
5400
5401xnnpack_benchmark(
5402 name = "f32_conv_hwc_bench",
5403 srcs = [
5404 "bench/f32-conv-hwc.cc",
5405 "bench/dconv.h",
5406 "src/xnnpack/AlignedAllocator.h",
5407 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005408 deps = MICROKERNEL_BENCHMARK_DEPS + [
5409 ":packing",
5410 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005411)
5412
5413xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005414 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005415 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005416 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005417 "bench/dconv.h",
5418 "src/xnnpack/AlignedAllocator.h",
5419 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005420 deps = MICROKERNEL_BENCHMARK_DEPS + [
5421 ":packing",
5422 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005423)
5424
5425xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005426 name = "f16_dwconv_bench",
5427 srcs = [
5428 "bench/f16-dwconv.cc",
5429 "bench/dwconv.h",
5430 "bench/google/dwconv.h",
5431 "src/xnnpack/AlignedAllocator.h",
5432 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005433 deps = MICROKERNEL_BENCHMARK_DEPS + [
5434 ":indirection",
5435 ":packing",
5436 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005437)
5438
5439xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005440 name = "f32_dwconv_bench",
5441 srcs = [
5442 "bench/f32-dwconv.cc",
5443 "bench/dwconv.h",
5444 "src/xnnpack/AlignedAllocator.h",
5445 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005446 deps = MICROKERNEL_BENCHMARK_DEPS + [
5447 ":indirection",
5448 ":packing",
5449 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005450)
5451
5452xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005453 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005454 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005455 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005456 "bench/dwconv.h",
5457 "src/xnnpack/AlignedAllocator.h",
5458 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005459 deps = MICROKERNEL_BENCHMARK_DEPS + [
5460 ":indirection",
5461 ":packing",
5462 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005463)
5464
5465xnnpack_benchmark(
5466 name = "f32_gemm_bench",
5467 srcs = [
5468 "bench/f32-gemm.cc",
5469 "bench/gemm.h",
5470 "src/xnnpack/AlignedAllocator.h",
5471 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005472 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005473 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005474)
5475
5476xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005477 name = "f32_raddexpminusmax_bench",
5478 srcs = [
5479 "bench/f32-raddexpminusmax.cc",
5480 "src/xnnpack/AlignedAllocator.h",
5481 ] + MICROKERNEL_BENCHMARK_HDRS,
5482 deps = MICROKERNEL_BENCHMARK_DEPS,
5483)
5484
5485xnnpack_benchmark(
5486 name = "f32_raddextexp_bench",
5487 srcs = [
5488 "bench/f32-raddextexp.cc",
5489 "src/xnnpack/AlignedAllocator.h",
5490 ] + MICROKERNEL_BENCHMARK_HDRS,
5491 deps = MICROKERNEL_BENCHMARK_DEPS,
5492)
5493
5494xnnpack_benchmark(
5495 name = "f32_raddstoreexpminusmax_bench",
5496 srcs = [
5497 "bench/f32-raddstoreexpminusmax.cc",
5498 "src/xnnpack/AlignedAllocator.h",
5499 ] + MICROKERNEL_BENCHMARK_HDRS,
5500 deps = MICROKERNEL_BENCHMARK_DEPS,
5501)
5502
5503xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005504 name = "f32_rmax_bench",
5505 srcs = [
5506 "bench/f32-rmax.cc",
5507 "src/xnnpack/AlignedAllocator.h",
5508 ] + MICROKERNEL_BENCHMARK_HDRS,
5509 deps = MICROKERNEL_BENCHMARK_DEPS,
5510)
5511
5512xnnpack_benchmark(
5513 name = "f32_spmm_bench",
5514 srcs = [
5515 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005516 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005517 "src/xnnpack/AlignedAllocator.h",
5518 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005519 deps = MICROKERNEL_BENCHMARK_DEPS,
5520)
5521
5522xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005523 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005524 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005525 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005526 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005527 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005528 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005529)
5530
5531xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005532 name = "f32_velu_bench",
5533 srcs = [
5534 "bench/f32-velu.cc",
5535 "src/xnnpack/AlignedAllocator.h",
5536 ] + MICROKERNEL_BENCHMARK_HDRS,
5537 deps = MICROKERNEL_BENCHMARK_DEPS,
5538)
5539
5540xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005541 name = "f32_vhswish_bench",
5542 srcs = [
5543 "bench/f32-vhswish.cc",
5544 "src/xnnpack/AlignedAllocator.h",
5545 ] + MICROKERNEL_BENCHMARK_HDRS,
5546 deps = MICROKERNEL_BENCHMARK_DEPS,
5547)
5548
5549xnnpack_benchmark(
5550 name = "f32_vrelu_bench",
5551 srcs = [
5552 "bench/f32-vrelu.cc",
5553 "src/xnnpack/AlignedAllocator.h",
5554 ] + MICROKERNEL_BENCHMARK_HDRS,
5555 deps = MICROKERNEL_BENCHMARK_DEPS,
5556)
5557
5558xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005559 name = "f32_vscaleexpminusmax_bench",
5560 srcs = [
5561 "bench/f32-vscaleexpminusmax.cc",
5562 "src/xnnpack/AlignedAllocator.h",
5563 ] + MICROKERNEL_BENCHMARK_HDRS,
5564 deps = MICROKERNEL_BENCHMARK_DEPS,
5565)
5566
5567xnnpack_benchmark(
5568 name = "f32_vscaleextexp_bench",
5569 srcs = [
5570 "bench/f32-vscaleextexp.cc",
5571 "src/xnnpack/AlignedAllocator.h",
5572 ] + MICROKERNEL_BENCHMARK_HDRS,
5573 deps = MICROKERNEL_BENCHMARK_DEPS,
5574)
5575
5576xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005577 name = "f32_vsigmoid_bench",
5578 srcs = [
5579 "bench/f32-vsigmoid.cc",
5580 "src/xnnpack/AlignedAllocator.h",
5581 ] + MICROKERNEL_BENCHMARK_HDRS,
5582 deps = MICROKERNEL_BENCHMARK_DEPS,
5583)
5584
5585xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005586 name = "f32_vsqrt_bench",
5587 srcs = [
5588 "bench/f32-vsqrt.cc",
5589 "src/xnnpack/AlignedAllocator.h",
5590 ] + MICROKERNEL_BENCHMARK_HDRS,
5591 deps = MICROKERNEL_BENCHMARK_DEPS,
5592)
5593
5594xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005595 name = "f32_im2col_gemm_bench",
5596 srcs = [
5597 "bench/f32-im2col-gemm.cc",
5598 "bench/conv.h",
5599 "src/xnnpack/AlignedAllocator.h",
5600 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005601 deps = MICROKERNEL_BENCHMARK_DEPS + [
5602 ":im2col",
5603 ":packing",
5604 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005605)
5606
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005607xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005608 name = "rounding_bench",
5609 srcs = [
5610 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005611 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005612 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005613 ] + MICROKERNEL_BENCHMARK_HDRS,
5614 deps = MICROKERNEL_BENCHMARK_DEPS,
5615)
5616
Marat Dukhan08c4a432019-10-03 09:29:21 -07005617########################### Benchmarks for operators ###########################
5618
5619xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005620 name = "average_pooling_bench",
5621 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005622 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005623 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005624 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005625)
5626
5627xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005628 name = "bankers_rounding_bench",
5629 srcs = ["bench/bankers-rounding.cc"],
5630 copts = xnnpack_optional_tflite_copts(),
5631 tags = ["nowin32"],
5632 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5633)
5634
5635xnnpack_benchmark(
5636 name = "ceiling_bench",
5637 srcs = ["bench/ceiling.cc"],
5638 copts = xnnpack_optional_tflite_copts(),
5639 tags = ["nowin32"],
5640 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5641)
5642
5643xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005644 name = "channel_shuffle_bench",
5645 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005646 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005647)
5648
5649xnnpack_benchmark(
5650 name = "convolution_bench",
5651 srcs = ["bench/convolution.cc"],
5652 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005653 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005654 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005655)
5656
5657xnnpack_benchmark(
5658 name = "deconvolution_bench",
5659 srcs = ["bench/deconvolution.cc"],
5660 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005661 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005662 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005663)
5664
5665xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005666 name = "elu_bench",
5667 srcs = ["bench/elu.cc"],
5668 copts = xnnpack_optional_tflite_copts(),
5669 tags = ["nowin32"],
5670 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5671)
5672
5673xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005674 name = "floor_bench",
5675 srcs = ["bench/floor.cc"],
5676 copts = xnnpack_optional_tflite_copts(),
5677 tags = ["nowin32"],
5678 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5679)
5680
5681xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005682 name = "global_average_pooling_bench",
5683 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005684 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005685)
5686
5687xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005688 name = "hardswish_bench",
5689 srcs = ["bench/hardswish.cc"],
5690 copts = xnnpack_optional_tflite_copts(),
5691 tags = ["nowin32"],
5692 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5693)
5694
5695xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005696 name = "max_pooling_bench",
5697 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005698 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005699)
5700
5701xnnpack_benchmark(
5702 name = "sigmoid_bench",
5703 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005704 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005705 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005706 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005707)
5708
5709xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005710 name = "prelu_bench",
5711 srcs = ["bench/prelu.cc"],
5712 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005713 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005714 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005715)
5716
5717xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005718 name = "softmax_bench",
5719 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005720 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005721 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005722 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005723)
5724
Marat Dukhan87727142020-06-24 15:24:10 -07005725xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005726 name = "square_root_bench",
5727 srcs = ["bench/square-root.cc"],
5728 copts = xnnpack_optional_tflite_copts(),
5729 tags = ["nowin32"],
5730 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5731)
5732
5733xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005734 name = "truncation_bench",
5735 srcs = ["bench/truncation.cc"],
5736 deps = OPERATOR_BENCHMARK_DEPS,
5737)
5738
Marat Dukhanc068bb62019-10-04 13:24:39 -07005739############################# End-to-end benchmarks ############################
5740
5741cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005742 name = "fp32_mobilenet_v1",
5743 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005744 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005745 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005746 linkstatic = True,
5747 deps = [
5748 ":XNNPACK",
5749 "@pthreadpool",
5750 ],
5751)
5752
5753cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005754 name = "fp32_sparse_mobilenet_v1",
5755 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5756 hdrs = ["models/models.h"],
5757 copts = xnnpack_std_cxxopts(),
5758 linkstatic = True,
5759 deps = [
5760 ":XNNPACK",
5761 "@pthreadpool",
5762 ],
5763)
5764
5765cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005766 name = "fp16_mobilenet_v1",
5767 srcs = ["models/fp16-mobilenet-v1.cc"],
5768 hdrs = ["models/models.h"],
5769 copts = xnnpack_std_cxxopts(),
5770 linkstatic = True,
5771 deps = [
5772 ":XNNPACK",
5773 "@FP16",
5774 "@pthreadpool",
5775 ],
5776)
5777
5778cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005779 name = "qs8_mobilenet_v1",
5780 srcs = ["models/qs8-mobilenet-v1.cc"],
5781 hdrs = ["models/models.h"],
5782 copts = xnnpack_std_cxxopts(),
5783 linkstatic = True,
5784 deps = [
5785 ":XNNPACK",
5786 "@pthreadpool",
5787 ],
5788)
5789
5790cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07005791 name = "qs8_mobilenet_v2",
5792 srcs = ["models/qs8-mobilenet-v2.cc"],
5793 hdrs = ["models/models.h"],
5794 copts = xnnpack_std_cxxopts(),
5795 linkstatic = True,
5796 deps = [
5797 ":XNNPACK",
5798 "@pthreadpool",
5799 ],
5800)
5801
5802cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005803 name = "qu8_mobilenet_v1",
5804 srcs = ["models/qu8-mobilenet-v1.cc"],
5805 hdrs = ["models/models.h"],
5806 copts = xnnpack_std_cxxopts(),
5807 linkstatic = True,
5808 deps = [
5809 ":XNNPACK",
5810 "@pthreadpool",
5811 ],
5812)
5813
5814cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005815 name = "fp32_mobilenet_v2",
5816 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005817 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005818 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005819 linkstatic = True,
5820 deps = [
5821 ":XNNPACK",
5822 "@pthreadpool",
5823 ],
5824)
5825
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005826cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005827 name = "fp32_sparse_mobilenet_v2",
5828 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
5829 hdrs = ["models/models.h"],
5830 copts = xnnpack_std_cxxopts(),
5831 linkstatic = True,
5832 deps = [
5833 ":XNNPACK",
5834 "@pthreadpool",
5835 ],
5836)
5837
5838cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005839 name = "fp16_mobilenet_v2",
5840 srcs = ["models/fp16-mobilenet-v2.cc"],
5841 hdrs = ["models/models.h"],
5842 copts = xnnpack_std_cxxopts(),
5843 linkstatic = True,
5844 deps = [
5845 ":XNNPACK",
5846 "@FP16",
5847 "@pthreadpool",
5848 ],
5849)
5850
5851cc_library(
5852 name = "fp32_mobilenet_v3_large",
5853 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005854 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005855 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005856 linkstatic = True,
5857 deps = [
5858 ":XNNPACK",
5859 "@pthreadpool",
5860 ],
5861)
5862
5863cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005864 name = "fp32_sparse_mobilenet_v3_large",
5865 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
5866 hdrs = ["models/models.h"],
5867 copts = xnnpack_std_cxxopts(),
5868 linkstatic = True,
5869 deps = [
5870 ":XNNPACK",
5871 "@pthreadpool",
5872 ],
5873)
5874
5875cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005876 name = "fp16_mobilenet_v3_large",
5877 srcs = ["models/fp16-mobilenet-v3-large.cc"],
5878 hdrs = ["models/models.h"],
5879 copts = xnnpack_std_cxxopts(),
5880 linkstatic = True,
5881 deps = [
5882 ":XNNPACK",
5883 "@FP16",
5884 "@pthreadpool",
5885 ],
5886)
5887
5888cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005889 name = "fp32_mobilenet_v3_small",
5890 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005891 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005892 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005893 linkstatic = True,
5894 deps = [
5895 ":XNNPACK",
5896 "@pthreadpool",
5897 ],
5898)
5899
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005900cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005901 name = "fp32_sparse_mobilenet_v3_small",
5902 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
5903 hdrs = ["models/models.h"],
5904 copts = xnnpack_std_cxxopts(),
5905 linkstatic = True,
5906 deps = [
5907 ":XNNPACK",
5908 "@pthreadpool",
5909 ],
5910)
5911
5912cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005913 name = "fp16_mobilenet_v3_small",
5914 srcs = ["models/fp16-mobilenet-v3-small.cc"],
5915 hdrs = ["models/models.h"],
5916 copts = xnnpack_std_cxxopts(),
5917 linkstatic = True,
5918 deps = [
5919 ":XNNPACK",
5920 "@FP16",
5921 "@pthreadpool",
5922 ],
5923)
5924
Marat Dukhanc068bb62019-10-04 13:24:39 -07005925xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07005926 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005927 srcs = [
5928 "bench/f32-dwconv-e2e.cc",
5929 "bench/end2end.h",
5930 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07005931 deps = MICROKERNEL_BENCHMARK_DEPS + [
5932 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005933 ":fp32_mobilenet_v1",
5934 ":fp32_mobilenet_v2",
5935 ":fp32_mobilenet_v3_large",
5936 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07005937 ],
5938)
5939
5940xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07005941 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005942 srcs = [
5943 "bench/f32-gemm-e2e.cc",
5944 "bench/end2end.h",
5945 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07005946 deps = MICROKERNEL_BENCHMARK_DEPS + [
5947 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005948 ":fp32_mobilenet_v1",
5949 ":fp32_mobilenet_v2",
5950 ":fp32_mobilenet_v3_large",
5951 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07005952 ],
5953)
5954
5955xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08005956 name = "qs8_gemm_e2e_bench",
5957 srcs = [
5958 "bench/qs8-gemm-e2e.cc",
5959 "bench/end2end.h",
5960 ] + MICROKERNEL_BENCHMARK_HDRS,
5961 deps = MICROKERNEL_BENCHMARK_DEPS + [
5962 ":XNNPACK",
5963 ":qs8_mobilenet_v1",
5964 ":qs8_mobilenet_v2",
5965 ],
5966)
5967
5968xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07005969 name = "end2end_bench",
5970 srcs = ["bench/end2end.cc"],
5971 deps = [
5972 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07005973 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005974 ":fp16_mobilenet_v1",
5975 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005976 ":fp16_mobilenet_v3_large",
5977 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005978 ":fp32_mobilenet_v1",
5979 ":fp32_mobilenet_v2",
5980 ":fp32_mobilenet_v3_large",
5981 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08005982 ":fp32_sparse_mobilenet_v1",
5983 ":fp32_sparse_mobilenet_v2",
5984 ":fp32_sparse_mobilenet_v3_large",
5985 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005986 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07005987 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005988 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07005989 "@pthreadpool",
5990 ],
5991)
5992
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005993#################### Accuracy evaluation for math functions ####################
5994
5995xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08005996 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005997 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08005998 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005999 "src/xnnpack/AlignedAllocator.h",
6000 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006001 deps = ACCURACY_EVAL_DEPS + [
6002 ":bench_utils",
6003 "@cpuinfo",
6004 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006005)
6006
Marat Dukhan515c9772019-10-17 18:07:57 -07006007xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006008 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006009 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006010 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006011 "src/xnnpack/AlignedAllocator.h",
6012 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006013 deps = ACCURACY_EVAL_DEPS + [
6014 ":bench_utils",
6015 "@cpuinfo",
6016 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006017)
6018
Marat Dukhan98ba4412019-10-23 02:14:28 -07006019xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006020 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006021 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006022 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006023 "src/xnnpack/AlignedAllocator.h",
6024 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006025 deps = ACCURACY_EVAL_DEPS + [
6026 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006027 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006028 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006029)
6030
6031xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006032 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006033 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006034 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006035 "src/xnnpack/AlignedAllocator.h",
6036 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006037 deps = ACCURACY_EVAL_DEPS + [
6038 ":bench_utils",
6039 "@cpuinfo",
6040 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006041)
6042
Marat Dukhanf44f0222020-12-14 11:53:27 -08006043xnnpack_benchmark(
6044 name = "f32_sigmoid_ulp_eval",
6045 srcs = [
6046 "eval/f32-sigmoid-ulp.cc",
6047 "src/xnnpack/AlignedAllocator.h",
6048 ] + ACCURACY_EVAL_HDRS,
6049 deps = ACCURACY_EVAL_DEPS + [
6050 ":bench_utils",
6051 "@cpuinfo",
6052 ],
6053)
6054
6055xnnpack_benchmark(
6056 name = "f32_sqrt_ulp_eval",
6057 srcs = [
6058 "eval/f32-sqrt-ulp.cc",
6059 "src/xnnpack/AlignedAllocator.h",
6060 ] + ACCURACY_EVAL_HDRS,
6061 deps = ACCURACY_EVAL_DEPS + [
6062 ":bench_utils",
6063 "@cpuinfo",
6064 ],
6065)
6066
6067################### Accuracy verification for math functions ##################
6068
6069xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006070 name = "f32_exp_eval",
6071 srcs = [
6072 "eval/f32-exp.cc",
6073 "src/xnnpack/AlignedAllocator.h",
6074 "src/xnnpack/math-stubs.h",
6075 ] + MICROKERNEL_TEST_HDRS,
6076 automatic = False,
6077 deps = MICROKERNEL_TEST_DEPS,
6078)
6079
6080xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006081 name = "f32_expm1minus_eval",
6082 srcs = [
6083 "eval/f32-expm1minus.cc",
6084 "src/xnnpack/AlignedAllocator.h",
6085 "src/xnnpack/math-stubs.h",
6086 ] + MICROKERNEL_TEST_HDRS,
6087 automatic = False,
6088 deps = MICROKERNEL_TEST_DEPS,
6089)
6090
Marat Dukhan8853b822020-05-07 12:19:01 -07006091xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006092 name = "f32_expminus_eval",
6093 srcs = [
6094 "eval/f32-expminus.cc",
6095 "src/xnnpack/AlignedAllocator.h",
6096 "src/xnnpack/math-stubs.h",
6097 ] + MICROKERNEL_TEST_HDRS,
6098 automatic = False,
6099 deps = MICROKERNEL_TEST_DEPS,
6100)
6101
6102xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006103 name = "f32_roundne_eval",
6104 srcs = [
6105 "eval/f32-roundne.cc",
6106 "src/xnnpack/AlignedAllocator.h",
6107 "src/xnnpack/math-stubs.h",
6108 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006109 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006110 deps = MICROKERNEL_TEST_DEPS,
6111)
6112
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006113xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006114 name = "f32_roundd_eval",
6115 srcs = [
6116 "eval/f32-roundd.cc",
6117 "src/xnnpack/AlignedAllocator.h",
6118 "src/xnnpack/math-stubs.h",
6119 ] + MICROKERNEL_TEST_HDRS,
6120 automatic = False,
6121 deps = MICROKERNEL_TEST_DEPS,
6122)
6123
6124xnnpack_unit_test(
6125 name = "f32_roundu_eval",
6126 srcs = [
6127 "eval/f32-roundu.cc",
6128 "src/xnnpack/AlignedAllocator.h",
6129 "src/xnnpack/math-stubs.h",
6130 ] + MICROKERNEL_TEST_HDRS,
6131 automatic = False,
6132 deps = MICROKERNEL_TEST_DEPS,
6133)
6134
6135xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006136 name = "f32_roundz_eval",
6137 srcs = [
6138 "eval/f32-roundz.cc",
6139 "src/xnnpack/AlignedAllocator.h",
6140 "src/xnnpack/math-stubs.h",
6141 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006142 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006143 deps = MICROKERNEL_TEST_DEPS,
6144)
6145
Marat Dukhan08c4a432019-10-03 09:29:21 -07006146######################### Unit tests for micro-kernels #########################
6147
6148xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006149 name = "f16_dwconv_minmax_test",
6150 srcs = [
6151 "test/f16-dwconv-minmax.cc",
6152 "test/dwconv-microkernel-tester.h",
6153 "src/xnnpack/AlignedAllocator.h",
6154 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6155 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6156)
6157
6158xnnpack_unit_test(
6159 name = "f16_gavgpool_minmax_test",
6160 srcs = [
6161 "test/f16-gavgpool-minmax.cc",
6162 "test/gavgpool-microkernel-tester.h",
6163 "src/xnnpack/AlignedAllocator.h",
6164 ] + MICROKERNEL_TEST_HDRS,
6165 deps = MICROKERNEL_TEST_DEPS,
6166)
6167
6168xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006169 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006170 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006171 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006172 "test/gemm-microkernel-tester.h",
6173 "src/xnnpack/AlignedAllocator.h",
6174 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006175 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006176)
6177
6178xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006179 name = "f16_igemm_minmax_test",
6180 srcs = [
6181 "test/f16-igemm-minmax.cc",
6182 "test/gemm-microkernel-tester.h",
6183 "src/xnnpack/AlignedAllocator.h",
6184 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6185 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6186)
6187
6188xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006189 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006190 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006191 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006192 "test/spmm-microkernel-tester.h",
6193 "src/xnnpack/AlignedAllocator.h",
6194 ] + MICROKERNEL_TEST_HDRS,
6195 deps = MICROKERNEL_TEST_DEPS,
6196)
6197
6198xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006199 name = "f16_vadd_minmax_test",
6200 srcs = [
6201 "test/f16-vadd-minmax.cc",
6202 "test/vbinary-microkernel-tester.h",
6203 ] + MICROKERNEL_TEST_HDRS,
6204 deps = MICROKERNEL_TEST_DEPS,
6205)
6206
6207xnnpack_unit_test(
6208 name = "f16_vaddc_minmax_test",
6209 srcs = [
6210 "test/f16-vaddc-minmax.cc",
6211 "test/vbinaryc-microkernel-tester.h",
6212 ] + MICROKERNEL_TEST_HDRS,
6213 deps = MICROKERNEL_TEST_DEPS,
6214)
6215
6216xnnpack_unit_test(
6217 name = "f16_vclamp_test",
6218 srcs = [
6219 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006220 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006221 ] + MICROKERNEL_TEST_HDRS,
6222 deps = MICROKERNEL_TEST_DEPS,
6223)
6224
6225xnnpack_unit_test(
6226 name = "f16_vdiv_minmax_test",
6227 srcs = [
6228 "test/f16-vdiv-minmax.cc",
6229 "test/vbinary-microkernel-tester.h",
6230 ] + MICROKERNEL_TEST_HDRS,
6231 deps = MICROKERNEL_TEST_DEPS,
6232)
6233
6234xnnpack_unit_test(
6235 name = "f16_vdivc_minmax_test",
6236 srcs = [
6237 "test/f16-vdivc-minmax.cc",
6238 "test/vbinaryc-microkernel-tester.h",
6239 ] + MICROKERNEL_TEST_HDRS,
6240 deps = MICROKERNEL_TEST_DEPS,
6241)
6242
6243xnnpack_unit_test(
6244 name = "f16_vrdivc_minmax_test",
6245 srcs = [
6246 "test/f16-vrdivc-minmax.cc",
6247 "test/vbinaryc-microkernel-tester.h",
6248 ] + MICROKERNEL_TEST_HDRS,
6249 deps = MICROKERNEL_TEST_DEPS,
6250)
6251
6252xnnpack_unit_test(
6253 name = "f16_vhswish_test",
6254 srcs = [
6255 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006256 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006257 ] + MICROKERNEL_TEST_HDRS,
6258 deps = MICROKERNEL_TEST_DEPS,
6259)
6260
6261xnnpack_unit_test(
6262 name = "f16_vmax_test",
6263 srcs = [
6264 "test/f16-vmax.cc",
6265 "test/vbinary-microkernel-tester.h",
6266 ] + MICROKERNEL_TEST_HDRS,
6267 deps = MICROKERNEL_TEST_DEPS,
6268)
6269
6270xnnpack_unit_test(
6271 name = "f16_vmaxc_test",
6272 srcs = [
6273 "test/f16-vmaxc.cc",
6274 "test/vbinaryc-microkernel-tester.h",
6275 ] + MICROKERNEL_TEST_HDRS,
6276 deps = MICROKERNEL_TEST_DEPS,
6277)
6278
6279xnnpack_unit_test(
6280 name = "f16_vmin_test",
6281 srcs = [
6282 "test/f16-vmin.cc",
6283 "test/vbinary-microkernel-tester.h",
6284 ] + MICROKERNEL_TEST_HDRS,
6285 deps = MICROKERNEL_TEST_DEPS,
6286)
6287
6288xnnpack_unit_test(
6289 name = "f16_vminc_test",
6290 srcs = [
6291 "test/f16-vminc.cc",
6292 "test/vbinaryc-microkernel-tester.h",
6293 ] + MICROKERNEL_TEST_HDRS,
6294 deps = MICROKERNEL_TEST_DEPS,
6295)
6296
6297xnnpack_unit_test(
6298 name = "f16_vmul_minmax_test",
6299 srcs = [
6300 "test/f16-vmul-minmax.cc",
6301 "test/vbinary-microkernel-tester.h",
6302 ] + MICROKERNEL_TEST_HDRS,
6303 deps = MICROKERNEL_TEST_DEPS,
6304)
6305
6306xnnpack_unit_test(
6307 name = "f16_vmulc_minmax_test",
6308 srcs = [
6309 "test/f16-vmulc-minmax.cc",
6310 "test/vbinaryc-microkernel-tester.h",
6311 ] + MICROKERNEL_TEST_HDRS,
6312 deps = MICROKERNEL_TEST_DEPS,
6313)
6314
6315xnnpack_unit_test(
6316 name = "f16_vmulcaddc_minmax_test",
6317 srcs = [
6318 "test/f16-vmulcaddc-minmax.cc",
6319 "test/vmulcaddc-microkernel-tester.h",
6320 "src/xnnpack/AlignedAllocator.h",
6321 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6322 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6323)
6324
6325xnnpack_unit_test(
6326 name = "f16_vsub_minmax_test",
6327 srcs = [
6328 "test/f16-vsub-minmax.cc",
6329 "test/vbinary-microkernel-tester.h",
6330 ] + MICROKERNEL_TEST_HDRS,
6331 deps = MICROKERNEL_TEST_DEPS,
6332)
6333
6334xnnpack_unit_test(
6335 name = "f16_vsubc_minmax_test",
6336 srcs = [
6337 "test/f16-vsubc-minmax.cc",
6338 "test/vbinaryc-microkernel-tester.h",
6339 ] + MICROKERNEL_TEST_HDRS,
6340 deps = MICROKERNEL_TEST_DEPS,
6341)
6342
6343xnnpack_unit_test(
6344 name = "f16_vrsubc_minmax_test",
6345 srcs = [
6346 "test/f16-vrsubc-minmax.cc",
6347 "test/vbinaryc-microkernel-tester.h",
6348 ] + MICROKERNEL_TEST_HDRS,
6349 deps = MICROKERNEL_TEST_DEPS,
6350)
6351
6352xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006353 name = "f32_argmaxpool_test",
6354 srcs = [
6355 "test/f32-argmaxpool.cc",
6356 "test/argmaxpool-microkernel-tester.h",
6357 "src/xnnpack/AlignedAllocator.h",
6358 ] + MICROKERNEL_TEST_HDRS,
6359 deps = MICROKERNEL_TEST_DEPS,
6360)
6361
6362xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006363 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006364 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006365 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006366 "test/avgpool-microkernel-tester.h",
6367 "src/xnnpack/AlignedAllocator.h",
6368 ] + MICROKERNEL_TEST_HDRS,
6369 deps = MICROKERNEL_TEST_DEPS,
6370)
6371
6372xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006373 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006374 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006375 "test/f32-ibilinear.cc",
6376 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006377 "src/xnnpack/AlignedAllocator.h",
6378 ] + MICROKERNEL_TEST_HDRS,
6379 deps = MICROKERNEL_TEST_DEPS,
6380)
6381
6382xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006383 name = "f32_ibilinear_chw_test",
6384 srcs = [
6385 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006386 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006387 "src/xnnpack/AlignedAllocator.h",
6388 ] + MICROKERNEL_TEST_HDRS,
6389 deps = MICROKERNEL_TEST_DEPS,
6390)
6391
6392xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006393 name = "f32_igemm_test",
6394 srcs = [
6395 "test/f32-igemm.cc",
6396 "test/gemm-microkernel-tester.h",
6397 "src/xnnpack/AlignedAllocator.h",
6398 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006399 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006400)
6401
6402xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006403 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006404 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006405 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006406 "test/gemm-microkernel-tester.h",
6407 "src/xnnpack/AlignedAllocator.h",
6408 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006409 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006410)
6411
6412xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006413 name = "f32_igemm_minmax_test",
6414 srcs = [
6415 "test/f32-igemm-minmax.cc",
6416 "test/gemm-microkernel-tester.h",
6417 "src/xnnpack/AlignedAllocator.h",
6418 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006419 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006420)
6421
6422xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006423 name = "f32_conv_hwc_test",
6424 srcs = [
6425 "test/f32-conv-hwc.cc",
6426 "test/conv-hwc-microkernel-tester.h",
6427 "src/xnnpack/AlignedAllocator.h",
6428 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006429 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006430)
6431
6432xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006433 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006434 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006435 "test/f32-conv-hwc2chw.cc",
6436 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006437 "src/xnnpack/AlignedAllocator.h",
6438 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006439 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006440)
6441
6442xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006443 name = "f32_dwconv_test",
6444 srcs = [
6445 "test/f32-dwconv.cc",
6446 "test/dwconv-microkernel-tester.h",
6447 "src/xnnpack/AlignedAllocator.h",
6448 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006449 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006450)
6451
6452xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006453 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006454 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006455 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006456 "test/dwconv-microkernel-tester.h",
6457 "src/xnnpack/AlignedAllocator.h",
6458 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006459 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006460)
6461
6462xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006463 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006464 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006465 "test/f32-dwconv2d-chw.cc",
6466 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006467 "src/xnnpack/AlignedAllocator.h",
6468 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006469 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006470)
6471
6472xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006473 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006474 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006475 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006476 "test/gavgpool-microkernel-tester.h",
6477 "src/xnnpack/AlignedAllocator.h",
6478 ] + MICROKERNEL_TEST_HDRS,
6479 deps = MICROKERNEL_TEST_DEPS,
6480)
6481
6482xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006483 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006484 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006485 "test/f32-gavgpool-cw.cc",
6486 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006487 "src/xnnpack/AlignedAllocator.h",
6488 ] + MICROKERNEL_TEST_HDRS,
6489 deps = MICROKERNEL_TEST_DEPS,
6490)
6491
6492xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006493 name = "f32_gemm_test",
6494 srcs = [
6495 "test/f32-gemm.cc",
6496 "test/gemm-microkernel-tester.h",
6497 "src/xnnpack/AlignedAllocator.h",
6498 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006499 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006500)
6501
6502xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006503 name = "f32_gemm_relu_test",
6504 srcs = [
6505 "test/f32-gemm-relu.cc",
6506 "test/gemm-microkernel-tester.h",
6507 "src/xnnpack/AlignedAllocator.h",
6508 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006509 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006510)
6511
6512xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006513 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006514 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006515 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006516 "test/gemm-microkernel-tester.h",
6517 "src/xnnpack/AlignedAllocator.h",
6518 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006519 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006520)
6521
6522xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006523 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006524 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006525 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006526 "test/gemm-microkernel-tester.h",
6527 "src/xnnpack/AlignedAllocator.h",
6528 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006529 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006530)
6531
6532xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006533 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006534 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006535 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006536 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006537 ] + MICROKERNEL_TEST_HDRS,
6538 deps = MICROKERNEL_TEST_DEPS,
6539)
6540
6541xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006542 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006543 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006544 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006545 "test/maxpool-microkernel-tester.h",
6546 ] + MICROKERNEL_TEST_HDRS,
6547 deps = MICROKERNEL_TEST_DEPS,
6548)
6549
6550xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006551 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006552 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006553 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006554 "test/avgpool-microkernel-tester.h",
6555 "src/xnnpack/AlignedAllocator.h",
6556 ] + MICROKERNEL_TEST_HDRS,
6557 deps = MICROKERNEL_TEST_DEPS,
6558)
6559
6560xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006561 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006562 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006563 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006564 "test/gemm-microkernel-tester.h",
6565 "src/xnnpack/AlignedAllocator.h",
6566 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006567 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006568)
6569
6570xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006571 name = "f16_prelu_test",
6572 srcs = [
6573 "test/f16-prelu.cc",
6574 "test/prelu-microkernel-tester.h",
6575 "src/xnnpack/AlignedAllocator.h",
6576 ] + MICROKERNEL_TEST_HDRS,
6577 deps = MICROKERNEL_TEST_DEPS,
6578)
6579
6580xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006581 name = "f32_prelu_test",
6582 srcs = [
6583 "test/f32-prelu.cc",
6584 "test/prelu-microkernel-tester.h",
6585 "src/xnnpack/AlignedAllocator.h",
6586 ] + MICROKERNEL_TEST_HDRS,
6587 deps = MICROKERNEL_TEST_DEPS,
6588)
6589
6590xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006591 name = "f32_raddexpminusmax_test",
6592 srcs = [
6593 "test/f32-raddexpminusmax.cc",
6594 "test/raddexpminusmax-microkernel-tester.h",
6595 ] + MICROKERNEL_TEST_HDRS,
6596 deps = MICROKERNEL_TEST_DEPS,
6597)
6598
6599xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006600 name = "f32_raddextexp_test",
6601 srcs = [
6602 "test/f32-raddextexp.cc",
6603 "test/raddextexp-microkernel-tester.h",
6604 ] + MICROKERNEL_TEST_HDRS,
6605 deps = MICROKERNEL_TEST_DEPS,
6606)
6607
6608xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006609 name = "f32_raddstoreexpminusmax_test",
6610 srcs = [
6611 "test/f32-raddstoreexpminusmax.cc",
6612 "test/raddstoreexpminusmax-microkernel-tester.h",
6613 ] + MICROKERNEL_TEST_HDRS,
6614 deps = MICROKERNEL_TEST_DEPS,
6615)
6616
6617xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006618 name = "f32_rmax_test",
6619 srcs = [
6620 "test/f32-rmax.cc",
6621 "test/rmax-microkernel-tester.h",
6622 ] + MICROKERNEL_TEST_HDRS,
6623 deps = MICROKERNEL_TEST_DEPS,
6624)
6625
6626xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006627 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006628 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006629 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006630 "test/spmm-microkernel-tester.h",
6631 "src/xnnpack/AlignedAllocator.h",
6632 ] + MICROKERNEL_TEST_HDRS,
6633 deps = MICROKERNEL_TEST_DEPS,
6634)
6635
6636xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006637 name = "f32_vabs_test",
6638 srcs = [
6639 "test/f32-vabs.cc",
6640 "test/vunary-microkernel-tester.h",
6641 ] + MICROKERNEL_TEST_HDRS,
6642 deps = MICROKERNEL_TEST_DEPS,
6643)
6644
6645xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006646 name = "f32_vadd_test",
6647 srcs = [
6648 "test/f32-vadd.cc",
6649 "test/vbinary-microkernel-tester.h",
6650 ] + MICROKERNEL_TEST_HDRS,
6651 deps = MICROKERNEL_TEST_DEPS,
6652)
6653
6654xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006655 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006656 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006657 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006658 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006659 ] + MICROKERNEL_TEST_HDRS,
6660 deps = MICROKERNEL_TEST_DEPS,
6661)
6662
6663xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006664 name = "f32_vadd_relu_test",
6665 srcs = [
6666 "test/f32-vadd-relu.cc",
6667 "test/vbinary-microkernel-tester.h",
6668 ] + MICROKERNEL_TEST_HDRS,
6669 deps = MICROKERNEL_TEST_DEPS,
6670)
6671
6672xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006673 name = "f32_vaddc_test",
6674 srcs = [
6675 "test/f32-vaddc.cc",
6676 "test/vbinaryc-microkernel-tester.h",
6677 ] + MICROKERNEL_TEST_HDRS,
6678 deps = MICROKERNEL_TEST_DEPS,
6679)
6680
6681xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006682 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006683 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006684 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006685 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006686 ] + MICROKERNEL_TEST_HDRS,
6687 deps = MICROKERNEL_TEST_DEPS,
6688)
6689
6690xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006691 name = "f32_vaddc_relu_test",
6692 srcs = [
6693 "test/f32-vaddc-relu.cc",
6694 "test/vbinaryc-microkernel-tester.h",
6695 ] + MICROKERNEL_TEST_HDRS,
6696 deps = MICROKERNEL_TEST_DEPS,
6697)
6698
6699xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006700 name = "f32_vclamp_test",
6701 srcs = [
6702 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006703 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006704 ] + MICROKERNEL_TEST_HDRS,
6705 deps = MICROKERNEL_TEST_DEPS,
6706)
6707
6708xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006709 name = "f32_vdiv_test",
6710 srcs = [
6711 "test/f32-vdiv.cc",
6712 "test/vbinary-microkernel-tester.h",
6713 ] + MICROKERNEL_TEST_HDRS,
6714 deps = MICROKERNEL_TEST_DEPS,
6715)
6716
6717xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006718 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006719 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006720 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006721 "test/vbinary-microkernel-tester.h",
6722 ] + MICROKERNEL_TEST_HDRS,
6723 deps = MICROKERNEL_TEST_DEPS,
6724)
6725
6726xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006727 name = "f32_vdiv_relu_test",
6728 srcs = [
6729 "test/f32-vdiv-relu.cc",
6730 "test/vbinary-microkernel-tester.h",
6731 ] + MICROKERNEL_TEST_HDRS,
6732 deps = MICROKERNEL_TEST_DEPS,
6733)
6734
6735xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006736 name = "f32_vdivc_test",
6737 srcs = [
6738 "test/f32-vdivc.cc",
6739 "test/vbinaryc-microkernel-tester.h",
6740 ] + MICROKERNEL_TEST_HDRS,
6741 deps = MICROKERNEL_TEST_DEPS,
6742)
6743
6744xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006745 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006746 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006747 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006748 "test/vbinaryc-microkernel-tester.h",
6749 ] + MICROKERNEL_TEST_HDRS,
6750 deps = MICROKERNEL_TEST_DEPS,
6751)
6752
6753xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006754 name = "f32_vdivc_relu_test",
6755 srcs = [
6756 "test/f32-vdivc-relu.cc",
6757 "test/vbinaryc-microkernel-tester.h",
6758 ] + MICROKERNEL_TEST_HDRS,
6759 deps = MICROKERNEL_TEST_DEPS,
6760)
6761
6762xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006763 name = "f32_vrdivc_test",
6764 srcs = [
6765 "test/f32-vrdivc.cc",
6766 "test/vbinaryc-microkernel-tester.h",
6767 ] + MICROKERNEL_TEST_HDRS,
6768 deps = MICROKERNEL_TEST_DEPS,
6769)
6770
6771xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006772 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006773 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006774 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006775 "test/vbinaryc-microkernel-tester.h",
6776 ] + MICROKERNEL_TEST_HDRS,
6777 deps = MICROKERNEL_TEST_DEPS,
6778)
6779
6780xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006781 name = "f32_vrdivc_relu_test",
6782 srcs = [
6783 "test/f32-vrdivc-relu.cc",
6784 "test/vbinaryc-microkernel-tester.h",
6785 ] + MICROKERNEL_TEST_HDRS,
6786 deps = MICROKERNEL_TEST_DEPS,
6787)
6788
6789xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006790 name = "f32_velu_test",
6791 srcs = [
6792 "test/f32-velu.cc",
6793 "test/vunary-microkernel-tester.h",
6794 ] + MICROKERNEL_TEST_HDRS,
6795 deps = MICROKERNEL_TEST_DEPS,
6796)
6797
6798xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08006799 name = "f32_vmax_test",
6800 srcs = [
6801 "test/f32-vmax.cc",
6802 "test/vbinary-microkernel-tester.h",
6803 ] + MICROKERNEL_TEST_HDRS,
6804 deps = MICROKERNEL_TEST_DEPS,
6805)
6806
6807xnnpack_unit_test(
6808 name = "f32_vmaxc_test",
6809 srcs = [
6810 "test/f32-vmaxc.cc",
6811 "test/vbinaryc-microkernel-tester.h",
6812 ] + MICROKERNEL_TEST_HDRS,
6813 deps = MICROKERNEL_TEST_DEPS,
6814)
6815
6816xnnpack_unit_test(
6817 name = "f32_vmin_test",
6818 srcs = [
6819 "test/f32-vmin.cc",
6820 "test/vbinary-microkernel-tester.h",
6821 ] + MICROKERNEL_TEST_HDRS,
6822 deps = MICROKERNEL_TEST_DEPS,
6823)
6824
6825xnnpack_unit_test(
6826 name = "f32_vminc_test",
6827 srcs = [
6828 "test/f32-vminc.cc",
6829 "test/vbinaryc-microkernel-tester.h",
6830 ] + MICROKERNEL_TEST_HDRS,
6831 deps = MICROKERNEL_TEST_DEPS,
6832)
6833
6834xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006835 name = "f32_vmul_test",
6836 srcs = [
6837 "test/f32-vmul.cc",
6838 "test/vbinary-microkernel-tester.h",
6839 ] + MICROKERNEL_TEST_HDRS,
6840 deps = MICROKERNEL_TEST_DEPS,
6841)
6842
6843xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006844 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006845 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006846 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006847 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006848 ] + MICROKERNEL_TEST_HDRS,
6849 deps = MICROKERNEL_TEST_DEPS,
6850)
6851
6852xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006853 name = "f32_vmul_relu_test",
6854 srcs = [
6855 "test/f32-vmul-relu.cc",
6856 "test/vbinary-microkernel-tester.h",
6857 ] + MICROKERNEL_TEST_HDRS,
6858 deps = MICROKERNEL_TEST_DEPS,
6859)
6860
6861xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006862 name = "f32_vmulc_test",
6863 srcs = [
6864 "test/f32-vmulc.cc",
6865 "test/vbinaryc-microkernel-tester.h",
6866 ] + MICROKERNEL_TEST_HDRS,
6867 deps = MICROKERNEL_TEST_DEPS,
6868)
6869
6870xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006871 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006872 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006873 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006874 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006875 ] + MICROKERNEL_TEST_HDRS,
6876 deps = MICROKERNEL_TEST_DEPS,
6877)
6878
6879xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006880 name = "f32_vmulc_relu_test",
6881 srcs = [
6882 "test/f32-vmulc-relu.cc",
6883 "test/vbinaryc-microkernel-tester.h",
6884 ] + MICROKERNEL_TEST_HDRS,
6885 deps = MICROKERNEL_TEST_DEPS,
6886)
6887
6888xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006889 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006890 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006891 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006892 "test/vmulcaddc-microkernel-tester.h",
6893 "src/xnnpack/AlignedAllocator.h",
6894 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006895 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006896)
6897
6898xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07006899 name = "f32_vlrelu_test",
6900 srcs = [
6901 "test/f32-vlrelu.cc",
6902 "test/vunary-microkernel-tester.h",
6903 ] + MICROKERNEL_TEST_HDRS,
6904 deps = MICROKERNEL_TEST_DEPS,
6905)
6906
6907xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006908 name = "f32_vneg_test",
6909 srcs = [
6910 "test/f32-vneg.cc",
6911 "test/vunary-microkernel-tester.h",
6912 ] + MICROKERNEL_TEST_HDRS,
6913 deps = MICROKERNEL_TEST_DEPS,
6914)
6915
6916xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006917 name = "f32_vrelu_test",
6918 srcs = [
6919 "test/f32-vrelu.cc",
6920 "test/vunary-microkernel-tester.h",
6921 ] + MICROKERNEL_TEST_HDRS,
6922 deps = MICROKERNEL_TEST_DEPS,
6923)
6924
6925xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07006926 name = "f32_vrndne_test",
6927 srcs = [
6928 "test/f32-vrndne.cc",
6929 "test/vunary-microkernel-tester.h",
6930 ] + MICROKERNEL_TEST_HDRS,
6931 deps = MICROKERNEL_TEST_DEPS,
6932)
6933
6934xnnpack_unit_test(
6935 name = "f32_vrndz_test",
6936 srcs = [
6937 "test/f32-vrndz.cc",
6938 "test/vunary-microkernel-tester.h",
6939 ] + MICROKERNEL_TEST_HDRS,
6940 deps = MICROKERNEL_TEST_DEPS,
6941)
6942
6943xnnpack_unit_test(
6944 name = "f32_vrndu_test",
6945 srcs = [
6946 "test/f32-vrndu.cc",
6947 "test/vunary-microkernel-tester.h",
6948 ] + MICROKERNEL_TEST_HDRS,
6949 deps = MICROKERNEL_TEST_DEPS,
6950)
6951
6952xnnpack_unit_test(
6953 name = "f32_vrndd_test",
6954 srcs = [
6955 "test/f32-vrndd.cc",
6956 "test/vunary-microkernel-tester.h",
6957 ] + MICROKERNEL_TEST_HDRS,
6958 deps = MICROKERNEL_TEST_DEPS,
6959)
6960
6961xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07006962 name = "f32_vscale_test",
6963 srcs = [
6964 "test/f32-vscale.cc",
6965 "test/vscale-microkernel-tester.h",
6966 ] + MICROKERNEL_TEST_HDRS,
6967 deps = MICROKERNEL_TEST_DEPS,
6968)
6969
6970xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006971 name = "f32_vscaleexpminusmax_test",
6972 srcs = [
6973 "test/f32-vscaleexpminusmax.cc",
6974 "test/vscaleexpminusmax-microkernel-tester.h",
6975 ] + MICROKERNEL_TEST_HDRS,
6976 deps = MICROKERNEL_TEST_DEPS,
6977)
6978
6979xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006980 name = "f32_vscaleextexp_test",
6981 srcs = [
6982 "test/f32-vscaleextexp.cc",
6983 "test/vscaleextexp-microkernel-tester.h",
6984 ] + MICROKERNEL_TEST_HDRS,
6985 deps = MICROKERNEL_TEST_DEPS,
6986)
6987
6988xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006989 name = "f32_vsigmoid_test",
6990 srcs = [
6991 "test/f32-vsigmoid.cc",
6992 "test/vunary-microkernel-tester.h",
6993 ] + MICROKERNEL_TEST_HDRS,
6994 deps = MICROKERNEL_TEST_DEPS,
6995)
6996
6997xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006998 name = "f32_vsqr_test",
6999 srcs = [
7000 "test/f32-vsqr.cc",
7001 "test/vunary-microkernel-tester.h",
7002 ] + MICROKERNEL_TEST_HDRS,
7003 deps = MICROKERNEL_TEST_DEPS,
7004)
7005
7006xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007007 name = "f32_vsqrdiff_test",
7008 srcs = [
7009 "test/f32-vsqrdiff.cc",
7010 "test/vbinary-microkernel-tester.h",
7011 ] + MICROKERNEL_TEST_HDRS,
7012 deps = MICROKERNEL_TEST_DEPS,
7013)
7014
7015xnnpack_unit_test(
7016 name = "f32_vsqrdiffc_test",
7017 srcs = [
7018 "test/f32-vsqrdiffc.cc",
7019 "test/vbinaryc-microkernel-tester.h",
7020 ] + MICROKERNEL_TEST_HDRS,
7021 deps = MICROKERNEL_TEST_DEPS,
7022)
7023
7024xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007025 name = "f32_vsqrt_test",
7026 srcs = [
7027 "test/f32-vsqrt.cc",
7028 "test/vunary-microkernel-tester.h",
7029 ] + MICROKERNEL_TEST_HDRS,
7030 deps = MICROKERNEL_TEST_DEPS,
7031)
7032
7033xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007034 name = "f32_vsub_test",
7035 srcs = [
7036 "test/f32-vsub.cc",
7037 "test/vbinary-microkernel-tester.h",
7038 ] + MICROKERNEL_TEST_HDRS,
7039 deps = MICROKERNEL_TEST_DEPS,
7040)
7041
7042xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007043 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007044 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007045 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007046 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007047 ] + MICROKERNEL_TEST_HDRS,
7048 deps = MICROKERNEL_TEST_DEPS,
7049)
7050
7051xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007052 name = "f32_vsub_relu_test",
7053 srcs = [
7054 "test/f32-vsub-relu.cc",
7055 "test/vbinary-microkernel-tester.h",
7056 ] + MICROKERNEL_TEST_HDRS,
7057 deps = MICROKERNEL_TEST_DEPS,
7058)
7059
7060xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007061 name = "f32_vsubc_test",
7062 srcs = [
7063 "test/f32-vsubc.cc",
7064 "test/vbinaryc-microkernel-tester.h",
7065 ] + MICROKERNEL_TEST_HDRS,
7066 deps = MICROKERNEL_TEST_DEPS,
7067)
7068
7069xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007070 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007071 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007072 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007073 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007074 ] + MICROKERNEL_TEST_HDRS,
7075 deps = MICROKERNEL_TEST_DEPS,
7076)
7077
7078xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007079 name = "f32_vsubc_relu_test",
7080 srcs = [
7081 "test/f32-vsubc-relu.cc",
7082 "test/vbinaryc-microkernel-tester.h",
7083 ] + MICROKERNEL_TEST_HDRS,
7084 deps = MICROKERNEL_TEST_DEPS,
7085)
7086
7087xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007088 name = "f32_vrsubc_test",
7089 srcs = [
7090 "test/f32-vrsubc.cc",
7091 "test/vbinaryc-microkernel-tester.h",
7092 ] + MICROKERNEL_TEST_HDRS,
7093 deps = MICROKERNEL_TEST_DEPS,
7094)
7095
7096xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007097 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007098 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007099 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007100 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007101 ] + MICROKERNEL_TEST_HDRS,
7102 deps = MICROKERNEL_TEST_DEPS,
7103)
7104
7105xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007106 name = "f32_vrsubc_relu_test",
7107 srcs = [
7108 "test/f32-vrsubc-relu.cc",
7109 "test/vbinaryc-microkernel-tester.h",
7110 ] + MICROKERNEL_TEST_HDRS,
7111 deps = MICROKERNEL_TEST_DEPS,
7112)
7113
7114xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007115 name = "qc8_gemm_minmax_fp32_test",
7116 timeout = "moderate",
7117 srcs = [
7118 "test/qc8-gemm-minmax-fp32.cc",
7119 "test/gemm-microkernel-tester.h",
7120 "src/xnnpack/AlignedAllocator.h",
7121 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7122 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7123)
7124
7125xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007126 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007127 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007128 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007129 "test/dwconv-microkernel-tester.h",
7130 "src/xnnpack/AlignedAllocator.h",
7131 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7132 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7133)
7134
7135xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007136 name = "qs8_dwconv_minmax_fp32_test",
7137 srcs = [
7138 "test/qs8-dwconv-minmax-fp32.cc",
7139 "test/dwconv-microkernel-tester.h",
7140 "src/xnnpack/AlignedAllocator.h",
7141 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7142 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7143)
7144
7145xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007146 name = "qs8_gavgpool_minmax_test",
7147 srcs = [
7148 "test/qs8-gavgpool-minmax.cc",
7149 "test/gavgpool-microkernel-tester.h",
7150 "src/xnnpack/AlignedAllocator.h",
7151 ] + MICROKERNEL_TEST_HDRS,
7152 deps = MICROKERNEL_TEST_DEPS,
7153)
7154
7155xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007156 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007157 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007158 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007159 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007160 "test/gemm-microkernel-tester.h",
7161 "src/xnnpack/AlignedAllocator.h",
7162 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7163 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7164)
7165
7166xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007167 name = "qs8_gemm_minmax_fp32_test",
7168 timeout = "moderate",
7169 srcs = [
7170 "test/qs8-gemm-minmax-fp32.cc",
7171 "test/gemm-microkernel-tester.h",
7172 "src/xnnpack/AlignedAllocator.h",
7173 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7174 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7175)
7176
7177xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007178 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007179 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007180 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007181 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007182 "test/gemm-microkernel-tester.h",
7183 "src/xnnpack/AlignedAllocator.h",
7184 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7185 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7186)
7187
7188xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007189 name = "qs8_igemm_minmax_fp32_test",
7190 timeout = "moderate",
7191 srcs = [
7192 "test/qs8-igemm-minmax-fp32.cc",
7193 "test/gemm-microkernel-tester.h",
7194 "src/xnnpack/AlignedAllocator.h",
7195 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7196 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7197)
7198
7199xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007200 name = "qs8_requantization_test",
7201 srcs = [
7202 "src/xnnpack/requantization-stubs.h",
7203 "test/qs8-requantization.cc",
7204 "test/requantization-tester.h",
7205 ] + MICROKERNEL_TEST_HDRS,
7206 deps = MICROKERNEL_TEST_DEPS,
7207)
7208
7209xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007210 name = "qs8_vadd_minmax_test",
7211 srcs = [
7212 "test/qs8-vadd-minmax.cc",
7213 "test/vadd-microkernel-tester.h",
7214 ] + MICROKERNEL_TEST_HDRS,
7215 deps = MICROKERNEL_TEST_DEPS,
7216)
7217
7218xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007219 name = "qs8_vaddc_minmax_test",
7220 srcs = [
7221 "test/qs8-vaddc-minmax.cc",
7222 "test/vaddc-microkernel-tester.h",
7223 ] + MICROKERNEL_TEST_HDRS,
7224 deps = MICROKERNEL_TEST_DEPS,
7225)
7226
7227xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007228 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007229 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007230 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007231 "test/avgpool-microkernel-tester.h",
7232 "src/xnnpack/AlignedAllocator.h",
7233 ] + MICROKERNEL_TEST_HDRS,
7234 deps = MICROKERNEL_TEST_DEPS,
7235)
7236
7237xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007238 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007239 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007240 "test/qu8-dwconv-minmax.cc",
7241 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007242 "src/xnnpack/AlignedAllocator.h",
7243 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007244 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007245)
7246
7247xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007248 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007249 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007250 "test/qu8-igemm-minmax.cc",
7251 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007252 "src/xnnpack/AlignedAllocator.h",
7253 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007254 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007255)
7256
7257xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007258 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007259 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007260 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007261 "test/gavgpool-microkernel-tester.h",
7262 "src/xnnpack/AlignedAllocator.h",
7263 ] + MICROKERNEL_TEST_HDRS,
7264 deps = MICROKERNEL_TEST_DEPS,
7265)
7266
7267xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007268 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007269 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007270 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007271 "test/gemm-microkernel-tester.h",
7272 "src/xnnpack/AlignedAllocator.h",
7273 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007274 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007275)
7276
7277xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007278 name = "qu8_requantization_test",
7279 srcs = [
7280 "src/xnnpack/requantization-stubs.h",
7281 "test/qu8-requantization.cc",
7282 "test/requantization-tester.h",
7283 ] + MICROKERNEL_TEST_HDRS,
7284 deps = MICROKERNEL_TEST_DEPS,
7285)
7286
7287xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007288 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007289 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007290 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007291 "test/vadd-microkernel-tester.h",
7292 ] + MICROKERNEL_TEST_HDRS,
7293 deps = MICROKERNEL_TEST_DEPS,
7294)
7295
7296xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007297 name = "u8_lut32norm_test",
7298 srcs = [
7299 "test/u8-lut32norm.cc",
7300 "test/lut-norm-microkernel-tester.h",
7301 ] + MICROKERNEL_TEST_HDRS,
7302 deps = MICROKERNEL_TEST_DEPS,
7303)
7304
7305xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007306 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007307 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007308 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007309 "test/maxpool-microkernel-tester.h",
7310 ] + MICROKERNEL_TEST_HDRS,
7311 deps = MICROKERNEL_TEST_DEPS,
7312)
7313
7314xnnpack_unit_test(
7315 name = "u8_rmax_test",
7316 srcs = [
7317 "test/u8-rmax.cc",
7318 "test/rmax-microkernel-tester.h",
7319 ] + MICROKERNEL_TEST_HDRS,
7320 deps = MICROKERNEL_TEST_DEPS,
7321)
7322
7323xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007324 name = "u8_vclamp_test",
7325 srcs = [
7326 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007327 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007328 ] + MICROKERNEL_TEST_HDRS,
7329 deps = MICROKERNEL_TEST_DEPS,
7330)
7331
7332xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007333 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007334 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007335 "test/x32-depthtospace2d-chw2hwc.cc",
7336 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007337 ] + MICROKERNEL_TEST_HDRS,
7338 deps = MICROKERNEL_TEST_DEPS,
7339)
7340
7341xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007342 name = "x32_fill_test",
7343 srcs = [
7344 "test/x32-fill.cc",
7345 "test/fill-microkernel-tester.h",
7346 ] + MICROKERNEL_TEST_HDRS,
7347 deps = MICROKERNEL_TEST_DEPS,
7348)
7349
7350xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007351 name = "x32_packx_test",
7352 srcs = [
7353 "test/x32-packx.cc",
7354 "test/pack-microkernel-tester.h",
7355 "src/xnnpack/AlignedAllocator.h",
7356 ] + MICROKERNEL_TEST_HDRS,
7357 deps = MICROKERNEL_TEST_DEPS,
7358)
7359
7360xnnpack_unit_test(
7361 name = "x32_pad_test",
7362 srcs = [
7363 "test/x32-pad.cc",
7364 "test/pad-microkernel-tester.h",
7365 ] + MICROKERNEL_TEST_HDRS,
7366 deps = MICROKERNEL_TEST_DEPS,
7367)
7368
7369xnnpack_unit_test(
7370 name = "x32_unpool_test",
7371 srcs = [
7372 "test/x32-unpool.cc",
7373 "test/unpool-microkernel-tester.h",
7374 ] + MICROKERNEL_TEST_HDRS,
7375 deps = MICROKERNEL_TEST_DEPS,
7376)
7377
7378xnnpack_unit_test(
7379 name = "x32_zip_test",
7380 srcs = [
7381 "test/x32-zip.cc",
7382 "test/zip-microkernel-tester.h",
7383 ] + MICROKERNEL_TEST_HDRS,
7384 deps = MICROKERNEL_TEST_DEPS,
7385)
7386
7387xnnpack_unit_test(
7388 name = "x8_lut_test",
7389 srcs = [
7390 "test/x8-lut.cc",
7391 "test/lut-microkernel-tester.h",
7392 ] + MICROKERNEL_TEST_HDRS,
7393 deps = MICROKERNEL_TEST_DEPS,
7394)
7395
7396xnnpack_unit_test(
7397 name = "x8_zip_test",
7398 srcs = [
7399 "test/x8-zip.cc",
7400 "test/zip-microkernel-tester.h",
7401 ] + MICROKERNEL_TEST_HDRS,
7402 deps = MICROKERNEL_TEST_DEPS,
7403)
7404
Marat Dukhan20c3b922020-03-10 03:45:06 -07007405########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007406
7407xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007408 name = "operator_size_test",
7409 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007410 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007411)
7412
Marat Dukhan20c3b922020-03-10 03:45:06 -07007413xnnpack_binary(
7414 name = "subgraph_size_test",
7415 srcs = ["test/subgraph-size.c"],
7416 deps = [":XNNPACK"],
7417)
7418
7419########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007420
7421xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007422 name = "abs_nc_test",
7423 srcs = [
7424 "test/abs-nc.cc",
7425 "test/abs-operator-tester.h",
7426 ],
7427 deps = OPERATOR_TEST_DEPS,
7428)
7429
7430xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007431 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007432 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007433 srcs = [
7434 "test/add-nd.cc",
7435 "test/binary-elementwise-operator-tester.h",
7436 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007437 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007438)
7439
7440xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007441 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007442 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007443 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007444 "test/argmax-pooling-operator-tester.h",
7445 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007446 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007447)
7448
7449xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007450 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007451 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007452 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007453 "test/average-pooling-operator-tester.h",
7454 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007455 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007456)
7457
7458xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007459 name = "bankers_rounding_nc_test",
7460 srcs = [
7461 "test/bankers-rounding-nc.cc",
7462 "test/bankers-rounding-operator-tester.h",
7463 ],
7464 deps = OPERATOR_TEST_DEPS,
7465)
7466
7467xnnpack_unit_test(
7468 name = "ceiling_nc_test",
7469 srcs = [
7470 "test/ceiling-nc.cc",
7471 "test/ceiling-operator-tester.h",
7472 ],
7473 deps = OPERATOR_TEST_DEPS,
7474)
7475
7476xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007477 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007478 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007479 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007480 "test/channel-shuffle-operator-tester.h",
7481 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007482 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007483)
7484
7485xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007486 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007487 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007488 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007489 "test/clamp-operator-tester.h",
7490 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007491 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007492)
7493
7494xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007495 name = "constant_pad_nd_test",
7496 srcs = [
7497 "test/constant-pad-nd.cc",
7498 "test/constant-pad-operator-tester.h",
7499 ],
7500 deps = OPERATOR_TEST_DEPS,
7501)
7502
7503xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007504 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007505 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007506 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007507 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007508 "test/convolution-operator-tester.h",
7509 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007510 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007511)
7512
7513xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007514 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007515 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007516 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007517 "test/convolution-nchw.cc",
7518 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007519 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007520 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007521)
7522
7523xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007524 name = "copy_nc_test",
7525 srcs = [
7526 "test/copy-nc.cc",
7527 "test/copy-operator-tester.h",
7528 ],
7529 deps = OPERATOR_TEST_DEPS,
7530)
7531
7532xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007533 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007534 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007535 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007536 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007537 "test/deconvolution-operator-tester.h",
7538 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007539 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007540)
7541
7542xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007543 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007544 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007545 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007546 "test/depth-to-space-operator-tester.h",
7547 ] + OPERATOR_TEST_PARAMS_HDRS,
7548 deps = OPERATOR_TEST_DEPS,
7549)
7550
7551xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007552 name = "depth_to_space_nhwc_test",
7553 srcs = [
7554 "test/depth-to-space-nhwc.cc",
7555 "test/depth-to-space-operator-tester.h",
7556 ] + OPERATOR_TEST_PARAMS_HDRS,
7557 deps = OPERATOR_TEST_DEPS,
7558)
7559
7560xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007561 name = "divide_nd_test",
7562 srcs = [
7563 "test/binary-elementwise-operator-tester.h",
7564 "test/divide-nd.cc",
7565 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007566 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007567)
7568
7569xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007570 name = "elu_nc_test",
7571 srcs = [
7572 "test/elu-nc.cc",
7573 "test/elu-operator-tester.h",
7574 ],
7575 deps = OPERATOR_TEST_DEPS,
7576)
7577
7578xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007579 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007580 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007581 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007582 "test/fully-connected-operator-tester.h",
7583 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007584 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007585)
7586
7587xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007588 name = "floor_nc_test",
7589 srcs = [
7590 "test/floor-nc.cc",
7591 "test/floor-operator-tester.h",
7592 ],
7593 deps = OPERATOR_TEST_DEPS,
7594)
7595
7596xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007597 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007598 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007599 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007600 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007601 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007602 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007603)
7604
7605xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007606 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007607 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007608 "test/global-average-pooling-ncw.cc",
7609 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007610 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007611 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007612)
7613
7614xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007615 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007616 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007617 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007618 "test/hardswish-operator-tester.h",
7619 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007620 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007621)
7622
7623xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007624 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007625 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007626 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007627 "test/leaky-relu-operator-tester.h",
7628 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007629 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007630)
7631
7632xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007633 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007634 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007635 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007636 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007637 "test/max-pooling-operator-tester.h",
7638 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007639 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007640)
7641
7642xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007643 name = "maximum_nd_test",
7644 srcs = [
7645 "test/binary-elementwise-operator-tester.h",
7646 "test/maximum-nd.cc",
7647 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007648 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007649)
7650
7651xnnpack_unit_test(
7652 name = "minimum_nd_test",
7653 srcs = [
7654 "test/binary-elementwise-operator-tester.h",
7655 "test/minimum-nd.cc",
7656 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007657 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007658)
7659
7660xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007661 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007662 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007663 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007664 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007665 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007666 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007667)
7668
7669xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007670 name = "negate_nc_test",
7671 srcs = [
7672 "test/negate-nc.cc",
7673 "test/negate-operator-tester.h",
7674 ],
7675 deps = OPERATOR_TEST_DEPS,
7676)
7677
7678xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007679 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007680 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007681 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007682 "test/prelu-operator-tester.h",
7683 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007684 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007685)
7686
7687xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007688 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007689 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007690 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007691 "test/resize-bilinear-operator-tester.h",
7692 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007693 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007694)
7695
7696xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007697 name = "resize_bilinear_nchw_test",
7698 srcs = [
7699 "test/resize-bilinear-nchw.cc",
7700 "test/resize-bilinear-operator-tester.h",
7701 ] + OPERATOR_TEST_PARAMS_HDRS,
7702 deps = OPERATOR_TEST_DEPS,
7703)
7704
7705xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007706 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007707 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007708 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007709 "test/sigmoid-operator-tester.h",
7710 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007711 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007712)
7713
7714xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007715 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007716 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007717 "test/softmax-nc.cc",
7718 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007719 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007720 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007721)
7722
7723xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007724 name = "square_nc_test",
7725 srcs = [
7726 "test/square-nc.cc",
7727 "test/square-operator-tester.h",
7728 ],
7729 deps = OPERATOR_TEST_DEPS,
7730)
7731
7732xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007733 name = "square_root_nc_test",
7734 srcs = [
7735 "test/square-root-nc.cc",
7736 "test/square-root-operator-tester.h",
7737 ],
7738 deps = OPERATOR_TEST_DEPS,
7739)
7740
7741xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007742 name = "squared_difference_nd_test",
7743 srcs = [
7744 "test/binary-elementwise-operator-tester.h",
7745 "test/squared-difference-nd.cc",
7746 ],
7747 deps = OPERATOR_TEST_DEPS,
7748)
7749
7750xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007751 name = "subtract_nd_test",
7752 srcs = [
7753 "test/binary-elementwise-operator-tester.h",
7754 "test/subtract-nd.cc",
7755 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007756 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007757)
7758
7759xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007760 name = "truncation_nc_test",
7761 srcs = [
7762 "test/truncation-nc.cc",
7763 "test/truncation-operator-tester.h",
7764 ],
7765 deps = OPERATOR_TEST_DEPS,
7766)
7767
7768xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007769 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007770 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007771 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007772 "test/unpooling-operator-tester.h",
7773 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007774 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007775)
7776
Chao Mei6ddfc602020-05-13 22:29:36 -07007777############################### Misc unit tests ###############################
7778
7779xnnpack_unit_test(
7780 name = "memory_planner_test",
7781 srcs = [
7782 "test/memory-planner-test.cc",
7783 ],
7784 deps = [
7785 ":XNNPACK",
7786 ":memory_planner",
7787 ],
7788)
7789
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07007790xnnpack_unit_test(
7791 name = "subgraph_nchw_test",
7792 srcs = [
7793 "src/xnnpack/subgraph.h",
7794 "test/subgraph-nchw.cc",
7795 "test/subgraph-tester.h",
7796 ],
7797 deps = [
7798 ":XNNPACK",
7799 ],
7800)
7801
Marat Dukhan08c4a432019-10-03 09:29:21 -07007802############################# Build configurations #############################
7803
Marat Dukhanb8642352019-10-30 15:43:02 -07007804# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07007805config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007806 name = "xnn_enable_assembly_explicit_true",
7807 define_values = {"xnn_enable_assembly": "true"},
7808)
7809
7810# Disables usage of assembly kernels.
7811config_setting(
7812 name = "xnn_enable_assembly_explicit_false",
7813 define_values = {"xnn_enable_assembly": "false"},
7814)
7815
Marat Dukhan9de90e02020-06-18 16:04:12 -07007816# Enables usage of sparse inference.
7817config_setting(
7818 name = "xnn_enable_sparse_explicit_true",
7819 define_values = {"xnn_enable_sparse": "true"},
7820)
7821
7822# Disables usage of sparse inference.
7823config_setting(
7824 name = "xnn_enable_sparse_explicit_false",
7825 define_values = {"xnn_enable_sparse": "false"},
7826)
7827
Marat Dukhan05702cf2020-03-26 15:41:33 -07007828# Disables usage of HMP-aware optimizations.
7829config_setting(
7830 name = "xnn_enable_hmp_explicit_false",
7831 define_values = {"xnn_enable_hmp": "false"},
7832)
7833
Chao Mei6ddfc602020-05-13 22:29:36 -07007834# Enable usage of optimized memory allocation
7835config_setting(
7836 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07007837 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007838)
7839
7840# Disable usage of optimized memory allocation
7841config_setting(
7842 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07007843 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007844)
7845
Marat Dukhanb939cdb2021-03-30 18:51:51 -07007846# Enable QS8 inference in TFLite-specific version
7847config_setting(
7848 name = "xnn_enable_qs8_explicit_true",
7849 define_values = {"xnn_enable_qs8": "true"},
7850)
7851
7852# Disable QS8 inference in TFLite-specific version
7853config_setting(
7854 name = "xnn_enable_qs8_explicit_false",
7855 define_values = {"xnn_enable_qs8": "false"},
7856)
7857
Marat Dukhanb8642352019-10-30 15:43:02 -07007858# Builds with -c dbg
7859config_setting(
7860 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007861 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07007862 "compilation_mode": "dbg",
7863 },
7864)
7865
7866# Builds with -c opt
7867config_setting(
7868 name = "optimized_build",
7869 values = {
7870 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007871 },
7872)
7873
7874config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007875 name = "linux_k8",
7876 values = {"cpu": "k8"},
7877)
7878
7879config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007880 name = "linux_arm",
7881 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07007882)
7883
7884config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07007885 name = "linux_armeabi",
7886 values = {"cpu": "armeabi"},
7887)
7888
7889config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07007890 name = "linux_armhf",
7891 values = {"cpu": "armhf"},
7892)
7893
7894config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07007895 name = "linux_armv7a",
7896 values = {"cpu": "armv7a"},
7897)
7898
7899config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007900 name = "linux_aarch64",
7901 values = {"cpu": "aarch64"},
7902)
7903
7904config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007905 name = "android",
7906 values = {"crosstool_top": "//external:android/crosstool"},
7907)
7908
7909config_setting(
7910 name = "android_armv7",
7911 values = {
7912 "crosstool_top": "//external:android/crosstool",
7913 "cpu": "armeabi-v7a",
7914 },
7915)
7916
7917config_setting(
7918 name = "android_arm64",
7919 values = {
7920 "crosstool_top": "//external:android/crosstool",
7921 "cpu": "arm64-v8a",
7922 },
7923)
7924
7925config_setting(
7926 name = "android_x86",
7927 values = {
7928 "crosstool_top": "//external:android/crosstool",
7929 "cpu": "x86",
7930 },
7931)
7932
7933config_setting(
7934 name = "android_x86_64",
7935 values = {
7936 "crosstool_top": "//external:android/crosstool",
7937 "cpu": "x86_64",
7938 },
7939)
7940
7941config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007942 name = "windows_x86_64",
7943 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007944)
7945
7946config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007947 name = "windows_x86_64_clang",
7948 values = {
7949 "compiler": "clang-cl",
7950 "cpu": "x64_windows",
7951 },
7952)
7953
7954config_setting(
7955 name = "windows_x86_64_mingw",
7956 values = {
7957 "compiler": "mingw-gcc",
7958 "cpu": "x64_windows",
7959 },
7960)
7961
7962config_setting(
7963 name = "windows_x86_64_msys",
7964 values = {
7965 "compiler": "msys-gcc",
7966 "cpu": "x64_windows",
7967 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007968)
7969
7970config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07007971 name = "macos_x86_64",
7972 values = {
7973 "apple_platform_type": "macos",
7974 "cpu": "darwin",
7975 },
7976)
7977
7978config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01007979 name = "macos_arm64",
7980 values = {
7981 "apple_platform_type": "macos",
7982 "cpu": "darwin_arm64",
7983 },
7984)
7985
7986config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007987 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007988 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07007989)
7990
7991config_setting(
7992 name = "emscripten_wasm",
7993 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07007994 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007995 "cpu": "wasm",
7996 },
7997)
7998
7999config_setting(
8000 name = "emscripten_wasmsimd",
8001 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008002 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008003 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008004 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008005 },
8006)
8007
8008config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008009 name = "ios_armv7",
8010 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008011 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008012 "cpu": "ios_armv7",
8013 },
8014)
8015
8016config_setting(
8017 name = "ios_arm64",
8018 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008019 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008020 "cpu": "ios_arm64",
8021 },
8022)
8023
8024config_setting(
8025 name = "ios_arm64e",
8026 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008027 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008028 "cpu": "ios_arm64e",
8029 },
8030)
8031
8032config_setting(
8033 name = "ios_x86",
8034 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008035 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008036 "cpu": "ios_i386",
8037 },
8038)
8039
8040config_setting(
8041 name = "ios_x86_64",
8042 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008043 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008044 "cpu": "ios_x86_64",
8045 },
8046)
8047
8048config_setting(
8049 name = "watchos_armv7k",
8050 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008051 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008052 "cpu": "watchos_armv7k",
8053 },
8054)
8055
8056config_setting(
8057 name = "watchos_arm64_32",
8058 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008059 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008060 "cpu": "watchos_arm64_32",
8061 },
8062)
8063
8064config_setting(
8065 name = "watchos_x86",
8066 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008067 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008068 "cpu": "watchos_i386",
8069 },
8070)
8071
8072config_setting(
8073 name = "watchos_x86_64",
8074 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008075 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008076 "cpu": "watchos_x86_64",
8077 },
8078)
8079
8080config_setting(
8081 name = "tvos_arm64",
8082 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008083 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008084 "cpu": "tvos_arm64",
8085 },
8086)
8087
8088config_setting(
8089 name = "tvos_x86_64",
8090 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008091 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008092 "cpu": "tvos_x86_64",
8093 },
8094)