blob: 05b480fae27d17ebbecf94538702db5f148de9fb [file] [log] [blame]
Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
Ariel Levkovich24da0012018-04-05 18:53:27 +030095 MLX5_CMD_OP_ALLOC_MEMIC = 0x205,
96 MLX5_CMD_OP_DEALLOC_MEMIC = 0x206,
Eli Cohend29b7962014-10-02 12:19:43 +030097 MLX5_CMD_OP_CREATE_EQ = 0x301,
98 MLX5_CMD_OP_DESTROY_EQ = 0x302,
99 MLX5_CMD_OP_QUERY_EQ = 0x303,
100 MLX5_CMD_OP_GEN_EQE = 0x304,
101 MLX5_CMD_OP_CREATE_CQ = 0x400,
102 MLX5_CMD_OP_DESTROY_CQ = 0x401,
103 MLX5_CMD_OP_QUERY_CQ = 0x402,
104 MLX5_CMD_OP_MODIFY_CQ = 0x403,
105 MLX5_CMD_OP_CREATE_QP = 0x500,
106 MLX5_CMD_OP_DESTROY_QP = 0x501,
107 MLX5_CMD_OP_RST2INIT_QP = 0x502,
108 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
109 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
110 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
111 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
112 MLX5_CMD_OP_2ERR_QP = 0x507,
113 MLX5_CMD_OP_2RST_QP = 0x50a,
114 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300115 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300116 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
117 MLX5_CMD_OP_CREATE_PSV = 0x600,
118 MLX5_CMD_OP_DESTROY_PSV = 0x601,
119 MLX5_CMD_OP_CREATE_SRQ = 0x700,
120 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
121 MLX5_CMD_OP_QUERY_SRQ = 0x702,
122 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300123 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
124 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
125 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
126 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300127 MLX5_CMD_OP_CREATE_DCT = 0x710,
128 MLX5_CMD_OP_DESTROY_DCT = 0x711,
129 MLX5_CMD_OP_DRAIN_DCT = 0x712,
130 MLX5_CMD_OP_QUERY_DCT = 0x713,
131 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300132 MLX5_CMD_OP_CREATE_XRQ = 0x717,
133 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
134 MLX5_CMD_OP_QUERY_XRQ = 0x719,
135 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300136 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
137 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
138 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
139 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
140 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
141 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300143 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300144 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
145 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
146 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
147 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200148 MLX5_CMD_OP_QUERY_VNIC_ENV = 0x76f,
Eli Cohend29b7962014-10-02 12:19:43 +0300149 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
150 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
151 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
152 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200153 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300154 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300155 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
156 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
157 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
158 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
159 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
160 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300161 MLX5_CMD_OP_ALLOC_PD = 0x800,
162 MLX5_CMD_OP_DEALLOC_PD = 0x801,
163 MLX5_CMD_OP_ALLOC_UAR = 0x802,
164 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
165 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
166 MLX5_CMD_OP_ACCESS_REG = 0x805,
167 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300168 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300169 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
170 MLX5_CMD_OP_MAD_IFC = 0x50d,
171 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
172 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
173 MLX5_CMD_OP_NOP = 0x80d,
174 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
175 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300176 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
177 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
178 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
179 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
180 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
181 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
182 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
183 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
184 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
185 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
186 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
187 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200188 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
189 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300190 MLX5_CMD_OP_CREATE_LAG = 0x840,
191 MLX5_CMD_OP_MODIFY_LAG = 0x841,
192 MLX5_CMD_OP_QUERY_LAG = 0x842,
193 MLX5_CMD_OP_DESTROY_LAG = 0x843,
194 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
195 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300196 MLX5_CMD_OP_CREATE_TIR = 0x900,
197 MLX5_CMD_OP_MODIFY_TIR = 0x901,
198 MLX5_CMD_OP_DESTROY_TIR = 0x902,
199 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300200 MLX5_CMD_OP_CREATE_SQ = 0x904,
201 MLX5_CMD_OP_MODIFY_SQ = 0x905,
202 MLX5_CMD_OP_DESTROY_SQ = 0x906,
203 MLX5_CMD_OP_QUERY_SQ = 0x907,
204 MLX5_CMD_OP_CREATE_RQ = 0x908,
205 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300206 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300207 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
208 MLX5_CMD_OP_QUERY_RQ = 0x90b,
209 MLX5_CMD_OP_CREATE_RMP = 0x90c,
210 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
211 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
212 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300213 MLX5_CMD_OP_CREATE_TIS = 0x912,
214 MLX5_CMD_OP_MODIFY_TIS = 0x913,
215 MLX5_CMD_OP_DESTROY_TIS = 0x914,
216 MLX5_CMD_OP_QUERY_TIS = 0x915,
217 MLX5_CMD_OP_CREATE_RQT = 0x916,
218 MLX5_CMD_OP_MODIFY_RQT = 0x917,
219 MLX5_CMD_OP_DESTROY_RQT = 0x918,
220 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200221 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300222 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
223 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
224 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
225 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
226 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
227 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
228 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
229 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200230 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000231 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
232 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
233 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300234 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300235 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
236 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200237 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
238 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300239 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
240 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
241 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
242 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
243 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300244 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300245};
246
247struct mlx5_ifc_flow_table_fields_supported_bits {
248 u8 outer_dmac[0x1];
249 u8 outer_smac[0x1];
250 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300251 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300252 u8 outer_first_prio[0x1];
253 u8 outer_first_cfi[0x1];
254 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300255 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300256 u8 outer_second_prio[0x1];
257 u8 outer_second_cfi[0x1];
258 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200259 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300260 u8 outer_sip[0x1];
261 u8 outer_dip[0x1];
262 u8 outer_frag[0x1];
263 u8 outer_ip_protocol[0x1];
264 u8 outer_ip_ecn[0x1];
265 u8 outer_ip_dscp[0x1];
266 u8 outer_udp_sport[0x1];
267 u8 outer_udp_dport[0x1];
268 u8 outer_tcp_sport[0x1];
269 u8 outer_tcp_dport[0x1];
270 u8 outer_tcp_flags[0x1];
271 u8 outer_gre_protocol[0x1];
272 u8 outer_gre_key[0x1];
273 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200274 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300275 u8 source_eswitch_port[0x1];
276
277 u8 inner_dmac[0x1];
278 u8 inner_smac[0x1];
279 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300280 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300281 u8 inner_first_prio[0x1];
282 u8 inner_first_cfi[0x1];
283 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200284 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300285 u8 inner_second_prio[0x1];
286 u8 inner_second_cfi[0x1];
287 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200288 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300289 u8 inner_sip[0x1];
290 u8 inner_dip[0x1];
291 u8 inner_frag[0x1];
292 u8 inner_ip_protocol[0x1];
293 u8 inner_ip_ecn[0x1];
294 u8 inner_ip_dscp[0x1];
295 u8 inner_udp_sport[0x1];
296 u8 inner_udp_dport[0x1];
297 u8 inner_tcp_sport[0x1];
298 u8 inner_tcp_dport[0x1];
299 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200300 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300301 u8 reserved_at_40[0x17];
302 u8 outer_esp_spi[0x1];
303 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300304 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300305
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300306 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300307};
308
309struct mlx5_ifc_flow_table_prop_layout_bits {
310 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000311 u8 reserved_at_1[0x1];
312 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200313 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200314 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200315 u8 identified_miss_table_mode[0x1];
316 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300317 u8 encap[0x1];
318 u8 decap[0x1];
Or Gerlitz0c068972018-01-28 20:14:20 +0200319 u8 reserved_at_9[0x1];
320 u8 pop_vlan[0x1];
321 u8 push_vlan[0x1];
322 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300325 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200326 u8 log_max_modify_header_context[0x8];
327 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328 u8 max_ft_level[0x8];
329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300331
Matan Barakb4ff3a32016-02-09 14:57:42 +0200332 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200333 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300334
Matan Barakb4ff3a32016-02-09 14:57:42 +0200335 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200336 u8 log_max_destination[0x8];
337
Raed Salem16f1c5b2017-07-30 11:02:51 +0300338 u8 log_max_flow_counter[0x8];
339 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300340 u8 log_max_flow[0x8];
341
Matan Barakb4ff3a32016-02-09 14:57:42 +0200342 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300343
344 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
345
346 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
347};
348
349struct mlx5_ifc_odp_per_transport_service_cap_bits {
350 u8 send[0x1];
351 u8 receive[0x1];
352 u8 write[0x1];
353 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200354 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300355 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200356 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300357};
358
359struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
360 u8 smac_47_16[0x20];
361
362 u8 smac_15_0[0x10];
363 u8 ethertype[0x10];
364
365 u8 dmac_47_16[0x20];
366
367 u8 dmac_15_0[0x10];
368 u8 first_prio[0x3];
369 u8 first_cfi[0x1];
370 u8 first_vid[0xc];
371
372 u8 ip_protocol[0x8];
373 u8 ip_dscp[0x6];
374 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300375 u8 cvlan_tag[0x1];
376 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300377 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300378 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300379 u8 tcp_flags[0x9];
380
381 u8 tcp_sport[0x10];
382 u8 tcp_dport[0x10];
383
Or Gerlitza8ade552017-06-07 17:49:56 +0300384 u8 reserved_at_c0[0x18];
385 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300386
387 u8 udp_sport[0x10];
388 u8 udp_dport[0x10];
389
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200390 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300391
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200392 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300393};
394
395struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300396 u8 reserved_at_0[0x8];
397 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300398
Shahar Klein3e99df82018-03-18 09:02:06 +0200399 u8 source_eswitch_owner_vhca_id[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300400 u8 source_port[0x10];
401
402 u8 outer_second_prio[0x3];
403 u8 outer_second_cfi[0x1];
404 u8 outer_second_vid[0xc];
405 u8 inner_second_prio[0x3];
406 u8 inner_second_cfi[0x1];
407 u8 inner_second_vid[0xc];
408
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300409 u8 outer_second_cvlan_tag[0x1];
410 u8 inner_second_cvlan_tag[0x1];
411 u8 outer_second_svlan_tag[0x1];
412 u8 inner_second_svlan_tag[0x1];
413 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300414 u8 gre_protocol[0x10];
415
416 u8 gre_key_h[0x18];
417 u8 gre_key_l[0x8];
418
419 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200420 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300421
Matan Barakb4ff3a32016-02-09 14:57:42 +0200422 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300423
Matan Barakb4ff3a32016-02-09 14:57:42 +0200424 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300425 u8 outer_ipv6_flow_label[0x14];
426
Matan Barakb4ff3a32016-02-09 14:57:42 +0200427 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300428 u8 inner_ipv6_flow_label[0x14];
429
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300430 u8 reserved_at_120[0x28];
431 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300432 u8 reserved_at_160[0x20];
433 u8 outer_esp_spi[0x20];
434 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435};
436
437struct mlx5_ifc_cmd_pas_bits {
438 u8 pa_h[0x20];
439
440 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200441 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300442};
443
444struct mlx5_ifc_uint64_bits {
445 u8 hi[0x20];
446
447 u8 lo[0x20];
448};
449
450enum {
451 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
452 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
453 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
454 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
455 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
456 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
457 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
458 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
459 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
460 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
461};
462
463struct mlx5_ifc_ads_bits {
464 u8 fl[0x1];
465 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200466 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300467 u8 pkey_index[0x10];
468
Matan Barakb4ff3a32016-02-09 14:57:42 +0200469 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300470 u8 grh[0x1];
471 u8 mlid[0x7];
472 u8 rlid[0x10];
473
474 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200477 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300478 u8 stat_rate[0x4];
479 u8 hop_limit[0x8];
480
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 tclass[0x8];
483 u8 flow_label[0x14];
484
485 u8 rgid_rip[16][0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 f_dscp[0x1];
489 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200490 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300491 u8 f_eth_prio[0x1];
492 u8 ecn[0x2];
493 u8 dscp[0x6];
494 u8 udp_sport[0x10];
495
496 u8 dei_cfi[0x1];
497 u8 eth_prio[0x3];
498 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200499 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300500 u8 rmac_47_32[0x10];
501
502 u8 rmac_31_0[0x20];
503};
504
505struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200506 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300507 u8 nic_rx_multi_path_tirs_fts[0x1];
508 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
509 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510
511 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
512
Matan Barakb4ff3a32016-02-09 14:57:42 +0200513 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300514
515 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524};
525
Saeed Mahameed495716b2015-12-01 18:03:19 +0200526struct mlx5_ifc_flow_table_eswitch_cap_bits {
Chris Mib4563002018-04-24 11:21:46 +0900527 u8 reserved_at_0[0x1c];
528 u8 fdb_multi_path_to_table[0x1];
529 u8 reserved_at_1d[0x1e3];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
532
533 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
534
535 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
536
Matan Barakb4ff3a32016-02-09 14:57:42 +0200537 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200538};
539
Saeed Mahameedd6666752015-12-01 18:03:22 +0200540struct mlx5_ifc_e_switch_cap_bits {
541 u8 vport_svlan_strip[0x1];
542 u8 vport_cvlan_strip[0x1];
543 u8 vport_svlan_insert[0x1];
544 u8 vport_cvlan_insert_if_not_exist[0x1];
545 u8 vport_cvlan_insert_overwrite[0x1];
Roi Dayana6d04562017-12-05 10:38:58 +0200546 u8 reserved_at_5[0x18];
547 u8 merged_eswitch[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300548 u8 nic_vport_node_guid_modify[0x1];
549 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200550
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300551 u8 vxlan_encap_decap[0x1];
552 u8 nvgre_encap_decap[0x1];
553 u8 reserved_at_22[0x9];
554 u8 log_max_encap_headers[0x5];
555 u8 reserved_2b[0x6];
556 u8 max_encap_header_size[0xa];
557
558 u8 reserved_40[0x7c0];
559
Saeed Mahameedd6666752015-12-01 18:03:22 +0200560};
561
Saeed Mahameed74862162016-06-09 15:11:34 +0300562struct mlx5_ifc_qos_cap_bits {
563 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300564 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200565 u8 esw_bw_share[0x1];
566 u8 esw_rate_limit[0x1];
Bodong Wang05d3ac92018-03-19 15:10:29 +0200567 u8 reserved_at_4[0x1];
568 u8 packet_pacing_burst_bound[0x1];
569 u8 packet_pacing_typical_size[0x1];
570 u8 reserved_at_7[0x19];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_20[0x20];
573
Saeed Mahameed74862162016-06-09 15:11:34 +0300574 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
Saeed Mahameed74862162016-06-09 15:11:34 +0300576 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300577
578 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300579 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300580
581 u8 esw_element_type[0x10];
582 u8 esw_tsar_type[0x10];
583
584 u8 reserved_at_c0[0x10];
585 u8 max_qos_para_vport[0x10];
586
587 u8 max_tsar_bw_share[0x20];
588
589 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300590};
591
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300592struct mlx5_ifc_debug_cap_bits {
593 u8 reserved_at_0[0x20];
594
595 u8 reserved_at_20[0x2];
596 u8 stall_detect[0x1];
597 u8 reserved_at_23[0x1d];
598
599 u8 reserved_at_40[0x7c0];
600};
601
Saeed Mahameede2816822015-05-28 22:28:40 +0300602struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
603 u8 csum_cap[0x1];
604 u8 vlan_cap[0x1];
605 u8 lro_cap[0x1];
606 u8 lro_psh_flag[0x1];
607 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200608 u8 reserved_at_5[0x2];
609 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200610 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200611 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200613 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300614 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300615 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300616 u8 reg_umr_sq[0x1];
617 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300618 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300619 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200620 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300621 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300622 u8 tunnel_stateless_vxlan[0x1];
623
Ilan Tayari547eede2017-04-18 16:04:28 +0300624 u8 swp[0x1];
625 u8 swp_csum[0x1];
626 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300627 u8 reserved_at_23[0x1b];
628 u8 max_geneve_opt_len[0x1];
629 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300630
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632 u8 lro_min_mss_size[0x10];
633
Matan Barakb4ff3a32016-02-09 14:57:42 +0200634 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300635
636 u8 lro_timer_supported_periods[4][0x20];
637
Matan Barakb4ff3a32016-02-09 14:57:42 +0200638 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300639};
640
641struct mlx5_ifc_roce_cap_bits {
642 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200643 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300644
Matan Barakb4ff3a32016-02-09 14:57:42 +0200645 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300646
Matan Barakb4ff3a32016-02-09 14:57:42 +0200647 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300648 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200649 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300650 u8 roce_version[0x8];
651
Matan Barakb4ff3a32016-02-09 14:57:42 +0200652 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300653 u8 r_roce_dest_udp_port[0x10];
654
655 u8 r_roce_max_src_udp_port[0x10];
656 u8 r_roce_min_src_udp_port[0x10];
657
Matan Barakb4ff3a32016-02-09 14:57:42 +0200658 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300659 u8 roce_address_table_size[0x10];
660
Matan Barakb4ff3a32016-02-09 14:57:42 +0200661 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300662};
663
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300664struct mlx5_ifc_device_mem_cap_bits {
665 u8 memic[0x1];
666 u8 reserved_at_1[0x1f];
667
668 u8 reserved_at_20[0xb];
669 u8 log_min_memic_alloc_size[0x5];
670 u8 reserved_at_30[0x8];
671 u8 log_max_memic_addr_alignment[0x8];
672
673 u8 memic_bar_start_addr[0x40];
674
675 u8 memic_bar_size[0x20];
676
677 u8 max_memic_size[0x20];
678
679 u8 reserved_at_c0[0x740];
680};
681
Saeed Mahameede2816822015-05-28 22:28:40 +0300682enum {
683 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
684 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
685 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
686 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
687 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
688 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
689 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
690 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
691 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
692};
693
694enum {
695 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
696 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
697 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
698 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
699 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
700 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
701 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
702 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
703 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
704};
705
706struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300708
Or Gerlitzbd108382017-05-28 15:24:17 +0300709 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200710 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300711 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300712
Matan Barakb4ff3a32016-02-09 14:57:42 +0200713 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300714
Matan Barakb4ff3a32016-02-09 14:57:42 +0200715 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300716
Matan Barakb4ff3a32016-02-09 14:57:42 +0200717 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200718 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300719
Matan Barakb4ff3a32016-02-09 14:57:42 +0200720 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200721 u8 atomic_size_qp[0x10];
722
Matan Barakb4ff3a32016-02-09 14:57:42 +0200723 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300724 u8 atomic_size_dc[0x10];
725
Matan Barakb4ff3a32016-02-09 14:57:42 +0200726 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300727};
728
729struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200730 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300731
732 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200733 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300734
Matan Barakb4ff3a32016-02-09 14:57:42 +0200735 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300736
737 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
738
739 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
740
741 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
742
Matan Barakb4ff3a32016-02-09 14:57:42 +0200743 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300744};
745
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200746struct mlx5_ifc_calc_op {
747 u8 reserved_at_0[0x10];
748 u8 reserved_at_10[0x9];
749 u8 op_swap_endianness[0x1];
750 u8 op_min[0x1];
751 u8 op_xor[0x1];
752 u8 op_or[0x1];
753 u8 op_and[0x1];
754 u8 op_max[0x1];
755 u8 op_add[0x1];
756};
757
758struct mlx5_ifc_vector_calc_cap_bits {
759 u8 calc_matrix[0x1];
760 u8 reserved_at_1[0x1f];
761 u8 reserved_at_20[0x8];
762 u8 max_vec_count[0x8];
763 u8 reserved_at_30[0xd];
764 u8 max_chunk_size[0x3];
765 struct mlx5_ifc_calc_op calc0;
766 struct mlx5_ifc_calc_op calc1;
767 struct mlx5_ifc_calc_op calc2;
768 struct mlx5_ifc_calc_op calc3;
769
770 u8 reserved_at_e0[0x720];
771};
772
Saeed Mahameede2816822015-05-28 22:28:40 +0300773enum {
774 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
775 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300776 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300777 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300778};
779
780enum {
781 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
782 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
783};
784
785enum {
786 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
787 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
788 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
789 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
790 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
791};
792
793enum {
794 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
795 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
796 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
797 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
798 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
799 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
800};
801
802enum {
803 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
804 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
805};
806
807enum {
808 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
809 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
810 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
811};
812
813enum {
814 MLX5_CAP_PORT_TYPE_IB = 0x0,
815 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300816};
817
Max Gurtovoy1410a902017-05-28 10:53:10 +0300818enum {
819 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
820 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
821 MLX5_CAP_UMR_FENCE_NONE = 0x2,
822};
823
Eli Cohenb7755162014-10-02 12:19:44 +0300824struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200825 u8 reserved_at_0[0x30];
826 u8 vhca_id[0x10];
827
828 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300829
830 u8 log_max_srq_sz[0x8];
831 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200832 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300833 u8 log_max_qp[0x5];
834
Matan Barakb4ff3a32016-02-09 14:57:42 +0200835 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300836 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200837 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300838
Matan Barakb4ff3a32016-02-09 14:57:42 +0200839 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300840 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200841 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300842 u8 log_max_cq[0x5];
843
844 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200845 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300846 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200847 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300848 u8 log_max_eq[0x4];
849
850 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200851 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300852 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200853 u8 force_teardown[0x1];
854 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300855 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200856 u8 umr_extended_translation_offset[0x1];
857 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300858 u8 log_max_klm_list_size[0x6];
859
Matan Barakb4ff3a32016-02-09 14:57:42 +0200860 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300861 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200862 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300863 u8 log_max_ra_res_dc[0x6];
864
Matan Barakb4ff3a32016-02-09 14:57:42 +0200865 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300866 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200867 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300868 u8 log_max_ra_res_qp[0x6];
869
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200870 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300871 u8 cc_query_allowed[0x1];
872 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200873 u8 start_pad[0x1];
874 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500875 u8 reserved_at_165[0xa];
876 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300877 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300878
Saeed Mahameede2816822015-05-28 22:28:40 +0300879 u8 out_of_seq_cnt[0x1];
880 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300881 u8 retransmission_q_counters[0x1];
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300882 u8 debug[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300883 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300884 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300885 u8 max_qp_cnt[0xa];
886 u8 pkey_table_size[0x10];
887
Saeed Mahameede2816822015-05-28 22:28:40 +0300888 u8 vport_group_manager[0x1];
889 u8 vhca_group_manager[0x1];
890 u8 ib_virt[0x1];
891 u8 eth_virt[0x1];
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200892 u8 vnic_env_queue_counters[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300893 u8 ets[0x1];
894 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200895 u8 eswitch_flow_table[0x1];
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300896 u8 device_memory[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200897 u8 mcam_reg[0x1];
898 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300899 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200900 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300901 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300902 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200903 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300904 u8 disable_link_up[0x1];
905 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300906 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300907 u8 num_ports[0x8];
908
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300909 u8 reserved_at_1c0[0x1];
910 u8 pps[0x1];
911 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300912 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300913 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200914 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300915 u8 reserved_at_1d0[0x1];
916 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300917 u8 general_notification_event[0x1];
918 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200919 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200920 u8 rol_s[0x1];
921 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300922 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200923 u8 wol_s[0x1];
924 u8 wol_g[0x1];
925 u8 wol_a[0x1];
926 u8 wol_b[0x1];
927 u8 wol_m[0x1];
928 u8 wol_u[0x1];
929 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300930
931 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300932 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300933 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300934
Saeed Mahameede2816822015-05-28 22:28:40 +0300935 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300936 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300937 u8 reserved_at_202[0x1];
938 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200939 u8 ipoib_basic_offloads[0x1];
Majd Dibbinyc8d75a92018-03-22 15:34:04 +0200940 u8 reserved_at_205[0x1];
941 u8 repeated_block_disabled[0x1];
942 u8 umr_modify_entity_size_disabled[0x1];
943 u8 umr_modify_atomic_disabled[0x1];
944 u8 umr_indirect_mkey_disabled[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300945 u8 umr_fence[0x2];
946 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300947 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300948 u8 cmdif_checksum[0x2];
949 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300950 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300951 u8 wq_signature[0x1];
952 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300954 u8 sho[0x1];
955 u8 tph[0x1];
956 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300957 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300958 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300959 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300960 u8 roce[0x1];
961 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300962 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300963
964 u8 cq_oi[0x1];
965 u8 cq_resize[0x1];
966 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300967 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300968 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300969 u8 pg[0x1];
970 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300971 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300972 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300973 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300974 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300975 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300976 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200977 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300978 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200979 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300980 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300981 u8 qkv[0x1];
982 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200983 u8 set_deth_sqpn[0x1];
984 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300985 u8 xrc[0x1];
986 u8 ud[0x1];
987 u8 uc[0x1];
988 u8 rc[0x1];
989
Eli Cohena6d51b62017-01-03 23:55:23 +0200990 u8 uar_4k[0x1];
991 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300992 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300994 u8 log_pg_sz[0x8];
995
996 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200997 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300998 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001000 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +03001001
1002 u8 reserved_at_270[0xb];
1003 u8 lag_master[0x1];
1004 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +03001005
Tariq Toukane1c9c622016-04-11 23:10:21 +03001006 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001007 u8 max_wqe_sz_sq[0x10];
1008
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001010 u8 max_wqe_sz_rq[0x10];
1011
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001012 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001013 u8 max_wqe_sz_sq_dc[0x10];
1014
Tariq Toukane1c9c622016-04-11 23:10:21 +03001015 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +03001016 u8 max_qp_mcg[0x19];
1017
Tariq Toukane1c9c622016-04-11 23:10:21 +03001018 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001019 u8 log_max_mcg[0x8];
1020
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001022 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001024 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001025 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001026 u8 log_max_xrcd[0x5];
1027
Moshe Shemesh5c298142017-12-26 16:46:29 +02001028 u8 nic_receive_steering_discard[0x1];
Moshe Shemeshaaabd072018-01-14 00:56:25 +02001029 u8 receive_discard_vport_down[0x1];
1030 u8 transmit_discard_vport_down[0x1];
1031 u8 reserved_at_343[0x5];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001032 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001033 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001034
Eli Cohenb7755162014-10-02 12:19:44 +03001035
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001037 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001038 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001039 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001041 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001042 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001043 u8 log_max_tis[0x5];
1044
Saeed Mahameede2816822015-05-28 22:28:40 +03001045 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001046 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001047 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001048 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001049 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001050 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001051 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001052 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001053 u8 log_max_tis_per_sq[0x5];
1054
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001055 u8 ext_stride_num_range[0x1];
1056 u8 reserved_at_3a1[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001057 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001058 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001059 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001060 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001061 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001062 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001063 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001064
Or Gerlitz40817cd2017-06-25 12:38:45 +03001065 u8 hairpin[0x1];
1066 u8 reserved_at_3c1[0x2];
1067 u8 log_max_hairpin_queues[0x5];
1068 u8 reserved_at_3c8[0x3];
1069 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001070 u8 reserved_at_3d0[0x3];
1071 u8 log_max_hairpin_num_packets[0x5];
1072 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001073 u8 log_max_wq_sz[0x5];
1074
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001075 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001076 u8 disable_local_lb_uc[0x1];
1077 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001078 u8 log_min_hairpin_wq_data_sz[0x5];
1079 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001080 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001081 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001082 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001083 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001084 u8 log_max_current_uc_list[0x5];
1085
Tariq Toukane1c9c622016-04-11 23:10:21 +03001086 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001087
Tariq Toukane1c9c622016-04-11 23:10:21 +03001088 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001089 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001090 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001091 u8 log_uar_page_sz[0x10];
1092
Tariq Toukane1c9c622016-04-11 23:10:21 +03001093 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001094 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001095 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001096
Eli Cohena6d51b62017-01-03 23:55:23 +02001097 u8 reserved_at_500[0x20];
1098 u8 num_of_uars_per_page[0x20];
1099 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001100
Guy Levi0ff8e792017-10-19 08:25:51 +03001101 u8 reserved_at_580[0x3d];
1102 u8 cqe_128_always[0x1];
1103 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001104 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001105
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001106 u8 cqe_compression_timeout[0x10];
1107 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001108
Saeed Mahameed74862162016-06-09 15:11:34 +03001109 u8 reserved_at_5e0[0x10];
1110 u8 tag_matching[0x1];
1111 u8 rndv_offload_rc[0x1];
1112 u8 rndv_offload_dc[0x1];
1113 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001114 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001115 u8 log_max_xrq[0x5];
1116
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001117 u8 affiliate_nic_vport_criteria[0x8];
1118 u8 native_port_num[0x8];
1119 u8 num_vhca_ports[0x8];
1120 u8 reserved_at_618[0x6];
1121 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001122 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001123};
1124
Saeed Mahameed81848732015-12-01 18:03:20 +02001125enum mlx5_flow_destination_type {
1126 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1127 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1128 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001129
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001130 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001131 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001132};
1133
1134struct mlx5_ifc_dest_format_struct_bits {
1135 u8 destination_type[0x8];
1136 u8 destination_id[0x18];
Shahar Kleinb17f7fc2018-03-22 12:32:12 +02001137 u8 destination_eswitch_owner_vhca_id_valid[0x1];
1138 u8 reserved_at_21[0xf];
1139 u8 destination_eswitch_owner_vhca_id[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001140};
1141
Amir Vadai9dc0b282016-05-13 12:55:39 +00001142struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001143 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001144
1145 u8 reserved_at_20[0x20];
1146};
1147
1148union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1149 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1150 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1151 u8 reserved_at_0[0x40];
1152};
1153
Saeed Mahameede2816822015-05-28 22:28:40 +03001154struct mlx5_ifc_fte_match_param_bits {
1155 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1156
1157 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1158
1159 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1160
Matan Barakb4ff3a32016-02-09 14:57:42 +02001161 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001162};
1163
1164enum {
1165 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1166 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1167 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1168 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1169 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1170};
1171
1172struct mlx5_ifc_rx_hash_field_select_bits {
1173 u8 l3_prot_type[0x1];
1174 u8 l4_prot_type[0x1];
1175 u8 selected_fields[0x1e];
1176};
1177
1178enum {
1179 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1180 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1181};
1182
1183enum {
1184 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1185 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1186};
1187
1188struct mlx5_ifc_wq_bits {
1189 u8 wq_type[0x4];
1190 u8 wq_signature[0x1];
1191 u8 end_padding_mode[0x2];
1192 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001193 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001194
1195 u8 hds_skip_first_sge[0x1];
1196 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001197 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001198 u8 page_offset[0x5];
1199 u8 lwm[0x10];
1200
Matan Barakb4ff3a32016-02-09 14:57:42 +02001201 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001202 u8 pd[0x18];
1203
Matan Barakb4ff3a32016-02-09 14:57:42 +02001204 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001205 u8 uar_page[0x18];
1206
1207 u8 dbr_addr[0x40];
1208
1209 u8 hw_counter[0x20];
1210
1211 u8 sw_counter[0x20];
1212
Matan Barakb4ff3a32016-02-09 14:57:42 +02001213 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001214 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001215 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001216 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001217 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001218 u8 log_wq_sz[0x5];
1219
Or Gerlitz4d533e02018-01-04 12:26:21 +02001220 u8 reserved_at_120[0x3];
1221 u8 log_hairpin_num_packets[0x5];
1222 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001223 u8 log_hairpin_data_sz[0x5];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001224
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001225 u8 reserved_at_130[0x4];
1226 u8 log_wqe_num_of_strides[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001227 u8 two_byte_shift_en[0x1];
1228 u8 reserved_at_139[0x4];
1229 u8 log_wqe_stride_size[0x3];
1230
1231 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001232
1233 struct mlx5_ifc_cmd_pas_bits pas[0];
1234};
1235
1236struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001237 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001238 u8 rq_num[0x18];
1239};
1240
1241struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001242 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001243 u8 mac_addr_47_32[0x10];
1244
1245 u8 mac_addr_31_0[0x20];
1246};
1247
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001248struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001249 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001250 u8 vlan[0x0c];
1251
Matan Barakb4ff3a32016-02-09 14:57:42 +02001252 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001253};
1254
Saeed Mahameede2816822015-05-28 22:28:40 +03001255struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001256 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001257
1258 u8 min_time_between_cnps[0x20];
1259
Matan Barakb4ff3a32016-02-09 14:57:42 +02001260 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001261 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001262 u8 reserved_at_d8[0x4];
1263 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001264 u8 cnp_802p_prio[0x3];
1265
Matan Barakb4ff3a32016-02-09 14:57:42 +02001266 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001267};
1268
1269struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001270 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001271
Matan Barakb4ff3a32016-02-09 14:57:42 +02001272 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001273 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001274 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001275 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001276 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001277
Matan Barakb4ff3a32016-02-09 14:57:42 +02001278 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001279
1280 u8 rpg_time_reset[0x20];
1281
1282 u8 rpg_byte_reset[0x20];
1283
1284 u8 rpg_threshold[0x20];
1285
1286 u8 rpg_max_rate[0x20];
1287
1288 u8 rpg_ai_rate[0x20];
1289
1290 u8 rpg_hai_rate[0x20];
1291
1292 u8 rpg_gd[0x20];
1293
1294 u8 rpg_min_dec_fac[0x20];
1295
1296 u8 rpg_min_rate[0x20];
1297
Matan Barakb4ff3a32016-02-09 14:57:42 +02001298 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001299
1300 u8 rate_to_set_on_first_cnp[0x20];
1301
1302 u8 dce_tcp_g[0x20];
1303
1304 u8 dce_tcp_rtt[0x20];
1305
1306 u8 rate_reduce_monitor_period[0x20];
1307
Matan Barakb4ff3a32016-02-09 14:57:42 +02001308 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001309
1310 u8 initial_alpha_value[0x20];
1311
Matan Barakb4ff3a32016-02-09 14:57:42 +02001312 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001313};
1314
1315struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001316 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001317
1318 u8 rppp_max_rps[0x20];
1319
1320 u8 rpg_time_reset[0x20];
1321
1322 u8 rpg_byte_reset[0x20];
1323
1324 u8 rpg_threshold[0x20];
1325
1326 u8 rpg_max_rate[0x20];
1327
1328 u8 rpg_ai_rate[0x20];
1329
1330 u8 rpg_hai_rate[0x20];
1331
1332 u8 rpg_gd[0x20];
1333
1334 u8 rpg_min_dec_fac[0x20];
1335
1336 u8 rpg_min_rate[0x20];
1337
Matan Barakb4ff3a32016-02-09 14:57:42 +02001338 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001339};
1340
1341enum {
1342 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1343 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1344 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1345};
1346
1347struct mlx5_ifc_resize_field_select_bits {
1348 u8 resize_field_select[0x20];
1349};
1350
1351enum {
1352 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1353 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1354 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1355 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1356};
1357
1358struct mlx5_ifc_modify_field_select_bits {
1359 u8 modify_field_select[0x20];
1360};
1361
1362struct mlx5_ifc_field_select_r_roce_np_bits {
1363 u8 field_select_r_roce_np[0x20];
1364};
1365
1366struct mlx5_ifc_field_select_r_roce_rp_bits {
1367 u8 field_select_r_roce_rp[0x20];
1368};
1369
1370enum {
1371 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1372 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1373 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1374 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1375 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1376 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1377 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1378 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1379 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1380 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1381};
1382
1383struct mlx5_ifc_field_select_802_1qau_rp_bits {
1384 u8 field_select_8021qaurp[0x20];
1385};
1386
1387struct mlx5_ifc_phys_layer_cntrs_bits {
1388 u8 time_since_last_clear_high[0x20];
1389
1390 u8 time_since_last_clear_low[0x20];
1391
1392 u8 symbol_errors_high[0x20];
1393
1394 u8 symbol_errors_low[0x20];
1395
1396 u8 sync_headers_errors_high[0x20];
1397
1398 u8 sync_headers_errors_low[0x20];
1399
1400 u8 edpl_bip_errors_lane0_high[0x20];
1401
1402 u8 edpl_bip_errors_lane0_low[0x20];
1403
1404 u8 edpl_bip_errors_lane1_high[0x20];
1405
1406 u8 edpl_bip_errors_lane1_low[0x20];
1407
1408 u8 edpl_bip_errors_lane2_high[0x20];
1409
1410 u8 edpl_bip_errors_lane2_low[0x20];
1411
1412 u8 edpl_bip_errors_lane3_high[0x20];
1413
1414 u8 edpl_bip_errors_lane3_low[0x20];
1415
1416 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1417
1418 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1419
1420 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1421
1422 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1423
1424 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1425
1426 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1427
1428 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1429
1430 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1431
1432 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1433
1434 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1435
1436 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1437
1438 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1439
1440 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1441
1442 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1443
1444 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1445
1446 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1447
1448 u8 rs_fec_corrected_blocks_high[0x20];
1449
1450 u8 rs_fec_corrected_blocks_low[0x20];
1451
1452 u8 rs_fec_uncorrectable_blocks_high[0x20];
1453
1454 u8 rs_fec_uncorrectable_blocks_low[0x20];
1455
1456 u8 rs_fec_no_errors_blocks_high[0x20];
1457
1458 u8 rs_fec_no_errors_blocks_low[0x20];
1459
1460 u8 rs_fec_single_error_blocks_high[0x20];
1461
1462 u8 rs_fec_single_error_blocks_low[0x20];
1463
1464 u8 rs_fec_corrected_symbols_total_high[0x20];
1465
1466 u8 rs_fec_corrected_symbols_total_low[0x20];
1467
1468 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1469
1470 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1471
1472 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1473
1474 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1475
1476 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1477
1478 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1479
1480 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1481
1482 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1483
1484 u8 link_down_events[0x20];
1485
1486 u8 successful_recovery_events[0x20];
1487
Matan Barakb4ff3a32016-02-09 14:57:42 +02001488 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001489};
1490
Gal Pressmand8dc0502016-09-27 17:04:51 +03001491struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1492 u8 time_since_last_clear_high[0x20];
1493
1494 u8 time_since_last_clear_low[0x20];
1495
1496 u8 phy_received_bits_high[0x20];
1497
1498 u8 phy_received_bits_low[0x20];
1499
1500 u8 phy_symbol_errors_high[0x20];
1501
1502 u8 phy_symbol_errors_low[0x20];
1503
1504 u8 phy_corrected_bits_high[0x20];
1505
1506 u8 phy_corrected_bits_low[0x20];
1507
1508 u8 phy_corrected_bits_lane0_high[0x20];
1509
1510 u8 phy_corrected_bits_lane0_low[0x20];
1511
1512 u8 phy_corrected_bits_lane1_high[0x20];
1513
1514 u8 phy_corrected_bits_lane1_low[0x20];
1515
1516 u8 phy_corrected_bits_lane2_high[0x20];
1517
1518 u8 phy_corrected_bits_lane2_low[0x20];
1519
1520 u8 phy_corrected_bits_lane3_high[0x20];
1521
1522 u8 phy_corrected_bits_lane3_low[0x20];
1523
1524 u8 reserved_at_200[0x5c0];
1525};
1526
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001527struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1528 u8 symbol_error_counter[0x10];
1529
1530 u8 link_error_recovery_counter[0x8];
1531
1532 u8 link_downed_counter[0x8];
1533
1534 u8 port_rcv_errors[0x10];
1535
1536 u8 port_rcv_remote_physical_errors[0x10];
1537
1538 u8 port_rcv_switch_relay_errors[0x10];
1539
1540 u8 port_xmit_discards[0x10];
1541
1542 u8 port_xmit_constraint_errors[0x8];
1543
1544 u8 port_rcv_constraint_errors[0x8];
1545
1546 u8 reserved_at_70[0x8];
1547
1548 u8 link_overrun_errors[0x8];
1549
1550 u8 reserved_at_80[0x10];
1551
1552 u8 vl_15_dropped[0x10];
1553
Tim Wright133bea02017-05-01 17:30:08 +01001554 u8 reserved_at_a0[0x80];
1555
1556 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001557};
1558
Saeed Mahameede2816822015-05-28 22:28:40 +03001559struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1560 u8 transmit_queue_high[0x20];
1561
1562 u8 transmit_queue_low[0x20];
1563
Matan Barakb4ff3a32016-02-09 14:57:42 +02001564 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001565};
1566
1567struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1568 u8 rx_octets_high[0x20];
1569
1570 u8 rx_octets_low[0x20];
1571
Matan Barakb4ff3a32016-02-09 14:57:42 +02001572 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001573
1574 u8 rx_frames_high[0x20];
1575
1576 u8 rx_frames_low[0x20];
1577
1578 u8 tx_octets_high[0x20];
1579
1580 u8 tx_octets_low[0x20];
1581
Matan Barakb4ff3a32016-02-09 14:57:42 +02001582 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001583
1584 u8 tx_frames_high[0x20];
1585
1586 u8 tx_frames_low[0x20];
1587
1588 u8 rx_pause_high[0x20];
1589
1590 u8 rx_pause_low[0x20];
1591
1592 u8 rx_pause_duration_high[0x20];
1593
1594 u8 rx_pause_duration_low[0x20];
1595
1596 u8 tx_pause_high[0x20];
1597
1598 u8 tx_pause_low[0x20];
1599
1600 u8 tx_pause_duration_high[0x20];
1601
1602 u8 tx_pause_duration_low[0x20];
1603
1604 u8 rx_pause_transition_high[0x20];
1605
1606 u8 rx_pause_transition_low[0x20];
1607
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03001608 u8 reserved_at_3c0[0x40];
1609
1610 u8 device_stall_minor_watermark_cnt_high[0x20];
1611
1612 u8 device_stall_minor_watermark_cnt_low[0x20];
1613
1614 u8 device_stall_critical_watermark_cnt_high[0x20];
1615
1616 u8 device_stall_critical_watermark_cnt_low[0x20];
1617
1618 u8 reserved_at_480[0x340];
Saeed Mahameede2816822015-05-28 22:28:40 +03001619};
1620
1621struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1622 u8 port_transmit_wait_high[0x20];
1623
1624 u8 port_transmit_wait_low[0x20];
1625
Gal Pressman2dba0792017-06-18 14:56:45 +03001626 u8 reserved_at_40[0x100];
1627
1628 u8 rx_buffer_almost_full_high[0x20];
1629
1630 u8 rx_buffer_almost_full_low[0x20];
1631
1632 u8 rx_buffer_full_high[0x20];
1633
1634 u8 rx_buffer_full_low[0x20];
1635
1636 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001637};
1638
1639struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1640 u8 dot3stats_alignment_errors_high[0x20];
1641
1642 u8 dot3stats_alignment_errors_low[0x20];
1643
1644 u8 dot3stats_fcs_errors_high[0x20];
1645
1646 u8 dot3stats_fcs_errors_low[0x20];
1647
1648 u8 dot3stats_single_collision_frames_high[0x20];
1649
1650 u8 dot3stats_single_collision_frames_low[0x20];
1651
1652 u8 dot3stats_multiple_collision_frames_high[0x20];
1653
1654 u8 dot3stats_multiple_collision_frames_low[0x20];
1655
1656 u8 dot3stats_sqe_test_errors_high[0x20];
1657
1658 u8 dot3stats_sqe_test_errors_low[0x20];
1659
1660 u8 dot3stats_deferred_transmissions_high[0x20];
1661
1662 u8 dot3stats_deferred_transmissions_low[0x20];
1663
1664 u8 dot3stats_late_collisions_high[0x20];
1665
1666 u8 dot3stats_late_collisions_low[0x20];
1667
1668 u8 dot3stats_excessive_collisions_high[0x20];
1669
1670 u8 dot3stats_excessive_collisions_low[0x20];
1671
1672 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1673
1674 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1675
1676 u8 dot3stats_carrier_sense_errors_high[0x20];
1677
1678 u8 dot3stats_carrier_sense_errors_low[0x20];
1679
1680 u8 dot3stats_frame_too_longs_high[0x20];
1681
1682 u8 dot3stats_frame_too_longs_low[0x20];
1683
1684 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1685
1686 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1687
1688 u8 dot3stats_symbol_errors_high[0x20];
1689
1690 u8 dot3stats_symbol_errors_low[0x20];
1691
1692 u8 dot3control_in_unknown_opcodes_high[0x20];
1693
1694 u8 dot3control_in_unknown_opcodes_low[0x20];
1695
1696 u8 dot3in_pause_frames_high[0x20];
1697
1698 u8 dot3in_pause_frames_low[0x20];
1699
1700 u8 dot3out_pause_frames_high[0x20];
1701
1702 u8 dot3out_pause_frames_low[0x20];
1703
Matan Barakb4ff3a32016-02-09 14:57:42 +02001704 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001705};
1706
1707struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1708 u8 ether_stats_drop_events_high[0x20];
1709
1710 u8 ether_stats_drop_events_low[0x20];
1711
1712 u8 ether_stats_octets_high[0x20];
1713
1714 u8 ether_stats_octets_low[0x20];
1715
1716 u8 ether_stats_pkts_high[0x20];
1717
1718 u8 ether_stats_pkts_low[0x20];
1719
1720 u8 ether_stats_broadcast_pkts_high[0x20];
1721
1722 u8 ether_stats_broadcast_pkts_low[0x20];
1723
1724 u8 ether_stats_multicast_pkts_high[0x20];
1725
1726 u8 ether_stats_multicast_pkts_low[0x20];
1727
1728 u8 ether_stats_crc_align_errors_high[0x20];
1729
1730 u8 ether_stats_crc_align_errors_low[0x20];
1731
1732 u8 ether_stats_undersize_pkts_high[0x20];
1733
1734 u8 ether_stats_undersize_pkts_low[0x20];
1735
1736 u8 ether_stats_oversize_pkts_high[0x20];
1737
1738 u8 ether_stats_oversize_pkts_low[0x20];
1739
1740 u8 ether_stats_fragments_high[0x20];
1741
1742 u8 ether_stats_fragments_low[0x20];
1743
1744 u8 ether_stats_jabbers_high[0x20];
1745
1746 u8 ether_stats_jabbers_low[0x20];
1747
1748 u8 ether_stats_collisions_high[0x20];
1749
1750 u8 ether_stats_collisions_low[0x20];
1751
1752 u8 ether_stats_pkts64octets_high[0x20];
1753
1754 u8 ether_stats_pkts64octets_low[0x20];
1755
1756 u8 ether_stats_pkts65to127octets_high[0x20];
1757
1758 u8 ether_stats_pkts65to127octets_low[0x20];
1759
1760 u8 ether_stats_pkts128to255octets_high[0x20];
1761
1762 u8 ether_stats_pkts128to255octets_low[0x20];
1763
1764 u8 ether_stats_pkts256to511octets_high[0x20];
1765
1766 u8 ether_stats_pkts256to511octets_low[0x20];
1767
1768 u8 ether_stats_pkts512to1023octets_high[0x20];
1769
1770 u8 ether_stats_pkts512to1023octets_low[0x20];
1771
1772 u8 ether_stats_pkts1024to1518octets_high[0x20];
1773
1774 u8 ether_stats_pkts1024to1518octets_low[0x20];
1775
1776 u8 ether_stats_pkts1519to2047octets_high[0x20];
1777
1778 u8 ether_stats_pkts1519to2047octets_low[0x20];
1779
1780 u8 ether_stats_pkts2048to4095octets_high[0x20];
1781
1782 u8 ether_stats_pkts2048to4095octets_low[0x20];
1783
1784 u8 ether_stats_pkts4096to8191octets_high[0x20];
1785
1786 u8 ether_stats_pkts4096to8191octets_low[0x20];
1787
1788 u8 ether_stats_pkts8192to10239octets_high[0x20];
1789
1790 u8 ether_stats_pkts8192to10239octets_low[0x20];
1791
Matan Barakb4ff3a32016-02-09 14:57:42 +02001792 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001793};
1794
1795struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1796 u8 if_in_octets_high[0x20];
1797
1798 u8 if_in_octets_low[0x20];
1799
1800 u8 if_in_ucast_pkts_high[0x20];
1801
1802 u8 if_in_ucast_pkts_low[0x20];
1803
1804 u8 if_in_discards_high[0x20];
1805
1806 u8 if_in_discards_low[0x20];
1807
1808 u8 if_in_errors_high[0x20];
1809
1810 u8 if_in_errors_low[0x20];
1811
1812 u8 if_in_unknown_protos_high[0x20];
1813
1814 u8 if_in_unknown_protos_low[0x20];
1815
1816 u8 if_out_octets_high[0x20];
1817
1818 u8 if_out_octets_low[0x20];
1819
1820 u8 if_out_ucast_pkts_high[0x20];
1821
1822 u8 if_out_ucast_pkts_low[0x20];
1823
1824 u8 if_out_discards_high[0x20];
1825
1826 u8 if_out_discards_low[0x20];
1827
1828 u8 if_out_errors_high[0x20];
1829
1830 u8 if_out_errors_low[0x20];
1831
1832 u8 if_in_multicast_pkts_high[0x20];
1833
1834 u8 if_in_multicast_pkts_low[0x20];
1835
1836 u8 if_in_broadcast_pkts_high[0x20];
1837
1838 u8 if_in_broadcast_pkts_low[0x20];
1839
1840 u8 if_out_multicast_pkts_high[0x20];
1841
1842 u8 if_out_multicast_pkts_low[0x20];
1843
1844 u8 if_out_broadcast_pkts_high[0x20];
1845
1846 u8 if_out_broadcast_pkts_low[0x20];
1847
Matan Barakb4ff3a32016-02-09 14:57:42 +02001848 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001849};
1850
1851struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1852 u8 a_frames_transmitted_ok_high[0x20];
1853
1854 u8 a_frames_transmitted_ok_low[0x20];
1855
1856 u8 a_frames_received_ok_high[0x20];
1857
1858 u8 a_frames_received_ok_low[0x20];
1859
1860 u8 a_frame_check_sequence_errors_high[0x20];
1861
1862 u8 a_frame_check_sequence_errors_low[0x20];
1863
1864 u8 a_alignment_errors_high[0x20];
1865
1866 u8 a_alignment_errors_low[0x20];
1867
1868 u8 a_octets_transmitted_ok_high[0x20];
1869
1870 u8 a_octets_transmitted_ok_low[0x20];
1871
1872 u8 a_octets_received_ok_high[0x20];
1873
1874 u8 a_octets_received_ok_low[0x20];
1875
1876 u8 a_multicast_frames_xmitted_ok_high[0x20];
1877
1878 u8 a_multicast_frames_xmitted_ok_low[0x20];
1879
1880 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1881
1882 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1883
1884 u8 a_multicast_frames_received_ok_high[0x20];
1885
1886 u8 a_multicast_frames_received_ok_low[0x20];
1887
1888 u8 a_broadcast_frames_received_ok_high[0x20];
1889
1890 u8 a_broadcast_frames_received_ok_low[0x20];
1891
1892 u8 a_in_range_length_errors_high[0x20];
1893
1894 u8 a_in_range_length_errors_low[0x20];
1895
1896 u8 a_out_of_range_length_field_high[0x20];
1897
1898 u8 a_out_of_range_length_field_low[0x20];
1899
1900 u8 a_frame_too_long_errors_high[0x20];
1901
1902 u8 a_frame_too_long_errors_low[0x20];
1903
1904 u8 a_symbol_error_during_carrier_high[0x20];
1905
1906 u8 a_symbol_error_during_carrier_low[0x20];
1907
1908 u8 a_mac_control_frames_transmitted_high[0x20];
1909
1910 u8 a_mac_control_frames_transmitted_low[0x20];
1911
1912 u8 a_mac_control_frames_received_high[0x20];
1913
1914 u8 a_mac_control_frames_received_low[0x20];
1915
1916 u8 a_unsupported_opcodes_received_high[0x20];
1917
1918 u8 a_unsupported_opcodes_received_low[0x20];
1919
1920 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1921
1922 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1923
1924 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1925
1926 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1927
Matan Barakb4ff3a32016-02-09 14:57:42 +02001928 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001929};
1930
Gal Pressman8ed1a632016-11-17 13:46:01 +02001931struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1932 u8 life_time_counter_high[0x20];
1933
1934 u8 life_time_counter_low[0x20];
1935
1936 u8 rx_errors[0x20];
1937
1938 u8 tx_errors[0x20];
1939
1940 u8 l0_to_recovery_eieos[0x20];
1941
1942 u8 l0_to_recovery_ts[0x20];
1943
1944 u8 l0_to_recovery_framing[0x20];
1945
1946 u8 l0_to_recovery_retrain[0x20];
1947
1948 u8 crc_error_dllp[0x20];
1949
1950 u8 crc_error_tlp[0x20];
1951
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001952 u8 tx_overflow_buffer_pkt_high[0x20];
1953
1954 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001955
1956 u8 outbound_stalled_reads[0x20];
1957
1958 u8 outbound_stalled_writes[0x20];
1959
1960 u8 outbound_stalled_reads_events[0x20];
1961
1962 u8 outbound_stalled_writes_events[0x20];
1963
1964 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001965};
1966
Saeed Mahameede2816822015-05-28 22:28:40 +03001967struct mlx5_ifc_cmd_inter_comp_event_bits {
1968 u8 command_completion_vector[0x20];
1969
Matan Barakb4ff3a32016-02-09 14:57:42 +02001970 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001971};
1972
1973struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001974 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001975 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001976 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001977 u8 vl[0x4];
1978
Matan Barakb4ff3a32016-02-09 14:57:42 +02001979 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001980};
1981
1982struct mlx5_ifc_db_bf_congestion_event_bits {
1983 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001986 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001987
Matan Barakb4ff3a32016-02-09 14:57:42 +02001988 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001989};
1990
1991struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001992 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001993
1994 u8 gpio_event_hi[0x20];
1995
1996 u8 gpio_event_lo[0x20];
1997
Matan Barakb4ff3a32016-02-09 14:57:42 +02001998 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001999};
2000
2001struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002002 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002003
2004 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002005 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002006
Matan Barakb4ff3a32016-02-09 14:57:42 +02002007 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002008};
2009
2010struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002011 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002012};
2013
2014enum {
2015 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
2016 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
2017};
2018
2019struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002020 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002021 u8 cqn[0x18];
2022
Matan Barakb4ff3a32016-02-09 14:57:42 +02002023 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002024
Matan Barakb4ff3a32016-02-09 14:57:42 +02002025 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002026 u8 syndrome[0x8];
2027
Matan Barakb4ff3a32016-02-09 14:57:42 +02002028 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002029};
2030
2031struct mlx5_ifc_rdma_page_fault_event_bits {
2032 u8 bytes_committed[0x20];
2033
2034 u8 r_key[0x20];
2035
Matan Barakb4ff3a32016-02-09 14:57:42 +02002036 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002037 u8 packet_len[0x10];
2038
2039 u8 rdma_op_len[0x20];
2040
2041 u8 rdma_va[0x40];
2042
Matan Barakb4ff3a32016-02-09 14:57:42 +02002043 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002044 u8 rdma[0x1];
2045 u8 write[0x1];
2046 u8 requestor[0x1];
2047 u8 qp_number[0x18];
2048};
2049
2050struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2051 u8 bytes_committed[0x20];
2052
Matan Barakb4ff3a32016-02-09 14:57:42 +02002053 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002054 u8 wqe_index[0x10];
2055
Matan Barakb4ff3a32016-02-09 14:57:42 +02002056 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002057 u8 len[0x10];
2058
Matan Barakb4ff3a32016-02-09 14:57:42 +02002059 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002060
Matan Barakb4ff3a32016-02-09 14:57:42 +02002061 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002062 u8 rdma[0x1];
2063 u8 write_read[0x1];
2064 u8 requestor[0x1];
2065 u8 qpn[0x18];
2066};
2067
2068struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002069 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002070
2071 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002072 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002073
Matan Barakb4ff3a32016-02-09 14:57:42 +02002074 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002075 u8 qpn_rqn_sqn[0x18];
2076};
2077
2078struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002079 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002080
Matan Barakb4ff3a32016-02-09 14:57:42 +02002081 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002082 u8 dct_number[0x18];
2083};
2084
2085struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002086 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002087
Matan Barakb4ff3a32016-02-09 14:57:42 +02002088 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002089 u8 cq_number[0x18];
2090};
2091
2092enum {
2093 MLX5_QPC_STATE_RST = 0x0,
2094 MLX5_QPC_STATE_INIT = 0x1,
2095 MLX5_QPC_STATE_RTR = 0x2,
2096 MLX5_QPC_STATE_RTS = 0x3,
2097 MLX5_QPC_STATE_SQER = 0x4,
2098 MLX5_QPC_STATE_ERR = 0x6,
2099 MLX5_QPC_STATE_SQD = 0x7,
2100 MLX5_QPC_STATE_SUSPENDED = 0x9,
2101};
2102
2103enum {
2104 MLX5_QPC_ST_RC = 0x0,
2105 MLX5_QPC_ST_UC = 0x1,
2106 MLX5_QPC_ST_UD = 0x2,
2107 MLX5_QPC_ST_XRC = 0x3,
2108 MLX5_QPC_ST_DCI = 0x5,
2109 MLX5_QPC_ST_QP0 = 0x7,
2110 MLX5_QPC_ST_QP1 = 0x8,
2111 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2112 MLX5_QPC_ST_REG_UMR = 0xc,
2113};
2114
2115enum {
2116 MLX5_QPC_PM_STATE_ARMED = 0x0,
2117 MLX5_QPC_PM_STATE_REARM = 0x1,
2118 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2119 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2120};
2121
2122enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002123 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2124};
2125
2126enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002127 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2128 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2129};
2130
2131enum {
2132 MLX5_QPC_MTU_256_BYTES = 0x1,
2133 MLX5_QPC_MTU_512_BYTES = 0x2,
2134 MLX5_QPC_MTU_1K_BYTES = 0x3,
2135 MLX5_QPC_MTU_2K_BYTES = 0x4,
2136 MLX5_QPC_MTU_4K_BYTES = 0x5,
2137 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2138};
2139
2140enum {
2141 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2142 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2143 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2144 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2145 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2146 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2147 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2148 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2149};
2150
2151enum {
2152 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2153 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2154 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2155};
2156
2157enum {
2158 MLX5_QPC_CS_RES_DISABLE = 0x0,
2159 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2160 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2161};
2162
2163struct mlx5_ifc_qpc_bits {
2164 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002165 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002166 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002167 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002168 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002169 u8 reserved_at_15[0x3];
2170 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002172 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002173
2174 u8 wq_signature[0x1];
2175 u8 block_lb_mc[0x1];
2176 u8 atomic_like_write_en[0x1];
2177 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002178 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002179 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002180 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002181 u8 pd[0x18];
2182
2183 u8 mtu[0x3];
2184 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002185 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002186 u8 log_rq_size[0x4];
2187 u8 log_rq_stride[0x3];
2188 u8 no_sq[0x1];
2189 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002190 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002191 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002192 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002193
2194 u8 counter_set_id[0x8];
2195 u8 uar_page[0x18];
2196
Matan Barakb4ff3a32016-02-09 14:57:42 +02002197 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002198 u8 user_index[0x18];
2199
Matan Barakb4ff3a32016-02-09 14:57:42 +02002200 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201 u8 log_page_size[0x5];
2202 u8 remote_qpn[0x18];
2203
2204 struct mlx5_ifc_ads_bits primary_address_path;
2205
2206 struct mlx5_ifc_ads_bits secondary_address_path;
2207
2208 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002209 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002210 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002211 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002212 u8 retry_count[0x3];
2213 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002214 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002215 u8 fre[0x1];
2216 u8 cur_rnr_retry[0x3];
2217 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002218 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002219
Matan Barakb4ff3a32016-02-09 14:57:42 +02002220 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221
Matan Barakb4ff3a32016-02-09 14:57:42 +02002222 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002223 u8 next_send_psn[0x18];
2224
Matan Barakb4ff3a32016-02-09 14:57:42 +02002225 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002226 u8 cqn_snd[0x18];
2227
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002228 u8 reserved_at_400[0x8];
2229 u8 deth_sqpn[0x18];
2230
2231 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002232
Matan Barakb4ff3a32016-02-09 14:57:42 +02002233 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002234 u8 last_acked_psn[0x18];
2235
Matan Barakb4ff3a32016-02-09 14:57:42 +02002236 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002237 u8 ssn[0x18];
2238
Matan Barakb4ff3a32016-02-09 14:57:42 +02002239 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002240 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002241 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002242 u8 atomic_mode[0x4];
2243 u8 rre[0x1];
2244 u8 rwe[0x1];
2245 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002246 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002247 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002248 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002249 u8 cd_slave_receive[0x1];
2250 u8 cd_slave_send[0x1];
2251 u8 cd_master[0x1];
2252
Matan Barakb4ff3a32016-02-09 14:57:42 +02002253 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254 u8 min_rnr_nak[0x5];
2255 u8 next_rcv_psn[0x18];
2256
Matan Barakb4ff3a32016-02-09 14:57:42 +02002257 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002258 u8 xrcd[0x18];
2259
Matan Barakb4ff3a32016-02-09 14:57:42 +02002260 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002261 u8 cqn_rcv[0x18];
2262
2263 u8 dbr_addr[0x40];
2264
2265 u8 q_key[0x20];
2266
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002269 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002270
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272 u8 rmsn[0x18];
2273
2274 u8 hw_sq_wqebb_counter[0x10];
2275 u8 sw_sq_wqebb_counter[0x10];
2276
2277 u8 hw_rq_counter[0x20];
2278
2279 u8 sw_rq_counter[0x20];
2280
Matan Barakb4ff3a32016-02-09 14:57:42 +02002281 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002282
Matan Barakb4ff3a32016-02-09 14:57:42 +02002283 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002284 u8 cgs[0x1];
2285 u8 cs_req[0x8];
2286 u8 cs_res[0x8];
2287
2288 u8 dc_access_key[0x40];
2289
Matan Barakb4ff3a32016-02-09 14:57:42 +02002290 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002291};
2292
2293struct mlx5_ifc_roce_addr_layout_bits {
2294 u8 source_l3_address[16][0x8];
2295
Matan Barakb4ff3a32016-02-09 14:57:42 +02002296 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002297 u8 vlan_valid[0x1];
2298 u8 vlan_id[0xc];
2299 u8 source_mac_47_32[0x10];
2300
2301 u8 source_mac_31_0[0x20];
2302
Matan Barakb4ff3a32016-02-09 14:57:42 +02002303 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002304 u8 roce_l3_type[0x4];
2305 u8 roce_version[0x8];
2306
Matan Barakb4ff3a32016-02-09 14:57:42 +02002307 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002308};
2309
2310union mlx5_ifc_hca_cap_union_bits {
2311 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2312 struct mlx5_ifc_odp_cap_bits odp_cap;
2313 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2314 struct mlx5_ifc_roce_cap_bits roce_cap;
2315 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2316 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002317 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002318 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002319 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002320 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002321 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002322 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002323};
2324
2325enum {
2326 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2327 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2328 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002329 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002330 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2331 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002332 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Or Gerlitz0c068972018-01-28 20:14:20 +02002333 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
2334 MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH = 0x100,
2335};
2336
2337struct mlx5_ifc_vlan_bits {
2338 u8 ethtype[0x10];
2339 u8 prio[0x3];
2340 u8 cfi[0x1];
2341 u8 vid[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002342};
2343
2344struct mlx5_ifc_flow_context_bits {
Or Gerlitz0c068972018-01-28 20:14:20 +02002345 struct mlx5_ifc_vlan_bits push_vlan;
Saeed Mahameede2816822015-05-28 22:28:40 +03002346
2347 u8 group_id[0x20];
2348
Matan Barakb4ff3a32016-02-09 14:57:42 +02002349 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002350 u8 flow_tag[0x18];
2351
Matan Barakb4ff3a32016-02-09 14:57:42 +02002352 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002353 u8 action[0x10];
2354
Matan Barakb4ff3a32016-02-09 14:57:42 +02002355 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002356 u8 destination_list_size[0x18];
2357
Amir Vadai9dc0b282016-05-13 12:55:39 +00002358 u8 reserved_at_a0[0x8];
2359 u8 flow_counter_list_size[0x18];
2360
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002361 u8 encap_id[0x20];
2362
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002363 u8 modify_header_id[0x20];
2364
2365 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002366
2367 struct mlx5_ifc_fte_match_param_bits match_value;
2368
Matan Barakb4ff3a32016-02-09 14:57:42 +02002369 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002370
Amir Vadai9dc0b282016-05-13 12:55:39 +00002371 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002372};
2373
2374enum {
2375 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2376 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2377};
2378
2379struct mlx5_ifc_xrc_srqc_bits {
2380 u8 state[0x4];
2381 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002382 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002383
2384 u8 wq_signature[0x1];
2385 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002386 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002387 u8 rlky[0x1];
2388 u8 basic_cyclic_rcv_wqe[0x1];
2389 u8 log_rq_stride[0x3];
2390 u8 xrcd[0x18];
2391
2392 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002393 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002394 u8 cqn[0x18];
2395
Matan Barakb4ff3a32016-02-09 14:57:42 +02002396 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002397
2398 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002399 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002400 u8 log_page_size[0x6];
2401 u8 user_index[0x18];
2402
Matan Barakb4ff3a32016-02-09 14:57:42 +02002403 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002404
Matan Barakb4ff3a32016-02-09 14:57:42 +02002405 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002406 u8 pd[0x18];
2407
2408 u8 lwm[0x10];
2409 u8 wqe_cnt[0x10];
2410
Matan Barakb4ff3a32016-02-09 14:57:42 +02002411 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002412
2413 u8 db_record_addr_h[0x20];
2414
2415 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002416 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002417
Matan Barakb4ff3a32016-02-09 14:57:42 +02002418 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002419};
2420
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02002421struct mlx5_ifc_vnic_diagnostic_statistics_bits {
2422 u8 counter_error_queues[0x20];
2423
2424 u8 total_error_queues[0x20];
2425
2426 u8 send_queue_priority_update_flow[0x20];
2427
2428 u8 reserved_at_60[0x20];
2429
2430 u8 nic_receive_steering_discard[0x40];
2431
2432 u8 receive_discard_vport_down[0x40];
2433
2434 u8 transmit_discard_vport_down[0x40];
2435
2436 u8 reserved_at_140[0xec0];
2437};
2438
Saeed Mahameede2816822015-05-28 22:28:40 +03002439struct mlx5_ifc_traffic_counter_bits {
2440 u8 packets[0x40];
2441
2442 u8 octets[0x40];
2443};
2444
2445struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002446 u8 strict_lag_tx_port_affinity[0x1];
2447 u8 reserved_at_1[0x3];
2448 u8 lag_tx_port_affinity[0x04];
2449
2450 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002451 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002452 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002453
Matan Barakb4ff3a32016-02-09 14:57:42 +02002454 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002455
Matan Barakb4ff3a32016-02-09 14:57:42 +02002456 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002457 u8 transport_domain[0x18];
2458
Erez Shitrit500a3d02017-04-13 06:36:51 +03002459 u8 reserved_at_140[0x8];
2460 u8 underlay_qpn[0x18];
2461 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462};
2463
2464enum {
2465 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2466 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2467};
2468
2469enum {
2470 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2471 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2472};
2473
2474enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002475 MLX5_RX_HASH_FN_NONE = 0x0,
2476 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2477 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002478};
2479
2480enum {
2481 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2482 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2483};
2484
2485struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002486 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002487
2488 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002489 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002490
Matan Barakb4ff3a32016-02-09 14:57:42 +02002491 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002492
Matan Barakb4ff3a32016-02-09 14:57:42 +02002493 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002494 u8 lro_timeout_period_usecs[0x10];
2495 u8 lro_enable_mask[0x4];
2496 u8 lro_max_ip_payload_size[0x8];
2497
Matan Barakb4ff3a32016-02-09 14:57:42 +02002498 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002499
Matan Barakb4ff3a32016-02-09 14:57:42 +02002500 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002501 u8 inline_rqn[0x18];
2502
2503 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002504 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002505 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002506 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002507 u8 indirect_table[0x18];
2508
2509 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002510 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002511 u8 self_lb_block[0x2];
2512 u8 transport_domain[0x18];
2513
2514 u8 rx_hash_toeplitz_key[10][0x20];
2515
2516 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2517
2518 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2519
Matan Barakb4ff3a32016-02-09 14:57:42 +02002520 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002521};
2522
2523enum {
2524 MLX5_SRQC_STATE_GOOD = 0x0,
2525 MLX5_SRQC_STATE_ERROR = 0x1,
2526};
2527
2528struct mlx5_ifc_srqc_bits {
2529 u8 state[0x4];
2530 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002531 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002532
2533 u8 wq_signature[0x1];
2534 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002537 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002538 u8 log_rq_stride[0x3];
2539 u8 xrcd[0x18];
2540
2541 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002542 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002543 u8 cqn[0x18];
2544
Matan Barakb4ff3a32016-02-09 14:57:42 +02002545 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002546
Matan Barakb4ff3a32016-02-09 14:57:42 +02002547 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002548 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002549 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002550
Matan Barakb4ff3a32016-02-09 14:57:42 +02002551 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002552
Matan Barakb4ff3a32016-02-09 14:57:42 +02002553 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002554 u8 pd[0x18];
2555
2556 u8 lwm[0x10];
2557 u8 wqe_cnt[0x10];
2558
Matan Barakb4ff3a32016-02-09 14:57:42 +02002559 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002560
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002561 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002562
Matan Barakb4ff3a32016-02-09 14:57:42 +02002563 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002564};
2565
2566enum {
2567 MLX5_SQC_STATE_RST = 0x0,
2568 MLX5_SQC_STATE_RDY = 0x1,
2569 MLX5_SQC_STATE_ERR = 0x3,
2570};
2571
2572struct mlx5_ifc_sqc_bits {
2573 u8 rlky[0x1];
2574 u8 cd_master[0x1];
2575 u8 fre[0x1];
2576 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002577 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002578 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002579 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002580 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002581 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002582 u8 hairpin[0x1];
2583 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002584
Matan Barakb4ff3a32016-02-09 14:57:42 +02002585 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002586 u8 user_index[0x18];
2587
Matan Barakb4ff3a32016-02-09 14:57:42 +02002588 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002589 u8 cqn[0x18];
2590
Or Gerlitz40817cd2017-06-25 12:38:45 +03002591 u8 reserved_at_60[0x8];
2592 u8 hairpin_peer_rq[0x18];
2593
2594 u8 reserved_at_80[0x10];
2595 u8 hairpin_peer_vhca[0x10];
2596
2597 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002598
Saeed Mahameed74862162016-06-09 15:11:34 +03002599 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002600 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002601 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002602
Matan Barakb4ff3a32016-02-09 14:57:42 +02002603 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002604
Matan Barakb4ff3a32016-02-09 14:57:42 +02002605 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002606 u8 tis_num_0[0x18];
2607
2608 struct mlx5_ifc_wq_bits wq;
2609};
2610
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002611enum {
2612 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2613 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2614 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2615 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2616};
2617
2618struct mlx5_ifc_scheduling_context_bits {
2619 u8 element_type[0x8];
2620 u8 reserved_at_8[0x18];
2621
2622 u8 element_attributes[0x20];
2623
2624 u8 parent_element_id[0x20];
2625
2626 u8 reserved_at_60[0x40];
2627
2628 u8 bw_share[0x20];
2629
2630 u8 max_average_bw[0x20];
2631
2632 u8 reserved_at_e0[0x120];
2633};
2634
Saeed Mahameede2816822015-05-28 22:28:40 +03002635struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002636 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002637
Matan Barakb4ff3a32016-02-09 14:57:42 +02002638 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002639 u8 rqt_max_size[0x10];
2640
Matan Barakb4ff3a32016-02-09 14:57:42 +02002641 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002642 u8 rqt_actual_size[0x10];
2643
Matan Barakb4ff3a32016-02-09 14:57:42 +02002644 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002645
2646 struct mlx5_ifc_rq_num_bits rq_num[0];
2647};
2648
2649enum {
2650 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2651 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2652};
2653
2654enum {
2655 MLX5_RQC_STATE_RST = 0x0,
2656 MLX5_RQC_STATE_RDY = 0x1,
2657 MLX5_RQC_STATE_ERR = 0x3,
2658};
2659
2660struct mlx5_ifc_rqc_bits {
2661 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002662 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002663 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002664 u8 vsd[0x1];
2665 u8 mem_rq_type[0x4];
2666 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002667 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002668 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002669 u8 hairpin[0x1];
2670 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002671
Matan Barakb4ff3a32016-02-09 14:57:42 +02002672 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002673 u8 user_index[0x18];
2674
Matan Barakb4ff3a32016-02-09 14:57:42 +02002675 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002676 u8 cqn[0x18];
2677
2678 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002679 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002680
Matan Barakb4ff3a32016-02-09 14:57:42 +02002681 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002682 u8 rmpn[0x18];
2683
Or Gerlitz40817cd2017-06-25 12:38:45 +03002684 u8 reserved_at_a0[0x8];
2685 u8 hairpin_peer_sq[0x18];
2686
2687 u8 reserved_at_c0[0x10];
2688 u8 hairpin_peer_vhca[0x10];
2689
2690 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002691
2692 struct mlx5_ifc_wq_bits wq;
2693};
2694
2695enum {
2696 MLX5_RMPC_STATE_RDY = 0x1,
2697 MLX5_RMPC_STATE_ERR = 0x3,
2698};
2699
2700struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002701 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002702 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002703 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002704
2705 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002706 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002707
Matan Barakb4ff3a32016-02-09 14:57:42 +02002708 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002709
2710 struct mlx5_ifc_wq_bits wq;
2711};
2712
Saeed Mahameede2816822015-05-28 22:28:40 +03002713struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002714 u8 reserved_at_0[0x5];
2715 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002716 u8 reserved_at_8[0x15];
2717 u8 disable_mc_local_lb[0x1];
2718 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002719 u8 roce_en[0x1];
2720
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002721 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002722 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002723 u8 event_on_mtu[0x1];
2724 u8 event_on_promisc_change[0x1];
2725 u8 event_on_vlan_change[0x1];
2726 u8 event_on_mc_address_change[0x1];
2727 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002728
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002729 u8 reserved_at_40[0xc];
2730
2731 u8 affiliation_criteria[0x4];
2732 u8 affiliated_vhca_id[0x10];
2733
2734 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002735
2736 u8 mtu[0x10];
2737
Achiad Shochat9efa7522015-12-23 18:47:20 +02002738 u8 system_image_guid[0x40];
2739 u8 port_guid[0x40];
2740 u8 node_guid[0x40];
2741
Matan Barakb4ff3a32016-02-09 14:57:42 +02002742 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002743 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002744 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002745
2746 u8 promisc_uc[0x1];
2747 u8 promisc_mc[0x1];
2748 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002749 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002750 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002751 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002752 u8 allowed_list_size[0xc];
2753
2754 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2755
Matan Barakb4ff3a32016-02-09 14:57:42 +02002756 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002757
2758 u8 current_uc_mac_address[0][0x40];
2759};
2760
2761enum {
2762 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2763 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2764 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002765 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002766 MLX5_MKC_ACCESS_MODE_MEMIC = 0x5,
Saeed Mahameede2816822015-05-28 22:28:40 +03002767};
2768
2769struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002770 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002771 u8 free[0x1];
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002772 u8 reserved_at_2[0x1];
2773 u8 access_mode_4_2[0x3];
2774 u8 reserved_at_6[0x7];
2775 u8 relaxed_ordering_write[0x1];
2776 u8 reserved_at_e[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002777 u8 small_fence_on_rdma_read_response[0x1];
2778 u8 umr_en[0x1];
2779 u8 a[0x1];
2780 u8 rw[0x1];
2781 u8 rr[0x1];
2782 u8 lw[0x1];
2783 u8 lr[0x1];
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002784 u8 access_mode_1_0[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002785 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002786
2787 u8 qpn[0x18];
2788 u8 mkey_7_0[0x8];
2789
Matan Barakb4ff3a32016-02-09 14:57:42 +02002790 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002791
2792 u8 length64[0x1];
2793 u8 bsf_en[0x1];
2794 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002795 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002796 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002797 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002798 u8 en_rinval[0x1];
2799 u8 pd[0x18];
2800
2801 u8 start_addr[0x40];
2802
2803 u8 len[0x40];
2804
2805 u8 bsf_octword_size[0x20];
2806
Matan Barakb4ff3a32016-02-09 14:57:42 +02002807 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002808
2809 u8 translations_octword_size[0x20];
2810
Matan Barakb4ff3a32016-02-09 14:57:42 +02002811 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002812 u8 log_page_size[0x5];
2813
Matan Barakb4ff3a32016-02-09 14:57:42 +02002814 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002815};
2816
2817struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002818 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002819 u8 pkey[0x10];
2820};
2821
2822struct mlx5_ifc_array128_auto_bits {
2823 u8 array128_auto[16][0x8];
2824};
2825
2826struct mlx5_ifc_hca_vport_context_bits {
2827 u8 field_select[0x20];
2828
Matan Barakb4ff3a32016-02-09 14:57:42 +02002829 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002830
2831 u8 sm_virt_aware[0x1];
2832 u8 has_smi[0x1];
2833 u8 has_raw[0x1];
2834 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002835 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002836 u8 port_physical_state[0x4];
2837 u8 vport_state_policy[0x4];
2838 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002839 u8 vport_state[0x4];
2840
Matan Barakb4ff3a32016-02-09 14:57:42 +02002841 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002842
2843 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002844
2845 u8 port_guid[0x40];
2846
2847 u8 node_guid[0x40];
2848
2849 u8 cap_mask1[0x20];
2850
2851 u8 cap_mask1_field_select[0x20];
2852
2853 u8 cap_mask2[0x20];
2854
2855 u8 cap_mask2_field_select[0x20];
2856
Matan Barakb4ff3a32016-02-09 14:57:42 +02002857 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002858
2859 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002860 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002861 u8 init_type_reply[0x4];
2862 u8 lmc[0x3];
2863 u8 subnet_timeout[0x5];
2864
2865 u8 sm_lid[0x10];
2866 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002867 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002868
2869 u8 qkey_violation_counter[0x10];
2870 u8 pkey_violation_counter[0x10];
2871
Matan Barakb4ff3a32016-02-09 14:57:42 +02002872 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002873};
2874
Saeed Mahameedd6666752015-12-01 18:03:22 +02002875struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002876 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002877 u8 vport_svlan_strip[0x1];
2878 u8 vport_cvlan_strip[0x1];
2879 u8 vport_svlan_insert[0x1];
2880 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002881 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002882
Matan Barakb4ff3a32016-02-09 14:57:42 +02002883 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002884
2885 u8 svlan_cfi[0x1];
2886 u8 svlan_pcp[0x3];
2887 u8 svlan_id[0xc];
2888 u8 cvlan_cfi[0x1];
2889 u8 cvlan_pcp[0x3];
2890 u8 cvlan_id[0xc];
2891
Matan Barakb4ff3a32016-02-09 14:57:42 +02002892 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002893};
2894
Saeed Mahameede2816822015-05-28 22:28:40 +03002895enum {
2896 MLX5_EQC_STATUS_OK = 0x0,
2897 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2898};
2899
2900enum {
2901 MLX5_EQC_ST_ARMED = 0x9,
2902 MLX5_EQC_ST_FIRED = 0xa,
2903};
2904
2905struct mlx5_ifc_eqc_bits {
2906 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002907 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002908 u8 ec[0x1];
2909 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002910 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002911 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002912 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002913
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915
Matan Barakb4ff3a32016-02-09 14:57:42 +02002916 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002917 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919
Matan Barakb4ff3a32016-02-09 14:57:42 +02002920 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002921 u8 log_eq_size[0x5];
2922 u8 uar_page[0x18];
2923
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002925
Matan Barakb4ff3a32016-02-09 14:57:42 +02002926 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002927 u8 intr[0x8];
2928
Matan Barakb4ff3a32016-02-09 14:57:42 +02002929 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002930 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002931 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932
Matan Barakb4ff3a32016-02-09 14:57:42 +02002933 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002934
Matan Barakb4ff3a32016-02-09 14:57:42 +02002935 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002936 u8 consumer_counter[0x18];
2937
Matan Barakb4ff3a32016-02-09 14:57:42 +02002938 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002939 u8 producer_counter[0x18];
2940
Matan Barakb4ff3a32016-02-09 14:57:42 +02002941 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002942};
2943
2944enum {
2945 MLX5_DCTC_STATE_ACTIVE = 0x0,
2946 MLX5_DCTC_STATE_DRAINING = 0x1,
2947 MLX5_DCTC_STATE_DRAINED = 0x2,
2948};
2949
2950enum {
2951 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2952 MLX5_DCTC_CS_RES_NA = 0x1,
2953 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2954};
2955
2956enum {
2957 MLX5_DCTC_MTU_256_BYTES = 0x1,
2958 MLX5_DCTC_MTU_512_BYTES = 0x2,
2959 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2960 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2961 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2962};
2963
2964struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002965 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002966 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002968
Matan Barakb4ff3a32016-02-09 14:57:42 +02002969 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002970 u8 user_index[0x18];
2971
Matan Barakb4ff3a32016-02-09 14:57:42 +02002972 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002973 u8 cqn[0x18];
2974
2975 u8 counter_set_id[0x8];
2976 u8 atomic_mode[0x4];
2977 u8 rre[0x1];
2978 u8 rwe[0x1];
2979 u8 rae[0x1];
2980 u8 atomic_like_write_en[0x1];
2981 u8 latency_sensitive[0x1];
2982 u8 rlky[0x1];
2983 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002984 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002985
Matan Barakb4ff3a32016-02-09 14:57:42 +02002986 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002987 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002988 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002989 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002990 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002991
Matan Barakb4ff3a32016-02-09 14:57:42 +02002992 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002993 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002994
Matan Barakb4ff3a32016-02-09 14:57:42 +02002995 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002996 u8 pd[0x18];
2997
2998 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002999 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003000 u8 flow_label[0x14];
3001
3002 u8 dc_access_key[0x40];
3003
Matan Barakb4ff3a32016-02-09 14:57:42 +02003004 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03003005 u8 mtu[0x3];
3006 u8 port[0x8];
3007 u8 pkey_index[0x10];
3008
Matan Barakb4ff3a32016-02-09 14:57:42 +02003009 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003010 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003011 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003012 u8 hop_limit[0x8];
3013
3014 u8 dc_access_key_violation_count[0x20];
3015
Matan Barakb4ff3a32016-02-09 14:57:42 +02003016 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003017 u8 dei_cfi[0x1];
3018 u8 eth_prio[0x3];
3019 u8 ecn[0x2];
3020 u8 dscp[0x6];
3021
Matan Barakb4ff3a32016-02-09 14:57:42 +02003022 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003023};
3024
3025enum {
3026 MLX5_CQC_STATUS_OK = 0x0,
3027 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
3028 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
3029};
3030
3031enum {
3032 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
3033 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
3034};
3035
3036enum {
3037 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
3038 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
3039 MLX5_CQC_ST_FIRED = 0xa,
3040};
3041
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003042enum {
3043 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
3044 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03003045 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003046};
3047
Saeed Mahameede2816822015-05-28 22:28:40 +03003048struct mlx5_ifc_cqc_bits {
3049 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003050 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003051 u8 cqe_sz[0x3];
3052 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003053 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003054 u8 scqe_break_moderation_en[0x1];
3055 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003056 u8 cq_period_mode[0x2];
3057 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003058 u8 mini_cqe_res_format[0x2];
3059 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003060 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003061
Matan Barakb4ff3a32016-02-09 14:57:42 +02003062 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003063
Matan Barakb4ff3a32016-02-09 14:57:42 +02003064 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003065 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003066 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003067
Matan Barakb4ff3a32016-02-09 14:57:42 +02003068 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003069 u8 log_cq_size[0x5];
3070 u8 uar_page[0x18];
3071
Matan Barakb4ff3a32016-02-09 14:57:42 +02003072 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003073 u8 cq_period[0xc];
3074 u8 cq_max_count[0x10];
3075
Matan Barakb4ff3a32016-02-09 14:57:42 +02003076 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003077 u8 c_eqn[0x8];
3078
Matan Barakb4ff3a32016-02-09 14:57:42 +02003079 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003080 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003081 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003082
Matan Barakb4ff3a32016-02-09 14:57:42 +02003083 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003084
Matan Barakb4ff3a32016-02-09 14:57:42 +02003085 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003086 u8 last_notified_index[0x18];
3087
Matan Barakb4ff3a32016-02-09 14:57:42 +02003088 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003089 u8 last_solicit_index[0x18];
3090
Matan Barakb4ff3a32016-02-09 14:57:42 +02003091 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003092 u8 consumer_counter[0x18];
3093
Matan Barakb4ff3a32016-02-09 14:57:42 +02003094 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003095 u8 producer_counter[0x18];
3096
Matan Barakb4ff3a32016-02-09 14:57:42 +02003097 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003098
3099 u8 dbr_addr[0x40];
3100};
3101
3102union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3103 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3104 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3105 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003106 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003107};
3108
3109struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003110 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003111
Matan Barakb4ff3a32016-02-09 14:57:42 +02003112 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003113 u8 ieee_vendor_id[0x18];
3114
Matan Barakb4ff3a32016-02-09 14:57:42 +02003115 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003116 u8 vsd_vendor_id[0x10];
3117
3118 u8 vsd[208][0x8];
3119
3120 u8 vsd_contd_psid[16][0x8];
3121};
3122
Saeed Mahameed74862162016-06-09 15:11:34 +03003123enum {
3124 MLX5_XRQC_STATE_GOOD = 0x0,
3125 MLX5_XRQC_STATE_ERROR = 0x1,
3126};
3127
3128enum {
3129 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3130 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3131};
3132
3133enum {
3134 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3135};
3136
3137struct mlx5_ifc_tag_matching_topology_context_bits {
3138 u8 log_matching_list_sz[0x4];
3139 u8 reserved_at_4[0xc];
3140 u8 append_next_index[0x10];
3141
3142 u8 sw_phase_cnt[0x10];
3143 u8 hw_phase_cnt[0x10];
3144
3145 u8 reserved_at_40[0x40];
3146};
3147
3148struct mlx5_ifc_xrqc_bits {
3149 u8 state[0x4];
3150 u8 rlkey[0x1];
3151 u8 reserved_at_5[0xf];
3152 u8 topology[0x4];
3153 u8 reserved_at_18[0x4];
3154 u8 offload[0x4];
3155
3156 u8 reserved_at_20[0x8];
3157 u8 user_index[0x18];
3158
3159 u8 reserved_at_40[0x8];
3160 u8 cqn[0x18];
3161
3162 u8 reserved_at_60[0xa0];
3163
3164 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3165
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003166 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003167
3168 struct mlx5_ifc_wq_bits wq;
3169};
3170
Saeed Mahameede2816822015-05-28 22:28:40 +03003171union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3172 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3173 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003174 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003175};
3176
3177union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3178 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3179 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3180 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003181 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003182};
3183
3184union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3185 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3186 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3187 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3188 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3189 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3190 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3191 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003192 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003193 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003194 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196};
3197
Gal Pressman8ed1a632016-11-17 13:46:01 +02003198union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3199 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3200 u8 reserved_at_0[0x7c0];
3201};
3202
Saeed Mahameede2816822015-05-28 22:28:40 +03003203union mlx5_ifc_event_auto_bits {
3204 struct mlx5_ifc_comp_event_bits comp_event;
3205 struct mlx5_ifc_dct_events_bits dct_events;
3206 struct mlx5_ifc_qp_events_bits qp_events;
3207 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3208 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3209 struct mlx5_ifc_cq_error_bits cq_error;
3210 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3211 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3212 struct mlx5_ifc_gpio_event_bits gpio_event;
3213 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3214 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3215 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003216 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003217};
3218
3219struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003220 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003221
3222 u8 assert_existptr[0x20];
3223
3224 u8 assert_callra[0x20];
3225
Matan Barakb4ff3a32016-02-09 14:57:42 +02003226 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003227
3228 u8 fw_version[0x20];
3229
3230 u8 hw_id[0x20];
3231
Matan Barakb4ff3a32016-02-09 14:57:42 +02003232 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003233
3234 u8 irisc_index[0x8];
3235 u8 synd[0x8];
3236 u8 ext_synd[0x10];
3237};
3238
3239struct mlx5_ifc_register_loopback_control_bits {
3240 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003241 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003242 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003243 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003244
Matan Barakb4ff3a32016-02-09 14:57:42 +02003245 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003246};
3247
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003248struct mlx5_ifc_vport_tc_element_bits {
3249 u8 traffic_class[0x4];
3250 u8 reserved_at_4[0xc];
3251 u8 vport_number[0x10];
3252};
3253
3254struct mlx5_ifc_vport_element_bits {
3255 u8 reserved_at_0[0x10];
3256 u8 vport_number[0x10];
3257};
3258
3259enum {
3260 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3261 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3262 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3263};
3264
3265struct mlx5_ifc_tsar_element_bits {
3266 u8 reserved_at_0[0x8];
3267 u8 tsar_type[0x8];
3268 u8 reserved_at_10[0x10];
3269};
3270
Majd Dibbiny8812c242017-02-09 14:20:12 +02003271enum {
3272 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3273 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3274};
3275
Saeed Mahameede2816822015-05-28 22:28:40 +03003276struct mlx5_ifc_teardown_hca_out_bits {
3277 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003278 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003279
3280 u8 syndrome[0x20];
3281
Majd Dibbiny8812c242017-02-09 14:20:12 +02003282 u8 reserved_at_40[0x3f];
3283
3284 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003285};
3286
3287enum {
3288 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003289 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003290};
3291
3292struct mlx5_ifc_teardown_hca_in_bits {
3293 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003294 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003295
Matan Barakb4ff3a32016-02-09 14:57:42 +02003296 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003297 u8 op_mod[0x10];
3298
Matan Barakb4ff3a32016-02-09 14:57:42 +02003299 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003300 u8 profile[0x10];
3301
Matan Barakb4ff3a32016-02-09 14:57:42 +02003302 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003303};
3304
3305struct mlx5_ifc_sqerr2rts_qp_out_bits {
3306 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003307 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003308
3309 u8 syndrome[0x20];
3310
Matan Barakb4ff3a32016-02-09 14:57:42 +02003311 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003312};
3313
3314struct mlx5_ifc_sqerr2rts_qp_in_bits {
3315 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003316 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003317
Matan Barakb4ff3a32016-02-09 14:57:42 +02003318 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003319 u8 op_mod[0x10];
3320
Matan Barakb4ff3a32016-02-09 14:57:42 +02003321 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003322 u8 qpn[0x18];
3323
Matan Barakb4ff3a32016-02-09 14:57:42 +02003324 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003325
3326 u8 opt_param_mask[0x20];
3327
Matan Barakb4ff3a32016-02-09 14:57:42 +02003328 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003329
3330 struct mlx5_ifc_qpc_bits qpc;
3331
Matan Barakb4ff3a32016-02-09 14:57:42 +02003332 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003333};
3334
3335struct mlx5_ifc_sqd2rts_qp_out_bits {
3336 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003337 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003338
3339 u8 syndrome[0x20];
3340
Matan Barakb4ff3a32016-02-09 14:57:42 +02003341 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003342};
3343
3344struct mlx5_ifc_sqd2rts_qp_in_bits {
3345 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347
Matan Barakb4ff3a32016-02-09 14:57:42 +02003348 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003349 u8 op_mod[0x10];
3350
Matan Barakb4ff3a32016-02-09 14:57:42 +02003351 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003352 u8 qpn[0x18];
3353
Matan Barakb4ff3a32016-02-09 14:57:42 +02003354 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003355
3356 u8 opt_param_mask[0x20];
3357
Matan Barakb4ff3a32016-02-09 14:57:42 +02003358 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003359
3360 struct mlx5_ifc_qpc_bits qpc;
3361
Matan Barakb4ff3a32016-02-09 14:57:42 +02003362 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003363};
3364
3365struct mlx5_ifc_set_roce_address_out_bits {
3366 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003368
3369 u8 syndrome[0x20];
3370
Matan Barakb4ff3a32016-02-09 14:57:42 +02003371 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003372};
3373
3374struct mlx5_ifc_set_roce_address_in_bits {
3375 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377
Matan Barakb4ff3a32016-02-09 14:57:42 +02003378 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003379 u8 op_mod[0x10];
3380
3381 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003382 u8 reserved_at_50[0xc];
3383 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003384
Matan Barakb4ff3a32016-02-09 14:57:42 +02003385 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003386
3387 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3388};
3389
3390struct mlx5_ifc_set_mad_demux_out_bits {
3391 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003392 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003393
3394 u8 syndrome[0x20];
3395
Matan Barakb4ff3a32016-02-09 14:57:42 +02003396 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003397};
3398
3399enum {
3400 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3401 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3402};
3403
3404struct mlx5_ifc_set_mad_demux_in_bits {
3405 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409 u8 op_mod[0x10];
3410
Matan Barakb4ff3a32016-02-09 14:57:42 +02003411 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003412
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003415 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003416};
3417
3418struct mlx5_ifc_set_l2_table_entry_out_bits {
3419 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003420 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003421
3422 u8 syndrome[0x20];
3423
Matan Barakb4ff3a32016-02-09 14:57:42 +02003424 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003425};
3426
3427struct mlx5_ifc_set_l2_table_entry_in_bits {
3428 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430
Matan Barakb4ff3a32016-02-09 14:57:42 +02003431 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003432 u8 op_mod[0x10];
3433
Matan Barakb4ff3a32016-02-09 14:57:42 +02003434 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003435
Matan Barakb4ff3a32016-02-09 14:57:42 +02003436 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003437 u8 table_index[0x18];
3438
Matan Barakb4ff3a32016-02-09 14:57:42 +02003439 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003440
Matan Barakb4ff3a32016-02-09 14:57:42 +02003441 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003442 u8 vlan_valid[0x1];
3443 u8 vlan[0xc];
3444
3445 struct mlx5_ifc_mac_address_layout_bits mac_address;
3446
Matan Barakb4ff3a32016-02-09 14:57:42 +02003447 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003448};
3449
3450struct mlx5_ifc_set_issi_out_bits {
3451 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003452 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003453
3454 u8 syndrome[0x20];
3455
Matan Barakb4ff3a32016-02-09 14:57:42 +02003456 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003457};
3458
3459struct mlx5_ifc_set_issi_in_bits {
3460 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003461 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003462
Matan Barakb4ff3a32016-02-09 14:57:42 +02003463 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003464 u8 op_mod[0x10];
3465
Matan Barakb4ff3a32016-02-09 14:57:42 +02003466 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003467 u8 current_issi[0x10];
3468
Matan Barakb4ff3a32016-02-09 14:57:42 +02003469 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003470};
3471
3472struct mlx5_ifc_set_hca_cap_out_bits {
3473 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003474 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003475
3476 u8 syndrome[0x20];
3477
Matan Barakb4ff3a32016-02-09 14:57:42 +02003478 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003479};
3480
3481struct mlx5_ifc_set_hca_cap_in_bits {
3482 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003483 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003484
Matan Barakb4ff3a32016-02-09 14:57:42 +02003485 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003486 u8 op_mod[0x10];
3487
Matan Barakb4ff3a32016-02-09 14:57:42 +02003488 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003489
Saeed Mahameede2816822015-05-28 22:28:40 +03003490 union mlx5_ifc_hca_cap_union_bits capability;
3491};
3492
Maor Gottlieb26a81452015-12-10 17:12:39 +02003493enum {
3494 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3495 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3496 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3497 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3498};
3499
Saeed Mahameede2816822015-05-28 22:28:40 +03003500struct mlx5_ifc_set_fte_out_bits {
3501 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003502 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003503
3504 u8 syndrome[0x20];
3505
Matan Barakb4ff3a32016-02-09 14:57:42 +02003506 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003507};
3508
3509struct mlx5_ifc_set_fte_in_bits {
3510 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003511 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003512
Matan Barakb4ff3a32016-02-09 14:57:42 +02003513 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003514 u8 op_mod[0x10];
3515
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003516 u8 other_vport[0x1];
3517 u8 reserved_at_41[0xf];
3518 u8 vport_number[0x10];
3519
3520 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003521
3522 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003523 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003524
Matan Barakb4ff3a32016-02-09 14:57:42 +02003525 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003526 u8 table_id[0x18];
3527
Matan Barakb4ff3a32016-02-09 14:57:42 +02003528 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003529 u8 modify_enable_mask[0x8];
3530
Matan Barakb4ff3a32016-02-09 14:57:42 +02003531 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003532
3533 u8 flow_index[0x20];
3534
Matan Barakb4ff3a32016-02-09 14:57:42 +02003535 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003536
3537 struct mlx5_ifc_flow_context_bits flow_context;
3538};
3539
3540struct mlx5_ifc_rts2rts_qp_out_bits {
3541 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003542 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003543
3544 u8 syndrome[0x20];
3545
Matan Barakb4ff3a32016-02-09 14:57:42 +02003546 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003547};
3548
3549struct mlx5_ifc_rts2rts_qp_in_bits {
3550 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552
Matan Barakb4ff3a32016-02-09 14:57:42 +02003553 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003554 u8 op_mod[0x10];
3555
Matan Barakb4ff3a32016-02-09 14:57:42 +02003556 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003557 u8 qpn[0x18];
3558
Matan Barakb4ff3a32016-02-09 14:57:42 +02003559 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003560
3561 u8 opt_param_mask[0x20];
3562
Matan Barakb4ff3a32016-02-09 14:57:42 +02003563 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003564
3565 struct mlx5_ifc_qpc_bits qpc;
3566
Matan Barakb4ff3a32016-02-09 14:57:42 +02003567 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003568};
3569
3570struct mlx5_ifc_rtr2rts_qp_out_bits {
3571 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003572 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003573
3574 u8 syndrome[0x20];
3575
Matan Barakb4ff3a32016-02-09 14:57:42 +02003576 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003577};
3578
3579struct mlx5_ifc_rtr2rts_qp_in_bits {
3580 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003581 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003582
Matan Barakb4ff3a32016-02-09 14:57:42 +02003583 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003584 u8 op_mod[0x10];
3585
Matan Barakb4ff3a32016-02-09 14:57:42 +02003586 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003587 u8 qpn[0x18];
3588
Matan Barakb4ff3a32016-02-09 14:57:42 +02003589 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003590
3591 u8 opt_param_mask[0x20];
3592
Matan Barakb4ff3a32016-02-09 14:57:42 +02003593 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003594
3595 struct mlx5_ifc_qpc_bits qpc;
3596
Matan Barakb4ff3a32016-02-09 14:57:42 +02003597 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003598};
3599
3600struct mlx5_ifc_rst2init_qp_out_bits {
3601 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003602 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003603
3604 u8 syndrome[0x20];
3605
Matan Barakb4ff3a32016-02-09 14:57:42 +02003606 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003607};
3608
3609struct mlx5_ifc_rst2init_qp_in_bits {
3610 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003611 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003612
Matan Barakb4ff3a32016-02-09 14:57:42 +02003613 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003614 u8 op_mod[0x10];
3615
Matan Barakb4ff3a32016-02-09 14:57:42 +02003616 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003617 u8 qpn[0x18];
3618
Matan Barakb4ff3a32016-02-09 14:57:42 +02003619 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003620
3621 u8 opt_param_mask[0x20];
3622
Matan Barakb4ff3a32016-02-09 14:57:42 +02003623 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003624
3625 struct mlx5_ifc_qpc_bits qpc;
3626
Matan Barakb4ff3a32016-02-09 14:57:42 +02003627 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003628};
3629
Saeed Mahameed74862162016-06-09 15:11:34 +03003630struct mlx5_ifc_query_xrq_out_bits {
3631 u8 status[0x8];
3632 u8 reserved_at_8[0x18];
3633
3634 u8 syndrome[0x20];
3635
3636 u8 reserved_at_40[0x40];
3637
3638 struct mlx5_ifc_xrqc_bits xrq_context;
3639};
3640
3641struct mlx5_ifc_query_xrq_in_bits {
3642 u8 opcode[0x10];
3643 u8 reserved_at_10[0x10];
3644
3645 u8 reserved_at_20[0x10];
3646 u8 op_mod[0x10];
3647
3648 u8 reserved_at_40[0x8];
3649 u8 xrqn[0x18];
3650
3651 u8 reserved_at_60[0x20];
3652};
3653
Saeed Mahameede2816822015-05-28 22:28:40 +03003654struct mlx5_ifc_query_xrc_srq_out_bits {
3655 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003656 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003657
3658 u8 syndrome[0x20];
3659
Matan Barakb4ff3a32016-02-09 14:57:42 +02003660 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003661
3662 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3663
Matan Barakb4ff3a32016-02-09 14:57:42 +02003664 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003665
3666 u8 pas[0][0x40];
3667};
3668
3669struct mlx5_ifc_query_xrc_srq_in_bits {
3670 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003671 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003672
Matan Barakb4ff3a32016-02-09 14:57:42 +02003673 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003674 u8 op_mod[0x10];
3675
Matan Barakb4ff3a32016-02-09 14:57:42 +02003676 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003677 u8 xrc_srqn[0x18];
3678
Matan Barakb4ff3a32016-02-09 14:57:42 +02003679 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003680};
3681
3682enum {
3683 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3684 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3685};
3686
3687struct mlx5_ifc_query_vport_state_out_bits {
3688 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003689 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003690
3691 u8 syndrome[0x20];
3692
Matan Barakb4ff3a32016-02-09 14:57:42 +02003693 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003694
Matan Barakb4ff3a32016-02-09 14:57:42 +02003695 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003696 u8 admin_state[0x4];
3697 u8 state[0x4];
3698};
3699
3700enum {
3701 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003702 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003703};
3704
3705struct mlx5_ifc_query_vport_state_in_bits {
3706 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003707 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003708
Matan Barakb4ff3a32016-02-09 14:57:42 +02003709 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003710 u8 op_mod[0x10];
3711
3712 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003713 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003714 u8 vport_number[0x10];
3715
Matan Barakb4ff3a32016-02-09 14:57:42 +02003716 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003717};
3718
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02003719struct mlx5_ifc_query_vnic_env_out_bits {
3720 u8 status[0x8];
3721 u8 reserved_at_8[0x18];
3722
3723 u8 syndrome[0x20];
3724
3725 u8 reserved_at_40[0x40];
3726
3727 struct mlx5_ifc_vnic_diagnostic_statistics_bits vport_env;
3728};
3729
3730enum {
3731 MLX5_QUERY_VNIC_ENV_IN_OP_MOD_VPORT_DIAG_STATISTICS = 0x0,
3732};
3733
3734struct mlx5_ifc_query_vnic_env_in_bits {
3735 u8 opcode[0x10];
3736 u8 reserved_at_10[0x10];
3737
3738 u8 reserved_at_20[0x10];
3739 u8 op_mod[0x10];
3740
3741 u8 other_vport[0x1];
3742 u8 reserved_at_41[0xf];
3743 u8 vport_number[0x10];
3744
3745 u8 reserved_at_60[0x20];
3746};
3747
Saeed Mahameede2816822015-05-28 22:28:40 +03003748struct mlx5_ifc_query_vport_counter_out_bits {
3749 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003750 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003751
3752 u8 syndrome[0x20];
3753
Matan Barakb4ff3a32016-02-09 14:57:42 +02003754 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003755
3756 struct mlx5_ifc_traffic_counter_bits received_errors;
3757
3758 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3759
3760 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3761
3762 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3763
3764 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3765
3766 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3767
3768 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3769
3770 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3771
3772 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3773
3774 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3775
3776 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3777
3778 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3779
Matan Barakb4ff3a32016-02-09 14:57:42 +02003780 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003781};
3782
3783enum {
3784 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3785};
3786
3787struct mlx5_ifc_query_vport_counter_in_bits {
3788 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003789 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003790
Matan Barakb4ff3a32016-02-09 14:57:42 +02003791 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003792 u8 op_mod[0x10];
3793
3794 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003795 u8 reserved_at_41[0xb];
3796 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003797 u8 vport_number[0x10];
3798
Matan Barakb4ff3a32016-02-09 14:57:42 +02003799 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003800
3801 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003802 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003803
Matan Barakb4ff3a32016-02-09 14:57:42 +02003804 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003805};
3806
3807struct mlx5_ifc_query_tis_out_bits {
3808 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003809 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003810
3811 u8 syndrome[0x20];
3812
Matan Barakb4ff3a32016-02-09 14:57:42 +02003813 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003814
3815 struct mlx5_ifc_tisc_bits tis_context;
3816};
3817
3818struct mlx5_ifc_query_tis_in_bits {
3819 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003820 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003821
Matan Barakb4ff3a32016-02-09 14:57:42 +02003822 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003823 u8 op_mod[0x10];
3824
Matan Barakb4ff3a32016-02-09 14:57:42 +02003825 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003826 u8 tisn[0x18];
3827
Matan Barakb4ff3a32016-02-09 14:57:42 +02003828 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003829};
3830
3831struct mlx5_ifc_query_tir_out_bits {
3832 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003833 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003834
3835 u8 syndrome[0x20];
3836
Matan Barakb4ff3a32016-02-09 14:57:42 +02003837 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003838
3839 struct mlx5_ifc_tirc_bits tir_context;
3840};
3841
3842struct mlx5_ifc_query_tir_in_bits {
3843 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003844 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003845
Matan Barakb4ff3a32016-02-09 14:57:42 +02003846 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003847 u8 op_mod[0x10];
3848
Matan Barakb4ff3a32016-02-09 14:57:42 +02003849 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003850 u8 tirn[0x18];
3851
Matan Barakb4ff3a32016-02-09 14:57:42 +02003852 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003853};
3854
3855struct mlx5_ifc_query_srq_out_bits {
3856 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003857 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003858
3859 u8 syndrome[0x20];
3860
Matan Barakb4ff3a32016-02-09 14:57:42 +02003861 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003862
3863 struct mlx5_ifc_srqc_bits srq_context_entry;
3864
Matan Barakb4ff3a32016-02-09 14:57:42 +02003865 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003866
3867 u8 pas[0][0x40];
3868};
3869
3870struct mlx5_ifc_query_srq_in_bits {
3871 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003872 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003873
Matan Barakb4ff3a32016-02-09 14:57:42 +02003874 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003875 u8 op_mod[0x10];
3876
Matan Barakb4ff3a32016-02-09 14:57:42 +02003877 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003878 u8 srqn[0x18];
3879
Matan Barakb4ff3a32016-02-09 14:57:42 +02003880 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003881};
3882
3883struct mlx5_ifc_query_sq_out_bits {
3884 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003885 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003886
3887 u8 syndrome[0x20];
3888
Matan Barakb4ff3a32016-02-09 14:57:42 +02003889 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003890
3891 struct mlx5_ifc_sqc_bits sq_context;
3892};
3893
3894struct mlx5_ifc_query_sq_in_bits {
3895 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003896 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003897
Matan Barakb4ff3a32016-02-09 14:57:42 +02003898 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003899 u8 op_mod[0x10];
3900
Matan Barakb4ff3a32016-02-09 14:57:42 +02003901 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003902 u8 sqn[0x18];
3903
Matan Barakb4ff3a32016-02-09 14:57:42 +02003904 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003905};
3906
3907struct mlx5_ifc_query_special_contexts_out_bits {
3908 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003909 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003910
3911 u8 syndrome[0x20];
3912
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003913 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003914
3915 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003916
3917 u8 null_mkey[0x20];
3918
3919 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003920};
3921
3922struct mlx5_ifc_query_special_contexts_in_bits {
3923 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003924 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003925
Matan Barakb4ff3a32016-02-09 14:57:42 +02003926 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003927 u8 op_mod[0x10];
3928
Matan Barakb4ff3a32016-02-09 14:57:42 +02003929 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003930};
3931
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003932struct mlx5_ifc_query_scheduling_element_out_bits {
3933 u8 opcode[0x10];
3934 u8 reserved_at_10[0x10];
3935
3936 u8 reserved_at_20[0x10];
3937 u8 op_mod[0x10];
3938
3939 u8 reserved_at_40[0xc0];
3940
3941 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3942
3943 u8 reserved_at_300[0x100];
3944};
3945
3946enum {
3947 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3948};
3949
3950struct mlx5_ifc_query_scheduling_element_in_bits {
3951 u8 opcode[0x10];
3952 u8 reserved_at_10[0x10];
3953
3954 u8 reserved_at_20[0x10];
3955 u8 op_mod[0x10];
3956
3957 u8 scheduling_hierarchy[0x8];
3958 u8 reserved_at_48[0x18];
3959
3960 u8 scheduling_element_id[0x20];
3961
3962 u8 reserved_at_80[0x180];
3963};
3964
Saeed Mahameede2816822015-05-28 22:28:40 +03003965struct mlx5_ifc_query_rqt_out_bits {
3966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003968
3969 u8 syndrome[0x20];
3970
Matan Barakb4ff3a32016-02-09 14:57:42 +02003971 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003972
3973 struct mlx5_ifc_rqtc_bits rqt_context;
3974};
3975
3976struct mlx5_ifc_query_rqt_in_bits {
3977 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003978 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003979
Matan Barakb4ff3a32016-02-09 14:57:42 +02003980 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003981 u8 op_mod[0x10];
3982
Matan Barakb4ff3a32016-02-09 14:57:42 +02003983 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003984 u8 rqtn[0x18];
3985
Matan Barakb4ff3a32016-02-09 14:57:42 +02003986 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003987};
3988
3989struct mlx5_ifc_query_rq_out_bits {
3990 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003991 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003992
3993 u8 syndrome[0x20];
3994
Matan Barakb4ff3a32016-02-09 14:57:42 +02003995 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003996
3997 struct mlx5_ifc_rqc_bits rq_context;
3998};
3999
4000struct mlx5_ifc_query_rq_in_bits {
4001 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004002 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004003
Matan Barakb4ff3a32016-02-09 14:57:42 +02004004 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004005 u8 op_mod[0x10];
4006
Matan Barakb4ff3a32016-02-09 14:57:42 +02004007 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004008 u8 rqn[0x18];
4009
Matan Barakb4ff3a32016-02-09 14:57:42 +02004010 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004011};
4012
4013struct mlx5_ifc_query_roce_address_out_bits {
4014 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016
4017 u8 syndrome[0x20];
4018
Matan Barakb4ff3a32016-02-09 14:57:42 +02004019 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004020
4021 struct mlx5_ifc_roce_addr_layout_bits roce_address;
4022};
4023
4024struct mlx5_ifc_query_roce_address_in_bits {
4025 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004026 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004027
Matan Barakb4ff3a32016-02-09 14:57:42 +02004028 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004029 u8 op_mod[0x10];
4030
4031 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02004032 u8 reserved_at_50[0xc];
4033 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034
Matan Barakb4ff3a32016-02-09 14:57:42 +02004035 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004036};
4037
4038struct mlx5_ifc_query_rmp_out_bits {
4039 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004040 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004041
4042 u8 syndrome[0x20];
4043
Matan Barakb4ff3a32016-02-09 14:57:42 +02004044 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004045
4046 struct mlx5_ifc_rmpc_bits rmp_context;
4047};
4048
4049struct mlx5_ifc_query_rmp_in_bits {
4050 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004051 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004052
Matan Barakb4ff3a32016-02-09 14:57:42 +02004053 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004054 u8 op_mod[0x10];
4055
Matan Barakb4ff3a32016-02-09 14:57:42 +02004056 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004057 u8 rmpn[0x18];
4058
Matan Barakb4ff3a32016-02-09 14:57:42 +02004059 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004060};
4061
4062struct mlx5_ifc_query_qp_out_bits {
4063 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004064 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004065
4066 u8 syndrome[0x20];
4067
Matan Barakb4ff3a32016-02-09 14:57:42 +02004068 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004069
4070 u8 opt_param_mask[0x20];
4071
Matan Barakb4ff3a32016-02-09 14:57:42 +02004072 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004073
4074 struct mlx5_ifc_qpc_bits qpc;
4075
Matan Barakb4ff3a32016-02-09 14:57:42 +02004076 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004077
4078 u8 pas[0][0x40];
4079};
4080
4081struct mlx5_ifc_query_qp_in_bits {
4082 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004083 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004084
Matan Barakb4ff3a32016-02-09 14:57:42 +02004085 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004086 u8 op_mod[0x10];
4087
Matan Barakb4ff3a32016-02-09 14:57:42 +02004088 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004089 u8 qpn[0x18];
4090
Matan Barakb4ff3a32016-02-09 14:57:42 +02004091 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004092};
4093
4094struct mlx5_ifc_query_q_counter_out_bits {
4095 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004096 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004097
4098 u8 syndrome[0x20];
4099
Matan Barakb4ff3a32016-02-09 14:57:42 +02004100 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004101
4102 u8 rx_write_requests[0x20];
4103
Matan Barakb4ff3a32016-02-09 14:57:42 +02004104 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004105
4106 u8 rx_read_requests[0x20];
4107
Matan Barakb4ff3a32016-02-09 14:57:42 +02004108 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004109
4110 u8 rx_atomic_requests[0x20];
4111
Matan Barakb4ff3a32016-02-09 14:57:42 +02004112 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004113
4114 u8 rx_dct_connect[0x20];
4115
Matan Barakb4ff3a32016-02-09 14:57:42 +02004116 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004117
4118 u8 out_of_buffer[0x20];
4119
Matan Barakb4ff3a32016-02-09 14:57:42 +02004120 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004121
4122 u8 out_of_sequence[0x20];
4123
Saeed Mahameed74862162016-06-09 15:11:34 +03004124 u8 reserved_at_1e0[0x20];
4125
4126 u8 duplicate_request[0x20];
4127
4128 u8 reserved_at_220[0x20];
4129
4130 u8 rnr_nak_retry_err[0x20];
4131
4132 u8 reserved_at_260[0x20];
4133
4134 u8 packet_seq_err[0x20];
4135
4136 u8 reserved_at_2a0[0x20];
4137
4138 u8 implied_nak_seq_err[0x20];
4139
4140 u8 reserved_at_2e0[0x20];
4141
4142 u8 local_ack_timeout_err[0x20];
4143
Parav Pandit58dcb602017-06-19 07:19:37 +03004144 u8 reserved_at_320[0xa0];
4145
4146 u8 resp_local_length_error[0x20];
4147
4148 u8 req_local_length_error[0x20];
4149
4150 u8 resp_local_qp_error[0x20];
4151
4152 u8 local_operation_error[0x20];
4153
4154 u8 resp_local_protection[0x20];
4155
4156 u8 req_local_protection[0x20];
4157
4158 u8 resp_cqe_error[0x20];
4159
4160 u8 req_cqe_error[0x20];
4161
4162 u8 req_mw_binding[0x20];
4163
4164 u8 req_bad_response[0x20];
4165
4166 u8 req_remote_invalid_request[0x20];
4167
4168 u8 resp_remote_invalid_request[0x20];
4169
4170 u8 req_remote_access_errors[0x20];
4171
4172 u8 resp_remote_access_errors[0x20];
4173
4174 u8 req_remote_operation_errors[0x20];
4175
4176 u8 req_transport_retries_exceeded[0x20];
4177
4178 u8 cq_overflow[0x20];
4179
4180 u8 resp_cqe_flush_error[0x20];
4181
4182 u8 req_cqe_flush_error[0x20];
4183
4184 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004185};
4186
4187struct mlx5_ifc_query_q_counter_in_bits {
4188 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004189 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004190
Matan Barakb4ff3a32016-02-09 14:57:42 +02004191 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004192 u8 op_mod[0x10];
4193
Matan Barakb4ff3a32016-02-09 14:57:42 +02004194 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004195
4196 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004197 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004198
Matan Barakb4ff3a32016-02-09 14:57:42 +02004199 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004200 u8 counter_set_id[0x8];
4201};
4202
4203struct mlx5_ifc_query_pages_out_bits {
4204 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004205 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004206
4207 u8 syndrome[0x20];
4208
Matan Barakb4ff3a32016-02-09 14:57:42 +02004209 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004210 u8 function_id[0x10];
4211
4212 u8 num_pages[0x20];
4213};
4214
4215enum {
4216 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4217 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4218 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4219};
4220
4221struct mlx5_ifc_query_pages_in_bits {
4222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004224
Matan Barakb4ff3a32016-02-09 14:57:42 +02004225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004226 u8 op_mod[0x10];
4227
Matan Barakb4ff3a32016-02-09 14:57:42 +02004228 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004229 u8 function_id[0x10];
4230
Matan Barakb4ff3a32016-02-09 14:57:42 +02004231 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004232};
4233
4234struct mlx5_ifc_query_nic_vport_context_out_bits {
4235 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004236 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004237
4238 u8 syndrome[0x20];
4239
Matan Barakb4ff3a32016-02-09 14:57:42 +02004240 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004241
4242 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4243};
4244
4245struct mlx5_ifc_query_nic_vport_context_in_bits {
4246 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004247 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004248
Matan Barakb4ff3a32016-02-09 14:57:42 +02004249 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004250 u8 op_mod[0x10];
4251
4252 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004253 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004254 u8 vport_number[0x10];
4255
Matan Barakb4ff3a32016-02-09 14:57:42 +02004256 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004257 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004258 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004259};
4260
4261struct mlx5_ifc_query_mkey_out_bits {
4262 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004263 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004264
4265 u8 syndrome[0x20];
4266
Matan Barakb4ff3a32016-02-09 14:57:42 +02004267 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004268
4269 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4270
Matan Barakb4ff3a32016-02-09 14:57:42 +02004271 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004272
4273 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4274
4275 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4276};
4277
4278struct mlx5_ifc_query_mkey_in_bits {
4279 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004280 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004281
Matan Barakb4ff3a32016-02-09 14:57:42 +02004282 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004283 u8 op_mod[0x10];
4284
Matan Barakb4ff3a32016-02-09 14:57:42 +02004285 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004286 u8 mkey_index[0x18];
4287
4288 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004289 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004290};
4291
4292struct mlx5_ifc_query_mad_demux_out_bits {
4293 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004294 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295
4296 u8 syndrome[0x20];
4297
Matan Barakb4ff3a32016-02-09 14:57:42 +02004298 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004299
4300 u8 mad_dumux_parameters_block[0x20];
4301};
4302
4303struct mlx5_ifc_query_mad_demux_in_bits {
4304 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004305 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004306
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004308 u8 op_mod[0x10];
4309
Matan Barakb4ff3a32016-02-09 14:57:42 +02004310 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004311};
4312
4313struct mlx5_ifc_query_l2_table_entry_out_bits {
4314 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004315 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004316
4317 u8 syndrome[0x20];
4318
Matan Barakb4ff3a32016-02-09 14:57:42 +02004319 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004320
Matan Barakb4ff3a32016-02-09 14:57:42 +02004321 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004322 u8 vlan_valid[0x1];
4323 u8 vlan[0xc];
4324
4325 struct mlx5_ifc_mac_address_layout_bits mac_address;
4326
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328};
4329
4330struct mlx5_ifc_query_l2_table_entry_in_bits {
4331 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004332 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004333
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004335 u8 op_mod[0x10];
4336
Matan Barakb4ff3a32016-02-09 14:57:42 +02004337 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004338
Matan Barakb4ff3a32016-02-09 14:57:42 +02004339 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004340 u8 table_index[0x18];
4341
Matan Barakb4ff3a32016-02-09 14:57:42 +02004342 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004343};
4344
4345struct mlx5_ifc_query_issi_out_bits {
4346 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004347 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004348
4349 u8 syndrome[0x20];
4350
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352 u8 current_issi[0x10];
4353
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004355
Matan Barakb4ff3a32016-02-09 14:57:42 +02004356 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004357 u8 supported_issi_dw0[0x20];
4358};
4359
4360struct mlx5_ifc_query_issi_in_bits {
4361 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004362 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004363
Matan Barakb4ff3a32016-02-09 14:57:42 +02004364 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004365 u8 op_mod[0x10];
4366
Matan Barakb4ff3a32016-02-09 14:57:42 +02004367 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004368};
4369
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004370struct mlx5_ifc_set_driver_version_out_bits {
4371 u8 status[0x8];
4372 u8 reserved_0[0x18];
4373
4374 u8 syndrome[0x20];
4375 u8 reserved_1[0x40];
4376};
4377
4378struct mlx5_ifc_set_driver_version_in_bits {
4379 u8 opcode[0x10];
4380 u8 reserved_0[0x10];
4381
4382 u8 reserved_1[0x10];
4383 u8 op_mod[0x10];
4384
4385 u8 reserved_2[0x40];
4386 u8 driver_version[64][0x8];
4387};
4388
Saeed Mahameede2816822015-05-28 22:28:40 +03004389struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4390 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004391 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004392
4393 u8 syndrome[0x20];
4394
Matan Barakb4ff3a32016-02-09 14:57:42 +02004395 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004396
4397 struct mlx5_ifc_pkey_bits pkey[0];
4398};
4399
4400struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4401 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004402 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004403
Matan Barakb4ff3a32016-02-09 14:57:42 +02004404 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004405 u8 op_mod[0x10];
4406
4407 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004408 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004409 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004410 u8 vport_number[0x10];
4411
Matan Barakb4ff3a32016-02-09 14:57:42 +02004412 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004413 u8 pkey_index[0x10];
4414};
4415
Eli Coheneff901d2016-03-11 22:58:42 +02004416enum {
4417 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4418 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4419 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4420};
4421
Saeed Mahameede2816822015-05-28 22:28:40 +03004422struct mlx5_ifc_query_hca_vport_gid_out_bits {
4423 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004424 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004425
4426 u8 syndrome[0x20];
4427
Matan Barakb4ff3a32016-02-09 14:57:42 +02004428 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004429
4430 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004431 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004432
4433 struct mlx5_ifc_array128_auto_bits gid[0];
4434};
4435
4436struct mlx5_ifc_query_hca_vport_gid_in_bits {
4437 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004439
Matan Barakb4ff3a32016-02-09 14:57:42 +02004440 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004441 u8 op_mod[0x10];
4442
4443 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004444 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004445 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004446 u8 vport_number[0x10];
4447
Matan Barakb4ff3a32016-02-09 14:57:42 +02004448 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004449 u8 gid_index[0x10];
4450};
4451
4452struct mlx5_ifc_query_hca_vport_context_out_bits {
4453 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004454 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004455
4456 u8 syndrome[0x20];
4457
Matan Barakb4ff3a32016-02-09 14:57:42 +02004458 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004459
4460 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4461};
4462
4463struct mlx5_ifc_query_hca_vport_context_in_bits {
4464 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004465 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004466
Matan Barakb4ff3a32016-02-09 14:57:42 +02004467 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004468 u8 op_mod[0x10];
4469
4470 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004471 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004472 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004473 u8 vport_number[0x10];
4474
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004476};
4477
4478struct mlx5_ifc_query_hca_cap_out_bits {
4479 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004480 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004481
4482 u8 syndrome[0x20];
4483
Matan Barakb4ff3a32016-02-09 14:57:42 +02004484 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004485
4486 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004487};
4488
4489struct mlx5_ifc_query_hca_cap_in_bits {
4490 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004491 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004492
Matan Barakb4ff3a32016-02-09 14:57:42 +02004493 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004494 u8 op_mod[0x10];
4495
Matan Barakb4ff3a32016-02-09 14:57:42 +02004496 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004497};
4498
Saeed Mahameede2816822015-05-28 22:28:40 +03004499struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004500 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004501 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004502
4503 u8 syndrome[0x20];
4504
Matan Barakb4ff3a32016-02-09 14:57:42 +02004505 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004506
Matan Barakb4ff3a32016-02-09 14:57:42 +02004507 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004508 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004509 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004510 u8 log_size[0x8];
4511
Matan Barakb4ff3a32016-02-09 14:57:42 +02004512 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004513};
4514
Saeed Mahameede2816822015-05-28 22:28:40 +03004515struct mlx5_ifc_query_flow_table_in_bits {
4516 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004517 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004518
Matan Barakb4ff3a32016-02-09 14:57:42 +02004519 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004520 u8 op_mod[0x10];
4521
Matan Barakb4ff3a32016-02-09 14:57:42 +02004522 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004523
4524 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004525 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004526
Matan Barakb4ff3a32016-02-09 14:57:42 +02004527 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004528 u8 table_id[0x18];
4529
Matan Barakb4ff3a32016-02-09 14:57:42 +02004530 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004531};
4532
4533struct mlx5_ifc_query_fte_out_bits {
4534 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004535 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004536
4537 u8 syndrome[0x20];
4538
Matan Barakb4ff3a32016-02-09 14:57:42 +02004539 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004540
4541 struct mlx5_ifc_flow_context_bits flow_context;
4542};
4543
4544struct mlx5_ifc_query_fte_in_bits {
4545 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004546 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004547
Matan Barakb4ff3a32016-02-09 14:57:42 +02004548 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004549 u8 op_mod[0x10];
4550
Matan Barakb4ff3a32016-02-09 14:57:42 +02004551 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004552
4553 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004554 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004555
Matan Barakb4ff3a32016-02-09 14:57:42 +02004556 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004557 u8 table_id[0x18];
4558
Matan Barakb4ff3a32016-02-09 14:57:42 +02004559 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004560
4561 u8 flow_index[0x20];
4562
Matan Barakb4ff3a32016-02-09 14:57:42 +02004563 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004564};
4565
4566enum {
4567 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4568 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4569 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4570};
4571
4572struct mlx5_ifc_query_flow_group_out_bits {
4573 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004574 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004575
4576 u8 syndrome[0x20];
4577
Matan Barakb4ff3a32016-02-09 14:57:42 +02004578 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004579
4580 u8 start_flow_index[0x20];
4581
Matan Barakb4ff3a32016-02-09 14:57:42 +02004582 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004583
4584 u8 end_flow_index[0x20];
4585
Matan Barakb4ff3a32016-02-09 14:57:42 +02004586 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004587
Matan Barakb4ff3a32016-02-09 14:57:42 +02004588 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004589 u8 match_criteria_enable[0x8];
4590
4591 struct mlx5_ifc_fte_match_param_bits match_criteria;
4592
Matan Barakb4ff3a32016-02-09 14:57:42 +02004593 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004594};
4595
4596struct mlx5_ifc_query_flow_group_in_bits {
4597 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004598 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004599
Matan Barakb4ff3a32016-02-09 14:57:42 +02004600 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004601 u8 op_mod[0x10];
4602
Matan Barakb4ff3a32016-02-09 14:57:42 +02004603 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004604
4605 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004606 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004607
Matan Barakb4ff3a32016-02-09 14:57:42 +02004608 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004609 u8 table_id[0x18];
4610
4611 u8 group_id[0x20];
4612
Matan Barakb4ff3a32016-02-09 14:57:42 +02004613 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004614};
4615
Amir Vadai9dc0b282016-05-13 12:55:39 +00004616struct mlx5_ifc_query_flow_counter_out_bits {
4617 u8 status[0x8];
4618 u8 reserved_at_8[0x18];
4619
4620 u8 syndrome[0x20];
4621
4622 u8 reserved_at_40[0x40];
4623
4624 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4625};
4626
4627struct mlx5_ifc_query_flow_counter_in_bits {
4628 u8 opcode[0x10];
4629 u8 reserved_at_10[0x10];
4630
4631 u8 reserved_at_20[0x10];
4632 u8 op_mod[0x10];
4633
4634 u8 reserved_at_40[0x80];
4635
4636 u8 clear[0x1];
4637 u8 reserved_at_c1[0xf];
4638 u8 num_of_counters[0x10];
4639
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004640 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004641};
4642
Saeed Mahameedd6666752015-12-01 18:03:22 +02004643struct mlx5_ifc_query_esw_vport_context_out_bits {
4644 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004645 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004646
4647 u8 syndrome[0x20];
4648
Matan Barakb4ff3a32016-02-09 14:57:42 +02004649 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004650
4651 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4652};
4653
4654struct mlx5_ifc_query_esw_vport_context_in_bits {
4655 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004656 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004657
Matan Barakb4ff3a32016-02-09 14:57:42 +02004658 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004659 u8 op_mod[0x10];
4660
4661 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004662 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004663 u8 vport_number[0x10];
4664
Matan Barakb4ff3a32016-02-09 14:57:42 +02004665 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004666};
4667
4668struct mlx5_ifc_modify_esw_vport_context_out_bits {
4669 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004670 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004671
4672 u8 syndrome[0x20];
4673
Matan Barakb4ff3a32016-02-09 14:57:42 +02004674 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004675};
4676
4677struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004678 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004679 u8 vport_cvlan_insert[0x1];
4680 u8 vport_svlan_insert[0x1];
4681 u8 vport_cvlan_strip[0x1];
4682 u8 vport_svlan_strip[0x1];
4683};
4684
4685struct mlx5_ifc_modify_esw_vport_context_in_bits {
4686 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004687 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004688
Matan Barakb4ff3a32016-02-09 14:57:42 +02004689 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004690 u8 op_mod[0x10];
4691
4692 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004693 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004694 u8 vport_number[0x10];
4695
4696 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4697
4698 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4699};
4700
Saeed Mahameede2816822015-05-28 22:28:40 +03004701struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004702 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004703 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004704
4705 u8 syndrome[0x20];
4706
Matan Barakb4ff3a32016-02-09 14:57:42 +02004707 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004708
4709 struct mlx5_ifc_eqc_bits eq_context_entry;
4710
Matan Barakb4ff3a32016-02-09 14:57:42 +02004711 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004712
4713 u8 event_bitmask[0x40];
4714
Matan Barakb4ff3a32016-02-09 14:57:42 +02004715 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004716
4717 u8 pas[0][0x40];
4718};
4719
4720struct mlx5_ifc_query_eq_in_bits {
4721 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004722 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004723
Matan Barakb4ff3a32016-02-09 14:57:42 +02004724 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004725 u8 op_mod[0x10];
4726
Matan Barakb4ff3a32016-02-09 14:57:42 +02004727 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004728 u8 eq_number[0x8];
4729
Matan Barakb4ff3a32016-02-09 14:57:42 +02004730 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004731};
4732
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004733struct mlx5_ifc_encap_header_in_bits {
4734 u8 reserved_at_0[0x5];
4735 u8 header_type[0x3];
4736 u8 reserved_at_8[0xe];
4737 u8 encap_header_size[0xa];
4738
4739 u8 reserved_at_20[0x10];
4740 u8 encap_header[2][0x8];
4741
4742 u8 more_encap_header[0][0x8];
4743};
4744
4745struct mlx5_ifc_query_encap_header_out_bits {
4746 u8 status[0x8];
4747 u8 reserved_at_8[0x18];
4748
4749 u8 syndrome[0x20];
4750
4751 u8 reserved_at_40[0xa0];
4752
4753 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4754};
4755
4756struct mlx5_ifc_query_encap_header_in_bits {
4757 u8 opcode[0x10];
4758 u8 reserved_at_10[0x10];
4759
4760 u8 reserved_at_20[0x10];
4761 u8 op_mod[0x10];
4762
4763 u8 encap_id[0x20];
4764
4765 u8 reserved_at_60[0xa0];
4766};
4767
4768struct mlx5_ifc_alloc_encap_header_out_bits {
4769 u8 status[0x8];
4770 u8 reserved_at_8[0x18];
4771
4772 u8 syndrome[0x20];
4773
4774 u8 encap_id[0x20];
4775
4776 u8 reserved_at_60[0x20];
4777};
4778
4779struct mlx5_ifc_alloc_encap_header_in_bits {
4780 u8 opcode[0x10];
4781 u8 reserved_at_10[0x10];
4782
4783 u8 reserved_at_20[0x10];
4784 u8 op_mod[0x10];
4785
4786 u8 reserved_at_40[0xa0];
4787
4788 struct mlx5_ifc_encap_header_in_bits encap_header;
4789};
4790
4791struct mlx5_ifc_dealloc_encap_header_out_bits {
4792 u8 status[0x8];
4793 u8 reserved_at_8[0x18];
4794
4795 u8 syndrome[0x20];
4796
4797 u8 reserved_at_40[0x40];
4798};
4799
4800struct mlx5_ifc_dealloc_encap_header_in_bits {
4801 u8 opcode[0x10];
4802 u8 reserved_at_10[0x10];
4803
4804 u8 reserved_20[0x10];
4805 u8 op_mod[0x10];
4806
4807 u8 encap_id[0x20];
4808
4809 u8 reserved_60[0x20];
4810};
4811
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004812struct mlx5_ifc_set_action_in_bits {
4813 u8 action_type[0x4];
4814 u8 field[0xc];
4815 u8 reserved_at_10[0x3];
4816 u8 offset[0x5];
4817 u8 reserved_at_18[0x3];
4818 u8 length[0x5];
4819
4820 u8 data[0x20];
4821};
4822
4823struct mlx5_ifc_add_action_in_bits {
4824 u8 action_type[0x4];
4825 u8 field[0xc];
4826 u8 reserved_at_10[0x10];
4827
4828 u8 data[0x20];
4829};
4830
4831union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4832 struct mlx5_ifc_set_action_in_bits set_action_in;
4833 struct mlx5_ifc_add_action_in_bits add_action_in;
4834 u8 reserved_at_0[0x40];
4835};
4836
4837enum {
4838 MLX5_ACTION_TYPE_SET = 0x1,
4839 MLX5_ACTION_TYPE_ADD = 0x2,
4840};
4841
4842enum {
4843 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4844 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4845 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4846 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4847 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4848 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4849 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4850 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4851 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4852 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4853 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4854 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4855 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4856 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4857 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4858 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4859 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4860 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4861 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4862 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4863 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4864 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004865 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004866};
4867
4868struct mlx5_ifc_alloc_modify_header_context_out_bits {
4869 u8 status[0x8];
4870 u8 reserved_at_8[0x18];
4871
4872 u8 syndrome[0x20];
4873
4874 u8 modify_header_id[0x20];
4875
4876 u8 reserved_at_60[0x20];
4877};
4878
4879struct mlx5_ifc_alloc_modify_header_context_in_bits {
4880 u8 opcode[0x10];
4881 u8 reserved_at_10[0x10];
4882
4883 u8 reserved_at_20[0x10];
4884 u8 op_mod[0x10];
4885
4886 u8 reserved_at_40[0x20];
4887
4888 u8 table_type[0x8];
4889 u8 reserved_at_68[0x10];
4890 u8 num_of_actions[0x8];
4891
4892 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4893};
4894
4895struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4896 u8 status[0x8];
4897 u8 reserved_at_8[0x18];
4898
4899 u8 syndrome[0x20];
4900
4901 u8 reserved_at_40[0x40];
4902};
4903
4904struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4905 u8 opcode[0x10];
4906 u8 reserved_at_10[0x10];
4907
4908 u8 reserved_at_20[0x10];
4909 u8 op_mod[0x10];
4910
4911 u8 modify_header_id[0x20];
4912
4913 u8 reserved_at_60[0x20];
4914};
4915
Saeed Mahameede2816822015-05-28 22:28:40 +03004916struct mlx5_ifc_query_dct_out_bits {
4917 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004918 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004919
4920 u8 syndrome[0x20];
4921
Matan Barakb4ff3a32016-02-09 14:57:42 +02004922 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004923
4924 struct mlx5_ifc_dctc_bits dct_context_entry;
4925
Matan Barakb4ff3a32016-02-09 14:57:42 +02004926 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004927};
4928
4929struct mlx5_ifc_query_dct_in_bits {
4930 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004931 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004932
Matan Barakb4ff3a32016-02-09 14:57:42 +02004933 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004934 u8 op_mod[0x10];
4935
Matan Barakb4ff3a32016-02-09 14:57:42 +02004936 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004937 u8 dctn[0x18];
4938
Matan Barakb4ff3a32016-02-09 14:57:42 +02004939 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004940};
4941
4942struct mlx5_ifc_query_cq_out_bits {
4943 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004944 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004945
4946 u8 syndrome[0x20];
4947
Matan Barakb4ff3a32016-02-09 14:57:42 +02004948 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004949
4950 struct mlx5_ifc_cqc_bits cq_context;
4951
Matan Barakb4ff3a32016-02-09 14:57:42 +02004952 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953
4954 u8 pas[0][0x40];
4955};
4956
4957struct mlx5_ifc_query_cq_in_bits {
4958 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004959 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004960
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962 u8 op_mod[0x10];
4963
Matan Barakb4ff3a32016-02-09 14:57:42 +02004964 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004965 u8 cqn[0x18];
4966
Matan Barakb4ff3a32016-02-09 14:57:42 +02004967 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004968};
4969
4970struct mlx5_ifc_query_cong_status_out_bits {
4971 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004972 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004973
4974 u8 syndrome[0x20];
4975
Matan Barakb4ff3a32016-02-09 14:57:42 +02004976 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004977
4978 u8 enable[0x1];
4979 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004980 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004981};
4982
4983struct mlx5_ifc_query_cong_status_in_bits {
4984 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004985 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004986
Matan Barakb4ff3a32016-02-09 14:57:42 +02004987 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004988 u8 op_mod[0x10];
4989
Matan Barakb4ff3a32016-02-09 14:57:42 +02004990 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004991 u8 priority[0x4];
4992 u8 cong_protocol[0x4];
4993
Matan Barakb4ff3a32016-02-09 14:57:42 +02004994 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004995};
4996
4997struct mlx5_ifc_query_cong_statistics_out_bits {
4998 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004999 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005000
5001 u8 syndrome[0x20];
5002
Matan Barakb4ff3a32016-02-09 14:57:42 +02005003 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005004
Parav Pandite1f24a72017-04-16 07:29:29 +03005005 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005006
5007 u8 sum_flows[0x20];
5008
Parav Pandite1f24a72017-04-16 07:29:29 +03005009 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005010
Parav Pandite1f24a72017-04-16 07:29:29 +03005011 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005012
Parav Pandite1f24a72017-04-16 07:29:29 +03005013 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005014
Parav Pandite1f24a72017-04-16 07:29:29 +03005015 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005016
Matan Barakb4ff3a32016-02-09 14:57:42 +02005017 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03005018
5019 u8 time_stamp_high[0x20];
5020
5021 u8 time_stamp_low[0x20];
5022
5023 u8 accumulators_period[0x20];
5024
Parav Pandite1f24a72017-04-16 07:29:29 +03005025 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005026
Parav Pandite1f24a72017-04-16 07:29:29 +03005027 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005028
Parav Pandite1f24a72017-04-16 07:29:29 +03005029 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005030
Parav Pandite1f24a72017-04-16 07:29:29 +03005031 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032
Matan Barakb4ff3a32016-02-09 14:57:42 +02005033 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03005034};
5035
5036struct mlx5_ifc_query_cong_statistics_in_bits {
5037 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005038 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005039
Matan Barakb4ff3a32016-02-09 14:57:42 +02005040 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005041 u8 op_mod[0x10];
5042
5043 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045
Matan Barakb4ff3a32016-02-09 14:57:42 +02005046 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005047};
5048
5049struct mlx5_ifc_query_cong_params_out_bits {
5050 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052
5053 u8 syndrome[0x20];
5054
Matan Barakb4ff3a32016-02-09 14:57:42 +02005055 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005056
5057 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5058};
5059
5060struct mlx5_ifc_query_cong_params_in_bits {
5061 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005062 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005063
Matan Barakb4ff3a32016-02-09 14:57:42 +02005064 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005065 u8 op_mod[0x10];
5066
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068 u8 cong_protocol[0x4];
5069
Matan Barakb4ff3a32016-02-09 14:57:42 +02005070 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005071};
5072
5073struct mlx5_ifc_query_adapter_out_bits {
5074 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005075 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005076
5077 u8 syndrome[0x20];
5078
Matan Barakb4ff3a32016-02-09 14:57:42 +02005079 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005080
5081 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
5082};
5083
5084struct mlx5_ifc_query_adapter_in_bits {
5085 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005087
Matan Barakb4ff3a32016-02-09 14:57:42 +02005088 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005089 u8 op_mod[0x10];
5090
Matan Barakb4ff3a32016-02-09 14:57:42 +02005091 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005092};
5093
5094struct mlx5_ifc_qp_2rst_out_bits {
5095 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005096 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005097
5098 u8 syndrome[0x20];
5099
Matan Barakb4ff3a32016-02-09 14:57:42 +02005100 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005101};
5102
5103struct mlx5_ifc_qp_2rst_in_bits {
5104 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005105 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005106
Matan Barakb4ff3a32016-02-09 14:57:42 +02005107 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005108 u8 op_mod[0x10];
5109
Matan Barakb4ff3a32016-02-09 14:57:42 +02005110 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005111 u8 qpn[0x18];
5112
Matan Barakb4ff3a32016-02-09 14:57:42 +02005113 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005114};
5115
5116struct mlx5_ifc_qp_2err_out_bits {
5117 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005118 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005119
5120 u8 syndrome[0x20];
5121
Matan Barakb4ff3a32016-02-09 14:57:42 +02005122 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005123};
5124
5125struct mlx5_ifc_qp_2err_in_bits {
5126 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005127 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005128
Matan Barakb4ff3a32016-02-09 14:57:42 +02005129 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005130 u8 op_mod[0x10];
5131
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133 u8 qpn[0x18];
5134
Matan Barakb4ff3a32016-02-09 14:57:42 +02005135 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005136};
5137
5138struct mlx5_ifc_page_fault_resume_out_bits {
5139 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005140 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005141
5142 u8 syndrome[0x20];
5143
Matan Barakb4ff3a32016-02-09 14:57:42 +02005144 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005145};
5146
5147struct mlx5_ifc_page_fault_resume_in_bits {
5148 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005149 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005150
Matan Barakb4ff3a32016-02-09 14:57:42 +02005151 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005152 u8 op_mod[0x10];
5153
5154 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005155 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005156 u8 page_fault_type[0x3];
5157 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005158
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005159 u8 reserved_at_60[0x8];
5160 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005161};
5162
5163struct mlx5_ifc_nop_out_bits {
5164 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005165 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005166
5167 u8 syndrome[0x20];
5168
Matan Barakb4ff3a32016-02-09 14:57:42 +02005169 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005170};
5171
5172struct mlx5_ifc_nop_in_bits {
5173 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005174 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005175
Matan Barakb4ff3a32016-02-09 14:57:42 +02005176 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005177 u8 op_mod[0x10];
5178
Matan Barakb4ff3a32016-02-09 14:57:42 +02005179 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005180};
5181
5182struct mlx5_ifc_modify_vport_state_out_bits {
5183 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005184 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005185
5186 u8 syndrome[0x20];
5187
Matan Barakb4ff3a32016-02-09 14:57:42 +02005188 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005189};
5190
5191struct mlx5_ifc_modify_vport_state_in_bits {
5192 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005193 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005194
Matan Barakb4ff3a32016-02-09 14:57:42 +02005195 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005196 u8 op_mod[0x10];
5197
5198 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005199 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005200 u8 vport_number[0x10];
5201
Matan Barakb4ff3a32016-02-09 14:57:42 +02005202 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005203 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005204 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005205};
5206
5207struct mlx5_ifc_modify_tis_out_bits {
5208 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005210
5211 u8 syndrome[0x20];
5212
Matan Barakb4ff3a32016-02-09 14:57:42 +02005213 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005214};
5215
majd@mellanox.com75850d02016-01-14 19:13:06 +02005216struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005217 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005218
Aviv Heller84df61e2016-05-10 13:47:50 +03005219 u8 reserved_at_20[0x1d];
5220 u8 lag_tx_port_affinity[0x1];
5221 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005222 u8 prio[0x1];
5223};
5224
Saeed Mahameede2816822015-05-28 22:28:40 +03005225struct mlx5_ifc_modify_tis_in_bits {
5226 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005227 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005228
Matan Barakb4ff3a32016-02-09 14:57:42 +02005229 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005230 u8 op_mod[0x10];
5231
Matan Barakb4ff3a32016-02-09 14:57:42 +02005232 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005233 u8 tisn[0x18];
5234
Matan Barakb4ff3a32016-02-09 14:57:42 +02005235 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005236
majd@mellanox.com75850d02016-01-14 19:13:06 +02005237 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005238
Matan Barakb4ff3a32016-02-09 14:57:42 +02005239 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005240
5241 struct mlx5_ifc_tisc_bits ctx;
5242};
5243
Achiad Shochatd9eea402015-08-04 14:05:42 +03005244struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005245 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005246
Matan Barakb4ff3a32016-02-09 14:57:42 +02005247 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005248 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005249 u8 reserved_at_3c[0x1];
5250 u8 hash[0x1];
5251 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005252 u8 lro[0x1];
5253};
5254
Saeed Mahameede2816822015-05-28 22:28:40 +03005255struct mlx5_ifc_modify_tir_out_bits {
5256 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005257 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005258
5259 u8 syndrome[0x20];
5260
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005262};
5263
5264struct mlx5_ifc_modify_tir_in_bits {
5265 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005266 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005267
Matan Barakb4ff3a32016-02-09 14:57:42 +02005268 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005269 u8 op_mod[0x10];
5270
Matan Barakb4ff3a32016-02-09 14:57:42 +02005271 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005272 u8 tirn[0x18];
5273
Matan Barakb4ff3a32016-02-09 14:57:42 +02005274 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005275
Achiad Shochatd9eea402015-08-04 14:05:42 +03005276 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005277
Matan Barakb4ff3a32016-02-09 14:57:42 +02005278 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005279
5280 struct mlx5_ifc_tirc_bits ctx;
5281};
5282
5283struct mlx5_ifc_modify_sq_out_bits {
5284 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005285 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005286
5287 u8 syndrome[0x20];
5288
Matan Barakb4ff3a32016-02-09 14:57:42 +02005289 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005290};
5291
5292struct mlx5_ifc_modify_sq_in_bits {
5293 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005294 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005295
Matan Barakb4ff3a32016-02-09 14:57:42 +02005296 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005297 u8 op_mod[0x10];
5298
5299 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005300 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005301 u8 sqn[0x18];
5302
Matan Barakb4ff3a32016-02-09 14:57:42 +02005303 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005304
5305 u8 modify_bitmask[0x40];
5306
Matan Barakb4ff3a32016-02-09 14:57:42 +02005307 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005308
5309 struct mlx5_ifc_sqc_bits ctx;
5310};
5311
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005312struct mlx5_ifc_modify_scheduling_element_out_bits {
5313 u8 status[0x8];
5314 u8 reserved_at_8[0x18];
5315
5316 u8 syndrome[0x20];
5317
5318 u8 reserved_at_40[0x1c0];
5319};
5320
5321enum {
5322 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5323 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5324};
5325
5326struct mlx5_ifc_modify_scheduling_element_in_bits {
5327 u8 opcode[0x10];
5328 u8 reserved_at_10[0x10];
5329
5330 u8 reserved_at_20[0x10];
5331 u8 op_mod[0x10];
5332
5333 u8 scheduling_hierarchy[0x8];
5334 u8 reserved_at_48[0x18];
5335
5336 u8 scheduling_element_id[0x20];
5337
5338 u8 reserved_at_80[0x20];
5339
5340 u8 modify_bitmask[0x20];
5341
5342 u8 reserved_at_c0[0x40];
5343
5344 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5345
5346 u8 reserved_at_300[0x100];
5347};
5348
Saeed Mahameede2816822015-05-28 22:28:40 +03005349struct mlx5_ifc_modify_rqt_out_bits {
5350 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005351 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005352
5353 u8 syndrome[0x20];
5354
Matan Barakb4ff3a32016-02-09 14:57:42 +02005355 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005356};
5357
Achiad Shochat5c503682015-08-04 14:05:43 +03005358struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005359 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005360
Matan Barakb4ff3a32016-02-09 14:57:42 +02005361 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005362 u8 rqn_list[0x1];
5363};
5364
Saeed Mahameede2816822015-05-28 22:28:40 +03005365struct mlx5_ifc_modify_rqt_in_bits {
5366 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005367 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005368
Matan Barakb4ff3a32016-02-09 14:57:42 +02005369 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005370 u8 op_mod[0x10];
5371
Matan Barakb4ff3a32016-02-09 14:57:42 +02005372 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005373 u8 rqtn[0x18];
5374
Matan Barakb4ff3a32016-02-09 14:57:42 +02005375 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005376
Achiad Shochat5c503682015-08-04 14:05:43 +03005377 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005378
Matan Barakb4ff3a32016-02-09 14:57:42 +02005379 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005380
5381 struct mlx5_ifc_rqtc_bits ctx;
5382};
5383
5384struct mlx5_ifc_modify_rq_out_bits {
5385 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005386 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005387
5388 u8 syndrome[0x20];
5389
Matan Barakb4ff3a32016-02-09 14:57:42 +02005390 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005391};
5392
Alex Vesker83b502a2016-08-04 17:32:02 +03005393enum {
5394 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005395 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005396 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005397};
5398
Saeed Mahameede2816822015-05-28 22:28:40 +03005399struct mlx5_ifc_modify_rq_in_bits {
5400 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005401 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005402
Matan Barakb4ff3a32016-02-09 14:57:42 +02005403 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005404 u8 op_mod[0x10];
5405
5406 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005407 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005408 u8 rqn[0x18];
5409
Matan Barakb4ff3a32016-02-09 14:57:42 +02005410 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005411
5412 u8 modify_bitmask[0x40];
5413
Matan Barakb4ff3a32016-02-09 14:57:42 +02005414 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005415
5416 struct mlx5_ifc_rqc_bits ctx;
5417};
5418
5419struct mlx5_ifc_modify_rmp_out_bits {
5420 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005421 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422
5423 u8 syndrome[0x20];
5424
Matan Barakb4ff3a32016-02-09 14:57:42 +02005425 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005426};
5427
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005428struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005429 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005430
Matan Barakb4ff3a32016-02-09 14:57:42 +02005431 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005432 u8 lwm[0x1];
5433};
5434
Saeed Mahameede2816822015-05-28 22:28:40 +03005435struct mlx5_ifc_modify_rmp_in_bits {
5436 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005437 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005438
Matan Barakb4ff3a32016-02-09 14:57:42 +02005439 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005440 u8 op_mod[0x10];
5441
5442 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005443 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005444 u8 rmpn[0x18];
5445
Matan Barakb4ff3a32016-02-09 14:57:42 +02005446 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005447
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005448 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005449
Matan Barakb4ff3a32016-02-09 14:57:42 +02005450 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005451
5452 struct mlx5_ifc_rmpc_bits ctx;
5453};
5454
5455struct mlx5_ifc_modify_nic_vport_context_out_bits {
5456 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005457 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005458
5459 u8 syndrome[0x20];
5460
Matan Barakb4ff3a32016-02-09 14:57:42 +02005461 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005462};
5463
5464struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005465 u8 reserved_at_0[0x12];
5466 u8 affiliation[0x1];
5467 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005468 u8 disable_uc_local_lb[0x1];
5469 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005470 u8 node_guid[0x1];
5471 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005472 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005473 u8 mtu[0x1];
5474 u8 change_event[0x1];
5475 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005476 u8 permanent_address[0x1];
5477 u8 addresses_list[0x1];
5478 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005479 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005480};
5481
5482struct mlx5_ifc_modify_nic_vport_context_in_bits {
5483 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005484 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005485
Matan Barakb4ff3a32016-02-09 14:57:42 +02005486 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005487 u8 op_mod[0x10];
5488
5489 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005490 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005491 u8 vport_number[0x10];
5492
5493 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5494
Matan Barakb4ff3a32016-02-09 14:57:42 +02005495 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005496
5497 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5498};
5499
5500struct mlx5_ifc_modify_hca_vport_context_out_bits {
5501 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503
5504 u8 syndrome[0x20];
5505
Matan Barakb4ff3a32016-02-09 14:57:42 +02005506 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005507};
5508
5509struct mlx5_ifc_modify_hca_vport_context_in_bits {
5510 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005511 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512
Matan Barakb4ff3a32016-02-09 14:57:42 +02005513 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005514 u8 op_mod[0x10];
5515
5516 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005517 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005518 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005519 u8 vport_number[0x10];
5520
Matan Barakb4ff3a32016-02-09 14:57:42 +02005521 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005522
5523 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5524};
5525
5526struct mlx5_ifc_modify_cq_out_bits {
5527 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005528 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005529
5530 u8 syndrome[0x20];
5531
Matan Barakb4ff3a32016-02-09 14:57:42 +02005532 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005533};
5534
5535enum {
5536 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5537 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5538};
5539
5540struct mlx5_ifc_modify_cq_in_bits {
5541 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543
Matan Barakb4ff3a32016-02-09 14:57:42 +02005544 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005545 u8 op_mod[0x10];
5546
Matan Barakb4ff3a32016-02-09 14:57:42 +02005547 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005548 u8 cqn[0x18];
5549
5550 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5551
5552 struct mlx5_ifc_cqc_bits cq_context;
5553
Matan Barakb4ff3a32016-02-09 14:57:42 +02005554 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555
5556 u8 pas[0][0x40];
5557};
5558
5559struct mlx5_ifc_modify_cong_status_out_bits {
5560 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005561 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005562
5563 u8 syndrome[0x20];
5564
Matan Barakb4ff3a32016-02-09 14:57:42 +02005565 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005566};
5567
5568struct mlx5_ifc_modify_cong_status_in_bits {
5569 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005570 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005571
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573 u8 op_mod[0x10];
5574
Matan Barakb4ff3a32016-02-09 14:57:42 +02005575 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005576 u8 priority[0x4];
5577 u8 cong_protocol[0x4];
5578
5579 u8 enable[0x1];
5580 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005581 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005582};
5583
5584struct mlx5_ifc_modify_cong_params_out_bits {
5585 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005586 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005587
5588 u8 syndrome[0x20];
5589
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591};
5592
5593struct mlx5_ifc_modify_cong_params_in_bits {
5594 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005595 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596
Matan Barakb4ff3a32016-02-09 14:57:42 +02005597 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005598 u8 op_mod[0x10];
5599
Matan Barakb4ff3a32016-02-09 14:57:42 +02005600 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005601 u8 cong_protocol[0x4];
5602
5603 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5604
Matan Barakb4ff3a32016-02-09 14:57:42 +02005605 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005606
5607 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5608};
5609
5610struct mlx5_ifc_manage_pages_out_bits {
5611 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005612 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005613
5614 u8 syndrome[0x20];
5615
5616 u8 output_num_entries[0x20];
5617
Matan Barakb4ff3a32016-02-09 14:57:42 +02005618 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005619
5620 u8 pas[0][0x40];
5621};
5622
5623enum {
5624 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5625 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5626 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5627};
5628
5629struct mlx5_ifc_manage_pages_in_bits {
5630 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005631 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005632
Matan Barakb4ff3a32016-02-09 14:57:42 +02005633 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005634 u8 op_mod[0x10];
5635
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637 u8 function_id[0x10];
5638
5639 u8 input_num_entries[0x20];
5640
5641 u8 pas[0][0x40];
5642};
5643
5644struct mlx5_ifc_mad_ifc_out_bits {
5645 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005646 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005647
5648 u8 syndrome[0x20];
5649
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651
5652 u8 response_mad_packet[256][0x8];
5653};
5654
5655struct mlx5_ifc_mad_ifc_in_bits {
5656 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005657 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005658
Matan Barakb4ff3a32016-02-09 14:57:42 +02005659 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005660 u8 op_mod[0x10];
5661
5662 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005663 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005664 u8 port[0x8];
5665
Matan Barakb4ff3a32016-02-09 14:57:42 +02005666 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005667
5668 u8 mad[256][0x8];
5669};
5670
5671struct mlx5_ifc_init_hca_out_bits {
5672 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005673 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005674
5675 u8 syndrome[0x20];
5676
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678};
5679
5680struct mlx5_ifc_init_hca_in_bits {
5681 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005682 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005683
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685 u8 op_mod[0x10];
5686
Matan Barakb4ff3a32016-02-09 14:57:42 +02005687 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005688 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005689};
5690
5691struct mlx5_ifc_init2rtr_qp_out_bits {
5692 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005693 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005694
5695 u8 syndrome[0x20];
5696
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698};
5699
5700struct mlx5_ifc_init2rtr_qp_in_bits {
5701 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703
Matan Barakb4ff3a32016-02-09 14:57:42 +02005704 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005705 u8 op_mod[0x10];
5706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708 u8 qpn[0x18];
5709
Matan Barakb4ff3a32016-02-09 14:57:42 +02005710 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005711
5712 u8 opt_param_mask[0x20];
5713
Matan Barakb4ff3a32016-02-09 14:57:42 +02005714 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005715
5716 struct mlx5_ifc_qpc_bits qpc;
5717
Matan Barakb4ff3a32016-02-09 14:57:42 +02005718 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005719};
5720
5721struct mlx5_ifc_init2init_qp_out_bits {
5722 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005723 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005724
5725 u8 syndrome[0x20];
5726
Matan Barakb4ff3a32016-02-09 14:57:42 +02005727 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005728};
5729
5730struct mlx5_ifc_init2init_qp_in_bits {
5731 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733
Matan Barakb4ff3a32016-02-09 14:57:42 +02005734 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005735 u8 op_mod[0x10];
5736
Matan Barakb4ff3a32016-02-09 14:57:42 +02005737 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005738 u8 qpn[0x18];
5739
Matan Barakb4ff3a32016-02-09 14:57:42 +02005740 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005741
5742 u8 opt_param_mask[0x20];
5743
Matan Barakb4ff3a32016-02-09 14:57:42 +02005744 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005745
5746 struct mlx5_ifc_qpc_bits qpc;
5747
Matan Barakb4ff3a32016-02-09 14:57:42 +02005748 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005749};
5750
5751struct mlx5_ifc_get_dropped_packet_log_out_bits {
5752 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005753 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005754
5755 u8 syndrome[0x20];
5756
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758
5759 u8 packet_headers_log[128][0x8];
5760
5761 u8 packet_syndrome[64][0x8];
5762};
5763
5764struct mlx5_ifc_get_dropped_packet_log_in_bits {
5765 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005766 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005767
Matan Barakb4ff3a32016-02-09 14:57:42 +02005768 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005769 u8 op_mod[0x10];
5770
Matan Barakb4ff3a32016-02-09 14:57:42 +02005771 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005772};
5773
5774struct mlx5_ifc_gen_eqe_in_bits {
5775 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005776 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005777
Matan Barakb4ff3a32016-02-09 14:57:42 +02005778 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005779 u8 op_mod[0x10];
5780
Matan Barakb4ff3a32016-02-09 14:57:42 +02005781 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005782 u8 eq_number[0x8];
5783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785
5786 u8 eqe[64][0x8];
5787};
5788
5789struct mlx5_ifc_gen_eq_out_bits {
5790 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005791 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005792
5793 u8 syndrome[0x20];
5794
Matan Barakb4ff3a32016-02-09 14:57:42 +02005795 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005796};
5797
5798struct mlx5_ifc_enable_hca_out_bits {
5799 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005800 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005801
5802 u8 syndrome[0x20];
5803
Matan Barakb4ff3a32016-02-09 14:57:42 +02005804 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005805};
5806
5807struct mlx5_ifc_enable_hca_in_bits {
5808 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005809 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005810
Matan Barakb4ff3a32016-02-09 14:57:42 +02005811 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005812 u8 op_mod[0x10];
5813
Matan Barakb4ff3a32016-02-09 14:57:42 +02005814 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005815 u8 function_id[0x10];
5816
Matan Barakb4ff3a32016-02-09 14:57:42 +02005817 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005818};
5819
5820struct mlx5_ifc_drain_dct_out_bits {
5821 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005822 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005823
5824 u8 syndrome[0x20];
5825
Matan Barakb4ff3a32016-02-09 14:57:42 +02005826 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005827};
5828
5829struct mlx5_ifc_drain_dct_in_bits {
5830 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005831 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005832
Matan Barakb4ff3a32016-02-09 14:57:42 +02005833 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005834 u8 op_mod[0x10];
5835
Matan Barakb4ff3a32016-02-09 14:57:42 +02005836 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005837 u8 dctn[0x18];
5838
Matan Barakb4ff3a32016-02-09 14:57:42 +02005839 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005840};
5841
5842struct mlx5_ifc_disable_hca_out_bits {
5843 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845
5846 u8 syndrome[0x20];
5847
Matan Barakb4ff3a32016-02-09 14:57:42 +02005848 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005849};
5850
5851struct mlx5_ifc_disable_hca_in_bits {
5852 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005853 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005854
Matan Barakb4ff3a32016-02-09 14:57:42 +02005855 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005856 u8 op_mod[0x10];
5857
Matan Barakb4ff3a32016-02-09 14:57:42 +02005858 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005859 u8 function_id[0x10];
5860
Matan Barakb4ff3a32016-02-09 14:57:42 +02005861 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005862};
5863
5864struct mlx5_ifc_detach_from_mcg_out_bits {
5865 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005866 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005867
5868 u8 syndrome[0x20];
5869
Matan Barakb4ff3a32016-02-09 14:57:42 +02005870 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005871};
5872
5873struct mlx5_ifc_detach_from_mcg_in_bits {
5874 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005875 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005876
Matan Barakb4ff3a32016-02-09 14:57:42 +02005877 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005878 u8 op_mod[0x10];
5879
Matan Barakb4ff3a32016-02-09 14:57:42 +02005880 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005881 u8 qpn[0x18];
5882
Matan Barakb4ff3a32016-02-09 14:57:42 +02005883 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005884
5885 u8 multicast_gid[16][0x8];
5886};
5887
Saeed Mahameed74862162016-06-09 15:11:34 +03005888struct mlx5_ifc_destroy_xrq_out_bits {
5889 u8 status[0x8];
5890 u8 reserved_at_8[0x18];
5891
5892 u8 syndrome[0x20];
5893
5894 u8 reserved_at_40[0x40];
5895};
5896
5897struct mlx5_ifc_destroy_xrq_in_bits {
5898 u8 opcode[0x10];
5899 u8 reserved_at_10[0x10];
5900
5901 u8 reserved_at_20[0x10];
5902 u8 op_mod[0x10];
5903
5904 u8 reserved_at_40[0x8];
5905 u8 xrqn[0x18];
5906
5907 u8 reserved_at_60[0x20];
5908};
5909
Saeed Mahameede2816822015-05-28 22:28:40 +03005910struct mlx5_ifc_destroy_xrc_srq_out_bits {
5911 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005912 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005913
5914 u8 syndrome[0x20];
5915
Matan Barakb4ff3a32016-02-09 14:57:42 +02005916 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005917};
5918
5919struct mlx5_ifc_destroy_xrc_srq_in_bits {
5920 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005921 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005922
Matan Barakb4ff3a32016-02-09 14:57:42 +02005923 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005924 u8 op_mod[0x10];
5925
Matan Barakb4ff3a32016-02-09 14:57:42 +02005926 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005927 u8 xrc_srqn[0x18];
5928
Matan Barakb4ff3a32016-02-09 14:57:42 +02005929 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005930};
5931
5932struct mlx5_ifc_destroy_tis_out_bits {
5933 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005934 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005935
5936 u8 syndrome[0x20];
5937
Matan Barakb4ff3a32016-02-09 14:57:42 +02005938 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005939};
5940
5941struct mlx5_ifc_destroy_tis_in_bits {
5942 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005943 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005944
Matan Barakb4ff3a32016-02-09 14:57:42 +02005945 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005946 u8 op_mod[0x10];
5947
Matan Barakb4ff3a32016-02-09 14:57:42 +02005948 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005949 u8 tisn[0x18];
5950
Matan Barakb4ff3a32016-02-09 14:57:42 +02005951 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005952};
5953
5954struct mlx5_ifc_destroy_tir_out_bits {
5955 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005956 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005957
5958 u8 syndrome[0x20];
5959
Matan Barakb4ff3a32016-02-09 14:57:42 +02005960 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005961};
5962
5963struct mlx5_ifc_destroy_tir_in_bits {
5964 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005965 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005966
Matan Barakb4ff3a32016-02-09 14:57:42 +02005967 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005968 u8 op_mod[0x10];
5969
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971 u8 tirn[0x18];
5972
Matan Barakb4ff3a32016-02-09 14:57:42 +02005973 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005974};
5975
5976struct mlx5_ifc_destroy_srq_out_bits {
5977 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005978 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005979
5980 u8 syndrome[0x20];
5981
Matan Barakb4ff3a32016-02-09 14:57:42 +02005982 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005983};
5984
5985struct mlx5_ifc_destroy_srq_in_bits {
5986 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005987 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005988
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990 u8 op_mod[0x10];
5991
Matan Barakb4ff3a32016-02-09 14:57:42 +02005992 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005993 u8 srqn[0x18];
5994
Matan Barakb4ff3a32016-02-09 14:57:42 +02005995 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005996};
5997
5998struct mlx5_ifc_destroy_sq_out_bits {
5999 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006000 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006001
6002 u8 syndrome[0x20];
6003
Matan Barakb4ff3a32016-02-09 14:57:42 +02006004 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006005};
6006
6007struct mlx5_ifc_destroy_sq_in_bits {
6008 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006009 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006010
Matan Barakb4ff3a32016-02-09 14:57:42 +02006011 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006012 u8 op_mod[0x10];
6013
Matan Barakb4ff3a32016-02-09 14:57:42 +02006014 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006015 u8 sqn[0x18];
6016
Matan Barakb4ff3a32016-02-09 14:57:42 +02006017 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006018};
6019
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006020struct mlx5_ifc_destroy_scheduling_element_out_bits {
6021 u8 status[0x8];
6022 u8 reserved_at_8[0x18];
6023
6024 u8 syndrome[0x20];
6025
6026 u8 reserved_at_40[0x1c0];
6027};
6028
6029struct mlx5_ifc_destroy_scheduling_element_in_bits {
6030 u8 opcode[0x10];
6031 u8 reserved_at_10[0x10];
6032
6033 u8 reserved_at_20[0x10];
6034 u8 op_mod[0x10];
6035
6036 u8 scheduling_hierarchy[0x8];
6037 u8 reserved_at_48[0x18];
6038
6039 u8 scheduling_element_id[0x20];
6040
6041 u8 reserved_at_80[0x180];
6042};
6043
Saeed Mahameede2816822015-05-28 22:28:40 +03006044struct mlx5_ifc_destroy_rqt_out_bits {
6045 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006046 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006047
6048 u8 syndrome[0x20];
6049
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051};
6052
6053struct mlx5_ifc_destroy_rqt_in_bits {
6054 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006055 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006056
Matan Barakb4ff3a32016-02-09 14:57:42 +02006057 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006058 u8 op_mod[0x10];
6059
Matan Barakb4ff3a32016-02-09 14:57:42 +02006060 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006061 u8 rqtn[0x18];
6062
Matan Barakb4ff3a32016-02-09 14:57:42 +02006063 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006064};
6065
6066struct mlx5_ifc_destroy_rq_out_bits {
6067 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006068 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006069
6070 u8 syndrome[0x20];
6071
Matan Barakb4ff3a32016-02-09 14:57:42 +02006072 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006073};
6074
6075struct mlx5_ifc_destroy_rq_in_bits {
6076 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006077 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006078
Matan Barakb4ff3a32016-02-09 14:57:42 +02006079 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006080 u8 op_mod[0x10];
6081
Matan Barakb4ff3a32016-02-09 14:57:42 +02006082 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006083 u8 rqn[0x18];
6084
Matan Barakb4ff3a32016-02-09 14:57:42 +02006085 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006086};
6087
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006088struct mlx5_ifc_set_delay_drop_params_in_bits {
6089 u8 opcode[0x10];
6090 u8 reserved_at_10[0x10];
6091
6092 u8 reserved_at_20[0x10];
6093 u8 op_mod[0x10];
6094
6095 u8 reserved_at_40[0x20];
6096
6097 u8 reserved_at_60[0x10];
6098 u8 delay_drop_timeout[0x10];
6099};
6100
6101struct mlx5_ifc_set_delay_drop_params_out_bits {
6102 u8 status[0x8];
6103 u8 reserved_at_8[0x18];
6104
6105 u8 syndrome[0x20];
6106
6107 u8 reserved_at_40[0x40];
6108};
6109
Saeed Mahameede2816822015-05-28 22:28:40 +03006110struct mlx5_ifc_destroy_rmp_out_bits {
6111 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006112 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006113
6114 u8 syndrome[0x20];
6115
Matan Barakb4ff3a32016-02-09 14:57:42 +02006116 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006117};
6118
6119struct mlx5_ifc_destroy_rmp_in_bits {
6120 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006121 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006122
Matan Barakb4ff3a32016-02-09 14:57:42 +02006123 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006124 u8 op_mod[0x10];
6125
Matan Barakb4ff3a32016-02-09 14:57:42 +02006126 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006127 u8 rmpn[0x18];
6128
Matan Barakb4ff3a32016-02-09 14:57:42 +02006129 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006130};
6131
6132struct mlx5_ifc_destroy_qp_out_bits {
6133 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006134 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006135
6136 u8 syndrome[0x20];
6137
Matan Barakb4ff3a32016-02-09 14:57:42 +02006138 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006139};
6140
6141struct mlx5_ifc_destroy_qp_in_bits {
6142 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006143 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006144
Matan Barakb4ff3a32016-02-09 14:57:42 +02006145 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006146 u8 op_mod[0x10];
6147
Matan Barakb4ff3a32016-02-09 14:57:42 +02006148 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006149 u8 qpn[0x18];
6150
Matan Barakb4ff3a32016-02-09 14:57:42 +02006151 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006152};
6153
6154struct mlx5_ifc_destroy_psv_out_bits {
6155 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006156 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006157
6158 u8 syndrome[0x20];
6159
Matan Barakb4ff3a32016-02-09 14:57:42 +02006160 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006161};
6162
6163struct mlx5_ifc_destroy_psv_in_bits {
6164 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166
Matan Barakb4ff3a32016-02-09 14:57:42 +02006167 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006168 u8 op_mod[0x10];
6169
Matan Barakb4ff3a32016-02-09 14:57:42 +02006170 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006171 u8 psvn[0x18];
6172
Matan Barakb4ff3a32016-02-09 14:57:42 +02006173 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006174};
6175
6176struct mlx5_ifc_destroy_mkey_out_bits {
6177 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006178 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006179
6180 u8 syndrome[0x20];
6181
Matan Barakb4ff3a32016-02-09 14:57:42 +02006182 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006183};
6184
6185struct mlx5_ifc_destroy_mkey_in_bits {
6186 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190 u8 op_mod[0x10];
6191
Matan Barakb4ff3a32016-02-09 14:57:42 +02006192 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006193 u8 mkey_index[0x18];
6194
Matan Barakb4ff3a32016-02-09 14:57:42 +02006195 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006196};
6197
6198struct mlx5_ifc_destroy_flow_table_out_bits {
6199 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006200 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006201
6202 u8 syndrome[0x20];
6203
Matan Barakb4ff3a32016-02-09 14:57:42 +02006204 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006205};
6206
6207struct mlx5_ifc_destroy_flow_table_in_bits {
6208 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212 u8 op_mod[0x10];
6213
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006214 u8 other_vport[0x1];
6215 u8 reserved_at_41[0xf];
6216 u8 vport_number[0x10];
6217
6218 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219
6220 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006221 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006222
Matan Barakb4ff3a32016-02-09 14:57:42 +02006223 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006224 u8 table_id[0x18];
6225
Matan Barakb4ff3a32016-02-09 14:57:42 +02006226 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006227};
6228
6229struct mlx5_ifc_destroy_flow_group_out_bits {
6230 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232
6233 u8 syndrome[0x20];
6234
Matan Barakb4ff3a32016-02-09 14:57:42 +02006235 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006236};
6237
6238struct mlx5_ifc_destroy_flow_group_in_bits {
6239 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243 u8 op_mod[0x10];
6244
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006245 u8 other_vport[0x1];
6246 u8 reserved_at_41[0xf];
6247 u8 vport_number[0x10];
6248
6249 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006250
6251 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006252 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006253
Matan Barakb4ff3a32016-02-09 14:57:42 +02006254 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006255 u8 table_id[0x18];
6256
6257 u8 group_id[0x20];
6258
Matan Barakb4ff3a32016-02-09 14:57:42 +02006259 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006260};
6261
6262struct mlx5_ifc_destroy_eq_out_bits {
6263 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006264 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006265
6266 u8 syndrome[0x20];
6267
Matan Barakb4ff3a32016-02-09 14:57:42 +02006268 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006269};
6270
6271struct mlx5_ifc_destroy_eq_in_bits {
6272 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006273 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006274
Matan Barakb4ff3a32016-02-09 14:57:42 +02006275 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006276 u8 op_mod[0x10];
6277
Matan Barakb4ff3a32016-02-09 14:57:42 +02006278 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006279 u8 eq_number[0x8];
6280
Matan Barakb4ff3a32016-02-09 14:57:42 +02006281 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006282};
6283
6284struct mlx5_ifc_destroy_dct_out_bits {
6285 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006286 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006287
6288 u8 syndrome[0x20];
6289
Matan Barakb4ff3a32016-02-09 14:57:42 +02006290 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006291};
6292
6293struct mlx5_ifc_destroy_dct_in_bits {
6294 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006295 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296
Matan Barakb4ff3a32016-02-09 14:57:42 +02006297 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006298 u8 op_mod[0x10];
6299
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301 u8 dctn[0x18];
6302
Matan Barakb4ff3a32016-02-09 14:57:42 +02006303 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006304};
6305
6306struct mlx5_ifc_destroy_cq_out_bits {
6307 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006308 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006309
6310 u8 syndrome[0x20];
6311
Matan Barakb4ff3a32016-02-09 14:57:42 +02006312 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006313};
6314
6315struct mlx5_ifc_destroy_cq_in_bits {
6316 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006317 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318
Matan Barakb4ff3a32016-02-09 14:57:42 +02006319 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006320 u8 op_mod[0x10];
6321
Matan Barakb4ff3a32016-02-09 14:57:42 +02006322 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006323 u8 cqn[0x18];
6324
Matan Barakb4ff3a32016-02-09 14:57:42 +02006325 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006326};
6327
6328struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6329 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006330 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006331
6332 u8 syndrome[0x20];
6333
Matan Barakb4ff3a32016-02-09 14:57:42 +02006334 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006335};
6336
6337struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6338 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006339 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006340
Matan Barakb4ff3a32016-02-09 14:57:42 +02006341 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006342 u8 op_mod[0x10];
6343
Matan Barakb4ff3a32016-02-09 14:57:42 +02006344 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006345
Matan Barakb4ff3a32016-02-09 14:57:42 +02006346 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006347 u8 vxlan_udp_port[0x10];
6348};
6349
6350struct mlx5_ifc_delete_l2_table_entry_out_bits {
6351 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006352 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006353
6354 u8 syndrome[0x20];
6355
Matan Barakb4ff3a32016-02-09 14:57:42 +02006356 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006357};
6358
6359struct mlx5_ifc_delete_l2_table_entry_in_bits {
6360 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006361 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006362
Matan Barakb4ff3a32016-02-09 14:57:42 +02006363 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006364 u8 op_mod[0x10];
6365
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367
Matan Barakb4ff3a32016-02-09 14:57:42 +02006368 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006369 u8 table_index[0x18];
6370
Matan Barakb4ff3a32016-02-09 14:57:42 +02006371 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006372};
6373
6374struct mlx5_ifc_delete_fte_out_bits {
6375 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006376 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006377
6378 u8 syndrome[0x20];
6379
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381};
6382
6383struct mlx5_ifc_delete_fte_in_bits {
6384 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386
Matan Barakb4ff3a32016-02-09 14:57:42 +02006387 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006388 u8 op_mod[0x10];
6389
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006390 u8 other_vport[0x1];
6391 u8 reserved_at_41[0xf];
6392 u8 vport_number[0x10];
6393
6394 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006395
6396 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006397 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006398
Matan Barakb4ff3a32016-02-09 14:57:42 +02006399 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006400 u8 table_id[0x18];
6401
Matan Barakb4ff3a32016-02-09 14:57:42 +02006402 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006403
6404 u8 flow_index[0x20];
6405
Matan Barakb4ff3a32016-02-09 14:57:42 +02006406 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006407};
6408
6409struct mlx5_ifc_dealloc_xrcd_out_bits {
6410 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006411 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006412
6413 u8 syndrome[0x20];
6414
Matan Barakb4ff3a32016-02-09 14:57:42 +02006415 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006416};
6417
6418struct mlx5_ifc_dealloc_xrcd_in_bits {
6419 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006420 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006421
Matan Barakb4ff3a32016-02-09 14:57:42 +02006422 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006423 u8 op_mod[0x10];
6424
Matan Barakb4ff3a32016-02-09 14:57:42 +02006425 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006426 u8 xrcd[0x18];
6427
Matan Barakb4ff3a32016-02-09 14:57:42 +02006428 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006429};
6430
6431struct mlx5_ifc_dealloc_uar_out_bits {
6432 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006433 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006434
6435 u8 syndrome[0x20];
6436
Matan Barakb4ff3a32016-02-09 14:57:42 +02006437 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006438};
6439
6440struct mlx5_ifc_dealloc_uar_in_bits {
6441 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006442 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006443
Matan Barakb4ff3a32016-02-09 14:57:42 +02006444 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006445 u8 op_mod[0x10];
6446
Matan Barakb4ff3a32016-02-09 14:57:42 +02006447 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006448 u8 uar[0x18];
6449
Matan Barakb4ff3a32016-02-09 14:57:42 +02006450 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006451};
6452
6453struct mlx5_ifc_dealloc_transport_domain_out_bits {
6454 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006455 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006456
6457 u8 syndrome[0x20];
6458
Matan Barakb4ff3a32016-02-09 14:57:42 +02006459 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006460};
6461
6462struct mlx5_ifc_dealloc_transport_domain_in_bits {
6463 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006464 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006465
Matan Barakb4ff3a32016-02-09 14:57:42 +02006466 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006467 u8 op_mod[0x10];
6468
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470 u8 transport_domain[0x18];
6471
Matan Barakb4ff3a32016-02-09 14:57:42 +02006472 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006473};
6474
6475struct mlx5_ifc_dealloc_q_counter_out_bits {
6476 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006477 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006478
6479 u8 syndrome[0x20];
6480
Matan Barakb4ff3a32016-02-09 14:57:42 +02006481 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006482};
6483
6484struct mlx5_ifc_dealloc_q_counter_in_bits {
6485 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006486 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006487
Matan Barakb4ff3a32016-02-09 14:57:42 +02006488 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006489 u8 op_mod[0x10];
6490
Matan Barakb4ff3a32016-02-09 14:57:42 +02006491 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006492 u8 counter_set_id[0x8];
6493
Matan Barakb4ff3a32016-02-09 14:57:42 +02006494 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006495};
6496
6497struct mlx5_ifc_dealloc_pd_out_bits {
6498 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500
6501 u8 syndrome[0x20];
6502
Matan Barakb4ff3a32016-02-09 14:57:42 +02006503 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006504};
6505
6506struct mlx5_ifc_dealloc_pd_in_bits {
6507 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006508 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006509
Matan Barakb4ff3a32016-02-09 14:57:42 +02006510 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006511 u8 op_mod[0x10];
6512
Matan Barakb4ff3a32016-02-09 14:57:42 +02006513 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006514 u8 pd[0x18];
6515
Matan Barakb4ff3a32016-02-09 14:57:42 +02006516 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006517};
6518
Amir Vadai9dc0b282016-05-13 12:55:39 +00006519struct mlx5_ifc_dealloc_flow_counter_out_bits {
6520 u8 status[0x8];
6521 u8 reserved_at_8[0x18];
6522
6523 u8 syndrome[0x20];
6524
6525 u8 reserved_at_40[0x40];
6526};
6527
6528struct mlx5_ifc_dealloc_flow_counter_in_bits {
6529 u8 opcode[0x10];
6530 u8 reserved_at_10[0x10];
6531
6532 u8 reserved_at_20[0x10];
6533 u8 op_mod[0x10];
6534
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006535 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006536
6537 u8 reserved_at_60[0x20];
6538};
6539
Saeed Mahameed74862162016-06-09 15:11:34 +03006540struct mlx5_ifc_create_xrq_out_bits {
6541 u8 status[0x8];
6542 u8 reserved_at_8[0x18];
6543
6544 u8 syndrome[0x20];
6545
6546 u8 reserved_at_40[0x8];
6547 u8 xrqn[0x18];
6548
6549 u8 reserved_at_60[0x20];
6550};
6551
6552struct mlx5_ifc_create_xrq_in_bits {
6553 u8 opcode[0x10];
6554 u8 reserved_at_10[0x10];
6555
6556 u8 reserved_at_20[0x10];
6557 u8 op_mod[0x10];
6558
6559 u8 reserved_at_40[0x40];
6560
6561 struct mlx5_ifc_xrqc_bits xrq_context;
6562};
6563
Saeed Mahameede2816822015-05-28 22:28:40 +03006564struct mlx5_ifc_create_xrc_srq_out_bits {
6565 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006566 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006567
6568 u8 syndrome[0x20];
6569
Matan Barakb4ff3a32016-02-09 14:57:42 +02006570 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006571 u8 xrc_srqn[0x18];
6572
Matan Barakb4ff3a32016-02-09 14:57:42 +02006573 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006574};
6575
6576struct mlx5_ifc_create_xrc_srq_in_bits {
6577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581 u8 op_mod[0x10];
6582
Matan Barakb4ff3a32016-02-09 14:57:42 +02006583 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006584
6585 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6586
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588
6589 u8 pas[0][0x40];
6590};
6591
6592struct mlx5_ifc_create_tis_out_bits {
6593 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006594 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006595
6596 u8 syndrome[0x20];
6597
Matan Barakb4ff3a32016-02-09 14:57:42 +02006598 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006599 u8 tisn[0x18];
6600
Matan Barakb4ff3a32016-02-09 14:57:42 +02006601 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006602};
6603
6604struct mlx5_ifc_create_tis_in_bits {
6605 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006606 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006607
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609 u8 op_mod[0x10];
6610
Matan Barakb4ff3a32016-02-09 14:57:42 +02006611 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006612
6613 struct mlx5_ifc_tisc_bits ctx;
6614};
6615
6616struct mlx5_ifc_create_tir_out_bits {
6617 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006618 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006619
6620 u8 syndrome[0x20];
6621
Matan Barakb4ff3a32016-02-09 14:57:42 +02006622 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006623 u8 tirn[0x18];
6624
Matan Barakb4ff3a32016-02-09 14:57:42 +02006625 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006626};
6627
6628struct mlx5_ifc_create_tir_in_bits {
6629 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006630 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006631
Matan Barakb4ff3a32016-02-09 14:57:42 +02006632 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006633 u8 op_mod[0x10];
6634
Matan Barakb4ff3a32016-02-09 14:57:42 +02006635 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006636
6637 struct mlx5_ifc_tirc_bits ctx;
6638};
6639
6640struct mlx5_ifc_create_srq_out_bits {
6641 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006642 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006643
6644 u8 syndrome[0x20];
6645
Matan Barakb4ff3a32016-02-09 14:57:42 +02006646 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006647 u8 srqn[0x18];
6648
Matan Barakb4ff3a32016-02-09 14:57:42 +02006649 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006650};
6651
6652struct mlx5_ifc_create_srq_in_bits {
6653 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655
Matan Barakb4ff3a32016-02-09 14:57:42 +02006656 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006657 u8 op_mod[0x10];
6658
Matan Barakb4ff3a32016-02-09 14:57:42 +02006659 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006660
6661 struct mlx5_ifc_srqc_bits srq_context_entry;
6662
Matan Barakb4ff3a32016-02-09 14:57:42 +02006663 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006664
6665 u8 pas[0][0x40];
6666};
6667
6668struct mlx5_ifc_create_sq_out_bits {
6669 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006670 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006671
6672 u8 syndrome[0x20];
6673
Matan Barakb4ff3a32016-02-09 14:57:42 +02006674 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006675 u8 sqn[0x18];
6676
Matan Barakb4ff3a32016-02-09 14:57:42 +02006677 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006678};
6679
6680struct mlx5_ifc_create_sq_in_bits {
6681 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683
Matan Barakb4ff3a32016-02-09 14:57:42 +02006684 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006685 u8 op_mod[0x10];
6686
Matan Barakb4ff3a32016-02-09 14:57:42 +02006687 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006688
6689 struct mlx5_ifc_sqc_bits ctx;
6690};
6691
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006692struct mlx5_ifc_create_scheduling_element_out_bits {
6693 u8 status[0x8];
6694 u8 reserved_at_8[0x18];
6695
6696 u8 syndrome[0x20];
6697
6698 u8 reserved_at_40[0x40];
6699
6700 u8 scheduling_element_id[0x20];
6701
6702 u8 reserved_at_a0[0x160];
6703};
6704
6705struct mlx5_ifc_create_scheduling_element_in_bits {
6706 u8 opcode[0x10];
6707 u8 reserved_at_10[0x10];
6708
6709 u8 reserved_at_20[0x10];
6710 u8 op_mod[0x10];
6711
6712 u8 scheduling_hierarchy[0x8];
6713 u8 reserved_at_48[0x18];
6714
6715 u8 reserved_at_60[0xa0];
6716
6717 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6718
6719 u8 reserved_at_300[0x100];
6720};
6721
Saeed Mahameede2816822015-05-28 22:28:40 +03006722struct mlx5_ifc_create_rqt_out_bits {
6723 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006724 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006725
6726 u8 syndrome[0x20];
6727
Matan Barakb4ff3a32016-02-09 14:57:42 +02006728 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006729 u8 rqtn[0x18];
6730
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732};
6733
6734struct mlx5_ifc_create_rqt_in_bits {
6735 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006736 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006737
Matan Barakb4ff3a32016-02-09 14:57:42 +02006738 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006739 u8 op_mod[0x10];
6740
Matan Barakb4ff3a32016-02-09 14:57:42 +02006741 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006742
6743 struct mlx5_ifc_rqtc_bits rqt_context;
6744};
6745
6746struct mlx5_ifc_create_rq_out_bits {
6747 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006748 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006749
6750 u8 syndrome[0x20];
6751
Matan Barakb4ff3a32016-02-09 14:57:42 +02006752 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006753 u8 rqn[0x18];
6754
Matan Barakb4ff3a32016-02-09 14:57:42 +02006755 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006756};
6757
6758struct mlx5_ifc_create_rq_in_bits {
6759 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006760 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006761
Matan Barakb4ff3a32016-02-09 14:57:42 +02006762 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006763 u8 op_mod[0x10];
6764
Matan Barakb4ff3a32016-02-09 14:57:42 +02006765 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006766
6767 struct mlx5_ifc_rqc_bits ctx;
6768};
6769
6770struct mlx5_ifc_create_rmp_out_bits {
6771 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006772 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006773
6774 u8 syndrome[0x20];
6775
Matan Barakb4ff3a32016-02-09 14:57:42 +02006776 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006777 u8 rmpn[0x18];
6778
Matan Barakb4ff3a32016-02-09 14:57:42 +02006779 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006780};
6781
6782struct mlx5_ifc_create_rmp_in_bits {
6783 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006784 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006785
Matan Barakb4ff3a32016-02-09 14:57:42 +02006786 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006787 u8 op_mod[0x10];
6788
Matan Barakb4ff3a32016-02-09 14:57:42 +02006789 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006790
6791 struct mlx5_ifc_rmpc_bits ctx;
6792};
6793
6794struct mlx5_ifc_create_qp_out_bits {
6795 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006796 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797
6798 u8 syndrome[0x20];
6799
Matan Barakb4ff3a32016-02-09 14:57:42 +02006800 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006801 u8 qpn[0x18];
6802
Matan Barakb4ff3a32016-02-09 14:57:42 +02006803 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006804};
6805
6806struct mlx5_ifc_create_qp_in_bits {
6807 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006808 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006809
Matan Barakb4ff3a32016-02-09 14:57:42 +02006810 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006811 u8 op_mod[0x10];
6812
Matan Barakb4ff3a32016-02-09 14:57:42 +02006813 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006814
6815 u8 opt_param_mask[0x20];
6816
Matan Barakb4ff3a32016-02-09 14:57:42 +02006817 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006818
6819 struct mlx5_ifc_qpc_bits qpc;
6820
Matan Barakb4ff3a32016-02-09 14:57:42 +02006821 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006822
6823 u8 pas[0][0x40];
6824};
6825
6826struct mlx5_ifc_create_psv_out_bits {
6827 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006828 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006829
6830 u8 syndrome[0x20];
6831
Matan Barakb4ff3a32016-02-09 14:57:42 +02006832 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006833
Matan Barakb4ff3a32016-02-09 14:57:42 +02006834 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006835 u8 psv0_index[0x18];
6836
Matan Barakb4ff3a32016-02-09 14:57:42 +02006837 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006838 u8 psv1_index[0x18];
6839
Matan Barakb4ff3a32016-02-09 14:57:42 +02006840 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006841 u8 psv2_index[0x18];
6842
Matan Barakb4ff3a32016-02-09 14:57:42 +02006843 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006844 u8 psv3_index[0x18];
6845};
6846
6847struct mlx5_ifc_create_psv_in_bits {
6848 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850
Matan Barakb4ff3a32016-02-09 14:57:42 +02006851 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006852 u8 op_mod[0x10];
6853
6854 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006855 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006856 u8 pd[0x18];
6857
Matan Barakb4ff3a32016-02-09 14:57:42 +02006858 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006859};
6860
6861struct mlx5_ifc_create_mkey_out_bits {
6862 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864
6865 u8 syndrome[0x20];
6866
Matan Barakb4ff3a32016-02-09 14:57:42 +02006867 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006868 u8 mkey_index[0x18];
6869
Matan Barakb4ff3a32016-02-09 14:57:42 +02006870 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006871};
6872
6873struct mlx5_ifc_create_mkey_in_bits {
6874 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006875 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006876
Matan Barakb4ff3a32016-02-09 14:57:42 +02006877 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006878 u8 op_mod[0x10];
6879
Matan Barakb4ff3a32016-02-09 14:57:42 +02006880 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006881
6882 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006883 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006884
6885 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6886
Matan Barakb4ff3a32016-02-09 14:57:42 +02006887 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006888
6889 u8 translations_octword_actual_size[0x20];
6890
Matan Barakb4ff3a32016-02-09 14:57:42 +02006891 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006892
6893 u8 klm_pas_mtt[0][0x20];
6894};
6895
6896struct mlx5_ifc_create_flow_table_out_bits {
6897 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006898 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006899
6900 u8 syndrome[0x20];
6901
Matan Barakb4ff3a32016-02-09 14:57:42 +02006902 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006903 u8 table_id[0x18];
6904
Matan Barakb4ff3a32016-02-09 14:57:42 +02006905 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006906};
6907
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006908struct mlx5_ifc_flow_table_context_bits {
6909 u8 encap_en[0x1];
6910 u8 decap_en[0x1];
6911 u8 reserved_at_2[0x2];
6912 u8 table_miss_action[0x4];
6913 u8 level[0x8];
6914 u8 reserved_at_10[0x8];
6915 u8 log_size[0x8];
6916
6917 u8 reserved_at_20[0x8];
6918 u8 table_miss_id[0x18];
6919
6920 u8 reserved_at_40[0x8];
6921 u8 lag_master_next_table_id[0x18];
6922
6923 u8 reserved_at_60[0xe0];
6924};
6925
Saeed Mahameede2816822015-05-28 22:28:40 +03006926struct mlx5_ifc_create_flow_table_in_bits {
6927 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929
Matan Barakb4ff3a32016-02-09 14:57:42 +02006930 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006931 u8 op_mod[0x10];
6932
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006933 u8 other_vport[0x1];
6934 u8 reserved_at_41[0xf];
6935 u8 vport_number[0x10];
6936
6937 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938
6939 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006940 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006941
Matan Barakb4ff3a32016-02-09 14:57:42 +02006942 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006943
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006944 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006945};
6946
6947struct mlx5_ifc_create_flow_group_out_bits {
6948 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006949 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006950
6951 u8 syndrome[0x20];
6952
Matan Barakb4ff3a32016-02-09 14:57:42 +02006953 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006954 u8 group_id[0x18];
6955
Matan Barakb4ff3a32016-02-09 14:57:42 +02006956 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006957};
6958
6959enum {
6960 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6961 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6962 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6963};
6964
6965struct mlx5_ifc_create_flow_group_in_bits {
6966 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006967 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006968
Matan Barakb4ff3a32016-02-09 14:57:42 +02006969 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006970 u8 op_mod[0x10];
6971
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006972 u8 other_vport[0x1];
6973 u8 reserved_at_41[0xf];
6974 u8 vport_number[0x10];
6975
6976 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006977
6978 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980
Matan Barakb4ff3a32016-02-09 14:57:42 +02006981 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006982 u8 table_id[0x18];
6983
Shahar Klein3e99df82018-03-18 09:02:06 +02006984 u8 source_eswitch_owner_vhca_id_valid[0x1];
6985
6986 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006987
6988 u8 start_flow_index[0x20];
6989
Matan Barakb4ff3a32016-02-09 14:57:42 +02006990 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006991
6992 u8 end_flow_index[0x20];
6993
Matan Barakb4ff3a32016-02-09 14:57:42 +02006994 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006995
Matan Barakb4ff3a32016-02-09 14:57:42 +02006996 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006997 u8 match_criteria_enable[0x8];
6998
6999 struct mlx5_ifc_fte_match_param_bits match_criteria;
7000
Matan Barakb4ff3a32016-02-09 14:57:42 +02007001 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03007002};
7003
7004struct mlx5_ifc_create_eq_out_bits {
7005 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007006 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007007
7008 u8 syndrome[0x20];
7009
Matan Barakb4ff3a32016-02-09 14:57:42 +02007010 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007011 u8 eq_number[0x8];
7012
Matan Barakb4ff3a32016-02-09 14:57:42 +02007013 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007014};
7015
7016struct mlx5_ifc_create_eq_in_bits {
7017 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007018 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007019
Matan Barakb4ff3a32016-02-09 14:57:42 +02007020 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007021 u8 op_mod[0x10];
7022
Matan Barakb4ff3a32016-02-09 14:57:42 +02007023 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007024
7025 struct mlx5_ifc_eqc_bits eq_context_entry;
7026
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028
7029 u8 event_bitmask[0x40];
7030
Matan Barakb4ff3a32016-02-09 14:57:42 +02007031 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03007032
7033 u8 pas[0][0x40];
7034};
7035
7036struct mlx5_ifc_create_dct_out_bits {
7037 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007038 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007039
7040 u8 syndrome[0x20];
7041
Matan Barakb4ff3a32016-02-09 14:57:42 +02007042 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007043 u8 dctn[0x18];
7044
Matan Barakb4ff3a32016-02-09 14:57:42 +02007045 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007046};
7047
7048struct mlx5_ifc_create_dct_in_bits {
7049 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007050 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007051
Matan Barakb4ff3a32016-02-09 14:57:42 +02007052 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007053 u8 op_mod[0x10];
7054
Matan Barakb4ff3a32016-02-09 14:57:42 +02007055 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007056
7057 struct mlx5_ifc_dctc_bits dct_context_entry;
7058
Matan Barakb4ff3a32016-02-09 14:57:42 +02007059 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007060};
7061
7062struct mlx5_ifc_create_cq_out_bits {
7063 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007064 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007065
7066 u8 syndrome[0x20];
7067
Matan Barakb4ff3a32016-02-09 14:57:42 +02007068 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007069 u8 cqn[0x18];
7070
Matan Barakb4ff3a32016-02-09 14:57:42 +02007071 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007072};
7073
7074struct mlx5_ifc_create_cq_in_bits {
7075 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007076 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007077
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079 u8 op_mod[0x10];
7080
Matan Barakb4ff3a32016-02-09 14:57:42 +02007081 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007082
7083 struct mlx5_ifc_cqc_bits cq_context;
7084
Matan Barakb4ff3a32016-02-09 14:57:42 +02007085 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007086
7087 u8 pas[0][0x40];
7088};
7089
7090struct mlx5_ifc_config_int_moderation_out_bits {
7091 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007092 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007093
7094 u8 syndrome[0x20];
7095
Matan Barakb4ff3a32016-02-09 14:57:42 +02007096 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007097 u8 min_delay[0xc];
7098 u8 int_vector[0x10];
7099
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101};
7102
7103enum {
7104 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7105 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7106};
7107
7108struct mlx5_ifc_config_int_moderation_in_bits {
7109 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007110 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007111
Matan Barakb4ff3a32016-02-09 14:57:42 +02007112 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007113 u8 op_mod[0x10];
7114
Matan Barakb4ff3a32016-02-09 14:57:42 +02007115 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007116 u8 min_delay[0xc];
7117 u8 int_vector[0x10];
7118
Matan Barakb4ff3a32016-02-09 14:57:42 +02007119 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007120};
7121
7122struct mlx5_ifc_attach_to_mcg_out_bits {
7123 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007124 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007125
7126 u8 syndrome[0x20];
7127
Matan Barakb4ff3a32016-02-09 14:57:42 +02007128 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007129};
7130
7131struct mlx5_ifc_attach_to_mcg_in_bits {
7132 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007133 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007134
Matan Barakb4ff3a32016-02-09 14:57:42 +02007135 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007136 u8 op_mod[0x10];
7137
Matan Barakb4ff3a32016-02-09 14:57:42 +02007138 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007139 u8 qpn[0x18];
7140
Matan Barakb4ff3a32016-02-09 14:57:42 +02007141 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007142
7143 u8 multicast_gid[16][0x8];
7144};
7145
Saeed Mahameed74862162016-06-09 15:11:34 +03007146struct mlx5_ifc_arm_xrq_out_bits {
7147 u8 status[0x8];
7148 u8 reserved_at_8[0x18];
7149
7150 u8 syndrome[0x20];
7151
7152 u8 reserved_at_40[0x40];
7153};
7154
7155struct mlx5_ifc_arm_xrq_in_bits {
7156 u8 opcode[0x10];
7157 u8 reserved_at_10[0x10];
7158
7159 u8 reserved_at_20[0x10];
7160 u8 op_mod[0x10];
7161
7162 u8 reserved_at_40[0x8];
7163 u8 xrqn[0x18];
7164
7165 u8 reserved_at_60[0x10];
7166 u8 lwm[0x10];
7167};
7168
Saeed Mahameede2816822015-05-28 22:28:40 +03007169struct mlx5_ifc_arm_xrc_srq_out_bits {
7170 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007171 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007172
7173 u8 syndrome[0x20];
7174
Matan Barakb4ff3a32016-02-09 14:57:42 +02007175 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007176};
7177
7178enum {
7179 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7180};
7181
7182struct mlx5_ifc_arm_xrc_srq_in_bits {
7183 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007184 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007185
Matan Barakb4ff3a32016-02-09 14:57:42 +02007186 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007187 u8 op_mod[0x10];
7188
Matan Barakb4ff3a32016-02-09 14:57:42 +02007189 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007190 u8 xrc_srqn[0x18];
7191
Matan Barakb4ff3a32016-02-09 14:57:42 +02007192 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007193 u8 lwm[0x10];
7194};
7195
7196struct mlx5_ifc_arm_rq_out_bits {
7197 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199
7200 u8 syndrome[0x20];
7201
Matan Barakb4ff3a32016-02-09 14:57:42 +02007202 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007203};
7204
7205enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007206 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7207 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007208};
7209
7210struct mlx5_ifc_arm_rq_in_bits {
7211 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007212 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007213
Matan Barakb4ff3a32016-02-09 14:57:42 +02007214 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007215 u8 op_mod[0x10];
7216
Matan Barakb4ff3a32016-02-09 14:57:42 +02007217 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007218 u8 srq_number[0x18];
7219
Matan Barakb4ff3a32016-02-09 14:57:42 +02007220 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007221 u8 lwm[0x10];
7222};
7223
7224struct mlx5_ifc_arm_dct_out_bits {
7225 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007226 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007227
7228 u8 syndrome[0x20];
7229
Matan Barakb4ff3a32016-02-09 14:57:42 +02007230 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007231};
7232
7233struct mlx5_ifc_arm_dct_in_bits {
7234 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236
Matan Barakb4ff3a32016-02-09 14:57:42 +02007237 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007238 u8 op_mod[0x10];
7239
Matan Barakb4ff3a32016-02-09 14:57:42 +02007240 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007241 u8 dct_number[0x18];
7242
Matan Barakb4ff3a32016-02-09 14:57:42 +02007243 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007244};
7245
7246struct mlx5_ifc_alloc_xrcd_out_bits {
7247 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007248 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007249
7250 u8 syndrome[0x20];
7251
Matan Barakb4ff3a32016-02-09 14:57:42 +02007252 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007253 u8 xrcd[0x18];
7254
Matan Barakb4ff3a32016-02-09 14:57:42 +02007255 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007256};
7257
7258struct mlx5_ifc_alloc_xrcd_in_bits {
7259 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007260 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007261
Matan Barakb4ff3a32016-02-09 14:57:42 +02007262 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263 u8 op_mod[0x10];
7264
Matan Barakb4ff3a32016-02-09 14:57:42 +02007265 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007266};
7267
7268struct mlx5_ifc_alloc_uar_out_bits {
7269 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007270 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007271
7272 u8 syndrome[0x20];
7273
Matan Barakb4ff3a32016-02-09 14:57:42 +02007274 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007275 u8 uar[0x18];
7276
Matan Barakb4ff3a32016-02-09 14:57:42 +02007277 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007278};
7279
7280struct mlx5_ifc_alloc_uar_in_bits {
7281 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283
Matan Barakb4ff3a32016-02-09 14:57:42 +02007284 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007285 u8 op_mod[0x10];
7286
Matan Barakb4ff3a32016-02-09 14:57:42 +02007287 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007288};
7289
7290struct mlx5_ifc_alloc_transport_domain_out_bits {
7291 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007292 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007293
7294 u8 syndrome[0x20];
7295
Matan Barakb4ff3a32016-02-09 14:57:42 +02007296 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007297 u8 transport_domain[0x18];
7298
Matan Barakb4ff3a32016-02-09 14:57:42 +02007299 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007300};
7301
7302struct mlx5_ifc_alloc_transport_domain_in_bits {
7303 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007304 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007305
Matan Barakb4ff3a32016-02-09 14:57:42 +02007306 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007307 u8 op_mod[0x10];
7308
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310};
7311
7312struct mlx5_ifc_alloc_q_counter_out_bits {
7313 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007314 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007315
7316 u8 syndrome[0x20];
7317
Matan Barakb4ff3a32016-02-09 14:57:42 +02007318 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319 u8 counter_set_id[0x8];
7320
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322};
7323
7324struct mlx5_ifc_alloc_q_counter_in_bits {
7325 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007326 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007327
Matan Barakb4ff3a32016-02-09 14:57:42 +02007328 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007329 u8 op_mod[0x10];
7330
Matan Barakb4ff3a32016-02-09 14:57:42 +02007331 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007332};
7333
7334struct mlx5_ifc_alloc_pd_out_bits {
7335 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007336 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007337
7338 u8 syndrome[0x20];
7339
Matan Barakb4ff3a32016-02-09 14:57:42 +02007340 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007341 u8 pd[0x18];
7342
Matan Barakb4ff3a32016-02-09 14:57:42 +02007343 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007344};
7345
7346struct mlx5_ifc_alloc_pd_in_bits {
7347 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007348 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007349
Matan Barakb4ff3a32016-02-09 14:57:42 +02007350 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007351 u8 op_mod[0x10];
7352
Matan Barakb4ff3a32016-02-09 14:57:42 +02007353 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007354};
7355
Amir Vadai9dc0b282016-05-13 12:55:39 +00007356struct mlx5_ifc_alloc_flow_counter_out_bits {
7357 u8 status[0x8];
7358 u8 reserved_at_8[0x18];
7359
7360 u8 syndrome[0x20];
7361
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007362 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007363
7364 u8 reserved_at_60[0x20];
7365};
7366
7367struct mlx5_ifc_alloc_flow_counter_in_bits {
7368 u8 opcode[0x10];
7369 u8 reserved_at_10[0x10];
7370
7371 u8 reserved_at_20[0x10];
7372 u8 op_mod[0x10];
7373
7374 u8 reserved_at_40[0x40];
7375};
7376
Saeed Mahameede2816822015-05-28 22:28:40 +03007377struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7378 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007379 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007380
7381 u8 syndrome[0x20];
7382
Matan Barakb4ff3a32016-02-09 14:57:42 +02007383 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007384};
7385
7386struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7387 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007388 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007389
Matan Barakb4ff3a32016-02-09 14:57:42 +02007390 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007391 u8 op_mod[0x10];
7392
Matan Barakb4ff3a32016-02-09 14:57:42 +02007393 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007394
Matan Barakb4ff3a32016-02-09 14:57:42 +02007395 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007396 u8 vxlan_udp_port[0x10];
7397};
7398
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007399struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007400 u8 status[0x8];
7401 u8 reserved_at_8[0x18];
7402
7403 u8 syndrome[0x20];
7404
7405 u8 reserved_at_40[0x40];
7406};
7407
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007408struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007409 u8 opcode[0x10];
7410 u8 reserved_at_10[0x10];
7411
7412 u8 reserved_at_20[0x10];
7413 u8 op_mod[0x10];
7414
7415 u8 reserved_at_40[0x10];
7416 u8 rate_limit_index[0x10];
7417
7418 u8 reserved_at_60[0x20];
7419
7420 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007421
Bodong Wang05d3ac92018-03-19 15:10:29 +02007422 u8 burst_upper_bound[0x20];
7423
7424 u8 reserved_at_c0[0x10];
7425 u8 typical_packet_size[0x10];
7426
7427 u8 reserved_at_e0[0x120];
Saeed Mahameed74862162016-06-09 15:11:34 +03007428};
7429
Saeed Mahameede2816822015-05-28 22:28:40 +03007430struct mlx5_ifc_access_register_out_bits {
7431 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007432 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007433
7434 u8 syndrome[0x20];
7435
Matan Barakb4ff3a32016-02-09 14:57:42 +02007436 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007437
7438 u8 register_data[0][0x20];
7439};
7440
7441enum {
7442 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7443 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7444};
7445
7446struct mlx5_ifc_access_register_in_bits {
7447 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007448 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007449
Matan Barakb4ff3a32016-02-09 14:57:42 +02007450 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007451 u8 op_mod[0x10];
7452
Matan Barakb4ff3a32016-02-09 14:57:42 +02007453 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007454 u8 register_id[0x10];
7455
7456 u8 argument[0x20];
7457
7458 u8 register_data[0][0x20];
7459};
7460
7461struct mlx5_ifc_sltp_reg_bits {
7462 u8 status[0x4];
7463 u8 version[0x4];
7464 u8 local_port[0x8];
7465 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007466 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007467 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007468 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007469
Matan Barakb4ff3a32016-02-09 14:57:42 +02007470 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007471
Matan Barakb4ff3a32016-02-09 14:57:42 +02007472 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007473 u8 polarity[0x1];
7474 u8 ob_tap0[0x8];
7475 u8 ob_tap1[0x8];
7476 u8 ob_tap2[0x8];
7477
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479 u8 ob_preemp_mode[0x4];
7480 u8 ob_reg[0x8];
7481 u8 ob_bias[0x8];
7482
Matan Barakb4ff3a32016-02-09 14:57:42 +02007483 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007484};
7485
7486struct mlx5_ifc_slrg_reg_bits {
7487 u8 status[0x4];
7488 u8 version[0x4];
7489 u8 local_port[0x8];
7490 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007493 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007494
7495 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007496 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007497 u8 grade_lane_speed[0x4];
7498
7499 u8 grade_version[0x8];
7500 u8 grade[0x18];
7501
Matan Barakb4ff3a32016-02-09 14:57:42 +02007502 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007503 u8 height_grade_type[0x4];
7504 u8 height_grade[0x18];
7505
7506 u8 height_dz[0x10];
7507 u8 height_dv[0x10];
7508
Matan Barakb4ff3a32016-02-09 14:57:42 +02007509 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007510 u8 height_sigma[0x10];
7511
Matan Barakb4ff3a32016-02-09 14:57:42 +02007512 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007513
Matan Barakb4ff3a32016-02-09 14:57:42 +02007514 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007515 u8 phase_grade_type[0x4];
7516 u8 phase_grade[0x18];
7517
Matan Barakb4ff3a32016-02-09 14:57:42 +02007518 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007519 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007520 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007521 u8 phase_eo_neg[0x8];
7522
7523 u8 ffe_set_tested[0x10];
7524 u8 test_errors_per_lane[0x10];
7525};
7526
7527struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531
Matan Barakb4ff3a32016-02-09 14:57:42 +02007532 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007533 u8 vl_hw_cap[0x4];
7534
Matan Barakb4ff3a32016-02-09 14:57:42 +02007535 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007536 u8 vl_admin[0x4];
7537
Matan Barakb4ff3a32016-02-09 14:57:42 +02007538 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007539 u8 vl_operational[0x4];
7540};
7541
7542struct mlx5_ifc_pude_reg_bits {
7543 u8 swid[0x8];
7544 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007545 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007546 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007547 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007548 u8 oper_status[0x4];
7549
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551};
7552
7553struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007554 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007555 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007556 u8 an_disable_cap[0x1];
7557 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007559 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007560 u8 proto_mask[0x3];
7561
Saeed Mahameed74862162016-06-09 15:11:34 +03007562 u8 an_status[0x4];
7563 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007564
7565 u8 eth_proto_capability[0x20];
7566
7567 u8 ib_link_width_capability[0x10];
7568 u8 ib_proto_capability[0x10];
7569
Matan Barakb4ff3a32016-02-09 14:57:42 +02007570 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007571
7572 u8 eth_proto_admin[0x20];
7573
7574 u8 ib_link_width_admin[0x10];
7575 u8 ib_proto_admin[0x10];
7576
Matan Barakb4ff3a32016-02-09 14:57:42 +02007577 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007578
7579 u8 eth_proto_oper[0x20];
7580
7581 u8 ib_link_width_oper[0x10];
7582 u8 ib_proto_oper[0x10];
7583
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007584 u8 reserved_at_160[0x1c];
7585 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007586
7587 u8 eth_proto_lp_advertise[0x20];
7588
Matan Barakb4ff3a32016-02-09 14:57:42 +02007589 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007590};
7591
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007592struct mlx5_ifc_mlcr_reg_bits {
7593 u8 reserved_at_0[0x8];
7594 u8 local_port[0x8];
7595 u8 reserved_at_10[0x20];
7596
7597 u8 beacon_duration[0x10];
7598 u8 reserved_at_40[0x10];
7599
7600 u8 beacon_remain[0x10];
7601};
7602
Saeed Mahameede2816822015-05-28 22:28:40 +03007603struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007604 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007605
7606 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007607 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007608 u8 repetitions_mode[0x4];
7609 u8 num_of_repetitions[0x8];
7610
7611 u8 grade_version[0x8];
7612 u8 height_grade_type[0x4];
7613 u8 phase_grade_type[0x4];
7614 u8 height_grade_weight[0x8];
7615 u8 phase_grade_weight[0x8];
7616
7617 u8 gisim_measure_bits[0x10];
7618 u8 adaptive_tap_measure_bits[0x10];
7619
7620 u8 ber_bath_high_error_threshold[0x10];
7621 u8 ber_bath_mid_error_threshold[0x10];
7622
7623 u8 ber_bath_low_error_threshold[0x10];
7624 u8 one_ratio_high_threshold[0x10];
7625
7626 u8 one_ratio_high_mid_threshold[0x10];
7627 u8 one_ratio_low_mid_threshold[0x10];
7628
7629 u8 one_ratio_low_threshold[0x10];
7630 u8 ndeo_error_threshold[0x10];
7631
7632 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007633 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007634 u8 mix90_phase_for_voltage_bath[0x8];
7635
7636 u8 mixer_offset_start[0x10];
7637 u8 mixer_offset_end[0x10];
7638
Matan Barakb4ff3a32016-02-09 14:57:42 +02007639 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007640 u8 ber_test_time[0xb];
7641};
7642
7643struct mlx5_ifc_pspa_reg_bits {
7644 u8 swid[0x8];
7645 u8 local_port[0x8];
7646 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007647 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007648
Matan Barakb4ff3a32016-02-09 14:57:42 +02007649 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007650};
7651
7652struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007653 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007654 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007655 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007656 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007657 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007658 u8 mode[0x2];
7659
Matan Barakb4ff3a32016-02-09 14:57:42 +02007660 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007661
Matan Barakb4ff3a32016-02-09 14:57:42 +02007662 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007663 u8 min_threshold[0x10];
7664
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666 u8 max_threshold[0x10];
7667
Matan Barakb4ff3a32016-02-09 14:57:42 +02007668 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007669 u8 mark_probability_denominator[0x10];
7670
Matan Barakb4ff3a32016-02-09 14:57:42 +02007671 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007672};
7673
7674struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007675 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007676 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680
Matan Barakb4ff3a32016-02-09 14:57:42 +02007681 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007682 u8 wrps_admin[0x4];
7683
Matan Barakb4ff3a32016-02-09 14:57:42 +02007684 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007685 u8 wrps_status[0x4];
7686
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690 u8 down_threshold[0x8];
7691
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693
Matan Barakb4ff3a32016-02-09 14:57:42 +02007694 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007695 u8 srps_admin[0x4];
7696
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698 u8 srps_status[0x4];
7699
Matan Barakb4ff3a32016-02-09 14:57:42 +02007700 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007701};
7702
7703struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007704 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007705 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007706 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007707
Matan Barakb4ff3a32016-02-09 14:57:42 +02007708 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007709 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007710 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007711 u8 lb_en[0x8];
7712};
7713
7714struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007715 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007716 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007717 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007718
Matan Barakb4ff3a32016-02-09 14:57:42 +02007719 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007720
7721 u8 port_profile_mode[0x8];
7722 u8 static_port_profile[0x8];
7723 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007724 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007725
7726 u8 retransmission_active[0x8];
7727 u8 fec_mode_active[0x18];
7728
Matan Barakb4ff3a32016-02-09 14:57:42 +02007729 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007730};
7731
7732struct mlx5_ifc_ppcnt_reg_bits {
7733 u8 swid[0x8];
7734 u8 local_port[0x8];
7735 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007736 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007737 u8 grp[0x6];
7738
7739 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007740 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007741 u8 prio_tc[0x3];
7742
7743 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7744};
7745
Gal Pressman8ed1a632016-11-17 13:46:01 +02007746struct mlx5_ifc_mpcnt_reg_bits {
7747 u8 reserved_at_0[0x8];
7748 u8 pcie_index[0x8];
7749 u8 reserved_at_10[0xa];
7750 u8 grp[0x6];
7751
7752 u8 clr[0x1];
7753 u8 reserved_at_21[0x1f];
7754
7755 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7756};
7757
Saeed Mahameede2816822015-05-28 22:28:40 +03007758struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762 u8 local_port[0x8];
7763 u8 mac_47_32[0x10];
7764
7765 u8 mac_31_0[0x20];
7766
Matan Barakb4ff3a32016-02-09 14:57:42 +02007767 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007768};
7769
7770struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007771 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007772 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007773 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007774
7775 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007776 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007777
7778 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007779 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007780
7781 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007782 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007783};
7784
7785struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007786 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007787 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007788 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007789
Matan Barakb4ff3a32016-02-09 14:57:42 +02007790 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007791 u8 attenuation_5g[0x8];
7792
Matan Barakb4ff3a32016-02-09 14:57:42 +02007793 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007794 u8 attenuation_7g[0x8];
7795
Matan Barakb4ff3a32016-02-09 14:57:42 +02007796 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007797 u8 attenuation_12g[0x8];
7798};
7799
7800struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007801 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007802 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007803 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007804 u8 module_status[0x4];
7805
Matan Barakb4ff3a32016-02-09 14:57:42 +02007806 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007807};
7808
7809struct mlx5_ifc_pmpc_reg_bits {
7810 u8 module_state_updated[32][0x8];
7811};
7812
7813struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815 u8 mlpn_status[0x4];
7816 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007817 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007818
7819 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007820 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007821};
7822
7823struct mlx5_ifc_pmlp_reg_bits {
7824 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007825 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007826 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007827 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007828 u8 width[0x8];
7829
7830 u8 lane0_module_mapping[0x20];
7831
7832 u8 lane1_module_mapping[0x20];
7833
7834 u8 lane2_module_mapping[0x20];
7835
7836 u8 lane3_module_mapping[0x20];
7837
Matan Barakb4ff3a32016-02-09 14:57:42 +02007838 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007839};
7840
7841struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007842 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007843 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007844 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007845 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847 u8 oper_status[0x4];
7848
7849 u8 ase[0x1];
7850 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007851 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007852 u8 e[0x2];
7853
Matan Barakb4ff3a32016-02-09 14:57:42 +02007854 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007855};
7856
7857struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007858 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007859 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007860 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007861 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007862 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007863
Matan Barakb4ff3a32016-02-09 14:57:42 +02007864 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007865 u8 lane_speed[0x10];
7866
Matan Barakb4ff3a32016-02-09 14:57:42 +02007867 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007868 u8 lpbf[0x1];
7869 u8 fec_mode_policy[0x8];
7870
7871 u8 retransmission_capability[0x8];
7872 u8 fec_mode_capability[0x18];
7873
7874 u8 retransmission_support_admin[0x8];
7875 u8 fec_mode_support_admin[0x18];
7876
7877 u8 retransmission_request_admin[0x8];
7878 u8 fec_mode_request_admin[0x18];
7879
Matan Barakb4ff3a32016-02-09 14:57:42 +02007880 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007881};
7882
7883struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007884 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007885 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007886 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007887 u8 ib_port[0x8];
7888
Matan Barakb4ff3a32016-02-09 14:57:42 +02007889 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007890};
7891
7892struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007893 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007894 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007895 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007896 u8 lbf_mode[0x3];
7897
Matan Barakb4ff3a32016-02-09 14:57:42 +02007898 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007899};
7900
7901struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007902 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007903 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007904 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007905
7906 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007907 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007908 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007909 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007910};
7911
7912struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007913 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007914 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007915 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007916
Matan Barakb4ff3a32016-02-09 14:57:42 +02007917 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007918
7919 u8 port_filter[8][0x20];
7920
7921 u8 port_filter_update_en[8][0x20];
7922};
7923
7924struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007925 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007926 u8 local_port[0x8];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007927 u8 reserved_at_10[0xb];
7928 u8 ppan_mask_n[0x1];
7929 u8 minor_stall_mask[0x1];
7930 u8 critical_stall_mask[0x1];
7931 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007932
7933 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007934 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007935 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007936 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007937 u8 prio_mask_rx[0x8];
7938
7939 u8 pptx[0x1];
7940 u8 aptx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007941 u8 pptx_mask_n[0x1];
7942 u8 reserved_at_43[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007943 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007944 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007945
7946 u8 pprx[0x1];
7947 u8 aprx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007948 u8 pprx_mask_n[0x1];
7949 u8 reserved_at_63[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007950 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007951 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007952
Inbar Karmy2afa6092017-11-20 18:06:20 +02007953 u8 device_stall_minor_watermark[0x10];
7954 u8 device_stall_critical_watermark[0x10];
7955
7956 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007957};
7958
7959struct mlx5_ifc_pelc_reg_bits {
7960 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007961 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007962 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007963 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007964
7965 u8 op_admin[0x8];
7966 u8 op_capability[0x8];
7967 u8 op_request[0x8];
7968 u8 op_active[0x8];
7969
7970 u8 admin[0x40];
7971
7972 u8 capability[0x40];
7973
7974 u8 request[0x40];
7975
7976 u8 active[0x40];
7977
Matan Barakb4ff3a32016-02-09 14:57:42 +02007978 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007979};
7980
7981struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007982 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007983 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007984 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007985
Matan Barakb4ff3a32016-02-09 14:57:42 +02007986 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007987 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007988 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007989
Matan Barakb4ff3a32016-02-09 14:57:42 +02007990 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007991 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007992 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007993 u8 error_type[0x8];
7994};
7995
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007996struct mlx5_ifc_pcam_enhanced_features_bits {
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007997 u8 reserved_at_0[0x76];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007998
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007999 u8 pfcc_mask[0x1];
8000 u8 reserved_at_77[0x4];
Gal Pressman2dba0792017-06-18 14:56:45 +03008001 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02008002 u8 ptys_connector_type[0x1];
8003 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008004 u8 ppcnt_discard_group[0x1];
8005 u8 ppcnt_statistical_group[0x1];
8006};
8007
Huy Nguyendf5f1362018-02-28 14:16:47 -06008008struct mlx5_ifc_pcam_regs_5000_to_507f_bits {
8009 u8 port_access_reg_cap_mask_127_to_96[0x20];
8010 u8 port_access_reg_cap_mask_95_to_64[0x20];
8011 u8 port_access_reg_cap_mask_63_to_32[0x20];
8012
8013 u8 port_access_reg_cap_mask_31_to_13[0x13];
8014 u8 pbmc[0x1];
8015 u8 pptb[0x1];
8016 u8 port_access_reg_cap_mask_10_to_0[0xb];
8017};
8018
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008019struct mlx5_ifc_pcam_reg_bits {
8020 u8 reserved_at_0[0x8];
8021 u8 feature_group[0x8];
8022 u8 reserved_at_10[0x8];
8023 u8 access_reg_group[0x8];
8024
8025 u8 reserved_at_20[0x20];
8026
8027 union {
Huy Nguyendf5f1362018-02-28 14:16:47 -06008028 struct mlx5_ifc_pcam_regs_5000_to_507f_bits regs_5000_to_507f;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008029 u8 reserved_at_0[0x80];
8030 } port_access_reg_cap_mask;
8031
8032 u8 reserved_at_c0[0x80];
8033
8034 union {
8035 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
8036 u8 reserved_at_0[0x80];
8037 } feature_cap_mask;
8038
8039 u8 reserved_at_1c0[0xc0];
8040};
8041
8042struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03008043 u8 reserved_at_0[0x7b];
8044 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03008045 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008046 u8 mtpps_enh_out_per_adj[0x1];
8047 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008048 u8 pcie_performance_group[0x1];
8049};
8050
Or Gerlitz0ab87742017-06-11 15:25:38 +03008051struct mlx5_ifc_mcam_access_reg_bits {
8052 u8 reserved_at_0[0x1c];
8053 u8 mcda[0x1];
8054 u8 mcc[0x1];
8055 u8 mcqi[0x1];
8056 u8 reserved_at_1f[0x1];
8057
8058 u8 regs_95_to_64[0x20];
8059 u8 regs_63_to_32[0x20];
8060 u8 regs_31_to_0[0x20];
8061};
8062
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008063struct mlx5_ifc_mcam_reg_bits {
8064 u8 reserved_at_0[0x8];
8065 u8 feature_group[0x8];
8066 u8 reserved_at_10[0x8];
8067 u8 access_reg_group[0x8];
8068
8069 u8 reserved_at_20[0x20];
8070
8071 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03008072 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008073 u8 reserved_at_0[0x80];
8074 } mng_access_reg_cap_mask;
8075
8076 u8 reserved_at_c0[0x80];
8077
8078 union {
8079 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
8080 u8 reserved_at_0[0x80];
8081 } mng_feature_cap_mask;
8082
8083 u8 reserved_at_1c0[0x80];
8084};
8085
Huy Nguyenc02762e2017-07-18 16:03:17 -05008086struct mlx5_ifc_qcam_access_reg_cap_mask {
8087 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
8088 u8 qpdpm[0x1];
8089 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
8090 u8 qdpm[0x1];
8091 u8 qpts[0x1];
8092 u8 qcap[0x1];
8093 u8 qcam_access_reg_cap_mask_0[0x1];
8094};
8095
8096struct mlx5_ifc_qcam_qos_feature_cap_mask {
8097 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
8098 u8 qpts_trust_both[0x1];
8099};
8100
8101struct mlx5_ifc_qcam_reg_bits {
8102 u8 reserved_at_0[0x8];
8103 u8 feature_group[0x8];
8104 u8 reserved_at_10[0x8];
8105 u8 access_reg_group[0x8];
8106 u8 reserved_at_20[0x20];
8107
8108 union {
8109 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
8110 u8 reserved_at_0[0x80];
8111 } qos_access_reg_cap_mask;
8112
8113 u8 reserved_at_c0[0x80];
8114
8115 union {
8116 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8117 u8 reserved_at_0[0x80];
8118 } qos_feature_cap_mask;
8119
8120 u8 reserved_at_1c0[0x80];
8121};
8122
Saeed Mahameede2816822015-05-28 22:28:40 +03008123struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008124 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008125 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008126 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008127
8128 u8 port_capability_mask[4][0x20];
8129};
8130
8131struct mlx5_ifc_paos_reg_bits {
8132 u8 swid[0x8];
8133 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008134 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008135 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008136 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008137 u8 oper_status[0x4];
8138
8139 u8 ase[0x1];
8140 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008141 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008142 u8 e[0x2];
8143
Matan Barakb4ff3a32016-02-09 14:57:42 +02008144 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008145};
8146
8147struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008148 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008149 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008150 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008151 u8 opamp_group_type[0x4];
8152
8153 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008154 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008155 u8 num_of_indices[0xc];
8156
8157 u8 index_data[18][0x10];
8158};
8159
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008160struct mlx5_ifc_pcmr_reg_bits {
8161 u8 reserved_at_0[0x8];
8162 u8 local_port[0x8];
8163 u8 reserved_at_10[0x2e];
8164 u8 fcs_cap[0x1];
8165 u8 reserved_at_3f[0x1f];
8166 u8 fcs_chk[0x1];
8167 u8 reserved_at_5f[0x1];
8168};
8169
Saeed Mahameede2816822015-05-28 22:28:40 +03008170struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008171 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008172 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008173 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008174 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008175 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008176 u8 module[0x8];
8177};
8178
8179struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008180 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008181 u8 lossy[0x1];
8182 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008183 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008184 u8 size[0xc];
8185
8186 u8 xoff_threshold[0x10];
8187 u8 xon_threshold[0x10];
8188};
8189
8190struct mlx5_ifc_set_node_in_bits {
8191 u8 node_description[64][0x8];
8192};
8193
8194struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008195 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008196 u8 power_settings_level[0x8];
8197
Matan Barakb4ff3a32016-02-09 14:57:42 +02008198 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008199};
8200
8201struct mlx5_ifc_register_host_endianness_bits {
8202 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008203 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008204
Matan Barakb4ff3a32016-02-09 14:57:42 +02008205 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008206};
8207
8208struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008209 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008210
8211 u8 mkey[0x20];
8212
8213 u8 addressh_63_32[0x20];
8214
8215 u8 addressl_31_0[0x20];
8216};
8217
8218struct mlx5_ifc_ud_adrs_vector_bits {
8219 u8 dc_key[0x40];
8220
8221 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008222 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008223 u8 destination_qp_dct[0x18];
8224
8225 u8 static_rate[0x4];
8226 u8 sl_eth_prio[0x4];
8227 u8 fl[0x1];
8228 u8 mlid[0x7];
8229 u8 rlid_udp_sport[0x10];
8230
Matan Barakb4ff3a32016-02-09 14:57:42 +02008231 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008232
8233 u8 rmac_47_16[0x20];
8234
8235 u8 rmac_15_0[0x10];
8236 u8 tclass[0x8];
8237 u8 hop_limit[0x8];
8238
Matan Barakb4ff3a32016-02-09 14:57:42 +02008239 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008240 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008241 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008242 u8 src_addr_index[0x8];
8243 u8 flow_label[0x14];
8244
8245 u8 rgid_rip[16][0x8];
8246};
8247
8248struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008249 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008250 u8 function_id[0x10];
8251
8252 u8 num_pages[0x20];
8253
Matan Barakb4ff3a32016-02-09 14:57:42 +02008254 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008255};
8256
8257struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008258 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008259 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008260 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008261 u8 event_sub_type[0x8];
8262
Matan Barakb4ff3a32016-02-09 14:57:42 +02008263 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008264
8265 union mlx5_ifc_event_auto_bits event_data;
8266
Matan Barakb4ff3a32016-02-09 14:57:42 +02008267 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008268 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008269 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008270 u8 owner[0x1];
8271};
8272
8273enum {
8274 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8275};
8276
8277struct mlx5_ifc_cmd_queue_entry_bits {
8278 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008279 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008280
8281 u8 input_length[0x20];
8282
8283 u8 input_mailbox_pointer_63_32[0x20];
8284
8285 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008286 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008287
8288 u8 command_input_inline_data[16][0x8];
8289
8290 u8 command_output_inline_data[16][0x8];
8291
8292 u8 output_mailbox_pointer_63_32[0x20];
8293
8294 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008295 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008296
8297 u8 output_length[0x20];
8298
8299 u8 token[0x8];
8300 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008301 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008302 u8 status[0x7];
8303 u8 ownership[0x1];
8304};
8305
8306struct mlx5_ifc_cmd_out_bits {
8307 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008308 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008309
8310 u8 syndrome[0x20];
8311
8312 u8 command_output[0x20];
8313};
8314
8315struct mlx5_ifc_cmd_in_bits {
8316 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008317 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008318
Matan Barakb4ff3a32016-02-09 14:57:42 +02008319 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008320 u8 op_mod[0x10];
8321
8322 u8 command[0][0x20];
8323};
8324
8325struct mlx5_ifc_cmd_if_box_bits {
8326 u8 mailbox_data[512][0x8];
8327
Matan Barakb4ff3a32016-02-09 14:57:42 +02008328 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008329
8330 u8 next_pointer_63_32[0x20];
8331
8332 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008333 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008334
8335 u8 block_number[0x20];
8336
Matan Barakb4ff3a32016-02-09 14:57:42 +02008337 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008338 u8 token[0x8];
8339 u8 ctrl_signature[0x8];
8340 u8 signature[0x8];
8341};
8342
8343struct mlx5_ifc_mtt_bits {
8344 u8 ptag_63_32[0x20];
8345
8346 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008347 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008348 u8 wr_en[0x1];
8349 u8 rd_en[0x1];
8350};
8351
Tariq Toukan928cfe82016-02-22 18:17:29 +02008352struct mlx5_ifc_query_wol_rol_out_bits {
8353 u8 status[0x8];
8354 u8 reserved_at_8[0x18];
8355
8356 u8 syndrome[0x20];
8357
8358 u8 reserved_at_40[0x10];
8359 u8 rol_mode[0x8];
8360 u8 wol_mode[0x8];
8361
8362 u8 reserved_at_60[0x20];
8363};
8364
8365struct mlx5_ifc_query_wol_rol_in_bits {
8366 u8 opcode[0x10];
8367 u8 reserved_at_10[0x10];
8368
8369 u8 reserved_at_20[0x10];
8370 u8 op_mod[0x10];
8371
8372 u8 reserved_at_40[0x40];
8373};
8374
8375struct mlx5_ifc_set_wol_rol_out_bits {
8376 u8 status[0x8];
8377 u8 reserved_at_8[0x18];
8378
8379 u8 syndrome[0x20];
8380
8381 u8 reserved_at_40[0x40];
8382};
8383
8384struct mlx5_ifc_set_wol_rol_in_bits {
8385 u8 opcode[0x10];
8386 u8 reserved_at_10[0x10];
8387
8388 u8 reserved_at_20[0x10];
8389 u8 op_mod[0x10];
8390
8391 u8 rol_mode_valid[0x1];
8392 u8 wol_mode_valid[0x1];
8393 u8 reserved_at_42[0xe];
8394 u8 rol_mode[0x8];
8395 u8 wol_mode[0x8];
8396
8397 u8 reserved_at_60[0x20];
8398};
8399
Saeed Mahameede2816822015-05-28 22:28:40 +03008400enum {
8401 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8402 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8403 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8404};
8405
8406enum {
8407 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8408 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8409 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8410};
8411
8412enum {
8413 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8414 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8415 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8416 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8417 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8418 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8419 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8420 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8421 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8422 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8423 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8424};
8425
8426struct mlx5_ifc_initial_seg_bits {
8427 u8 fw_rev_minor[0x10];
8428 u8 fw_rev_major[0x10];
8429
8430 u8 cmd_interface_rev[0x10];
8431 u8 fw_rev_subminor[0x10];
8432
Matan Barakb4ff3a32016-02-09 14:57:42 +02008433 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008434
8435 u8 cmdq_phy_addr_63_32[0x20];
8436
8437 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008438 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008439 u8 nic_interface[0x2];
8440 u8 log_cmdq_size[0x4];
8441 u8 log_cmdq_stride[0x4];
8442
8443 u8 command_doorbell_vector[0x20];
8444
Matan Barakb4ff3a32016-02-09 14:57:42 +02008445 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008446
8447 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008448 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008449 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008450 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008451
8452 struct mlx5_ifc_health_buffer_bits health_buffer;
8453
8454 u8 no_dram_nic_offset[0x20];
8455
Matan Barakb4ff3a32016-02-09 14:57:42 +02008456 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008457
Matan Barakb4ff3a32016-02-09 14:57:42 +02008458 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008459 u8 clear_int[0x1];
8460
8461 u8 health_syndrome[0x8];
8462 u8 health_counter[0x18];
8463
Matan Barakb4ff3a32016-02-09 14:57:42 +02008464 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008465};
8466
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008467struct mlx5_ifc_mtpps_reg_bits {
8468 u8 reserved_at_0[0xc];
8469 u8 cap_number_of_pps_pins[0x4];
8470 u8 reserved_at_10[0x4];
8471 u8 cap_max_num_of_pps_in_pins[0x4];
8472 u8 reserved_at_18[0x4];
8473 u8 cap_max_num_of_pps_out_pins[0x4];
8474
8475 u8 reserved_at_20[0x24];
8476 u8 cap_pin_3_mode[0x4];
8477 u8 reserved_at_48[0x4];
8478 u8 cap_pin_2_mode[0x4];
8479 u8 reserved_at_50[0x4];
8480 u8 cap_pin_1_mode[0x4];
8481 u8 reserved_at_58[0x4];
8482 u8 cap_pin_0_mode[0x4];
8483
8484 u8 reserved_at_60[0x4];
8485 u8 cap_pin_7_mode[0x4];
8486 u8 reserved_at_68[0x4];
8487 u8 cap_pin_6_mode[0x4];
8488 u8 reserved_at_70[0x4];
8489 u8 cap_pin_5_mode[0x4];
8490 u8 reserved_at_78[0x4];
8491 u8 cap_pin_4_mode[0x4];
8492
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008493 u8 field_select[0x20];
8494 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008495
8496 u8 enable[0x1];
8497 u8 reserved_at_101[0xb];
8498 u8 pattern[0x4];
8499 u8 reserved_at_110[0x4];
8500 u8 pin_mode[0x4];
8501 u8 pin[0x8];
8502
8503 u8 reserved_at_120[0x20];
8504
8505 u8 time_stamp[0x40];
8506
8507 u8 out_pulse_duration[0x10];
8508 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008509 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008510
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008511 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008512};
8513
8514struct mlx5_ifc_mtppse_reg_bits {
8515 u8 reserved_at_0[0x18];
8516 u8 pin[0x8];
8517 u8 event_arm[0x1];
8518 u8 reserved_at_21[0x1b];
8519 u8 event_generation_mode[0x4];
8520 u8 reserved_at_40[0x40];
8521};
8522
Or Gerlitz47176282017-04-18 13:35:39 +03008523struct mlx5_ifc_mcqi_cap_bits {
8524 u8 supported_info_bitmask[0x20];
8525
8526 u8 component_size[0x20];
8527
8528 u8 max_component_size[0x20];
8529
8530 u8 log_mcda_word_size[0x4];
8531 u8 reserved_at_64[0xc];
8532 u8 mcda_max_write_size[0x10];
8533
8534 u8 rd_en[0x1];
8535 u8 reserved_at_81[0x1];
8536 u8 match_chip_id[0x1];
8537 u8 match_psid[0x1];
8538 u8 check_user_timestamp[0x1];
8539 u8 match_base_guid_mac[0x1];
8540 u8 reserved_at_86[0x1a];
8541};
8542
8543struct mlx5_ifc_mcqi_reg_bits {
8544 u8 read_pending_component[0x1];
8545 u8 reserved_at_1[0xf];
8546 u8 component_index[0x10];
8547
8548 u8 reserved_at_20[0x20];
8549
8550 u8 reserved_at_40[0x1b];
8551 u8 info_type[0x5];
8552
8553 u8 info_size[0x20];
8554
8555 u8 offset[0x20];
8556
8557 u8 reserved_at_a0[0x10];
8558 u8 data_size[0x10];
8559
8560 u8 data[0][0x20];
8561};
8562
8563struct mlx5_ifc_mcc_reg_bits {
8564 u8 reserved_at_0[0x4];
8565 u8 time_elapsed_since_last_cmd[0xc];
8566 u8 reserved_at_10[0x8];
8567 u8 instruction[0x8];
8568
8569 u8 reserved_at_20[0x10];
8570 u8 component_index[0x10];
8571
8572 u8 reserved_at_40[0x8];
8573 u8 update_handle[0x18];
8574
8575 u8 handle_owner_type[0x4];
8576 u8 handle_owner_host_id[0x4];
8577 u8 reserved_at_68[0x1];
8578 u8 control_progress[0x7];
8579 u8 error_code[0x8];
8580 u8 reserved_at_78[0x4];
8581 u8 control_state[0x4];
8582
8583 u8 component_size[0x20];
8584
8585 u8 reserved_at_a0[0x60];
8586};
8587
8588struct mlx5_ifc_mcda_reg_bits {
8589 u8 reserved_at_0[0x8];
8590 u8 update_handle[0x18];
8591
8592 u8 offset[0x20];
8593
8594 u8 reserved_at_40[0x10];
8595 u8 size[0x10];
8596
8597 u8 reserved_at_60[0x20];
8598
8599 u8 data[0][0x20];
8600};
8601
Saeed Mahameede2816822015-05-28 22:28:40 +03008602union mlx5_ifc_ports_control_registers_document_bits {
8603 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8604 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8605 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8606 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8607 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8608 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8609 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8610 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8611 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8612 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8613 struct mlx5_ifc_paos_reg_bits paos_reg;
8614 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8615 struct mlx5_ifc_peir_reg_bits peir_reg;
8616 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8617 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008618 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008619 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8620 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8621 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8622 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8623 struct mlx5_ifc_plib_reg_bits plib_reg;
8624 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8625 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8626 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8627 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8628 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8629 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8630 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8631 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8632 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8633 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008634 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008635 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8636 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8637 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8638 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8639 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8640 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8641 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008642 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008643 struct mlx5_ifc_pude_reg_bits pude_reg;
8644 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8645 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8646 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008647 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8648 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008649 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008650 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8651 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008652 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8653 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8654 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008655 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008656};
8657
8658union mlx5_ifc_debug_enhancements_document_bits {
8659 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008660 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008661};
8662
8663union mlx5_ifc_uplink_pci_interface_document_bits {
8664 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008665 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008666};
8667
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008668struct mlx5_ifc_set_flow_table_root_out_bits {
8669 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008670 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008671
8672 u8 syndrome[0x20];
8673
Matan Barakb4ff3a32016-02-09 14:57:42 +02008674 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008675};
8676
8677struct mlx5_ifc_set_flow_table_root_in_bits {
8678 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008679 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008680
Matan Barakb4ff3a32016-02-09 14:57:42 +02008681 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008682 u8 op_mod[0x10];
8683
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008684 u8 other_vport[0x1];
8685 u8 reserved_at_41[0xf];
8686 u8 vport_number[0x10];
8687
8688 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008689
8690 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008691 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008692
Matan Barakb4ff3a32016-02-09 14:57:42 +02008693 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008694 u8 table_id[0x18];
8695
Erez Shitrit500a3d02017-04-13 06:36:51 +03008696 u8 reserved_at_c0[0x8];
8697 u8 underlay_qpn[0x18];
8698 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008699};
8700
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008701enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008702 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8703 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008704};
8705
8706struct mlx5_ifc_modify_flow_table_out_bits {
8707 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008708 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008709
8710 u8 syndrome[0x20];
8711
Matan Barakb4ff3a32016-02-09 14:57:42 +02008712 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008713};
8714
8715struct mlx5_ifc_modify_flow_table_in_bits {
8716 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008717 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008718
Matan Barakb4ff3a32016-02-09 14:57:42 +02008719 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008720 u8 op_mod[0x10];
8721
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008722 u8 other_vport[0x1];
8723 u8 reserved_at_41[0xf];
8724 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008725
Matan Barakb4ff3a32016-02-09 14:57:42 +02008726 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008727 u8 modify_field_select[0x10];
8728
8729 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008730 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008731
Matan Barakb4ff3a32016-02-09 14:57:42 +02008732 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008733 u8 table_id[0x18];
8734
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008735 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008736};
8737
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008738struct mlx5_ifc_ets_tcn_config_reg_bits {
8739 u8 g[0x1];
8740 u8 b[0x1];
8741 u8 r[0x1];
8742 u8 reserved_at_3[0x9];
8743 u8 group[0x4];
8744 u8 reserved_at_10[0x9];
8745 u8 bw_allocation[0x7];
8746
8747 u8 reserved_at_20[0xc];
8748 u8 max_bw_units[0x4];
8749 u8 reserved_at_30[0x8];
8750 u8 max_bw_value[0x8];
8751};
8752
8753struct mlx5_ifc_ets_global_config_reg_bits {
8754 u8 reserved_at_0[0x2];
8755 u8 r[0x1];
8756 u8 reserved_at_3[0x1d];
8757
8758 u8 reserved_at_20[0xc];
8759 u8 max_bw_units[0x4];
8760 u8 reserved_at_30[0x8];
8761 u8 max_bw_value[0x8];
8762};
8763
8764struct mlx5_ifc_qetc_reg_bits {
8765 u8 reserved_at_0[0x8];
8766 u8 port_number[0x8];
8767 u8 reserved_at_10[0x30];
8768
8769 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8770 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8771};
8772
Huy Nguyen415a64a2017-07-18 16:08:46 -05008773struct mlx5_ifc_qpdpm_dscp_reg_bits {
8774 u8 e[0x1];
8775 u8 reserved_at_01[0x0b];
8776 u8 prio[0x04];
8777};
8778
8779struct mlx5_ifc_qpdpm_reg_bits {
8780 u8 reserved_at_0[0x8];
8781 u8 local_port[0x8];
8782 u8 reserved_at_10[0x10];
8783 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8784};
8785
8786struct mlx5_ifc_qpts_reg_bits {
8787 u8 reserved_at_0[0x8];
8788 u8 local_port[0x8];
8789 u8 reserved_at_10[0x2d];
8790 u8 trust_state[0x3];
8791};
8792
Huy Nguyen50b4a3c2018-03-02 15:47:01 -06008793struct mlx5_ifc_pptb_reg_bits {
8794 u8 reserved_at_0[0x2];
8795 u8 mm[0x2];
8796 u8 reserved_at_4[0x4];
8797 u8 local_port[0x8];
8798 u8 reserved_at_10[0x6];
8799 u8 cm[0x1];
8800 u8 um[0x1];
8801 u8 pm[0x8];
8802
8803 u8 prio_x_buff[0x20];
8804
8805 u8 pm_msb[0x8];
8806 u8 reserved_at_48[0x10];
8807 u8 ctrl_buff[0x4];
8808 u8 untagged_buff[0x4];
8809};
8810
8811struct mlx5_ifc_pbmc_reg_bits {
8812 u8 reserved_at_0[0x8];
8813 u8 local_port[0x8];
8814 u8 reserved_at_10[0x10];
8815
8816 u8 xoff_timer_value[0x10];
8817 u8 xoff_refresh[0x10];
8818
8819 u8 reserved_at_40[0x9];
8820 u8 fullness_threshold[0x7];
8821 u8 port_buffer_size[0x10];
8822
8823 struct mlx5_ifc_bufferx_reg_bits buffer[10];
8824
8825 u8 reserved_at_2e0[0x40];
8826};
8827
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008828struct mlx5_ifc_qtct_reg_bits {
8829 u8 reserved_at_0[0x8];
8830 u8 port_number[0x8];
8831 u8 reserved_at_10[0xd];
8832 u8 prio[0x3];
8833
8834 u8 reserved_at_20[0x1d];
8835 u8 tclass[0x3];
8836};
8837
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008838struct mlx5_ifc_mcia_reg_bits {
8839 u8 l[0x1];
8840 u8 reserved_at_1[0x7];
8841 u8 module[0x8];
8842 u8 reserved_at_10[0x8];
8843 u8 status[0x8];
8844
8845 u8 i2c_device_address[0x8];
8846 u8 page_number[0x8];
8847 u8 device_address[0x10];
8848
8849 u8 reserved_at_40[0x10];
8850 u8 size[0x10];
8851
8852 u8 reserved_at_60[0x20];
8853
8854 u8 dword_0[0x20];
8855 u8 dword_1[0x20];
8856 u8 dword_2[0x20];
8857 u8 dword_3[0x20];
8858 u8 dword_4[0x20];
8859 u8 dword_5[0x20];
8860 u8 dword_6[0x20];
8861 u8 dword_7[0x20];
8862 u8 dword_8[0x20];
8863 u8 dword_9[0x20];
8864 u8 dword_10[0x20];
8865 u8 dword_11[0x20];
8866};
8867
Saeed Mahameed74862162016-06-09 15:11:34 +03008868struct mlx5_ifc_dcbx_param_bits {
8869 u8 dcbx_cee_cap[0x1];
8870 u8 dcbx_ieee_cap[0x1];
8871 u8 dcbx_standby_cap[0x1];
8872 u8 reserved_at_0[0x5];
8873 u8 port_number[0x8];
8874 u8 reserved_at_10[0xa];
8875 u8 max_application_table_size[6];
8876 u8 reserved_at_20[0x15];
8877 u8 version_oper[0x3];
8878 u8 reserved_at_38[5];
8879 u8 version_admin[0x3];
8880 u8 willing_admin[0x1];
8881 u8 reserved_at_41[0x3];
8882 u8 pfc_cap_oper[0x4];
8883 u8 reserved_at_48[0x4];
8884 u8 pfc_cap_admin[0x4];
8885 u8 reserved_at_50[0x4];
8886 u8 num_of_tc_oper[0x4];
8887 u8 reserved_at_58[0x4];
8888 u8 num_of_tc_admin[0x4];
8889 u8 remote_willing[0x1];
8890 u8 reserved_at_61[3];
8891 u8 remote_pfc_cap[4];
8892 u8 reserved_at_68[0x14];
8893 u8 remote_num_of_tc[0x4];
8894 u8 reserved_at_80[0x18];
8895 u8 error[0x8];
8896 u8 reserved_at_a0[0x160];
8897};
Aviv Heller84df61e2016-05-10 13:47:50 +03008898
8899struct mlx5_ifc_lagc_bits {
8900 u8 reserved_at_0[0x1d];
8901 u8 lag_state[0x3];
8902
8903 u8 reserved_at_20[0x14];
8904 u8 tx_remap_affinity_2[0x4];
8905 u8 reserved_at_38[0x4];
8906 u8 tx_remap_affinity_1[0x4];
8907};
8908
8909struct mlx5_ifc_create_lag_out_bits {
8910 u8 status[0x8];
8911 u8 reserved_at_8[0x18];
8912
8913 u8 syndrome[0x20];
8914
8915 u8 reserved_at_40[0x40];
8916};
8917
8918struct mlx5_ifc_create_lag_in_bits {
8919 u8 opcode[0x10];
8920 u8 reserved_at_10[0x10];
8921
8922 u8 reserved_at_20[0x10];
8923 u8 op_mod[0x10];
8924
8925 struct mlx5_ifc_lagc_bits ctx;
8926};
8927
8928struct mlx5_ifc_modify_lag_out_bits {
8929 u8 status[0x8];
8930 u8 reserved_at_8[0x18];
8931
8932 u8 syndrome[0x20];
8933
8934 u8 reserved_at_40[0x40];
8935};
8936
8937struct mlx5_ifc_modify_lag_in_bits {
8938 u8 opcode[0x10];
8939 u8 reserved_at_10[0x10];
8940
8941 u8 reserved_at_20[0x10];
8942 u8 op_mod[0x10];
8943
8944 u8 reserved_at_40[0x20];
8945 u8 field_select[0x20];
8946
8947 struct mlx5_ifc_lagc_bits ctx;
8948};
8949
8950struct mlx5_ifc_query_lag_out_bits {
8951 u8 status[0x8];
8952 u8 reserved_at_8[0x18];
8953
8954 u8 syndrome[0x20];
8955
8956 u8 reserved_at_40[0x40];
8957
8958 struct mlx5_ifc_lagc_bits ctx;
8959};
8960
8961struct mlx5_ifc_query_lag_in_bits {
8962 u8 opcode[0x10];
8963 u8 reserved_at_10[0x10];
8964
8965 u8 reserved_at_20[0x10];
8966 u8 op_mod[0x10];
8967
8968 u8 reserved_at_40[0x40];
8969};
8970
8971struct mlx5_ifc_destroy_lag_out_bits {
8972 u8 status[0x8];
8973 u8 reserved_at_8[0x18];
8974
8975 u8 syndrome[0x20];
8976
8977 u8 reserved_at_40[0x40];
8978};
8979
8980struct mlx5_ifc_destroy_lag_in_bits {
8981 u8 opcode[0x10];
8982 u8 reserved_at_10[0x10];
8983
8984 u8 reserved_at_20[0x10];
8985 u8 op_mod[0x10];
8986
8987 u8 reserved_at_40[0x40];
8988};
8989
8990struct mlx5_ifc_create_vport_lag_out_bits {
8991 u8 status[0x8];
8992 u8 reserved_at_8[0x18];
8993
8994 u8 syndrome[0x20];
8995
8996 u8 reserved_at_40[0x40];
8997};
8998
8999struct mlx5_ifc_create_vport_lag_in_bits {
9000 u8 opcode[0x10];
9001 u8 reserved_at_10[0x10];
9002
9003 u8 reserved_at_20[0x10];
9004 u8 op_mod[0x10];
9005
9006 u8 reserved_at_40[0x40];
9007};
9008
9009struct mlx5_ifc_destroy_vport_lag_out_bits {
9010 u8 status[0x8];
9011 u8 reserved_at_8[0x18];
9012
9013 u8 syndrome[0x20];
9014
9015 u8 reserved_at_40[0x40];
9016};
9017
9018struct mlx5_ifc_destroy_vport_lag_in_bits {
9019 u8 opcode[0x10];
9020 u8 reserved_at_10[0x10];
9021
9022 u8 reserved_at_20[0x10];
9023 u8 op_mod[0x10];
9024
9025 u8 reserved_at_40[0x40];
9026};
9027
Ariel Levkovich24da0012018-04-05 18:53:27 +03009028struct mlx5_ifc_alloc_memic_in_bits {
9029 u8 opcode[0x10];
9030 u8 reserved_at_10[0x10];
9031
9032 u8 reserved_at_20[0x10];
9033 u8 op_mod[0x10];
9034
9035 u8 reserved_at_30[0x20];
9036
9037 u8 reserved_at_40[0x18];
9038 u8 log_memic_addr_alignment[0x8];
9039
9040 u8 range_start_addr[0x40];
9041
9042 u8 range_size[0x20];
9043
9044 u8 memic_size[0x20];
9045};
9046
9047struct mlx5_ifc_alloc_memic_out_bits {
9048 u8 status[0x8];
9049 u8 reserved_at_8[0x18];
9050
9051 u8 syndrome[0x20];
9052
9053 u8 memic_start_addr[0x40];
9054};
9055
9056struct mlx5_ifc_dealloc_memic_in_bits {
9057 u8 opcode[0x10];
9058 u8 reserved_at_10[0x10];
9059
9060 u8 reserved_at_20[0x10];
9061 u8 op_mod[0x10];
9062
9063 u8 reserved_at_40[0x40];
9064
9065 u8 memic_start_addr[0x40];
9066
9067 u8 memic_size[0x20];
9068
9069 u8 reserved_at_e0[0x20];
9070};
9071
9072struct mlx5_ifc_dealloc_memic_out_bits {
9073 u8 status[0x8];
9074 u8 reserved_at_8[0x18];
9075
9076 u8 syndrome[0x20];
9077
9078 u8 reserved_at_40[0x40];
9079};
9080
Eli Cohend29b7962014-10-02 12:19:43 +03009081#endif /* MLX5_IFC_H */