blob: c31bf48b5f019b6903c18c27fe385876be908f3c [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
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Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
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518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
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Marat Dukhan062bee32021-05-27 20:31:07 -0700528 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700529 "src/qs8-vadd/gen/minmax-scalar-x1.c",
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533 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
534 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700535 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/qu8-gemm/2x2-minmax-scalar.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700542 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700544 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700545 "src/qu8-requantization/rndna-scalar-signed64.c",
546 "src/qu8-requantization/rndna-scalar-unsigned32.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -0700548 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700549 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700550 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700551 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700553 "src/x8-lut/scalar.c",
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556 "src/x8-zip/x4-scalar.c",
557 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800558 "src/x32-depthtospace2d-chw2hwc/scalar.c",
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560 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700561 "src/x32-packx/x2-scalar.c",
562 "src/x32-packx/x3-scalar.c",
563 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700564 "src/x32-pad/scalar-float.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700566 "src/x32-unpool/scalar.c",
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Marat Dukhan436ebe62019-12-04 15:10:12 -0800574WASM_UKERNELS = [
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001314 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
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Marat Dukhaned6baaf2020-12-01 15:07:08 -08001318 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07001345 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001356 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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1365 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001370 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
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1372 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
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1375 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
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1378 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
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1380 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07001382 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
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1385 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1386 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
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1388 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1389 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001390 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1391 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1393 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001394 "src/math/roundd-wasmsimd-addsub.c",
1395 "src/math/roundd-wasmsimd-cvt.c",
1396 "src/math/roundne-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-addsub.c",
1398 "src/math/roundu-wasmsimd-cvt.c",
1399 "src/math/roundz-wasmsimd-addsub.c",
1400 "src/math/roundz-wasmsimd-cvt.c",
1401 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1402 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001403 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1405 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1407 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
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Marat Dukhanb5e3d172020-08-06 13:29:53 -07001409 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
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1423 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
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1428 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1429 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001430 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001431 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001432 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1433 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
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1435 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001440 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001441 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001442 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001443 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001444 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001445 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001446 "src/x32-zip/x2-wasmsimd.c",
1447 "src/x32-zip/x3-wasmsimd.c",
1448 "src/x32-zip/x4-wasmsimd.c",
1449 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001450]
1451
Marat Dukhan08c4a432019-10-03 09:29:21 -07001452# ISA-specific micro-kernels
1453NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001454 "src/f32-argmaxpool/4x-neon-c4.c",
1455 "src/f32-argmaxpool/9p8x-neon-c4.c",
1456 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001457 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1458 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001462 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001466 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001467 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001469 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001471 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001473 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1475 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1477 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001479 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1489 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1497 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1510 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001520 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001521 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001522 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1523 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1526 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1530 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1531 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1532 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1536 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001537 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1538 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001539 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1540 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1541 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1542 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1546 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1547 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1548 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1552 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1553 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1554 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001555 "src/f32-ibilinear-chw/gen/neon-p4.c",
1556 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001557 "src/f32-ibilinear/gen/neon-c4.c",
1558 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001560 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001562 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1563 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001565 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1567 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1568 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1570 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1572 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001573 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1574 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001575 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1577 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001578 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1579 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001580 "src/f32-prelu/gen/neon-1x4.c",
1581 "src/f32-prelu/gen/neon-1x8.c",
1582 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001583 "src/f32-prelu/gen/neon-2x4.c",
1584 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001585 "src/f32-prelu/gen/neon-2x16.c",
1586 "src/f32-prelu/gen/neon-4x4.c",
1587 "src/f32-prelu/gen/neon-4x8.c",
1588 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001600 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1612 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001613 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001614 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1616 "src/f32-spmm/gen/4x1-minmax-neon.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1619 "src/f32-spmm/gen/8x1-minmax-neon.c",
1620 "src/f32-spmm/gen/12x1-minmax-neon.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1623 "src/f32-spmm/gen/16x1-minmax-neon.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1626 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001627 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1628 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1630 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001631 "src/f32-vbinary/gen/vmax-neon-x4.c",
1632 "src/f32-vbinary/gen/vmax-neon-x8.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1634 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1635 "src/f32-vbinary/gen/vmin-neon-x4.c",
1636 "src/f32-vbinary/gen/vmin-neon-x8.c",
1637 "src/f32-vbinary/gen/vminc-neon-x4.c",
1638 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001639 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1640 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1642 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1644 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001645 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1646 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1648 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001649 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1650 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1652 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001653 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1654 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1660 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1666 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001667 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1669 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001670 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1671 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001672 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1673 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001674 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1675 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001676 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1677 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1679 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1681 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1683 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1701 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001702 "src/f32-vunary/gen/vabs-neon-x4.c",
1703 "src/f32-vunary/gen/vabs-neon-x8.c",
1704 "src/f32-vunary/gen/vneg-neon-x4.c",
1705 "src/f32-vunary/gen/vneg-neon-x8.c",
1706 "src/f32-vunary/gen/vsqr-neon-x4.c",
1707 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001708 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1709 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/math/roundd-neon-addsub.c",
1711 "src/math/roundd-neon-cvt.c",
1712 "src/math/roundne-neon-addsub.c",
1713 "src/math/roundu-neon-addsub.c",
1714 "src/math/roundu-neon-cvt.c",
1715 "src/math/roundz-neon-addsub.c",
1716 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001717 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1719 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1720 "src/math/sqrt-neon-nr1rsqrts.c",
1721 "src/math/sqrt-neon-nr2rsqrts.c",
1722 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001723 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
1724 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
1725 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
1726 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
1727 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
1728 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
1729 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
1730 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001731 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1732 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1733 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1734 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001735 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1736 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1737 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1738 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001739 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1740 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1741 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1742 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1743 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1744 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1745 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1746 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1747 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1748 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1749 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1750 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1751 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1752 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1753 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1754 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1755 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1756 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1757 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1758 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1759 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1760 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1761 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1762 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1763 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1764 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1765 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1766 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1767 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1768 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1769 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1770 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1771 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1772 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1773 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1774 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1775 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1776 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1777 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1778 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1779 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1780 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1781 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1782 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1783 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1784 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1785 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1786 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1787 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1788 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1789 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1790 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1791 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1792 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1793 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1794 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1795 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1796 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1797 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1798 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1799 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1800 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1801 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1802 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1803 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1804 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1805 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1806 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1807 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1808 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1809 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1810 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1811 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1812 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1813 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1814 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1815 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1816 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1817 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1818 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1819 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1820 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1821 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1822 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1823 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1824 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1825 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1826 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1827 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1828 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1829 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1830 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1831 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1832 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1833 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1834 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1835 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1836 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
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1838 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1839 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1840 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
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1842 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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1846 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
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1848 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1849 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1850 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1851 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1852 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1853 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1854 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1855 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1856 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1857 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1858 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1859 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1860 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1861 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1862 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1863 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1864 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1865 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1866 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1867 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1868 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1869 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1870 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1871 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1872 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1873 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1874 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001875 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001876 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001877 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07001878 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001879 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1880 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1881 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1882 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1883 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1884 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1885 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1886 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001887 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1888 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1889 "src/qu8-dwconv/up8x9-minmax-neon.c",
1890 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1891 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1892 "src/qu8-gemm/4x8-minmax-neon.c",
1893 "src/qu8-gemm/8x8-minmax-neon.c",
1894 "src/qu8-igemm/4x8-minmax-neon.c",
1895 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001896 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001897 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001898 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001899 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001900 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001901 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001902 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001903 "src/x8-zip/x2-neon.c",
1904 "src/x8-zip/x3-neon.c",
1905 "src/x8-zip/x4-neon.c",
1906 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001907 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001908 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001909 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001910 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001911 "src/x32-zip/x2-neon.c",
1912 "src/x32-zip/x3-neon.c",
1913 "src/x32-zip/x4-neon.c",
1914 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001915]
1916
1917NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001918 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1919 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1920 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1921 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1922 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1923 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1924 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1925 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1926 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1927 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1928 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1929 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1930 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1931 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1932 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1933 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1934 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1935 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1936 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1937 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1938 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1939 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1940 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1941 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1942 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1943 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1944 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1945 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1946 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1947 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001948 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1949 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001950 "src/f32-ibilinear/gen/neonfma-c4.c",
1951 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001952 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001953 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001954 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001955 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1956 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001957 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1958 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001959 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1960 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001961 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1962 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001963 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001964 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001965 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001966 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1967 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001968 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001969 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1970 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001971 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001972 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1973 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001974 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1975 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1976 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1977 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1978 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1979 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1980 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1981 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1982 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1984 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1985 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1986 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08001987 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1988 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
1989 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1990 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1991 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
1992 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1993 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1994 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1995 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
1996 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1997 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
1998 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
1999 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002000 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2001 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2002 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2003 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2004 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2005 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2006 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2007 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2008 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2009 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2010 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2011 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002012 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2013 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002014 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2015 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2016 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2017 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2018 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2019 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2020 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2021 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2022 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2023 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2024 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2025 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2026 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2027 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2028 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2029 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2066 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2067 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002068 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2069 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2070 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2071 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2072 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2073 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2074 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2075 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2076 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2077 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2078 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2079 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2080 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2081 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2082 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2083 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2084 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2085 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2086 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2087 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002088 "src/math/exp-neonfma-rr2-lut64-p2.c",
2089 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002090 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2091 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002092 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2093 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2094 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002095 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2096 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2097 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002098 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2099 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2100 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002101 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2102 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2103 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002104 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2105 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2106 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002107 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2108 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2109 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002110 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2111 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2112 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002113 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002114 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002115 "src/math/sqrt-neonfma-nr2fma.c",
2116 "src/math/sqrt-neonfma-nr2fma1adj.c",
2117 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002118]
2119
2120AARCH64_NEONFMA_UKERNELS = [
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Marat Dukhance7a3f82020-05-17 21:46:44 -07002122 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002123 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
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Marat Dukhan56b10cd2020-05-18 09:35:49 -07002125 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002126 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002127 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002128 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002129 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002130 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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2132 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002133 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002134 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002135 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2138 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2139 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002140 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2141 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2142 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002143 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002144 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002145 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2146 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2147 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002148 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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2151 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002152 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002155 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002156 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002157 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002158 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002161 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002169 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002170 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002171 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2172 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2173 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
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2176 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2177 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2178 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2179 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2180 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2181 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2182 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2183 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2184 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2185 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2186 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2187 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2188 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2189 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2190 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002191 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2192 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002193 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2194 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2196 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002197 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2198 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002199 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2200 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002201 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2202 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2203 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2204 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2205 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2206 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
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2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2223 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2224 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002225 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2226 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002227 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002228 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002229 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002230 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002231 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002232 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002233]
2234
Marat Dukhan8853b822020-05-07 12:19:01 -07002235NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002236 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2237 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002238 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2239 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2240 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2241 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2242 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2243 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002244 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002245 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002246 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002247 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002248]
2249
Marat Dukhan08c4a432019-10-03 09:29:21 -07002250AARCH64_NEONFP16ARITH_UKERNELS = [
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2452 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2453 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2454 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002455 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2456 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2457 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002458 "src/f32-ibilinear-chw/gen/sse-p4.c",
2459 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002460 "src/f32-ibilinear/gen/sse-c4.c",
2461 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002462 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2463 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2464 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002465 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2466 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2467 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002468 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2469 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2470 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2471 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002472 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2473 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2474 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002475 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2476 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2477 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002478 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002479 "src/f32-prelu/gen/sse-2x4.c",
2480 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002481 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002482 "src/f32-spmm/gen/4x1-minmax-sse.c",
2483 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002484 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002485 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002486 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2487 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2488 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2489 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2490 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2491 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2492 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2493 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002494 "src/f32-vbinary/gen/vmax-sse-x4.c",
2495 "src/f32-vbinary/gen/vmax-sse-x8.c",
2496 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2497 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2498 "src/f32-vbinary/gen/vmin-sse-x4.c",
2499 "src/f32-vbinary/gen/vmin-sse-x8.c",
2500 "src/f32-vbinary/gen/vminc-sse-x4.c",
2501 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002502 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2503 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2504 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2505 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2506 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2507 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2508 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2509 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002510 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2511 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2512 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2513 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002514 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2515 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2516 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2517 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002518 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2519 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002520 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2521 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002522 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2523 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002524 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2525 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002526 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2527 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002528 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2529 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002530 "src/f32-vunary/gen/vabs-sse-x4.c",
2531 "src/f32-vunary/gen/vabs-sse-x8.c",
2532 "src/f32-vunary/gen/vneg-sse-x4.c",
2533 "src/f32-vunary/gen/vneg-sse-x8.c",
2534 "src/f32-vunary/gen/vsqr-sse-x4.c",
2535 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002536 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002537 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002538 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002539 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002540 "src/math/sqrt-sse-hh1mac.c",
2541 "src/math/sqrt-sse-nr1mac.c",
2542 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002543 "src/x32-fill/sse.c",
2544 "src/x32-packx/x4-sse.c",
2545 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002546]
2547
2548SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002549 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002550 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002551 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002552 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2553 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2554 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2555 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2556 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2557 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2558 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2559 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2560 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2561 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2562 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2563 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002564 "src/f32-prelu/gen/sse2-2x4.c",
2565 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002566 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002567 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002568 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002569 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2570 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002571 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002572 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2573 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002574 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002575 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2576 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002577 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002578 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2579 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2580 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2581 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2582 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2583 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2584 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2585 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2586 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2587 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2588 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2589 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002590 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2591 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002592 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2593 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002594 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2595 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2596 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2597 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2598 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2599 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002600 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2601 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2602 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2603 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2604 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2605 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2606 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2607 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2608 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2609 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2610 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2611 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002612 "src/math/exp-sse2-rr2-lut64-p2.c",
2613 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002614 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002615 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002616 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002617 "src/math/roundd-sse2-cvt.c",
2618 "src/math/roundne-sse2-cvt.c",
2619 "src/math/roundu-sse2-cvt.c",
2620 "src/math/roundz-sse2-cvt.c",
2621 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2622 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2623 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2624 "src/math/sigmoid-sse2-rr2-p5-div.c",
2625 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2626 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002627 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002628 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002629 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2630 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2631 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002632 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002633 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2634 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2635 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2636 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2637 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2638 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002639 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2640 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2641 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002642 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2643 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2644 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002645 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2646 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002647 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002648 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002649 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002650 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2651 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002652 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002653 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002654 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002655 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2656 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002657 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002658 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002659 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002660 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
2661 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002662 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002663 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002664 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002665 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002686 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002702 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
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Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002708 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002709 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002710 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002711 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07002715 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07002719 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07002721 "src/qu8-dwconv/up8x9-minmax-sse2.c",
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2725 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002726 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002727 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002728 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002729 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002730 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002731 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002732 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002733 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002734 "src/x8-zip/x2-sse2.c",
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2736 "src/x8-zip/x4-sse2.c",
2737 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002738 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002739 "src/x32-zip/x2-sse2.c",
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2741 "src/x32-zip/x4-sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07002743]
2744
2745SSSE3_UKERNELS = [
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Marat Dukhan06716242021-05-26 15:56:39 -07002816 "src/qs8-requantization/rndna-ssse3.c",
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2820
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002821SSE41_UKERNELS = [
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07002836 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
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Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002838 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2839 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002840 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
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2842 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
2843 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
2844 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2845 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002846 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
2847 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
2848 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
2849 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2850 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2851 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2852 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
2853 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
2854 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2855 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2856 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2857 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002858 "src/math/roundd-sse41.c",
2859 "src/math/roundne-sse41.c",
2860 "src/math/roundu-sse41.c",
2861 "src/math/roundz-sse41.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002862 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2863 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002864 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2865 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002866 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2867 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2868 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2869 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2870 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2871 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002872 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
2873 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002874 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2875 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2876 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2877 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2878 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2879 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2880 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
2881 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
2882 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2883 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2884 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
2885 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002886 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
2887 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
2888 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002889 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
2890 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
2891 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002892 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2893 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002894 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002895 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002896 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002897 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002899 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002900 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002901 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002902 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002904 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002905 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002906 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002907 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002909 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002910 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002911 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002912 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002914 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002915 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002916 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002917 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002919 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002920 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002921 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002924 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002925 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002926 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002927 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002933 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002937 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002938 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -07002955 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002956 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002957 "src/qs8-requantization/rndna-sse4.c",
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Marat Dukhand9f3ad42020-08-10 12:30:58 -07002959 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07002967 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -07002975 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002976 "src/qu8-requantization/rndna-sse4.c",
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2978
Marat Dukhan08c4a432019-10-03 09:29:21 -07002979AVX_UKERNELS = [
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3023 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3024 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3025 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3026 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3027 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3028 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3029 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003030 "src/f32-vbinary/gen/vmax-avx-x8.c",
3031 "src/f32-vbinary/gen/vmax-avx-x16.c",
3032 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3033 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3034 "src/f32-vbinary/gen/vmin-avx-x8.c",
3035 "src/f32-vbinary/gen/vmin-avx-x16.c",
3036 "src/f32-vbinary/gen/vminc-avx-x8.c",
3037 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003038 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3039 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3040 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3041 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3042 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3043 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3044 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3045 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003046 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3047 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3048 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3049 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003050 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3051 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3052 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3053 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003054 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3055 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003056 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3057 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3058 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3059 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3060 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3061 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3062 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3063 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3064 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3065 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3066 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3067 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3068 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3069 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3070 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3071 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3072 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3073 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003074 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3075 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003076 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3077 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003078 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3079 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003080 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3081 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003082 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3083 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3084 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3085 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3086 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3087 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003088 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003089 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3090 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3091 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3092 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3093 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3094 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3095 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3096 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3097 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3098 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3099 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3100 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3101 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3102 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3103 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3104 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3105 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3106 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3107 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3108 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003109 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3110 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003111 "src/f32-vunary/gen/vabs-avx-x8.c",
3112 "src/f32-vunary/gen/vabs-avx-x16.c",
3113 "src/f32-vunary/gen/vneg-avx-x8.c",
3114 "src/f32-vunary/gen/vneg-avx-x16.c",
3115 "src/f32-vunary/gen/vsqr-avx-x8.c",
3116 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003117 "src/math/exp-avx-rr2-p5.c",
3118 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3119 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3120 "src/math/expm1minus-avx-rr2-p6.c",
3121 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3122 "src/math/sigmoid-avx-rr2-p5-div.c",
3123 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3124 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003125 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3126 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003127 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3128 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003129 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3130 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3131 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3132 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3133 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3134 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003135 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3136 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003137 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3138 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3139 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3140 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3141 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3142 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3143 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3144 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3145 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3146 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3147 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3148 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003149 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3150 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003151 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003152 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003153 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003154 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3155 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003156 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003157 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003158 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003159 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3160 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003161 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003162 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003163 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003164 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3165 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003166 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003167 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003168 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003169 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3170 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003171 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003172 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003173 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003174 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3175 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003176 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003177 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003178 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003179 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3180 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003181 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003182 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003183 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003184 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3185 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003186 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003187 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3188 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3189 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003190 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003191 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3192 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3193 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003194 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003195 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3196 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3197 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003198 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003199 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3200 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3201 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003202 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003203 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3204 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3205 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003206 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003207 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3208 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3209 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003210 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003211 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003212 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3213 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3214 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3215 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3216 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3217 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3218 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3219 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3220 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3221 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3222 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3223 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3224 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3225 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3226 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07003228]
3229
Marat Dukhan1566fee2020-08-02 21:55:41 -07003230XOP_UKERNELS = [
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Marat Dukhan1566fee2020-08-02 21:55:41 -07003314]
3315
Marat Dukhanfda12b82019-11-21 12:27:59 -08003316FMA3_UKERNELS = [
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Marat Dukhan6adff4e2019-10-14 18:32:07 -07003386AVX2_UKERNELS = [
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08003411 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003413 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003414 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003415 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003416 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3417 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003418 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003419 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3420 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3421 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003422 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003423 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3424 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3425 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3426 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3427 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3428 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3429 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3430 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3431 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3432 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3433 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3434 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3435 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3436 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3437 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3438 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3439 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3440 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3441 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3442 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3443 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3444 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3445 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3446 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3447 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3448 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3449 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3450 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3451 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3452 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3453 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3454 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3455 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3456 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3457 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3458 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3459 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3460 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3461 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3462 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003463 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3464 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3465 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3466 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3467 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3468 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3469 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3470 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3471 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3472 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3473 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3474 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3475 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3476 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3477 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3478 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3479 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3480 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3481 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3482 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3483 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3484 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3485 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3486 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003487 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3488 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3489 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3490 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3491 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3492 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3493 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3494 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3495 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3496 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3497 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3498 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3499 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3500 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3501 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3502 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3503 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3504 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3505 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3506 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3507 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3508 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3509 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3510 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3511 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3512 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3513 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3514 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3515 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3516 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003517 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3518 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3519 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003520 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3521 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3522 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3523 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003524 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003525 "src/math/extexp-avx2-p5.c",
3526 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3527 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3528 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3529 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3530 "src/math/sigmoid-avx2-rr1-p5-div.c",
3531 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3532 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3533 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3534 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3535 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3536 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3537 "src/math/sigmoid-avx2-rr2-p5-div.c",
3538 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3539 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003540 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3541 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3542 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3543 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3544 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3545 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07003546 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
3547 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
3548 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003549 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003550 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003551 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003552 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003553 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003554 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003555 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3556 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003557 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003558 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003559 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3560 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003561 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003562 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003563 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003564 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003565 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003566 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003567 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3568 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003569 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003570 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003571 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3572 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003573 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003574 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003575 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003576 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003577 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003578 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003579 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003580 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003581 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003582 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003583 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003584 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003585 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003586 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003587 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003588 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003589 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003590 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003591 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3592 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3593 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3594 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3595 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3596 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3597 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3598 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003599]
3600
Marat Dukhan08c4a432019-10-03 09:29:21 -07003601AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003602 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3603 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003604 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3605 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003606 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3607 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003608 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3609 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3610 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3611 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3612 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3613 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003614 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3615 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3616 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3617 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3618 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3619 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003620 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3621 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3622 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3623 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3624 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3625 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003626 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3627 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3628 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3629 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3630 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3631 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003632 "src/f32-prelu/gen/avx512f-2x16.c",
3633 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003634 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3635 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003636 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003637 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003638 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003639 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3640 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003641 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003642 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3643 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3644 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003645 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003646 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3647 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003648 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003649 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003650 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003651 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3652 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003653 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003654 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3655 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3656 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003657 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003658 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3659 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003660 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003661 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003662 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003663 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3664 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003665 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003666 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3667 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3668 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003669 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003670 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003671 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3672 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3673 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3674 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3675 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3676 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3677 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3678 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003679 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3680 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3681 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3682 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3683 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3684 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3685 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3686 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003687 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3688 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3689 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3690 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3691 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3692 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3693 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3694 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003695 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3696 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3697 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3698 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003699 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3700 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3701 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3702 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003703 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3704 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003705 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3706 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3707 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3708 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3709 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3710 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3711 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3712 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3713 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3714 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3715 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3716 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3717 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3718 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3719 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3720 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003721 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3722 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003723 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3724 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003725 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3726 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003727 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3728 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3729 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3730 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3731 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3732 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3733 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3734 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003735 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003736 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3737 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3738 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3739 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3740 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3741 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3742 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3743 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3744 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3745 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3746 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3747 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3748 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3749 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3750 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3751 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3752 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3753 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3754 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3755 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3756 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3757 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3758 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3759 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003760 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3761 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3762 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3763 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3764 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3765 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3766 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3767 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3768 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3769 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3770 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3771 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3772 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3773 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3774 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3775 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3776 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3777 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3778 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3779 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3780 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3781 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3782 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3783 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3784 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3785 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3786 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3787 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3788 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3789 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3790 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3791 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3792 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3793 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3794 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3795 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3796 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3797 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3798 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3799 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3800 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3801 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3802 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3803 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3804 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
3805 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
3806 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
3807 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003808 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
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Marat Dukhan5020b962020-06-08 13:30:10 -07003816 "src/f32-vunary/gen/vabs-avx512f-x16.c",
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3820 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
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Marat Dukhanb7633f22020-11-20 16:34:56 -08003822 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
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Marat Dukhande390d42020-11-29 19:32:18 -08003828 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
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3842 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
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3859
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003860AVX512SKX_UKERNELS = [
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3894
Frank Barchardbcedc082020-08-17 18:00:51 -07003895WASM32_ASM_UKERNELS = [
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Frank Barchardbcedc082020-08-17 18:00:51 -07003899]
3900
Marat Dukhan08c4a432019-10-03 09:29:21 -07003901AARCH32_ASM_UKERNELS = [
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3917
3918AARCH64_ASM_UKERNELS = [
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3988 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
3989 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
3990 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07003991 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
3992 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003993 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
3994 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
3995 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
3996 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07003997 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
3998 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003999 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4000 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4001 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4002 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004003 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
4004 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004005 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4006 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004007 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4008 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4009 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004010 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4011 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4012 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4013 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
4014 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4015 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4016 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4017 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004018 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004019 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4020 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004021 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4022 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004023]
4024
Marat Dukhan1b354632020-03-23 12:50:22 -07004025INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004026 "src/xnnpack/argmaxpool.h",
4027 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004028 "src/xnnpack/common.h",
4029 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004030 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004031 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004032 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004033 "src/xnnpack/gavgpool.h",
4034 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004035 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004036 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004037 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004038 "src/xnnpack/lut.h",
4039 "src/xnnpack/math.h",
4040 "src/xnnpack/maxpool.h",
4041 "src/xnnpack/packx.h",
4042 "src/xnnpack/pad.h",
4043 "src/xnnpack/params.h",
4044 "src/xnnpack/pavgpool.h",
4045 "src/xnnpack/ppmm.h",
4046 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004047 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004048 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004049 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004050 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004051 "src/xnnpack/spmm.h",
4052 "src/xnnpack/unpool.h",
4053 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004054 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004055 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004056 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004057 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004058 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004059 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004060 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004061]
4062
4063INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004064 "include/xnnpack.h",
4065 "src/xnnpack/allocator.h",
4066 "src/xnnpack/compute.h",
4067 "src/xnnpack/im2col.h",
4068 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004069 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004070 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004071 "src/xnnpack/operator.h",
4072 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004073 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004074 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004075 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004076 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004077]
4078
Marat Dukhan1b354632020-03-23 12:50:22 -07004079ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004080 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004081]
4082
Marat Dukhan1b354632020-03-23 12:50:22 -07004083MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004084 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004085 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004086]
4087
Marat Dukhan1b354632020-03-23 12:50:22 -07004088MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004089 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004090 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004091 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004092 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004093]
4094
4095OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004096 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004097 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004098]
4099
4100WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004101 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004102 "src/xnnpack/operator.h",
4103 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004104]
4105
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004106LOGGING_COPTS = select({
4107 # No logging in optimized mode
4108 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4109 # Full logging in debug mode
4110 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4111 # Error-only logging in default (fastbuild) mode
4112 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4113})
4114
Marat Dukhan3b59de22020-06-03 20:15:19 -07004115LOGGING_SRCS = select({
4116 # No logging in optimized mode
4117 ":optimized_build": [],
4118 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004119 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004120 "src/operator-strings.c",
4121 "src/subgraph-strings.c",
4122 ],
4123})
4124
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004125LOGGING_HDRS = [
4126 "src/xnnpack/log.h",
4127]
4128
Marat Dukhan08c4a432019-10-03 09:29:21 -07004129xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004130 name = "tables",
4131 srcs = TABLE_SRCS,
4132 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004133 gcc_copts = xnnpack_gcc_std_copts(),
4134 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004135)
4136
4137xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004138 name = "scalar_ukernels",
4139 srcs = SCALAR_UKERNELS,
4140 hdrs = INTERNAL_HDRS,
4141 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004142 gcc_copts = xnnpack_gcc_std_copts(),
4143 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004144 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004145 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004146 "@FP16",
4147 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004148 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004149 ],
4150)
4151
4152xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004153 name = "scalar_ukernels_test_mode",
4154 srcs = SCALAR_UKERNELS,
4155 hdrs = INTERNAL_HDRS,
4156 aarch32_copts = ["-marm"],
4157 copts = [
4158 "-UNDEBUG",
4159 "-DXNN_TEST_MODE=1",
4160 ],
4161 gcc_copts = xnnpack_gcc_std_copts(),
4162 msvc_copts = xnnpack_msvc_std_copts(),
4163 deps = [
4164 ":tables",
4165 "@FP16",
4166 "@FXdiv",
4167 "@pthreadpool",
4168 ],
4169)
4170
4171xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004172 name = "wasm_ukernels",
4173 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004174 gcc_copts = xnnpack_gcc_std_copts(),
4175 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004176 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004177 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004178 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004179 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004180 "@FP16",
4181 "@FXdiv",
4182 "@pthreadpool",
4183 ],
4184)
4185
4186xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004187 name = "wasm_ukernels_test_mode",
4188 hdrs = INTERNAL_HDRS,
4189 copts = [
4190 "-UNDEBUG",
4191 "-DXNN_TEST_MODE=1",
4192 ],
4193 gcc_copts = xnnpack_gcc_std_copts(),
4194 msvc_copts = xnnpack_msvc_std_copts(),
4195 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004196 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004197 deps = [
4198 ":tables",
4199 "@FP16",
4200 "@FXdiv",
4201 "@pthreadpool",
4202 ],
4203)
4204
4205xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004206 name = "neon_ukernels",
4207 hdrs = INTERNAL_HDRS,
4208 aarch32_copts = [
4209 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004210 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004211 "-mfpu=neon",
4212 ],
4213 aarch32_srcs = NEON_UKERNELS,
4214 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004215 gcc_copts = xnnpack_gcc_std_copts(),
4216 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004217 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004218 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004219 "@FP16",
4220 "@pthreadpool",
4221 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004222)
4223
4224xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004225 name = "neon_ukernels_test_mode",
4226 hdrs = INTERNAL_HDRS,
4227 aarch32_copts = [
4228 "-marm",
4229 "-march=armv7-a",
4230 "-mfpu=neon",
4231 ],
4232 aarch32_srcs = NEON_UKERNELS,
4233 aarch64_srcs = NEON_UKERNELS,
4234 copts = [
4235 "-UNDEBUG",
4236 "-DXNN_TEST_MODE=1",
4237 ],
4238 gcc_copts = xnnpack_gcc_std_copts(),
4239 msvc_copts = xnnpack_msvc_std_copts(),
4240 deps = [
4241 ":tables",
4242 "@FP16",
4243 "@pthreadpool",
4244 ],
4245)
4246
4247xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004248 name = "neonfma_ukernels",
4249 hdrs = INTERNAL_HDRS,
4250 aarch32_copts = [
4251 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004252 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004253 "-mfpu=neon-vfpv4",
4254 ],
4255 aarch32_srcs = NEONFMA_UKERNELS,
4256 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004257 apple_aarch32_copts = [
4258 "-mcpu=swift",
4259 "-mtune=generic",
4260 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004261 gcc_copts = xnnpack_gcc_std_copts(),
4262 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004263 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004264 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004265 "@FP16",
4266 "@pthreadpool",
4267 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004268)
4269
4270xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004271 name = "neonfma_ukernels_test_mode",
4272 hdrs = INTERNAL_HDRS,
4273 aarch32_copts = [
4274 "-marm",
4275 "-march=armv7-a",
4276 "-mfpu=neon-vfpv4",
4277 ],
4278 aarch32_srcs = NEONFMA_UKERNELS,
4279 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004280 apple_aarch32_copts = [
4281 "-mcpu=swift",
4282 "-mtune=generic",
4283 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004284 copts = [
4285 "-UNDEBUG",
4286 "-DXNN_TEST_MODE=1",
4287 ],
4288 gcc_copts = xnnpack_gcc_std_copts(),
4289 msvc_copts = xnnpack_msvc_std_copts(),
4290 deps = [
4291 ":tables",
4292 "@FP16",
4293 "@pthreadpool",
4294 ],
4295)
4296
4297xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004298 name = "neonv8_ukernels",
4299 hdrs = INTERNAL_HDRS,
4300 aarch32_copts = [
4301 "-marm",
4302 "-march=armv8-a",
4303 "-mfpu=neon-fp-armv8",
4304 ],
4305 aarch32_srcs = NEONV8_UKERNELS,
4306 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004307 apple_aarch32_copts = [
4308 "-mcpu=cyclone",
4309 "-mtune=generic",
4310 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004311 gcc_copts = xnnpack_gcc_std_copts(),
4312 msvc_copts = xnnpack_msvc_std_copts(),
4313 deps = [
4314 ":tables",
4315 "@FP16",
4316 "@pthreadpool",
4317 ],
4318)
4319
4320xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004321 name = "neonv8_ukernels_test_mode",
4322 hdrs = INTERNAL_HDRS,
4323 aarch32_copts = [
4324 "-marm",
4325 "-march=armv8-a",
4326 "-mfpu=neon-fp-armv8",
4327 ],
4328 aarch32_srcs = NEONV8_UKERNELS,
4329 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004330 apple_aarch32_copts = [
4331 "-mcpu=cyclone",
4332 "-mtune=generic",
4333 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004334 copts = [
4335 "-UNDEBUG",
4336 "-DXNN_TEST_MODE=1",
4337 ],
4338 gcc_copts = xnnpack_gcc_std_copts(),
4339 msvc_copts = xnnpack_msvc_std_copts(),
4340 deps = [
4341 ":tables",
4342 "@FP16",
4343 "@pthreadpool",
4344 ],
4345)
4346
4347xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004348 name = "neonfp16arith_ukernels",
4349 hdrs = INTERNAL_HDRS,
4350 aarch64_copts = ["-march=armv8.2-a+fp16"],
4351 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004352 gcc_copts = xnnpack_gcc_std_copts(),
4353 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004354 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004355 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004356 "@FP16",
4357 "@pthreadpool",
4358 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004359)
4360
4361xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004362 name = "neonfp16arith_ukernels_test_mode",
4363 hdrs = INTERNAL_HDRS,
4364 aarch64_copts = ["-march=armv8.2-a+fp16"],
4365 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4366 copts = [
4367 "-UNDEBUG",
4368 "-DXNN_TEST_MODE=1",
4369 ],
4370 gcc_copts = xnnpack_gcc_std_copts(),
4371 msvc_copts = xnnpack_msvc_std_copts(),
4372 deps = [
4373 ":tables",
4374 "@FP16",
4375 "@pthreadpool",
4376 ],
4377)
4378
4379xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004380 name = "neondot_ukernels",
4381 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004382 aarch32_copts = [
4383 "-marm",
4384 "-march=armv8.2-a+dotprod",
4385 "-mfpu=neon-fp-armv8",
4386 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004387 aarch32_srcs = NEONDOT_UKERNELS,
4388 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4389 aarch64_srcs = NEONDOT_UKERNELS,
4390 gcc_copts = xnnpack_gcc_std_copts(),
4391 msvc_copts = xnnpack_msvc_std_copts(),
4392 deps = [
4393 ":tables",
4394 "@FP16",
4395 "@pthreadpool",
4396 ],
4397)
4398
4399xnnpack_cc_library(
4400 name = "neondot_ukernels_test_mode",
4401 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004402 aarch32_copts = [
4403 "-marm",
4404 "-march=armv8.2-a+dotprod",
4405 "-mfpu=neon-fp-armv8",
4406 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004407 aarch32_srcs = NEONDOT_UKERNELS,
4408 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4409 aarch64_srcs = NEONDOT_UKERNELS,
4410 copts = [
4411 "-UNDEBUG",
4412 "-DXNN_TEST_MODE=1",
4413 ],
4414 gcc_copts = xnnpack_gcc_std_copts(),
4415 msvc_copts = xnnpack_msvc_std_copts(),
4416 deps = [
4417 ":tables",
4418 "@FP16",
4419 "@pthreadpool",
4420 ],
4421)
4422
4423xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004424 name = "sse2_ukernels",
4425 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004426 gcc_copts = xnnpack_gcc_std_copts(),
4427 gcc_x86_copts = ["-msse2"],
4428 msvc_copts = xnnpack_msvc_std_copts(),
4429 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004430 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004431 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004432 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004433 "@FP16",
4434 "@pthreadpool",
4435 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004436)
4437
4438xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004439 name = "sse2_ukernels_test_mode",
4440 hdrs = INTERNAL_HDRS,
4441 copts = [
4442 "-UNDEBUG",
4443 "-DXNN_TEST_MODE=1",
4444 ],
4445 gcc_copts = xnnpack_gcc_std_copts(),
4446 gcc_x86_copts = ["-msse2"],
4447 msvc_copts = xnnpack_msvc_std_copts(),
4448 msvc_x86_32_copts = ["/arch:SSE2"],
4449 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4450 deps = [
4451 ":tables",
4452 "@FP16",
4453 "@pthreadpool",
4454 ],
4455)
4456
4457xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004458 name = "ssse3_ukernels",
4459 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004460 gcc_copts = xnnpack_gcc_std_copts(),
4461 gcc_x86_copts = ["-mssse3"],
4462 msvc_copts = xnnpack_msvc_std_copts(),
4463 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004464 x86_srcs = SSSE3_UKERNELS,
4465 deps = [
4466 ":tables",
4467 "@FP16",
4468 "@pthreadpool",
4469 ],
4470)
4471
4472xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004473 name = "ssse3_ukernels_test_mode",
4474 hdrs = INTERNAL_HDRS,
4475 copts = [
4476 "-UNDEBUG",
4477 "-DXNN_TEST_MODE=1",
4478 ],
4479 gcc_copts = xnnpack_gcc_std_copts(),
4480 gcc_x86_copts = ["-mssse3"],
4481 msvc_copts = xnnpack_msvc_std_copts(),
4482 msvc_x86_32_copts = ["/arch:SSE2"],
4483 x86_srcs = SSSE3_UKERNELS,
4484 deps = [
4485 ":tables",
4486 "@FP16",
4487 "@pthreadpool",
4488 ],
4489)
4490
4491xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004492 name = "sse41_ukernels",
4493 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004494 gcc_copts = xnnpack_gcc_std_copts(),
4495 gcc_x86_copts = ["-msse4.1"],
4496 msvc_copts = xnnpack_msvc_std_copts(),
4497 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004498 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004499 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004500 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004501 "@FP16",
4502 "@pthreadpool",
4503 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004504)
4505
4506xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004507 name = "sse41_ukernels_test_mode",
4508 hdrs = INTERNAL_HDRS,
4509 copts = [
4510 "-UNDEBUG",
4511 "-DXNN_TEST_MODE=1",
4512 ],
4513 gcc_copts = xnnpack_gcc_std_copts(),
4514 gcc_x86_copts = ["-msse4.1"],
4515 msvc_copts = xnnpack_msvc_std_copts(),
4516 msvc_x86_32_copts = ["/arch:SSE2"],
4517 x86_srcs = SSE41_UKERNELS,
4518 deps = [
4519 ":tables",
4520 "@FP16",
4521 "@pthreadpool",
4522 ],
4523)
4524
4525xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004526 name = "avx_ukernels",
4527 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004528 gcc_copts = xnnpack_gcc_std_copts(),
4529 gcc_x86_copts = ["-mavx"],
4530 msvc_copts = xnnpack_msvc_std_copts(),
4531 msvc_x86_32_copts = ["/arch:AVX"],
4532 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004533 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004534 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004535 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004536 "@FP16",
4537 "@pthreadpool",
4538 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004539)
4540
4541xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004542 name = "avx_ukernels_test_mode",
4543 hdrs = INTERNAL_HDRS,
4544 copts = [
4545 "-UNDEBUG",
4546 "-DXNN_TEST_MODE=1",
4547 ],
4548 gcc_copts = xnnpack_gcc_std_copts(),
4549 gcc_x86_copts = ["-mavx"],
4550 msvc_copts = xnnpack_msvc_std_copts(),
4551 msvc_x86_32_copts = ["/arch:AVX"],
4552 msvc_x86_64_copts = ["/arch:AVX"],
4553 x86_srcs = AVX_UKERNELS,
4554 deps = [
4555 ":tables",
4556 "@FP16",
4557 "@pthreadpool",
4558 ],
4559)
4560
4561xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004562 name = "xop_ukernels",
4563 hdrs = INTERNAL_HDRS,
4564 gcc_copts = xnnpack_gcc_std_copts(),
4565 gcc_x86_copts = ["-mxop"],
4566 msvc_copts = xnnpack_msvc_std_copts(),
4567 msvc_x86_32_copts = ["/arch:AVX"],
4568 msvc_x86_64_copts = ["/arch:AVX"],
4569 x86_srcs = XOP_UKERNELS,
4570 deps = [
4571 ":tables",
4572 "@FP16",
4573 "@pthreadpool",
4574 ],
4575)
4576
4577xnnpack_cc_library(
4578 name = "xop_ukernels_test_mode",
4579 hdrs = INTERNAL_HDRS,
4580 copts = [
4581 "-UNDEBUG",
4582 "-DXNN_TEST_MODE=1",
4583 ],
4584 gcc_copts = xnnpack_gcc_std_copts(),
4585 gcc_x86_copts = ["-mxop"],
4586 msvc_copts = xnnpack_msvc_std_copts(),
4587 msvc_x86_32_copts = ["/arch:AVX"],
4588 msvc_x86_64_copts = ["/arch:AVX"],
4589 x86_srcs = XOP_UKERNELS,
4590 deps = [
4591 ":tables",
4592 "@FP16",
4593 "@pthreadpool",
4594 ],
4595)
4596
4597xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004598 name = "fma3_ukernels",
4599 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004600 gcc_copts = xnnpack_gcc_std_copts(),
4601 gcc_x86_copts = ["-mfma"],
4602 msvc_copts = xnnpack_msvc_std_copts(),
4603 msvc_x86_32_copts = ["/arch:AVX"],
4604 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004605 x86_srcs = FMA3_UKERNELS,
4606 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004607 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004608 "@FP16",
4609 "@pthreadpool",
4610 ],
4611)
4612
4613xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004614 name = "fma3_ukernels_test_mode",
4615 hdrs = INTERNAL_HDRS,
4616 copts = [
4617 "-UNDEBUG",
4618 "-DXNN_TEST_MODE=1",
4619 ],
4620 gcc_copts = xnnpack_gcc_std_copts(),
4621 gcc_x86_copts = ["-mfma"],
4622 msvc_copts = xnnpack_msvc_std_copts(),
4623 msvc_x86_32_copts = ["/arch:AVX"],
4624 msvc_x86_64_copts = ["/arch:AVX"],
4625 x86_srcs = FMA3_UKERNELS,
4626 deps = [
4627 ":tables",
4628 "@FP16",
4629 "@pthreadpool",
4630 ],
4631)
4632
4633xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004634 name = "avx2_ukernels",
4635 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004636 gcc_copts = xnnpack_gcc_std_copts(),
4637 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004638 "-mfma",
4639 "-mavx2",
4640 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004641 msvc_copts = xnnpack_msvc_std_copts(),
4642 msvc_x86_32_copts = ["/arch:AVX2"],
4643 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004644 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004645 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004646 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004647 "@FP16",
4648 "@pthreadpool",
4649 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004650)
4651
4652xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004653 name = "avx2_ukernels_test_mode",
4654 hdrs = INTERNAL_HDRS,
4655 copts = [
4656 "-UNDEBUG",
4657 "-DXNN_TEST_MODE=1",
4658 ],
4659 gcc_copts = xnnpack_gcc_std_copts(),
4660 gcc_x86_copts = [
4661 "-mfma",
4662 "-mavx2",
4663 ],
4664 msvc_copts = xnnpack_msvc_std_copts(),
4665 msvc_x86_32_copts = ["/arch:AVX2"],
4666 msvc_x86_64_copts = ["/arch:AVX2"],
4667 x86_srcs = AVX2_UKERNELS,
4668 deps = [
4669 ":tables",
4670 "@FP16",
4671 "@pthreadpool",
4672 ],
4673)
4674
4675xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004676 name = "avx512f_ukernels",
4677 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004678 gcc_copts = xnnpack_gcc_std_copts(),
4679 gcc_x86_copts = ["-mavx512f"],
4680 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4681 msvc_copts = xnnpack_msvc_std_copts(),
4682 msvc_x86_32_copts = ["/arch:AVX512"],
4683 msvc_x86_64_copts = ["/arch:AVX512"],
4684 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004685 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004686 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004687 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004688 "@FP16",
4689 "@pthreadpool",
4690 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004691)
4692
4693xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004694 name = "avx512f_ukernels_test_mode",
4695 hdrs = INTERNAL_HDRS,
4696 copts = [
4697 "-UNDEBUG",
4698 "-DXNN_TEST_MODE=1",
4699 ],
4700 gcc_copts = xnnpack_gcc_std_copts(),
4701 gcc_x86_copts = ["-mavx512f"],
4702 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4703 msvc_copts = xnnpack_msvc_std_copts(),
4704 msvc_x86_32_copts = ["/arch:AVX512"],
4705 msvc_x86_64_copts = ["/arch:AVX512"],
4706 msys_copts = ["-fno-asynchronous-unwind-tables"],
4707 x86_srcs = AVX512F_UKERNELS,
4708 deps = [
4709 ":tables",
4710 "@FP16",
4711 "@pthreadpool",
4712 ],
4713)
4714
4715xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004716 name = "avx512skx_ukernels",
4717 hdrs = INTERNAL_HDRS,
4718 gcc_copts = xnnpack_gcc_std_copts(),
4719 gcc_x86_copts = [
4720 "-mavx512f",
4721 "-mavx512cd",
4722 "-mavx512bw",
4723 "-mavx512dq",
4724 "-mavx512vl",
4725 ],
4726 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4727 msvc_copts = xnnpack_msvc_std_copts(),
4728 msvc_x86_32_copts = ["/arch:AVX512"],
4729 msvc_x86_64_copts = ["/arch:AVX512"],
4730 msys_copts = ["-fno-asynchronous-unwind-tables"],
4731 x86_srcs = AVX512SKX_UKERNELS,
4732 deps = [
4733 ":tables",
4734 "@FP16",
4735 "@pthreadpool",
4736 ],
4737)
4738
4739xnnpack_cc_library(
4740 name = "avx512skx_ukernels_test_mode",
4741 hdrs = INTERNAL_HDRS,
4742 copts = [
4743 "-UNDEBUG",
4744 "-DXNN_TEST_MODE=1",
4745 ],
4746 gcc_copts = xnnpack_gcc_std_copts(),
4747 gcc_x86_copts = [
4748 "-mavx512f",
4749 "-mavx512cd",
4750 "-mavx512bw",
4751 "-mavx512dq",
4752 "-mavx512vl",
4753 ],
4754 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4755 msvc_copts = xnnpack_msvc_std_copts(),
4756 msvc_x86_32_copts = ["/arch:AVX512"],
4757 msvc_x86_64_copts = ["/arch:AVX512"],
4758 msys_copts = ["-fno-asynchronous-unwind-tables"],
4759 x86_srcs = AVX512SKX_UKERNELS,
4760 deps = [
4761 ":tables",
4762 "@FP16",
4763 "@pthreadpool",
4764 ],
4765)
4766
4767xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004768 name = "asm_ukernels",
4769 hdrs = ["src/xnnpack/assembly.h"],
4770 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004771 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004772 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004773 wasm_srcs = WASM32_ASM_UKERNELS,
4774 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004775)
4776
Marat Dukhan3b59de22020-06-03 20:15:19 -07004777xnnpack_cc_library(
4778 name = "logging_utils",
4779 srcs = LOGGING_SRCS,
4780 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4781 copts = LOGGING_COPTS + [
4782 "-Isrc",
4783 "-Iinclude",
4784 ] + select({
4785 ":debug_build": [],
4786 "//conditions:default": xnnpack_min_size_copts(),
4787 }),
4788 gcc_copts = xnnpack_gcc_std_copts(),
4789 msvc_copts = xnnpack_msvc_std_copts(),
4790 visibility = xnnpack_visibility(),
4791 deps = [
4792 "@FP16",
4793 "@clog",
4794 "@pthreadpool",
4795 ],
4796)
4797
Marat Dukhan08c4a432019-10-03 09:29:21 -07004798xnnpack_aggregate_library(
4799 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004800 aarch32_ios_deps = [
4801 ":neon_ukernels",
4802 ":neonfma_ukernels",
4803 ":neonv8_ukernels",
4804 ":asm_ukernels",
4805 ],
4806 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004807 ":neon_ukernels",
4808 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004809 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004810 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004811 ":asm_ukernels",
4812 ],
4813 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004814 ":neon_ukernels",
4815 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004816 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004817 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004818 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004819 ":asm_ukernels",
4820 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004821 generic_deps = [
4822 ":scalar_ukernels",
4823 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004824 wasm_deps = [
4825 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004826 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004827 ],
4828 wasmsimd_deps = [
4829 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004830 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004831 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004832 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004833 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004834 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004835 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004836 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004837 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004838 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004839 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004840 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004841 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004842 ],
4843)
4844
Marat Dukhan33fcf782020-05-24 14:27:15 -07004845xnnpack_aggregate_library(
4846 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004847 aarch32_ios_deps = [
4848 ":neon_ukernels_test_mode",
4849 ":neonfma_ukernels_test_mode",
4850 ":neonv8_ukernels_test_mode",
4851 ":asm_ukernels",
4852 ],
4853 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07004854 ":neon_ukernels_test_mode",
4855 ":neonfma_ukernels_test_mode",
4856 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004857 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004858 ":asm_ukernels",
4859 ],
4860 aarch64_deps = [
4861 ":neon_ukernels_test_mode",
4862 ":neonfma_ukernels_test_mode",
4863 ":neonv8_ukernels_test_mode",
4864 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004865 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004866 ":asm_ukernels",
4867 ],
4868 generic_deps = [
4869 ":scalar_ukernels_test_mode",
4870 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004871 wasm_deps = [
4872 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004873 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004874 ],
4875 wasmsimd_deps = [
4876 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004877 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004878 ],
4879 x86_deps = [
4880 ":sse2_ukernels_test_mode",
4881 ":ssse3_ukernels_test_mode",
4882 ":sse41_ukernels_test_mode",
4883 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004884 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004885 ":fma3_ukernels_test_mode",
4886 ":avx2_ukernels_test_mode",
4887 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004888 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004889 ],
4890)
4891
Marat Dukhan08c4a432019-10-03 09:29:21 -07004892xnnpack_cc_library(
4893 name = "im2col",
4894 srcs = ["src/im2col.c"],
4895 hdrs = [
4896 "src/xnnpack/common.h",
4897 "src/xnnpack/im2col.h",
4898 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004899 gcc_copts = xnnpack_gcc_std_copts(),
4900 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004901)
4902
4903xnnpack_cc_library(
4904 name = "indirection",
4905 srcs = ["src/indirection.c"],
4906 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004907 gcc_copts = xnnpack_gcc_std_copts(),
4908 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004909 deps = [
4910 "@FP16",
4911 "@FXdiv",
4912 "@pthreadpool",
4913 ],
4914)
4915
4916xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004917 name = "indirection_test_mode",
4918 srcs = ["src/indirection.c"],
4919 hdrs = INTERNAL_HDRS,
4920 copts = [
4921 "-UNDEBUG",
4922 "-DXNN_TEST_MODE=1",
4923 ],
4924 gcc_copts = xnnpack_gcc_std_copts(),
4925 msvc_copts = xnnpack_msvc_std_copts(),
4926 deps = [
4927 "@FP16",
4928 "@FXdiv",
4929 "@pthreadpool",
4930 ],
4931)
4932
4933xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07004934 name = "packing",
4935 srcs = ["src/packing.c"],
4936 hdrs = INTERNAL_HDRS,
4937 gcc_copts = xnnpack_gcc_std_copts(),
4938 msvc_copts = xnnpack_msvc_std_copts(),
4939 deps = [
4940 "@FP16",
4941 "@FXdiv",
4942 "@pthreadpool",
4943 ],
4944)
4945
4946xnnpack_cc_library(
4947 name = "packing_test_mode",
4948 srcs = ["src/packing.c"],
4949 hdrs = INTERNAL_HDRS,
4950 copts = [
4951 "-UNDEBUG",
4952 "-DXNN_TEST_MODE=1",
4953 ],
4954 gcc_copts = xnnpack_gcc_std_copts(),
4955 msvc_copts = xnnpack_msvc_std_copts(),
4956 deps = [
4957 "@FP16",
4958 "@FXdiv",
4959 "@pthreadpool",
4960 ],
4961)
4962
4963xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004964 name = "operator_run",
4965 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004966 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004967 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07004968 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4969 "//conditions:default": [],
4970 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07004971 gcc_copts = xnnpack_gcc_std_copts(),
4972 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004973 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004974 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004975 "@FP16",
4976 "@FXdiv",
4977 "@clog",
4978 "@pthreadpool",
4979 ],
4980)
4981
Chao Mei6ddfc602020-05-13 22:29:36 -07004982xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004983 name = "operator_run_test_mode",
4984 srcs = ["src/operator-run.c"],
4985 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4986 copts = LOGGING_COPTS + [
4987 "-UNDEBUG",
4988 "-DXNN_TEST_MODE=1",
4989 ] + select({
4990 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
4991 "//conditions:default": [],
4992 }),
4993 gcc_copts = xnnpack_gcc_std_copts(),
4994 msvc_copts = xnnpack_msvc_std_copts(),
4995 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07004996 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004997 "@FP16",
4998 "@FXdiv",
4999 "@clog",
5000 "@pthreadpool",
5001 ],
5002)
5003
5004xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005005 name = "memory_planner",
5006 srcs = ["src/memory-planner.c"],
5007 hdrs = INTERNAL_HDRS,
5008 defines = select({
5009 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5010 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5011 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5012 }),
5013 gcc_copts = xnnpack_gcc_std_copts(),
5014 msvc_copts = xnnpack_msvc_std_copts(),
5015 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005016 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005017 "@pthreadpool",
5018 ],
5019)
5020
Marat Dukhan33fcf782020-05-24 14:27:15 -07005021xnnpack_cc_library(
5022 name = "memory_planner_test_mode",
5023 srcs = ["src/memory-planner.c"],
5024 hdrs = INTERNAL_HDRS,
5025 copts = [
5026 "-UNDEBUG",
5027 "-DXNN_TEST_MODE=1",
5028 ],
5029 defines = select({
5030 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5031 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5032 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5033 }),
5034 gcc_copts = xnnpack_gcc_std_copts(),
5035 msvc_copts = xnnpack_msvc_std_copts(),
5036 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005037 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005038 "@pthreadpool",
5039 ],
5040)
5041
Marat Dukhan08c4a432019-10-03 09:29:21 -07005042cc_library(
5043 name = "enable_assembly",
5044 defines = select({
5045 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5046 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005047 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005048 }),
5049)
5050
Marat Dukhan9de90e02020-06-18 16:04:12 -07005051cc_library(
5052 name = "enable_sparse",
5053 defines = select({
5054 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5055 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005056 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005057 }),
5058)
5059
Marat Dukhancf056b22019-10-07 10:26:29 -07005060xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005061 name = "operators",
5062 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005063 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005064 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005065 ],
5066 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005067 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005068 "-Isrc",
5069 "-Iinclude",
5070 ] + select({
5071 ":debug_build": [],
5072 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005073 }) + select({
5074 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5075 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005076 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005077 gcc_copts = xnnpack_gcc_std_copts(),
5078 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005079 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005080 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005081 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005082 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005083 "@FP16",
5084 "@FXdiv",
5085 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005086 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005087 ],
5088)
5089
Marat Dukhan10a38082020-04-17 03:58:35 -07005090xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005091 name = "operators_test_mode",
5092 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005093 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005094 "src/operator-delete.c",
5095 ],
5096 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5097 copts = LOGGING_COPTS + [
5098 "-Isrc",
5099 "-Iinclude",
5100 "-UNDEBUG",
5101 "-DXNN_TEST_MODE=1",
5102 ] + select({
5103 ":debug_build": [],
5104 "//conditions:default": xnnpack_min_size_copts(),
5105 }) + select({
5106 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5107 "//conditions:default": [],
5108 }),
5109 gcc_copts = xnnpack_gcc_std_copts(),
5110 msvc_copts = xnnpack_msvc_std_copts(),
5111 deps = [
5112 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005113 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005114 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005115 "@FP16",
5116 "@FXdiv",
5117 "@clog",
5118 "@pthreadpool",
5119 ],
5120)
5121
5122xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005123 name = "XNNPACK",
5124 srcs = [
5125 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005126 "src/runtime.c",
5127 "src/subgraph.c",
5128 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005129 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005130 hdrs = ["include/xnnpack.h"],
5131 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005132 "-Isrc",
5133 "-Iinclude",
5134 ] + select({
5135 ":debug_build": [],
5136 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005137 }) + select({
5138 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5139 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005140 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005141 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005142 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005143 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005144 visibility = xnnpack_visibility(),
5145 deps = [
5146 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005147 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005148 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005149 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005150 ":operator_run",
5151 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005152 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005153 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005154 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005155 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005156 ] + select({
5157 ":emscripten": [],
5158 "//conditions:default": ["@cpuinfo"],
5159 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005160)
5161
Marat Dukhan10a38082020-04-17 03:58:35 -07005162xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005163 name = "XNNPACK_test_mode",
5164 srcs = [
5165 "src/init.c",
5166 "src/runtime.c",
5167 "src/subgraph.c",
5168 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005169 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005170 hdrs = ["include/xnnpack.h"],
5171 copts = LOGGING_COPTS + [
5172 "-Isrc",
5173 "-Iinclude",
5174 "-UNDEBUG",
5175 "-DXNN_TEST_MODE=1",
5176 ] + select({
5177 ":debug_build": [],
5178 "//conditions:default": xnnpack_min_size_copts(),
5179 }) + select({
5180 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5181 "//conditions:default": [],
5182 }),
5183 gcc_copts = xnnpack_gcc_std_copts(),
5184 includes = ["include"],
5185 msvc_copts = xnnpack_msvc_std_copts(),
5186 visibility = xnnpack_visibility(),
5187 deps = [
5188 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005189 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005190 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005191 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005192 ":operator_run_test_mode",
5193 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005194 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005195 "@clog",
5196 "@FP16",
5197 "@pthreadpool",
5198 ] + select({
5199 ":emscripten": [],
5200 "//conditions:default": ["@cpuinfo"],
5201 }),
5202)
5203
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005204# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5205# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005206xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005207 name = "xnnpack_for_tflite",
5208 srcs = [
5209 "src/init.c",
5210 "src/runtime.c",
5211 "src/subgraph.c",
5212 "src/tensor.c",
5213 ] + SUBGRAPH_SRCS,
5214 hdrs = ["include/xnnpack.h"],
5215 copts = LOGGING_COPTS + [
5216 "-Isrc",
5217 "-Iinclude",
5218 ] + select({
5219 ":debug_build": [],
5220 "//conditions:default": xnnpack_min_size_copts(),
5221 }) + select({
5222 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5223 "//conditions:default": [],
5224 }),
5225 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005226 "XNN_NO_QU8_OPERATORS",
5227 "XNN_NO_U8_OPERATORS",
5228 "XNN_NO_X8_OPERATORS",
5229 "XNN_NO_F16_OPERATORS",
5230 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005231 ] + select({
5232 ":xnn_enable_qs8_explicit_true": [],
5233 ":xnn_enable_qs8_explicit_false": ["XNN_NO_QS8_OPERATORS"],
5234 "//conditions:default": ["XNN_NO_QS8_OPERATORS"],
5235 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005236 gcc_copts = xnnpack_gcc_std_copts(),
5237 includes = ["include"],
5238 msvc_copts = xnnpack_msvc_std_copts(),
5239 visibility = xnnpack_visibility(),
5240 deps = [
5241 ":enable_assembly",
5242 ":enable_sparse",
5243 ":logging_utils",
5244 ":memory_planner",
5245 ":operator_run",
5246 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005247 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005248 "@clog",
5249 "@FP16",
5250 "@pthreadpool",
5251 ] + select({
5252 ":emscripten": [],
5253 "//conditions:default": ["@cpuinfo"],
5254 }),
5255)
5256
5257# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5258# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5259xnnpack_cc_library(
5260 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005261 srcs = [
5262 "src/init.c",
5263 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005264 hdrs = ["include/xnnpack.h"],
5265 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005266 "-Isrc",
5267 "-Iinclude",
5268 ] + select({
5269 ":debug_build": [],
5270 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005271 }) + select({
5272 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5273 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005274 }),
5275 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005276 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005277 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005278 "XNN_NO_U8_OPERATORS",
5279 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005280 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005281 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005282 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005283 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005284 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005285 visibility = xnnpack_visibility(),
5286 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005287 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005288 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005289 ":operator_run",
5290 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005291 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005292 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005293 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005294 ] + select({
5295 ":emscripten": [],
5296 "//conditions:default": ["@cpuinfo"],
5297 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005298)
5299
Marat Dukhancf056b22019-10-07 10:26:29 -07005300xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005301 name = "bench_utils",
5302 srcs = ["bench/utils.cc"],
5303 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005304 deps = [
5305 "@com_google_benchmark//:benchmark",
5306 "@cpuinfo",
5307 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005308)
5309
Frank Barchard7e955972019-10-11 10:34:25 -07005310######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005311
5312xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005313 name = "qs8_gemm_bench",
5314 srcs = [
5315 "bench/gemm.h",
5316 "bench/qs8-gemm.cc",
5317 "src/xnnpack/AlignedAllocator.h",
5318 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005319 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5320 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005321)
5322
5323xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005324 name = "qs8_requantization_bench",
5325 srcs = [
5326 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005327 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005328 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005329 ] + MICROKERNEL_BENCHMARK_HDRS,
5330 deps = MICROKERNEL_BENCHMARK_DEPS,
5331)
5332
5333xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005334 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005335 srcs = [
5336 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005337 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005338 "src/xnnpack/AlignedAllocator.h",
5339 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005340 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005341 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005342)
5343
5344xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005345 name = "qu8_requantization_bench",
5346 srcs = [
5347 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005348 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005349 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005350 ] + MICROKERNEL_BENCHMARK_HDRS,
5351 deps = MICROKERNEL_BENCHMARK_DEPS,
5352)
5353
5354xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005355 name = "f16_igemm_bench",
5356 srcs = [
5357 "bench/f16-igemm.cc",
5358 "bench/conv.h",
5359 "bench/google/conv.h",
5360 "src/xnnpack/AlignedAllocator.h",
5361 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005362 deps = MICROKERNEL_BENCHMARK_DEPS + [
5363 ":indirection",
5364 ":packing",
5365 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005366)
5367
5368xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005369 name = "f16_gemm_bench",
5370 srcs = [
5371 "bench/f16-gemm.cc",
5372 "bench/gemm.h",
5373 "src/xnnpack/AlignedAllocator.h",
5374 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005375 deps = MICROKERNEL_BENCHMARK_DEPS + [
5376 ":packing",
5377 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005378)
5379
5380xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005381 name = "f16_spmm_bench",
5382 srcs = [
5383 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005384 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005385 "src/xnnpack/AlignedAllocator.h",
5386 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005387 deps = MICROKERNEL_BENCHMARK_DEPS,
5388)
5389
5390xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005391 name = "f16_vrelu_bench",
5392 srcs = [
5393 "bench/f16-vrelu.cc",
5394 "src/xnnpack/AlignedAllocator.h",
5395 ] + MICROKERNEL_BENCHMARK_HDRS,
5396 deps = MICROKERNEL_BENCHMARK_DEPS,
5397)
5398
5399xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005400 name = "f32_igemm_bench",
5401 srcs = [
5402 "bench/f32-igemm.cc",
5403 "bench/conv.h",
5404 "src/xnnpack/AlignedAllocator.h",
5405 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005406 deps = MICROKERNEL_BENCHMARK_DEPS + [
5407 ":indirection",
5408 ":packing",
5409 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005410)
5411
5412xnnpack_benchmark(
5413 name = "f32_conv_hwc_bench",
5414 srcs = [
5415 "bench/f32-conv-hwc.cc",
5416 "bench/dconv.h",
5417 "src/xnnpack/AlignedAllocator.h",
5418 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005419 deps = MICROKERNEL_BENCHMARK_DEPS + [
5420 ":packing",
5421 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005422)
5423
5424xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005425 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005426 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005427 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005428 "bench/dconv.h",
5429 "src/xnnpack/AlignedAllocator.h",
5430 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005431 deps = MICROKERNEL_BENCHMARK_DEPS + [
5432 ":packing",
5433 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005434)
5435
5436xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005437 name = "f16_dwconv_bench",
5438 srcs = [
5439 "bench/f16-dwconv.cc",
5440 "bench/dwconv.h",
5441 "bench/google/dwconv.h",
5442 "src/xnnpack/AlignedAllocator.h",
5443 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005444 deps = MICROKERNEL_BENCHMARK_DEPS + [
5445 ":indirection",
5446 ":packing",
5447 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005448)
5449
5450xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005451 name = "f32_dwconv_bench",
5452 srcs = [
5453 "bench/f32-dwconv.cc",
5454 "bench/dwconv.h",
5455 "src/xnnpack/AlignedAllocator.h",
5456 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005457 deps = MICROKERNEL_BENCHMARK_DEPS + [
5458 ":indirection",
5459 ":packing",
5460 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005461)
5462
5463xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005464 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005465 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005466 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005467 "bench/dwconv.h",
5468 "src/xnnpack/AlignedAllocator.h",
5469 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005470 deps = MICROKERNEL_BENCHMARK_DEPS + [
5471 ":indirection",
5472 ":packing",
5473 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005474)
5475
5476xnnpack_benchmark(
5477 name = "f32_gemm_bench",
5478 srcs = [
5479 "bench/f32-gemm.cc",
5480 "bench/gemm.h",
5481 "src/xnnpack/AlignedAllocator.h",
5482 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005483 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005484 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005485)
5486
5487xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005488 name = "f32_raddexpminusmax_bench",
5489 srcs = [
5490 "bench/f32-raddexpminusmax.cc",
5491 "src/xnnpack/AlignedAllocator.h",
5492 ] + MICROKERNEL_BENCHMARK_HDRS,
5493 deps = MICROKERNEL_BENCHMARK_DEPS,
5494)
5495
5496xnnpack_benchmark(
5497 name = "f32_raddextexp_bench",
5498 srcs = [
5499 "bench/f32-raddextexp.cc",
5500 "src/xnnpack/AlignedAllocator.h",
5501 ] + MICROKERNEL_BENCHMARK_HDRS,
5502 deps = MICROKERNEL_BENCHMARK_DEPS,
5503)
5504
5505xnnpack_benchmark(
5506 name = "f32_raddstoreexpminusmax_bench",
5507 srcs = [
5508 "bench/f32-raddstoreexpminusmax.cc",
5509 "src/xnnpack/AlignedAllocator.h",
5510 ] + MICROKERNEL_BENCHMARK_HDRS,
5511 deps = MICROKERNEL_BENCHMARK_DEPS,
5512)
5513
5514xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005515 name = "f32_rmax_bench",
5516 srcs = [
5517 "bench/f32-rmax.cc",
5518 "src/xnnpack/AlignedAllocator.h",
5519 ] + MICROKERNEL_BENCHMARK_HDRS,
5520 deps = MICROKERNEL_BENCHMARK_DEPS,
5521)
5522
5523xnnpack_benchmark(
5524 name = "f32_spmm_bench",
5525 srcs = [
5526 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005527 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005528 "src/xnnpack/AlignedAllocator.h",
5529 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005530 deps = MICROKERNEL_BENCHMARK_DEPS,
5531)
5532
5533xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005534 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005535 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005536 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005537 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005538 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005539 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005540)
5541
5542xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005543 name = "f32_velu_bench",
5544 srcs = [
5545 "bench/f32-velu.cc",
5546 "src/xnnpack/AlignedAllocator.h",
5547 ] + MICROKERNEL_BENCHMARK_HDRS,
5548 deps = MICROKERNEL_BENCHMARK_DEPS,
5549)
5550
5551xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005552 name = "f32_vhswish_bench",
5553 srcs = [
5554 "bench/f32-vhswish.cc",
5555 "src/xnnpack/AlignedAllocator.h",
5556 ] + MICROKERNEL_BENCHMARK_HDRS,
5557 deps = MICROKERNEL_BENCHMARK_DEPS,
5558)
5559
5560xnnpack_benchmark(
5561 name = "f32_vrelu_bench",
5562 srcs = [
5563 "bench/f32-vrelu.cc",
5564 "src/xnnpack/AlignedAllocator.h",
5565 ] + MICROKERNEL_BENCHMARK_HDRS,
5566 deps = MICROKERNEL_BENCHMARK_DEPS,
5567)
5568
5569xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005570 name = "f32_vscaleexpminusmax_bench",
5571 srcs = [
5572 "bench/f32-vscaleexpminusmax.cc",
5573 "src/xnnpack/AlignedAllocator.h",
5574 ] + MICROKERNEL_BENCHMARK_HDRS,
5575 deps = MICROKERNEL_BENCHMARK_DEPS,
5576)
5577
5578xnnpack_benchmark(
5579 name = "f32_vscaleextexp_bench",
5580 srcs = [
5581 "bench/f32-vscaleextexp.cc",
5582 "src/xnnpack/AlignedAllocator.h",
5583 ] + MICROKERNEL_BENCHMARK_HDRS,
5584 deps = MICROKERNEL_BENCHMARK_DEPS,
5585)
5586
5587xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005588 name = "f32_vsigmoid_bench",
5589 srcs = [
5590 "bench/f32-vsigmoid.cc",
5591 "src/xnnpack/AlignedAllocator.h",
5592 ] + MICROKERNEL_BENCHMARK_HDRS,
5593 deps = MICROKERNEL_BENCHMARK_DEPS,
5594)
5595
5596xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005597 name = "f32_vsqrt_bench",
5598 srcs = [
5599 "bench/f32-vsqrt.cc",
5600 "src/xnnpack/AlignedAllocator.h",
5601 ] + MICROKERNEL_BENCHMARK_HDRS,
5602 deps = MICROKERNEL_BENCHMARK_DEPS,
5603)
5604
5605xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005606 name = "f32_im2col_gemm_bench",
5607 srcs = [
5608 "bench/f32-im2col-gemm.cc",
5609 "bench/conv.h",
5610 "src/xnnpack/AlignedAllocator.h",
5611 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005612 deps = MICROKERNEL_BENCHMARK_DEPS + [
5613 ":im2col",
5614 ":packing",
5615 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005616)
5617
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005618xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005619 name = "rounding_bench",
5620 srcs = [
5621 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005622 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005623 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005624 ] + MICROKERNEL_BENCHMARK_HDRS,
5625 deps = MICROKERNEL_BENCHMARK_DEPS,
5626)
5627
Marat Dukhan08c4a432019-10-03 09:29:21 -07005628########################### Benchmarks for operators ###########################
5629
5630xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005631 name = "average_pooling_bench",
5632 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005633 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005634 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005635 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005636)
5637
5638xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005639 name = "bankers_rounding_bench",
5640 srcs = ["bench/bankers-rounding.cc"],
5641 copts = xnnpack_optional_tflite_copts(),
5642 tags = ["nowin32"],
5643 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5644)
5645
5646xnnpack_benchmark(
5647 name = "ceiling_bench",
5648 srcs = ["bench/ceiling.cc"],
5649 copts = xnnpack_optional_tflite_copts(),
5650 tags = ["nowin32"],
5651 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5652)
5653
5654xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005655 name = "channel_shuffle_bench",
5656 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005657 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005658)
5659
5660xnnpack_benchmark(
5661 name = "convolution_bench",
5662 srcs = ["bench/convolution.cc"],
5663 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005664 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005665 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005666)
5667
5668xnnpack_benchmark(
5669 name = "deconvolution_bench",
5670 srcs = ["bench/deconvolution.cc"],
5671 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005672 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005673 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005674)
5675
5676xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005677 name = "elu_bench",
5678 srcs = ["bench/elu.cc"],
5679 copts = xnnpack_optional_tflite_copts(),
5680 tags = ["nowin32"],
5681 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5682)
5683
5684xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005685 name = "floor_bench",
5686 srcs = ["bench/floor.cc"],
5687 copts = xnnpack_optional_tflite_copts(),
5688 tags = ["nowin32"],
5689 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5690)
5691
5692xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005693 name = "global_average_pooling_bench",
5694 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005695 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005696)
5697
5698xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005699 name = "hardswish_bench",
5700 srcs = ["bench/hardswish.cc"],
5701 copts = xnnpack_optional_tflite_copts(),
5702 tags = ["nowin32"],
5703 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5704)
5705
5706xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005707 name = "max_pooling_bench",
5708 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005709 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005710)
5711
5712xnnpack_benchmark(
5713 name = "sigmoid_bench",
5714 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005715 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005716 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005717 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005718)
5719
5720xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005721 name = "prelu_bench",
5722 srcs = ["bench/prelu.cc"],
5723 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005724 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005725 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005726)
5727
5728xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005729 name = "softmax_bench",
5730 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005731 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005732 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005733 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005734)
5735
Marat Dukhan87727142020-06-24 15:24:10 -07005736xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005737 name = "square_root_bench",
5738 srcs = ["bench/square-root.cc"],
5739 copts = xnnpack_optional_tflite_copts(),
5740 tags = ["nowin32"],
5741 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5742)
5743
5744xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005745 name = "truncation_bench",
5746 srcs = ["bench/truncation.cc"],
5747 deps = OPERATOR_BENCHMARK_DEPS,
5748)
5749
Marat Dukhanc068bb62019-10-04 13:24:39 -07005750############################# End-to-end benchmarks ############################
5751
5752cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005753 name = "fp32_mobilenet_v1",
5754 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005755 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005756 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005757 linkstatic = True,
5758 deps = [
5759 ":XNNPACK",
5760 "@pthreadpool",
5761 ],
5762)
5763
5764cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005765 name = "fp32_sparse_mobilenet_v1",
5766 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5767 hdrs = ["models/models.h"],
5768 copts = xnnpack_std_cxxopts(),
5769 linkstatic = True,
5770 deps = [
5771 ":XNNPACK",
5772 "@pthreadpool",
5773 ],
5774)
5775
5776cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005777 name = "fp16_mobilenet_v1",
5778 srcs = ["models/fp16-mobilenet-v1.cc"],
5779 hdrs = ["models/models.h"],
5780 copts = xnnpack_std_cxxopts(),
5781 linkstatic = True,
5782 deps = [
5783 ":XNNPACK",
5784 "@FP16",
5785 "@pthreadpool",
5786 ],
5787)
5788
5789cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005790 name = "qs8_mobilenet_v1",
5791 srcs = ["models/qs8-mobilenet-v1.cc"],
5792 hdrs = ["models/models.h"],
5793 copts = xnnpack_std_cxxopts(),
5794 linkstatic = True,
5795 deps = [
5796 ":XNNPACK",
5797 "@pthreadpool",
5798 ],
5799)
5800
5801cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07005802 name = "qs8_mobilenet_v2",
5803 srcs = ["models/qs8-mobilenet-v2.cc"],
5804 hdrs = ["models/models.h"],
5805 copts = xnnpack_std_cxxopts(),
5806 linkstatic = True,
5807 deps = [
5808 ":XNNPACK",
5809 "@pthreadpool",
5810 ],
5811)
5812
5813cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005814 name = "qu8_mobilenet_v1",
5815 srcs = ["models/qu8-mobilenet-v1.cc"],
5816 hdrs = ["models/models.h"],
5817 copts = xnnpack_std_cxxopts(),
5818 linkstatic = True,
5819 deps = [
5820 ":XNNPACK",
5821 "@pthreadpool",
5822 ],
5823)
5824
5825cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005826 name = "fp32_mobilenet_v2",
5827 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005828 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005829 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005830 linkstatic = True,
5831 deps = [
5832 ":XNNPACK",
5833 "@pthreadpool",
5834 ],
5835)
5836
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005837cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005838 name = "fp32_sparse_mobilenet_v2",
5839 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
5840 hdrs = ["models/models.h"],
5841 copts = xnnpack_std_cxxopts(),
5842 linkstatic = True,
5843 deps = [
5844 ":XNNPACK",
5845 "@pthreadpool",
5846 ],
5847)
5848
5849cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005850 name = "fp16_mobilenet_v2",
5851 srcs = ["models/fp16-mobilenet-v2.cc"],
5852 hdrs = ["models/models.h"],
5853 copts = xnnpack_std_cxxopts(),
5854 linkstatic = True,
5855 deps = [
5856 ":XNNPACK",
5857 "@FP16",
5858 "@pthreadpool",
5859 ],
5860)
5861
5862cc_library(
5863 name = "fp32_mobilenet_v3_large",
5864 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005865 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005866 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005867 linkstatic = True,
5868 deps = [
5869 ":XNNPACK",
5870 "@pthreadpool",
5871 ],
5872)
5873
5874cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005875 name = "fp32_sparse_mobilenet_v3_large",
5876 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
5877 hdrs = ["models/models.h"],
5878 copts = xnnpack_std_cxxopts(),
5879 linkstatic = True,
5880 deps = [
5881 ":XNNPACK",
5882 "@pthreadpool",
5883 ],
5884)
5885
5886cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005887 name = "fp16_mobilenet_v3_large",
5888 srcs = ["models/fp16-mobilenet-v3-large.cc"],
5889 hdrs = ["models/models.h"],
5890 copts = xnnpack_std_cxxopts(),
5891 linkstatic = True,
5892 deps = [
5893 ":XNNPACK",
5894 "@FP16",
5895 "@pthreadpool",
5896 ],
5897)
5898
5899cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005900 name = "fp32_mobilenet_v3_small",
5901 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005902 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005903 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005904 linkstatic = True,
5905 deps = [
5906 ":XNNPACK",
5907 "@pthreadpool",
5908 ],
5909)
5910
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005911cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005912 name = "fp32_sparse_mobilenet_v3_small",
5913 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
5914 hdrs = ["models/models.h"],
5915 copts = xnnpack_std_cxxopts(),
5916 linkstatic = True,
5917 deps = [
5918 ":XNNPACK",
5919 "@pthreadpool",
5920 ],
5921)
5922
5923cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005924 name = "fp16_mobilenet_v3_small",
5925 srcs = ["models/fp16-mobilenet-v3-small.cc"],
5926 hdrs = ["models/models.h"],
5927 copts = xnnpack_std_cxxopts(),
5928 linkstatic = True,
5929 deps = [
5930 ":XNNPACK",
5931 "@FP16",
5932 "@pthreadpool",
5933 ],
5934)
5935
Marat Dukhanc068bb62019-10-04 13:24:39 -07005936xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07005937 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005938 srcs = [
5939 "bench/f32-dwconv-e2e.cc",
5940 "bench/end2end.h",
5941 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07005942 deps = MICROKERNEL_BENCHMARK_DEPS + [
5943 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005944 ":fp32_mobilenet_v1",
5945 ":fp32_mobilenet_v2",
5946 ":fp32_mobilenet_v3_large",
5947 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07005948 ],
5949)
5950
5951xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07005952 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005953 srcs = [
5954 "bench/f32-gemm-e2e.cc",
5955 "bench/end2end.h",
5956 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07005957 deps = MICROKERNEL_BENCHMARK_DEPS + [
5958 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005959 ":fp32_mobilenet_v1",
5960 ":fp32_mobilenet_v2",
5961 ":fp32_mobilenet_v3_large",
5962 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07005963 ],
5964)
5965
5966xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08005967 name = "qs8_gemm_e2e_bench",
5968 srcs = [
5969 "bench/qs8-gemm-e2e.cc",
5970 "bench/end2end.h",
5971 ] + MICROKERNEL_BENCHMARK_HDRS,
5972 deps = MICROKERNEL_BENCHMARK_DEPS + [
5973 ":XNNPACK",
5974 ":qs8_mobilenet_v1",
5975 ":qs8_mobilenet_v2",
5976 ],
5977)
5978
5979xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07005980 name = "end2end_bench",
5981 srcs = ["bench/end2end.cc"],
5982 deps = [
5983 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07005984 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005985 ":fp16_mobilenet_v1",
5986 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07005987 ":fp16_mobilenet_v3_large",
5988 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07005989 ":fp32_mobilenet_v1",
5990 ":fp32_mobilenet_v2",
5991 ":fp32_mobilenet_v3_large",
5992 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08005993 ":fp32_sparse_mobilenet_v1",
5994 ":fp32_sparse_mobilenet_v2",
5995 ":fp32_sparse_mobilenet_v3_large",
5996 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005997 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07005998 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005999 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006000 "@pthreadpool",
6001 ],
6002)
6003
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006004#################### Accuracy evaluation for math functions ####################
6005
6006xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006007 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006008 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006009 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006010 "src/xnnpack/AlignedAllocator.h",
6011 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006012 deps = ACCURACY_EVAL_DEPS + [
6013 ":bench_utils",
6014 "@cpuinfo",
6015 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006016)
6017
Marat Dukhan515c9772019-10-17 18:07:57 -07006018xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006019 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006020 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006021 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006022 "src/xnnpack/AlignedAllocator.h",
6023 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006024 deps = ACCURACY_EVAL_DEPS + [
6025 ":bench_utils",
6026 "@cpuinfo",
6027 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006028)
6029
Marat Dukhan98ba4412019-10-23 02:14:28 -07006030xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006031 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006032 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006033 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006034 "src/xnnpack/AlignedAllocator.h",
6035 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006036 deps = ACCURACY_EVAL_DEPS + [
6037 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006038 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006039 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006040)
6041
6042xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006043 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006044 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006045 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006046 "src/xnnpack/AlignedAllocator.h",
6047 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006048 deps = ACCURACY_EVAL_DEPS + [
6049 ":bench_utils",
6050 "@cpuinfo",
6051 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006052)
6053
Marat Dukhanf44f0222020-12-14 11:53:27 -08006054xnnpack_benchmark(
6055 name = "f32_sigmoid_ulp_eval",
6056 srcs = [
6057 "eval/f32-sigmoid-ulp.cc",
6058 "src/xnnpack/AlignedAllocator.h",
6059 ] + ACCURACY_EVAL_HDRS,
6060 deps = ACCURACY_EVAL_DEPS + [
6061 ":bench_utils",
6062 "@cpuinfo",
6063 ],
6064)
6065
6066xnnpack_benchmark(
6067 name = "f32_sqrt_ulp_eval",
6068 srcs = [
6069 "eval/f32-sqrt-ulp.cc",
6070 "src/xnnpack/AlignedAllocator.h",
6071 ] + ACCURACY_EVAL_HDRS,
6072 deps = ACCURACY_EVAL_DEPS + [
6073 ":bench_utils",
6074 "@cpuinfo",
6075 ],
6076)
6077
6078################### Accuracy verification for math functions ##################
6079
6080xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006081 name = "f32_exp_eval",
6082 srcs = [
6083 "eval/f32-exp.cc",
6084 "src/xnnpack/AlignedAllocator.h",
6085 "src/xnnpack/math-stubs.h",
6086 ] + MICROKERNEL_TEST_HDRS,
6087 automatic = False,
6088 deps = MICROKERNEL_TEST_DEPS,
6089)
6090
6091xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006092 name = "f32_expm1minus_eval",
6093 srcs = [
6094 "eval/f32-expm1minus.cc",
6095 "src/xnnpack/AlignedAllocator.h",
6096 "src/xnnpack/math-stubs.h",
6097 ] + MICROKERNEL_TEST_HDRS,
6098 automatic = False,
6099 deps = MICROKERNEL_TEST_DEPS,
6100)
6101
Marat Dukhan8853b822020-05-07 12:19:01 -07006102xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006103 name = "f32_expminus_eval",
6104 srcs = [
6105 "eval/f32-expminus.cc",
6106 "src/xnnpack/AlignedAllocator.h",
6107 "src/xnnpack/math-stubs.h",
6108 ] + MICROKERNEL_TEST_HDRS,
6109 automatic = False,
6110 deps = MICROKERNEL_TEST_DEPS,
6111)
6112
6113xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006114 name = "f32_roundne_eval",
6115 srcs = [
6116 "eval/f32-roundne.cc",
6117 "src/xnnpack/AlignedAllocator.h",
6118 "src/xnnpack/math-stubs.h",
6119 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006120 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006121 deps = MICROKERNEL_TEST_DEPS,
6122)
6123
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006124xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006125 name = "f32_roundd_eval",
6126 srcs = [
6127 "eval/f32-roundd.cc",
6128 "src/xnnpack/AlignedAllocator.h",
6129 "src/xnnpack/math-stubs.h",
6130 ] + MICROKERNEL_TEST_HDRS,
6131 automatic = False,
6132 deps = MICROKERNEL_TEST_DEPS,
6133)
6134
6135xnnpack_unit_test(
6136 name = "f32_roundu_eval",
6137 srcs = [
6138 "eval/f32-roundu.cc",
6139 "src/xnnpack/AlignedAllocator.h",
6140 "src/xnnpack/math-stubs.h",
6141 ] + MICROKERNEL_TEST_HDRS,
6142 automatic = False,
6143 deps = MICROKERNEL_TEST_DEPS,
6144)
6145
6146xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006147 name = "f32_roundz_eval",
6148 srcs = [
6149 "eval/f32-roundz.cc",
6150 "src/xnnpack/AlignedAllocator.h",
6151 "src/xnnpack/math-stubs.h",
6152 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006153 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006154 deps = MICROKERNEL_TEST_DEPS,
6155)
6156
Marat Dukhan08c4a432019-10-03 09:29:21 -07006157######################### Unit tests for micro-kernels #########################
6158
6159xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006160 name = "f16_dwconv_minmax_test",
6161 srcs = [
6162 "test/f16-dwconv-minmax.cc",
6163 "test/dwconv-microkernel-tester.h",
6164 "src/xnnpack/AlignedAllocator.h",
6165 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6166 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6167)
6168
6169xnnpack_unit_test(
6170 name = "f16_gavgpool_minmax_test",
6171 srcs = [
6172 "test/f16-gavgpool-minmax.cc",
6173 "test/gavgpool-microkernel-tester.h",
6174 "src/xnnpack/AlignedAllocator.h",
6175 ] + MICROKERNEL_TEST_HDRS,
6176 deps = MICROKERNEL_TEST_DEPS,
6177)
6178
6179xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006180 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006181 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006182 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006183 "test/gemm-microkernel-tester.h",
6184 "src/xnnpack/AlignedAllocator.h",
6185 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006186 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006187)
6188
6189xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006190 name = "f16_igemm_minmax_test",
6191 srcs = [
6192 "test/f16-igemm-minmax.cc",
6193 "test/gemm-microkernel-tester.h",
6194 "src/xnnpack/AlignedAllocator.h",
6195 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6196 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6197)
6198
6199xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006200 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006201 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006202 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006203 "test/spmm-microkernel-tester.h",
6204 "src/xnnpack/AlignedAllocator.h",
6205 ] + MICROKERNEL_TEST_HDRS,
6206 deps = MICROKERNEL_TEST_DEPS,
6207)
6208
6209xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006210 name = "f16_vadd_minmax_test",
6211 srcs = [
6212 "test/f16-vadd-minmax.cc",
6213 "test/vbinary-microkernel-tester.h",
6214 ] + MICROKERNEL_TEST_HDRS,
6215 deps = MICROKERNEL_TEST_DEPS,
6216)
6217
6218xnnpack_unit_test(
6219 name = "f16_vaddc_minmax_test",
6220 srcs = [
6221 "test/f16-vaddc-minmax.cc",
6222 "test/vbinaryc-microkernel-tester.h",
6223 ] + MICROKERNEL_TEST_HDRS,
6224 deps = MICROKERNEL_TEST_DEPS,
6225)
6226
6227xnnpack_unit_test(
6228 name = "f16_vclamp_test",
6229 srcs = [
6230 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006231 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006232 ] + MICROKERNEL_TEST_HDRS,
6233 deps = MICROKERNEL_TEST_DEPS,
6234)
6235
6236xnnpack_unit_test(
6237 name = "f16_vdiv_minmax_test",
6238 srcs = [
6239 "test/f16-vdiv-minmax.cc",
6240 "test/vbinary-microkernel-tester.h",
6241 ] + MICROKERNEL_TEST_HDRS,
6242 deps = MICROKERNEL_TEST_DEPS,
6243)
6244
6245xnnpack_unit_test(
6246 name = "f16_vdivc_minmax_test",
6247 srcs = [
6248 "test/f16-vdivc-minmax.cc",
6249 "test/vbinaryc-microkernel-tester.h",
6250 ] + MICROKERNEL_TEST_HDRS,
6251 deps = MICROKERNEL_TEST_DEPS,
6252)
6253
6254xnnpack_unit_test(
6255 name = "f16_vrdivc_minmax_test",
6256 srcs = [
6257 "test/f16-vrdivc-minmax.cc",
6258 "test/vbinaryc-microkernel-tester.h",
6259 ] + MICROKERNEL_TEST_HDRS,
6260 deps = MICROKERNEL_TEST_DEPS,
6261)
6262
6263xnnpack_unit_test(
6264 name = "f16_vhswish_test",
6265 srcs = [
6266 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006267 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006268 ] + MICROKERNEL_TEST_HDRS,
6269 deps = MICROKERNEL_TEST_DEPS,
6270)
6271
6272xnnpack_unit_test(
6273 name = "f16_vmax_test",
6274 srcs = [
6275 "test/f16-vmax.cc",
6276 "test/vbinary-microkernel-tester.h",
6277 ] + MICROKERNEL_TEST_HDRS,
6278 deps = MICROKERNEL_TEST_DEPS,
6279)
6280
6281xnnpack_unit_test(
6282 name = "f16_vmaxc_test",
6283 srcs = [
6284 "test/f16-vmaxc.cc",
6285 "test/vbinaryc-microkernel-tester.h",
6286 ] + MICROKERNEL_TEST_HDRS,
6287 deps = MICROKERNEL_TEST_DEPS,
6288)
6289
6290xnnpack_unit_test(
6291 name = "f16_vmin_test",
6292 srcs = [
6293 "test/f16-vmin.cc",
6294 "test/vbinary-microkernel-tester.h",
6295 ] + MICROKERNEL_TEST_HDRS,
6296 deps = MICROKERNEL_TEST_DEPS,
6297)
6298
6299xnnpack_unit_test(
6300 name = "f16_vminc_test",
6301 srcs = [
6302 "test/f16-vminc.cc",
6303 "test/vbinaryc-microkernel-tester.h",
6304 ] + MICROKERNEL_TEST_HDRS,
6305 deps = MICROKERNEL_TEST_DEPS,
6306)
6307
6308xnnpack_unit_test(
6309 name = "f16_vmul_minmax_test",
6310 srcs = [
6311 "test/f16-vmul-minmax.cc",
6312 "test/vbinary-microkernel-tester.h",
6313 ] + MICROKERNEL_TEST_HDRS,
6314 deps = MICROKERNEL_TEST_DEPS,
6315)
6316
6317xnnpack_unit_test(
6318 name = "f16_vmulc_minmax_test",
6319 srcs = [
6320 "test/f16-vmulc-minmax.cc",
6321 "test/vbinaryc-microkernel-tester.h",
6322 ] + MICROKERNEL_TEST_HDRS,
6323 deps = MICROKERNEL_TEST_DEPS,
6324)
6325
6326xnnpack_unit_test(
6327 name = "f16_vmulcaddc_minmax_test",
6328 srcs = [
6329 "test/f16-vmulcaddc-minmax.cc",
6330 "test/vmulcaddc-microkernel-tester.h",
6331 "src/xnnpack/AlignedAllocator.h",
6332 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6333 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6334)
6335
6336xnnpack_unit_test(
6337 name = "f16_vsub_minmax_test",
6338 srcs = [
6339 "test/f16-vsub-minmax.cc",
6340 "test/vbinary-microkernel-tester.h",
6341 ] + MICROKERNEL_TEST_HDRS,
6342 deps = MICROKERNEL_TEST_DEPS,
6343)
6344
6345xnnpack_unit_test(
6346 name = "f16_vsubc_minmax_test",
6347 srcs = [
6348 "test/f16-vsubc-minmax.cc",
6349 "test/vbinaryc-microkernel-tester.h",
6350 ] + MICROKERNEL_TEST_HDRS,
6351 deps = MICROKERNEL_TEST_DEPS,
6352)
6353
6354xnnpack_unit_test(
6355 name = "f16_vrsubc_minmax_test",
6356 srcs = [
6357 "test/f16-vrsubc-minmax.cc",
6358 "test/vbinaryc-microkernel-tester.h",
6359 ] + MICROKERNEL_TEST_HDRS,
6360 deps = MICROKERNEL_TEST_DEPS,
6361)
6362
6363xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006364 name = "f32_argmaxpool_test",
6365 srcs = [
6366 "test/f32-argmaxpool.cc",
6367 "test/argmaxpool-microkernel-tester.h",
6368 "src/xnnpack/AlignedAllocator.h",
6369 ] + MICROKERNEL_TEST_HDRS,
6370 deps = MICROKERNEL_TEST_DEPS,
6371)
6372
6373xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006374 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006375 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006376 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006377 "test/avgpool-microkernel-tester.h",
6378 "src/xnnpack/AlignedAllocator.h",
6379 ] + MICROKERNEL_TEST_HDRS,
6380 deps = MICROKERNEL_TEST_DEPS,
6381)
6382
6383xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006384 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006385 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006386 "test/f32-ibilinear.cc",
6387 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006388 "src/xnnpack/AlignedAllocator.h",
6389 ] + MICROKERNEL_TEST_HDRS,
6390 deps = MICROKERNEL_TEST_DEPS,
6391)
6392
6393xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006394 name = "f32_ibilinear_chw_test",
6395 srcs = [
6396 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006397 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006398 "src/xnnpack/AlignedAllocator.h",
6399 ] + MICROKERNEL_TEST_HDRS,
6400 deps = MICROKERNEL_TEST_DEPS,
6401)
6402
6403xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006404 name = "f32_igemm_test",
6405 srcs = [
6406 "test/f32-igemm.cc",
6407 "test/gemm-microkernel-tester.h",
6408 "src/xnnpack/AlignedAllocator.h",
6409 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006410 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006411)
6412
6413xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006414 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006415 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006416 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006417 "test/gemm-microkernel-tester.h",
6418 "src/xnnpack/AlignedAllocator.h",
6419 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006420 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006421)
6422
6423xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006424 name = "f32_igemm_minmax_test",
6425 srcs = [
6426 "test/f32-igemm-minmax.cc",
6427 "test/gemm-microkernel-tester.h",
6428 "src/xnnpack/AlignedAllocator.h",
6429 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006430 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006431)
6432
6433xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006434 name = "f32_conv_hwc_test",
6435 srcs = [
6436 "test/f32-conv-hwc.cc",
6437 "test/conv-hwc-microkernel-tester.h",
6438 "src/xnnpack/AlignedAllocator.h",
6439 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006440 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006441)
6442
6443xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006444 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006445 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006446 "test/f32-conv-hwc2chw.cc",
6447 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006448 "src/xnnpack/AlignedAllocator.h",
6449 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006450 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006451)
6452
6453xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006454 name = "f32_dwconv_test",
6455 srcs = [
6456 "test/f32-dwconv.cc",
6457 "test/dwconv-microkernel-tester.h",
6458 "src/xnnpack/AlignedAllocator.h",
6459 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006460 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006461)
6462
6463xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006464 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006465 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006466 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006467 "test/dwconv-microkernel-tester.h",
6468 "src/xnnpack/AlignedAllocator.h",
6469 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006470 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006471)
6472
6473xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006474 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006475 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006476 "test/f32-dwconv2d-chw.cc",
6477 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006478 "src/xnnpack/AlignedAllocator.h",
6479 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006480 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006481)
6482
6483xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006484 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006485 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006486 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006487 "test/gavgpool-microkernel-tester.h",
6488 "src/xnnpack/AlignedAllocator.h",
6489 ] + MICROKERNEL_TEST_HDRS,
6490 deps = MICROKERNEL_TEST_DEPS,
6491)
6492
6493xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006494 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006495 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006496 "test/f32-gavgpool-cw.cc",
6497 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006498 "src/xnnpack/AlignedAllocator.h",
6499 ] + MICROKERNEL_TEST_HDRS,
6500 deps = MICROKERNEL_TEST_DEPS,
6501)
6502
6503xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006504 name = "f32_gemm_test",
6505 srcs = [
6506 "test/f32-gemm.cc",
6507 "test/gemm-microkernel-tester.h",
6508 "src/xnnpack/AlignedAllocator.h",
6509 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006510 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006511)
6512
6513xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006514 name = "f32_gemm_relu_test",
6515 srcs = [
6516 "test/f32-gemm-relu.cc",
6517 "test/gemm-microkernel-tester.h",
6518 "src/xnnpack/AlignedAllocator.h",
6519 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006520 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006521)
6522
6523xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006524 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006525 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006526 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006527 "test/gemm-microkernel-tester.h",
6528 "src/xnnpack/AlignedAllocator.h",
6529 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006530 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006531)
6532
6533xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006534 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006535 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006536 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006537 "test/gemm-microkernel-tester.h",
6538 "src/xnnpack/AlignedAllocator.h",
6539 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006540 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006541)
6542
6543xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006544 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006545 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006546 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006547 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006548 ] + MICROKERNEL_TEST_HDRS,
6549 deps = MICROKERNEL_TEST_DEPS,
6550)
6551
6552xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006553 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006554 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006555 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006556 "test/maxpool-microkernel-tester.h",
6557 ] + MICROKERNEL_TEST_HDRS,
6558 deps = MICROKERNEL_TEST_DEPS,
6559)
6560
6561xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006562 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006563 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006564 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006565 "test/avgpool-microkernel-tester.h",
6566 "src/xnnpack/AlignedAllocator.h",
6567 ] + MICROKERNEL_TEST_HDRS,
6568 deps = MICROKERNEL_TEST_DEPS,
6569)
6570
6571xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006572 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006573 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006574 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006575 "test/gemm-microkernel-tester.h",
6576 "src/xnnpack/AlignedAllocator.h",
6577 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006578 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006579)
6580
6581xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006582 name = "f16_prelu_test",
6583 srcs = [
6584 "test/f16-prelu.cc",
6585 "test/prelu-microkernel-tester.h",
6586 "src/xnnpack/AlignedAllocator.h",
6587 ] + MICROKERNEL_TEST_HDRS,
6588 deps = MICROKERNEL_TEST_DEPS,
6589)
6590
6591xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006592 name = "f32_prelu_test",
6593 srcs = [
6594 "test/f32-prelu.cc",
6595 "test/prelu-microkernel-tester.h",
6596 "src/xnnpack/AlignedAllocator.h",
6597 ] + MICROKERNEL_TEST_HDRS,
6598 deps = MICROKERNEL_TEST_DEPS,
6599)
6600
6601xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006602 name = "f32_raddexpminusmax_test",
6603 srcs = [
6604 "test/f32-raddexpminusmax.cc",
6605 "test/raddexpminusmax-microkernel-tester.h",
6606 ] + MICROKERNEL_TEST_HDRS,
6607 deps = MICROKERNEL_TEST_DEPS,
6608)
6609
6610xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006611 name = "f32_raddextexp_test",
6612 srcs = [
6613 "test/f32-raddextexp.cc",
6614 "test/raddextexp-microkernel-tester.h",
6615 ] + MICROKERNEL_TEST_HDRS,
6616 deps = MICROKERNEL_TEST_DEPS,
6617)
6618
6619xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006620 name = "f32_raddstoreexpminusmax_test",
6621 srcs = [
6622 "test/f32-raddstoreexpminusmax.cc",
6623 "test/raddstoreexpminusmax-microkernel-tester.h",
6624 ] + MICROKERNEL_TEST_HDRS,
6625 deps = MICROKERNEL_TEST_DEPS,
6626)
6627
6628xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006629 name = "f32_rmax_test",
6630 srcs = [
6631 "test/f32-rmax.cc",
6632 "test/rmax-microkernel-tester.h",
6633 ] + MICROKERNEL_TEST_HDRS,
6634 deps = MICROKERNEL_TEST_DEPS,
6635)
6636
6637xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006638 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006639 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006640 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006641 "test/spmm-microkernel-tester.h",
6642 "src/xnnpack/AlignedAllocator.h",
6643 ] + MICROKERNEL_TEST_HDRS,
6644 deps = MICROKERNEL_TEST_DEPS,
6645)
6646
6647xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006648 name = "f32_vabs_test",
6649 srcs = [
6650 "test/f32-vabs.cc",
6651 "test/vunary-microkernel-tester.h",
6652 ] + MICROKERNEL_TEST_HDRS,
6653 deps = MICROKERNEL_TEST_DEPS,
6654)
6655
6656xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006657 name = "f32_vadd_test",
6658 srcs = [
6659 "test/f32-vadd.cc",
6660 "test/vbinary-microkernel-tester.h",
6661 ] + MICROKERNEL_TEST_HDRS,
6662 deps = MICROKERNEL_TEST_DEPS,
6663)
6664
6665xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006666 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006667 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006668 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006669 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006670 ] + MICROKERNEL_TEST_HDRS,
6671 deps = MICROKERNEL_TEST_DEPS,
6672)
6673
6674xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006675 name = "f32_vadd_relu_test",
6676 srcs = [
6677 "test/f32-vadd-relu.cc",
6678 "test/vbinary-microkernel-tester.h",
6679 ] + MICROKERNEL_TEST_HDRS,
6680 deps = MICROKERNEL_TEST_DEPS,
6681)
6682
6683xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006684 name = "f32_vaddc_test",
6685 srcs = [
6686 "test/f32-vaddc.cc",
6687 "test/vbinaryc-microkernel-tester.h",
6688 ] + MICROKERNEL_TEST_HDRS,
6689 deps = MICROKERNEL_TEST_DEPS,
6690)
6691
6692xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006693 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006694 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006695 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006696 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006697 ] + MICROKERNEL_TEST_HDRS,
6698 deps = MICROKERNEL_TEST_DEPS,
6699)
6700
6701xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006702 name = "f32_vaddc_relu_test",
6703 srcs = [
6704 "test/f32-vaddc-relu.cc",
6705 "test/vbinaryc-microkernel-tester.h",
6706 ] + MICROKERNEL_TEST_HDRS,
6707 deps = MICROKERNEL_TEST_DEPS,
6708)
6709
6710xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006711 name = "f32_vclamp_test",
6712 srcs = [
6713 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006714 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006715 ] + MICROKERNEL_TEST_HDRS,
6716 deps = MICROKERNEL_TEST_DEPS,
6717)
6718
6719xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006720 name = "f32_vdiv_test",
6721 srcs = [
6722 "test/f32-vdiv.cc",
6723 "test/vbinary-microkernel-tester.h",
6724 ] + MICROKERNEL_TEST_HDRS,
6725 deps = MICROKERNEL_TEST_DEPS,
6726)
6727
6728xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006729 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006730 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006731 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006732 "test/vbinary-microkernel-tester.h",
6733 ] + MICROKERNEL_TEST_HDRS,
6734 deps = MICROKERNEL_TEST_DEPS,
6735)
6736
6737xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006738 name = "f32_vdiv_relu_test",
6739 srcs = [
6740 "test/f32-vdiv-relu.cc",
6741 "test/vbinary-microkernel-tester.h",
6742 ] + MICROKERNEL_TEST_HDRS,
6743 deps = MICROKERNEL_TEST_DEPS,
6744)
6745
6746xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006747 name = "f32_vdivc_test",
6748 srcs = [
6749 "test/f32-vdivc.cc",
6750 "test/vbinaryc-microkernel-tester.h",
6751 ] + MICROKERNEL_TEST_HDRS,
6752 deps = MICROKERNEL_TEST_DEPS,
6753)
6754
6755xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006756 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006757 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006758 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006759 "test/vbinaryc-microkernel-tester.h",
6760 ] + MICROKERNEL_TEST_HDRS,
6761 deps = MICROKERNEL_TEST_DEPS,
6762)
6763
6764xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006765 name = "f32_vdivc_relu_test",
6766 srcs = [
6767 "test/f32-vdivc-relu.cc",
6768 "test/vbinaryc-microkernel-tester.h",
6769 ] + MICROKERNEL_TEST_HDRS,
6770 deps = MICROKERNEL_TEST_DEPS,
6771)
6772
6773xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006774 name = "f32_vrdivc_test",
6775 srcs = [
6776 "test/f32-vrdivc.cc",
6777 "test/vbinaryc-microkernel-tester.h",
6778 ] + MICROKERNEL_TEST_HDRS,
6779 deps = MICROKERNEL_TEST_DEPS,
6780)
6781
6782xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006783 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006784 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006785 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006786 "test/vbinaryc-microkernel-tester.h",
6787 ] + MICROKERNEL_TEST_HDRS,
6788 deps = MICROKERNEL_TEST_DEPS,
6789)
6790
6791xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006792 name = "f32_vrdivc_relu_test",
6793 srcs = [
6794 "test/f32-vrdivc-relu.cc",
6795 "test/vbinaryc-microkernel-tester.h",
6796 ] + MICROKERNEL_TEST_HDRS,
6797 deps = MICROKERNEL_TEST_DEPS,
6798)
6799
6800xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006801 name = "f32_velu_test",
6802 srcs = [
6803 "test/f32-velu.cc",
6804 "test/vunary-microkernel-tester.h",
6805 ] + MICROKERNEL_TEST_HDRS,
6806 deps = MICROKERNEL_TEST_DEPS,
6807)
6808
6809xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08006810 name = "f32_vmax_test",
6811 srcs = [
6812 "test/f32-vmax.cc",
6813 "test/vbinary-microkernel-tester.h",
6814 ] + MICROKERNEL_TEST_HDRS,
6815 deps = MICROKERNEL_TEST_DEPS,
6816)
6817
6818xnnpack_unit_test(
6819 name = "f32_vmaxc_test",
6820 srcs = [
6821 "test/f32-vmaxc.cc",
6822 "test/vbinaryc-microkernel-tester.h",
6823 ] + MICROKERNEL_TEST_HDRS,
6824 deps = MICROKERNEL_TEST_DEPS,
6825)
6826
6827xnnpack_unit_test(
6828 name = "f32_vmin_test",
6829 srcs = [
6830 "test/f32-vmin.cc",
6831 "test/vbinary-microkernel-tester.h",
6832 ] + MICROKERNEL_TEST_HDRS,
6833 deps = MICROKERNEL_TEST_DEPS,
6834)
6835
6836xnnpack_unit_test(
6837 name = "f32_vminc_test",
6838 srcs = [
6839 "test/f32-vminc.cc",
6840 "test/vbinaryc-microkernel-tester.h",
6841 ] + MICROKERNEL_TEST_HDRS,
6842 deps = MICROKERNEL_TEST_DEPS,
6843)
6844
6845xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006846 name = "f32_vmul_test",
6847 srcs = [
6848 "test/f32-vmul.cc",
6849 "test/vbinary-microkernel-tester.h",
6850 ] + MICROKERNEL_TEST_HDRS,
6851 deps = MICROKERNEL_TEST_DEPS,
6852)
6853
6854xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006855 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006856 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006857 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006858 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006859 ] + MICROKERNEL_TEST_HDRS,
6860 deps = MICROKERNEL_TEST_DEPS,
6861)
6862
6863xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006864 name = "f32_vmul_relu_test",
6865 srcs = [
6866 "test/f32-vmul-relu.cc",
6867 "test/vbinary-microkernel-tester.h",
6868 ] + MICROKERNEL_TEST_HDRS,
6869 deps = MICROKERNEL_TEST_DEPS,
6870)
6871
6872xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006873 name = "f32_vmulc_test",
6874 srcs = [
6875 "test/f32-vmulc.cc",
6876 "test/vbinaryc-microkernel-tester.h",
6877 ] + MICROKERNEL_TEST_HDRS,
6878 deps = MICROKERNEL_TEST_DEPS,
6879)
6880
6881xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006882 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006883 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006884 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006885 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006886 ] + MICROKERNEL_TEST_HDRS,
6887 deps = MICROKERNEL_TEST_DEPS,
6888)
6889
6890xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006891 name = "f32_vmulc_relu_test",
6892 srcs = [
6893 "test/f32-vmulc-relu.cc",
6894 "test/vbinaryc-microkernel-tester.h",
6895 ] + MICROKERNEL_TEST_HDRS,
6896 deps = MICROKERNEL_TEST_DEPS,
6897)
6898
6899xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006900 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006901 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006902 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006903 "test/vmulcaddc-microkernel-tester.h",
6904 "src/xnnpack/AlignedAllocator.h",
6905 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006906 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006907)
6908
6909xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07006910 name = "f32_vlrelu_test",
6911 srcs = [
6912 "test/f32-vlrelu.cc",
6913 "test/vunary-microkernel-tester.h",
6914 ] + MICROKERNEL_TEST_HDRS,
6915 deps = MICROKERNEL_TEST_DEPS,
6916)
6917
6918xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006919 name = "f32_vneg_test",
6920 srcs = [
6921 "test/f32-vneg.cc",
6922 "test/vunary-microkernel-tester.h",
6923 ] + MICROKERNEL_TEST_HDRS,
6924 deps = MICROKERNEL_TEST_DEPS,
6925)
6926
6927xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006928 name = "f32_vrelu_test",
6929 srcs = [
6930 "test/f32-vrelu.cc",
6931 "test/vunary-microkernel-tester.h",
6932 ] + MICROKERNEL_TEST_HDRS,
6933 deps = MICROKERNEL_TEST_DEPS,
6934)
6935
6936xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07006937 name = "f32_vrndne_test",
6938 srcs = [
6939 "test/f32-vrndne.cc",
6940 "test/vunary-microkernel-tester.h",
6941 ] + MICROKERNEL_TEST_HDRS,
6942 deps = MICROKERNEL_TEST_DEPS,
6943)
6944
6945xnnpack_unit_test(
6946 name = "f32_vrndz_test",
6947 srcs = [
6948 "test/f32-vrndz.cc",
6949 "test/vunary-microkernel-tester.h",
6950 ] + MICROKERNEL_TEST_HDRS,
6951 deps = MICROKERNEL_TEST_DEPS,
6952)
6953
6954xnnpack_unit_test(
6955 name = "f32_vrndu_test",
6956 srcs = [
6957 "test/f32-vrndu.cc",
6958 "test/vunary-microkernel-tester.h",
6959 ] + MICROKERNEL_TEST_HDRS,
6960 deps = MICROKERNEL_TEST_DEPS,
6961)
6962
6963xnnpack_unit_test(
6964 name = "f32_vrndd_test",
6965 srcs = [
6966 "test/f32-vrndd.cc",
6967 "test/vunary-microkernel-tester.h",
6968 ] + MICROKERNEL_TEST_HDRS,
6969 deps = MICROKERNEL_TEST_DEPS,
6970)
6971
6972xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07006973 name = "f32_vscale_test",
6974 srcs = [
6975 "test/f32-vscale.cc",
6976 "test/vscale-microkernel-tester.h",
6977 ] + MICROKERNEL_TEST_HDRS,
6978 deps = MICROKERNEL_TEST_DEPS,
6979)
6980
6981xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006982 name = "f32_vscaleexpminusmax_test",
6983 srcs = [
6984 "test/f32-vscaleexpminusmax.cc",
6985 "test/vscaleexpminusmax-microkernel-tester.h",
6986 ] + MICROKERNEL_TEST_HDRS,
6987 deps = MICROKERNEL_TEST_DEPS,
6988)
6989
6990xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006991 name = "f32_vscaleextexp_test",
6992 srcs = [
6993 "test/f32-vscaleextexp.cc",
6994 "test/vscaleextexp-microkernel-tester.h",
6995 ] + MICROKERNEL_TEST_HDRS,
6996 deps = MICROKERNEL_TEST_DEPS,
6997)
6998
6999xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007000 name = "f32_vsigmoid_test",
7001 srcs = [
7002 "test/f32-vsigmoid.cc",
7003 "test/vunary-microkernel-tester.h",
7004 ] + MICROKERNEL_TEST_HDRS,
7005 deps = MICROKERNEL_TEST_DEPS,
7006)
7007
7008xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007009 name = "f32_vsqr_test",
7010 srcs = [
7011 "test/f32-vsqr.cc",
7012 "test/vunary-microkernel-tester.h",
7013 ] + MICROKERNEL_TEST_HDRS,
7014 deps = MICROKERNEL_TEST_DEPS,
7015)
7016
7017xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007018 name = "f32_vsqrdiff_test",
7019 srcs = [
7020 "test/f32-vsqrdiff.cc",
7021 "test/vbinary-microkernel-tester.h",
7022 ] + MICROKERNEL_TEST_HDRS,
7023 deps = MICROKERNEL_TEST_DEPS,
7024)
7025
7026xnnpack_unit_test(
7027 name = "f32_vsqrdiffc_test",
7028 srcs = [
7029 "test/f32-vsqrdiffc.cc",
7030 "test/vbinaryc-microkernel-tester.h",
7031 ] + MICROKERNEL_TEST_HDRS,
7032 deps = MICROKERNEL_TEST_DEPS,
7033)
7034
7035xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007036 name = "f32_vsqrt_test",
7037 srcs = [
7038 "test/f32-vsqrt.cc",
7039 "test/vunary-microkernel-tester.h",
7040 ] + MICROKERNEL_TEST_HDRS,
7041 deps = MICROKERNEL_TEST_DEPS,
7042)
7043
7044xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007045 name = "f32_vsub_test",
7046 srcs = [
7047 "test/f32-vsub.cc",
7048 "test/vbinary-microkernel-tester.h",
7049 ] + MICROKERNEL_TEST_HDRS,
7050 deps = MICROKERNEL_TEST_DEPS,
7051)
7052
7053xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007054 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007055 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007056 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007057 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007058 ] + MICROKERNEL_TEST_HDRS,
7059 deps = MICROKERNEL_TEST_DEPS,
7060)
7061
7062xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007063 name = "f32_vsub_relu_test",
7064 srcs = [
7065 "test/f32-vsub-relu.cc",
7066 "test/vbinary-microkernel-tester.h",
7067 ] + MICROKERNEL_TEST_HDRS,
7068 deps = MICROKERNEL_TEST_DEPS,
7069)
7070
7071xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007072 name = "f32_vsubc_test",
7073 srcs = [
7074 "test/f32-vsubc.cc",
7075 "test/vbinaryc-microkernel-tester.h",
7076 ] + MICROKERNEL_TEST_HDRS,
7077 deps = MICROKERNEL_TEST_DEPS,
7078)
7079
7080xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007081 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007082 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007083 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007084 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007085 ] + MICROKERNEL_TEST_HDRS,
7086 deps = MICROKERNEL_TEST_DEPS,
7087)
7088
7089xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007090 name = "f32_vsubc_relu_test",
7091 srcs = [
7092 "test/f32-vsubc-relu.cc",
7093 "test/vbinaryc-microkernel-tester.h",
7094 ] + MICROKERNEL_TEST_HDRS,
7095 deps = MICROKERNEL_TEST_DEPS,
7096)
7097
7098xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007099 name = "f32_vrsubc_test",
7100 srcs = [
7101 "test/f32-vrsubc.cc",
7102 "test/vbinaryc-microkernel-tester.h",
7103 ] + MICROKERNEL_TEST_HDRS,
7104 deps = MICROKERNEL_TEST_DEPS,
7105)
7106
7107xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007108 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007109 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007110 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007111 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007112 ] + MICROKERNEL_TEST_HDRS,
7113 deps = MICROKERNEL_TEST_DEPS,
7114)
7115
7116xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007117 name = "f32_vrsubc_relu_test",
7118 srcs = [
7119 "test/f32-vrsubc-relu.cc",
7120 "test/vbinaryc-microkernel-tester.h",
7121 ] + MICROKERNEL_TEST_HDRS,
7122 deps = MICROKERNEL_TEST_DEPS,
7123)
7124
7125xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007126 name = "qc8_gemm_minmax_fp32_test",
7127 timeout = "moderate",
7128 srcs = [
7129 "test/qc8-gemm-minmax-fp32.cc",
7130 "test/gemm-microkernel-tester.h",
7131 "src/xnnpack/AlignedAllocator.h",
7132 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7133 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7134)
7135
7136xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007137 name = "qc8_igemm_minmax_fp32_test",
7138 timeout = "moderate",
7139 srcs = [
7140 "test/qc8-igemm-minmax-fp32.cc",
7141 "test/gemm-microkernel-tester.h",
7142 "src/xnnpack/AlignedAllocator.h",
7143 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7144 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7145)
7146
7147xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007148 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007149 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007150 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007151 "test/dwconv-microkernel-tester.h",
7152 "src/xnnpack/AlignedAllocator.h",
7153 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7154 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7155)
7156
7157xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007158 name = "qs8_dwconv_minmax_fp32_test",
7159 srcs = [
7160 "test/qs8-dwconv-minmax-fp32.cc",
7161 "test/dwconv-microkernel-tester.h",
7162 "src/xnnpack/AlignedAllocator.h",
7163 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7164 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7165)
7166
7167xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007168 name = "qs8_gavgpool_minmax_test",
7169 srcs = [
7170 "test/qs8-gavgpool-minmax.cc",
7171 "test/gavgpool-microkernel-tester.h",
7172 "src/xnnpack/AlignedAllocator.h",
7173 ] + MICROKERNEL_TEST_HDRS,
7174 deps = MICROKERNEL_TEST_DEPS,
7175)
7176
7177xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007178 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007179 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007180 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007181 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007182 "test/gemm-microkernel-tester.h",
7183 "src/xnnpack/AlignedAllocator.h",
7184 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7185 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7186)
7187
7188xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007189 name = "qs8_gemm_minmax_fp32_test",
7190 timeout = "moderate",
7191 srcs = [
7192 "test/qs8-gemm-minmax-fp32.cc",
7193 "test/gemm-microkernel-tester.h",
7194 "src/xnnpack/AlignedAllocator.h",
7195 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7196 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7197)
7198
7199xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007200 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007201 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007202 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007203 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007204 "test/gemm-microkernel-tester.h",
7205 "src/xnnpack/AlignedAllocator.h",
7206 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7207 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7208)
7209
7210xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007211 name = "qs8_igemm_minmax_fp32_test",
7212 timeout = "moderate",
7213 srcs = [
7214 "test/qs8-igemm-minmax-fp32.cc",
7215 "test/gemm-microkernel-tester.h",
7216 "src/xnnpack/AlignedAllocator.h",
7217 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7218 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7219)
7220
7221xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007222 name = "qs8_requantization_test",
7223 srcs = [
7224 "src/xnnpack/requantization-stubs.h",
7225 "test/qs8-requantization.cc",
7226 "test/requantization-tester.h",
7227 ] + MICROKERNEL_TEST_HDRS,
7228 deps = MICROKERNEL_TEST_DEPS,
7229)
7230
7231xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007232 name = "qs8_vadd_minmax_test",
7233 srcs = [
7234 "test/qs8-vadd-minmax.cc",
7235 "test/vadd-microkernel-tester.h",
7236 ] + MICROKERNEL_TEST_HDRS,
7237 deps = MICROKERNEL_TEST_DEPS,
7238)
7239
7240xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007241 name = "qs8_vaddc_minmax_test",
7242 srcs = [
7243 "test/qs8-vaddc-minmax.cc",
7244 "test/vaddc-microkernel-tester.h",
7245 ] + MICROKERNEL_TEST_HDRS,
7246 deps = MICROKERNEL_TEST_DEPS,
7247)
7248
7249xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007250 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007251 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007252 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007253 "test/avgpool-microkernel-tester.h",
7254 "src/xnnpack/AlignedAllocator.h",
7255 ] + MICROKERNEL_TEST_HDRS,
7256 deps = MICROKERNEL_TEST_DEPS,
7257)
7258
7259xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007260 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007261 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007262 "test/qu8-dwconv-minmax.cc",
7263 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007264 "src/xnnpack/AlignedAllocator.h",
7265 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007266 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007267)
7268
7269xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007270 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007271 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007272 "test/qu8-igemm-minmax.cc",
7273 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007274 "src/xnnpack/AlignedAllocator.h",
7275 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007276 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007277)
7278
7279xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007280 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007281 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007282 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007283 "test/gavgpool-microkernel-tester.h",
7284 "src/xnnpack/AlignedAllocator.h",
7285 ] + MICROKERNEL_TEST_HDRS,
7286 deps = MICROKERNEL_TEST_DEPS,
7287)
7288
7289xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007290 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007291 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007292 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007293 "test/gemm-microkernel-tester.h",
7294 "src/xnnpack/AlignedAllocator.h",
7295 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007296 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007297)
7298
7299xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007300 name = "qu8_requantization_test",
7301 srcs = [
7302 "src/xnnpack/requantization-stubs.h",
7303 "test/qu8-requantization.cc",
7304 "test/requantization-tester.h",
7305 ] + MICROKERNEL_TEST_HDRS,
7306 deps = MICROKERNEL_TEST_DEPS,
7307)
7308
7309xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007310 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007311 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007312 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007313 "test/vadd-microkernel-tester.h",
7314 ] + MICROKERNEL_TEST_HDRS,
7315 deps = MICROKERNEL_TEST_DEPS,
7316)
7317
7318xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007319 name = "u8_lut32norm_test",
7320 srcs = [
7321 "test/u8-lut32norm.cc",
7322 "test/lut-norm-microkernel-tester.h",
7323 ] + MICROKERNEL_TEST_HDRS,
7324 deps = MICROKERNEL_TEST_DEPS,
7325)
7326
7327xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007328 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007329 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007330 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007331 "test/maxpool-microkernel-tester.h",
7332 ] + MICROKERNEL_TEST_HDRS,
7333 deps = MICROKERNEL_TEST_DEPS,
7334)
7335
7336xnnpack_unit_test(
7337 name = "u8_rmax_test",
7338 srcs = [
7339 "test/u8-rmax.cc",
7340 "test/rmax-microkernel-tester.h",
7341 ] + MICROKERNEL_TEST_HDRS,
7342 deps = MICROKERNEL_TEST_DEPS,
7343)
7344
7345xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007346 name = "u8_vclamp_test",
7347 srcs = [
7348 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007349 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007350 ] + MICROKERNEL_TEST_HDRS,
7351 deps = MICROKERNEL_TEST_DEPS,
7352)
7353
7354xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007355 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007356 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007357 "test/x32-depthtospace2d-chw2hwc.cc",
7358 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007359 ] + MICROKERNEL_TEST_HDRS,
7360 deps = MICROKERNEL_TEST_DEPS,
7361)
7362
7363xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007364 name = "x32_fill_test",
7365 srcs = [
7366 "test/x32-fill.cc",
7367 "test/fill-microkernel-tester.h",
7368 ] + MICROKERNEL_TEST_HDRS,
7369 deps = MICROKERNEL_TEST_DEPS,
7370)
7371
7372xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007373 name = "x32_packx_test",
7374 srcs = [
7375 "test/x32-packx.cc",
7376 "test/pack-microkernel-tester.h",
7377 "src/xnnpack/AlignedAllocator.h",
7378 ] + MICROKERNEL_TEST_HDRS,
7379 deps = MICROKERNEL_TEST_DEPS,
7380)
7381
7382xnnpack_unit_test(
7383 name = "x32_pad_test",
7384 srcs = [
7385 "test/x32-pad.cc",
7386 "test/pad-microkernel-tester.h",
7387 ] + MICROKERNEL_TEST_HDRS,
7388 deps = MICROKERNEL_TEST_DEPS,
7389)
7390
7391xnnpack_unit_test(
7392 name = "x32_unpool_test",
7393 srcs = [
7394 "test/x32-unpool.cc",
7395 "test/unpool-microkernel-tester.h",
7396 ] + MICROKERNEL_TEST_HDRS,
7397 deps = MICROKERNEL_TEST_DEPS,
7398)
7399
7400xnnpack_unit_test(
7401 name = "x32_zip_test",
7402 srcs = [
7403 "test/x32-zip.cc",
7404 "test/zip-microkernel-tester.h",
7405 ] + MICROKERNEL_TEST_HDRS,
7406 deps = MICROKERNEL_TEST_DEPS,
7407)
7408
7409xnnpack_unit_test(
7410 name = "x8_lut_test",
7411 srcs = [
7412 "test/x8-lut.cc",
7413 "test/lut-microkernel-tester.h",
7414 ] + MICROKERNEL_TEST_HDRS,
7415 deps = MICROKERNEL_TEST_DEPS,
7416)
7417
7418xnnpack_unit_test(
7419 name = "x8_zip_test",
7420 srcs = [
7421 "test/x8-zip.cc",
7422 "test/zip-microkernel-tester.h",
7423 ] + MICROKERNEL_TEST_HDRS,
7424 deps = MICROKERNEL_TEST_DEPS,
7425)
7426
Marat Dukhan20c3b922020-03-10 03:45:06 -07007427########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007428
7429xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007430 name = "operator_size_test",
7431 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007432 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007433)
7434
Marat Dukhan20c3b922020-03-10 03:45:06 -07007435xnnpack_binary(
7436 name = "subgraph_size_test",
7437 srcs = ["test/subgraph-size.c"],
7438 deps = [":XNNPACK"],
7439)
7440
7441########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007442
7443xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007444 name = "abs_nc_test",
7445 srcs = [
7446 "test/abs-nc.cc",
7447 "test/abs-operator-tester.h",
7448 ],
7449 deps = OPERATOR_TEST_DEPS,
7450)
7451
7452xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007453 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007454 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007455 srcs = [
7456 "test/add-nd.cc",
7457 "test/binary-elementwise-operator-tester.h",
7458 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007459 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007460)
7461
7462xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007463 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007464 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007465 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007466 "test/argmax-pooling-operator-tester.h",
7467 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007468 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007469)
7470
7471xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007472 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007473 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007474 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007475 "test/average-pooling-operator-tester.h",
7476 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007477 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007478)
7479
7480xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007481 name = "bankers_rounding_nc_test",
7482 srcs = [
7483 "test/bankers-rounding-nc.cc",
7484 "test/bankers-rounding-operator-tester.h",
7485 ],
7486 deps = OPERATOR_TEST_DEPS,
7487)
7488
7489xnnpack_unit_test(
7490 name = "ceiling_nc_test",
7491 srcs = [
7492 "test/ceiling-nc.cc",
7493 "test/ceiling-operator-tester.h",
7494 ],
7495 deps = OPERATOR_TEST_DEPS,
7496)
7497
7498xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007499 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007500 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007501 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007502 "test/channel-shuffle-operator-tester.h",
7503 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007504 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007505)
7506
7507xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007508 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007509 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007510 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007511 "test/clamp-operator-tester.h",
7512 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007513 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007514)
7515
7516xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007517 name = "constant_pad_nd_test",
7518 srcs = [
7519 "test/constant-pad-nd.cc",
7520 "test/constant-pad-operator-tester.h",
7521 ],
7522 deps = OPERATOR_TEST_DEPS,
7523)
7524
7525xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007526 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007527 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007528 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007529 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007530 "test/convolution-operator-tester.h",
7531 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007532 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007533)
7534
7535xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007536 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007537 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007538 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007539 "test/convolution-nchw.cc",
7540 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007541 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007542 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007543)
7544
7545xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007546 name = "copy_nc_test",
7547 srcs = [
7548 "test/copy-nc.cc",
7549 "test/copy-operator-tester.h",
7550 ],
7551 deps = OPERATOR_TEST_DEPS,
7552)
7553
7554xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007555 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007556 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007557 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007558 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007559 "test/deconvolution-operator-tester.h",
7560 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007561 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007562)
7563
7564xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007565 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007566 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007567 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007568 "test/depth-to-space-operator-tester.h",
7569 ] + OPERATOR_TEST_PARAMS_HDRS,
7570 deps = OPERATOR_TEST_DEPS,
7571)
7572
7573xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007574 name = "depth_to_space_nhwc_test",
7575 srcs = [
7576 "test/depth-to-space-nhwc.cc",
7577 "test/depth-to-space-operator-tester.h",
7578 ] + OPERATOR_TEST_PARAMS_HDRS,
7579 deps = OPERATOR_TEST_DEPS,
7580)
7581
7582xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007583 name = "divide_nd_test",
7584 srcs = [
7585 "test/binary-elementwise-operator-tester.h",
7586 "test/divide-nd.cc",
7587 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007588 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007589)
7590
7591xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007592 name = "elu_nc_test",
7593 srcs = [
7594 "test/elu-nc.cc",
7595 "test/elu-operator-tester.h",
7596 ],
7597 deps = OPERATOR_TEST_DEPS,
7598)
7599
7600xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007601 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007602 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007603 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007604 "test/fully-connected-operator-tester.h",
7605 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007606 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007607)
7608
7609xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007610 name = "floor_nc_test",
7611 srcs = [
7612 "test/floor-nc.cc",
7613 "test/floor-operator-tester.h",
7614 ],
7615 deps = OPERATOR_TEST_DEPS,
7616)
7617
7618xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007619 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007620 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007621 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007622 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007623 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007624 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007625)
7626
7627xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007628 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007629 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007630 "test/global-average-pooling-ncw.cc",
7631 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007632 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007633 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007634)
7635
7636xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007637 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007638 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007639 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007640 "test/hardswish-operator-tester.h",
7641 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007642 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007643)
7644
7645xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007646 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007647 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007648 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007649 "test/leaky-relu-operator-tester.h",
7650 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007651 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007652)
7653
7654xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007655 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007656 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007657 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007658 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007659 "test/max-pooling-operator-tester.h",
7660 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007661 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007662)
7663
7664xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007665 name = "maximum_nd_test",
7666 srcs = [
7667 "test/binary-elementwise-operator-tester.h",
7668 "test/maximum-nd.cc",
7669 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007670 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007671)
7672
7673xnnpack_unit_test(
7674 name = "minimum_nd_test",
7675 srcs = [
7676 "test/binary-elementwise-operator-tester.h",
7677 "test/minimum-nd.cc",
7678 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007679 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007680)
7681
7682xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007683 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007684 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007685 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007686 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007687 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007688 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007689)
7690
7691xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007692 name = "negate_nc_test",
7693 srcs = [
7694 "test/negate-nc.cc",
7695 "test/negate-operator-tester.h",
7696 ],
7697 deps = OPERATOR_TEST_DEPS,
7698)
7699
7700xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007701 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007702 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007703 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007704 "test/prelu-operator-tester.h",
7705 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007706 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007707)
7708
7709xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007710 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007711 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007712 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007713 "test/resize-bilinear-operator-tester.h",
7714 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007715 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007716)
7717
7718xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007719 name = "resize_bilinear_nchw_test",
7720 srcs = [
7721 "test/resize-bilinear-nchw.cc",
7722 "test/resize-bilinear-operator-tester.h",
7723 ] + OPERATOR_TEST_PARAMS_HDRS,
7724 deps = OPERATOR_TEST_DEPS,
7725)
7726
7727xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007728 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007729 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007730 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007731 "test/sigmoid-operator-tester.h",
7732 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007733 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007734)
7735
7736xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007737 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007738 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007739 "test/softmax-nc.cc",
7740 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007741 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007742 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007743)
7744
7745xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007746 name = "square_nc_test",
7747 srcs = [
7748 "test/square-nc.cc",
7749 "test/square-operator-tester.h",
7750 ],
7751 deps = OPERATOR_TEST_DEPS,
7752)
7753
7754xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007755 name = "square_root_nc_test",
7756 srcs = [
7757 "test/square-root-nc.cc",
7758 "test/square-root-operator-tester.h",
7759 ],
7760 deps = OPERATOR_TEST_DEPS,
7761)
7762
7763xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007764 name = "squared_difference_nd_test",
7765 srcs = [
7766 "test/binary-elementwise-operator-tester.h",
7767 "test/squared-difference-nd.cc",
7768 ],
7769 deps = OPERATOR_TEST_DEPS,
7770)
7771
7772xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007773 name = "subtract_nd_test",
7774 srcs = [
7775 "test/binary-elementwise-operator-tester.h",
7776 "test/subtract-nd.cc",
7777 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007778 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007779)
7780
7781xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007782 name = "truncation_nc_test",
7783 srcs = [
7784 "test/truncation-nc.cc",
7785 "test/truncation-operator-tester.h",
7786 ],
7787 deps = OPERATOR_TEST_DEPS,
7788)
7789
7790xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007791 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007792 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007793 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007794 "test/unpooling-operator-tester.h",
7795 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007796 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007797)
7798
Chao Mei6ddfc602020-05-13 22:29:36 -07007799############################### Misc unit tests ###############################
7800
7801xnnpack_unit_test(
7802 name = "memory_planner_test",
7803 srcs = [
7804 "test/memory-planner-test.cc",
7805 ],
7806 deps = [
7807 ":XNNPACK",
7808 ":memory_planner",
7809 ],
7810)
7811
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07007812xnnpack_unit_test(
7813 name = "subgraph_nchw_test",
7814 srcs = [
7815 "src/xnnpack/subgraph.h",
7816 "test/subgraph-nchw.cc",
7817 "test/subgraph-tester.h",
7818 ],
7819 deps = [
7820 ":XNNPACK",
7821 ],
7822)
7823
Marat Dukhan08c4a432019-10-03 09:29:21 -07007824############################# Build configurations #############################
7825
Marat Dukhanb8642352019-10-30 15:43:02 -07007826# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07007827config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007828 name = "xnn_enable_assembly_explicit_true",
7829 define_values = {"xnn_enable_assembly": "true"},
7830)
7831
7832# Disables usage of assembly kernels.
7833config_setting(
7834 name = "xnn_enable_assembly_explicit_false",
7835 define_values = {"xnn_enable_assembly": "false"},
7836)
7837
Marat Dukhan9de90e02020-06-18 16:04:12 -07007838# Enables usage of sparse inference.
7839config_setting(
7840 name = "xnn_enable_sparse_explicit_true",
7841 define_values = {"xnn_enable_sparse": "true"},
7842)
7843
7844# Disables usage of sparse inference.
7845config_setting(
7846 name = "xnn_enable_sparse_explicit_false",
7847 define_values = {"xnn_enable_sparse": "false"},
7848)
7849
Marat Dukhan05702cf2020-03-26 15:41:33 -07007850# Disables usage of HMP-aware optimizations.
7851config_setting(
7852 name = "xnn_enable_hmp_explicit_false",
7853 define_values = {"xnn_enable_hmp": "false"},
7854)
7855
Chao Mei6ddfc602020-05-13 22:29:36 -07007856# Enable usage of optimized memory allocation
7857config_setting(
7858 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07007859 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007860)
7861
7862# Disable usage of optimized memory allocation
7863config_setting(
7864 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07007865 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007866)
7867
Marat Dukhanb939cdb2021-03-30 18:51:51 -07007868# Enable QS8 inference in TFLite-specific version
7869config_setting(
7870 name = "xnn_enable_qs8_explicit_true",
7871 define_values = {"xnn_enable_qs8": "true"},
7872)
7873
7874# Disable QS8 inference in TFLite-specific version
7875config_setting(
7876 name = "xnn_enable_qs8_explicit_false",
7877 define_values = {"xnn_enable_qs8": "false"},
7878)
7879
Marat Dukhanb8642352019-10-30 15:43:02 -07007880# Builds with -c dbg
7881config_setting(
7882 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007883 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07007884 "compilation_mode": "dbg",
7885 },
7886)
7887
7888# Builds with -c opt
7889config_setting(
7890 name = "optimized_build",
7891 values = {
7892 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007893 },
7894)
7895
7896config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007897 name = "linux_k8",
7898 values = {"cpu": "k8"},
7899)
7900
7901config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007902 name = "linux_arm",
7903 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07007904)
7905
7906config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07007907 name = "linux_armeabi",
7908 values = {"cpu": "armeabi"},
7909)
7910
7911config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07007912 name = "linux_armhf",
7913 values = {"cpu": "armhf"},
7914)
7915
7916config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07007917 name = "linux_armv7a",
7918 values = {"cpu": "armv7a"},
7919)
7920
7921config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07007922 name = "linux_aarch64",
7923 values = {"cpu": "aarch64"},
7924)
7925
7926config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007927 name = "android",
7928 values = {"crosstool_top": "//external:android/crosstool"},
7929)
7930
7931config_setting(
7932 name = "android_armv7",
7933 values = {
7934 "crosstool_top": "//external:android/crosstool",
7935 "cpu": "armeabi-v7a",
7936 },
7937)
7938
7939config_setting(
7940 name = "android_arm64",
7941 values = {
7942 "crosstool_top": "//external:android/crosstool",
7943 "cpu": "arm64-v8a",
7944 },
7945)
7946
7947config_setting(
7948 name = "android_x86",
7949 values = {
7950 "crosstool_top": "//external:android/crosstool",
7951 "cpu": "x86",
7952 },
7953)
7954
7955config_setting(
7956 name = "android_x86_64",
7957 values = {
7958 "crosstool_top": "//external:android/crosstool",
7959 "cpu": "x86_64",
7960 },
7961)
7962
7963config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007964 name = "windows_x86_64",
7965 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007966)
7967
7968config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07007969 name = "windows_x86_64_clang",
7970 values = {
7971 "compiler": "clang-cl",
7972 "cpu": "x64_windows",
7973 },
7974)
7975
7976config_setting(
7977 name = "windows_x86_64_mingw",
7978 values = {
7979 "compiler": "mingw-gcc",
7980 "cpu": "x64_windows",
7981 },
7982)
7983
7984config_setting(
7985 name = "windows_x86_64_msys",
7986 values = {
7987 "compiler": "msys-gcc",
7988 "cpu": "x64_windows",
7989 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07007990)
7991
7992config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07007993 name = "macos_x86_64",
7994 values = {
7995 "apple_platform_type": "macos",
7996 "cpu": "darwin",
7997 },
7998)
7999
8000config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008001 name = "macos_arm64",
8002 values = {
8003 "apple_platform_type": "macos",
8004 "cpu": "darwin_arm64",
8005 },
8006)
8007
8008config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008009 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008010 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008011)
8012
8013config_setting(
8014 name = "emscripten_wasm",
8015 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008016 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008017 "cpu": "wasm",
8018 },
8019)
8020
8021config_setting(
8022 name = "emscripten_wasmsimd",
8023 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008024 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008025 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008026 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008027 },
8028)
8029
8030config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008031 name = "ios_armv7",
8032 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008033 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008034 "cpu": "ios_armv7",
8035 },
8036)
8037
8038config_setting(
8039 name = "ios_arm64",
8040 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008041 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008042 "cpu": "ios_arm64",
8043 },
8044)
8045
8046config_setting(
8047 name = "ios_arm64e",
8048 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008049 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008050 "cpu": "ios_arm64e",
8051 },
8052)
8053
8054config_setting(
8055 name = "ios_x86",
8056 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008057 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008058 "cpu": "ios_i386",
8059 },
8060)
8061
8062config_setting(
8063 name = "ios_x86_64",
8064 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008065 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008066 "cpu": "ios_x86_64",
8067 },
8068)
8069
8070config_setting(
8071 name = "watchos_armv7k",
8072 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008073 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008074 "cpu": "watchos_armv7k",
8075 },
8076)
8077
8078config_setting(
8079 name = "watchos_arm64_32",
8080 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008081 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008082 "cpu": "watchos_arm64_32",
8083 },
8084)
8085
8086config_setting(
8087 name = "watchos_x86",
8088 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008089 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008090 "cpu": "watchos_i386",
8091 },
8092)
8093
8094config_setting(
8095 name = "watchos_x86_64",
8096 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008097 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008098 "cpu": "watchos_x86_64",
8099 },
8100)
8101
8102config_setting(
8103 name = "tvos_arm64",
8104 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008105 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008106 "cpu": "tvos_arm64",
8107 },
8108)
8109
8110config_setting(
8111 name = "tvos_x86_64",
8112 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008113 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008114 "cpu": "tvos_x86_64",
8115 },
8116)