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gerrit-public.fairphone.software / toolchain / llvm-project / d85cae3d52a36cbed6443abebe1d6ed77fc03cad / . / llvm / lib / Target / X86 / X86InstrFragmentsSIMD.td
blob: 89447b6d3081da93a6df399a737838b3d2b3a8da [file] [log] [blame]
Jia Liue1d61962012-02-19 02:03:36 +0000[diff] [blame]1//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +0000[diff] [blame]7//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]8//===----------------------------------------------------------------------===//
9//
10// This file provides pattern fragments useful for SIMD instructions.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]15// MMX specific DAG Nodes.
16//===----------------------------------------------------------------------===//
17
18// Low word of MMX to GPR.
19def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,
20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
Bruno Cardoso Lopesab9ae872015-02-05 13:23:07 +0000[diff] [blame]21// GPR to low word of MMX.
22def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1,
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]24
25//===----------------------------------------------------------------------===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]26// MMX Pattern Fragments
27//===----------------------------------------------------------------------===//
28
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]29def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>;
Bruno Cardoso Lopes9e1c4c12015-02-23 15:23:14 +0000[diff] [blame]30def load_mvmmx : PatFrag<(ops node:$ptr),
31 (x86mmx (MMX_X86movw2d (load node:$ptr)))>;
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]32def bc_mmx : PatFrag<(ops node:$in), (x86mmx (bitconvert node:$in))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]33
34//===----------------------------------------------------------------------===//
35// SSE specific DAG Nodes.
36//===----------------------------------------------------------------------===//
37
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]38def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]39 SDTCisFP<1>, SDTCisVT<3, i8>,
40 SDTCisVec<1>]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]41
42def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
43def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
Nadav Rotem178250a2012-08-19 13:06:16 +0000[diff] [blame]44
45// Commutative and Associative FMIN and FMAX.
46def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,
47 [SDNPCommutative, SDNPAssociative]>;
48def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,
49 [SDNPCommutative, SDNPAssociative]>;
50
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]51def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
52 [SDNPCommutative, SDNPAssociative]>;
53def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
54 [SDNPCommutative, SDNPAssociative]>;
55def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
56 [SDNPCommutative, SDNPAssociative]>;
Benjamin Kramer5bc180c2013-08-04 12:05:16 +0000[diff] [blame]57def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp,
58 [SDNPCommutative, SDNPAssociative]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]59def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
60def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
Stuart Hastings9f208042011-06-01 04:39:42 +0000[diff] [blame]61def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>;
Duncan Sands0e4fcb82011-09-22 20:15:48 +0000[diff] [blame]62def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
63def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
Craig Topperf984efb2011-11-19 09:02:40 +0000[diff] [blame]64def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
65def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]66def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>;
67def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]68def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
69//def X86cmpsd : SDNode<"X86ISD::FSETCCsd", SDTX86Cmpsd>;
Simon Pilgrimcae7b942015-06-16 21:40:28 +0000[diff] [blame]70def X86cvtdq2pd: SDNode<"X86ISD::CVTDQ2PD",
71 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
72 SDTCisVT<1, v4i32>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]73def X86pshufb : SDNode<"X86ISD::PSHUFB",
Craig Topper78349002012-01-25 06:43:11 +0000[diff] [blame]74 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]75 SDTCisSameAs<0,2>]>>;
Chandler Carruth6ba97302015-05-30 03:20:59 +0000[diff] [blame]76def X86psadbw : SDNode<"X86ISD::PSADBW",
77 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
78 SDTCisSameAs<0,2>]>>;
Bruno Cardoso Lopes7ba479d2011-07-13 21:36:47 +0000[diff] [blame]79def X86andnp : SDNode<"X86ISD::ANDNP",
Bruno Cardoso Lopes9613b642011-07-13 21:36:51 +0000[diff] [blame]80 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]81 SDTCisSameAs<0,2>]>>;
Craig Topper81390be2011-11-19 07:33:10 +0000[diff] [blame]82def X86psign : SDNode<"X86ISD::PSIGN",
Craig Topperde6b73b2011-11-19 07:07:26 +0000[diff] [blame]83 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]84 SDTCisSameAs<0,2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]85def X86pextrb : SDNode<"X86ISD::PEXTRB",
86 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
87def X86pextrw : SDNode<"X86ISD::PEXTRW",
88 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
89def X86pinsrb : SDNode<"X86ISD::PINSRB",
90 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
91 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
92def X86pinsrw : SDNode<"X86ISD::PINSRW",
93 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
94 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
Filipe Cabecinhas20352212014-04-21 20:07:29 +0000[diff] [blame]95def X86insertps : SDNode<"X86ISD::INSERTPS",
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]96 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]97 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]98def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
99 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>;
Elena Demikhovsky8d7e56c2012-04-22 09:39:03 +0000[diff] [blame]100
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]101def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
Chris Lattner54e53292010-09-22 00:34:38 +0000[diff] [blame]102 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]103
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]104def X86vzext : SDNode<"X86ISD::VZEXT",
105 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]106 SDTCisInt<0>, SDTCisInt<1>,
107 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]108
109def X86vsext : SDNode<"X86ISD::VSEXT",
110 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]111 SDTCisInt<0>, SDTCisInt<1>,
112 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]113
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]114def X86vtrunc : SDNode<"X86ISD::VTRUNC",
115 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]116 SDTCisInt<0>, SDTCisInt<1>,
117 SDTCisOpSmallerThanOp<0, 1>]>>;
Elena Demikhovskyc5f67262013-12-17 08:33:15 +0000[diff] [blame]118def X86trunc : SDNode<"X86ISD::TRUNC",
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]119 SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>,
120 SDTCisOpSmallerThanOp<0, 1>]>>;
121
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]122def X86vtruncm : SDNode<"X86ISD::VTRUNCM",
123 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
124 SDTCisInt<0>, SDTCisInt<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]125 SDTCisVec<2>, SDTCisInt<2>,
126 SDTCisOpSmallerThanOp<0, 2>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]127def X86vfpext : SDNode<"X86ISD::VFPEXT",
128 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]129 SDTCisFP<0>, SDTCisFP<1>,
130 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liaoe999b862012-10-10 16:53:28 +0000[diff] [blame]131def X86vfpround: SDNode<"X86ISD::VFPROUND",
132 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]133 SDTCisFP<0>, SDTCisFP<1>,
134 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]135
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]136def X86vshldq : SDNode<"X86ISD::VSHLDQ", SDTIntShiftOp>;
137def X86vshrdq : SDNode<"X86ISD::VSRLDQ", SDTIntShiftOp>;
Craig Topper0b7ad762012-01-22 23:36:02 +0000[diff] [blame]138def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>;
Craig Topperbd4884372012-01-22 22:42:16 +0000[diff] [blame]139def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;
140def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]141
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]142def X86IntCmpMask : SDTypeProfile<1, 2,
143 [SDTCisVec<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>]>;
144def X86pcmpeqm : SDNode<"X86ISD::PCMPEQM", X86IntCmpMask, [SDNPCommutative]>;
145def X86pcmpgtm : SDNode<"X86ISD::PCMPGTM", X86IntCmpMask>;
146
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]147def X86CmpMaskCC :
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000[diff] [blame]148 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,
149 SDTCisVec<1>, SDTCisSameAs<2, 1>,
150 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>]>;
151def X86CmpMaskCCRound :
152 SDTypeProfile<1, 4, [SDTCisVec<0>,SDTCVecEltisVT<0, i1>,
153 SDTCisVec<1>, SDTCisSameAs<2, 1>,
154 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>,
155 SDTCisInt<4>]>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]156def X86CmpMaskCCScalar :
157 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
158
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000[diff] [blame]159def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>;
160def X86cmpmRnd : SDNode<"X86ISD::CMPM_RND", X86CmpMaskCCRound>;
161def X86cmpmu : SDNode<"X86ISD::CMPMU", X86CmpMaskCC>;
162def X86cmpms : SDNode<"X86ISD::FSETCC", X86CmpMaskCCScalar>;
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]163
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]164def X86vshl : SDNode<"X86ISD::VSHL",
165 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
166 SDTCisVec<2>]>>;
167def X86vsrl : SDNode<"X86ISD::VSRL",
168 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
169 SDTCisVec<2>]>>;
170def X86vsra : SDNode<"X86ISD::VSRA",
171 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
172 SDTCisVec<2>]>>;
173
174def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;
175def X86vsrli : SDNode<"X86ISD::VSRLI", SDTIntShiftOp>;
176def X86vsrai : SDNode<"X86ISD::VSRAI", SDTIntShiftOp>;
177
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]178def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]179 SDTCisVec<1>,
180 SDTCisSameAs<2, 1>]>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000[diff] [blame]181def X86addus : SDNode<"X86ISD::ADDUS", SDTIntBinOp>;
Benjamin Kramerb16ccde2012-12-15 16:47:44 +0000[diff] [blame]182def X86subus : SDNode<"X86ISD::SUBUS", SDTIntBinOp>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000[diff] [blame]183def X86adds : SDNode<"X86ISD::ADDS", SDTIntBinOp>;
184def X86subs : SDNode<"X86ISD::SUBS", SDTIntBinOp>;
Asaf Badouhc6f3c822015-07-06 14:03:40 +0000[diff] [blame]185def X86mulhrs : SDNode<"X86ISD::MULHRS" , SDTIntBinOp>;
Asaf Badouh81f03c32015-06-18 12:30:53 +0000[diff] [blame]186def X86avg : SDNode<"X86ISD::AVG" , SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]187def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]188def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
Elena Demikhovsky40864b62013-08-05 08:52:21 +0000[diff] [blame]189def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]190def X86testm : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]191 SDTCisVec<1>, SDTCisSameAs<2, 1>,
192 SDTCVecEltisVT<0, i1>,
193 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovskya30e4372014-02-05 07:05:03 +0000[diff] [blame]194def X86testnm : SDNode<"X86ISD::TESTNM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]195 SDTCisVec<1>, SDTCisSameAs<2, 1>,
196 SDTCVecEltisVT<0, i1>,
197 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]198def X86select : SDNode<"X86ISD::SELECT" , SDTSelect>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]199
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]200def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
201 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
202 SDTCisSameAs<1,2>]>>;
Benjamin Kramer6d2dff62014-04-26 14:12:19 +0000[diff] [blame]203def X86pmuldq : SDNode<"X86ISD::PMULDQ",
204 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
205 SDTCisSameAs<1,2>]>>;
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]206
Simon Pilgrimd85cae32015-07-06 20:46:41 +0000[diff] [blame^]207def X86extrqi : SDNode<"X86ISD::EXTRQI",
208 SDTypeProfile<1, 3, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,
209 SDTCisVT<2, i8>, SDTCisVT<3, i8>]>>;
210def X86insertqi : SDNode<"X86ISD::INSERTQI",
211 SDTypeProfile<1, 4, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,
212 SDTCisSameAs<1,2>, SDTCisVT<3, i8>,
213 SDTCisVT<4, i8>]>>;
214
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]215// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
216// translated into one of the target nodes below during lowering.
217// Note: this is a work in progress...
218def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>;
219def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
220 SDTCisSameAs<0,2>]>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]221def SDTShuff3Op : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
222 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]223
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]224def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
225 SDTCisVec<2>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]226def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>,
227 SDTCisSameAs<0,1>, SDTCisInt<2>]>;
228def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
229 SDTCisSameAs<0,2>, SDTCisInt<3>]>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]230def SDTFPBinOpImmRound: SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCisSameAs<0,1>,
231 SDTCisSameAs<0,2>, SDTCisInt<3>, SDTCisInt<4>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]232
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]233def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;
234def SDTVBroadcastm : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>]>;
235
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]236def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]237 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]238
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]239def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc.
240 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisInt<3>]>;
241
Asaf Badouh402ebb32015-06-03 13:41:48 +0000[diff] [blame]242def SDTFPUnaryOpRound : SDTypeProfile<1, 2, [ // fsqrt_round, fgetexp_round, etc.
243 SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisInt<2>]>;
244
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]245def SDTFma : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
246 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]247def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
248 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>, SDTCisInt<4>]>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]249def STDFp1SrcRm : SDTypeProfile<1, 2, [SDTCisSameAs<0,1>,
250 SDTCisVec<0>, SDTCisInt<2>]>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]251def STDFp2SrcRm : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
252 SDTCisVec<0>, SDTCisInt<3>]>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000[diff] [blame]253def STDFp3SrcRm : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
254 SDTCisVec<0>, SDTCisInt<3>, SDTCisInt<4>]>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]255
Craig Topper8fb09f02013-01-28 06:48:25 +0000[diff] [blame]256def X86PAlignr : SDNode<"X86ISD::PALIGNR", SDTShuff3OpI>;
Adam Nemet2f10cc62014-08-05 17:22:55 +0000[diff] [blame]257def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
Elena Demikhovsky5e2f8c42015-06-23 08:19:46 +0000[diff] [blame]258def X86Abs : SDNode<"X86ISD::ABS", SDTIntUnaryOp>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]259
260def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>;
261def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>;
262def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>;
263
Elena Demikhovsky9e380862015-06-03 10:56:40 +0000[diff] [blame]264def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>;
265def X86Shuf128 : SDNode<"X86ISD::SHUF128", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]266
267def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
268def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;
269def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;
270
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]271def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
272def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
273
274def X86Movlhps : SDNode<"X86ISD::MOVLHPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]275def X86Movlhpd : SDNode<"X86ISD::MOVLHPD", SDTShuff2Op>;
Bruno Cardoso Lopes03e4c352010-08-31 21:15:21 +0000[diff] [blame]276def X86Movhlps : SDNode<"X86ISD::MOVHLPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]277
Bruno Cardoso Lopesb3825212010-09-01 05:08:25 +0000[diff] [blame]278def X86Movlps : SDNode<"X86ISD::MOVLPS", SDTShuff2Op>;
279def X86Movlpd : SDNode<"X86ISD::MOVLPD", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]280
Chandler Carruth8366ceb2014-06-20 01:05:28 +0000[diff] [blame]281def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, SDTCisSameAs<2, 1>]>;
282def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
283def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>;
284
Craig Topper8d4ba192011-12-06 08:21:25 +0000[diff] [blame]285def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;
286def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]287
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]288def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>;
Chandler Carruthed5dfff2014-09-22 22:29:42 +0000[diff] [blame]289def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>;
290def X86VPermv : SDNode<"X86ISD::VPERMV", SDTShuff2Op>;
291def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;
292def X86VPermv3 : SDNode<"X86ISD::VPERMV3", SDTShuff3Op>;
Elena Demikhovskya5d38a32014-01-23 14:27:26 +0000[diff] [blame]293def X86VPermiv3 : SDNode<"X86ISD::VPERMIV3", SDTShuff3Op>;
Bruno Cardoso Lopesb878caa2011-07-21 01:55:47 +0000[diff] [blame]294
Craig Topper0a672ea2011-11-30 07:47:51 +0000[diff] [blame]295def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;
Bruno Cardoso Lopesf15dfe52011-08-12 21:48:26 +0000[diff] [blame]296
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]297def X86VFixupimm : SDNode<"X86ISD::VFIXUPIMM", SDTFPBinOpImmRound>;
Elena Demikhovsky3582eb32015-06-01 11:05:34 +0000[diff] [blame]298def X86VRange : SDNode<"X86ISD::VRANGE", SDTFPBinOpImmRound>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]299
Elena Demikhovskyad9c3962015-05-18 06:42:57 +0000[diff] [blame]300def X86SubVBroadcast : SDNode<"X86ISD::SUBV_BROADCAST",
301 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
302 SDTCisSubVecOfVec<1, 0>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]303def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>;
Elena Demikhovsky89529742013-09-12 08:55:00 +0000[diff] [blame]304def X86Vinsert : SDNode<"X86ISD::VINSERT", SDTypeProfile<1, 3,
305 [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
Elena Demikhovsky9f423d62014-02-10 07:02:39 +0000[diff] [blame]306def X86Vextract : SDNode<"X86ISD::VEXTRACT", SDTypeProfile<1, 2,
307 [SDTCisVec<1>, SDTCisPtrTy<2>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]308
Elena Demikhovskycd3c1c42012-12-05 09:24:57 +0000[diff] [blame]309def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>;
Chandler Carruth204ad4c2014-09-15 20:09:47 +0000[diff] [blame]310
311def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>;
312
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]313def X86faddRnd : SDNode<"X86ISD::FADD_RND", SDTFPBinOpRound>;
314def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>;
315def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>;
316def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;
Elena Demikhovsky0d7e9362015-05-11 06:05:05 +0000[diff] [blame]317def X86fmaxRnd : SDNode<"X86ISD::FMAX_RND", SDTFPBinOpRound>;
Asaf Badouh7ec4b7a2015-06-28 14:30:39 +0000[diff] [blame]318def X86scalef : SDNode<"X86ISD::SCALEF", SDTFPBinOpRound>;
Elena Demikhovsky0d7e9362015-05-11 06:05:05 +0000[diff] [blame]319def X86fminRnd : SDNode<"X86ISD::FMIN_RND", SDTFPBinOpRound>;
Asaf Badouh402ebb32015-06-03 13:41:48 +0000[diff] [blame]320def X86fsqrtRnd : SDNode<"X86ISD::FSQRT_RND", SDTFPUnaryOpRound>;
321def X86fgetexpRnd : SDNode<"X86ISD::FGETEXP_RND", SDTFPUnaryOpRound>;
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]322
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]323def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;
324def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
325def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFma>;
326def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFma>;
Craig Toppera999c662012-08-29 07:18:25 +0000[diff] [blame]327def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFma>;
328def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFma>;
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]329
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]330def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound>;
331def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound>;
332def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound>;
333def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound>;
334def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound>;
335def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound>;
336
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]337def X86rsqrt28 : SDNode<"X86ISD::RSQRT28", STDFp1SrcRm>;
338def X86rcp28 : SDNode<"X86ISD::RCP28", STDFp1SrcRm>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]339def X86exp2 : SDNode<"X86ISD::EXP2", STDFp1SrcRm>;
340
341def X86rsqrt28s : SDNode<"X86ISD::RSQRT28", STDFp2SrcRm>;
342def X86rcp28s : SDNode<"X86ISD::RCP28", STDFp2SrcRm>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000[diff] [blame]343def X86RndScale : SDNode<"X86ISD::RNDSCALE", STDFp3SrcRm>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]344
Craig Topperab47fe42012-08-06 06:22:36 +0000[diff] [blame]345def SDT_PCMPISTRI : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
346 SDTCisVT<2, v16i8>, SDTCisVT<3, v16i8>,
347 SDTCisVT<4, i8>]>;
348def SDT_PCMPESTRI : SDTypeProfile<2, 5, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
349 SDTCisVT<2, v16i8>, SDTCisVT<3, i32>,
350 SDTCisVT<4, v16i8>, SDTCisVT<5, i32>,
351 SDTCisVT<6, i8>]>;
352
353def X86pcmpistri : SDNode<"X86ISD::PCMPISTRI", SDT_PCMPISTRI>;
354def X86pcmpestri : SDNode<"X86ISD::PCMPESTRI", SDT_PCMPESTRI>;
355
Elena Demikhovskyba5ab322015-06-22 11:16:30 +0000[diff] [blame]356def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 1,
357 [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>;
358def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 1,
359 [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>;
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]360
Igor Bregerabe4a792015-06-14 12:44:55 +0000[diff] [blame]361def SDTintToFPRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisFP<0>,
362 SDTCisSameAs<0,1>, SDTCisInt<2>, SDTCisInt<3>]>;
363
364def X86SintToFpRnd : SDNode<"X86ISD::SINT_TO_FP_RND", SDTintToFPRound>;
365def X86SuintToFpRnd : SDNode<"X86ISD::UINT_TO_FP_RND", SDTintToFPRound>;
366
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]367//===----------------------------------------------------------------------===//
368// SSE Complex Patterns
369//===----------------------------------------------------------------------===//
370
371// These are 'extloads' from a scalar to the low element of a vector, zeroing
372// the top elements. These are used for the SSE 'ss' and 'sd' instruction
373// forms.
374def sse_load_f32 : ComplexPattern<v4f32, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]375 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
376 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]377def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]378 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
379 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]380
381def ssmem : Operand<v4f32> {
382 let PrintMethod = "printf32mem";
383 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]384 let ParserMatchClass = X86Mem32AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]385 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]386}
387def sdmem : Operand<v2f64> {
388 let PrintMethod = "printf64mem";
389 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]390 let ParserMatchClass = X86Mem64AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]391 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]392}
393
394//===----------------------------------------------------------------------===//
395// SSE pattern fragments
396//===----------------------------------------------------------------------===//
397
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]398// 128-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]399// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]400def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>;
401def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]402def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>;
403
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]404// 256-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]405// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]406def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>;
407def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]408def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>;
409
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]410// 512-bit load pattern fragments
411def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>;
412def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>;
Robert Khasanov7ca7df02014-08-04 14:35:15 +0000[diff] [blame]413def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>;
414def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>;
Elena Demikhovsky1f3ed412013-10-22 09:19:28 +0000[diff] [blame]415def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]416def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>;
417
418// 128-/256-/512-bit extload pattern fragments
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]419def extloadv2f32 : PatFrag<(ops node:$ptr), (v2f64 (extloadvf32 node:$ptr))>;
420def extloadv4f32 : PatFrag<(ops node:$ptr), (v4f64 (extloadvf32 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]421def extloadv8f32 : PatFrag<(ops node:$ptr), (v8f64 (extloadvf32 node:$ptr))>;
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]422
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]423// These are needed to match a scalar load that is used in a vector-only
424// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
425// The memory operand is required to be a 128-bit load, so it must be converted
426// from a vector to a scalar.
427def loadf32_128 : PatFrag<(ops node:$ptr),
428 (f32 (vector_extract (loadv4f32 node:$ptr), (iPTR 0)))>;
429def loadf64_128 : PatFrag<(ops node:$ptr),
430 (f64 (vector_extract (loadv2f64 node:$ptr), (iPTR 0)))>;
431
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]432// Like 'store', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]433def alignedstore : PatFrag<(ops node:$val, node:$ptr),
434 (store node:$val, node:$ptr), [{
435 return cast<StoreSDNode>(N)->getAlignment() >= 16;
436}]>;
437
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]438// Like 'store', but always requires 256-bit vector alignment.
439def alignedstore256 : PatFrag<(ops node:$val, node:$ptr),
440 (store node:$val, node:$ptr), [{
441 return cast<StoreSDNode>(N)->getAlignment() >= 32;
442}]>;
443
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]444// Like 'store', but always requires 512-bit vector alignment.
445def alignedstore512 : PatFrag<(ops node:$val, node:$ptr),
446 (store node:$val, node:$ptr), [{
447 return cast<StoreSDNode>(N)->getAlignment() >= 64;
448}]>;
449
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]450// Like 'load', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]451def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
452 return cast<LoadSDNode>(N)->getAlignment() >= 16;
453}]>;
454
Chad Rosiera281afc2012-03-09 02:00:48 +0000[diff] [blame]455// Like 'X86vzload', but always requires 128-bit vector alignment.
456def alignedX86vzload : PatFrag<(ops node:$ptr), (X86vzload node:$ptr), [{
457 return cast<MemSDNode>(N)->getAlignment() >= 16;
458}]>;
459
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]460// Like 'load', but always requires 256-bit vector alignment.
461def alignedload256 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
462 return cast<LoadSDNode>(N)->getAlignment() >= 32;
463}]>;
464
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]465// Like 'load', but always requires 512-bit vector alignment.
466def alignedload512 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
467 return cast<LoadSDNode>(N)->getAlignment() >= 64;
468}]>;
469
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]470def alignedloadfsf32 : PatFrag<(ops node:$ptr),
471 (f32 (alignedload node:$ptr))>;
472def alignedloadfsf64 : PatFrag<(ops node:$ptr),
473 (f64 (alignedload node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]474
475// 128-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]476// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]477def alignedloadv4f32 : PatFrag<(ops node:$ptr),
478 (v4f32 (alignedload node:$ptr))>;
479def alignedloadv2f64 : PatFrag<(ops node:$ptr),
480 (v2f64 (alignedload node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]481def alignedloadv2i64 : PatFrag<(ops node:$ptr),
482 (v2i64 (alignedload node:$ptr))>;
483
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]484// 256-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]485// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]486def alignedloadv8f32 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]487 (v8f32 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]488def alignedloadv4f64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]489 (v4f64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]490def alignedloadv4i64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]491 (v4i64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]492
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]493// 512-bit aligned load pattern fragments
494def alignedloadv16f32 : PatFrag<(ops node:$ptr),
495 (v16f32 (alignedload512 node:$ptr))>;
Elena Demikhovsky3ce8dbb2013-08-18 13:08:57 +0000[diff] [blame]496def alignedloadv16i32 : PatFrag<(ops node:$ptr),
497 (v16i32 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]498def alignedloadv8f64 : PatFrag<(ops node:$ptr),
499 (v8f64 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]500def alignedloadv8i64 : PatFrag<(ops node:$ptr),
501 (v8i64 (alignedload512 node:$ptr))>;
502
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]503// Like 'load', but uses special alignment checks suitable for use in
504// memory operands in most SSE instructions, which are required to
505// be naturally aligned on some targets but not on others. If the subtarget
506// allows unaligned accesses, match any load, though this may require
507// setting a feature bit in the processor (on startup, for example).
508// Opteron 10h and later implement such a feature.
509def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{
Sanjay Patelffd039b2015-02-03 17:13:04 +0000[diff] [blame]510 return Subtarget->hasSSEUnalignedMem()
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]511 || cast<LoadSDNode>(N)->getAlignment() >= 16;
512}]>;
513
514def memopfsf32 : PatFrag<(ops node:$ptr), (f32 (memop node:$ptr))>;
515def memopfsf64 : PatFrag<(ops node:$ptr), (f64 (memop node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]516
517// 128-bit memop pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]518// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]519def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;
520def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]521def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]522
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]523// These are needed to match a scalar memop that is used in a vector-only
524// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
525// The memory operand is required to be a 128-bit load, so it must be converted
526// from a vector to a scalar.
527def memopfsf32_128 : PatFrag<(ops node:$ptr),
528 (f32 (vector_extract (memopv4f32 node:$ptr), (iPTR 0)))>;
529def memopfsf64_128 : PatFrag<(ops node:$ptr),
530 (f64 (vector_extract (memopv2f64 node:$ptr), (iPTR 0)))>;
531
532
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]533// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
534// 16-byte boundary.
535// FIXME: 8 byte alignment for mmx reads is not required
536def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
537 return cast<LoadSDNode>(N)->getAlignment() >= 8;
538}]>;
539
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]540def memopmmx : PatFrag<(ops node:$ptr), (x86mmx (memop64 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]541
542// MOVNT Support
543// Like 'store', but requires the non-temporal bit to be set
544def nontemporalstore : PatFrag<(ops node:$val, node:$ptr),
545 (st node:$val, node:$ptr), [{
546 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
547 return ST->isNonTemporal();
548 return false;
549}]>;
550
551def alignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]552 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]553 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
554 return ST->isNonTemporal() && !ST->isTruncatingStore() &&
555 ST->getAddressingMode() == ISD::UNINDEXED &&
556 ST->getAlignment() >= 16;
557 return false;
558}]>;
559
560def unalignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]561 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]562 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
563 return ST->isNonTemporal() &&
564 ST->getAlignment() < 16;
565 return false;
566}]>;
567
Elena Demikhovsky6a1a3572015-06-28 10:53:29 +0000[diff] [blame]568def mgatherv4i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
569 (masked_gather node:$src1, node:$src2, node:$src3) , [{
570 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
571 return (Mgt->getIndex().getValueType() == MVT::v4i32 ||
572 Mgt->getBasePtr().getValueType() == MVT::v4i32);
573 return false;
574}]>;
575
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]576def mgatherv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
577 (masked_gather node:$src1, node:$src2, node:$src3) , [{
578 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
579 return (Mgt->getIndex().getValueType() == MVT::v8i32 ||
580 Mgt->getBasePtr().getValueType() == MVT::v8i32);
581 return false;
582}]>;
583
Elena Demikhovsky6a1a3572015-06-28 10:53:29 +0000[diff] [blame]584def mgatherv2i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
585 (masked_gather node:$src1, node:$src2, node:$src3) , [{
586 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
587 return (Mgt->getIndex().getValueType() == MVT::v2i64 ||
588 Mgt->getBasePtr().getValueType() == MVT::v2i64);
589 return false;
590}]>;
591def mgatherv4i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
592 (masked_gather node:$src1, node:$src2, node:$src3) , [{
593 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
594 return (Mgt->getIndex().getValueType() == MVT::v4i64 ||
595 Mgt->getBasePtr().getValueType() == MVT::v4i64);
596 return false;
597}]>;
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]598def mgatherv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
599 (masked_gather node:$src1, node:$src2, node:$src3) , [{
600 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
601 return (Mgt->getIndex().getValueType() == MVT::v8i64 ||
602 Mgt->getBasePtr().getValueType() == MVT::v8i64);
603 return false;
604}]>;
605def mgatherv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
606 (masked_gather node:$src1, node:$src2, node:$src3) , [{
607 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
608 return (Mgt->getIndex().getValueType() == MVT::v16i32 ||
609 Mgt->getBasePtr().getValueType() == MVT::v16i32);
610 return false;
611}]>;
612
Elena Demikhovsky30bc4ca2015-06-29 12:14:24 +0000[diff] [blame]613def mscatterv2i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
614 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
615 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
616 return (Sc->getIndex().getValueType() == MVT::v2i64 ||
617 Sc->getBasePtr().getValueType() == MVT::v2i64);
618 return false;
619}]>;
620
621def mscatterv4i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
622 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
623 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
624 return (Sc->getIndex().getValueType() == MVT::v4i32 ||
625 Sc->getBasePtr().getValueType() == MVT::v4i32);
626 return false;
627}]>;
628
629def mscatterv4i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
630 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
631 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
632 return (Sc->getIndex().getValueType() == MVT::v4i64 ||
633 Sc->getBasePtr().getValueType() == MVT::v4i64);
634 return false;
635}]>;
636
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]637def mscatterv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
638 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
639 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
640 return (Sc->getIndex().getValueType() == MVT::v8i32 ||
641 Sc->getBasePtr().getValueType() == MVT::v8i32);
642 return false;
643}]>;
644
645def mscatterv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
646 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
647 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
648 return (Sc->getIndex().getValueType() == MVT::v8i64 ||
649 Sc->getBasePtr().getValueType() == MVT::v8i64);
650 return false;
651}]>;
652def mscatterv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
653 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
654 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
655 return (Sc->getIndex().getValueType() == MVT::v16i32 ||
656 Sc->getBasePtr().getValueType() == MVT::v16i32);
657 return false;
658}]>;
659
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]660// 128-bit bitconvert pattern fragments
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]661def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>;
662def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>;
663def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>;
664def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>;
665def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;
666def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;
667
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]668// 256-bit bitconvert pattern fragments
Craig Topper682b8502011-11-02 04:42:13 +0000[diff] [blame]669def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;
670def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]671def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;
Bruno Cardoso Lopes1021b4a2011-07-13 01:15:33 +0000[diff] [blame]672def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;
Elena Demikhovsky3629b4a2014-01-06 08:45:54 +0000[diff] [blame]673def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]674
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]675// 512-bit bitconvert pattern fragments
676def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>;
677def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]678def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;
679def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>;
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]680
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]681def vzmovl_v2i64 : PatFrag<(ops node:$src),
682 (bitconvert (v2i64 (X86vzmovl
683 (v2i64 (scalar_to_vector (loadi64 node:$src))))))>;
684def vzmovl_v4i32 : PatFrag<(ops node:$src),
685 (bitconvert (v4i32 (X86vzmovl
686 (v4i32 (scalar_to_vector (loadi32 node:$src))))))>;
687
688def vzload_v2i64 : PatFrag<(ops node:$src),
689 (bitconvert (v2i64 (X86vzload node:$src)))>;
690
691
692def fp32imm0 : PatLeaf<(f32 fpimm), [{
693 return N->isExactlyValue(+0.0);
694}]>;
695
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]696def I8Imm : SDNodeXForm<imm, [{
697 // Transformation function: get the low 8 bits.
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]698 return getI8Imm((uint8_t)N->getZExtValue(), SDLoc(N));
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]699}]>;
700
701def FROUND_NO_EXC : ImmLeaf<i32, [{ return Imm == 8; }]>;
Adam Nemet50b83f02014-08-14 17:13:26 +0000[diff] [blame]702def FROUND_CURRENT : ImmLeaf<i32, [{
703 return Imm == X86::STATIC_ROUNDING::CUR_DIRECTION;
704}]>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]705
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]706// BYTE_imm - Transform bit immediates into byte immediates.
707def BYTE_imm : SDNodeXForm<imm, [{
708 // Transformation function: imm >> 3
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]709 return getI32Imm(N->getZExtValue() >> 3, SDLoc(N));
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]710}]>;
711
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]712// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index
713// to VEXTRACTF128/VEXTRACTI128 imm.
714def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]715 return getI8Imm(X86::getExtractVEXTRACT128Immediate(N), SDLoc(N));
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]716}]>;
717
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]718// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to
719// VINSERTF128/VINSERTI128 imm.
720def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]721 return getI8Imm(X86::getInsertVINSERT128Immediate(N), SDLoc(N));
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]722}]>;
723
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]724// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index
725// to VEXTRACTF64x4 imm.
726def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]727 return getI8Imm(X86::getExtractVEXTRACT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]728}]>;
729
730// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to
731// VINSERTF64x4 imm.
732def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]733 return getI8Imm(X86::getInsertVINSERT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]734}]>;
735
736def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index),
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]737 (extract_subvector node:$bigvec,
738 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]739 return X86::isVEXTRACT128Index(N);
740}], EXTRACT_get_vextract128_imm>;
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]741
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]742def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]743 node:$index),
744 (insert_subvector node:$bigvec, node:$smallvec,
745 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]746 return X86::isVINSERT128Index(N);
747}], INSERT_get_vinsert128_imm>;
748
749
750def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index),
751 (extract_subvector node:$bigvec,
752 node:$index), [{
753 return X86::isVEXTRACT256Index(N);
754}], EXTRACT_get_vextract256_imm>;
755
756def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
757 node:$index),
758 (insert_subvector node:$bigvec, node:$smallvec,
759 node:$index), [{
760 return X86::isVINSERT256Index(N);
761}], INSERT_get_vinsert256_imm>;
Bruno Cardoso Lopes123dff02011-07-25 23:05:25 +0000[diff] [blame]762
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]763def masked_load_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
764 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]765 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
766 return Load->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]767 return false;
768}]>;
769
770def masked_load_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
771 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]772 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
773 return Load->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]774 return false;
775}]>;
776
777def masked_load_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
778 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]779 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
780 return Load->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]781 return false;
782}]>;
783
784def masked_load_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
785 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]786 return isa<MaskedLoadSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]787}]>;
788
789def masked_store_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
790 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]791 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
792 return Store->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]793 return false;
794}]>;
795
796def masked_store_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
797 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]798 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
799 return Store->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]800 return false;
801}]>;
802
803def masked_store_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
804 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]805 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
806 return Store->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]807 return false;
808}]>;
809
810def masked_store_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
811 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]812 return isa<MaskedStoreSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]813}]>;
814