Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand.c |
| 3 | * |
| 4 | * Overview: |
| 5 | * This is the generic MTD driver for NAND flash devices. It should be |
| 6 | * capable of working with almost all NAND chips currently available. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 7 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | * Additional technical information is available on |
maximilian attems | 8b2b403 | 2007-07-28 13:07:16 +0200 | [diff] [blame] | 9 | * http://www.linux-mtd.infradead.org/doc/nand.html |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 10 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 12 | * 2002-2006 Thomas Gleixner (tglx@linutronix.de) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 14 | * Credits: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 15 | * David Woodhouse for adding multichip support |
| 16 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
| 18 | * rework for 2K page size chips |
| 19 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 20 | * TODO: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | * Enable cached programming for 2k page size chips |
| 22 | * Check, if mtd->ecctype should be set to MTD_ECC_HW |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 23 | * if we have HW ECC support. |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 24 | * BBT table is not serialized, has to be fixed |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | * This program is free software; you can redistribute it and/or modify |
| 27 | * it under the terms of the GNU General Public License version 2 as |
| 28 | * published by the Free Software Foundation. |
| 29 | * |
| 30 | */ |
| 31 | |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 32 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 33 | |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 34 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <linux/delay.h> |
| 36 | #include <linux/errno.h> |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 37 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | #include <linux/sched.h> |
| 39 | #include <linux/slab.h> |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 40 | #include <linux/mm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #include <linux/types.h> |
| 42 | #include <linux/mtd/mtd.h> |
| 43 | #include <linux/mtd/nand.h> |
| 44 | #include <linux/mtd/nand_ecc.h> |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 45 | #include <linux/mtd/nand_bch.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | #include <linux/interrupt.h> |
| 47 | #include <linux/bitops.h> |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 48 | #include <linux/leds.h> |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 49 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | #include <linux/mtd/partitions.h> |
Brian Norris | 5844fee | 2015-01-23 00:22:27 -0800 | [diff] [blame^] | 51 | #include <linux/of_mtd.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
| 53 | /* Define default oob placement schemes for large and small page devices */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 54 | static struct nand_ecclayout nand_oob_8 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | .eccbytes = 3, |
| 56 | .eccpos = {0, 1, 2}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 57 | .oobfree = { |
| 58 | {.offset = 3, |
| 59 | .length = 2}, |
| 60 | {.offset = 6, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 61 | .length = 2} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | }; |
| 63 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 64 | static struct nand_ecclayout nand_oob_16 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | .eccbytes = 6, |
| 66 | .eccpos = {0, 1, 2, 3, 6, 7}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 67 | .oobfree = { |
| 68 | {.offset = 8, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 69 | . length = 8} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | }; |
| 71 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 72 | static struct nand_ecclayout nand_oob_64 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | .eccbytes = 24, |
| 74 | .eccpos = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 75 | 40, 41, 42, 43, 44, 45, 46, 47, |
| 76 | 48, 49, 50, 51, 52, 53, 54, 55, |
| 77 | 56, 57, 58, 59, 60, 61, 62, 63}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 78 | .oobfree = { |
| 79 | {.offset = 2, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 80 | .length = 38} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | }; |
| 82 | |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 83 | static struct nand_ecclayout nand_oob_128 = { |
| 84 | .eccbytes = 48, |
| 85 | .eccpos = { |
| 86 | 80, 81, 82, 83, 84, 85, 86, 87, |
| 87 | 88, 89, 90, 91, 92, 93, 94, 95, |
| 88 | 96, 97, 98, 99, 100, 101, 102, 103, |
| 89 | 104, 105, 106, 107, 108, 109, 110, 111, |
| 90 | 112, 113, 114, 115, 116, 117, 118, 119, |
| 91 | 120, 121, 122, 123, 124, 125, 126, 127}, |
| 92 | .oobfree = { |
| 93 | {.offset = 2, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 94 | .length = 78} } |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 95 | }; |
| 96 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 97 | static int nand_get_device(struct mtd_info *mtd, int new_state); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 99 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 100 | struct mtd_oob_ops *ops); |
| 101 | |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 102 | /* |
Joe Perches | 8e87d78 | 2008-02-03 17:22:34 +0200 | [diff] [blame] | 103 | * For devices which display every fart in the system on a separate LED. Is |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 104 | * compiled away when LED support is disabled. |
| 105 | */ |
| 106 | DEFINE_LED_TRIGGER(nand_led_trigger); |
| 107 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 108 | static int check_offs_len(struct mtd_info *mtd, |
| 109 | loff_t ofs, uint64_t len) |
| 110 | { |
| 111 | struct nand_chip *chip = mtd->priv; |
| 112 | int ret = 0; |
| 113 | |
| 114 | /* Start address must align on block boundary */ |
Dan Carpenter | daae74c | 2013-08-09 12:49:05 +0300 | [diff] [blame] | 115 | if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 116 | pr_debug("%s: unaligned address\n", __func__); |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 117 | ret = -EINVAL; |
| 118 | } |
| 119 | |
| 120 | /* Length must align on block boundary */ |
Dan Carpenter | daae74c | 2013-08-09 12:49:05 +0300 | [diff] [blame] | 121 | if (len & ((1ULL << chip->phys_erase_shift) - 1)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 122 | pr_debug("%s: length not block aligned\n", __func__); |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 123 | ret = -EINVAL; |
| 124 | } |
| 125 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 126 | return ret; |
| 127 | } |
| 128 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | /** |
| 130 | * nand_release_device - [GENERIC] release chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 131 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 132 | * |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 133 | * Release chip lock and wake up anyone waiting on the device. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 135 | static void nand_release_device(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 137 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 139 | /* Release the controller and the chip */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 140 | spin_lock(&chip->controller->lock); |
| 141 | chip->controller->active = NULL; |
| 142 | chip->state = FL_READY; |
| 143 | wake_up(&chip->controller->wq); |
| 144 | spin_unlock(&chip->controller->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | } |
| 146 | |
| 147 | /** |
| 148 | * nand_read_byte - [DEFAULT] read one byte from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 149 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 151 | * Default read function for 8bit buswidth |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 153 | static uint8_t nand_read_byte(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 155 | struct nand_chip *chip = mtd->priv; |
| 156 | return readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | } |
| 158 | |
| 159 | /** |
Masanari Iida | 064a769 | 2012-11-09 23:20:58 +0900 | [diff] [blame] | 160 | * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 161 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 163 | * Default read function for 16bit buswidth with endianness conversion. |
| 164 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 166 | static uint8_t nand_read_byte16(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 168 | struct nand_chip *chip = mtd->priv; |
| 169 | return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | } |
| 171 | |
| 172 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | * nand_read_word - [DEFAULT] read one word from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 174 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 176 | * Default read function for 16bit buswidth without endianness conversion. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | */ |
| 178 | static u16 nand_read_word(struct mtd_info *mtd) |
| 179 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 180 | struct nand_chip *chip = mtd->priv; |
| 181 | return readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | } |
| 183 | |
| 184 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | * nand_select_chip - [DEFAULT] control CE line |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 186 | * @mtd: MTD device structure |
| 187 | * @chipnr: chipnumber to select, -1 for deselect |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | * |
| 189 | * Default select function for 1 chip devices. |
| 190 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 191 | static void nand_select_chip(struct mtd_info *mtd, int chipnr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 192 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 193 | struct nand_chip *chip = mtd->priv; |
| 194 | |
| 195 | switch (chipnr) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 196 | case -1: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 197 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | break; |
| 199 | case 0: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | break; |
| 201 | |
| 202 | default: |
| 203 | BUG(); |
| 204 | } |
| 205 | } |
| 206 | |
| 207 | /** |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 208 | * nand_write_byte - [DEFAULT] write single byte to chip |
| 209 | * @mtd: MTD device structure |
| 210 | * @byte: value to write |
| 211 | * |
| 212 | * Default function to write a byte to I/O[7:0] |
| 213 | */ |
| 214 | static void nand_write_byte(struct mtd_info *mtd, uint8_t byte) |
| 215 | { |
| 216 | struct nand_chip *chip = mtd->priv; |
| 217 | |
| 218 | chip->write_buf(mtd, &byte, 1); |
| 219 | } |
| 220 | |
| 221 | /** |
| 222 | * nand_write_byte16 - [DEFAULT] write single byte to a chip with width 16 |
| 223 | * @mtd: MTD device structure |
| 224 | * @byte: value to write |
| 225 | * |
| 226 | * Default function to write a byte to I/O[7:0] on a 16-bit wide chip. |
| 227 | */ |
| 228 | static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte) |
| 229 | { |
| 230 | struct nand_chip *chip = mtd->priv; |
| 231 | uint16_t word = byte; |
| 232 | |
| 233 | /* |
| 234 | * It's not entirely clear what should happen to I/O[15:8] when writing |
| 235 | * a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads: |
| 236 | * |
| 237 | * When the host supports a 16-bit bus width, only data is |
| 238 | * transferred at the 16-bit width. All address and command line |
| 239 | * transfers shall use only the lower 8-bits of the data bus. During |
| 240 | * command transfers, the host may place any value on the upper |
| 241 | * 8-bits of the data bus. During address transfers, the host shall |
| 242 | * set the upper 8-bits of the data bus to 00h. |
| 243 | * |
| 244 | * One user of the write_byte callback is nand_onfi_set_features. The |
| 245 | * four parameters are specified to be written to I/O[7:0], but this is |
| 246 | * neither an address nor a command transfer. Let's assume a 0 on the |
| 247 | * upper I/O lines is OK. |
| 248 | */ |
| 249 | chip->write_buf(mtd, (uint8_t *)&word, 2); |
| 250 | } |
| 251 | |
| 252 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | * nand_write_buf - [DEFAULT] write buffer to chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 254 | * @mtd: MTD device structure |
| 255 | * @buf: data buffer |
| 256 | * @len: number of bytes to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 257 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 258 | * Default write function for 8bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 260 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 262 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | |
Alexander Shiyan | 7641383 | 2013-04-13 09:32:13 +0400 | [diff] [blame] | 264 | iowrite8_rep(chip->IO_ADDR_W, buf, len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | } |
| 266 | |
| 267 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 268 | * nand_read_buf - [DEFAULT] read chip data into buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 269 | * @mtd: MTD device structure |
| 270 | * @buf: buffer to store date |
| 271 | * @len: number of bytes to read |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 272 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 273 | * Default read function for 8bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 274 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 275 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 277 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | |
Alexander Shiyan | 7641383 | 2013-04-13 09:32:13 +0400 | [diff] [blame] | 279 | ioread8_rep(chip->IO_ADDR_R, buf, len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 280 | } |
| 281 | |
| 282 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | * nand_write_buf16 - [DEFAULT] write buffer to chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 284 | * @mtd: MTD device structure |
| 285 | * @buf: data buffer |
| 286 | * @len: number of bytes to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 288 | * Default write function for 16bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 290 | static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 292 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 293 | u16 *p = (u16 *) buf; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 294 | |
Alexander Shiyan | 7641383 | 2013-04-13 09:32:13 +0400 | [diff] [blame] | 295 | iowrite16_rep(chip->IO_ADDR_W, p, len >> 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 296 | } |
| 297 | |
| 298 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 299 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 300 | * @mtd: MTD device structure |
| 301 | * @buf: buffer to store date |
| 302 | * @len: number of bytes to read |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 303 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 304 | * Default read function for 16bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 306 | static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 308 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | u16 *p = (u16 *) buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | |
Alexander Shiyan | 7641383 | 2013-04-13 09:32:13 +0400 | [diff] [blame] | 311 | ioread16_rep(chip->IO_ADDR_R, p, len >> 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 312 | } |
| 313 | |
| 314 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 315 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 316 | * @mtd: MTD device structure |
| 317 | * @ofs: offset from device start |
| 318 | * @getchip: 0, if the chip is already selected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 319 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 320 | * Check, if the block is bad. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 321 | */ |
| 322 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) |
| 323 | { |
Brian Norris | cdbec05 | 2012-01-13 18:11:48 -0800 | [diff] [blame] | 324 | int page, chipnr, res = 0, i = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 325 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 326 | u16 bad; |
| 327 | |
Brian Norris | 5fb1549 | 2011-05-31 16:31:21 -0700 | [diff] [blame] | 328 | if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) |
Kevin Cernekee | b60b08b | 2010-05-04 20:58:10 -0700 | [diff] [blame] | 329 | ofs += mtd->erasesize - mtd->writesize; |
| 330 | |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 331 | page = (int)(ofs >> chip->page_shift) & chip->pagemask; |
| 332 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | if (getchip) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 334 | chipnr = (int)(ofs >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 336 | nand_get_device(mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | |
| 338 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 339 | chip->select_chip(mtd, chipnr); |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 340 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 341 | |
Brian Norris | cdbec05 | 2012-01-13 18:11:48 -0800 | [diff] [blame] | 342 | do { |
| 343 | if (chip->options & NAND_BUSWIDTH_16) { |
| 344 | chip->cmdfunc(mtd, NAND_CMD_READOOB, |
| 345 | chip->badblockpos & 0xFE, page); |
| 346 | bad = cpu_to_le16(chip->read_word(mtd)); |
| 347 | if (chip->badblockpos & 0x1) |
| 348 | bad >>= 8; |
| 349 | else |
| 350 | bad &= 0xFF; |
| 351 | } else { |
| 352 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, |
| 353 | page); |
| 354 | bad = chip->read_byte(mtd); |
| 355 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 356 | |
Brian Norris | cdbec05 | 2012-01-13 18:11:48 -0800 | [diff] [blame] | 357 | if (likely(chip->badblockbits == 8)) |
| 358 | res = bad != 0xFF; |
| 359 | else |
| 360 | res = hweight8(bad) < chip->badblockbits; |
| 361 | ofs += mtd->writesize; |
| 362 | page = (int)(ofs >> chip->page_shift) & chip->pagemask; |
| 363 | i++; |
| 364 | } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE)); |
Maxim Levitsky | e0b58d0 | 2010-02-22 20:39:38 +0200 | [diff] [blame] | 365 | |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 366 | if (getchip) { |
| 367 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | nand_release_device(mtd); |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 369 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 370 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 371 | return res; |
| 372 | } |
| 373 | |
| 374 | /** |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 375 | * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 376 | * @mtd: MTD device structure |
| 377 | * @ofs: offset from device start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 379 | * This is the default implementation, which can be overridden by a hardware |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 380 | * specific driver. It provides the details for writing a bad block marker to a |
| 381 | * block. |
| 382 | */ |
| 383 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) |
| 384 | { |
| 385 | struct nand_chip *chip = mtd->priv; |
| 386 | struct mtd_oob_ops ops; |
| 387 | uint8_t buf[2] = { 0, 0 }; |
| 388 | int ret = 0, res, i = 0; |
| 389 | |
Brian Norris | 0ec56dc | 2015-02-28 02:02:30 -0800 | [diff] [blame] | 390 | memset(&ops, 0, sizeof(ops)); |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 391 | ops.oobbuf = buf; |
| 392 | ops.ooboffs = chip->badblockpos; |
| 393 | if (chip->options & NAND_BUSWIDTH_16) { |
| 394 | ops.ooboffs &= ~0x01; |
| 395 | ops.len = ops.ooblen = 2; |
| 396 | } else { |
| 397 | ops.len = ops.ooblen = 1; |
| 398 | } |
| 399 | ops.mode = MTD_OPS_PLACE_OOB; |
| 400 | |
| 401 | /* Write to first/last page(s) if necessary */ |
| 402 | if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) |
| 403 | ofs += mtd->erasesize - mtd->writesize; |
| 404 | do { |
| 405 | res = nand_do_write_oob(mtd, ofs, &ops); |
| 406 | if (!ret) |
| 407 | ret = res; |
| 408 | |
| 409 | i++; |
| 410 | ofs += mtd->writesize; |
| 411 | } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2); |
| 412 | |
| 413 | return ret; |
| 414 | } |
| 415 | |
| 416 | /** |
| 417 | * nand_block_markbad_lowlevel - mark a block bad |
| 418 | * @mtd: MTD device structure |
| 419 | * @ofs: offset from device start |
| 420 | * |
| 421 | * This function performs the generic NAND bad block marking steps (i.e., bad |
| 422 | * block table(s) and/or marker(s)). We only allow the hardware driver to |
| 423 | * specify how to write bad block markers to OOB (chip->block_markbad). |
| 424 | * |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 425 | * We try operations in the following order: |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 426 | * (1) erase the affected block, to allow OOB marker to be written cleanly |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 427 | * (2) write bad block marker to OOB area of affected block (unless flag |
| 428 | * NAND_BBT_NO_OOB_BBM is present) |
| 429 | * (3) update the BBT |
| 430 | * Note that we retain the first error encountered in (2) or (3), finish the |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 431 | * procedures, and dump the error in the end. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 432 | */ |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 433 | static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 434 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 435 | struct nand_chip *chip = mtd->priv; |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 436 | int res, ret = 0; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 437 | |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 438 | if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) { |
Brian Norris | 0091842 | 2012-01-13 18:11:47 -0800 | [diff] [blame] | 439 | struct erase_info einfo; |
| 440 | |
| 441 | /* Attempt erase before marking OOB */ |
| 442 | memset(&einfo, 0, sizeof(einfo)); |
| 443 | einfo.mtd = mtd; |
| 444 | einfo.addr = ofs; |
Dan Carpenter | daae74c | 2013-08-09 12:49:05 +0300 | [diff] [blame] | 445 | einfo.len = 1ULL << chip->phys_erase_shift; |
Brian Norris | 0091842 | 2012-01-13 18:11:47 -0800 | [diff] [blame] | 446 | nand_erase_nand(mtd, &einfo, 0); |
Brian Norris | 0091842 | 2012-01-13 18:11:47 -0800 | [diff] [blame] | 447 | |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 448 | /* Write bad block marker to OOB */ |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 449 | nand_get_device(mtd, FL_WRITING); |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 450 | ret = chip->block_markbad(mtd, ofs); |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 451 | nand_release_device(mtd); |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 452 | } |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 453 | |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 454 | /* Mark block bad in BBT */ |
| 455 | if (chip->bbt) { |
| 456 | res = nand_markbad_bbt(mtd, ofs); |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 457 | if (!ret) |
| 458 | ret = res; |
| 459 | } |
| 460 | |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 461 | if (!ret) |
| 462 | mtd->ecc_stats.badblocks++; |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 463 | |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 464 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | } |
| 466 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 467 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | * nand_check_wp - [GENERIC] check if the chip is write protected |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 469 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 470 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 471 | * Check, if the device is write protected. The function expects, that the |
| 472 | * device is already selected. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 474 | static int nand_check_wp(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 475 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 476 | struct nand_chip *chip = mtd->priv; |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 477 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 478 | /* Broken xD cards report WP despite being writable */ |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 479 | if (chip->options & NAND_BROKEN_XD) |
| 480 | return 0; |
| 481 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | /* Check the WP bit */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 483 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
| 484 | return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | } |
| 486 | |
| 487 | /** |
Gu Zheng | c30e1f7 | 2014-09-03 17:49:10 +0800 | [diff] [blame] | 488 | * nand_block_isreserved - [GENERIC] Check if a block is marked reserved. |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 489 | * @mtd: MTD device structure |
| 490 | * @ofs: offset from device start |
Ezequiel Garcia | 8471bb7 | 2014-05-21 19:06:12 -0300 | [diff] [blame] | 491 | * |
Gu Zheng | c30e1f7 | 2014-09-03 17:49:10 +0800 | [diff] [blame] | 492 | * Check if the block is marked as reserved. |
Ezequiel Garcia | 8471bb7 | 2014-05-21 19:06:12 -0300 | [diff] [blame] | 493 | */ |
| 494 | static int nand_block_isreserved(struct mtd_info *mtd, loff_t ofs) |
| 495 | { |
| 496 | struct nand_chip *chip = mtd->priv; |
| 497 | |
| 498 | if (!chip->bbt) |
| 499 | return 0; |
| 500 | /* Return info from the table */ |
| 501 | return nand_isreserved_bbt(mtd, ofs); |
| 502 | } |
| 503 | |
| 504 | /** |
| 505 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad |
| 506 | * @mtd: MTD device structure |
| 507 | * @ofs: offset from device start |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 508 | * @getchip: 0, if the chip is already selected |
| 509 | * @allowbbt: 1, if its allowed to access the bbt area |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | * |
| 511 | * Check, if the block is bad. Either by reading the bad block table or |
| 512 | * calling of the scan function. |
| 513 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 514 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, |
| 515 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 516 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 517 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 518 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 519 | if (!chip->bbt) |
| 520 | return chip->block_bad(mtd, ofs, getchip); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 521 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | /* Return info from the table */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 523 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | } |
| 525 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 526 | /** |
| 527 | * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands. |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 528 | * @mtd: MTD device structure |
| 529 | * @timeo: Timeout |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 530 | * |
| 531 | * Helper function for nand_wait_ready used when needing to wait in interrupt |
| 532 | * context. |
| 533 | */ |
| 534 | static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo) |
| 535 | { |
| 536 | struct nand_chip *chip = mtd->priv; |
| 537 | int i; |
| 538 | |
| 539 | /* Wait for the device to get ready */ |
| 540 | for (i = 0; i < timeo; i++) { |
| 541 | if (chip->dev_ready(mtd)) |
| 542 | break; |
| 543 | touch_softlockup_watchdog(); |
| 544 | mdelay(1); |
| 545 | } |
| 546 | } |
| 547 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 548 | /* Wait for the ready pin, after a command. The timeout is caught later. */ |
David Woodhouse | 4b648b0 | 2006-09-25 17:05:24 +0100 | [diff] [blame] | 549 | void nand_wait_ready(struct mtd_info *mtd) |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 550 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 551 | struct nand_chip *chip = mtd->priv; |
Matthieu CASTET | ca6a248 | 2012-11-22 18:31:28 +0100 | [diff] [blame] | 552 | unsigned long timeo = jiffies + msecs_to_jiffies(20); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 553 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 554 | /* 400ms timeout */ |
| 555 | if (in_interrupt() || oops_in_progress) |
| 556 | return panic_nand_wait_ready(mtd, 400); |
| 557 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 558 | led_trigger_event(nand_led_trigger, LED_FULL); |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 559 | /* Wait until command is processed or timeout occurs */ |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 560 | do { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 561 | if (chip->dev_ready(mtd)) |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 562 | break; |
Ingo Molnar | 8446f1d | 2005-09-06 15:16:27 -0700 | [diff] [blame] | 563 | touch_softlockup_watchdog(); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 564 | } while (time_before(jiffies, timeo)); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 565 | led_trigger_event(nand_led_trigger, LED_OFF); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 566 | } |
David Woodhouse | 4b648b0 | 2006-09-25 17:05:24 +0100 | [diff] [blame] | 567 | EXPORT_SYMBOL_GPL(nand_wait_ready); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 568 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | /** |
Roger Quadros | 60c70d6 | 2015-02-23 17:26:39 +0200 | [diff] [blame] | 570 | * nand_wait_status_ready - [GENERIC] Wait for the ready status after commands. |
| 571 | * @mtd: MTD device structure |
| 572 | * @timeo: Timeout in ms |
| 573 | * |
| 574 | * Wait for status ready (i.e. command done) or timeout. |
| 575 | */ |
| 576 | static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo) |
| 577 | { |
| 578 | register struct nand_chip *chip = mtd->priv; |
| 579 | |
| 580 | timeo = jiffies + msecs_to_jiffies(timeo); |
| 581 | do { |
| 582 | if ((chip->read_byte(mtd) & NAND_STATUS_READY)) |
| 583 | break; |
| 584 | touch_softlockup_watchdog(); |
| 585 | } while (time_before(jiffies, timeo)); |
| 586 | }; |
| 587 | |
| 588 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | * nand_command - [DEFAULT] Send command to NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 590 | * @mtd: MTD device structure |
| 591 | * @command: the command to be sent |
| 592 | * @column: the column address for this command, -1 if none |
| 593 | * @page_addr: the page address for this command, -1 if none |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 595 | * Send command to NAND device. This function is used for small page devices |
Artem Bityutskiy | 51148f1 | 2013-03-05 15:00:51 +0200 | [diff] [blame] | 596 | * (512 Bytes per page). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 598 | static void nand_command(struct mtd_info *mtd, unsigned int command, |
| 599 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 600 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 601 | register struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 602 | int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 603 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 604 | /* Write out the command to the device */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 605 | if (command == NAND_CMD_SEQIN) { |
| 606 | int readcmd; |
| 607 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 608 | if (column >= mtd->writesize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 610 | column -= mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | readcmd = NAND_CMD_READOOB; |
| 612 | } else if (column < 256) { |
| 613 | /* First 256 bytes --> READ0 */ |
| 614 | readcmd = NAND_CMD_READ0; |
| 615 | } else { |
| 616 | column -= 256; |
| 617 | readcmd = NAND_CMD_READ1; |
| 618 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 619 | chip->cmd_ctrl(mtd, readcmd, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 620 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 621 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 622 | chip->cmd_ctrl(mtd, command, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 624 | /* Address cycle, when necessary */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 625 | ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE; |
| 626 | /* Serially input address */ |
| 627 | if (column != -1) { |
| 628 | /* Adjust columns for 16 bit buswidth */ |
Brian Norris | 3dad234 | 2014-01-29 14:08:12 -0800 | [diff] [blame] | 629 | if (chip->options & NAND_BUSWIDTH_16 && |
| 630 | !nand_opcode_8bits(command)) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 631 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 632 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 633 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 635 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 636 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 637 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 638 | chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 639 | /* One more address cycle for devices > 32MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 640 | if (chip->chipsize > (32 << 20)) |
| 641 | chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 642 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 643 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 644 | |
| 645 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 646 | * Program and erase have their own busy handlers status and sequential |
| 647 | * in needs no delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 648 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 649 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 650 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | case NAND_CMD_PAGEPROG: |
| 652 | case NAND_CMD_ERASE1: |
| 653 | case NAND_CMD_ERASE2: |
| 654 | case NAND_CMD_SEQIN: |
| 655 | case NAND_CMD_STATUS: |
| 656 | return; |
| 657 | |
| 658 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 659 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 660 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 661 | udelay(chip->chip_delay); |
| 662 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 663 | NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 664 | chip->cmd_ctrl(mtd, |
| 665 | NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Roger Quadros | 60c70d6 | 2015-02-23 17:26:39 +0200 | [diff] [blame] | 666 | /* EZ-NAND can take upto 250ms as per ONFi v4.0 */ |
| 667 | nand_wait_status_ready(mtd, 250); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 668 | return; |
| 669 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 670 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 671 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 672 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 673 | * If we don't have access to the busy pin, we apply the given |
| 674 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 675 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 676 | if (!chip->dev_ready) { |
| 677 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 678 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 679 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | } |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 681 | /* |
| 682 | * Apply this short delay always to ensure that we do wait tWB in |
| 683 | * any case on any machine. |
| 684 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 685 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 686 | |
| 687 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 688 | } |
| 689 | |
| 690 | /** |
| 691 | * nand_command_lp - [DEFAULT] Send command to NAND large page device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 692 | * @mtd: MTD device structure |
| 693 | * @command: the command to be sent |
| 694 | * @column: the column address for this command, -1 if none |
| 695 | * @page_addr: the page address for this command, -1 if none |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 696 | * |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 697 | * Send command to NAND device. This is the version for the new large page |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 698 | * devices. We don't have the separate regions as we have in the small page |
| 699 | * devices. We must emulate NAND_CMD_READOOB to keep the code compatible. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 700 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 701 | static void nand_command_lp(struct mtd_info *mtd, unsigned int command, |
| 702 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 703 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 704 | register struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 705 | |
| 706 | /* Emulate NAND_CMD_READOOB */ |
| 707 | if (command == NAND_CMD_READOOB) { |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 708 | column += mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 709 | command = NAND_CMD_READ0; |
| 710 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 711 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 712 | /* Command latch cycle */ |
Alexander Shiyan | fb066ad | 2013-02-28 12:02:19 +0400 | [diff] [blame] | 713 | chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 714 | |
| 715 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 716 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | |
| 718 | /* Serially input address */ |
| 719 | if (column != -1) { |
| 720 | /* Adjust columns for 16 bit buswidth */ |
Brian Norris | 3dad234 | 2014-01-29 14:08:12 -0800 | [diff] [blame] | 721 | if (chip->options & NAND_BUSWIDTH_16 && |
| 722 | !nand_opcode_8bits(command)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 724 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 725 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 726 | chip->cmd_ctrl(mtd, column >> 8, ctrl); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 727 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 728 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 729 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
| 730 | chip->cmd_ctrl(mtd, page_addr >> 8, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 731 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | /* One more address cycle for devices > 128MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 733 | if (chip->chipsize > (128 << 20)) |
| 734 | chip->cmd_ctrl(mtd, page_addr >> 16, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 735 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 736 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 737 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 738 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 739 | |
| 740 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 741 | * Program and erase have their own busy handlers status, sequential |
Gerhard Sittig | 7a442f1 | 2014-03-29 14:36:22 +0100 | [diff] [blame] | 742 | * in and status need no delay. |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 743 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 744 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 745 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 746 | case NAND_CMD_CACHEDPROG: |
| 747 | case NAND_CMD_PAGEPROG: |
| 748 | case NAND_CMD_ERASE1: |
| 749 | case NAND_CMD_ERASE2: |
| 750 | case NAND_CMD_SEQIN: |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 751 | case NAND_CMD_RNDIN: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 752 | case NAND_CMD_STATUS: |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 753 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 754 | |
| 755 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 756 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 758 | udelay(chip->chip_delay); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 759 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
| 760 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 761 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 762 | NAND_NCE | NAND_CTRL_CHANGE); |
Roger Quadros | 60c70d6 | 2015-02-23 17:26:39 +0200 | [diff] [blame] | 763 | /* EZ-NAND can take upto 250ms as per ONFi v4.0 */ |
| 764 | nand_wait_status_ready(mtd, 250); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 765 | return; |
| 766 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 767 | case NAND_CMD_RNDOUT: |
| 768 | /* No ready / busy check necessary */ |
| 769 | chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART, |
| 770 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 771 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 772 | NAND_NCE | NAND_CTRL_CHANGE); |
| 773 | return; |
| 774 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 775 | case NAND_CMD_READ0: |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 776 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, |
| 777 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 778 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 779 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 780 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 781 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 782 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 783 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 784 | * If we don't have access to the busy pin, we apply the given |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 785 | * command delay. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 786 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 787 | if (!chip->dev_ready) { |
| 788 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 789 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 790 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | } |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 792 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 793 | /* |
| 794 | * Apply this short delay always to ensure that we do wait tWB in |
| 795 | * any case on any machine. |
| 796 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 797 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 798 | |
| 799 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 800 | } |
| 801 | |
| 802 | /** |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 803 | * panic_nand_get_device - [GENERIC] Get chip for selected access |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 804 | * @chip: the nand chip descriptor |
| 805 | * @mtd: MTD device structure |
| 806 | * @new_state: the state which is requested |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 807 | * |
| 808 | * Used when in panic, no locks are taken. |
| 809 | */ |
| 810 | static void panic_nand_get_device(struct nand_chip *chip, |
| 811 | struct mtd_info *mtd, int new_state) |
| 812 | { |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 813 | /* Hardware controller shared among independent devices */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 814 | chip->controller->active = chip; |
| 815 | chip->state = new_state; |
| 816 | } |
| 817 | |
| 818 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | * nand_get_device - [GENERIC] Get chip for selected access |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 820 | * @mtd: MTD device structure |
| 821 | * @new_state: the state which is requested |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 822 | * |
| 823 | * Get the device and lock it for exclusive access |
| 824 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 825 | static int |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 826 | nand_get_device(struct mtd_info *mtd, int new_state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 827 | { |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 828 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 829 | spinlock_t *lock = &chip->controller->lock; |
| 830 | wait_queue_head_t *wq = &chip->controller->wq; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 831 | DECLARE_WAITQUEUE(wait, current); |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 832 | retry: |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 833 | spin_lock(lock); |
| 834 | |
vimal singh | b8b3ee9 | 2009-07-09 20:41:22 +0530 | [diff] [blame] | 835 | /* Hardware controller shared among independent devices */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 836 | if (!chip->controller->active) |
| 837 | chip->controller->active = chip; |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 838 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 839 | if (chip->controller->active == chip && chip->state == FL_READY) { |
| 840 | chip->state = new_state; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 841 | spin_unlock(lock); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 842 | return 0; |
| 843 | } |
| 844 | if (new_state == FL_PM_SUSPENDED) { |
Li Yang | 6b0d9a8 | 2009-11-17 14:45:49 -0800 | [diff] [blame] | 845 | if (chip->controller->active->state == FL_PM_SUSPENDED) { |
| 846 | chip->state = FL_PM_SUSPENDED; |
| 847 | spin_unlock(lock); |
| 848 | return 0; |
Li Yang | 6b0d9a8 | 2009-11-17 14:45:49 -0800 | [diff] [blame] | 849 | } |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 850 | } |
| 851 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 852 | add_wait_queue(wq, &wait); |
| 853 | spin_unlock(lock); |
| 854 | schedule(); |
| 855 | remove_wait_queue(wq, &wait); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | goto retry; |
| 857 | } |
| 858 | |
| 859 | /** |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 860 | * panic_nand_wait - [GENERIC] wait until the command is done |
| 861 | * @mtd: MTD device structure |
| 862 | * @chip: NAND chip structure |
| 863 | * @timeo: timeout |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 864 | * |
| 865 | * Wait for command done. This is a helper function for nand_wait used when |
| 866 | * we are in interrupt context. May happen when in panic and trying to write |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 867 | * an oops through mtdoops. |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 868 | */ |
| 869 | static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, |
| 870 | unsigned long timeo) |
| 871 | { |
| 872 | int i; |
| 873 | for (i = 0; i < timeo; i++) { |
| 874 | if (chip->dev_ready) { |
| 875 | if (chip->dev_ready(mtd)) |
| 876 | break; |
| 877 | } else { |
| 878 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
| 879 | break; |
| 880 | } |
| 881 | mdelay(1); |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 882 | } |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 883 | } |
| 884 | |
| 885 | /** |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 886 | * nand_wait - [DEFAULT] wait until the command is done |
| 887 | * @mtd: MTD device structure |
| 888 | * @chip: NAND chip structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 889 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 890 | * Wait for command done. This applies to erase and program only. Erase can |
| 891 | * take up to 400ms and program up to 20ms according to general NAND and |
| 892 | * SmartMedia specs. |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 893 | */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 894 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 895 | { |
| 896 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 897 | int status, state = chip->state; |
Huang Shijie | 6d2559f | 2013-01-30 10:03:56 +0800 | [diff] [blame] | 898 | unsigned long timeo = (state == FL_ERASING ? 400 : 20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 899 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 900 | led_trigger_event(nand_led_trigger, LED_FULL); |
| 901 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 902 | /* |
| 903 | * Apply this short delay always to ensure that we do wait tWB in any |
| 904 | * case on any machine. |
| 905 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 906 | ndelay(100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 907 | |
Artem Bityutskiy | 14c6578 | 2013-03-04 14:21:34 +0200 | [diff] [blame] | 908 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 909 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 910 | if (in_interrupt() || oops_in_progress) |
| 911 | panic_nand_wait(mtd, chip, timeo); |
| 912 | else { |
Huang Shijie | 6d2559f | 2013-01-30 10:03:56 +0800 | [diff] [blame] | 913 | timeo = jiffies + msecs_to_jiffies(timeo); |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 914 | while (time_before(jiffies, timeo)) { |
| 915 | if (chip->dev_ready) { |
| 916 | if (chip->dev_ready(mtd)) |
| 917 | break; |
| 918 | } else { |
| 919 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
| 920 | break; |
| 921 | } |
| 922 | cond_resched(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 923 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 924 | } |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 925 | led_trigger_event(nand_led_trigger, LED_OFF); |
| 926 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 927 | status = (int)chip->read_byte(mtd); |
Matthieu CASTET | f251b8d | 2012-11-05 15:00:44 +0100 | [diff] [blame] | 928 | /* This can happen if in case of timeout or buggy dev_ready */ |
| 929 | WARN_ON(!(status & NAND_STATUS_READY)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 930 | return status; |
| 931 | } |
| 932 | |
| 933 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 934 | * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 935 | * @mtd: mtd info |
| 936 | * @ofs: offset to start unlock from |
| 937 | * @len: length to unlock |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 938 | * @invert: when = 0, unlock the range of blocks within the lower and |
| 939 | * upper boundary address |
| 940 | * when = 1, unlock the range of blocks outside the boundaries |
| 941 | * of the lower and upper boundary address |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 942 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 943 | * Returs unlock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 944 | */ |
| 945 | static int __nand_unlock(struct mtd_info *mtd, loff_t ofs, |
| 946 | uint64_t len, int invert) |
| 947 | { |
| 948 | int ret = 0; |
| 949 | int status, page; |
| 950 | struct nand_chip *chip = mtd->priv; |
| 951 | |
| 952 | /* Submit address of first page to unlock */ |
| 953 | page = ofs >> chip->page_shift; |
| 954 | chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask); |
| 955 | |
| 956 | /* Submit address of last page to unlock */ |
| 957 | page = (ofs + len) >> chip->page_shift; |
| 958 | chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1, |
| 959 | (page | invert) & chip->pagemask); |
| 960 | |
| 961 | /* Call wait ready function */ |
| 962 | status = chip->waitfunc(mtd, chip); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 963 | /* See if device thinks it succeeded */ |
Huang Shijie | 7483096 | 2012-10-14 23:47:24 -0400 | [diff] [blame] | 964 | if (status & NAND_STATUS_FAIL) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 965 | pr_debug("%s: error status = 0x%08x\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 966 | __func__, status); |
| 967 | ret = -EIO; |
| 968 | } |
| 969 | |
| 970 | return ret; |
| 971 | } |
| 972 | |
| 973 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 974 | * nand_unlock - [REPLACEABLE] unlocks specified locked blocks |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 975 | * @mtd: mtd info |
| 976 | * @ofs: offset to start unlock from |
| 977 | * @len: length to unlock |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 978 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 979 | * Returns unlock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 980 | */ |
| 981 | int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
| 982 | { |
| 983 | int ret = 0; |
| 984 | int chipnr; |
| 985 | struct nand_chip *chip = mtd->priv; |
| 986 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 987 | pr_debug("%s: start = 0x%012llx, len = %llu\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 988 | __func__, (unsigned long long)ofs, len); |
| 989 | |
| 990 | if (check_offs_len(mtd, ofs, len)) |
Brian Norris | b1a2348 | 2015-02-28 02:02:27 -0800 | [diff] [blame] | 991 | return -EINVAL; |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 992 | |
| 993 | /* Align to last block address if size addresses end of the device */ |
| 994 | if (ofs + len == mtd->size) |
| 995 | len -= mtd->erasesize; |
| 996 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 997 | nand_get_device(mtd, FL_UNLOCKING); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 998 | |
| 999 | /* Shift to get chip number */ |
| 1000 | chipnr = ofs >> chip->chip_shift; |
| 1001 | |
| 1002 | chip->select_chip(mtd, chipnr); |
| 1003 | |
White Ding | 57d3a9a | 2014-07-24 00:10:45 +0800 | [diff] [blame] | 1004 | /* |
| 1005 | * Reset the chip. |
| 1006 | * If we want to check the WP through READ STATUS and check the bit 7 |
| 1007 | * we must reset the chip |
| 1008 | * some operation can also clear the bit 7 of status register |
| 1009 | * eg. erase/program a locked block |
| 1010 | */ |
| 1011 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
| 1012 | |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1013 | /* Check, if it is write protected */ |
| 1014 | if (nand_check_wp(mtd)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1015 | pr_debug("%s: device is write protected!\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1016 | __func__); |
| 1017 | ret = -EIO; |
| 1018 | goto out; |
| 1019 | } |
| 1020 | |
| 1021 | ret = __nand_unlock(mtd, ofs, len, 0); |
| 1022 | |
| 1023 | out: |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 1024 | chip->select_chip(mtd, -1); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1025 | nand_release_device(mtd); |
| 1026 | |
| 1027 | return ret; |
| 1028 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1029 | EXPORT_SYMBOL(nand_unlock); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1030 | |
| 1031 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 1032 | * nand_lock - [REPLACEABLE] locks all blocks present in the device |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 1033 | * @mtd: mtd info |
| 1034 | * @ofs: offset to start unlock from |
| 1035 | * @len: length to unlock |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1036 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1037 | * This feature is not supported in many NAND parts. 'Micron' NAND parts do |
| 1038 | * have this feature, but it allows only to lock all blocks, not for specified |
| 1039 | * range for block. Implementing 'lock' feature by making use of 'unlock', for |
| 1040 | * now. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1041 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1042 | * Returns lock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1043 | */ |
| 1044 | int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
| 1045 | { |
| 1046 | int ret = 0; |
| 1047 | int chipnr, status, page; |
| 1048 | struct nand_chip *chip = mtd->priv; |
| 1049 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1050 | pr_debug("%s: start = 0x%012llx, len = %llu\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1051 | __func__, (unsigned long long)ofs, len); |
| 1052 | |
| 1053 | if (check_offs_len(mtd, ofs, len)) |
Brian Norris | b1a2348 | 2015-02-28 02:02:27 -0800 | [diff] [blame] | 1054 | return -EINVAL; |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1055 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 1056 | nand_get_device(mtd, FL_LOCKING); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1057 | |
| 1058 | /* Shift to get chip number */ |
| 1059 | chipnr = ofs >> chip->chip_shift; |
| 1060 | |
| 1061 | chip->select_chip(mtd, chipnr); |
| 1062 | |
White Ding | 57d3a9a | 2014-07-24 00:10:45 +0800 | [diff] [blame] | 1063 | /* |
| 1064 | * Reset the chip. |
| 1065 | * If we want to check the WP through READ STATUS and check the bit 7 |
| 1066 | * we must reset the chip |
| 1067 | * some operation can also clear the bit 7 of status register |
| 1068 | * eg. erase/program a locked block |
| 1069 | */ |
| 1070 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
| 1071 | |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1072 | /* Check, if it is write protected */ |
| 1073 | if (nand_check_wp(mtd)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1074 | pr_debug("%s: device is write protected!\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1075 | __func__); |
| 1076 | status = MTD_ERASE_FAILED; |
| 1077 | ret = -EIO; |
| 1078 | goto out; |
| 1079 | } |
| 1080 | |
| 1081 | /* Submit address of first page to lock */ |
| 1082 | page = ofs >> chip->page_shift; |
| 1083 | chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask); |
| 1084 | |
| 1085 | /* Call wait ready function */ |
| 1086 | status = chip->waitfunc(mtd, chip); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1087 | /* See if device thinks it succeeded */ |
Huang Shijie | 7483096 | 2012-10-14 23:47:24 -0400 | [diff] [blame] | 1088 | if (status & NAND_STATUS_FAIL) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1089 | pr_debug("%s: error status = 0x%08x\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1090 | __func__, status); |
| 1091 | ret = -EIO; |
| 1092 | goto out; |
| 1093 | } |
| 1094 | |
| 1095 | ret = __nand_unlock(mtd, ofs, len, 0x1); |
| 1096 | |
| 1097 | out: |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 1098 | chip->select_chip(mtd, -1); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1099 | nand_release_device(mtd); |
| 1100 | |
| 1101 | return ret; |
| 1102 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1103 | EXPORT_SYMBOL(nand_lock); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1104 | |
| 1105 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1106 | * nand_read_page_raw - [INTERN] read raw page data without ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1107 | * @mtd: mtd info structure |
| 1108 | * @chip: nand chip info structure |
| 1109 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1110 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1111 | * @page: page number to read |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1112 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1113 | * Not for syndrome calculating ECC controllers, which use a special oob layout. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1114 | */ |
| 1115 | static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1116 | uint8_t *buf, int oob_required, int page) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1117 | { |
| 1118 | chip->read_buf(mtd, buf, mtd->writesize); |
Brian Norris | 279f08d | 2012-05-02 10:15:03 -0700 | [diff] [blame] | 1119 | if (oob_required) |
| 1120 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1121 | return 0; |
| 1122 | } |
| 1123 | |
| 1124 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1125 | * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1126 | * @mtd: mtd info structure |
| 1127 | * @chip: nand chip info structure |
| 1128 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1129 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1130 | * @page: page number to read |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1131 | * |
| 1132 | * We need a special oob layout and handling even when OOB isn't used. |
| 1133 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1134 | static int nand_read_page_raw_syndrome(struct mtd_info *mtd, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1135 | struct nand_chip *chip, uint8_t *buf, |
| 1136 | int oob_required, int page) |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1137 | { |
| 1138 | int eccsize = chip->ecc.size; |
| 1139 | int eccbytes = chip->ecc.bytes; |
| 1140 | uint8_t *oob = chip->oob_poi; |
| 1141 | int steps, size; |
| 1142 | |
| 1143 | for (steps = chip->ecc.steps; steps > 0; steps--) { |
| 1144 | chip->read_buf(mtd, buf, eccsize); |
| 1145 | buf += eccsize; |
| 1146 | |
| 1147 | if (chip->ecc.prepad) { |
| 1148 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 1149 | oob += chip->ecc.prepad; |
| 1150 | } |
| 1151 | |
| 1152 | chip->read_buf(mtd, oob, eccbytes); |
| 1153 | oob += eccbytes; |
| 1154 | |
| 1155 | if (chip->ecc.postpad) { |
| 1156 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 1157 | oob += chip->ecc.postpad; |
| 1158 | } |
| 1159 | } |
| 1160 | |
| 1161 | size = mtd->oobsize - (oob - chip->oob_poi); |
| 1162 | if (size) |
| 1163 | chip->read_buf(mtd, oob, size); |
| 1164 | |
| 1165 | return 0; |
| 1166 | } |
| 1167 | |
| 1168 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1169 | * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1170 | * @mtd: mtd info structure |
| 1171 | * @chip: nand chip info structure |
| 1172 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1173 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1174 | * @page: page number to read |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1175 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1176 | static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1177 | uint8_t *buf, int oob_required, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1178 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1179 | int i, eccsize = chip->ecc.size; |
| 1180 | int eccbytes = chip->ecc.bytes; |
| 1181 | int eccsteps = chip->ecc.steps; |
| 1182 | uint8_t *p = buf; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1183 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 1184 | uint8_t *ecc_code = chip->buffers->ecccode; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1185 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1186 | unsigned int max_bitflips = 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1187 | |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1188 | chip->ecc.read_page_raw(mtd, chip, buf, 1, page); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1189 | |
| 1190 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 1191 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1192 | |
| 1193 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1194 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1195 | |
| 1196 | eccsteps = chip->ecc.steps; |
| 1197 | p = buf; |
| 1198 | |
| 1199 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1200 | int stat; |
| 1201 | |
| 1202 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1203 | if (stat < 0) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1204 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1205 | } else { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1206 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1207 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1208 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1209 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1210 | return max_bitflips; |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 1211 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1212 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1213 | /** |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 1214 | * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1215 | * @mtd: mtd info structure |
| 1216 | * @chip: nand chip info structure |
| 1217 | * @data_offs: offset of requested data within the page |
| 1218 | * @readlen: data length |
| 1219 | * @bufpoi: buffer to store read data |
Huang Shijie | e004deb | 2014-01-03 11:01:40 +0800 | [diff] [blame] | 1220 | * @page: page number to read |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1221 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1222 | static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, |
Huang Shijie | e004deb | 2014-01-03 11:01:40 +0800 | [diff] [blame] | 1223 | uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, |
| 1224 | int page) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1225 | { |
| 1226 | int start_step, end_step, num_steps; |
| 1227 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 1228 | uint8_t *p; |
| 1229 | int data_col_addr, i, gaps = 0; |
| 1230 | int datafrag_len, eccfrag_len, aligned_len, aligned_pos; |
| 1231 | int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; |
Ron | 4a4163c | 2014-03-16 04:01:07 +1030 | [diff] [blame] | 1232 | int index; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1233 | unsigned int max_bitflips = 0; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1234 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1235 | /* Column address within the page aligned to ECC size (256bytes) */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1236 | start_step = data_offs / chip->ecc.size; |
| 1237 | end_step = (data_offs + readlen - 1) / chip->ecc.size; |
| 1238 | num_steps = end_step - start_step + 1; |
Ron | 4a4163c | 2014-03-16 04:01:07 +1030 | [diff] [blame] | 1239 | index = start_step * chip->ecc.bytes; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1240 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1241 | /* Data size aligned to ECC ecc.size */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1242 | datafrag_len = num_steps * chip->ecc.size; |
| 1243 | eccfrag_len = num_steps * chip->ecc.bytes; |
| 1244 | |
| 1245 | data_col_addr = start_step * chip->ecc.size; |
| 1246 | /* If we read not a page aligned data */ |
| 1247 | if (data_col_addr != 0) |
| 1248 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); |
| 1249 | |
| 1250 | p = bufpoi + data_col_addr; |
| 1251 | chip->read_buf(mtd, p, datafrag_len); |
| 1252 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1253 | /* Calculate ECC */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1254 | for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) |
| 1255 | chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]); |
| 1256 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1257 | /* |
| 1258 | * The performance is faster if we position offsets according to |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1259 | * ecc.pos. Let's make sure that there are no gaps in ECC positions. |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1260 | */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1261 | for (i = 0; i < eccfrag_len - 1; i++) { |
Ron | 47570bb1 | 2014-03-16 04:01:08 +1030 | [diff] [blame] | 1262 | if (eccpos[i + index] + 1 != eccpos[i + index + 1]) { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1263 | gaps = 1; |
| 1264 | break; |
| 1265 | } |
| 1266 | } |
| 1267 | if (gaps) { |
| 1268 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1); |
| 1269 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1270 | } else { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1271 | /* |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1272 | * Send the command to read the particular ECC bytes take care |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1273 | * about buswidth alignment in read_buf. |
| 1274 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1275 | aligned_pos = eccpos[index] & ~(busw - 1); |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1276 | aligned_len = eccfrag_len; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1277 | if (eccpos[index] & (busw - 1)) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1278 | aligned_len++; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1279 | if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1)) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1280 | aligned_len++; |
| 1281 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1282 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, |
| 1283 | mtd->writesize + aligned_pos, -1); |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1284 | chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len); |
| 1285 | } |
| 1286 | |
| 1287 | for (i = 0; i < eccfrag_len; i++) |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1288 | chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]]; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1289 | |
| 1290 | p = bufpoi + data_col_addr; |
| 1291 | for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { |
| 1292 | int stat; |
| 1293 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1294 | stat = chip->ecc.correct(mtd, p, |
| 1295 | &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]); |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1296 | if (stat < 0) { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1297 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1298 | } else { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1299 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1300 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1301 | } |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1302 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1303 | return max_bitflips; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1304 | } |
| 1305 | |
| 1306 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1307 | * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1308 | * @mtd: mtd info structure |
| 1309 | * @chip: nand chip info structure |
| 1310 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1311 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1312 | * @page: page number to read |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1313 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1314 | * Not for syndrome calculating ECC controllers which need a special oob layout. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1315 | */ |
| 1316 | static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1317 | uint8_t *buf, int oob_required, int page) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1318 | { |
| 1319 | int i, eccsize = chip->ecc.size; |
| 1320 | int eccbytes = chip->ecc.bytes; |
| 1321 | int eccsteps = chip->ecc.steps; |
| 1322 | uint8_t *p = buf; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1323 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 1324 | uint8_t *ecc_code = chip->buffers->ecccode; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1325 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1326 | unsigned int max_bitflips = 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1327 | |
| 1328 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1329 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1330 | chip->read_buf(mtd, p, eccsize); |
| 1331 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1332 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1333 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1334 | |
| 1335 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1336 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1337 | |
| 1338 | eccsteps = chip->ecc.steps; |
| 1339 | p = buf; |
| 1340 | |
| 1341 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1342 | int stat; |
| 1343 | |
| 1344 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1345 | if (stat < 0) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1346 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1347 | } else { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1348 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1349 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1350 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1351 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1352 | return max_bitflips; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1353 | } |
| 1354 | |
| 1355 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1356 | * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1357 | * @mtd: mtd info structure |
| 1358 | * @chip: nand chip info structure |
| 1359 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1360 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1361 | * @page: page number to read |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1362 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1363 | * Hardware ECC for large page chips, require OOB to be read first. For this |
| 1364 | * ECC mode, the write_page method is re-used from ECC_HW. These methods |
| 1365 | * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with |
| 1366 | * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from |
| 1367 | * the data area, by overwriting the NAND manufacturer bad block markings. |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1368 | */ |
| 1369 | static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1370 | struct nand_chip *chip, uint8_t *buf, int oob_required, int page) |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1371 | { |
| 1372 | int i, eccsize = chip->ecc.size; |
| 1373 | int eccbytes = chip->ecc.bytes; |
| 1374 | int eccsteps = chip->ecc.steps; |
| 1375 | uint8_t *p = buf; |
| 1376 | uint8_t *ecc_code = chip->buffers->ecccode; |
| 1377 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 1378 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1379 | unsigned int max_bitflips = 0; |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1380 | |
| 1381 | /* Read the OOB area first */ |
| 1382 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
| 1383 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1384 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
| 1385 | |
| 1386 | for (i = 0; i < chip->ecc.total; i++) |
| 1387 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
| 1388 | |
| 1389 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1390 | int stat; |
| 1391 | |
| 1392 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1393 | chip->read_buf(mtd, p, eccsize); |
| 1394 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1395 | |
| 1396 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1397 | if (stat < 0) { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1398 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1399 | } else { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1400 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1401 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1402 | } |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1403 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1404 | return max_bitflips; |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1405 | } |
| 1406 | |
| 1407 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1408 | * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1409 | * @mtd: mtd info structure |
| 1410 | * @chip: nand chip info structure |
| 1411 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1412 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1413 | * @page: page number to read |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1414 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1415 | * The hw generator calculates the error syndrome automatically. Therefore we |
| 1416 | * need a special oob layout and handling. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1417 | */ |
| 1418 | static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1419 | uint8_t *buf, int oob_required, int page) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1420 | { |
| 1421 | int i, eccsize = chip->ecc.size; |
| 1422 | int eccbytes = chip->ecc.bytes; |
| 1423 | int eccsteps = chip->ecc.steps; |
| 1424 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1425 | uint8_t *oob = chip->oob_poi; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1426 | unsigned int max_bitflips = 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1427 | |
| 1428 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1429 | int stat; |
| 1430 | |
| 1431 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1432 | chip->read_buf(mtd, p, eccsize); |
| 1433 | |
| 1434 | if (chip->ecc.prepad) { |
| 1435 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 1436 | oob += chip->ecc.prepad; |
| 1437 | } |
| 1438 | |
| 1439 | chip->ecc.hwctl(mtd, NAND_ECC_READSYN); |
| 1440 | chip->read_buf(mtd, oob, eccbytes); |
| 1441 | stat = chip->ecc.correct(mtd, p, oob, NULL); |
| 1442 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1443 | if (stat < 0) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1444 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1445 | } else { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1446 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1447 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1448 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1449 | |
| 1450 | oob += eccbytes; |
| 1451 | |
| 1452 | if (chip->ecc.postpad) { |
| 1453 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 1454 | oob += chip->ecc.postpad; |
| 1455 | } |
| 1456 | } |
| 1457 | |
| 1458 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 1459 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1460 | if (i) |
| 1461 | chip->read_buf(mtd, oob, i); |
| 1462 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1463 | return max_bitflips; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1464 | } |
| 1465 | |
| 1466 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1467 | * nand_transfer_oob - [INTERN] Transfer oob to client buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1468 | * @chip: nand chip structure |
| 1469 | * @oob: oob destination address |
| 1470 | * @ops: oob ops structure |
| 1471 | * @len: size of oob to transfer |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1472 | */ |
| 1473 | static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1474 | struct mtd_oob_ops *ops, size_t len) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1475 | { |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1476 | switch (ops->mode) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1477 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1478 | case MTD_OPS_PLACE_OOB: |
| 1479 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1480 | memcpy(oob, chip->oob_poi + ops->ooboffs, len); |
| 1481 | return oob + len; |
| 1482 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1483 | case MTD_OPS_AUTO_OOB: { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1484 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1485 | uint32_t boffs = 0, roffs = ops->ooboffs; |
| 1486 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1487 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1488 | for (; free->length && len; free++, len -= bytes) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1489 | /* Read request not from offset 0? */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1490 | if (unlikely(roffs)) { |
| 1491 | if (roffs >= free->length) { |
| 1492 | roffs -= free->length; |
| 1493 | continue; |
| 1494 | } |
| 1495 | boffs = free->offset + roffs; |
| 1496 | bytes = min_t(size_t, len, |
| 1497 | (free->length - roffs)); |
| 1498 | roffs = 0; |
| 1499 | } else { |
| 1500 | bytes = min_t(size_t, len, free->length); |
| 1501 | boffs = free->offset; |
| 1502 | } |
| 1503 | memcpy(oob, chip->oob_poi + boffs, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1504 | oob += bytes; |
| 1505 | } |
| 1506 | return oob; |
| 1507 | } |
| 1508 | default: |
| 1509 | BUG(); |
| 1510 | } |
| 1511 | return NULL; |
| 1512 | } |
| 1513 | |
| 1514 | /** |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1515 | * nand_setup_read_retry - [INTERN] Set the READ RETRY mode |
| 1516 | * @mtd: MTD device structure |
| 1517 | * @retry_mode: the retry mode to use |
| 1518 | * |
| 1519 | * Some vendors supply a special command to shift the Vt threshold, to be used |
| 1520 | * when there are too many bitflips in a page (i.e., ECC error). After setting |
| 1521 | * a new threshold, the host should retry reading the page. |
| 1522 | */ |
| 1523 | static int nand_setup_read_retry(struct mtd_info *mtd, int retry_mode) |
| 1524 | { |
| 1525 | struct nand_chip *chip = mtd->priv; |
| 1526 | |
| 1527 | pr_debug("setting READ RETRY mode %d\n", retry_mode); |
| 1528 | |
| 1529 | if (retry_mode >= chip->read_retries) |
| 1530 | return -EINVAL; |
| 1531 | |
| 1532 | if (!chip->setup_read_retry) |
| 1533 | return -EOPNOTSUPP; |
| 1534 | |
| 1535 | return chip->setup_read_retry(mtd, retry_mode); |
| 1536 | } |
| 1537 | |
| 1538 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1539 | * nand_do_read_ops - [INTERN] Read data with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1540 | * @mtd: MTD device structure |
| 1541 | * @from: offset to read from |
| 1542 | * @ops: oob ops structure |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1543 | * |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1544 | * Internal function. Called with chip held. |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1545 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1546 | static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, |
| 1547 | struct mtd_oob_ops *ops) |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1548 | { |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1549 | int chipnr, page, realpage, col, bytes, aligned, oob_required; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1550 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1551 | int ret = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1552 | uint32_t readlen = ops->len; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1553 | uint32_t oobreadlen = ops->ooblen; |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1554 | uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ? |
Maxim Levitsky | 9aca334 | 2010-02-22 20:39:35 +0200 | [diff] [blame] | 1555 | mtd->oobavail : mtd->oobsize; |
| 1556 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1557 | uint8_t *bufpoi, *oob, *buf; |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 1558 | int use_bufpoi; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1559 | unsigned int max_bitflips = 0; |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1560 | int retry_mode = 0; |
Brian Norris | b72f3df | 2013-12-03 11:04:14 -0800 | [diff] [blame] | 1561 | bool ecc_fail = false; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1562 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1563 | chipnr = (int)(from >> chip->chip_shift); |
| 1564 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1565 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1566 | realpage = (int)(from >> chip->page_shift); |
| 1567 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1568 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1569 | col = (int)(from & (mtd->writesize - 1)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1570 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1571 | buf = ops->datbuf; |
| 1572 | oob = ops->oobbuf; |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1573 | oob_required = oob ? 1 : 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1574 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1575 | while (1) { |
Brian Norris | b72f3df | 2013-12-03 11:04:14 -0800 | [diff] [blame] | 1576 | unsigned int ecc_failures = mtd->ecc_stats.failed; |
| 1577 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1578 | bytes = min(mtd->writesize - col, readlen); |
| 1579 | aligned = (bytes == mtd->writesize); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1580 | |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 1581 | if (!aligned) |
| 1582 | use_bufpoi = 1; |
| 1583 | else if (chip->options & NAND_USE_BOUNCE_BUFFER) |
| 1584 | use_bufpoi = !virt_addr_valid(buf); |
| 1585 | else |
| 1586 | use_bufpoi = 0; |
| 1587 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1588 | /* Is the current page in the buffer? */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1589 | if (realpage != chip->pagebuf || oob) { |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 1590 | bufpoi = use_bufpoi ? chip->buffers->databuf : buf; |
| 1591 | |
| 1592 | if (use_bufpoi && aligned) |
| 1593 | pr_debug("%s: using read bounce buffer for buf@%p\n", |
| 1594 | __func__, buf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1595 | |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1596 | read_retry: |
Brian Norris | c00a099 | 2012-05-01 17:12:54 -0700 | [diff] [blame] | 1597 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1598 | |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1599 | /* |
| 1600 | * Now read the page into the buffer. Absent an error, |
| 1601 | * the read methods return max bitflips per ecc step. |
| 1602 | */ |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1603 | if (unlikely(ops->mode == MTD_OPS_RAW)) |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1604 | ret = chip->ecc.read_page_raw(mtd, chip, bufpoi, |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1605 | oob_required, |
| 1606 | page); |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 1607 | else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) && |
| 1608 | !oob) |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1609 | ret = chip->ecc.read_subpage(mtd, chip, |
Huang Shijie | e004deb | 2014-01-03 11:01:40 +0800 | [diff] [blame] | 1610 | col, bytes, bufpoi, |
| 1611 | page); |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1612 | else |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 1613 | ret = chip->ecc.read_page(mtd, chip, bufpoi, |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1614 | oob_required, page); |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1615 | if (ret < 0) { |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 1616 | if (use_bufpoi) |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1617 | /* Invalidate page cache */ |
| 1618 | chip->pagebuf = -1; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1619 | break; |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1620 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1621 | |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1622 | max_bitflips = max_t(unsigned int, max_bitflips, ret); |
| 1623 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1624 | /* Transfer not aligned data */ |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 1625 | if (use_bufpoi) { |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 1626 | if (!NAND_HAS_SUBPAGE_READ(chip) && !oob && |
Brian Norris | b72f3df | 2013-12-03 11:04:14 -0800 | [diff] [blame] | 1627 | !(mtd->ecc_stats.failed - ecc_failures) && |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1628 | (ops->mode != MTD_OPS_RAW)) { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1629 | chip->pagebuf = realpage; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1630 | chip->pagebuf_bitflips = ret; |
| 1631 | } else { |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1632 | /* Invalidate page cache */ |
| 1633 | chip->pagebuf = -1; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1634 | } |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1635 | memcpy(buf, chip->buffers->databuf + col, bytes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1636 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1637 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1638 | if (unlikely(oob)) { |
Maxim Levitsky | b64d39d | 2010-02-22 20:39:37 +0200 | [diff] [blame] | 1639 | int toread = min(oobreadlen, max_oobsize); |
| 1640 | |
| 1641 | if (toread) { |
| 1642 | oob = nand_transfer_oob(chip, |
| 1643 | oob, ops, toread); |
| 1644 | oobreadlen -= toread; |
| 1645 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1646 | } |
Brian Norris | 5bc7c33 | 2013-03-13 09:51:31 -0700 | [diff] [blame] | 1647 | |
| 1648 | if (chip->options & NAND_NEED_READRDY) { |
| 1649 | /* Apply delay or wait for ready/busy pin */ |
| 1650 | if (!chip->dev_ready) |
| 1651 | udelay(chip->chip_delay); |
| 1652 | else |
| 1653 | nand_wait_ready(mtd); |
| 1654 | } |
Brian Norris | b72f3df | 2013-12-03 11:04:14 -0800 | [diff] [blame] | 1655 | |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1656 | if (mtd->ecc_stats.failed - ecc_failures) { |
Brian Norris | 28fa65e | 2014-02-12 16:08:28 -0800 | [diff] [blame] | 1657 | if (retry_mode + 1 < chip->read_retries) { |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1658 | retry_mode++; |
| 1659 | ret = nand_setup_read_retry(mtd, |
| 1660 | retry_mode); |
| 1661 | if (ret < 0) |
| 1662 | break; |
| 1663 | |
| 1664 | /* Reset failures; retry */ |
| 1665 | mtd->ecc_stats.failed = ecc_failures; |
| 1666 | goto read_retry; |
| 1667 | } else { |
| 1668 | /* No more retry modes; real failure */ |
| 1669 | ecc_fail = true; |
| 1670 | } |
| 1671 | } |
| 1672 | |
| 1673 | buf += bytes; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1674 | } else { |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1675 | memcpy(buf, chip->buffers->databuf + col, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1676 | buf += bytes; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1677 | max_bitflips = max_t(unsigned int, max_bitflips, |
| 1678 | chip->pagebuf_bitflips); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1679 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1680 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1681 | readlen -= bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1682 | |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1683 | /* Reset to retry mode 0 */ |
| 1684 | if (retry_mode) { |
| 1685 | ret = nand_setup_read_retry(mtd, 0); |
| 1686 | if (ret < 0) |
| 1687 | break; |
| 1688 | retry_mode = 0; |
| 1689 | } |
| 1690 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1691 | if (!readlen) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1692 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1693 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1694 | /* For subsequent reads align to page boundary */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1695 | col = 0; |
| 1696 | /* Increment page address */ |
| 1697 | realpage++; |
| 1698 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1699 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1700 | /* Check, if we cross a chip boundary */ |
| 1701 | if (!page) { |
| 1702 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1703 | chip->select_chip(mtd, -1); |
| 1704 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1705 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1706 | } |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 1707 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1708 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1709 | ops->retlen = ops->len - (size_t) readlen; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1710 | if (oob) |
| 1711 | ops->oobretlen = ops->ooblen - oobreadlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1712 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1713 | if (ret < 0) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1714 | return ret; |
| 1715 | |
Brian Norris | b72f3df | 2013-12-03 11:04:14 -0800 | [diff] [blame] | 1716 | if (ecc_fail) |
Thomas Gleixner | 9a1fcdf | 2006-05-29 14:56:39 +0200 | [diff] [blame] | 1717 | return -EBADMSG; |
| 1718 | |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1719 | return max_bitflips; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1720 | } |
| 1721 | |
| 1722 | /** |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1723 | * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1724 | * @mtd: MTD device structure |
| 1725 | * @from: offset to read from |
| 1726 | * @len: number of bytes to read |
| 1727 | * @retlen: pointer to variable to store the number of read bytes |
| 1728 | * @buf: the databuffer to put data |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1729 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1730 | * Get hold of the chip and call nand_do_read. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1731 | */ |
| 1732 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 1733 | size_t *retlen, uint8_t *buf) |
| 1734 | { |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1735 | struct mtd_oob_ops ops; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1736 | int ret; |
| 1737 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 1738 | nand_get_device(mtd, FL_READING); |
Brian Norris | 0ec56dc | 2015-02-28 02:02:30 -0800 | [diff] [blame] | 1739 | memset(&ops, 0, sizeof(ops)); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1740 | ops.len = len; |
| 1741 | ops.datbuf = buf; |
Huang Shijie | 11041ae | 2012-07-03 16:44:14 +0800 | [diff] [blame] | 1742 | ops.mode = MTD_OPS_PLACE_OOB; |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1743 | ret = nand_do_read_ops(mtd, from, &ops); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1744 | *retlen = ops.retlen; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1745 | nand_release_device(mtd); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1746 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1747 | } |
| 1748 | |
| 1749 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1750 | * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1751 | * @mtd: mtd info structure |
| 1752 | * @chip: nand chip info structure |
| 1753 | * @page: page number to read |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1754 | */ |
| 1755 | static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip, |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1756 | int page) |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1757 | { |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1758 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1759 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1760 | return 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1761 | } |
| 1762 | |
| 1763 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1764 | * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1765 | * with syndromes |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1766 | * @mtd: mtd info structure |
| 1767 | * @chip: nand chip info structure |
| 1768 | * @page: page number to read |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1769 | */ |
| 1770 | static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1771 | int page) |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1772 | { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1773 | int length = mtd->oobsize; |
| 1774 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1775 | int eccsize = chip->ecc.size; |
Baruch Siach | 2ea69d2 | 2015-01-22 15:23:05 +0200 | [diff] [blame] | 1776 | uint8_t *bufpoi = chip->oob_poi; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1777 | int i, toread, sndrnd = 0, pos; |
| 1778 | |
| 1779 | chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page); |
| 1780 | for (i = 0; i < chip->ecc.steps; i++) { |
| 1781 | if (sndrnd) { |
| 1782 | pos = eccsize + i * (eccsize + chunk); |
| 1783 | if (mtd->writesize > 512) |
| 1784 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1); |
| 1785 | else |
| 1786 | chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page); |
| 1787 | } else |
| 1788 | sndrnd = 1; |
| 1789 | toread = min_t(int, length, chunk); |
| 1790 | chip->read_buf(mtd, bufpoi, toread); |
| 1791 | bufpoi += toread; |
| 1792 | length -= toread; |
| 1793 | } |
| 1794 | if (length > 0) |
| 1795 | chip->read_buf(mtd, bufpoi, length); |
| 1796 | |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1797 | return 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1798 | } |
| 1799 | |
| 1800 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1801 | * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1802 | * @mtd: mtd info structure |
| 1803 | * @chip: nand chip info structure |
| 1804 | * @page: page number to write |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1805 | */ |
| 1806 | static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip, |
| 1807 | int page) |
| 1808 | { |
| 1809 | int status = 0; |
| 1810 | const uint8_t *buf = chip->oob_poi; |
| 1811 | int length = mtd->oobsize; |
| 1812 | |
| 1813 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); |
| 1814 | chip->write_buf(mtd, buf, length); |
| 1815 | /* Send command to program the OOB data */ |
| 1816 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1817 | |
| 1818 | status = chip->waitfunc(mtd, chip); |
| 1819 | |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1820 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1821 | } |
| 1822 | |
| 1823 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1824 | * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1825 | * with syndrome - only for large page flash |
| 1826 | * @mtd: mtd info structure |
| 1827 | * @chip: nand chip info structure |
| 1828 | * @page: page number to write |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1829 | */ |
| 1830 | static int nand_write_oob_syndrome(struct mtd_info *mtd, |
| 1831 | struct nand_chip *chip, int page) |
| 1832 | { |
| 1833 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1834 | int eccsize = chip->ecc.size, length = mtd->oobsize; |
| 1835 | int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps; |
| 1836 | const uint8_t *bufpoi = chip->oob_poi; |
| 1837 | |
| 1838 | /* |
| 1839 | * data-ecc-data-ecc ... ecc-oob |
| 1840 | * or |
| 1841 | * data-pad-ecc-pad-data-pad .... ecc-pad-oob |
| 1842 | */ |
| 1843 | if (!chip->ecc.prepad && !chip->ecc.postpad) { |
| 1844 | pos = steps * (eccsize + chunk); |
| 1845 | steps = 0; |
| 1846 | } else |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 1847 | pos = eccsize; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1848 | |
| 1849 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page); |
| 1850 | for (i = 0; i < steps; i++) { |
| 1851 | if (sndcmd) { |
| 1852 | if (mtd->writesize <= 512) { |
| 1853 | uint32_t fill = 0xFFFFFFFF; |
| 1854 | |
| 1855 | len = eccsize; |
| 1856 | while (len > 0) { |
| 1857 | int num = min_t(int, len, 4); |
| 1858 | chip->write_buf(mtd, (uint8_t *)&fill, |
| 1859 | num); |
| 1860 | len -= num; |
| 1861 | } |
| 1862 | } else { |
| 1863 | pos = eccsize + i * (eccsize + chunk); |
| 1864 | chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1); |
| 1865 | } |
| 1866 | } else |
| 1867 | sndcmd = 1; |
| 1868 | len = min_t(int, length, chunk); |
| 1869 | chip->write_buf(mtd, bufpoi, len); |
| 1870 | bufpoi += len; |
| 1871 | length -= len; |
| 1872 | } |
| 1873 | if (length > 0) |
| 1874 | chip->write_buf(mtd, bufpoi, length); |
| 1875 | |
| 1876 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1877 | status = chip->waitfunc(mtd, chip); |
| 1878 | |
| 1879 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
| 1880 | } |
| 1881 | |
| 1882 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1883 | * nand_do_read_oob - [INTERN] NAND read out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1884 | * @mtd: MTD device structure |
| 1885 | * @from: offset to read from |
| 1886 | * @ops: oob operations description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1887 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1888 | * NAND read out-of-band data from the spare area. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1889 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1890 | static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, |
| 1891 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1892 | { |
Brian Norris | c00a099 | 2012-05-01 17:12:54 -0700 | [diff] [blame] | 1893 | int page, realpage, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1894 | struct nand_chip *chip = mtd->priv; |
Brian Norris | 041e457 | 2011-06-23 16:45:24 -0700 | [diff] [blame] | 1895 | struct mtd_ecc_stats stats; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1896 | int readlen = ops->ooblen; |
| 1897 | int len; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1898 | uint8_t *buf = ops->oobbuf; |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 1899 | int ret = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1900 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1901 | pr_debug("%s: from = 0x%08Lx, len = %i\n", |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 1902 | __func__, (unsigned long long)from, readlen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1903 | |
Brian Norris | 041e457 | 2011-06-23 16:45:24 -0700 | [diff] [blame] | 1904 | stats = mtd->ecc_stats; |
| 1905 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1906 | if (ops->mode == MTD_OPS_AUTO_OOB) |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1907 | len = chip->ecc.layout->oobavail; |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1908 | else |
| 1909 | len = mtd->oobsize; |
| 1910 | |
| 1911 | if (unlikely(ops->ooboffs >= len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1912 | pr_debug("%s: attempt to start read outside oob\n", |
| 1913 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1914 | return -EINVAL; |
| 1915 | } |
| 1916 | |
| 1917 | /* Do not allow reads past end of device */ |
| 1918 | if (unlikely(from >= mtd->size || |
| 1919 | ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) - |
| 1920 | (from >> chip->page_shift)) * len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1921 | pr_debug("%s: attempt to read beyond end of device\n", |
| 1922 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 1923 | return -EINVAL; |
| 1924 | } |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1925 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1926 | chipnr = (int)(from >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1927 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1928 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1929 | /* Shift to get page */ |
| 1930 | realpage = (int)(from >> chip->page_shift); |
| 1931 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1932 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1933 | while (1) { |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1934 | if (ops->mode == MTD_OPS_RAW) |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 1935 | ret = chip->ecc.read_oob_raw(mtd, chip, page); |
Brian Norris | c46f648 | 2011-08-30 18:45:38 -0700 | [diff] [blame] | 1936 | else |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 1937 | ret = chip->ecc.read_oob(mtd, chip, page); |
| 1938 | |
| 1939 | if (ret < 0) |
| 1940 | break; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1941 | |
| 1942 | len = min(len, readlen); |
| 1943 | buf = nand_transfer_oob(chip, buf, ops, len); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1944 | |
Brian Norris | 5bc7c33 | 2013-03-13 09:51:31 -0700 | [diff] [blame] | 1945 | if (chip->options & NAND_NEED_READRDY) { |
| 1946 | /* Apply delay or wait for ready/busy pin */ |
| 1947 | if (!chip->dev_ready) |
| 1948 | udelay(chip->chip_delay); |
| 1949 | else |
| 1950 | nand_wait_ready(mtd); |
| 1951 | } |
| 1952 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1953 | readlen -= len; |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1954 | if (!readlen) |
| 1955 | break; |
| 1956 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1957 | /* Increment page address */ |
| 1958 | realpage++; |
| 1959 | |
| 1960 | page = realpage & chip->pagemask; |
| 1961 | /* Check, if we cross a chip boundary */ |
| 1962 | if (!page) { |
| 1963 | chipnr++; |
| 1964 | chip->select_chip(mtd, -1); |
| 1965 | chip->select_chip(mtd, chipnr); |
| 1966 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1967 | } |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 1968 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1969 | |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 1970 | ops->oobretlen = ops->ooblen - readlen; |
| 1971 | |
| 1972 | if (ret < 0) |
| 1973 | return ret; |
Brian Norris | 041e457 | 2011-06-23 16:45:24 -0700 | [diff] [blame] | 1974 | |
| 1975 | if (mtd->ecc_stats.failed - stats.failed) |
| 1976 | return -EBADMSG; |
| 1977 | |
| 1978 | return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1979 | } |
| 1980 | |
| 1981 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1982 | * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1983 | * @mtd: MTD device structure |
| 1984 | * @from: offset to read from |
| 1985 | * @ops: oob operation description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1986 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1987 | * NAND read data and/or out-of-band data. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1988 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1989 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, |
| 1990 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1991 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1992 | int ret = -ENOTSUPP; |
| 1993 | |
| 1994 | ops->retlen = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1995 | |
| 1996 | /* Do not allow reads past end of device */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1997 | if (ops->datbuf && (from + ops->len) > mtd->size) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1998 | pr_debug("%s: attempt to read beyond end of device\n", |
| 1999 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2000 | return -EINVAL; |
| 2001 | } |
| 2002 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2003 | nand_get_device(mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2004 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2005 | switch (ops->mode) { |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2006 | case MTD_OPS_PLACE_OOB: |
| 2007 | case MTD_OPS_AUTO_OOB: |
| 2008 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2009 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2010 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2011 | default: |
| 2012 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2013 | } |
| 2014 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2015 | if (!ops->datbuf) |
| 2016 | ret = nand_do_read_oob(mtd, from, ops); |
| 2017 | else |
| 2018 | ret = nand_do_read_ops(mtd, from, ops); |
| 2019 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2020 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2021 | nand_release_device(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2022 | return ret; |
| 2023 | } |
| 2024 | |
| 2025 | |
| 2026 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2027 | * nand_write_page_raw - [INTERN] raw page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2028 | * @mtd: mtd info structure |
| 2029 | * @chip: nand chip info structure |
| 2030 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2031 | * @oob_required: must write chip->oob_poi to OOB |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2032 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2033 | * Not for syndrome calculating ECC controllers, which use a special oob layout. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2034 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2035 | static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2036 | const uint8_t *buf, int oob_required) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2037 | { |
| 2038 | chip->write_buf(mtd, buf, mtd->writesize); |
Brian Norris | 279f08d | 2012-05-02 10:15:03 -0700 | [diff] [blame] | 2039 | if (oob_required) |
| 2040 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2041 | |
| 2042 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2043 | } |
| 2044 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2045 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2046 | * nand_write_page_raw_syndrome - [INTERN] raw page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2047 | * @mtd: mtd info structure |
| 2048 | * @chip: nand chip info structure |
| 2049 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2050 | * @oob_required: must write chip->oob_poi to OOB |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2051 | * |
| 2052 | * We need a special oob layout and handling even when ECC isn't checked. |
| 2053 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2054 | static int nand_write_page_raw_syndrome(struct mtd_info *mtd, |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2055 | struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2056 | const uint8_t *buf, int oob_required) |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2057 | { |
| 2058 | int eccsize = chip->ecc.size; |
| 2059 | int eccbytes = chip->ecc.bytes; |
| 2060 | uint8_t *oob = chip->oob_poi; |
| 2061 | int steps, size; |
| 2062 | |
| 2063 | for (steps = chip->ecc.steps; steps > 0; steps--) { |
| 2064 | chip->write_buf(mtd, buf, eccsize); |
| 2065 | buf += eccsize; |
| 2066 | |
| 2067 | if (chip->ecc.prepad) { |
| 2068 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 2069 | oob += chip->ecc.prepad; |
| 2070 | } |
| 2071 | |
Boris BREZILLON | 60c3bc1 | 2014-02-01 19:10:28 +0100 | [diff] [blame] | 2072 | chip->write_buf(mtd, oob, eccbytes); |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2073 | oob += eccbytes; |
| 2074 | |
| 2075 | if (chip->ecc.postpad) { |
| 2076 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 2077 | oob += chip->ecc.postpad; |
| 2078 | } |
| 2079 | } |
| 2080 | |
| 2081 | size = mtd->oobsize - (oob - chip->oob_poi); |
| 2082 | if (size) |
| 2083 | chip->write_buf(mtd, oob, size); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2084 | |
| 2085 | return 0; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2086 | } |
| 2087 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2088 | * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2089 | * @mtd: mtd info structure |
| 2090 | * @chip: nand chip info structure |
| 2091 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2092 | * @oob_required: must write chip->oob_poi to OOB |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2093 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2094 | static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2095 | const uint8_t *buf, int oob_required) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2096 | { |
| 2097 | int i, eccsize = chip->ecc.size; |
| 2098 | int eccbytes = chip->ecc.bytes; |
| 2099 | int eccsteps = chip->ecc.steps; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 2100 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2101 | const uint8_t *p = buf; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 2102 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2103 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2104 | /* Software ECC calculation */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2105 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 2106 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2107 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2108 | for (i = 0; i < chip->ecc.total; i++) |
| 2109 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2110 | |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2111 | return chip->ecc.write_page_raw(mtd, chip, buf, 1); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2112 | } |
| 2113 | |
| 2114 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2115 | * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2116 | * @mtd: mtd info structure |
| 2117 | * @chip: nand chip info structure |
| 2118 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2119 | * @oob_required: must write chip->oob_poi to OOB |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2120 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2121 | static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2122 | const uint8_t *buf, int oob_required) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2123 | { |
| 2124 | int i, eccsize = chip->ecc.size; |
| 2125 | int eccbytes = chip->ecc.bytes; |
| 2126 | int eccsteps = chip->ecc.steps; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 2127 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2128 | const uint8_t *p = buf; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 2129 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2130 | |
| 2131 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 2132 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
David Woodhouse | 29da9ce | 2006-05-26 23:05:44 +0100 | [diff] [blame] | 2133 | chip->write_buf(mtd, p, eccsize); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2134 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 2135 | } |
| 2136 | |
| 2137 | for (i = 0; i < chip->ecc.total; i++) |
| 2138 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 2139 | |
| 2140 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2141 | |
| 2142 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2143 | } |
| 2144 | |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2145 | |
| 2146 | /** |
Brian Norris | 73c8aaf | 2015-02-28 02:04:18 -0800 | [diff] [blame] | 2147 | * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2148 | * @mtd: mtd info structure |
| 2149 | * @chip: nand chip info structure |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2150 | * @offset: column address of subpage within the page |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2151 | * @data_len: data length |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2152 | * @buf: data buffer |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2153 | * @oob_required: must write chip->oob_poi to OOB |
| 2154 | */ |
| 2155 | static int nand_write_subpage_hwecc(struct mtd_info *mtd, |
| 2156 | struct nand_chip *chip, uint32_t offset, |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2157 | uint32_t data_len, const uint8_t *buf, |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2158 | int oob_required) |
| 2159 | { |
| 2160 | uint8_t *oob_buf = chip->oob_poi; |
| 2161 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 2162 | int ecc_size = chip->ecc.size; |
| 2163 | int ecc_bytes = chip->ecc.bytes; |
| 2164 | int ecc_steps = chip->ecc.steps; |
| 2165 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 2166 | uint32_t start_step = offset / ecc_size; |
| 2167 | uint32_t end_step = (offset + data_len - 1) / ecc_size; |
| 2168 | int oob_bytes = mtd->oobsize / ecc_steps; |
| 2169 | int step, i; |
| 2170 | |
| 2171 | for (step = 0; step < ecc_steps; step++) { |
| 2172 | /* configure controller for WRITE access */ |
| 2173 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 2174 | |
| 2175 | /* write data (untouched subpages already masked by 0xFF) */ |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2176 | chip->write_buf(mtd, buf, ecc_size); |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2177 | |
| 2178 | /* mask ECC of un-touched subpages by padding 0xFF */ |
| 2179 | if ((step < start_step) || (step > end_step)) |
| 2180 | memset(ecc_calc, 0xff, ecc_bytes); |
| 2181 | else |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2182 | chip->ecc.calculate(mtd, buf, ecc_calc); |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2183 | |
| 2184 | /* mask OOB of un-touched subpages by padding 0xFF */ |
| 2185 | /* if oob_required, preserve OOB metadata of written subpage */ |
| 2186 | if (!oob_required || (step < start_step) || (step > end_step)) |
| 2187 | memset(oob_buf, 0xff, oob_bytes); |
| 2188 | |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2189 | buf += ecc_size; |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2190 | ecc_calc += ecc_bytes; |
| 2191 | oob_buf += oob_bytes; |
| 2192 | } |
| 2193 | |
| 2194 | /* copy calculated ECC for whole page to chip->buffer->oob */ |
| 2195 | /* this include masked-value(0xFF) for unwritten subpages */ |
| 2196 | ecc_calc = chip->buffers->ecccalc; |
| 2197 | for (i = 0; i < chip->ecc.total; i++) |
| 2198 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 2199 | |
| 2200 | /* write OOB buffer to NAND device */ |
| 2201 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 2202 | |
| 2203 | return 0; |
| 2204 | } |
| 2205 | |
| 2206 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2207 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2208 | * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2209 | * @mtd: mtd info structure |
| 2210 | * @chip: nand chip info structure |
| 2211 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2212 | * @oob_required: must write chip->oob_poi to OOB |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2213 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2214 | * The hw generator calculates the error syndrome automatically. Therefore we |
| 2215 | * need a special oob layout and handling. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2216 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2217 | static int nand_write_page_syndrome(struct mtd_info *mtd, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2218 | struct nand_chip *chip, |
| 2219 | const uint8_t *buf, int oob_required) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2220 | { |
| 2221 | int i, eccsize = chip->ecc.size; |
| 2222 | int eccbytes = chip->ecc.bytes; |
| 2223 | int eccsteps = chip->ecc.steps; |
| 2224 | const uint8_t *p = buf; |
| 2225 | uint8_t *oob = chip->oob_poi; |
| 2226 | |
| 2227 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 2228 | |
| 2229 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 2230 | chip->write_buf(mtd, p, eccsize); |
| 2231 | |
| 2232 | if (chip->ecc.prepad) { |
| 2233 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 2234 | oob += chip->ecc.prepad; |
| 2235 | } |
| 2236 | |
| 2237 | chip->ecc.calculate(mtd, p, oob); |
| 2238 | chip->write_buf(mtd, oob, eccbytes); |
| 2239 | oob += eccbytes; |
| 2240 | |
| 2241 | if (chip->ecc.postpad) { |
| 2242 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 2243 | oob += chip->ecc.postpad; |
| 2244 | } |
| 2245 | } |
| 2246 | |
| 2247 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 2248 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2249 | if (i) |
| 2250 | chip->write_buf(mtd, oob, i); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2251 | |
| 2252 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2253 | } |
| 2254 | |
| 2255 | /** |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2256 | * nand_write_page - [REPLACEABLE] write one page |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2257 | * @mtd: MTD device structure |
| 2258 | * @chip: NAND chip descriptor |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2259 | * @offset: address offset within the page |
| 2260 | * @data_len: length of actual data to be written |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2261 | * @buf: the data to write |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2262 | * @oob_required: must write chip->oob_poi to OOB |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2263 | * @page: page number to write |
| 2264 | * @cached: cached programming |
| 2265 | * @raw: use _raw version of write_page |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2266 | */ |
| 2267 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2268 | uint32_t offset, int data_len, const uint8_t *buf, |
| 2269 | int oob_required, int page, int cached, int raw) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2270 | { |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2271 | int status, subpage; |
| 2272 | |
| 2273 | if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && |
| 2274 | chip->ecc.write_subpage) |
| 2275 | subpage = offset || (data_len < mtd->writesize); |
| 2276 | else |
| 2277 | subpage = 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2278 | |
| 2279 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
| 2280 | |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2281 | if (unlikely(raw)) |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2282 | status = chip->ecc.write_page_raw(mtd, chip, buf, |
| 2283 | oob_required); |
| 2284 | else if (subpage) |
| 2285 | status = chip->ecc.write_subpage(mtd, chip, offset, data_len, |
| 2286 | buf, oob_required); |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2287 | else |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2288 | status = chip->ecc.write_page(mtd, chip, buf, oob_required); |
| 2289 | |
| 2290 | if (status < 0) |
| 2291 | return status; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2292 | |
| 2293 | /* |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2294 | * Cached progamming disabled for now. Not sure if it's worth the |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2295 | * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s). |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2296 | */ |
| 2297 | cached = 0; |
| 2298 | |
Artem Bityutskiy | 3239a6c | 2013-03-04 14:56:18 +0200 | [diff] [blame] | 2299 | if (!cached || !NAND_HAS_CACHEPROG(chip)) { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2300 | |
| 2301 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2302 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2303 | /* |
| 2304 | * See if operation failed and additional status checks are |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2305 | * available. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2306 | */ |
| 2307 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 2308 | status = chip->errstat(mtd, chip, FL_WRITING, status, |
| 2309 | page); |
| 2310 | |
| 2311 | if (status & NAND_STATUS_FAIL) |
| 2312 | return -EIO; |
| 2313 | } else { |
| 2314 | chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2315 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2316 | } |
| 2317 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2318 | return 0; |
| 2319 | } |
| 2320 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2321 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2322 | * nand_fill_oob - [INTERN] Transfer client buffer to oob |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2323 | * @mtd: MTD device structure |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2324 | * @oob: oob data buffer |
| 2325 | * @len: oob data write length |
| 2326 | * @ops: oob ops structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2327 | */ |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2328 | static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len, |
| 2329 | struct mtd_oob_ops *ops) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2330 | { |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2331 | struct nand_chip *chip = mtd->priv; |
| 2332 | |
| 2333 | /* |
| 2334 | * Initialise to all 0xFF, to avoid the possibility of left over OOB |
| 2335 | * data from a previous OOB read. |
| 2336 | */ |
| 2337 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
| 2338 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2339 | switch (ops->mode) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2340 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2341 | case MTD_OPS_PLACE_OOB: |
| 2342 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2343 | memcpy(chip->oob_poi + ops->ooboffs, oob, len); |
| 2344 | return oob + len; |
| 2345 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2346 | case MTD_OPS_AUTO_OOB: { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2347 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2348 | uint32_t boffs = 0, woffs = ops->ooboffs; |
| 2349 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2350 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2351 | for (; free->length && len; free++, len -= bytes) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2352 | /* Write request not from offset 0? */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2353 | if (unlikely(woffs)) { |
| 2354 | if (woffs >= free->length) { |
| 2355 | woffs -= free->length; |
| 2356 | continue; |
| 2357 | } |
| 2358 | boffs = free->offset + woffs; |
| 2359 | bytes = min_t(size_t, len, |
| 2360 | (free->length - woffs)); |
| 2361 | woffs = 0; |
| 2362 | } else { |
| 2363 | bytes = min_t(size_t, len, free->length); |
| 2364 | boffs = free->offset; |
| 2365 | } |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 2366 | memcpy(chip->oob_poi + boffs, oob, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2367 | oob += bytes; |
| 2368 | } |
| 2369 | return oob; |
| 2370 | } |
| 2371 | default: |
| 2372 | BUG(); |
| 2373 | } |
| 2374 | return NULL; |
| 2375 | } |
| 2376 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2377 | #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2378 | |
| 2379 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2380 | * nand_do_write_ops - [INTERN] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2381 | * @mtd: MTD device structure |
| 2382 | * @to: offset to write to |
| 2383 | * @ops: oob operations description structure |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2384 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2385 | * NAND write with ECC. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2386 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2387 | static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, |
| 2388 | struct mtd_oob_ops *ops) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2389 | { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2390 | int chipnr, realpage, page, blockmask, column; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2391 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2392 | uint32_t writelen = ops->len; |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2393 | |
| 2394 | uint32_t oobwritelen = ops->ooblen; |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2395 | uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ? |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2396 | mtd->oobavail : mtd->oobsize; |
| 2397 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2398 | uint8_t *oob = ops->oobbuf; |
| 2399 | uint8_t *buf = ops->datbuf; |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2400 | int ret; |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 2401 | int oob_required = oob ? 1 : 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2402 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2403 | ops->retlen = 0; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2404 | if (!writelen) |
| 2405 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2406 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2407 | /* Reject writes, which are not page aligned */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2408 | if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 2409 | pr_notice("%s: attempt to write non page aligned data\n", |
| 2410 | __func__); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2411 | return -EINVAL; |
| 2412 | } |
| 2413 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2414 | column = to & (mtd->writesize - 1); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2415 | |
Thomas Gleixner | 6a93096 | 2006-06-28 00:11:45 +0200 | [diff] [blame] | 2416 | chipnr = (int)(to >> chip->chip_shift); |
| 2417 | chip->select_chip(mtd, chipnr); |
| 2418 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2419 | /* Check, if it is write protected */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2420 | if (nand_check_wp(mtd)) { |
| 2421 | ret = -EIO; |
| 2422 | goto err_out; |
| 2423 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2424 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2425 | realpage = (int)(to >> chip->page_shift); |
| 2426 | page = realpage & chip->pagemask; |
| 2427 | blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 2428 | |
| 2429 | /* Invalidate the page cache, when we write to the cached page */ |
Brian Norris | 537ab1b | 2014-07-21 19:08:03 -0700 | [diff] [blame] | 2430 | if (to <= ((loff_t)chip->pagebuf << chip->page_shift) && |
| 2431 | ((loff_t)chip->pagebuf << chip->page_shift) < (to + ops->len)) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2432 | chip->pagebuf = -1; |
| 2433 | |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2434 | /* Don't allow multipage oob writes with offset */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2435 | if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) { |
| 2436 | ret = -EINVAL; |
| 2437 | goto err_out; |
| 2438 | } |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2439 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2440 | while (1) { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2441 | int bytes = mtd->writesize; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2442 | int cached = writelen > bytes && page != blockmask; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2443 | uint8_t *wbuf = buf; |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 2444 | int use_bufpoi; |
| 2445 | int part_pagewr = (column || writelen < (mtd->writesize - 1)); |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2446 | |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 2447 | if (part_pagewr) |
| 2448 | use_bufpoi = 1; |
| 2449 | else if (chip->options & NAND_USE_BOUNCE_BUFFER) |
| 2450 | use_bufpoi = !virt_addr_valid(buf); |
| 2451 | else |
| 2452 | use_bufpoi = 0; |
| 2453 | |
| 2454 | /* Partial page write?, or need to use bounce buffer */ |
| 2455 | if (use_bufpoi) { |
| 2456 | pr_debug("%s: using write bounce buffer for buf@%p\n", |
| 2457 | __func__, buf); |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2458 | cached = 0; |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 2459 | if (part_pagewr) |
| 2460 | bytes = min_t(int, bytes - column, writelen); |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2461 | chip->pagebuf = -1; |
| 2462 | memset(chip->buffers->databuf, 0xff, mtd->writesize); |
| 2463 | memcpy(&chip->buffers->databuf[column], buf, bytes); |
| 2464 | wbuf = chip->buffers->databuf; |
| 2465 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2466 | |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2467 | if (unlikely(oob)) { |
| 2468 | size_t len = min(oobwritelen, oobmaxlen); |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2469 | oob = nand_fill_oob(mtd, oob, len, ops); |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2470 | oobwritelen -= len; |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2471 | } else { |
| 2472 | /* We still need to erase leftover OOB data */ |
| 2473 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2474 | } |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2475 | ret = chip->write_page(mtd, chip, column, bytes, wbuf, |
| 2476 | oob_required, page, cached, |
| 2477 | (ops->mode == MTD_OPS_RAW)); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2478 | if (ret) |
| 2479 | break; |
| 2480 | |
| 2481 | writelen -= bytes; |
| 2482 | if (!writelen) |
| 2483 | break; |
| 2484 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2485 | column = 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2486 | buf += bytes; |
| 2487 | realpage++; |
| 2488 | |
| 2489 | page = realpage & chip->pagemask; |
| 2490 | /* Check, if we cross a chip boundary */ |
| 2491 | if (!page) { |
| 2492 | chipnr++; |
| 2493 | chip->select_chip(mtd, -1); |
| 2494 | chip->select_chip(mtd, chipnr); |
| 2495 | } |
| 2496 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2497 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2498 | ops->retlen = ops->len - writelen; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2499 | if (unlikely(oob)) |
| 2500 | ops->oobretlen = ops->ooblen; |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2501 | |
| 2502 | err_out: |
| 2503 | chip->select_chip(mtd, -1); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2504 | return ret; |
| 2505 | } |
| 2506 | |
| 2507 | /** |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2508 | * panic_nand_write - [MTD Interface] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2509 | * @mtd: MTD device structure |
| 2510 | * @to: offset to write to |
| 2511 | * @len: number of bytes to write |
| 2512 | * @retlen: pointer to variable to store the number of written bytes |
| 2513 | * @buf: the data to write |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2514 | * |
| 2515 | * NAND write with ECC. Used when performing writes in interrupt context, this |
| 2516 | * may for example be called by mtdoops when writing an oops while in panic. |
| 2517 | */ |
| 2518 | static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
| 2519 | size_t *retlen, const uint8_t *buf) |
| 2520 | { |
| 2521 | struct nand_chip *chip = mtd->priv; |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2522 | struct mtd_oob_ops ops; |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2523 | int ret; |
| 2524 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2525 | /* Wait for the device to get ready */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2526 | panic_nand_wait(mtd, chip, 400); |
| 2527 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2528 | /* Grab the device */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2529 | panic_nand_get_device(chip, mtd, FL_WRITING); |
| 2530 | |
Brian Norris | 0ec56dc | 2015-02-28 02:02:30 -0800 | [diff] [blame] | 2531 | memset(&ops, 0, sizeof(ops)); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2532 | ops.len = len; |
| 2533 | ops.datbuf = (uint8_t *)buf; |
Huang Shijie | 11041ae | 2012-07-03 16:44:14 +0800 | [diff] [blame] | 2534 | ops.mode = MTD_OPS_PLACE_OOB; |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2535 | |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2536 | ret = nand_do_write_ops(mtd, to, &ops); |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2537 | |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2538 | *retlen = ops.retlen; |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2539 | return ret; |
| 2540 | } |
| 2541 | |
| 2542 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2543 | * nand_write - [MTD Interface] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2544 | * @mtd: MTD device structure |
| 2545 | * @to: offset to write to |
| 2546 | * @len: number of bytes to write |
| 2547 | * @retlen: pointer to variable to store the number of written bytes |
| 2548 | * @buf: the data to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2549 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2550 | * NAND write with ECC. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2551 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2552 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2553 | size_t *retlen, const uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2554 | { |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2555 | struct mtd_oob_ops ops; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2556 | int ret; |
| 2557 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2558 | nand_get_device(mtd, FL_WRITING); |
Brian Norris | 0ec56dc | 2015-02-28 02:02:30 -0800 | [diff] [blame] | 2559 | memset(&ops, 0, sizeof(ops)); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2560 | ops.len = len; |
| 2561 | ops.datbuf = (uint8_t *)buf; |
Huang Shijie | 11041ae | 2012-07-03 16:44:14 +0800 | [diff] [blame] | 2562 | ops.mode = MTD_OPS_PLACE_OOB; |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2563 | ret = nand_do_write_ops(mtd, to, &ops); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2564 | *retlen = ops.retlen; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2565 | nand_release_device(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2566 | return ret; |
| 2567 | } |
| 2568 | |
| 2569 | /** |
| 2570 | * nand_do_write_oob - [MTD Interface] NAND write out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2571 | * @mtd: MTD device structure |
| 2572 | * @to: offset to write to |
| 2573 | * @ops: oob operation description structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2574 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2575 | * NAND write out-of-band. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2576 | */ |
| 2577 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 2578 | struct mtd_oob_ops *ops) |
| 2579 | { |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2580 | int chipnr, page, status, len; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2581 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2582 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2583 | pr_debug("%s: to = 0x%08x, len = %i\n", |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2584 | __func__, (unsigned int)to, (int)ops->ooblen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2585 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2586 | if (ops->mode == MTD_OPS_AUTO_OOB) |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2587 | len = chip->ecc.layout->oobavail; |
| 2588 | else |
| 2589 | len = mtd->oobsize; |
| 2590 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2591 | /* Do not allow write past end of page */ |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2592 | if ((ops->ooboffs + ops->ooblen) > len) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2593 | pr_debug("%s: attempt to write past end of page\n", |
| 2594 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2595 | return -EINVAL; |
| 2596 | } |
| 2597 | |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2598 | if (unlikely(ops->ooboffs >= len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2599 | pr_debug("%s: attempt to start write outside oob\n", |
| 2600 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2601 | return -EINVAL; |
| 2602 | } |
| 2603 | |
Jason Liu | 775adc3 | 2011-02-25 13:06:18 +0800 | [diff] [blame] | 2604 | /* Do not allow write past end of device */ |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2605 | if (unlikely(to >= mtd->size || |
| 2606 | ops->ooboffs + ops->ooblen > |
| 2607 | ((mtd->size >> chip->page_shift) - |
| 2608 | (to >> chip->page_shift)) * len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2609 | pr_debug("%s: attempt to write beyond end of device\n", |
| 2610 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2611 | return -EINVAL; |
| 2612 | } |
| 2613 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2614 | chipnr = (int)(to >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2615 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2616 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2617 | /* Shift to get page */ |
| 2618 | page = (int)(to >> chip->page_shift); |
| 2619 | |
| 2620 | /* |
| 2621 | * Reset the chip. Some chips (like the Toshiba TC5832DC found in one |
| 2622 | * of my DiskOnChip 2000 test units) will clear the whole data page too |
| 2623 | * if we don't do this. I have no clue why, but I seem to have 'fixed' |
| 2624 | * it in the doc2000 driver in August 1999. dwmw2. |
| 2625 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2626 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2627 | |
| 2628 | /* Check, if it is write protected */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2629 | if (nand_check_wp(mtd)) { |
| 2630 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2631 | return -EROFS; |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2632 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2633 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2634 | /* Invalidate the page cache, if we write to the cached page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2635 | if (page == chip->pagebuf) |
| 2636 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2637 | |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2638 | nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops); |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 2639 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2640 | if (ops->mode == MTD_OPS_RAW) |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 2641 | status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask); |
| 2642 | else |
| 2643 | status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2644 | |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2645 | chip->select_chip(mtd, -1); |
| 2646 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2647 | if (status) |
| 2648 | return status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2649 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2650 | ops->oobretlen = ops->ooblen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2651 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2652 | return 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2653 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2654 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2655 | /** |
| 2656 | * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2657 | * @mtd: MTD device structure |
| 2658 | * @to: offset to write to |
| 2659 | * @ops: oob operation description structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2660 | */ |
| 2661 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, |
| 2662 | struct mtd_oob_ops *ops) |
| 2663 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2664 | int ret = -ENOTSUPP; |
| 2665 | |
| 2666 | ops->retlen = 0; |
| 2667 | |
| 2668 | /* Do not allow writes past end of device */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2669 | if (ops->datbuf && (to + ops->len) > mtd->size) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2670 | pr_debug("%s: attempt to write beyond end of device\n", |
| 2671 | __func__); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2672 | return -EINVAL; |
| 2673 | } |
| 2674 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2675 | nand_get_device(mtd, FL_WRITING); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2676 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2677 | switch (ops->mode) { |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2678 | case MTD_OPS_PLACE_OOB: |
| 2679 | case MTD_OPS_AUTO_OOB: |
| 2680 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2681 | break; |
| 2682 | |
| 2683 | default: |
| 2684 | goto out; |
| 2685 | } |
| 2686 | |
| 2687 | if (!ops->datbuf) |
| 2688 | ret = nand_do_write_oob(mtd, to, ops); |
| 2689 | else |
| 2690 | ret = nand_do_write_ops(mtd, to, ops); |
| 2691 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2692 | out: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2693 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2694 | return ret; |
| 2695 | } |
| 2696 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2697 | /** |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 2698 | * single_erase - [GENERIC] NAND standard block erase command function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2699 | * @mtd: MTD device structure |
| 2700 | * @page: the page address of the block which will be erased |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2701 | * |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 2702 | * Standard erase command for NAND chips. Returns NAND status. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2703 | */ |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 2704 | static int single_erase(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2705 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2706 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2707 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2708 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 2709 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 2710 | |
| 2711 | return chip->waitfunc(mtd, chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2712 | } |
| 2713 | |
| 2714 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2715 | * nand_erase - [MTD Interface] erase block(s) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2716 | * @mtd: MTD device structure |
| 2717 | * @instr: erase instruction |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2718 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2719 | * Erase one ore more blocks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2720 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2721 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2722 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2723 | return nand_erase_nand(mtd, instr, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2724 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2725 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2726 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2727 | * nand_erase_nand - [INTERN] erase block(s) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2728 | * @mtd: MTD device structure |
| 2729 | * @instr: erase instruction |
| 2730 | * @allowbbt: allow erasing the bbt area |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2731 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2732 | * Erase one ore more blocks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2733 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2734 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, |
| 2735 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2736 | { |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2737 | int page, status, pages_per_block, ret, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2738 | struct nand_chip *chip = mtd->priv; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2739 | loff_t len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2740 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2741 | pr_debug("%s: start = 0x%012llx, len = %llu\n", |
| 2742 | __func__, (unsigned long long)instr->addr, |
| 2743 | (unsigned long long)instr->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2744 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 2745 | if (check_offs_len(mtd, instr->addr, instr->len)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2746 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2747 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2748 | /* Grab the lock and see if the device is available */ |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2749 | nand_get_device(mtd, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2750 | |
| 2751 | /* Shift to get first page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2752 | page = (int)(instr->addr >> chip->page_shift); |
| 2753 | chipnr = (int)(instr->addr >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2754 | |
| 2755 | /* Calculate pages in each block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2756 | pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2757 | |
| 2758 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2759 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2760 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2761 | /* Check, if it is write protected */ |
| 2762 | if (nand_check_wp(mtd)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2763 | pr_debug("%s: device is write protected!\n", |
| 2764 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2765 | instr->state = MTD_ERASE_FAILED; |
| 2766 | goto erase_exit; |
| 2767 | } |
| 2768 | |
| 2769 | /* Loop through the pages */ |
| 2770 | len = instr->len; |
| 2771 | |
| 2772 | instr->state = MTD_ERASING; |
| 2773 | |
| 2774 | while (len) { |
Wolfram Sang | 12183a2 | 2011-12-21 23:01:20 +0100 | [diff] [blame] | 2775 | /* Check if we have a bad block, we do not erase bad blocks! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2776 | if (nand_block_checkbad(mtd, ((loff_t) page) << |
| 2777 | chip->page_shift, 0, allowbbt)) { |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 2778 | pr_warn("%s: attempt to erase a bad block at page 0x%08x\n", |
| 2779 | __func__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2780 | instr->state = MTD_ERASE_FAILED; |
| 2781 | goto erase_exit; |
| 2782 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2783 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2784 | /* |
| 2785 | * Invalidate the page cache, if we erase the block which |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2786 | * contains the current cached page. |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2787 | */ |
| 2788 | if (page <= chip->pagebuf && chip->pagebuf < |
| 2789 | (page + pages_per_block)) |
| 2790 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2791 | |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 2792 | status = chip->erase(mtd, page & chip->pagemask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2793 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2794 | /* |
| 2795 | * See if operation failed and additional status checks are |
| 2796 | * available |
| 2797 | */ |
| 2798 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 2799 | status = chip->errstat(mtd, chip, FL_ERASING, |
| 2800 | status, page); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 2801 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2802 | /* See if block erase succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 2803 | if (status & NAND_STATUS_FAIL) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2804 | pr_debug("%s: failed erase, page 0x%08x\n", |
| 2805 | __func__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2806 | instr->state = MTD_ERASE_FAILED; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2807 | instr->fail_addr = |
| 2808 | ((loff_t)page << chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2809 | goto erase_exit; |
| 2810 | } |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2811 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2812 | /* Increment page address and decrement length */ |
Dan Carpenter | daae74c | 2013-08-09 12:49:05 +0300 | [diff] [blame] | 2813 | len -= (1ULL << chip->phys_erase_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2814 | page += pages_per_block; |
| 2815 | |
| 2816 | /* Check, if we cross a chip boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2817 | if (len && !(page & chip->pagemask)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2818 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2819 | chip->select_chip(mtd, -1); |
| 2820 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2821 | } |
| 2822 | } |
| 2823 | instr->state = MTD_ERASE_DONE; |
| 2824 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2825 | erase_exit: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2826 | |
| 2827 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2828 | |
| 2829 | /* Deselect and wake up anyone waiting on the device */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2830 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2831 | nand_release_device(mtd); |
| 2832 | |
David Woodhouse | 49defc0 | 2007-10-06 15:01:59 -0400 | [diff] [blame] | 2833 | /* Do call back function */ |
| 2834 | if (!ret) |
| 2835 | mtd_erase_callback(instr); |
| 2836 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2837 | /* Return more or less happy */ |
| 2838 | return ret; |
| 2839 | } |
| 2840 | |
| 2841 | /** |
| 2842 | * nand_sync - [MTD Interface] sync |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2843 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2844 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2845 | * Sync is actually a wait for chip ready function. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2846 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2847 | static void nand_sync(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2848 | { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2849 | pr_debug("%s: called\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2850 | |
| 2851 | /* Grab the lock and see if the device is available */ |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2852 | nand_get_device(mtd, FL_SYNCING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2853 | /* Release it and go back */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2854 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2855 | } |
| 2856 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2857 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2858 | * nand_block_isbad - [MTD Interface] Check if block at offset is bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2859 | * @mtd: MTD device structure |
| 2860 | * @offs: offset relative to mtd start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2861 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2862 | static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2863 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2864 | return nand_block_checkbad(mtd, offs, 1, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2865 | } |
| 2866 | |
| 2867 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2868 | * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2869 | * @mtd: MTD device structure |
| 2870 | * @ofs: offset relative to mtd start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2871 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2872 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2873 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2874 | int ret; |
| 2875 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2876 | ret = nand_block_isbad(mtd, ofs); |
| 2877 | if (ret) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2878 | /* If it was bad already, return success and do nothing */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2879 | if (ret > 0) |
| 2880 | return 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2881 | return ret; |
| 2882 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2883 | |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 2884 | return nand_block_markbad_lowlevel(mtd, ofs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2885 | } |
| 2886 | |
| 2887 | /** |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 2888 | * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand |
| 2889 | * @mtd: MTD device structure |
| 2890 | * @chip: nand chip info structure |
| 2891 | * @addr: feature address. |
| 2892 | * @subfeature_param: the subfeature parameters, a four bytes array. |
| 2893 | */ |
| 2894 | static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip, |
| 2895 | int addr, uint8_t *subfeature_param) |
| 2896 | { |
| 2897 | int status; |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 2898 | int i; |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 2899 | |
David Mosberger | d914c93 | 2013-05-29 15:30:13 +0300 | [diff] [blame] | 2900 | if (!chip->onfi_version || |
| 2901 | !(le16_to_cpu(chip->onfi_params.opt_cmd) |
| 2902 | & ONFI_OPT_CMD_SET_GET_FEATURES)) |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 2903 | return -EINVAL; |
| 2904 | |
| 2905 | chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1); |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 2906 | for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i) |
| 2907 | chip->write_byte(mtd, subfeature_param[i]); |
| 2908 | |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 2909 | status = chip->waitfunc(mtd, chip); |
| 2910 | if (status & NAND_STATUS_FAIL) |
| 2911 | return -EIO; |
| 2912 | return 0; |
| 2913 | } |
| 2914 | |
| 2915 | /** |
| 2916 | * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand |
| 2917 | * @mtd: MTD device structure |
| 2918 | * @chip: nand chip info structure |
| 2919 | * @addr: feature address. |
| 2920 | * @subfeature_param: the subfeature parameters, a four bytes array. |
| 2921 | */ |
| 2922 | static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip, |
| 2923 | int addr, uint8_t *subfeature_param) |
| 2924 | { |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 2925 | int i; |
| 2926 | |
David Mosberger | d914c93 | 2013-05-29 15:30:13 +0300 | [diff] [blame] | 2927 | if (!chip->onfi_version || |
| 2928 | !(le16_to_cpu(chip->onfi_params.opt_cmd) |
| 2929 | & ONFI_OPT_CMD_SET_GET_FEATURES)) |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 2930 | return -EINVAL; |
| 2931 | |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 2932 | chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1); |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 2933 | for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i) |
| 2934 | *subfeature_param++ = chip->read_byte(mtd); |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 2935 | return 0; |
| 2936 | } |
| 2937 | |
| 2938 | /** |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2939 | * nand_suspend - [MTD Interface] Suspend the NAND flash |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2940 | * @mtd: MTD device structure |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2941 | */ |
| 2942 | static int nand_suspend(struct mtd_info *mtd) |
| 2943 | { |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2944 | return nand_get_device(mtd, FL_PM_SUSPENDED); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2945 | } |
| 2946 | |
| 2947 | /** |
| 2948 | * nand_resume - [MTD Interface] Resume the NAND flash |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2949 | * @mtd: MTD device structure |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2950 | */ |
| 2951 | static void nand_resume(struct mtd_info *mtd) |
| 2952 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2953 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2954 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2955 | if (chip->state == FL_PM_SUSPENDED) |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2956 | nand_release_device(mtd); |
| 2957 | else |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 2958 | pr_err("%s called for a chip which is not in suspended state\n", |
| 2959 | __func__); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2960 | } |
| 2961 | |
Scott Branden | 72ea403 | 2014-11-20 11:18:05 -0800 | [diff] [blame] | 2962 | /** |
| 2963 | * nand_shutdown - [MTD Interface] Finish the current NAND operation and |
| 2964 | * prevent further operations |
| 2965 | * @mtd: MTD device structure |
| 2966 | */ |
| 2967 | static void nand_shutdown(struct mtd_info *mtd) |
| 2968 | { |
| 2969 | nand_get_device(mtd, FL_SHUTDOWN); |
| 2970 | } |
| 2971 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2972 | /* Set default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2973 | static void nand_set_defaults(struct nand_chip *chip, int busw) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2974 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2975 | /* check for proper chip_delay setup, set 20us if not */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2976 | if (!chip->chip_delay) |
| 2977 | chip->chip_delay = 20; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2978 | |
| 2979 | /* check, if a user supplied command function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2980 | if (chip->cmdfunc == NULL) |
| 2981 | chip->cmdfunc = nand_command; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2982 | |
| 2983 | /* check, if a user supplied wait function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2984 | if (chip->waitfunc == NULL) |
| 2985 | chip->waitfunc = nand_wait; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2986 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2987 | if (!chip->select_chip) |
| 2988 | chip->select_chip = nand_select_chip; |
Brian Norris | 68e8078 | 2013-07-18 01:17:02 -0700 | [diff] [blame] | 2989 | |
Huang Shijie | 4204ccc | 2013-08-16 10:10:07 +0800 | [diff] [blame] | 2990 | /* set for ONFI nand */ |
| 2991 | if (!chip->onfi_set_features) |
| 2992 | chip->onfi_set_features = nand_onfi_set_features; |
| 2993 | if (!chip->onfi_get_features) |
| 2994 | chip->onfi_get_features = nand_onfi_get_features; |
| 2995 | |
Brian Norris | 68e8078 | 2013-07-18 01:17:02 -0700 | [diff] [blame] | 2996 | /* If called twice, pointers that depend on busw may need to be reset */ |
| 2997 | if (!chip->read_byte || chip->read_byte == nand_read_byte) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2998 | chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; |
| 2999 | if (!chip->read_word) |
| 3000 | chip->read_word = nand_read_word; |
| 3001 | if (!chip->block_bad) |
| 3002 | chip->block_bad = nand_block_bad; |
| 3003 | if (!chip->block_markbad) |
| 3004 | chip->block_markbad = nand_default_block_markbad; |
Brian Norris | 68e8078 | 2013-07-18 01:17:02 -0700 | [diff] [blame] | 3005 | if (!chip->write_buf || chip->write_buf == nand_write_buf) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3006 | chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 3007 | if (!chip->write_byte || chip->write_byte == nand_write_byte) |
| 3008 | chip->write_byte = busw ? nand_write_byte16 : nand_write_byte; |
Brian Norris | 68e8078 | 2013-07-18 01:17:02 -0700 | [diff] [blame] | 3009 | if (!chip->read_buf || chip->read_buf == nand_read_buf) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3010 | chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3011 | if (!chip->scan_bbt) |
| 3012 | chip->scan_bbt = nand_default_bbt; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 3013 | |
| 3014 | if (!chip->controller) { |
| 3015 | chip->controller = &chip->hwcontrol; |
| 3016 | spin_lock_init(&chip->controller->lock); |
| 3017 | init_waitqueue_head(&chip->controller->wq); |
| 3018 | } |
| 3019 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3020 | } |
| 3021 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3022 | /* Sanitize ONFI strings so we can safely print them */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3023 | static void sanitize_string(uint8_t *s, size_t len) |
| 3024 | { |
| 3025 | ssize_t i; |
| 3026 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3027 | /* Null terminate */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3028 | s[len - 1] = 0; |
| 3029 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3030 | /* Remove non printable chars */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3031 | for (i = 0; i < len - 1; i++) { |
| 3032 | if (s[i] < ' ' || s[i] > 127) |
| 3033 | s[i] = '?'; |
| 3034 | } |
| 3035 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3036 | /* Remove trailing spaces */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3037 | strim(s); |
| 3038 | } |
| 3039 | |
| 3040 | static u16 onfi_crc16(u16 crc, u8 const *p, size_t len) |
| 3041 | { |
| 3042 | int i; |
| 3043 | while (len--) { |
| 3044 | crc ^= *p++ << 8; |
| 3045 | for (i = 0; i < 8; i++) |
| 3046 | crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0); |
| 3047 | } |
| 3048 | |
| 3049 | return crc; |
| 3050 | } |
| 3051 | |
Huang Shijie | 6dcbe0c | 2013-05-22 10:28:27 +0800 | [diff] [blame] | 3052 | /* Parse the Extended Parameter Page. */ |
| 3053 | static int nand_flash_detect_ext_param_page(struct mtd_info *mtd, |
| 3054 | struct nand_chip *chip, struct nand_onfi_params *p) |
| 3055 | { |
| 3056 | struct onfi_ext_param_page *ep; |
| 3057 | struct onfi_ext_section *s; |
| 3058 | struct onfi_ext_ecc_info *ecc; |
| 3059 | uint8_t *cursor; |
| 3060 | int ret = -EINVAL; |
| 3061 | int len; |
| 3062 | int i; |
| 3063 | |
| 3064 | len = le16_to_cpu(p->ext_param_page_length) * 16; |
| 3065 | ep = kmalloc(len, GFP_KERNEL); |
Brian Norris | 5cb1327 | 2013-09-16 17:59:20 -0700 | [diff] [blame] | 3066 | if (!ep) |
| 3067 | return -ENOMEM; |
Huang Shijie | 6dcbe0c | 2013-05-22 10:28:27 +0800 | [diff] [blame] | 3068 | |
| 3069 | /* Send our own NAND_CMD_PARAM. */ |
| 3070 | chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); |
| 3071 | |
| 3072 | /* Use the Change Read Column command to skip the ONFI param pages. */ |
| 3073 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, |
| 3074 | sizeof(*p) * p->num_of_param_pages , -1); |
| 3075 | |
| 3076 | /* Read out the Extended Parameter Page. */ |
| 3077 | chip->read_buf(mtd, (uint8_t *)ep, len); |
| 3078 | if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2) |
| 3079 | != le16_to_cpu(ep->crc))) { |
| 3080 | pr_debug("fail in the CRC.\n"); |
| 3081 | goto ext_out; |
| 3082 | } |
| 3083 | |
| 3084 | /* |
| 3085 | * Check the signature. |
| 3086 | * Do not strictly follow the ONFI spec, maybe changed in future. |
| 3087 | */ |
| 3088 | if (strncmp(ep->sig, "EPPS", 4)) { |
| 3089 | pr_debug("The signature is invalid.\n"); |
| 3090 | goto ext_out; |
| 3091 | } |
| 3092 | |
| 3093 | /* find the ECC section. */ |
| 3094 | cursor = (uint8_t *)(ep + 1); |
| 3095 | for (i = 0; i < ONFI_EXT_SECTION_MAX; i++) { |
| 3096 | s = ep->sections + i; |
| 3097 | if (s->type == ONFI_SECTION_TYPE_2) |
| 3098 | break; |
| 3099 | cursor += s->length * 16; |
| 3100 | } |
| 3101 | if (i == ONFI_EXT_SECTION_MAX) { |
| 3102 | pr_debug("We can not find the ECC section.\n"); |
| 3103 | goto ext_out; |
| 3104 | } |
| 3105 | |
| 3106 | /* get the info we want. */ |
| 3107 | ecc = (struct onfi_ext_ecc_info *)cursor; |
| 3108 | |
Brian Norris | 4ae7d22 | 2013-09-16 18:20:21 -0700 | [diff] [blame] | 3109 | if (!ecc->codeword_size) { |
| 3110 | pr_debug("Invalid codeword size\n"); |
| 3111 | goto ext_out; |
Huang Shijie | 6dcbe0c | 2013-05-22 10:28:27 +0800 | [diff] [blame] | 3112 | } |
| 3113 | |
Brian Norris | 4ae7d22 | 2013-09-16 18:20:21 -0700 | [diff] [blame] | 3114 | chip->ecc_strength_ds = ecc->ecc_bits; |
| 3115 | chip->ecc_step_ds = 1 << ecc->codeword_size; |
Brian Norris | 5cb1327 | 2013-09-16 17:59:20 -0700 | [diff] [blame] | 3116 | ret = 0; |
Huang Shijie | 6dcbe0c | 2013-05-22 10:28:27 +0800 | [diff] [blame] | 3117 | |
| 3118 | ext_out: |
| 3119 | kfree(ep); |
| 3120 | return ret; |
| 3121 | } |
| 3122 | |
Brian Norris | 8429bb3 | 2013-12-03 15:51:09 -0800 | [diff] [blame] | 3123 | static int nand_setup_read_retry_micron(struct mtd_info *mtd, int retry_mode) |
| 3124 | { |
| 3125 | struct nand_chip *chip = mtd->priv; |
| 3126 | uint8_t feature[ONFI_SUBFEATURE_PARAM_LEN] = {retry_mode}; |
| 3127 | |
| 3128 | return chip->onfi_set_features(mtd, chip, ONFI_FEATURE_ADDR_READ_RETRY, |
| 3129 | feature); |
| 3130 | } |
| 3131 | |
| 3132 | /* |
| 3133 | * Configure chip properties from Micron vendor-specific ONFI table |
| 3134 | */ |
| 3135 | static void nand_onfi_detect_micron(struct nand_chip *chip, |
| 3136 | struct nand_onfi_params *p) |
| 3137 | { |
| 3138 | struct nand_onfi_vendor_micron *micron = (void *)p->vendor; |
| 3139 | |
| 3140 | if (le16_to_cpu(p->vendor_revision) < 1) |
| 3141 | return; |
| 3142 | |
| 3143 | chip->read_retries = micron->read_retry_options; |
| 3144 | chip->setup_read_retry = nand_setup_read_retry_micron; |
| 3145 | } |
| 3146 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3147 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3148 | * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise. |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3149 | */ |
| 3150 | static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, |
Matthieu CASTET | 08c248f | 2011-06-26 18:26:55 +0200 | [diff] [blame] | 3151 | int *busw) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3152 | { |
| 3153 | struct nand_onfi_params *p = &chip->onfi_params; |
Brian Norris | bd9c6e9 | 2013-11-29 22:04:28 -0800 | [diff] [blame] | 3154 | int i, j; |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3155 | int val; |
| 3156 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 3157 | /* Try ONFI for unknown chip or LP */ |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3158 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); |
| 3159 | if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || |
| 3160 | chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') |
| 3161 | return 0; |
| 3162 | |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3163 | chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); |
| 3164 | for (i = 0; i < 3; i++) { |
Brian Norris | bd9c6e9 | 2013-11-29 22:04:28 -0800 | [diff] [blame] | 3165 | for (j = 0; j < sizeof(*p); j++) |
| 3166 | ((uint8_t *)p)[j] = chip->read_byte(mtd); |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3167 | if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) == |
| 3168 | le16_to_cpu(p->crc)) { |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3169 | break; |
| 3170 | } |
| 3171 | } |
| 3172 | |
Brian Norris | c7f23a7 | 2013-08-13 10:51:55 -0700 | [diff] [blame] | 3173 | if (i == 3) { |
| 3174 | pr_err("Could not find valid ONFI parameter page; aborting\n"); |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3175 | return 0; |
Brian Norris | c7f23a7 | 2013-08-13 10:51:55 -0700 | [diff] [blame] | 3176 | } |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3177 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3178 | /* Check version */ |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3179 | val = le16_to_cpu(p->revision); |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 3180 | if (val & (1 << 5)) |
| 3181 | chip->onfi_version = 23; |
| 3182 | else if (val & (1 << 4)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3183 | chip->onfi_version = 22; |
| 3184 | else if (val & (1 << 3)) |
| 3185 | chip->onfi_version = 21; |
| 3186 | else if (val & (1 << 2)) |
| 3187 | chip->onfi_version = 20; |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 3188 | else if (val & (1 << 1)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3189 | chip->onfi_version = 10; |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 3190 | |
| 3191 | if (!chip->onfi_version) { |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 3192 | pr_info("unsupported ONFI version: %d\n", val); |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 3193 | return 0; |
| 3194 | } |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3195 | |
| 3196 | sanitize_string(p->manufacturer, sizeof(p->manufacturer)); |
| 3197 | sanitize_string(p->model, sizeof(p->model)); |
| 3198 | if (!mtd->name) |
| 3199 | mtd->name = p->model; |
Brian Norris | 4355b70 | 2013-08-27 18:45:10 -0700 | [diff] [blame] | 3200 | |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3201 | mtd->writesize = le32_to_cpu(p->byte_per_page); |
Brian Norris | 4355b70 | 2013-08-27 18:45:10 -0700 | [diff] [blame] | 3202 | |
| 3203 | /* |
| 3204 | * pages_per_block and blocks_per_lun may not be a power-of-2 size |
| 3205 | * (don't ask me who thought of this...). MTD assumes that these |
| 3206 | * dimensions will be power-of-2, so just truncate the remaining area. |
| 3207 | */ |
| 3208 | mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1); |
| 3209 | mtd->erasesize *= mtd->writesize; |
| 3210 | |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3211 | mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); |
Brian Norris | 4355b70 | 2013-08-27 18:45:10 -0700 | [diff] [blame] | 3212 | |
| 3213 | /* See erasesize comment */ |
| 3214 | chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1); |
Matthieu CASTET | 6379575 | 2012-03-19 15:35:25 +0100 | [diff] [blame] | 3215 | chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; |
Huang Shijie | 13fbd17 | 2013-09-25 14:58:13 +0800 | [diff] [blame] | 3216 | chip->bits_per_cell = p->bits_per_cell; |
Huang Shijie | e2985fc | 2013-05-17 11:17:30 +0800 | [diff] [blame] | 3217 | |
| 3218 | if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS) |
Matthieu CASTET | 08c248f | 2011-06-26 18:26:55 +0200 | [diff] [blame] | 3219 | *busw = NAND_BUSWIDTH_16; |
Huang Shijie | e2985fc | 2013-05-17 11:17:30 +0800 | [diff] [blame] | 3220 | else |
| 3221 | *busw = 0; |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3222 | |
Huang Shijie | 10c86ba | 2013-05-17 11:17:26 +0800 | [diff] [blame] | 3223 | if (p->ecc_bits != 0xff) { |
| 3224 | chip->ecc_strength_ds = p->ecc_bits; |
| 3225 | chip->ecc_step_ds = 512; |
Huang Shijie | 6dcbe0c | 2013-05-22 10:28:27 +0800 | [diff] [blame] | 3226 | } else if (chip->onfi_version >= 21 && |
| 3227 | (onfi_feature(chip) & ONFI_FEATURE_EXT_PARAM_PAGE)) { |
| 3228 | |
| 3229 | /* |
| 3230 | * The nand_flash_detect_ext_param_page() uses the |
| 3231 | * Change Read Column command which maybe not supported |
| 3232 | * by the chip->cmdfunc. So try to update the chip->cmdfunc |
| 3233 | * now. We do not replace user supplied command function. |
| 3234 | */ |
| 3235 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 3236 | chip->cmdfunc = nand_command_lp; |
| 3237 | |
| 3238 | /* The Extended Parameter Page is supported since ONFI 2.1. */ |
| 3239 | if (nand_flash_detect_ext_param_page(mtd, chip, p)) |
Brian Norris | c7f23a7 | 2013-08-13 10:51:55 -0700 | [diff] [blame] | 3240 | pr_warn("Failed to detect ONFI extended param page\n"); |
| 3241 | } else { |
| 3242 | pr_warn("Could not retrieve ONFI ECC requirements\n"); |
Huang Shijie | 10c86ba | 2013-05-17 11:17:26 +0800 | [diff] [blame] | 3243 | } |
| 3244 | |
Brian Norris | 8429bb3 | 2013-12-03 15:51:09 -0800 | [diff] [blame] | 3245 | if (p->jedec_id == NAND_MFR_MICRON) |
| 3246 | nand_onfi_detect_micron(chip, p); |
| 3247 | |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3248 | return 1; |
| 3249 | } |
| 3250 | |
| 3251 | /* |
Huang Shijie | 9136181 | 2014-02-21 13:39:40 +0800 | [diff] [blame] | 3252 | * Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise. |
| 3253 | */ |
| 3254 | static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip, |
| 3255 | int *busw) |
| 3256 | { |
| 3257 | struct nand_jedec_params *p = &chip->jedec_params; |
| 3258 | struct jedec_ecc_info *ecc; |
| 3259 | int val; |
| 3260 | int i, j; |
| 3261 | |
| 3262 | /* Try JEDEC for unknown chip or LP */ |
| 3263 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x40, -1); |
| 3264 | if (chip->read_byte(mtd) != 'J' || chip->read_byte(mtd) != 'E' || |
| 3265 | chip->read_byte(mtd) != 'D' || chip->read_byte(mtd) != 'E' || |
| 3266 | chip->read_byte(mtd) != 'C') |
| 3267 | return 0; |
| 3268 | |
| 3269 | chip->cmdfunc(mtd, NAND_CMD_PARAM, 0x40, -1); |
| 3270 | for (i = 0; i < 3; i++) { |
| 3271 | for (j = 0; j < sizeof(*p); j++) |
| 3272 | ((uint8_t *)p)[j] = chip->read_byte(mtd); |
| 3273 | |
| 3274 | if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 510) == |
| 3275 | le16_to_cpu(p->crc)) |
| 3276 | break; |
| 3277 | } |
| 3278 | |
| 3279 | if (i == 3) { |
| 3280 | pr_err("Could not find valid JEDEC parameter page; aborting\n"); |
| 3281 | return 0; |
| 3282 | } |
| 3283 | |
| 3284 | /* Check version */ |
| 3285 | val = le16_to_cpu(p->revision); |
| 3286 | if (val & (1 << 2)) |
| 3287 | chip->jedec_version = 10; |
| 3288 | else if (val & (1 << 1)) |
| 3289 | chip->jedec_version = 1; /* vendor specific version */ |
| 3290 | |
| 3291 | if (!chip->jedec_version) { |
| 3292 | pr_info("unsupported JEDEC version: %d\n", val); |
| 3293 | return 0; |
| 3294 | } |
| 3295 | |
| 3296 | sanitize_string(p->manufacturer, sizeof(p->manufacturer)); |
| 3297 | sanitize_string(p->model, sizeof(p->model)); |
| 3298 | if (!mtd->name) |
| 3299 | mtd->name = p->model; |
| 3300 | |
| 3301 | mtd->writesize = le32_to_cpu(p->byte_per_page); |
| 3302 | |
| 3303 | /* Please reference to the comment for nand_flash_detect_onfi. */ |
| 3304 | mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1); |
| 3305 | mtd->erasesize *= mtd->writesize; |
| 3306 | |
| 3307 | mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); |
| 3308 | |
| 3309 | /* Please reference to the comment for nand_flash_detect_onfi. */ |
| 3310 | chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1); |
| 3311 | chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; |
| 3312 | chip->bits_per_cell = p->bits_per_cell; |
| 3313 | |
| 3314 | if (jedec_feature(chip) & JEDEC_FEATURE_16_BIT_BUS) |
| 3315 | *busw = NAND_BUSWIDTH_16; |
| 3316 | else |
| 3317 | *busw = 0; |
| 3318 | |
| 3319 | /* ECC info */ |
| 3320 | ecc = &p->ecc_info[0]; |
| 3321 | |
| 3322 | if (ecc->codeword_size >= 9) { |
| 3323 | chip->ecc_strength_ds = ecc->ecc_bits; |
| 3324 | chip->ecc_step_ds = 1 << ecc->codeword_size; |
| 3325 | } else { |
| 3326 | pr_warn("Invalid codeword size\n"); |
| 3327 | } |
| 3328 | |
| 3329 | return 1; |
| 3330 | } |
| 3331 | |
| 3332 | /* |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 3333 | * nand_id_has_period - Check if an ID string has a given wraparound period |
| 3334 | * @id_data: the ID string |
| 3335 | * @arrlen: the length of the @id_data array |
| 3336 | * @period: the period of repitition |
| 3337 | * |
| 3338 | * Check if an ID string is repeated within a given sequence of bytes at |
| 3339 | * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a |
Brian Norris | d4d4f1b | 2012-11-14 21:54:20 -0800 | [diff] [blame] | 3340 | * period of 3). This is a helper function for nand_id_len(). Returns non-zero |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 3341 | * if the repetition has a period of @period; otherwise, returns zero. |
| 3342 | */ |
| 3343 | static int nand_id_has_period(u8 *id_data, int arrlen, int period) |
| 3344 | { |
| 3345 | int i, j; |
| 3346 | for (i = 0; i < period; i++) |
| 3347 | for (j = i + period; j < arrlen; j += period) |
| 3348 | if (id_data[i] != id_data[j]) |
| 3349 | return 0; |
| 3350 | return 1; |
| 3351 | } |
| 3352 | |
| 3353 | /* |
| 3354 | * nand_id_len - Get the length of an ID string returned by CMD_READID |
| 3355 | * @id_data: the ID string |
| 3356 | * @arrlen: the length of the @id_data array |
| 3357 | |
| 3358 | * Returns the length of the ID string, according to known wraparound/trailing |
| 3359 | * zero patterns. If no pattern exists, returns the length of the array. |
| 3360 | */ |
| 3361 | static int nand_id_len(u8 *id_data, int arrlen) |
| 3362 | { |
| 3363 | int last_nonzero, period; |
| 3364 | |
| 3365 | /* Find last non-zero byte */ |
| 3366 | for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--) |
| 3367 | if (id_data[last_nonzero]) |
| 3368 | break; |
| 3369 | |
| 3370 | /* All zeros */ |
| 3371 | if (last_nonzero < 0) |
| 3372 | return 0; |
| 3373 | |
| 3374 | /* Calculate wraparound period */ |
| 3375 | for (period = 1; period < arrlen; period++) |
| 3376 | if (nand_id_has_period(id_data, arrlen, period)) |
| 3377 | break; |
| 3378 | |
| 3379 | /* There's a repeated pattern */ |
| 3380 | if (period < arrlen) |
| 3381 | return period; |
| 3382 | |
| 3383 | /* There are trailing zeros */ |
| 3384 | if (last_nonzero < arrlen - 1) |
| 3385 | return last_nonzero + 1; |
| 3386 | |
| 3387 | /* No pattern detected */ |
| 3388 | return arrlen; |
| 3389 | } |
| 3390 | |
Huang Shijie | 7db906b | 2013-09-25 14:58:11 +0800 | [diff] [blame] | 3391 | /* Extract the bits of per cell from the 3rd byte of the extended ID */ |
| 3392 | static int nand_get_bits_per_cell(u8 cellinfo) |
| 3393 | { |
| 3394 | int bits; |
| 3395 | |
| 3396 | bits = cellinfo & NAND_CI_CELLTYPE_MSK; |
| 3397 | bits >>= NAND_CI_CELLTYPE_SHIFT; |
| 3398 | return bits + 1; |
| 3399 | } |
| 3400 | |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 3401 | /* |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3402 | * Many new NAND share similar device ID codes, which represent the size of the |
| 3403 | * chip. The rest of the parameters must be decoded according to generic or |
| 3404 | * manufacturer-specific "extended ID" decoding patterns. |
| 3405 | */ |
| 3406 | static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, |
| 3407 | u8 id_data[8], int *busw) |
| 3408 | { |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 3409 | int extid, id_len; |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3410 | /* The 3rd id byte holds MLC / multichip data */ |
Huang Shijie | 7db906b | 2013-09-25 14:58:11 +0800 | [diff] [blame] | 3411 | chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3412 | /* The 4th id byte is the important one */ |
| 3413 | extid = id_data[3]; |
| 3414 | |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 3415 | id_len = nand_id_len(id_data, 8); |
| 3416 | |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3417 | /* |
| 3418 | * Field definitions are in the following datasheets: |
| 3419 | * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32) |
Brian Norris | af451af | 2012-10-09 23:26:06 -0700 | [diff] [blame] | 3420 | * New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44) |
Brian Norris | 73ca392 | 2012-09-24 20:40:54 -0700 | [diff] [blame] | 3421 | * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22) |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3422 | * |
Brian Norris | af451af | 2012-10-09 23:26:06 -0700 | [diff] [blame] | 3423 | * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung |
| 3424 | * ID to decide what to do. |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3425 | */ |
Brian Norris | af451af | 2012-10-09 23:26:06 -0700 | [diff] [blame] | 3426 | if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG && |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 3427 | !nand_is_slc(chip) && id_data[5] != 0x00) { |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3428 | /* Calc pagesize */ |
| 3429 | mtd->writesize = 2048 << (extid & 0x03); |
| 3430 | extid >>= 2; |
| 3431 | /* Calc oobsize */ |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 3432 | switch (((extid >> 2) & 0x04) | (extid & 0x03)) { |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3433 | case 1: |
| 3434 | mtd->oobsize = 128; |
| 3435 | break; |
| 3436 | case 2: |
| 3437 | mtd->oobsize = 218; |
| 3438 | break; |
| 3439 | case 3: |
| 3440 | mtd->oobsize = 400; |
| 3441 | break; |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 3442 | case 4: |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3443 | mtd->oobsize = 436; |
| 3444 | break; |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 3445 | case 5: |
| 3446 | mtd->oobsize = 512; |
| 3447 | break; |
| 3448 | case 6: |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 3449 | mtd->oobsize = 640; |
| 3450 | break; |
Huang Shijie | 94d04e8 | 2013-12-25 17:18:55 +0800 | [diff] [blame] | 3451 | case 7: |
| 3452 | default: /* Other cases are "reserved" (unknown) */ |
| 3453 | mtd->oobsize = 1024; |
| 3454 | break; |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3455 | } |
| 3456 | extid >>= 2; |
| 3457 | /* Calc blocksize */ |
| 3458 | mtd->erasesize = (128 * 1024) << |
| 3459 | (((extid >> 1) & 0x04) | (extid & 0x03)); |
| 3460 | *busw = 0; |
Brian Norris | 73ca392 | 2012-09-24 20:40:54 -0700 | [diff] [blame] | 3461 | } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX && |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 3462 | !nand_is_slc(chip)) { |
Brian Norris | 73ca392 | 2012-09-24 20:40:54 -0700 | [diff] [blame] | 3463 | unsigned int tmp; |
| 3464 | |
| 3465 | /* Calc pagesize */ |
| 3466 | mtd->writesize = 2048 << (extid & 0x03); |
| 3467 | extid >>= 2; |
| 3468 | /* Calc oobsize */ |
| 3469 | switch (((extid >> 2) & 0x04) | (extid & 0x03)) { |
| 3470 | case 0: |
| 3471 | mtd->oobsize = 128; |
| 3472 | break; |
| 3473 | case 1: |
| 3474 | mtd->oobsize = 224; |
| 3475 | break; |
| 3476 | case 2: |
| 3477 | mtd->oobsize = 448; |
| 3478 | break; |
| 3479 | case 3: |
| 3480 | mtd->oobsize = 64; |
| 3481 | break; |
| 3482 | case 4: |
| 3483 | mtd->oobsize = 32; |
| 3484 | break; |
| 3485 | case 5: |
| 3486 | mtd->oobsize = 16; |
| 3487 | break; |
| 3488 | default: |
| 3489 | mtd->oobsize = 640; |
| 3490 | break; |
| 3491 | } |
| 3492 | extid >>= 2; |
| 3493 | /* Calc blocksize */ |
| 3494 | tmp = ((extid >> 1) & 0x04) | (extid & 0x03); |
| 3495 | if (tmp < 0x03) |
| 3496 | mtd->erasesize = (128 * 1024) << tmp; |
| 3497 | else if (tmp == 0x03) |
| 3498 | mtd->erasesize = 768 * 1024; |
| 3499 | else |
| 3500 | mtd->erasesize = (64 * 1024) << tmp; |
| 3501 | *busw = 0; |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3502 | } else { |
| 3503 | /* Calc pagesize */ |
| 3504 | mtd->writesize = 1024 << (extid & 0x03); |
| 3505 | extid >>= 2; |
| 3506 | /* Calc oobsize */ |
| 3507 | mtd->oobsize = (8 << (extid & 0x01)) * |
| 3508 | (mtd->writesize >> 9); |
| 3509 | extid >>= 2; |
| 3510 | /* Calc blocksize. Blocksize is multiples of 64KiB */ |
| 3511 | mtd->erasesize = (64 * 1024) << (extid & 0x03); |
| 3512 | extid >>= 2; |
| 3513 | /* Get buswidth information */ |
| 3514 | *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; |
Brian Norris | 60c6738 | 2013-06-25 13:17:59 -0700 | [diff] [blame] | 3515 | |
| 3516 | /* |
| 3517 | * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per |
| 3518 | * 512B page. For Toshiba SLC, we decode the 5th/6th byte as |
| 3519 | * follows: |
| 3520 | * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm, |
| 3521 | * 110b -> 24nm |
| 3522 | * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC |
| 3523 | */ |
| 3524 | if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA && |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 3525 | nand_is_slc(chip) && |
Brian Norris | 60c6738 | 2013-06-25 13:17:59 -0700 | [diff] [blame] | 3526 | (id_data[5] & 0x7) == 0x6 /* 24nm */ && |
| 3527 | !(id_data[4] & 0x80) /* !BENAND */) { |
| 3528 | mtd->oobsize = 32 * mtd->writesize >> 9; |
| 3529 | } |
| 3530 | |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3531 | } |
| 3532 | } |
| 3533 | |
| 3534 | /* |
Brian Norris | f23a481 | 2012-09-24 20:40:51 -0700 | [diff] [blame] | 3535 | * Old devices have chip data hardcoded in the device ID table. nand_decode_id |
| 3536 | * decodes a matching ID table entry and assigns the MTD size parameters for |
| 3537 | * the chip. |
| 3538 | */ |
| 3539 | static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip, |
| 3540 | struct nand_flash_dev *type, u8 id_data[8], |
| 3541 | int *busw) |
| 3542 | { |
| 3543 | int maf_id = id_data[0]; |
| 3544 | |
| 3545 | mtd->erasesize = type->erasesize; |
| 3546 | mtd->writesize = type->pagesize; |
| 3547 | mtd->oobsize = mtd->writesize / 32; |
| 3548 | *busw = type->options & NAND_BUSWIDTH_16; |
| 3549 | |
Huang Shijie | 1c195e9 | 2013-09-25 14:58:12 +0800 | [diff] [blame] | 3550 | /* All legacy ID NAND are small-page, SLC */ |
| 3551 | chip->bits_per_cell = 1; |
| 3552 | |
Brian Norris | f23a481 | 2012-09-24 20:40:51 -0700 | [diff] [blame] | 3553 | /* |
| 3554 | * Check for Spansion/AMD ID + repeating 5th, 6th byte since |
| 3555 | * some Spansion chips have erasesize that conflicts with size |
| 3556 | * listed in nand_ids table. |
| 3557 | * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) |
| 3558 | */ |
| 3559 | if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00 |
| 3560 | && id_data[6] == 0x00 && id_data[7] == 0x00 |
| 3561 | && mtd->writesize == 512) { |
| 3562 | mtd->erasesize = 128 * 1024; |
| 3563 | mtd->erasesize <<= ((id_data[3] & 0x03) << 1); |
| 3564 | } |
| 3565 | } |
| 3566 | |
| 3567 | /* |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3568 | * Set the bad block marker/indicator (BBM/BBI) patterns according to some |
| 3569 | * heuristic patterns using various detected parameters (e.g., manufacturer, |
| 3570 | * page size, cell-type information). |
| 3571 | */ |
| 3572 | static void nand_decode_bbm_options(struct mtd_info *mtd, |
| 3573 | struct nand_chip *chip, u8 id_data[8]) |
| 3574 | { |
| 3575 | int maf_id = id_data[0]; |
| 3576 | |
| 3577 | /* Set the bad block position */ |
| 3578 | if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16)) |
| 3579 | chip->badblockpos = NAND_LARGE_BADBLOCK_POS; |
| 3580 | else |
| 3581 | chip->badblockpos = NAND_SMALL_BADBLOCK_POS; |
| 3582 | |
| 3583 | /* |
| 3584 | * Bad block marker is stored in the last page of each block on Samsung |
| 3585 | * and Hynix MLC devices; stored in first two pages of each block on |
| 3586 | * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba, |
| 3587 | * AMD/Spansion, and Macronix. All others scan only the first page. |
| 3588 | */ |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 3589 | if (!nand_is_slc(chip) && |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3590 | (maf_id == NAND_MFR_SAMSUNG || |
| 3591 | maf_id == NAND_MFR_HYNIX)) |
| 3592 | chip->bbt_options |= NAND_BBT_SCANLASTPAGE; |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 3593 | else if ((nand_is_slc(chip) && |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3594 | (maf_id == NAND_MFR_SAMSUNG || |
| 3595 | maf_id == NAND_MFR_HYNIX || |
| 3596 | maf_id == NAND_MFR_TOSHIBA || |
| 3597 | maf_id == NAND_MFR_AMD || |
| 3598 | maf_id == NAND_MFR_MACRONIX)) || |
| 3599 | (mtd->writesize == 2048 && |
| 3600 | maf_id == NAND_MFR_MICRON)) |
| 3601 | chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; |
| 3602 | } |
| 3603 | |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3604 | static inline bool is_full_id_nand(struct nand_flash_dev *type) |
| 3605 | { |
| 3606 | return type->id_len; |
| 3607 | } |
| 3608 | |
| 3609 | static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip, |
| 3610 | struct nand_flash_dev *type, u8 *id_data, int *busw) |
| 3611 | { |
| 3612 | if (!strncmp(type->id, id_data, type->id_len)) { |
| 3613 | mtd->writesize = type->pagesize; |
| 3614 | mtd->erasesize = type->erasesize; |
| 3615 | mtd->oobsize = type->oobsize; |
| 3616 | |
Huang Shijie | 7db906b | 2013-09-25 14:58:11 +0800 | [diff] [blame] | 3617 | chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3618 | chip->chipsize = (uint64_t)type->chipsize << 20; |
| 3619 | chip->options |= type->options; |
Huang Shijie | 5721934 | 2013-05-17 11:17:32 +0800 | [diff] [blame] | 3620 | chip->ecc_strength_ds = NAND_ECC_STRENGTH(type); |
| 3621 | chip->ecc_step_ds = NAND_ECC_STEP(type); |
Boris BREZILLON | 57a94e2 | 2014-09-22 20:11:50 +0200 | [diff] [blame] | 3622 | chip->onfi_timing_mode_default = |
| 3623 | type->onfi_timing_mode_default; |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3624 | |
| 3625 | *busw = type->options & NAND_BUSWIDTH_16; |
| 3626 | |
Cai Zhiyong | 092b6a1 | 2013-12-25 21:19:21 +0800 | [diff] [blame] | 3627 | if (!mtd->name) |
| 3628 | mtd->name = type->name; |
| 3629 | |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3630 | return true; |
| 3631 | } |
| 3632 | return false; |
| 3633 | } |
| 3634 | |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3635 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3636 | * Get the flash and manufacturer id and lookup if the type is supported. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3637 | */ |
| 3638 | static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3639 | struct nand_chip *chip, |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3640 | int *maf_id, int *dev_id, |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3641 | struct nand_flash_dev *type) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3642 | { |
Cai Zhiyong | bb77082 | 2013-12-25 20:11:15 +0800 | [diff] [blame] | 3643 | int busw; |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3644 | int i, maf_idx; |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 3645 | u8 id_data[8]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3646 | |
| 3647 | /* Select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3648 | chip->select_chip(mtd, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3649 | |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 3650 | /* |
| 3651 | * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3652 | * after power-up. |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 3653 | */ |
| 3654 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
| 3655 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3656 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3657 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3658 | |
| 3659 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3660 | *maf_id = chip->read_byte(mtd); |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3661 | *dev_id = chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3662 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3663 | /* |
| 3664 | * Try again to make sure, as some systems the bus-hold or other |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 3665 | * interface concerns can cause random data which looks like a |
| 3666 | * possibly credible NAND flash to appear. If the two results do |
| 3667 | * not match, ignore the device completely. |
| 3668 | */ |
| 3669 | |
| 3670 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
| 3671 | |
Brian Norris | 4aef9b7 | 2012-09-24 20:40:48 -0700 | [diff] [blame] | 3672 | /* Read entire ID string */ |
| 3673 | for (i = 0; i < 8; i++) |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 3674 | id_data[i] = chip->read_byte(mtd); |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 3675 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3676 | if (id_data[0] != *maf_id || id_data[1] != *dev_id) { |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 3677 | pr_info("second ID read did not match %02x,%02x against %02x,%02x\n", |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3678 | *maf_id, *dev_id, id_data[0], id_data[1]); |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 3679 | return ERR_PTR(-ENODEV); |
| 3680 | } |
| 3681 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3682 | if (!type) |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3683 | type = nand_flash_ids; |
| 3684 | |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3685 | for (; type->name != NULL; type++) { |
| 3686 | if (is_full_id_nand(type)) { |
| 3687 | if (find_full_id_nand(mtd, chip, type, id_data, &busw)) |
| 3688 | goto ident_done; |
| 3689 | } else if (*dev_id == type->dev_id) { |
| 3690 | break; |
| 3691 | } |
| 3692 | } |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3693 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3694 | chip->onfi_version = 0; |
| 3695 | if (!type->name || !type->pagesize) { |
Masahiro Yamada | 35fc519 | 2014-04-09 16:26:26 +0900 | [diff] [blame] | 3696 | /* Check if the chip is ONFI compliant */ |
Brian Norris | 47450b3 | 2012-09-24 20:40:47 -0700 | [diff] [blame] | 3697 | if (nand_flash_detect_onfi(mtd, chip, &busw)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3698 | goto ident_done; |
Huang Shijie | 9136181 | 2014-02-21 13:39:40 +0800 | [diff] [blame] | 3699 | |
| 3700 | /* Check if the chip is JEDEC compliant */ |
| 3701 | if (nand_flash_detect_jedec(mtd, chip, &busw)) |
| 3702 | goto ident_done; |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3703 | } |
| 3704 | |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3705 | if (!type->name) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3706 | return ERR_PTR(-ENODEV); |
| 3707 | |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 3708 | if (!mtd->name) |
| 3709 | mtd->name = type->name; |
| 3710 | |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 3711 | chip->chipsize = (uint64_t)type->chipsize << 20; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3712 | |
Huang Shijie | 12a40a5 | 2010-09-27 10:43:53 +0800 | [diff] [blame] | 3713 | if (!type->pagesize && chip->init_size) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3714 | /* Set the pagesize, oobsize, erasesize by the driver */ |
Huang Shijie | 12a40a5 | 2010-09-27 10:43:53 +0800 | [diff] [blame] | 3715 | busw = chip->init_size(mtd, chip, id_data); |
| 3716 | } else if (!type->pagesize) { |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3717 | /* Decode parameters from extended ID */ |
| 3718 | nand_decode_ext_id(mtd, chip, id_data, &busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3719 | } else { |
Brian Norris | f23a481 | 2012-09-24 20:40:51 -0700 | [diff] [blame] | 3720 | nand_decode_id(mtd, chip, type, id_data, &busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3721 | } |
Brian Norris | bf7a01b | 2012-07-13 09:28:24 -0700 | [diff] [blame] | 3722 | /* Get chip options */ |
| 3723 | chip->options |= type->options; |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3724 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3725 | /* |
| 3726 | * Check if chip is not a Samsung device. Do not clear the |
| 3727 | * options for chips which do not have an extended id. |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3728 | */ |
| 3729 | if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) |
| 3730 | chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; |
| 3731 | ident_done: |
| 3732 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3733 | /* Try to identify manufacturer */ |
David Woodhouse | 9a90986 | 2006-07-15 13:26:18 +0100 | [diff] [blame] | 3734 | for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3735 | if (nand_manuf_ids[maf_idx].id == *maf_id) |
| 3736 | break; |
| 3737 | } |
| 3738 | |
Matthieu CASTET | 64b37b2 | 2012-11-06 11:51:44 +0100 | [diff] [blame] | 3739 | if (chip->options & NAND_BUSWIDTH_AUTO) { |
| 3740 | WARN_ON(chip->options & NAND_BUSWIDTH_16); |
| 3741 | chip->options |= busw; |
| 3742 | nand_set_defaults(chip, busw); |
| 3743 | } else if (busw != (chip->options & NAND_BUSWIDTH_16)) { |
| 3744 | /* |
| 3745 | * Check, if buswidth is correct. Hardware drivers should set |
| 3746 | * chip correct! |
| 3747 | */ |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 3748 | pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", |
| 3749 | *maf_id, *dev_id); |
| 3750 | pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, mtd->name); |
| 3751 | pr_warn("bus width %d instead %d bit\n", |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3752 | (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, |
| 3753 | busw ? 16 : 8); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3754 | return ERR_PTR(-EINVAL); |
| 3755 | } |
| 3756 | |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3757 | nand_decode_bbm_options(mtd, chip, id_data); |
| 3758 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3759 | /* Calculate the address shift from the page size */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3760 | chip->page_shift = ffs(mtd->writesize) - 1; |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3761 | /* Convert chipsize to number of pages per chip -1 */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3762 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3763 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3764 | chip->bbt_erase_shift = chip->phys_erase_shift = |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3765 | ffs(mtd->erasesize) - 1; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 3766 | if (chip->chipsize & 0xffffffff) |
| 3767 | chip->chip_shift = ffs((unsigned)chip->chipsize) - 1; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3768 | else { |
| 3769 | chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)); |
| 3770 | chip->chip_shift += 32 - 1; |
| 3771 | } |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3772 | |
Artem Bityutskiy | 26d9be1 | 2011-04-28 20:26:59 +0300 | [diff] [blame] | 3773 | chip->badblockbits = 8; |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 3774 | chip->erase = single_erase; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3775 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3776 | /* Do not replace user supplied command function! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3777 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 3778 | chip->cmdfunc = nand_command_lp; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3779 | |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 3780 | pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", |
| 3781 | *maf_id, *dev_id); |
Huang Shijie | ffdac6cd | 2014-02-21 13:39:41 +0800 | [diff] [blame] | 3782 | |
| 3783 | if (chip->onfi_version) |
| 3784 | pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, |
| 3785 | chip->onfi_params.model); |
| 3786 | else if (chip->jedec_version) |
| 3787 | pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, |
| 3788 | chip->jedec_params.model); |
| 3789 | else |
| 3790 | pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, |
| 3791 | type->name); |
| 3792 | |
Rafał Miłecki | 3755a99 | 2014-10-21 00:01:04 +0200 | [diff] [blame] | 3793 | pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n", |
Huang Shijie | 3723e93 | 2013-09-25 14:58:14 +0800 | [diff] [blame] | 3794 | (int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC", |
Rafał Miłecki | 3755a99 | 2014-10-21 00:01:04 +0200 | [diff] [blame] | 3795 | mtd->erasesize >> 10, mtd->writesize, mtd->oobsize); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3796 | return type; |
| 3797 | } |
| 3798 | |
Brian Norris | 5844fee | 2015-01-23 00:22:27 -0800 | [diff] [blame^] | 3799 | static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, |
| 3800 | struct device_node *dn) |
| 3801 | { |
| 3802 | int ecc_mode, ecc_strength, ecc_step; |
| 3803 | |
| 3804 | if (of_get_nand_bus_width(dn) == 16) |
| 3805 | chip->options |= NAND_BUSWIDTH_16; |
| 3806 | |
| 3807 | if (of_get_nand_on_flash_bbt(dn)) |
| 3808 | chip->bbt_options |= NAND_BBT_USE_FLASH; |
| 3809 | |
| 3810 | ecc_mode = of_get_nand_ecc_mode(dn); |
| 3811 | ecc_strength = of_get_nand_ecc_strength(dn); |
| 3812 | ecc_step = of_get_nand_ecc_step_size(dn); |
| 3813 | |
| 3814 | if ((ecc_step >= 0 && !(ecc_strength >= 0)) || |
| 3815 | (!(ecc_step >= 0) && ecc_strength >= 0)) { |
| 3816 | pr_err("must set both strength and step size in DT\n"); |
| 3817 | return -EINVAL; |
| 3818 | } |
| 3819 | |
| 3820 | if (ecc_mode >= 0) |
| 3821 | chip->ecc.mode = ecc_mode; |
| 3822 | |
| 3823 | if (ecc_strength >= 0) |
| 3824 | chip->ecc.strength = ecc_strength; |
| 3825 | |
| 3826 | if (ecc_step > 0) |
| 3827 | chip->ecc.size = ecc_step; |
| 3828 | |
| 3829 | return 0; |
| 3830 | } |
| 3831 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3832 | /** |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3833 | * nand_scan_ident - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3834 | * @mtd: MTD device structure |
| 3835 | * @maxchips: number of chips to scan for |
| 3836 | * @table: alternative NAND ID table |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3837 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3838 | * This is the first phase of the normal nand_scan() function. It reads the |
| 3839 | * flash ID and sets up MTD fields accordingly. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3840 | * |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3841 | * The mtd->owner field must be set to the module of the caller. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3842 | */ |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3843 | int nand_scan_ident(struct mtd_info *mtd, int maxchips, |
| 3844 | struct nand_flash_dev *table) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3845 | { |
Cai Zhiyong | bb77082 | 2013-12-25 20:11:15 +0800 | [diff] [blame] | 3846 | int i, nand_maf_id, nand_dev_id; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3847 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3848 | struct nand_flash_dev *type; |
Brian Norris | 5844fee | 2015-01-23 00:22:27 -0800 | [diff] [blame^] | 3849 | int ret; |
| 3850 | |
| 3851 | if (chip->dn) { |
| 3852 | ret = nand_dt_init(mtd, chip, chip->dn); |
| 3853 | if (ret) |
| 3854 | return ret; |
| 3855 | } |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3856 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3857 | /* Set the default functions */ |
Cai Zhiyong | bb77082 | 2013-12-25 20:11:15 +0800 | [diff] [blame] | 3858 | nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3859 | |
| 3860 | /* Read the flash type */ |
Cai Zhiyong | bb77082 | 2013-12-25 20:11:15 +0800 | [diff] [blame] | 3861 | type = nand_get_flash_type(mtd, chip, &nand_maf_id, |
| 3862 | &nand_dev_id, table); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3863 | |
| 3864 | if (IS_ERR(type)) { |
Ben Dooks | b1c6e6d | 2009-11-02 18:12:33 +0000 | [diff] [blame] | 3865 | if (!(chip->options & NAND_SCAN_SILENT_NODEV)) |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3866 | pr_warn("No NAND device found\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3867 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3868 | return PTR_ERR(type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3869 | } |
| 3870 | |
Huang Shijie | 0730016 | 2012-11-09 16:23:45 +0800 | [diff] [blame] | 3871 | chip->select_chip(mtd, -1); |
| 3872 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3873 | /* Check for a chip array */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3874 | for (i = 1; i < maxchips; i++) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3875 | chip->select_chip(mtd, i); |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 3876 | /* See comment in nand_get_flash_type for reset */ |
| 3877 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3878 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3879 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3880 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3881 | if (nand_maf_id != chip->read_byte(mtd) || |
Huang Shijie | 0730016 | 2012-11-09 16:23:45 +0800 | [diff] [blame] | 3882 | nand_dev_id != chip->read_byte(mtd)) { |
| 3883 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3884 | break; |
Huang Shijie | 0730016 | 2012-11-09 16:23:45 +0800 | [diff] [blame] | 3885 | } |
| 3886 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3887 | } |
| 3888 | if (i > 1) |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 3889 | pr_info("%d chips detected\n", i); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3890 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3891 | /* Store the number of chips and calc total size for mtd */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3892 | chip->numchips = i; |
| 3893 | mtd->size = i * chip->chipsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3894 | |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3895 | return 0; |
| 3896 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3897 | EXPORT_SYMBOL(nand_scan_ident); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3898 | |
Ezequiel Garcia | 67a9ad9 | 2014-05-14 14:58:06 -0300 | [diff] [blame] | 3899 | /* |
| 3900 | * Check if the chip configuration meet the datasheet requirements. |
| 3901 | |
| 3902 | * If our configuration corrects A bits per B bytes and the minimum |
| 3903 | * required correction level is X bits per Y bytes, then we must ensure |
| 3904 | * both of the following are true: |
| 3905 | * |
| 3906 | * (1) A / B >= X / Y |
| 3907 | * (2) A >= X |
| 3908 | * |
| 3909 | * Requirement (1) ensures we can correct for the required bitflip density. |
| 3910 | * Requirement (2) ensures we can correct even when all bitflips are clumped |
| 3911 | * in the same sector. |
| 3912 | */ |
| 3913 | static bool nand_ecc_strength_good(struct mtd_info *mtd) |
| 3914 | { |
| 3915 | struct nand_chip *chip = mtd->priv; |
| 3916 | struct nand_ecc_ctrl *ecc = &chip->ecc; |
| 3917 | int corr, ds_corr; |
| 3918 | |
| 3919 | if (ecc->size == 0 || chip->ecc_step_ds == 0) |
| 3920 | /* Not enough information */ |
| 3921 | return true; |
| 3922 | |
| 3923 | /* |
| 3924 | * We get the number of corrected bits per page to compare |
| 3925 | * the correction density. |
| 3926 | */ |
| 3927 | corr = (mtd->writesize * ecc->strength) / ecc->size; |
| 3928 | ds_corr = (mtd->writesize * chip->ecc_strength_ds) / chip->ecc_step_ds; |
| 3929 | |
| 3930 | return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds; |
| 3931 | } |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3932 | |
| 3933 | /** |
| 3934 | * nand_scan_tail - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3935 | * @mtd: MTD device structure |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3936 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3937 | * This is the second phase of the normal nand_scan() function. It fills out |
| 3938 | * all the uninitialized function pointers with the defaults and scans for a |
| 3939 | * bad block table if appropriate. |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3940 | */ |
| 3941 | int nand_scan_tail(struct mtd_info *mtd) |
| 3942 | { |
| 3943 | int i; |
| 3944 | struct nand_chip *chip = mtd->priv; |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 3945 | struct nand_ecc_ctrl *ecc = &chip->ecc; |
Huang Shijie | f02ea4e | 2014-01-13 14:27:12 +0800 | [diff] [blame] | 3946 | struct nand_buffers *nbuf; |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3947 | |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 3948 | /* New bad blocks should be marked in OOB, flash-based BBT, or both */ |
| 3949 | BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && |
| 3950 | !(chip->bbt_options & NAND_BBT_USE_FLASH)); |
| 3951 | |
Huang Shijie | f02ea4e | 2014-01-13 14:27:12 +0800 | [diff] [blame] | 3952 | if (!(chip->options & NAND_OWN_BUFFERS)) { |
| 3953 | nbuf = kzalloc(sizeof(*nbuf) + mtd->writesize |
| 3954 | + mtd->oobsize * 3, GFP_KERNEL); |
| 3955 | if (!nbuf) |
| 3956 | return -ENOMEM; |
| 3957 | nbuf->ecccalc = (uint8_t *)(nbuf + 1); |
| 3958 | nbuf->ecccode = nbuf->ecccalc + mtd->oobsize; |
| 3959 | nbuf->databuf = nbuf->ecccode + mtd->oobsize; |
| 3960 | |
| 3961 | chip->buffers = nbuf; |
| 3962 | } else { |
| 3963 | if (!chip->buffers) |
| 3964 | return -ENOMEM; |
| 3965 | } |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 3966 | |
David Woodhouse | 7dcdcbef | 2006-10-21 17:09:53 +0100 | [diff] [blame] | 3967 | /* Set the internal oob buffer location, just after the page data */ |
David Woodhouse | 784f4d5 | 2006-10-22 01:47:45 +0100 | [diff] [blame] | 3968 | chip->oob_poi = chip->buffers->databuf + mtd->writesize; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3969 | |
| 3970 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3971 | * If no default placement scheme is given, select an appropriate one. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3972 | */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 3973 | if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3974 | switch (mtd->oobsize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3975 | case 8: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 3976 | ecc->layout = &nand_oob_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3977 | break; |
| 3978 | case 16: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 3979 | ecc->layout = &nand_oob_16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3980 | break; |
| 3981 | case 64: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 3982 | ecc->layout = &nand_oob_64; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3983 | break; |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 3984 | case 128: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 3985 | ecc->layout = &nand_oob_128; |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 3986 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3987 | default: |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3988 | pr_warn("No oob scheme defined for oobsize %d\n", |
| 3989 | mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3990 | BUG(); |
| 3991 | } |
| 3992 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 3993 | |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 3994 | if (!chip->write_page) |
| 3995 | chip->write_page = nand_write_page; |
| 3996 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3997 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3998 | * Check ECC mode, default to software if 3byte/512byte hardware ECC is |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3999 | * selected and we have 256 byte pagesize fallback to software ECC |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4000 | */ |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 4001 | |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4002 | switch (ecc->mode) { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 4003 | case NAND_ECC_HW_OOB_FIRST: |
| 4004 | /* Similar to NAND_ECC_HW, but a separate read_page handle */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4005 | if (!ecc->calculate || !ecc->correct || !ecc->hwctl) { |
Rafał Miłecki | 2ac63d9 | 2014-08-19 13:55:34 +0200 | [diff] [blame] | 4006 | pr_warn("No ECC functions supplied; hardware ECC not possible\n"); |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 4007 | BUG(); |
| 4008 | } |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4009 | if (!ecc->read_page) |
| 4010 | ecc->read_page = nand_read_page_hwecc_oob_first; |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 4011 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4012 | case NAND_ECC_HW: |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4013 | /* Use standard hwecc read page function? */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4014 | if (!ecc->read_page) |
| 4015 | ecc->read_page = nand_read_page_hwecc; |
| 4016 | if (!ecc->write_page) |
| 4017 | ecc->write_page = nand_write_page_hwecc; |
| 4018 | if (!ecc->read_page_raw) |
| 4019 | ecc->read_page_raw = nand_read_page_raw; |
| 4020 | if (!ecc->write_page_raw) |
| 4021 | ecc->write_page_raw = nand_write_page_raw; |
| 4022 | if (!ecc->read_oob) |
| 4023 | ecc->read_oob = nand_read_oob_std; |
| 4024 | if (!ecc->write_oob) |
| 4025 | ecc->write_oob = nand_write_oob_std; |
| 4026 | if (!ecc->read_subpage) |
| 4027 | ecc->read_subpage = nand_read_subpage; |
| 4028 | if (!ecc->write_subpage) |
| 4029 | ecc->write_subpage = nand_write_subpage_hwecc; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 4030 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4031 | case NAND_ECC_HW_SYNDROME: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4032 | if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && |
| 4033 | (!ecc->read_page || |
| 4034 | ecc->read_page == nand_read_page_hwecc || |
| 4035 | !ecc->write_page || |
| 4036 | ecc->write_page == nand_write_page_hwecc)) { |
Rafał Miłecki | 2ac63d9 | 2014-08-19 13:55:34 +0200 | [diff] [blame] | 4037 | pr_warn("No ECC functions supplied; hardware ECC not possible\n"); |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4038 | BUG(); |
| 4039 | } |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4040 | /* Use standard syndrome read/write page function? */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4041 | if (!ecc->read_page) |
| 4042 | ecc->read_page = nand_read_page_syndrome; |
| 4043 | if (!ecc->write_page) |
| 4044 | ecc->write_page = nand_write_page_syndrome; |
| 4045 | if (!ecc->read_page_raw) |
| 4046 | ecc->read_page_raw = nand_read_page_raw_syndrome; |
| 4047 | if (!ecc->write_page_raw) |
| 4048 | ecc->write_page_raw = nand_write_page_raw_syndrome; |
| 4049 | if (!ecc->read_oob) |
| 4050 | ecc->read_oob = nand_read_oob_syndrome; |
| 4051 | if (!ecc->write_oob) |
| 4052 | ecc->write_oob = nand_write_oob_syndrome; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 4053 | |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4054 | if (mtd->writesize >= ecc->size) { |
| 4055 | if (!ecc->strength) { |
Mike Dunn | e2788c9 | 2012-04-25 12:06:10 -0700 | [diff] [blame] | 4056 | pr_warn("Driver must set ecc.strength when using hardware ECC\n"); |
| 4057 | BUG(); |
| 4058 | } |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4059 | break; |
Mike Dunn | e2788c9 | 2012-04-25 12:06:10 -0700 | [diff] [blame] | 4060 | } |
Rafał Miłecki | 2ac63d9 | 2014-08-19 13:55:34 +0200 | [diff] [blame] | 4061 | pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n", |
| 4062 | ecc->size, mtd->writesize); |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4063 | ecc->mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4064 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4065 | case NAND_ECC_SOFT: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4066 | ecc->calculate = nand_calculate_ecc; |
| 4067 | ecc->correct = nand_correct_data; |
| 4068 | ecc->read_page = nand_read_page_swecc; |
| 4069 | ecc->read_subpage = nand_read_subpage; |
| 4070 | ecc->write_page = nand_write_page_swecc; |
| 4071 | ecc->read_page_raw = nand_read_page_raw; |
| 4072 | ecc->write_page_raw = nand_write_page_raw; |
| 4073 | ecc->read_oob = nand_read_oob_std; |
| 4074 | ecc->write_oob = nand_write_oob_std; |
| 4075 | if (!ecc->size) |
| 4076 | ecc->size = 256; |
| 4077 | ecc->bytes = 3; |
| 4078 | ecc->strength = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4079 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4080 | |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4081 | case NAND_ECC_SOFT_BCH: |
| 4082 | if (!mtd_nand_has_bch()) { |
Erico Nunes | 148256f | 2014-03-11 01:31:26 -0300 | [diff] [blame] | 4083 | pr_warn("CONFIG_MTD_NAND_ECC_BCH not enabled\n"); |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4084 | BUG(); |
| 4085 | } |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4086 | ecc->calculate = nand_bch_calculate_ecc; |
| 4087 | ecc->correct = nand_bch_correct_data; |
| 4088 | ecc->read_page = nand_read_page_swecc; |
| 4089 | ecc->read_subpage = nand_read_subpage; |
| 4090 | ecc->write_page = nand_write_page_swecc; |
| 4091 | ecc->read_page_raw = nand_read_page_raw; |
| 4092 | ecc->write_page_raw = nand_write_page_raw; |
| 4093 | ecc->read_oob = nand_read_oob_std; |
| 4094 | ecc->write_oob = nand_write_oob_std; |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4095 | /* |
Aaron Sierra | e0377cd | 2015-01-14 17:41:31 -0600 | [diff] [blame] | 4096 | * Board driver should supply ecc.size and ecc.strength values |
| 4097 | * to select how many bits are correctable. Otherwise, default |
| 4098 | * to 4 bits for large page devices. |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4099 | */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4100 | if (!ecc->size && (mtd->oobsize >= 64)) { |
| 4101 | ecc->size = 512; |
Aaron Sierra | e0377cd | 2015-01-14 17:41:31 -0600 | [diff] [blame] | 4102 | ecc->strength = 4; |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4103 | } |
Aaron Sierra | e0377cd | 2015-01-14 17:41:31 -0600 | [diff] [blame] | 4104 | |
| 4105 | /* See nand_bch_init() for details. */ |
| 4106 | ecc->bytes = DIV_ROUND_UP( |
| 4107 | ecc->strength * fls(8 * ecc->size), 8); |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4108 | ecc->priv = nand_bch_init(mtd, ecc->size, ecc->bytes, |
| 4109 | &ecc->layout); |
| 4110 | if (!ecc->priv) { |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 4111 | pr_warn("BCH ECC initialization failed!\n"); |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4112 | BUG(); |
| 4113 | } |
| 4114 | break; |
| 4115 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4116 | case NAND_ECC_NONE: |
Rafał Miłecki | 2ac63d9 | 2014-08-19 13:55:34 +0200 | [diff] [blame] | 4117 | pr_warn("NAND_ECC_NONE selected by board driver. This is not recommended!\n"); |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4118 | ecc->read_page = nand_read_page_raw; |
| 4119 | ecc->write_page = nand_write_page_raw; |
| 4120 | ecc->read_oob = nand_read_oob_std; |
| 4121 | ecc->read_page_raw = nand_read_page_raw; |
| 4122 | ecc->write_page_raw = nand_write_page_raw; |
| 4123 | ecc->write_oob = nand_write_oob_std; |
| 4124 | ecc->size = mtd->writesize; |
| 4125 | ecc->bytes = 0; |
| 4126 | ecc->strength = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4127 | break; |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 4128 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4129 | default: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4130 | pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4131 | BUG(); |
| 4132 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4133 | |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 4134 | /* For many systems, the standard OOB write also works for raw */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4135 | if (!ecc->read_oob_raw) |
| 4136 | ecc->read_oob_raw = ecc->read_oob; |
| 4137 | if (!ecc->write_oob_raw) |
| 4138 | ecc->write_oob_raw = ecc->write_oob; |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 4139 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4140 | /* |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 4141 | * The number of bytes available for a client to place data into |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4142 | * the out of band area. |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 4143 | */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4144 | ecc->layout->oobavail = 0; |
| 4145 | for (i = 0; ecc->layout->oobfree[i].length |
| 4146 | && i < ARRAY_SIZE(ecc->layout->oobfree); i++) |
| 4147 | ecc->layout->oobavail += ecc->layout->oobfree[i].length; |
| 4148 | mtd->oobavail = ecc->layout->oobavail; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 4149 | |
Thomas Petazzoni | 54c39e9 | 2014-07-02 15:16:32 +0200 | [diff] [blame] | 4150 | /* ECC sanity check: warn if it's too weak */ |
| 4151 | if (!nand_ecc_strength_good(mtd)) |
| 4152 | pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the NAND chip\n", |
| 4153 | mtd->name); |
Ezequiel Garcia | 67a9ad9 | 2014-05-14 14:58:06 -0300 | [diff] [blame] | 4154 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 4155 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4156 | * Set the number of read / write steps for one page depending on ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4157 | * mode. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4158 | */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4159 | ecc->steps = mtd->writesize / ecc->size; |
| 4160 | if (ecc->steps * ecc->size != mtd->writesize) { |
Brian Norris | 9a4d4d6 | 2011-07-19 10:06:07 -0700 | [diff] [blame] | 4161 | pr_warn("Invalid ECC parameters\n"); |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4162 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4163 | } |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4164 | ecc->total = ecc->steps * ecc->bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4165 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4166 | /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 4167 | if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4168 | switch (ecc->steps) { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 4169 | case 2: |
| 4170 | mtd->subpage_sft = 1; |
| 4171 | break; |
| 4172 | case 4: |
| 4173 | case 8: |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 4174 | case 16: |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 4175 | mtd->subpage_sft = 2; |
| 4176 | break; |
| 4177 | } |
| 4178 | } |
| 4179 | chip->subpagesize = mtd->writesize >> mtd->subpage_sft; |
| 4180 | |
Thomas Gleixner | 04bbd0e | 2006-05-25 09:45:29 +0200 | [diff] [blame] | 4181 | /* Initialize state */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4182 | chip->state = FL_READY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4183 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4184 | /* Invalidate the pagebuffer reference */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4185 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4186 | |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 4187 | /* Large page NAND with SOFT_ECC should support subpage reads */ |
Ron Lee | 4007e2d | 2014-04-25 15:01:35 +0930 | [diff] [blame] | 4188 | switch (ecc->mode) { |
| 4189 | case NAND_ECC_SOFT: |
| 4190 | case NAND_ECC_SOFT_BCH: |
| 4191 | if (chip->page_shift > 9) |
| 4192 | chip->options |= NAND_SUBPAGE_READ; |
| 4193 | break; |
| 4194 | |
| 4195 | default: |
| 4196 | break; |
| 4197 | } |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 4198 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4199 | /* Fill in remaining MTD driver data */ |
Huang Shijie | 963d1c2 | 2013-09-25 14:58:21 +0800 | [diff] [blame] | 4200 | mtd->type = nand_is_slc(chip) ? MTD_NANDFLASH : MTD_MLCNANDFLASH; |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 4201 | mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM : |
| 4202 | MTD_CAP_NANDFLASH; |
Artem Bityutskiy | 3c3c10b | 2012-01-30 14:58:32 +0200 | [diff] [blame] | 4203 | mtd->_erase = nand_erase; |
| 4204 | mtd->_point = NULL; |
| 4205 | mtd->_unpoint = NULL; |
| 4206 | mtd->_read = nand_read; |
| 4207 | mtd->_write = nand_write; |
| 4208 | mtd->_panic_write = panic_nand_write; |
| 4209 | mtd->_read_oob = nand_read_oob; |
| 4210 | mtd->_write_oob = nand_write_oob; |
| 4211 | mtd->_sync = nand_sync; |
| 4212 | mtd->_lock = NULL; |
| 4213 | mtd->_unlock = NULL; |
| 4214 | mtd->_suspend = nand_suspend; |
| 4215 | mtd->_resume = nand_resume; |
Scott Branden | 72ea403 | 2014-11-20 11:18:05 -0800 | [diff] [blame] | 4216 | mtd->_reboot = nand_shutdown; |
Ezequiel Garcia | 8471bb7 | 2014-05-21 19:06:12 -0300 | [diff] [blame] | 4217 | mtd->_block_isreserved = nand_block_isreserved; |
Artem Bityutskiy | 3c3c10b | 2012-01-30 14:58:32 +0200 | [diff] [blame] | 4218 | mtd->_block_isbad = nand_block_isbad; |
| 4219 | mtd->_block_markbad = nand_block_markbad; |
Anatolij Gustschin | cbcab65 | 2010-12-16 23:42:16 +0100 | [diff] [blame] | 4220 | mtd->writebufsize = mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4221 | |
Mike Dunn | 6a918ba | 2012-03-11 14:21:11 -0700 | [diff] [blame] | 4222 | /* propagate ecc info to mtd_info */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4223 | mtd->ecclayout = ecc->layout; |
| 4224 | mtd->ecc_strength = ecc->strength; |
| 4225 | mtd->ecc_step_size = ecc->size; |
Shmulik Ladkani | ea3b2ea | 2012-06-08 18:29:06 +0300 | [diff] [blame] | 4226 | /* |
| 4227 | * Initialize bitflip_threshold to its default prior scan_bbt() call. |
| 4228 | * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be |
| 4229 | * properly set. |
| 4230 | */ |
| 4231 | if (!mtd->bitflip_threshold) |
Brian Norris | 240181f | 2015-01-12 12:51:29 -0800 | [diff] [blame] | 4232 | mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4233 | |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 4234 | /* Check, if we should skip the bad block table scan */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4235 | if (chip->options & NAND_SKIP_BBTSCAN) |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 4236 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4237 | |
| 4238 | /* Build bad block table */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4239 | return chip->scan_bbt(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4240 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 4241 | EXPORT_SYMBOL(nand_scan_tail); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4242 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4243 | /* |
| 4244 | * is_module_text_address() isn't exported, and it's mostly a pointless |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 4245 | * test if this is a module _anyway_ -- they'd have to try _really_ hard |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4246 | * to call us from in-kernel code if the core NAND support is modular. |
| 4247 | */ |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4248 | #ifdef MODULE |
| 4249 | #define caller_is_module() (1) |
| 4250 | #else |
| 4251 | #define caller_is_module() \ |
Rusty Russell | a6e6abd | 2009-03-31 13:05:31 -0600 | [diff] [blame] | 4252 | is_module_text_address((unsigned long)__builtin_return_address(0)) |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4253 | #endif |
| 4254 | |
| 4255 | /** |
| 4256 | * nand_scan - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4257 | * @mtd: MTD device structure |
| 4258 | * @maxchips: number of chips to scan for |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4259 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4260 | * This fills out all the uninitialized function pointers with the defaults. |
| 4261 | * The flash ID is read and the mtd/chip structures are filled with the |
| 4262 | * appropriate values. The mtd->owner field must be set to the module of the |
| 4263 | * caller. |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4264 | */ |
| 4265 | int nand_scan(struct mtd_info *mtd, int maxchips) |
| 4266 | { |
| 4267 | int ret; |
| 4268 | |
| 4269 | /* Many callers got this wrong, so check for it for a while... */ |
| 4270 | if (!mtd->owner && caller_is_module()) { |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 4271 | pr_crit("%s called with NULL mtd->owner!\n", __func__); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4272 | BUG(); |
| 4273 | } |
| 4274 | |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 4275 | ret = nand_scan_ident(mtd, maxchips, NULL); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4276 | if (!ret) |
| 4277 | ret = nand_scan_tail(mtd); |
| 4278 | return ret; |
| 4279 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 4280 | EXPORT_SYMBOL(nand_scan); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4281 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4282 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4283 | * nand_release - [NAND Interface] Free resources held by the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4284 | * @mtd: MTD device structure |
| 4285 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4286 | void nand_release(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4287 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4288 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4289 | |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4290 | if (chip->ecc.mode == NAND_ECC_SOFT_BCH) |
| 4291 | nand_bch_free((struct nand_bch_control *)chip->ecc.priv); |
| 4292 | |
Jamie Iles | 5ffcaf3 | 2011-05-23 10:22:46 +0100 | [diff] [blame] | 4293 | mtd_device_unregister(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4294 | |
Jesper Juhl | fa67164 | 2005-11-07 01:01:27 -0800 | [diff] [blame] | 4295 | /* Free bad block table memory */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4296 | kfree(chip->bbt); |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 4297 | if (!(chip->options & NAND_OWN_BUFFERS)) |
| 4298 | kfree(chip->buffers); |
Brian Norris | 58373ff | 2010-07-15 12:15:44 -0700 | [diff] [blame] | 4299 | |
| 4300 | /* Free bad block descriptor memory */ |
| 4301 | if (chip->badblock_pattern && chip->badblock_pattern->options |
| 4302 | & NAND_BBT_DYNAMICSTRUCT) |
| 4303 | kfree(chip->badblock_pattern); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4304 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4305 | EXPORT_SYMBOL_GPL(nand_release); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 4306 | |
| 4307 | static int __init nand_base_init(void) |
| 4308 | { |
| 4309 | led_trigger_register_simple("nand-disk", &nand_led_trigger); |
| 4310 | return 0; |
| 4311 | } |
| 4312 | |
| 4313 | static void __exit nand_base_exit(void) |
| 4314 | { |
| 4315 | led_trigger_unregister_simple(nand_led_trigger); |
| 4316 | } |
| 4317 | |
| 4318 | module_init(nand_base_init); |
| 4319 | module_exit(nand_base_exit); |
| 4320 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4321 | MODULE_LICENSE("GPL"); |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 4322 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>"); |
| 4323 | MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>"); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4324 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |