blob: 2f0e14974a0868581f9c32082e701e8b5c2ed492 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
Jiri Pirko22a67762017-02-03 10:29:07 +01003 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
Jiri Pirko56ade8f2015-10-16 14:01:37 +02005 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Yotam Gigi98d0f7b2017-01-23 11:07:11 +010060#include <net/tc_act/tc_sample.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020061
62#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020063#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020064#include "core.h"
65#include "reg.h"
66#include "port.h"
67#include "trap.h"
68#include "txheader.h"
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +010069#include "spectrum_cnt.h"
Arkadi Sharshevsky230ead02017-03-28 17:24:12 +020070#include "spectrum_dpipe.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020071
72static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
73static const char mlxsw_sp_driver_version[] = "1.0";
74
75/* tx_hdr_version
76 * Tx header version.
77 * Must be set to 1.
78 */
79MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
80
81/* tx_hdr_ctl
82 * Packet control type.
83 * 0 - Ethernet control (e.g. EMADs, LACP)
84 * 1 - Ethernet data
85 */
86MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
87
88/* tx_hdr_proto
89 * Packet protocol type. Must be set to 1 (Ethernet).
90 */
91MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
92
93/* tx_hdr_rx_is_router
94 * Packet is sent from the router. Valid for data packets only.
95 */
96MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
97
98/* tx_hdr_fid_valid
99 * Indicates if the 'fid' field is valid and should be used for
100 * forwarding lookup. Valid for data packets only.
101 */
102MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
103
104/* tx_hdr_swid
105 * Switch partition ID. Must be set to 0.
106 */
107MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
108
109/* tx_hdr_control_tclass
110 * Indicates if the packet should use the control TClass and not one
111 * of the data TClasses.
112 */
113MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
114
115/* tx_hdr_etclass
116 * Egress TClass to be used on the egress device on the egress port.
117 */
118MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
119
120/* tx_hdr_port_mid
121 * Destination local port for unicast packets.
122 * Destination multicast ID for multicast packets.
123 *
124 * Control packets are directed to a specific egress port, while data
125 * packets are transmitted through the CPU port (0) into the switch partition,
126 * where forwarding rules are applied.
127 */
128MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
129
130/* tx_hdr_fid
131 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
132 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
133 * Valid for data packets only.
134 */
135MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
136
137/* tx_hdr_type
138 * 0 - Data packets
139 * 6 - Control packets
140 */
141MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
142
Arkadi Sharshevsky1abcbcc2017-03-11 09:42:53 +0100143int mlxsw_sp_flow_counter_get(struct mlxsw_sp *mlxsw_sp,
144 unsigned int counter_index, u64 *packets,
145 u64 *bytes)
146{
147 char mgpc_pl[MLXSW_REG_MGPC_LEN];
148 int err;
149
150 mlxsw_reg_mgpc_pack(mgpc_pl, counter_index, MLXSW_REG_MGPC_OPCODE_NOP,
151 MLXSW_REG_MGPC_COUNTER_SET_TYPE_PACKETS_BYTES);
152 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);
153 if (err)
154 return err;
155 *packets = mlxsw_reg_mgpc_packet_counter_get(mgpc_pl);
156 *bytes = mlxsw_reg_mgpc_byte_counter_get(mgpc_pl);
157 return 0;
158}
159
160static int mlxsw_sp_flow_counter_clear(struct mlxsw_sp *mlxsw_sp,
161 unsigned int counter_index)
162{
163 char mgpc_pl[MLXSW_REG_MGPC_LEN];
164
165 mlxsw_reg_mgpc_pack(mgpc_pl, counter_index, MLXSW_REG_MGPC_OPCODE_CLEAR,
166 MLXSW_REG_MGPC_COUNTER_SET_TYPE_PACKETS_BYTES);
167 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);
168}
169
170int mlxsw_sp_flow_counter_alloc(struct mlxsw_sp *mlxsw_sp,
171 unsigned int *p_counter_index)
172{
173 int err;
174
175 err = mlxsw_sp_counter_alloc(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
176 p_counter_index);
177 if (err)
178 return err;
179 err = mlxsw_sp_flow_counter_clear(mlxsw_sp, *p_counter_index);
180 if (err)
181 goto err_counter_clear;
182 return 0;
183
184err_counter_clear:
185 mlxsw_sp_counter_free(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
186 *p_counter_index);
187 return err;
188}
189
190void mlxsw_sp_flow_counter_free(struct mlxsw_sp *mlxsw_sp,
191 unsigned int counter_index)
192{
193 mlxsw_sp_counter_free(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
194 counter_index);
195}
196
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200197static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
198 const struct mlxsw_tx_info *tx_info)
199{
200 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
201
202 memset(txhdr, 0, MLXSW_TXHDR_LEN);
203
204 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
205 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
206 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
207 mlxsw_tx_hdr_swid_set(txhdr, 0);
208 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
209 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
210 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
211}
212
Ido Schimmelfe9ccc72017-05-16 19:38:31 +0200213int mlxsw_sp_port_vid_stp_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,
214 u8 state)
215{
216 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
217 enum mlxsw_reg_spms_state spms_state;
218 char *spms_pl;
219 int err;
220
221 switch (state) {
222 case BR_STATE_FORWARDING:
223 spms_state = MLXSW_REG_SPMS_STATE_FORWARDING;
224 break;
225 case BR_STATE_LEARNING:
226 spms_state = MLXSW_REG_SPMS_STATE_LEARNING;
227 break;
228 case BR_STATE_LISTENING: /* fall-through */
229 case BR_STATE_DISABLED: /* fall-through */
230 case BR_STATE_BLOCKING:
231 spms_state = MLXSW_REG_SPMS_STATE_DISCARDING;
232 break;
233 default:
234 BUG();
235 }
236
237 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
238 if (!spms_pl)
239 return -ENOMEM;
240 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
241 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
242
243 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
244 kfree(spms_pl);
245 return err;
246}
247
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200248static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
249{
Elad Raz5b090742016-10-28 21:35:46 +0200250 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200251 int err;
252
253 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
254 if (err)
255 return err;
256 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
257 return 0;
258}
259
Yotam Gigi763b4b72016-07-21 12:03:17 +0200260static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
261{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200262 int i;
263
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200264 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200265 return -EIO;
266
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200267 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
268 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200269 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
270 sizeof(struct mlxsw_sp_span_entry),
271 GFP_KERNEL);
272 if (!mlxsw_sp->span.entries)
273 return -ENOMEM;
274
275 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
276 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
277
278 return 0;
279}
280
281static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
282{
283 int i;
284
285 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
286 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
287
288 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
289 }
290 kfree(mlxsw_sp->span.entries);
291}
292
293static struct mlxsw_sp_span_entry *
294mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
295{
296 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
297 struct mlxsw_sp_span_entry *span_entry;
298 char mpat_pl[MLXSW_REG_MPAT_LEN];
299 u8 local_port = port->local_port;
300 int index;
301 int i;
302 int err;
303
304 /* find a free entry to use */
305 index = -1;
306 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
307 if (!mlxsw_sp->span.entries[i].used) {
308 index = i;
309 span_entry = &mlxsw_sp->span.entries[i];
310 break;
311 }
312 }
313 if (index < 0)
314 return NULL;
315
316 /* create a new port analayzer entry for local_port */
317 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
318 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
319 if (err)
320 return NULL;
321
322 span_entry->used = true;
323 span_entry->id = index;
Yotam Gigi2d644d42016-11-11 16:34:25 +0100324 span_entry->ref_count = 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200325 span_entry->local_port = local_port;
326 return span_entry;
327}
328
329static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
330 struct mlxsw_sp_span_entry *span_entry)
331{
332 u8 local_port = span_entry->local_port;
333 char mpat_pl[MLXSW_REG_MPAT_LEN];
334 int pa_id = span_entry->id;
335
336 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
337 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
338 span_entry->used = false;
339}
340
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200341static struct mlxsw_sp_span_entry *
342mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200343{
344 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
345 int i;
346
347 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
348 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
349
350 if (curr->used && curr->local_port == port->local_port)
351 return curr;
352 }
353 return NULL;
354}
355
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200356static struct mlxsw_sp_span_entry
357*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200358{
359 struct mlxsw_sp_span_entry *span_entry;
360
361 span_entry = mlxsw_sp_span_entry_find(port);
362 if (span_entry) {
Yotam Gigi2d644d42016-11-11 16:34:25 +0100363 /* Already exists, just take a reference */
Yotam Gigi763b4b72016-07-21 12:03:17 +0200364 span_entry->ref_count++;
365 return span_entry;
366 }
367
368 return mlxsw_sp_span_entry_create(port);
369}
370
371static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
372 struct mlxsw_sp_span_entry *span_entry)
373{
Yotam Gigi2d644d42016-11-11 16:34:25 +0100374 WARN_ON(!span_entry->ref_count);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200375 if (--span_entry->ref_count == 0)
376 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
377 return 0;
378}
379
380static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
381{
382 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
383 struct mlxsw_sp_span_inspected_port *p;
384 int i;
385
386 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
387 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
388
389 list_for_each_entry(p, &curr->bound_ports_list, list)
390 if (p->local_port == port->local_port &&
391 p->type == MLXSW_SP_SPAN_EGRESS)
392 return true;
393 }
394
395 return false;
396}
397
Ido Schimmel18281f22017-03-24 08:02:51 +0100398static int mlxsw_sp_span_mtu_to_buffsize(const struct mlxsw_sp *mlxsw_sp,
399 int mtu)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200400{
Ido Schimmel18281f22017-03-24 08:02:51 +0100401 return mlxsw_sp_bytes_cells(mlxsw_sp, mtu * 5 / 2) + 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200402}
403
404static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
405{
406 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
407 char sbib_pl[MLXSW_REG_SBIB_LEN];
408 int err;
409
410 /* If port is egress mirrored, the shared buffer size should be
411 * updated according to the mtu value
412 */
413 if (mlxsw_sp_span_is_egress_mirror(port)) {
Ido Schimmel18281f22017-03-24 08:02:51 +0100414 u32 buffsize = mlxsw_sp_span_mtu_to_buffsize(mlxsw_sp, mtu);
415
416 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, buffsize);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200417 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
418 if (err) {
419 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
420 return err;
421 }
422 }
423
424 return 0;
425}
426
427static struct mlxsw_sp_span_inspected_port *
428mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
429 struct mlxsw_sp_span_entry *span_entry)
430{
431 struct mlxsw_sp_span_inspected_port *p;
432
433 list_for_each_entry(p, &span_entry->bound_ports_list, list)
434 if (port->local_port == p->local_port)
435 return p;
436 return NULL;
437}
438
439static int
440mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
441 struct mlxsw_sp_span_entry *span_entry,
442 enum mlxsw_sp_span_type type)
443{
444 struct mlxsw_sp_span_inspected_port *inspected_port;
445 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
446 char mpar_pl[MLXSW_REG_MPAR_LEN];
447 char sbib_pl[MLXSW_REG_SBIB_LEN];
448 int pa_id = span_entry->id;
449 int err;
450
451 /* if it is an egress SPAN, bind a shared buffer to it */
452 if (type == MLXSW_SP_SPAN_EGRESS) {
Ido Schimmel18281f22017-03-24 08:02:51 +0100453 u32 buffsize = mlxsw_sp_span_mtu_to_buffsize(mlxsw_sp,
454 port->dev->mtu);
455
456 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, buffsize);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200457 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
458 if (err) {
459 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
460 return err;
461 }
462 }
463
464 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200465 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
466 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200467 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
468 if (err)
469 goto err_mpar_reg_write;
470
471 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
472 if (!inspected_port) {
473 err = -ENOMEM;
474 goto err_inspected_port_alloc;
475 }
476 inspected_port->local_port = port->local_port;
477 inspected_port->type = type;
478 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
479
480 return 0;
481
482err_mpar_reg_write:
483err_inspected_port_alloc:
484 if (type == MLXSW_SP_SPAN_EGRESS) {
485 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
486 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
487 }
488 return err;
489}
490
491static void
492mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
493 struct mlxsw_sp_span_entry *span_entry,
494 enum mlxsw_sp_span_type type)
495{
496 struct mlxsw_sp_span_inspected_port *inspected_port;
497 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
498 char mpar_pl[MLXSW_REG_MPAR_LEN];
499 char sbib_pl[MLXSW_REG_SBIB_LEN];
500 int pa_id = span_entry->id;
501
502 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
503 if (!inspected_port)
504 return;
505
506 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200507 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
508 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200509 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
510
511 /* remove the SBIB buffer if it was egress SPAN */
512 if (type == MLXSW_SP_SPAN_EGRESS) {
513 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
514 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
515 }
516
517 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
518
519 list_del(&inspected_port->list);
520 kfree(inspected_port);
521}
522
523static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
524 struct mlxsw_sp_port *to,
525 enum mlxsw_sp_span_type type)
526{
527 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
528 struct mlxsw_sp_span_entry *span_entry;
529 int err;
530
531 span_entry = mlxsw_sp_span_entry_get(to);
532 if (!span_entry)
533 return -ENOENT;
534
535 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
536 span_entry->id);
537
538 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
539 if (err)
540 goto err_port_bind;
541
542 return 0;
543
544err_port_bind:
545 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
546 return err;
547}
548
549static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
550 struct mlxsw_sp_port *to,
551 enum mlxsw_sp_span_type type)
552{
553 struct mlxsw_sp_span_entry *span_entry;
554
555 span_entry = mlxsw_sp_span_entry_find(to);
556 if (!span_entry) {
557 netdev_err(from->dev, "no span entry found\n");
558 return;
559 }
560
561 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
562 span_entry->id);
563 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
564}
565
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100566static int mlxsw_sp_port_sample_set(struct mlxsw_sp_port *mlxsw_sp_port,
567 bool enable, u32 rate)
568{
569 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
570 char mpsc_pl[MLXSW_REG_MPSC_LEN];
571
572 mlxsw_reg_mpsc_pack(mpsc_pl, mlxsw_sp_port->local_port, enable, rate);
573 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpsc), mpsc_pl);
574}
575
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200576static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
577 bool is_up)
578{
579 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
580 char paos_pl[MLXSW_REG_PAOS_LEN];
581
582 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
583 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
584 MLXSW_PORT_ADMIN_STATUS_DOWN);
585 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
586}
587
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200588static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
589 unsigned char *addr)
590{
591 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
592 char ppad_pl[MLXSW_REG_PPAD_LEN];
593
594 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
595 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
596 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
597}
598
599static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
600{
601 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
602 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
603
604 ether_addr_copy(addr, mlxsw_sp->base_mac);
605 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
606 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
607}
608
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200609static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
610{
611 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
612 char pmtu_pl[MLXSW_REG_PMTU_LEN];
613 int max_mtu;
614 int err;
615
616 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
617 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
618 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
619 if (err)
620 return err;
621 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
622
623 if (mtu > max_mtu)
624 return -EINVAL;
625
626 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
627 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
628}
629
Ido Schimmelbe945352016-06-09 09:51:39 +0200630static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
631 u8 swid)
632{
633 char pspa_pl[MLXSW_REG_PSPA_LEN];
634
635 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
636 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
637}
638
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200639static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
640{
641 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200642
Ido Schimmelbe945352016-06-09 09:51:39 +0200643 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
644 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200645}
646
647static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
648 bool enable)
649{
650 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
651 char svpe_pl[MLXSW_REG_SVPE_LEN];
652
653 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
654 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
655}
656
657int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
658 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
659 u16 vid)
660{
661 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
662 char svfa_pl[MLXSW_REG_SVFA_LEN];
663
664 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
665 fid, vid);
666 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
667}
668
Ido Schimmel584d73d2016-08-24 12:00:26 +0200669int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
670 u16 vid_begin, u16 vid_end,
671 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200672{
673 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
674 char *spvmlr_pl;
675 int err;
676
677 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
678 if (!spvmlr_pl)
679 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200680 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
681 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200682 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
683 kfree(spvmlr_pl);
684 return err;
685}
686
Ido Schimmelfe9ccc72017-05-16 19:38:31 +0200687int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,
688 bool learn_enable)
Ido Schimmel584d73d2016-08-24 12:00:26 +0200689{
690 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
691 learn_enable);
692}
693
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200694static int
695mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
696{
697 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
698 char sspr_pl[MLXSW_REG_SSPR_LEN];
699
700 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
701 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
702}
703
Ido Schimmeld664b412016-06-09 09:51:40 +0200704static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
705 u8 local_port, u8 *p_module,
706 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200707{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200708 char pmlp_pl[MLXSW_REG_PMLP_LEN];
709 int err;
710
Ido Schimmel558c2d52016-02-26 17:32:29 +0100711 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200712 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
713 if (err)
714 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100715 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
716 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200717 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200718 return 0;
719}
720
Ido Schimmel18f1e702016-02-26 17:32:31 +0100721static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
722 u8 module, u8 width, u8 lane)
723{
724 char pmlp_pl[MLXSW_REG_PMLP_LEN];
725 int i;
726
727 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
728 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
729 for (i = 0; i < width; i++) {
730 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
731 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
732 }
733
734 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
735}
736
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100737static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
738{
739 char pmlp_pl[MLXSW_REG_PMLP_LEN];
740
741 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
742 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
743 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
744}
745
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200746static int mlxsw_sp_port_open(struct net_device *dev)
747{
748 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
749 int err;
750
751 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
752 if (err)
753 return err;
754 netif_start_queue(dev);
755 return 0;
756}
757
758static int mlxsw_sp_port_stop(struct net_device *dev)
759{
760 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
761
762 netif_stop_queue(dev);
763 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
764}
765
766static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
767 struct net_device *dev)
768{
769 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
770 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
771 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
772 const struct mlxsw_tx_info tx_info = {
773 .local_port = mlxsw_sp_port->local_port,
774 .is_emad = false,
775 };
776 u64 len;
777 int err;
778
Jiri Pirko307c2432016-04-08 19:11:22 +0200779 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200780 return NETDEV_TX_BUSY;
781
782 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
783 struct sk_buff *skb_orig = skb;
784
785 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
786 if (!skb) {
787 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
788 dev_kfree_skb_any(skb_orig);
789 return NETDEV_TX_OK;
790 }
Arkadi Sharshevsky36bf38d2017-01-12 09:10:37 +0100791 dev_consume_skb_any(skb_orig);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200792 }
793
794 if (eth_skb_pad(skb)) {
795 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
796 return NETDEV_TX_OK;
797 }
798
799 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200800 /* TX header is consumed by HW on the way so we shouldn't count its
801 * bytes as being sent.
802 */
803 len = skb->len - MLXSW_TXHDR_LEN;
804
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200805 /* Due to a race we might fail here because of a full queue. In that
806 * unlikely case we simply drop the packet.
807 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200808 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200809
810 if (!err) {
811 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
812 u64_stats_update_begin(&pcpu_stats->syncp);
813 pcpu_stats->tx_packets++;
814 pcpu_stats->tx_bytes += len;
815 u64_stats_update_end(&pcpu_stats->syncp);
816 } else {
817 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
818 dev_kfree_skb_any(skb);
819 }
820 return NETDEV_TX_OK;
821}
822
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100823static void mlxsw_sp_set_rx_mode(struct net_device *dev)
824{
825}
826
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200827static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
828{
829 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
830 struct sockaddr *addr = p;
831 int err;
832
833 if (!is_valid_ether_addr(addr->sa_data))
834 return -EADDRNOTAVAIL;
835
836 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
837 if (err)
838 return err;
839 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
840 return 0;
841}
842
Ido Schimmel18281f22017-03-24 08:02:51 +0100843static u16 mlxsw_sp_pg_buf_threshold_get(const struct mlxsw_sp *mlxsw_sp,
844 int mtu)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200845{
Ido Schimmel18281f22017-03-24 08:02:51 +0100846 return 2 * mlxsw_sp_bytes_cells(mlxsw_sp, mtu);
Ido Schimmelf417f042017-03-24 08:02:50 +0100847}
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200848
Ido Schimmelf417f042017-03-24 08:02:50 +0100849#define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */
Ido Schimmel18281f22017-03-24 08:02:51 +0100850
851static u16 mlxsw_sp_pfc_delay_get(const struct mlxsw_sp *mlxsw_sp, int mtu,
852 u16 delay)
Ido Schimmelf417f042017-03-24 08:02:50 +0100853{
Ido Schimmel18281f22017-03-24 08:02:51 +0100854 delay = mlxsw_sp_bytes_cells(mlxsw_sp, DIV_ROUND_UP(delay,
855 BITS_PER_BYTE));
856 return MLXSW_SP_CELL_FACTOR * delay + mlxsw_sp_bytes_cells(mlxsw_sp,
857 mtu);
Ido Schimmelf417f042017-03-24 08:02:50 +0100858}
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200859
Ido Schimmel18281f22017-03-24 08:02:51 +0100860/* Maximum delay buffer needed in case of PAUSE frames, in bytes.
Ido Schimmelf417f042017-03-24 08:02:50 +0100861 * Assumes 100m cable and maximum MTU.
862 */
Ido Schimmel18281f22017-03-24 08:02:51 +0100863#define MLXSW_SP_PAUSE_DELAY 58752
864
865static u16 mlxsw_sp_pg_buf_delay_get(const struct mlxsw_sp *mlxsw_sp, int mtu,
866 u16 delay, bool pfc, bool pause)
Ido Schimmelf417f042017-03-24 08:02:50 +0100867{
868 if (pfc)
Ido Schimmel18281f22017-03-24 08:02:51 +0100869 return mlxsw_sp_pfc_delay_get(mlxsw_sp, mtu, delay);
Ido Schimmelf417f042017-03-24 08:02:50 +0100870 else if (pause)
Ido Schimmel18281f22017-03-24 08:02:51 +0100871 return mlxsw_sp_bytes_cells(mlxsw_sp, MLXSW_SP_PAUSE_DELAY);
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200872 else
Ido Schimmelf417f042017-03-24 08:02:50 +0100873 return 0;
874}
875
876static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int index, u16 size, u16 thres,
877 bool lossy)
878{
879 if (lossy)
880 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, index, size);
881 else
882 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, index, size,
883 thres);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200884}
885
886int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200887 u8 *prio_tc, bool pause_en,
888 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200889{
890 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200891 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
892 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200893 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200894 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200895
896 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
897 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
898 if (err)
899 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200900
901 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
902 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200903 bool pfc = false;
Ido Schimmelf417f042017-03-24 08:02:50 +0100904 bool lossy;
905 u16 thres;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200906
907 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
908 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200909 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200910 configure = true;
911 break;
912 }
913 }
914
915 if (!configure)
916 continue;
Ido Schimmelf417f042017-03-24 08:02:50 +0100917
918 lossy = !(pfc || pause_en);
Ido Schimmel18281f22017-03-24 08:02:51 +0100919 thres = mlxsw_sp_pg_buf_threshold_get(mlxsw_sp, mtu);
920 delay = mlxsw_sp_pg_buf_delay_get(mlxsw_sp, mtu, delay, pfc,
921 pause_en);
Ido Schimmelf417f042017-03-24 08:02:50 +0100922 mlxsw_sp_pg_buf_pack(pbmc_pl, i, thres + delay, thres, lossy);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200923 }
924
Ido Schimmelff6551e2016-04-06 17:10:03 +0200925 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
926}
927
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200928static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200929 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200930{
931 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
932 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200933 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200934 u8 *prio_tc;
935
936 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200937 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200938
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200939 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200940 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200941}
942
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200943static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
944{
945 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200946 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200947 int err;
948
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200949 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200950 if (err)
951 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200952 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
953 if (err)
954 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200955 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
956 if (err)
957 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200958 dev->mtu = mtu;
959 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200960
961err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200962 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
963err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200964 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200965 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200966}
967
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300968static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200969mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
970 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200971{
972 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
973 struct mlxsw_sp_port_pcpu_stats *p;
974 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
975 u32 tx_dropped = 0;
976 unsigned int start;
977 int i;
978
979 for_each_possible_cpu(i) {
980 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
981 do {
982 start = u64_stats_fetch_begin_irq(&p->syncp);
983 rx_packets = p->rx_packets;
984 rx_bytes = p->rx_bytes;
985 tx_packets = p->tx_packets;
986 tx_bytes = p->tx_bytes;
987 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
988
989 stats->rx_packets += rx_packets;
990 stats->rx_bytes += rx_bytes;
991 stats->tx_packets += tx_packets;
992 stats->tx_bytes += tx_bytes;
993 /* tx_dropped is u32, updated without syncp protection. */
994 tx_dropped += p->tx_dropped;
995 }
996 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200997 return 0;
998}
999
Or Gerlitz3df5b3c2016-11-22 23:09:54 +02001000static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001001{
1002 switch (attr_id) {
1003 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
1004 return true;
1005 }
1006
1007 return false;
1008}
1009
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +03001010static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
1011 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001012{
1013 switch (attr_id) {
1014 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
1015 return mlxsw_sp_port_get_sw_stats64(dev, sp);
1016 }
1017
1018 return -EINVAL;
1019}
1020
1021static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
1022 int prio, char *ppcnt_pl)
1023{
1024 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1025 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1026
1027 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
1028 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1029}
1030
1031static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
1032 struct rtnl_link_stats64 *stats)
1033{
1034 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1035 int err;
1036
1037 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
1038 0, ppcnt_pl);
1039 if (err)
1040 goto out;
1041
1042 stats->tx_packets =
1043 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
1044 stats->rx_packets =
1045 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
1046 stats->tx_bytes =
1047 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
1048 stats->rx_bytes =
1049 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
1050 stats->multicast =
1051 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
1052
1053 stats->rx_crc_errors =
1054 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
1055 stats->rx_frame_errors =
1056 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
1057
1058 stats->rx_length_errors = (
1059 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
1060 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
1061 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
1062
1063 stats->rx_errors = (stats->rx_crc_errors +
1064 stats->rx_frame_errors + stats->rx_length_errors);
1065
1066out:
1067 return err;
1068}
1069
1070static void update_stats_cache(struct work_struct *work)
1071{
1072 struct mlxsw_sp_port *mlxsw_sp_port =
1073 container_of(work, struct mlxsw_sp_port,
1074 hw_stats.update_dw.work);
1075
1076 if (!netif_carrier_ok(mlxsw_sp_port->dev))
1077 goto out;
1078
1079 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
1080 mlxsw_sp_port->hw_stats.cache);
1081
1082out:
1083 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
1084 MLXSW_HW_STATS_UPDATE_TIME);
1085}
1086
1087/* Return the stats from a cache that is updated periodically,
1088 * as this function might get called in an atomic context.
1089 */
stephen hemmingerbc1f4472017-01-06 19:12:52 -08001090static void
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001091mlxsw_sp_port_get_stats64(struct net_device *dev,
1092 struct rtnl_link_stats64 *stats)
1093{
1094 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1095
1096 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001097}
1098
Jiri Pirko93cd0812017-04-18 16:55:35 +02001099static int __mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port,
1100 u16 vid_begin, u16 vid_end,
1101 bool is_member, bool untagged)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001102{
1103 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1104 char *spvm_pl;
1105 int err;
1106
1107 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
1108 if (!spvm_pl)
1109 return -ENOMEM;
1110
1111 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
1112 vid_end, is_member, untagged);
1113 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
1114 kfree(spvm_pl);
1115 return err;
1116}
1117
Jiri Pirko93cd0812017-04-18 16:55:35 +02001118int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
1119 u16 vid_end, bool is_member, bool untagged)
1120{
1121 u16 vid, vid_e;
1122 int err;
1123
1124 for (vid = vid_begin; vid <= vid_end;
1125 vid += MLXSW_REG_SPVM_REC_MAX_COUNT) {
1126 vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1),
1127 vid_end);
1128
1129 err = __mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e,
1130 is_member, untagged);
1131 if (err)
1132 return err;
1133 }
1134
1135 return 0;
1136}
1137
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001138static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1139{
1140 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1141 u16 vid, last_visited_vid;
1142 int err;
1143
1144 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1145 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
1146 vid);
1147 if (err) {
1148 last_visited_vid = vid;
1149 goto err_port_vid_to_fid_set;
1150 }
1151 }
1152
1153 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
1154 if (err) {
1155 last_visited_vid = VLAN_N_VID;
1156 goto err_port_vid_to_fid_set;
1157 }
1158
1159 return 0;
1160
1161err_port_vid_to_fid_set:
1162 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1163 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1164 vid);
1165 return err;
1166}
1167
1168static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1169{
1170 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1171 u16 vid;
1172 int err;
1173
1174 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1175 if (err)
1176 return err;
1177
1178 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1179 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1180 vid, vid);
1181 if (err)
1182 return err;
1183 }
1184
1185 return 0;
1186}
1187
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001188static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001189mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001190{
1191 struct mlxsw_sp_port *mlxsw_sp_vport;
1192
1193 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1194 if (!mlxsw_sp_vport)
1195 return NULL;
1196
1197 /* dev will be set correctly after the VLAN device is linked
1198 * with the real device. In case of bridge SELF invocation, dev
1199 * will remain as is.
1200 */
1201 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1202 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1203 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1204 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001205 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1206 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001207 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001208
1209 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1210
1211 return mlxsw_sp_vport;
1212}
1213
1214static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1215{
1216 list_del(&mlxsw_sp_vport->vport.list);
1217 kfree(mlxsw_sp_vport);
1218}
1219
Ido Schimmel05978482016-08-17 16:39:30 +02001220static int mlxsw_sp_port_add_vid(struct net_device *dev,
1221 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001222{
1223 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001224 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001225 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001226 int err;
1227
1228 /* VLAN 0 is added to HW filter when device goes up, but it is
1229 * reserved in our case, so simply return.
1230 */
1231 if (!vid)
1232 return 0;
1233
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001234 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001235 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001236
Ido Schimmel0355b592016-06-20 23:04:13 +02001237 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001238 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001239 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001240
1241 /* When adding the first VLAN interface on a bridged port we need to
1242 * transition all the active 802.1Q bridge VLANs to use explicit
1243 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1244 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001245 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001246 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001247 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001248 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001249 }
1250
Ido Schimmel52697a92016-07-02 11:00:09 +02001251 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001252 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001253 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001254
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001255 return 0;
1256
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001257err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001258 if (list_is_singular(&mlxsw_sp_port->vports_list))
1259 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1260err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001261 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001262 return err;
1263}
1264
Ido Schimmel32d863f2016-07-02 11:00:10 +02001265static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1266 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001267{
1268 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001269 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001270 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001271
1272 /* VLAN 0 is removed from HW filter when device goes down, but
1273 * it is reserved in our case, so simply return.
1274 */
1275 if (!vid)
1276 return 0;
1277
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001278 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001279 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001280 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001281
Ido Schimmel7a355832016-08-17 16:39:28 +02001282 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001283
Ido Schimmel1c800752016-06-20 23:04:20 +02001284 /* Drop FID reference. If this was the last reference the
1285 * resources will be freed.
1286 */
1287 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1288 if (f && !WARN_ON(!f->leave))
1289 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001290
1291 /* When removing the last VLAN interface on a bridged port we need to
1292 * transition all active 802.1Q bridge VLANs to use VID to FID
1293 * mappings and set port's mode to VLAN mode.
1294 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001295 if (list_is_singular(&mlxsw_sp_port->vports_list))
1296 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001297
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001298 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1299
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001300 return 0;
1301}
1302
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001303static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1304 size_t len)
1305{
1306 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001307 u8 module = mlxsw_sp_port->mapping.module;
1308 u8 width = mlxsw_sp_port->mapping.width;
1309 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001310 int err;
1311
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001312 if (!mlxsw_sp_port->split)
1313 err = snprintf(name, len, "p%d", module + 1);
1314 else
1315 err = snprintf(name, len, "p%ds%d", module + 1,
1316 lane / width);
1317
1318 if (err >= len)
1319 return -EINVAL;
1320
1321 return 0;
1322}
1323
Yotam Gigi763b4b72016-07-21 12:03:17 +02001324static struct mlxsw_sp_port_mall_tc_entry *
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001325mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1326 unsigned long cookie) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001327 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1328
1329 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1330 if (mall_tc_entry->cookie == cookie)
1331 return mall_tc_entry;
1332
1333 return NULL;
1334}
1335
1336static int
1337mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001338 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001339 const struct tc_action *a,
1340 bool ingress)
1341{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001342 struct net *net = dev_net(mlxsw_sp_port->dev);
1343 enum mlxsw_sp_span_type span_type;
1344 struct mlxsw_sp_port *to_port;
1345 struct net_device *to_dev;
1346 int ifindex;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001347
1348 ifindex = tcf_mirred_ifindex(a);
1349 to_dev = __dev_get_by_index(net, ifindex);
1350 if (!to_dev) {
1351 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1352 return -EINVAL;
1353 }
1354
1355 if (!mlxsw_sp_port_dev_check(to_dev)) {
1356 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
Yotam Gigie915ac62017-01-09 11:25:48 +01001357 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001358 }
1359 to_port = netdev_priv(to_dev);
1360
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001361 mirror->to_local_port = to_port->local_port;
1362 mirror->ingress = ingress;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001363 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001364 return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1365}
Yotam Gigi763b4b72016-07-21 12:03:17 +02001366
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001367static void
1368mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1369 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1370{
1371 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1372 enum mlxsw_sp_span_type span_type;
1373 struct mlxsw_sp_port *to_port;
1374
1375 to_port = mlxsw_sp->ports[mirror->to_local_port];
1376 span_type = mirror->ingress ?
1377 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1378 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001379}
1380
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001381static int
1382mlxsw_sp_port_add_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port,
1383 struct tc_cls_matchall_offload *cls,
1384 const struct tc_action *a,
1385 bool ingress)
1386{
1387 int err;
1388
1389 if (!mlxsw_sp_port->sample)
1390 return -EOPNOTSUPP;
1391 if (rtnl_dereference(mlxsw_sp_port->sample->psample_group)) {
1392 netdev_err(mlxsw_sp_port->dev, "sample already active\n");
1393 return -EEXIST;
1394 }
1395 if (tcf_sample_rate(a) > MLXSW_REG_MPSC_RATE_MAX) {
1396 netdev_err(mlxsw_sp_port->dev, "sample rate not supported\n");
1397 return -EOPNOTSUPP;
1398 }
1399
1400 rcu_assign_pointer(mlxsw_sp_port->sample->psample_group,
1401 tcf_sample_psample_group(a));
1402 mlxsw_sp_port->sample->truncate = tcf_sample_truncate(a);
1403 mlxsw_sp_port->sample->trunc_size = tcf_sample_trunc_size(a);
1404 mlxsw_sp_port->sample->rate = tcf_sample_rate(a);
1405
1406 err = mlxsw_sp_port_sample_set(mlxsw_sp_port, true, tcf_sample_rate(a));
1407 if (err)
1408 goto err_port_sample_set;
1409 return 0;
1410
1411err_port_sample_set:
1412 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1413 return err;
1414}
1415
1416static void
1417mlxsw_sp_port_del_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port)
1418{
1419 if (!mlxsw_sp_port->sample)
1420 return;
1421
1422 mlxsw_sp_port_sample_set(mlxsw_sp_port, false, 1);
1423 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1424}
1425
Yotam Gigi763b4b72016-07-21 12:03:17 +02001426static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1427 __be16 protocol,
1428 struct tc_cls_matchall_offload *cls,
1429 bool ingress)
1430{
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001431 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001432 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001433 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001434 int err;
1435
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001436 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001437 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
Yotam Gigie915ac62017-01-09 11:25:48 +01001438 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001439 }
1440
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001441 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1442 if (!mall_tc_entry)
1443 return -ENOMEM;
1444 mall_tc_entry->cookie = cls->cookie;
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001445
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001446 tcf_exts_to_list(cls->exts, &actions);
1447 a = list_first_entry(&actions, struct tc_action, list);
1448
1449 if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1450 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1451
1452 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1453 mirror = &mall_tc_entry->mirror;
1454 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1455 mirror, a, ingress);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001456 } else if (is_tcf_sample(a) && protocol == htons(ETH_P_ALL)) {
1457 mall_tc_entry->type = MLXSW_SP_PORT_MALL_SAMPLE;
1458 err = mlxsw_sp_port_add_cls_matchall_sample(mlxsw_sp_port, cls,
1459 a, ingress);
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001460 } else {
1461 err = -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001462 }
1463
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001464 if (err)
1465 goto err_add_action;
1466
1467 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001468 return 0;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001469
1470err_add_action:
1471 kfree(mall_tc_entry);
1472 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001473}
1474
1475static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1476 struct tc_cls_matchall_offload *cls)
1477{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001478 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001479
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001480 mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1481 cls->cookie);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001482 if (!mall_tc_entry) {
1483 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1484 return;
1485 }
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001486 list_del(&mall_tc_entry->list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001487
1488 switch (mall_tc_entry->type) {
1489 case MLXSW_SP_PORT_MALL_MIRROR:
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001490 mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1491 &mall_tc_entry->mirror);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001492 break;
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001493 case MLXSW_SP_PORT_MALL_SAMPLE:
1494 mlxsw_sp_port_del_cls_matchall_sample(mlxsw_sp_port);
1495 break;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001496 default:
1497 WARN_ON(1);
1498 }
1499
Yotam Gigi763b4b72016-07-21 12:03:17 +02001500 kfree(mall_tc_entry);
1501}
1502
1503static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1504 __be16 proto, struct tc_to_netdev *tc)
1505{
1506 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1507 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1508
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001509 switch (tc->type) {
1510 case TC_SETUP_MATCHALL:
Yotam Gigi763b4b72016-07-21 12:03:17 +02001511 switch (tc->cls_mall->command) {
1512 case TC_CLSMATCHALL_REPLACE:
1513 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1514 proto,
1515 tc->cls_mall,
1516 ingress);
1517 case TC_CLSMATCHALL_DESTROY:
1518 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1519 tc->cls_mall);
1520 return 0;
1521 default:
Or Gerlitzabbdf4b2017-03-17 09:38:01 +01001522 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001523 }
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001524 case TC_SETUP_CLSFLOWER:
1525 switch (tc->cls_flower->command) {
1526 case TC_CLSFLOWER_REPLACE:
1527 return mlxsw_sp_flower_replace(mlxsw_sp_port, ingress,
1528 proto, tc->cls_flower);
1529 case TC_CLSFLOWER_DESTROY:
1530 mlxsw_sp_flower_destroy(mlxsw_sp_port, ingress,
1531 tc->cls_flower);
1532 return 0;
Arkadi Sharshevsky7c1b8eb2017-03-11 09:42:59 +01001533 case TC_CLSFLOWER_STATS:
1534 return mlxsw_sp_flower_stats(mlxsw_sp_port, ingress,
1535 tc->cls_flower);
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001536 default:
1537 return -EOPNOTSUPP;
1538 }
Yotam Gigi763b4b72016-07-21 12:03:17 +02001539 }
1540
Yotam Gigie915ac62017-01-09 11:25:48 +01001541 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001542}
1543
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001544static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1545 .ndo_open = mlxsw_sp_port_open,
1546 .ndo_stop = mlxsw_sp_port_stop,
1547 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001548 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001549 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001550 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1551 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1552 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001553 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1554 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001555 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1556 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
1557 .ndo_fdb_add = switchdev_port_fdb_add,
1558 .ndo_fdb_del = switchdev_port_fdb_del,
1559 .ndo_fdb_dump = switchdev_port_fdb_dump,
1560 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1561 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1562 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001563 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001564};
1565
1566static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1567 struct ethtool_drvinfo *drvinfo)
1568{
1569 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1570 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1571
1572 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1573 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1574 sizeof(drvinfo->version));
1575 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1576 "%d.%d.%d",
1577 mlxsw_sp->bus_info->fw_rev.major,
1578 mlxsw_sp->bus_info->fw_rev.minor,
1579 mlxsw_sp->bus_info->fw_rev.subminor);
1580 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1581 sizeof(drvinfo->bus_info));
1582}
1583
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001584static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1585 struct ethtool_pauseparam *pause)
1586{
1587 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1588
1589 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1590 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1591}
1592
1593static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1594 struct ethtool_pauseparam *pause)
1595{
1596 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1597
1598 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1599 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1600 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1601
1602 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1603 pfcc_pl);
1604}
1605
1606static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1607 struct ethtool_pauseparam *pause)
1608{
1609 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1610 bool pause_en = pause->tx_pause || pause->rx_pause;
1611 int err;
1612
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001613 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1614 netdev_err(dev, "PFC already enabled on port\n");
1615 return -EINVAL;
1616 }
1617
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001618 if (pause->autoneg) {
1619 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1620 return -EINVAL;
1621 }
1622
1623 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1624 if (err) {
1625 netdev_err(dev, "Failed to configure port's headroom\n");
1626 return err;
1627 }
1628
1629 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1630 if (err) {
1631 netdev_err(dev, "Failed to set PAUSE parameters\n");
1632 goto err_port_pause_configure;
1633 }
1634
1635 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1636 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1637
1638 return 0;
1639
1640err_port_pause_configure:
1641 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1642 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1643 return err;
1644}
1645
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001646struct mlxsw_sp_port_hw_stats {
1647 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001648 u64 (*getter)(const char *payload);
Ido Schimmel18281f22017-03-24 08:02:51 +01001649 bool cells_bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001650};
1651
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001652static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001653 {
1654 .str = "a_frames_transmitted_ok",
1655 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1656 },
1657 {
1658 .str = "a_frames_received_ok",
1659 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1660 },
1661 {
1662 .str = "a_frame_check_sequence_errors",
1663 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1664 },
1665 {
1666 .str = "a_alignment_errors",
1667 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1668 },
1669 {
1670 .str = "a_octets_transmitted_ok",
1671 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1672 },
1673 {
1674 .str = "a_octets_received_ok",
1675 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1676 },
1677 {
1678 .str = "a_multicast_frames_xmitted_ok",
1679 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1680 },
1681 {
1682 .str = "a_broadcast_frames_xmitted_ok",
1683 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1684 },
1685 {
1686 .str = "a_multicast_frames_received_ok",
1687 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1688 },
1689 {
1690 .str = "a_broadcast_frames_received_ok",
1691 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1692 },
1693 {
1694 .str = "a_in_range_length_errors",
1695 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1696 },
1697 {
1698 .str = "a_out_of_range_length_field",
1699 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1700 },
1701 {
1702 .str = "a_frame_too_long_errors",
1703 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1704 },
1705 {
1706 .str = "a_symbol_error_during_carrier",
1707 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1708 },
1709 {
1710 .str = "a_mac_control_frames_transmitted",
1711 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1712 },
1713 {
1714 .str = "a_mac_control_frames_received",
1715 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1716 },
1717 {
1718 .str = "a_unsupported_opcodes_received",
1719 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1720 },
1721 {
1722 .str = "a_pause_mac_ctrl_frames_received",
1723 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1724 },
1725 {
1726 .str = "a_pause_mac_ctrl_frames_xmitted",
1727 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1728 },
1729};
1730
1731#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1732
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001733static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1734 {
1735 .str = "rx_octets_prio",
1736 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1737 },
1738 {
1739 .str = "rx_frames_prio",
1740 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1741 },
1742 {
1743 .str = "tx_octets_prio",
1744 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1745 },
1746 {
1747 .str = "tx_frames_prio",
1748 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1749 },
1750 {
1751 .str = "rx_pause_prio",
1752 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1753 },
1754 {
1755 .str = "rx_pause_duration_prio",
1756 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1757 },
1758 {
1759 .str = "tx_pause_prio",
1760 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1761 },
1762 {
1763 .str = "tx_pause_duration_prio",
1764 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1765 },
1766};
1767
1768#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1769
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001770static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1771 {
1772 .str = "tc_transmit_queue_tc",
Ido Schimmel18281f22017-03-24 08:02:51 +01001773 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_get,
1774 .cells_bytes = true,
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001775 },
1776 {
1777 .str = "tc_no_buffer_discard_uc_tc",
1778 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1779 },
1780};
1781
1782#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1783
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001784#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001785 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1786 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001787 IEEE_8021QAZ_MAX_TCS)
1788
1789static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1790{
1791 int i;
1792
1793 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1794 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1795 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1796 *p += ETH_GSTRING_LEN;
1797 }
1798}
1799
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001800static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1801{
1802 int i;
1803
1804 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1805 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1806 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1807 *p += ETH_GSTRING_LEN;
1808 }
1809}
1810
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001811static void mlxsw_sp_port_get_strings(struct net_device *dev,
1812 u32 stringset, u8 *data)
1813{
1814 u8 *p = data;
1815 int i;
1816
1817 switch (stringset) {
1818 case ETH_SS_STATS:
1819 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1820 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1821 ETH_GSTRING_LEN);
1822 p += ETH_GSTRING_LEN;
1823 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001824
1825 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1826 mlxsw_sp_port_get_prio_strings(&p, i);
1827
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001828 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1829 mlxsw_sp_port_get_tc_strings(&p, i);
1830
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001831 break;
1832 }
1833}
1834
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001835static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1836 enum ethtool_phys_id_state state)
1837{
1838 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1839 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1840 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1841 bool active;
1842
1843 switch (state) {
1844 case ETHTOOL_ID_ACTIVE:
1845 active = true;
1846 break;
1847 case ETHTOOL_ID_INACTIVE:
1848 active = false;
1849 break;
1850 default:
1851 return -EOPNOTSUPP;
1852 }
1853
1854 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1855 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1856}
1857
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001858static int
1859mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1860 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1861{
1862 switch (grp) {
1863 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1864 *p_hw_stats = mlxsw_sp_port_hw_stats;
1865 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1866 break;
1867 case MLXSW_REG_PPCNT_PRIO_CNT:
1868 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1869 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1870 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001871 case MLXSW_REG_PPCNT_TC_CNT:
1872 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1873 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1874 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001875 default:
1876 WARN_ON(1);
Yotam Gigie915ac62017-01-09 11:25:48 +01001877 return -EOPNOTSUPP;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001878 }
1879 return 0;
1880}
1881
1882static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1883 enum mlxsw_reg_ppcnt_grp grp, int prio,
1884 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001885{
Ido Schimmel18281f22017-03-24 08:02:51 +01001886 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1887 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001888 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001889 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001890 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001891 int err;
1892
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001893 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1894 if (err)
1895 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001896 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel18281f22017-03-24 08:02:51 +01001897 for (i = 0; i < len; i++) {
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001898 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel18281f22017-03-24 08:02:51 +01001899 if (!hw_stats[i].cells_bytes)
1900 continue;
1901 data[data_index + i] = mlxsw_sp_cells_bytes(mlxsw_sp,
1902 data[data_index + i]);
1903 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001904}
1905
1906static void mlxsw_sp_port_get_stats(struct net_device *dev,
1907 struct ethtool_stats *stats, u64 *data)
1908{
1909 int i, data_index = 0;
1910
1911 /* IEEE 802.3 Counters */
1912 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1913 data, data_index);
1914 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1915
1916 /* Per-Priority Counters */
1917 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1918 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1919 data, data_index);
1920 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1921 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001922
1923 /* Per-TC Counters */
1924 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1925 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1926 data, data_index);
1927 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1928 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001929}
1930
1931static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1932{
1933 switch (sset) {
1934 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001935 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001936 default:
1937 return -EOPNOTSUPP;
1938 }
1939}
1940
1941struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001942 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001943 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001944 u32 speed;
1945};
1946
1947static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1948 {
1949 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001950 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1951 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001952 },
1953 {
1954 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1955 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001956 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1957 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001958 },
1959 {
1960 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001961 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1962 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001963 },
1964 {
1965 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1966 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001967 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1968 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001969 },
1970 {
1971 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1972 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1973 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1974 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001975 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1976 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001977 },
1978 {
1979 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001980 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1981 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001982 },
1983 {
1984 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001985 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1986 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001987 },
1988 {
1989 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001990 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1991 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001992 },
1993 {
1994 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001995 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1996 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001997 },
1998 {
1999 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002000 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
2001 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002002 },
2003 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002004 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
2005 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
2006 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002007 },
2008 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002009 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
2010 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
2011 .speed = SPEED_25000,
2012 },
2013 {
2014 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
2015 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
2016 .speed = SPEED_25000,
2017 },
2018 {
2019 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
2020 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
2021 .speed = SPEED_25000,
2022 },
2023 {
2024 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
2025 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
2026 .speed = SPEED_50000,
2027 },
2028 {
2029 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
2030 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
2031 .speed = SPEED_50000,
2032 },
2033 {
2034 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
2035 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
2036 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002037 },
2038 {
2039 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002040 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
2041 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002042 },
2043 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002044 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2045 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
2046 .speed = SPEED_56000,
2047 },
2048 {
2049 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2050 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
2051 .speed = SPEED_56000,
2052 },
2053 {
2054 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2055 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
2056 .speed = SPEED_56000,
2057 },
2058 {
2059 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
2060 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
2061 .speed = SPEED_100000,
2062 },
2063 {
2064 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
2065 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
2066 .speed = SPEED_100000,
2067 },
2068 {
2069 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
2070 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
2071 .speed = SPEED_100000,
2072 },
2073 {
2074 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
2075 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
2076 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002077 },
2078};
2079
2080#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
2081
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002082static void
2083mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
2084 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002085{
2086 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
2087 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
2088 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
2089 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
2090 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
2091 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002092 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002093
2094 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
2095 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
2096 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
2097 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
2098 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002099 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002100}
2101
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002102static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002103{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002104 int i;
2105
2106 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2107 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002108 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2109 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002110 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002111}
2112
2113static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002114 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002115{
2116 u32 speed = SPEED_UNKNOWN;
2117 u8 duplex = DUPLEX_UNKNOWN;
2118 int i;
2119
2120 if (!carrier_ok)
2121 goto out;
2122
2123 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2124 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
2125 speed = mlxsw_sp_port_link_mode[i].speed;
2126 duplex = DUPLEX_FULL;
2127 break;
2128 }
2129 }
2130out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002131 cmd->base.speed = speed;
2132 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002133}
2134
2135static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
2136{
2137 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
2138 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
2139 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
2140 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
2141 return PORT_FIBRE;
2142
2143 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
2144 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
2145 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
2146 return PORT_DA;
2147
2148 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
2149 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
2150 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
2151 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
2152 return PORT_NONE;
2153
2154 return PORT_OTHER;
2155}
2156
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002157static u32
2158mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002159{
2160 u32 ptys_proto = 0;
2161 int i;
2162
2163 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002164 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2165 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002166 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2167 }
2168 return ptys_proto;
2169}
2170
2171static u32 mlxsw_sp_to_ptys_speed(u32 speed)
2172{
2173 u32 ptys_proto = 0;
2174 int i;
2175
2176 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2177 if (speed == mlxsw_sp_port_link_mode[i].speed)
2178 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2179 }
2180 return ptys_proto;
2181}
2182
Ido Schimmel18f1e702016-02-26 17:32:31 +01002183static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
2184{
2185 u32 ptys_proto = 0;
2186 int i;
2187
2188 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2189 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
2190 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2191 }
2192 return ptys_proto;
2193}
2194
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002195static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
2196 struct ethtool_link_ksettings *cmd)
2197{
2198 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
2199 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
2200 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
2201
2202 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
2203 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
2204}
2205
2206static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
2207 struct ethtool_link_ksettings *cmd)
2208{
2209 if (!autoneg)
2210 return;
2211
2212 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
2213 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
2214}
2215
2216static void
2217mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
2218 struct ethtool_link_ksettings *cmd)
2219{
2220 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
2221 return;
2222
2223 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
2224 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
2225}
2226
2227static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
2228 struct ethtool_link_ksettings *cmd)
2229{
2230 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2231 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2232 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2233 char ptys_pl[MLXSW_REG_PTYS_LEN];
2234 u8 autoneg_status;
2235 bool autoneg;
2236 int err;
2237
2238 autoneg = mlxsw_sp_port->link.autoneg;
Elad Raz401c8b42016-10-28 21:35:52 +02002239 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002240 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2241 if (err)
2242 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002243 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2244 &eth_proto_oper);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002245
2246 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2247
2248 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2249
2250 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2251 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2252 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2253
2254 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2255 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2256 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2257 cmd);
2258
2259 return 0;
2260}
2261
2262static int
2263mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2264 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002265{
2266 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2267 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2268 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002269 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002270 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002271 int err;
2272
Elad Raz401c8b42016-10-28 21:35:52 +02002273 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002274 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002275 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002276 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002277 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002278
2279 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2280 eth_proto_new = autoneg ?
2281 mlxsw_sp_to_ptys_advert_link(cmd) :
2282 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002283
2284 eth_proto_new = eth_proto_new & eth_proto_cap;
2285 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002286 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002287 return -EINVAL;
2288 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002289
Elad Raz401c8b42016-10-28 21:35:52 +02002290 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2291 eth_proto_new);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002292 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002293 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002294 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002295
Ido Schimmel6277d462016-07-15 11:14:58 +02002296 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002297 return 0;
2298
Ido Schimmel0c83f882016-09-12 13:26:23 +02002299 mlxsw_sp_port->link.autoneg = autoneg;
2300
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002301 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2302 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002303
2304 return 0;
2305}
2306
2307static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2308 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2309 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002310 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2311 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002312 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002313 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002314 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2315 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002316 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2317 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002318};
2319
Ido Schimmel18f1e702016-02-26 17:32:31 +01002320static int
2321mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2322{
2323 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2324 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2325 char ptys_pl[MLXSW_REG_PTYS_LEN];
2326 u32 eth_proto_admin;
2327
2328 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
Elad Raz401c8b42016-10-28 21:35:52 +02002329 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2330 eth_proto_admin);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002331 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2332}
2333
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002334int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2335 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2336 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002337{
2338 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2339 char qeec_pl[MLXSW_REG_QEEC_LEN];
2340
2341 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2342 next_index);
2343 mlxsw_reg_qeec_de_set(qeec_pl, true);
2344 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2345 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2346 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2347}
2348
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002349int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2350 enum mlxsw_reg_qeec_hr hr, u8 index,
2351 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002352{
2353 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2354 char qeec_pl[MLXSW_REG_QEEC_LEN];
2355
2356 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2357 next_index);
2358 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2359 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2360 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2361}
2362
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002363int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2364 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002365{
2366 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2367 char qtct_pl[MLXSW_REG_QTCT_LEN];
2368
2369 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2370 tclass);
2371 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2372}
2373
2374static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2375{
2376 int err, i;
2377
2378 /* Setup the elements hierarcy, so that each TC is linked to
2379 * one subgroup, which are all member in the same group.
2380 */
2381 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2382 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2383 0);
2384 if (err)
2385 return err;
2386 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2387 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2388 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2389 0, false, 0);
2390 if (err)
2391 return err;
2392 }
2393 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2394 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2395 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2396 false, 0);
2397 if (err)
2398 return err;
2399 }
2400
2401 /* Make sure the max shaper is disabled in all hierarcies that
2402 * support it.
2403 */
2404 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2405 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2406 MLXSW_REG_QEEC_MAS_DIS);
2407 if (err)
2408 return err;
2409 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2410 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2411 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2412 i, 0,
2413 MLXSW_REG_QEEC_MAS_DIS);
2414 if (err)
2415 return err;
2416 }
2417 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2418 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2419 MLXSW_REG_QEEC_HIERARCY_TC,
2420 i, i,
2421 MLXSW_REG_QEEC_MAS_DIS);
2422 if (err)
2423 return err;
2424 }
2425
2426 /* Map all priorities to traffic class 0. */
2427 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2428 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2429 if (err)
2430 return err;
2431 }
2432
2433 return 0;
2434}
2435
Ido Schimmel05978482016-08-17 16:39:30 +02002436static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2437{
2438 mlxsw_sp_port->pvid = 1;
2439
2440 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2441}
2442
2443static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2444{
2445 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2446}
2447
Jiri Pirko67963a32016-10-28 21:35:55 +02002448static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2449 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002450{
2451 struct mlxsw_sp_port *mlxsw_sp_port;
2452 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002453 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002454 int err;
2455
2456 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2457 if (!dev)
2458 return -ENOMEM;
Jiri Pirkof20a91f2016-10-27 15:13:00 +02002459 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002460 mlxsw_sp_port = netdev_priv(dev);
2461 mlxsw_sp_port->dev = dev;
2462 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2463 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002464 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002465 mlxsw_sp_port->mapping.module = module;
2466 mlxsw_sp_port->mapping.width = width;
2467 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002468 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002469 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2470 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2471 if (!mlxsw_sp_port->active_vlans) {
2472 err = -ENOMEM;
2473 goto err_port_active_vlans_alloc;
2474 }
Elad Razfc1273a2016-01-06 13:01:11 +01002475 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2476 if (!mlxsw_sp_port->untagged_vlans) {
2477 err = -ENOMEM;
2478 goto err_port_untagged_vlans_alloc;
2479 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002480 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002481 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002482
2483 mlxsw_sp_port->pcpu_stats =
2484 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2485 if (!mlxsw_sp_port->pcpu_stats) {
2486 err = -ENOMEM;
2487 goto err_alloc_stats;
2488 }
2489
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002490 mlxsw_sp_port->sample = kzalloc(sizeof(*mlxsw_sp_port->sample),
2491 GFP_KERNEL);
2492 if (!mlxsw_sp_port->sample) {
2493 err = -ENOMEM;
2494 goto err_alloc_sample;
2495 }
2496
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002497 mlxsw_sp_port->hw_stats.cache =
2498 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2499
2500 if (!mlxsw_sp_port->hw_stats.cache) {
2501 err = -ENOMEM;
2502 goto err_alloc_hw_stats;
2503 }
2504 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2505 &update_stats_cache);
2506
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002507 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2508 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2509
Ido Schimmel3247ff22016-09-08 08:16:02 +02002510 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2511 if (err) {
2512 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2513 mlxsw_sp_port->local_port);
2514 goto err_port_swid_set;
2515 }
2516
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002517 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2518 if (err) {
2519 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2520 mlxsw_sp_port->local_port);
2521 goto err_dev_addr_init;
2522 }
2523
2524 netif_carrier_off(dev);
2525
2526 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002527 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2528 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002529
Jarod Wilsond894be52016-10-20 13:55:16 -04002530 dev->min_mtu = 0;
2531 dev->max_mtu = ETH_MAX_MTU;
2532
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002533 /* Each packet needs to have a Tx header (metadata) on top all other
2534 * headers.
2535 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002536 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002537
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002538 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2539 if (err) {
2540 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2541 mlxsw_sp_port->local_port);
2542 goto err_port_system_port_mapping_set;
2543 }
2544
Ido Schimmel18f1e702016-02-26 17:32:31 +01002545 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2546 if (err) {
2547 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2548 mlxsw_sp_port->local_port);
2549 goto err_port_speed_by_width_set;
2550 }
2551
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002552 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2553 if (err) {
2554 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2555 mlxsw_sp_port->local_port);
2556 goto err_port_mtu_set;
2557 }
2558
2559 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2560 if (err)
2561 goto err_port_admin_status_set;
2562
2563 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2564 if (err) {
2565 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2566 mlxsw_sp_port->local_port);
2567 goto err_port_buffers_init;
2568 }
2569
Ido Schimmel90183b92016-04-06 17:10:08 +02002570 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2571 if (err) {
2572 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2573 mlxsw_sp_port->local_port);
2574 goto err_port_ets_init;
2575 }
2576
Ido Schimmelf00817d2016-04-06 17:10:09 +02002577 /* ETS and buffers must be initialized before DCB. */
2578 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2579 if (err) {
2580 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2581 mlxsw_sp_port->local_port);
2582 goto err_port_dcb_init;
2583 }
2584
Ido Schimmel05978482016-08-17 16:39:30 +02002585 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2586 if (err) {
2587 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2588 mlxsw_sp_port->local_port);
2589 goto err_port_pvid_vport_create;
2590 }
2591
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002592 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002593 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002594 err = register_netdev(dev);
2595 if (err) {
2596 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2597 mlxsw_sp_port->local_port);
2598 goto err_register_netdev;
2599 }
2600
Elad Razd808c7e2016-10-28 21:35:57 +02002601 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2602 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2603 module);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002604 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002605 return 0;
2606
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002607err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002608 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002609 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002610 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2611err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002612 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002613err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002614err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002615err_port_buffers_init:
2616err_port_admin_status_set:
2617err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002618err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002619err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002620err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002621 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2622err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002623 kfree(mlxsw_sp_port->hw_stats.cache);
2624err_alloc_hw_stats:
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002625 kfree(mlxsw_sp_port->sample);
2626err_alloc_sample:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002627 free_percpu(mlxsw_sp_port->pcpu_stats);
2628err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002629 kfree(mlxsw_sp_port->untagged_vlans);
2630err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002631 kfree(mlxsw_sp_port->active_vlans);
2632err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002633 free_netdev(dev);
2634 return err;
2635}
2636
Jiri Pirko67963a32016-10-28 21:35:55 +02002637static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2638 bool split, u8 module, u8 width, u8 lane)
2639{
2640 int err;
2641
2642 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2643 if (err) {
2644 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2645 local_port);
2646 return err;
2647 }
Ido Schimmel9a60c902016-12-16 19:29:03 +01002648 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split,
Jiri Pirko67963a32016-10-28 21:35:55 +02002649 module, width, lane);
2650 if (err)
2651 goto err_port_create;
2652 return 0;
2653
2654err_port_create:
2655 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2656 return err;
2657}
2658
2659static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002660{
2661 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2662
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002663 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko67963a32016-10-28 21:35:55 +02002664 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002665 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002666 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002667 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002668 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002669 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002670 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2671 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002672 kfree(mlxsw_sp_port->hw_stats.cache);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002673 kfree(mlxsw_sp_port->sample);
Yotam Gigi136f1442017-01-09 11:25:47 +01002674 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002675 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002676 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002677 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002678 free_netdev(mlxsw_sp_port->dev);
2679}
2680
Jiri Pirko67963a32016-10-28 21:35:55 +02002681static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2682{
2683 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2684 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2685}
2686
Jiri Pirkof83e2102016-10-28 21:35:49 +02002687static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2688{
2689 return mlxsw_sp->ports[local_port] != NULL;
2690}
2691
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002692static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2693{
2694 int i;
2695
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002696 for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002697 if (mlxsw_sp_port_created(mlxsw_sp, i))
2698 mlxsw_sp_port_remove(mlxsw_sp, i);
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002699 kfree(mlxsw_sp->port_to_module);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002700 kfree(mlxsw_sp->ports);
2701}
2702
2703static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2704{
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002705 unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
Ido Schimmeld664b412016-06-09 09:51:40 +02002706 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002707 size_t alloc_size;
2708 int i;
2709 int err;
2710
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002711 alloc_size = sizeof(struct mlxsw_sp_port *) * max_ports;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002712 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2713 if (!mlxsw_sp->ports)
2714 return -ENOMEM;
2715
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002716 mlxsw_sp->port_to_module = kcalloc(max_ports, sizeof(u8), GFP_KERNEL);
2717 if (!mlxsw_sp->port_to_module) {
2718 err = -ENOMEM;
2719 goto err_port_to_module_alloc;
2720 }
2721
2722 for (i = 1; i < max_ports; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002723 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002724 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002725 if (err)
2726 goto err_port_module_info_get;
2727 if (!width)
2728 continue;
2729 mlxsw_sp->port_to_module[i] = module;
Jiri Pirko67963a32016-10-28 21:35:55 +02002730 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2731 module, width, lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002732 if (err)
2733 goto err_port_create;
2734 }
2735 return 0;
2736
2737err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002738err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002739 for (i--; i >= 1; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002740 if (mlxsw_sp_port_created(mlxsw_sp, i))
2741 mlxsw_sp_port_remove(mlxsw_sp, i);
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002742 kfree(mlxsw_sp->port_to_module);
2743err_port_to_module_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002744 kfree(mlxsw_sp->ports);
2745 return err;
2746}
2747
Ido Schimmel18f1e702016-02-26 17:32:31 +01002748static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2749{
2750 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2751
2752 return local_port - offset;
2753}
2754
Ido Schimmelbe945352016-06-09 09:51:39 +02002755static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2756 u8 module, unsigned int count)
2757{
2758 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2759 int err, i;
2760
2761 for (i = 0; i < count; i++) {
2762 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2763 width, i * width);
2764 if (err)
2765 goto err_port_module_map;
2766 }
2767
2768 for (i = 0; i < count; i++) {
2769 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2770 if (err)
2771 goto err_port_swid_set;
2772 }
2773
2774 for (i = 0; i < count; i++) {
2775 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002776 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002777 if (err)
2778 goto err_port_create;
2779 }
2780
2781 return 0;
2782
2783err_port_create:
2784 for (i--; i >= 0; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002785 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2786 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmelbe945352016-06-09 09:51:39 +02002787 i = count;
2788err_port_swid_set:
2789 for (i--; i >= 0; i--)
2790 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2791 MLXSW_PORT_SWID_DISABLED_PORT);
2792 i = count;
2793err_port_module_map:
2794 for (i--; i >= 0; i--)
2795 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2796 return err;
2797}
2798
2799static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2800 u8 base_port, unsigned int count)
2801{
2802 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2803 int i;
2804
2805 /* Split by four means we need to re-create two ports, otherwise
2806 * only one.
2807 */
2808 count = count / 2;
2809
2810 for (i = 0; i < count; i++) {
2811 local_port = base_port + i * 2;
2812 module = mlxsw_sp->port_to_module[local_port];
2813
2814 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2815 0);
2816 }
2817
2818 for (i = 0; i < count; i++)
2819 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2820
2821 for (i = 0; i < count; i++) {
2822 local_port = base_port + i * 2;
2823 module = mlxsw_sp->port_to_module[local_port];
2824
2825 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002826 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002827 }
2828}
2829
Jiri Pirkob2f10572016-04-08 19:11:23 +02002830static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2831 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002832{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002833 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002834 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002835 u8 module, cur_width, base_port;
2836 int i;
2837 int err;
2838
2839 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2840 if (!mlxsw_sp_port) {
2841 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2842 local_port);
2843 return -EINVAL;
2844 }
2845
Ido Schimmeld664b412016-06-09 09:51:40 +02002846 module = mlxsw_sp_port->mapping.module;
2847 cur_width = mlxsw_sp_port->mapping.width;
2848
Ido Schimmel18f1e702016-02-26 17:32:31 +01002849 if (count != 2 && count != 4) {
2850 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2851 return -EINVAL;
2852 }
2853
Ido Schimmel18f1e702016-02-26 17:32:31 +01002854 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2855 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2856 return -EINVAL;
2857 }
2858
2859 /* Make sure we have enough slave (even) ports for the split. */
2860 if (count == 2) {
2861 base_port = local_port;
2862 if (mlxsw_sp->ports[base_port + 1]) {
2863 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2864 return -EINVAL;
2865 }
2866 } else {
2867 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2868 if (mlxsw_sp->ports[base_port + 1] ||
2869 mlxsw_sp->ports[base_port + 3]) {
2870 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2871 return -EINVAL;
2872 }
2873 }
2874
2875 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002876 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2877 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002878
Ido Schimmelbe945352016-06-09 09:51:39 +02002879 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2880 if (err) {
2881 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2882 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002883 }
2884
2885 return 0;
2886
Ido Schimmelbe945352016-06-09 09:51:39 +02002887err_port_split_create:
2888 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002889 return err;
2890}
2891
Jiri Pirkob2f10572016-04-08 19:11:23 +02002892static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002893{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002894 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002895 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002896 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002897 unsigned int count;
2898 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002899
2900 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2901 if (!mlxsw_sp_port) {
2902 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2903 local_port);
2904 return -EINVAL;
2905 }
2906
2907 if (!mlxsw_sp_port->split) {
2908 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2909 return -EINVAL;
2910 }
2911
Ido Schimmeld664b412016-06-09 09:51:40 +02002912 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002913 count = cur_width == 1 ? 4 : 2;
2914
2915 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2916
2917 /* Determine which ports to remove. */
2918 if (count == 2 && local_port >= base_port + 2)
2919 base_port = base_port + 2;
2920
2921 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002922 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2923 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002924
Ido Schimmelbe945352016-06-09 09:51:39 +02002925 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002926
2927 return 0;
2928}
2929
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002930static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2931 char *pude_pl, void *priv)
2932{
2933 struct mlxsw_sp *mlxsw_sp = priv;
2934 struct mlxsw_sp_port *mlxsw_sp_port;
2935 enum mlxsw_reg_pude_oper_status status;
2936 u8 local_port;
2937
2938 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2939 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002940 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002941 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002942
2943 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2944 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2945 netdev_info(mlxsw_sp_port->dev, "link up\n");
2946 netif_carrier_on(mlxsw_sp_port->dev);
2947 } else {
2948 netdev_info(mlxsw_sp_port->dev, "link down\n");
2949 netif_carrier_off(mlxsw_sp_port->dev);
2950 }
2951}
2952
Nogah Frankel14eeda92016-11-25 10:33:32 +01002953static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
2954 u8 local_port, void *priv)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002955{
2956 struct mlxsw_sp *mlxsw_sp = priv;
2957 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2958 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2959
2960 if (unlikely(!mlxsw_sp_port)) {
2961 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2962 local_port);
2963 return;
2964 }
2965
2966 skb->dev = mlxsw_sp_port->dev;
2967
2968 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2969 u64_stats_update_begin(&pcpu_stats->syncp);
2970 pcpu_stats->rx_packets++;
2971 pcpu_stats->rx_bytes += skb->len;
2972 u64_stats_update_end(&pcpu_stats->syncp);
2973
2974 skb->protocol = eth_type_trans(skb, skb->dev);
2975 netif_receive_skb(skb);
2976}
2977
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002978static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2979 void *priv)
2980{
2981 skb->offload_fwd_mark = 1;
Nogah Frankel14eeda92016-11-25 10:33:32 +01002982 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002983}
2984
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002985static void mlxsw_sp_rx_listener_sample_func(struct sk_buff *skb, u8 local_port,
2986 void *priv)
2987{
2988 struct mlxsw_sp *mlxsw_sp = priv;
2989 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2990 struct psample_group *psample_group;
2991 u32 size;
2992
2993 if (unlikely(!mlxsw_sp_port)) {
2994 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received for non-existent port\n",
2995 local_port);
2996 goto out;
2997 }
2998 if (unlikely(!mlxsw_sp_port->sample)) {
2999 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received on unsupported port\n",
3000 local_port);
3001 goto out;
3002 }
3003
3004 size = mlxsw_sp_port->sample->truncate ?
3005 mlxsw_sp_port->sample->trunc_size : skb->len;
3006
3007 rcu_read_lock();
3008 psample_group = rcu_dereference(mlxsw_sp_port->sample->psample_group);
3009 if (!psample_group)
3010 goto out_unlock;
3011 psample_sample_packet(psample_group, skb, size,
3012 mlxsw_sp_port->dev->ifindex, 0,
3013 mlxsw_sp_port->sample->rate);
3014out_unlock:
3015 rcu_read_unlock();
3016out:
3017 consume_skb(skb);
3018}
3019
Nogah Frankel117b0da2016-11-25 10:33:44 +01003020#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel0fb78a42016-11-25 10:33:39 +01003021 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01003022 _is_ctrl, SP_##_trap_group, DISCARD)
Ido Schimmel93393b32016-08-25 18:42:38 +02003023
Nogah Frankel117b0da2016-11-25 10:33:44 +01003024#define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel14eeda92016-11-25 10:33:32 +01003025 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01003026 _is_ctrl, SP_##_trap_group, DISCARD)
3027
3028#define MLXSW_SP_EVENTL(_func, _trap_id) \
3029 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
Nogah Frankel14eeda92016-11-25 10:33:32 +01003030
Nogah Frankel45449132016-11-25 10:33:35 +01003031static const struct mlxsw_listener mlxsw_sp_listener[] = {
3032 /* Events */
Nogah Frankel117b0da2016-11-25 10:33:44 +01003033 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
Nogah Frankelee4a60d2016-11-25 10:33:29 +01003034 /* L2 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01003035 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
3036 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
3037 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
3038 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
3039 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
3040 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
3041 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
3042 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
3043 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
3044 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
3045 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
Jiri Pirko9d41acc2017-04-18 16:55:38 +02003046 MLXSW_SP_RXL_NO_MARK(FID_MISS, TRAP_TO_CPU, IP2ME, false),
Ido Schimmel93393b32016-08-25 18:42:38 +02003047 /* L3 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01003048 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3049 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3050 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3051 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
3052 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
3053 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
3054 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
3055 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01003056 /* PKT Sample trap */
3057 MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,
3058 false, SP_IP2ME, DISCARD)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003059};
3060
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003061static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
3062{
3063 char qpcr_pl[MLXSW_REG_QPCR_LEN];
3064 enum mlxsw_reg_qpcr_ir_units ir_units;
3065 int max_cpu_policers;
3066 bool is_bytes;
3067 u8 burst_size;
3068 u32 rate;
3069 int i, err;
3070
3071 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
3072 return -EIO;
3073
3074 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
3075
3076 ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
3077 for (i = 0; i < max_cpu_policers; i++) {
3078 is_bytes = false;
3079 switch (i) {
3080 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
3081 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
3082 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
3083 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
3084 rate = 128;
3085 burst_size = 7;
3086 break;
3087 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
3088 rate = 16 * 1024;
3089 burst_size = 10;
3090 break;
3091 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
3092 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
3093 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
3094 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
3095 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
3096 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
3097 rate = 1024;
3098 burst_size = 7;
3099 break;
3100 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
3101 is_bytes = true;
3102 rate = 4 * 1024;
3103 burst_size = 4;
3104 break;
3105 default:
3106 continue;
3107 }
3108
3109 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
3110 burst_size);
3111 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
3112 if (err)
3113 return err;
3114 }
3115
3116 return 0;
3117}
3118
Nogah Frankel579c82e2016-11-25 10:33:42 +01003119static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003120{
3121 char htgt_pl[MLXSW_REG_HTGT_LEN];
Nogah Frankel117b0da2016-11-25 10:33:44 +01003122 enum mlxsw_reg_htgt_trap_group i;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003123 int max_cpu_policers;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003124 int max_trap_groups;
3125 u8 priority, tc;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003126 u16 policer_id;
Nogah Frankel117b0da2016-11-25 10:33:44 +01003127 int err;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003128
3129 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
3130 return -EIO;
3131
3132 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003133 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
Nogah Frankel579c82e2016-11-25 10:33:42 +01003134
3135 for (i = 0; i < max_trap_groups; i++) {
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003136 policer_id = i;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003137 switch (i) {
Nogah Frankel117b0da2016-11-25 10:33:44 +01003138 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
3139 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
3140 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
3141 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
3142 priority = 5;
3143 tc = 5;
3144 break;
3145 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
3146 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
3147 priority = 4;
3148 tc = 4;
3149 break;
3150 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
3151 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
3152 priority = 3;
3153 tc = 3;
3154 break;
3155 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
3156 priority = 2;
3157 tc = 2;
3158 break;
3159 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
3160 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
3161 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
3162 priority = 1;
3163 tc = 1;
3164 break;
3165 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
Nogah Frankel579c82e2016-11-25 10:33:42 +01003166 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
3167 tc = MLXSW_REG_HTGT_DEFAULT_TC;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003168 policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003169 break;
3170 default:
3171 continue;
3172 }
Nogah Frankel117b0da2016-11-25 10:33:44 +01003173
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003174 if (max_cpu_policers <= policer_id &&
3175 policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
3176 return -EIO;
3177
3178 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
Nogah Frankel579c82e2016-11-25 10:33:42 +01003179 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3180 if (err)
3181 return err;
3182 }
3183
3184 return 0;
3185}
3186
3187static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
3188{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003189 int i;
3190 int err;
3191
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003192 err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
3193 if (err)
3194 return err;
3195
Nogah Frankel579c82e2016-11-25 10:33:42 +01003196 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003197 if (err)
3198 return err;
3199
Nogah Frankel45449132016-11-25 10:33:35 +01003200 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003201 err = mlxsw_core_trap_register(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003202 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003203 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003204 if (err)
Nogah Frankel45449132016-11-25 10:33:35 +01003205 goto err_listener_register;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003206
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003207 }
3208 return 0;
3209
Nogah Frankel45449132016-11-25 10:33:35 +01003210err_listener_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003211 for (i--; i >= 0; i--) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003212 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003213 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003214 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003215 }
3216 return err;
3217}
3218
3219static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
3220{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003221 int i;
3222
Nogah Frankel45449132016-11-25 10:33:35 +01003223 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003224 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003225 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003226 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003227 }
3228}
3229
3230static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
3231 enum mlxsw_reg_sfgc_type type,
3232 enum mlxsw_reg_sfgc_bridge_type bridge_type)
3233{
3234 enum mlxsw_flood_table_type table_type;
3235 enum mlxsw_sp_flood_table flood_table;
3236 char sfgc_pl[MLXSW_REG_SFGC_LEN];
3237
Ido Schimmel19ae6122015-12-15 16:03:39 +01003238 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003239 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003240 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003241 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003242
Nogah Frankel71c365b2017-02-09 14:54:46 +01003243 switch (type) {
3244 case MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST:
Ido Schimmel19ae6122015-12-15 16:03:39 +01003245 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
Nogah Frankel71c365b2017-02-09 14:54:46 +01003246 break;
3247 case MLXSW_REG_SFGC_TYPE_UNREGISTERED_MULTICAST_IPV4:
Nogah Frankel71c365b2017-02-09 14:54:46 +01003248 flood_table = MLXSW_SP_FLOOD_TABLE_MC;
3249 break;
3250 default:
3251 flood_table = MLXSW_SP_FLOOD_TABLE_BC;
3252 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003253
3254 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
3255 flood_table);
3256 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
3257}
3258
3259static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
3260{
3261 int type, err;
3262
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003263 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
3264 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
3265 continue;
3266
3267 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3268 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
3269 if (err)
3270 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003271
3272 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3273 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
3274 if (err)
3275 return err;
3276 }
3277
3278 return 0;
3279}
3280
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003281static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
3282{
3283 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003284 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003285
3286 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
3287 MLXSW_REG_SLCR_LAG_HASH_DMAC |
3288 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
3289 MLXSW_REG_SLCR_LAG_HASH_VLANID |
3290 MLXSW_REG_SLCR_LAG_HASH_SIP |
3291 MLXSW_REG_SLCR_LAG_HASH_DIP |
3292 MLXSW_REG_SLCR_LAG_HASH_SPORT |
3293 MLXSW_REG_SLCR_LAG_HASH_DPORT |
3294 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003295 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3296 if (err)
3297 return err;
3298
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003299 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3300 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003301 return -EIO;
3302
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003303 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003304 sizeof(struct mlxsw_sp_upper),
3305 GFP_KERNEL);
3306 if (!mlxsw_sp->lags)
3307 return -ENOMEM;
3308
3309 return 0;
3310}
3311
3312static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3313{
3314 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003315}
3316
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003317static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3318{
3319 char htgt_pl[MLXSW_REG_HTGT_LEN];
3320
Nogah Frankel579c82e2016-11-25 10:33:42 +01003321 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3322 MLXSW_REG_HTGT_INVALID_POLICER,
3323 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3324 MLXSW_REG_HTGT_DEFAULT_TC);
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003325 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3326}
3327
Jiri Pirko202d6f42017-04-18 16:55:33 +02003328static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create);
3329
3330static int mlxsw_sp_dummy_fid_init(struct mlxsw_sp *mlxsw_sp)
3331{
3332 return mlxsw_sp_vfid_op(mlxsw_sp, MLXSW_SP_DUMMY_FID, true);
3333}
3334
3335static void mlxsw_sp_dummy_fid_fini(struct mlxsw_sp *mlxsw_sp)
3336{
3337 mlxsw_sp_vfid_op(mlxsw_sp, MLXSW_SP_DUMMY_FID, false);
3338}
3339
Jiri Pirkob2f10572016-04-08 19:11:23 +02003340static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003341 const struct mlxsw_bus_info *mlxsw_bus_info)
3342{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003343 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003344 int err;
3345
3346 mlxsw_sp->core = mlxsw_core;
3347 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02003348 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003349 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003350
3351 err = mlxsw_sp_base_mac_get(mlxsw_sp);
3352 if (err) {
3353 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3354 return err;
3355 }
3356
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003357 err = mlxsw_sp_traps_init(mlxsw_sp);
3358 if (err) {
Nogah Frankel45449132016-11-25 10:33:35 +01003359 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3360 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003361 }
3362
3363 err = mlxsw_sp_flood_init(mlxsw_sp);
3364 if (err) {
3365 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
3366 goto err_flood_init;
3367 }
3368
3369 err = mlxsw_sp_buffers_init(mlxsw_sp);
3370 if (err) {
3371 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3372 goto err_buffers_init;
3373 }
3374
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003375 err = mlxsw_sp_lag_init(mlxsw_sp);
3376 if (err) {
3377 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3378 goto err_lag_init;
3379 }
3380
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003381 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3382 if (err) {
3383 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3384 goto err_switchdev_init;
3385 }
3386
Ido Schimmel464dce12016-07-02 11:00:15 +02003387 err = mlxsw_sp_router_init(mlxsw_sp);
3388 if (err) {
3389 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3390 goto err_router_init;
3391 }
3392
Yotam Gigi763b4b72016-07-21 12:03:17 +02003393 err = mlxsw_sp_span_init(mlxsw_sp);
3394 if (err) {
3395 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3396 goto err_span_init;
3397 }
3398
Jiri Pirko22a67762017-02-03 10:29:07 +01003399 err = mlxsw_sp_acl_init(mlxsw_sp);
3400 if (err) {
3401 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL\n");
3402 goto err_acl_init;
3403 }
3404
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +01003405 err = mlxsw_sp_counter_pool_init(mlxsw_sp);
3406 if (err) {
3407 dev_err(mlxsw_sp->bus_info->dev, "Failed to init counter pool\n");
3408 goto err_counter_pool_init;
3409 }
3410
Arkadi Sharshevsky230ead02017-03-28 17:24:12 +02003411 err = mlxsw_sp_dpipe_init(mlxsw_sp);
3412 if (err) {
3413 dev_err(mlxsw_sp->bus_info->dev, "Failed to init pipeline debug\n");
3414 goto err_dpipe_init;
3415 }
3416
Jiri Pirko202d6f42017-04-18 16:55:33 +02003417 err = mlxsw_sp_dummy_fid_init(mlxsw_sp);
3418 if (err) {
3419 dev_err(mlxsw_sp->bus_info->dev, "Failed to init dummy FID\n");
3420 goto err_dummy_fid_init;
3421 }
3422
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003423 err = mlxsw_sp_ports_create(mlxsw_sp);
3424 if (err) {
3425 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3426 goto err_ports_create;
3427 }
3428
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003429 return 0;
3430
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003431err_ports_create:
Jiri Pirko202d6f42017-04-18 16:55:33 +02003432 mlxsw_sp_dummy_fid_fini(mlxsw_sp);
3433err_dummy_fid_init:
Arkadi Sharshevsky230ead02017-03-28 17:24:12 +02003434 mlxsw_sp_dpipe_fini(mlxsw_sp);
3435err_dpipe_init:
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +01003436 mlxsw_sp_counter_pool_fini(mlxsw_sp);
3437err_counter_pool_init:
Jiri Pirko22a67762017-02-03 10:29:07 +01003438 mlxsw_sp_acl_fini(mlxsw_sp);
3439err_acl_init:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003440 mlxsw_sp_span_fini(mlxsw_sp);
3441err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003442 mlxsw_sp_router_fini(mlxsw_sp);
3443err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003444 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003445err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003446 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003447err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003448 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003449err_buffers_init:
3450err_flood_init:
3451 mlxsw_sp_traps_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003452 return err;
3453}
3454
Jiri Pirkob2f10572016-04-08 19:11:23 +02003455static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003456{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003457 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003458
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003459 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko202d6f42017-04-18 16:55:33 +02003460 mlxsw_sp_dummy_fid_fini(mlxsw_sp);
Arkadi Sharshevsky230ead02017-03-28 17:24:12 +02003461 mlxsw_sp_dpipe_fini(mlxsw_sp);
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +01003462 mlxsw_sp_counter_pool_fini(mlxsw_sp);
Jiri Pirko22a67762017-02-03 10:29:07 +01003463 mlxsw_sp_acl_fini(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003464 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003465 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003466 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003467 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003468 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003469 mlxsw_sp_traps_fini(mlxsw_sp);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003470 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003471 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003472}
3473
3474static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3475 .used_max_vepa_channels = 1,
3476 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003477 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003478 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003479 .used_max_pgt = 1,
3480 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003481 .used_flood_tables = 1,
3482 .used_flood_mode = 1,
3483 .flood_mode = 3,
Nogah Frankel71c365b2017-02-09 14:54:46 +01003484 .max_fid_offset_flood_tables = 3,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003485 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Nogah Frankel71c365b2017-02-09 14:54:46 +01003486 .max_fid_flood_tables = 3,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003487 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003488 .used_max_ib_mc = 1,
3489 .max_ib_mc = 0,
3490 .used_max_pkey = 1,
3491 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003492 .used_kvd_split_data = 1,
3493 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3494 .kvd_hash_single_parts = 2,
3495 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003496 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003497 .swid_config = {
3498 {
3499 .used_type = 1,
3500 .type = MLXSW_PORT_SWID_TYPE_ETH,
3501 }
3502 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003503 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003504};
3505
3506static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003507 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003508 .priv_size = sizeof(struct mlxsw_sp),
3509 .init = mlxsw_sp_init,
3510 .fini = mlxsw_sp_fini,
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003511 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003512 .port_split = mlxsw_sp_port_split,
3513 .port_unsplit = mlxsw_sp_port_unsplit,
3514 .sb_pool_get = mlxsw_sp_sb_pool_get,
3515 .sb_pool_set = mlxsw_sp_sb_pool_set,
3516 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3517 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3518 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3519 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3520 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3521 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3522 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3523 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3524 .txhdr_construct = mlxsw_sp_txhdr_construct,
3525 .txhdr_len = MLXSW_TXHDR_LEN,
3526 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003527};
3528
Jiri Pirko22a67762017-02-03 10:29:07 +01003529bool mlxsw_sp_port_dev_check(const struct net_device *dev)
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003530{
3531 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3532}
3533
Jiri Pirko1182e532017-03-06 21:25:20 +01003534static int mlxsw_sp_lower_dev_walk(struct net_device *lower_dev, void *data)
David Aherndd823642016-10-17 19:15:49 -07003535{
Jiri Pirko1182e532017-03-06 21:25:20 +01003536 struct mlxsw_sp_port **p_mlxsw_sp_port = data;
David Aherndd823642016-10-17 19:15:49 -07003537 int ret = 0;
3538
3539 if (mlxsw_sp_port_dev_check(lower_dev)) {
Jiri Pirko1182e532017-03-06 21:25:20 +01003540 *p_mlxsw_sp_port = netdev_priv(lower_dev);
David Aherndd823642016-10-17 19:15:49 -07003541 ret = 1;
3542 }
3543
3544 return ret;
3545}
3546
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003547static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3548{
Jiri Pirko1182e532017-03-06 21:25:20 +01003549 struct mlxsw_sp_port *mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003550
3551 if (mlxsw_sp_port_dev_check(dev))
3552 return netdev_priv(dev);
3553
Jiri Pirko1182e532017-03-06 21:25:20 +01003554 mlxsw_sp_port = NULL;
3555 netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &mlxsw_sp_port);
David Aherndd823642016-10-17 19:15:49 -07003556
Jiri Pirko1182e532017-03-06 21:25:20 +01003557 return mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003558}
3559
Ido Schimmel4724ba562017-03-10 08:53:39 +01003560struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003561{
3562 struct mlxsw_sp_port *mlxsw_sp_port;
3563
3564 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3565 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3566}
3567
3568static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3569{
Jiri Pirko1182e532017-03-06 21:25:20 +01003570 struct mlxsw_sp_port *mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003571
3572 if (mlxsw_sp_port_dev_check(dev))
3573 return netdev_priv(dev);
3574
Jiri Pirko1182e532017-03-06 21:25:20 +01003575 mlxsw_sp_port = NULL;
3576 netdev_walk_all_lower_dev_rcu(dev, mlxsw_sp_lower_dev_walk,
3577 &mlxsw_sp_port);
David Aherndd823642016-10-17 19:15:49 -07003578
Jiri Pirko1182e532017-03-06 21:25:20 +01003579 return mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003580}
3581
3582struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3583{
3584 struct mlxsw_sp_port *mlxsw_sp_port;
3585
3586 rcu_read_lock();
3587 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3588 if (mlxsw_sp_port)
3589 dev_hold(mlxsw_sp_port->dev);
3590 rcu_read_unlock();
3591 return mlxsw_sp_port;
3592}
3593
3594void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3595{
3596 dev_put(mlxsw_sp_port->dev);
3597}
3598
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003599static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3600 u16 fid)
3601{
3602 if (mlxsw_sp_fid_is_vfid(fid))
3603 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3604 else
3605 return test_bit(fid, lag_port->active_vlans);
3606}
3607
3608static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3609 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003610{
3611 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003612 u8 local_port = mlxsw_sp_port->local_port;
3613 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003614 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003615 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003616
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003617 if (!mlxsw_sp_port->lagged)
3618 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003619
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003620 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3621 MAX_LAG_MEMBERS);
3622 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003623 struct mlxsw_sp_port *lag_port;
3624
3625 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3626 if (!lag_port || lag_port->local_port == local_port)
3627 continue;
3628 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3629 count++;
3630 }
3631
3632 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003633}
3634
3635static int
3636mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3637 u16 fid)
3638{
3639 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3640 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3641
3642 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3643 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3644 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3645 mlxsw_sp_port->local_port);
3646
Ido Schimmel22305372016-06-20 23:04:21 +02003647 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3648 mlxsw_sp_port->local_port, fid);
3649
Ido Schimmel039c49a2016-01-27 15:20:18 +01003650 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3651}
3652
3653static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003654mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3655 u16 fid)
3656{
3657 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3658 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3659
3660 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3661 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3662 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3663
Ido Schimmel22305372016-06-20 23:04:21 +02003664 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3665 mlxsw_sp_port->lag_id, fid);
3666
Ido Schimmel039c49a2016-01-27 15:20:18 +01003667 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3668}
3669
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003670int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003671{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003672 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3673 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003674
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003675 if (mlxsw_sp_port->lagged)
3676 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003677 fid);
3678 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003679 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003680}
3681
Ido Schimmel701b1862016-07-04 08:23:16 +02003682static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3683{
3684 struct mlxsw_sp_fid *f, *tmp;
3685
3686 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3687 if (--f->ref_count == 0)
3688 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3689 else
3690 WARN_ON_ONCE(1);
3691}
3692
Ido Schimmel7117a572016-06-20 23:04:06 +02003693static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3694 struct net_device *br_dev)
3695{
Ido Schimmel5f6935c2017-05-16 19:38:26 +02003696 struct mlxsw_sp_upper *master_bridge = mlxsw_sp_master_bridge(mlxsw_sp);
3697
3698 return !master_bridge->dev || master_bridge->dev == br_dev;
Ido Schimmel7117a572016-06-20 23:04:06 +02003699}
3700
3701static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3702 struct net_device *br_dev)
3703{
Ido Schimmel5f6935c2017-05-16 19:38:26 +02003704 struct mlxsw_sp_upper *master_bridge = mlxsw_sp_master_bridge(mlxsw_sp);
3705
3706 master_bridge->dev = br_dev;
3707 master_bridge->ref_count++;
Ido Schimmel7117a572016-06-20 23:04:06 +02003708}
3709
3710static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3711{
Ido Schimmel5f6935c2017-05-16 19:38:26 +02003712 struct mlxsw_sp_upper *master_bridge = mlxsw_sp_master_bridge(mlxsw_sp);
3713
3714 if (--master_bridge->ref_count == 0) {
3715 master_bridge->dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003716 /* It's possible upper VLAN devices are still holding
3717 * references to underlying FIDs. Drop the reference
3718 * and release the resources if it was the last one.
3719 * If it wasn't, then something bad happened.
3720 */
3721 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3722 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003723}
3724
3725static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3726 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003727{
3728 struct net_device *dev = mlxsw_sp_port->dev;
3729 int err;
3730
3731 /* When port is not bridged untagged packets are tagged with
3732 * PVID=VID=1, thereby creating an implicit VLAN interface in
3733 * the device. Remove it and let bridge code take care of its
3734 * own VLANs.
3735 */
3736 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003737 if (err)
3738 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003739
Ido Schimmel7117a572016-06-20 23:04:06 +02003740 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3741
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003742 mlxsw_sp_port->learning = 1;
3743 mlxsw_sp_port->learning_sync = 1;
3744 mlxsw_sp_port->uc_flood = 1;
Nogah Frankel71c365b2017-02-09 14:54:46 +01003745 mlxsw_sp_port->mc_flood = 1;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01003746 mlxsw_sp_port->mc_router = 0;
3747 mlxsw_sp_port->mc_disabled = 1;
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003748 mlxsw_sp_port->bridged = 1;
3749
3750 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003751}
3752
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003753static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003754{
3755 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003756
Ido Schimmel28a01d22016-02-18 11:30:02 +01003757 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3758
Ido Schimmel7117a572016-06-20 23:04:06 +02003759 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3760
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003761 mlxsw_sp_port->learning = 0;
3762 mlxsw_sp_port->learning_sync = 0;
3763 mlxsw_sp_port->uc_flood = 0;
Nogah Frankel71c365b2017-02-09 14:54:46 +01003764 mlxsw_sp_port->mc_flood = 0;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01003765 mlxsw_sp_port->mc_router = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003766 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003767
3768 /* Add implicit VLAN interface in the device, so that untagged
3769 * packets will be classified to the default vFID.
3770 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003771 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003772}
3773
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003774static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003775{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003776 char sldr_pl[MLXSW_REG_SLDR_LEN];
3777
3778 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3779 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3780}
3781
3782static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3783{
3784 char sldr_pl[MLXSW_REG_SLDR_LEN];
3785
3786 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3787 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3788}
3789
3790static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3791 u16 lag_id, u8 port_index)
3792{
3793 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3794 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3795
3796 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3797 lag_id, port_index);
3798 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3799}
3800
3801static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3802 u16 lag_id)
3803{
3804 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3805 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3806
3807 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3808 lag_id);
3809 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3810}
3811
3812static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3813 u16 lag_id)
3814{
3815 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3816 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3817
3818 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3819 lag_id);
3820 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3821}
3822
3823static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3824 u16 lag_id)
3825{
3826 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3827 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3828
3829 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3830 lag_id);
3831 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3832}
3833
3834static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3835 struct net_device *lag_dev,
3836 u16 *p_lag_id)
3837{
3838 struct mlxsw_sp_upper *lag;
3839 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003840 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003841 int i;
3842
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003843 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
3844 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003845 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3846 if (lag->ref_count) {
3847 if (lag->dev == lag_dev) {
3848 *p_lag_id = i;
3849 return 0;
3850 }
3851 } else if (free_lag_id < 0) {
3852 free_lag_id = i;
3853 }
3854 }
3855 if (free_lag_id < 0)
3856 return -EBUSY;
3857 *p_lag_id = free_lag_id;
3858 return 0;
3859}
3860
3861static bool
3862mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3863 struct net_device *lag_dev,
3864 struct netdev_lag_upper_info *lag_upper_info)
3865{
3866 u16 lag_id;
3867
3868 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3869 return false;
3870 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3871 return false;
3872 return true;
3873}
3874
3875static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3876 u16 lag_id, u8 *p_port_index)
3877{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003878 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003879 int i;
3880
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003881 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3882 MAX_LAG_MEMBERS);
3883 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003884 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3885 *p_port_index = i;
3886 return 0;
3887 }
3888 }
3889 return -EBUSY;
3890}
3891
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003892static void
3893mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel186962e2017-03-10 08:53:36 +01003894 struct net_device *lag_dev, u16 lag_id)
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003895{
3896 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003897 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003898
3899 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3900 if (WARN_ON(!mlxsw_sp_vport))
3901 return;
3902
Ido Schimmel11943ff2016-07-02 11:00:12 +02003903 /* If vPort is assigned a RIF, then leave it since it's no
3904 * longer valid.
3905 */
3906 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3907 if (f)
3908 f->leave(mlxsw_sp_vport);
3909
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003910 mlxsw_sp_vport->lag_id = lag_id;
3911 mlxsw_sp_vport->lagged = 1;
Ido Schimmel186962e2017-03-10 08:53:36 +01003912 mlxsw_sp_vport->dev = lag_dev;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003913}
3914
3915static void
3916mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3917{
3918 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003919 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003920
3921 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3922 if (WARN_ON(!mlxsw_sp_vport))
3923 return;
3924
Ido Schimmel11943ff2016-07-02 11:00:12 +02003925 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3926 if (f)
3927 f->leave(mlxsw_sp_vport);
3928
Ido Schimmel186962e2017-03-10 08:53:36 +01003929 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003930 mlxsw_sp_vport->lagged = 0;
3931}
3932
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003933static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3934 struct net_device *lag_dev)
3935{
3936 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3937 struct mlxsw_sp_upper *lag;
3938 u16 lag_id;
3939 u8 port_index;
3940 int err;
3941
3942 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3943 if (err)
3944 return err;
3945 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3946 if (!lag->ref_count) {
3947 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3948 if (err)
3949 return err;
3950 lag->dev = lag_dev;
3951 }
3952
3953 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3954 if (err)
3955 return err;
3956 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3957 if (err)
3958 goto err_col_port_add;
3959 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3960 if (err)
3961 goto err_col_port_enable;
3962
3963 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3964 mlxsw_sp_port->local_port);
3965 mlxsw_sp_port->lag_id = lag_id;
3966 mlxsw_sp_port->lagged = 1;
3967 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003968
Ido Schimmel186962e2017-03-10 08:53:36 +01003969 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_dev, lag_id);
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003970
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003971 return 0;
3972
Ido Schimmel51554db2016-05-06 22:18:39 +02003973err_col_port_enable:
3974 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003975err_col_port_add:
3976 if (!lag->ref_count)
3977 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003978 return err;
3979}
3980
Ido Schimmel82e6db02016-06-20 23:04:04 +02003981static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3982 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003983{
3984 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003985 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02003986 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003987
3988 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003989 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003990 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3991 WARN_ON(lag->ref_count == 0);
3992
Ido Schimmel82e6db02016-06-20 23:04:04 +02003993 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3994 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003995
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003996 if (mlxsw_sp_port->bridged) {
3997 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003998 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003999 }
4000
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004001 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004002 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004003
4004 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4005 mlxsw_sp_port->local_port);
4006 mlxsw_sp_port->lagged = 0;
4007 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004008
4009 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004010}
4011
Jiri Pirko74581202015-12-03 12:12:30 +01004012static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4013 u16 lag_id)
4014{
4015 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4016 char sldr_pl[MLXSW_REG_SLDR_LEN];
4017
4018 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4019 mlxsw_sp_port->local_port);
4020 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4021}
4022
4023static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4024 u16 lag_id)
4025{
4026 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4027 char sldr_pl[MLXSW_REG_SLDR_LEN];
4028
4029 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4030 mlxsw_sp_port->local_port);
4031 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4032}
4033
4034static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4035 bool lag_tx_enabled)
4036{
4037 if (lag_tx_enabled)
4038 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4039 mlxsw_sp_port->lag_id);
4040 else
4041 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4042 mlxsw_sp_port->lag_id);
4043}
4044
4045static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4046 struct netdev_lag_lower_state_info *info)
4047{
4048 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4049}
4050
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004051static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4052 struct net_device *vlan_dev)
4053{
4054 struct mlxsw_sp_port *mlxsw_sp_vport;
4055 u16 vid = vlan_dev_vlan_id(vlan_dev);
4056
4057 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004058 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004059 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004060
4061 mlxsw_sp_vport->dev = vlan_dev;
4062
4063 return 0;
4064}
4065
Ido Schimmel82e6db02016-06-20 23:04:04 +02004066static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4067 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004068{
4069 struct mlxsw_sp_port *mlxsw_sp_vport;
4070 u16 vid = vlan_dev_vlan_id(vlan_dev);
4071
4072 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004073 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004074 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004075
4076 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004077}
4078
Jiri Pirko2b94e582017-04-18 16:55:37 +02004079static int mlxsw_sp_port_stp_set(struct mlxsw_sp_port *mlxsw_sp_port,
4080 bool enable)
4081{
4082 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4083 enum mlxsw_reg_spms_state spms_state;
4084 char *spms_pl;
4085 u16 vid;
4086 int err;
4087
4088 spms_state = enable ? MLXSW_REG_SPMS_STATE_FORWARDING :
4089 MLXSW_REG_SPMS_STATE_DISCARDING;
4090
4091 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
4092 if (!spms_pl)
4093 return -ENOMEM;
4094 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
4095
4096 for (vid = 0; vid < VLAN_N_VID; vid++)
4097 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
4098
4099 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
4100 kfree(spms_pl);
4101 return err;
4102}
4103
4104static int mlxsw_sp_port_ovs_join(struct mlxsw_sp_port *mlxsw_sp_port)
4105{
4106 int err;
4107
4108 err = mlxsw_sp_port_stp_set(mlxsw_sp_port, true);
4109 if (err)
4110 return err;
4111 err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, 2, VLAN_N_VID - 1,
4112 true, false);
4113 if (err)
4114 goto err_port_vlan_set;
4115 return 0;
4116
4117err_port_vlan_set:
4118 mlxsw_sp_port_stp_set(mlxsw_sp_port, false);
4119 return err;
4120}
4121
4122static void mlxsw_sp_port_ovs_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4123{
4124 mlxsw_sp_port_vlan_set(mlxsw_sp_port, 2, VLAN_N_VID - 1,
4125 false, false);
4126 mlxsw_sp_port_stp_set(mlxsw_sp_port, false);
4127}
4128
Jiri Pirko74581202015-12-03 12:12:30 +01004129static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4130 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004131{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004132 struct netdev_notifier_changeupper_info *info;
4133 struct mlxsw_sp_port *mlxsw_sp_port;
4134 struct net_device *upper_dev;
4135 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004136 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004137
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004138 mlxsw_sp_port = netdev_priv(dev);
4139 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4140 info = ptr;
4141
4142 switch (event) {
4143 case NETDEV_PRECHANGEUPPER:
4144 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004145 if (!is_vlan_dev(upper_dev) &&
4146 !netif_is_lag_master(upper_dev) &&
Ido Schimmel7179eb52017-03-16 09:08:18 +01004147 !netif_is_bridge_master(upper_dev) &&
Jiri Pirko2b94e582017-04-18 16:55:37 +02004148 !netif_is_ovs_master(upper_dev))
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004149 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004150 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004151 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004152 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004153 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004154 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004155 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004156 if (netif_is_lag_master(upper_dev) &&
4157 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4158 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004159 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004160 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4161 return -EINVAL;
4162 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4163 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4164 return -EINVAL;
Jiri Pirko2b94e582017-04-18 16:55:37 +02004165 if (netif_is_ovs_master(upper_dev) && vlan_uses_dev(dev))
4166 return -EINVAL;
4167 if (netif_is_ovs_port(dev) && is_vlan_dev(upper_dev))
4168 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004169 break;
4170 case NETDEV_CHANGEUPPER:
4171 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004172 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004173 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004174 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4175 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004176 else
Jiri Pirkob51df792017-04-18 16:55:31 +02004177 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4178 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004179 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004180 if (info->linking)
4181 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4182 upper_dev);
4183 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004184 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004185 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004186 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004187 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4188 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004189 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004190 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4191 upper_dev);
Jiri Pirko2b94e582017-04-18 16:55:37 +02004192 } else if (netif_is_ovs_master(upper_dev)) {
4193 if (info->linking)
4194 err = mlxsw_sp_port_ovs_join(mlxsw_sp_port);
4195 else
4196 mlxsw_sp_port_ovs_leave(mlxsw_sp_port);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004197 } else {
4198 err = -EINVAL;
4199 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004200 }
4201 break;
4202 }
4203
Ido Schimmel80bedf12016-06-20 23:03:59 +02004204 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004205}
4206
Jiri Pirko74581202015-12-03 12:12:30 +01004207static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4208 unsigned long event, void *ptr)
4209{
4210 struct netdev_notifier_changelowerstate_info *info;
4211 struct mlxsw_sp_port *mlxsw_sp_port;
4212 int err;
4213
4214 mlxsw_sp_port = netdev_priv(dev);
4215 info = ptr;
4216
4217 switch (event) {
4218 case NETDEV_CHANGELOWERSTATE:
4219 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4220 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4221 info->lower_state_info);
4222 if (err)
4223 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4224 }
4225 break;
4226 }
4227
Ido Schimmel80bedf12016-06-20 23:03:59 +02004228 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004229}
4230
4231static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4232 unsigned long event, void *ptr)
4233{
4234 switch (event) {
4235 case NETDEV_PRECHANGEUPPER:
4236 case NETDEV_CHANGEUPPER:
4237 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4238 case NETDEV_CHANGELOWERSTATE:
4239 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4240 }
4241
Ido Schimmel80bedf12016-06-20 23:03:59 +02004242 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004243}
4244
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004245static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4246 unsigned long event, void *ptr)
4247{
4248 struct net_device *dev;
4249 struct list_head *iter;
4250 int ret;
4251
4252 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4253 if (mlxsw_sp_port_dev_check(dev)) {
4254 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004255 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004256 return ret;
4257 }
4258 }
4259
Ido Schimmel80bedf12016-06-20 23:03:59 +02004260 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004261}
4262
Ido Schimmel701b1862016-07-04 08:23:16 +02004263static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4264 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004265{
Ido Schimmel701b1862016-07-04 08:23:16 +02004266 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004267 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004268
Ido Schimmel701b1862016-07-04 08:23:16 +02004269 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4270 if (!f) {
4271 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4272 if (IS_ERR(f))
4273 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004274 }
4275
Ido Schimmel701b1862016-07-04 08:23:16 +02004276 f->ref_count++;
4277
4278 return 0;
4279}
4280
4281static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4282 struct net_device *vlan_dev)
4283{
4284 u16 fid = vlan_dev_vlan_id(vlan_dev);
4285 struct mlxsw_sp_fid *f;
4286
4287 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Arkadi Sharshevskybf952332017-03-17 09:38:00 +01004288 if (f && f->rif)
4289 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->rif);
Ido Schimmel701b1862016-07-04 08:23:16 +02004290 if (f && --f->ref_count == 0)
4291 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4292}
4293
4294static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4295 unsigned long event, void *ptr)
4296{
4297 struct netdev_notifier_changeupper_info *info;
4298 struct net_device *upper_dev;
4299 struct mlxsw_sp *mlxsw_sp;
Ido Schimmelb4149702017-03-10 08:53:34 +01004300 int err = 0;
Ido Schimmel701b1862016-07-04 08:23:16 +02004301
4302 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4303 if (!mlxsw_sp)
4304 return 0;
Ido Schimmel701b1862016-07-04 08:23:16 +02004305
4306 info = ptr;
4307
4308 switch (event) {
Ido Schimmelb4149702017-03-10 08:53:34 +01004309 case NETDEV_PRECHANGEUPPER:
Ido Schimmel701b1862016-07-04 08:23:16 +02004310 upper_dev = info->upper_dev;
Ido Schimmelb1e45522017-04-30 19:47:14 +03004311 if (!is_vlan_dev(upper_dev))
Ido Schimmelb4149702017-03-10 08:53:34 +01004312 return -EINVAL;
4313 if (is_vlan_dev(upper_dev) &&
Ido Schimmel5f6935c2017-05-16 19:38:26 +02004314 br_dev != mlxsw_sp_master_bridge(mlxsw_sp)->dev)
Ido Schimmelb4149702017-03-10 08:53:34 +01004315 return -EINVAL;
4316 break;
4317 case NETDEV_CHANGEUPPER:
4318 upper_dev = info->upper_dev;
4319 if (is_vlan_dev(upper_dev)) {
4320 if (info->linking)
4321 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4322 upper_dev);
4323 else
4324 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp,
4325 upper_dev);
Ido Schimmel701b1862016-07-04 08:23:16 +02004326 } else {
Ido Schimmelb4149702017-03-10 08:53:34 +01004327 err = -EINVAL;
4328 WARN_ON(1);
Ido Schimmel701b1862016-07-04 08:23:16 +02004329 }
4330 break;
4331 }
4332
Ido Schimmelb4149702017-03-10 08:53:34 +01004333 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004334}
4335
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004336static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004337{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004338 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004339 MLXSW_SP_VFID_MAX);
4340}
4341
4342static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4343{
4344 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4345
4346 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4347 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004348}
4349
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004350static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004351
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004352static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4353 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004354{
4355 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004356 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004357 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004358 int err;
4359
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004360 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004361 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004362 dev_err(dev, "No available vFIDs\n");
4363 return ERR_PTR(-ERANGE);
4364 }
4365
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004366 fid = mlxsw_sp_vfid_to_fid(vfid);
4367 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004368 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004369 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004370 return ERR_PTR(err);
4371 }
4372
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004373 f = kzalloc(sizeof(*f), GFP_KERNEL);
4374 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004375 goto err_allocate_vfid;
4376
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004377 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004378 f->fid = fid;
4379 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004380
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004381 list_add(&f->list, &mlxsw_sp->vfids.list);
4382 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004383
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004384 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004385
4386err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004387 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004388 return ERR_PTR(-ENOMEM);
4389}
4390
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004391static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4392 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004393{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004394 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004395 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004396
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004397 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004398 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004399
Arkadi Sharshevskybf952332017-03-17 09:38:00 +01004400 if (f->rif)
4401 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->rif);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004402
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004403 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004404
4405 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004406}
4407
Ido Schimmel99724c12016-07-04 08:23:14 +02004408static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4409 bool valid)
4410{
4411 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4412 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4413
4414 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4415 vid);
4416}
4417
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004418static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4419 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004420{
Ido Schimmel0355b592016-06-20 23:04:13 +02004421 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004422 int err;
4423
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004424 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004425 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004426 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004427 if (IS_ERR(f))
4428 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004429 }
4430
Ido Schimmel0355b592016-06-20 23:04:13 +02004431 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4432 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004433 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004434
Ido Schimmel0355b592016-06-20 23:04:13 +02004435 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4436 if (err)
4437 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004438
Ido Schimmel41b996c2016-06-20 23:04:17 +02004439 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004440 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004441
Ido Schimmel22305372016-06-20 23:04:21 +02004442 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4443
Ido Schimmel0355b592016-06-20 23:04:13 +02004444 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004445
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004446err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004447 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4448err_vport_flood_set:
4449 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004450 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004451 return err;
4452}
4453
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004454static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004455{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004456 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004457
Ido Schimmel22305372016-06-20 23:04:21 +02004458 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4459
Ido Schimmel0355b592016-06-20 23:04:13 +02004460 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4461
4462 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4463
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004464 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4465
Ido Schimmel41b996c2016-06-20 23:04:17 +02004466 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004467 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004468 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004469}
4470
4471static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4472 struct net_device *br_dev)
4473{
Ido Schimmel99724c12016-07-04 08:23:14 +02004474 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004475 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4476 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004477 int err;
4478
Ido Schimmel99724c12016-07-04 08:23:14 +02004479 if (f && !WARN_ON(!f->leave))
4480 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004481
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004482 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004483 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004484 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004485 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004486 }
4487
4488 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4489 if (err) {
4490 netdev_err(dev, "Failed to enable learning\n");
4491 goto err_port_vid_learning_set;
4492 }
4493
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004494 mlxsw_sp_vport->learning = 1;
4495 mlxsw_sp_vport->learning_sync = 1;
4496 mlxsw_sp_vport->uc_flood = 1;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004497 mlxsw_sp_vport->mc_flood = 1;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01004498 mlxsw_sp_vport->mc_router = 0;
4499 mlxsw_sp_vport->mc_disabled = 1;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004500 mlxsw_sp_vport->bridged = 1;
4501
4502 return 0;
4503
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004504err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004505 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004506 return err;
4507}
4508
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004509static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004510{
4511 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004512
4513 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4514
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004515 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004516
Ido Schimmel0355b592016-06-20 23:04:13 +02004517 mlxsw_sp_vport->learning = 0;
4518 mlxsw_sp_vport->learning_sync = 0;
4519 mlxsw_sp_vport->uc_flood = 0;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004520 mlxsw_sp_vport->mc_flood = 0;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01004521 mlxsw_sp_vport->mc_router = 0;
Ido Schimmel0355b592016-06-20 23:04:13 +02004522 mlxsw_sp_vport->bridged = 0;
4523}
4524
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004525static bool
4526mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4527 const struct net_device *br_dev)
4528{
4529 struct mlxsw_sp_port *mlxsw_sp_vport;
4530
4531 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4532 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004533 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004534
4535 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004536 return false;
4537 }
4538
4539 return true;
4540}
4541
4542static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4543 unsigned long event, void *ptr,
4544 u16 vid)
4545{
4546 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4547 struct netdev_notifier_changeupper_info *info = ptr;
4548 struct mlxsw_sp_port *mlxsw_sp_vport;
4549 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004550 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004551
4552 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel1f880612017-03-10 08:53:35 +01004553 if (!mlxsw_sp_vport)
4554 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004555
4556 switch (event) {
4557 case NETDEV_PRECHANGEUPPER:
4558 upper_dev = info->upper_dev;
Ido Schimmelb1e45522017-04-30 19:47:14 +03004559 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004560 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004561 if (!info->linking)
4562 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004563 /* We can't have multiple VLAN interfaces configured on
4564 * the same port and being members in the same bridge.
4565 */
Ido Schimmel7179eb52017-03-16 09:08:18 +01004566 if (netif_is_bridge_master(upper_dev) &&
4567 !mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004568 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004569 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004570 break;
4571 case NETDEV_CHANGEUPPER:
4572 upper_dev = info->upper_dev;
Ido Schimmel1f880612017-03-10 08:53:35 +01004573 if (netif_is_bridge_master(upper_dev)) {
4574 if (info->linking)
4575 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4576 upper_dev);
4577 else
4578 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004579 } else {
Ido Schimmel1f880612017-03-10 08:53:35 +01004580 err = -EINVAL;
4581 WARN_ON(1);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004582 }
Ido Schimmel1f880612017-03-10 08:53:35 +01004583 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004584 }
4585
Ido Schimmel80bedf12016-06-20 23:03:59 +02004586 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004587}
4588
Ido Schimmel272c4472015-12-15 16:03:47 +01004589static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4590 unsigned long event, void *ptr,
4591 u16 vid)
4592{
4593 struct net_device *dev;
4594 struct list_head *iter;
4595 int ret;
4596
4597 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4598 if (mlxsw_sp_port_dev_check(dev)) {
4599 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4600 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004601 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004602 return ret;
4603 }
4604 }
4605
Ido Schimmel80bedf12016-06-20 23:03:59 +02004606 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004607}
4608
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004609static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4610 unsigned long event, void *ptr)
4611{
4612 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4613 u16 vid = vlan_dev_vlan_id(vlan_dev);
4614
Ido Schimmel272c4472015-12-15 16:03:47 +01004615 if (mlxsw_sp_port_dev_check(real_dev))
4616 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4617 vid);
4618 else if (netif_is_lag_master(real_dev))
4619 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4620 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004621
Ido Schimmel80bedf12016-06-20 23:03:59 +02004622 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004623}
4624
Ido Schimmelb1e45522017-04-30 19:47:14 +03004625static bool mlxsw_sp_is_vrf_event(unsigned long event, void *ptr)
4626{
4627 struct netdev_notifier_changeupper_info *info = ptr;
4628
4629 if (event != NETDEV_PRECHANGEUPPER && event != NETDEV_CHANGEUPPER)
4630 return false;
4631 return netif_is_l3_master(info->upper_dev);
4632}
4633
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004634static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4635 unsigned long event, void *ptr)
4636{
4637 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004638 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004639
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004640 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4641 err = mlxsw_sp_netdevice_router_port_event(dev);
Ido Schimmelb1e45522017-04-30 19:47:14 +03004642 else if (mlxsw_sp_is_vrf_event(event, ptr))
4643 err = mlxsw_sp_netdevice_vrf_event(dev, event, ptr);
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004644 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004645 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4646 else if (netif_is_lag_master(dev))
4647 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004648 else if (netif_is_bridge_master(dev))
4649 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004650 else if (is_vlan_dev(dev))
4651 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004652
Ido Schimmel80bedf12016-06-20 23:03:59 +02004653 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004654}
4655
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004656static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4657 .notifier_call = mlxsw_sp_netdevice_event,
4658};
4659
Ido Schimmel99724c12016-07-04 08:23:14 +02004660static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4661 .notifier_call = mlxsw_sp_inetaddr_event,
4662 .priority = 10, /* Must be called before FIB notifier block */
4663};
4664
Jiri Pirkoe7322632016-09-01 10:37:43 +02004665static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4666 .notifier_call = mlxsw_sp_router_netevent_event,
4667};
4668
Jiri Pirko1d20d232016-10-27 15:12:59 +02004669static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4670 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4671 {0, },
4672};
4673
4674static struct pci_driver mlxsw_sp_pci_driver = {
4675 .name = mlxsw_sp_driver_name,
4676 .id_table = mlxsw_sp_pci_id_table,
4677};
4678
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004679static int __init mlxsw_sp_module_init(void)
4680{
4681 int err;
4682
4683 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004684 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004685 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4686
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004687 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4688 if (err)
4689 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004690
4691 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4692 if (err)
4693 goto err_pci_driver_register;
4694
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004695 return 0;
4696
Jiri Pirko1d20d232016-10-27 15:12:59 +02004697err_pci_driver_register:
4698 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004699err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004700 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004701 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004702 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4703 return err;
4704}
4705
4706static void __exit mlxsw_sp_module_exit(void)
4707{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004708 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004709 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004710 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004711 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004712 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4713}
4714
4715module_init(mlxsw_sp_module_init);
4716module_exit(mlxsw_sp_module_exit);
4717
4718MODULE_LICENSE("Dual BSD/GPL");
4719MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4720MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004721MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);