Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 0f370936a03e85c2a5c41a3b404ec5e2fe289917 / . / llvm / lib / Target / X86 / X86InstrFragmentsSIMD.td
blob: 1f61ffa84e9af91cddb0cbeba1e8a8eee2e57faa [file] [log] [blame]
Jia Liue1d61962012-02-19 02:03:36 +0000[diff] [blame]1//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +0000[diff] [blame]7//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]8//===----------------------------------------------------------------------===//
9//
10// This file provides pattern fragments useful for SIMD instructions.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]15// MMX specific DAG Nodes.
16//===----------------------------------------------------------------------===//
17
18// Low word of MMX to GPR.
19def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,
20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
Bruno Cardoso Lopesab9ae872015-02-05 13:23:07 +0000[diff] [blame]21// GPR to low word of MMX.
22def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1,
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]24
25//===----------------------------------------------------------------------===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]26// MMX Pattern Fragments
27//===----------------------------------------------------------------------===//
28
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]29def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>;
Bruno Cardoso Lopes9e1c4c12015-02-23 15:23:14 +0000[diff] [blame]30def load_mvmmx : PatFrag<(ops node:$ptr),
31 (x86mmx (MMX_X86movw2d (load node:$ptr)))>;
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]32def bc_mmx : PatFrag<(ops node:$in), (x86mmx (bitconvert node:$in))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]33
34//===----------------------------------------------------------------------===//
35// SSE specific DAG Nodes.
36//===----------------------------------------------------------------------===//
37
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]38def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]39 SDTCisFP<1>, SDTCisVT<3, i8>,
40 SDTCisVec<1>]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]41
42def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
43def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
Nadav Rotem178250a2012-08-19 13:06:16 +0000[diff] [blame]44
45// Commutative and Associative FMIN and FMAX.
46def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,
47 [SDNPCommutative, SDNPAssociative]>;
48def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,
49 [SDNPCommutative, SDNPAssociative]>;
50
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]51def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
52 [SDNPCommutative, SDNPAssociative]>;
53def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
54 [SDNPCommutative, SDNPAssociative]>;
55def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
56 [SDNPCommutative, SDNPAssociative]>;
Benjamin Kramer5bc180c2013-08-04 12:05:16 +0000[diff] [blame]57def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp,
58 [SDNPCommutative, SDNPAssociative]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]59def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
60def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
Stuart Hastings9f208042011-06-01 04:39:42 +0000[diff] [blame]61def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>;
Duncan Sands0e4fcb82011-09-22 20:15:48 +0000[diff] [blame]62def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
63def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
Craig Topperf984efb2011-11-19 09:02:40 +0000[diff] [blame]64def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
65def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]66def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>;
67def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]68def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
69//def X86cmpsd : SDNode<"X86ISD::FSETCCsd", SDTX86Cmpsd>;
Simon Pilgrimcae7b942015-06-16 21:40:28 +0000[diff] [blame]70def X86cvtdq2pd: SDNode<"X86ISD::CVTDQ2PD",
71 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
72 SDTCisVT<1, v4i32>]>>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000[diff] [blame^]73def X86cvtudq2pd: SDNode<"X86ISD::CVTUDQ2PD",
74 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
75 SDTCisVT<1, v4i32>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]76def X86pshufb : SDNode<"X86ISD::PSHUFB",
Craig Topper78349002012-01-25 06:43:11 +0000[diff] [blame]77 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]78 SDTCisSameAs<0,2>]>>;
Chandler Carruth6ba97302015-05-30 03:20:59 +0000[diff] [blame]79def X86psadbw : SDNode<"X86ISD::PSADBW",
80 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
81 SDTCisSameAs<0,2>]>>;
Bruno Cardoso Lopes7ba479d2011-07-13 21:36:47 +0000[diff] [blame]82def X86andnp : SDNode<"X86ISD::ANDNP",
Bruno Cardoso Lopes9613b642011-07-13 21:36:51 +0000[diff] [blame]83 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]84 SDTCisSameAs<0,2>]>>;
Craig Topper81390be2011-11-19 07:33:10 +0000[diff] [blame]85def X86psign : SDNode<"X86ISD::PSIGN",
Craig Topperde6b73b2011-11-19 07:07:26 +0000[diff] [blame]86 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]87 SDTCisSameAs<0,2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]88def X86pextrb : SDNode<"X86ISD::PEXTRB",
89 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
90def X86pextrw : SDNode<"X86ISD::PEXTRW",
91 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
92def X86pinsrb : SDNode<"X86ISD::PINSRB",
93 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
94 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
95def X86pinsrw : SDNode<"X86ISD::PINSRW",
96 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
97 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
Filipe Cabecinhas20352212014-04-21 20:07:29 +0000[diff] [blame]98def X86insertps : SDNode<"X86ISD::INSERTPS",
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]99 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]100 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]101def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
102 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>;
Elena Demikhovsky8d7e56c2012-04-22 09:39:03 +0000[diff] [blame]103
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]104def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
Chris Lattner54e53292010-09-22 00:34:38 +0000[diff] [blame]105 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]106
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]107def X86vzext : SDNode<"X86ISD::VZEXT",
108 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]109 SDTCisInt<0>, SDTCisInt<1>,
110 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]111
112def X86vsext : SDNode<"X86ISD::VSEXT",
113 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]114 SDTCisInt<0>, SDTCisInt<1>,
115 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]116
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]117def X86vtrunc : SDNode<"X86ISD::VTRUNC",
118 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]119 SDTCisInt<0>, SDTCisInt<1>,
120 SDTCisOpSmallerThanOp<0, 1>]>>;
Elena Demikhovskyc5f67262013-12-17 08:33:15 +0000[diff] [blame]121def X86trunc : SDNode<"X86ISD::TRUNC",
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]122 SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>,
123 SDTCisOpSmallerThanOp<0, 1>]>>;
124
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]125def X86vtruncm : SDNode<"X86ISD::VTRUNCM",
126 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
127 SDTCisInt<0>, SDTCisInt<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]128 SDTCisVec<2>, SDTCisInt<2>,
129 SDTCisOpSmallerThanOp<0, 2>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]130def X86vfpext : SDNode<"X86ISD::VFPEXT",
131 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]132 SDTCisFP<0>, SDTCisFP<1>,
133 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liaoe999b862012-10-10 16:53:28 +0000[diff] [blame]134def X86vfpround: SDNode<"X86ISD::VFPROUND",
135 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]136 SDTCisFP<0>, SDTCisFP<1>,
137 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]138
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]139def X86vshldq : SDNode<"X86ISD::VSHLDQ", SDTIntShiftOp>;
140def X86vshrdq : SDNode<"X86ISD::VSRLDQ", SDTIntShiftOp>;
Craig Topper0b7ad762012-01-22 23:36:02 +0000[diff] [blame]141def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>;
Craig Topperbd4884372012-01-22 22:42:16 +0000[diff] [blame]142def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;
143def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]144
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]145def X86IntCmpMask : SDTypeProfile<1, 2,
146 [SDTCisVec<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>]>;
147def X86pcmpeqm : SDNode<"X86ISD::PCMPEQM", X86IntCmpMask, [SDNPCommutative]>;
148def X86pcmpgtm : SDNode<"X86ISD::PCMPGTM", X86IntCmpMask>;
149
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]150def X86CmpMaskCC :
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000[diff] [blame]151 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,
152 SDTCisVec<1>, SDTCisSameAs<2, 1>,
153 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>]>;
154def X86CmpMaskCCRound :
155 SDTypeProfile<1, 4, [SDTCisVec<0>,SDTCVecEltisVT<0, i1>,
156 SDTCisVec<1>, SDTCisSameAs<2, 1>,
157 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>,
158 SDTCisInt<4>]>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]159def X86CmpMaskCCScalar :
160 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
161
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000[diff] [blame]162def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>;
163def X86cmpmRnd : SDNode<"X86ISD::CMPM_RND", X86CmpMaskCCRound>;
164def X86cmpmu : SDNode<"X86ISD::CMPMU", X86CmpMaskCC>;
165def X86cmpms : SDNode<"X86ISD::FSETCC", X86CmpMaskCCScalar>;
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]166
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]167def X86vshl : SDNode<"X86ISD::VSHL",
168 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
169 SDTCisVec<2>]>>;
170def X86vsrl : SDNode<"X86ISD::VSRL",
171 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
172 SDTCisVec<2>]>>;
173def X86vsra : SDNode<"X86ISD::VSRA",
174 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
175 SDTCisVec<2>]>>;
176
177def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;
178def X86vsrli : SDNode<"X86ISD::VSRLI", SDTIntShiftOp>;
179def X86vsrai : SDNode<"X86ISD::VSRAI", SDTIntShiftOp>;
180
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]181def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]182 SDTCisVec<1>,
183 SDTCisSameAs<2, 1>]>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000[diff] [blame]184def X86addus : SDNode<"X86ISD::ADDUS", SDTIntBinOp>;
Benjamin Kramerb16ccde2012-12-15 16:47:44 +0000[diff] [blame]185def X86subus : SDNode<"X86ISD::SUBUS", SDTIntBinOp>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000[diff] [blame]186def X86adds : SDNode<"X86ISD::ADDS", SDTIntBinOp>;
187def X86subs : SDNode<"X86ISD::SUBS", SDTIntBinOp>;
Asaf Badouhc6f3c822015-07-06 14:03:40 +0000[diff] [blame]188def X86mulhrs : SDNode<"X86ISD::MULHRS" , SDTIntBinOp>;
Asaf Badouh81f03c32015-06-18 12:30:53 +0000[diff] [blame]189def X86avg : SDNode<"X86ISD::AVG" , SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]190def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]191def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
Elena Demikhovsky40864b62013-08-05 08:52:21 +0000[diff] [blame]192def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]193def X86testm : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]194 SDTCisVec<1>, SDTCisSameAs<2, 1>,
195 SDTCVecEltisVT<0, i1>,
196 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovskya30e4372014-02-05 07:05:03 +0000[diff] [blame]197def X86testnm : SDNode<"X86ISD::TESTNM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]198 SDTCisVec<1>, SDTCisSameAs<2, 1>,
199 SDTCVecEltisVT<0, i1>,
200 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]201def X86select : SDNode<"X86ISD::SELECT" , SDTSelect>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]202
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]203def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
204 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
205 SDTCisSameAs<1,2>]>>;
Benjamin Kramer6d2dff62014-04-26 14:12:19 +0000[diff] [blame]206def X86pmuldq : SDNode<"X86ISD::PMULDQ",
207 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
208 SDTCisSameAs<1,2>]>>;
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]209
Simon Pilgrimd85cae32015-07-06 20:46:41 +0000[diff] [blame]210def X86extrqi : SDNode<"X86ISD::EXTRQI",
211 SDTypeProfile<1, 3, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,
212 SDTCisVT<2, i8>, SDTCisVT<3, i8>]>>;
213def X86insertqi : SDNode<"X86ISD::INSERTQI",
214 SDTypeProfile<1, 4, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,
215 SDTCisSameAs<1,2>, SDTCisVT<3, i8>,
216 SDTCisVT<4, i8>]>>;
217
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]218// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
219// translated into one of the target nodes below during lowering.
220// Note: this is a work in progress...
221def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>;
222def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
223 SDTCisSameAs<0,2>]>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]224def SDTShuff3Op : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
225 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]226
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]227def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
228 SDTCisVec<2>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]229def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>,
230 SDTCisSameAs<0,1>, SDTCisInt<2>]>;
231def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
232 SDTCisSameAs<0,2>, SDTCisInt<3>]>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]233def SDTFPBinOpImmRound: SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCisSameAs<0,1>,
234 SDTCisSameAs<0,2>, SDTCisInt<3>, SDTCisInt<4>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]235
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]236def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;
237def SDTVBroadcastm : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>]>;
238
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]239def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]240 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]241
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]242def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc.
243 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisInt<3>]>;
244
Asaf Badouh402ebb32015-06-03 13:41:48 +0000[diff] [blame]245def SDTFPUnaryOpRound : SDTypeProfile<1, 2, [ // fsqrt_round, fgetexp_round, etc.
246 SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisInt<2>]>;
247
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]248def SDTFma : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
249 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]250def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
251 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>, SDTCisInt<4>]>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]252def STDFp1SrcRm : SDTypeProfile<1, 2, [SDTCisSameAs<0,1>,
253 SDTCisVec<0>, SDTCisInt<2>]>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]254def STDFp2SrcRm : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
255 SDTCisVec<0>, SDTCisInt<3>]>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000[diff] [blame]256def STDFp3SrcRm : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
257 SDTCisVec<0>, SDTCisInt<3>, SDTCisInt<4>]>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]258
Craig Topper8fb09f02013-01-28 06:48:25 +0000[diff] [blame]259def X86PAlignr : SDNode<"X86ISD::PALIGNR", SDTShuff3OpI>;
Adam Nemet2f10cc62014-08-05 17:22:55 +0000[diff] [blame]260def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
Elena Demikhovsky5e2f8c42015-06-23 08:19:46 +0000[diff] [blame]261def X86Abs : SDNode<"X86ISD::ABS", SDTIntUnaryOp>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]262
263def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>;
264def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>;
265def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>;
266
Elena Demikhovsky9e380862015-06-03 10:56:40 +0000[diff] [blame]267def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>;
268def X86Shuf128 : SDNode<"X86ISD::SHUF128", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]269
270def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
271def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;
272def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;
273
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]274def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
275def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
276
277def X86Movlhps : SDNode<"X86ISD::MOVLHPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]278def X86Movlhpd : SDNode<"X86ISD::MOVLHPD", SDTShuff2Op>;
Bruno Cardoso Lopes03e4c352010-08-31 21:15:21 +0000[diff] [blame]279def X86Movhlps : SDNode<"X86ISD::MOVHLPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]280
Bruno Cardoso Lopesb3825212010-09-01 05:08:25 +0000[diff] [blame]281def X86Movlps : SDNode<"X86ISD::MOVLPS", SDTShuff2Op>;
282def X86Movlpd : SDNode<"X86ISD::MOVLPD", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]283
Chandler Carruth8366ceb2014-06-20 01:05:28 +0000[diff] [blame]284def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, SDTCisSameAs<2, 1>]>;
285def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
286def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>;
287
Craig Topper8d4ba192011-12-06 08:21:25 +0000[diff] [blame]288def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;
289def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]290
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]291def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>;
Chandler Carruthed5dfff2014-09-22 22:29:42 +0000[diff] [blame]292def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>;
293def X86VPermv : SDNode<"X86ISD::VPERMV", SDTShuff2Op>;
294def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;
295def X86VPermv3 : SDNode<"X86ISD::VPERMV3", SDTShuff3Op>;
Elena Demikhovskya5d38a32014-01-23 14:27:26 +0000[diff] [blame]296def X86VPermiv3 : SDNode<"X86ISD::VPERMIV3", SDTShuff3Op>;
Bruno Cardoso Lopesb878caa2011-07-21 01:55:47 +0000[diff] [blame]297
Craig Topper0a672ea2011-11-30 07:47:51 +0000[diff] [blame]298def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;
Bruno Cardoso Lopesf15dfe52011-08-12 21:48:26 +0000[diff] [blame]299
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]300def X86VFixupimm : SDNode<"X86ISD::VFIXUPIMM", SDTFPBinOpImmRound>;
Elena Demikhovsky3582eb32015-06-01 11:05:34 +0000[diff] [blame]301def X86VRange : SDNode<"X86ISD::VRANGE", SDTFPBinOpImmRound>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]302
Elena Demikhovskyad9c3962015-05-18 06:42:57 +0000[diff] [blame]303def X86SubVBroadcast : SDNode<"X86ISD::SUBV_BROADCAST",
304 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
305 SDTCisSubVecOfVec<1, 0>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]306def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>;
Elena Demikhovsky89529742013-09-12 08:55:00 +0000[diff] [blame]307def X86Vinsert : SDNode<"X86ISD::VINSERT", SDTypeProfile<1, 3,
308 [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
Elena Demikhovsky9f423d62014-02-10 07:02:39 +0000[diff] [blame]309def X86Vextract : SDNode<"X86ISD::VEXTRACT", SDTypeProfile<1, 2,
310 [SDTCisVec<1>, SDTCisPtrTy<2>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]311
Elena Demikhovskycd3c1c42012-12-05 09:24:57 +0000[diff] [blame]312def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>;
Chandler Carruth204ad4c2014-09-15 20:09:47 +0000[diff] [blame]313
314def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>;
315
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]316def X86faddRnd : SDNode<"X86ISD::FADD_RND", SDTFPBinOpRound>;
317def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>;
318def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>;
319def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;
Elena Demikhovsky0d7e9362015-05-11 06:05:05 +0000[diff] [blame]320def X86fmaxRnd : SDNode<"X86ISD::FMAX_RND", SDTFPBinOpRound>;
Asaf Badouh7ec4b7a2015-06-28 14:30:39 +0000[diff] [blame]321def X86scalef : SDNode<"X86ISD::SCALEF", SDTFPBinOpRound>;
Elena Demikhovsky0d7e9362015-05-11 06:05:05 +0000[diff] [blame]322def X86fminRnd : SDNode<"X86ISD::FMIN_RND", SDTFPBinOpRound>;
Asaf Badouh402ebb32015-06-03 13:41:48 +0000[diff] [blame]323def X86fsqrtRnd : SDNode<"X86ISD::FSQRT_RND", SDTFPUnaryOpRound>;
324def X86fgetexpRnd : SDNode<"X86ISD::FGETEXP_RND", SDTFPUnaryOpRound>;
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]325
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]326def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;
327def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
328def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFma>;
329def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFma>;
Craig Toppera999c662012-08-29 07:18:25 +0000[diff] [blame]330def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFma>;
331def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFma>;
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]332
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]333def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound>;
334def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound>;
335def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound>;
336def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound>;
337def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound>;
338def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound>;
339
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]340def X86rsqrt28 : SDNode<"X86ISD::RSQRT28", STDFp1SrcRm>;
341def X86rcp28 : SDNode<"X86ISD::RCP28", STDFp1SrcRm>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]342def X86exp2 : SDNode<"X86ISD::EXP2", STDFp1SrcRm>;
343
344def X86rsqrt28s : SDNode<"X86ISD::RSQRT28", STDFp2SrcRm>;
345def X86rcp28s : SDNode<"X86ISD::RCP28", STDFp2SrcRm>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000[diff] [blame]346def X86RndScale : SDNode<"X86ISD::RNDSCALE", STDFp3SrcRm>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]347
Craig Topperab47fe42012-08-06 06:22:36 +0000[diff] [blame]348def SDT_PCMPISTRI : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
349 SDTCisVT<2, v16i8>, SDTCisVT<3, v16i8>,
350 SDTCisVT<4, i8>]>;
351def SDT_PCMPESTRI : SDTypeProfile<2, 5, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
352 SDTCisVT<2, v16i8>, SDTCisVT<3, i32>,
353 SDTCisVT<4, v16i8>, SDTCisVT<5, i32>,
354 SDTCisVT<6, i8>]>;
355
356def X86pcmpistri : SDNode<"X86ISD::PCMPISTRI", SDT_PCMPISTRI>;
357def X86pcmpestri : SDNode<"X86ISD::PCMPESTRI", SDT_PCMPESTRI>;
358
Elena Demikhovskyba5ab322015-06-22 11:16:30 +0000[diff] [blame]359def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 1,
360 [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>;
361def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 1,
362 [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>;
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]363
Igor Bregerabe4a792015-06-14 12:44:55 +0000[diff] [blame]364def SDTintToFPRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisFP<0>,
365 SDTCisSameAs<0,1>, SDTCisInt<2>, SDTCisInt<3>]>;
366
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000[diff] [blame^]367def SDTDoubleToInt: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
368 SDTCisInt<0>, SDTCVecEltisVT<1, f64>]>;
369def SDTFloatToInt: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
370 SDTCisInt<0>, SDTCVecEltisVT<1, f32>]>;
371
372def SDTDoubleToIntRnd: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
373 SDTCisInt<0>, SDTCVecEltisVT<1, f64>]>;
374def SDTFloatToIntRnd: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
375 SDTCisInt<0>, SDTCVecEltisVT<1, f32>]>;
376
377def SDTVintToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
378 SDTCisFP<0>, SDTCVecEltisVT<1, i32>,
379 SDTCisInt<2>]>;
380def SDTVlongToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
381 SDTCisFP<0>, SDTCVecEltisVT<1, i64>,
382 SDTCisInt<2>]>;
383
384def SDTVFPToIntRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
385 SDTCisFP<1>, SDTCVecEltisVT<0, i32>,
386 SDTCisInt<2>]>;
387def SDTVFPToLongRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
388 SDTCisFP<1>, SDTCVecEltisVT<0, i64>,
389 SDTCisInt<2>]>;
390
391// Scalar
392def X86SintToFpRnd : SDNode<"X86ISD::SINT_TO_FP_RND", SDTintToFPRound>;
393def X86UintToFpRnd : SDNode<"X86ISD::UINT_TO_FP_RND", SDTintToFPRound>;
394
395// Vector with rounding mode
396
397// cvtt fp-to-int staff
398def X86VFpToSintRnd : SDNode<"ISD::FP_TO_SINT", SDTVFPToIntRound>;
399def X86VFpToUintRnd : SDNode<"ISD::FP_TO_UINT", SDTVFPToIntRound>;
400def X86VFpToSlongRnd : SDNode<"ISD::FP_TO_SINT", SDTVFPToLongRound>;
401def X86VFpToUlongRnd : SDNode<"ISD::FP_TO_UINT", SDTVFPToLongRound>;
402
403def X86VSintToFpRnd : SDNode<"ISD::SINT_TO_FP", SDTVintToFPRound>;
404def X86VUintToFpRnd : SDNode<"ISD::UINT_TO_FP", SDTVintToFPRound>;
405def X86VSlongToFpRnd : SDNode<"ISD::SINT_TO_FP", SDTVlongToFPRound>;
406def X86VUlongToFpRnd : SDNode<"ISD::UINT_TO_FP", SDTVlongToFPRound>;
407
408// cvt fp-to-int staff
409def X86cvtps2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTFloatToIntRnd>;
410def X86cvtps2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTFloatToIntRnd>;
411def X86cvtpd2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTDoubleToIntRnd>;
412def X86cvtpd2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTDoubleToIntRnd>;
413
414// Vector without rounding mode
415def X86cvtps2Int : SDNode<"X86ISD::FP_TO_SINT_RND", SDTFloatToInt>;
416def X86cvtps2UInt : SDNode<"X86ISD::FP_TO_UINT_RND", SDTFloatToInt>;
417def X86cvtpd2Int : SDNode<"X86ISD::FP_TO_SINT_RND", SDTDoubleToInt>;
418def X86cvtpd2UInt : SDNode<"X86ISD::FP_TO_UINT_RND", SDTDoubleToInt>;
419
420def X86vfpextRnd : SDNode<"X86ISD::VFPEXT",
421 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
422 SDTCisFP<0>, SDTCisFP<1>,
423 SDTCisOpSmallerThanOp<1, 0>,
424 SDTCisInt<2>]>>;
425def X86vfproundRnd: SDNode<"X86ISD::VFPROUND",
426 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
427 SDTCisFP<0>, SDTCisFP<1>,
428 SDTCVecEltisVT<0, f32>,
429 SDTCVecEltisVT<1, f64>,
430 SDTCisInt<2>]>>;
Igor Bregerabe4a792015-06-14 12:44:55 +0000[diff] [blame]431
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]432//===----------------------------------------------------------------------===//
433// SSE Complex Patterns
434//===----------------------------------------------------------------------===//
435
436// These are 'extloads' from a scalar to the low element of a vector, zeroing
437// the top elements. These are used for the SSE 'ss' and 'sd' instruction
438// forms.
439def sse_load_f32 : ComplexPattern<v4f32, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]440 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
441 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]442def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]443 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
444 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]445
446def ssmem : Operand<v4f32> {
447 let PrintMethod = "printf32mem";
448 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]449 let ParserMatchClass = X86Mem32AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]450 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]451}
452def sdmem : Operand<v2f64> {
453 let PrintMethod = "printf64mem";
454 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]455 let ParserMatchClass = X86Mem64AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]456 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]457}
458
459//===----------------------------------------------------------------------===//
460// SSE pattern fragments
461//===----------------------------------------------------------------------===//
462
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]463// 128-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]464// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]465def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>;
466def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]467def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>;
468
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]469// 256-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]470// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]471def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>;
472def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]473def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>;
474
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]475// 512-bit load pattern fragments
476def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>;
477def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>;
Robert Khasanov7ca7df02014-08-04 14:35:15 +0000[diff] [blame]478def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>;
479def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>;
Elena Demikhovsky1f3ed412013-10-22 09:19:28 +0000[diff] [blame]480def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]481def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>;
482
483// 128-/256-/512-bit extload pattern fragments
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]484def extloadv2f32 : PatFrag<(ops node:$ptr), (v2f64 (extloadvf32 node:$ptr))>;
485def extloadv4f32 : PatFrag<(ops node:$ptr), (v4f64 (extloadvf32 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]486def extloadv8f32 : PatFrag<(ops node:$ptr), (v8f64 (extloadvf32 node:$ptr))>;
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]487
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]488// These are needed to match a scalar load that is used in a vector-only
489// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
490// The memory operand is required to be a 128-bit load, so it must be converted
491// from a vector to a scalar.
492def loadf32_128 : PatFrag<(ops node:$ptr),
493 (f32 (vector_extract (loadv4f32 node:$ptr), (iPTR 0)))>;
494def loadf64_128 : PatFrag<(ops node:$ptr),
495 (f64 (vector_extract (loadv2f64 node:$ptr), (iPTR 0)))>;
496
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]497// Like 'store', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]498def alignedstore : PatFrag<(ops node:$val, node:$ptr),
499 (store node:$val, node:$ptr), [{
500 return cast<StoreSDNode>(N)->getAlignment() >= 16;
501}]>;
502
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]503// Like 'store', but always requires 256-bit vector alignment.
504def alignedstore256 : PatFrag<(ops node:$val, node:$ptr),
505 (store node:$val, node:$ptr), [{
506 return cast<StoreSDNode>(N)->getAlignment() >= 32;
507}]>;
508
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]509// Like 'store', but always requires 512-bit vector alignment.
510def alignedstore512 : PatFrag<(ops node:$val, node:$ptr),
511 (store node:$val, node:$ptr), [{
512 return cast<StoreSDNode>(N)->getAlignment() >= 64;
513}]>;
514
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]515// Like 'load', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]516def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
517 return cast<LoadSDNode>(N)->getAlignment() >= 16;
518}]>;
519
Chad Rosiera281afc2012-03-09 02:00:48 +0000[diff] [blame]520// Like 'X86vzload', but always requires 128-bit vector alignment.
521def alignedX86vzload : PatFrag<(ops node:$ptr), (X86vzload node:$ptr), [{
522 return cast<MemSDNode>(N)->getAlignment() >= 16;
523}]>;
524
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]525// Like 'load', but always requires 256-bit vector alignment.
526def alignedload256 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
527 return cast<LoadSDNode>(N)->getAlignment() >= 32;
528}]>;
529
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]530// Like 'load', but always requires 512-bit vector alignment.
531def alignedload512 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
532 return cast<LoadSDNode>(N)->getAlignment() >= 64;
533}]>;
534
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]535def alignedloadfsf32 : PatFrag<(ops node:$ptr),
536 (f32 (alignedload node:$ptr))>;
537def alignedloadfsf64 : PatFrag<(ops node:$ptr),
538 (f64 (alignedload node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]539
540// 128-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]541// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]542def alignedloadv4f32 : PatFrag<(ops node:$ptr),
543 (v4f32 (alignedload node:$ptr))>;
544def alignedloadv2f64 : PatFrag<(ops node:$ptr),
545 (v2f64 (alignedload node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]546def alignedloadv2i64 : PatFrag<(ops node:$ptr),
547 (v2i64 (alignedload node:$ptr))>;
548
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]549// 256-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]550// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]551def alignedloadv8f32 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]552 (v8f32 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]553def alignedloadv4f64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]554 (v4f64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]555def alignedloadv4i64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]556 (v4i64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]557
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]558// 512-bit aligned load pattern fragments
559def alignedloadv16f32 : PatFrag<(ops node:$ptr),
560 (v16f32 (alignedload512 node:$ptr))>;
Elena Demikhovsky3ce8dbb2013-08-18 13:08:57 +0000[diff] [blame]561def alignedloadv16i32 : PatFrag<(ops node:$ptr),
562 (v16i32 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]563def alignedloadv8f64 : PatFrag<(ops node:$ptr),
564 (v8f64 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]565def alignedloadv8i64 : PatFrag<(ops node:$ptr),
566 (v8i64 (alignedload512 node:$ptr))>;
567
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]568// Like 'load', but uses special alignment checks suitable for use in
569// memory operands in most SSE instructions, which are required to
570// be naturally aligned on some targets but not on others. If the subtarget
571// allows unaligned accesses, match any load, though this may require
572// setting a feature bit in the processor (on startup, for example).
573// Opteron 10h and later implement such a feature.
574def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{
Sanjay Patelffd039b2015-02-03 17:13:04 +0000[diff] [blame]575 return Subtarget->hasSSEUnalignedMem()
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]576 || cast<LoadSDNode>(N)->getAlignment() >= 16;
577}]>;
578
579def memopfsf32 : PatFrag<(ops node:$ptr), (f32 (memop node:$ptr))>;
580def memopfsf64 : PatFrag<(ops node:$ptr), (f64 (memop node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]581
582// 128-bit memop pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]583// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]584def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;
585def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]586def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]587
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]588// These are needed to match a scalar memop that is used in a vector-only
589// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
590// The memory operand is required to be a 128-bit load, so it must be converted
591// from a vector to a scalar.
592def memopfsf32_128 : PatFrag<(ops node:$ptr),
593 (f32 (vector_extract (memopv4f32 node:$ptr), (iPTR 0)))>;
594def memopfsf64_128 : PatFrag<(ops node:$ptr),
595 (f64 (vector_extract (memopv2f64 node:$ptr), (iPTR 0)))>;
596
597
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]598// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
599// 16-byte boundary.
600// FIXME: 8 byte alignment for mmx reads is not required
601def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
602 return cast<LoadSDNode>(N)->getAlignment() >= 8;
603}]>;
604
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]605def memopmmx : PatFrag<(ops node:$ptr), (x86mmx (memop64 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]606
607// MOVNT Support
608// Like 'store', but requires the non-temporal bit to be set
609def nontemporalstore : PatFrag<(ops node:$val, node:$ptr),
610 (st node:$val, node:$ptr), [{
611 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
612 return ST->isNonTemporal();
613 return false;
614}]>;
615
616def alignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]617 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]618 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
619 return ST->isNonTemporal() && !ST->isTruncatingStore() &&
620 ST->getAddressingMode() == ISD::UNINDEXED &&
621 ST->getAlignment() >= 16;
622 return false;
623}]>;
624
625def unalignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]626 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]627 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
628 return ST->isNonTemporal() &&
629 ST->getAlignment() < 16;
630 return false;
631}]>;
632
Elena Demikhovsky6a1a3572015-06-28 10:53:29 +0000[diff] [blame]633def mgatherv4i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
634 (masked_gather node:$src1, node:$src2, node:$src3) , [{
635 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
636 return (Mgt->getIndex().getValueType() == MVT::v4i32 ||
637 Mgt->getBasePtr().getValueType() == MVT::v4i32);
638 return false;
639}]>;
640
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]641def mgatherv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
642 (masked_gather node:$src1, node:$src2, node:$src3) , [{
643 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
644 return (Mgt->getIndex().getValueType() == MVT::v8i32 ||
645 Mgt->getBasePtr().getValueType() == MVT::v8i32);
646 return false;
647}]>;
648
Elena Demikhovsky6a1a3572015-06-28 10:53:29 +0000[diff] [blame]649def mgatherv2i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
650 (masked_gather node:$src1, node:$src2, node:$src3) , [{
651 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
652 return (Mgt->getIndex().getValueType() == MVT::v2i64 ||
653 Mgt->getBasePtr().getValueType() == MVT::v2i64);
654 return false;
655}]>;
656def mgatherv4i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
657 (masked_gather node:$src1, node:$src2, node:$src3) , [{
658 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
659 return (Mgt->getIndex().getValueType() == MVT::v4i64 ||
660 Mgt->getBasePtr().getValueType() == MVT::v4i64);
661 return false;
662}]>;
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]663def mgatherv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
664 (masked_gather node:$src1, node:$src2, node:$src3) , [{
665 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
666 return (Mgt->getIndex().getValueType() == MVT::v8i64 ||
667 Mgt->getBasePtr().getValueType() == MVT::v8i64);
668 return false;
669}]>;
670def mgatherv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
671 (masked_gather node:$src1, node:$src2, node:$src3) , [{
672 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
673 return (Mgt->getIndex().getValueType() == MVT::v16i32 ||
674 Mgt->getBasePtr().getValueType() == MVT::v16i32);
675 return false;
676}]>;
677
Elena Demikhovsky30bc4ca2015-06-29 12:14:24 +0000[diff] [blame]678def mscatterv2i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
679 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
680 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
681 return (Sc->getIndex().getValueType() == MVT::v2i64 ||
682 Sc->getBasePtr().getValueType() == MVT::v2i64);
683 return false;
684}]>;
685
686def mscatterv4i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
687 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
688 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
689 return (Sc->getIndex().getValueType() == MVT::v4i32 ||
690 Sc->getBasePtr().getValueType() == MVT::v4i32);
691 return false;
692}]>;
693
694def mscatterv4i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
695 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
696 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
697 return (Sc->getIndex().getValueType() == MVT::v4i64 ||
698 Sc->getBasePtr().getValueType() == MVT::v4i64);
699 return false;
700}]>;
701
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]702def mscatterv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
703 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
704 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
705 return (Sc->getIndex().getValueType() == MVT::v8i32 ||
706 Sc->getBasePtr().getValueType() == MVT::v8i32);
707 return false;
708}]>;
709
710def mscatterv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
711 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
712 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
713 return (Sc->getIndex().getValueType() == MVT::v8i64 ||
714 Sc->getBasePtr().getValueType() == MVT::v8i64);
715 return false;
716}]>;
717def mscatterv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
718 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
719 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
720 return (Sc->getIndex().getValueType() == MVT::v16i32 ||
721 Sc->getBasePtr().getValueType() == MVT::v16i32);
722 return false;
723}]>;
724
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]725// 128-bit bitconvert pattern fragments
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]726def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>;
727def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>;
728def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>;
729def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>;
730def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;
731def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;
732
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]733// 256-bit bitconvert pattern fragments
Craig Topper682b8502011-11-02 04:42:13 +0000[diff] [blame]734def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;
735def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]736def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;
Bruno Cardoso Lopes1021b4a2011-07-13 01:15:33 +0000[diff] [blame]737def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;
Elena Demikhovsky3629b4a2014-01-06 08:45:54 +0000[diff] [blame]738def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]739
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]740// 512-bit bitconvert pattern fragments
741def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>;
742def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]743def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;
744def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>;
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]745
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]746def vzmovl_v2i64 : PatFrag<(ops node:$src),
747 (bitconvert (v2i64 (X86vzmovl
748 (v2i64 (scalar_to_vector (loadi64 node:$src))))))>;
749def vzmovl_v4i32 : PatFrag<(ops node:$src),
750 (bitconvert (v4i32 (X86vzmovl
751 (v4i32 (scalar_to_vector (loadi32 node:$src))))))>;
752
753def vzload_v2i64 : PatFrag<(ops node:$src),
754 (bitconvert (v2i64 (X86vzload node:$src)))>;
755
756
757def fp32imm0 : PatLeaf<(f32 fpimm), [{
758 return N->isExactlyValue(+0.0);
759}]>;
760
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]761def I8Imm : SDNodeXForm<imm, [{
762 // Transformation function: get the low 8 bits.
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]763 return getI8Imm((uint8_t)N->getZExtValue(), SDLoc(N));
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]764}]>;
765
766def FROUND_NO_EXC : ImmLeaf<i32, [{ return Imm == 8; }]>;
Adam Nemet50b83f02014-08-14 17:13:26 +0000[diff] [blame]767def FROUND_CURRENT : ImmLeaf<i32, [{
768 return Imm == X86::STATIC_ROUNDING::CUR_DIRECTION;
769}]>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]770
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]771// BYTE_imm - Transform bit immediates into byte immediates.
772def BYTE_imm : SDNodeXForm<imm, [{
773 // Transformation function: imm >> 3
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]774 return getI32Imm(N->getZExtValue() >> 3, SDLoc(N));
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]775}]>;
776
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]777// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index
778// to VEXTRACTF128/VEXTRACTI128 imm.
779def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]780 return getI8Imm(X86::getExtractVEXTRACT128Immediate(N), SDLoc(N));
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]781}]>;
782
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]783// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to
784// VINSERTF128/VINSERTI128 imm.
785def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]786 return getI8Imm(X86::getInsertVINSERT128Immediate(N), SDLoc(N));
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]787}]>;
788
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]789// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index
790// to VEXTRACTF64x4 imm.
791def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]792 return getI8Imm(X86::getExtractVEXTRACT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]793}]>;
794
795// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to
796// VINSERTF64x4 imm.
797def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]798 return getI8Imm(X86::getInsertVINSERT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]799}]>;
800
801def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index),
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]802 (extract_subvector node:$bigvec,
803 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]804 return X86::isVEXTRACT128Index(N);
805}], EXTRACT_get_vextract128_imm>;
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]806
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]807def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]808 node:$index),
809 (insert_subvector node:$bigvec, node:$smallvec,
810 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]811 return X86::isVINSERT128Index(N);
812}], INSERT_get_vinsert128_imm>;
813
814
815def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index),
816 (extract_subvector node:$bigvec,
817 node:$index), [{
818 return X86::isVEXTRACT256Index(N);
819}], EXTRACT_get_vextract256_imm>;
820
821def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
822 node:$index),
823 (insert_subvector node:$bigvec, node:$smallvec,
824 node:$index), [{
825 return X86::isVINSERT256Index(N);
826}], INSERT_get_vinsert256_imm>;
Bruno Cardoso Lopes123dff02011-07-25 23:05:25 +0000[diff] [blame]827
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]828def masked_load_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
829 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]830 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
831 return Load->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]832 return false;
833}]>;
834
835def masked_load_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
836 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]837 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
838 return Load->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]839 return false;
840}]>;
841
842def masked_load_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
843 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]844 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
845 return Load->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]846 return false;
847}]>;
848
849def masked_load_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
850 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]851 return isa<MaskedLoadSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]852}]>;
853
854def masked_store_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
855 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]856 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
857 return Store->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]858 return false;
859}]>;
860
861def masked_store_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
862 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]863 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
864 return Store->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]865 return false;
866}]>;
867
868def masked_store_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
869 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]870 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
871 return Store->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]872 return false;
873}]>;
874
875def masked_store_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
876 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]877 return isa<MaskedStoreSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]878}]>;
879