blob: 9594e9d215e860566b1059dcf019263cc9d8a44b [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
Jiri Pirko22a67762017-02-03 10:29:07 +01003 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
Jiri Pirko56ade8f2015-10-16 14:01:37 +02005 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Yotam Gigi98d0f7b2017-01-23 11:07:11 +010060#include <net/tc_act/tc_sample.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020061
62#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020063#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020064#include "core.h"
65#include "reg.h"
66#include "port.h"
67#include "trap.h"
68#include "txheader.h"
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +010069#include "spectrum_cnt.h"
Arkadi Sharshevsky230ead02017-03-28 17:24:12 +020070#include "spectrum_dpipe.h"
Yotam Gigie5e5c882017-05-23 21:56:27 +020071#include "../mlxfw/mlxfw.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020072
Yotam Gigi6b742192017-05-23 21:56:29 +020073#define MLXSW_FWREV_MAJOR 13
74#define MLXSW_FWREV_MINOR 1420
75#define MLXSW_FWREV_SUBMINOR 122
76
77static const struct mlxsw_fw_rev mlxsw_sp_supported_fw_rev = {
78 .major = MLXSW_FWREV_MAJOR,
79 .minor = MLXSW_FWREV_MINOR,
80 .subminor = MLXSW_FWREV_SUBMINOR
81};
82
83#define MLXSW_SP_FW_FILENAME \
84 "mlxsw_spectrum-" __stringify(MLXSW_FWREV_MAJOR) \
85 "." __stringify(MLXSW_FWREV_MINOR) \
86 "." __stringify(MLXSW_FWREV_SUBMINOR) ".mfa2"
87
Jiri Pirko56ade8f2015-10-16 14:01:37 +020088static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
89static const char mlxsw_sp_driver_version[] = "1.0";
90
91/* tx_hdr_version
92 * Tx header version.
93 * Must be set to 1.
94 */
95MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
96
97/* tx_hdr_ctl
98 * Packet control type.
99 * 0 - Ethernet control (e.g. EMADs, LACP)
100 * 1 - Ethernet data
101 */
102MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
103
104/* tx_hdr_proto
105 * Packet protocol type. Must be set to 1 (Ethernet).
106 */
107MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
108
109/* tx_hdr_rx_is_router
110 * Packet is sent from the router. Valid for data packets only.
111 */
112MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
113
114/* tx_hdr_fid_valid
115 * Indicates if the 'fid' field is valid and should be used for
116 * forwarding lookup. Valid for data packets only.
117 */
118MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
119
120/* tx_hdr_swid
121 * Switch partition ID. Must be set to 0.
122 */
123MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
124
125/* tx_hdr_control_tclass
126 * Indicates if the packet should use the control TClass and not one
127 * of the data TClasses.
128 */
129MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
130
131/* tx_hdr_etclass
132 * Egress TClass to be used on the egress device on the egress port.
133 */
134MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
135
136/* tx_hdr_port_mid
137 * Destination local port for unicast packets.
138 * Destination multicast ID for multicast packets.
139 *
140 * Control packets are directed to a specific egress port, while data
141 * packets are transmitted through the CPU port (0) into the switch partition,
142 * where forwarding rules are applied.
143 */
144MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
145
146/* tx_hdr_fid
147 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
148 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
149 * Valid for data packets only.
150 */
151MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
152
153/* tx_hdr_type
154 * 0 - Data packets
155 * 6 - Control packets
156 */
157MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
158
Yotam Gigie5e5c882017-05-23 21:56:27 +0200159struct mlxsw_sp_mlxfw_dev {
160 struct mlxfw_dev mlxfw_dev;
161 struct mlxsw_sp *mlxsw_sp;
162};
163
164static int mlxsw_sp_component_query(struct mlxfw_dev *mlxfw_dev,
165 u16 component_index, u32 *p_max_size,
166 u8 *p_align_bits, u16 *p_max_write_size)
167{
168 struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
169 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
170 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
171 char mcqi_pl[MLXSW_REG_MCQI_LEN];
172 int err;
173
174 mlxsw_reg_mcqi_pack(mcqi_pl, component_index);
175 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcqi), mcqi_pl);
176 if (err)
177 return err;
178 mlxsw_reg_mcqi_unpack(mcqi_pl, p_max_size, p_align_bits,
179 p_max_write_size);
180
181 *p_align_bits = max_t(u8, *p_align_bits, 2);
182 *p_max_write_size = min_t(u16, *p_max_write_size,
183 MLXSW_REG_MCDA_MAX_DATA_LEN);
184 return 0;
185}
186
187static int mlxsw_sp_fsm_lock(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle)
188{
189 struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
190 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
191 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
192 char mcc_pl[MLXSW_REG_MCC_LEN];
193 u8 control_state;
194 int err;
195
196 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, 0, 0);
197 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
198 if (err)
199 return err;
200
201 mlxsw_reg_mcc_unpack(mcc_pl, fwhandle, NULL, &control_state);
202 if (control_state != MLXFW_FSM_STATE_IDLE)
203 return -EBUSY;
204
205 mlxsw_reg_mcc_pack(mcc_pl,
206 MLXSW_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE,
207 0, *fwhandle, 0);
208 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
209}
210
211static int mlxsw_sp_fsm_component_update(struct mlxfw_dev *mlxfw_dev,
212 u32 fwhandle, u16 component_index,
213 u32 component_size)
214{
215 struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
216 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
217 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
218 char mcc_pl[MLXSW_REG_MCC_LEN];
219
220 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_UPDATE_COMPONENT,
221 component_index, fwhandle, component_size);
222 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
223}
224
225static int mlxsw_sp_fsm_block_download(struct mlxfw_dev *mlxfw_dev,
226 u32 fwhandle, u8 *data, u16 size,
227 u32 offset)
228{
229 struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
230 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
231 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
232 char mcda_pl[MLXSW_REG_MCDA_LEN];
233
234 mlxsw_reg_mcda_pack(mcda_pl, fwhandle, offset, size, data);
235 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcda), mcda_pl);
236}
237
238static int mlxsw_sp_fsm_component_verify(struct mlxfw_dev *mlxfw_dev,
239 u32 fwhandle, u16 component_index)
240{
241 struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
242 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
243 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
244 char mcc_pl[MLXSW_REG_MCC_LEN];
245
246 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_VERIFY_COMPONENT,
247 component_index, fwhandle, 0);
248 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
249}
250
251static int mlxsw_sp_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
252{
253 struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
254 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
255 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
256 char mcc_pl[MLXSW_REG_MCC_LEN];
257
258 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_ACTIVATE, 0,
259 fwhandle, 0);
260 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
261}
262
263static int mlxsw_sp_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
264 enum mlxfw_fsm_state *fsm_state,
265 enum mlxfw_fsm_state_err *fsm_state_err)
266{
267 struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
268 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
269 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
270 char mcc_pl[MLXSW_REG_MCC_LEN];
271 u8 control_state;
272 u8 error_code;
273 int err;
274
275 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, fwhandle, 0);
276 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
277 if (err)
278 return err;
279
280 mlxsw_reg_mcc_unpack(mcc_pl, NULL, &error_code, &control_state);
281 *fsm_state = control_state;
282 *fsm_state_err = min_t(enum mlxfw_fsm_state_err, error_code,
283 MLXFW_FSM_STATE_ERR_MAX);
284 return 0;
285}
286
287static void mlxsw_sp_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
288{
289 struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
290 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
291 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
292 char mcc_pl[MLXSW_REG_MCC_LEN];
293
294 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_CANCEL, 0,
295 fwhandle, 0);
296 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
297}
298
299static void mlxsw_sp_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
300{
301 struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
302 container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
303 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
304 char mcc_pl[MLXSW_REG_MCC_LEN];
305
306 mlxsw_reg_mcc_pack(mcc_pl,
307 MLXSW_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE, 0,
308 fwhandle, 0);
309 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
310}
311
312static const struct mlxfw_dev_ops mlxsw_sp_mlxfw_dev_ops = {
313 .component_query = mlxsw_sp_component_query,
314 .fsm_lock = mlxsw_sp_fsm_lock,
315 .fsm_component_update = mlxsw_sp_fsm_component_update,
316 .fsm_block_download = mlxsw_sp_fsm_block_download,
317 .fsm_component_verify = mlxsw_sp_fsm_component_verify,
318 .fsm_activate = mlxsw_sp_fsm_activate,
319 .fsm_query_state = mlxsw_sp_fsm_query_state,
320 .fsm_cancel = mlxsw_sp_fsm_cancel,
321 .fsm_release = mlxsw_sp_fsm_release
322};
323
Yotam Gigi6b742192017-05-23 21:56:29 +0200324static bool mlxsw_sp_fw_rev_ge(const struct mlxsw_fw_rev *a,
325 const struct mlxsw_fw_rev *b)
326{
327 if (a->major != b->major)
328 return a->major > b->major;
329 if (a->minor != b->minor)
330 return a->minor > b->minor;
331 return a->subminor >= b->subminor;
332}
333
334static int mlxsw_sp_fw_rev_validate(struct mlxsw_sp *mlxsw_sp)
335{
336 const struct mlxsw_fw_rev *rev = &mlxsw_sp->bus_info->fw_rev;
337 struct mlxsw_sp_mlxfw_dev mlxsw_sp_mlxfw_dev = {
338 .mlxfw_dev = {
339 .ops = &mlxsw_sp_mlxfw_dev_ops,
340 .psid = mlxsw_sp->bus_info->psid,
341 .psid_size = strlen(mlxsw_sp->bus_info->psid),
342 },
343 .mlxsw_sp = mlxsw_sp
344 };
345 const struct firmware *firmware;
346 int err;
347
348 if (mlxsw_sp_fw_rev_ge(rev, &mlxsw_sp_supported_fw_rev))
349 return 0;
350
351 dev_info(mlxsw_sp->bus_info->dev, "The firmware version %d.%d.%d out of data\n",
352 rev->major, rev->minor, rev->subminor);
353 dev_info(mlxsw_sp->bus_info->dev, "Upgrading firmware using file %s\n",
354 MLXSW_SP_FW_FILENAME);
355
356 err = request_firmware_direct(&firmware, MLXSW_SP_FW_FILENAME,
357 mlxsw_sp->bus_info->dev);
358 if (err) {
359 dev_err(mlxsw_sp->bus_info->dev, "Could not request firmware file %s\n",
360 MLXSW_SP_FW_FILENAME);
361 return err;
362 }
363
364 err = mlxfw_firmware_flash(&mlxsw_sp_mlxfw_dev.mlxfw_dev, firmware);
365 release_firmware(firmware);
366 return err;
367}
368
Arkadi Sharshevsky1abcbcc2017-03-11 09:42:53 +0100369int mlxsw_sp_flow_counter_get(struct mlxsw_sp *mlxsw_sp,
370 unsigned int counter_index, u64 *packets,
371 u64 *bytes)
372{
373 char mgpc_pl[MLXSW_REG_MGPC_LEN];
374 int err;
375
376 mlxsw_reg_mgpc_pack(mgpc_pl, counter_index, MLXSW_REG_MGPC_OPCODE_NOP,
377 MLXSW_REG_MGPC_COUNTER_SET_TYPE_PACKETS_BYTES);
378 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);
379 if (err)
380 return err;
381 *packets = mlxsw_reg_mgpc_packet_counter_get(mgpc_pl);
382 *bytes = mlxsw_reg_mgpc_byte_counter_get(mgpc_pl);
383 return 0;
384}
385
386static int mlxsw_sp_flow_counter_clear(struct mlxsw_sp *mlxsw_sp,
387 unsigned int counter_index)
388{
389 char mgpc_pl[MLXSW_REG_MGPC_LEN];
390
391 mlxsw_reg_mgpc_pack(mgpc_pl, counter_index, MLXSW_REG_MGPC_OPCODE_CLEAR,
392 MLXSW_REG_MGPC_COUNTER_SET_TYPE_PACKETS_BYTES);
393 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);
394}
395
396int mlxsw_sp_flow_counter_alloc(struct mlxsw_sp *mlxsw_sp,
397 unsigned int *p_counter_index)
398{
399 int err;
400
401 err = mlxsw_sp_counter_alloc(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
402 p_counter_index);
403 if (err)
404 return err;
405 err = mlxsw_sp_flow_counter_clear(mlxsw_sp, *p_counter_index);
406 if (err)
407 goto err_counter_clear;
408 return 0;
409
410err_counter_clear:
411 mlxsw_sp_counter_free(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
412 *p_counter_index);
413 return err;
414}
415
416void mlxsw_sp_flow_counter_free(struct mlxsw_sp *mlxsw_sp,
417 unsigned int counter_index)
418{
419 mlxsw_sp_counter_free(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
420 counter_index);
421}
422
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200423static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
424 const struct mlxsw_tx_info *tx_info)
425{
426 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
427
428 memset(txhdr, 0, MLXSW_TXHDR_LEN);
429
430 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
431 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
432 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
433 mlxsw_tx_hdr_swid_set(txhdr, 0);
434 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
435 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
436 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
437}
438
Ido Schimmelfe9ccc72017-05-16 19:38:31 +0200439int mlxsw_sp_port_vid_stp_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,
440 u8 state)
441{
442 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
443 enum mlxsw_reg_spms_state spms_state;
444 char *spms_pl;
445 int err;
446
447 switch (state) {
448 case BR_STATE_FORWARDING:
449 spms_state = MLXSW_REG_SPMS_STATE_FORWARDING;
450 break;
451 case BR_STATE_LEARNING:
452 spms_state = MLXSW_REG_SPMS_STATE_LEARNING;
453 break;
454 case BR_STATE_LISTENING: /* fall-through */
455 case BR_STATE_DISABLED: /* fall-through */
456 case BR_STATE_BLOCKING:
457 spms_state = MLXSW_REG_SPMS_STATE_DISCARDING;
458 break;
459 default:
460 BUG();
461 }
462
463 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
464 if (!spms_pl)
465 return -ENOMEM;
466 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
467 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
468
469 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
470 kfree(spms_pl);
471 return err;
472}
473
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200474static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
475{
Elad Raz5b090742016-10-28 21:35:46 +0200476 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200477 int err;
478
479 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
480 if (err)
481 return err;
482 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
483 return 0;
484}
485
Yotam Gigi763b4b72016-07-21 12:03:17 +0200486static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
487{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200488 int i;
489
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200490 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200491 return -EIO;
492
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200493 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
494 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200495 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
496 sizeof(struct mlxsw_sp_span_entry),
497 GFP_KERNEL);
498 if (!mlxsw_sp->span.entries)
499 return -ENOMEM;
500
501 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
502 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
503
504 return 0;
505}
506
507static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
508{
509 int i;
510
511 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
512 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
513
514 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
515 }
516 kfree(mlxsw_sp->span.entries);
517}
518
519static struct mlxsw_sp_span_entry *
520mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
521{
522 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
523 struct mlxsw_sp_span_entry *span_entry;
524 char mpat_pl[MLXSW_REG_MPAT_LEN];
525 u8 local_port = port->local_port;
526 int index;
527 int i;
528 int err;
529
530 /* find a free entry to use */
531 index = -1;
532 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
533 if (!mlxsw_sp->span.entries[i].used) {
534 index = i;
535 span_entry = &mlxsw_sp->span.entries[i];
536 break;
537 }
538 }
539 if (index < 0)
540 return NULL;
541
542 /* create a new port analayzer entry for local_port */
543 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
544 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
545 if (err)
546 return NULL;
547
548 span_entry->used = true;
549 span_entry->id = index;
Yotam Gigi2d644d42016-11-11 16:34:25 +0100550 span_entry->ref_count = 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200551 span_entry->local_port = local_port;
552 return span_entry;
553}
554
555static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
556 struct mlxsw_sp_span_entry *span_entry)
557{
558 u8 local_port = span_entry->local_port;
559 char mpat_pl[MLXSW_REG_MPAT_LEN];
560 int pa_id = span_entry->id;
561
562 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
563 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
564 span_entry->used = false;
565}
566
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200567static struct mlxsw_sp_span_entry *
568mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200569{
570 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
571 int i;
572
573 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
574 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
575
576 if (curr->used && curr->local_port == port->local_port)
577 return curr;
578 }
579 return NULL;
580}
581
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200582static struct mlxsw_sp_span_entry
583*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200584{
585 struct mlxsw_sp_span_entry *span_entry;
586
587 span_entry = mlxsw_sp_span_entry_find(port);
588 if (span_entry) {
Yotam Gigi2d644d42016-11-11 16:34:25 +0100589 /* Already exists, just take a reference */
Yotam Gigi763b4b72016-07-21 12:03:17 +0200590 span_entry->ref_count++;
591 return span_entry;
592 }
593
594 return mlxsw_sp_span_entry_create(port);
595}
596
597static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
598 struct mlxsw_sp_span_entry *span_entry)
599{
Yotam Gigi2d644d42016-11-11 16:34:25 +0100600 WARN_ON(!span_entry->ref_count);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200601 if (--span_entry->ref_count == 0)
602 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
603 return 0;
604}
605
606static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
607{
608 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
609 struct mlxsw_sp_span_inspected_port *p;
610 int i;
611
612 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
613 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
614
615 list_for_each_entry(p, &curr->bound_ports_list, list)
616 if (p->local_port == port->local_port &&
617 p->type == MLXSW_SP_SPAN_EGRESS)
618 return true;
619 }
620
621 return false;
622}
623
Ido Schimmel18281f22017-03-24 08:02:51 +0100624static int mlxsw_sp_span_mtu_to_buffsize(const struct mlxsw_sp *mlxsw_sp,
625 int mtu)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200626{
Ido Schimmel18281f22017-03-24 08:02:51 +0100627 return mlxsw_sp_bytes_cells(mlxsw_sp, mtu * 5 / 2) + 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200628}
629
630static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
631{
632 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
633 char sbib_pl[MLXSW_REG_SBIB_LEN];
634 int err;
635
636 /* If port is egress mirrored, the shared buffer size should be
637 * updated according to the mtu value
638 */
639 if (mlxsw_sp_span_is_egress_mirror(port)) {
Ido Schimmel18281f22017-03-24 08:02:51 +0100640 u32 buffsize = mlxsw_sp_span_mtu_to_buffsize(mlxsw_sp, mtu);
641
642 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, buffsize);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200643 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
644 if (err) {
645 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
646 return err;
647 }
648 }
649
650 return 0;
651}
652
653static struct mlxsw_sp_span_inspected_port *
654mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
655 struct mlxsw_sp_span_entry *span_entry)
656{
657 struct mlxsw_sp_span_inspected_port *p;
658
659 list_for_each_entry(p, &span_entry->bound_ports_list, list)
660 if (port->local_port == p->local_port)
661 return p;
662 return NULL;
663}
664
665static int
666mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
667 struct mlxsw_sp_span_entry *span_entry,
668 enum mlxsw_sp_span_type type)
669{
670 struct mlxsw_sp_span_inspected_port *inspected_port;
671 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
672 char mpar_pl[MLXSW_REG_MPAR_LEN];
673 char sbib_pl[MLXSW_REG_SBIB_LEN];
674 int pa_id = span_entry->id;
675 int err;
676
677 /* if it is an egress SPAN, bind a shared buffer to it */
678 if (type == MLXSW_SP_SPAN_EGRESS) {
Ido Schimmel18281f22017-03-24 08:02:51 +0100679 u32 buffsize = mlxsw_sp_span_mtu_to_buffsize(mlxsw_sp,
680 port->dev->mtu);
681
682 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, buffsize);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200683 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
684 if (err) {
685 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
686 return err;
687 }
688 }
689
690 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200691 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
692 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200693 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
694 if (err)
695 goto err_mpar_reg_write;
696
697 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
698 if (!inspected_port) {
699 err = -ENOMEM;
700 goto err_inspected_port_alloc;
701 }
702 inspected_port->local_port = port->local_port;
703 inspected_port->type = type;
704 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
705
706 return 0;
707
708err_mpar_reg_write:
709err_inspected_port_alloc:
710 if (type == MLXSW_SP_SPAN_EGRESS) {
711 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
712 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
713 }
714 return err;
715}
716
717static void
718mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
719 struct mlxsw_sp_span_entry *span_entry,
720 enum mlxsw_sp_span_type type)
721{
722 struct mlxsw_sp_span_inspected_port *inspected_port;
723 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
724 char mpar_pl[MLXSW_REG_MPAR_LEN];
725 char sbib_pl[MLXSW_REG_SBIB_LEN];
726 int pa_id = span_entry->id;
727
728 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
729 if (!inspected_port)
730 return;
731
732 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200733 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
734 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200735 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
736
737 /* remove the SBIB buffer if it was egress SPAN */
738 if (type == MLXSW_SP_SPAN_EGRESS) {
739 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
740 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
741 }
742
743 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
744
745 list_del(&inspected_port->list);
746 kfree(inspected_port);
747}
748
749static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
750 struct mlxsw_sp_port *to,
751 enum mlxsw_sp_span_type type)
752{
753 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
754 struct mlxsw_sp_span_entry *span_entry;
755 int err;
756
757 span_entry = mlxsw_sp_span_entry_get(to);
758 if (!span_entry)
759 return -ENOENT;
760
761 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
762 span_entry->id);
763
764 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
765 if (err)
766 goto err_port_bind;
767
768 return 0;
769
770err_port_bind:
771 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
772 return err;
773}
774
775static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
776 struct mlxsw_sp_port *to,
777 enum mlxsw_sp_span_type type)
778{
779 struct mlxsw_sp_span_entry *span_entry;
780
781 span_entry = mlxsw_sp_span_entry_find(to);
782 if (!span_entry) {
783 netdev_err(from->dev, "no span entry found\n");
784 return;
785 }
786
787 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
788 span_entry->id);
789 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
790}
791
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100792static int mlxsw_sp_port_sample_set(struct mlxsw_sp_port *mlxsw_sp_port,
793 bool enable, u32 rate)
794{
795 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
796 char mpsc_pl[MLXSW_REG_MPSC_LEN];
797
798 mlxsw_reg_mpsc_pack(mpsc_pl, mlxsw_sp_port->local_port, enable, rate);
799 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpsc), mpsc_pl);
800}
801
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200802static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
803 bool is_up)
804{
805 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
806 char paos_pl[MLXSW_REG_PAOS_LEN];
807
808 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
809 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
810 MLXSW_PORT_ADMIN_STATUS_DOWN);
811 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
812}
813
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200814static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
815 unsigned char *addr)
816{
817 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
818 char ppad_pl[MLXSW_REG_PPAD_LEN];
819
820 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
821 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
822 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
823}
824
825static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
826{
827 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
828 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
829
830 ether_addr_copy(addr, mlxsw_sp->base_mac);
831 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
832 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
833}
834
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200835static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
836{
837 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
838 char pmtu_pl[MLXSW_REG_PMTU_LEN];
839 int max_mtu;
840 int err;
841
842 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
843 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
844 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
845 if (err)
846 return err;
847 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
848
849 if (mtu > max_mtu)
850 return -EINVAL;
851
852 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
853 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
854}
855
Ido Schimmelbe945352016-06-09 09:51:39 +0200856static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
857 u8 swid)
858{
859 char pspa_pl[MLXSW_REG_PSPA_LEN];
860
861 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
862 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
863}
864
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200865static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
866{
867 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200868
Ido Schimmelbe945352016-06-09 09:51:39 +0200869 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
870 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200871}
872
873static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
874 bool enable)
875{
876 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
877 char svpe_pl[MLXSW_REG_SVPE_LEN];
878
879 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
880 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
881}
882
883int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
884 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
885 u16 vid)
886{
887 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
888 char svfa_pl[MLXSW_REG_SVFA_LEN];
889
890 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
891 fid, vid);
892 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
893}
894
Ido Schimmel7cbc4272017-05-16 19:38:33 +0200895int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,
896 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200897{
898 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
899 char *spvmlr_pl;
900 int err;
901
902 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
903 if (!spvmlr_pl)
904 return -ENOMEM;
Ido Schimmel7cbc4272017-05-16 19:38:33 +0200905 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
906 learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200907 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
908 kfree(spvmlr_pl);
909 return err;
910}
911
Ido Schimmelb02eae92017-05-16 19:38:34 +0200912static int __mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port,
913 u16 vid)
914{
915 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
916 char spvid_pl[MLXSW_REG_SPVID_LEN];
917
918 mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid);
919 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);
920}
921
922static int mlxsw_sp_port_allow_untagged_set(struct mlxsw_sp_port *mlxsw_sp_port,
923 bool allow)
924{
925 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
926 char spaft_pl[MLXSW_REG_SPAFT_LEN];
927
928 mlxsw_reg_spaft_pack(spaft_pl, mlxsw_sp_port->local_port, allow);
929 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl);
930}
931
932int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
933{
934 int err;
935
936 if (!vid) {
937 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, false);
938 if (err)
939 return err;
940 } else {
941 err = __mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid);
942 if (err)
943 return err;
944 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, true);
945 if (err)
946 goto err_port_allow_untagged_set;
947 }
948
949 mlxsw_sp_port->pvid = vid;
950 return 0;
951
952err_port_allow_untagged_set:
953 __mlxsw_sp_port_pvid_set(mlxsw_sp_port, mlxsw_sp_port->pvid);
954 return err;
955}
956
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200957static int
958mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
959{
960 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
961 char sspr_pl[MLXSW_REG_SSPR_LEN];
962
963 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
964 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
965}
966
Ido Schimmeld664b412016-06-09 09:51:40 +0200967static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
968 u8 local_port, u8 *p_module,
969 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200970{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200971 char pmlp_pl[MLXSW_REG_PMLP_LEN];
972 int err;
973
Ido Schimmel558c2d52016-02-26 17:32:29 +0100974 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200975 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
976 if (err)
977 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100978 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
979 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200980 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200981 return 0;
982}
983
Ido Schimmel18f1e702016-02-26 17:32:31 +0100984static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
985 u8 module, u8 width, u8 lane)
986{
987 char pmlp_pl[MLXSW_REG_PMLP_LEN];
988 int i;
989
990 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
991 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
992 for (i = 0; i < width; i++) {
993 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
994 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
995 }
996
997 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
998}
999
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01001000static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1001{
1002 char pmlp_pl[MLXSW_REG_PMLP_LEN];
1003
1004 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
1005 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
1006 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
1007}
1008
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001009static int mlxsw_sp_port_open(struct net_device *dev)
1010{
1011 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1012 int err;
1013
1014 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1015 if (err)
1016 return err;
1017 netif_start_queue(dev);
1018 return 0;
1019}
1020
1021static int mlxsw_sp_port_stop(struct net_device *dev)
1022{
1023 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1024
1025 netif_stop_queue(dev);
1026 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1027}
1028
1029static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
1030 struct net_device *dev)
1031{
1032 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1033 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1034 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
1035 const struct mlxsw_tx_info tx_info = {
1036 .local_port = mlxsw_sp_port->local_port,
1037 .is_emad = false,
1038 };
1039 u64 len;
1040 int err;
1041
Jiri Pirko307c2432016-04-08 19:11:22 +02001042 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001043 return NETDEV_TX_BUSY;
1044
1045 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
1046 struct sk_buff *skb_orig = skb;
1047
1048 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
1049 if (!skb) {
1050 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
1051 dev_kfree_skb_any(skb_orig);
1052 return NETDEV_TX_OK;
1053 }
Arkadi Sharshevsky36bf38d2017-01-12 09:10:37 +01001054 dev_consume_skb_any(skb_orig);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001055 }
1056
1057 if (eth_skb_pad(skb)) {
1058 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
1059 return NETDEV_TX_OK;
1060 }
1061
1062 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +02001063 /* TX header is consumed by HW on the way so we shouldn't count its
1064 * bytes as being sent.
1065 */
1066 len = skb->len - MLXSW_TXHDR_LEN;
1067
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001068 /* Due to a race we might fail here because of a full queue. In that
1069 * unlikely case we simply drop the packet.
1070 */
Jiri Pirko307c2432016-04-08 19:11:22 +02001071 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001072
1073 if (!err) {
1074 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
1075 u64_stats_update_begin(&pcpu_stats->syncp);
1076 pcpu_stats->tx_packets++;
1077 pcpu_stats->tx_bytes += len;
1078 u64_stats_update_end(&pcpu_stats->syncp);
1079 } else {
1080 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
1081 dev_kfree_skb_any(skb);
1082 }
1083 return NETDEV_TX_OK;
1084}
1085
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001086static void mlxsw_sp_set_rx_mode(struct net_device *dev)
1087{
1088}
1089
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001090static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
1091{
1092 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1093 struct sockaddr *addr = p;
1094 int err;
1095
1096 if (!is_valid_ether_addr(addr->sa_data))
1097 return -EADDRNOTAVAIL;
1098
1099 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
1100 if (err)
1101 return err;
1102 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1103 return 0;
1104}
1105
Ido Schimmel18281f22017-03-24 08:02:51 +01001106static u16 mlxsw_sp_pg_buf_threshold_get(const struct mlxsw_sp *mlxsw_sp,
1107 int mtu)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001108{
Ido Schimmel18281f22017-03-24 08:02:51 +01001109 return 2 * mlxsw_sp_bytes_cells(mlxsw_sp, mtu);
Ido Schimmelf417f042017-03-24 08:02:50 +01001110}
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001111
Ido Schimmelf417f042017-03-24 08:02:50 +01001112#define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */
Ido Schimmel18281f22017-03-24 08:02:51 +01001113
1114static u16 mlxsw_sp_pfc_delay_get(const struct mlxsw_sp *mlxsw_sp, int mtu,
1115 u16 delay)
Ido Schimmelf417f042017-03-24 08:02:50 +01001116{
Ido Schimmel18281f22017-03-24 08:02:51 +01001117 delay = mlxsw_sp_bytes_cells(mlxsw_sp, DIV_ROUND_UP(delay,
1118 BITS_PER_BYTE));
1119 return MLXSW_SP_CELL_FACTOR * delay + mlxsw_sp_bytes_cells(mlxsw_sp,
1120 mtu);
Ido Schimmelf417f042017-03-24 08:02:50 +01001121}
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001122
Ido Schimmel18281f22017-03-24 08:02:51 +01001123/* Maximum delay buffer needed in case of PAUSE frames, in bytes.
Ido Schimmelf417f042017-03-24 08:02:50 +01001124 * Assumes 100m cable and maximum MTU.
1125 */
Ido Schimmel18281f22017-03-24 08:02:51 +01001126#define MLXSW_SP_PAUSE_DELAY 58752
1127
1128static u16 mlxsw_sp_pg_buf_delay_get(const struct mlxsw_sp *mlxsw_sp, int mtu,
1129 u16 delay, bool pfc, bool pause)
Ido Schimmelf417f042017-03-24 08:02:50 +01001130{
1131 if (pfc)
Ido Schimmel18281f22017-03-24 08:02:51 +01001132 return mlxsw_sp_pfc_delay_get(mlxsw_sp, mtu, delay);
Ido Schimmelf417f042017-03-24 08:02:50 +01001133 else if (pause)
Ido Schimmel18281f22017-03-24 08:02:51 +01001134 return mlxsw_sp_bytes_cells(mlxsw_sp, MLXSW_SP_PAUSE_DELAY);
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001135 else
Ido Schimmelf417f042017-03-24 08:02:50 +01001136 return 0;
1137}
1138
1139static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int index, u16 size, u16 thres,
1140 bool lossy)
1141{
1142 if (lossy)
1143 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, index, size);
1144 else
1145 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, index, size,
1146 thres);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001147}
1148
1149int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001150 u8 *prio_tc, bool pause_en,
1151 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +02001152{
1153 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001154 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
1155 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +02001156 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001157 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +02001158
1159 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
1160 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
1161 if (err)
1162 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001163
1164 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1165 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001166 bool pfc = false;
Ido Schimmelf417f042017-03-24 08:02:50 +01001167 bool lossy;
1168 u16 thres;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001169
1170 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
1171 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001172 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001173 configure = true;
1174 break;
1175 }
1176 }
1177
1178 if (!configure)
1179 continue;
Ido Schimmelf417f042017-03-24 08:02:50 +01001180
1181 lossy = !(pfc || pause_en);
Ido Schimmel18281f22017-03-24 08:02:51 +01001182 thres = mlxsw_sp_pg_buf_threshold_get(mlxsw_sp, mtu);
1183 delay = mlxsw_sp_pg_buf_delay_get(mlxsw_sp, mtu, delay, pfc,
1184 pause_en);
Ido Schimmelf417f042017-03-24 08:02:50 +01001185 mlxsw_sp_pg_buf_pack(pbmc_pl, i, thres + delay, thres, lossy);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001186 }
1187
Ido Schimmelff6551e2016-04-06 17:10:03 +02001188 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
1189}
1190
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001191static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001192 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001193{
1194 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
1195 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001196 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001197 u8 *prio_tc;
1198
1199 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001200 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001201
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001202 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001203 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001204}
1205
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001206static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
1207{
1208 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001209 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001210 int err;
1211
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001212 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001213 if (err)
1214 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001215 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
1216 if (err)
1217 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +02001218 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
1219 if (err)
1220 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001221 dev->mtu = mtu;
1222 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +02001223
1224err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +02001225 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
1226err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001227 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +02001228 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001229}
1230
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +03001231static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001232mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
1233 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001234{
1235 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1236 struct mlxsw_sp_port_pcpu_stats *p;
1237 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
1238 u32 tx_dropped = 0;
1239 unsigned int start;
1240 int i;
1241
1242 for_each_possible_cpu(i) {
1243 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
1244 do {
1245 start = u64_stats_fetch_begin_irq(&p->syncp);
1246 rx_packets = p->rx_packets;
1247 rx_bytes = p->rx_bytes;
1248 tx_packets = p->tx_packets;
1249 tx_bytes = p->tx_bytes;
1250 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
1251
1252 stats->rx_packets += rx_packets;
1253 stats->rx_bytes += rx_bytes;
1254 stats->tx_packets += tx_packets;
1255 stats->tx_bytes += tx_bytes;
1256 /* tx_dropped is u32, updated without syncp protection. */
1257 tx_dropped += p->tx_dropped;
1258 }
1259 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001260 return 0;
1261}
1262
Or Gerlitz3df5b3c2016-11-22 23:09:54 +02001263static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001264{
1265 switch (attr_id) {
1266 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
1267 return true;
1268 }
1269
1270 return false;
1271}
1272
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +03001273static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
1274 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001275{
1276 switch (attr_id) {
1277 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
1278 return mlxsw_sp_port_get_sw_stats64(dev, sp);
1279 }
1280
1281 return -EINVAL;
1282}
1283
1284static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
1285 int prio, char *ppcnt_pl)
1286{
1287 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1288 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1289
1290 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
1291 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1292}
1293
1294static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
1295 struct rtnl_link_stats64 *stats)
1296{
1297 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1298 int err;
1299
1300 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
1301 0, ppcnt_pl);
1302 if (err)
1303 goto out;
1304
1305 stats->tx_packets =
1306 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
1307 stats->rx_packets =
1308 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
1309 stats->tx_bytes =
1310 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
1311 stats->rx_bytes =
1312 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
1313 stats->multicast =
1314 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
1315
1316 stats->rx_crc_errors =
1317 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
1318 stats->rx_frame_errors =
1319 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
1320
1321 stats->rx_length_errors = (
1322 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
1323 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
1324 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
1325
1326 stats->rx_errors = (stats->rx_crc_errors +
1327 stats->rx_frame_errors + stats->rx_length_errors);
1328
1329out:
1330 return err;
1331}
1332
1333static void update_stats_cache(struct work_struct *work)
1334{
1335 struct mlxsw_sp_port *mlxsw_sp_port =
1336 container_of(work, struct mlxsw_sp_port,
1337 hw_stats.update_dw.work);
1338
1339 if (!netif_carrier_ok(mlxsw_sp_port->dev))
1340 goto out;
1341
1342 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
1343 mlxsw_sp_port->hw_stats.cache);
1344
1345out:
1346 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
1347 MLXSW_HW_STATS_UPDATE_TIME);
1348}
1349
1350/* Return the stats from a cache that is updated periodically,
1351 * as this function might get called in an atomic context.
1352 */
stephen hemmingerbc1f4472017-01-06 19:12:52 -08001353static void
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001354mlxsw_sp_port_get_stats64(struct net_device *dev,
1355 struct rtnl_link_stats64 *stats)
1356{
1357 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1358
1359 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001360}
1361
Jiri Pirko93cd0812017-04-18 16:55:35 +02001362static int __mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port,
1363 u16 vid_begin, u16 vid_end,
1364 bool is_member, bool untagged)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001365{
1366 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1367 char *spvm_pl;
1368 int err;
1369
1370 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
1371 if (!spvm_pl)
1372 return -ENOMEM;
1373
1374 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
1375 vid_end, is_member, untagged);
1376 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
1377 kfree(spvm_pl);
1378 return err;
1379}
1380
Jiri Pirko93cd0812017-04-18 16:55:35 +02001381int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
1382 u16 vid_end, bool is_member, bool untagged)
1383{
1384 u16 vid, vid_e;
1385 int err;
1386
1387 for (vid = vid_begin; vid <= vid_end;
1388 vid += MLXSW_REG_SPVM_REC_MAX_COUNT) {
1389 vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1),
1390 vid_end);
1391
1392 err = __mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e,
1393 is_member, untagged);
1394 if (err)
1395 return err;
1396 }
1397
1398 return 0;
1399}
1400
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001401static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1402{
1403 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1404 u16 vid, last_visited_vid;
1405 int err;
1406
1407 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1408 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
1409 vid);
1410 if (err) {
1411 last_visited_vid = vid;
1412 goto err_port_vid_to_fid_set;
1413 }
1414 }
1415
1416 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
1417 if (err) {
1418 last_visited_vid = VLAN_N_VID;
1419 goto err_port_vid_to_fid_set;
1420 }
1421
1422 return 0;
1423
1424err_port_vid_to_fid_set:
1425 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1426 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1427 vid);
1428 return err;
1429}
1430
1431static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1432{
1433 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1434 u16 vid;
1435 int err;
1436
1437 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1438 if (err)
1439 return err;
1440
1441 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1442 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1443 vid, vid);
1444 if (err)
1445 return err;
1446 }
1447
1448 return 0;
1449}
1450
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001451static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001452mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001453{
1454 struct mlxsw_sp_port *mlxsw_sp_vport;
1455
1456 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1457 if (!mlxsw_sp_vport)
1458 return NULL;
1459
1460 /* dev will be set correctly after the VLAN device is linked
1461 * with the real device. In case of bridge SELF invocation, dev
1462 * will remain as is.
1463 */
1464 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1465 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1466 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1467 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001468 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1469 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001470 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001471
1472 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1473
1474 return mlxsw_sp_vport;
1475}
1476
1477static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1478{
1479 list_del(&mlxsw_sp_vport->vport.list);
1480 kfree(mlxsw_sp_vport);
1481}
1482
Ido Schimmel05978482016-08-17 16:39:30 +02001483static int mlxsw_sp_port_add_vid(struct net_device *dev,
1484 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001485{
1486 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001487 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001488 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001489 int err;
1490
1491 /* VLAN 0 is added to HW filter when device goes up, but it is
1492 * reserved in our case, so simply return.
1493 */
1494 if (!vid)
1495 return 0;
1496
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001497 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001498 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001499
Ido Schimmel0355b592016-06-20 23:04:13 +02001500 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001501 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001502 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001503
1504 /* When adding the first VLAN interface on a bridged port we need to
1505 * transition all the active 802.1Q bridge VLANs to use explicit
1506 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1507 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001508 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001509 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001510 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001511 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001512 }
1513
Ido Schimmel52697a92016-07-02 11:00:09 +02001514 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001515 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001516 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001517
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001518 return 0;
1519
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001520err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001521 if (list_is_singular(&mlxsw_sp_port->vports_list))
1522 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1523err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001524 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001525 return err;
1526}
1527
Ido Schimmel32d863f2016-07-02 11:00:10 +02001528static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1529 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001530{
1531 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001532 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001533 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001534
1535 /* VLAN 0 is removed from HW filter when device goes down, but
1536 * it is reserved in our case, so simply return.
1537 */
1538 if (!vid)
1539 return 0;
1540
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001541 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001542 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001543 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001544
Ido Schimmel7a355832016-08-17 16:39:28 +02001545 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001546
Ido Schimmel1c800752016-06-20 23:04:20 +02001547 /* Drop FID reference. If this was the last reference the
1548 * resources will be freed.
1549 */
1550 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1551 if (f && !WARN_ON(!f->leave))
1552 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001553
1554 /* When removing the last VLAN interface on a bridged port we need to
1555 * transition all active 802.1Q bridge VLANs to use VID to FID
1556 * mappings and set port's mode to VLAN mode.
1557 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001558 if (list_is_singular(&mlxsw_sp_port->vports_list))
1559 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001560
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001561 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1562
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001563 return 0;
1564}
1565
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001566static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1567 size_t len)
1568{
1569 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001570 u8 module = mlxsw_sp_port->mapping.module;
1571 u8 width = mlxsw_sp_port->mapping.width;
1572 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001573 int err;
1574
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001575 if (!mlxsw_sp_port->split)
1576 err = snprintf(name, len, "p%d", module + 1);
1577 else
1578 err = snprintf(name, len, "p%ds%d", module + 1,
1579 lane / width);
1580
1581 if (err >= len)
1582 return -EINVAL;
1583
1584 return 0;
1585}
1586
Yotam Gigi763b4b72016-07-21 12:03:17 +02001587static struct mlxsw_sp_port_mall_tc_entry *
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001588mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1589 unsigned long cookie) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001590 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1591
1592 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1593 if (mall_tc_entry->cookie == cookie)
1594 return mall_tc_entry;
1595
1596 return NULL;
1597}
1598
1599static int
1600mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001601 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001602 const struct tc_action *a,
1603 bool ingress)
1604{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001605 struct net *net = dev_net(mlxsw_sp_port->dev);
1606 enum mlxsw_sp_span_type span_type;
1607 struct mlxsw_sp_port *to_port;
1608 struct net_device *to_dev;
1609 int ifindex;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001610
1611 ifindex = tcf_mirred_ifindex(a);
1612 to_dev = __dev_get_by_index(net, ifindex);
1613 if (!to_dev) {
1614 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1615 return -EINVAL;
1616 }
1617
1618 if (!mlxsw_sp_port_dev_check(to_dev)) {
1619 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
Yotam Gigie915ac62017-01-09 11:25:48 +01001620 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001621 }
1622 to_port = netdev_priv(to_dev);
1623
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001624 mirror->to_local_port = to_port->local_port;
1625 mirror->ingress = ingress;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001626 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001627 return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1628}
Yotam Gigi763b4b72016-07-21 12:03:17 +02001629
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001630static void
1631mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1632 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1633{
1634 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1635 enum mlxsw_sp_span_type span_type;
1636 struct mlxsw_sp_port *to_port;
1637
1638 to_port = mlxsw_sp->ports[mirror->to_local_port];
1639 span_type = mirror->ingress ?
1640 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1641 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001642}
1643
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001644static int
1645mlxsw_sp_port_add_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port,
1646 struct tc_cls_matchall_offload *cls,
1647 const struct tc_action *a,
1648 bool ingress)
1649{
1650 int err;
1651
1652 if (!mlxsw_sp_port->sample)
1653 return -EOPNOTSUPP;
1654 if (rtnl_dereference(mlxsw_sp_port->sample->psample_group)) {
1655 netdev_err(mlxsw_sp_port->dev, "sample already active\n");
1656 return -EEXIST;
1657 }
1658 if (tcf_sample_rate(a) > MLXSW_REG_MPSC_RATE_MAX) {
1659 netdev_err(mlxsw_sp_port->dev, "sample rate not supported\n");
1660 return -EOPNOTSUPP;
1661 }
1662
1663 rcu_assign_pointer(mlxsw_sp_port->sample->psample_group,
1664 tcf_sample_psample_group(a));
1665 mlxsw_sp_port->sample->truncate = tcf_sample_truncate(a);
1666 mlxsw_sp_port->sample->trunc_size = tcf_sample_trunc_size(a);
1667 mlxsw_sp_port->sample->rate = tcf_sample_rate(a);
1668
1669 err = mlxsw_sp_port_sample_set(mlxsw_sp_port, true, tcf_sample_rate(a));
1670 if (err)
1671 goto err_port_sample_set;
1672 return 0;
1673
1674err_port_sample_set:
1675 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1676 return err;
1677}
1678
1679static void
1680mlxsw_sp_port_del_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port)
1681{
1682 if (!mlxsw_sp_port->sample)
1683 return;
1684
1685 mlxsw_sp_port_sample_set(mlxsw_sp_port, false, 1);
1686 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1687}
1688
Yotam Gigi763b4b72016-07-21 12:03:17 +02001689static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1690 __be16 protocol,
1691 struct tc_cls_matchall_offload *cls,
1692 bool ingress)
1693{
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001694 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001695 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001696 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001697 int err;
1698
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001699 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001700 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
Yotam Gigie915ac62017-01-09 11:25:48 +01001701 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001702 }
1703
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001704 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1705 if (!mall_tc_entry)
1706 return -ENOMEM;
1707 mall_tc_entry->cookie = cls->cookie;
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001708
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001709 tcf_exts_to_list(cls->exts, &actions);
1710 a = list_first_entry(&actions, struct tc_action, list);
1711
1712 if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1713 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1714
1715 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1716 mirror = &mall_tc_entry->mirror;
1717 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1718 mirror, a, ingress);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001719 } else if (is_tcf_sample(a) && protocol == htons(ETH_P_ALL)) {
1720 mall_tc_entry->type = MLXSW_SP_PORT_MALL_SAMPLE;
1721 err = mlxsw_sp_port_add_cls_matchall_sample(mlxsw_sp_port, cls,
1722 a, ingress);
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001723 } else {
1724 err = -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001725 }
1726
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001727 if (err)
1728 goto err_add_action;
1729
1730 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001731 return 0;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001732
1733err_add_action:
1734 kfree(mall_tc_entry);
1735 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001736}
1737
1738static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1739 struct tc_cls_matchall_offload *cls)
1740{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001741 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001742
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001743 mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1744 cls->cookie);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001745 if (!mall_tc_entry) {
1746 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1747 return;
1748 }
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001749 list_del(&mall_tc_entry->list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001750
1751 switch (mall_tc_entry->type) {
1752 case MLXSW_SP_PORT_MALL_MIRROR:
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001753 mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1754 &mall_tc_entry->mirror);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001755 break;
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001756 case MLXSW_SP_PORT_MALL_SAMPLE:
1757 mlxsw_sp_port_del_cls_matchall_sample(mlxsw_sp_port);
1758 break;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001759 default:
1760 WARN_ON(1);
1761 }
1762
Yotam Gigi763b4b72016-07-21 12:03:17 +02001763 kfree(mall_tc_entry);
1764}
1765
1766static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1767 __be16 proto, struct tc_to_netdev *tc)
1768{
1769 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1770 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1771
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001772 switch (tc->type) {
1773 case TC_SETUP_MATCHALL:
Yotam Gigi763b4b72016-07-21 12:03:17 +02001774 switch (tc->cls_mall->command) {
1775 case TC_CLSMATCHALL_REPLACE:
1776 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1777 proto,
1778 tc->cls_mall,
1779 ingress);
1780 case TC_CLSMATCHALL_DESTROY:
1781 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1782 tc->cls_mall);
1783 return 0;
1784 default:
Or Gerlitzabbdf4b2017-03-17 09:38:01 +01001785 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001786 }
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001787 case TC_SETUP_CLSFLOWER:
1788 switch (tc->cls_flower->command) {
1789 case TC_CLSFLOWER_REPLACE:
1790 return mlxsw_sp_flower_replace(mlxsw_sp_port, ingress,
1791 proto, tc->cls_flower);
1792 case TC_CLSFLOWER_DESTROY:
1793 mlxsw_sp_flower_destroy(mlxsw_sp_port, ingress,
1794 tc->cls_flower);
1795 return 0;
Arkadi Sharshevsky7c1b8eb2017-03-11 09:42:59 +01001796 case TC_CLSFLOWER_STATS:
1797 return mlxsw_sp_flower_stats(mlxsw_sp_port, ingress,
1798 tc->cls_flower);
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001799 default:
1800 return -EOPNOTSUPP;
1801 }
Yotam Gigi763b4b72016-07-21 12:03:17 +02001802 }
1803
Yotam Gigie915ac62017-01-09 11:25:48 +01001804 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001805}
1806
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001807static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1808 .ndo_open = mlxsw_sp_port_open,
1809 .ndo_stop = mlxsw_sp_port_stop,
1810 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001811 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001812 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001813 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1814 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1815 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001816 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1817 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001818 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1819 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
1820 .ndo_fdb_add = switchdev_port_fdb_add,
1821 .ndo_fdb_del = switchdev_port_fdb_del,
1822 .ndo_fdb_dump = switchdev_port_fdb_dump,
1823 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1824 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1825 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001826 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001827};
1828
1829static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1830 struct ethtool_drvinfo *drvinfo)
1831{
1832 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1833 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1834
1835 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1836 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1837 sizeof(drvinfo->version));
1838 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1839 "%d.%d.%d",
1840 mlxsw_sp->bus_info->fw_rev.major,
1841 mlxsw_sp->bus_info->fw_rev.minor,
1842 mlxsw_sp->bus_info->fw_rev.subminor);
1843 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1844 sizeof(drvinfo->bus_info));
1845}
1846
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001847static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1848 struct ethtool_pauseparam *pause)
1849{
1850 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1851
1852 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1853 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1854}
1855
1856static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1857 struct ethtool_pauseparam *pause)
1858{
1859 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1860
1861 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1862 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1863 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1864
1865 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1866 pfcc_pl);
1867}
1868
1869static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1870 struct ethtool_pauseparam *pause)
1871{
1872 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1873 bool pause_en = pause->tx_pause || pause->rx_pause;
1874 int err;
1875
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001876 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1877 netdev_err(dev, "PFC already enabled on port\n");
1878 return -EINVAL;
1879 }
1880
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001881 if (pause->autoneg) {
1882 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1883 return -EINVAL;
1884 }
1885
1886 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1887 if (err) {
1888 netdev_err(dev, "Failed to configure port's headroom\n");
1889 return err;
1890 }
1891
1892 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1893 if (err) {
1894 netdev_err(dev, "Failed to set PAUSE parameters\n");
1895 goto err_port_pause_configure;
1896 }
1897
1898 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1899 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1900
1901 return 0;
1902
1903err_port_pause_configure:
1904 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1905 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1906 return err;
1907}
1908
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001909struct mlxsw_sp_port_hw_stats {
1910 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001911 u64 (*getter)(const char *payload);
Ido Schimmel18281f22017-03-24 08:02:51 +01001912 bool cells_bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001913};
1914
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001915static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001916 {
1917 .str = "a_frames_transmitted_ok",
1918 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1919 },
1920 {
1921 .str = "a_frames_received_ok",
1922 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1923 },
1924 {
1925 .str = "a_frame_check_sequence_errors",
1926 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1927 },
1928 {
1929 .str = "a_alignment_errors",
1930 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1931 },
1932 {
1933 .str = "a_octets_transmitted_ok",
1934 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1935 },
1936 {
1937 .str = "a_octets_received_ok",
1938 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1939 },
1940 {
1941 .str = "a_multicast_frames_xmitted_ok",
1942 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1943 },
1944 {
1945 .str = "a_broadcast_frames_xmitted_ok",
1946 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1947 },
1948 {
1949 .str = "a_multicast_frames_received_ok",
1950 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1951 },
1952 {
1953 .str = "a_broadcast_frames_received_ok",
1954 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1955 },
1956 {
1957 .str = "a_in_range_length_errors",
1958 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1959 },
1960 {
1961 .str = "a_out_of_range_length_field",
1962 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1963 },
1964 {
1965 .str = "a_frame_too_long_errors",
1966 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1967 },
1968 {
1969 .str = "a_symbol_error_during_carrier",
1970 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1971 },
1972 {
1973 .str = "a_mac_control_frames_transmitted",
1974 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1975 },
1976 {
1977 .str = "a_mac_control_frames_received",
1978 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1979 },
1980 {
1981 .str = "a_unsupported_opcodes_received",
1982 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1983 },
1984 {
1985 .str = "a_pause_mac_ctrl_frames_received",
1986 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1987 },
1988 {
1989 .str = "a_pause_mac_ctrl_frames_xmitted",
1990 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1991 },
1992};
1993
1994#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1995
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001996static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1997 {
1998 .str = "rx_octets_prio",
1999 .getter = mlxsw_reg_ppcnt_rx_octets_get,
2000 },
2001 {
2002 .str = "rx_frames_prio",
2003 .getter = mlxsw_reg_ppcnt_rx_frames_get,
2004 },
2005 {
2006 .str = "tx_octets_prio",
2007 .getter = mlxsw_reg_ppcnt_tx_octets_get,
2008 },
2009 {
2010 .str = "tx_frames_prio",
2011 .getter = mlxsw_reg_ppcnt_tx_frames_get,
2012 },
2013 {
2014 .str = "rx_pause_prio",
2015 .getter = mlxsw_reg_ppcnt_rx_pause_get,
2016 },
2017 {
2018 .str = "rx_pause_duration_prio",
2019 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
2020 },
2021 {
2022 .str = "tx_pause_prio",
2023 .getter = mlxsw_reg_ppcnt_tx_pause_get,
2024 },
2025 {
2026 .str = "tx_pause_duration_prio",
2027 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
2028 },
2029};
2030
2031#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
2032
Ido Schimmeldf4750e2016-07-19 15:35:54 +02002033static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
2034 {
2035 .str = "tc_transmit_queue_tc",
Ido Schimmel18281f22017-03-24 08:02:51 +01002036 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_get,
2037 .cells_bytes = true,
Ido Schimmeldf4750e2016-07-19 15:35:54 +02002038 },
2039 {
2040 .str = "tc_no_buffer_discard_uc_tc",
2041 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
2042 },
2043};
2044
2045#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
2046
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002047#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02002048 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
2049 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002050 IEEE_8021QAZ_MAX_TCS)
2051
2052static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
2053{
2054 int i;
2055
2056 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
2057 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
2058 mlxsw_sp_port_hw_prio_stats[i].str, prio);
2059 *p += ETH_GSTRING_LEN;
2060 }
2061}
2062
Ido Schimmeldf4750e2016-07-19 15:35:54 +02002063static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
2064{
2065 int i;
2066
2067 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
2068 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
2069 mlxsw_sp_port_hw_tc_stats[i].str, tc);
2070 *p += ETH_GSTRING_LEN;
2071 }
2072}
2073
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002074static void mlxsw_sp_port_get_strings(struct net_device *dev,
2075 u32 stringset, u8 *data)
2076{
2077 u8 *p = data;
2078 int i;
2079
2080 switch (stringset) {
2081 case ETH_SS_STATS:
2082 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
2083 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
2084 ETH_GSTRING_LEN);
2085 p += ETH_GSTRING_LEN;
2086 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002087
2088 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
2089 mlxsw_sp_port_get_prio_strings(&p, i);
2090
Ido Schimmeldf4750e2016-07-19 15:35:54 +02002091 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
2092 mlxsw_sp_port_get_tc_strings(&p, i);
2093
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002094 break;
2095 }
2096}
2097
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002098static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
2099 enum ethtool_phys_id_state state)
2100{
2101 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2102 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2103 char mlcr_pl[MLXSW_REG_MLCR_LEN];
2104 bool active;
2105
2106 switch (state) {
2107 case ETHTOOL_ID_ACTIVE:
2108 active = true;
2109 break;
2110 case ETHTOOL_ID_INACTIVE:
2111 active = false;
2112 break;
2113 default:
2114 return -EOPNOTSUPP;
2115 }
2116
2117 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
2118 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
2119}
2120
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002121static int
2122mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
2123 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
2124{
2125 switch (grp) {
2126 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
2127 *p_hw_stats = mlxsw_sp_port_hw_stats;
2128 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
2129 break;
2130 case MLXSW_REG_PPCNT_PRIO_CNT:
2131 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
2132 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
2133 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02002134 case MLXSW_REG_PPCNT_TC_CNT:
2135 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
2136 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
2137 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002138 default:
2139 WARN_ON(1);
Yotam Gigie915ac62017-01-09 11:25:48 +01002140 return -EOPNOTSUPP;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002141 }
2142 return 0;
2143}
2144
2145static void __mlxsw_sp_port_get_stats(struct net_device *dev,
2146 enum mlxsw_reg_ppcnt_grp grp, int prio,
2147 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002148{
Ido Schimmel18281f22017-03-24 08:02:51 +01002149 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2150 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002151 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002152 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002153 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002154 int err;
2155
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002156 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
2157 if (err)
2158 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002159 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel18281f22017-03-24 08:02:51 +01002160 for (i = 0; i < len; i++) {
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01002161 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel18281f22017-03-24 08:02:51 +01002162 if (!hw_stats[i].cells_bytes)
2163 continue;
2164 data[data_index + i] = mlxsw_sp_cells_bytes(mlxsw_sp,
2165 data[data_index + i]);
2166 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002167}
2168
2169static void mlxsw_sp_port_get_stats(struct net_device *dev,
2170 struct ethtool_stats *stats, u64 *data)
2171{
2172 int i, data_index = 0;
2173
2174 /* IEEE 802.3 Counters */
2175 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
2176 data, data_index);
2177 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
2178
2179 /* Per-Priority Counters */
2180 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2181 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
2182 data, data_index);
2183 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
2184 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02002185
2186 /* Per-TC Counters */
2187 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2188 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
2189 data, data_index);
2190 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
2191 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002192}
2193
2194static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
2195{
2196 switch (sset) {
2197 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02002198 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002199 default:
2200 return -EOPNOTSUPP;
2201 }
2202}
2203
2204struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002205 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002206 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002207 u32 speed;
2208};
2209
2210static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
2211 {
2212 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002213 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
2214 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002215 },
2216 {
2217 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
2218 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002219 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
2220 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002221 },
2222 {
2223 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002224 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
2225 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002226 },
2227 {
2228 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
2229 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002230 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
2231 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002232 },
2233 {
2234 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
2235 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
2236 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
2237 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002238 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
2239 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002240 },
2241 {
2242 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002243 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
2244 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002245 },
2246 {
2247 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002248 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
2249 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002250 },
2251 {
2252 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002253 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
2254 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002255 },
2256 {
2257 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002258 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
2259 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002260 },
2261 {
2262 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002263 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
2264 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002265 },
2266 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002267 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
2268 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
2269 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002270 },
2271 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002272 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
2273 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
2274 .speed = SPEED_25000,
2275 },
2276 {
2277 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
2278 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
2279 .speed = SPEED_25000,
2280 },
2281 {
2282 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
2283 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
2284 .speed = SPEED_25000,
2285 },
2286 {
2287 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
2288 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
2289 .speed = SPEED_50000,
2290 },
2291 {
2292 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
2293 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
2294 .speed = SPEED_50000,
2295 },
2296 {
2297 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
2298 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
2299 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002300 },
2301 {
2302 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002303 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
2304 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002305 },
2306 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002307 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2308 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
2309 .speed = SPEED_56000,
2310 },
2311 {
2312 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2313 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
2314 .speed = SPEED_56000,
2315 },
2316 {
2317 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2318 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
2319 .speed = SPEED_56000,
2320 },
2321 {
2322 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
2323 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
2324 .speed = SPEED_100000,
2325 },
2326 {
2327 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
2328 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
2329 .speed = SPEED_100000,
2330 },
2331 {
2332 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
2333 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
2334 .speed = SPEED_100000,
2335 },
2336 {
2337 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
2338 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
2339 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002340 },
2341};
2342
2343#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
2344
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002345static void
2346mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
2347 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002348{
2349 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
2350 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
2351 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
2352 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
2353 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
2354 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002355 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002356
2357 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
2358 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
2359 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
2360 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
2361 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002362 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002363}
2364
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002365static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002366{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002367 int i;
2368
2369 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2370 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002371 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2372 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002373 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002374}
2375
2376static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002377 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002378{
2379 u32 speed = SPEED_UNKNOWN;
2380 u8 duplex = DUPLEX_UNKNOWN;
2381 int i;
2382
2383 if (!carrier_ok)
2384 goto out;
2385
2386 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2387 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
2388 speed = mlxsw_sp_port_link_mode[i].speed;
2389 duplex = DUPLEX_FULL;
2390 break;
2391 }
2392 }
2393out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002394 cmd->base.speed = speed;
2395 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002396}
2397
2398static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
2399{
2400 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
2401 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
2402 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
2403 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
2404 return PORT_FIBRE;
2405
2406 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
2407 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
2408 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
2409 return PORT_DA;
2410
2411 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
2412 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
2413 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
2414 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
2415 return PORT_NONE;
2416
2417 return PORT_OTHER;
2418}
2419
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002420static u32
2421mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002422{
2423 u32 ptys_proto = 0;
2424 int i;
2425
2426 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002427 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2428 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002429 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2430 }
2431 return ptys_proto;
2432}
2433
2434static u32 mlxsw_sp_to_ptys_speed(u32 speed)
2435{
2436 u32 ptys_proto = 0;
2437 int i;
2438
2439 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2440 if (speed == mlxsw_sp_port_link_mode[i].speed)
2441 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2442 }
2443 return ptys_proto;
2444}
2445
Ido Schimmel18f1e702016-02-26 17:32:31 +01002446static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
2447{
2448 u32 ptys_proto = 0;
2449 int i;
2450
2451 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2452 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
2453 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2454 }
2455 return ptys_proto;
2456}
2457
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002458static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
2459 struct ethtool_link_ksettings *cmd)
2460{
2461 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
2462 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
2463 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
2464
2465 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
2466 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
2467}
2468
2469static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
2470 struct ethtool_link_ksettings *cmd)
2471{
2472 if (!autoneg)
2473 return;
2474
2475 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
2476 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
2477}
2478
2479static void
2480mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
2481 struct ethtool_link_ksettings *cmd)
2482{
2483 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
2484 return;
2485
2486 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
2487 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
2488}
2489
2490static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
2491 struct ethtool_link_ksettings *cmd)
2492{
2493 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2494 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2495 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2496 char ptys_pl[MLXSW_REG_PTYS_LEN];
2497 u8 autoneg_status;
2498 bool autoneg;
2499 int err;
2500
2501 autoneg = mlxsw_sp_port->link.autoneg;
Elad Raz401c8b42016-10-28 21:35:52 +02002502 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002503 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2504 if (err)
2505 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002506 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2507 &eth_proto_oper);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002508
2509 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2510
2511 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2512
2513 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2514 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2515 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2516
2517 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2518 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2519 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2520 cmd);
2521
2522 return 0;
2523}
2524
2525static int
2526mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2527 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002528{
2529 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2530 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2531 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002532 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002533 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002534 int err;
2535
Elad Raz401c8b42016-10-28 21:35:52 +02002536 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002537 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002538 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002539 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002540 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002541
2542 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2543 eth_proto_new = autoneg ?
2544 mlxsw_sp_to_ptys_advert_link(cmd) :
2545 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002546
2547 eth_proto_new = eth_proto_new & eth_proto_cap;
2548 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002549 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002550 return -EINVAL;
2551 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002552
Elad Raz401c8b42016-10-28 21:35:52 +02002553 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2554 eth_proto_new);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002555 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002556 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002557 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002558
Ido Schimmel6277d462016-07-15 11:14:58 +02002559 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002560 return 0;
2561
Ido Schimmel0c83f882016-09-12 13:26:23 +02002562 mlxsw_sp_port->link.autoneg = autoneg;
2563
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002564 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2565 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002566
2567 return 0;
2568}
2569
2570static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2571 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2572 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002573 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2574 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002575 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002576 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002577 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2578 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002579 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2580 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002581};
2582
Ido Schimmel18f1e702016-02-26 17:32:31 +01002583static int
2584mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2585{
2586 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2587 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2588 char ptys_pl[MLXSW_REG_PTYS_LEN];
2589 u32 eth_proto_admin;
2590
2591 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
Elad Raz401c8b42016-10-28 21:35:52 +02002592 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2593 eth_proto_admin);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002594 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2595}
2596
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002597int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2598 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2599 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002600{
2601 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2602 char qeec_pl[MLXSW_REG_QEEC_LEN];
2603
2604 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2605 next_index);
2606 mlxsw_reg_qeec_de_set(qeec_pl, true);
2607 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2608 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2609 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2610}
2611
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002612int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2613 enum mlxsw_reg_qeec_hr hr, u8 index,
2614 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002615{
2616 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2617 char qeec_pl[MLXSW_REG_QEEC_LEN];
2618
2619 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2620 next_index);
2621 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2622 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2623 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2624}
2625
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002626int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2627 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002628{
2629 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2630 char qtct_pl[MLXSW_REG_QTCT_LEN];
2631
2632 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2633 tclass);
2634 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2635}
2636
2637static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2638{
2639 int err, i;
2640
2641 /* Setup the elements hierarcy, so that each TC is linked to
2642 * one subgroup, which are all member in the same group.
2643 */
2644 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2645 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2646 0);
2647 if (err)
2648 return err;
2649 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2650 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2651 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2652 0, false, 0);
2653 if (err)
2654 return err;
2655 }
2656 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2657 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2658 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2659 false, 0);
2660 if (err)
2661 return err;
2662 }
2663
2664 /* Make sure the max shaper is disabled in all hierarcies that
2665 * support it.
2666 */
2667 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2668 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2669 MLXSW_REG_QEEC_MAS_DIS);
2670 if (err)
2671 return err;
2672 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2673 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2674 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2675 i, 0,
2676 MLXSW_REG_QEEC_MAS_DIS);
2677 if (err)
2678 return err;
2679 }
2680 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2681 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2682 MLXSW_REG_QEEC_HIERARCY_TC,
2683 i, i,
2684 MLXSW_REG_QEEC_MAS_DIS);
2685 if (err)
2686 return err;
2687 }
2688
2689 /* Map all priorities to traffic class 0. */
2690 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2691 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2692 if (err)
2693 return err;
2694 }
2695
2696 return 0;
2697}
2698
Ido Schimmel05978482016-08-17 16:39:30 +02002699static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2700{
2701 mlxsw_sp_port->pvid = 1;
2702
2703 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2704}
2705
2706static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2707{
2708 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2709}
2710
Jiri Pirko67963a32016-10-28 21:35:55 +02002711static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2712 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002713{
2714 struct mlxsw_sp_port *mlxsw_sp_port;
2715 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002716 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002717 int err;
2718
2719 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2720 if (!dev)
2721 return -ENOMEM;
Jiri Pirkof20a91f2016-10-27 15:13:00 +02002722 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002723 mlxsw_sp_port = netdev_priv(dev);
2724 mlxsw_sp_port->dev = dev;
2725 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2726 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002727 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002728 mlxsw_sp_port->mapping.module = module;
2729 mlxsw_sp_port->mapping.width = width;
2730 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002731 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002732 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2733 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2734 if (!mlxsw_sp_port->active_vlans) {
2735 err = -ENOMEM;
2736 goto err_port_active_vlans_alloc;
2737 }
Elad Razfc1273a2016-01-06 13:01:11 +01002738 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2739 if (!mlxsw_sp_port->untagged_vlans) {
2740 err = -ENOMEM;
2741 goto err_port_untagged_vlans_alloc;
2742 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002743 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002744 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002745
2746 mlxsw_sp_port->pcpu_stats =
2747 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2748 if (!mlxsw_sp_port->pcpu_stats) {
2749 err = -ENOMEM;
2750 goto err_alloc_stats;
2751 }
2752
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002753 mlxsw_sp_port->sample = kzalloc(sizeof(*mlxsw_sp_port->sample),
2754 GFP_KERNEL);
2755 if (!mlxsw_sp_port->sample) {
2756 err = -ENOMEM;
2757 goto err_alloc_sample;
2758 }
2759
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002760 mlxsw_sp_port->hw_stats.cache =
2761 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2762
2763 if (!mlxsw_sp_port->hw_stats.cache) {
2764 err = -ENOMEM;
2765 goto err_alloc_hw_stats;
2766 }
2767 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2768 &update_stats_cache);
2769
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002770 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2771 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2772
Ido Schimmel3247ff22016-09-08 08:16:02 +02002773 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2774 if (err) {
2775 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2776 mlxsw_sp_port->local_port);
2777 goto err_port_swid_set;
2778 }
2779
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002780 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2781 if (err) {
2782 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2783 mlxsw_sp_port->local_port);
2784 goto err_dev_addr_init;
2785 }
2786
2787 netif_carrier_off(dev);
2788
2789 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002790 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2791 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002792
Jarod Wilsond894be52016-10-20 13:55:16 -04002793 dev->min_mtu = 0;
2794 dev->max_mtu = ETH_MAX_MTU;
2795
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002796 /* Each packet needs to have a Tx header (metadata) on top all other
2797 * headers.
2798 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002799 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002800
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002801 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2802 if (err) {
2803 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2804 mlxsw_sp_port->local_port);
2805 goto err_port_system_port_mapping_set;
2806 }
2807
Ido Schimmel18f1e702016-02-26 17:32:31 +01002808 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2809 if (err) {
2810 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2811 mlxsw_sp_port->local_port);
2812 goto err_port_speed_by_width_set;
2813 }
2814
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002815 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2816 if (err) {
2817 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2818 mlxsw_sp_port->local_port);
2819 goto err_port_mtu_set;
2820 }
2821
2822 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2823 if (err)
2824 goto err_port_admin_status_set;
2825
2826 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2827 if (err) {
2828 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2829 mlxsw_sp_port->local_port);
2830 goto err_port_buffers_init;
2831 }
2832
Ido Schimmel90183b92016-04-06 17:10:08 +02002833 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2834 if (err) {
2835 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2836 mlxsw_sp_port->local_port);
2837 goto err_port_ets_init;
2838 }
2839
Ido Schimmelf00817d2016-04-06 17:10:09 +02002840 /* ETS and buffers must be initialized before DCB. */
2841 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2842 if (err) {
2843 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2844 mlxsw_sp_port->local_port);
2845 goto err_port_dcb_init;
2846 }
2847
Ido Schimmel45a4a162017-05-16 19:38:35 +02002848 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
2849 if (err) {
2850 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set non-virtual mode\n",
2851 mlxsw_sp_port->local_port);
2852 goto err_port_vp_mode_set;
2853 }
2854
Ido Schimmel05978482016-08-17 16:39:30 +02002855 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2856 if (err) {
2857 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2858 mlxsw_sp_port->local_port);
2859 goto err_port_pvid_vport_create;
2860 }
2861
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002862 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002863 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002864 err = register_netdev(dev);
2865 if (err) {
2866 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2867 mlxsw_sp_port->local_port);
2868 goto err_register_netdev;
2869 }
2870
Elad Razd808c7e2016-10-28 21:35:57 +02002871 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2872 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2873 module);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002874 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002875 return 0;
2876
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002877err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002878 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002879 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002880 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2881err_port_pvid_vport_create:
Ido Schimmel45a4a162017-05-16 19:38:35 +02002882err_port_vp_mode_set:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002883 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002884err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002885err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002886err_port_buffers_init:
2887err_port_admin_status_set:
2888err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002889err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002890err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002891err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002892 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2893err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002894 kfree(mlxsw_sp_port->hw_stats.cache);
2895err_alloc_hw_stats:
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002896 kfree(mlxsw_sp_port->sample);
2897err_alloc_sample:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002898 free_percpu(mlxsw_sp_port->pcpu_stats);
2899err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002900 kfree(mlxsw_sp_port->untagged_vlans);
2901err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002902 kfree(mlxsw_sp_port->active_vlans);
2903err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002904 free_netdev(dev);
2905 return err;
2906}
2907
Jiri Pirko67963a32016-10-28 21:35:55 +02002908static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2909 bool split, u8 module, u8 width, u8 lane)
2910{
2911 int err;
2912
2913 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2914 if (err) {
2915 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2916 local_port);
2917 return err;
2918 }
Ido Schimmel9a60c902016-12-16 19:29:03 +01002919 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split,
Jiri Pirko67963a32016-10-28 21:35:55 +02002920 module, width, lane);
2921 if (err)
2922 goto err_port_create;
2923 return 0;
2924
2925err_port_create:
2926 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2927 return err;
2928}
2929
2930static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002931{
2932 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2933
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002934 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko67963a32016-10-28 21:35:55 +02002935 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002936 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002937 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002938 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002939 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002940 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002941 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2942 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002943 kfree(mlxsw_sp_port->hw_stats.cache);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002944 kfree(mlxsw_sp_port->sample);
Yotam Gigi136f1442017-01-09 11:25:47 +01002945 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002946 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002947 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002948 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002949 free_netdev(mlxsw_sp_port->dev);
2950}
2951
Jiri Pirko67963a32016-10-28 21:35:55 +02002952static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2953{
2954 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2955 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2956}
2957
Jiri Pirkof83e2102016-10-28 21:35:49 +02002958static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2959{
2960 return mlxsw_sp->ports[local_port] != NULL;
2961}
2962
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002963static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2964{
2965 int i;
2966
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002967 for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002968 if (mlxsw_sp_port_created(mlxsw_sp, i))
2969 mlxsw_sp_port_remove(mlxsw_sp, i);
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002970 kfree(mlxsw_sp->port_to_module);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002971 kfree(mlxsw_sp->ports);
2972}
2973
2974static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2975{
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002976 unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
Ido Schimmeld664b412016-06-09 09:51:40 +02002977 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002978 size_t alloc_size;
2979 int i;
2980 int err;
2981
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002982 alloc_size = sizeof(struct mlxsw_sp_port *) * max_ports;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002983 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2984 if (!mlxsw_sp->ports)
2985 return -ENOMEM;
2986
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01002987 mlxsw_sp->port_to_module = kcalloc(max_ports, sizeof(u8), GFP_KERNEL);
2988 if (!mlxsw_sp->port_to_module) {
2989 err = -ENOMEM;
2990 goto err_port_to_module_alloc;
2991 }
2992
2993 for (i = 1; i < max_ports; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002994 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002995 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002996 if (err)
2997 goto err_port_module_info_get;
2998 if (!width)
2999 continue;
3000 mlxsw_sp->port_to_module[i] = module;
Jiri Pirko67963a32016-10-28 21:35:55 +02003001 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
3002 module, width, lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003003 if (err)
3004 goto err_port_create;
3005 }
3006 return 0;
3007
3008err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01003009err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003010 for (i--; i >= 1; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02003011 if (mlxsw_sp_port_created(mlxsw_sp, i))
3012 mlxsw_sp_port_remove(mlxsw_sp, i);
Ido Schimmel5ec2ee72017-03-24 08:02:48 +01003013 kfree(mlxsw_sp->port_to_module);
3014err_port_to_module_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003015 kfree(mlxsw_sp->ports);
3016 return err;
3017}
3018
Ido Schimmel18f1e702016-02-26 17:32:31 +01003019static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
3020{
3021 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
3022
3023 return local_port - offset;
3024}
3025
Ido Schimmelbe945352016-06-09 09:51:39 +02003026static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
3027 u8 module, unsigned int count)
3028{
3029 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
3030 int err, i;
3031
3032 for (i = 0; i < count; i++) {
3033 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
3034 width, i * width);
3035 if (err)
3036 goto err_port_module_map;
3037 }
3038
3039 for (i = 0; i < count; i++) {
3040 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
3041 if (err)
3042 goto err_port_swid_set;
3043 }
3044
3045 for (i = 0; i < count; i++) {
3046 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02003047 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02003048 if (err)
3049 goto err_port_create;
3050 }
3051
3052 return 0;
3053
3054err_port_create:
3055 for (i--; i >= 0; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02003056 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
3057 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmelbe945352016-06-09 09:51:39 +02003058 i = count;
3059err_port_swid_set:
3060 for (i--; i >= 0; i--)
3061 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
3062 MLXSW_PORT_SWID_DISABLED_PORT);
3063 i = count;
3064err_port_module_map:
3065 for (i--; i >= 0; i--)
3066 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
3067 return err;
3068}
3069
3070static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
3071 u8 base_port, unsigned int count)
3072{
3073 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
3074 int i;
3075
3076 /* Split by four means we need to re-create two ports, otherwise
3077 * only one.
3078 */
3079 count = count / 2;
3080
3081 for (i = 0; i < count; i++) {
3082 local_port = base_port + i * 2;
3083 module = mlxsw_sp->port_to_module[local_port];
3084
3085 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
3086 0);
3087 }
3088
3089 for (i = 0; i < count; i++)
3090 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
3091
3092 for (i = 0; i < count; i++) {
3093 local_port = base_port + i * 2;
3094 module = mlxsw_sp->port_to_module[local_port];
3095
3096 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02003097 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02003098 }
3099}
3100
Jiri Pirkob2f10572016-04-08 19:11:23 +02003101static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
3102 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01003103{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003104 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01003105 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01003106 u8 module, cur_width, base_port;
3107 int i;
3108 int err;
3109
3110 mlxsw_sp_port = mlxsw_sp->ports[local_port];
3111 if (!mlxsw_sp_port) {
3112 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
3113 local_port);
3114 return -EINVAL;
3115 }
3116
Ido Schimmeld664b412016-06-09 09:51:40 +02003117 module = mlxsw_sp_port->mapping.module;
3118 cur_width = mlxsw_sp_port->mapping.width;
3119
Ido Schimmel18f1e702016-02-26 17:32:31 +01003120 if (count != 2 && count != 4) {
3121 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
3122 return -EINVAL;
3123 }
3124
Ido Schimmel18f1e702016-02-26 17:32:31 +01003125 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
3126 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
3127 return -EINVAL;
3128 }
3129
3130 /* Make sure we have enough slave (even) ports for the split. */
3131 if (count == 2) {
3132 base_port = local_port;
3133 if (mlxsw_sp->ports[base_port + 1]) {
3134 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
3135 return -EINVAL;
3136 }
3137 } else {
3138 base_port = mlxsw_sp_cluster_base_port_get(local_port);
3139 if (mlxsw_sp->ports[base_port + 1] ||
3140 mlxsw_sp->ports[base_port + 3]) {
3141 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
3142 return -EINVAL;
3143 }
3144 }
3145
3146 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02003147 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
3148 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01003149
Ido Schimmelbe945352016-06-09 09:51:39 +02003150 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
3151 if (err) {
3152 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
3153 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01003154 }
3155
3156 return 0;
3157
Ido Schimmelbe945352016-06-09 09:51:39 +02003158err_port_split_create:
3159 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01003160 return err;
3161}
3162
Jiri Pirkob2f10572016-04-08 19:11:23 +02003163static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01003164{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003165 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01003166 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02003167 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01003168 unsigned int count;
3169 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01003170
3171 mlxsw_sp_port = mlxsw_sp->ports[local_port];
3172 if (!mlxsw_sp_port) {
3173 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
3174 local_port);
3175 return -EINVAL;
3176 }
3177
3178 if (!mlxsw_sp_port->split) {
3179 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
3180 return -EINVAL;
3181 }
3182
Ido Schimmeld664b412016-06-09 09:51:40 +02003183 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01003184 count = cur_width == 1 ? 4 : 2;
3185
3186 base_port = mlxsw_sp_cluster_base_port_get(local_port);
3187
3188 /* Determine which ports to remove. */
3189 if (count == 2 && local_port >= base_port + 2)
3190 base_port = base_port + 2;
3191
3192 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02003193 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
3194 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01003195
Ido Schimmelbe945352016-06-09 09:51:39 +02003196 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01003197
3198 return 0;
3199}
3200
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003201static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
3202 char *pude_pl, void *priv)
3203{
3204 struct mlxsw_sp *mlxsw_sp = priv;
3205 struct mlxsw_sp_port *mlxsw_sp_port;
3206 enum mlxsw_reg_pude_oper_status status;
3207 u8 local_port;
3208
3209 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
3210 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003211 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003212 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003213
3214 status = mlxsw_reg_pude_oper_status_get(pude_pl);
3215 if (status == MLXSW_PORT_OPER_STATUS_UP) {
3216 netdev_info(mlxsw_sp_port->dev, "link up\n");
3217 netif_carrier_on(mlxsw_sp_port->dev);
3218 } else {
3219 netdev_info(mlxsw_sp_port->dev, "link down\n");
3220 netif_carrier_off(mlxsw_sp_port->dev);
3221 }
3222}
3223
Nogah Frankel14eeda92016-11-25 10:33:32 +01003224static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
3225 u8 local_port, void *priv)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003226{
3227 struct mlxsw_sp *mlxsw_sp = priv;
3228 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
3229 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
3230
3231 if (unlikely(!mlxsw_sp_port)) {
3232 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
3233 local_port);
3234 return;
3235 }
3236
3237 skb->dev = mlxsw_sp_port->dev;
3238
3239 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
3240 u64_stats_update_begin(&pcpu_stats->syncp);
3241 pcpu_stats->rx_packets++;
3242 pcpu_stats->rx_bytes += skb->len;
3243 u64_stats_update_end(&pcpu_stats->syncp);
3244
3245 skb->protocol = eth_type_trans(skb, skb->dev);
3246 netif_receive_skb(skb);
3247}
3248
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02003249static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
3250 void *priv)
3251{
3252 skb->offload_fwd_mark = 1;
Nogah Frankel14eeda92016-11-25 10:33:32 +01003253 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02003254}
3255
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01003256static void mlxsw_sp_rx_listener_sample_func(struct sk_buff *skb, u8 local_port,
3257 void *priv)
3258{
3259 struct mlxsw_sp *mlxsw_sp = priv;
3260 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
3261 struct psample_group *psample_group;
3262 u32 size;
3263
3264 if (unlikely(!mlxsw_sp_port)) {
3265 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received for non-existent port\n",
3266 local_port);
3267 goto out;
3268 }
3269 if (unlikely(!mlxsw_sp_port->sample)) {
3270 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received on unsupported port\n",
3271 local_port);
3272 goto out;
3273 }
3274
3275 size = mlxsw_sp_port->sample->truncate ?
3276 mlxsw_sp_port->sample->trunc_size : skb->len;
3277
3278 rcu_read_lock();
3279 psample_group = rcu_dereference(mlxsw_sp_port->sample->psample_group);
3280 if (!psample_group)
3281 goto out_unlock;
3282 psample_sample_packet(psample_group, skb, size,
3283 mlxsw_sp_port->dev->ifindex, 0,
3284 mlxsw_sp_port->sample->rate);
3285out_unlock:
3286 rcu_read_unlock();
3287out:
3288 consume_skb(skb);
3289}
3290
Nogah Frankel117b0da2016-11-25 10:33:44 +01003291#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel0fb78a42016-11-25 10:33:39 +01003292 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01003293 _is_ctrl, SP_##_trap_group, DISCARD)
Ido Schimmel93393b32016-08-25 18:42:38 +02003294
Nogah Frankel117b0da2016-11-25 10:33:44 +01003295#define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel14eeda92016-11-25 10:33:32 +01003296 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01003297 _is_ctrl, SP_##_trap_group, DISCARD)
3298
3299#define MLXSW_SP_EVENTL(_func, _trap_id) \
3300 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
Nogah Frankel14eeda92016-11-25 10:33:32 +01003301
Nogah Frankel45449132016-11-25 10:33:35 +01003302static const struct mlxsw_listener mlxsw_sp_listener[] = {
3303 /* Events */
Nogah Frankel117b0da2016-11-25 10:33:44 +01003304 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
Nogah Frankelee4a60d2016-11-25 10:33:29 +01003305 /* L2 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01003306 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
3307 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
3308 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
3309 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
3310 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
3311 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
3312 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
3313 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
3314 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
3315 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
3316 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
Jiri Pirko9d41acc2017-04-18 16:55:38 +02003317 MLXSW_SP_RXL_NO_MARK(FID_MISS, TRAP_TO_CPU, IP2ME, false),
Ido Schimmel93393b32016-08-25 18:42:38 +02003318 /* L3 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01003319 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3320 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3321 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3322 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
3323 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
3324 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
3325 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
3326 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01003327 /* PKT Sample trap */
3328 MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,
3329 false, SP_IP2ME, DISCARD)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003330};
3331
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003332static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
3333{
3334 char qpcr_pl[MLXSW_REG_QPCR_LEN];
3335 enum mlxsw_reg_qpcr_ir_units ir_units;
3336 int max_cpu_policers;
3337 bool is_bytes;
3338 u8 burst_size;
3339 u32 rate;
3340 int i, err;
3341
3342 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
3343 return -EIO;
3344
3345 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
3346
3347 ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
3348 for (i = 0; i < max_cpu_policers; i++) {
3349 is_bytes = false;
3350 switch (i) {
3351 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
3352 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
3353 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
3354 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
3355 rate = 128;
3356 burst_size = 7;
3357 break;
3358 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
3359 rate = 16 * 1024;
3360 burst_size = 10;
3361 break;
3362 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
3363 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
3364 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
3365 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
3366 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
3367 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
3368 rate = 1024;
3369 burst_size = 7;
3370 break;
3371 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
3372 is_bytes = true;
3373 rate = 4 * 1024;
3374 burst_size = 4;
3375 break;
3376 default:
3377 continue;
3378 }
3379
3380 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
3381 burst_size);
3382 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
3383 if (err)
3384 return err;
3385 }
3386
3387 return 0;
3388}
3389
Nogah Frankel579c82e2016-11-25 10:33:42 +01003390static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003391{
3392 char htgt_pl[MLXSW_REG_HTGT_LEN];
Nogah Frankel117b0da2016-11-25 10:33:44 +01003393 enum mlxsw_reg_htgt_trap_group i;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003394 int max_cpu_policers;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003395 int max_trap_groups;
3396 u8 priority, tc;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003397 u16 policer_id;
Nogah Frankel117b0da2016-11-25 10:33:44 +01003398 int err;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003399
3400 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
3401 return -EIO;
3402
3403 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003404 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
Nogah Frankel579c82e2016-11-25 10:33:42 +01003405
3406 for (i = 0; i < max_trap_groups; i++) {
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003407 policer_id = i;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003408 switch (i) {
Nogah Frankel117b0da2016-11-25 10:33:44 +01003409 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
3410 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
3411 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
3412 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
3413 priority = 5;
3414 tc = 5;
3415 break;
3416 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
3417 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
3418 priority = 4;
3419 tc = 4;
3420 break;
3421 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
3422 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
3423 priority = 3;
3424 tc = 3;
3425 break;
3426 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
3427 priority = 2;
3428 tc = 2;
3429 break;
3430 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
3431 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
3432 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
3433 priority = 1;
3434 tc = 1;
3435 break;
3436 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
Nogah Frankel579c82e2016-11-25 10:33:42 +01003437 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
3438 tc = MLXSW_REG_HTGT_DEFAULT_TC;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003439 policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003440 break;
3441 default:
3442 continue;
3443 }
Nogah Frankel117b0da2016-11-25 10:33:44 +01003444
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003445 if (max_cpu_policers <= policer_id &&
3446 policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
3447 return -EIO;
3448
3449 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
Nogah Frankel579c82e2016-11-25 10:33:42 +01003450 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3451 if (err)
3452 return err;
3453 }
3454
3455 return 0;
3456}
3457
3458static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
3459{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003460 int i;
3461 int err;
3462
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003463 err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
3464 if (err)
3465 return err;
3466
Nogah Frankel579c82e2016-11-25 10:33:42 +01003467 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003468 if (err)
3469 return err;
3470
Nogah Frankel45449132016-11-25 10:33:35 +01003471 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003472 err = mlxsw_core_trap_register(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003473 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003474 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003475 if (err)
Nogah Frankel45449132016-11-25 10:33:35 +01003476 goto err_listener_register;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003477
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003478 }
3479 return 0;
3480
Nogah Frankel45449132016-11-25 10:33:35 +01003481err_listener_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003482 for (i--; i >= 0; i--) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003483 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003484 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003485 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003486 }
3487 return err;
3488}
3489
3490static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
3491{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003492 int i;
3493
Nogah Frankel45449132016-11-25 10:33:35 +01003494 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003495 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003496 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003497 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003498 }
3499}
3500
3501static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
3502 enum mlxsw_reg_sfgc_type type,
3503 enum mlxsw_reg_sfgc_bridge_type bridge_type)
3504{
3505 enum mlxsw_flood_table_type table_type;
3506 enum mlxsw_sp_flood_table flood_table;
3507 char sfgc_pl[MLXSW_REG_SFGC_LEN];
3508
Ido Schimmel19ae6122015-12-15 16:03:39 +01003509 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003510 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003511 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003512 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003513
Nogah Frankel71c365b2017-02-09 14:54:46 +01003514 switch (type) {
3515 case MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST:
Ido Schimmel19ae6122015-12-15 16:03:39 +01003516 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
Nogah Frankel71c365b2017-02-09 14:54:46 +01003517 break;
3518 case MLXSW_REG_SFGC_TYPE_UNREGISTERED_MULTICAST_IPV4:
Nogah Frankel71c365b2017-02-09 14:54:46 +01003519 flood_table = MLXSW_SP_FLOOD_TABLE_MC;
3520 break;
3521 default:
3522 flood_table = MLXSW_SP_FLOOD_TABLE_BC;
3523 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003524
3525 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
3526 flood_table);
3527 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
3528}
3529
3530static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
3531{
3532 int type, err;
3533
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003534 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
3535 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
3536 continue;
3537
3538 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3539 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
3540 if (err)
3541 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003542
3543 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3544 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
3545 if (err)
3546 return err;
3547 }
3548
3549 return 0;
3550}
3551
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003552static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
3553{
3554 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003555 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003556
3557 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
3558 MLXSW_REG_SLCR_LAG_HASH_DMAC |
3559 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
3560 MLXSW_REG_SLCR_LAG_HASH_VLANID |
3561 MLXSW_REG_SLCR_LAG_HASH_SIP |
3562 MLXSW_REG_SLCR_LAG_HASH_DIP |
3563 MLXSW_REG_SLCR_LAG_HASH_SPORT |
3564 MLXSW_REG_SLCR_LAG_HASH_DPORT |
3565 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003566 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3567 if (err)
3568 return err;
3569
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003570 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3571 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003572 return -EIO;
3573
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003574 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003575 sizeof(struct mlxsw_sp_upper),
3576 GFP_KERNEL);
3577 if (!mlxsw_sp->lags)
3578 return -ENOMEM;
3579
3580 return 0;
3581}
3582
3583static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3584{
3585 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003586}
3587
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003588static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3589{
3590 char htgt_pl[MLXSW_REG_HTGT_LEN];
3591
Nogah Frankel579c82e2016-11-25 10:33:42 +01003592 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3593 MLXSW_REG_HTGT_INVALID_POLICER,
3594 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3595 MLXSW_REG_HTGT_DEFAULT_TC);
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003596 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3597}
3598
Jiri Pirko202d6f42017-04-18 16:55:33 +02003599static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create);
3600
3601static int mlxsw_sp_dummy_fid_init(struct mlxsw_sp *mlxsw_sp)
3602{
3603 return mlxsw_sp_vfid_op(mlxsw_sp, MLXSW_SP_DUMMY_FID, true);
3604}
3605
3606static void mlxsw_sp_dummy_fid_fini(struct mlxsw_sp *mlxsw_sp)
3607{
3608 mlxsw_sp_vfid_op(mlxsw_sp, MLXSW_SP_DUMMY_FID, false);
3609}
3610
Jiri Pirkob2f10572016-04-08 19:11:23 +02003611static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003612 const struct mlxsw_bus_info *mlxsw_bus_info)
3613{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003614 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003615 int err;
3616
3617 mlxsw_sp->core = mlxsw_core;
3618 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02003619 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003620 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003621
Yotam Gigi6b742192017-05-23 21:56:29 +02003622 err = mlxsw_sp_fw_rev_validate(mlxsw_sp);
3623 if (err) {
3624 dev_err(mlxsw_sp->bus_info->dev, "Could not upgrade firmware\n");
3625 return err;
3626 }
3627
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003628 err = mlxsw_sp_base_mac_get(mlxsw_sp);
3629 if (err) {
3630 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3631 return err;
3632 }
3633
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003634 err = mlxsw_sp_traps_init(mlxsw_sp);
3635 if (err) {
Nogah Frankel45449132016-11-25 10:33:35 +01003636 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3637 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003638 }
3639
3640 err = mlxsw_sp_flood_init(mlxsw_sp);
3641 if (err) {
3642 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
3643 goto err_flood_init;
3644 }
3645
3646 err = mlxsw_sp_buffers_init(mlxsw_sp);
3647 if (err) {
3648 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3649 goto err_buffers_init;
3650 }
3651
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003652 err = mlxsw_sp_lag_init(mlxsw_sp);
3653 if (err) {
3654 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3655 goto err_lag_init;
3656 }
3657
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003658 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3659 if (err) {
3660 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3661 goto err_switchdev_init;
3662 }
3663
Ido Schimmel464dce12016-07-02 11:00:15 +02003664 err = mlxsw_sp_router_init(mlxsw_sp);
3665 if (err) {
3666 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3667 goto err_router_init;
3668 }
3669
Yotam Gigi763b4b72016-07-21 12:03:17 +02003670 err = mlxsw_sp_span_init(mlxsw_sp);
3671 if (err) {
3672 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3673 goto err_span_init;
3674 }
3675
Jiri Pirko22a67762017-02-03 10:29:07 +01003676 err = mlxsw_sp_acl_init(mlxsw_sp);
3677 if (err) {
3678 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL\n");
3679 goto err_acl_init;
3680 }
3681
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +01003682 err = mlxsw_sp_counter_pool_init(mlxsw_sp);
3683 if (err) {
3684 dev_err(mlxsw_sp->bus_info->dev, "Failed to init counter pool\n");
3685 goto err_counter_pool_init;
3686 }
3687
Arkadi Sharshevsky230ead02017-03-28 17:24:12 +02003688 err = mlxsw_sp_dpipe_init(mlxsw_sp);
3689 if (err) {
3690 dev_err(mlxsw_sp->bus_info->dev, "Failed to init pipeline debug\n");
3691 goto err_dpipe_init;
3692 }
3693
Jiri Pirko202d6f42017-04-18 16:55:33 +02003694 err = mlxsw_sp_dummy_fid_init(mlxsw_sp);
3695 if (err) {
3696 dev_err(mlxsw_sp->bus_info->dev, "Failed to init dummy FID\n");
3697 goto err_dummy_fid_init;
3698 }
3699
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003700 err = mlxsw_sp_ports_create(mlxsw_sp);
3701 if (err) {
3702 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3703 goto err_ports_create;
3704 }
3705
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003706 return 0;
3707
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003708err_ports_create:
Jiri Pirko202d6f42017-04-18 16:55:33 +02003709 mlxsw_sp_dummy_fid_fini(mlxsw_sp);
3710err_dummy_fid_init:
Arkadi Sharshevsky230ead02017-03-28 17:24:12 +02003711 mlxsw_sp_dpipe_fini(mlxsw_sp);
3712err_dpipe_init:
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +01003713 mlxsw_sp_counter_pool_fini(mlxsw_sp);
3714err_counter_pool_init:
Jiri Pirko22a67762017-02-03 10:29:07 +01003715 mlxsw_sp_acl_fini(mlxsw_sp);
3716err_acl_init:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003717 mlxsw_sp_span_fini(mlxsw_sp);
3718err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003719 mlxsw_sp_router_fini(mlxsw_sp);
3720err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003721 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003722err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003723 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003724err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003725 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003726err_buffers_init:
3727err_flood_init:
3728 mlxsw_sp_traps_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003729 return err;
3730}
3731
Jiri Pirkob2f10572016-04-08 19:11:23 +02003732static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003733{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003734 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003735
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003736 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko202d6f42017-04-18 16:55:33 +02003737 mlxsw_sp_dummy_fid_fini(mlxsw_sp);
Arkadi Sharshevsky230ead02017-03-28 17:24:12 +02003738 mlxsw_sp_dpipe_fini(mlxsw_sp);
Arkadi Sharshevskyff7b0d22017-03-11 09:42:51 +01003739 mlxsw_sp_counter_pool_fini(mlxsw_sp);
Jiri Pirko22a67762017-02-03 10:29:07 +01003740 mlxsw_sp_acl_fini(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003741 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003742 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003743 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003744 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003745 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003746 mlxsw_sp_traps_fini(mlxsw_sp);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003747 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003748 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003749}
3750
3751static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3752 .used_max_vepa_channels = 1,
3753 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003754 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003755 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003756 .used_max_pgt = 1,
3757 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003758 .used_flood_tables = 1,
3759 .used_flood_mode = 1,
3760 .flood_mode = 3,
Nogah Frankel71c365b2017-02-09 14:54:46 +01003761 .max_fid_offset_flood_tables = 3,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003762 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Nogah Frankel71c365b2017-02-09 14:54:46 +01003763 .max_fid_flood_tables = 3,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003764 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003765 .used_max_ib_mc = 1,
3766 .max_ib_mc = 0,
3767 .used_max_pkey = 1,
3768 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003769 .used_kvd_split_data = 1,
3770 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3771 .kvd_hash_single_parts = 2,
3772 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003773 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003774 .swid_config = {
3775 {
3776 .used_type = 1,
3777 .type = MLXSW_PORT_SWID_TYPE_ETH,
3778 }
3779 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003780 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003781};
3782
3783static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003784 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003785 .priv_size = sizeof(struct mlxsw_sp),
3786 .init = mlxsw_sp_init,
3787 .fini = mlxsw_sp_fini,
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003788 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003789 .port_split = mlxsw_sp_port_split,
3790 .port_unsplit = mlxsw_sp_port_unsplit,
3791 .sb_pool_get = mlxsw_sp_sb_pool_get,
3792 .sb_pool_set = mlxsw_sp_sb_pool_set,
3793 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3794 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3795 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3796 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3797 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3798 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3799 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3800 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3801 .txhdr_construct = mlxsw_sp_txhdr_construct,
3802 .txhdr_len = MLXSW_TXHDR_LEN,
3803 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003804};
3805
Jiri Pirko22a67762017-02-03 10:29:07 +01003806bool mlxsw_sp_port_dev_check(const struct net_device *dev)
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003807{
3808 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3809}
3810
Jiri Pirko1182e532017-03-06 21:25:20 +01003811static int mlxsw_sp_lower_dev_walk(struct net_device *lower_dev, void *data)
David Aherndd823642016-10-17 19:15:49 -07003812{
Jiri Pirko1182e532017-03-06 21:25:20 +01003813 struct mlxsw_sp_port **p_mlxsw_sp_port = data;
David Aherndd823642016-10-17 19:15:49 -07003814 int ret = 0;
3815
3816 if (mlxsw_sp_port_dev_check(lower_dev)) {
Jiri Pirko1182e532017-03-06 21:25:20 +01003817 *p_mlxsw_sp_port = netdev_priv(lower_dev);
David Aherndd823642016-10-17 19:15:49 -07003818 ret = 1;
3819 }
3820
3821 return ret;
3822}
3823
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003824static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3825{
Jiri Pirko1182e532017-03-06 21:25:20 +01003826 struct mlxsw_sp_port *mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003827
3828 if (mlxsw_sp_port_dev_check(dev))
3829 return netdev_priv(dev);
3830
Jiri Pirko1182e532017-03-06 21:25:20 +01003831 mlxsw_sp_port = NULL;
3832 netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &mlxsw_sp_port);
David Aherndd823642016-10-17 19:15:49 -07003833
Jiri Pirko1182e532017-03-06 21:25:20 +01003834 return mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003835}
3836
Ido Schimmel4724ba562017-03-10 08:53:39 +01003837struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003838{
3839 struct mlxsw_sp_port *mlxsw_sp_port;
3840
3841 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3842 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3843}
3844
3845static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3846{
Jiri Pirko1182e532017-03-06 21:25:20 +01003847 struct mlxsw_sp_port *mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003848
3849 if (mlxsw_sp_port_dev_check(dev))
3850 return netdev_priv(dev);
3851
Jiri Pirko1182e532017-03-06 21:25:20 +01003852 mlxsw_sp_port = NULL;
3853 netdev_walk_all_lower_dev_rcu(dev, mlxsw_sp_lower_dev_walk,
3854 &mlxsw_sp_port);
David Aherndd823642016-10-17 19:15:49 -07003855
Jiri Pirko1182e532017-03-06 21:25:20 +01003856 return mlxsw_sp_port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003857}
3858
3859struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3860{
3861 struct mlxsw_sp_port *mlxsw_sp_port;
3862
3863 rcu_read_lock();
3864 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3865 if (mlxsw_sp_port)
3866 dev_hold(mlxsw_sp_port->dev);
3867 rcu_read_unlock();
3868 return mlxsw_sp_port;
3869}
3870
3871void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3872{
3873 dev_put(mlxsw_sp_port->dev);
3874}
3875
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003876static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3877 u16 fid)
3878{
3879 if (mlxsw_sp_fid_is_vfid(fid))
3880 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3881 else
3882 return test_bit(fid, lag_port->active_vlans);
3883}
3884
3885static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3886 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003887{
3888 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003889 u8 local_port = mlxsw_sp_port->local_port;
3890 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003891 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003892 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003893
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003894 if (!mlxsw_sp_port->lagged)
3895 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003896
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003897 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3898 MAX_LAG_MEMBERS);
3899 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003900 struct mlxsw_sp_port *lag_port;
3901
3902 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3903 if (!lag_port || lag_port->local_port == local_port)
3904 continue;
3905 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3906 count++;
3907 }
3908
3909 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003910}
3911
3912static int
3913mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3914 u16 fid)
3915{
3916 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3917 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3918
3919 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3920 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3921 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3922 mlxsw_sp_port->local_port);
3923
Ido Schimmel22305372016-06-20 23:04:21 +02003924 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3925 mlxsw_sp_port->local_port, fid);
3926
Ido Schimmel039c49a2016-01-27 15:20:18 +01003927 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3928}
3929
3930static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003931mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3932 u16 fid)
3933{
3934 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3935 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3936
3937 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3938 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3939 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3940
Ido Schimmel22305372016-06-20 23:04:21 +02003941 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3942 mlxsw_sp_port->lag_id, fid);
3943
Ido Schimmel039c49a2016-01-27 15:20:18 +01003944 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3945}
3946
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003947int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003948{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003949 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3950 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003951
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003952 if (mlxsw_sp_port->lagged)
3953 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003954 fid);
3955 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003956 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003957}
3958
Ido Schimmel701b1862016-07-04 08:23:16 +02003959static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3960{
3961 struct mlxsw_sp_fid *f, *tmp;
3962
3963 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3964 if (--f->ref_count == 0)
3965 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3966 else
3967 WARN_ON_ONCE(1);
3968}
3969
Ido Schimmel7117a572016-06-20 23:04:06 +02003970static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3971 struct net_device *br_dev)
3972{
Ido Schimmel5f6935c2017-05-16 19:38:26 +02003973 struct mlxsw_sp_upper *master_bridge = mlxsw_sp_master_bridge(mlxsw_sp);
3974
3975 return !master_bridge->dev || master_bridge->dev == br_dev;
Ido Schimmel7117a572016-06-20 23:04:06 +02003976}
3977
3978static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3979 struct net_device *br_dev)
3980{
Ido Schimmel5f6935c2017-05-16 19:38:26 +02003981 struct mlxsw_sp_upper *master_bridge = mlxsw_sp_master_bridge(mlxsw_sp);
3982
3983 master_bridge->dev = br_dev;
3984 master_bridge->ref_count++;
Ido Schimmel7117a572016-06-20 23:04:06 +02003985}
3986
3987static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3988{
Ido Schimmel5f6935c2017-05-16 19:38:26 +02003989 struct mlxsw_sp_upper *master_bridge = mlxsw_sp_master_bridge(mlxsw_sp);
3990
3991 if (--master_bridge->ref_count == 0) {
3992 master_bridge->dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003993 /* It's possible upper VLAN devices are still holding
3994 * references to underlying FIDs. Drop the reference
3995 * and release the resources if it was the last one.
3996 * If it wasn't, then something bad happened.
3997 */
3998 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3999 }
Ido Schimmel7117a572016-06-20 23:04:06 +02004000}
4001
4002static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
4003 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004004{
4005 struct net_device *dev = mlxsw_sp_port->dev;
4006 int err;
4007
4008 /* When port is not bridged untagged packets are tagged with
4009 * PVID=VID=1, thereby creating an implicit VLAN interface in
4010 * the device. Remove it and let bridge code take care of its
4011 * own VLANs.
4012 */
4013 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004014 if (err)
4015 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004016
Ido Schimmel7117a572016-06-20 23:04:06 +02004017 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
4018
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004019 mlxsw_sp_port->learning = 1;
4020 mlxsw_sp_port->learning_sync = 1;
4021 mlxsw_sp_port->uc_flood = 1;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004022 mlxsw_sp_port->mc_flood = 1;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01004023 mlxsw_sp_port->mc_router = 0;
4024 mlxsw_sp_port->mc_disabled = 1;
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004025 mlxsw_sp_port->bridged = 1;
4026
4027 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004028}
4029
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004030static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004031{
4032 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01004033
Ido Schimmel28a01d22016-02-18 11:30:02 +01004034 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
4035
Ido Schimmel7117a572016-06-20 23:04:06 +02004036 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
4037
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004038 mlxsw_sp_port->learning = 0;
4039 mlxsw_sp_port->learning_sync = 0;
4040 mlxsw_sp_port->uc_flood = 0;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004041 mlxsw_sp_port->mc_flood = 0;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01004042 mlxsw_sp_port->mc_router = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01004043 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004044
4045 /* Add implicit VLAN interface in the device, so that untagged
4046 * packets will be classified to the default vFID.
4047 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02004048 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004049}
4050
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004051static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004052{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004053 char sldr_pl[MLXSW_REG_SLDR_LEN];
4054
4055 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
4056 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4057}
4058
4059static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
4060{
4061 char sldr_pl[MLXSW_REG_SLDR_LEN];
4062
4063 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
4064 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4065}
4066
4067static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4068 u16 lag_id, u8 port_index)
4069{
4070 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4071 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4072
4073 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
4074 lag_id, port_index);
4075 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4076}
4077
4078static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4079 u16 lag_id)
4080{
4081 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4082 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4083
4084 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
4085 lag_id);
4086 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4087}
4088
4089static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
4090 u16 lag_id)
4091{
4092 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4093 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4094
4095 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
4096 lag_id);
4097 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4098}
4099
4100static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
4101 u16 lag_id)
4102{
4103 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4104 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4105
4106 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
4107 lag_id);
4108 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4109}
4110
4111static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4112 struct net_device *lag_dev,
4113 u16 *p_lag_id)
4114{
4115 struct mlxsw_sp_upper *lag;
4116 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004117 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004118 int i;
4119
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004120 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
4121 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004122 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
4123 if (lag->ref_count) {
4124 if (lag->dev == lag_dev) {
4125 *p_lag_id = i;
4126 return 0;
4127 }
4128 } else if (free_lag_id < 0) {
4129 free_lag_id = i;
4130 }
4131 }
4132 if (free_lag_id < 0)
4133 return -EBUSY;
4134 *p_lag_id = free_lag_id;
4135 return 0;
4136}
4137
4138static bool
4139mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
4140 struct net_device *lag_dev,
4141 struct netdev_lag_upper_info *lag_upper_info)
4142{
4143 u16 lag_id;
4144
4145 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
4146 return false;
4147 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
4148 return false;
4149 return true;
4150}
4151
4152static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4153 u16 lag_id, u8 *p_port_index)
4154{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004155 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004156 int i;
4157
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004158 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
4159 MAX_LAG_MEMBERS);
4160 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004161 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
4162 *p_port_index = i;
4163 return 0;
4164 }
4165 }
4166 return -EBUSY;
4167}
4168
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004169static void
4170mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel186962e2017-03-10 08:53:36 +01004171 struct net_device *lag_dev, u16 lag_id)
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004172{
4173 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004174 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004175
4176 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4177 if (WARN_ON(!mlxsw_sp_vport))
4178 return;
4179
Ido Schimmel11943ff2016-07-02 11:00:12 +02004180 /* If vPort is assigned a RIF, then leave it since it's no
4181 * longer valid.
4182 */
4183 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4184 if (f)
4185 f->leave(mlxsw_sp_vport);
4186
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004187 mlxsw_sp_vport->lag_id = lag_id;
4188 mlxsw_sp_vport->lagged = 1;
Ido Schimmel186962e2017-03-10 08:53:36 +01004189 mlxsw_sp_vport->dev = lag_dev;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004190}
4191
4192static void
4193mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4194{
4195 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004196 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004197
4198 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4199 if (WARN_ON(!mlxsw_sp_vport))
4200 return;
4201
Ido Schimmel11943ff2016-07-02 11:00:12 +02004202 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4203 if (f)
4204 f->leave(mlxsw_sp_vport);
4205
Ido Schimmel186962e2017-03-10 08:53:36 +01004206 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004207 mlxsw_sp_vport->lagged = 0;
4208}
4209
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004210static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4211 struct net_device *lag_dev)
4212{
4213 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4214 struct mlxsw_sp_upper *lag;
4215 u16 lag_id;
4216 u8 port_index;
4217 int err;
4218
4219 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4220 if (err)
4221 return err;
4222 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4223 if (!lag->ref_count) {
4224 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4225 if (err)
4226 return err;
4227 lag->dev = lag_dev;
4228 }
4229
4230 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4231 if (err)
4232 return err;
4233 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4234 if (err)
4235 goto err_col_port_add;
4236 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4237 if (err)
4238 goto err_col_port_enable;
4239
4240 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4241 mlxsw_sp_port->local_port);
4242 mlxsw_sp_port->lag_id = lag_id;
4243 mlxsw_sp_port->lagged = 1;
4244 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004245
Ido Schimmel186962e2017-03-10 08:53:36 +01004246 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_dev, lag_id);
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004247
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004248 return 0;
4249
Ido Schimmel51554db2016-05-06 22:18:39 +02004250err_col_port_enable:
4251 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004252err_col_port_add:
4253 if (!lag->ref_count)
4254 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004255 return err;
4256}
4257
Ido Schimmel82e6db02016-06-20 23:04:04 +02004258static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4259 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004260{
4261 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004262 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004263 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004264
4265 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004266 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004267 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4268 WARN_ON(lag->ref_count == 0);
4269
Ido Schimmel82e6db02016-06-20 23:04:04 +02004270 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4271 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004272
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004273 if (mlxsw_sp_port->bridged) {
4274 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004275 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004276 }
4277
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004278 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004279 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004280
4281 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4282 mlxsw_sp_port->local_port);
4283 mlxsw_sp_port->lagged = 0;
4284 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004285
4286 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004287}
4288
Jiri Pirko74581202015-12-03 12:12:30 +01004289static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4290 u16 lag_id)
4291{
4292 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4293 char sldr_pl[MLXSW_REG_SLDR_LEN];
4294
4295 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4296 mlxsw_sp_port->local_port);
4297 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4298}
4299
4300static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4301 u16 lag_id)
4302{
4303 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4304 char sldr_pl[MLXSW_REG_SLDR_LEN];
4305
4306 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4307 mlxsw_sp_port->local_port);
4308 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4309}
4310
4311static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4312 bool lag_tx_enabled)
4313{
4314 if (lag_tx_enabled)
4315 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4316 mlxsw_sp_port->lag_id);
4317 else
4318 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4319 mlxsw_sp_port->lag_id);
4320}
4321
4322static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4323 struct netdev_lag_lower_state_info *info)
4324{
4325 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4326}
4327
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004328static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4329 struct net_device *vlan_dev)
4330{
4331 struct mlxsw_sp_port *mlxsw_sp_vport;
4332 u16 vid = vlan_dev_vlan_id(vlan_dev);
4333
4334 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004335 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004336 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004337
4338 mlxsw_sp_vport->dev = vlan_dev;
4339
4340 return 0;
4341}
4342
Ido Schimmel82e6db02016-06-20 23:04:04 +02004343static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4344 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004345{
4346 struct mlxsw_sp_port *mlxsw_sp_vport;
4347 u16 vid = vlan_dev_vlan_id(vlan_dev);
4348
4349 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004350 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004351 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004352
4353 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004354}
4355
Jiri Pirko2b94e582017-04-18 16:55:37 +02004356static int mlxsw_sp_port_stp_set(struct mlxsw_sp_port *mlxsw_sp_port,
4357 bool enable)
4358{
4359 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4360 enum mlxsw_reg_spms_state spms_state;
4361 char *spms_pl;
4362 u16 vid;
4363 int err;
4364
4365 spms_state = enable ? MLXSW_REG_SPMS_STATE_FORWARDING :
4366 MLXSW_REG_SPMS_STATE_DISCARDING;
4367
4368 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
4369 if (!spms_pl)
4370 return -ENOMEM;
4371 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
4372
4373 for (vid = 0; vid < VLAN_N_VID; vid++)
4374 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
4375
4376 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
4377 kfree(spms_pl);
4378 return err;
4379}
4380
4381static int mlxsw_sp_port_ovs_join(struct mlxsw_sp_port *mlxsw_sp_port)
4382{
4383 int err;
4384
4385 err = mlxsw_sp_port_stp_set(mlxsw_sp_port, true);
4386 if (err)
4387 return err;
4388 err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, 2, VLAN_N_VID - 1,
4389 true, false);
4390 if (err)
4391 goto err_port_vlan_set;
4392 return 0;
4393
4394err_port_vlan_set:
4395 mlxsw_sp_port_stp_set(mlxsw_sp_port, false);
4396 return err;
4397}
4398
4399static void mlxsw_sp_port_ovs_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4400{
4401 mlxsw_sp_port_vlan_set(mlxsw_sp_port, 2, VLAN_N_VID - 1,
4402 false, false);
4403 mlxsw_sp_port_stp_set(mlxsw_sp_port, false);
4404}
4405
Jiri Pirko74581202015-12-03 12:12:30 +01004406static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4407 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004408{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004409 struct netdev_notifier_changeupper_info *info;
4410 struct mlxsw_sp_port *mlxsw_sp_port;
4411 struct net_device *upper_dev;
4412 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004413 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004414
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004415 mlxsw_sp_port = netdev_priv(dev);
4416 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4417 info = ptr;
4418
4419 switch (event) {
4420 case NETDEV_PRECHANGEUPPER:
4421 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004422 if (!is_vlan_dev(upper_dev) &&
4423 !netif_is_lag_master(upper_dev) &&
Ido Schimmel7179eb52017-03-16 09:08:18 +01004424 !netif_is_bridge_master(upper_dev) &&
Jiri Pirko2b94e582017-04-18 16:55:37 +02004425 !netif_is_ovs_master(upper_dev))
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004426 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004427 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004428 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004429 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004430 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004431 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004432 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004433 if (netif_is_lag_master(upper_dev) &&
4434 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4435 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004436 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004437 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4438 return -EINVAL;
4439 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4440 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4441 return -EINVAL;
Jiri Pirko2b94e582017-04-18 16:55:37 +02004442 if (netif_is_ovs_master(upper_dev) && vlan_uses_dev(dev))
4443 return -EINVAL;
4444 if (netif_is_ovs_port(dev) && is_vlan_dev(upper_dev))
4445 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004446 break;
4447 case NETDEV_CHANGEUPPER:
4448 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004449 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004450 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004451 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4452 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004453 else
Jiri Pirkob51df792017-04-18 16:55:31 +02004454 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4455 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004456 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004457 if (info->linking)
4458 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4459 upper_dev);
4460 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004461 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004462 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004463 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004464 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4465 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004466 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004467 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4468 upper_dev);
Jiri Pirko2b94e582017-04-18 16:55:37 +02004469 } else if (netif_is_ovs_master(upper_dev)) {
4470 if (info->linking)
4471 err = mlxsw_sp_port_ovs_join(mlxsw_sp_port);
4472 else
4473 mlxsw_sp_port_ovs_leave(mlxsw_sp_port);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004474 } else {
4475 err = -EINVAL;
4476 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004477 }
4478 break;
4479 }
4480
Ido Schimmel80bedf12016-06-20 23:03:59 +02004481 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004482}
4483
Jiri Pirko74581202015-12-03 12:12:30 +01004484static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4485 unsigned long event, void *ptr)
4486{
4487 struct netdev_notifier_changelowerstate_info *info;
4488 struct mlxsw_sp_port *mlxsw_sp_port;
4489 int err;
4490
4491 mlxsw_sp_port = netdev_priv(dev);
4492 info = ptr;
4493
4494 switch (event) {
4495 case NETDEV_CHANGELOWERSTATE:
4496 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4497 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4498 info->lower_state_info);
4499 if (err)
4500 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4501 }
4502 break;
4503 }
4504
Ido Schimmel80bedf12016-06-20 23:03:59 +02004505 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004506}
4507
4508static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4509 unsigned long event, void *ptr)
4510{
4511 switch (event) {
4512 case NETDEV_PRECHANGEUPPER:
4513 case NETDEV_CHANGEUPPER:
4514 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4515 case NETDEV_CHANGELOWERSTATE:
4516 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4517 }
4518
Ido Schimmel80bedf12016-06-20 23:03:59 +02004519 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004520}
4521
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004522static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4523 unsigned long event, void *ptr)
4524{
4525 struct net_device *dev;
4526 struct list_head *iter;
4527 int ret;
4528
4529 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4530 if (mlxsw_sp_port_dev_check(dev)) {
4531 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004532 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004533 return ret;
4534 }
4535 }
4536
Ido Schimmel80bedf12016-06-20 23:03:59 +02004537 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004538}
4539
Ido Schimmel701b1862016-07-04 08:23:16 +02004540static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4541 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004542{
Ido Schimmel701b1862016-07-04 08:23:16 +02004543 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004544 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004545
Ido Schimmel701b1862016-07-04 08:23:16 +02004546 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4547 if (!f) {
4548 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4549 if (IS_ERR(f))
4550 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004551 }
4552
Ido Schimmel701b1862016-07-04 08:23:16 +02004553 f->ref_count++;
4554
4555 return 0;
4556}
4557
4558static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4559 struct net_device *vlan_dev)
4560{
4561 u16 fid = vlan_dev_vlan_id(vlan_dev);
4562 struct mlxsw_sp_fid *f;
4563
4564 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Arkadi Sharshevskybf952332017-03-17 09:38:00 +01004565 if (f && f->rif)
4566 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->rif);
Ido Schimmel701b1862016-07-04 08:23:16 +02004567 if (f && --f->ref_count == 0)
4568 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4569}
4570
4571static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4572 unsigned long event, void *ptr)
4573{
4574 struct netdev_notifier_changeupper_info *info;
4575 struct net_device *upper_dev;
4576 struct mlxsw_sp *mlxsw_sp;
Ido Schimmelb4149702017-03-10 08:53:34 +01004577 int err = 0;
Ido Schimmel701b1862016-07-04 08:23:16 +02004578
4579 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4580 if (!mlxsw_sp)
4581 return 0;
Ido Schimmel701b1862016-07-04 08:23:16 +02004582
4583 info = ptr;
4584
4585 switch (event) {
Ido Schimmelb4149702017-03-10 08:53:34 +01004586 case NETDEV_PRECHANGEUPPER:
Ido Schimmel701b1862016-07-04 08:23:16 +02004587 upper_dev = info->upper_dev;
Ido Schimmelb1e45522017-04-30 19:47:14 +03004588 if (!is_vlan_dev(upper_dev))
Ido Schimmelb4149702017-03-10 08:53:34 +01004589 return -EINVAL;
4590 if (is_vlan_dev(upper_dev) &&
Ido Schimmel5f6935c2017-05-16 19:38:26 +02004591 br_dev != mlxsw_sp_master_bridge(mlxsw_sp)->dev)
Ido Schimmelb4149702017-03-10 08:53:34 +01004592 return -EINVAL;
4593 break;
4594 case NETDEV_CHANGEUPPER:
4595 upper_dev = info->upper_dev;
4596 if (is_vlan_dev(upper_dev)) {
4597 if (info->linking)
4598 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4599 upper_dev);
4600 else
4601 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp,
4602 upper_dev);
Ido Schimmel701b1862016-07-04 08:23:16 +02004603 } else {
Ido Schimmelb4149702017-03-10 08:53:34 +01004604 err = -EINVAL;
4605 WARN_ON(1);
Ido Schimmel701b1862016-07-04 08:23:16 +02004606 }
4607 break;
4608 }
4609
Ido Schimmelb4149702017-03-10 08:53:34 +01004610 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004611}
4612
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004613static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004614{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004615 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004616 MLXSW_SP_VFID_MAX);
4617}
4618
4619static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4620{
4621 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4622
4623 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004625}
4626
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004627static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004628
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004629static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4630 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004631{
4632 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004633 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004634 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004635 int err;
4636
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004637 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004638 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004639 dev_err(dev, "No available vFIDs\n");
4640 return ERR_PTR(-ERANGE);
4641 }
4642
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004643 fid = mlxsw_sp_vfid_to_fid(vfid);
4644 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004645 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004646 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004647 return ERR_PTR(err);
4648 }
4649
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004650 f = kzalloc(sizeof(*f), GFP_KERNEL);
4651 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004652 goto err_allocate_vfid;
4653
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004654 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004655 f->fid = fid;
4656 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004657
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004658 list_add(&f->list, &mlxsw_sp->vfids.list);
4659 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004660
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004661 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004662
4663err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004664 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004665 return ERR_PTR(-ENOMEM);
4666}
4667
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004668static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4669 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004670{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004671 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004672 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004673
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004674 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004675 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004676
Arkadi Sharshevskybf952332017-03-17 09:38:00 +01004677 if (f->rif)
4678 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->rif);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004679
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004680 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004681
4682 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004683}
4684
Ido Schimmel99724c12016-07-04 08:23:14 +02004685static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4686 bool valid)
4687{
4688 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4689 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4690
4691 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4692 vid);
4693}
4694
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004695static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4696 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004697{
Ido Schimmel0355b592016-06-20 23:04:13 +02004698 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004699 int err;
4700
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004701 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004702 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004703 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004704 if (IS_ERR(f))
4705 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004706 }
4707
Ido Schimmel0355b592016-06-20 23:04:13 +02004708 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4709 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004710 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004711
Ido Schimmel0355b592016-06-20 23:04:13 +02004712 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4713 if (err)
4714 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004715
Ido Schimmel41b996c2016-06-20 23:04:17 +02004716 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004717 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004718
Ido Schimmel22305372016-06-20 23:04:21 +02004719 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4720
Ido Schimmel0355b592016-06-20 23:04:13 +02004721 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004722
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004723err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004724 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4725err_vport_flood_set:
4726 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004727 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004728 return err;
4729}
4730
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004731static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004732{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004733 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004734
Ido Schimmel22305372016-06-20 23:04:21 +02004735 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4736
Ido Schimmel0355b592016-06-20 23:04:13 +02004737 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4738
4739 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4740
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004741 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4742
Ido Schimmel41b996c2016-06-20 23:04:17 +02004743 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004744 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004745 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004746}
4747
4748static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4749 struct net_device *br_dev)
4750{
Ido Schimmel99724c12016-07-04 08:23:14 +02004751 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004752 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4753 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004754 int err;
4755
Ido Schimmel99724c12016-07-04 08:23:14 +02004756 if (f && !WARN_ON(!f->leave))
4757 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004758
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004759 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004760 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004761 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004762 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004763 }
4764
4765 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4766 if (err) {
4767 netdev_err(dev, "Failed to enable learning\n");
4768 goto err_port_vid_learning_set;
4769 }
4770
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004771 mlxsw_sp_vport->learning = 1;
4772 mlxsw_sp_vport->learning_sync = 1;
4773 mlxsw_sp_vport->uc_flood = 1;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004774 mlxsw_sp_vport->mc_flood = 1;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01004775 mlxsw_sp_vport->mc_router = 0;
4776 mlxsw_sp_vport->mc_disabled = 1;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004777 mlxsw_sp_vport->bridged = 1;
4778
4779 return 0;
4780
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004781err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004782 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004783 return err;
4784}
4785
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004786static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004787{
4788 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004789
4790 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4791
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004792 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004793
Ido Schimmel0355b592016-06-20 23:04:13 +02004794 mlxsw_sp_vport->learning = 0;
4795 mlxsw_sp_vport->learning_sync = 0;
4796 mlxsw_sp_vport->uc_flood = 0;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004797 mlxsw_sp_vport->mc_flood = 0;
Nogah Frankel8ecd4592017-02-09 14:54:47 +01004798 mlxsw_sp_vport->mc_router = 0;
Ido Schimmel0355b592016-06-20 23:04:13 +02004799 mlxsw_sp_vport->bridged = 0;
4800}
4801
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004802static bool
4803mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4804 const struct net_device *br_dev)
4805{
4806 struct mlxsw_sp_port *mlxsw_sp_vport;
4807
4808 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4809 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004810 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004811
4812 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004813 return false;
4814 }
4815
4816 return true;
4817}
4818
4819static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4820 unsigned long event, void *ptr,
4821 u16 vid)
4822{
4823 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4824 struct netdev_notifier_changeupper_info *info = ptr;
4825 struct mlxsw_sp_port *mlxsw_sp_vport;
4826 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004827 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004828
4829 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel1f880612017-03-10 08:53:35 +01004830 if (!mlxsw_sp_vport)
4831 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004832
4833 switch (event) {
4834 case NETDEV_PRECHANGEUPPER:
4835 upper_dev = info->upper_dev;
Ido Schimmelb1e45522017-04-30 19:47:14 +03004836 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004837 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004838 if (!info->linking)
4839 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004840 /* We can't have multiple VLAN interfaces configured on
4841 * the same port and being members in the same bridge.
4842 */
Ido Schimmel7179eb52017-03-16 09:08:18 +01004843 if (netif_is_bridge_master(upper_dev) &&
4844 !mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004845 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004846 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004847 break;
4848 case NETDEV_CHANGEUPPER:
4849 upper_dev = info->upper_dev;
Ido Schimmel1f880612017-03-10 08:53:35 +01004850 if (netif_is_bridge_master(upper_dev)) {
4851 if (info->linking)
4852 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4853 upper_dev);
4854 else
4855 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004856 } else {
Ido Schimmel1f880612017-03-10 08:53:35 +01004857 err = -EINVAL;
4858 WARN_ON(1);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004859 }
Ido Schimmel1f880612017-03-10 08:53:35 +01004860 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004861 }
4862
Ido Schimmel80bedf12016-06-20 23:03:59 +02004863 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004864}
4865
Ido Schimmel272c4472015-12-15 16:03:47 +01004866static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4867 unsigned long event, void *ptr,
4868 u16 vid)
4869{
4870 struct net_device *dev;
4871 struct list_head *iter;
4872 int ret;
4873
4874 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4875 if (mlxsw_sp_port_dev_check(dev)) {
4876 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4877 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004878 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004879 return ret;
4880 }
4881 }
4882
Ido Schimmel80bedf12016-06-20 23:03:59 +02004883 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004884}
4885
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004886static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4887 unsigned long event, void *ptr)
4888{
4889 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4890 u16 vid = vlan_dev_vlan_id(vlan_dev);
4891
Ido Schimmel272c4472015-12-15 16:03:47 +01004892 if (mlxsw_sp_port_dev_check(real_dev))
4893 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4894 vid);
4895 else if (netif_is_lag_master(real_dev))
4896 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4897 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004898
Ido Schimmel80bedf12016-06-20 23:03:59 +02004899 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004900}
4901
Ido Schimmelb1e45522017-04-30 19:47:14 +03004902static bool mlxsw_sp_is_vrf_event(unsigned long event, void *ptr)
4903{
4904 struct netdev_notifier_changeupper_info *info = ptr;
4905
4906 if (event != NETDEV_PRECHANGEUPPER && event != NETDEV_CHANGEUPPER)
4907 return false;
4908 return netif_is_l3_master(info->upper_dev);
4909}
4910
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004911static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4912 unsigned long event, void *ptr)
4913{
4914 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004915 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004916
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004917 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4918 err = mlxsw_sp_netdevice_router_port_event(dev);
Ido Schimmelb1e45522017-04-30 19:47:14 +03004919 else if (mlxsw_sp_is_vrf_event(event, ptr))
4920 err = mlxsw_sp_netdevice_vrf_event(dev, event, ptr);
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004921 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004922 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4923 else if (netif_is_lag_master(dev))
4924 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004925 else if (netif_is_bridge_master(dev))
4926 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004927 else if (is_vlan_dev(dev))
4928 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004929
Ido Schimmel80bedf12016-06-20 23:03:59 +02004930 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004931}
4932
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004933static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4934 .notifier_call = mlxsw_sp_netdevice_event,
4935};
4936
Ido Schimmel99724c12016-07-04 08:23:14 +02004937static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4938 .notifier_call = mlxsw_sp_inetaddr_event,
4939 .priority = 10, /* Must be called before FIB notifier block */
4940};
4941
Jiri Pirkoe7322632016-09-01 10:37:43 +02004942static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4943 .notifier_call = mlxsw_sp_router_netevent_event,
4944};
4945
Jiri Pirko1d20d232016-10-27 15:12:59 +02004946static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4947 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4948 {0, },
4949};
4950
4951static struct pci_driver mlxsw_sp_pci_driver = {
4952 .name = mlxsw_sp_driver_name,
4953 .id_table = mlxsw_sp_pci_id_table,
4954};
4955
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004956static int __init mlxsw_sp_module_init(void)
4957{
4958 int err;
4959
4960 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004961 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004962 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4963
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004964 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4965 if (err)
4966 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004967
4968 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4969 if (err)
4970 goto err_pci_driver_register;
4971
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004972 return 0;
4973
Jiri Pirko1d20d232016-10-27 15:12:59 +02004974err_pci_driver_register:
4975 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004976err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004977 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004978 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004979 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4980 return err;
4981}
4982
4983static void __exit mlxsw_sp_module_exit(void)
4984{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004985 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004986 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004987 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004988 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004989 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4990}
4991
4992module_init(mlxsw_sp_module_init);
4993module_exit(mlxsw_sp_module_exit);
4994
4995MODULE_LICENSE("Dual BSD/GPL");
4996MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4997MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004998MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);
Yotam Gigi6b742192017-05-23 21:56:29 +02004999MODULE_FIRMWARE(MLXSW_SP_FW_FILENAME);