blob: 209c8c2d6f8caebcc2a0f6dffa67fe569f35aa01 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700252 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
474 "src/math/expm1minus-scalar-rr2-p5.c",
475 "src/math/expm1minus-scalar-rr2-p6.c",
Frank Barchard22136062020-11-24 18:44:46 -0800476 "src/math/expminus-scalar-rr2-lut64-p2.c",
477 "src/math/expminus-scalar-rr2-lut2048-p1.c",
478 "src/math/expminus-scalar-rr2-p5.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700479 "src/math/roundd-scalar-addsub.c",
480 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
483 "src/math/roundne-scalar-nearbyint.c",
484 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700487 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
489 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700491 "src/math/sigmoid-scalar-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700492 "src/math/sigmoid-scalar-rr2-lut2048-p1-div.c",
Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
495 "src/qs8-dwconv/gen/up1x25-minmax-gemmlowp-scalar.c",
496 "src/qs8-dwconv/gen/up2x9-minmax-gemmlowp-scalar.c",
497 "src/qs8-dwconv/gen/up2x25-minmax-gemmlowp-scalar.c",
498 "src/qs8-dwconv/gen/up4x9-minmax-gemmlowp-scalar.c",
499 "src/qs8-dwconv/gen/up4x25-minmax-gemmlowp-scalar.c",
Marat Dukhan047b6202021-05-11 20:32:25 -0700500 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c1.c",
501 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c2.c",
502 "src/qs8-gavgpool/gen/7p7x-minmax-scalar-c4.c",
503 "src/qs8-gavgpool/gen/7x-minmax-scalar-c1.c",
504 "src/qs8-gavgpool/gen/7x-minmax-scalar-c2.c",
505 "src/qs8-gavgpool/gen/7x-minmax-scalar-c4.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
507 "src/qs8-gemm/gen/1x4-minmax-gemmlowp-scalar.c",
508 "src/qs8-gemm/gen/2x2-minmax-gemmlowp-scalar.c",
509 "src/qs8-gemm/gen/2x4-minmax-gemmlowp-scalar.c",
510 "src/qs8-gemm/gen/3x2-minmax-gemmlowp-scalar.c",
511 "src/qs8-gemm/gen/3x4-minmax-gemmlowp-scalar.c",
512 "src/qs8-gemm/gen/4x2-minmax-gemmlowp-scalar.c",
513 "src/qs8-gemm/gen/4x4-minmax-gemmlowp-scalar.c",
514 "src/qs8-igemm/gen/1x2-minmax-gemmlowp-scalar.c",
515 "src/qs8-igemm/gen/1x4-minmax-gemmlowp-scalar.c",
516 "src/qs8-igemm/gen/2x2-minmax-gemmlowp-scalar.c",
517 "src/qs8-igemm/gen/2x4-minmax-gemmlowp-scalar.c",
518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
519 "src/qs8-igemm/gen/3x4-minmax-gemmlowp-scalar.c",
520 "src/qs8-igemm/gen/4x2-minmax-gemmlowp-scalar.c",
521 "src/qs8-igemm/gen/4x4-minmax-gemmlowp-scalar.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
523 "src/qs8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700524 "src/qs8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
526 "src/qs8-requantization/rndna-scalar-unsigned32.c",
527 "src/qs8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan062bee32021-05-27 20:31:07 -0700528 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700529 "src/qs8-vadd/gen/minmax-scalar-x1.c",
530 "src/qs8-vadd/gen/minmax-scalar-x2.c",
531 "src/qs8-vadd/gen/minmax-scalar-x4.c",
532 "src/qs8-vaddc/gen/minmax-scalar-x1.c",
533 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
534 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700535 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
536 "src/qu8-avgpool/9x-minmax-scalar-c1.c",
537 "src/qu8-dwconv/up1x9-minmax-scalar.c",
538 "src/qu8-gavgpool/7p7x-minmax-scalar-c1.c",
539 "src/qu8-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/qu8-gemm/2x2-minmax-scalar.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700541 "src/qu8-igemm/2x2-minmax-scalar.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700542 "src/qu8-requantization/fp32-scalar-lrintf.c",
543 "src/qu8-requantization/fp32-scalar-magic.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -0700544 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700545 "src/qu8-requantization/rndna-scalar-signed64.c",
546 "src/qu8-requantization/rndna-scalar-unsigned32.c",
547 "src/qu8-requantization/rndna-scalar-unsigned64.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700548 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700549 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700550 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700551 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700553 "src/x8-lut/scalar.c",
554 "src/x8-zip/x2-scalar.c",
555 "src/x8-zip/x3-scalar.c",
556 "src/x8-zip/x4-scalar.c",
557 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800558 "src/x32-depthtospace2d-chw2hwc/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700559 "src/x32-fill/scalar-float.c",
560 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700561 "src/x32-packx/x2-scalar.c",
562 "src/x32-packx/x3-scalar.c",
563 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700564 "src/x32-pad/scalar-float.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700565 "src/x32-pad/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700566 "src/x32-unpool/scalar.c",
567 "src/x32-zip/x2-scalar.c",
568 "src/x32-zip/x3-scalar.c",
569 "src/x32-zip/x4-scalar.c",
570 "src/x32-zip/xm-scalar.c",
Marat Dukhan048931b2020-11-24 20:53:54 -0800571 "src/xx-copy/memcpy.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700572]
573
Marat Dukhan436ebe62019-12-04 15:10:12 -0800574WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700575 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
576 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700577 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
578 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700579 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
580 "src/f32-dwconv/gen/up1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700581 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
582 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700583 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
584 "src/f32-dwconv/gen/up1x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700585 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
586 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700587 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
588 "src/f32-dwconv/gen/up1x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700589 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
590 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700591 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
592 "src/f32-dwconv/gen/up2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700593 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
594 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700595 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
596 "src/f32-dwconv/gen/up2x9-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700597 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
598 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700599 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
600 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700601 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
602 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700603 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
604 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
605 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
606 "src/f32-gemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700607 "src/f32-gemm/gen/1x4-relu-wasm.c",
608 "src/f32-gemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700609 "src/f32-gemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700610 "src/f32-gemm/gen/2x4-relu-wasm.c",
611 "src/f32-gemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700612 "src/f32-gemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700613 "src/f32-gemm/gen/4x2-relu-wasm.c",
614 "src/f32-gemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700615 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700616 "src/f32-gemm/gen/4x4-relu-wasm.c",
617 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700618 "src/f32-igemm/gen/1x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700619 "src/f32-igemm/gen/1x4-relu-wasm.c",
620 "src/f32-igemm/gen/1x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700621 "src/f32-igemm/gen/2x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700622 "src/f32-igemm/gen/2x4-relu-wasm.c",
623 "src/f32-igemm/gen/2x4-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700624 "src/f32-igemm/gen/4x2-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700625 "src/f32-igemm/gen/4x2-relu-wasm.c",
626 "src/f32-igemm/gen/4x2-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700627 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700628 "src/f32-igemm/gen/4x4-relu-wasm.c",
629 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700630 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
631 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
632 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700633 "src/f32-prelu/gen/wasm-2x1.c",
634 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700635 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
636 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
637 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700638 "src/f32-vbinary/gen/vadd-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700639 "src/f32-vbinary/gen/vadd-relu-wasm-x1.c",
640 "src/f32-vbinary/gen/vadd-relu-wasm-x2.c",
641 "src/f32-vbinary/gen/vadd-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700642 "src/f32-vbinary/gen/vadd-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700643 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
644 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
645 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
646 "src/f32-vbinary/gen/vaddc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700647 "src/f32-vbinary/gen/vaddc-relu-wasm-x1.c",
648 "src/f32-vbinary/gen/vaddc-relu-wasm-x2.c",
649 "src/f32-vbinary/gen/vaddc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700650 "src/f32-vbinary/gen/vaddc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700651 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
652 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
653 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
654 "src/f32-vbinary/gen/vdiv-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700655 "src/f32-vbinary/gen/vdiv-relu-wasm-x1.c",
656 "src/f32-vbinary/gen/vdiv-relu-wasm-x2.c",
657 "src/f32-vbinary/gen/vdiv-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700658 "src/f32-vbinary/gen/vdiv-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700659 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
660 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
661 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
662 "src/f32-vbinary/gen/vdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700663 "src/f32-vbinary/gen/vdivc-relu-wasm-x1.c",
664 "src/f32-vbinary/gen/vdivc-relu-wasm-x2.c",
665 "src/f32-vbinary/gen/vdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700666 "src/f32-vbinary/gen/vdivc-relu-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800667 "src/f32-vbinary/gen/vmax-wasm-x1.c",
668 "src/f32-vbinary/gen/vmax-wasm-x2.c",
669 "src/f32-vbinary/gen/vmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700670 "src/f32-vbinary/gen/vmax-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800671 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
672 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
673 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700674 "src/f32-vbinary/gen/vmaxc-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800675 "src/f32-vbinary/gen/vmin-wasm-x1.c",
676 "src/f32-vbinary/gen/vmin-wasm-x2.c",
677 "src/f32-vbinary/gen/vmin-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700678 "src/f32-vbinary/gen/vmin-wasm-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800679 "src/f32-vbinary/gen/vminc-wasm-x1.c",
680 "src/f32-vbinary/gen/vminc-wasm-x2.c",
681 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700682 "src/f32-vbinary/gen/vminc-wasm-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700683 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
684 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
685 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700686 "src/f32-vbinary/gen/vmul-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700687 "src/f32-vbinary/gen/vmul-relu-wasm-x1.c",
688 "src/f32-vbinary/gen/vmul-relu-wasm-x2.c",
689 "src/f32-vbinary/gen/vmul-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700690 "src/f32-vbinary/gen/vmul-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700691 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
692 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
693 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
694 "src/f32-vbinary/gen/vmulc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700695 "src/f32-vbinary/gen/vmulc-relu-wasm-x1.c",
696 "src/f32-vbinary/gen/vmulc-relu-wasm-x2.c",
697 "src/f32-vbinary/gen/vmulc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700698 "src/f32-vbinary/gen/vmulc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700699 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
700 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
701 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
702 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700703 "src/f32-vbinary/gen/vrdivc-relu-wasm-x1.c",
704 "src/f32-vbinary/gen/vrdivc-relu-wasm-x2.c",
705 "src/f32-vbinary/gen/vrdivc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700706 "src/f32-vbinary/gen/vrdivc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700707 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
708 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
709 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
710 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700711 "src/f32-vbinary/gen/vrsubc-relu-wasm-x1.c",
712 "src/f32-vbinary/gen/vrsubc-relu-wasm-x2.c",
713 "src/f32-vbinary/gen/vrsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700714 "src/f32-vbinary/gen/vrsubc-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700715 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
716 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
717 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
718 "src/f32-vbinary/gen/vsub-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700719 "src/f32-vbinary/gen/vsub-relu-wasm-x1.c",
720 "src/f32-vbinary/gen/vsub-relu-wasm-x2.c",
721 "src/f32-vbinary/gen/vsub-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700722 "src/f32-vbinary/gen/vsub-relu-wasm-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700723 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
724 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
725 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
726 "src/f32-vbinary/gen/vsubc-minmax-wasm-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700727 "src/f32-vbinary/gen/vsubc-relu-wasm-x1.c",
728 "src/f32-vbinary/gen/vsubc-relu-wasm-x2.c",
729 "src/f32-vbinary/gen/vsubc-relu-wasm-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700730 "src/f32-vbinary/gen/vsubc-relu-wasm-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700731 "src/f32-vclamp/gen/vclamp-wasm-x1.c",
732 "src/f32-vclamp/gen/vclamp-wasm-x2.c",
733 "src/f32-vclamp/gen/vclamp-wasm-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800734 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x1.c",
735 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x2.c",
736 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x3.c",
737 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x4.c",
738 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x5.c",
739 "src/f32-velu/gen/velu-wasm-rr2-lut16-p3-x6.c",
740 "src/f32-velu/gen/velu-wasm-rr2-p6-x1.c",
741 "src/f32-velu/gen/velu-wasm-rr2-p6-x2.c",
742 "src/f32-velu/gen/velu-wasm-rr2-p6-x3.c",
743 "src/f32-velu/gen/velu-wasm-rr2-p6-x4.c",
744 "src/f32-velu/gen/velu-wasm-rr2-p6-x5.c",
745 "src/f32-velu/gen/velu-wasm-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700746 "src/f32-vhswish/gen/vhswish-wasm-x1.c",
747 "src/f32-vhswish/gen/vhswish-wasm-x2.c",
748 "src/f32-vhswish/gen/vhswish-wasm-x4.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -0700749 "src/f32-vlrelu/gen/vlrelu-wasm-x1.c",
750 "src/f32-vlrelu/gen/vlrelu-wasm-x2.c",
751 "src/f32-vlrelu/gen/vlrelu-wasm-x4.c",
Frank Barchardd4416d62021-05-17 15:51:37 -0700752 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
753 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
754 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700755 "src/f32-vrelu/gen/vrelu-wasm-x1.c",
756 "src/f32-vrelu/gen/vrelu-wasm-x2.c",
757 "src/f32-vrelu/gen/vrelu-wasm-x4.c",
758 "src/f32-vrelu/gen/vrelu-wasm-x8.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800759]
760
Marat Dukhan290055c2020-06-09 12:24:29 -0700761WASMSIMD_UKERNELS = [
Marat Dukhan40f05522020-07-16 22:33:12 -0700762 "src/f32-argmaxpool/4x-wasmsimd-c4.c",
763 "src/f32-argmaxpool/9p8x-wasmsimd-c4.c",
764 "src/f32-argmaxpool/9x-wasmsimd-c4.c",
Marat Dukhan3b7432d2020-07-16 17:46:32 -0700765 "src/f32-avgpool/9p8x-minmax-wasmsimd-arm-c4.c",
766 "src/f32-avgpool/9p8x-minmax-wasmsimd-x86-c4.c",
767 "src/f32-avgpool/9x-minmax-wasmsimd-arm-c4.c",
768 "src/f32-avgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard22136062020-11-24 18:44:46 -0800769 "src/f32-conv-hwc2chw/3x3s2p1c3x4-wasmsimd-2x2.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800770 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700771 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800772 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700773 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700774 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800775 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700776 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800777 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700778 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700779 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800780 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700781 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800782 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700783 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
784 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800785 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700786 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800787 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700788 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700789 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800790 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700791 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800792 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86-acc2.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700793 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700794 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800795 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700796 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800797 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700798 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
799 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800800 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
801 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
802 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
803 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
804 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
805 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
806 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
807 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
808 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-5x4.c",
809 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800810 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
811 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
812 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
813 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-1x4.c",
814 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
815 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-2x4.c",
816 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-3x4.c",
817 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-4x4.c",
818 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-5x4.c",
819 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-arm-splat-6x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800820 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
821 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
822 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
823 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
824 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
825 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
826 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
827 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
828 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-5x4.c",
829 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-loadsplat-6x4.c",
Frank Barchard02bb4292020-12-15 18:25:32 -0800830 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
831 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
832 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
833 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-1x4.c",
834 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
835 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-2x4.c",
836 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-3x4.c",
837 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-4x4.c",
838 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-5x4.c",
839 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-wasmsimd-x86-splat-6x4.c",
Frank Barchardc5704bf2020-12-21 23:09:00 -0800840 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
841 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
842 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
843 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-1x4.c",
844 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
845 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-2x4.c",
846 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-3x4.c",
847 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800848 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc2.c",
849 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc3.c",
850 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4-acc4.c",
851 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-1x4.c",
852 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4-acc2.c",
853 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-2x4.c",
854 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-3x4.c",
855 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-arm-splat-4x4.c",
Frank Barchardcadd4222021-01-20 16:27:25 -0800856 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
857 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
858 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
859 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-1x4.c",
860 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
861 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-2x4.c",
862 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-3x4.c",
863 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-loadsplat-4x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800864 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc2.c",
865 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc3.c",
866 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4-acc4.c",
867 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-1x4.c",
868 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4-acc2.c",
869 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-2x4.c",
870 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-3x4.c",
871 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-wasmsimd-x86-splat-4x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -0800872 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
873 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
874 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
875 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
876 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
877 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
878 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
879 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
880 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
881 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
882 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4-acc2.c",
883 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-4x4.c",
884 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800885 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
886 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
887 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
888 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
889 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-1x4.c",
890 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
891 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
892 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-2x4.c",
893 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
894 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-3x4.c",
895 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4-acc2.c",
896 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-4x4.c",
897 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-arm-splat-5x4.c",
Frank Barchardb20dcd62020-12-15 16:46:14 -0800898 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
899 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
900 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
901 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
902 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
903 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
904 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
905 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
906 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
907 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
908 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4-acc2.c",
909 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-4x4.c",
910 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-loadsplat-5x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800911 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
912 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
913 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
914 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
915 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-1x4.c",
916 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
917 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
918 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-2x4.c",
919 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
920 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-3x4.c",
921 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4-acc2.c",
922 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-4x4.c",
923 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-wasmsimd-x86-splat-5x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -0800924 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c",
925 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c",
926 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c",
927 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c",
928 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-1x4.c",
929 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc2.c",
930 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4-acc3.c",
931 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-2x4.c",
932 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4-acc2.c",
933 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800934 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc2.c",
935 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc3.c",
936 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc4.c",
937 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4-acc5.c",
938 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-1x4.c",
939 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc2.c",
940 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4-acc3.c",
941 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-2x4.c",
942 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4-acc2.c",
943 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-arm-splat-3x4.c",
Frank Barchardc6889b32020-12-21 11:27:22 -0800944 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c",
945 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c",
946 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c",
947 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4-acc5.c",
948 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-1x4.c",
949 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc2.c",
950 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4-acc3.c",
951 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-2x4.c",
952 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4-acc2.c",
953 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-loadsplat-3x4.c",
Frank Barchard412e2f42020-12-11 11:40:50 -0800954 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc2.c",
955 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc3.c",
956 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc4.c",
957 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4-acc5.c",
958 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-1x4.c",
959 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc2.c",
960 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4-acc3.c",
961 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-2x4.c",
962 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4-acc2.c",
963 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-wasmsimd-x86-splat-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700964 "src/f32-gavgpool-cw/wasmsimd-arm-x4.c",
965 "src/f32-gavgpool-cw/wasmsimd-x86-x4.c",
Marat Dukhanc6016802020-07-16 18:51:28 -0700966 "src/f32-gavgpool/7p7x-minmax-wasmsimd-arm-c4.c",
967 "src/f32-gavgpool/7p7x-minmax-wasmsimd-x86-c4.c",
968 "src/f32-gavgpool/7x-minmax-wasmsimd-arm-c4.c",
969 "src/f32-gavgpool/7x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800970 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-loadsplat.c",
971 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-arm-splat.c",
972 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-loadsplat.c",
973 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700974 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
975 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800976 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-loadsplat.c",
977 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-arm-splat.c",
978 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-loadsplat.c",
979 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700980 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
981 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800982 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-loadsplat.c",
983 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-arm-splat.c",
984 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-loadsplat.c",
985 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700986 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
987 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800988 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-loadsplat.c",
989 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-arm-splat.c",
990 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-loadsplat.c",
991 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700992 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
993 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -0800994 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-loadsplat.c",
995 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-arm-splat.c",
996 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-loadsplat.c",
997 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700998 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
999 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001000 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1001 "src/f32-gemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1002 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1003 "src/f32-gemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001004 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat.c",
1005 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
1006 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1007 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001008 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1009 "src/f32-gemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1010 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1011 "src/f32-gemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001012 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1013 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1014 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1015 "src/f32-gemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1016 "src/f32-gemm/gen/4x2c4-relu-wasmsimd.c",
1017 "src/f32-gemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001018 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1019 "src/f32-gemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1020 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1021 "src/f32-gemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001022 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat.c",
1023 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
1024 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1025 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001026 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1027 "src/f32-gemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1028 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1029 "src/f32-gemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001030 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat.c",
1031 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
1032 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1033 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001034 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1035 "src/f32-gemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1036 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1037 "src/f32-gemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001038 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1039 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
XNNPACK Team965272b2020-10-23 21:10:15 -07001040 "src/f32-ibilinear-chw/gen/wasmsimd-p4.c",
1041 "src/f32-ibilinear-chw/gen/wasmsimd-p8.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001042 "src/f32-ibilinear/gen/wasmsimd-c4.c",
1043 "src/f32-ibilinear/gen/wasmsimd-c8.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001044 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-loadsplat.c",
1045 "src/f32-igemm/gen/1x8-minmax-wasmsimd-arm-splat.c",
1046 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-loadsplat.c",
1047 "src/f32-igemm/gen/1x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001048 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat.c",
1049 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
1050 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
1051 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001052 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-loadsplat.c",
1053 "src/f32-igemm/gen/3x8-minmax-wasmsimd-arm-splat.c",
1054 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-loadsplat.c",
1055 "src/f32-igemm/gen/3x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001056 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
1057 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
1058 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-arm.c",
1059 "src/f32-igemm/gen/4x2c4-minmax-wasmsimd-x86.c",
1060 "src/f32-igemm/gen/4x2c4-relu-wasmsimd.c",
1061 "src/f32-igemm/gen/4x2c4-wasmsimd.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001062 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-loadsplat.c",
1063 "src/f32-igemm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1064 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-loadsplat.c",
1065 "src/f32-igemm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001066 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat.c",
1067 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
1068 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
1069 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001070 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-loadsplat.c",
1071 "src/f32-igemm/gen/5x8-minmax-wasmsimd-arm-splat.c",
1072 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-loadsplat.c",
1073 "src/f32-igemm/gen/5x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001074 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat.c",
1075 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
1076 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
1077 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001078 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-loadsplat.c",
1079 "src/f32-igemm/gen/6x8-minmax-wasmsimd-arm-splat.c",
1080 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-loadsplat.c",
1081 "src/f32-igemm/gen/6x8-minmax-wasmsimd-x86-splat.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001082 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
1083 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhanf6e24802020-07-08 22:20:40 -07001084 "src/f32-maxpool/9p8x-minmax-wasmsimd-arm-c4.c",
1085 "src/f32-maxpool/9p8x-minmax-wasmsimd-x86-c4.c",
Marat Dukhan1483c532020-07-16 18:08:19 -07001086 "src/f32-pavgpool/9p8x-minmax-wasmsimd-arm-c4.c",
1087 "src/f32-pavgpool/9p8x-minmax-wasmsimd-x86-c4.c",
1088 "src/f32-pavgpool/9x-minmax-wasmsimd-arm-c4.c",
1089 "src/f32-pavgpool/9x-minmax-wasmsimd-x86-c4.c",
Frank Barchard0725b8d2020-12-07 11:07:35 -08001090 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-arm-splat.c",
1091 "src/f32-ppmm/gen/4x8-minmax-wasmsimd-x86-splat.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001092 "src/f32-prelu/gen/wasmsimd-bitselect-1x4.c",
1093 "src/f32-prelu/gen/wasmsimd-bitselect-1x8.c",
1094 "src/f32-prelu/gen/wasmsimd-bitselect-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001095 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
1096 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001097 "src/f32-prelu/gen/wasmsimd-bitselect-2x16.c",
1098 "src/f32-prelu/gen/wasmsimd-bitselect-4x4.c",
1099 "src/f32-prelu/gen/wasmsimd-bitselect-4x8.c",
1100 "src/f32-prelu/gen/wasmsimd-bitselect-4x16.c",
1101 "src/f32-prelu/gen/wasmsimd-minmax-1x4.c",
1102 "src/f32-prelu/gen/wasmsimd-minmax-1x8.c",
1103 "src/f32-prelu/gen/wasmsimd-minmax-1x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -07001104 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
1105 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001106 "src/f32-prelu/gen/wasmsimd-minmax-2x16.c",
1107 "src/f32-prelu/gen/wasmsimd-minmax-4x4.c",
1108 "src/f32-prelu/gen/wasmsimd-minmax-4x8.c",
1109 "src/f32-prelu/gen/wasmsimd-minmax-4x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001110 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x4.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001111 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001112 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x8.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001113 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc2.c",
1114 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001115 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x12.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001116 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc2.c",
1117 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001118 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x16.c",
Marat Dukhan52238f02020-07-16 15:30:28 -07001119 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc2.c",
1120 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001121 "src/f32-raddstoreexpminusmax/gen/wasmsimd-p5-x20.c",
Marat Dukhan8c417962020-07-08 12:27:50 -07001122 "src/f32-rmax/wasmsimd-arm.c",
1123 "src/f32-rmax/wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001124 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined-x2.c",
1125 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001126 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x2.c",
1127 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001128 "src/f32-spmm/gen/4x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001129 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined-x2.c",
1130 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001131 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x2.c",
1132 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001133 "src/f32-spmm/gen/4x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001134 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined-x2.c",
1135 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001136 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x2.c",
1137 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001138 "src/f32-spmm/gen/8x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001139 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined-x2.c",
1140 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001141 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x2.c",
1142 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001143 "src/f32-spmm/gen/8x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001144 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined-x2.c",
1145 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001146 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x2.c",
1147 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001148 "src/f32-spmm/gen/16x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001149 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined-x2.c",
1150 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001151 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x2.c",
1152 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001153 "src/f32-spmm/gen/16x1-minmax-wasmsimd-x86.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001154 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined-x2.c",
1155 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001156 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x2.c",
1157 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001158 "src/f32-spmm/gen/32x1-minmax-wasmsimd-arm.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08001159 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined-x2.c",
1160 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-pipelined.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001161 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x2.c",
1162 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86-x4.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07001163 "src/f32-spmm/gen/32x1-minmax-wasmsimd-x86.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001164 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
1165 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001166 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001167 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
1168 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001169 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001170 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x4.c",
1171 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001172 "src/f32-vbinary/gen/vadd-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001173 "src/f32-vbinary/gen/vadd-wasmsimd-x4.c",
1174 "src/f32-vbinary/gen/vadd-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001175 "src/f32-vbinary/gen/vadd-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001176 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x4.c",
1177 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001178 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001179 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x4.c",
1180 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001181 "src/f32-vbinary/gen/vaddc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001182 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x4.c",
1183 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001184 "src/f32-vbinary/gen/vaddc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001185 "src/f32-vbinary/gen/vaddc-wasmsimd-x4.c",
1186 "src/f32-vbinary/gen/vaddc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001187 "src/f32-vbinary/gen/vaddc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001188 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
1189 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001190 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001191 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
1192 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001193 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001194 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x4.c",
1195 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001196 "src/f32-vbinary/gen/vdiv-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001197 "src/f32-vbinary/gen/vdiv-wasmsimd-x4.c",
1198 "src/f32-vbinary/gen/vdiv-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001199 "src/f32-vbinary/gen/vdiv-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001200 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x4.c",
1201 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001202 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001203 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x4.c",
1204 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001205 "src/f32-vbinary/gen/vdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001206 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x4.c",
1207 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001208 "src/f32-vbinary/gen/vdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001209 "src/f32-vbinary/gen/vdivc-wasmsimd-x4.c",
1210 "src/f32-vbinary/gen/vdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001211 "src/f32-vbinary/gen/vdivc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001212 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
1213 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001214 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001215 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
1216 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001217 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001218 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x4.c",
1219 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001220 "src/f32-vbinary/gen/vmaxc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001221 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x4.c",
1222 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001223 "src/f32-vbinary/gen/vmaxc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001224 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
1225 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001226 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001227 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
1228 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001229 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001230 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x4.c",
1231 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001232 "src/f32-vbinary/gen/vminc-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001233 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x4.c",
1234 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001235 "src/f32-vbinary/gen/vminc-wasmsimd-x86-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001236 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
1237 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001238 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001239 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
1240 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001241 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001242 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x4.c",
1243 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001244 "src/f32-vbinary/gen/vmul-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001245 "src/f32-vbinary/gen/vmul-wasmsimd-x4.c",
1246 "src/f32-vbinary/gen/vmul-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001247 "src/f32-vbinary/gen/vmul-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001248 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x4.c",
1249 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001250 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001251 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x4.c",
1252 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001253 "src/f32-vbinary/gen/vmulc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001254 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x4.c",
1255 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001256 "src/f32-vbinary/gen/vmulc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001257 "src/f32-vbinary/gen/vmulc-wasmsimd-x4.c",
1258 "src/f32-vbinary/gen/vmulc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001259 "src/f32-vbinary/gen/vmulc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001260 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x4.c",
1261 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001262 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001263 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x4.c",
1264 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001265 "src/f32-vbinary/gen/vrdivc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001266 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x4.c",
1267 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001268 "src/f32-vbinary/gen/vrdivc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001269 "src/f32-vbinary/gen/vrdivc-wasmsimd-x4.c",
1270 "src/f32-vbinary/gen/vrdivc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001271 "src/f32-vbinary/gen/vrdivc-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001272 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x4.c",
1273 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001274 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001275 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x4.c",
1276 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001277 "src/f32-vbinary/gen/vrsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001278 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x4.c",
1279 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001280 "src/f32-vbinary/gen/vrsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001281 "src/f32-vbinary/gen/vrsubc-wasmsimd-x4.c",
1282 "src/f32-vbinary/gen/vrsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001283 "src/f32-vbinary/gen/vrsubc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001284 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
1285 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001286 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001287 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x4.c",
1288 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001289 "src/f32-vbinary/gen/vsqrdiffc-wasmsimd-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001290 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
1291 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001292 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x16.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -07001293 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
1294 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001295 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001296 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x4.c",
1297 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001298 "src/f32-vbinary/gen/vsub-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001299 "src/f32-vbinary/gen/vsub-wasmsimd-x4.c",
1300 "src/f32-vbinary/gen/vsub-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001301 "src/f32-vbinary/gen/vsub-wasmsimd-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001302 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x4.c",
1303 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001304 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-arm-x16.c",
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07001305 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x4.c",
1306 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001307 "src/f32-vbinary/gen/vsubc-minmax-wasmsimd-x86-x16.c",
Frank Barchard674778d2020-08-08 10:17:25 -07001308 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x4.c",
1309 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001310 "src/f32-vbinary/gen/vsubc-relu-wasmsimd-x16.c",
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07001311 "src/f32-vbinary/gen/vsubc-wasmsimd-x4.c",
1312 "src/f32-vbinary/gen/vsubc-wasmsimd-x8.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -07001313 "src/f32-vbinary/gen/vsubc-wasmsimd-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001314 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
1315 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x8.c",
1316 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x4.c",
1317 "src/f32-vclamp/gen/vclamp-wasmsimd-x86-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001318 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
1319 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x8.c",
1320 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x12.c",
1321 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x16.c",
1322 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x20.c",
1323 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001324 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x4.c",
1325 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x8.c",
1326 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x12.c",
1327 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x16.c",
1328 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x20.c",
1329 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-p6-x24.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08001330 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x4.c",
1331 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x8.c",
1332 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x12.c",
1333 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x16.c",
1334 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x20.c",
1335 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-lut16-p3-x24.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001336 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x4.c",
1337 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x8.c",
1338 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x12.c",
1339 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x16.c",
1340 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x20.c",
1341 "src/f32-velu/gen/velu-wasmsimd-x86-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001342 "src/f32-vhswish/gen/vhswish-wasmsimd-x4.c",
1343 "src/f32-vhswish/gen/vhswish-wasmsimd-x8.c",
1344 "src/f32-vhswish/gen/vhswish-wasmsimd-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001345 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
1346 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x8.c",
1347 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x4.c",
1348 "src/f32-vlrelu/gen/vlrelu-wasmsimd-minmax-x8.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001349 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001350 "src/f32-vmulcaddc/gen/c4-minmax-wasmsimd-x86-2x.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001351 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-arm-2x.c",
Marat Dukhand816f622020-07-15 10:14:39 -07001352 "src/f32-vmulcaddc/gen/c8-minmax-wasmsimd-x86-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001353 "src/f32-vrelu/gen/vrelu-wasmsimd-x4.c",
1354 "src/f32-vrelu/gen/vrelu-wasmsimd-x8.c",
1355 "src/f32-vrelu/gen/vrelu-wasmsimd-x16.c",
Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001356 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
1357 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x8.c",
1358 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x4.c",
1359 "src/f32-vrnd/gen/vrndd-wasmsimd-cvt-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001360 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x4.c",
1361 "src/f32-vrnd/gen/vrndne-wasmsimd-addsub-x8.c",
1362 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x4.c",
1363 "src/f32-vrnd/gen/vrndu-wasmsimd-addsub-x8.c",
1364 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x4.c",
1365 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
1366 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x4.c",
1367 "src/f32-vrnd/gen/vrndz-wasmsimd-addsub-x8.c",
1368 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x4.c",
1369 "src/f32-vrnd/gen/vrndz-wasmsimd-cvt-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001370 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
1371 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x8.c",
1372 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
1373 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x16.c",
1374 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x20.c",
1375 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
1376 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x4.c",
1377 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x8.c",
1378 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
1379 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x16.c",
1380 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
1381 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07001382 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
1383 "src/f32-vsqrt/gen/wasmsimd-sqrt-x8.c",
Marat Dukhan37c83512020-06-29 13:25:53 -07001384 "src/f32-vunary/gen/vabs-wasmsimd-x4.c",
1385 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1386 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
1387 "src/f32-vunary/gen/vneg-wasmsimd-x8.c",
1388 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1389 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001390 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1391 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1393 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001394 "src/math/roundd-wasmsimd-addsub.c",
1395 "src/math/roundd-wasmsimd-cvt.c",
1396 "src/math/roundne-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-addsub.c",
1398 "src/math/roundu-wasmsimd-cvt.c",
1399 "src/math/roundz-wasmsimd-addsub.c",
1400 "src/math/roundz-wasmsimd-cvt.c",
1401 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1402 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001403 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
1404 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-wasmsimd-mul16.c",
1405 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
1406 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-wasmsimd-mul16.c",
1407 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
1408 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-wasmsimd-mul16.c",
Marat Dukhanb5e3d172020-08-06 13:29:53 -07001409 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
1410 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c16-acc2.c",
1411 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001412 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c8-acc2.c",
1413 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c16-acc2.c",
1414 "src/qs8-gavgpool/gen/7x-minmax-wasmsimd-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001415 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1416 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1417 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-wasmsimd.c",
1418 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1419 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1420 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-wasmsimd.c",
1421 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1422 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1423 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
1424 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1425 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1426 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1427 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
1428 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1429 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001430 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001431 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001432 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1433 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
1434 "src/qs8-vadd/gen/minmax-wasmsimd-x24.c",
1435 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
1436 "src/qs8-vaddc/gen/minmax-wasmsimd-x8.c",
1437 "src/qs8-vaddc/gen/minmax-wasmsimd-x16.c",
1438 "src/qs8-vaddc/gen/minmax-wasmsimd-x24.c",
1439 "src/qs8-vaddc/gen/minmax-wasmsimd-x32.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001440 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001441 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001442 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001443 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001444 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001445 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001446 "src/x32-zip/x2-wasmsimd.c",
1447 "src/x32-zip/x3-wasmsimd.c",
1448 "src/x32-zip/x4-wasmsimd.c",
1449 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001450]
1451
Marat Dukhan08c4a432019-10-03 09:29:21 -07001452# ISA-specific micro-kernels
1453NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001454 "src/f32-argmaxpool/4x-neon-c4.c",
1455 "src/f32-argmaxpool/9p8x-neon-c4.c",
1456 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001457 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1458 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001462 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001466 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001467 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001469 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001471 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001473 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1475 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1477 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001479 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1489 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1497 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1510 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001520 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001521 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001522 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1523 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1526 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1530 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1531 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1532 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1536 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001537 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1538 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001539 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1540 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1541 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1542 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1546 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1547 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1548 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1552 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1553 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1554 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001555 "src/f32-ibilinear-chw/gen/neon-p4.c",
1556 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001557 "src/f32-ibilinear/gen/neon-c4.c",
1558 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001560 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001562 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1563 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001565 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1567 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1568 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1570 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1572 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001573 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1574 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001575 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1577 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001578 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1579 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001580 "src/f32-prelu/gen/neon-1x4.c",
1581 "src/f32-prelu/gen/neon-1x8.c",
1582 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001583 "src/f32-prelu/gen/neon-2x4.c",
1584 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001585 "src/f32-prelu/gen/neon-2x16.c",
1586 "src/f32-prelu/gen/neon-4x4.c",
1587 "src/f32-prelu/gen/neon-4x8.c",
1588 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001600 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1612 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001613 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001614 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1616 "src/f32-spmm/gen/4x1-minmax-neon.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1619 "src/f32-spmm/gen/8x1-minmax-neon.c",
1620 "src/f32-spmm/gen/12x1-minmax-neon.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1623 "src/f32-spmm/gen/16x1-minmax-neon.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1626 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001627 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1628 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1630 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001631 "src/f32-vbinary/gen/vmax-neon-x4.c",
1632 "src/f32-vbinary/gen/vmax-neon-x8.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1634 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1635 "src/f32-vbinary/gen/vmin-neon-x4.c",
1636 "src/f32-vbinary/gen/vmin-neon-x8.c",
1637 "src/f32-vbinary/gen/vminc-neon-x4.c",
1638 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001639 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1640 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1642 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1644 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001645 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1646 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1648 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001649 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1650 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1652 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001653 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1654 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1660 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1666 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001667 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1669 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001670 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1671 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001672 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1673 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001674 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1675 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001676 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1677 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1679 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1681 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1683 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1701 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001702 "src/f32-vunary/gen/vabs-neon-x4.c",
1703 "src/f32-vunary/gen/vabs-neon-x8.c",
1704 "src/f32-vunary/gen/vneg-neon-x4.c",
1705 "src/f32-vunary/gen/vneg-neon-x8.c",
1706 "src/f32-vunary/gen/vsqr-neon-x4.c",
1707 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001708 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1709 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/math/roundd-neon-addsub.c",
1711 "src/math/roundd-neon-cvt.c",
1712 "src/math/roundne-neon-addsub.c",
1713 "src/math/roundu-neon-addsub.c",
1714 "src/math/roundu-neon-cvt.c",
1715 "src/math/roundz-neon-addsub.c",
1716 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001717 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1719 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1720 "src/math/sqrt-neon-nr1rsqrts.c",
1721 "src/math/sqrt-neon-nr2rsqrts.c",
1722 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001723 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
1724 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
1725 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
1726 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
1727 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
1728 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
1729 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
1730 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001731 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1732 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1733 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1734 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001735 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1736 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1737 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1738 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001739 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1740 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1741 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1742 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1743 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1744 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1745 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1746 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1747 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1748 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1749 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1750 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1751 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1752 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1753 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1754 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1755 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1756 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1757 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1758 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1759 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1760 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1761 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1762 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1763 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1764 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1765 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1766 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1767 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1768 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1769 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1770 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1771 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1772 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1773 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1774 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1775 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1776 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1777 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1778 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1779 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1780 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1781 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1782 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1783 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1784 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1785 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1786 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1787 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1788 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1789 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1790 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1791 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1792 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1793 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1794 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1795 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1796 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1797 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1798 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1799 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1800 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1801 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1802 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1803 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1804 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1805 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1806 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1807 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1808 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1809 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1810 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1811 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1812 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1813 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1814 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1815 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1816 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1817 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1818 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1819 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1820 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1821 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1822 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1823 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1824 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1825 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1826 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1827 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1828 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1829 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1830 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1831 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1832 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1833 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1834 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1835 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1836 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1837 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1838 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1839 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1840 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1841 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1842 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1843 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1844 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1845 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1846 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1847 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1848 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1849 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1850 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1851 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1852 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1853 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1854 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1855 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1856 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1857 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1858 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1859 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1860 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1861 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1862 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1863 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1864 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1865 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1866 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1867 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1868 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1869 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1870 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1871 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1872 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1873 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1874 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001875 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001876 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001877 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07001878 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001879 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1880 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1881 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1882 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1883 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1884 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1885 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1886 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001887 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1888 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1889 "src/qu8-dwconv/up8x9-minmax-neon.c",
1890 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1891 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1892 "src/qu8-gemm/4x8-minmax-neon.c",
1893 "src/qu8-gemm/8x8-minmax-neon.c",
1894 "src/qu8-igemm/4x8-minmax-neon.c",
1895 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001896 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001897 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001898 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001899 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001900 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001901 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001902 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001903 "src/x8-zip/x2-neon.c",
1904 "src/x8-zip/x3-neon.c",
1905 "src/x8-zip/x4-neon.c",
1906 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001907 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001908 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001909 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001910 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001911 "src/x32-zip/x2-neon.c",
1912 "src/x32-zip/x3-neon.c",
1913 "src/x32-zip/x4-neon.c",
1914 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001915]
1916
1917NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001918 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1919 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1920 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1921 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1922 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1923 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1924 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1925 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1926 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1927 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1928 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1929 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1930 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1931 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1932 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1933 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1934 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1935 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1936 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1937 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1938 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1939 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1940 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1941 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1942 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1943 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1944 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1945 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1946 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1947 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001948 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1949 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001950 "src/f32-ibilinear/gen/neonfma-c4.c",
1951 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001952 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001953 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001954 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001955 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1956 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001957 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1958 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001959 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1960 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001961 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1962 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001963 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001964 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001965 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001966 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1967 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001968 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001969 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1970 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001971 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001972 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1973 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001974 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1975 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1976 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1977 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1978 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1979 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1980 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1981 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1982 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1984 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1985 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1986 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08001987 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1988 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
1989 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1990 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1991 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
1992 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1993 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1994 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1995 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
1996 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1997 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
1998 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
1999 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002000 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2001 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2002 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2003 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2004 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2005 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2006 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2007 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2008 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2009 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2010 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2011 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002012 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2013 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002014 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2015 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2016 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2017 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2018 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2019 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2020 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2021 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2022 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2023 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2024 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2025 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2026 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2027 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2028 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2029 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2066 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2067 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002068 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2069 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2070 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2071 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2072 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2073 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2074 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2075 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2076 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2077 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2078 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2079 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2080 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2081 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2082 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2083 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2084 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2085 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2086 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2087 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002088 "src/math/exp-neonfma-rr2-lut64-p2.c",
2089 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002090 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2091 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002092 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2093 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2094 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002095 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2096 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2097 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002098 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2099 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2100 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002101 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2102 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2103 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002104 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2105 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2106 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002107 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2108 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2109 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002110 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2111 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2112 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002113 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002114 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002115 "src/math/sqrt-neonfma-nr2fma.c",
2116 "src/math/sqrt-neonfma-nr2fma1adj.c",
2117 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002118]
2119
2120AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002121 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002122 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002123 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002124 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07002125 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002126 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002127 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002128 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002129 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002130 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
2131 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc3.c",
2132 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002133 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002134 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002135 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
2136 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-3x4.c",
2137 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-4x4.c",
2138 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2139 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002140 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2141 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2142 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002143 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002144 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002145 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2146 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2147 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002148 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
2149 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc3.c",
2150 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc4.c",
2151 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002152 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
2154 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002155 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002156 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002157 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002158 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002159 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4.c",
2160 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002161 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
2162 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc3.c",
2163 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc4.c",
2164 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc5.c",
2165 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4.c",
2166 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc2.c",
2167 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4-acc3.c",
2168 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07002169 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002170 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002171 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2172 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2173 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
2174 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
2175 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
2176 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2177 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2178 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2179 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2180 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2181 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2182 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2183 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2184 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2185 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2186 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2187 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2188 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2189 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2190 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002191 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2192 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002193 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2194 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2196 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002197 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2198 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002199 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2200 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002201 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2202 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2203 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2204 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2205 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2206 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
2209 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x12.c",
2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2223 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2224 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002225 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2226 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002227 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002228 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002229 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002230 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002231 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002232 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002233]
2234
Marat Dukhan8853b822020-05-07 12:19:01 -07002235NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002236 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2237 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002238 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2239 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2240 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2241 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2242 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2243 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002244 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002245 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002246 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002247 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002248]
2249
Marat Dukhan08c4a432019-10-03 09:29:21 -07002250AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchard5a599a62020-06-04 20:12:44 -07002251 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
2252 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
2253 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
2254 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002255 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
2256 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
2257 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
2258 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
2259 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
2260 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
2261 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
2262 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -07002263 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
2264 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002265 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
2266 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
2267 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
2268 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
2269 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
2270 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
2271 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
2272 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
2273 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2274 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2275 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2276 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2277 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2278 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2279 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2280 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002281 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
2282 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
2283 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
2284 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
2285 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
2286 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
2287 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
2288 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Frank Barchardb1966592020-05-12 13:47:06 -07002289 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07002290 "src/f16-prelu/gen/neonfp16arith-2x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002291 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002292 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002293 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002294 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002295 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002296 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002297 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002298 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
2299 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
2300 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
2301 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
2302 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
2303 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
2304 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
2305 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
2306 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
2307 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
2308 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
2309 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
2310 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
2311 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
2312 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
2313 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
2314 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
2315 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
2316 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
2317 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
2318 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
2319 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
2320 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
2321 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
2322 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
2323 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
2324 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
2325 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
2326 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002327 "src/f16-vclamp/gen/vclamp-neonfp16arith-x8.c",
2328 "src/f16-vclamp/gen/vclamp-neonfp16arith-x16.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002329 "src/f16-vhswish/gen/vhswish-neonfp16arith-x8.c",
2330 "src/f16-vhswish/gen/vhswish-neonfp16arith-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002331 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
2332 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
Frank Barchardd4416d62021-05-17 15:51:37 -07002333 "src/f16-vrelu/gen/vrelu-neonfp16arith-x8.c",
2334 "src/f16-vrelu/gen/vrelu-neonfp16arith-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002335]
2336
Benoit Jacoba9644732020-08-13 12:48:55 -07002337NEONDOT_UKERNELS = [
Marat Dukhan18630de2021-06-02 22:20:01 -07002338 "src/qs8-gemm/gen/1x16c4-minmax-fp32-neondot.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002339 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002340 "src/qs8-gemm/gen/1x8c4-minmax-fp32-neondot.c",
2341 "src/qs8-gemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
2342 "src/qs8-gemm/gen/4x16c4-minmax-fp32-neondot.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002343 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002344 "src/qs8-gemm/gen/4x8c4-minmax-fp32-neondot.c",
2345 "src/qs8-gemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
2346 "src/qs8-gemm/gen/6x16c4-minmax-fp32-neondot.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002347 "src/qs8-gemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002348 "src/qs8-gemm/gen/6x8c4-minmax-fp32-neondot.c",
2349 "src/qs8-gemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
2350 "src/qs8-gemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002351 "src/qs8-gemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002352 "src/qs8-gemm/gen/8x8c4-minmax-fp32-neondot.c",
2353 "src/qs8-gemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
2354 "src/qs8-igemm/gen/1x16c4-minmax-fp32-neondot.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002355 "src/qs8-igemm/gen/1x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002356 "src/qs8-igemm/gen/1x8c4-minmax-fp32-neondot.c",
2357 "src/qs8-igemm/gen/1x8c4-minmax-gemmlowp-neondot.c",
2358 "src/qs8-igemm/gen/4x16c4-minmax-fp32-neondot.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002359 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002360 "src/qs8-igemm/gen/4x8c4-minmax-fp32-neondot.c",
2361 "src/qs8-igemm/gen/4x8c4-minmax-gemmlowp-neondot.c",
2362 "src/qs8-igemm/gen/6x16c4-minmax-fp32-neondot.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002363 "src/qs8-igemm/gen/6x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002364 "src/qs8-igemm/gen/6x8c4-minmax-fp32-neondot.c",
2365 "src/qs8-igemm/gen/6x8c4-minmax-gemmlowp-neondot.c",
2366 "src/qs8-igemm/gen/8x16c4-minmax-fp32-neondot.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002367 "src/qs8-igemm/gen/8x16c4-minmax-gemmlowp-neondot.c",
Marat Dukhan18630de2021-06-02 22:20:01 -07002368 "src/qs8-igemm/gen/8x8c4-minmax-fp32-neondot.c",
2369 "src/qs8-igemm/gen/8x8c4-minmax-gemmlowp-neondot.c",
Benoit Jacoba9644732020-08-13 12:48:55 -07002370]
2371
Marat Dukhan08c4a432019-10-03 09:29:21 -07002372SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -07002373 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
2374 "src/f32-avgpool/9x-minmax-sse-c4.c",
Erich Elsenb1233402020-06-08 15:53:15 -07002375 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
2376 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002377 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
2378 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
2379 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
2380 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002381 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
2382 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002383 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
2384 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
2385 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
2386 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002387 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
2388 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002389 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc2.c",
2390 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc3.c",
2391 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4-acc4.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002392 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002393 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4-acc2.c",
Marat Dukhan470078a2020-10-23 22:36:52 -07002394 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-2x4.c",
2395 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-3x4.c",
2396 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-4x4.c",
2397 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-5x4.c",
2398 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-sse-6x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002399 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc2.c",
2400 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc3.c",
2401 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002402 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-1x4.c",
Marat Dukhan0ff97182020-10-25 19:14:03 -07002403 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002404 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-2x4.c",
2405 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-3x4.c",
2406 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-sse-4x4.c",
Marat Dukhand0503892020-10-30 08:22:04 -07002407 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc2.c",
2408 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc3.c",
2409 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc4.c",
2410 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4-acc5.c",
2411 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-1x4.c",
2412 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc2.c",
2413 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4-acc3.c",
2414 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-2x4.c",
2415 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4-acc2.c",
2416 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-3x4.c",
2417 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4-acc2.c",
2418 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-4x4.c",
2419 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-sse-5x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002420 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc2.c",
2421 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc3.c",
2422 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc4.c",
2423 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4-acc5.c",
2424 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-1x4.c",
2425 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc2.c",
2426 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4-acc3.c",
2427 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-2x4.c",
Marat Dukhanccca2142020-10-30 17:32:45 -07002428 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4-acc2.c",
Frank Barchard8ef44cd2020-11-03 12:30:23 -08002429 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-sse-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002430 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002431 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
2432 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002433 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
2434 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
2435 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002436 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-dup.c",
2437 "src/f32-gemm/gen-inc/3x8inc-minmax-sse-load1.c",
2438 "src/f32-gemm/gen-inc/3x8s4inc-minmax-sse.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002439 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
2440 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
2441 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002442 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-dup.c",
2443 "src/f32-gemm/gen-inc/5x8inc-minmax-sse-load1.c",
2444 "src/f32-gemm/gen-inc/5x8s4inc-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002445 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
2446 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
2447 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002448 "src/f32-gemm/gen/3x8-minmax-sse-dup.c",
2449 "src/f32-gemm/gen/3x8-minmax-sse-load1.c",
2450 "src/f32-gemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002451 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
2452 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
2453 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2454 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002455 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2456 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2457 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002458 "src/f32-ibilinear-chw/gen/sse-p4.c",
2459 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002460 "src/f32-ibilinear/gen/sse-c4.c",
2461 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002462 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2463 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2464 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002465 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2466 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2467 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002468 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2469 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2470 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2471 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002472 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2473 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2474 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002475 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2476 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2477 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002478 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002479 "src/f32-prelu/gen/sse-2x4.c",
2480 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002481 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002482 "src/f32-spmm/gen/4x1-minmax-sse.c",
2483 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002484 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002485 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002486 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2487 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2488 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2489 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2490 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2491 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2492 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2493 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002494 "src/f32-vbinary/gen/vmax-sse-x4.c",
2495 "src/f32-vbinary/gen/vmax-sse-x8.c",
2496 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2497 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2498 "src/f32-vbinary/gen/vmin-sse-x4.c",
2499 "src/f32-vbinary/gen/vmin-sse-x8.c",
2500 "src/f32-vbinary/gen/vminc-sse-x4.c",
2501 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002502 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2503 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2504 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2505 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2506 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2507 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2508 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2509 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002510 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2511 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2512 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2513 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002514 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2515 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2516 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2517 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002518 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2519 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002520 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2521 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002522 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2523 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002524 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2525 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002526 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2527 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002528 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2529 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002530 "src/f32-vunary/gen/vabs-sse-x4.c",
2531 "src/f32-vunary/gen/vabs-sse-x8.c",
2532 "src/f32-vunary/gen/vneg-sse-x4.c",
2533 "src/f32-vunary/gen/vneg-sse-x8.c",
2534 "src/f32-vunary/gen/vsqr-sse-x4.c",
2535 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002536 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002537 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002538 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002539 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002540 "src/math/sqrt-sse-hh1mac.c",
2541 "src/math/sqrt-sse-nr1mac.c",
2542 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002543 "src/x32-fill/sse.c",
2544 "src/x32-packx/x4-sse.c",
2545 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002546]
2547
2548SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002549 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002550 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002551 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002552 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2553 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2554 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2555 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2556 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2557 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2558 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2559 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2560 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2561 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2562 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2563 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002564 "src/f32-prelu/gen/sse2-2x4.c",
2565 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002566 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002567 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002568 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002569 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2570 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002571 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002572 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2573 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002574 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002575 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2576 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002577 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002578 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2579 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2580 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2581 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2582 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2583 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2584 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2585 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2586 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2587 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2588 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2589 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002590 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2591 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002592 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2593 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002594 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2595 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2596 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2597 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2598 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2599 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002600 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2601 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2602 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2603 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2604 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2605 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2606 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2607 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2608 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2609 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2610 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2611 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002612 "src/math/exp-sse2-rr2-lut64-p2.c",
2613 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002614 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002615 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002616 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002617 "src/math/roundd-sse2-cvt.c",
2618 "src/math/roundne-sse2-cvt.c",
2619 "src/math/roundu-sse2-cvt.c",
2620 "src/math/roundz-sse2-cvt.c",
2621 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2622 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2623 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2624 "src/math/sigmoid-sse2-rr2-p5-div.c",
2625 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2626 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002627 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2628 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
2629 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2630 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
2631 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2632 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
2633 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
2634 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
2635 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2636 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
2637 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2638 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
2639 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
2640 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
2641 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2642 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
2643 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2644 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
2645 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2646 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
2647 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
2648 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
2649 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2650 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
2651 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2652 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
2653 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
2654 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002655 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002656 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002657 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2658 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2659 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002660 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002661 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2662 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2663 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2664 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2665 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2666 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002667 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2668 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2669 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002670 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2671 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2672 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002673 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2674 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002675 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002676 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002677 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002678 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2679 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002680 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002681 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002682 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002683 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2684 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002685 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002686 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002687 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002688 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
2689 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002690 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002691 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002692 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002693 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2694 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002695 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002696 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002697 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002698 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2699 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002700 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002701 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002702 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002703 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
2704 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002705 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002706 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002707 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002708 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
2709 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002710 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002711 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
2712 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
2713 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002714 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002715 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
2716 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
2717 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002718 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002719 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
2720 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
2721 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002722 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002723 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
2724 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
2725 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002726 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002727 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
2728 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
2729 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002730 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002731 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
2732 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
2733 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002734 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002735 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002736 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002737 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002738 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002739 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2740 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2741 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2742 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002743 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2744 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2745 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2746 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002747 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2748 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002749 "src/qu8-dwconv/up8x9-minmax-sse2.c",
2750 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2751 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
2752 "src/qu8-gemm/2x4c8-minmax-sse2.c",
2753 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002754 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002755 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002756 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002757 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002758 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002759 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002760 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002761 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002762 "src/x8-zip/x2-sse2.c",
2763 "src/x8-zip/x3-sse2.c",
2764 "src/x8-zip/x4-sse2.c",
2765 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002766 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002767 "src/x32-zip/x2-sse2.c",
2768 "src/x32-zip/x3-sse2.c",
2769 "src/x32-zip/x4-sse2.c",
2770 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07002771]
2772
2773SSSE3_UKERNELS = [
Frank Barchard35db7d02020-10-26 13:37:34 -07002774 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc2.c",
2775 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc3.c",
2776 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4-acc4.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002777 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002778 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4-acc2.c",
Marat Dukhan98f2eeb2020-10-23 23:13:41 -07002779 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-2x4.c",
2780 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-3x4.c",
2781 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-4x4.c",
2782 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-5x4.c",
2783 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-ssse3-6x4.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002784 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002785 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002786 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002787 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002788 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002789 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002790 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
2791 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c16-acc2.c",
2792 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002793 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
2794 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c16-acc2.c",
2795 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c24-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002796 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002797 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002798 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002799 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
2800 "src/qs8-gemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002801 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002802 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002803 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002804 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002805 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002806 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002807 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
2808 "src/qs8-gemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002809 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002810 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002811 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002812 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002813 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002814 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002815 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
2816 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002817 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002818 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002819 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002820 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002821 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002822 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002823 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002824 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
2825 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
2826 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002827 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002828 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002829 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002830 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
2831 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
2832 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002833 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002834 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002835 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002836 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
2837 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
2838 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002839 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002840 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002841 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002842 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002843 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002844 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002845 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002846 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002847]
2848
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002849SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08002850 "src/f32-prelu/gen/sse41-2x4.c",
2851 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002852 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
2853 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
2854 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
2855 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
2856 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
2857 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
2858 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
2859 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
2860 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
2861 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
2862 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
2863 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002864 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
2865 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002866 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2867 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002868 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
2869 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
2870 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
2871 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
2872 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2873 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002874 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
2875 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
2876 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
2877 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2878 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2879 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2880 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
2881 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
2882 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2883 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2884 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2885 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002886 "src/math/roundd-sse41.c",
2887 "src/math/roundne-sse41.c",
2888 "src/math/roundu-sse41.c",
2889 "src/math/roundz-sse41.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002890 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2891 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
2892 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
2893 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
2894 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
2895 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
2896 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
2897 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
2898 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
2899 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
2900 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
2901 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
2902 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
2903 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
2904 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2905 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
2906 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
2907 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
2908 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
2909 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
2910 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
2911 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
2912 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
2913 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
2914 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
2915 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
2916 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
2917 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002918 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2919 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002920 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2921 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002922 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2923 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2924 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2925 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2926 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2927 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07002928 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
2929 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002930 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2931 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2932 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2933 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2934 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2935 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2936 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
2937 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
2938 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2939 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2940 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
2941 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002942 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
2943 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
2944 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002945 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
2946 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
2947 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002948 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2949 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002950 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002951 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002952 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002953 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
2954 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002955 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002956 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002957 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002958 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
2959 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002960 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002961 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002962 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002963 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
2964 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002965 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002966 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002967 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002968 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
2969 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002970 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002971 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002972 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002973 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
2974 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002975 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002976 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002977 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002978 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
2979 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002980 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002981 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002982 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002983 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
2984 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002985 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002986 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
2987 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
2988 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002989 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002990 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
2991 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
2992 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002993 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002994 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
2995 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
2996 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002997 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002998 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
2999 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
3000 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003001 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003002 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
3003 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
3004 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003005 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003006 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
3007 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
3008 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003009 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003010 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003011 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003012 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003013 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07003014 "src/qs8-requantization/rndnu-sse4.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003015 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3016 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3017 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3018 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003019 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3020 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3021 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3022 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003023 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3024 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3025 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3026 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003027 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3028 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3029 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3030 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003031 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003032 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003033]
3034
Marat Dukhan08c4a432019-10-03 09:29:21 -07003035AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003036 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3037 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003038 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3039 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003040 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3041 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003042 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3043 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3044 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3045 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3046 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3047 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003048 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003049 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3050 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003051 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003052 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003053 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003054 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003055 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3056 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3057 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3058 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3059 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3060 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3061 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3062 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3063 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3064 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3065 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003066 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003067 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3068 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003069 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003070 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003071 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003072 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003073 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3074 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003075 "src/f32-prelu/gen/avx-2x8.c",
3076 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003077 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003078 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3079 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3080 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3081 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3082 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3083 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3084 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3085 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003086 "src/f32-vbinary/gen/vmax-avx-x8.c",
3087 "src/f32-vbinary/gen/vmax-avx-x16.c",
3088 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3089 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3090 "src/f32-vbinary/gen/vmin-avx-x8.c",
3091 "src/f32-vbinary/gen/vmin-avx-x16.c",
3092 "src/f32-vbinary/gen/vminc-avx-x8.c",
3093 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003094 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3095 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3096 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3097 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3098 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3099 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3100 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3101 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003102 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3103 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3104 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3105 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003106 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3107 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3108 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3109 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003110 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3111 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003112 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3113 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3114 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3115 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3116 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3117 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3118 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3119 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3120 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3121 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3122 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3123 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3124 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3125 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3126 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3127 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3128 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3129 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003130 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3131 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003132 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3133 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003134 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3135 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003136 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3137 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003138 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3139 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3140 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3141 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3142 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3143 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003144 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003145 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3146 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3147 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3148 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3149 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3150 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3151 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3152 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3153 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3154 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3155 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3156 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3157 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3158 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3159 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3160 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3161 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3162 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3163 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3164 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003165 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3166 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003167 "src/f32-vunary/gen/vabs-avx-x8.c",
3168 "src/f32-vunary/gen/vabs-avx-x16.c",
3169 "src/f32-vunary/gen/vneg-avx-x8.c",
3170 "src/f32-vunary/gen/vneg-avx-x16.c",
3171 "src/f32-vunary/gen/vsqr-avx-x8.c",
3172 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003173 "src/math/exp-avx-rr2-p5.c",
3174 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3175 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3176 "src/math/expm1minus-avx-rr2-p6.c",
3177 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3178 "src/math/sigmoid-avx-rr2-p5-div.c",
3179 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3180 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003181 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3182 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3183 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3184 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3185 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3186 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3187 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3188 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3189 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3190 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3191 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3192 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3193 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3194 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
3195 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3196 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
3197 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3198 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
3199 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3200 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
3201 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3202 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
3203 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3204 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
3205 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3206 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
3207 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3208 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003209 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3210 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003211 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3212 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003213 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3214 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3215 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3216 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3217 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3218 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003219 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3220 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003221 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3222 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3223 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3224 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3225 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3226 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3227 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3228 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3229 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3230 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3231 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3232 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003233 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3234 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003235 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003236 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003237 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003238 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3239 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003240 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003241 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003242 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003243 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3244 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003245 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003246 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003247 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003248 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3249 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003250 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003251 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003252 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003253 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3254 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003255 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003256 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003257 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003258 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3259 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003260 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003261 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003262 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003263 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3264 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003265 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003266 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003267 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003268 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
3269 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003270 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003271 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
3272 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
3273 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003274 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003275 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
3276 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
3277 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003278 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003279 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
3280 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
3281 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003282 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003283 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
3284 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
3285 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003286 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003287 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
3288 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
3289 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003290 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003291 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
3292 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
3293 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003294 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003295 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003296 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3297 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3298 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3299 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3300 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3301 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3302 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3303 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3304 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3305 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3306 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3307 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3308 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3309 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3310 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3311 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003312]
3313
Marat Dukhan1566fee2020-08-02 21:55:41 -07003314XOP_UKERNELS = [
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003315 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3316 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3317 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3318 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3319 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3320 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3321 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3322 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3323 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3324 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3325 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3326 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3327 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3328 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
3329 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3330 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
3331 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3332 "src/qc8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
3333 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3334 "src/qc8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
3335 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3336 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
3337 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3338 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
3339 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3340 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
3341 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3342 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003343 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003344 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003345 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3346 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3347 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07003348 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003349 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3350 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3351 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3352 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3353 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3354 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003355 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3356 "src/qs8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003357 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003358 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003359 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003360 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3361 "src/qs8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003362 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003363 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003364 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003365 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3366 "src/qs8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003367 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003368 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003369 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003370 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3371 "src/qs8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003372 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003373 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003374 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003375 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3376 "src/qs8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003377 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003378 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003379 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003380 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3381 "src/qs8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003382 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003383 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003384 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003385 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3386 "src/qs8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003387 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003388 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003389 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-xop.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003390 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
3391 "src/qs8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003392 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003393 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-xop-ld64.c",
3394 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
3395 "src/qs8-igemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003396 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003397 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-xop-ld64.c",
3398 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
3399 "src/qs8-igemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003400 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003401 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-xop-ld64.c",
3402 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
3403 "src/qs8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003404 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003405 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-xop-ld64.c",
3406 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
3407 "src/qs8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003408 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003409 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld64.c",
3410 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
3411 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003412 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003413 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld64.c",
3414 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
3415 "src/qs8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003416 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003417 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-xop-ld64.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003418 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x8.c",
3419 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x16.c",
3420 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x24.c",
3421 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
3422 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x8.c",
3423 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x16.c",
3424 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x24.c",
3425 "src/qs8-vaddc/gen/minmax-xop-mul32-ld32-x32.c",
Marat Dukhan1566fee2020-08-02 21:55:41 -07003426]
3427
Marat Dukhanfda12b82019-11-21 12:27:59 -08003428FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003429 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
3430 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003431 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
3432 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003433 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
3434 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003435 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
3436 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
3437 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
3438 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
3439 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
3440 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003441 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003442 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
3443 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
3444 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
3445 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003446 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003447 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
3448 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003449 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003450 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
3451 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003452 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
3453 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
3454 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003455 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
3456 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
3457 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
3458 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
3459 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
3460 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
3461 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
3462 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
3463 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
3464 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
3465 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
3466 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
3467 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
3468 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003469 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003470 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
3471 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
3472 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
3473 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003474 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003475 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
3476 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003477 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003478 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
3479 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003480 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
3481 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
3482 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003483 "src/f32-vhswish/gen/vhswish-fma3-x8.c",
3484 "src/f32-vhswish/gen/vhswish-fma3-x16.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003485 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x8.c",
3486 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x16.c",
3487 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x24.c",
3488 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x32.c",
3489 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x40.c",
3490 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x48.c",
3491 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x56.c",
3492 "src/f32-vsqrt/gen/fma3-nr1fma1adj-x64.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003493 "src/math/sqrt-fma3-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003494 "src/math/sqrt-fma3-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003495 "src/math/sqrt-fma3-nr2fma.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -08003496]
3497
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003498AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003499 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
3500 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003501 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003502 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003503 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003504 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
3505 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003506 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003507 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
3508 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
3509 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003510 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003511 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
3512 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003513 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003514 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003515 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003516 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3517 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003518 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003519 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3520 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3521 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003522 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003523 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3524 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003525 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003526 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003527 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003528 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3529 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003530 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003531 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3532 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3533 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003534 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003535 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3536 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3537 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3538 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3539 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3540 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3541 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3542 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3543 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3544 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3545 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3546 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3547 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3548 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3549 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3550 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3551 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3552 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3553 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3554 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3555 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3556 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3557 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3558 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3559 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3560 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3561 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3562 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3563 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3564 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3565 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3566 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3567 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3568 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3569 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3570 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3571 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3572 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3573 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3574 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003575 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3576 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3577 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3578 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3579 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3580 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3581 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3582 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3583 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3584 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3585 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3586 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3587 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3588 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3589 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3590 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3591 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3592 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3593 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3594 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3595 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3596 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3597 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3598 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003599 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3600 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3601 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3602 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3603 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3604 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3605 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3606 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3607 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3608 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3609 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3610 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3611 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3612 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3613 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3614 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3615 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3616 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3617 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3618 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3619 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3620 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3621 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3622 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3623 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3624 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3625 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3626 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3627 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3628 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003629 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3630 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3631 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003632 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3633 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3634 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3635 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003636 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003637 "src/math/extexp-avx2-p5.c",
3638 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3639 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3640 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3641 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3642 "src/math/sigmoid-avx2-rr1-p5-div.c",
3643 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3644 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3645 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3646 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3647 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3648 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3649 "src/math/sigmoid-avx2-rr2-p5-div.c",
3650 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3651 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07003652 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
3653 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
3654 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
3655 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
3656 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
3657 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
3658 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
3659 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
3660 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
3661 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
3662 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
3663 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003664 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3665 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3666 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3667 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3668 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3669 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07003670 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
3671 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
3672 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003673 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003674 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003675 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003676 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003677 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003678 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003679 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3680 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003681 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003682 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003683 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3684 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003685 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003686 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003687 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003688 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003689 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003690 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003691 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3692 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003693 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003694 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003695 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3696 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003697 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003698 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003699 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003700 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003701 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003702 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003703 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003704 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003705 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003706 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003707 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003708 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003709 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003710 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003711 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003712 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003713 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003714 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003715 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3716 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3717 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3718 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3719 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3720 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3721 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3722 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003723]
3724
Marat Dukhan08c4a432019-10-03 09:29:21 -07003725AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003726 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3727 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003728 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3729 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003730 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3731 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003732 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3733 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3734 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3735 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3736 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3737 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003738 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3739 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3740 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3741 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3742 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3743 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003744 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3745 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3746 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3747 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3748 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3749 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003750 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3751 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3752 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3753 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3754 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3755 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003756 "src/f32-prelu/gen/avx512f-2x16.c",
3757 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003758 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3759 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003760 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003761 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003762 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003763 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3764 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003765 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003766 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3767 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3768 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003769 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003770 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3771 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003772 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003773 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003774 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003775 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3776 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003777 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003778 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3779 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3780 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003781 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003782 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3783 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003784 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003785 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003786 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003787 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3788 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003789 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003790 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3791 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3792 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003793 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003794 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003795 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3796 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3797 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3798 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3799 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3800 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3801 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3802 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003803 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3804 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3805 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3806 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3807 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3808 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3809 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3810 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003811 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3812 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3813 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3814 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3815 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3816 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3817 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3818 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003819 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3820 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3821 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3822 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003823 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3824 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3825 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3826 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003827 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3828 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003829 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3830 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3831 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3832 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3833 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3834 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3835 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3836 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3837 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3838 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3839 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3840 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3841 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3842 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3843 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3844 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003845 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3846 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003847 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3848 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003849 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3850 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003851 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3852 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3853 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3854 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3855 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3856 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3857 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3858 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003859 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003860 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3861 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3862 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3863 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3864 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3865 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3866 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3867 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3868 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3869 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3870 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3871 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3872 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3873 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3874 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3875 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3876 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3877 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3878 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3879 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3880 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3881 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3882 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3883 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003884 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3885 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3886 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3887 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3888 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3889 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3890 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3891 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3892 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3893 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3894 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3895 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3896 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3897 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3898 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3899 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3900 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3901 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3902 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3903 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3904 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3905 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3906 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3907 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3908 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3909 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3910 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3911 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3912 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3913 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3914 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3915 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3916 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3917 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3918 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3919 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3920 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3921 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3922 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3923 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3924 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3925 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3926 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3927 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3928 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
3929 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
3930 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
3931 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003932 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
3933 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
3934 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
3935 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
3936 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
3937 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
3938 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
3939 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003940 "src/f32-vunary/gen/vabs-avx512f-x16.c",
3941 "src/f32-vunary/gen/vabs-avx512f-x32.c",
3942 "src/f32-vunary/gen/vneg-avx512f-x16.c",
3943 "src/f32-vunary/gen/vneg-avx512f-x32.c",
3944 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
3945 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003946 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
3947 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
3948 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
3949 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
3950 "src/math/exp-avx512f-rr2-p5-scalef.c",
3951 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003952 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
3953 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07003954 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003955 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003956 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003957 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003958 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003959 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003960 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003961 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003962 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003963 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
3964 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
3965 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
3966 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
3967 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
3968 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
3969 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
3970 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
3971 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
3972 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003973 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003974 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003975 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
3976 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
3977 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
3978 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003979 "src/math/sqrt-avx512f-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07003980 "src/math/sqrt-avx512f-nr1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003981 "src/math/sqrt-avx512f-nr2fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003982]
3983
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003984AVX512SKX_UKERNELS = [
Marat Dukhanc3e3f1c2021-06-03 09:56:16 -07003985 "src/qc8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
3986 "src/qc8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
3987 "src/qc8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
3988 "src/qc8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
3989 "src/qc8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
3990 "src/qc8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
3991 "src/qc8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
3992 "src/qc8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003993 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003994 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003995 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003996 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003997 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003998 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07003999 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx512skx-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004000 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx512skx-mul32.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004001 "src/qs8-gemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004002 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004003 "src/qs8-gemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004004 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004005 "src/qs8-gemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004006 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004007 "src/qs8-gemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004008 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004009 "src/qs8-igemm/gen/1x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004010 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004011 "src/qs8-igemm/gen/2x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004012 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004013 "src/qs8-igemm/gen/3x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004014 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhan71855ee2021-05-25 19:05:06 -07004015 "src/qs8-igemm/gen/4x16c8-minmax-fp32-avx512skx.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07004016 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-avx512skx.c",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004017]
4018
Frank Barchardbcedc082020-08-17 18:00:51 -07004019WASM32_ASM_UKERNELS = [
Marat Dukhan6674d692021-05-05 22:27:00 -07004020 "src/f32-vrelu/wasm_shr_x1.S",
4021 "src/f32-vrelu/wasm_shr_x2.S",
4022 "src/f32-vrelu/wasm_shr_x4.S",
Frank Barchardbcedc082020-08-17 18:00:51 -07004023]
4024
Marat Dukhan08c4a432019-10-03 09:29:21 -07004025AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -07004026 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -07004027 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004028 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4029 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004030 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004031 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -07004032 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004033 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004034 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
4035 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Frank Barchard490febe2020-07-16 18:42:17 -07004036 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a7.S",
4037 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
4038 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
4039 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004040]
4041
4042AARCH64_ASM_UKERNELS = [
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004043 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004044 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004045 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004046 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -07004047 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004048 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -07004049 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004050 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
4051 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
4052 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
4053 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
4054 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
4055 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
4056 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004057 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
4058 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004059 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4060 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
4061 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004062 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
4063 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004064 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4065 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
4066 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
4067 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004068 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004069 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
4070 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004071 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
4072 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
4073 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4074 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004075 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004076 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004077 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004078 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004079 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
4080 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
4081 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
4082 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
4083 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
4084 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
4085 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4086 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
4087 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
4088 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4089 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
4090 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
4091 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4092 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
4093 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4094 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4095 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4096 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
4097 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4098 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
4099 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
4100 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004101 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004102 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004103 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4104 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004105 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4106 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4107 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4108 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4109 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
4110 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004111 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
4112 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4113 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
4114 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004115 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
4116 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004117 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4118 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4119 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4120 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004121 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4122 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004123 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4124 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4125 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4126 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004127 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
4128 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004129 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4130 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004131 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4132 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4133 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004134 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4135 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4136 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4137 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
4138 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4139 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4140 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4141 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004142 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004143 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4144 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004145 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4146 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004147]
4148
Marat Dukhan1b354632020-03-23 12:50:22 -07004149INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004150 "src/xnnpack/argmaxpool.h",
4151 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004152 "src/xnnpack/common.h",
4153 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004154 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004155 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004156 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004157 "src/xnnpack/gavgpool.h",
4158 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004159 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004160 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004161 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004162 "src/xnnpack/lut.h",
4163 "src/xnnpack/math.h",
4164 "src/xnnpack/maxpool.h",
4165 "src/xnnpack/packx.h",
4166 "src/xnnpack/pad.h",
4167 "src/xnnpack/params.h",
4168 "src/xnnpack/pavgpool.h",
4169 "src/xnnpack/ppmm.h",
4170 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004171 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004172 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004173 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004174 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004175 "src/xnnpack/spmm.h",
4176 "src/xnnpack/unpool.h",
4177 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004178 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004179 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004180 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004181 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004182 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004183 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004184 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004185]
4186
4187INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004188 "include/xnnpack.h",
4189 "src/xnnpack/allocator.h",
4190 "src/xnnpack/compute.h",
4191 "src/xnnpack/im2col.h",
4192 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004193 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004194 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004195 "src/xnnpack/operator.h",
4196 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004197 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004198 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004199 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004200 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004201]
4202
Marat Dukhan1b354632020-03-23 12:50:22 -07004203ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004204 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004205]
4206
Marat Dukhan1b354632020-03-23 12:50:22 -07004207MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004208 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004209 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004210]
4211
Marat Dukhan1b354632020-03-23 12:50:22 -07004212MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004213 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004214 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004215 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004216 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004217]
4218
4219OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004220 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004221 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004222]
4223
4224WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004225 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004226 "src/xnnpack/operator.h",
4227 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004228]
4229
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004230LOGGING_COPTS = select({
4231 # No logging in optimized mode
4232 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4233 # Full logging in debug mode
4234 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4235 # Error-only logging in default (fastbuild) mode
4236 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4237})
4238
Marat Dukhan3b59de22020-06-03 20:15:19 -07004239LOGGING_SRCS = select({
4240 # No logging in optimized mode
4241 ":optimized_build": [],
4242 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004243 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004244 "src/operator-strings.c",
4245 "src/subgraph-strings.c",
4246 ],
4247})
4248
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004249LOGGING_HDRS = [
4250 "src/xnnpack/log.h",
4251]
4252
Marat Dukhan08c4a432019-10-03 09:29:21 -07004253xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004254 name = "tables",
4255 srcs = TABLE_SRCS,
4256 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004257 gcc_copts = xnnpack_gcc_std_copts(),
4258 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004259)
4260
4261xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004262 name = "scalar_ukernels",
4263 srcs = SCALAR_UKERNELS,
4264 hdrs = INTERNAL_HDRS,
4265 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004266 gcc_copts = xnnpack_gcc_std_copts(),
4267 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004268 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004269 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004270 "@FP16",
4271 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004272 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004273 ],
4274)
4275
4276xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004277 name = "scalar_ukernels_test_mode",
4278 srcs = SCALAR_UKERNELS,
4279 hdrs = INTERNAL_HDRS,
4280 aarch32_copts = ["-marm"],
4281 copts = [
4282 "-UNDEBUG",
4283 "-DXNN_TEST_MODE=1",
4284 ],
4285 gcc_copts = xnnpack_gcc_std_copts(),
4286 msvc_copts = xnnpack_msvc_std_copts(),
4287 deps = [
4288 ":tables",
4289 "@FP16",
4290 "@FXdiv",
4291 "@pthreadpool",
4292 ],
4293)
4294
4295xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004296 name = "wasm_ukernels",
4297 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004298 gcc_copts = xnnpack_gcc_std_copts(),
4299 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004300 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004301 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004302 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004303 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004304 "@FP16",
4305 "@FXdiv",
4306 "@pthreadpool",
4307 ],
4308)
4309
4310xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004311 name = "wasm_ukernels_test_mode",
4312 hdrs = INTERNAL_HDRS,
4313 copts = [
4314 "-UNDEBUG",
4315 "-DXNN_TEST_MODE=1",
4316 ],
4317 gcc_copts = xnnpack_gcc_std_copts(),
4318 msvc_copts = xnnpack_msvc_std_copts(),
4319 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004320 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004321 deps = [
4322 ":tables",
4323 "@FP16",
4324 "@FXdiv",
4325 "@pthreadpool",
4326 ],
4327)
4328
4329xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004330 name = "neon_ukernels",
4331 hdrs = INTERNAL_HDRS,
4332 aarch32_copts = [
4333 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004334 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004335 "-mfpu=neon",
4336 ],
4337 aarch32_srcs = NEON_UKERNELS,
4338 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004339 gcc_copts = xnnpack_gcc_std_copts(),
4340 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004341 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004342 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004343 "@FP16",
4344 "@pthreadpool",
4345 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004346)
4347
4348xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004349 name = "neon_ukernels_test_mode",
4350 hdrs = INTERNAL_HDRS,
4351 aarch32_copts = [
4352 "-marm",
4353 "-march=armv7-a",
4354 "-mfpu=neon",
4355 ],
4356 aarch32_srcs = NEON_UKERNELS,
4357 aarch64_srcs = NEON_UKERNELS,
4358 copts = [
4359 "-UNDEBUG",
4360 "-DXNN_TEST_MODE=1",
4361 ],
4362 gcc_copts = xnnpack_gcc_std_copts(),
4363 msvc_copts = xnnpack_msvc_std_copts(),
4364 deps = [
4365 ":tables",
4366 "@FP16",
4367 "@pthreadpool",
4368 ],
4369)
4370
4371xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004372 name = "neonfma_ukernels",
4373 hdrs = INTERNAL_HDRS,
4374 aarch32_copts = [
4375 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004376 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004377 "-mfpu=neon-vfpv4",
4378 ],
4379 aarch32_srcs = NEONFMA_UKERNELS,
4380 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004381 apple_aarch32_copts = [
4382 "-mcpu=swift",
4383 "-mtune=generic",
4384 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004385 gcc_copts = xnnpack_gcc_std_copts(),
4386 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004387 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004388 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004389 "@FP16",
4390 "@pthreadpool",
4391 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004392)
4393
4394xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004395 name = "neonfma_ukernels_test_mode",
4396 hdrs = INTERNAL_HDRS,
4397 aarch32_copts = [
4398 "-marm",
4399 "-march=armv7-a",
4400 "-mfpu=neon-vfpv4",
4401 ],
4402 aarch32_srcs = NEONFMA_UKERNELS,
4403 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004404 apple_aarch32_copts = [
4405 "-mcpu=swift",
4406 "-mtune=generic",
4407 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004408 copts = [
4409 "-UNDEBUG",
4410 "-DXNN_TEST_MODE=1",
4411 ],
4412 gcc_copts = xnnpack_gcc_std_copts(),
4413 msvc_copts = xnnpack_msvc_std_copts(),
4414 deps = [
4415 ":tables",
4416 "@FP16",
4417 "@pthreadpool",
4418 ],
4419)
4420
4421xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004422 name = "neonv8_ukernels",
4423 hdrs = INTERNAL_HDRS,
4424 aarch32_copts = [
4425 "-marm",
4426 "-march=armv8-a",
4427 "-mfpu=neon-fp-armv8",
4428 ],
4429 aarch32_srcs = NEONV8_UKERNELS,
4430 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004431 apple_aarch32_copts = [
4432 "-mcpu=cyclone",
4433 "-mtune=generic",
4434 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004435 gcc_copts = xnnpack_gcc_std_copts(),
4436 msvc_copts = xnnpack_msvc_std_copts(),
4437 deps = [
4438 ":tables",
4439 "@FP16",
4440 "@pthreadpool",
4441 ],
4442)
4443
4444xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004445 name = "neonv8_ukernels_test_mode",
4446 hdrs = INTERNAL_HDRS,
4447 aarch32_copts = [
4448 "-marm",
4449 "-march=armv8-a",
4450 "-mfpu=neon-fp-armv8",
4451 ],
4452 aarch32_srcs = NEONV8_UKERNELS,
4453 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004454 apple_aarch32_copts = [
4455 "-mcpu=cyclone",
4456 "-mtune=generic",
4457 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004458 copts = [
4459 "-UNDEBUG",
4460 "-DXNN_TEST_MODE=1",
4461 ],
4462 gcc_copts = xnnpack_gcc_std_copts(),
4463 msvc_copts = xnnpack_msvc_std_copts(),
4464 deps = [
4465 ":tables",
4466 "@FP16",
4467 "@pthreadpool",
4468 ],
4469)
4470
4471xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004472 name = "neonfp16arith_ukernels",
4473 hdrs = INTERNAL_HDRS,
4474 aarch64_copts = ["-march=armv8.2-a+fp16"],
4475 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004476 gcc_copts = xnnpack_gcc_std_copts(),
4477 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004478 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004479 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004480 "@FP16",
4481 "@pthreadpool",
4482 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004483)
4484
4485xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004486 name = "neonfp16arith_ukernels_test_mode",
4487 hdrs = INTERNAL_HDRS,
4488 aarch64_copts = ["-march=armv8.2-a+fp16"],
4489 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4490 copts = [
4491 "-UNDEBUG",
4492 "-DXNN_TEST_MODE=1",
4493 ],
4494 gcc_copts = xnnpack_gcc_std_copts(),
4495 msvc_copts = xnnpack_msvc_std_copts(),
4496 deps = [
4497 ":tables",
4498 "@FP16",
4499 "@pthreadpool",
4500 ],
4501)
4502
4503xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004504 name = "neondot_ukernels",
4505 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004506 aarch32_copts = [
4507 "-marm",
4508 "-march=armv8.2-a+dotprod",
4509 "-mfpu=neon-fp-armv8",
4510 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004511 aarch32_srcs = NEONDOT_UKERNELS,
4512 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4513 aarch64_srcs = NEONDOT_UKERNELS,
4514 gcc_copts = xnnpack_gcc_std_copts(),
4515 msvc_copts = xnnpack_msvc_std_copts(),
4516 deps = [
4517 ":tables",
4518 "@FP16",
4519 "@pthreadpool",
4520 ],
4521)
4522
4523xnnpack_cc_library(
4524 name = "neondot_ukernels_test_mode",
4525 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004526 aarch32_copts = [
4527 "-marm",
4528 "-march=armv8.2-a+dotprod",
4529 "-mfpu=neon-fp-armv8",
4530 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004531 aarch32_srcs = NEONDOT_UKERNELS,
4532 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4533 aarch64_srcs = NEONDOT_UKERNELS,
4534 copts = [
4535 "-UNDEBUG",
4536 "-DXNN_TEST_MODE=1",
4537 ],
4538 gcc_copts = xnnpack_gcc_std_copts(),
4539 msvc_copts = xnnpack_msvc_std_copts(),
4540 deps = [
4541 ":tables",
4542 "@FP16",
4543 "@pthreadpool",
4544 ],
4545)
4546
4547xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004548 name = "sse2_ukernels",
4549 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004550 gcc_copts = xnnpack_gcc_std_copts(),
4551 gcc_x86_copts = ["-msse2"],
4552 msvc_copts = xnnpack_msvc_std_copts(),
4553 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004554 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004555 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004556 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004557 "@FP16",
4558 "@pthreadpool",
4559 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004560)
4561
4562xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004563 name = "sse2_ukernels_test_mode",
4564 hdrs = INTERNAL_HDRS,
4565 copts = [
4566 "-UNDEBUG",
4567 "-DXNN_TEST_MODE=1",
4568 ],
4569 gcc_copts = xnnpack_gcc_std_copts(),
4570 gcc_x86_copts = ["-msse2"],
4571 msvc_copts = xnnpack_msvc_std_copts(),
4572 msvc_x86_32_copts = ["/arch:SSE2"],
4573 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4574 deps = [
4575 ":tables",
4576 "@FP16",
4577 "@pthreadpool",
4578 ],
4579)
4580
4581xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004582 name = "ssse3_ukernels",
4583 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004584 gcc_copts = xnnpack_gcc_std_copts(),
4585 gcc_x86_copts = ["-mssse3"],
4586 msvc_copts = xnnpack_msvc_std_copts(),
4587 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004588 x86_srcs = SSSE3_UKERNELS,
4589 deps = [
4590 ":tables",
4591 "@FP16",
4592 "@pthreadpool",
4593 ],
4594)
4595
4596xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004597 name = "ssse3_ukernels_test_mode",
4598 hdrs = INTERNAL_HDRS,
4599 copts = [
4600 "-UNDEBUG",
4601 "-DXNN_TEST_MODE=1",
4602 ],
4603 gcc_copts = xnnpack_gcc_std_copts(),
4604 gcc_x86_copts = ["-mssse3"],
4605 msvc_copts = xnnpack_msvc_std_copts(),
4606 msvc_x86_32_copts = ["/arch:SSE2"],
4607 x86_srcs = SSSE3_UKERNELS,
4608 deps = [
4609 ":tables",
4610 "@FP16",
4611 "@pthreadpool",
4612 ],
4613)
4614
4615xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004616 name = "sse41_ukernels",
4617 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004618 gcc_copts = xnnpack_gcc_std_copts(),
4619 gcc_x86_copts = ["-msse4.1"],
4620 msvc_copts = xnnpack_msvc_std_copts(),
4621 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004622 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004623 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004624 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004625 "@FP16",
4626 "@pthreadpool",
4627 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004628)
4629
4630xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004631 name = "sse41_ukernels_test_mode",
4632 hdrs = INTERNAL_HDRS,
4633 copts = [
4634 "-UNDEBUG",
4635 "-DXNN_TEST_MODE=1",
4636 ],
4637 gcc_copts = xnnpack_gcc_std_copts(),
4638 gcc_x86_copts = ["-msse4.1"],
4639 msvc_copts = xnnpack_msvc_std_copts(),
4640 msvc_x86_32_copts = ["/arch:SSE2"],
4641 x86_srcs = SSE41_UKERNELS,
4642 deps = [
4643 ":tables",
4644 "@FP16",
4645 "@pthreadpool",
4646 ],
4647)
4648
4649xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004650 name = "avx_ukernels",
4651 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004652 gcc_copts = xnnpack_gcc_std_copts(),
4653 gcc_x86_copts = ["-mavx"],
4654 msvc_copts = xnnpack_msvc_std_copts(),
4655 msvc_x86_32_copts = ["/arch:AVX"],
4656 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004657 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004658 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004659 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004660 "@FP16",
4661 "@pthreadpool",
4662 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004663)
4664
4665xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004666 name = "avx_ukernels_test_mode",
4667 hdrs = INTERNAL_HDRS,
4668 copts = [
4669 "-UNDEBUG",
4670 "-DXNN_TEST_MODE=1",
4671 ],
4672 gcc_copts = xnnpack_gcc_std_copts(),
4673 gcc_x86_copts = ["-mavx"],
4674 msvc_copts = xnnpack_msvc_std_copts(),
4675 msvc_x86_32_copts = ["/arch:AVX"],
4676 msvc_x86_64_copts = ["/arch:AVX"],
4677 x86_srcs = AVX_UKERNELS,
4678 deps = [
4679 ":tables",
4680 "@FP16",
4681 "@pthreadpool",
4682 ],
4683)
4684
4685xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004686 name = "xop_ukernels",
4687 hdrs = INTERNAL_HDRS,
4688 gcc_copts = xnnpack_gcc_std_copts(),
4689 gcc_x86_copts = ["-mxop"],
4690 msvc_copts = xnnpack_msvc_std_copts(),
4691 msvc_x86_32_copts = ["/arch:AVX"],
4692 msvc_x86_64_copts = ["/arch:AVX"],
4693 x86_srcs = XOP_UKERNELS,
4694 deps = [
4695 ":tables",
4696 "@FP16",
4697 "@pthreadpool",
4698 ],
4699)
4700
4701xnnpack_cc_library(
4702 name = "xop_ukernels_test_mode",
4703 hdrs = INTERNAL_HDRS,
4704 copts = [
4705 "-UNDEBUG",
4706 "-DXNN_TEST_MODE=1",
4707 ],
4708 gcc_copts = xnnpack_gcc_std_copts(),
4709 gcc_x86_copts = ["-mxop"],
4710 msvc_copts = xnnpack_msvc_std_copts(),
4711 msvc_x86_32_copts = ["/arch:AVX"],
4712 msvc_x86_64_copts = ["/arch:AVX"],
4713 x86_srcs = XOP_UKERNELS,
4714 deps = [
4715 ":tables",
4716 "@FP16",
4717 "@pthreadpool",
4718 ],
4719)
4720
4721xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004722 name = "fma3_ukernels",
4723 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004724 gcc_copts = xnnpack_gcc_std_copts(),
4725 gcc_x86_copts = ["-mfma"],
4726 msvc_copts = xnnpack_msvc_std_copts(),
4727 msvc_x86_32_copts = ["/arch:AVX"],
4728 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004729 x86_srcs = FMA3_UKERNELS,
4730 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004731 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004732 "@FP16",
4733 "@pthreadpool",
4734 ],
4735)
4736
4737xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004738 name = "fma3_ukernels_test_mode",
4739 hdrs = INTERNAL_HDRS,
4740 copts = [
4741 "-UNDEBUG",
4742 "-DXNN_TEST_MODE=1",
4743 ],
4744 gcc_copts = xnnpack_gcc_std_copts(),
4745 gcc_x86_copts = ["-mfma"],
4746 msvc_copts = xnnpack_msvc_std_copts(),
4747 msvc_x86_32_copts = ["/arch:AVX"],
4748 msvc_x86_64_copts = ["/arch:AVX"],
4749 x86_srcs = FMA3_UKERNELS,
4750 deps = [
4751 ":tables",
4752 "@FP16",
4753 "@pthreadpool",
4754 ],
4755)
4756
4757xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004758 name = "avx2_ukernels",
4759 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004760 gcc_copts = xnnpack_gcc_std_copts(),
4761 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004762 "-mfma",
4763 "-mavx2",
4764 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004765 msvc_copts = xnnpack_msvc_std_copts(),
4766 msvc_x86_32_copts = ["/arch:AVX2"],
4767 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004768 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004769 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004770 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004771 "@FP16",
4772 "@pthreadpool",
4773 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004774)
4775
4776xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004777 name = "avx2_ukernels_test_mode",
4778 hdrs = INTERNAL_HDRS,
4779 copts = [
4780 "-UNDEBUG",
4781 "-DXNN_TEST_MODE=1",
4782 ],
4783 gcc_copts = xnnpack_gcc_std_copts(),
4784 gcc_x86_copts = [
4785 "-mfma",
4786 "-mavx2",
4787 ],
4788 msvc_copts = xnnpack_msvc_std_copts(),
4789 msvc_x86_32_copts = ["/arch:AVX2"],
4790 msvc_x86_64_copts = ["/arch:AVX2"],
4791 x86_srcs = AVX2_UKERNELS,
4792 deps = [
4793 ":tables",
4794 "@FP16",
4795 "@pthreadpool",
4796 ],
4797)
4798
4799xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004800 name = "avx512f_ukernels",
4801 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004802 gcc_copts = xnnpack_gcc_std_copts(),
4803 gcc_x86_copts = ["-mavx512f"],
4804 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4805 msvc_copts = xnnpack_msvc_std_copts(),
4806 msvc_x86_32_copts = ["/arch:AVX512"],
4807 msvc_x86_64_copts = ["/arch:AVX512"],
4808 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004809 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004810 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004811 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004812 "@FP16",
4813 "@pthreadpool",
4814 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004815)
4816
4817xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004818 name = "avx512f_ukernels_test_mode",
4819 hdrs = INTERNAL_HDRS,
4820 copts = [
4821 "-UNDEBUG",
4822 "-DXNN_TEST_MODE=1",
4823 ],
4824 gcc_copts = xnnpack_gcc_std_copts(),
4825 gcc_x86_copts = ["-mavx512f"],
4826 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4827 msvc_copts = xnnpack_msvc_std_copts(),
4828 msvc_x86_32_copts = ["/arch:AVX512"],
4829 msvc_x86_64_copts = ["/arch:AVX512"],
4830 msys_copts = ["-fno-asynchronous-unwind-tables"],
4831 x86_srcs = AVX512F_UKERNELS,
4832 deps = [
4833 ":tables",
4834 "@FP16",
4835 "@pthreadpool",
4836 ],
4837)
4838
4839xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004840 name = "avx512skx_ukernels",
4841 hdrs = INTERNAL_HDRS,
4842 gcc_copts = xnnpack_gcc_std_copts(),
4843 gcc_x86_copts = [
4844 "-mavx512f",
4845 "-mavx512cd",
4846 "-mavx512bw",
4847 "-mavx512dq",
4848 "-mavx512vl",
4849 ],
4850 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4851 msvc_copts = xnnpack_msvc_std_copts(),
4852 msvc_x86_32_copts = ["/arch:AVX512"],
4853 msvc_x86_64_copts = ["/arch:AVX512"],
4854 msys_copts = ["-fno-asynchronous-unwind-tables"],
4855 x86_srcs = AVX512SKX_UKERNELS,
4856 deps = [
4857 ":tables",
4858 "@FP16",
4859 "@pthreadpool",
4860 ],
4861)
4862
4863xnnpack_cc_library(
4864 name = "avx512skx_ukernels_test_mode",
4865 hdrs = INTERNAL_HDRS,
4866 copts = [
4867 "-UNDEBUG",
4868 "-DXNN_TEST_MODE=1",
4869 ],
4870 gcc_copts = xnnpack_gcc_std_copts(),
4871 gcc_x86_copts = [
4872 "-mavx512f",
4873 "-mavx512cd",
4874 "-mavx512bw",
4875 "-mavx512dq",
4876 "-mavx512vl",
4877 ],
4878 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4879 msvc_copts = xnnpack_msvc_std_copts(),
4880 msvc_x86_32_copts = ["/arch:AVX512"],
4881 msvc_x86_64_copts = ["/arch:AVX512"],
4882 msys_copts = ["-fno-asynchronous-unwind-tables"],
4883 x86_srcs = AVX512SKX_UKERNELS,
4884 deps = [
4885 ":tables",
4886 "@FP16",
4887 "@pthreadpool",
4888 ],
4889)
4890
4891xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004892 name = "asm_ukernels",
4893 hdrs = ["src/xnnpack/assembly.h"],
4894 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004895 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004896 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004897 wasm_srcs = WASM32_ASM_UKERNELS,
4898 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004899)
4900
Marat Dukhan3b59de22020-06-03 20:15:19 -07004901xnnpack_cc_library(
4902 name = "logging_utils",
4903 srcs = LOGGING_SRCS,
4904 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4905 copts = LOGGING_COPTS + [
4906 "-Isrc",
4907 "-Iinclude",
4908 ] + select({
4909 ":debug_build": [],
4910 "//conditions:default": xnnpack_min_size_copts(),
4911 }),
4912 gcc_copts = xnnpack_gcc_std_copts(),
4913 msvc_copts = xnnpack_msvc_std_copts(),
4914 visibility = xnnpack_visibility(),
4915 deps = [
4916 "@FP16",
4917 "@clog",
4918 "@pthreadpool",
4919 ],
4920)
4921
Marat Dukhan08c4a432019-10-03 09:29:21 -07004922xnnpack_aggregate_library(
4923 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004924 aarch32_ios_deps = [
4925 ":neon_ukernels",
4926 ":neonfma_ukernels",
4927 ":neonv8_ukernels",
4928 ":asm_ukernels",
4929 ],
4930 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004931 ":neon_ukernels",
4932 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004933 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004934 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004935 ":asm_ukernels",
4936 ],
4937 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004938 ":neon_ukernels",
4939 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004940 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004941 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004942 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004943 ":asm_ukernels",
4944 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004945 generic_deps = [
4946 ":scalar_ukernels",
4947 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004948 wasm_deps = [
4949 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004950 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004951 ],
4952 wasmsimd_deps = [
4953 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004954 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004955 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004956 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004957 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004958 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004959 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004960 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004961 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004962 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004963 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004964 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004965 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004966 ],
4967)
4968
Marat Dukhan33fcf782020-05-24 14:27:15 -07004969xnnpack_aggregate_library(
4970 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004971 aarch32_ios_deps = [
4972 ":neon_ukernels_test_mode",
4973 ":neonfma_ukernels_test_mode",
4974 ":neonv8_ukernels_test_mode",
4975 ":asm_ukernels",
4976 ],
4977 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07004978 ":neon_ukernels_test_mode",
4979 ":neonfma_ukernels_test_mode",
4980 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004981 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004982 ":asm_ukernels",
4983 ],
4984 aarch64_deps = [
4985 ":neon_ukernels_test_mode",
4986 ":neonfma_ukernels_test_mode",
4987 ":neonv8_ukernels_test_mode",
4988 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004989 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004990 ":asm_ukernels",
4991 ],
4992 generic_deps = [
4993 ":scalar_ukernels_test_mode",
4994 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004995 wasm_deps = [
4996 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07004997 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004998 ],
4999 wasmsimd_deps = [
5000 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005001 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005002 ],
5003 x86_deps = [
5004 ":sse2_ukernels_test_mode",
5005 ":ssse3_ukernels_test_mode",
5006 ":sse41_ukernels_test_mode",
5007 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005008 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005009 ":fma3_ukernels_test_mode",
5010 ":avx2_ukernels_test_mode",
5011 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005012 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005013 ],
5014)
5015
Marat Dukhan08c4a432019-10-03 09:29:21 -07005016xnnpack_cc_library(
5017 name = "im2col",
5018 srcs = ["src/im2col.c"],
5019 hdrs = [
5020 "src/xnnpack/common.h",
5021 "src/xnnpack/im2col.h",
5022 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005023 gcc_copts = xnnpack_gcc_std_copts(),
5024 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005025)
5026
5027xnnpack_cc_library(
5028 name = "indirection",
5029 srcs = ["src/indirection.c"],
5030 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005031 gcc_copts = xnnpack_gcc_std_copts(),
5032 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005033 deps = [
5034 "@FP16",
5035 "@FXdiv",
5036 "@pthreadpool",
5037 ],
5038)
5039
5040xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005041 name = "indirection_test_mode",
5042 srcs = ["src/indirection.c"],
5043 hdrs = INTERNAL_HDRS,
5044 copts = [
5045 "-UNDEBUG",
5046 "-DXNN_TEST_MODE=1",
5047 ],
5048 gcc_copts = xnnpack_gcc_std_copts(),
5049 msvc_copts = xnnpack_msvc_std_copts(),
5050 deps = [
5051 "@FP16",
5052 "@FXdiv",
5053 "@pthreadpool",
5054 ],
5055)
5056
5057xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005058 name = "packing",
5059 srcs = ["src/packing.c"],
5060 hdrs = INTERNAL_HDRS,
5061 gcc_copts = xnnpack_gcc_std_copts(),
5062 msvc_copts = xnnpack_msvc_std_copts(),
5063 deps = [
5064 "@FP16",
5065 "@FXdiv",
5066 "@pthreadpool",
5067 ],
5068)
5069
5070xnnpack_cc_library(
5071 name = "packing_test_mode",
5072 srcs = ["src/packing.c"],
5073 hdrs = INTERNAL_HDRS,
5074 copts = [
5075 "-UNDEBUG",
5076 "-DXNN_TEST_MODE=1",
5077 ],
5078 gcc_copts = xnnpack_gcc_std_copts(),
5079 msvc_copts = xnnpack_msvc_std_copts(),
5080 deps = [
5081 "@FP16",
5082 "@FXdiv",
5083 "@pthreadpool",
5084 ],
5085)
5086
5087xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005088 name = "operator_run",
5089 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005090 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005091 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005092 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5093 "//conditions:default": [],
5094 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005095 gcc_copts = xnnpack_gcc_std_copts(),
5096 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005097 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005098 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005099 "@FP16",
5100 "@FXdiv",
5101 "@clog",
5102 "@pthreadpool",
5103 ],
5104)
5105
Chao Mei6ddfc602020-05-13 22:29:36 -07005106xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005107 name = "operator_run_test_mode",
5108 srcs = ["src/operator-run.c"],
5109 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5110 copts = LOGGING_COPTS + [
5111 "-UNDEBUG",
5112 "-DXNN_TEST_MODE=1",
5113 ] + select({
5114 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5115 "//conditions:default": [],
5116 }),
5117 gcc_copts = xnnpack_gcc_std_copts(),
5118 msvc_copts = xnnpack_msvc_std_copts(),
5119 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005120 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005121 "@FP16",
5122 "@FXdiv",
5123 "@clog",
5124 "@pthreadpool",
5125 ],
5126)
5127
5128xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005129 name = "memory_planner",
5130 srcs = ["src/memory-planner.c"],
5131 hdrs = INTERNAL_HDRS,
5132 defines = select({
5133 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5134 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5135 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5136 }),
5137 gcc_copts = xnnpack_gcc_std_copts(),
5138 msvc_copts = xnnpack_msvc_std_copts(),
5139 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005140 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005141 "@pthreadpool",
5142 ],
5143)
5144
Marat Dukhan33fcf782020-05-24 14:27:15 -07005145xnnpack_cc_library(
5146 name = "memory_planner_test_mode",
5147 srcs = ["src/memory-planner.c"],
5148 hdrs = INTERNAL_HDRS,
5149 copts = [
5150 "-UNDEBUG",
5151 "-DXNN_TEST_MODE=1",
5152 ],
5153 defines = select({
5154 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5155 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5156 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5157 }),
5158 gcc_copts = xnnpack_gcc_std_copts(),
5159 msvc_copts = xnnpack_msvc_std_copts(),
5160 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005161 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005162 "@pthreadpool",
5163 ],
5164)
5165
Marat Dukhan08c4a432019-10-03 09:29:21 -07005166cc_library(
5167 name = "enable_assembly",
5168 defines = select({
5169 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5170 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005171 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005172 }),
5173)
5174
Marat Dukhan9de90e02020-06-18 16:04:12 -07005175cc_library(
5176 name = "enable_sparse",
5177 defines = select({
5178 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5179 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005180 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005181 }),
5182)
5183
Marat Dukhancf056b22019-10-07 10:26:29 -07005184xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005185 name = "operators",
5186 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005187 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005188 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005189 ],
5190 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005191 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005192 "-Isrc",
5193 "-Iinclude",
5194 ] + select({
5195 ":debug_build": [],
5196 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005197 }) + select({
5198 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5199 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005200 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005201 gcc_copts = xnnpack_gcc_std_copts(),
5202 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005203 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005204 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005205 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005206 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005207 "@FP16",
5208 "@FXdiv",
5209 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005210 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005211 ],
5212)
5213
Marat Dukhan10a38082020-04-17 03:58:35 -07005214xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005215 name = "operators_test_mode",
5216 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005217 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005218 "src/operator-delete.c",
5219 ],
5220 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5221 copts = LOGGING_COPTS + [
5222 "-Isrc",
5223 "-Iinclude",
5224 "-UNDEBUG",
5225 "-DXNN_TEST_MODE=1",
5226 ] + select({
5227 ":debug_build": [],
5228 "//conditions:default": xnnpack_min_size_copts(),
5229 }) + select({
5230 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5231 "//conditions:default": [],
5232 }),
5233 gcc_copts = xnnpack_gcc_std_copts(),
5234 msvc_copts = xnnpack_msvc_std_copts(),
5235 deps = [
5236 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005237 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005238 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005239 "@FP16",
5240 "@FXdiv",
5241 "@clog",
5242 "@pthreadpool",
5243 ],
5244)
5245
5246xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005247 name = "XNNPACK",
5248 srcs = [
5249 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005250 "src/runtime.c",
5251 "src/subgraph.c",
5252 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005253 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005254 hdrs = ["include/xnnpack.h"],
5255 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005256 "-Isrc",
5257 "-Iinclude",
5258 ] + select({
5259 ":debug_build": [],
5260 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005261 }) + select({
5262 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5263 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005264 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005265 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005266 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005267 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005268 visibility = xnnpack_visibility(),
5269 deps = [
5270 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005271 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005272 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005273 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005274 ":operator_run",
5275 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005276 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005277 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005278 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005279 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005280 ] + select({
5281 ":emscripten": [],
5282 "//conditions:default": ["@cpuinfo"],
5283 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005284)
5285
Marat Dukhan10a38082020-04-17 03:58:35 -07005286xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005287 name = "XNNPACK_test_mode",
5288 srcs = [
5289 "src/init.c",
5290 "src/runtime.c",
5291 "src/subgraph.c",
5292 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005293 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005294 hdrs = ["include/xnnpack.h"],
5295 copts = LOGGING_COPTS + [
5296 "-Isrc",
5297 "-Iinclude",
5298 "-UNDEBUG",
5299 "-DXNN_TEST_MODE=1",
5300 ] + select({
5301 ":debug_build": [],
5302 "//conditions:default": xnnpack_min_size_copts(),
5303 }) + select({
5304 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5305 "//conditions:default": [],
5306 }),
5307 gcc_copts = xnnpack_gcc_std_copts(),
5308 includes = ["include"],
5309 msvc_copts = xnnpack_msvc_std_copts(),
5310 visibility = xnnpack_visibility(),
5311 deps = [
5312 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005313 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005314 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005315 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005316 ":operator_run_test_mode",
5317 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005318 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005319 "@clog",
5320 "@FP16",
5321 "@pthreadpool",
5322 ] + select({
5323 ":emscripten": [],
5324 "//conditions:default": ["@cpuinfo"],
5325 }),
5326)
5327
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005328# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5329# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005330xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005331 name = "xnnpack_for_tflite",
5332 srcs = [
5333 "src/init.c",
5334 "src/runtime.c",
5335 "src/subgraph.c",
5336 "src/tensor.c",
5337 ] + SUBGRAPH_SRCS,
5338 hdrs = ["include/xnnpack.h"],
5339 copts = LOGGING_COPTS + [
5340 "-Isrc",
5341 "-Iinclude",
5342 ] + select({
5343 ":debug_build": [],
5344 "//conditions:default": xnnpack_min_size_copts(),
5345 }) + select({
5346 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5347 "//conditions:default": [],
5348 }),
5349 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005350 "XNN_NO_QU8_OPERATORS",
5351 "XNN_NO_U8_OPERATORS",
5352 "XNN_NO_X8_OPERATORS",
5353 "XNN_NO_F16_OPERATORS",
5354 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005355 ] + select({
5356 ":xnn_enable_qs8_explicit_true": [],
5357 ":xnn_enable_qs8_explicit_false": ["XNN_NO_QS8_OPERATORS"],
5358 "//conditions:default": ["XNN_NO_QS8_OPERATORS"],
5359 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005360 gcc_copts = xnnpack_gcc_std_copts(),
5361 includes = ["include"],
5362 msvc_copts = xnnpack_msvc_std_copts(),
5363 visibility = xnnpack_visibility(),
5364 deps = [
5365 ":enable_assembly",
5366 ":enable_sparse",
5367 ":logging_utils",
5368 ":memory_planner",
5369 ":operator_run",
5370 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005371 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005372 "@clog",
5373 "@FP16",
5374 "@pthreadpool",
5375 ] + select({
5376 ":emscripten": [],
5377 "//conditions:default": ["@cpuinfo"],
5378 }),
5379)
5380
5381# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5382# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5383xnnpack_cc_library(
5384 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005385 srcs = [
5386 "src/init.c",
5387 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005388 hdrs = ["include/xnnpack.h"],
5389 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005390 "-Isrc",
5391 "-Iinclude",
5392 ] + select({
5393 ":debug_build": [],
5394 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005395 }) + select({
5396 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5397 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005398 }),
5399 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005400 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005401 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005402 "XNN_NO_U8_OPERATORS",
5403 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005404 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005405 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005406 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005407 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005408 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005409 visibility = xnnpack_visibility(),
5410 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005411 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005412 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005413 ":operator_run",
5414 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005415 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005416 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005417 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005418 ] + select({
5419 ":emscripten": [],
5420 "//conditions:default": ["@cpuinfo"],
5421 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005422)
5423
Marat Dukhancf056b22019-10-07 10:26:29 -07005424xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005425 name = "bench_utils",
5426 srcs = ["bench/utils.cc"],
5427 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005428 deps = [
5429 "@com_google_benchmark//:benchmark",
5430 "@cpuinfo",
5431 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005432)
5433
Frank Barchard7e955972019-10-11 10:34:25 -07005434######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005435
5436xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005437 name = "qs8_gemm_bench",
5438 srcs = [
5439 "bench/gemm.h",
5440 "bench/qs8-gemm.cc",
5441 "src/xnnpack/AlignedAllocator.h",
5442 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005443 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5444 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005445)
5446
5447xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005448 name = "qs8_requantization_bench",
5449 srcs = [
5450 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005451 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005452 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005453 ] + MICROKERNEL_BENCHMARK_HDRS,
5454 deps = MICROKERNEL_BENCHMARK_DEPS,
5455)
5456
5457xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005458 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005459 srcs = [
5460 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005461 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005462 "src/xnnpack/AlignedAllocator.h",
5463 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005464 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005465 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005466)
5467
5468xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005469 name = "qu8_requantization_bench",
5470 srcs = [
5471 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005472 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005473 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005474 ] + MICROKERNEL_BENCHMARK_HDRS,
5475 deps = MICROKERNEL_BENCHMARK_DEPS,
5476)
5477
5478xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005479 name = "f16_igemm_bench",
5480 srcs = [
5481 "bench/f16-igemm.cc",
5482 "bench/conv.h",
5483 "bench/google/conv.h",
5484 "src/xnnpack/AlignedAllocator.h",
5485 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005486 deps = MICROKERNEL_BENCHMARK_DEPS + [
5487 ":indirection",
5488 ":packing",
5489 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005490)
5491
5492xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005493 name = "f16_gemm_bench",
5494 srcs = [
5495 "bench/f16-gemm.cc",
5496 "bench/gemm.h",
5497 "src/xnnpack/AlignedAllocator.h",
5498 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005499 deps = MICROKERNEL_BENCHMARK_DEPS + [
5500 ":packing",
5501 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005502)
5503
5504xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005505 name = "f16_spmm_bench",
5506 srcs = [
5507 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005508 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005509 "src/xnnpack/AlignedAllocator.h",
5510 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005511 deps = MICROKERNEL_BENCHMARK_DEPS,
5512)
5513
5514xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005515 name = "f16_vrelu_bench",
5516 srcs = [
5517 "bench/f16-vrelu.cc",
5518 "src/xnnpack/AlignedAllocator.h",
5519 ] + MICROKERNEL_BENCHMARK_HDRS,
5520 deps = MICROKERNEL_BENCHMARK_DEPS,
5521)
5522
5523xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005524 name = "f32_igemm_bench",
5525 srcs = [
5526 "bench/f32-igemm.cc",
5527 "bench/conv.h",
5528 "src/xnnpack/AlignedAllocator.h",
5529 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005530 deps = MICROKERNEL_BENCHMARK_DEPS + [
5531 ":indirection",
5532 ":packing",
5533 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005534)
5535
5536xnnpack_benchmark(
5537 name = "f32_conv_hwc_bench",
5538 srcs = [
5539 "bench/f32-conv-hwc.cc",
5540 "bench/dconv.h",
5541 "src/xnnpack/AlignedAllocator.h",
5542 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005543 deps = MICROKERNEL_BENCHMARK_DEPS + [
5544 ":packing",
5545 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005546)
5547
5548xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005549 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005550 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005551 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005552 "bench/dconv.h",
5553 "src/xnnpack/AlignedAllocator.h",
5554 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005555 deps = MICROKERNEL_BENCHMARK_DEPS + [
5556 ":packing",
5557 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005558)
5559
5560xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005561 name = "f16_dwconv_bench",
5562 srcs = [
5563 "bench/f16-dwconv.cc",
5564 "bench/dwconv.h",
5565 "bench/google/dwconv.h",
5566 "src/xnnpack/AlignedAllocator.h",
5567 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005568 deps = MICROKERNEL_BENCHMARK_DEPS + [
5569 ":indirection",
5570 ":packing",
5571 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005572)
5573
5574xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005575 name = "f32_dwconv_bench",
5576 srcs = [
5577 "bench/f32-dwconv.cc",
5578 "bench/dwconv.h",
5579 "src/xnnpack/AlignedAllocator.h",
5580 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005581 deps = MICROKERNEL_BENCHMARK_DEPS + [
5582 ":indirection",
5583 ":packing",
5584 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005585)
5586
5587xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005588 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005589 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005590 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005591 "bench/dwconv.h",
5592 "src/xnnpack/AlignedAllocator.h",
5593 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005594 deps = MICROKERNEL_BENCHMARK_DEPS + [
5595 ":indirection",
5596 ":packing",
5597 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005598)
5599
5600xnnpack_benchmark(
5601 name = "f32_gemm_bench",
5602 srcs = [
5603 "bench/f32-gemm.cc",
5604 "bench/gemm.h",
5605 "src/xnnpack/AlignedAllocator.h",
5606 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005607 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005608 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005609)
5610
5611xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005612 name = "f32_raddexpminusmax_bench",
5613 srcs = [
5614 "bench/f32-raddexpminusmax.cc",
5615 "src/xnnpack/AlignedAllocator.h",
5616 ] + MICROKERNEL_BENCHMARK_HDRS,
5617 deps = MICROKERNEL_BENCHMARK_DEPS,
5618)
5619
5620xnnpack_benchmark(
5621 name = "f32_raddextexp_bench",
5622 srcs = [
5623 "bench/f32-raddextexp.cc",
5624 "src/xnnpack/AlignedAllocator.h",
5625 ] + MICROKERNEL_BENCHMARK_HDRS,
5626 deps = MICROKERNEL_BENCHMARK_DEPS,
5627)
5628
5629xnnpack_benchmark(
5630 name = "f32_raddstoreexpminusmax_bench",
5631 srcs = [
5632 "bench/f32-raddstoreexpminusmax.cc",
5633 "src/xnnpack/AlignedAllocator.h",
5634 ] + MICROKERNEL_BENCHMARK_HDRS,
5635 deps = MICROKERNEL_BENCHMARK_DEPS,
5636)
5637
5638xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005639 name = "f32_rmax_bench",
5640 srcs = [
5641 "bench/f32-rmax.cc",
5642 "src/xnnpack/AlignedAllocator.h",
5643 ] + MICROKERNEL_BENCHMARK_HDRS,
5644 deps = MICROKERNEL_BENCHMARK_DEPS,
5645)
5646
5647xnnpack_benchmark(
5648 name = "f32_spmm_bench",
5649 srcs = [
5650 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005651 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005652 "src/xnnpack/AlignedAllocator.h",
5653 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005654 deps = MICROKERNEL_BENCHMARK_DEPS,
5655)
5656
5657xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005658 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005659 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005660 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005661 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005662 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005663 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005664)
5665
5666xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005667 name = "f32_velu_bench",
5668 srcs = [
5669 "bench/f32-velu.cc",
5670 "src/xnnpack/AlignedAllocator.h",
5671 ] + MICROKERNEL_BENCHMARK_HDRS,
5672 deps = MICROKERNEL_BENCHMARK_DEPS,
5673)
5674
5675xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005676 name = "f32_vhswish_bench",
5677 srcs = [
5678 "bench/f32-vhswish.cc",
5679 "src/xnnpack/AlignedAllocator.h",
5680 ] + MICROKERNEL_BENCHMARK_HDRS,
5681 deps = MICROKERNEL_BENCHMARK_DEPS,
5682)
5683
5684xnnpack_benchmark(
5685 name = "f32_vrelu_bench",
5686 srcs = [
5687 "bench/f32-vrelu.cc",
5688 "src/xnnpack/AlignedAllocator.h",
5689 ] + MICROKERNEL_BENCHMARK_HDRS,
5690 deps = MICROKERNEL_BENCHMARK_DEPS,
5691)
5692
5693xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005694 name = "f32_vscaleexpminusmax_bench",
5695 srcs = [
5696 "bench/f32-vscaleexpminusmax.cc",
5697 "src/xnnpack/AlignedAllocator.h",
5698 ] + MICROKERNEL_BENCHMARK_HDRS,
5699 deps = MICROKERNEL_BENCHMARK_DEPS,
5700)
5701
5702xnnpack_benchmark(
5703 name = "f32_vscaleextexp_bench",
5704 srcs = [
5705 "bench/f32-vscaleextexp.cc",
5706 "src/xnnpack/AlignedAllocator.h",
5707 ] + MICROKERNEL_BENCHMARK_HDRS,
5708 deps = MICROKERNEL_BENCHMARK_DEPS,
5709)
5710
5711xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005712 name = "f32_vsigmoid_bench",
5713 srcs = [
5714 "bench/f32-vsigmoid.cc",
5715 "src/xnnpack/AlignedAllocator.h",
5716 ] + MICROKERNEL_BENCHMARK_HDRS,
5717 deps = MICROKERNEL_BENCHMARK_DEPS,
5718)
5719
5720xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005721 name = "f32_vsqrt_bench",
5722 srcs = [
5723 "bench/f32-vsqrt.cc",
5724 "src/xnnpack/AlignedAllocator.h",
5725 ] + MICROKERNEL_BENCHMARK_HDRS,
5726 deps = MICROKERNEL_BENCHMARK_DEPS,
5727)
5728
5729xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005730 name = "f32_im2col_gemm_bench",
5731 srcs = [
5732 "bench/f32-im2col-gemm.cc",
5733 "bench/conv.h",
5734 "src/xnnpack/AlignedAllocator.h",
5735 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005736 deps = MICROKERNEL_BENCHMARK_DEPS + [
5737 ":im2col",
5738 ":packing",
5739 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005740)
5741
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005742xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005743 name = "rounding_bench",
5744 srcs = [
5745 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005746 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005747 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005748 ] + MICROKERNEL_BENCHMARK_HDRS,
5749 deps = MICROKERNEL_BENCHMARK_DEPS,
5750)
5751
Marat Dukhan08c4a432019-10-03 09:29:21 -07005752########################### Benchmarks for operators ###########################
5753
5754xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005755 name = "average_pooling_bench",
5756 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005757 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005758 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005759 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005760)
5761
5762xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005763 name = "bankers_rounding_bench",
5764 srcs = ["bench/bankers-rounding.cc"],
5765 copts = xnnpack_optional_tflite_copts(),
5766 tags = ["nowin32"],
5767 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5768)
5769
5770xnnpack_benchmark(
5771 name = "ceiling_bench",
5772 srcs = ["bench/ceiling.cc"],
5773 copts = xnnpack_optional_tflite_copts(),
5774 tags = ["nowin32"],
5775 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5776)
5777
5778xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005779 name = "channel_shuffle_bench",
5780 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005781 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005782)
5783
5784xnnpack_benchmark(
5785 name = "convolution_bench",
5786 srcs = ["bench/convolution.cc"],
5787 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005788 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005789 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005790)
5791
5792xnnpack_benchmark(
5793 name = "deconvolution_bench",
5794 srcs = ["bench/deconvolution.cc"],
5795 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005796 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005797 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005798)
5799
5800xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005801 name = "elu_bench",
5802 srcs = ["bench/elu.cc"],
5803 copts = xnnpack_optional_tflite_copts(),
5804 tags = ["nowin32"],
5805 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5806)
5807
5808xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005809 name = "floor_bench",
5810 srcs = ["bench/floor.cc"],
5811 copts = xnnpack_optional_tflite_copts(),
5812 tags = ["nowin32"],
5813 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5814)
5815
5816xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005817 name = "global_average_pooling_bench",
5818 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005819 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005820)
5821
5822xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005823 name = "hardswish_bench",
5824 srcs = ["bench/hardswish.cc"],
5825 copts = xnnpack_optional_tflite_copts(),
5826 tags = ["nowin32"],
5827 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5828)
5829
5830xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005831 name = "max_pooling_bench",
5832 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005833 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005834)
5835
5836xnnpack_benchmark(
5837 name = "sigmoid_bench",
5838 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005839 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005840 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005841 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005842)
5843
5844xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005845 name = "prelu_bench",
5846 srcs = ["bench/prelu.cc"],
5847 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005848 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005849 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005850)
5851
5852xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005853 name = "softmax_bench",
5854 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005855 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005856 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005857 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005858)
5859
Marat Dukhan87727142020-06-24 15:24:10 -07005860xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005861 name = "square_root_bench",
5862 srcs = ["bench/square-root.cc"],
5863 copts = xnnpack_optional_tflite_copts(),
5864 tags = ["nowin32"],
5865 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5866)
5867
5868xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005869 name = "truncation_bench",
5870 srcs = ["bench/truncation.cc"],
5871 deps = OPERATOR_BENCHMARK_DEPS,
5872)
5873
Marat Dukhanc068bb62019-10-04 13:24:39 -07005874############################# End-to-end benchmarks ############################
5875
5876cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005877 name = "fp32_mobilenet_v1",
5878 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005879 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005880 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005881 linkstatic = True,
5882 deps = [
5883 ":XNNPACK",
5884 "@pthreadpool",
5885 ],
5886)
5887
5888cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005889 name = "fp32_sparse_mobilenet_v1",
5890 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5891 hdrs = ["models/models.h"],
5892 copts = xnnpack_std_cxxopts(),
5893 linkstatic = True,
5894 deps = [
5895 ":XNNPACK",
5896 "@pthreadpool",
5897 ],
5898)
5899
5900cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005901 name = "fp16_mobilenet_v1",
5902 srcs = ["models/fp16-mobilenet-v1.cc"],
5903 hdrs = ["models/models.h"],
5904 copts = xnnpack_std_cxxopts(),
5905 linkstatic = True,
5906 deps = [
5907 ":XNNPACK",
5908 "@FP16",
5909 "@pthreadpool",
5910 ],
5911)
5912
5913cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005914 name = "qs8_mobilenet_v1",
5915 srcs = ["models/qs8-mobilenet-v1.cc"],
5916 hdrs = ["models/models.h"],
5917 copts = xnnpack_std_cxxopts(),
5918 linkstatic = True,
5919 deps = [
5920 ":XNNPACK",
5921 "@pthreadpool",
5922 ],
5923)
5924
5925cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07005926 name = "qs8_mobilenet_v2",
5927 srcs = ["models/qs8-mobilenet-v2.cc"],
5928 hdrs = ["models/models.h"],
5929 copts = xnnpack_std_cxxopts(),
5930 linkstatic = True,
5931 deps = [
5932 ":XNNPACK",
5933 "@pthreadpool",
5934 ],
5935)
5936
5937cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005938 name = "qu8_mobilenet_v1",
5939 srcs = ["models/qu8-mobilenet-v1.cc"],
5940 hdrs = ["models/models.h"],
5941 copts = xnnpack_std_cxxopts(),
5942 linkstatic = True,
5943 deps = [
5944 ":XNNPACK",
5945 "@pthreadpool",
5946 ],
5947)
5948
5949cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005950 name = "fp32_mobilenet_v2",
5951 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005952 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005953 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005954 linkstatic = True,
5955 deps = [
5956 ":XNNPACK",
5957 "@pthreadpool",
5958 ],
5959)
5960
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005961cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005962 name = "fp32_sparse_mobilenet_v2",
5963 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
5964 hdrs = ["models/models.h"],
5965 copts = xnnpack_std_cxxopts(),
5966 linkstatic = True,
5967 deps = [
5968 ":XNNPACK",
5969 "@pthreadpool",
5970 ],
5971)
5972
5973cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005974 name = "fp16_mobilenet_v2",
5975 srcs = ["models/fp16-mobilenet-v2.cc"],
5976 hdrs = ["models/models.h"],
5977 copts = xnnpack_std_cxxopts(),
5978 linkstatic = True,
5979 deps = [
5980 ":XNNPACK",
5981 "@FP16",
5982 "@pthreadpool",
5983 ],
5984)
5985
5986cc_library(
5987 name = "fp32_mobilenet_v3_large",
5988 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005989 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005990 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005991 linkstatic = True,
5992 deps = [
5993 ":XNNPACK",
5994 "@pthreadpool",
5995 ],
5996)
5997
5998cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005999 name = "fp32_sparse_mobilenet_v3_large",
6000 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6001 hdrs = ["models/models.h"],
6002 copts = xnnpack_std_cxxopts(),
6003 linkstatic = True,
6004 deps = [
6005 ":XNNPACK",
6006 "@pthreadpool",
6007 ],
6008)
6009
6010cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006011 name = "fp16_mobilenet_v3_large",
6012 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6013 hdrs = ["models/models.h"],
6014 copts = xnnpack_std_cxxopts(),
6015 linkstatic = True,
6016 deps = [
6017 ":XNNPACK",
6018 "@FP16",
6019 "@pthreadpool",
6020 ],
6021)
6022
6023cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006024 name = "fp32_mobilenet_v3_small",
6025 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006026 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006027 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006028 linkstatic = True,
6029 deps = [
6030 ":XNNPACK",
6031 "@pthreadpool",
6032 ],
6033)
6034
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006035cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006036 name = "fp32_sparse_mobilenet_v3_small",
6037 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6038 hdrs = ["models/models.h"],
6039 copts = xnnpack_std_cxxopts(),
6040 linkstatic = True,
6041 deps = [
6042 ":XNNPACK",
6043 "@pthreadpool",
6044 ],
6045)
6046
6047cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006048 name = "fp16_mobilenet_v3_small",
6049 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6050 hdrs = ["models/models.h"],
6051 copts = xnnpack_std_cxxopts(),
6052 linkstatic = True,
6053 deps = [
6054 ":XNNPACK",
6055 "@FP16",
6056 "@pthreadpool",
6057 ],
6058)
6059
Marat Dukhanc068bb62019-10-04 13:24:39 -07006060xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006061 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006062 srcs = [
6063 "bench/f32-dwconv-e2e.cc",
6064 "bench/end2end.h",
6065 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006066 deps = MICROKERNEL_BENCHMARK_DEPS + [
6067 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006068 ":fp32_mobilenet_v1",
6069 ":fp32_mobilenet_v2",
6070 ":fp32_mobilenet_v3_large",
6071 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006072 ],
6073)
6074
6075xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006076 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006077 srcs = [
6078 "bench/f32-gemm-e2e.cc",
6079 "bench/end2end.h",
6080 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006081 deps = MICROKERNEL_BENCHMARK_DEPS + [
6082 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006083 ":fp32_mobilenet_v1",
6084 ":fp32_mobilenet_v2",
6085 ":fp32_mobilenet_v3_large",
6086 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006087 ],
6088)
6089
6090xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006091 name = "qs8_gemm_e2e_bench",
6092 srcs = [
6093 "bench/qs8-gemm-e2e.cc",
6094 "bench/end2end.h",
6095 ] + MICROKERNEL_BENCHMARK_HDRS,
6096 deps = MICROKERNEL_BENCHMARK_DEPS + [
6097 ":XNNPACK",
6098 ":qs8_mobilenet_v1",
6099 ":qs8_mobilenet_v2",
6100 ],
6101)
6102
6103xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006104 name = "end2end_bench",
6105 srcs = ["bench/end2end.cc"],
6106 deps = [
6107 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006108 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006109 ":fp16_mobilenet_v1",
6110 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006111 ":fp16_mobilenet_v3_large",
6112 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006113 ":fp32_mobilenet_v1",
6114 ":fp32_mobilenet_v2",
6115 ":fp32_mobilenet_v3_large",
6116 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006117 ":fp32_sparse_mobilenet_v1",
6118 ":fp32_sparse_mobilenet_v2",
6119 ":fp32_sparse_mobilenet_v3_large",
6120 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006121 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006122 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006123 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006124 "@pthreadpool",
6125 ],
6126)
6127
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006128#################### Accuracy evaluation for math functions ####################
6129
6130xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006131 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006132 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006133 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006134 "src/xnnpack/AlignedAllocator.h",
6135 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006136 deps = ACCURACY_EVAL_DEPS + [
6137 ":bench_utils",
6138 "@cpuinfo",
6139 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006140)
6141
Marat Dukhan515c9772019-10-17 18:07:57 -07006142xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006143 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006144 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006145 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006146 "src/xnnpack/AlignedAllocator.h",
6147 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006148 deps = ACCURACY_EVAL_DEPS + [
6149 ":bench_utils",
6150 "@cpuinfo",
6151 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006152)
6153
Marat Dukhan98ba4412019-10-23 02:14:28 -07006154xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006155 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006156 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006157 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006158 "src/xnnpack/AlignedAllocator.h",
6159 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006160 deps = ACCURACY_EVAL_DEPS + [
6161 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006162 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006163 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006164)
6165
6166xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006167 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006168 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006169 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006170 "src/xnnpack/AlignedAllocator.h",
6171 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006172 deps = ACCURACY_EVAL_DEPS + [
6173 ":bench_utils",
6174 "@cpuinfo",
6175 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006176)
6177
Marat Dukhanf44f0222020-12-14 11:53:27 -08006178xnnpack_benchmark(
6179 name = "f32_sigmoid_ulp_eval",
6180 srcs = [
6181 "eval/f32-sigmoid-ulp.cc",
6182 "src/xnnpack/AlignedAllocator.h",
6183 ] + ACCURACY_EVAL_HDRS,
6184 deps = ACCURACY_EVAL_DEPS + [
6185 ":bench_utils",
6186 "@cpuinfo",
6187 ],
6188)
6189
6190xnnpack_benchmark(
6191 name = "f32_sqrt_ulp_eval",
6192 srcs = [
6193 "eval/f32-sqrt-ulp.cc",
6194 "src/xnnpack/AlignedAllocator.h",
6195 ] + ACCURACY_EVAL_HDRS,
6196 deps = ACCURACY_EVAL_DEPS + [
6197 ":bench_utils",
6198 "@cpuinfo",
6199 ],
6200)
6201
6202################### Accuracy verification for math functions ##################
6203
6204xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006205 name = "f32_exp_eval",
6206 srcs = [
6207 "eval/f32-exp.cc",
6208 "src/xnnpack/AlignedAllocator.h",
6209 "src/xnnpack/math-stubs.h",
6210 ] + MICROKERNEL_TEST_HDRS,
6211 automatic = False,
6212 deps = MICROKERNEL_TEST_DEPS,
6213)
6214
6215xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006216 name = "f32_expm1minus_eval",
6217 srcs = [
6218 "eval/f32-expm1minus.cc",
6219 "src/xnnpack/AlignedAllocator.h",
6220 "src/xnnpack/math-stubs.h",
6221 ] + MICROKERNEL_TEST_HDRS,
6222 automatic = False,
6223 deps = MICROKERNEL_TEST_DEPS,
6224)
6225
Marat Dukhan8853b822020-05-07 12:19:01 -07006226xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006227 name = "f32_expminus_eval",
6228 srcs = [
6229 "eval/f32-expminus.cc",
6230 "src/xnnpack/AlignedAllocator.h",
6231 "src/xnnpack/math-stubs.h",
6232 ] + MICROKERNEL_TEST_HDRS,
6233 automatic = False,
6234 deps = MICROKERNEL_TEST_DEPS,
6235)
6236
6237xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006238 name = "f32_roundne_eval",
6239 srcs = [
6240 "eval/f32-roundne.cc",
6241 "src/xnnpack/AlignedAllocator.h",
6242 "src/xnnpack/math-stubs.h",
6243 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006244 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006245 deps = MICROKERNEL_TEST_DEPS,
6246)
6247
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006248xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006249 name = "f32_roundd_eval",
6250 srcs = [
6251 "eval/f32-roundd.cc",
6252 "src/xnnpack/AlignedAllocator.h",
6253 "src/xnnpack/math-stubs.h",
6254 ] + MICROKERNEL_TEST_HDRS,
6255 automatic = False,
6256 deps = MICROKERNEL_TEST_DEPS,
6257)
6258
6259xnnpack_unit_test(
6260 name = "f32_roundu_eval",
6261 srcs = [
6262 "eval/f32-roundu.cc",
6263 "src/xnnpack/AlignedAllocator.h",
6264 "src/xnnpack/math-stubs.h",
6265 ] + MICROKERNEL_TEST_HDRS,
6266 automatic = False,
6267 deps = MICROKERNEL_TEST_DEPS,
6268)
6269
6270xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006271 name = "f32_roundz_eval",
6272 srcs = [
6273 "eval/f32-roundz.cc",
6274 "src/xnnpack/AlignedAllocator.h",
6275 "src/xnnpack/math-stubs.h",
6276 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006277 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006278 deps = MICROKERNEL_TEST_DEPS,
6279)
6280
Marat Dukhan08c4a432019-10-03 09:29:21 -07006281######################### Unit tests for micro-kernels #########################
6282
6283xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006284 name = "f16_dwconv_minmax_test",
6285 srcs = [
6286 "test/f16-dwconv-minmax.cc",
6287 "test/dwconv-microkernel-tester.h",
6288 "src/xnnpack/AlignedAllocator.h",
6289 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6290 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6291)
6292
6293xnnpack_unit_test(
6294 name = "f16_gavgpool_minmax_test",
6295 srcs = [
6296 "test/f16-gavgpool-minmax.cc",
6297 "test/gavgpool-microkernel-tester.h",
6298 "src/xnnpack/AlignedAllocator.h",
6299 ] + MICROKERNEL_TEST_HDRS,
6300 deps = MICROKERNEL_TEST_DEPS,
6301)
6302
6303xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006304 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006305 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006306 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006307 "test/gemm-microkernel-tester.h",
6308 "src/xnnpack/AlignedAllocator.h",
6309 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006310 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006311)
6312
6313xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006314 name = "f16_igemm_minmax_test",
6315 srcs = [
6316 "test/f16-igemm-minmax.cc",
6317 "test/gemm-microkernel-tester.h",
6318 "src/xnnpack/AlignedAllocator.h",
6319 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6320 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6321)
6322
6323xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006324 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006325 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006326 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006327 "test/spmm-microkernel-tester.h",
6328 "src/xnnpack/AlignedAllocator.h",
6329 ] + MICROKERNEL_TEST_HDRS,
6330 deps = MICROKERNEL_TEST_DEPS,
6331)
6332
6333xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006334 name = "f16_vadd_minmax_test",
6335 srcs = [
6336 "test/f16-vadd-minmax.cc",
6337 "test/vbinary-microkernel-tester.h",
6338 ] + MICROKERNEL_TEST_HDRS,
6339 deps = MICROKERNEL_TEST_DEPS,
6340)
6341
6342xnnpack_unit_test(
6343 name = "f16_vaddc_minmax_test",
6344 srcs = [
6345 "test/f16-vaddc-minmax.cc",
6346 "test/vbinaryc-microkernel-tester.h",
6347 ] + MICROKERNEL_TEST_HDRS,
6348 deps = MICROKERNEL_TEST_DEPS,
6349)
6350
6351xnnpack_unit_test(
6352 name = "f16_vclamp_test",
6353 srcs = [
6354 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006355 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006356 ] + MICROKERNEL_TEST_HDRS,
6357 deps = MICROKERNEL_TEST_DEPS,
6358)
6359
6360xnnpack_unit_test(
6361 name = "f16_vdiv_minmax_test",
6362 srcs = [
6363 "test/f16-vdiv-minmax.cc",
6364 "test/vbinary-microkernel-tester.h",
6365 ] + MICROKERNEL_TEST_HDRS,
6366 deps = MICROKERNEL_TEST_DEPS,
6367)
6368
6369xnnpack_unit_test(
6370 name = "f16_vdivc_minmax_test",
6371 srcs = [
6372 "test/f16-vdivc-minmax.cc",
6373 "test/vbinaryc-microkernel-tester.h",
6374 ] + MICROKERNEL_TEST_HDRS,
6375 deps = MICROKERNEL_TEST_DEPS,
6376)
6377
6378xnnpack_unit_test(
6379 name = "f16_vrdivc_minmax_test",
6380 srcs = [
6381 "test/f16-vrdivc-minmax.cc",
6382 "test/vbinaryc-microkernel-tester.h",
6383 ] + MICROKERNEL_TEST_HDRS,
6384 deps = MICROKERNEL_TEST_DEPS,
6385)
6386
6387xnnpack_unit_test(
6388 name = "f16_vhswish_test",
6389 srcs = [
6390 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006391 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006392 ] + MICROKERNEL_TEST_HDRS,
6393 deps = MICROKERNEL_TEST_DEPS,
6394)
6395
6396xnnpack_unit_test(
6397 name = "f16_vmax_test",
6398 srcs = [
6399 "test/f16-vmax.cc",
6400 "test/vbinary-microkernel-tester.h",
6401 ] + MICROKERNEL_TEST_HDRS,
6402 deps = MICROKERNEL_TEST_DEPS,
6403)
6404
6405xnnpack_unit_test(
6406 name = "f16_vmaxc_test",
6407 srcs = [
6408 "test/f16-vmaxc.cc",
6409 "test/vbinaryc-microkernel-tester.h",
6410 ] + MICROKERNEL_TEST_HDRS,
6411 deps = MICROKERNEL_TEST_DEPS,
6412)
6413
6414xnnpack_unit_test(
6415 name = "f16_vmin_test",
6416 srcs = [
6417 "test/f16-vmin.cc",
6418 "test/vbinary-microkernel-tester.h",
6419 ] + MICROKERNEL_TEST_HDRS,
6420 deps = MICROKERNEL_TEST_DEPS,
6421)
6422
6423xnnpack_unit_test(
6424 name = "f16_vminc_test",
6425 srcs = [
6426 "test/f16-vminc.cc",
6427 "test/vbinaryc-microkernel-tester.h",
6428 ] + MICROKERNEL_TEST_HDRS,
6429 deps = MICROKERNEL_TEST_DEPS,
6430)
6431
6432xnnpack_unit_test(
6433 name = "f16_vmul_minmax_test",
6434 srcs = [
6435 "test/f16-vmul-minmax.cc",
6436 "test/vbinary-microkernel-tester.h",
6437 ] + MICROKERNEL_TEST_HDRS,
6438 deps = MICROKERNEL_TEST_DEPS,
6439)
6440
6441xnnpack_unit_test(
6442 name = "f16_vmulc_minmax_test",
6443 srcs = [
6444 "test/f16-vmulc-minmax.cc",
6445 "test/vbinaryc-microkernel-tester.h",
6446 ] + MICROKERNEL_TEST_HDRS,
6447 deps = MICROKERNEL_TEST_DEPS,
6448)
6449
6450xnnpack_unit_test(
6451 name = "f16_vmulcaddc_minmax_test",
6452 srcs = [
6453 "test/f16-vmulcaddc-minmax.cc",
6454 "test/vmulcaddc-microkernel-tester.h",
6455 "src/xnnpack/AlignedAllocator.h",
6456 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6457 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6458)
6459
6460xnnpack_unit_test(
6461 name = "f16_vsub_minmax_test",
6462 srcs = [
6463 "test/f16-vsub-minmax.cc",
6464 "test/vbinary-microkernel-tester.h",
6465 ] + MICROKERNEL_TEST_HDRS,
6466 deps = MICROKERNEL_TEST_DEPS,
6467)
6468
6469xnnpack_unit_test(
6470 name = "f16_vsubc_minmax_test",
6471 srcs = [
6472 "test/f16-vsubc-minmax.cc",
6473 "test/vbinaryc-microkernel-tester.h",
6474 ] + MICROKERNEL_TEST_HDRS,
6475 deps = MICROKERNEL_TEST_DEPS,
6476)
6477
6478xnnpack_unit_test(
6479 name = "f16_vrsubc_minmax_test",
6480 srcs = [
6481 "test/f16-vrsubc-minmax.cc",
6482 "test/vbinaryc-microkernel-tester.h",
6483 ] + MICROKERNEL_TEST_HDRS,
6484 deps = MICROKERNEL_TEST_DEPS,
6485)
6486
6487xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006488 name = "f32_argmaxpool_test",
6489 srcs = [
6490 "test/f32-argmaxpool.cc",
6491 "test/argmaxpool-microkernel-tester.h",
6492 "src/xnnpack/AlignedAllocator.h",
6493 ] + MICROKERNEL_TEST_HDRS,
6494 deps = MICROKERNEL_TEST_DEPS,
6495)
6496
6497xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006498 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006499 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006500 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006501 "test/avgpool-microkernel-tester.h",
6502 "src/xnnpack/AlignedAllocator.h",
6503 ] + MICROKERNEL_TEST_HDRS,
6504 deps = MICROKERNEL_TEST_DEPS,
6505)
6506
6507xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006508 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006509 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006510 "test/f32-ibilinear.cc",
6511 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006512 "src/xnnpack/AlignedAllocator.h",
6513 ] + MICROKERNEL_TEST_HDRS,
6514 deps = MICROKERNEL_TEST_DEPS,
6515)
6516
6517xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006518 name = "f32_ibilinear_chw_test",
6519 srcs = [
6520 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006521 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006522 "src/xnnpack/AlignedAllocator.h",
6523 ] + MICROKERNEL_TEST_HDRS,
6524 deps = MICROKERNEL_TEST_DEPS,
6525)
6526
6527xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006528 name = "f32_igemm_test",
6529 srcs = [
6530 "test/f32-igemm.cc",
6531 "test/gemm-microkernel-tester.h",
6532 "src/xnnpack/AlignedAllocator.h",
6533 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006534 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006535)
6536
6537xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006538 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006539 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006540 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006541 "test/gemm-microkernel-tester.h",
6542 "src/xnnpack/AlignedAllocator.h",
6543 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006544 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006545)
6546
6547xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006548 name = "f32_igemm_minmax_test",
6549 srcs = [
6550 "test/f32-igemm-minmax.cc",
6551 "test/gemm-microkernel-tester.h",
6552 "src/xnnpack/AlignedAllocator.h",
6553 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006554 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006555)
6556
6557xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006558 name = "f32_conv_hwc_test",
6559 srcs = [
6560 "test/f32-conv-hwc.cc",
6561 "test/conv-hwc-microkernel-tester.h",
6562 "src/xnnpack/AlignedAllocator.h",
6563 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006564 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006565)
6566
6567xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006568 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006569 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006570 "test/f32-conv-hwc2chw.cc",
6571 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006572 "src/xnnpack/AlignedAllocator.h",
6573 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006574 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006575)
6576
6577xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006578 name = "f32_dwconv_test",
6579 srcs = [
6580 "test/f32-dwconv.cc",
6581 "test/dwconv-microkernel-tester.h",
6582 "src/xnnpack/AlignedAllocator.h",
6583 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006584 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006585)
6586
6587xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006588 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006589 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006590 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006591 "test/dwconv-microkernel-tester.h",
6592 "src/xnnpack/AlignedAllocator.h",
6593 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006594 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006595)
6596
6597xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006598 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006599 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006600 "test/f32-dwconv2d-chw.cc",
6601 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006602 "src/xnnpack/AlignedAllocator.h",
6603 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006604 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006605)
6606
6607xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006608 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006609 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006610 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006611 "test/gavgpool-microkernel-tester.h",
6612 "src/xnnpack/AlignedAllocator.h",
6613 ] + MICROKERNEL_TEST_HDRS,
6614 deps = MICROKERNEL_TEST_DEPS,
6615)
6616
6617xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006618 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006619 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006620 "test/f32-gavgpool-cw.cc",
6621 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006622 "src/xnnpack/AlignedAllocator.h",
6623 ] + MICROKERNEL_TEST_HDRS,
6624 deps = MICROKERNEL_TEST_DEPS,
6625)
6626
6627xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006628 name = "f32_gemm_test",
6629 srcs = [
6630 "test/f32-gemm.cc",
6631 "test/gemm-microkernel-tester.h",
6632 "src/xnnpack/AlignedAllocator.h",
6633 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006634 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006635)
6636
6637xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006638 name = "f32_gemm_relu_test",
6639 srcs = [
6640 "test/f32-gemm-relu.cc",
6641 "test/gemm-microkernel-tester.h",
6642 "src/xnnpack/AlignedAllocator.h",
6643 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006644 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006645)
6646
6647xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006648 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006649 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006650 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006651 "test/gemm-microkernel-tester.h",
6652 "src/xnnpack/AlignedAllocator.h",
6653 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006654 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006655)
6656
6657xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006658 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006659 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006660 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006661 "test/gemm-microkernel-tester.h",
6662 "src/xnnpack/AlignedAllocator.h",
6663 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006664 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006665)
6666
6667xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006668 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006669 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006670 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006671 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006672 ] + MICROKERNEL_TEST_HDRS,
6673 deps = MICROKERNEL_TEST_DEPS,
6674)
6675
6676xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006677 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006678 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006679 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006680 "test/maxpool-microkernel-tester.h",
6681 ] + MICROKERNEL_TEST_HDRS,
6682 deps = MICROKERNEL_TEST_DEPS,
6683)
6684
6685xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006686 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006687 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006688 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006689 "test/avgpool-microkernel-tester.h",
6690 "src/xnnpack/AlignedAllocator.h",
6691 ] + MICROKERNEL_TEST_HDRS,
6692 deps = MICROKERNEL_TEST_DEPS,
6693)
6694
6695xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006696 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006697 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006698 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006699 "test/gemm-microkernel-tester.h",
6700 "src/xnnpack/AlignedAllocator.h",
6701 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006702 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006703)
6704
6705xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006706 name = "f16_prelu_test",
6707 srcs = [
6708 "test/f16-prelu.cc",
6709 "test/prelu-microkernel-tester.h",
6710 "src/xnnpack/AlignedAllocator.h",
6711 ] + MICROKERNEL_TEST_HDRS,
6712 deps = MICROKERNEL_TEST_DEPS,
6713)
6714
6715xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006716 name = "f32_prelu_test",
6717 srcs = [
6718 "test/f32-prelu.cc",
6719 "test/prelu-microkernel-tester.h",
6720 "src/xnnpack/AlignedAllocator.h",
6721 ] + MICROKERNEL_TEST_HDRS,
6722 deps = MICROKERNEL_TEST_DEPS,
6723)
6724
6725xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006726 name = "f32_raddexpminusmax_test",
6727 srcs = [
6728 "test/f32-raddexpminusmax.cc",
6729 "test/raddexpminusmax-microkernel-tester.h",
6730 ] + MICROKERNEL_TEST_HDRS,
6731 deps = MICROKERNEL_TEST_DEPS,
6732)
6733
6734xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006735 name = "f32_raddextexp_test",
6736 srcs = [
6737 "test/f32-raddextexp.cc",
6738 "test/raddextexp-microkernel-tester.h",
6739 ] + MICROKERNEL_TEST_HDRS,
6740 deps = MICROKERNEL_TEST_DEPS,
6741)
6742
6743xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006744 name = "f32_raddstoreexpminusmax_test",
6745 srcs = [
6746 "test/f32-raddstoreexpminusmax.cc",
6747 "test/raddstoreexpminusmax-microkernel-tester.h",
6748 ] + MICROKERNEL_TEST_HDRS,
6749 deps = MICROKERNEL_TEST_DEPS,
6750)
6751
6752xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006753 name = "f32_rmax_test",
6754 srcs = [
6755 "test/f32-rmax.cc",
6756 "test/rmax-microkernel-tester.h",
6757 ] + MICROKERNEL_TEST_HDRS,
6758 deps = MICROKERNEL_TEST_DEPS,
6759)
6760
6761xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006762 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006763 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006764 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006765 "test/spmm-microkernel-tester.h",
6766 "src/xnnpack/AlignedAllocator.h",
6767 ] + MICROKERNEL_TEST_HDRS,
6768 deps = MICROKERNEL_TEST_DEPS,
6769)
6770
6771xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006772 name = "f32_vabs_test",
6773 srcs = [
6774 "test/f32-vabs.cc",
6775 "test/vunary-microkernel-tester.h",
6776 ] + MICROKERNEL_TEST_HDRS,
6777 deps = MICROKERNEL_TEST_DEPS,
6778)
6779
6780xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006781 name = "f32_vadd_test",
6782 srcs = [
6783 "test/f32-vadd.cc",
6784 "test/vbinary-microkernel-tester.h",
6785 ] + MICROKERNEL_TEST_HDRS,
6786 deps = MICROKERNEL_TEST_DEPS,
6787)
6788
6789xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006790 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006791 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006792 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006793 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006794 ] + MICROKERNEL_TEST_HDRS,
6795 deps = MICROKERNEL_TEST_DEPS,
6796)
6797
6798xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006799 name = "f32_vadd_relu_test",
6800 srcs = [
6801 "test/f32-vadd-relu.cc",
6802 "test/vbinary-microkernel-tester.h",
6803 ] + MICROKERNEL_TEST_HDRS,
6804 deps = MICROKERNEL_TEST_DEPS,
6805)
6806
6807xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006808 name = "f32_vaddc_test",
6809 srcs = [
6810 "test/f32-vaddc.cc",
6811 "test/vbinaryc-microkernel-tester.h",
6812 ] + MICROKERNEL_TEST_HDRS,
6813 deps = MICROKERNEL_TEST_DEPS,
6814)
6815
6816xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006817 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006818 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006819 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006820 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006821 ] + MICROKERNEL_TEST_HDRS,
6822 deps = MICROKERNEL_TEST_DEPS,
6823)
6824
6825xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006826 name = "f32_vaddc_relu_test",
6827 srcs = [
6828 "test/f32-vaddc-relu.cc",
6829 "test/vbinaryc-microkernel-tester.h",
6830 ] + MICROKERNEL_TEST_HDRS,
6831 deps = MICROKERNEL_TEST_DEPS,
6832)
6833
6834xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006835 name = "f32_vclamp_test",
6836 srcs = [
6837 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006838 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006839 ] + MICROKERNEL_TEST_HDRS,
6840 deps = MICROKERNEL_TEST_DEPS,
6841)
6842
6843xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006844 name = "f32_vdiv_test",
6845 srcs = [
6846 "test/f32-vdiv.cc",
6847 "test/vbinary-microkernel-tester.h",
6848 ] + MICROKERNEL_TEST_HDRS,
6849 deps = MICROKERNEL_TEST_DEPS,
6850)
6851
6852xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006853 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006854 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006855 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006856 "test/vbinary-microkernel-tester.h",
6857 ] + MICROKERNEL_TEST_HDRS,
6858 deps = MICROKERNEL_TEST_DEPS,
6859)
6860
6861xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006862 name = "f32_vdiv_relu_test",
6863 srcs = [
6864 "test/f32-vdiv-relu.cc",
6865 "test/vbinary-microkernel-tester.h",
6866 ] + MICROKERNEL_TEST_HDRS,
6867 deps = MICROKERNEL_TEST_DEPS,
6868)
6869
6870xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006871 name = "f32_vdivc_test",
6872 srcs = [
6873 "test/f32-vdivc.cc",
6874 "test/vbinaryc-microkernel-tester.h",
6875 ] + MICROKERNEL_TEST_HDRS,
6876 deps = MICROKERNEL_TEST_DEPS,
6877)
6878
6879xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006880 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006881 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006882 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006883 "test/vbinaryc-microkernel-tester.h",
6884 ] + MICROKERNEL_TEST_HDRS,
6885 deps = MICROKERNEL_TEST_DEPS,
6886)
6887
6888xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006889 name = "f32_vdivc_relu_test",
6890 srcs = [
6891 "test/f32-vdivc-relu.cc",
6892 "test/vbinaryc-microkernel-tester.h",
6893 ] + MICROKERNEL_TEST_HDRS,
6894 deps = MICROKERNEL_TEST_DEPS,
6895)
6896
6897xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006898 name = "f32_vrdivc_test",
6899 srcs = [
6900 "test/f32-vrdivc.cc",
6901 "test/vbinaryc-microkernel-tester.h",
6902 ] + MICROKERNEL_TEST_HDRS,
6903 deps = MICROKERNEL_TEST_DEPS,
6904)
6905
6906xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006907 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006908 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006909 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006910 "test/vbinaryc-microkernel-tester.h",
6911 ] + MICROKERNEL_TEST_HDRS,
6912 deps = MICROKERNEL_TEST_DEPS,
6913)
6914
6915xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006916 name = "f32_vrdivc_relu_test",
6917 srcs = [
6918 "test/f32-vrdivc-relu.cc",
6919 "test/vbinaryc-microkernel-tester.h",
6920 ] + MICROKERNEL_TEST_HDRS,
6921 deps = MICROKERNEL_TEST_DEPS,
6922)
6923
6924xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006925 name = "f32_velu_test",
6926 srcs = [
6927 "test/f32-velu.cc",
6928 "test/vunary-microkernel-tester.h",
6929 ] + MICROKERNEL_TEST_HDRS,
6930 deps = MICROKERNEL_TEST_DEPS,
6931)
6932
6933xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08006934 name = "f32_vmax_test",
6935 srcs = [
6936 "test/f32-vmax.cc",
6937 "test/vbinary-microkernel-tester.h",
6938 ] + MICROKERNEL_TEST_HDRS,
6939 deps = MICROKERNEL_TEST_DEPS,
6940)
6941
6942xnnpack_unit_test(
6943 name = "f32_vmaxc_test",
6944 srcs = [
6945 "test/f32-vmaxc.cc",
6946 "test/vbinaryc-microkernel-tester.h",
6947 ] + MICROKERNEL_TEST_HDRS,
6948 deps = MICROKERNEL_TEST_DEPS,
6949)
6950
6951xnnpack_unit_test(
6952 name = "f32_vmin_test",
6953 srcs = [
6954 "test/f32-vmin.cc",
6955 "test/vbinary-microkernel-tester.h",
6956 ] + MICROKERNEL_TEST_HDRS,
6957 deps = MICROKERNEL_TEST_DEPS,
6958)
6959
6960xnnpack_unit_test(
6961 name = "f32_vminc_test",
6962 srcs = [
6963 "test/f32-vminc.cc",
6964 "test/vbinaryc-microkernel-tester.h",
6965 ] + MICROKERNEL_TEST_HDRS,
6966 deps = MICROKERNEL_TEST_DEPS,
6967)
6968
6969xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006970 name = "f32_vmul_test",
6971 srcs = [
6972 "test/f32-vmul.cc",
6973 "test/vbinary-microkernel-tester.h",
6974 ] + MICROKERNEL_TEST_HDRS,
6975 deps = MICROKERNEL_TEST_DEPS,
6976)
6977
6978xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006979 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006980 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006981 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006982 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006983 ] + MICROKERNEL_TEST_HDRS,
6984 deps = MICROKERNEL_TEST_DEPS,
6985)
6986
6987xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006988 name = "f32_vmul_relu_test",
6989 srcs = [
6990 "test/f32-vmul-relu.cc",
6991 "test/vbinary-microkernel-tester.h",
6992 ] + MICROKERNEL_TEST_HDRS,
6993 deps = MICROKERNEL_TEST_DEPS,
6994)
6995
6996xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006997 name = "f32_vmulc_test",
6998 srcs = [
6999 "test/f32-vmulc.cc",
7000 "test/vbinaryc-microkernel-tester.h",
7001 ] + MICROKERNEL_TEST_HDRS,
7002 deps = MICROKERNEL_TEST_DEPS,
7003)
7004
7005xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007006 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007007 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007008 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007009 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007010 ] + MICROKERNEL_TEST_HDRS,
7011 deps = MICROKERNEL_TEST_DEPS,
7012)
7013
7014xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007015 name = "f32_vmulc_relu_test",
7016 srcs = [
7017 "test/f32-vmulc-relu.cc",
7018 "test/vbinaryc-microkernel-tester.h",
7019 ] + MICROKERNEL_TEST_HDRS,
7020 deps = MICROKERNEL_TEST_DEPS,
7021)
7022
7023xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007024 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007025 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007026 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007027 "test/vmulcaddc-microkernel-tester.h",
7028 "src/xnnpack/AlignedAllocator.h",
7029 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007030 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007031)
7032
7033xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007034 name = "f32_vlrelu_test",
7035 srcs = [
7036 "test/f32-vlrelu.cc",
7037 "test/vunary-microkernel-tester.h",
7038 ] + MICROKERNEL_TEST_HDRS,
7039 deps = MICROKERNEL_TEST_DEPS,
7040)
7041
7042xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007043 name = "f32_vneg_test",
7044 srcs = [
7045 "test/f32-vneg.cc",
7046 "test/vunary-microkernel-tester.h",
7047 ] + MICROKERNEL_TEST_HDRS,
7048 deps = MICROKERNEL_TEST_DEPS,
7049)
7050
7051xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007052 name = "f32_vrelu_test",
7053 srcs = [
7054 "test/f32-vrelu.cc",
7055 "test/vunary-microkernel-tester.h",
7056 ] + MICROKERNEL_TEST_HDRS,
7057 deps = MICROKERNEL_TEST_DEPS,
7058)
7059
7060xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007061 name = "f32_vrndne_test",
7062 srcs = [
7063 "test/f32-vrndne.cc",
7064 "test/vunary-microkernel-tester.h",
7065 ] + MICROKERNEL_TEST_HDRS,
7066 deps = MICROKERNEL_TEST_DEPS,
7067)
7068
7069xnnpack_unit_test(
7070 name = "f32_vrndz_test",
7071 srcs = [
7072 "test/f32-vrndz.cc",
7073 "test/vunary-microkernel-tester.h",
7074 ] + MICROKERNEL_TEST_HDRS,
7075 deps = MICROKERNEL_TEST_DEPS,
7076)
7077
7078xnnpack_unit_test(
7079 name = "f32_vrndu_test",
7080 srcs = [
7081 "test/f32-vrndu.cc",
7082 "test/vunary-microkernel-tester.h",
7083 ] + MICROKERNEL_TEST_HDRS,
7084 deps = MICROKERNEL_TEST_DEPS,
7085)
7086
7087xnnpack_unit_test(
7088 name = "f32_vrndd_test",
7089 srcs = [
7090 "test/f32-vrndd.cc",
7091 "test/vunary-microkernel-tester.h",
7092 ] + MICROKERNEL_TEST_HDRS,
7093 deps = MICROKERNEL_TEST_DEPS,
7094)
7095
7096xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007097 name = "f32_vscale_test",
7098 srcs = [
7099 "test/f32-vscale.cc",
7100 "test/vscale-microkernel-tester.h",
7101 ] + MICROKERNEL_TEST_HDRS,
7102 deps = MICROKERNEL_TEST_DEPS,
7103)
7104
7105xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007106 name = "f32_vscaleexpminusmax_test",
7107 srcs = [
7108 "test/f32-vscaleexpminusmax.cc",
7109 "test/vscaleexpminusmax-microkernel-tester.h",
7110 ] + MICROKERNEL_TEST_HDRS,
7111 deps = MICROKERNEL_TEST_DEPS,
7112)
7113
7114xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007115 name = "f32_vscaleextexp_test",
7116 srcs = [
7117 "test/f32-vscaleextexp.cc",
7118 "test/vscaleextexp-microkernel-tester.h",
7119 ] + MICROKERNEL_TEST_HDRS,
7120 deps = MICROKERNEL_TEST_DEPS,
7121)
7122
7123xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007124 name = "f32_vsigmoid_test",
7125 srcs = [
7126 "test/f32-vsigmoid.cc",
7127 "test/vunary-microkernel-tester.h",
7128 ] + MICROKERNEL_TEST_HDRS,
7129 deps = MICROKERNEL_TEST_DEPS,
7130)
7131
7132xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007133 name = "f32_vsqr_test",
7134 srcs = [
7135 "test/f32-vsqr.cc",
7136 "test/vunary-microkernel-tester.h",
7137 ] + MICROKERNEL_TEST_HDRS,
7138 deps = MICROKERNEL_TEST_DEPS,
7139)
7140
7141xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007142 name = "f32_vsqrdiff_test",
7143 srcs = [
7144 "test/f32-vsqrdiff.cc",
7145 "test/vbinary-microkernel-tester.h",
7146 ] + MICROKERNEL_TEST_HDRS,
7147 deps = MICROKERNEL_TEST_DEPS,
7148)
7149
7150xnnpack_unit_test(
7151 name = "f32_vsqrdiffc_test",
7152 srcs = [
7153 "test/f32-vsqrdiffc.cc",
7154 "test/vbinaryc-microkernel-tester.h",
7155 ] + MICROKERNEL_TEST_HDRS,
7156 deps = MICROKERNEL_TEST_DEPS,
7157)
7158
7159xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007160 name = "f32_vsqrt_test",
7161 srcs = [
7162 "test/f32-vsqrt.cc",
7163 "test/vunary-microkernel-tester.h",
7164 ] + MICROKERNEL_TEST_HDRS,
7165 deps = MICROKERNEL_TEST_DEPS,
7166)
7167
7168xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007169 name = "f32_vsub_test",
7170 srcs = [
7171 "test/f32-vsub.cc",
7172 "test/vbinary-microkernel-tester.h",
7173 ] + MICROKERNEL_TEST_HDRS,
7174 deps = MICROKERNEL_TEST_DEPS,
7175)
7176
7177xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007178 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007179 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007180 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007181 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007182 ] + MICROKERNEL_TEST_HDRS,
7183 deps = MICROKERNEL_TEST_DEPS,
7184)
7185
7186xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007187 name = "f32_vsub_relu_test",
7188 srcs = [
7189 "test/f32-vsub-relu.cc",
7190 "test/vbinary-microkernel-tester.h",
7191 ] + MICROKERNEL_TEST_HDRS,
7192 deps = MICROKERNEL_TEST_DEPS,
7193)
7194
7195xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007196 name = "f32_vsubc_test",
7197 srcs = [
7198 "test/f32-vsubc.cc",
7199 "test/vbinaryc-microkernel-tester.h",
7200 ] + MICROKERNEL_TEST_HDRS,
7201 deps = MICROKERNEL_TEST_DEPS,
7202)
7203
7204xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007205 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007206 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007207 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007208 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007209 ] + MICROKERNEL_TEST_HDRS,
7210 deps = MICROKERNEL_TEST_DEPS,
7211)
7212
7213xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007214 name = "f32_vsubc_relu_test",
7215 srcs = [
7216 "test/f32-vsubc-relu.cc",
7217 "test/vbinaryc-microkernel-tester.h",
7218 ] + MICROKERNEL_TEST_HDRS,
7219 deps = MICROKERNEL_TEST_DEPS,
7220)
7221
7222xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007223 name = "f32_vrsubc_test",
7224 srcs = [
7225 "test/f32-vrsubc.cc",
7226 "test/vbinaryc-microkernel-tester.h",
7227 ] + MICROKERNEL_TEST_HDRS,
7228 deps = MICROKERNEL_TEST_DEPS,
7229)
7230
7231xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007232 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007233 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007234 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007235 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007236 ] + MICROKERNEL_TEST_HDRS,
7237 deps = MICROKERNEL_TEST_DEPS,
7238)
7239
7240xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007241 name = "f32_vrsubc_relu_test",
7242 srcs = [
7243 "test/f32-vrsubc-relu.cc",
7244 "test/vbinaryc-microkernel-tester.h",
7245 ] + MICROKERNEL_TEST_HDRS,
7246 deps = MICROKERNEL_TEST_DEPS,
7247)
7248
7249xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007250 name = "qc8_dwconv_minmax_fp32_test",
7251 timeout = "moderate",
7252 srcs = [
7253 "test/qc8-dwconv-minmax-fp32.cc",
7254 "test/dwconv-microkernel-tester.h",
7255 "src/xnnpack/AlignedAllocator.h",
7256 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7257 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7258)
7259
7260xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007261 name = "qc8_gemm_minmax_fp32_test",
7262 timeout = "moderate",
7263 srcs = [
7264 "test/qc8-gemm-minmax-fp32.cc",
7265 "test/gemm-microkernel-tester.h",
7266 "src/xnnpack/AlignedAllocator.h",
7267 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7268 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7269)
7270
7271xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007272 name = "qc8_igemm_minmax_fp32_test",
7273 timeout = "moderate",
7274 srcs = [
7275 "test/qc8-igemm-minmax-fp32.cc",
7276 "test/gemm-microkernel-tester.h",
7277 "src/xnnpack/AlignedAllocator.h",
7278 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7279 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7280)
7281
7282xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007283 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007284 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007285 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007286 "test/dwconv-microkernel-tester.h",
7287 "src/xnnpack/AlignedAllocator.h",
7288 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7289 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7290)
7291
7292xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007293 name = "qs8_dwconv_minmax_fp32_test",
7294 srcs = [
7295 "test/qs8-dwconv-minmax-fp32.cc",
7296 "test/dwconv-microkernel-tester.h",
7297 "src/xnnpack/AlignedAllocator.h",
7298 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7299 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7300)
7301
7302xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007303 name = "qs8_gavgpool_minmax_test",
7304 srcs = [
7305 "test/qs8-gavgpool-minmax.cc",
7306 "test/gavgpool-microkernel-tester.h",
7307 "src/xnnpack/AlignedAllocator.h",
7308 ] + MICROKERNEL_TEST_HDRS,
7309 deps = MICROKERNEL_TEST_DEPS,
7310)
7311
7312xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007313 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007314 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007315 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007316 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007317 "test/gemm-microkernel-tester.h",
7318 "src/xnnpack/AlignedAllocator.h",
7319 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7320 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7321)
7322
7323xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007324 name = "qs8_gemm_minmax_fp32_test",
7325 timeout = "moderate",
7326 srcs = [
7327 "test/qs8-gemm-minmax-fp32.cc",
7328 "test/gemm-microkernel-tester.h",
7329 "src/xnnpack/AlignedAllocator.h",
7330 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7331 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7332)
7333
7334xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007335 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007336 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007337 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007338 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007339 "test/gemm-microkernel-tester.h",
7340 "src/xnnpack/AlignedAllocator.h",
7341 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7342 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7343)
7344
7345xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007346 name = "qs8_igemm_minmax_fp32_test",
7347 timeout = "moderate",
7348 srcs = [
7349 "test/qs8-igemm-minmax-fp32.cc",
7350 "test/gemm-microkernel-tester.h",
7351 "src/xnnpack/AlignedAllocator.h",
7352 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7353 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7354)
7355
7356xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007357 name = "qs8_requantization_test",
7358 srcs = [
7359 "src/xnnpack/requantization-stubs.h",
7360 "test/qs8-requantization.cc",
7361 "test/requantization-tester.h",
7362 ] + MICROKERNEL_TEST_HDRS,
7363 deps = MICROKERNEL_TEST_DEPS,
7364)
7365
7366xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007367 name = "qs8_vadd_minmax_test",
7368 srcs = [
7369 "test/qs8-vadd-minmax.cc",
7370 "test/vadd-microkernel-tester.h",
7371 ] + MICROKERNEL_TEST_HDRS,
7372 deps = MICROKERNEL_TEST_DEPS,
7373)
7374
7375xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007376 name = "qs8_vaddc_minmax_test",
7377 srcs = [
7378 "test/qs8-vaddc-minmax.cc",
7379 "test/vaddc-microkernel-tester.h",
7380 ] + MICROKERNEL_TEST_HDRS,
7381 deps = MICROKERNEL_TEST_DEPS,
7382)
7383
7384xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007385 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007386 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007387 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007388 "test/avgpool-microkernel-tester.h",
7389 "src/xnnpack/AlignedAllocator.h",
7390 ] + MICROKERNEL_TEST_HDRS,
7391 deps = MICROKERNEL_TEST_DEPS,
7392)
7393
7394xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007395 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007396 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007397 "test/qu8-dwconv-minmax.cc",
7398 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007399 "src/xnnpack/AlignedAllocator.h",
7400 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007401 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007402)
7403
7404xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007405 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007406 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007407 "test/qu8-igemm-minmax.cc",
7408 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007409 "src/xnnpack/AlignedAllocator.h",
7410 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007411 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007412)
7413
7414xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007415 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007416 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007417 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007418 "test/gavgpool-microkernel-tester.h",
7419 "src/xnnpack/AlignedAllocator.h",
7420 ] + MICROKERNEL_TEST_HDRS,
7421 deps = MICROKERNEL_TEST_DEPS,
7422)
7423
7424xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007425 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007426 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007427 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007428 "test/gemm-microkernel-tester.h",
7429 "src/xnnpack/AlignedAllocator.h",
7430 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007431 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007432)
7433
7434xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007435 name = "qu8_requantization_test",
7436 srcs = [
7437 "src/xnnpack/requantization-stubs.h",
7438 "test/qu8-requantization.cc",
7439 "test/requantization-tester.h",
7440 ] + MICROKERNEL_TEST_HDRS,
7441 deps = MICROKERNEL_TEST_DEPS,
7442)
7443
7444xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007445 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007446 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007447 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007448 "test/vadd-microkernel-tester.h",
7449 ] + MICROKERNEL_TEST_HDRS,
7450 deps = MICROKERNEL_TEST_DEPS,
7451)
7452
7453xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007454 name = "u8_lut32norm_test",
7455 srcs = [
7456 "test/u8-lut32norm.cc",
7457 "test/lut-norm-microkernel-tester.h",
7458 ] + MICROKERNEL_TEST_HDRS,
7459 deps = MICROKERNEL_TEST_DEPS,
7460)
7461
7462xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007463 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007464 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007465 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007466 "test/maxpool-microkernel-tester.h",
7467 ] + MICROKERNEL_TEST_HDRS,
7468 deps = MICROKERNEL_TEST_DEPS,
7469)
7470
7471xnnpack_unit_test(
7472 name = "u8_rmax_test",
7473 srcs = [
7474 "test/u8-rmax.cc",
7475 "test/rmax-microkernel-tester.h",
7476 ] + MICROKERNEL_TEST_HDRS,
7477 deps = MICROKERNEL_TEST_DEPS,
7478)
7479
7480xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007481 name = "u8_vclamp_test",
7482 srcs = [
7483 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007484 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007485 ] + MICROKERNEL_TEST_HDRS,
7486 deps = MICROKERNEL_TEST_DEPS,
7487)
7488
7489xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007490 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007491 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007492 "test/x32-depthtospace2d-chw2hwc.cc",
7493 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007494 ] + MICROKERNEL_TEST_HDRS,
7495 deps = MICROKERNEL_TEST_DEPS,
7496)
7497
7498xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007499 name = "x32_fill_test",
7500 srcs = [
7501 "test/x32-fill.cc",
7502 "test/fill-microkernel-tester.h",
7503 ] + MICROKERNEL_TEST_HDRS,
7504 deps = MICROKERNEL_TEST_DEPS,
7505)
7506
7507xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007508 name = "x32_packx_test",
7509 srcs = [
7510 "test/x32-packx.cc",
7511 "test/pack-microkernel-tester.h",
7512 "src/xnnpack/AlignedAllocator.h",
7513 ] + MICROKERNEL_TEST_HDRS,
7514 deps = MICROKERNEL_TEST_DEPS,
7515)
7516
7517xnnpack_unit_test(
7518 name = "x32_pad_test",
7519 srcs = [
7520 "test/x32-pad.cc",
7521 "test/pad-microkernel-tester.h",
7522 ] + MICROKERNEL_TEST_HDRS,
7523 deps = MICROKERNEL_TEST_DEPS,
7524)
7525
7526xnnpack_unit_test(
7527 name = "x32_unpool_test",
7528 srcs = [
7529 "test/x32-unpool.cc",
7530 "test/unpool-microkernel-tester.h",
7531 ] + MICROKERNEL_TEST_HDRS,
7532 deps = MICROKERNEL_TEST_DEPS,
7533)
7534
7535xnnpack_unit_test(
7536 name = "x32_zip_test",
7537 srcs = [
7538 "test/x32-zip.cc",
7539 "test/zip-microkernel-tester.h",
7540 ] + MICROKERNEL_TEST_HDRS,
7541 deps = MICROKERNEL_TEST_DEPS,
7542)
7543
7544xnnpack_unit_test(
7545 name = "x8_lut_test",
7546 srcs = [
7547 "test/x8-lut.cc",
7548 "test/lut-microkernel-tester.h",
7549 ] + MICROKERNEL_TEST_HDRS,
7550 deps = MICROKERNEL_TEST_DEPS,
7551)
7552
7553xnnpack_unit_test(
7554 name = "x8_zip_test",
7555 srcs = [
7556 "test/x8-zip.cc",
7557 "test/zip-microkernel-tester.h",
7558 ] + MICROKERNEL_TEST_HDRS,
7559 deps = MICROKERNEL_TEST_DEPS,
7560)
7561
Marat Dukhan20c3b922020-03-10 03:45:06 -07007562########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007563
7564xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007565 name = "operator_size_test",
7566 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007567 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007568)
7569
Marat Dukhan20c3b922020-03-10 03:45:06 -07007570xnnpack_binary(
7571 name = "subgraph_size_test",
7572 srcs = ["test/subgraph-size.c"],
7573 deps = [":XNNPACK"],
7574)
7575
7576########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007577
7578xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007579 name = "abs_nc_test",
7580 srcs = [
7581 "test/abs-nc.cc",
7582 "test/abs-operator-tester.h",
7583 ],
7584 deps = OPERATOR_TEST_DEPS,
7585)
7586
7587xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007588 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007589 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007590 srcs = [
7591 "test/add-nd.cc",
7592 "test/binary-elementwise-operator-tester.h",
7593 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007594 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007595)
7596
7597xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007598 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007599 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007600 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007601 "test/argmax-pooling-operator-tester.h",
7602 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007603 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007604)
7605
7606xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007607 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007608 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007609 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007610 "test/average-pooling-operator-tester.h",
7611 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007612 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007613)
7614
7615xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007616 name = "bankers_rounding_nc_test",
7617 srcs = [
7618 "test/bankers-rounding-nc.cc",
7619 "test/bankers-rounding-operator-tester.h",
7620 ],
7621 deps = OPERATOR_TEST_DEPS,
7622)
7623
7624xnnpack_unit_test(
7625 name = "ceiling_nc_test",
7626 srcs = [
7627 "test/ceiling-nc.cc",
7628 "test/ceiling-operator-tester.h",
7629 ],
7630 deps = OPERATOR_TEST_DEPS,
7631)
7632
7633xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007634 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007635 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007636 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007637 "test/channel-shuffle-operator-tester.h",
7638 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007639 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007640)
7641
7642xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007643 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007644 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007645 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007646 "test/clamp-operator-tester.h",
7647 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007648 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007649)
7650
7651xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007652 name = "constant_pad_nd_test",
7653 srcs = [
7654 "test/constant-pad-nd.cc",
7655 "test/constant-pad-operator-tester.h",
7656 ],
7657 deps = OPERATOR_TEST_DEPS,
7658)
7659
7660xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007661 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007662 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007663 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007664 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007665 "test/convolution-operator-tester.h",
7666 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007667 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007668)
7669
7670xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007671 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007672 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007673 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007674 "test/convolution-nchw.cc",
7675 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007676 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007677 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007678)
7679
7680xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007681 name = "copy_nc_test",
7682 srcs = [
7683 "test/copy-nc.cc",
7684 "test/copy-operator-tester.h",
7685 ],
7686 deps = OPERATOR_TEST_DEPS,
7687)
7688
7689xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007690 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007691 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007692 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007693 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007694 "test/deconvolution-operator-tester.h",
7695 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007696 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007697)
7698
7699xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007700 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007701 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007702 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007703 "test/depth-to-space-operator-tester.h",
7704 ] + OPERATOR_TEST_PARAMS_HDRS,
7705 deps = OPERATOR_TEST_DEPS,
7706)
7707
7708xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007709 name = "depth_to_space_nhwc_test",
7710 srcs = [
7711 "test/depth-to-space-nhwc.cc",
7712 "test/depth-to-space-operator-tester.h",
7713 ] + OPERATOR_TEST_PARAMS_HDRS,
7714 deps = OPERATOR_TEST_DEPS,
7715)
7716
7717xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007718 name = "divide_nd_test",
7719 srcs = [
7720 "test/binary-elementwise-operator-tester.h",
7721 "test/divide-nd.cc",
7722 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007723 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007724)
7725
7726xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007727 name = "elu_nc_test",
7728 srcs = [
7729 "test/elu-nc.cc",
7730 "test/elu-operator-tester.h",
7731 ],
7732 deps = OPERATOR_TEST_DEPS,
7733)
7734
7735xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007736 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007737 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007738 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007739 "test/fully-connected-operator-tester.h",
7740 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007741 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007742)
7743
7744xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007745 name = "floor_nc_test",
7746 srcs = [
7747 "test/floor-nc.cc",
7748 "test/floor-operator-tester.h",
7749 ],
7750 deps = OPERATOR_TEST_DEPS,
7751)
7752
7753xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007754 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007755 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007756 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007757 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007758 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007759 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007760)
7761
7762xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007763 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007764 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007765 "test/global-average-pooling-ncw.cc",
7766 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007767 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007768 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007769)
7770
7771xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007772 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007773 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007774 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007775 "test/hardswish-operator-tester.h",
7776 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007777 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007778)
7779
7780xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007781 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007782 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007783 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007784 "test/leaky-relu-operator-tester.h",
7785 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007786 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007787)
7788
7789xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007790 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007791 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007792 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007793 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007794 "test/max-pooling-operator-tester.h",
7795 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007796 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007797)
7798
7799xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007800 name = "maximum_nd_test",
7801 srcs = [
7802 "test/binary-elementwise-operator-tester.h",
7803 "test/maximum-nd.cc",
7804 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007805 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007806)
7807
7808xnnpack_unit_test(
7809 name = "minimum_nd_test",
7810 srcs = [
7811 "test/binary-elementwise-operator-tester.h",
7812 "test/minimum-nd.cc",
7813 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007814 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007815)
7816
7817xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007818 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007819 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007820 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007821 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007822 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007823 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007824)
7825
7826xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007827 name = "negate_nc_test",
7828 srcs = [
7829 "test/negate-nc.cc",
7830 "test/negate-operator-tester.h",
7831 ],
7832 deps = OPERATOR_TEST_DEPS,
7833)
7834
7835xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007836 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007837 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007838 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007839 "test/prelu-operator-tester.h",
7840 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007841 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007842)
7843
7844xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007845 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007846 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007847 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007848 "test/resize-bilinear-operator-tester.h",
7849 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007850 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007851)
7852
7853xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007854 name = "resize_bilinear_nchw_test",
7855 srcs = [
7856 "test/resize-bilinear-nchw.cc",
7857 "test/resize-bilinear-operator-tester.h",
7858 ] + OPERATOR_TEST_PARAMS_HDRS,
7859 deps = OPERATOR_TEST_DEPS,
7860)
7861
7862xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007863 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007864 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007865 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007866 "test/sigmoid-operator-tester.h",
7867 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007868 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007869)
7870
7871xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007872 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007873 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007874 "test/softmax-nc.cc",
7875 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007876 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007877 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007878)
7879
7880xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007881 name = "square_nc_test",
7882 srcs = [
7883 "test/square-nc.cc",
7884 "test/square-operator-tester.h",
7885 ],
7886 deps = OPERATOR_TEST_DEPS,
7887)
7888
7889xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007890 name = "square_root_nc_test",
7891 srcs = [
7892 "test/square-root-nc.cc",
7893 "test/square-root-operator-tester.h",
7894 ],
7895 deps = OPERATOR_TEST_DEPS,
7896)
7897
7898xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007899 name = "squared_difference_nd_test",
7900 srcs = [
7901 "test/binary-elementwise-operator-tester.h",
7902 "test/squared-difference-nd.cc",
7903 ],
7904 deps = OPERATOR_TEST_DEPS,
7905)
7906
7907xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007908 name = "subtract_nd_test",
7909 srcs = [
7910 "test/binary-elementwise-operator-tester.h",
7911 "test/subtract-nd.cc",
7912 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007913 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007914)
7915
7916xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007917 name = "truncation_nc_test",
7918 srcs = [
7919 "test/truncation-nc.cc",
7920 "test/truncation-operator-tester.h",
7921 ],
7922 deps = OPERATOR_TEST_DEPS,
7923)
7924
7925xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007926 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007927 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007928 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007929 "test/unpooling-operator-tester.h",
7930 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007931 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007932)
7933
Chao Mei6ddfc602020-05-13 22:29:36 -07007934############################### Misc unit tests ###############################
7935
7936xnnpack_unit_test(
7937 name = "memory_planner_test",
7938 srcs = [
7939 "test/memory-planner-test.cc",
7940 ],
7941 deps = [
7942 ":XNNPACK",
7943 ":memory_planner",
7944 ],
7945)
7946
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07007947xnnpack_unit_test(
7948 name = "subgraph_nchw_test",
7949 srcs = [
7950 "src/xnnpack/subgraph.h",
7951 "test/subgraph-nchw.cc",
7952 "test/subgraph-tester.h",
7953 ],
7954 deps = [
7955 ":XNNPACK",
7956 ],
7957)
7958
Marat Dukhan08c4a432019-10-03 09:29:21 -07007959############################# Build configurations #############################
7960
Marat Dukhanb8642352019-10-30 15:43:02 -07007961# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07007962config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007963 name = "xnn_enable_assembly_explicit_true",
7964 define_values = {"xnn_enable_assembly": "true"},
7965)
7966
7967# Disables usage of assembly kernels.
7968config_setting(
7969 name = "xnn_enable_assembly_explicit_false",
7970 define_values = {"xnn_enable_assembly": "false"},
7971)
7972
Marat Dukhan9de90e02020-06-18 16:04:12 -07007973# Enables usage of sparse inference.
7974config_setting(
7975 name = "xnn_enable_sparse_explicit_true",
7976 define_values = {"xnn_enable_sparse": "true"},
7977)
7978
7979# Disables usage of sparse inference.
7980config_setting(
7981 name = "xnn_enable_sparse_explicit_false",
7982 define_values = {"xnn_enable_sparse": "false"},
7983)
7984
Marat Dukhan05702cf2020-03-26 15:41:33 -07007985# Disables usage of HMP-aware optimizations.
7986config_setting(
7987 name = "xnn_enable_hmp_explicit_false",
7988 define_values = {"xnn_enable_hmp": "false"},
7989)
7990
Chao Mei6ddfc602020-05-13 22:29:36 -07007991# Enable usage of optimized memory allocation
7992config_setting(
7993 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07007994 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007995)
7996
7997# Disable usage of optimized memory allocation
7998config_setting(
7999 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008000 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008001)
8002
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008003# Enable QS8 inference in TFLite-specific version
8004config_setting(
8005 name = "xnn_enable_qs8_explicit_true",
8006 define_values = {"xnn_enable_qs8": "true"},
8007)
8008
8009# Disable QS8 inference in TFLite-specific version
8010config_setting(
8011 name = "xnn_enable_qs8_explicit_false",
8012 define_values = {"xnn_enable_qs8": "false"},
8013)
8014
Marat Dukhanb8642352019-10-30 15:43:02 -07008015# Builds with -c dbg
8016config_setting(
8017 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008018 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008019 "compilation_mode": "dbg",
8020 },
8021)
8022
8023# Builds with -c opt
8024config_setting(
8025 name = "optimized_build",
8026 values = {
8027 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008028 },
8029)
8030
8031config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008032 name = "linux_k8",
8033 values = {"cpu": "k8"},
8034)
8035
8036config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008037 name = "linux_arm",
8038 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008039)
8040
8041config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008042 name = "linux_armeabi",
8043 values = {"cpu": "armeabi"},
8044)
8045
8046config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008047 name = "linux_armhf",
8048 values = {"cpu": "armhf"},
8049)
8050
8051config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008052 name = "linux_armv7a",
8053 values = {"cpu": "armv7a"},
8054)
8055
8056config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008057 name = "linux_aarch64",
8058 values = {"cpu": "aarch64"},
8059)
8060
8061config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008062 name = "android",
8063 values = {"crosstool_top": "//external:android/crosstool"},
8064)
8065
8066config_setting(
8067 name = "android_armv7",
8068 values = {
8069 "crosstool_top": "//external:android/crosstool",
8070 "cpu": "armeabi-v7a",
8071 },
8072)
8073
8074config_setting(
8075 name = "android_arm64",
8076 values = {
8077 "crosstool_top": "//external:android/crosstool",
8078 "cpu": "arm64-v8a",
8079 },
8080)
8081
8082config_setting(
8083 name = "android_x86",
8084 values = {
8085 "crosstool_top": "//external:android/crosstool",
8086 "cpu": "x86",
8087 },
8088)
8089
8090config_setting(
8091 name = "android_x86_64",
8092 values = {
8093 "crosstool_top": "//external:android/crosstool",
8094 "cpu": "x86_64",
8095 },
8096)
8097
8098config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008099 name = "windows_x86_64",
8100 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008101)
8102
8103config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008104 name = "windows_x86_64_clang",
8105 values = {
8106 "compiler": "clang-cl",
8107 "cpu": "x64_windows",
8108 },
8109)
8110
8111config_setting(
8112 name = "windows_x86_64_mingw",
8113 values = {
8114 "compiler": "mingw-gcc",
8115 "cpu": "x64_windows",
8116 },
8117)
8118
8119config_setting(
8120 name = "windows_x86_64_msys",
8121 values = {
8122 "compiler": "msys-gcc",
8123 "cpu": "x64_windows",
8124 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008125)
8126
8127config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008128 name = "macos_x86_64",
8129 values = {
8130 "apple_platform_type": "macos",
8131 "cpu": "darwin",
8132 },
8133)
8134
8135config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008136 name = "macos_arm64",
8137 values = {
8138 "apple_platform_type": "macos",
8139 "cpu": "darwin_arm64",
8140 },
8141)
8142
8143config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008144 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008145 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008146)
8147
8148config_setting(
8149 name = "emscripten_wasm",
8150 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008151 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008152 "cpu": "wasm",
8153 },
8154)
8155
8156config_setting(
8157 name = "emscripten_wasmsimd",
8158 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008159 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008160 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008161 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008162 },
8163)
8164
8165config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008166 name = "ios_armv7",
8167 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008168 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008169 "cpu": "ios_armv7",
8170 },
8171)
8172
8173config_setting(
8174 name = "ios_arm64",
8175 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008176 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008177 "cpu": "ios_arm64",
8178 },
8179)
8180
8181config_setting(
8182 name = "ios_arm64e",
8183 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008184 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008185 "cpu": "ios_arm64e",
8186 },
8187)
8188
8189config_setting(
8190 name = "ios_x86",
8191 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008192 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008193 "cpu": "ios_i386",
8194 },
8195)
8196
8197config_setting(
8198 name = "ios_x86_64",
8199 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008200 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008201 "cpu": "ios_x86_64",
8202 },
8203)
8204
8205config_setting(
8206 name = "watchos_armv7k",
8207 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008208 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008209 "cpu": "watchos_armv7k",
8210 },
8211)
8212
8213config_setting(
8214 name = "watchos_arm64_32",
8215 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008216 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008217 "cpu": "watchos_arm64_32",
8218 },
8219)
8220
8221config_setting(
8222 name = "watchos_x86",
8223 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008224 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008225 "cpu": "watchos_i386",
8226 },
8227)
8228
8229config_setting(
8230 name = "watchos_x86_64",
8231 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008232 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008233 "cpu": "watchos_x86_64",
8234 },
8235)
8236
8237config_setting(
8238 name = "tvos_arm64",
8239 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008240 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008241 "cpu": "tvos_arm64",
8242 },
8243)
8244
8245config_setting(
8246 name = "tvos_x86_64",
8247 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008248 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008249 "cpu": "tvos_x86_64",
8250 },
8251)