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gerrit-public.fairphone.software / toolchain / llvm-project / f3ded811b2f865c804617d16fba981f731db3e47 / . / llvm / lib / Target / X86 / X86InstrFragmentsSIMD.td
blob: 5cd04d8434780147bb2bd4ac545c2c837a7a616d [file] [log] [blame]
Jia Liue1d61962012-02-19 02:03:36 +0000[diff] [blame]1//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +0000[diff] [blame]7//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]8//===----------------------------------------------------------------------===//
9//
10// This file provides pattern fragments useful for SIMD instructions.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]15// MMX specific DAG Nodes.
16//===----------------------------------------------------------------------===//
17
18// Low word of MMX to GPR.
19def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,
20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
Bruno Cardoso Lopesab9ae872015-02-05 13:23:07 +0000[diff] [blame]21// GPR to low word of MMX.
22def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1,
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]24
25//===----------------------------------------------------------------------===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]26// MMX Pattern Fragments
27//===----------------------------------------------------------------------===//
28
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]29def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>;
Bruno Cardoso Lopes9e1c4c12015-02-23 15:23:14 +0000[diff] [blame]30def load_mvmmx : PatFrag<(ops node:$ptr),
31 (x86mmx (MMX_X86movw2d (load node:$ptr)))>;
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]32def bc_mmx : PatFrag<(ops node:$in), (x86mmx (bitconvert node:$in))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]33
34//===----------------------------------------------------------------------===//
35// SSE specific DAG Nodes.
36//===----------------------------------------------------------------------===//
37
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]38def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]39 SDTCisFP<1>, SDTCisVT<3, i8>,
40 SDTCisVec<1>]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]41
42def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
43def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
Nadav Rotem178250a2012-08-19 13:06:16 +0000[diff] [blame]44
45// Commutative and Associative FMIN and FMAX.
46def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,
47 [SDNPCommutative, SDNPAssociative]>;
48def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,
49 [SDNPCommutative, SDNPAssociative]>;
50
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]51def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
52 [SDNPCommutative, SDNPAssociative]>;
53def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
54 [SDNPCommutative, SDNPAssociative]>;
55def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
56 [SDNPCommutative, SDNPAssociative]>;
Benjamin Kramer5bc180c2013-08-04 12:05:16 +0000[diff] [blame]57def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp,
58 [SDNPCommutative, SDNPAssociative]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]59def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
60def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
Stuart Hastings9f208042011-06-01 04:39:42 +0000[diff] [blame]61def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>;
Duncan Sands0e4fcb82011-09-22 20:15:48 +0000[diff] [blame]62def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
63def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
Craig Topperf984efb2011-11-19 09:02:40 +0000[diff] [blame]64def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
65def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]66def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>;
67def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]68def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
69//def X86cmpsd : SDNode<"X86ISD::FSETCCsd", SDTX86Cmpsd>;
Simon Pilgrimcae7b942015-06-16 21:40:28 +0000[diff] [blame]70def X86cvtdq2pd: SDNode<"X86ISD::CVTDQ2PD",
71 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
72 SDTCisVT<1, v4i32>]>>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000[diff] [blame]73def X86cvtudq2pd: SDNode<"X86ISD::CVTUDQ2PD",
74 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
75 SDTCisVT<1, v4i32>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]76def X86pshufb : SDNode<"X86ISD::PSHUFB",
Craig Topper78349002012-01-25 06:43:11 +0000[diff] [blame]77 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]78 SDTCisSameAs<0,2>]>>;
Chandler Carruth6ba97302015-05-30 03:20:59 +0000[diff] [blame]79def X86psadbw : SDNode<"X86ISD::PSADBW",
80 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
81 SDTCisSameAs<0,2>]>>;
Igor Bregerf3ded812015-08-31 13:09:30 +0000[diff] [blame^]82def X86dbpsadbw : SDNode<"X86ISD::DBPSADBW",
83 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisVec<1>,
84 SDTCisSameAs<1,2>, SDTCisInt<3>]>>;
Bruno Cardoso Lopes7ba479d2011-07-13 21:36:47 +0000[diff] [blame]85def X86andnp : SDNode<"X86ISD::ANDNP",
Bruno Cardoso Lopes9613b642011-07-13 21:36:51 +0000[diff] [blame]86 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]87 SDTCisSameAs<0,2>]>>;
Craig Topper81390be2011-11-19 07:33:10 +0000[diff] [blame]88def X86psign : SDNode<"X86ISD::PSIGN",
Craig Topperde6b73b2011-11-19 07:07:26 +0000[diff] [blame]89 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]90 SDTCisSameAs<0,2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]91def X86pextrb : SDNode<"X86ISD::PEXTRB",
92 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
93def X86pextrw : SDNode<"X86ISD::PEXTRW",
94 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
95def X86pinsrb : SDNode<"X86ISD::PINSRB",
96 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
97 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
98def X86pinsrw : SDNode<"X86ISD::PINSRW",
99 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
100 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
Filipe Cabecinhas20352212014-04-21 20:07:29 +0000[diff] [blame]101def X86insertps : SDNode<"X86ISD::INSERTPS",
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]102 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]103 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]104def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
105 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>;
Elena Demikhovsky8d7e56c2012-04-22 09:39:03 +0000[diff] [blame]106
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]107def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
Chris Lattner54e53292010-09-22 00:34:38 +0000[diff] [blame]108 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]109
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]110def X86vzext : SDNode<"X86ISD::VZEXT",
111 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]112 SDTCisInt<0>, SDTCisInt<1>,
113 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]114
115def X86vsext : SDNode<"X86ISD::VSEXT",
116 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]117 SDTCisInt<0>, SDTCisInt<1>,
118 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]119
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]120def SDTVtrunc : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
121 SDTCisInt<0>, SDTCisInt<1>,
122 SDTCisOpSmallerThanOp<0, 1>]>;
123
124def X86vtrunc : SDNode<"X86ISD::VTRUNC", SDTVtrunc>;
125def X86vtruncs : SDNode<"X86ISD::VTRUNCS", SDTVtrunc>;
126def X86vtruncus : SDNode<"X86ISD::VTRUNCUS", SDTVtrunc>;
127
Elena Demikhovskyc5f67262013-12-17 08:33:15 +0000[diff] [blame]128def X86trunc : SDNode<"X86ISD::TRUNC",
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]129 SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>,
130 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]131def X86vfpext : SDNode<"X86ISD::VFPEXT",
132 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]133 SDTCisFP<0>, SDTCisFP<1>,
134 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liaoe999b862012-10-10 16:53:28 +0000[diff] [blame]135def X86vfpround: SDNode<"X86ISD::VFPROUND",
136 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]137 SDTCisFP<0>, SDTCisFP<1>,
138 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]139
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]140def X86vshldq : SDNode<"X86ISD::VSHLDQ", SDTIntShiftOp>;
141def X86vshrdq : SDNode<"X86ISD::VSRLDQ", SDTIntShiftOp>;
Craig Topper0b7ad762012-01-22 23:36:02 +0000[diff] [blame]142def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>;
Craig Topperbd4884372012-01-22 22:42:16 +0000[diff] [blame]143def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;
144def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]145
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]146def X86IntCmpMask : SDTypeProfile<1, 2,
147 [SDTCisVec<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>]>;
148def X86pcmpeqm : SDNode<"X86ISD::PCMPEQM", X86IntCmpMask, [SDNPCommutative]>;
149def X86pcmpgtm : SDNode<"X86ISD::PCMPGTM", X86IntCmpMask>;
150
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]151def X86CmpMaskCC :
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000[diff] [blame]152 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,
153 SDTCisVec<1>, SDTCisSameAs<2, 1>,
154 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>]>;
155def X86CmpMaskCCRound :
156 SDTypeProfile<1, 4, [SDTCisVec<0>,SDTCVecEltisVT<0, i1>,
157 SDTCisVec<1>, SDTCisSameAs<2, 1>,
158 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>,
159 SDTCisInt<4>]>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]160def X86CmpMaskCCScalar :
161 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
162
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000[diff] [blame]163def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>;
164def X86cmpmRnd : SDNode<"X86ISD::CMPM_RND", X86CmpMaskCCRound>;
165def X86cmpmu : SDNode<"X86ISD::CMPMU", X86CmpMaskCC>;
166def X86cmpms : SDNode<"X86ISD::FSETCC", X86CmpMaskCCScalar>;
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]167
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]168def X86vshl : SDNode<"X86ISD::VSHL",
169 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
170 SDTCisVec<2>]>>;
171def X86vsrl : SDNode<"X86ISD::VSRL",
172 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
173 SDTCisVec<2>]>>;
174def X86vsra : SDNode<"X86ISD::VSRA",
175 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
176 SDTCisVec<2>]>>;
177
178def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;
179def X86vsrli : SDNode<"X86ISD::VSRLI", SDTIntShiftOp>;
180def X86vsrai : SDNode<"X86ISD::VSRAI", SDTIntShiftOp>;
181
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]182def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]183 SDTCisVec<1>,
184 SDTCisSameAs<2, 1>]>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000[diff] [blame]185def X86addus : SDNode<"X86ISD::ADDUS", SDTIntBinOp>;
Benjamin Kramerb16ccde2012-12-15 16:47:44 +0000[diff] [blame]186def X86subus : SDNode<"X86ISD::SUBUS", SDTIntBinOp>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000[diff] [blame]187def X86adds : SDNode<"X86ISD::ADDS", SDTIntBinOp>;
188def X86subs : SDNode<"X86ISD::SUBS", SDTIntBinOp>;
Asaf Badouhc6f3c822015-07-06 14:03:40 +0000[diff] [blame]189def X86mulhrs : SDNode<"X86ISD::MULHRS" , SDTIntBinOp>;
Asaf Badouh81f03c32015-06-18 12:30:53 +0000[diff] [blame]190def X86avg : SDNode<"X86ISD::AVG" , SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]191def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]192def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
Elena Demikhovsky40864b62013-08-05 08:52:21 +0000[diff] [blame]193def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]194def X86testm : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]195 SDTCisVec<1>, SDTCisSameAs<2, 1>,
196 SDTCVecEltisVT<0, i1>,
197 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovskya30e4372014-02-05 07:05:03 +0000[diff] [blame]198def X86testnm : SDNode<"X86ISD::TESTNM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]199 SDTCisVec<1>, SDTCisSameAs<2, 1>,
200 SDTCVecEltisVT<0, i1>,
201 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]202def X86select : SDNode<"X86ISD::SELECT" , SDTSelect>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]203
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]204def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
205 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
206 SDTCisSameAs<1,2>]>>;
Benjamin Kramer6d2dff62014-04-26 14:12:19 +0000[diff] [blame]207def X86pmuldq : SDNode<"X86ISD::PMULDQ",
208 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
209 SDTCisSameAs<1,2>]>>;
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]210
Simon Pilgrimd85cae32015-07-06 20:46:41 +0000[diff] [blame]211def X86extrqi : SDNode<"X86ISD::EXTRQI",
212 SDTypeProfile<1, 3, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,
213 SDTCisVT<2, i8>, SDTCisVT<3, i8>]>>;
214def X86insertqi : SDNode<"X86ISD::INSERTQI",
215 SDTypeProfile<1, 4, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,
216 SDTCisSameAs<1,2>, SDTCisVT<3, i8>,
217 SDTCisVT<4, i8>]>>;
218
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]219// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
220// translated into one of the target nodes below during lowering.
221// Note: this is a work in progress...
222def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>;
223def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
224 SDTCisSameAs<0,2>]>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]225def SDTShuff3Op : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
226 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]227
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]228def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
229 SDTCisVec<2>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]230def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>,
231 SDTCisSameAs<0,1>, SDTCisInt<2>]>;
232def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
233 SDTCisSameAs<0,2>, SDTCisInt<3>]>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]234def SDTFPBinOpImmRound: SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCisSameAs<0,1>,
235 SDTCisSameAs<0,2>, SDTCisInt<3>, SDTCisInt<4>]>;
Asaf Badouha5b2e5e2015-07-22 12:00:43 +0000[diff] [blame]236def SDTFPUnaryOpImmRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
237 SDTCisInt<2>, SDTCisInt<3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]238
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]239def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;
240def SDTVBroadcastm : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>]>;
241
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]242def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]243 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]244
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]245def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc.
246 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisInt<3>]>;
247
Asaf Badouh402ebb32015-06-03 13:41:48 +0000[diff] [blame]248def SDTFPUnaryOpRound : SDTypeProfile<1, 2, [ // fsqrt_round, fgetexp_round, etc.
249 SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisInt<2>]>;
250
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]251def SDTFma : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
252 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]253def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
254 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>, SDTCisInt<4>]>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]255def STDFp1SrcRm : SDTypeProfile<1, 2, [SDTCisSameAs<0,1>,
256 SDTCisVec<0>, SDTCisInt<2>]>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]257def STDFp2SrcRm : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
258 SDTCisVec<0>, SDTCisInt<3>]>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000[diff] [blame]259def STDFp3SrcRm : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
260 SDTCisVec<0>, SDTCisInt<3>, SDTCisInt<4>]>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]261
Craig Topper8fb09f02013-01-28 06:48:25 +0000[diff] [blame]262def X86PAlignr : SDNode<"X86ISD::PALIGNR", SDTShuff3OpI>;
Adam Nemet2f10cc62014-08-05 17:22:55 +0000[diff] [blame]263def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
Elena Demikhovsky5e2f8c42015-06-23 08:19:46 +0000[diff] [blame]264def X86Abs : SDNode<"X86ISD::ABS", SDTIntUnaryOp>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]265
266def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>;
267def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>;
268def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>;
269
Elena Demikhovsky9e380862015-06-03 10:56:40 +0000[diff] [blame]270def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>;
271def X86Shuf128 : SDNode<"X86ISD::SHUF128", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]272
273def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
274def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;
275def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;
276
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]277def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
278def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
279
280def X86Movlhps : SDNode<"X86ISD::MOVLHPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]281def X86Movlhpd : SDNode<"X86ISD::MOVLHPD", SDTShuff2Op>;
Bruno Cardoso Lopes03e4c352010-08-31 21:15:21 +0000[diff] [blame]282def X86Movhlps : SDNode<"X86ISD::MOVHLPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]283
Bruno Cardoso Lopesb3825212010-09-01 05:08:25 +0000[diff] [blame]284def X86Movlps : SDNode<"X86ISD::MOVLPS", SDTShuff2Op>;
285def X86Movlpd : SDNode<"X86ISD::MOVLPD", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]286
Chandler Carruth8366ceb2014-06-20 01:05:28 +0000[diff] [blame]287def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, SDTCisSameAs<2, 1>]>;
288def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
289def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>;
290
Craig Topper8d4ba192011-12-06 08:21:25 +0000[diff] [blame]291def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;
292def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]293
Igor Bregerf7fd5472015-07-21 07:11:28 +0000[diff] [blame]294def X86vpmaddubsw : SDNode<"X86ISD::VPMADDUBSW" , SDTPack>;
295def X86vpmaddwd : SDNode<"X86ISD::VPMADDWD" , SDTPack>;
296
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]297def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>;
Chandler Carruthed5dfff2014-09-22 22:29:42 +0000[diff] [blame]298def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>;
299def X86VPermv : SDNode<"X86ISD::VPERMV", SDTShuff2Op>;
300def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;
301def X86VPermv3 : SDNode<"X86ISD::VPERMV3", SDTShuff3Op>;
Elena Demikhovskya5d38a32014-01-23 14:27:26 +0000[diff] [blame]302def X86VPermiv3 : SDNode<"X86ISD::VPERMIV3", SDTShuff3Op>;
Bruno Cardoso Lopesb878caa2011-07-21 01:55:47 +0000[diff] [blame]303
Craig Topper0a672ea2011-11-30 07:47:51 +0000[diff] [blame]304def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;
Bruno Cardoso Lopesf15dfe52011-08-12 21:48:26 +0000[diff] [blame]305
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]306def X86VFixupimm : SDNode<"X86ISD::VFIXUPIMM", SDTFPBinOpImmRound>;
Elena Demikhovsky3582eb32015-06-01 11:05:34 +0000[diff] [blame]307def X86VRange : SDNode<"X86ISD::VRANGE", SDTFPBinOpImmRound>;
Asaf Badouha5b2e5e2015-07-22 12:00:43 +0000[diff] [blame]308def X86VReduce : SDNode<"X86ISD::VREDUCE", SDTFPUnaryOpImmRound>;
309def X86VRndScale : SDNode<"X86ISD::VRNDSCALE", SDTFPUnaryOpImmRound>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]310
Elena Demikhovskyad9c3962015-05-18 06:42:57 +0000[diff] [blame]311def X86SubVBroadcast : SDNode<"X86ISD::SUBV_BROADCAST",
312 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
313 SDTCisSubVecOfVec<1, 0>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]314def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>;
Elena Demikhovsky89529742013-09-12 08:55:00 +0000[diff] [blame]315def X86Vinsert : SDNode<"X86ISD::VINSERT", SDTypeProfile<1, 3,
316 [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
Elena Demikhovsky9f423d62014-02-10 07:02:39 +0000[diff] [blame]317def X86Vextract : SDNode<"X86ISD::VEXTRACT", SDTypeProfile<1, 2,
318 [SDTCisVec<1>, SDTCisPtrTy<2>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]319
Elena Demikhovskycd3c1c42012-12-05 09:24:57 +0000[diff] [blame]320def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>;
Chandler Carruth204ad4c2014-09-15 20:09:47 +0000[diff] [blame]321
322def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>;
323
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]324def X86faddRnd : SDNode<"X86ISD::FADD_RND", SDTFPBinOpRound>;
325def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>;
326def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>;
327def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;
Elena Demikhovsky0d7e9362015-05-11 06:05:05 +0000[diff] [blame]328def X86fmaxRnd : SDNode<"X86ISD::FMAX_RND", SDTFPBinOpRound>;
Asaf Badouh7ec4b7a2015-06-28 14:30:39 +0000[diff] [blame]329def X86scalef : SDNode<"X86ISD::SCALEF", SDTFPBinOpRound>;
Elena Demikhovsky0d7e9362015-05-11 06:05:05 +0000[diff] [blame]330def X86fminRnd : SDNode<"X86ISD::FMIN_RND", SDTFPBinOpRound>;
Asaf Badouh402ebb32015-06-03 13:41:48 +0000[diff] [blame]331def X86fsqrtRnd : SDNode<"X86ISD::FSQRT_RND", SDTFPUnaryOpRound>;
Igor Breger8352a0d2015-07-28 06:53:28 +0000[diff] [blame]332def X86fgetexpRnd : SDNode<"X86ISD::FGETEXP_RND", SDTFPUnaryOpRound>;
333def X86fgetexpRnds : SDNode<"X86ISD::FGETEXP_RND", STDFp2SrcRm>;
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]334
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]335def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;
336def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
337def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFma>;
338def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFma>;
Craig Toppera999c662012-08-29 07:18:25 +0000[diff] [blame]339def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFma>;
340def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFma>;
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]341
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]342def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound>;
343def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound>;
344def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound>;
345def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound>;
346def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound>;
347def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound>;
348
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]349def X86rsqrt28 : SDNode<"X86ISD::RSQRT28", STDFp1SrcRm>;
350def X86rcp28 : SDNode<"X86ISD::RCP28", STDFp1SrcRm>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]351def X86exp2 : SDNode<"X86ISD::EXP2", STDFp1SrcRm>;
352
353def X86rsqrt28s : SDNode<"X86ISD::RSQRT28", STDFp2SrcRm>;
354def X86rcp28s : SDNode<"X86ISD::RCP28", STDFp2SrcRm>;
Asaf Badouha5b2e5e2015-07-22 12:00:43 +0000[diff] [blame]355def X86RndScales : SDNode<"X86ISD::VRNDSCALE", STDFp3SrcRm>;
356def X86Reduces : SDNode<"X86ISD::VREDUCE", STDFp3SrcRm>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]357
Craig Topperab47fe42012-08-06 06:22:36 +0000[diff] [blame]358def SDT_PCMPISTRI : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
359 SDTCisVT<2, v16i8>, SDTCisVT<3, v16i8>,
360 SDTCisVT<4, i8>]>;
361def SDT_PCMPESTRI : SDTypeProfile<2, 5, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
362 SDTCisVT<2, v16i8>, SDTCisVT<3, i32>,
363 SDTCisVT<4, v16i8>, SDTCisVT<5, i32>,
364 SDTCisVT<6, i8>]>;
365
366def X86pcmpistri : SDNode<"X86ISD::PCMPISTRI", SDT_PCMPISTRI>;
367def X86pcmpestri : SDNode<"X86ISD::PCMPESTRI", SDT_PCMPESTRI>;
368
Elena Demikhovskyba5ab322015-06-22 11:16:30 +0000[diff] [blame]369def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 1,
370 [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>;
371def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 1,
372 [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>;
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]373
Igor Bregerabe4a792015-06-14 12:44:55 +0000[diff] [blame]374def SDTintToFPRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisFP<0>,
375 SDTCisSameAs<0,1>, SDTCisInt<2>, SDTCisInt<3>]>;
376
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000[diff] [blame]377def SDTDoubleToInt: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
378 SDTCisInt<0>, SDTCVecEltisVT<1, f64>]>;
379def SDTFloatToInt: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
380 SDTCisInt<0>, SDTCVecEltisVT<1, f32>]>;
381
382def SDTDoubleToIntRnd: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
383 SDTCisInt<0>, SDTCVecEltisVT<1, f64>]>;
384def SDTFloatToIntRnd: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
385 SDTCisInt<0>, SDTCVecEltisVT<1, f32>]>;
386
387def SDTVintToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
388 SDTCisFP<0>, SDTCVecEltisVT<1, i32>,
389 SDTCisInt<2>]>;
390def SDTVlongToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
391 SDTCisFP<0>, SDTCVecEltisVT<1, i64>,
392 SDTCisInt<2>]>;
393
394def SDTVFPToIntRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
395 SDTCisFP<1>, SDTCVecEltisVT<0, i32>,
396 SDTCisInt<2>]>;
397def SDTVFPToLongRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
398 SDTCisFP<1>, SDTCVecEltisVT<0, i64>,
399 SDTCisInt<2>]>;
400
401// Scalar
402def X86SintToFpRnd : SDNode<"X86ISD::SINT_TO_FP_RND", SDTintToFPRound>;
403def X86UintToFpRnd : SDNode<"X86ISD::UINT_TO_FP_RND", SDTintToFPRound>;
404
405// Vector with rounding mode
406
407// cvtt fp-to-int staff
408def X86VFpToSintRnd : SDNode<"ISD::FP_TO_SINT", SDTVFPToIntRound>;
409def X86VFpToUintRnd : SDNode<"ISD::FP_TO_UINT", SDTVFPToIntRound>;
410def X86VFpToSlongRnd : SDNode<"ISD::FP_TO_SINT", SDTVFPToLongRound>;
411def X86VFpToUlongRnd : SDNode<"ISD::FP_TO_UINT", SDTVFPToLongRound>;
412
413def X86VSintToFpRnd : SDNode<"ISD::SINT_TO_FP", SDTVintToFPRound>;
414def X86VUintToFpRnd : SDNode<"ISD::UINT_TO_FP", SDTVintToFPRound>;
415def X86VSlongToFpRnd : SDNode<"ISD::SINT_TO_FP", SDTVlongToFPRound>;
416def X86VUlongToFpRnd : SDNode<"ISD::UINT_TO_FP", SDTVlongToFPRound>;
417
418// cvt fp-to-int staff
419def X86cvtps2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTFloatToIntRnd>;
420def X86cvtps2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTFloatToIntRnd>;
421def X86cvtpd2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTDoubleToIntRnd>;
422def X86cvtpd2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTDoubleToIntRnd>;
423
424// Vector without rounding mode
425def X86cvtps2Int : SDNode<"X86ISD::FP_TO_SINT_RND", SDTFloatToInt>;
426def X86cvtps2UInt : SDNode<"X86ISD::FP_TO_UINT_RND", SDTFloatToInt>;
427def X86cvtpd2Int : SDNode<"X86ISD::FP_TO_SINT_RND", SDTDoubleToInt>;
428def X86cvtpd2UInt : SDNode<"X86ISD::FP_TO_UINT_RND", SDTDoubleToInt>;
429
430def X86vfpextRnd : SDNode<"X86ISD::VFPEXT",
431 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
432 SDTCisFP<0>, SDTCisFP<1>,
433 SDTCisOpSmallerThanOp<1, 0>,
434 SDTCisInt<2>]>>;
435def X86vfproundRnd: SDNode<"X86ISD::VFPROUND",
436 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
437 SDTCisFP<0>, SDTCisFP<1>,
438 SDTCVecEltisVT<0, f32>,
439 SDTCVecEltisVT<1, f64>,
440 SDTCisInt<2>]>>;
Igor Bregerabe4a792015-06-14 12:44:55 +0000[diff] [blame]441
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]442//===----------------------------------------------------------------------===//
443// SSE Complex Patterns
444//===----------------------------------------------------------------------===//
445
446// These are 'extloads' from a scalar to the low element of a vector, zeroing
447// the top elements. These are used for the SSE 'ss' and 'sd' instruction
448// forms.
449def sse_load_f32 : ComplexPattern<v4f32, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]450 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
451 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]452def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]453 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
454 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]455
456def ssmem : Operand<v4f32> {
457 let PrintMethod = "printf32mem";
458 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]459 let ParserMatchClass = X86Mem32AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]460 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]461}
462def sdmem : Operand<v2f64> {
463 let PrintMethod = "printf64mem";
464 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]465 let ParserMatchClass = X86Mem64AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]466 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]467}
468
469//===----------------------------------------------------------------------===//
470// SSE pattern fragments
471//===----------------------------------------------------------------------===//
472
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]473// 128-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]474// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]475def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>;
476def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]477def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>;
478
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]479// 256-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]480// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]481def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>;
482def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]483def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>;
484
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]485// 512-bit load pattern fragments
486def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>;
487def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>;
Robert Khasanov7ca7df02014-08-04 14:35:15 +0000[diff] [blame]488def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>;
489def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>;
Elena Demikhovsky1f3ed412013-10-22 09:19:28 +0000[diff] [blame]490def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]491def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>;
492
493// 128-/256-/512-bit extload pattern fragments
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]494def extloadv2f32 : PatFrag<(ops node:$ptr), (v2f64 (extloadvf32 node:$ptr))>;
495def extloadv4f32 : PatFrag<(ops node:$ptr), (v4f64 (extloadvf32 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]496def extloadv8f32 : PatFrag<(ops node:$ptr), (v8f64 (extloadvf32 node:$ptr))>;
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]497
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]498// These are needed to match a scalar load that is used in a vector-only
499// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
500// The memory operand is required to be a 128-bit load, so it must be converted
501// from a vector to a scalar.
502def loadf32_128 : PatFrag<(ops node:$ptr),
503 (f32 (vector_extract (loadv4f32 node:$ptr), (iPTR 0)))>;
504def loadf64_128 : PatFrag<(ops node:$ptr),
505 (f64 (vector_extract (loadv2f64 node:$ptr), (iPTR 0)))>;
506
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]507// Like 'store', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]508def alignedstore : PatFrag<(ops node:$val, node:$ptr),
509 (store node:$val, node:$ptr), [{
510 return cast<StoreSDNode>(N)->getAlignment() >= 16;
511}]>;
512
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]513// Like 'store', but always requires 256-bit vector alignment.
514def alignedstore256 : PatFrag<(ops node:$val, node:$ptr),
515 (store node:$val, node:$ptr), [{
516 return cast<StoreSDNode>(N)->getAlignment() >= 32;
517}]>;
518
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]519// Like 'store', but always requires 512-bit vector alignment.
520def alignedstore512 : PatFrag<(ops node:$val, node:$ptr),
521 (store node:$val, node:$ptr), [{
522 return cast<StoreSDNode>(N)->getAlignment() >= 64;
523}]>;
524
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]525// Like 'load', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]526def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
527 return cast<LoadSDNode>(N)->getAlignment() >= 16;
528}]>;
529
Chad Rosiera281afc2012-03-09 02:00:48 +0000[diff] [blame]530// Like 'X86vzload', but always requires 128-bit vector alignment.
531def alignedX86vzload : PatFrag<(ops node:$ptr), (X86vzload node:$ptr), [{
532 return cast<MemSDNode>(N)->getAlignment() >= 16;
533}]>;
534
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]535// Like 'load', but always requires 256-bit vector alignment.
536def alignedload256 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
537 return cast<LoadSDNode>(N)->getAlignment() >= 32;
538}]>;
539
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]540// Like 'load', but always requires 512-bit vector alignment.
541def alignedload512 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
542 return cast<LoadSDNode>(N)->getAlignment() >= 64;
543}]>;
544
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]545def alignedloadfsf32 : PatFrag<(ops node:$ptr),
546 (f32 (alignedload node:$ptr))>;
547def alignedloadfsf64 : PatFrag<(ops node:$ptr),
548 (f64 (alignedload node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]549
550// 128-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]551// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]552def alignedloadv4f32 : PatFrag<(ops node:$ptr),
553 (v4f32 (alignedload node:$ptr))>;
554def alignedloadv2f64 : PatFrag<(ops node:$ptr),
555 (v2f64 (alignedload node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]556def alignedloadv2i64 : PatFrag<(ops node:$ptr),
557 (v2i64 (alignedload node:$ptr))>;
558
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]559// 256-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]560// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]561def alignedloadv8f32 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]562 (v8f32 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]563def alignedloadv4f64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]564 (v4f64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]565def alignedloadv4i64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]566 (v4i64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]567
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]568// 512-bit aligned load pattern fragments
569def alignedloadv16f32 : PatFrag<(ops node:$ptr),
570 (v16f32 (alignedload512 node:$ptr))>;
Elena Demikhovsky3ce8dbb2013-08-18 13:08:57 +0000[diff] [blame]571def alignedloadv16i32 : PatFrag<(ops node:$ptr),
572 (v16i32 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]573def alignedloadv8f64 : PatFrag<(ops node:$ptr),
574 (v8f64 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]575def alignedloadv8i64 : PatFrag<(ops node:$ptr),
576 (v8i64 (alignedload512 node:$ptr))>;
577
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]578// Like 'load', but uses special alignment checks suitable for use in
579// memory operands in most SSE instructions, which are required to
580// be naturally aligned on some targets but not on others. If the subtarget
581// allows unaligned accesses, match any load, though this may require
582// setting a feature bit in the processor (on startup, for example).
583// Opteron 10h and later implement such a feature.
584def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{
Sanjay Patelffd039b2015-02-03 17:13:04 +0000[diff] [blame]585 return Subtarget->hasSSEUnalignedMem()
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]586 || cast<LoadSDNode>(N)->getAlignment() >= 16;
587}]>;
588
589def memopfsf32 : PatFrag<(ops node:$ptr), (f32 (memop node:$ptr))>;
590def memopfsf64 : PatFrag<(ops node:$ptr), (f64 (memop node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]591
592// 128-bit memop pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]593// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]594def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;
595def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]596def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]597
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]598// These are needed to match a scalar memop that is used in a vector-only
599// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
600// The memory operand is required to be a 128-bit load, so it must be converted
601// from a vector to a scalar.
602def memopfsf32_128 : PatFrag<(ops node:$ptr),
603 (f32 (vector_extract (memopv4f32 node:$ptr), (iPTR 0)))>;
604def memopfsf64_128 : PatFrag<(ops node:$ptr),
605 (f64 (vector_extract (memopv2f64 node:$ptr), (iPTR 0)))>;
606
607
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]608// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
609// 16-byte boundary.
610// FIXME: 8 byte alignment for mmx reads is not required
611def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
612 return cast<LoadSDNode>(N)->getAlignment() >= 8;
613}]>;
614
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]615def memopmmx : PatFrag<(ops node:$ptr), (x86mmx (memop64 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]616
617// MOVNT Support
618// Like 'store', but requires the non-temporal bit to be set
619def nontemporalstore : PatFrag<(ops node:$val, node:$ptr),
620 (st node:$val, node:$ptr), [{
621 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
622 return ST->isNonTemporal();
623 return false;
624}]>;
625
626def alignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]627 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]628 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
629 return ST->isNonTemporal() && !ST->isTruncatingStore() &&
630 ST->getAddressingMode() == ISD::UNINDEXED &&
631 ST->getAlignment() >= 16;
632 return false;
633}]>;
634
635def unalignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]636 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]637 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
638 return ST->isNonTemporal() &&
639 ST->getAlignment() < 16;
640 return false;
641}]>;
642
Elena Demikhovsky6a1a3572015-06-28 10:53:29 +0000[diff] [blame]643def mgatherv4i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
644 (masked_gather node:$src1, node:$src2, node:$src3) , [{
645 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
646 return (Mgt->getIndex().getValueType() == MVT::v4i32 ||
647 Mgt->getBasePtr().getValueType() == MVT::v4i32);
648 return false;
649}]>;
650
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]651def mgatherv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
652 (masked_gather node:$src1, node:$src2, node:$src3) , [{
653 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
654 return (Mgt->getIndex().getValueType() == MVT::v8i32 ||
655 Mgt->getBasePtr().getValueType() == MVT::v8i32);
656 return false;
657}]>;
658
Elena Demikhovsky6a1a3572015-06-28 10:53:29 +0000[diff] [blame]659def mgatherv2i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
660 (masked_gather node:$src1, node:$src2, node:$src3) , [{
661 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
662 return (Mgt->getIndex().getValueType() == MVT::v2i64 ||
663 Mgt->getBasePtr().getValueType() == MVT::v2i64);
664 return false;
665}]>;
666def mgatherv4i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
667 (masked_gather node:$src1, node:$src2, node:$src3) , [{
668 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
669 return (Mgt->getIndex().getValueType() == MVT::v4i64 ||
670 Mgt->getBasePtr().getValueType() == MVT::v4i64);
671 return false;
672}]>;
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]673def mgatherv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
674 (masked_gather node:$src1, node:$src2, node:$src3) , [{
675 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
676 return (Mgt->getIndex().getValueType() == MVT::v8i64 ||
677 Mgt->getBasePtr().getValueType() == MVT::v8i64);
678 return false;
679}]>;
680def mgatherv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
681 (masked_gather node:$src1, node:$src2, node:$src3) , [{
682 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
683 return (Mgt->getIndex().getValueType() == MVT::v16i32 ||
684 Mgt->getBasePtr().getValueType() == MVT::v16i32);
685 return false;
686}]>;
687
Elena Demikhovsky30bc4ca2015-06-29 12:14:24 +0000[diff] [blame]688def mscatterv2i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
689 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
690 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
691 return (Sc->getIndex().getValueType() == MVT::v2i64 ||
692 Sc->getBasePtr().getValueType() == MVT::v2i64);
693 return false;
694}]>;
695
696def mscatterv4i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
697 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
698 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
699 return (Sc->getIndex().getValueType() == MVT::v4i32 ||
700 Sc->getBasePtr().getValueType() == MVT::v4i32);
701 return false;
702}]>;
703
704def mscatterv4i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
705 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
706 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
707 return (Sc->getIndex().getValueType() == MVT::v4i64 ||
708 Sc->getBasePtr().getValueType() == MVT::v4i64);
709 return false;
710}]>;
711
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]712def mscatterv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
713 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
714 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
715 return (Sc->getIndex().getValueType() == MVT::v8i32 ||
716 Sc->getBasePtr().getValueType() == MVT::v8i32);
717 return false;
718}]>;
719
720def mscatterv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
721 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
722 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
723 return (Sc->getIndex().getValueType() == MVT::v8i64 ||
724 Sc->getBasePtr().getValueType() == MVT::v8i64);
725 return false;
726}]>;
727def mscatterv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
728 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
729 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
730 return (Sc->getIndex().getValueType() == MVT::v16i32 ||
731 Sc->getBasePtr().getValueType() == MVT::v16i32);
732 return false;
733}]>;
734
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]735// 128-bit bitconvert pattern fragments
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]736def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>;
737def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>;
738def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>;
739def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>;
740def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;
741def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;
742
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]743// 256-bit bitconvert pattern fragments
Craig Topper682b8502011-11-02 04:42:13 +0000[diff] [blame]744def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;
745def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]746def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;
Bruno Cardoso Lopes1021b4a2011-07-13 01:15:33 +0000[diff] [blame]747def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;
Elena Demikhovsky3629b4a2014-01-06 08:45:54 +0000[diff] [blame]748def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]749
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]750// 512-bit bitconvert pattern fragments
751def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>;
752def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]753def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;
754def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>;
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]755
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]756def vzmovl_v2i64 : PatFrag<(ops node:$src),
757 (bitconvert (v2i64 (X86vzmovl
758 (v2i64 (scalar_to_vector (loadi64 node:$src))))))>;
759def vzmovl_v4i32 : PatFrag<(ops node:$src),
760 (bitconvert (v4i32 (X86vzmovl
761 (v4i32 (scalar_to_vector (loadi32 node:$src))))))>;
762
763def vzload_v2i64 : PatFrag<(ops node:$src),
764 (bitconvert (v2i64 (X86vzload node:$src)))>;
765
766
767def fp32imm0 : PatLeaf<(f32 fpimm), [{
768 return N->isExactlyValue(+0.0);
769}]>;
770
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]771def I8Imm : SDNodeXForm<imm, [{
772 // Transformation function: get the low 8 bits.
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]773 return getI8Imm((uint8_t)N->getZExtValue(), SDLoc(N));
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]774}]>;
775
776def FROUND_NO_EXC : ImmLeaf<i32, [{ return Imm == 8; }]>;
Adam Nemet50b83f02014-08-14 17:13:26 +0000[diff] [blame]777def FROUND_CURRENT : ImmLeaf<i32, [{
778 return Imm == X86::STATIC_ROUNDING::CUR_DIRECTION;
779}]>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]780
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]781// BYTE_imm - Transform bit immediates into byte immediates.
782def BYTE_imm : SDNodeXForm<imm, [{
783 // Transformation function: imm >> 3
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]784 return getI32Imm(N->getZExtValue() >> 3, SDLoc(N));
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]785}]>;
786
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]787// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index
788// to VEXTRACTF128/VEXTRACTI128 imm.
789def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]790 return getI8Imm(X86::getExtractVEXTRACT128Immediate(N), SDLoc(N));
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]791}]>;
792
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]793// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to
794// VINSERTF128/VINSERTI128 imm.
795def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]796 return getI8Imm(X86::getInsertVINSERT128Immediate(N), SDLoc(N));
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]797}]>;
798
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]799// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index
800// to VEXTRACTF64x4 imm.
801def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]802 return getI8Imm(X86::getExtractVEXTRACT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]803}]>;
804
805// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to
806// VINSERTF64x4 imm.
807def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]808 return getI8Imm(X86::getInsertVINSERT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]809}]>;
810
811def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index),
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]812 (extract_subvector node:$bigvec,
813 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]814 return X86::isVEXTRACT128Index(N);
815}], EXTRACT_get_vextract128_imm>;
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]816
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]817def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]818 node:$index),
819 (insert_subvector node:$bigvec, node:$smallvec,
820 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]821 return X86::isVINSERT128Index(N);
822}], INSERT_get_vinsert128_imm>;
823
824
825def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index),
826 (extract_subvector node:$bigvec,
827 node:$index), [{
828 return X86::isVEXTRACT256Index(N);
829}], EXTRACT_get_vextract256_imm>;
830
831def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
832 node:$index),
833 (insert_subvector node:$bigvec, node:$smallvec,
834 node:$index), [{
835 return X86::isVINSERT256Index(N);
836}], INSERT_get_vinsert256_imm>;
Bruno Cardoso Lopes123dff02011-07-25 23:05:25 +0000[diff] [blame]837
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]838def masked_load_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
839 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]840 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
841 return Load->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]842 return false;
843}]>;
844
845def masked_load_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
846 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]847 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
848 return Load->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]849 return false;
850}]>;
851
852def masked_load_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
853 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]854 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
855 return Load->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]856 return false;
857}]>;
858
859def masked_load_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
860 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]861 return isa<MaskedLoadSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]862}]>;
863
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]864// masked store fragments.
865// X86mstore can't be implemented in core DAG files because some targets
866// doesn't support vector type ( llvm-tblgen will fail)
867def X86mstore : PatFrag<(ops node:$src1, node:$src2, node:$src3),
868 (masked_store node:$src1, node:$src2, node:$src3), [{
869 return !cast<MaskedStoreSDNode>(N)->isTruncatingStore();
870}]>;
871
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]872def masked_store_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]873 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]874 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
875 return Store->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]876 return false;
877}]>;
878
879def masked_store_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]880 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]881 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
882 return Store->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]883 return false;
884}]>;
885
886def masked_store_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]887 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]888 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
889 return Store->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]890 return false;
891}]>;
892
893def masked_store_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]894 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]895 return isa<MaskedStoreSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]896}]>;
897
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]898// masked truncstore fragments
899// X86mtruncstore can't be implemented in core DAG files because some targets
900// doesn't support vector type ( llvm-tblgen will fail)
901def X86mtruncstore : PatFrag<(ops node:$src1, node:$src2, node:$src3),
902 (masked_store node:$src1, node:$src2, node:$src3), [{
903 return cast<MaskedStoreSDNode>(N)->isTruncatingStore();
904}]>;
905def masked_truncstorevi8 :
906 PatFrag<(ops node:$src1, node:$src2, node:$src3),
907 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{
908 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;
909}]>;
910def masked_truncstorevi16 :
911 PatFrag<(ops node:$src1, node:$src2, node:$src3),
912 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{
913 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;
914}]>;
915def masked_truncstorevi32 :
916 PatFrag<(ops node:$src1, node:$src2, node:$src3),
917 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{
918 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;
919}]>;