Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Driver for OHCI 1394 controllers |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3 | * |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 4 | * Copyright (C) 2003-2006 Kristian Hoegsberg <krh@bitplanet.net> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software Foundation, |
| 18 | * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 19 | */ |
| 20 | |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 21 | #include <linux/bitops.h> |
Stefan Richter | 65b2742 | 2010-06-12 20:26:51 +0200 | [diff] [blame] | 22 | #include <linux/bug.h> |
Stefan Richter | e524f616 | 2007-08-20 21:58:30 +0200 | [diff] [blame] | 23 | #include <linux/compiler.h> |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 24 | #include <linux/delay.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 25 | #include <linux/device.h> |
Andrew Morton | cf3e72f | 2006-12-27 14:36:37 -0800 | [diff] [blame] | 26 | #include <linux/dma-mapping.h> |
Stefan Richter | 77c9a5d | 2009-06-05 16:26:18 +0200 | [diff] [blame] | 27 | #include <linux/firewire.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 28 | #include <linux/firewire-constants.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 29 | #include <linux/init.h> |
| 30 | #include <linux/interrupt.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 31 | #include <linux/io.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 32 | #include <linux/kernel.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 33 | #include <linux/list.h> |
Al Viro | faa2fb4 | 2007-05-15 20:36:10 +0100 | [diff] [blame] | 34 | #include <linux/mm.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 35 | #include <linux/module.h> |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 36 | #include <linux/moduleparam.h> |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 37 | #include <linux/mutex.h> |
Stefan Richter | a7fb60d | 2007-08-20 21:41:22 +0200 | [diff] [blame] | 38 | #include <linux/pci.h> |
Stefan Richter | fc38379 | 2009-08-28 13:25:15 +0200 | [diff] [blame] | 39 | #include <linux/pci_ids.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 40 | #include <linux/slab.h> |
Stefan Richter | c26f023 | 2007-08-20 21:40:30 +0200 | [diff] [blame] | 41 | #include <linux/spinlock.h> |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 42 | #include <linux/string.h> |
Stefan Richter | e78483c | 2010-08-02 09:33:25 +0200 | [diff] [blame] | 43 | #include <linux/time.h> |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 44 | #include <linux/vmalloc.h> |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 45 | #include <linux/workqueue.h> |
Andrew Morton | cf3e72f | 2006-12-27 14:36:37 -0800 | [diff] [blame] | 46 | |
Stefan Richter | e8ca970 | 2009-06-04 21:09:38 +0200 | [diff] [blame] | 47 | #include <asm/byteorder.h> |
Stefan Richter | c26f023 | 2007-08-20 21:40:30 +0200 | [diff] [blame] | 48 | #include <asm/page.h> |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 49 | |
Stefan Richter | ea8d006 | 2008-03-01 02:42:56 +0100 | [diff] [blame] | 50 | #ifdef CONFIG_PPC_PMAC |
| 51 | #include <asm/pmac_feature.h> |
| 52 | #endif |
| 53 | |
Stefan Richter | 77c9a5d | 2009-06-05 16:26:18 +0200 | [diff] [blame] | 54 | #include "core.h" |
| 55 | #include "ohci.h" |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 56 | |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 57 | #define ohci_info(ohci, f, args...) dev_info(ohci->card.device, f, ##args) |
| 58 | #define ohci_notice(ohci, f, args...) dev_notice(ohci->card.device, f, ##args) |
| 59 | #define ohci_err(ohci, f, args...) dev_err(ohci->card.device, f, ##args) |
| 60 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 61 | #define DESCRIPTOR_OUTPUT_MORE 0 |
| 62 | #define DESCRIPTOR_OUTPUT_LAST (1 << 12) |
| 63 | #define DESCRIPTOR_INPUT_MORE (2 << 12) |
| 64 | #define DESCRIPTOR_INPUT_LAST (3 << 12) |
| 65 | #define DESCRIPTOR_STATUS (1 << 11) |
| 66 | #define DESCRIPTOR_KEY_IMMEDIATE (2 << 8) |
| 67 | #define DESCRIPTOR_PING (1 << 7) |
| 68 | #define DESCRIPTOR_YY (1 << 6) |
| 69 | #define DESCRIPTOR_NO_IRQ (0 << 4) |
| 70 | #define DESCRIPTOR_IRQ_ERROR (1 << 4) |
| 71 | #define DESCRIPTOR_IRQ_ALWAYS (3 << 4) |
| 72 | #define DESCRIPTOR_BRANCH_ALWAYS (3 << 2) |
| 73 | #define DESCRIPTOR_WAIT (3 << 0) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 74 | |
Andy Leiserson | be8dcab | 2013-04-24 09:10:32 -0700 | [diff] [blame] | 75 | #define DESCRIPTOR_CMD (0xf << 12) |
| 76 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 77 | struct descriptor { |
| 78 | __le16 req_count; |
| 79 | __le16 control; |
| 80 | __le32 data_address; |
| 81 | __le32 branch_address; |
| 82 | __le16 res_count; |
| 83 | __le16 transfer_status; |
| 84 | } __attribute__((aligned(16))); |
| 85 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 86 | #define CONTROL_SET(regs) (regs) |
| 87 | #define CONTROL_CLEAR(regs) ((regs) + 4) |
| 88 | #define COMMAND_PTR(regs) ((regs) + 12) |
| 89 | #define CONTEXT_MATCH(regs) ((regs) + 16) |
Kristian Høgsberg | 72e318e | 2007-02-06 14:49:31 -0500 | [diff] [blame] | 90 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 91 | #define AR_BUFFER_SIZE (32*1024) |
| 92 | #define AR_BUFFERS_MIN DIV_ROUND_UP(AR_BUFFER_SIZE, PAGE_SIZE) |
| 93 | /* we need at least two pages for proper list management */ |
| 94 | #define AR_BUFFERS (AR_BUFFERS_MIN >= 2 ? AR_BUFFERS_MIN : 2) |
| 95 | |
| 96 | #define MAX_ASYNC_PAYLOAD 4096 |
| 97 | #define MAX_AR_PACKET_SIZE (16 + MAX_ASYNC_PAYLOAD + 4) |
| 98 | #define AR_WRAPAROUND_PAGES DIV_ROUND_UP(MAX_AR_PACKET_SIZE, PAGE_SIZE) |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 99 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 100 | struct ar_context { |
| 101 | struct fw_ohci *ohci; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 102 | struct page *pages[AR_BUFFERS]; |
| 103 | void *buffer; |
| 104 | struct descriptor *descriptors; |
| 105 | dma_addr_t descriptors_bus; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 106 | void *pointer; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 107 | unsigned int last_buffer_index; |
Kristian Høgsberg | 72e318e | 2007-02-06 14:49:31 -0500 | [diff] [blame] | 108 | u32 regs; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 109 | struct tasklet_struct tasklet; |
| 110 | }; |
| 111 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 112 | struct context; |
| 113 | |
| 114 | typedef int (*descriptor_callback_t)(struct context *ctx, |
| 115 | struct descriptor *d, |
| 116 | struct descriptor *last); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 117 | |
| 118 | /* |
| 119 | * A buffer that contains a block of DMA-able coherent memory used for |
| 120 | * storing a portion of a DMA descriptor program. |
| 121 | */ |
| 122 | struct descriptor_buffer { |
| 123 | struct list_head list; |
| 124 | dma_addr_t buffer_bus; |
| 125 | size_t buffer_size; |
| 126 | size_t used; |
| 127 | struct descriptor buffer[0]; |
| 128 | }; |
| 129 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 130 | struct context { |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 131 | struct fw_ohci *ohci; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 132 | u32 regs; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 133 | int total_allocation; |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 134 | u32 current_bus; |
Clemens Ladisch | 386a415 | 2010-12-24 14:42:46 +0100 | [diff] [blame] | 135 | bool running; |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 136 | bool flushing; |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 137 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 138 | /* |
| 139 | * List of page-sized buffers for storing DMA descriptors. |
| 140 | * Head of list contains buffers in use and tail of list contains |
| 141 | * free buffers. |
| 142 | */ |
| 143 | struct list_head buffer_list; |
| 144 | |
| 145 | /* |
| 146 | * Pointer to a buffer inside buffer_list that contains the tail |
| 147 | * end of the current DMA program. |
| 148 | */ |
| 149 | struct descriptor_buffer *buffer_tail; |
| 150 | |
| 151 | /* |
| 152 | * The descriptor containing the branch address of the first |
| 153 | * descriptor that has not yet been filled by the device. |
| 154 | */ |
| 155 | struct descriptor *last; |
| 156 | |
| 157 | /* |
Andy Leiserson | be8dcab | 2013-04-24 09:10:32 -0700 | [diff] [blame] | 158 | * The last descriptor block in the DMA program. It contains the branch |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 159 | * address that must be updated upon appending a new descriptor. |
| 160 | */ |
| 161 | struct descriptor *prev; |
Andy Leiserson | be8dcab | 2013-04-24 09:10:32 -0700 | [diff] [blame] | 162 | int prev_z; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 163 | |
| 164 | descriptor_callback_t callback; |
| 165 | |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 166 | struct tasklet_struct tasklet; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 167 | }; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 168 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 169 | #define IT_HEADER_SY(v) ((v) << 0) |
| 170 | #define IT_HEADER_TCODE(v) ((v) << 4) |
| 171 | #define IT_HEADER_CHANNEL(v) ((v) << 8) |
| 172 | #define IT_HEADER_TAG(v) ((v) << 14) |
| 173 | #define IT_HEADER_SPEED(v) ((v) << 16) |
| 174 | #define IT_HEADER_DATA_LENGTH(v) ((v) << 16) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 175 | |
| 176 | struct iso_context { |
| 177 | struct fw_iso_context base; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 178 | struct context context; |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 179 | void *header; |
| 180 | size_t header_length; |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 181 | unsigned long flushing_completions; |
| 182 | u32 mc_buffer_bus; |
| 183 | u16 mc_completed; |
Clemens Ladisch | 910e76c | 2012-03-18 19:04:43 +0100 | [diff] [blame] | 184 | u16 last_timestamp; |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 185 | u8 sync; |
| 186 | u8 tags; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 187 | }; |
| 188 | |
| 189 | #define CONFIG_ROM_SIZE 1024 |
| 190 | |
| 191 | struct fw_ohci { |
| 192 | struct fw_card card; |
| 193 | |
| 194 | __iomem char *registers; |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 195 | int node_id; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 196 | int generation; |
Stefan Richter | e09770d | 2008-03-11 02:23:29 +0100 | [diff] [blame] | 197 | int request_generation; /* for timestamping incoming requests */ |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 198 | unsigned quirks; |
Clemens Ladisch | a1a1132 | 2010-06-10 08:35:06 +0200 | [diff] [blame] | 199 | unsigned int pri_req_max; |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 200 | u32 bus_time; |
Clemens Ladisch | 9d60ef2 | 2012-05-24 19:29:19 +0200 | [diff] [blame] | 201 | bool bus_time_running; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 202 | bool is_root; |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 203 | bool csr_state_setclear_abdicate; |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 204 | int n_ir; |
| 205 | int n_it; |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 206 | /* |
| 207 | * Spinlock for accessing fw_ohci data. Never call out of |
| 208 | * this driver with this lock held. |
| 209 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 210 | spinlock_t lock; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 211 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 212 | struct mutex phy_reg_mutex; |
| 213 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 214 | void *misc_buffer; |
| 215 | dma_addr_t misc_buffer_bus; |
| 216 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 217 | struct ar_context ar_request_ctx; |
| 218 | struct ar_context ar_response_ctx; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 219 | struct context at_request_ctx; |
| 220 | struct context at_response_ctx; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 221 | |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 222 | u32 it_context_support; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 223 | u32 it_context_mask; /* unoccupied IT contexts */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 224 | struct iso_context *it_context_list; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 225 | u64 ir_context_channels; /* unoccupied channels */ |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 226 | u32 ir_context_support; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 227 | u32 ir_context_mask; /* unoccupied IR contexts */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 228 | struct iso_context *ir_context_list; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 229 | u64 mc_channels; /* channels in use by the multichannel IR context */ |
| 230 | bool mc_allocated; |
Stefan Richter | ecb1cf9 | 2010-02-21 17:57:32 +0100 | [diff] [blame] | 231 | |
| 232 | __be32 *config_rom; |
| 233 | dma_addr_t config_rom_bus; |
| 234 | __be32 *next_config_rom; |
| 235 | dma_addr_t next_config_rom_bus; |
| 236 | __be32 next_header; |
| 237 | |
Stefan Richter | af53122 | 2013-08-05 15:10:38 +0200 | [diff] [blame] | 238 | __le32 *self_id; |
Stefan Richter | ecb1cf9 | 2010-02-21 17:57:32 +0100 | [diff] [blame] | 239 | dma_addr_t self_id_bus; |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 240 | struct work_struct bus_reset_work; |
Stefan Richter | ecb1cf9 | 2010-02-21 17:57:32 +0100 | [diff] [blame] | 241 | |
| 242 | u32 self_id_buffer[512]; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 243 | }; |
| 244 | |
Stephan Gatzka | db9ae8f | 2013-08-26 20:50:05 +0200 | [diff] [blame] | 245 | static struct workqueue_struct *selfid_workqueue; |
| 246 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 247 | static inline struct fw_ohci *fw_ohci(struct fw_card *card) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 248 | { |
| 249 | return container_of(card, struct fw_ohci, card); |
| 250 | } |
| 251 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 252 | #define IT_CONTEXT_CYCLE_MATCH_ENABLE 0x80000000 |
| 253 | #define IR_CONTEXT_BUFFER_FILL 0x80000000 |
| 254 | #define IR_CONTEXT_ISOCH_HEADER 0x40000000 |
| 255 | #define IR_CONTEXT_CYCLE_MATCH_ENABLE 0x20000000 |
| 256 | #define IR_CONTEXT_MULTI_CHANNEL_MODE 0x10000000 |
| 257 | #define IR_CONTEXT_DUAL_BUFFER_MODE 0x08000000 |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 258 | |
| 259 | #define CONTEXT_RUN 0x8000 |
| 260 | #define CONTEXT_WAKE 0x1000 |
| 261 | #define CONTEXT_DEAD 0x0800 |
| 262 | #define CONTEXT_ACTIVE 0x0400 |
| 263 | |
Stefan Richter | 8b7b6af | 2009-01-20 19:10:58 +0100 | [diff] [blame] | 264 | #define OHCI1394_MAX_AT_REQ_RETRIES 0xf |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 265 | #define OHCI1394_MAX_AT_RESP_RETRIES 0x2 |
| 266 | #define OHCI1394_MAX_PHYS_RESP_RETRIES 0x8 |
| 267 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 268 | #define OHCI1394_REGISTER_SIZE 0x800 |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 269 | #define OHCI1394_PCI_HCI_Control 0x40 |
| 270 | #define SELF_ID_BUF_SIZE 0x800 |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 271 | #define OHCI_TCODE_PHY_PACKET 0x0e |
Kristian Høgsberg | e364cf4 | 2007-02-16 17:34:49 -0500 | [diff] [blame] | 272 | #define OHCI_VERSION_1_1 0x010010 |
Kristian Høgsberg | 0edeefd | 2007-01-26 00:38:49 -0500 | [diff] [blame] | 273 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 274 | static char ohci_driver_name[] = KBUILD_MODNAME; |
| 275 | |
Stefan Richter | 0dbe15f | 2013-08-05 15:14:36 +0200 | [diff] [blame] | 276 | #define PCI_VENDOR_ID_PINNACLE_SYSTEMS 0x11bd |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 277 | #define PCI_DEVICE_ID_AGERE_FW643 0x5901 |
Clemens Ladisch | d1bb399 | 2012-01-26 22:05:58 +0100 | [diff] [blame] | 278 | #define PCI_DEVICE_ID_CREATIVE_SB1394 0x4001 |
Clemens Ladisch | 262444e | 2010-06-05 12:31:25 +0200 | [diff] [blame] | 279 | #define PCI_DEVICE_ID_JMICRON_JMB38X_FW 0x2380 |
Clemens Ladisch | 8301b91 | 2010-03-17 11:07:55 +0100 | [diff] [blame] | 280 | #define PCI_DEVICE_ID_TI_TSB12LV22 0x8009 |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 281 | #define PCI_DEVICE_ID_TI_TSB12LV26 0x8020 |
| 282 | #define PCI_DEVICE_ID_TI_TSB82AA2 0x8025 |
Andy Leiserson | be8dcab | 2013-04-24 09:10:32 -0700 | [diff] [blame] | 283 | #define PCI_DEVICE_ID_VIA_VT630X 0x3044 |
Andy Leiserson | be8dcab | 2013-04-24 09:10:32 -0700 | [diff] [blame] | 284 | #define PCI_REV_ID_VIA_VT6306 0x46 |
Clemens Ladisch | 8301b91 | 2010-03-17 11:07:55 +0100 | [diff] [blame] | 285 | |
Stefan Richter | 0dbe15f | 2013-08-05 15:14:36 +0200 | [diff] [blame] | 286 | #define QUIRK_CYCLE_TIMER 0x1 |
| 287 | #define QUIRK_RESET_PACKET 0x2 |
| 288 | #define QUIRK_BE_HEADERS 0x4 |
| 289 | #define QUIRK_NO_1394A 0x8 |
| 290 | #define QUIRK_NO_MSI 0x10 |
| 291 | #define QUIRK_TI_SLLZ059 0x20 |
| 292 | #define QUIRK_IR_WAKE 0x40 |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 293 | |
| 294 | /* In case of multiple matches in ohci_quirks[], only the first one is used. */ |
| 295 | static const struct { |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 296 | unsigned short vendor, device, revision, flags; |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 297 | } ohci_quirks[] = { |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 298 | {PCI_VENDOR_ID_AL, PCI_ANY_ID, PCI_ANY_ID, |
| 299 | QUIRK_CYCLE_TIMER}, |
| 300 | |
| 301 | {PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_FW, PCI_ANY_ID, |
| 302 | QUIRK_BE_HEADERS}, |
| 303 | |
| 304 | {PCI_VENDOR_ID_ATT, PCI_DEVICE_ID_AGERE_FW643, 6, |
Stefan Richter | 0ca4934 | 2014-03-06 20:39:04 +0100 | [diff] [blame] | 305 | QUIRK_NO_MSI}, |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 306 | |
Clemens Ladisch | d1bb399 | 2012-01-26 22:05:58 +0100 | [diff] [blame] | 307 | {PCI_VENDOR_ID_CREATIVE, PCI_DEVICE_ID_CREATIVE_SB1394, PCI_ANY_ID, |
| 308 | QUIRK_RESET_PACKET}, |
| 309 | |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 310 | {PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB38X_FW, PCI_ANY_ID, |
| 311 | QUIRK_NO_MSI}, |
| 312 | |
| 313 | {PCI_VENDOR_ID_NEC, PCI_ANY_ID, PCI_ANY_ID, |
| 314 | QUIRK_CYCLE_TIMER}, |
| 315 | |
Ming Lei | f39aa30 | 2011-08-31 10:45:46 +0800 | [diff] [blame] | 316 | {PCI_VENDOR_ID_O2, PCI_ANY_ID, PCI_ANY_ID, |
| 317 | QUIRK_NO_MSI}, |
| 318 | |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 319 | {PCI_VENDOR_ID_RICOH, PCI_ANY_ID, PCI_ANY_ID, |
Stefan Richter | 320cfa6 | 2012-01-29 12:41:15 +0100 | [diff] [blame] | 320 | QUIRK_CYCLE_TIMER | QUIRK_NO_MSI}, |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 321 | |
| 322 | {PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_TSB12LV22, PCI_ANY_ID, |
| 323 | QUIRK_CYCLE_TIMER | QUIRK_RESET_PACKET | QUIRK_NO_1394A}, |
| 324 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 325 | {PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_TSB12LV26, PCI_ANY_ID, |
| 326 | QUIRK_RESET_PACKET | QUIRK_TI_SLLZ059}, |
| 327 | |
| 328 | {PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_TSB82AA2, PCI_ANY_ID, |
| 329 | QUIRK_RESET_PACKET | QUIRK_TI_SLLZ059}, |
| 330 | |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 331 | {PCI_VENDOR_ID_TI, PCI_ANY_ID, PCI_ANY_ID, |
| 332 | QUIRK_RESET_PACKET}, |
| 333 | |
Andy Leiserson | be8dcab | 2013-04-24 09:10:32 -0700 | [diff] [blame] | 334 | {PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT630X, PCI_REV_ID_VIA_VT6306, |
| 335 | QUIRK_CYCLE_TIMER | QUIRK_IR_WAKE}, |
| 336 | |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 337 | {PCI_VENDOR_ID_VIA, PCI_ANY_ID, PCI_ANY_ID, |
| 338 | QUIRK_CYCLE_TIMER | QUIRK_NO_MSI}, |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 339 | }; |
| 340 | |
Stefan Richter | 3e9cc2f | 2010-02-21 17:58:29 +0100 | [diff] [blame] | 341 | /* This overrides anything that was found in ohci_quirks[]. */ |
| 342 | static int param_quirks; |
| 343 | module_param_named(quirks, param_quirks, int, 0644); |
| 344 | MODULE_PARM_DESC(quirks, "Chip quirks (default = 0" |
| 345 | ", nonatomic cycle timer = " __stringify(QUIRK_CYCLE_TIMER) |
| 346 | ", reset packet generation = " __stringify(QUIRK_RESET_PACKET) |
Masanari Iida | 8a168ca | 2012-12-29 02:00:09 +0900 | [diff] [blame] | 347 | ", AR/selfID endianness = " __stringify(QUIRK_BE_HEADERS) |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 348 | ", no 1394a enhancements = " __stringify(QUIRK_NO_1394A) |
Clemens Ladisch | 262444e | 2010-06-05 12:31:25 +0200 | [diff] [blame] | 349 | ", disable MSI = " __stringify(QUIRK_NO_MSI) |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 350 | ", TI SLLZ059 erratum = " __stringify(QUIRK_TI_SLLZ059) |
Andy Leiserson | be8dcab | 2013-04-24 09:10:32 -0700 | [diff] [blame] | 351 | ", IR wake unreliable = " __stringify(QUIRK_IR_WAKE) |
Stefan Richter | 3e9cc2f | 2010-02-21 17:58:29 +0100 | [diff] [blame] | 352 | ")"); |
| 353 | |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 354 | #define OHCI_PARAM_DEBUG_AT_AR 1 |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 355 | #define OHCI_PARAM_DEBUG_SELFIDS 2 |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 356 | #define OHCI_PARAM_DEBUG_IRQS 4 |
| 357 | #define OHCI_PARAM_DEBUG_BUSRESETS 8 /* only effective before chip init */ |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 358 | |
| 359 | static int param_debug; |
| 360 | module_param_named(debug, param_debug, int, 0644); |
| 361 | MODULE_PARM_DESC(debug, "Verbose logging (default = 0" |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 362 | ", AT/AR events = " __stringify(OHCI_PARAM_DEBUG_AT_AR) |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 363 | ", self-IDs = " __stringify(OHCI_PARAM_DEBUG_SELFIDS) |
| 364 | ", IRQs = " __stringify(OHCI_PARAM_DEBUG_IRQS) |
| 365 | ", busReset events = " __stringify(OHCI_PARAM_DEBUG_BUSRESETS) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 366 | ", or a combination, or all = -1)"); |
| 367 | |
Lubomir Rintel | 8bc588e | 2013-12-22 11:34:22 +0100 | [diff] [blame] | 368 | static bool param_remote_dma; |
| 369 | module_param_named(remote_dma, param_remote_dma, bool, 0444); |
| 370 | MODULE_PARM_DESC(remote_dma, "Enable unfiltered remote DMA (default = N)"); |
| 371 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 372 | static void log_irqs(struct fw_ohci *ohci, u32 evt) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 373 | { |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 374 | if (likely(!(param_debug & |
| 375 | (OHCI_PARAM_DEBUG_IRQS | OHCI_PARAM_DEBUG_BUSRESETS)))) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 376 | return; |
| 377 | |
Stefan Richter | a007bb8 | 2008-04-07 22:33:35 +0200 | [diff] [blame] | 378 | if (!(param_debug & OHCI_PARAM_DEBUG_IRQS) && |
| 379 | !(evt & OHCI1394_busReset)) |
| 380 | return; |
| 381 | |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 382 | ohci_notice(ohci, "IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt, |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 383 | evt & OHCI1394_selfIDComplete ? " selfID" : "", |
| 384 | evt & OHCI1394_RQPkt ? " AR_req" : "", |
| 385 | evt & OHCI1394_RSPkt ? " AR_resp" : "", |
| 386 | evt & OHCI1394_reqTxComplete ? " AT_req" : "", |
| 387 | evt & OHCI1394_respTxComplete ? " AT_resp" : "", |
| 388 | evt & OHCI1394_isochRx ? " IR" : "", |
| 389 | evt & OHCI1394_isochTx ? " IT" : "", |
| 390 | evt & OHCI1394_postedWriteErr ? " postedWriteErr" : "", |
| 391 | evt & OHCI1394_cycleTooLong ? " cycleTooLong" : "", |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 392 | evt & OHCI1394_cycle64Seconds ? " cycle64Seconds" : "", |
Jay Fenlason | 5ed1f32 | 2009-11-17 12:29:17 -0500 | [diff] [blame] | 393 | evt & OHCI1394_cycleInconsistent ? " cycleInconsistent" : "", |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 394 | evt & OHCI1394_regAccessFail ? " regAccessFail" : "", |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 395 | evt & OHCI1394_unrecoverableError ? " unrecoverableError" : "", |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 396 | evt & OHCI1394_busReset ? " busReset" : "", |
| 397 | evt & ~(OHCI1394_selfIDComplete | OHCI1394_RQPkt | |
| 398 | OHCI1394_RSPkt | OHCI1394_reqTxComplete | |
| 399 | OHCI1394_respTxComplete | OHCI1394_isochRx | |
| 400 | OHCI1394_isochTx | OHCI1394_postedWriteErr | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 401 | OHCI1394_cycleTooLong | OHCI1394_cycle64Seconds | |
| 402 | OHCI1394_cycleInconsistent | |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 403 | OHCI1394_regAccessFail | OHCI1394_busReset) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 404 | ? " ?" : ""); |
| 405 | } |
| 406 | |
| 407 | static const char *speed[] = { |
| 408 | [0] = "S100", [1] = "S200", [2] = "S400", [3] = "beta", |
| 409 | }; |
| 410 | static const char *power[] = { |
| 411 | [0] = "+0W", [1] = "+15W", [2] = "+30W", [3] = "+45W", |
| 412 | [4] = "-3W", [5] = " ?W", [6] = "-3..-6W", [7] = "-3..-10W", |
| 413 | }; |
| 414 | static const char port[] = { '.', '-', 'p', 'c', }; |
| 415 | |
| 416 | static char _p(u32 *s, int shift) |
| 417 | { |
| 418 | return port[*s >> shift & 3]; |
| 419 | } |
| 420 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 421 | static void log_selfids(struct fw_ohci *ohci, int generation, int self_id_count) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 422 | { |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 423 | u32 *s; |
| 424 | |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 425 | if (likely(!(param_debug & OHCI_PARAM_DEBUG_SELFIDS))) |
| 426 | return; |
| 427 | |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 428 | ohci_notice(ohci, "%d selfIDs, generation %d, local node ID %04x\n", |
| 429 | self_id_count, generation, ohci->node_id); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 430 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 431 | for (s = ohci->self_id_buffer; self_id_count--; ++s) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 432 | if ((*s & 1 << 23) == 0) |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 433 | ohci_notice(ohci, |
| 434 | "selfID 0: %08x, phy %d [%c%c%c] %s gc=%d %s %s%s%s\n", |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 435 | *s, *s >> 24 & 63, _p(s, 6), _p(s, 4), _p(s, 2), |
| 436 | speed[*s >> 14 & 3], *s >> 16 & 63, |
| 437 | power[*s >> 8 & 7], *s >> 22 & 1 ? "L" : "", |
| 438 | *s >> 11 & 1 ? "c" : "", *s & 2 ? "i" : ""); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 439 | else |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 440 | ohci_notice(ohci, |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 441 | "selfID n: %08x, phy %d [%c%c%c%c%c%c%c%c]\n", |
Stefan Richter | 161b96e | 2008-06-14 14:23:43 +0200 | [diff] [blame] | 442 | *s, *s >> 24 & 63, |
| 443 | _p(s, 16), _p(s, 14), _p(s, 12), _p(s, 10), |
| 444 | _p(s, 8), _p(s, 6), _p(s, 4), _p(s, 2)); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 445 | } |
| 446 | |
| 447 | static const char *evts[] = { |
| 448 | [0x00] = "evt_no_status", [0x01] = "-reserved-", |
| 449 | [0x02] = "evt_long_packet", [0x03] = "evt_missing_ack", |
| 450 | [0x04] = "evt_underrun", [0x05] = "evt_overrun", |
| 451 | [0x06] = "evt_descriptor_read", [0x07] = "evt_data_read", |
| 452 | [0x08] = "evt_data_write", [0x09] = "evt_bus_reset", |
| 453 | [0x0a] = "evt_timeout", [0x0b] = "evt_tcode_err", |
| 454 | [0x0c] = "-reserved-", [0x0d] = "-reserved-", |
| 455 | [0x0e] = "evt_unknown", [0x0f] = "evt_flushed", |
| 456 | [0x10] = "-reserved-", [0x11] = "ack_complete", |
| 457 | [0x12] = "ack_pending ", [0x13] = "-reserved-", |
| 458 | [0x14] = "ack_busy_X", [0x15] = "ack_busy_A", |
| 459 | [0x16] = "ack_busy_B", [0x17] = "-reserved-", |
| 460 | [0x18] = "-reserved-", [0x19] = "-reserved-", |
| 461 | [0x1a] = "-reserved-", [0x1b] = "ack_tardy", |
| 462 | [0x1c] = "-reserved-", [0x1d] = "ack_data_error", |
| 463 | [0x1e] = "ack_type_error", [0x1f] = "-reserved-", |
| 464 | [0x20] = "pending/cancelled", |
| 465 | }; |
| 466 | static const char *tcodes[] = { |
| 467 | [0x0] = "QW req", [0x1] = "BW req", |
| 468 | [0x2] = "W resp", [0x3] = "-reserved-", |
| 469 | [0x4] = "QR req", [0x5] = "BR req", |
| 470 | [0x6] = "QR resp", [0x7] = "BR resp", |
| 471 | [0x8] = "cycle start", [0x9] = "Lk req", |
| 472 | [0xa] = "async stream packet", [0xb] = "Lk resp", |
| 473 | [0xc] = "-reserved-", [0xd] = "-reserved-", |
| 474 | [0xe] = "link internal", [0xf] = "-reserved-", |
| 475 | }; |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 476 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 477 | static void log_ar_at_event(struct fw_ohci *ohci, |
| 478 | char dir, int speed, u32 *header, int evt) |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 479 | { |
| 480 | int tcode = header[0] >> 4 & 0xf; |
| 481 | char specific[12]; |
| 482 | |
| 483 | if (likely(!(param_debug & OHCI_PARAM_DEBUG_AT_AR))) |
| 484 | return; |
| 485 | |
| 486 | if (unlikely(evt >= ARRAY_SIZE(evts))) |
| 487 | evt = 0x1f; |
| 488 | |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 489 | if (evt == OHCI1394_evt_bus_reset) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 490 | ohci_notice(ohci, "A%c evt_bus_reset, generation %d\n", |
| 491 | dir, (header[2] >> 16) & 0xff); |
Stefan Richter | 08ddb2f | 2008-04-11 00:51:15 +0200 | [diff] [blame] | 492 | return; |
| 493 | } |
| 494 | |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 495 | switch (tcode) { |
| 496 | case 0x0: case 0x6: case 0x8: |
| 497 | snprintf(specific, sizeof(specific), " = %08x", |
| 498 | be32_to_cpu((__force __be32)header[3])); |
| 499 | break; |
| 500 | case 0x1: case 0x5: case 0x7: case 0x9: case 0xb: |
| 501 | snprintf(specific, sizeof(specific), " %x,%x", |
| 502 | header[3] >> 16, header[3] & 0xffff); |
| 503 | break; |
| 504 | default: |
| 505 | specific[0] = '\0'; |
| 506 | } |
| 507 | |
| 508 | switch (tcode) { |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 509 | case 0xa: |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 510 | ohci_notice(ohci, "A%c %s, %s\n", |
| 511 | dir, evts[evt], tcodes[tcode]); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 512 | break; |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 513 | case 0xe: |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 514 | ohci_notice(ohci, "A%c %s, PHY %08x %08x\n", |
| 515 | dir, evts[evt], header[1], header[2]); |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 516 | break; |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 517 | case 0x0: case 0x1: case 0x4: case 0x5: case 0x9: |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 518 | ohci_notice(ohci, |
| 519 | "A%c spd %x tl %02x, %04x -> %04x, %s, %s, %04x%08x%s\n", |
| 520 | dir, speed, header[0] >> 10 & 0x3f, |
| 521 | header[1] >> 16, header[0] >> 16, evts[evt], |
| 522 | tcodes[tcode], header[1] & 0xffff, header[2], specific); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 523 | break; |
| 524 | default: |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 525 | ohci_notice(ohci, |
| 526 | "A%c spd %x tl %02x, %04x -> %04x, %s, %s%s\n", |
| 527 | dir, speed, header[0] >> 10 & 0x3f, |
| 528 | header[1] >> 16, header[0] >> 16, evts[evt], |
| 529 | tcodes[tcode], specific); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 530 | } |
| 531 | } |
| 532 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 533 | static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 534 | { |
| 535 | writel(data, ohci->registers + offset); |
| 536 | } |
| 537 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 538 | static inline u32 reg_read(const struct fw_ohci *ohci, int offset) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 539 | { |
| 540 | return readl(ohci->registers + offset); |
| 541 | } |
| 542 | |
Adrian Bunk | 95688e9 | 2007-01-22 19:17:37 +0100 | [diff] [blame] | 543 | static inline void flush_writes(const struct fw_ohci *ohci) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 544 | { |
| 545 | /* Do a dummy read to flush writes. */ |
| 546 | reg_read(ohci, OHCI1394_Version); |
| 547 | } |
| 548 | |
Stefan Richter | b14c369 | 2011-06-21 15:24:26 +0200 | [diff] [blame] | 549 | /* |
| 550 | * Beware! read_phy_reg(), write_phy_reg(), update_phy_reg(), and |
| 551 | * read_paged_phy_reg() require the caller to hold ohci->phy_reg_mutex. |
| 552 | * In other words, only use ohci_read_phy_reg() and ohci_update_phy_reg() |
| 553 | * directly. Exceptions are intrinsically serialized contexts like pci_probe. |
| 554 | */ |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 555 | static int read_phy_reg(struct fw_ohci *ohci, int addr) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 556 | { |
Clemens Ladisch | 4a96b4f | 2010-04-04 15:19:52 +0200 | [diff] [blame] | 557 | u32 val; |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 558 | int i; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 559 | |
| 560 | reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); |
Clemens Ladisch | 153e397 | 2010-06-10 08:22:07 +0200 | [diff] [blame] | 561 | for (i = 0; i < 3 + 100; i++) { |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 562 | val = reg_read(ohci, OHCI1394_PhyControl); |
Stefan Richter | 215fa44 | 2011-06-22 21:05:08 +0200 | [diff] [blame] | 563 | if (!~val) |
| 564 | return -ENODEV; /* Card was ejected. */ |
| 565 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 566 | if (val & OHCI1394_PhyControl_ReadDone) |
| 567 | return OHCI1394_PhyControl_ReadData(val); |
| 568 | |
Clemens Ladisch | 153e397 | 2010-06-10 08:22:07 +0200 | [diff] [blame] | 569 | /* |
| 570 | * Try a few times without waiting. Sleeping is necessary |
| 571 | * only when the link/PHY interface is busy. |
| 572 | */ |
| 573 | if (i >= 3) |
| 574 | msleep(1); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 575 | } |
Peter Hurley | 6fe9efb | 2013-03-27 06:57:40 -0400 | [diff] [blame] | 576 | ohci_err(ohci, "failed to read phy reg %d\n", addr); |
| 577 | dump_stack(); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 578 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 579 | return -EBUSY; |
| 580 | } |
Clemens Ladisch | 4a96b4f | 2010-04-04 15:19:52 +0200 | [diff] [blame] | 581 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 582 | static int write_phy_reg(const struct fw_ohci *ohci, int addr, u32 val) |
| 583 | { |
| 584 | int i; |
| 585 | |
| 586 | reg_write(ohci, OHCI1394_PhyControl, |
| 587 | OHCI1394_PhyControl_Write(addr, val)); |
Clemens Ladisch | 153e397 | 2010-06-10 08:22:07 +0200 | [diff] [blame] | 588 | for (i = 0; i < 3 + 100; i++) { |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 589 | val = reg_read(ohci, OHCI1394_PhyControl); |
Stefan Richter | 215fa44 | 2011-06-22 21:05:08 +0200 | [diff] [blame] | 590 | if (!~val) |
| 591 | return -ENODEV; /* Card was ejected. */ |
| 592 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 593 | if (!(val & OHCI1394_PhyControl_WritePending)) |
| 594 | return 0; |
| 595 | |
Clemens Ladisch | 153e397 | 2010-06-10 08:22:07 +0200 | [diff] [blame] | 596 | if (i >= 3) |
| 597 | msleep(1); |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 598 | } |
Peter Hurley | 6fe9efb | 2013-03-27 06:57:40 -0400 | [diff] [blame] | 599 | ohci_err(ohci, "failed to write phy reg %d, val %u\n", addr, val); |
| 600 | dump_stack(); |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 601 | |
| 602 | return -EBUSY; |
Clemens Ladisch | 4a96b4f | 2010-04-04 15:19:52 +0200 | [diff] [blame] | 603 | } |
| 604 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 605 | static int update_phy_reg(struct fw_ohci *ohci, int addr, |
| 606 | int clear_bits, int set_bits) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 607 | { |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 608 | int ret = read_phy_reg(ohci, addr); |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 609 | if (ret < 0) |
| 610 | return ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 611 | |
Clemens Ladisch | e7014da | 2010-04-01 16:40:18 +0200 | [diff] [blame] | 612 | /* |
| 613 | * The interrupt status bits are cleared by writing a one bit. |
| 614 | * Avoid clearing them unless explicitly requested in set_bits. |
| 615 | */ |
| 616 | if (addr == 5) |
| 617 | clear_bits |= PHY_INT_STATUS_BITS; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 618 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 619 | return write_phy_reg(ohci, addr, (ret & ~clear_bits) | set_bits); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 620 | } |
| 621 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 622 | static int read_paged_phy_reg(struct fw_ohci *ohci, int page, int addr) |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 623 | { |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 624 | int ret; |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 625 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 626 | ret = update_phy_reg(ohci, 7, PHY_PAGE_SELECT, page << 5); |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 627 | if (ret < 0) |
| 628 | return ret; |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 629 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 630 | return read_phy_reg(ohci, addr); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 631 | } |
| 632 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 633 | static int ohci_read_phy_reg(struct fw_card *card, int addr) |
| 634 | { |
| 635 | struct fw_ohci *ohci = fw_ohci(card); |
| 636 | int ret; |
| 637 | |
| 638 | mutex_lock(&ohci->phy_reg_mutex); |
| 639 | ret = read_phy_reg(ohci, addr); |
| 640 | mutex_unlock(&ohci->phy_reg_mutex); |
| 641 | |
| 642 | return ret; |
| 643 | } |
| 644 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 645 | static int ohci_update_phy_reg(struct fw_card *card, int addr, |
| 646 | int clear_bits, int set_bits) |
| 647 | { |
| 648 | struct fw_ohci *ohci = fw_ohci(card); |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 649 | int ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 650 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 651 | mutex_lock(&ohci->phy_reg_mutex); |
| 652 | ret = update_phy_reg(ohci, addr, clear_bits, set_bits); |
| 653 | mutex_unlock(&ohci->phy_reg_mutex); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 654 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 655 | return ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 656 | } |
| 657 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 658 | static inline dma_addr_t ar_buffer_bus(struct ar_context *ctx, unsigned int i) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 659 | { |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 660 | return page_private(ctx->pages[i]); |
| 661 | } |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 662 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 663 | static void ar_context_link_page(struct ar_context *ctx, unsigned int index) |
| 664 | { |
| 665 | struct descriptor *d; |
| 666 | |
| 667 | d = &ctx->descriptors[index]; |
| 668 | d->branch_address &= cpu_to_le32(~0xf); |
| 669 | d->res_count = cpu_to_le16(PAGE_SIZE); |
| 670 | d->transfer_status = 0; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 671 | |
Stefan Richter | 071595e | 2010-07-27 13:20:33 +0200 | [diff] [blame] | 672 | wmb(); /* finish init of new descriptors before branch_address update */ |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 673 | d = &ctx->descriptors[ctx->last_buffer_index]; |
| 674 | d->branch_address |= cpu_to_le32(1); |
| 675 | |
| 676 | ctx->last_buffer_index = index; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 677 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 678 | reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); |
Clemens Ladisch | 837596a | 2010-10-25 11:42:42 +0200 | [diff] [blame] | 679 | } |
| 680 | |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 681 | static void ar_context_release(struct ar_context *ctx) |
| 682 | { |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 683 | unsigned int i; |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 684 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 685 | if (ctx->buffer) |
| 686 | vm_unmap_ram(ctx->buffer, AR_BUFFERS + AR_WRAPAROUND_PAGES); |
| 687 | |
| 688 | for (i = 0; i < AR_BUFFERS; i++) |
| 689 | if (ctx->pages[i]) { |
| 690 | dma_unmap_page(ctx->ohci->card.device, |
| 691 | ar_buffer_bus(ctx, i), |
| 692 | PAGE_SIZE, DMA_FROM_DEVICE); |
| 693 | __free_page(ctx->pages[i]); |
| 694 | } |
| 695 | } |
| 696 | |
| 697 | static void ar_context_abort(struct ar_context *ctx, const char *error_msg) |
| 698 | { |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 699 | struct fw_ohci *ohci = ctx->ohci; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 700 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 701 | if (reg_read(ohci, CONTROL_CLEAR(ctx->regs)) & CONTEXT_RUN) { |
| 702 | reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); |
| 703 | flush_writes(ohci); |
| 704 | |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 705 | ohci_err(ohci, "AR error: %s; DMA stopped\n", error_msg); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 706 | } |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 707 | /* FIXME: restart? */ |
| 708 | } |
| 709 | |
| 710 | static inline unsigned int ar_next_buffer_index(unsigned int index) |
| 711 | { |
| 712 | return (index + 1) % AR_BUFFERS; |
| 713 | } |
| 714 | |
| 715 | static inline unsigned int ar_prev_buffer_index(unsigned int index) |
| 716 | { |
| 717 | return (index - 1 + AR_BUFFERS) % AR_BUFFERS; |
| 718 | } |
| 719 | |
| 720 | static inline unsigned int ar_first_buffer_index(struct ar_context *ctx) |
| 721 | { |
| 722 | return ar_next_buffer_index(ctx->last_buffer_index); |
| 723 | } |
| 724 | |
| 725 | /* |
| 726 | * We search for the buffer that contains the last AR packet DMA data written |
| 727 | * by the controller. |
| 728 | */ |
| 729 | static unsigned int ar_search_last_active_buffer(struct ar_context *ctx, |
| 730 | unsigned int *buffer_offset) |
| 731 | { |
| 732 | unsigned int i, next_i, last = ctx->last_buffer_index; |
| 733 | __le16 res_count, next_res_count; |
| 734 | |
| 735 | i = ar_first_buffer_index(ctx); |
| 736 | res_count = ACCESS_ONCE(ctx->descriptors[i].res_count); |
| 737 | |
| 738 | /* A buffer that is not yet completely filled must be the last one. */ |
| 739 | while (i != last && res_count == 0) { |
| 740 | |
| 741 | /* Peek at the next descriptor. */ |
| 742 | next_i = ar_next_buffer_index(i); |
| 743 | rmb(); /* read descriptors in order */ |
| 744 | next_res_count = ACCESS_ONCE( |
| 745 | ctx->descriptors[next_i].res_count); |
| 746 | /* |
| 747 | * If the next descriptor is still empty, we must stop at this |
| 748 | * descriptor. |
| 749 | */ |
| 750 | if (next_res_count == cpu_to_le16(PAGE_SIZE)) { |
| 751 | /* |
| 752 | * The exception is when the DMA data for one packet is |
| 753 | * split over three buffers; in this case, the middle |
| 754 | * buffer's descriptor might be never updated by the |
| 755 | * controller and look still empty, and we have to peek |
| 756 | * at the third one. |
| 757 | */ |
| 758 | if (MAX_AR_PACKET_SIZE > PAGE_SIZE && i != last) { |
| 759 | next_i = ar_next_buffer_index(next_i); |
| 760 | rmb(); |
| 761 | next_res_count = ACCESS_ONCE( |
| 762 | ctx->descriptors[next_i].res_count); |
| 763 | if (next_res_count != cpu_to_le16(PAGE_SIZE)) |
| 764 | goto next_buffer_is_active; |
| 765 | } |
| 766 | |
| 767 | break; |
| 768 | } |
| 769 | |
| 770 | next_buffer_is_active: |
| 771 | i = next_i; |
| 772 | res_count = next_res_count; |
| 773 | } |
| 774 | |
| 775 | rmb(); /* read res_count before the DMA data */ |
| 776 | |
| 777 | *buffer_offset = PAGE_SIZE - le16_to_cpu(res_count); |
| 778 | if (*buffer_offset > PAGE_SIZE) { |
| 779 | *buffer_offset = 0; |
| 780 | ar_context_abort(ctx, "corrupted descriptor"); |
| 781 | } |
| 782 | |
| 783 | return i; |
| 784 | } |
| 785 | |
| 786 | static void ar_sync_buffers_for_cpu(struct ar_context *ctx, |
| 787 | unsigned int end_buffer_index, |
| 788 | unsigned int end_buffer_offset) |
| 789 | { |
| 790 | unsigned int i; |
| 791 | |
| 792 | i = ar_first_buffer_index(ctx); |
| 793 | while (i != end_buffer_index) { |
| 794 | dma_sync_single_for_cpu(ctx->ohci->card.device, |
| 795 | ar_buffer_bus(ctx, i), |
| 796 | PAGE_SIZE, DMA_FROM_DEVICE); |
| 797 | i = ar_next_buffer_index(i); |
| 798 | } |
| 799 | if (end_buffer_offset > 0) |
| 800 | dma_sync_single_for_cpu(ctx->ohci->card.device, |
| 801 | ar_buffer_bus(ctx, i), |
| 802 | end_buffer_offset, DMA_FROM_DEVICE); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 803 | } |
| 804 | |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 805 | #if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32) |
| 806 | #define cond_le32_to_cpu(v) \ |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 807 | (ohci->quirks & QUIRK_BE_HEADERS ? (__force __u32)(v) : le32_to_cpu(v)) |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 808 | #else |
| 809 | #define cond_le32_to_cpu(v) le32_to_cpu(v) |
| 810 | #endif |
| 811 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 812 | static __le32 *handle_ar_packet(struct ar_context *ctx, __le32 *buffer) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 813 | { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 814 | struct fw_ohci *ohci = ctx->ohci; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 815 | struct fw_packet p; |
| 816 | u32 status, length, tcode; |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 817 | int evt; |
Kristian Høgsberg | 0edeefd | 2007-01-26 00:38:49 -0500 | [diff] [blame] | 818 | |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 819 | p.header[0] = cond_le32_to_cpu(buffer[0]); |
| 820 | p.header[1] = cond_le32_to_cpu(buffer[1]); |
| 821 | p.header[2] = cond_le32_to_cpu(buffer[2]); |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 822 | |
| 823 | tcode = (p.header[0] >> 4) & 0x0f; |
| 824 | switch (tcode) { |
| 825 | case TCODE_WRITE_QUADLET_REQUEST: |
| 826 | case TCODE_READ_QUADLET_RESPONSE: |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 827 | p.header[3] = (__force __u32) buffer[3]; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 828 | p.header_length = 16; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 829 | p.payload_length = 0; |
| 830 | break; |
| 831 | |
| 832 | case TCODE_READ_BLOCK_REQUEST : |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 833 | p.header[3] = cond_le32_to_cpu(buffer[3]); |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 834 | p.header_length = 16; |
| 835 | p.payload_length = 0; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 836 | break; |
| 837 | |
| 838 | case TCODE_WRITE_BLOCK_REQUEST: |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 839 | case TCODE_READ_BLOCK_RESPONSE: |
| 840 | case TCODE_LOCK_REQUEST: |
| 841 | case TCODE_LOCK_RESPONSE: |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 842 | p.header[3] = cond_le32_to_cpu(buffer[3]); |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 843 | p.header_length = 16; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 844 | p.payload_length = p.header[3] >> 16; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 845 | if (p.payload_length > MAX_ASYNC_PAYLOAD) { |
| 846 | ar_context_abort(ctx, "invalid packet length"); |
| 847 | return NULL; |
| 848 | } |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 849 | break; |
| 850 | |
| 851 | case TCODE_WRITE_RESPONSE: |
| 852 | case TCODE_READ_QUADLET_REQUEST: |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 853 | case OHCI_TCODE_PHY_PACKET: |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 854 | p.header_length = 12; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 855 | p.payload_length = 0; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 856 | break; |
Stefan Richter | ccff962 | 2008-05-31 19:36:06 +0200 | [diff] [blame] | 857 | |
| 858 | default: |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 859 | ar_context_abort(ctx, "invalid tcode"); |
| 860 | return NULL; |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 861 | } |
| 862 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 863 | p.payload = (void *) buffer + p.header_length; |
| 864 | |
| 865 | /* FIXME: What to do about evt_* errors? */ |
| 866 | length = (p.header_length + p.payload_length + 3) / 4; |
Stefan Richter | 11bf20a | 2008-03-01 02:47:15 +0100 | [diff] [blame] | 867 | status = cond_le32_to_cpu(buffer[length]); |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 868 | evt = (status >> 16) & 0x1f; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 869 | |
Stefan Richter | 4328656 | 2008-03-11 21:22:26 +0100 | [diff] [blame] | 870 | p.ack = evt - 16; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 871 | p.speed = (status >> 21) & 0x7; |
| 872 | p.timestamp = status & 0xffff; |
| 873 | p.generation = ohci->request_generation; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 874 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 875 | log_ar_at_event(ohci, 'R', p.speed, p.header, evt); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 876 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 877 | /* |
Stefan Richter | a4dc090 | 2010-08-28 14:21:26 +0200 | [diff] [blame] | 878 | * Several controllers, notably from NEC and VIA, forget to |
| 879 | * write ack_complete status at PHY packet reception. |
| 880 | */ |
| 881 | if (evt == OHCI1394_evt_no_status && |
| 882 | (p.header[0] & 0xff) == (OHCI1394_phy_tcode << 4)) |
| 883 | p.ack = ACK_COMPLETE; |
| 884 | |
| 885 | /* |
| 886 | * The OHCI bus reset handler synthesizes a PHY packet with |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 887 | * the new generation number when a bus reset happens (see |
| 888 | * section 8.4.2.3). This helps us determine when a request |
| 889 | * was received and make sure we send the response in the same |
| 890 | * generation. We only need this for requests; for responses |
| 891 | * we use the unique tlabel for finding the matching |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 892 | * request. |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 893 | * |
| 894 | * Alas some chips sometimes emit bus reset packets with a |
| 895 | * wrong generation. We set the correct generation for these |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 896 | * at a slightly incorrect time (in bus_reset_work). |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 897 | */ |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 898 | if (evt == OHCI1394_evt_bus_reset) { |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 899 | if (!(ohci->quirks & QUIRK_RESET_PACKET)) |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 900 | ohci->request_generation = (p.header[2] >> 16) & 0xff; |
| 901 | } else if (ctx == &ohci->ar_request_ctx) { |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 902 | fw_core_handle_request(&ohci->card, &p); |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 903 | } else { |
Kristian Høgsberg | 2639a6f | 2007-01-26 00:37:57 -0500 | [diff] [blame] | 904 | fw_core_handle_response(&ohci->card, &p); |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 905 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 906 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 907 | return buffer + length + 1; |
| 908 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 909 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 910 | static void *handle_ar_packets(struct ar_context *ctx, void *p, void *end) |
| 911 | { |
| 912 | void *next; |
| 913 | |
| 914 | while (p < end) { |
| 915 | next = handle_ar_packet(ctx, p); |
| 916 | if (!next) |
| 917 | return p; |
| 918 | p = next; |
| 919 | } |
| 920 | |
| 921 | return p; |
| 922 | } |
| 923 | |
| 924 | static void ar_recycle_buffers(struct ar_context *ctx, unsigned int end_buffer) |
| 925 | { |
| 926 | unsigned int i; |
| 927 | |
| 928 | i = ar_first_buffer_index(ctx); |
| 929 | while (i != end_buffer) { |
| 930 | dma_sync_single_for_device(ctx->ohci->card.device, |
| 931 | ar_buffer_bus(ctx, i), |
| 932 | PAGE_SIZE, DMA_FROM_DEVICE); |
| 933 | ar_context_link_page(ctx, i); |
| 934 | i = ar_next_buffer_index(i); |
| 935 | } |
| 936 | } |
| 937 | |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 938 | static void ar_context_tasklet(unsigned long data) |
| 939 | { |
| 940 | struct ar_context *ctx = (struct ar_context *)data; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 941 | unsigned int end_buffer_index, end_buffer_offset; |
| 942 | void *p, *end; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 943 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 944 | p = ctx->pointer; |
| 945 | if (!p) |
| 946 | return; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 947 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 948 | end_buffer_index = ar_search_last_active_buffer(ctx, |
| 949 | &end_buffer_offset); |
| 950 | ar_sync_buffers_for_cpu(ctx, end_buffer_index, end_buffer_offset); |
| 951 | end = ctx->buffer + end_buffer_index * PAGE_SIZE + end_buffer_offset; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 952 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 953 | if (end_buffer_index < ar_first_buffer_index(ctx)) { |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 954 | /* |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 955 | * The filled part of the overall buffer wraps around; handle |
| 956 | * all packets up to the buffer end here. If the last packet |
| 957 | * wraps around, its tail will be visible after the buffer end |
| 958 | * because the buffer start pages are mapped there again. |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 959 | */ |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 960 | void *buffer_end = ctx->buffer + AR_BUFFERS * PAGE_SIZE; |
| 961 | p = handle_ar_packets(ctx, p, buffer_end); |
| 962 | if (p < buffer_end) |
| 963 | goto error; |
| 964 | /* adjust p to point back into the actual buffer */ |
| 965 | p -= AR_BUFFERS * PAGE_SIZE; |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 966 | } |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 967 | |
| 968 | p = handle_ar_packets(ctx, p, end); |
| 969 | if (p != end) { |
| 970 | if (p > end) |
| 971 | ar_context_abort(ctx, "inconsistent descriptor"); |
| 972 | goto error; |
| 973 | } |
| 974 | |
| 975 | ctx->pointer = p; |
| 976 | ar_recycle_buffers(ctx, end_buffer_index); |
| 977 | |
| 978 | return; |
| 979 | |
| 980 | error: |
| 981 | ctx->pointer = NULL; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 982 | } |
| 983 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 984 | static int ar_context_init(struct ar_context *ctx, struct fw_ohci *ohci, |
| 985 | unsigned int descriptors_offset, u32 regs) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 986 | { |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 987 | unsigned int i; |
| 988 | dma_addr_t dma_addr; |
| 989 | struct page *pages[AR_BUFFERS + AR_WRAPAROUND_PAGES]; |
| 990 | struct descriptor *d; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 991 | |
Kristian Høgsberg | 72e318e | 2007-02-06 14:49:31 -0500 | [diff] [blame] | 992 | ctx->regs = regs; |
| 993 | ctx->ohci = ohci; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 994 | tasklet_init(&ctx->tasklet, ar_context_tasklet, (unsigned long)ctx); |
| 995 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 996 | for (i = 0; i < AR_BUFFERS; i++) { |
| 997 | ctx->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32); |
| 998 | if (!ctx->pages[i]) |
| 999 | goto out_of_memory; |
| 1000 | dma_addr = dma_map_page(ohci->card.device, ctx->pages[i], |
| 1001 | 0, PAGE_SIZE, DMA_FROM_DEVICE); |
| 1002 | if (dma_mapping_error(ohci->card.device, dma_addr)) { |
| 1003 | __free_page(ctx->pages[i]); |
| 1004 | ctx->pages[i] = NULL; |
| 1005 | goto out_of_memory; |
| 1006 | } |
| 1007 | set_page_private(ctx->pages[i], dma_addr); |
| 1008 | } |
| 1009 | |
| 1010 | for (i = 0; i < AR_BUFFERS; i++) |
| 1011 | pages[i] = ctx->pages[i]; |
| 1012 | for (i = 0; i < AR_WRAPAROUND_PAGES; i++) |
| 1013 | pages[AR_BUFFERS + i] = ctx->pages[i]; |
| 1014 | ctx->buffer = vm_map_ram(pages, AR_BUFFERS + AR_WRAPAROUND_PAGES, |
Clemens Ladisch | 1427130 | 2011-01-13 10:12:17 +0100 | [diff] [blame] | 1015 | -1, PAGE_KERNEL); |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1016 | if (!ctx->buffer) |
| 1017 | goto out_of_memory; |
| 1018 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 1019 | ctx->descriptors = ohci->misc_buffer + descriptors_offset; |
| 1020 | ctx->descriptors_bus = ohci->misc_buffer_bus + descriptors_offset; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1021 | |
| 1022 | for (i = 0; i < AR_BUFFERS; i++) { |
| 1023 | d = &ctx->descriptors[i]; |
| 1024 | d->req_count = cpu_to_le16(PAGE_SIZE); |
| 1025 | d->control = cpu_to_le16(DESCRIPTOR_INPUT_MORE | |
| 1026 | DESCRIPTOR_STATUS | |
| 1027 | DESCRIPTOR_BRANCH_ALWAYS); |
| 1028 | d->data_address = cpu_to_le32(ar_buffer_bus(ctx, i)); |
| 1029 | d->branch_address = cpu_to_le32(ctx->descriptors_bus + |
| 1030 | ar_next_buffer_index(i) * sizeof(struct descriptor)); |
| 1031 | } |
Kristian Høgsberg | 32b4609 | 2007-02-06 14:49:30 -0500 | [diff] [blame] | 1032 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1033 | return 0; |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1034 | |
| 1035 | out_of_memory: |
| 1036 | ar_context_release(ctx); |
| 1037 | |
| 1038 | return -ENOMEM; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1039 | } |
| 1040 | |
| 1041 | static void ar_context_run(struct ar_context *ctx) |
| 1042 | { |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1043 | unsigned int i; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1044 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1045 | for (i = 0; i < AR_BUFFERS; i++) |
| 1046 | ar_context_link_page(ctx, i); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 1047 | |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 1048 | ctx->pointer = ctx->buffer; |
| 1049 | |
| 1050 | reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1051 | reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1052 | } |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 1053 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1054 | static struct descriptor *find_branch_descriptor(struct descriptor *d, int z) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1055 | { |
Clemens Ladisch | 0ff8fbc | 2011-04-12 07:54:59 +0200 | [diff] [blame] | 1056 | __le16 branch; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1057 | |
Clemens Ladisch | 0ff8fbc | 2011-04-12 07:54:59 +0200 | [diff] [blame] | 1058 | branch = d->control & cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1059 | |
| 1060 | /* figure out which descriptor the branch address goes in */ |
Clemens Ladisch | 0ff8fbc | 2011-04-12 07:54:59 +0200 | [diff] [blame] | 1061 | if (z == 2 && branch == cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS)) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1062 | return d; |
| 1063 | else |
| 1064 | return d + z - 1; |
| 1065 | } |
| 1066 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1067 | static void context_tasklet(unsigned long data) |
| 1068 | { |
| 1069 | struct context *ctx = (struct context *) data; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1070 | struct descriptor *d, *last; |
| 1071 | u32 address; |
| 1072 | int z; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1073 | struct descriptor_buffer *desc; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1074 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1075 | desc = list_entry(ctx->buffer_list.next, |
| 1076 | struct descriptor_buffer, list); |
| 1077 | last = ctx->last; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1078 | while (last->branch_address != 0) { |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1079 | struct descriptor_buffer *old_desc = desc; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1080 | address = le32_to_cpu(last->branch_address); |
| 1081 | z = address & 0xf; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1082 | address &= ~0xf; |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 1083 | ctx->current_bus = address; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1084 | |
| 1085 | /* If the branch address points to a buffer outside of the |
| 1086 | * current buffer, advance to the next buffer. */ |
| 1087 | if (address < desc->buffer_bus || |
| 1088 | address >= desc->buffer_bus + desc->used) |
| 1089 | desc = list_entry(desc->list.next, |
| 1090 | struct descriptor_buffer, list); |
| 1091 | d = desc->buffer + (address - desc->buffer_bus) / sizeof(*d); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1092 | last = find_branch_descriptor(d, z); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1093 | |
| 1094 | if (!ctx->callback(ctx, d, last)) |
| 1095 | break; |
| 1096 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1097 | if (old_desc != desc) { |
| 1098 | /* If we've advanced to the next buffer, move the |
| 1099 | * previous buffer to the free list. */ |
| 1100 | unsigned long flags; |
| 1101 | old_desc->used = 0; |
| 1102 | spin_lock_irqsave(&ctx->ohci->lock, flags); |
| 1103 | list_move_tail(&old_desc->list, &ctx->buffer_list); |
| 1104 | spin_unlock_irqrestore(&ctx->ohci->lock, flags); |
| 1105 | } |
| 1106 | ctx->last = last; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1107 | } |
| 1108 | } |
| 1109 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1110 | /* |
| 1111 | * Allocate a new buffer and add it to the list of free buffers for this |
| 1112 | * context. Must be called with ohci->lock held. |
| 1113 | */ |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1114 | static int context_add_buffer(struct context *ctx) |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1115 | { |
| 1116 | struct descriptor_buffer *desc; |
Stefan Richter | f5101d58 | 2008-03-14 00:27:49 +0100 | [diff] [blame] | 1117 | dma_addr_t uninitialized_var(bus_addr); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1118 | int offset; |
| 1119 | |
| 1120 | /* |
| 1121 | * 16MB of descriptors should be far more than enough for any DMA |
| 1122 | * program. This will catch run-away userspace or DoS attacks. |
| 1123 | */ |
| 1124 | if (ctx->total_allocation >= 16*1024*1024) |
| 1125 | return -ENOMEM; |
| 1126 | |
| 1127 | desc = dma_alloc_coherent(ctx->ohci->card.device, PAGE_SIZE, |
| 1128 | &bus_addr, GFP_ATOMIC); |
| 1129 | if (!desc) |
| 1130 | return -ENOMEM; |
| 1131 | |
| 1132 | offset = (void *)&desc->buffer - (void *)desc; |
| 1133 | desc->buffer_size = PAGE_SIZE - offset; |
| 1134 | desc->buffer_bus = bus_addr + offset; |
| 1135 | desc->used = 0; |
| 1136 | |
| 1137 | list_add_tail(&desc->list, &ctx->buffer_list); |
| 1138 | ctx->total_allocation += PAGE_SIZE; |
| 1139 | |
| 1140 | return 0; |
| 1141 | } |
| 1142 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1143 | static int context_init(struct context *ctx, struct fw_ohci *ohci, |
| 1144 | u32 regs, descriptor_callback_t callback) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1145 | { |
| 1146 | ctx->ohci = ohci; |
| 1147 | ctx->regs = regs; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1148 | ctx->total_allocation = 0; |
| 1149 | |
| 1150 | INIT_LIST_HEAD(&ctx->buffer_list); |
| 1151 | if (context_add_buffer(ctx) < 0) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1152 | return -ENOMEM; |
| 1153 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1154 | ctx->buffer_tail = list_entry(ctx->buffer_list.next, |
| 1155 | struct descriptor_buffer, list); |
| 1156 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1157 | tasklet_init(&ctx->tasklet, context_tasklet, (unsigned long)ctx); |
| 1158 | ctx->callback = callback; |
| 1159 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1160 | /* |
| 1161 | * We put a dummy descriptor in the buffer that has a NULL |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1162 | * branch address and looks like it's been sent. That way we |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1163 | * have a descriptor to append DMA programs to. |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1164 | */ |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1165 | memset(ctx->buffer_tail->buffer, 0, sizeof(*ctx->buffer_tail->buffer)); |
| 1166 | ctx->buffer_tail->buffer->control = cpu_to_le16(DESCRIPTOR_OUTPUT_LAST); |
| 1167 | ctx->buffer_tail->buffer->transfer_status = cpu_to_le16(0x8011); |
| 1168 | ctx->buffer_tail->used += sizeof(*ctx->buffer_tail->buffer); |
| 1169 | ctx->last = ctx->buffer_tail->buffer; |
| 1170 | ctx->prev = ctx->buffer_tail->buffer; |
Andy Leiserson | be8dcab | 2013-04-24 09:10:32 -0700 | [diff] [blame] | 1171 | ctx->prev_z = 1; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1172 | |
| 1173 | return 0; |
| 1174 | } |
| 1175 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1176 | static void context_release(struct context *ctx) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1177 | { |
| 1178 | struct fw_card *card = &ctx->ohci->card; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1179 | struct descriptor_buffer *desc, *tmp; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1180 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1181 | list_for_each_entry_safe(desc, tmp, &ctx->buffer_list, list) |
| 1182 | dma_free_coherent(card->device, PAGE_SIZE, desc, |
| 1183 | desc->buffer_bus - |
| 1184 | ((void *)&desc->buffer - (void *)desc)); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1185 | } |
| 1186 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1187 | /* Must be called with ohci->lock held */ |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1188 | static struct descriptor *context_get_descriptors(struct context *ctx, |
| 1189 | int z, dma_addr_t *d_bus) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1190 | { |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1191 | struct descriptor *d = NULL; |
| 1192 | struct descriptor_buffer *desc = ctx->buffer_tail; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1193 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1194 | if (z * sizeof(*d) > desc->buffer_size) |
| 1195 | return NULL; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1196 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1197 | if (z * sizeof(*d) > desc->buffer_size - desc->used) { |
| 1198 | /* No room for the descriptor in this buffer, so advance to the |
| 1199 | * next one. */ |
| 1200 | |
| 1201 | if (desc->list.next == &ctx->buffer_list) { |
| 1202 | /* If there is no free buffer next in the list, |
| 1203 | * allocate one. */ |
| 1204 | if (context_add_buffer(ctx) < 0) |
| 1205 | return NULL; |
| 1206 | } |
| 1207 | desc = list_entry(desc->list.next, |
| 1208 | struct descriptor_buffer, list); |
| 1209 | ctx->buffer_tail = desc; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1210 | } |
| 1211 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1212 | d = desc->buffer + desc->used / sizeof(*d); |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 1213 | memset(d, 0, z * sizeof(*d)); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1214 | *d_bus = desc->buffer_bus + desc->used; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1215 | |
| 1216 | return d; |
| 1217 | } |
| 1218 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 1219 | static void context_run(struct context *ctx, u32 extra) |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1220 | { |
| 1221 | struct fw_ohci *ohci = ctx->ohci; |
| 1222 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1223 | reg_write(ohci, COMMAND_PTR(ctx->regs), |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1224 | le32_to_cpu(ctx->last->branch_address)); |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1225 | reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); |
| 1226 | reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); |
Clemens Ladisch | 386a415 | 2010-12-24 14:42:46 +0100 | [diff] [blame] | 1227 | ctx->running = true; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1228 | flush_writes(ohci); |
| 1229 | } |
| 1230 | |
| 1231 | static void context_append(struct context *ctx, |
| 1232 | struct descriptor *d, int z, int extra) |
| 1233 | { |
| 1234 | dma_addr_t d_bus; |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1235 | struct descriptor_buffer *desc = ctx->buffer_tail; |
Andy Leiserson | be8dcab | 2013-04-24 09:10:32 -0700 | [diff] [blame] | 1236 | struct descriptor *d_branch; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1237 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1238 | d_bus = desc->buffer_bus + (d - desc->buffer) * sizeof(*d); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1239 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 1240 | desc->used += (z + extra) * sizeof(*d); |
Stefan Richter | 071595e | 2010-07-27 13:20:33 +0200 | [diff] [blame] | 1241 | |
| 1242 | wmb(); /* finish init of new descriptors before branch_address update */ |
Andy Leiserson | be8dcab | 2013-04-24 09:10:32 -0700 | [diff] [blame] | 1243 | |
| 1244 | d_branch = find_branch_descriptor(ctx->prev, ctx->prev_z); |
| 1245 | d_branch->branch_address = cpu_to_le32(d_bus | z); |
| 1246 | |
| 1247 | /* |
| 1248 | * VT6306 incorrectly checks only the single descriptor at the |
| 1249 | * CommandPtr when the wake bit is written, so if it's a |
| 1250 | * multi-descriptor block starting with an INPUT_MORE, put a copy of |
| 1251 | * the branch address in the first descriptor. |
| 1252 | * |
| 1253 | * Not doing this for transmit contexts since not sure how it interacts |
| 1254 | * with skip addresses. |
| 1255 | */ |
| 1256 | if (unlikely(ctx->ohci->quirks & QUIRK_IR_WAKE) && |
| 1257 | d_branch != ctx->prev && |
| 1258 | (ctx->prev->control & cpu_to_le16(DESCRIPTOR_CMD)) == |
| 1259 | cpu_to_le16(DESCRIPTOR_INPUT_MORE)) { |
| 1260 | ctx->prev->branch_address = cpu_to_le32(d_bus | z); |
| 1261 | } |
| 1262 | |
| 1263 | ctx->prev = d; |
| 1264 | ctx->prev_z = z; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1265 | } |
| 1266 | |
| 1267 | static void context_stop(struct context *ctx) |
| 1268 | { |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 1269 | struct fw_ohci *ohci = ctx->ohci; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1270 | u32 reg; |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 1271 | int i; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1272 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 1273 | reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); |
Clemens Ladisch | 386a415 | 2010-12-24 14:42:46 +0100 | [diff] [blame] | 1274 | ctx->running = false; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1275 | |
Stefan Richter | 9ef28cc | 2011-06-12 14:30:57 +0200 | [diff] [blame] | 1276 | for (i = 0; i < 1000; i++) { |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 1277 | reg = reg_read(ohci, CONTROL_SET(ctx->regs)); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 1278 | if ((reg & CONTEXT_ACTIVE) == 0) |
Stefan Richter | b006854 | 2009-01-05 20:43:23 +0100 | [diff] [blame] | 1279 | return; |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 1280 | |
Stefan Richter | 9ef28cc | 2011-06-12 14:30:57 +0200 | [diff] [blame] | 1281 | if (i) |
| 1282 | udelay(10); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 1283 | } |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 1284 | ohci_err(ohci, "DMA context still active (0x%08x)\n", reg); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 1285 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1286 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1287 | struct driver_data { |
Clemens Ladisch | da28947 | 2011-04-11 09:57:54 +0200 | [diff] [blame] | 1288 | u8 inline_data[8]; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1289 | struct fw_packet *packet; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1290 | }; |
| 1291 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1292 | /* |
| 1293 | * This function apppends a packet to the DMA queue for transmission. |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1294 | * Must always be called with the ochi->lock held to ensure proper |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1295 | * generation handling and locking around packet queue manipulation. |
| 1296 | */ |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1297 | static int at_context_queue_packet(struct context *ctx, |
| 1298 | struct fw_packet *packet) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1299 | { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1300 | struct fw_ohci *ohci = ctx->ohci; |
Stefan Richter | 4b6d51e | 2007-10-21 11:20:07 +0200 | [diff] [blame] | 1301 | dma_addr_t d_bus, uninitialized_var(payload_bus); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1302 | struct driver_data *driver_data; |
| 1303 | struct descriptor *d, *last; |
| 1304 | __le32 *header; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1305 | int z, tcode; |
| 1306 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1307 | d = context_get_descriptors(ctx, 4, &d_bus); |
| 1308 | if (d == NULL) { |
| 1309 | packet->ack = RCODE_SEND_ERROR; |
| 1310 | return -1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1311 | } |
| 1312 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1313 | d[0].control = cpu_to_le16(DESCRIPTOR_KEY_IMMEDIATE); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1314 | d[0].res_count = cpu_to_le16(packet->timestamp); |
| 1315 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1316 | /* |
Adam Buchbinder | b3834be | 2012-09-19 21:48:02 -0400 | [diff] [blame] | 1317 | * The DMA format for asynchronous link packets is different |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1318 | * from the IEEE1394 layout, so shift the fields around |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1319 | * accordingly. |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1320 | */ |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1321 | |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1322 | tcode = (packet->header[0] >> 4) & 0x0f; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1323 | header = (__le32 *) &d[1]; |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1324 | switch (tcode) { |
| 1325 | case TCODE_WRITE_QUADLET_REQUEST: |
| 1326 | case TCODE_WRITE_BLOCK_REQUEST: |
| 1327 | case TCODE_WRITE_RESPONSE: |
| 1328 | case TCODE_READ_QUADLET_REQUEST: |
| 1329 | case TCODE_READ_BLOCK_REQUEST: |
| 1330 | case TCODE_READ_QUADLET_RESPONSE: |
| 1331 | case TCODE_READ_BLOCK_RESPONSE: |
| 1332 | case TCODE_LOCK_REQUEST: |
| 1333 | case TCODE_LOCK_RESPONSE: |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1334 | header[0] = cpu_to_le32((packet->header[0] & 0xffff) | |
| 1335 | (packet->speed << 16)); |
| 1336 | header[1] = cpu_to_le32((packet->header[1] & 0xffff) | |
| 1337 | (packet->header[0] & 0xffff0000)); |
| 1338 | header[2] = cpu_to_le32(packet->header[2]); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1339 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1340 | if (TCODE_IS_BLOCK_PACKET(tcode)) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1341 | header[3] = cpu_to_le32(packet->header[3]); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1342 | else |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1343 | header[3] = (__force __le32) packet->header[3]; |
| 1344 | |
| 1345 | d[0].req_count = cpu_to_le16(packet->header_length); |
Jay Fenlason | f8c2287 | 2009-03-05 19:08:40 +0100 | [diff] [blame] | 1346 | break; |
| 1347 | |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1348 | case TCODE_LINK_INTERNAL: |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1349 | header[0] = cpu_to_le32((OHCI1394_phy_tcode << 4) | |
| 1350 | (packet->speed << 16)); |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1351 | header[1] = cpu_to_le32(packet->header[1]); |
| 1352 | header[2] = cpu_to_le32(packet->header[2]); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1353 | d[0].req_count = cpu_to_le16(12); |
Stefan Richter | cc55021 | 2010-07-18 13:00:50 +0200 | [diff] [blame] | 1354 | |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1355 | if (is_ping_packet(&packet->header[1])) |
Stefan Richter | cc55021 | 2010-07-18 13:00:50 +0200 | [diff] [blame] | 1356 | d[0].control |= cpu_to_le16(DESCRIPTOR_PING); |
Jay Fenlason | f8c2287 | 2009-03-05 19:08:40 +0100 | [diff] [blame] | 1357 | break; |
| 1358 | |
Clemens Ladisch | 5b06db1 | 2010-11-30 08:24:47 +0100 | [diff] [blame] | 1359 | case TCODE_STREAM_DATA: |
Jay Fenlason | f8c2287 | 2009-03-05 19:08:40 +0100 | [diff] [blame] | 1360 | header[0] = cpu_to_le32((packet->header[0] & 0xffff) | |
| 1361 | (packet->speed << 16)); |
| 1362 | header[1] = cpu_to_le32(packet->header[0] & 0xffff0000); |
| 1363 | d[0].req_count = cpu_to_le16(8); |
| 1364 | break; |
| 1365 | |
| 1366 | default: |
| 1367 | /* BUG(); */ |
| 1368 | packet->ack = RCODE_SEND_ERROR; |
| 1369 | return -1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1370 | } |
| 1371 | |
Clemens Ladisch | da28947 | 2011-04-11 09:57:54 +0200 | [diff] [blame] | 1372 | BUILD_BUG_ON(sizeof(struct driver_data) > sizeof(struct descriptor)); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1373 | driver_data = (struct driver_data *) &d[3]; |
| 1374 | driver_data->packet = packet; |
Kristian Høgsberg | 20d1167 | 2007-03-26 19:18:19 -0400 | [diff] [blame] | 1375 | packet->driver_data = driver_data; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1376 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1377 | if (packet->payload_length > 0) { |
Clemens Ladisch | da28947 | 2011-04-11 09:57:54 +0200 | [diff] [blame] | 1378 | if (packet->payload_length > sizeof(driver_data->inline_data)) { |
| 1379 | payload_bus = dma_map_single(ohci->card.device, |
| 1380 | packet->payload, |
| 1381 | packet->payload_length, |
| 1382 | DMA_TO_DEVICE); |
| 1383 | if (dma_mapping_error(ohci->card.device, payload_bus)) { |
| 1384 | packet->ack = RCODE_SEND_ERROR; |
| 1385 | return -1; |
| 1386 | } |
| 1387 | packet->payload_bus = payload_bus; |
| 1388 | packet->payload_mapped = true; |
| 1389 | } else { |
| 1390 | memcpy(driver_data->inline_data, packet->payload, |
| 1391 | packet->payload_length); |
| 1392 | payload_bus = d_bus + 3 * sizeof(*d); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1393 | } |
| 1394 | |
| 1395 | d[2].req_count = cpu_to_le16(packet->payload_length); |
| 1396 | d[2].data_address = cpu_to_le32(payload_bus); |
| 1397 | last = &d[2]; |
| 1398 | z = 3; |
| 1399 | } else { |
| 1400 | last = &d[0]; |
| 1401 | z = 2; |
| 1402 | } |
| 1403 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1404 | last->control |= cpu_to_le16(DESCRIPTOR_OUTPUT_LAST | |
| 1405 | DESCRIPTOR_IRQ_ALWAYS | |
| 1406 | DESCRIPTOR_BRANCH_ALWAYS); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1407 | |
Stefan Richter | b6258fc | 2011-02-26 15:08:35 +0100 | [diff] [blame] | 1408 | /* FIXME: Document how the locking works. */ |
| 1409 | if (ohci->generation != packet->generation) { |
Stefan Richter | 19593ff | 2009-10-14 20:40:10 +0200 | [diff] [blame] | 1410 | if (packet->payload_mapped) |
Stefan Richter | ab88ca4 | 2007-08-29 19:40:28 +0200 | [diff] [blame] | 1411 | dma_unmap_single(ohci->card.device, payload_bus, |
| 1412 | packet->payload_length, DMA_TO_DEVICE); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1413 | packet->ack = RCODE_GENERATION; |
| 1414 | return -1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1415 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1416 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1417 | context_append(ctx, d, z, 4 - z); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1418 | |
Clemens Ladisch | dd6254e | 2011-05-16 08:10:10 +0200 | [diff] [blame] | 1419 | if (ctx->running) |
Clemens Ladisch | 13882a8 | 2011-05-02 09:33:56 +0200 | [diff] [blame] | 1420 | reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); |
Clemens Ladisch | dd6254e | 2011-05-16 08:10:10 +0200 | [diff] [blame] | 1421 | else |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1422 | context_run(ctx, 0); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1423 | |
| 1424 | return 0; |
| 1425 | } |
| 1426 | |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1427 | static void at_context_flush(struct context *ctx) |
| 1428 | { |
| 1429 | tasklet_disable(&ctx->tasklet); |
| 1430 | |
| 1431 | ctx->flushing = true; |
| 1432 | context_tasklet((unsigned long)ctx); |
| 1433 | ctx->flushing = false; |
| 1434 | |
| 1435 | tasklet_enable(&ctx->tasklet); |
| 1436 | } |
| 1437 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1438 | static int handle_at_packet(struct context *context, |
| 1439 | struct descriptor *d, |
| 1440 | struct descriptor *last) |
| 1441 | { |
| 1442 | struct driver_data *driver_data; |
| 1443 | struct fw_packet *packet; |
| 1444 | struct fw_ohci *ohci = context->ohci; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1445 | int evt; |
| 1446 | |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1447 | if (last->transfer_status == 0 && !context->flushing) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1448 | /* This descriptor isn't done yet, stop iteration. */ |
| 1449 | return 0; |
| 1450 | |
| 1451 | driver_data = (struct driver_data *) &d[3]; |
| 1452 | packet = driver_data->packet; |
| 1453 | if (packet == NULL) |
| 1454 | /* This packet was cancelled, just continue. */ |
| 1455 | return 1; |
| 1456 | |
Stefan Richter | 19593ff | 2009-10-14 20:40:10 +0200 | [diff] [blame] | 1457 | if (packet->payload_mapped) |
Stefan Richter | 1d1dc5e | 2008-12-10 00:20:38 +0100 | [diff] [blame] | 1458 | dma_unmap_single(ohci->card.device, packet->payload_bus, |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1459 | packet->payload_length, DMA_TO_DEVICE); |
| 1460 | |
| 1461 | evt = le16_to_cpu(last->transfer_status) & 0x1f; |
| 1462 | packet->timestamp = le16_to_cpu(last->res_count); |
| 1463 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 1464 | log_ar_at_event(ohci, 'T', packet->speed, packet->header, evt); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 1465 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1466 | switch (evt) { |
| 1467 | case OHCI1394_evt_timeout: |
| 1468 | /* Async response transmit timed out. */ |
| 1469 | packet->ack = RCODE_CANCELLED; |
| 1470 | break; |
| 1471 | |
| 1472 | case OHCI1394_evt_flushed: |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1473 | /* |
| 1474 | * The packet was flushed should give same error as |
| 1475 | * when we try to use a stale generation count. |
| 1476 | */ |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1477 | packet->ack = RCODE_GENERATION; |
| 1478 | break; |
| 1479 | |
| 1480 | case OHCI1394_evt_missing_ack: |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1481 | if (context->flushing) |
| 1482 | packet->ack = RCODE_GENERATION; |
| 1483 | else { |
| 1484 | /* |
| 1485 | * Using a valid (current) generation count, but the |
| 1486 | * node is not on the bus or not sending acks. |
| 1487 | */ |
| 1488 | packet->ack = RCODE_NO_ACK; |
| 1489 | } |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1490 | break; |
| 1491 | |
| 1492 | case ACK_COMPLETE + 0x10: |
| 1493 | case ACK_PENDING + 0x10: |
| 1494 | case ACK_BUSY_X + 0x10: |
| 1495 | case ACK_BUSY_A + 0x10: |
| 1496 | case ACK_BUSY_B + 0x10: |
| 1497 | case ACK_DATA_ERROR + 0x10: |
| 1498 | case ACK_TYPE_ERROR + 0x10: |
| 1499 | packet->ack = evt - 0x10; |
| 1500 | break; |
| 1501 | |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1502 | case OHCI1394_evt_no_status: |
| 1503 | if (context->flushing) { |
| 1504 | packet->ack = RCODE_GENERATION; |
| 1505 | break; |
| 1506 | } |
| 1507 | /* fall through */ |
| 1508 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1509 | default: |
| 1510 | packet->ack = RCODE_SEND_ERROR; |
| 1511 | break; |
| 1512 | } |
| 1513 | |
| 1514 | packet->callback(packet, &ohci->card, packet->ack); |
| 1515 | |
| 1516 | return 1; |
| 1517 | } |
| 1518 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1519 | #define HEADER_GET_DESTINATION(q) (((q) >> 16) & 0xffff) |
| 1520 | #define HEADER_GET_TCODE(q) (((q) >> 4) & 0x0f) |
| 1521 | #define HEADER_GET_OFFSET_HIGH(q) (((q) >> 0) & 0xffff) |
| 1522 | #define HEADER_GET_DATA_LENGTH(q) (((q) >> 16) & 0xffff) |
| 1523 | #define HEADER_GET_EXTENDED_TCODE(q) (((q) >> 0) & 0xffff) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1524 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1525 | static void handle_local_rom(struct fw_ohci *ohci, |
| 1526 | struct fw_packet *packet, u32 csr) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1527 | { |
| 1528 | struct fw_packet response; |
| 1529 | int tcode, length, i; |
| 1530 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1531 | tcode = HEADER_GET_TCODE(packet->header[0]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1532 | if (TCODE_IS_BLOCK_PACKET(tcode)) |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1533 | length = HEADER_GET_DATA_LENGTH(packet->header[3]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1534 | else |
| 1535 | length = 4; |
| 1536 | |
| 1537 | i = csr - CSR_CONFIG_ROM; |
| 1538 | if (i + length > CONFIG_ROM_SIZE) { |
| 1539 | fw_fill_response(&response, packet->header, |
| 1540 | RCODE_ADDRESS_ERROR, NULL, 0); |
| 1541 | } else if (!TCODE_IS_READ_REQUEST(tcode)) { |
| 1542 | fw_fill_response(&response, packet->header, |
| 1543 | RCODE_TYPE_ERROR, NULL, 0); |
| 1544 | } else { |
| 1545 | fw_fill_response(&response, packet->header, RCODE_COMPLETE, |
| 1546 | (void *) ohci->config_rom + i, length); |
| 1547 | } |
| 1548 | |
| 1549 | fw_core_handle_response(&ohci->card, &response); |
| 1550 | } |
| 1551 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1552 | static void handle_local_lock(struct fw_ohci *ohci, |
| 1553 | struct fw_packet *packet, u32 csr) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1554 | { |
| 1555 | struct fw_packet response; |
Clemens Ladisch | e139366 | 2010-04-12 10:35:44 +0200 | [diff] [blame] | 1556 | int tcode, length, ext_tcode, sel, try; |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1557 | __be32 *payload, lock_old; |
| 1558 | u32 lock_arg, lock_data; |
| 1559 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1560 | tcode = HEADER_GET_TCODE(packet->header[0]); |
| 1561 | length = HEADER_GET_DATA_LENGTH(packet->header[3]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1562 | payload = packet->payload; |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1563 | ext_tcode = HEADER_GET_EXTENDED_TCODE(packet->header[3]); |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1564 | |
| 1565 | if (tcode == TCODE_LOCK_REQUEST && |
| 1566 | ext_tcode == EXTCODE_COMPARE_SWAP && length == 8) { |
| 1567 | lock_arg = be32_to_cpu(payload[0]); |
| 1568 | lock_data = be32_to_cpu(payload[1]); |
| 1569 | } else if (tcode == TCODE_READ_QUADLET_REQUEST) { |
| 1570 | lock_arg = 0; |
| 1571 | lock_data = 0; |
| 1572 | } else { |
| 1573 | fw_fill_response(&response, packet->header, |
| 1574 | RCODE_TYPE_ERROR, NULL, 0); |
| 1575 | goto out; |
| 1576 | } |
| 1577 | |
| 1578 | sel = (csr - CSR_BUS_MANAGER_ID) / 4; |
| 1579 | reg_write(ohci, OHCI1394_CSRData, lock_data); |
| 1580 | reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); |
| 1581 | reg_write(ohci, OHCI1394_CSRControl, sel); |
| 1582 | |
Clemens Ladisch | e139366 | 2010-04-12 10:35:44 +0200 | [diff] [blame] | 1583 | for (try = 0; try < 20; try++) |
| 1584 | if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000) { |
| 1585 | lock_old = cpu_to_be32(reg_read(ohci, |
| 1586 | OHCI1394_CSRData)); |
| 1587 | fw_fill_response(&response, packet->header, |
| 1588 | RCODE_COMPLETE, |
| 1589 | &lock_old, sizeof(lock_old)); |
| 1590 | goto out; |
| 1591 | } |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1592 | |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 1593 | ohci_err(ohci, "swap not done (CSR lock timeout)\n"); |
Clemens Ladisch | e139366 | 2010-04-12 10:35:44 +0200 | [diff] [blame] | 1594 | fw_fill_response(&response, packet->header, RCODE_BUSY, NULL, 0); |
| 1595 | |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1596 | out: |
| 1597 | fw_core_handle_response(&ohci->card, &response); |
| 1598 | } |
| 1599 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1600 | static void handle_local_request(struct context *ctx, struct fw_packet *packet) |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1601 | { |
Clemens Ladisch | 2608203 | 2010-04-12 10:35:30 +0200 | [diff] [blame] | 1602 | u64 offset, csr; |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1603 | |
Kristian Høgsberg | 473d28c | 2007-03-07 12:12:55 -0500 | [diff] [blame] | 1604 | if (ctx == &ctx->ohci->at_request_ctx) { |
| 1605 | packet->ack = ACK_PENDING; |
| 1606 | packet->callback(packet, &ctx->ohci->card, packet->ack); |
| 1607 | } |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1608 | |
| 1609 | offset = |
| 1610 | ((unsigned long long) |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1611 | HEADER_GET_OFFSET_HIGH(packet->header[1]) << 32) | |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1612 | packet->header[2]; |
| 1613 | csr = offset - CSR_REGISTER_BASE; |
| 1614 | |
| 1615 | /* Handle config rom reads. */ |
| 1616 | if (csr >= CSR_CONFIG_ROM && csr < CSR_CONFIG_ROM_END) |
| 1617 | handle_local_rom(ctx->ohci, packet, csr); |
| 1618 | else switch (csr) { |
| 1619 | case CSR_BUS_MANAGER_ID: |
| 1620 | case CSR_BANDWIDTH_AVAILABLE: |
| 1621 | case CSR_CHANNELS_AVAILABLE_HI: |
| 1622 | case CSR_CHANNELS_AVAILABLE_LO: |
| 1623 | handle_local_lock(ctx->ohci, packet, csr); |
| 1624 | break; |
| 1625 | default: |
| 1626 | if (ctx == &ctx->ohci->at_request_ctx) |
| 1627 | fw_core_handle_request(&ctx->ohci->card, packet); |
| 1628 | else |
| 1629 | fw_core_handle_response(&ctx->ohci->card, packet); |
| 1630 | break; |
| 1631 | } |
Kristian Høgsberg | 473d28c | 2007-03-07 12:12:55 -0500 | [diff] [blame] | 1632 | |
| 1633 | if (ctx == &ctx->ohci->at_response_ctx) { |
| 1634 | packet->ack = ACK_COMPLETE; |
| 1635 | packet->callback(packet, &ctx->ohci->card, packet->ack); |
| 1636 | } |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1637 | } |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1638 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 1639 | static void at_context_transmit(struct context *ctx, struct fw_packet *packet) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1640 | { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1641 | unsigned long flags; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1642 | int ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1643 | |
| 1644 | spin_lock_irqsave(&ctx->ohci->lock, flags); |
| 1645 | |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 1646 | if (HEADER_GET_DESTINATION(packet->header[0]) == ctx->ohci->node_id && |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1647 | ctx->ohci->generation == packet->generation) { |
Kristian Høgsberg | 93c4cce | 2007-01-26 00:38:26 -0500 | [diff] [blame] | 1648 | spin_unlock_irqrestore(&ctx->ohci->lock, flags); |
| 1649 | handle_local_request(ctx, packet); |
| 1650 | return; |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 1651 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1652 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1653 | ret = at_context_queue_packet(ctx, packet); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1654 | spin_unlock_irqrestore(&ctx->ohci->lock, flags); |
| 1655 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 1656 | if (ret < 0) |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 1657 | packet->callback(packet, &ctx->ohci->card, packet->ack); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 1658 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1659 | } |
| 1660 | |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 1661 | static void detect_dead_context(struct fw_ohci *ohci, |
| 1662 | const char *name, unsigned int regs) |
| 1663 | { |
| 1664 | u32 ctl; |
| 1665 | |
| 1666 | ctl = reg_read(ohci, CONTROL_SET(regs)); |
Stefan Richter | cfda62b | 2012-03-04 21:34:21 +0100 | [diff] [blame] | 1667 | if (ctl & CONTEXT_DEAD) |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 1668 | ohci_err(ohci, "DMA context %s has stopped, error code: %s\n", |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 1669 | name, evts[ctl & 0x1f]); |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 1670 | } |
| 1671 | |
| 1672 | static void handle_dead_contexts(struct fw_ohci *ohci) |
| 1673 | { |
| 1674 | unsigned int i; |
| 1675 | char name[8]; |
| 1676 | |
| 1677 | detect_dead_context(ohci, "ATReq", OHCI1394_AsReqTrContextBase); |
| 1678 | detect_dead_context(ohci, "ATRsp", OHCI1394_AsRspTrContextBase); |
| 1679 | detect_dead_context(ohci, "ARReq", OHCI1394_AsReqRcvContextBase); |
| 1680 | detect_dead_context(ohci, "ARRsp", OHCI1394_AsRspRcvContextBase); |
| 1681 | for (i = 0; i < 32; ++i) { |
| 1682 | if (!(ohci->it_context_support & (1 << i))) |
| 1683 | continue; |
| 1684 | sprintf(name, "IT%u", i); |
| 1685 | detect_dead_context(ohci, name, OHCI1394_IsoXmitContextBase(i)); |
| 1686 | } |
| 1687 | for (i = 0; i < 32; ++i) { |
| 1688 | if (!(ohci->ir_context_support & (1 << i))) |
| 1689 | continue; |
| 1690 | sprintf(name, "IR%u", i); |
| 1691 | detect_dead_context(ohci, name, OHCI1394_IsoRcvContextBase(i)); |
| 1692 | } |
| 1693 | /* TODO: maybe try to flush and restart the dead contexts */ |
| 1694 | } |
| 1695 | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 1696 | static u32 cycle_timer_ticks(u32 cycle_timer) |
| 1697 | { |
| 1698 | u32 ticks; |
| 1699 | |
| 1700 | ticks = cycle_timer & 0xfff; |
| 1701 | ticks += 3072 * ((cycle_timer >> 12) & 0x1fff); |
| 1702 | ticks += (3072 * 8000) * (cycle_timer >> 25); |
| 1703 | |
| 1704 | return ticks; |
| 1705 | } |
| 1706 | |
| 1707 | /* |
| 1708 | * Some controllers exhibit one or more of the following bugs when updating the |
| 1709 | * iso cycle timer register: |
| 1710 | * - When the lowest six bits are wrapping around to zero, a read that happens |
| 1711 | * at the same time will return garbage in the lowest ten bits. |
| 1712 | * - When the cycleOffset field wraps around to zero, the cycleCount field is |
| 1713 | * not incremented for about 60 ns. |
| 1714 | * - Occasionally, the entire register reads zero. |
| 1715 | * |
| 1716 | * To catch these, we read the register three times and ensure that the |
| 1717 | * difference between each two consecutive reads is approximately the same, i.e. |
| 1718 | * less than twice the other. Furthermore, any negative difference indicates an |
| 1719 | * error. (A PCI read should take at least 20 ticks of the 24.576 MHz timer to |
| 1720 | * execute, so we have enough precision to compute the ratio of the differences.) |
| 1721 | */ |
| 1722 | static u32 get_cycle_time(struct fw_ohci *ohci) |
| 1723 | { |
| 1724 | u32 c0, c1, c2; |
| 1725 | u32 t0, t1, t2; |
| 1726 | s32 diff01, diff12; |
| 1727 | int i; |
| 1728 | |
| 1729 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
| 1730 | |
| 1731 | if (ohci->quirks & QUIRK_CYCLE_TIMER) { |
| 1732 | i = 0; |
| 1733 | c1 = c2; |
| 1734 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
| 1735 | do { |
| 1736 | c0 = c1; |
| 1737 | c1 = c2; |
| 1738 | c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); |
| 1739 | t0 = cycle_timer_ticks(c0); |
| 1740 | t1 = cycle_timer_ticks(c1); |
| 1741 | t2 = cycle_timer_ticks(c2); |
| 1742 | diff01 = t1 - t0; |
| 1743 | diff12 = t2 - t1; |
| 1744 | } while ((diff01 <= 0 || diff12 <= 0 || |
| 1745 | diff01 / diff12 >= 2 || diff12 / diff01 >= 2) |
| 1746 | && i++ < 20); |
| 1747 | } |
| 1748 | |
| 1749 | return c2; |
| 1750 | } |
| 1751 | |
| 1752 | /* |
| 1753 | * This function has to be called at least every 64 seconds. The bus_time |
| 1754 | * field stores not only the upper 25 bits of the BUS_TIME register but also |
| 1755 | * the most significant bit of the cycle timer in bit 6 so that we can detect |
| 1756 | * changes in this bit. |
| 1757 | */ |
| 1758 | static u32 update_bus_time(struct fw_ohci *ohci) |
| 1759 | { |
| 1760 | u32 cycle_time_seconds = get_cycle_time(ohci) >> 25; |
| 1761 | |
Clemens Ladisch | 9d60ef2 | 2012-05-24 19:29:19 +0200 | [diff] [blame] | 1762 | if (unlikely(!ohci->bus_time_running)) { |
| 1763 | reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds); |
| 1764 | ohci->bus_time = (lower_32_bits(get_seconds()) & ~0x7f) | |
| 1765 | (cycle_time_seconds & 0x40); |
| 1766 | ohci->bus_time_running = true; |
| 1767 | } |
| 1768 | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 1769 | if ((ohci->bus_time & 0x40) != (cycle_time_seconds & 0x40)) |
| 1770 | ohci->bus_time += 0x40; |
| 1771 | |
| 1772 | return ohci->bus_time | cycle_time_seconds; |
| 1773 | } |
| 1774 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1775 | static int get_status_for_port(struct fw_ohci *ohci, int port_index) |
| 1776 | { |
| 1777 | int reg; |
| 1778 | |
| 1779 | mutex_lock(&ohci->phy_reg_mutex); |
| 1780 | reg = write_phy_reg(ohci, 7, port_index); |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1781 | if (reg >= 0) |
| 1782 | reg = read_phy_reg(ohci, 8); |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1783 | mutex_unlock(&ohci->phy_reg_mutex); |
| 1784 | if (reg < 0) |
| 1785 | return reg; |
| 1786 | |
| 1787 | switch (reg & 0x0f) { |
| 1788 | case 0x06: |
| 1789 | return 2; /* is child node (connected to parent node) */ |
| 1790 | case 0x0e: |
| 1791 | return 3; /* is parent node (connected to child node) */ |
| 1792 | } |
| 1793 | return 1; /* not connected */ |
| 1794 | } |
| 1795 | |
| 1796 | static int get_self_id_pos(struct fw_ohci *ohci, u32 self_id, |
| 1797 | int self_id_count) |
| 1798 | { |
| 1799 | int i; |
| 1800 | u32 entry; |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1801 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1802 | for (i = 0; i < self_id_count; i++) { |
| 1803 | entry = ohci->self_id_buffer[i]; |
| 1804 | if ((self_id & 0xff000000) == (entry & 0xff000000)) |
| 1805 | return -1; |
| 1806 | if ((self_id & 0xff000000) < (entry & 0xff000000)) |
| 1807 | return i; |
| 1808 | } |
| 1809 | return i; |
| 1810 | } |
| 1811 | |
Stephan Gatzka | 52439d6 | 2012-09-03 21:17:50 +0200 | [diff] [blame] | 1812 | static int initiated_reset(struct fw_ohci *ohci) |
| 1813 | { |
| 1814 | int reg; |
| 1815 | int ret = 0; |
| 1816 | |
| 1817 | mutex_lock(&ohci->phy_reg_mutex); |
| 1818 | reg = write_phy_reg(ohci, 7, 0xe0); /* Select page 7 */ |
| 1819 | if (reg >= 0) { |
| 1820 | reg = read_phy_reg(ohci, 8); |
| 1821 | reg |= 0x40; |
| 1822 | reg = write_phy_reg(ohci, 8, reg); /* set PMODE bit */ |
| 1823 | if (reg >= 0) { |
| 1824 | reg = read_phy_reg(ohci, 12); /* read register 12 */ |
| 1825 | if (reg >= 0) { |
| 1826 | if ((reg & 0x08) == 0x08) { |
| 1827 | /* bit 3 indicates "initiated reset" */ |
| 1828 | ret = 0x2; |
| 1829 | } |
| 1830 | } |
| 1831 | } |
| 1832 | } |
| 1833 | mutex_unlock(&ohci->phy_reg_mutex); |
| 1834 | return ret; |
| 1835 | } |
| 1836 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1837 | /* |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1838 | * TI TSB82AA2B and TSB12LV26 do not receive the selfID of a locally |
| 1839 | * attached TSB41BA3D phy; see http://www.ti.com/litv/pdf/sllz059. |
| 1840 | * Construct the selfID from phy register contents. |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1841 | */ |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1842 | static int find_and_insert_self_id(struct fw_ohci *ohci, int self_id_count) |
| 1843 | { |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1844 | int reg, i, pos, status; |
| 1845 | /* link active 1, speed 3, bridge 0, contender 1, more packets 0 */ |
| 1846 | u32 self_id = 0x8040c800; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1847 | |
| 1848 | reg = reg_read(ohci, OHCI1394_NodeID); |
| 1849 | if (!(reg & OHCI1394_NodeID_idValid)) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 1850 | ohci_notice(ohci, |
| 1851 | "node ID not valid, new bus reset in progress\n"); |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1852 | return -EBUSY; |
| 1853 | } |
| 1854 | self_id |= ((reg & 0x3f) << 24); /* phy ID */ |
| 1855 | |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1856 | reg = ohci_read_phy_reg(&ohci->card, 4); |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1857 | if (reg < 0) |
| 1858 | return reg; |
| 1859 | self_id |= ((reg & 0x07) << 8); /* power class */ |
| 1860 | |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 1861 | reg = ohci_read_phy_reg(&ohci->card, 1); |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1862 | if (reg < 0) |
| 1863 | return reg; |
| 1864 | self_id |= ((reg & 0x3f) << 16); /* gap count */ |
| 1865 | |
| 1866 | for (i = 0; i < 3; i++) { |
| 1867 | status = get_status_for_port(ohci, i); |
| 1868 | if (status < 0) |
| 1869 | return status; |
| 1870 | self_id |= ((status & 0x3) << (6 - (i * 2))); |
| 1871 | } |
| 1872 | |
Stephan Gatzka | 52439d6 | 2012-09-03 21:17:50 +0200 | [diff] [blame] | 1873 | self_id |= initiated_reset(ohci); |
| 1874 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1875 | pos = get_self_id_pos(ohci, self_id, self_id_count); |
| 1876 | if (pos >= 0) { |
| 1877 | memmove(&(ohci->self_id_buffer[pos+1]), |
| 1878 | &(ohci->self_id_buffer[pos]), |
| 1879 | (self_id_count - pos) * sizeof(*ohci->self_id_buffer)); |
| 1880 | ohci->self_id_buffer[pos] = self_id; |
| 1881 | self_id_count++; |
| 1882 | } |
| 1883 | return self_id_count; |
| 1884 | } |
| 1885 | |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 1886 | static void bus_reset_work(struct work_struct *work) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1887 | { |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 1888 | struct fw_ohci *ohci = |
| 1889 | container_of(work, struct fw_ohci, bus_reset_work); |
Stefan Richter | d713dfa | 2012-04-09 21:39:53 +0200 | [diff] [blame] | 1890 | int self_id_count, generation, new_generation, i, j; |
| 1891 | u32 reg; |
Stefan Richter | 4eaff7d | 2007-07-25 19:18:08 +0200 | [diff] [blame] | 1892 | void *free_rom = NULL; |
| 1893 | dma_addr_t free_rom_bus = 0; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 1894 | bool is_new_root; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1895 | |
| 1896 | reg = reg_read(ohci, OHCI1394_NodeID); |
| 1897 | if (!(reg & OHCI1394_NodeID_idValid)) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 1898 | ohci_notice(ohci, |
| 1899 | "node ID not valid, new bus reset in progress\n"); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1900 | return; |
| 1901 | } |
Stefan Richter | 02ff8f8 | 2007-08-30 00:11:40 +0200 | [diff] [blame] | 1902 | if ((reg & OHCI1394_NodeID_nodeNumber) == 63) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 1903 | ohci_notice(ohci, "malconfigured bus\n"); |
Stefan Richter | 02ff8f8 | 2007-08-30 00:11:40 +0200 | [diff] [blame] | 1904 | return; |
| 1905 | } |
| 1906 | ohci->node_id = reg & (OHCI1394_NodeID_busNumber | |
| 1907 | OHCI1394_NodeID_nodeNumber); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1908 | |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 1909 | is_new_root = (reg & OHCI1394_NodeID_root) != 0; |
| 1910 | if (!(ohci->is_root && is_new_root)) |
| 1911 | reg_write(ohci, OHCI1394_LinkControlSet, |
| 1912 | OHCI1394_LinkControl_cycleMaster); |
| 1913 | ohci->is_root = is_new_root; |
| 1914 | |
Stefan Richter | c8a9a49 | 2008-03-19 21:40:32 +0100 | [diff] [blame] | 1915 | reg = reg_read(ohci, OHCI1394_SelfIDCount); |
| 1916 | if (reg & OHCI1394_SelfIDCount_selfIDError) { |
Peter Hurley | 6767213 | 2013-03-27 06:56:01 -0400 | [diff] [blame] | 1917 | ohci_notice(ohci, "self ID receive error\n"); |
Stefan Richter | c8a9a49 | 2008-03-19 21:40:32 +0100 | [diff] [blame] | 1918 | return; |
| 1919 | } |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1920 | /* |
| 1921 | * The count in the SelfIDCount register is the number of |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1922 | * bytes in the self ID receive buffer. Since we also receive |
| 1923 | * the inverted quadlets and a header quadlet, we shift one |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1924 | * bit extra to get the actual number of self IDs. |
| 1925 | */ |
Stefan Richter | 928ec5f | 2009-09-06 18:49:17 +0200 | [diff] [blame] | 1926 | self_id_count = (reg >> 3) & 0xff; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1927 | |
| 1928 | if (self_id_count > 252) { |
Peter Hurley | 6767213 | 2013-03-27 06:56:01 -0400 | [diff] [blame] | 1929 | ohci_notice(ohci, "bad selfIDSize (%08x)\n", reg); |
Stefan Richter | 016bf3d | 2008-03-19 22:05:02 +0100 | [diff] [blame] | 1930 | return; |
| 1931 | } |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1932 | |
Stefan Richter | af53122 | 2013-08-05 15:10:38 +0200 | [diff] [blame] | 1933 | generation = (cond_le32_to_cpu(ohci->self_id[0]) >> 16) & 0xff; |
Stefan Richter | ee71c2f | 2007-08-25 14:08:19 +0200 | [diff] [blame] | 1934 | rmb(); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1935 | |
| 1936 | for (i = 1, j = 0; j < self_id_count; i += 2, j++) { |
Stefan Richter | af53122 | 2013-08-05 15:10:38 +0200 | [diff] [blame] | 1937 | u32 id = cond_le32_to_cpu(ohci->self_id[i]); |
| 1938 | u32 id2 = cond_le32_to_cpu(ohci->self_id[i + 1]); |
Peter Hurley | 6767213 | 2013-03-27 06:56:01 -0400 | [diff] [blame] | 1939 | |
| 1940 | if (id != ~id2) { |
Clemens Ladisch | 32eaeae | 2011-10-15 18:14:39 +0200 | [diff] [blame] | 1941 | /* |
| 1942 | * If the invalid data looks like a cycle start packet, |
| 1943 | * it's likely to be the result of the cycle master |
| 1944 | * having a wrong gap count. In this case, the self IDs |
| 1945 | * so far are valid and should be processed so that the |
| 1946 | * bus manager can then correct the gap count. |
| 1947 | */ |
Peter Hurley | 6767213 | 2013-03-27 06:56:01 -0400 | [diff] [blame] | 1948 | if (id == 0xffff008f) { |
| 1949 | ohci_notice(ohci, "ignoring spurious self IDs\n"); |
Clemens Ladisch | 32eaeae | 2011-10-15 18:14:39 +0200 | [diff] [blame] | 1950 | self_id_count = j; |
| 1951 | break; |
Clemens Ladisch | 32eaeae | 2011-10-15 18:14:39 +0200 | [diff] [blame] | 1952 | } |
Peter Hurley | 6767213 | 2013-03-27 06:56:01 -0400 | [diff] [blame] | 1953 | |
| 1954 | ohci_notice(ohci, "bad self ID %d/%d (%08x != ~%08x)\n", |
| 1955 | j, self_id_count, id, id2); |
| 1956 | return; |
Stefan Richter | c8a9a49 | 2008-03-19 21:40:32 +0100 | [diff] [blame] | 1957 | } |
Peter Hurley | 6767213 | 2013-03-27 06:56:01 -0400 | [diff] [blame] | 1958 | ohci->self_id_buffer[j] = id; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1959 | } |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1960 | |
| 1961 | if (ohci->quirks & QUIRK_TI_SLLZ059) { |
| 1962 | self_id_count = find_and_insert_self_id(ohci, self_id_count); |
| 1963 | if (self_id_count < 0) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 1964 | ohci_notice(ohci, |
| 1965 | "could not construct local self ID\n"); |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1966 | return; |
| 1967 | } |
| 1968 | } |
| 1969 | |
| 1970 | if (self_id_count == 0) { |
Peter Hurley | 6767213 | 2013-03-27 06:56:01 -0400 | [diff] [blame] | 1971 | ohci_notice(ohci, "no self IDs\n"); |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 1972 | return; |
| 1973 | } |
Stefan Richter | ee71c2f | 2007-08-25 14:08:19 +0200 | [diff] [blame] | 1974 | rmb(); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1975 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1976 | /* |
| 1977 | * Check the consistency of the self IDs we just read. The |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1978 | * problem we face is that a new bus reset can start while we |
| 1979 | * read out the self IDs from the DMA buffer. If this happens, |
| 1980 | * the DMA buffer will be overwritten with new self IDs and we |
| 1981 | * will read out inconsistent data. The OHCI specification |
| 1982 | * (section 11.2) recommends a technique similar to |
| 1983 | * linux/seqlock.h, where we remember the generation of the |
| 1984 | * self IDs in the buffer before reading them out and compare |
| 1985 | * it to the current generation after reading them out. If |
| 1986 | * the two generations match we know we have a consistent set |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 1987 | * of self IDs. |
| 1988 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1989 | |
| 1990 | new_generation = (reg_read(ohci, OHCI1394_SelfIDCount) >> 16) & 0xff; |
| 1991 | if (new_generation != generation) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 1992 | ohci_notice(ohci, "new bus reset, discarding self ids\n"); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1993 | return; |
| 1994 | } |
| 1995 | |
| 1996 | /* FIXME: Document how the locking works. */ |
Stefan Richter | 8a8c473 | 2012-04-09 21:40:33 +0200 | [diff] [blame] | 1997 | spin_lock_irq(&ohci->lock); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 1998 | |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 1999 | ohci->generation = -1; /* prevent AT packet queueing */ |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2000 | context_stop(&ohci->at_request_ctx); |
| 2001 | context_stop(&ohci->at_response_ctx); |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 2002 | |
Stefan Richter | 8a8c473 | 2012-04-09 21:40:33 +0200 | [diff] [blame] | 2003 | spin_unlock_irq(&ohci->lock); |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 2004 | |
Stefan Richter | 78dec56 | 2011-01-01 15:15:40 +0100 | [diff] [blame] | 2005 | /* |
| 2006 | * Per OHCI 1.2 draft, clause 7.2.3.3, hardware may leave unsent |
| 2007 | * packets in the AT queues and software needs to drain them. |
| 2008 | * Some OHCI 1.1 controllers (JMicron) apparently require this too. |
| 2009 | */ |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 2010 | at_context_flush(&ohci->at_request_ctx); |
| 2011 | at_context_flush(&ohci->at_response_ctx); |
| 2012 | |
Stefan Richter | 8a8c473 | 2012-04-09 21:40:33 +0200 | [diff] [blame] | 2013 | spin_lock_irq(&ohci->lock); |
Clemens Ladisch | 82b662d | 2010-12-24 14:40:15 +0100 | [diff] [blame] | 2014 | |
| 2015 | ohci->generation = generation; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2016 | reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); |
| 2017 | |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 2018 | if (ohci->quirks & QUIRK_RESET_PACKET) |
Stefan Richter | d34316a | 2008-04-12 22:31:25 +0200 | [diff] [blame] | 2019 | ohci->request_generation = generation; |
| 2020 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2021 | /* |
| 2022 | * This next bit is unrelated to the AT context stuff but we |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2023 | * have to do it under the spinlock also. If a new config rom |
| 2024 | * was set up before this reset, the old one is now no longer |
| 2025 | * in use and we can free it. Update the config rom pointers |
| 2026 | * to point to the current config rom and clear the |
Thomas Weber | 8839316 | 2010-03-16 11:47:56 +0100 | [diff] [blame] | 2027 | * next_config_rom pointer so a new update can take place. |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2028 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2029 | |
| 2030 | if (ohci->next_config_rom != NULL) { |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 2031 | if (ohci->next_config_rom != ohci->config_rom) { |
| 2032 | free_rom = ohci->config_rom; |
| 2033 | free_rom_bus = ohci->config_rom_bus; |
| 2034 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2035 | ohci->config_rom = ohci->next_config_rom; |
| 2036 | ohci->config_rom_bus = ohci->next_config_rom_bus; |
| 2037 | ohci->next_config_rom = NULL; |
| 2038 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2039 | /* |
| 2040 | * Restore config_rom image and manually update |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2041 | * config_rom registers. Writing the header quadlet |
| 2042 | * will indicate that the config rom is ready, so we |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2043 | * do that last. |
| 2044 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2045 | reg_write(ohci, OHCI1394_BusOptions, |
| 2046 | be32_to_cpu(ohci->config_rom[2])); |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2047 | ohci->config_rom[0] = ohci->next_header; |
| 2048 | reg_write(ohci, OHCI1394_ConfigROMhdr, |
| 2049 | be32_to_cpu(ohci->next_header)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2050 | } |
| 2051 | |
Lubomir Rintel | 8bc588e | 2013-12-22 11:34:22 +0100 | [diff] [blame] | 2052 | if (param_remote_dma) { |
| 2053 | reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); |
| 2054 | reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); |
| 2055 | } |
Stefan Richter | 080de8c | 2008-02-28 20:54:43 +0100 | [diff] [blame] | 2056 | |
Stefan Richter | 8a8c473 | 2012-04-09 21:40:33 +0200 | [diff] [blame] | 2057 | spin_unlock_irq(&ohci->lock); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2058 | |
Stefan Richter | 4eaff7d | 2007-07-25 19:18:08 +0200 | [diff] [blame] | 2059 | if (free_rom) |
| 2060 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 2061 | free_rom, free_rom_bus); |
| 2062 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 2063 | log_selfids(ohci, generation, self_id_count); |
Stefan Richter | ad3c0fe | 2008-03-20 22:04:36 +0100 | [diff] [blame] | 2064 | |
Kristian Høgsberg | e636fe2 | 2007-01-26 00:38:04 -0500 | [diff] [blame] | 2065 | fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation, |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2066 | self_id_count, ohci->self_id_buffer, |
| 2067 | ohci->csr_state_setclear_abdicate); |
| 2068 | ohci->csr_state_setclear_abdicate = false; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2069 | } |
| 2070 | |
| 2071 | static irqreturn_t irq_handler(int irq, void *data) |
| 2072 | { |
| 2073 | struct fw_ohci *ohci = data; |
Stefan Richter | 168cf9a | 2010-02-14 18:49:18 +0100 | [diff] [blame] | 2074 | u32 event, iso_event; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2075 | int i; |
| 2076 | |
| 2077 | event = reg_read(ohci, OHCI1394_IntEventClear); |
| 2078 | |
Stefan Richter | a515958 | 2007-06-09 19:31:14 +0200 | [diff] [blame] | 2079 | if (!event || !~event) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2080 | return IRQ_NONE; |
| 2081 | |
Clemens Ladisch | 8327b37 | 2010-11-30 08:24:32 +0100 | [diff] [blame] | 2082 | /* |
| 2083 | * busReset and postedWriteErr must not be cleared yet |
| 2084 | * (OHCI 1.1 clauses 7.2.3.2 and 13.2.8.1) |
| 2085 | */ |
| 2086 | reg_write(ohci, OHCI1394_IntEventClear, |
| 2087 | event & ~(OHCI1394_busReset | OHCI1394_postedWriteErr)); |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 2088 | log_irqs(ohci, event); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2089 | |
| 2090 | if (event & OHCI1394_selfIDComplete) |
Stephan Gatzka | db9ae8f | 2013-08-26 20:50:05 +0200 | [diff] [blame] | 2091 | queue_work(selfid_workqueue, &ohci->bus_reset_work); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2092 | |
| 2093 | if (event & OHCI1394_RQPkt) |
| 2094 | tasklet_schedule(&ohci->ar_request_ctx.tasklet); |
| 2095 | |
| 2096 | if (event & OHCI1394_RSPkt) |
| 2097 | tasklet_schedule(&ohci->ar_response_ctx.tasklet); |
| 2098 | |
| 2099 | if (event & OHCI1394_reqTxComplete) |
| 2100 | tasklet_schedule(&ohci->at_request_ctx.tasklet); |
| 2101 | |
| 2102 | if (event & OHCI1394_respTxComplete) |
| 2103 | tasklet_schedule(&ohci->at_response_ctx.tasklet); |
| 2104 | |
Clemens Ladisch | 2dd5bed | 2010-11-30 08:25:05 +0100 | [diff] [blame] | 2105 | if (event & OHCI1394_isochRx) { |
| 2106 | iso_event = reg_read(ohci, OHCI1394_IsoRecvIntEventClear); |
| 2107 | reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2108 | |
Clemens Ladisch | 2dd5bed | 2010-11-30 08:25:05 +0100 | [diff] [blame] | 2109 | while (iso_event) { |
| 2110 | i = ffs(iso_event) - 1; |
| 2111 | tasklet_schedule( |
| 2112 | &ohci->ir_context_list[i].context.tasklet); |
| 2113 | iso_event &= ~(1 << i); |
| 2114 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2115 | } |
| 2116 | |
Clemens Ladisch | 2dd5bed | 2010-11-30 08:25:05 +0100 | [diff] [blame] | 2117 | if (event & OHCI1394_isochTx) { |
| 2118 | iso_event = reg_read(ohci, OHCI1394_IsoXmitIntEventClear); |
| 2119 | reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2120 | |
Clemens Ladisch | 2dd5bed | 2010-11-30 08:25:05 +0100 | [diff] [blame] | 2121 | while (iso_event) { |
| 2122 | i = ffs(iso_event) - 1; |
| 2123 | tasklet_schedule( |
| 2124 | &ohci->it_context_list[i].context.tasklet); |
| 2125 | iso_event &= ~(1 << i); |
| 2126 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2127 | } |
| 2128 | |
Jarod Wilson | 75f7832 | 2008-04-03 17:18:23 -0400 | [diff] [blame] | 2129 | if (unlikely(event & OHCI1394_regAccessFail)) |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 2130 | ohci_err(ohci, "register access failure\n"); |
Jarod Wilson | 75f7832 | 2008-04-03 17:18:23 -0400 | [diff] [blame] | 2131 | |
Clemens Ladisch | 8327b37 | 2010-11-30 08:24:32 +0100 | [diff] [blame] | 2132 | if (unlikely(event & OHCI1394_postedWriteErr)) { |
| 2133 | reg_read(ohci, OHCI1394_PostedWriteAddressHi); |
| 2134 | reg_read(ohci, OHCI1394_PostedWriteAddressLo); |
| 2135 | reg_write(ohci, OHCI1394_IntEventClear, |
| 2136 | OHCI1394_postedWriteErr); |
Stephan Gatzka | a74477d | 2011-09-26 21:44:30 +0200 | [diff] [blame] | 2137 | if (printk_ratelimit()) |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 2138 | ohci_err(ohci, "PCI posted write error\n"); |
Clemens Ladisch | 8327b37 | 2010-11-30 08:24:32 +0100 | [diff] [blame] | 2139 | } |
Stefan Richter | e524f616 | 2007-08-20 21:58:30 +0200 | [diff] [blame] | 2140 | |
Stefan Richter | bb9f220 | 2007-12-22 22:14:52 +0100 | [diff] [blame] | 2141 | if (unlikely(event & OHCI1394_cycleTooLong)) { |
| 2142 | if (printk_ratelimit()) |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 2143 | ohci_notice(ohci, "isochronous cycle too long\n"); |
Stefan Richter | bb9f220 | 2007-12-22 22:14:52 +0100 | [diff] [blame] | 2144 | reg_write(ohci, OHCI1394_LinkControlSet, |
| 2145 | OHCI1394_LinkControl_cycleMaster); |
| 2146 | } |
| 2147 | |
Jay Fenlason | 5ed1f32 | 2009-11-17 12:29:17 -0500 | [diff] [blame] | 2148 | if (unlikely(event & OHCI1394_cycleInconsistent)) { |
| 2149 | /* |
| 2150 | * We need to clear this event bit in order to make |
| 2151 | * cycleMatch isochronous I/O work. In theory we should |
| 2152 | * stop active cycleMatch iso contexts now and restart |
| 2153 | * them at least two cycles later. (FIXME?) |
| 2154 | */ |
| 2155 | if (printk_ratelimit()) |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 2156 | ohci_notice(ohci, "isochronous cycle inconsistent\n"); |
Jay Fenlason | 5ed1f32 | 2009-11-17 12:29:17 -0500 | [diff] [blame] | 2157 | } |
| 2158 | |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 2159 | if (unlikely(event & OHCI1394_unrecoverableError)) |
| 2160 | handle_dead_contexts(ohci); |
| 2161 | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2162 | if (event & OHCI1394_cycle64Seconds) { |
| 2163 | spin_lock(&ohci->lock); |
| 2164 | update_bus_time(ohci); |
| 2165 | spin_unlock(&ohci->lock); |
Clemens Ladisch | e597e98 | 2010-11-30 08:24:19 +0100 | [diff] [blame] | 2166 | } else |
| 2167 | flush_writes(ohci); |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2168 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2169 | return IRQ_HANDLED; |
| 2170 | } |
| 2171 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2172 | static int software_reset(struct fw_ohci *ohci) |
| 2173 | { |
Stefan Richter | 9f42617 | 2011-07-03 17:39:26 +0200 | [diff] [blame] | 2174 | u32 val; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2175 | int i; |
| 2176 | |
| 2177 | reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); |
Stefan Richter | 9f42617 | 2011-07-03 17:39:26 +0200 | [diff] [blame] | 2178 | for (i = 0; i < 500; i++) { |
| 2179 | val = reg_read(ohci, OHCI1394_HCControlSet); |
| 2180 | if (!~val) |
| 2181 | return -ENODEV; /* Card was ejected. */ |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2182 | |
Stefan Richter | 9f42617 | 2011-07-03 17:39:26 +0200 | [diff] [blame] | 2183 | if (!(val & OHCI1394_HCControl_softReset)) |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2184 | return 0; |
Stefan Richter | 9f42617 | 2011-07-03 17:39:26 +0200 | [diff] [blame] | 2185 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2186 | msleep(1); |
| 2187 | } |
| 2188 | |
| 2189 | return -EBUSY; |
| 2190 | } |
| 2191 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2192 | static void copy_config_rom(__be32 *dest, const __be32 *src, size_t length) |
| 2193 | { |
| 2194 | size_t size = length * 4; |
| 2195 | |
| 2196 | memcpy(dest, src, size); |
| 2197 | if (size < CONFIG_ROM_SIZE) |
| 2198 | memset(&dest[length], 0, CONFIG_ROM_SIZE - size); |
| 2199 | } |
| 2200 | |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 2201 | static int configure_1394a_enhancements(struct fw_ohci *ohci) |
| 2202 | { |
| 2203 | bool enable_1394a; |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 2204 | int ret, clear, set, offset; |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 2205 | |
| 2206 | /* Check if the driver should configure link and PHY. */ |
| 2207 | if (!(reg_read(ohci, OHCI1394_HCControlSet) & |
| 2208 | OHCI1394_HCControl_programPhyEnable)) |
| 2209 | return 0; |
| 2210 | |
| 2211 | /* Paranoia: check whether the PHY supports 1394a, too. */ |
| 2212 | enable_1394a = false; |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 2213 | ret = read_phy_reg(ohci, 2); |
| 2214 | if (ret < 0) |
| 2215 | return ret; |
| 2216 | if ((ret & PHY_EXTENDED_REGISTERS) == PHY_EXTENDED_REGISTERS) { |
| 2217 | ret = read_paged_phy_reg(ohci, 1, 8); |
| 2218 | if (ret < 0) |
| 2219 | return ret; |
| 2220 | if (ret >= 1) |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 2221 | enable_1394a = true; |
| 2222 | } |
| 2223 | |
| 2224 | if (ohci->quirks & QUIRK_NO_1394A) |
| 2225 | enable_1394a = false; |
| 2226 | |
| 2227 | /* Configure PHY and link consistently. */ |
| 2228 | if (enable_1394a) { |
| 2229 | clear = 0; |
| 2230 | set = PHY_ENABLE_ACCEL | PHY_ENABLE_MULTI; |
| 2231 | } else { |
| 2232 | clear = PHY_ENABLE_ACCEL | PHY_ENABLE_MULTI; |
| 2233 | set = 0; |
| 2234 | } |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 2235 | ret = update_phy_reg(ohci, 5, clear, set); |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 2236 | if (ret < 0) |
| 2237 | return ret; |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 2238 | |
| 2239 | if (enable_1394a) |
| 2240 | offset = OHCI1394_HCControlSet; |
| 2241 | else |
| 2242 | offset = OHCI1394_HCControlClear; |
| 2243 | reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); |
| 2244 | |
| 2245 | /* Clean up: configuration has been taken care of. */ |
| 2246 | reg_write(ohci, OHCI1394_HCControlClear, |
| 2247 | OHCI1394_HCControl_programPhyEnable); |
| 2248 | |
| 2249 | return 0; |
| 2250 | } |
| 2251 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2252 | static int probe_tsb41ba3d(struct fw_ohci *ohci) |
| 2253 | { |
Stefan Richter | b810e4a | 2011-09-19 09:29:30 +0200 | [diff] [blame] | 2254 | /* TI vendor ID = 0x080028, TSB41BA3D product ID = 0x833005 (sic) */ |
| 2255 | static const u8 id[] = { 0x08, 0x00, 0x28, 0x83, 0x30, 0x05, }; |
| 2256 | int reg, i; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2257 | |
| 2258 | reg = read_phy_reg(ohci, 2); |
| 2259 | if (reg < 0) |
| 2260 | return reg; |
Stefan Richter | b810e4a | 2011-09-19 09:29:30 +0200 | [diff] [blame] | 2261 | if ((reg & PHY_EXTENDED_REGISTERS) != PHY_EXTENDED_REGISTERS) |
| 2262 | return 0; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2263 | |
Stefan Richter | b810e4a | 2011-09-19 09:29:30 +0200 | [diff] [blame] | 2264 | for (i = ARRAY_SIZE(id) - 1; i >= 0; i--) { |
| 2265 | reg = read_paged_phy_reg(ohci, 1, i + 10); |
| 2266 | if (reg < 0) |
| 2267 | return reg; |
| 2268 | if (reg != id[i]) |
| 2269 | return 0; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2270 | } |
Stefan Richter | b810e4a | 2011-09-19 09:29:30 +0200 | [diff] [blame] | 2271 | return 1; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2272 | } |
| 2273 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2274 | static int ohci_enable(struct fw_card *card, |
| 2275 | const __be32 *config_rom, size_t length) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2276 | { |
| 2277 | struct fw_ohci *ohci = fw_ohci(card); |
Clemens Ladisch | 9d60ef2 | 2012-05-24 19:29:19 +0200 | [diff] [blame] | 2278 | u32 lps, version, irqs; |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 2279 | int i, ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2280 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2281 | if (software_reset(ohci)) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 2282 | ohci_err(ohci, "failed to reset ohci card\n"); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2283 | return -EBUSY; |
| 2284 | } |
| 2285 | |
| 2286 | /* |
| 2287 | * Now enable LPS, which we need in order to start accessing |
| 2288 | * most of the registers. In fact, on some cards (ALI M5251), |
| 2289 | * accessing registers in the SClk domain without LPS enabled |
| 2290 | * will lock up the machine. Wait 50msec to make sure we have |
Jarod Wilson | 0221472 | 2008-03-28 10:02:50 -0400 | [diff] [blame] | 2291 | * full link enabled. However, with some cards (well, at least |
| 2292 | * a JMicron PCIe card), we have to try again sometimes. |
Peter Hurley | bd97268 | 2013-04-28 23:24:08 +0200 | [diff] [blame] | 2293 | * |
| 2294 | * TI TSB82AA2 + TSB81BA3(A) cards signal LPS enabled early but |
| 2295 | * cannot actually use the phy at that time. These need tens of |
| 2296 | * millisecods pause between LPS write and first phy access too. |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2297 | */ |
Peter Hurley | bd97268 | 2013-04-28 23:24:08 +0200 | [diff] [blame] | 2298 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2299 | reg_write(ohci, OHCI1394_HCControlSet, |
| 2300 | OHCI1394_HCControl_LPS | |
| 2301 | OHCI1394_HCControl_postedWriteEnable); |
| 2302 | flush_writes(ohci); |
Jarod Wilson | 0221472 | 2008-03-28 10:02:50 -0400 | [diff] [blame] | 2303 | |
Stefan Richter | 0ca4934 | 2014-03-06 20:39:04 +0100 | [diff] [blame] | 2304 | for (lps = 0, i = 0; !lps && i < 3; i++) { |
Jarod Wilson | 0221472 | 2008-03-28 10:02:50 -0400 | [diff] [blame] | 2305 | msleep(50); |
| 2306 | lps = reg_read(ohci, OHCI1394_HCControlSet) & |
| 2307 | OHCI1394_HCControl_LPS; |
| 2308 | } |
| 2309 | |
| 2310 | if (!lps) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 2311 | ohci_err(ohci, "failed to set Link Power Status\n"); |
Jarod Wilson | 0221472 | 2008-03-28 10:02:50 -0400 | [diff] [blame] | 2312 | return -EIO; |
| 2313 | } |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2314 | |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2315 | if (ohci->quirks & QUIRK_TI_SLLZ059) { |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 2316 | ret = probe_tsb41ba3d(ohci); |
| 2317 | if (ret < 0) |
| 2318 | return ret; |
| 2319 | if (ret) |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 2320 | ohci_notice(ohci, "local TSB41BA3D phy\n"); |
Stefan Richter | 28897fb | 2011-09-19 00:17:37 +0200 | [diff] [blame] | 2321 | else |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2322 | ohci->quirks &= ~QUIRK_TI_SLLZ059; |
Stephan Gatzka | 25935eb | 2011-09-12 22:23:53 +0200 | [diff] [blame] | 2323 | } |
| 2324 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2325 | reg_write(ohci, OHCI1394_HCControlClear, |
| 2326 | OHCI1394_HCControl_noByteSwapData); |
| 2327 | |
Stefan Richter | affc9c2 | 2008-06-05 20:50:53 +0200 | [diff] [blame] | 2328 | reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2329 | reg_write(ohci, OHCI1394_LinkControlSet, |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2330 | OHCI1394_LinkControl_cycleTimerEnable | |
| 2331 | OHCI1394_LinkControl_cycleMaster); |
| 2332 | |
| 2333 | reg_write(ohci, OHCI1394_ATRetries, |
| 2334 | OHCI1394_MAX_AT_REQ_RETRIES | |
| 2335 | (OHCI1394_MAX_AT_RESP_RETRIES << 4) | |
Clemens Ladisch | 27a2329 | 2010-06-10 08:34:13 +0200 | [diff] [blame] | 2336 | (OHCI1394_MAX_PHYS_RESP_RETRIES << 8) | |
| 2337 | (200 << 16)); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2338 | |
Clemens Ladisch | 9d60ef2 | 2012-05-24 19:29:19 +0200 | [diff] [blame] | 2339 | ohci->bus_time_running = false; |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2340 | |
Clemens Ladisch | e18907c | 2012-06-13 22:29:20 +0200 | [diff] [blame] | 2341 | for (i = 0; i < 32; i++) |
| 2342 | if (ohci->ir_context_support & (1 << i)) |
| 2343 | reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i), |
| 2344 | IR_CONTEXT_MULTI_CHANNEL_MODE); |
| 2345 | |
Clemens Ladisch | e91b278 | 2010-06-10 08:40:49 +0200 | [diff] [blame] | 2346 | version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; |
| 2347 | if (version >= OHCI_VERSION_1_1) { |
| 2348 | reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, |
| 2349 | 0xfffffffe); |
Stefan Richter | db3c9cc | 2010-06-12 20:30:21 +0200 | [diff] [blame] | 2350 | card->broadcast_channel_auto_allocated = true; |
Clemens Ladisch | e91b278 | 2010-06-10 08:40:49 +0200 | [diff] [blame] | 2351 | } |
| 2352 | |
Clemens Ladisch | a1a1132 | 2010-06-10 08:35:06 +0200 | [diff] [blame] | 2353 | /* Get implemented bits of the priority arbitration request counter. */ |
| 2354 | reg_write(ohci, OHCI1394_FairnessControl, 0x3f); |
| 2355 | ohci->pri_req_max = reg_read(ohci, OHCI1394_FairnessControl) & 0x3f; |
| 2356 | reg_write(ohci, OHCI1394_FairnessControl, 0); |
Stefan Richter | db3c9cc | 2010-06-12 20:30:21 +0200 | [diff] [blame] | 2357 | card->priority_budget_implemented = ohci->pri_req_max != 0; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2358 | |
Stefan Richter | fcd46b3 | 2014-01-18 17:32:20 +0100 | [diff] [blame] | 2359 | reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2360 | reg_write(ohci, OHCI1394_IntEventClear, ~0); |
| 2361 | reg_write(ohci, OHCI1394_IntMaskClear, ~0); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2362 | |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 2363 | ret = configure_1394a_enhancements(ohci); |
| 2364 | if (ret < 0) |
| 2365 | return ret; |
Clemens Ladisch | 925e7a6 | 2010-04-04 15:19:54 +0200 | [diff] [blame] | 2366 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2367 | /* Activate link_on bit and contender bit in our self ID packets.*/ |
Stefan Richter | 35d999b | 2010-04-10 16:04:56 +0200 | [diff] [blame] | 2368 | ret = ohci_update_phy_reg(card, 4, 0, PHY_LINK_ACTIVE | PHY_CONTENDER); |
| 2369 | if (ret < 0) |
| 2370 | return ret; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 2371 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2372 | /* |
| 2373 | * When the link is not yet enabled, the atomic config rom |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2374 | * update mechanism described below in ohci_set_config_rom() |
| 2375 | * is not active. We have to update ConfigRomHeader and |
| 2376 | * BusOptions manually, and the write to ConfigROMmap takes |
| 2377 | * effect immediately. We tie this to the enabling of the |
| 2378 | * link, so we have a valid config rom before enabling - the |
| 2379 | * OHCI requires that ConfigROMhdr and BusOptions have valid |
| 2380 | * values before enabling. |
| 2381 | * |
| 2382 | * However, when the ConfigROMmap is written, some controllers |
| 2383 | * always read back quadlets 0 and 2 from the config rom to |
| 2384 | * the ConfigRomHeader and BusOptions registers on bus reset. |
| 2385 | * They shouldn't do that in this initial case where the link |
| 2386 | * isn't enabled. This means we have to use the same |
| 2387 | * workaround here, setting the bus header to 0 and then write |
| 2388 | * the right values in the bus reset tasklet. |
| 2389 | */ |
| 2390 | |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 2391 | if (config_rom) { |
| 2392 | ohci->next_config_rom = |
| 2393 | dma_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 2394 | &ohci->next_config_rom_bus, |
| 2395 | GFP_KERNEL); |
| 2396 | if (ohci->next_config_rom == NULL) |
| 2397 | return -ENOMEM; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2398 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2399 | copy_config_rom(ohci->next_config_rom, config_rom, length); |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 2400 | } else { |
| 2401 | /* |
| 2402 | * In the suspend case, config_rom is NULL, which |
| 2403 | * means that we just reuse the old config rom. |
| 2404 | */ |
| 2405 | ohci->next_config_rom = ohci->config_rom; |
| 2406 | ohci->next_config_rom_bus = ohci->config_rom_bus; |
| 2407 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2408 | |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2409 | ohci->next_header = ohci->next_config_rom[0]; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2410 | ohci->next_config_rom[0] = 0; |
| 2411 | reg_write(ohci, OHCI1394_ConfigROMhdr, 0); |
Kristian Høgsberg | 0bd243c | 2007-06-05 19:27:05 -0400 | [diff] [blame] | 2412 | reg_write(ohci, OHCI1394_BusOptions, |
| 2413 | be32_to_cpu(ohci->next_config_rom[2])); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2414 | reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); |
| 2415 | |
| 2416 | reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); |
| 2417 | |
Stefan Richter | 148c786 | 2010-06-05 11:46:49 +0200 | [diff] [blame] | 2418 | irqs = OHCI1394_reqTxComplete | OHCI1394_respTxComplete | |
| 2419 | OHCI1394_RQPkt | OHCI1394_RSPkt | |
| 2420 | OHCI1394_isochTx | OHCI1394_isochRx | |
| 2421 | OHCI1394_postedWriteErr | |
| 2422 | OHCI1394_selfIDComplete | |
| 2423 | OHCI1394_regAccessFail | |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 2424 | OHCI1394_cycleInconsistent | |
| 2425 | OHCI1394_unrecoverableError | |
| 2426 | OHCI1394_cycleTooLong | |
Stefan Richter | 148c786 | 2010-06-05 11:46:49 +0200 | [diff] [blame] | 2427 | OHCI1394_masterIntEnable; |
| 2428 | if (param_debug & OHCI_PARAM_DEBUG_BUSRESETS) |
| 2429 | irqs |= OHCI1394_busReset; |
| 2430 | reg_write(ohci, OHCI1394_IntMaskSet, irqs); |
| 2431 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2432 | reg_write(ohci, OHCI1394_HCControlSet, |
| 2433 | OHCI1394_HCControl_linkEnable | |
| 2434 | OHCI1394_HCControl_BIBimageValid); |
Clemens Ladisch | ecf8328 | 2011-04-11 09:56:12 +0200 | [diff] [blame] | 2435 | |
| 2436 | reg_write(ohci, OHCI1394_LinkControlSet, |
| 2437 | OHCI1394_LinkControl_rcvSelfID | |
| 2438 | OHCI1394_LinkControl_rcvPhyPkt); |
| 2439 | |
| 2440 | ar_context_run(&ohci->ar_request_ctx); |
Clemens Ladisch | dd6254e | 2011-05-16 08:10:10 +0200 | [diff] [blame] | 2441 | ar_context_run(&ohci->ar_response_ctx); |
| 2442 | |
| 2443 | flush_writes(ohci); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2444 | |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 2445 | /* We are ready to go, reset bus to finish initialization. */ |
| 2446 | fw_schedule_bus_reset(&ohci->card, false, true); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2447 | |
| 2448 | return 0; |
| 2449 | } |
| 2450 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 2451 | static int ohci_set_config_rom(struct fw_card *card, |
Stefan Richter | 8e85973 | 2009-10-08 00:41:59 +0200 | [diff] [blame] | 2452 | const __be32 *config_rom, size_t length) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2453 | { |
| 2454 | struct fw_ohci *ohci; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2455 | __be32 *next_config_rom; |
Stefan Richter | f5101d58 | 2008-03-14 00:27:49 +0100 | [diff] [blame] | 2456 | dma_addr_t uninitialized_var(next_config_rom_bus); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2457 | |
| 2458 | ohci = fw_ohci(card); |
| 2459 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2460 | /* |
| 2461 | * When the OHCI controller is enabled, the config rom update |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2462 | * mechanism is a bit tricky, but easy enough to use. See |
| 2463 | * section 5.5.6 in the OHCI specification. |
| 2464 | * |
| 2465 | * The OHCI controller caches the new config rom address in a |
| 2466 | * shadow register (ConfigROMmapNext) and needs a bus reset |
| 2467 | * for the changes to take place. When the bus reset is |
| 2468 | * detected, the controller loads the new values for the |
| 2469 | * ConfigRomHeader and BusOptions registers from the specified |
| 2470 | * config rom and loads ConfigROMmap from the ConfigROMmapNext |
| 2471 | * shadow register. All automatically and atomically. |
| 2472 | * |
| 2473 | * Now, there's a twist to this story. The automatic load of |
| 2474 | * ConfigRomHeader and BusOptions doesn't honor the |
| 2475 | * noByteSwapData bit, so with a be32 config rom, the |
| 2476 | * controller will load be32 values in to these registers |
| 2477 | * during the atomic update, even on litte endian |
| 2478 | * architectures. The workaround we use is to put a 0 in the |
| 2479 | * header quadlet; 0 is endian agnostic and means that the |
| 2480 | * config rom isn't ready yet. In the bus reset tasklet we |
| 2481 | * then set up the real values for the two registers. |
| 2482 | * |
| 2483 | * We use ohci->lock to avoid racing with the code that sets |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 2484 | * ohci->next_config_rom to NULL (see bus_reset_work). |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2485 | */ |
| 2486 | |
| 2487 | next_config_rom = |
| 2488 | dma_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 2489 | &next_config_rom_bus, GFP_KERNEL); |
| 2490 | if (next_config_rom == NULL) |
| 2491 | return -ENOMEM; |
| 2492 | |
Stefan Richter | 8a8c473 | 2012-04-09 21:40:33 +0200 | [diff] [blame] | 2493 | spin_lock_irq(&ohci->lock); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2494 | |
B.J. Buchalter | 2e053a2 | 2011-05-02 13:33:42 -0400 | [diff] [blame] | 2495 | /* |
| 2496 | * If there is not an already pending config_rom update, |
| 2497 | * push our new allocation into the ohci->next_config_rom |
| 2498 | * and then mark the local variable as null so that we |
| 2499 | * won't deallocate the new buffer. |
| 2500 | * |
| 2501 | * OTOH, if there is a pending config_rom update, just |
| 2502 | * use that buffer with the new config_rom data, and |
| 2503 | * let this routine free the unused DMA allocation. |
| 2504 | */ |
| 2505 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2506 | if (ohci->next_config_rom == NULL) { |
| 2507 | ohci->next_config_rom = next_config_rom; |
| 2508 | ohci->next_config_rom_bus = next_config_rom_bus; |
B.J. Buchalter | 2e053a2 | 2011-05-02 13:33:42 -0400 | [diff] [blame] | 2509 | next_config_rom = NULL; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2510 | } |
| 2511 | |
B.J. Buchalter | 2e053a2 | 2011-05-02 13:33:42 -0400 | [diff] [blame] | 2512 | copy_config_rom(ohci->next_config_rom, config_rom, length); |
| 2513 | |
| 2514 | ohci->next_header = config_rom[0]; |
| 2515 | ohci->next_config_rom[0] = 0; |
| 2516 | |
| 2517 | reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); |
| 2518 | |
Stefan Richter | 8a8c473 | 2012-04-09 21:40:33 +0200 | [diff] [blame] | 2519 | spin_unlock_irq(&ohci->lock); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2520 | |
B.J. Buchalter | 2e053a2 | 2011-05-02 13:33:42 -0400 | [diff] [blame] | 2521 | /* If we didn't use the DMA allocation, delete it. */ |
| 2522 | if (next_config_rom != NULL) |
| 2523 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 2524 | next_config_rom, next_config_rom_bus); |
| 2525 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2526 | /* |
| 2527 | * Now initiate a bus reset to have the changes take |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2528 | * effect. We clean up the old config rom memory and DMA |
| 2529 | * mappings in the bus reset tasklet, since the OHCI |
| 2530 | * controller could need to access it before the bus reset |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2531 | * takes effect. |
| 2532 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2533 | |
B.J. Buchalter | 2e053a2 | 2011-05-02 13:33:42 -0400 | [diff] [blame] | 2534 | fw_schedule_bus_reset(&ohci->card, true, true); |
| 2535 | |
| 2536 | return 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2537 | } |
| 2538 | |
| 2539 | static void ohci_send_request(struct fw_card *card, struct fw_packet *packet) |
| 2540 | { |
| 2541 | struct fw_ohci *ohci = fw_ohci(card); |
| 2542 | |
| 2543 | at_context_transmit(&ohci->at_request_ctx, packet); |
| 2544 | } |
| 2545 | |
| 2546 | static void ohci_send_response(struct fw_card *card, struct fw_packet *packet) |
| 2547 | { |
| 2548 | struct fw_ohci *ohci = fw_ohci(card); |
| 2549 | |
| 2550 | at_context_transmit(&ohci->at_response_ctx, packet); |
| 2551 | } |
| 2552 | |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2553 | static int ohci_cancel_packet(struct fw_card *card, struct fw_packet *packet) |
| 2554 | { |
| 2555 | struct fw_ohci *ohci = fw_ohci(card); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2556 | struct context *ctx = &ohci->at_request_ctx; |
| 2557 | struct driver_data *driver_data = packet->driver_data; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2558 | int ret = -ENOENT; |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2559 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2560 | tasklet_disable(&ctx->tasklet); |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2561 | |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2562 | if (packet->ack != 0) |
| 2563 | goto out; |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2564 | |
Stefan Richter | 19593ff | 2009-10-14 20:40:10 +0200 | [diff] [blame] | 2565 | if (packet->payload_mapped) |
Stefan Richter | 1d1dc5e | 2008-12-10 00:20:38 +0100 | [diff] [blame] | 2566 | dma_unmap_single(ohci->card.device, packet->payload_bus, |
| 2567 | packet->payload_length, DMA_TO_DEVICE); |
| 2568 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 2569 | log_ar_at_event(ohci, 'T', packet->speed, packet->header, 0x20); |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2570 | driver_data->packet = NULL; |
| 2571 | packet->ack = RCODE_CANCELLED; |
| 2572 | packet->callback(packet, &ohci->card, packet->ack); |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2573 | ret = 0; |
Kristian Høgsberg | f319b6a | 2007-03-07 12:12:49 -0500 | [diff] [blame] | 2574 | out: |
| 2575 | tasklet_enable(&ctx->tasklet); |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2576 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2577 | return ret; |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 2578 | } |
| 2579 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 2580 | static int ohci_enable_phys_dma(struct fw_card *card, |
| 2581 | int node_id, int generation) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2582 | { |
| 2583 | struct fw_ohci *ohci = fw_ohci(card); |
| 2584 | unsigned long flags; |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2585 | int n, ret = 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2586 | |
Lubomir Rintel | 8bc588e | 2013-12-22 11:34:22 +0100 | [diff] [blame] | 2587 | if (param_remote_dma) |
| 2588 | return 0; |
| 2589 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2590 | /* |
| 2591 | * FIXME: Make sure this bitmask is cleared when we clear the busReset |
| 2592 | * interrupt bit. Clear physReqResourceAllBuses on bus reset. |
| 2593 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2594 | |
| 2595 | spin_lock_irqsave(&ohci->lock, flags); |
| 2596 | |
| 2597 | if (ohci->generation != generation) { |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2598 | ret = -ESTALE; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2599 | goto out; |
| 2600 | } |
| 2601 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 2602 | /* |
| 2603 | * Note, if the node ID contains a non-local bus ID, physical DMA is |
| 2604 | * enabled for _all_ nodes on remote buses. |
| 2605 | */ |
Stefan Richter | 907293d | 2007-01-23 21:11:43 +0100 | [diff] [blame] | 2606 | |
| 2607 | n = (node_id & 0xffc0) == LOCAL_BUS ? node_id & 0x3f : 63; |
| 2608 | if (n < 32) |
| 2609 | reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); |
| 2610 | else |
| 2611 | reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); |
| 2612 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2613 | flush_writes(ohci); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2614 | out: |
Stefan Richter | 6cad95f | 2007-01-21 20:46:45 +0100 | [diff] [blame] | 2615 | spin_unlock_irqrestore(&ohci->lock, flags); |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 2616 | |
| 2617 | return ret; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2618 | } |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 2619 | |
Stefan Richter | 0fcff4e | 2010-06-12 20:35:52 +0200 | [diff] [blame] | 2620 | static u32 ohci_read_csr(struct fw_card *card, int csr_offset) |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 2621 | { |
| 2622 | struct fw_ohci *ohci = fw_ohci(card); |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2623 | unsigned long flags; |
| 2624 | u32 value; |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 2625 | |
Clemens Ladisch | 60d3297 | 2010-06-10 08:24:35 +0200 | [diff] [blame] | 2626 | switch (csr_offset) { |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2627 | case CSR_STATE_CLEAR: |
| 2628 | case CSR_STATE_SET: |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2629 | if (ohci->is_root && |
| 2630 | (reg_read(ohci, OHCI1394_LinkControlSet) & |
| 2631 | OHCI1394_LinkControl_cycleMaster)) |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2632 | value = CSR_STATE_BIT_CMSTR; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2633 | else |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2634 | value = 0; |
| 2635 | if (ohci->csr_state_setclear_abdicate) |
| 2636 | value |= CSR_STATE_BIT_ABDICATE; |
Stefan Richter | 4a9bde9 | 2010-02-20 22:24:43 +0100 | [diff] [blame] | 2637 | |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2638 | return value; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2639 | |
Clemens Ladisch | 506f1a3 | 2010-06-10 08:25:19 +0200 | [diff] [blame] | 2640 | case CSR_NODE_IDS: |
| 2641 | return reg_read(ohci, OHCI1394_NodeID) << 16; |
| 2642 | |
Clemens Ladisch | 60d3297 | 2010-06-10 08:24:35 +0200 | [diff] [blame] | 2643 | case CSR_CYCLE_TIME: |
| 2644 | return get_cycle_time(ohci); |
| 2645 | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2646 | case CSR_BUS_TIME: |
| 2647 | /* |
| 2648 | * We might be called just after the cycle timer has wrapped |
| 2649 | * around but just before the cycle64Seconds handler, so we |
| 2650 | * better check here, too, if the bus time needs to be updated. |
| 2651 | */ |
| 2652 | spin_lock_irqsave(&ohci->lock, flags); |
| 2653 | value = update_bus_time(ohci); |
| 2654 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 2655 | return value; |
| 2656 | |
Clemens Ladisch | 27a2329 | 2010-06-10 08:34:13 +0200 | [diff] [blame] | 2657 | case CSR_BUSY_TIMEOUT: |
| 2658 | value = reg_read(ohci, OHCI1394_ATRetries); |
| 2659 | return (value >> 4) & 0x0ffff00f; |
| 2660 | |
Clemens Ladisch | a1a1132 | 2010-06-10 08:35:06 +0200 | [diff] [blame] | 2661 | case CSR_PRIORITY_BUDGET: |
| 2662 | return (reg_read(ohci, OHCI1394_FairnessControl) & 0x3f) | |
| 2663 | (ohci->pri_req_max << 8); |
| 2664 | |
Clemens Ladisch | 60d3297 | 2010-06-10 08:24:35 +0200 | [diff] [blame] | 2665 | default: |
| 2666 | WARN_ON(1); |
| 2667 | return 0; |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 2668 | } |
Clemens Ladisch | 60d3297 | 2010-06-10 08:24:35 +0200 | [diff] [blame] | 2669 | } |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 2670 | |
Stefan Richter | 0fcff4e | 2010-06-12 20:35:52 +0200 | [diff] [blame] | 2671 | static void ohci_write_csr(struct fw_card *card, int csr_offset, u32 value) |
Clemens Ladisch | 506f1a3 | 2010-06-10 08:25:19 +0200 | [diff] [blame] | 2672 | { |
| 2673 | struct fw_ohci *ohci = fw_ohci(card); |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2674 | unsigned long flags; |
Clemens Ladisch | 506f1a3 | 2010-06-10 08:25:19 +0200 | [diff] [blame] | 2675 | |
| 2676 | switch (csr_offset) { |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2677 | case CSR_STATE_CLEAR: |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2678 | if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { |
| 2679 | reg_write(ohci, OHCI1394_LinkControlClear, |
| 2680 | OHCI1394_LinkControl_cycleMaster); |
| 2681 | flush_writes(ohci); |
| 2682 | } |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2683 | if (value & CSR_STATE_BIT_ABDICATE) |
| 2684 | ohci->csr_state_setclear_abdicate = false; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2685 | break; |
| 2686 | |
| 2687 | case CSR_STATE_SET: |
| 2688 | if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { |
| 2689 | reg_write(ohci, OHCI1394_LinkControlSet, |
| 2690 | OHCI1394_LinkControl_cycleMaster); |
| 2691 | flush_writes(ohci); |
| 2692 | } |
Stefan Richter | c8a94de | 2010-06-12 20:34:50 +0200 | [diff] [blame] | 2693 | if (value & CSR_STATE_BIT_ABDICATE) |
| 2694 | ohci->csr_state_setclear_abdicate = true; |
Clemens Ladisch | 4ffb7a6 | 2010-06-10 08:36:37 +0200 | [diff] [blame] | 2695 | break; |
| 2696 | |
Clemens Ladisch | 506f1a3 | 2010-06-10 08:25:19 +0200 | [diff] [blame] | 2697 | case CSR_NODE_IDS: |
| 2698 | reg_write(ohci, OHCI1394_NodeID, value >> 16); |
| 2699 | flush_writes(ohci); |
| 2700 | break; |
| 2701 | |
Clemens Ladisch | 9ab5071 | 2010-06-10 08:26:48 +0200 | [diff] [blame] | 2702 | case CSR_CYCLE_TIME: |
| 2703 | reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); |
| 2704 | reg_write(ohci, OHCI1394_IntEventSet, |
| 2705 | OHCI1394_cycleInconsistent); |
| 2706 | flush_writes(ohci); |
| 2707 | break; |
| 2708 | |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2709 | case CSR_BUS_TIME: |
| 2710 | spin_lock_irqsave(&ohci->lock, flags); |
Clemens Ladisch | 9d60ef2 | 2012-05-24 19:29:19 +0200 | [diff] [blame] | 2711 | ohci->bus_time = (update_bus_time(ohci) & 0x40) | |
| 2712 | (value & ~0x7f); |
Clemens Ladisch | a48777e | 2010-06-10 08:33:07 +0200 | [diff] [blame] | 2713 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 2714 | break; |
| 2715 | |
Clemens Ladisch | 27a2329 | 2010-06-10 08:34:13 +0200 | [diff] [blame] | 2716 | case CSR_BUSY_TIMEOUT: |
| 2717 | value = (value & 0xf) | ((value & 0xf) << 4) | |
| 2718 | ((value & 0xf) << 8) | ((value & 0x0ffff000) << 4); |
| 2719 | reg_write(ohci, OHCI1394_ATRetries, value); |
| 2720 | flush_writes(ohci); |
| 2721 | break; |
| 2722 | |
Clemens Ladisch | a1a1132 | 2010-06-10 08:35:06 +0200 | [diff] [blame] | 2723 | case CSR_PRIORITY_BUDGET: |
| 2724 | reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); |
| 2725 | flush_writes(ohci); |
| 2726 | break; |
| 2727 | |
Clemens Ladisch | 506f1a3 | 2010-06-10 08:25:19 +0200 | [diff] [blame] | 2728 | default: |
| 2729 | WARN_ON(1); |
| 2730 | break; |
| 2731 | } |
Kristian Høgsberg | d60d7f1 | 2007-03-07 12:12:56 -0500 | [diff] [blame] | 2732 | } |
| 2733 | |
Clemens Ladisch | 910e76c | 2012-03-18 19:04:43 +0100 | [diff] [blame] | 2734 | static void flush_iso_completions(struct iso_context *ctx) |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2735 | { |
Clemens Ladisch | 910e76c | 2012-03-18 19:04:43 +0100 | [diff] [blame] | 2736 | ctx->base.callback.sc(&ctx->base, ctx->last_timestamp, |
| 2737 | ctx->header_length, ctx->header, |
| 2738 | ctx->base.callback_data); |
| 2739 | ctx->header_length = 0; |
| 2740 | } |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2741 | |
Clemens Ladisch | 7386401 | 2012-03-18 19:04:05 +0100 | [diff] [blame] | 2742 | static void copy_iso_headers(struct iso_context *ctx, const u32 *dma_hdr) |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2743 | { |
Clemens Ladisch | 7386401 | 2012-03-18 19:04:05 +0100 | [diff] [blame] | 2744 | u32 *ctx_hdr; |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2745 | |
Clemens Ladisch | 0699a73 | 2013-07-22 21:32:09 +0200 | [diff] [blame] | 2746 | if (ctx->header_length + ctx->base.header_size > PAGE_SIZE) { |
| 2747 | if (ctx->base.drop_overflow_headers) |
| 2748 | return; |
Clemens Ladisch | 18d6271 | 2012-03-18 19:05:29 +0100 | [diff] [blame] | 2749 | flush_iso_completions(ctx); |
Clemens Ladisch | 0699a73 | 2013-07-22 21:32:09 +0200 | [diff] [blame] | 2750 | } |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2751 | |
Clemens Ladisch | 7386401 | 2012-03-18 19:04:05 +0100 | [diff] [blame] | 2752 | ctx_hdr = ctx->header + ctx->header_length; |
Clemens Ladisch | 910e76c | 2012-03-18 19:04:43 +0100 | [diff] [blame] | 2753 | ctx->last_timestamp = (u16)le32_to_cpu((__force __le32)dma_hdr[0]); |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2754 | |
| 2755 | /* |
Clemens Ladisch | 32c507f | 2012-03-18 19:01:39 +0100 | [diff] [blame] | 2756 | * The two iso header quadlets are byteswapped to little |
| 2757 | * endian by the controller, but we want to present them |
| 2758 | * as big endian for consistency with the bus endianness. |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2759 | */ |
| 2760 | if (ctx->base.header_size > 0) |
Clemens Ladisch | 7386401 | 2012-03-18 19:04:05 +0100 | [diff] [blame] | 2761 | ctx_hdr[0] = swab32(dma_hdr[1]); /* iso packet header */ |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2762 | if (ctx->base.header_size > 4) |
Clemens Ladisch | 7386401 | 2012-03-18 19:04:05 +0100 | [diff] [blame] | 2763 | ctx_hdr[1] = swab32(dma_hdr[0]); /* timestamp */ |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2764 | if (ctx->base.header_size > 8) |
Clemens Ladisch | 7386401 | 2012-03-18 19:04:05 +0100 | [diff] [blame] | 2765 | memcpy(&ctx_hdr[2], &dma_hdr[2], ctx->base.header_size - 8); |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 2766 | ctx->header_length += ctx->base.header_size; |
| 2767 | } |
| 2768 | |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2769 | static int handle_ir_packet_per_buffer(struct context *context, |
| 2770 | struct descriptor *d, |
| 2771 | struct descriptor *last) |
| 2772 | { |
| 2773 | struct iso_context *ctx = |
| 2774 | container_of(context, struct iso_context, context); |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2775 | struct descriptor *pd; |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2776 | u32 buffer_dma; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2777 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2778 | for (pd = d; pd <= last; pd++) |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2779 | if (pd->transfer_status) |
| 2780 | break; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 2781 | if (pd > last) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2782 | /* Descriptor(s) not done yet, stop iteration */ |
| 2783 | return 0; |
| 2784 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2785 | while (!(d->control & cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS))) { |
| 2786 | d++; |
| 2787 | buffer_dma = le32_to_cpu(d->data_address); |
| 2788 | dma_sync_single_range_for_cpu(context->ohci->card.device, |
| 2789 | buffer_dma & PAGE_MASK, |
| 2790 | buffer_dma & ~PAGE_MASK, |
| 2791 | le16_to_cpu(d->req_count), |
| 2792 | DMA_FROM_DEVICE); |
| 2793 | } |
| 2794 | |
Clemens Ladisch | 910e76c | 2012-03-18 19:04:43 +0100 | [diff] [blame] | 2795 | copy_iso_headers(ctx, (u32 *) (last + 1)); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2796 | |
Clemens Ladisch | 910e76c | 2012-03-18 19:04:43 +0100 | [diff] [blame] | 2797 | if (last->control & cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS)) |
| 2798 | flush_iso_completions(ctx); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2799 | |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 2800 | return 1; |
| 2801 | } |
| 2802 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2803 | /* d == last because each descriptor block is only a single descriptor. */ |
| 2804 | static int handle_ir_buffer_fill(struct context *context, |
| 2805 | struct descriptor *d, |
| 2806 | struct descriptor *last) |
| 2807 | { |
| 2808 | struct iso_context *ctx = |
| 2809 | container_of(context, struct iso_context, context); |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 2810 | unsigned int req_count, res_count, completed; |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2811 | u32 buffer_dma; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2812 | |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 2813 | req_count = le16_to_cpu(last->req_count); |
| 2814 | res_count = le16_to_cpu(ACCESS_ONCE(last->res_count)); |
| 2815 | completed = req_count - res_count; |
| 2816 | buffer_dma = le32_to_cpu(last->data_address); |
| 2817 | |
| 2818 | if (completed > 0) { |
| 2819 | ctx->mc_buffer_bus = buffer_dma; |
| 2820 | ctx->mc_completed = completed; |
| 2821 | } |
| 2822 | |
| 2823 | if (res_count != 0) |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2824 | /* Descriptor(s) not done yet, stop iteration */ |
| 2825 | return 0; |
| 2826 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2827 | dma_sync_single_range_for_cpu(context->ohci->card.device, |
| 2828 | buffer_dma & PAGE_MASK, |
| 2829 | buffer_dma & ~PAGE_MASK, |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 2830 | completed, DMA_FROM_DEVICE); |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2831 | |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 2832 | if (last->control & cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS)) { |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2833 | ctx->base.callback.mc(&ctx->base, |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 2834 | buffer_dma + completed, |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2835 | ctx->base.callback_data); |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 2836 | ctx->mc_completed = 0; |
| 2837 | } |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2838 | |
| 2839 | return 1; |
| 2840 | } |
| 2841 | |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 2842 | static void flush_ir_buffer_fill(struct iso_context *ctx) |
| 2843 | { |
| 2844 | dma_sync_single_range_for_cpu(ctx->context.ohci->card.device, |
| 2845 | ctx->mc_buffer_bus & PAGE_MASK, |
| 2846 | ctx->mc_buffer_bus & ~PAGE_MASK, |
| 2847 | ctx->mc_completed, DMA_FROM_DEVICE); |
| 2848 | |
| 2849 | ctx->base.callback.mc(&ctx->base, |
| 2850 | ctx->mc_buffer_bus + ctx->mc_completed, |
| 2851 | ctx->base.callback_data); |
| 2852 | ctx->mc_completed = 0; |
| 2853 | } |
| 2854 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2855 | static inline void sync_it_packet_for_cpu(struct context *context, |
| 2856 | struct descriptor *pd) |
| 2857 | { |
| 2858 | __le16 control; |
| 2859 | u32 buffer_dma; |
| 2860 | |
| 2861 | /* only packets beginning with OUTPUT_MORE* have data buffers */ |
| 2862 | if (pd->control & cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS)) |
| 2863 | return; |
| 2864 | |
| 2865 | /* skip over the OUTPUT_MORE_IMMEDIATE descriptor */ |
| 2866 | pd += 2; |
| 2867 | |
| 2868 | /* |
| 2869 | * If the packet has a header, the first OUTPUT_MORE/LAST descriptor's |
| 2870 | * data buffer is in the context program's coherent page and must not |
| 2871 | * be synced. |
| 2872 | */ |
| 2873 | if ((le32_to_cpu(pd->data_address) & PAGE_MASK) == |
| 2874 | (context->current_bus & PAGE_MASK)) { |
| 2875 | if (pd->control & cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS)) |
| 2876 | return; |
| 2877 | pd++; |
| 2878 | } |
| 2879 | |
| 2880 | do { |
| 2881 | buffer_dma = le32_to_cpu(pd->data_address); |
| 2882 | dma_sync_single_range_for_cpu(context->ohci->card.device, |
| 2883 | buffer_dma & PAGE_MASK, |
| 2884 | buffer_dma & ~PAGE_MASK, |
| 2885 | le16_to_cpu(pd->req_count), |
| 2886 | DMA_TO_DEVICE); |
| 2887 | control = pd->control; |
| 2888 | pd++; |
| 2889 | } while (!(control & cpu_to_le16(DESCRIPTOR_BRANCH_ALWAYS))); |
| 2890 | } |
| 2891 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2892 | static int handle_it_packet(struct context *context, |
| 2893 | struct descriptor *d, |
| 2894 | struct descriptor *last) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2895 | { |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2896 | struct iso_context *ctx = |
| 2897 | container_of(context, struct iso_context, context); |
Jay Fenlason | 31769ce | 2009-11-21 00:05:56 +0100 | [diff] [blame] | 2898 | struct descriptor *pd; |
Clemens Ladisch | 7386401 | 2012-03-18 19:04:05 +0100 | [diff] [blame] | 2899 | __be32 *ctx_hdr; |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 2900 | |
Jay Fenlason | 31769ce | 2009-11-21 00:05:56 +0100 | [diff] [blame] | 2901 | for (pd = d; pd <= last; pd++) |
| 2902 | if (pd->transfer_status) |
| 2903 | break; |
| 2904 | if (pd > last) |
| 2905 | /* Descriptor(s) not done yet, stop iteration */ |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2906 | return 0; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2907 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 2908 | sync_it_packet_for_cpu(context, d); |
| 2909 | |
Clemens Ladisch | 0699a73 | 2013-07-22 21:32:09 +0200 | [diff] [blame] | 2910 | if (ctx->header_length + 4 > PAGE_SIZE) { |
| 2911 | if (ctx->base.drop_overflow_headers) |
| 2912 | return 1; |
Clemens Ladisch | 18d6271 | 2012-03-18 19:05:29 +0100 | [diff] [blame] | 2913 | flush_iso_completions(ctx); |
Clemens Ladisch | 0699a73 | 2013-07-22 21:32:09 +0200 | [diff] [blame] | 2914 | } |
Clemens Ladisch | 910e76c | 2012-03-18 19:04:43 +0100 | [diff] [blame] | 2915 | |
Clemens Ladisch | 18d6271 | 2012-03-18 19:05:29 +0100 | [diff] [blame] | 2916 | ctx_hdr = ctx->header + ctx->header_length; |
Clemens Ladisch | 910e76c | 2012-03-18 19:04:43 +0100 | [diff] [blame] | 2917 | ctx->last_timestamp = le16_to_cpu(last->res_count); |
Clemens Ladisch | 18d6271 | 2012-03-18 19:05:29 +0100 | [diff] [blame] | 2918 | /* Present this value as big-endian to match the receive code */ |
| 2919 | *ctx_hdr = cpu_to_be32((le16_to_cpu(pd->transfer_status) << 16) | |
| 2920 | le16_to_cpu(pd->res_count)); |
| 2921 | ctx->header_length += 4; |
| 2922 | |
Clemens Ladisch | 910e76c | 2012-03-18 19:04:43 +0100 | [diff] [blame] | 2923 | if (last->control & cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS)) |
| 2924 | flush_iso_completions(ctx); |
| 2925 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 2926 | return 1; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2927 | } |
| 2928 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2929 | static void set_multichannel_mask(struct fw_ohci *ohci, u64 channels) |
| 2930 | { |
| 2931 | u32 hi = channels >> 32, lo = channels; |
| 2932 | |
| 2933 | reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); |
| 2934 | reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); |
| 2935 | reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); |
| 2936 | reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); |
| 2937 | mmiowb(); |
| 2938 | ohci->mc_channels = channels; |
| 2939 | } |
| 2940 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 2941 | static struct fw_iso_context *ohci_allocate_iso_context(struct fw_card *card, |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 2942 | int type, int channel, size_t header_size) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2943 | { |
| 2944 | struct fw_ohci *ohci = fw_ohci(card); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2945 | struct iso_context *uninitialized_var(ctx); |
| 2946 | descriptor_callback_t uninitialized_var(callback); |
| 2947 | u64 *uninitialized_var(channels); |
| 2948 | u32 *uninitialized_var(mask), uninitialized_var(regs); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2949 | int index, ret = -EBUSY; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2950 | |
Stefan Richter | 8a8c473 | 2012-04-09 21:40:33 +0200 | [diff] [blame] | 2951 | spin_lock_irq(&ohci->lock); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2952 | |
| 2953 | switch (type) { |
| 2954 | case FW_ISO_CONTEXT_TRANSMIT: |
| 2955 | mask = &ohci->it_context_mask; |
| 2956 | callback = handle_it_packet; |
| 2957 | index = ffs(*mask) - 1; |
| 2958 | if (index >= 0) { |
| 2959 | *mask &= ~(1 << index); |
| 2960 | regs = OHCI1394_IsoXmitContextBase(index); |
| 2961 | ctx = &ohci->it_context_list[index]; |
| 2962 | } |
| 2963 | break; |
| 2964 | |
| 2965 | case FW_ISO_CONTEXT_RECEIVE: |
| 2966 | channels = &ohci->ir_context_channels; |
| 2967 | mask = &ohci->ir_context_mask; |
| 2968 | callback = handle_ir_packet_per_buffer; |
| 2969 | index = *channels & 1ULL << channel ? ffs(*mask) - 1 : -1; |
| 2970 | if (index >= 0) { |
| 2971 | *channels &= ~(1ULL << channel); |
| 2972 | *mask &= ~(1 << index); |
| 2973 | regs = OHCI1394_IsoRcvContextBase(index); |
| 2974 | ctx = &ohci->ir_context_list[index]; |
| 2975 | } |
| 2976 | break; |
| 2977 | |
| 2978 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 2979 | mask = &ohci->ir_context_mask; |
| 2980 | callback = handle_ir_buffer_fill; |
| 2981 | index = !ohci->mc_allocated ? ffs(*mask) - 1 : -1; |
| 2982 | if (index >= 0) { |
| 2983 | ohci->mc_allocated = true; |
| 2984 | *mask &= ~(1 << index); |
| 2985 | regs = OHCI1394_IsoRcvContextBase(index); |
| 2986 | ctx = &ohci->ir_context_list[index]; |
| 2987 | } |
| 2988 | break; |
| 2989 | |
| 2990 | default: |
| 2991 | index = -1; |
| 2992 | ret = -ENOSYS; |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 2993 | } |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2994 | |
Stefan Richter | 8a8c473 | 2012-04-09 21:40:33 +0200 | [diff] [blame] | 2995 | spin_unlock_irq(&ohci->lock); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2996 | |
| 2997 | if (index < 0) |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 2998 | return ERR_PTR(ret); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 2999 | |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 3000 | memset(ctx, 0, sizeof(*ctx)); |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 3001 | ctx->header_length = 0; |
| 3002 | ctx->header = (void *) __get_free_page(GFP_KERNEL); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3003 | if (ctx->header == NULL) { |
| 3004 | ret = -ENOMEM; |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 3005 | goto out; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3006 | } |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 3007 | ret = context_init(&ctx->context, ohci, regs, callback); |
| 3008 | if (ret < 0) |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 3009 | goto out_with_header; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3010 | |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 3011 | if (type == FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL) { |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3012 | set_multichannel_mask(ohci, 0); |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 3013 | ctx->mc_completed = 0; |
| 3014 | } |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3015 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3016 | return &ctx->base; |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 3017 | |
| 3018 | out_with_header: |
| 3019 | free_page((unsigned long)ctx->header); |
| 3020 | out: |
Stefan Richter | 8a8c473 | 2012-04-09 21:40:33 +0200 | [diff] [blame] | 3021 | spin_lock_irq(&ohci->lock); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3022 | |
| 3023 | switch (type) { |
| 3024 | case FW_ISO_CONTEXT_RECEIVE: |
| 3025 | *channels |= 1ULL << channel; |
| 3026 | break; |
| 3027 | |
| 3028 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 3029 | ohci->mc_allocated = false; |
| 3030 | break; |
| 3031 | } |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 3032 | *mask |= 1 << index; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3033 | |
Stefan Richter | 8a8c473 | 2012-04-09 21:40:33 +0200 | [diff] [blame] | 3034 | spin_unlock_irq(&ohci->lock); |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 3035 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 3036 | return ERR_PTR(ret); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3037 | } |
| 3038 | |
Kristian Høgsberg | eb0306e | 2007-03-14 17:34:54 -0400 | [diff] [blame] | 3039 | static int ohci_start_iso(struct fw_iso_context *base, |
| 3040 | s32 cycle, u32 sync, u32 tags) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3041 | { |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 3042 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3043 | struct fw_ohci *ohci = ctx->context.ohci; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3044 | u32 control = IR_CONTEXT_ISOCH_HEADER, match; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3045 | int index; |
| 3046 | |
Clemens Ladisch | 44b74d9 | 2011-02-23 09:27:40 +0100 | [diff] [blame] | 3047 | /* the controller cannot start without any queued packets */ |
| 3048 | if (ctx->context.last->branch_address == 0) |
| 3049 | return -ENODATA; |
| 3050 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3051 | switch (ctx->base.type) { |
| 3052 | case FW_ISO_CONTEXT_TRANSMIT: |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 3053 | index = ctx - ohci->it_context_list; |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 3054 | match = 0; |
| 3055 | if (cycle >= 0) |
| 3056 | match = IT_CONTEXT_CYCLE_MATCH_ENABLE | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 3057 | (cycle & 0x7fff) << 16; |
Kristian Høgsberg | 21efb3c | 2007-02-16 17:34:50 -0500 | [diff] [blame] | 3058 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 3059 | reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); |
| 3060 | reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 3061 | context_run(&ctx->context, match); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3062 | break; |
| 3063 | |
| 3064 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 3065 | control |= IR_CONTEXT_BUFFER_FILL|IR_CONTEXT_MULTI_CHANNEL_MODE; |
| 3066 | /* fall through */ |
| 3067 | case FW_ISO_CONTEXT_RECEIVE: |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 3068 | index = ctx - ohci->ir_context_list; |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 3069 | match = (tags << 28) | (sync << 8) | ctx->base.channel; |
| 3070 | if (cycle >= 0) { |
| 3071 | match |= (cycle & 0x07fff) << 12; |
| 3072 | control |= IR_CONTEXT_CYCLE_MATCH_ENABLE; |
| 3073 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3074 | |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 3075 | reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); |
| 3076 | reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3077 | reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); |
Kristian Høgsberg | 8a2f7d9 | 2007-03-28 14:26:10 -0400 | [diff] [blame] | 3078 | context_run(&ctx->context, control); |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3079 | |
| 3080 | ctx->sync = sync; |
| 3081 | ctx->tags = tags; |
| 3082 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3083 | break; |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 3084 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3085 | |
| 3086 | return 0; |
| 3087 | } |
| 3088 | |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3089 | static int ohci_stop_iso(struct fw_iso_context *base) |
| 3090 | { |
| 3091 | struct fw_ohci *ohci = fw_ohci(base->card); |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 3092 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3093 | int index; |
| 3094 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3095 | switch (ctx->base.type) { |
| 3096 | case FW_ISO_CONTEXT_TRANSMIT: |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3097 | index = ctx - ohci->it_context_list; |
| 3098 | reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3099 | break; |
| 3100 | |
| 3101 | case FW_ISO_CONTEXT_RECEIVE: |
| 3102 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3103 | index = ctx - ohci->ir_context_list; |
| 3104 | reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3105 | break; |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3106 | } |
| 3107 | flush_writes(ohci); |
| 3108 | context_stop(&ctx->context); |
Clemens Ladisch | e81cbeb | 2011-02-16 10:32:11 +0100 | [diff] [blame] | 3109 | tasklet_kill(&ctx->context.tasklet); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3110 | |
| 3111 | return 0; |
| 3112 | } |
| 3113 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3114 | static void ohci_free_iso_context(struct fw_iso_context *base) |
| 3115 | { |
| 3116 | struct fw_ohci *ohci = fw_ohci(base->card); |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 3117 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3118 | unsigned long flags; |
| 3119 | int index; |
| 3120 | |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3121 | ohci_stop_iso(base); |
| 3122 | context_release(&ctx->context); |
Kristian Høgsberg | 9b32d5f | 2007-02-16 17:34:44 -0500 | [diff] [blame] | 3123 | free_page((unsigned long)ctx->header); |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3124 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3125 | spin_lock_irqsave(&ohci->lock, flags); |
| 3126 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3127 | switch (base->type) { |
| 3128 | case FW_ISO_CONTEXT_TRANSMIT: |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3129 | index = ctx - ohci->it_context_list; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3130 | ohci->it_context_mask |= 1 << index; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3131 | break; |
| 3132 | |
| 3133 | case FW_ISO_CONTEXT_RECEIVE: |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3134 | index = ctx - ohci->ir_context_list; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3135 | ohci->ir_context_mask |= 1 << index; |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 3136 | ohci->ir_context_channels |= 1ULL << base->channel; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3137 | break; |
| 3138 | |
| 3139 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 3140 | index = ctx - ohci->ir_context_list; |
| 3141 | ohci->ir_context_mask |= 1 << index; |
| 3142 | ohci->ir_context_channels |= ohci->mc_channels; |
| 3143 | ohci->mc_channels = 0; |
| 3144 | ohci->mc_allocated = false; |
| 3145 | break; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3146 | } |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3147 | |
| 3148 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 3149 | } |
| 3150 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3151 | static int ohci_set_iso_channels(struct fw_iso_context *base, u64 *channels) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3152 | { |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3153 | struct fw_ohci *ohci = fw_ohci(base->card); |
| 3154 | unsigned long flags; |
| 3155 | int ret; |
| 3156 | |
| 3157 | switch (base->type) { |
| 3158 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 3159 | |
| 3160 | spin_lock_irqsave(&ohci->lock, flags); |
| 3161 | |
| 3162 | /* Don't allow multichannel to grab other contexts' channels. */ |
| 3163 | if (~ohci->ir_context_channels & ~ohci->mc_channels & *channels) { |
| 3164 | *channels = ohci->ir_context_channels; |
| 3165 | ret = -EBUSY; |
| 3166 | } else { |
| 3167 | set_multichannel_mask(ohci, *channels); |
| 3168 | ret = 0; |
| 3169 | } |
| 3170 | |
| 3171 | spin_unlock_irqrestore(&ohci->lock, flags); |
| 3172 | |
| 3173 | break; |
| 3174 | default: |
| 3175 | ret = -EINVAL; |
| 3176 | } |
| 3177 | |
| 3178 | return ret; |
| 3179 | } |
| 3180 | |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3181 | #ifdef CONFIG_PM |
| 3182 | static void ohci_resume_iso_dma(struct fw_ohci *ohci) |
| 3183 | { |
| 3184 | int i; |
| 3185 | struct iso_context *ctx; |
| 3186 | |
| 3187 | for (i = 0 ; i < ohci->n_ir ; i++) { |
| 3188 | ctx = &ohci->ir_context_list[i]; |
Stefan Richter | 693a50b | 2011-01-01 15:17:05 +0100 | [diff] [blame] | 3189 | if (ctx->context.running) |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3190 | ohci_start_iso(&ctx->base, 0, ctx->sync, ctx->tags); |
| 3191 | } |
| 3192 | |
| 3193 | for (i = 0 ; i < ohci->n_it ; i++) { |
| 3194 | ctx = &ohci->it_context_list[i]; |
Stefan Richter | 693a50b | 2011-01-01 15:17:05 +0100 | [diff] [blame] | 3195 | if (ctx->context.running) |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3196 | ohci_start_iso(&ctx->base, 0, ctx->sync, ctx->tags); |
| 3197 | } |
| 3198 | } |
| 3199 | #endif |
| 3200 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3201 | static int queue_iso_transmit(struct iso_context *ctx, |
| 3202 | struct fw_iso_packet *packet, |
| 3203 | struct fw_iso_buffer *buffer, |
| 3204 | unsigned long payload) |
| 3205 | { |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3206 | struct descriptor *d, *last, *pd; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3207 | struct fw_iso_packet *p; |
| 3208 | __le32 *header; |
Kristian Høgsberg | 9aad812 | 2007-02-16 17:34:38 -0500 | [diff] [blame] | 3209 | dma_addr_t d_bus, page_bus; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3210 | u32 z, header_z, payload_z, irq; |
| 3211 | u32 payload_index, payload_end_index, next_page_index; |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3212 | int page, end_page, i, length, offset; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3213 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3214 | p = packet; |
Kristian Høgsberg | 9aad812 | 2007-02-16 17:34:38 -0500 | [diff] [blame] | 3215 | payload_index = payload; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3216 | |
| 3217 | if (p->skip) |
| 3218 | z = 1; |
| 3219 | else |
| 3220 | z = 2; |
| 3221 | if (p->header_length > 0) |
| 3222 | z++; |
| 3223 | |
| 3224 | /* Determine the first page the payload isn't contained in. */ |
| 3225 | end_page = PAGE_ALIGN(payload_index + p->payload_length) >> PAGE_SHIFT; |
| 3226 | if (p->payload_length > 0) |
| 3227 | payload_z = end_page - (payload_index >> PAGE_SHIFT); |
| 3228 | else |
| 3229 | payload_z = 0; |
| 3230 | |
| 3231 | z += payload_z; |
| 3232 | |
| 3233 | /* Get header size in number of descriptors. */ |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 3234 | header_z = DIV_ROUND_UP(p->header_length, sizeof(*d)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3235 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3236 | d = context_get_descriptors(&ctx->context, z + header_z, &d_bus); |
| 3237 | if (d == NULL) |
| 3238 | return -ENOMEM; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3239 | |
| 3240 | if (!p->skip) { |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3241 | d[0].control = cpu_to_le16(DESCRIPTOR_KEY_IMMEDIATE); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3242 | d[0].req_count = cpu_to_le16(8); |
Clemens Ladisch | 7f51a10 | 2010-02-08 08:30:03 +0100 | [diff] [blame] | 3243 | /* |
| 3244 | * Link the skip address to this descriptor itself. This causes |
| 3245 | * a context to skip a cycle whenever lost cycles or FIFO |
| 3246 | * overruns occur, without dropping the data. The application |
| 3247 | * should then decide whether this is an error condition or not. |
| 3248 | * FIXME: Make the context's cycle-lost behaviour configurable? |
| 3249 | */ |
| 3250 | d[0].branch_address = cpu_to_le32(d_bus | z); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3251 | |
| 3252 | header = (__le32 *) &d[1]; |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3253 | header[0] = cpu_to_le32(IT_HEADER_SY(p->sy) | |
| 3254 | IT_HEADER_TAG(p->tag) | |
| 3255 | IT_HEADER_TCODE(TCODE_STREAM_DATA) | |
| 3256 | IT_HEADER_CHANNEL(ctx->base.channel) | |
| 3257 | IT_HEADER_SPEED(ctx->base.speed)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3258 | header[1] = |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3259 | cpu_to_le32(IT_HEADER_DATA_LENGTH(p->header_length + |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3260 | p->payload_length)); |
| 3261 | } |
| 3262 | |
| 3263 | if (p->header_length > 0) { |
| 3264 | d[2].req_count = cpu_to_le16(p->header_length); |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 3265 | d[2].data_address = cpu_to_le32(d_bus + z * sizeof(*d)); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3266 | memcpy(&d[z], p->header, p->header_length); |
| 3267 | } |
| 3268 | |
| 3269 | pd = d + z - payload_z; |
| 3270 | payload_end_index = payload_index + p->payload_length; |
| 3271 | for (i = 0; i < payload_z; i++) { |
| 3272 | page = payload_index >> PAGE_SHIFT; |
| 3273 | offset = payload_index & ~PAGE_MASK; |
| 3274 | next_page_index = (page + 1) << PAGE_SHIFT; |
| 3275 | length = |
| 3276 | min(next_page_index, payload_end_index) - payload_index; |
| 3277 | pd[i].req_count = cpu_to_le16(length); |
Kristian Høgsberg | 9aad812 | 2007-02-16 17:34:38 -0500 | [diff] [blame] | 3278 | |
| 3279 | page_bus = page_private(buffer->pages[page]); |
| 3280 | pd[i].data_address = cpu_to_le32(page_bus + offset); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3281 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 3282 | dma_sync_single_range_for_device(ctx->context.ohci->card.device, |
| 3283 | page_bus, offset, length, |
| 3284 | DMA_TO_DEVICE); |
| 3285 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3286 | payload_index += length; |
| 3287 | } |
| 3288 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3289 | if (p->interrupt) |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3290 | irq = DESCRIPTOR_IRQ_ALWAYS; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3291 | else |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3292 | irq = DESCRIPTOR_NO_IRQ; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3293 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3294 | last = z == 2 ? d : d + z - 1; |
Kristian Høgsberg | a77754a | 2007-05-07 20:33:35 -0400 | [diff] [blame] | 3295 | last->control |= cpu_to_le16(DESCRIPTOR_OUTPUT_LAST | |
| 3296 | DESCRIPTOR_STATUS | |
| 3297 | DESCRIPTOR_BRANCH_ALWAYS | |
Kristian Høgsberg | cbb59da | 2007-02-16 17:34:35 -0500 | [diff] [blame] | 3298 | irq); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3299 | |
Kristian Høgsberg | 3020073 | 2007-02-16 17:34:39 -0500 | [diff] [blame] | 3300 | context_append(&ctx->context, d, z, header_z); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3301 | |
| 3302 | return 0; |
| 3303 | } |
Stefan Richter | 373b2ed | 2007-03-04 14:45:18 +0100 | [diff] [blame] | 3304 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3305 | static int queue_iso_packet_per_buffer(struct iso_context *ctx, |
| 3306 | struct fw_iso_packet *packet, |
| 3307 | struct fw_iso_buffer *buffer, |
| 3308 | unsigned long payload) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3309 | { |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 3310 | struct device *device = ctx->context.ohci->card.device; |
Jay Fenlason | 8c0c0cc | 2009-12-11 14:23:58 -0500 | [diff] [blame] | 3311 | struct descriptor *d, *pd; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3312 | dma_addr_t d_bus, page_bus; |
| 3313 | u32 z, header_z, rest; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3314 | int i, j, length; |
| 3315 | int page, offset, packet_count, header_size, payload_per_buffer; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3316 | |
| 3317 | /* |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 3318 | * The OHCI controller puts the isochronous header and trailer in the |
| 3319 | * buffer, so we need at least 8 bytes. |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3320 | */ |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3321 | packet_count = packet->header_length / ctx->base.header_size; |
David Moore | 1aa292b | 2008-07-22 23:23:40 -0700 | [diff] [blame] | 3322 | header_size = max(ctx->base.header_size, (size_t)8); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3323 | |
| 3324 | /* Get header size in number of descriptors. */ |
| 3325 | header_z = DIV_ROUND_UP(header_size, sizeof(*d)); |
| 3326 | page = payload >> PAGE_SHIFT; |
| 3327 | offset = payload & ~PAGE_MASK; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3328 | payload_per_buffer = packet->payload_length / packet_count; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3329 | |
| 3330 | for (i = 0; i < packet_count; i++) { |
| 3331 | /* d points to the header descriptor */ |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3332 | z = DIV_ROUND_UP(payload_per_buffer + offset, PAGE_SIZE) + 1; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3333 | d = context_get_descriptors(&ctx->context, |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3334 | z + header_z, &d_bus); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3335 | if (d == NULL) |
| 3336 | return -ENOMEM; |
| 3337 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3338 | d->control = cpu_to_le16(DESCRIPTOR_STATUS | |
| 3339 | DESCRIPTOR_INPUT_MORE); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3340 | if (packet->skip && i == 0) |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3341 | d->control |= cpu_to_le16(DESCRIPTOR_WAIT); |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3342 | d->req_count = cpu_to_le16(header_size); |
| 3343 | d->res_count = d->req_count; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3344 | d->transfer_status = 0; |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3345 | d->data_address = cpu_to_le32(d_bus + (z * sizeof(*d))); |
| 3346 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3347 | rest = payload_per_buffer; |
Jay Fenlason | 8c0c0cc | 2009-12-11 14:23:58 -0500 | [diff] [blame] | 3348 | pd = d; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3349 | for (j = 1; j < z; j++) { |
Jay Fenlason | 8c0c0cc | 2009-12-11 14:23:58 -0500 | [diff] [blame] | 3350 | pd++; |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3351 | pd->control = cpu_to_le16(DESCRIPTOR_STATUS | |
| 3352 | DESCRIPTOR_INPUT_MORE); |
| 3353 | |
| 3354 | if (offset + rest < PAGE_SIZE) |
| 3355 | length = rest; |
| 3356 | else |
| 3357 | length = PAGE_SIZE - offset; |
| 3358 | pd->req_count = cpu_to_le16(length); |
| 3359 | pd->res_count = pd->req_count; |
| 3360 | pd->transfer_status = 0; |
| 3361 | |
| 3362 | page_bus = page_private(buffer->pages[page]); |
| 3363 | pd->data_address = cpu_to_le32(page_bus + offset); |
| 3364 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 3365 | dma_sync_single_range_for_device(device, page_bus, |
| 3366 | offset, length, |
| 3367 | DMA_FROM_DEVICE); |
| 3368 | |
David Moore | bcee893 | 2007-12-19 15:26:38 -0500 | [diff] [blame] | 3369 | offset = (offset + length) & ~PAGE_MASK; |
| 3370 | rest -= length; |
| 3371 | if (offset == 0) |
| 3372 | page++; |
| 3373 | } |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3374 | pd->control = cpu_to_le16(DESCRIPTOR_STATUS | |
| 3375 | DESCRIPTOR_INPUT_LAST | |
| 3376 | DESCRIPTOR_BRANCH_ALWAYS); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3377 | if (packet->interrupt && i == packet_count - 1) |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3378 | pd->control |= cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS); |
| 3379 | |
Jarod Wilson | a186b4a | 2007-12-03 13:43:12 -0500 | [diff] [blame] | 3380 | context_append(&ctx->context, d, z, header_z); |
| 3381 | } |
| 3382 | |
| 3383 | return 0; |
| 3384 | } |
| 3385 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3386 | static int queue_iso_buffer_fill(struct iso_context *ctx, |
| 3387 | struct fw_iso_packet *packet, |
| 3388 | struct fw_iso_buffer *buffer, |
| 3389 | unsigned long payload) |
| 3390 | { |
| 3391 | struct descriptor *d; |
| 3392 | dma_addr_t d_bus, page_bus; |
| 3393 | int page, offset, rest, z, i, length; |
| 3394 | |
| 3395 | page = payload >> PAGE_SHIFT; |
| 3396 | offset = payload & ~PAGE_MASK; |
| 3397 | rest = packet->payload_length; |
| 3398 | |
| 3399 | /* We need one descriptor for each page in the buffer. */ |
| 3400 | z = DIV_ROUND_UP(offset + rest, PAGE_SIZE); |
| 3401 | |
| 3402 | if (WARN_ON(offset & 3 || rest & 3 || page + z > buffer->page_count)) |
| 3403 | return -EFAULT; |
| 3404 | |
| 3405 | for (i = 0; i < z; i++) { |
| 3406 | d = context_get_descriptors(&ctx->context, 1, &d_bus); |
| 3407 | if (d == NULL) |
| 3408 | return -ENOMEM; |
| 3409 | |
| 3410 | d->control = cpu_to_le16(DESCRIPTOR_INPUT_MORE | |
| 3411 | DESCRIPTOR_BRANCH_ALWAYS); |
| 3412 | if (packet->skip && i == 0) |
| 3413 | d->control |= cpu_to_le16(DESCRIPTOR_WAIT); |
| 3414 | if (packet->interrupt && i == z - 1) |
| 3415 | d->control |= cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS); |
| 3416 | |
| 3417 | if (offset + rest < PAGE_SIZE) |
| 3418 | length = rest; |
| 3419 | else |
| 3420 | length = PAGE_SIZE - offset; |
| 3421 | d->req_count = cpu_to_le16(length); |
| 3422 | d->res_count = d->req_count; |
| 3423 | d->transfer_status = 0; |
| 3424 | |
| 3425 | page_bus = page_private(buffer->pages[page]); |
| 3426 | d->data_address = cpu_to_le32(page_bus + offset); |
| 3427 | |
Clemens Ladisch | a572e68 | 2011-10-15 23:12:23 +0200 | [diff] [blame] | 3428 | dma_sync_single_range_for_device(ctx->context.ohci->card.device, |
| 3429 | page_bus, offset, length, |
| 3430 | DMA_FROM_DEVICE); |
| 3431 | |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3432 | rest -= length; |
| 3433 | offset = 0; |
| 3434 | page++; |
| 3435 | |
| 3436 | context_append(&ctx->context, d, 1, 0); |
| 3437 | } |
| 3438 | |
| 3439 | return 0; |
| 3440 | } |
| 3441 | |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 3442 | static int ohci_queue_iso(struct fw_iso_context *base, |
| 3443 | struct fw_iso_packet *packet, |
| 3444 | struct fw_iso_buffer *buffer, |
| 3445 | unsigned long payload) |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 3446 | { |
Kristian Høgsberg | e364cf4 | 2007-02-16 17:34:49 -0500 | [diff] [blame] | 3447 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 3448 | unsigned long flags; |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3449 | int ret = -ENOSYS; |
Kristian Høgsberg | e364cf4 | 2007-02-16 17:34:49 -0500 | [diff] [blame] | 3450 | |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 3451 | spin_lock_irqsave(&ctx->context.ohci->lock, flags); |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3452 | switch (base->type) { |
| 3453 | case FW_ISO_CONTEXT_TRANSMIT: |
| 3454 | ret = queue_iso_transmit(ctx, packet, buffer, payload); |
| 3455 | break; |
| 3456 | case FW_ISO_CONTEXT_RECEIVE: |
| 3457 | ret = queue_iso_packet_per_buffer(ctx, packet, buffer, payload); |
| 3458 | break; |
| 3459 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 3460 | ret = queue_iso_buffer_fill(ctx, packet, buffer, payload); |
| 3461 | break; |
| 3462 | } |
David Moore | fe5ca63 | 2008-01-06 17:21:41 -0500 | [diff] [blame] | 3463 | spin_unlock_irqrestore(&ctx->context.ohci->lock, flags); |
| 3464 | |
Stefan Richter | 2dbd7d7 | 2008-12-14 21:45:45 +0100 | [diff] [blame] | 3465 | return ret; |
Kristian Høgsberg | 295e3fe | 2007-02-16 17:34:40 -0500 | [diff] [blame] | 3466 | } |
| 3467 | |
Clemens Ladisch | 13882a8 | 2011-05-02 09:33:56 +0200 | [diff] [blame] | 3468 | static void ohci_flush_queue_iso(struct fw_iso_context *base) |
| 3469 | { |
| 3470 | struct context *ctx = |
| 3471 | &container_of(base, struct iso_context, base)->context; |
| 3472 | |
| 3473 | reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); |
Clemens Ladisch | 13882a8 | 2011-05-02 09:33:56 +0200 | [diff] [blame] | 3474 | } |
| 3475 | |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 3476 | static int ohci_flush_iso_completions(struct fw_iso_context *base) |
| 3477 | { |
| 3478 | struct iso_context *ctx = container_of(base, struct iso_context, base); |
| 3479 | int ret = 0; |
| 3480 | |
| 3481 | tasklet_disable(&ctx->context.tasklet); |
| 3482 | |
| 3483 | if (!test_and_set_bit_lock(0, &ctx->flushing_completions)) { |
| 3484 | context_tasklet((unsigned long)&ctx->context); |
| 3485 | |
| 3486 | switch (base->type) { |
| 3487 | case FW_ISO_CONTEXT_TRANSMIT: |
| 3488 | case FW_ISO_CONTEXT_RECEIVE: |
| 3489 | if (ctx->header_length != 0) |
| 3490 | flush_iso_completions(ctx); |
| 3491 | break; |
| 3492 | case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL: |
| 3493 | if (ctx->mc_completed != 0) |
| 3494 | flush_ir_buffer_fill(ctx); |
| 3495 | break; |
| 3496 | default: |
| 3497 | ret = -ENOSYS; |
| 3498 | } |
| 3499 | |
| 3500 | clear_bit_unlock(0, &ctx->flushing_completions); |
| 3501 | smp_mb__after_clear_bit(); |
| 3502 | } |
| 3503 | |
| 3504 | tasklet_enable(&ctx->context.tasklet); |
| 3505 | |
| 3506 | return ret; |
| 3507 | } |
| 3508 | |
Stefan Richter | 21ebcd1 | 2007-01-14 15:29:07 +0100 | [diff] [blame] | 3509 | static const struct fw_card_driver ohci_driver = { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3510 | .enable = ohci_enable, |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 3511 | .read_phy_reg = ohci_read_phy_reg, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3512 | .update_phy_reg = ohci_update_phy_reg, |
| 3513 | .set_config_rom = ohci_set_config_rom, |
| 3514 | .send_request = ohci_send_request, |
| 3515 | .send_response = ohci_send_response, |
Kristian Høgsberg | 730c32f | 2007-02-06 14:49:32 -0500 | [diff] [blame] | 3516 | .cancel_packet = ohci_cancel_packet, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3517 | .enable_phys_dma = ohci_enable_phys_dma, |
Stefan Richter | 0fcff4e | 2010-06-12 20:35:52 +0200 | [diff] [blame] | 3518 | .read_csr = ohci_read_csr, |
| 3519 | .write_csr = ohci_write_csr, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3520 | |
| 3521 | .allocate_iso_context = ohci_allocate_iso_context, |
| 3522 | .free_iso_context = ohci_free_iso_context, |
Stefan Richter | 872e330 | 2010-07-29 18:19:22 +0200 | [diff] [blame] | 3523 | .set_iso_channels = ohci_set_iso_channels, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3524 | .queue_iso = ohci_queue_iso, |
Clemens Ladisch | 13882a8 | 2011-05-02 09:33:56 +0200 | [diff] [blame] | 3525 | .flush_queue_iso = ohci_flush_queue_iso, |
Clemens Ladisch | d1bbd20 | 2012-03-18 19:06:39 +0100 | [diff] [blame] | 3526 | .flush_iso_completions = ohci_flush_iso_completions, |
Kristian Høgsberg | 69cdb72 | 2007-02-16 17:34:41 -0500 | [diff] [blame] | 3527 | .start_iso = ohci_start_iso, |
Kristian Høgsberg | b829566 | 2007-02-16 17:34:42 -0500 | [diff] [blame] | 3528 | .stop_iso = ohci_stop_iso, |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3529 | }; |
| 3530 | |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3531 | #ifdef CONFIG_PPC_PMAC |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3532 | static void pmac_ohci_on(struct pci_dev *dev) |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3533 | { |
| 3534 | if (machine_is(powermac)) { |
| 3535 | struct device_node *ofn = pci_device_to_OF_node(dev); |
| 3536 | |
| 3537 | if (ofn) { |
| 3538 | pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, ofn, 0, 1); |
| 3539 | pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 1); |
| 3540 | } |
| 3541 | } |
| 3542 | } |
| 3543 | |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3544 | static void pmac_ohci_off(struct pci_dev *dev) |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3545 | { |
| 3546 | if (machine_is(powermac)) { |
| 3547 | struct device_node *ofn = pci_device_to_OF_node(dev); |
| 3548 | |
| 3549 | if (ofn) { |
| 3550 | pmac_call_feature(PMAC_FTR_1394_ENABLE, ofn, 0, 0); |
| 3551 | pmac_call_feature(PMAC_FTR_1394_CABLE_POWER, ofn, 0, 0); |
| 3552 | } |
| 3553 | } |
| 3554 | } |
| 3555 | #else |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3556 | static inline void pmac_ohci_on(struct pci_dev *dev) {} |
| 3557 | static inline void pmac_ohci_off(struct pci_dev *dev) {} |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3558 | #endif /* CONFIG_PPC_PMAC */ |
| 3559 | |
Bill Pemberton | 03f94c0 | 2012-11-19 13:22:57 -0500 | [diff] [blame] | 3560 | static int pci_probe(struct pci_dev *dev, |
Stefan Richter | 53dca51 | 2008-12-14 21:47:04 +0100 | [diff] [blame] | 3561 | const struct pci_device_id *ent) |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3562 | { |
| 3563 | struct fw_ohci *ohci; |
Stefan Richter | aa0170f | 2010-10-17 14:09:12 +0200 | [diff] [blame] | 3564 | u32 bus_options, max_receive, link_speed, version; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3565 | u64 guid; |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3566 | int i, err; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3567 | size_t size; |
| 3568 | |
Stefan Richter | 7f7e3711 | 2011-07-10 00:23:03 +0200 | [diff] [blame] | 3569 | if (dev->vendor == PCI_VENDOR_ID_PINNACLE_SYSTEMS) { |
| 3570 | dev_err(&dev->dev, "Pinnacle MovieBoard is not yet supported\n"); |
| 3571 | return -ENOSYS; |
| 3572 | } |
| 3573 | |
Kristian Høgsberg | 2d826cc | 2007-05-09 19:23:14 -0400 | [diff] [blame] | 3574 | ohci = kzalloc(sizeof(*ohci), GFP_KERNEL); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3575 | if (ohci == NULL) { |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3576 | err = -ENOMEM; |
| 3577 | goto fail; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3578 | } |
| 3579 | |
| 3580 | fw_card_initialize(&ohci->card, &ohci_driver, &dev->dev); |
| 3581 | |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3582 | pmac_ohci_on(dev); |
Stefan Richter | 130d549 | 2008-03-24 20:55:28 +0100 | [diff] [blame] | 3583 | |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3584 | err = pci_enable_device(dev); |
| 3585 | if (err) { |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 3586 | dev_err(&dev->dev, "failed to enable OHCI hardware\n"); |
Stefan Richter | bd7dee6 | 2008-02-24 18:59:55 +0100 | [diff] [blame] | 3587 | goto fail_free; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3588 | } |
| 3589 | |
| 3590 | pci_set_master(dev); |
| 3591 | pci_write_config_dword(dev, OHCI1394_PCI_HCI_Control, 0); |
| 3592 | pci_set_drvdata(dev, ohci); |
| 3593 | |
| 3594 | spin_lock_init(&ohci->lock); |
Stefan Richter | 02d37be | 2010-07-08 16:09:06 +0200 | [diff] [blame] | 3595 | mutex_init(&ohci->phy_reg_mutex); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3596 | |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 3597 | INIT_WORK(&ohci->bus_reset_work, bus_reset_work); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3598 | |
Clemens Ladisch | 7baab9a | 2012-06-04 21:28:07 +0200 | [diff] [blame] | 3599 | if (!(pci_resource_flags(dev, 0) & IORESOURCE_MEM) || |
| 3600 | pci_resource_len(dev, 0) < OHCI1394_REGISTER_SIZE) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 3601 | ohci_err(ohci, "invalid MMIO resource\n"); |
Clemens Ladisch | 7baab9a | 2012-06-04 21:28:07 +0200 | [diff] [blame] | 3602 | err = -ENXIO; |
| 3603 | goto fail_disable; |
| 3604 | } |
| 3605 | |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3606 | err = pci_request_region(dev, 0, ohci_driver_name); |
| 3607 | if (err) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 3608 | ohci_err(ohci, "MMIO resource unavailable\n"); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3609 | goto fail_disable; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3610 | } |
| 3611 | |
| 3612 | ohci->registers = pci_iomap(dev, 0, OHCI1394_REGISTER_SIZE); |
| 3613 | if (ohci->registers == NULL) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 3614 | ohci_err(ohci, "failed to remap registers\n"); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3615 | err = -ENXIO; |
| 3616 | goto fail_iomem; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3617 | } |
| 3618 | |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 3619 | for (i = 0; i < ARRAY_SIZE(ohci_quirks); i++) |
Stefan Richter | 9993e0f | 2010-12-07 20:32:40 +0100 | [diff] [blame] | 3620 | if ((ohci_quirks[i].vendor == dev->vendor) && |
| 3621 | (ohci_quirks[i].device == (unsigned short)PCI_ANY_ID || |
| 3622 | ohci_quirks[i].device == dev->device) && |
| 3623 | (ohci_quirks[i].revision == (unsigned short)PCI_ANY_ID || |
| 3624 | ohci_quirks[i].revision >= dev->revision)) { |
Stefan Richter | 4a63559 | 2010-02-21 17:58:01 +0100 | [diff] [blame] | 3625 | ohci->quirks = ohci_quirks[i].flags; |
| 3626 | break; |
| 3627 | } |
Stefan Richter | 3e9cc2f | 2010-02-21 17:58:29 +0100 | [diff] [blame] | 3628 | if (param_quirks) |
| 3629 | ohci->quirks = param_quirks; |
Clemens Ladisch | b677532 | 2010-01-20 09:58:02 +0100 | [diff] [blame] | 3630 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3631 | /* |
| 3632 | * Because dma_alloc_coherent() allocates at least one page, |
| 3633 | * we save space by using a common buffer for the AR request/ |
| 3634 | * response descriptors and the self IDs buffer. |
| 3635 | */ |
| 3636 | BUILD_BUG_ON(AR_BUFFERS * sizeof(struct descriptor) > PAGE_SIZE/4); |
| 3637 | BUILD_BUG_ON(SELF_ID_BUF_SIZE > PAGE_SIZE/2); |
| 3638 | ohci->misc_buffer = dma_alloc_coherent(ohci->card.device, |
| 3639 | PAGE_SIZE, |
| 3640 | &ohci->misc_buffer_bus, |
| 3641 | GFP_KERNEL); |
| 3642 | if (!ohci->misc_buffer) { |
| 3643 | err = -ENOMEM; |
| 3644 | goto fail_iounmap; |
| 3645 | } |
| 3646 | |
| 3647 | err = ar_context_init(&ohci->ar_request_ctx, ohci, 0, |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 3648 | OHCI1394_AsReqRcvContextControlSet); |
| 3649 | if (err < 0) |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3650 | goto fail_misc_buf; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3651 | |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3652 | err = ar_context_init(&ohci->ar_response_ctx, ohci, PAGE_SIZE/4, |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 3653 | OHCI1394_AsRspRcvContextControlSet); |
| 3654 | if (err < 0) |
| 3655 | goto fail_arreq_ctx; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3656 | |
Clemens Ladisch | c088ab30 | 2010-11-30 08:24:01 +0100 | [diff] [blame] | 3657 | err = context_init(&ohci->at_request_ctx, ohci, |
| 3658 | OHCI1394_AsReqTrContextControlSet, handle_at_packet); |
| 3659 | if (err < 0) |
| 3660 | goto fail_arrsp_ctx; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3661 | |
Clemens Ladisch | c088ab30 | 2010-11-30 08:24:01 +0100 | [diff] [blame] | 3662 | err = context_init(&ohci->at_response_ctx, ohci, |
| 3663 | OHCI1394_AsRspTrContextControlSet, handle_at_packet); |
| 3664 | if (err < 0) |
| 3665 | goto fail_atreq_ctx; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3666 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3667 | reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); |
Stefan Richter | 4817ed2 | 2008-12-21 16:39:46 +0100 | [diff] [blame] | 3668 | ohci->ir_context_channels = ~0ULL; |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 3669 | ohci->ir_context_support = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet); |
Stefan Richter | 4802f16 | 2010-02-21 17:58:52 +0100 | [diff] [blame] | 3670 | reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 3671 | ohci->ir_context_mask = ohci->ir_context_support; |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3672 | ohci->n_ir = hweight32(ohci->ir_context_mask); |
| 3673 | size = sizeof(struct iso_context) * ohci->n_ir; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3674 | ohci->ir_context_list = kzalloc(size, GFP_KERNEL); |
| 3675 | |
Stefan Richter | 4802f16 | 2010-02-21 17:58:52 +0100 | [diff] [blame] | 3676 | reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 3677 | ohci->it_context_support = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet); |
Stefan Richter | 4802f16 | 2010-02-21 17:58:52 +0100 | [diff] [blame] | 3678 | reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); |
Clemens Ladisch | f117a3e | 2011-01-10 17:21:35 +0100 | [diff] [blame] | 3679 | ohci->it_context_mask = ohci->it_context_support; |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3680 | ohci->n_it = hweight32(ohci->it_context_mask); |
| 3681 | size = sizeof(struct iso_context) * ohci->n_it; |
Stefan Richter | 4802f16 | 2010-02-21 17:58:52 +0100 | [diff] [blame] | 3682 | ohci->it_context_list = kzalloc(size, GFP_KERNEL); |
| 3683 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3684 | if (ohci->it_context_list == NULL || ohci->ir_context_list == NULL) { |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3685 | err = -ENOMEM; |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3686 | goto fail_contexts; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3687 | } |
| 3688 | |
Stefan Richter | af53122 | 2013-08-05 15:10:38 +0200 | [diff] [blame] | 3689 | ohci->self_id = ohci->misc_buffer + PAGE_SIZE/2; |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3690 | ohci->self_id_bus = ohci->misc_buffer_bus + PAGE_SIZE/2; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3691 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3692 | bus_options = reg_read(ohci, OHCI1394_BusOptions); |
| 3693 | max_receive = (bus_options >> 12) & 0xf; |
| 3694 | link_speed = bus_options & 0x7; |
| 3695 | guid = ((u64) reg_read(ohci, OHCI1394_GUIDHi) << 32) | |
| 3696 | reg_read(ohci, OHCI1394_GUIDLo); |
| 3697 | |
Peter Hurley | 247fd50 | 2013-03-27 06:59:58 -0400 | [diff] [blame] | 3698 | if (!(ohci->quirks & QUIRK_NO_MSI)) |
| 3699 | pci_enable_msi(dev); |
| 3700 | if (request_irq(dev->irq, irq_handler, |
| 3701 | pci_dev_msi_enabled(dev) ? 0 : IRQF_SHARED, |
| 3702 | ohci_driver_name, ohci)) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 3703 | ohci_err(ohci, "failed to allocate interrupt %d\n", dev->irq); |
Peter Hurley | 247fd50 | 2013-03-27 06:59:58 -0400 | [diff] [blame] | 3704 | err = -EIO; |
| 3705 | goto fail_msi; |
| 3706 | } |
| 3707 | |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3708 | err = fw_card_add(&ohci->card, max_receive, link_speed, guid); |
Stefan Richter | e1eff7a | 2009-02-03 17:55:19 +0100 | [diff] [blame] | 3709 | if (err) |
Peter Hurley | 247fd50 | 2013-03-27 06:59:58 -0400 | [diff] [blame] | 3710 | goto fail_irq; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3711 | |
Stefan Richter | 6fdb2ee | 2010-02-21 17:59:14 +0100 | [diff] [blame] | 3712 | version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 3713 | ohci_notice(ohci, |
| 3714 | "added OHCI v%x.%x device as card %d, " |
Stefan Richter | fcd46b3 | 2014-01-18 17:32:20 +0100 | [diff] [blame] | 3715 | "%d IR + %d IT contexts, quirks 0x%x%s\n", |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 3716 | version >> 16, version & 0xff, ohci->card.index, |
Stefan Richter | fcd46b3 | 2014-01-18 17:32:20 +0100 | [diff] [blame] | 3717 | ohci->n_ir, ohci->n_it, ohci->quirks, |
| 3718 | reg_read(ohci, OHCI1394_PhyUpperBound) ? |
| 3719 | ", >4 GB phys DMA" : ""); |
Stefan Richter | e1eff7a | 2009-02-03 17:55:19 +0100 | [diff] [blame] | 3720 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3721 | return 0; |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3722 | |
Peter Hurley | 247fd50 | 2013-03-27 06:59:58 -0400 | [diff] [blame] | 3723 | fail_irq: |
| 3724 | free_irq(dev->irq, ohci); |
| 3725 | fail_msi: |
| 3726 | pci_disable_msi(dev); |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3727 | fail_contexts: |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3728 | kfree(ohci->ir_context_list); |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3729 | kfree(ohci->it_context_list); |
| 3730 | context_release(&ohci->at_response_ctx); |
Clemens Ladisch | c088ab30 | 2010-11-30 08:24:01 +0100 | [diff] [blame] | 3731 | fail_atreq_ctx: |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3732 | context_release(&ohci->at_request_ctx); |
Clemens Ladisch | c088ab30 | 2010-11-30 08:24:01 +0100 | [diff] [blame] | 3733 | fail_arrsp_ctx: |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3734 | ar_context_release(&ohci->ar_response_ctx); |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 3735 | fail_arreq_ctx: |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3736 | ar_context_release(&ohci->ar_request_ctx); |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3737 | fail_misc_buf: |
| 3738 | dma_free_coherent(ohci->card.device, PAGE_SIZE, |
| 3739 | ohci->misc_buffer, ohci->misc_buffer_bus); |
Clemens Ladisch | 7a39d8b | 2010-11-26 08:57:31 +0100 | [diff] [blame] | 3740 | fail_iounmap: |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3741 | pci_iounmap(dev, ohci->registers); |
| 3742 | fail_iomem: |
| 3743 | pci_release_region(dev, 0); |
| 3744 | fail_disable: |
| 3745 | pci_disable_device(dev); |
Stefan Richter | bd7dee6 | 2008-02-24 18:59:55 +0100 | [diff] [blame] | 3746 | fail_free: |
Oleg Drokin | d838d2c0 | 2011-03-11 04:17:27 +0300 | [diff] [blame] | 3747 | kfree(ohci); |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3748 | pmac_ohci_off(dev); |
Stefan Richter | 7007a07 | 2008-10-26 09:50:31 +0100 | [diff] [blame] | 3749 | fail: |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3750 | return err; |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3751 | } |
| 3752 | |
| 3753 | static void pci_remove(struct pci_dev *dev) |
| 3754 | { |
Peter Hurley | 8db4914 | 2013-03-27 06:59:59 -0400 | [diff] [blame] | 3755 | struct fw_ohci *ohci = pci_get_drvdata(dev); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3756 | |
Peter Hurley | 8db4914 | 2013-03-27 06:59:59 -0400 | [diff] [blame] | 3757 | /* |
| 3758 | * If the removal is happening from the suspend state, LPS won't be |
| 3759 | * enabled and host registers (eg., IntMaskClear) won't be accessible. |
| 3760 | */ |
| 3761 | if (reg_read(ohci, OHCI1394_HCControlSet) & OHCI1394_HCControl_LPS) { |
| 3762 | reg_write(ohci, OHCI1394_IntMaskClear, ~0); |
| 3763 | flush_writes(ohci); |
| 3764 | } |
Stephan Gatzka | 2d7a36e | 2011-07-25 22:16:24 +0200 | [diff] [blame] | 3765 | cancel_work_sync(&ohci->bus_reset_work); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3766 | fw_core_remove_card(&ohci->card); |
| 3767 | |
Kristian Høgsberg | c781c06 | 2007-05-07 20:33:32 -0400 | [diff] [blame] | 3768 | /* |
| 3769 | * FIXME: Fail all pending packets here, now that the upper |
| 3770 | * layers can't queue any more. |
| 3771 | */ |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3772 | |
| 3773 | software_reset(ohci); |
| 3774 | free_irq(dev->irq, ohci); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 3775 | |
| 3776 | if (ohci->next_config_rom && ohci->next_config_rom != ohci->config_rom) |
| 3777 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 3778 | ohci->next_config_rom, ohci->next_config_rom_bus); |
| 3779 | if (ohci->config_rom) |
| 3780 | dma_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, |
| 3781 | ohci->config_rom, ohci->config_rom_bus); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 3782 | ar_context_release(&ohci->ar_request_ctx); |
| 3783 | ar_context_release(&ohci->ar_response_ctx); |
Clemens Ladisch | ec766a7 | 2010-11-30 08:25:17 +0100 | [diff] [blame] | 3784 | dma_free_coherent(ohci->card.device, PAGE_SIZE, |
| 3785 | ohci->misc_buffer, ohci->misc_buffer_bus); |
Jay Fenlason | a55709b | 2008-10-22 15:59:42 -0400 | [diff] [blame] | 3786 | context_release(&ohci->at_request_ctx); |
| 3787 | context_release(&ohci->at_response_ctx); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3788 | kfree(ohci->it_context_list); |
| 3789 | kfree(ohci->ir_context_list); |
Clemens Ladisch | 262444e | 2010-06-05 12:31:25 +0200 | [diff] [blame] | 3790 | pci_disable_msi(dev); |
Kristian Høgsberg | d79406d | 2007-05-09 19:23:15 -0400 | [diff] [blame] | 3791 | pci_iounmap(dev, ohci->registers); |
| 3792 | pci_release_region(dev, 0); |
| 3793 | pci_disable_device(dev); |
Oleg Drokin | d838d2c0 | 2011-03-11 04:17:27 +0300 | [diff] [blame] | 3794 | kfree(ohci); |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3795 | pmac_ohci_off(dev); |
Stefan Richter | ea8d006 | 2008-03-01 02:42:56 +0100 | [diff] [blame] | 3796 | |
Stefan Richter | 64d2172 | 2011-12-20 21:32:46 +0100 | [diff] [blame] | 3797 | dev_notice(&dev->dev, "removed fw-ohci device\n"); |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3798 | } |
| 3799 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3800 | #ifdef CONFIG_PM |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3801 | static int pci_suspend(struct pci_dev *dev, pm_message_t state) |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3802 | { |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3803 | struct fw_ohci *ohci = pci_get_drvdata(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3804 | int err; |
| 3805 | |
| 3806 | software_reset(ohci); |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3807 | err = pci_save_state(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3808 | if (err) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 3809 | ohci_err(ohci, "pci_save_state failed\n"); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3810 | return err; |
| 3811 | } |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3812 | err = pci_set_power_state(dev, pci_choose_state(dev, state)); |
Stefan Richter | 5511142 | 2007-09-06 09:50:30 +0200 | [diff] [blame] | 3813 | if (err) |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 3814 | ohci_err(ohci, "pci_set_power_state failed with %d\n", err); |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3815 | pmac_ohci_off(dev); |
Stefan Richter | ea8d006 | 2008-03-01 02:42:56 +0100 | [diff] [blame] | 3816 | |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3817 | return 0; |
| 3818 | } |
| 3819 | |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3820 | static int pci_resume(struct pci_dev *dev) |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3821 | { |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3822 | struct fw_ohci *ohci = pci_get_drvdata(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3823 | int err; |
| 3824 | |
Stefan Richter | 5da3dac | 2010-04-02 14:05:02 +0200 | [diff] [blame] | 3825 | pmac_ohci_on(dev); |
Stefan Richter | 2ed0f18 | 2008-03-01 12:35:29 +0100 | [diff] [blame] | 3826 | pci_set_power_state(dev, PCI_D0); |
| 3827 | pci_restore_state(dev); |
| 3828 | err = pci_enable_device(dev); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3829 | if (err) { |
Peter Hurley | de97cb6 | 2013-03-26 11:54:06 -0400 | [diff] [blame] | 3830 | ohci_err(ohci, "pci_enable_device failed\n"); |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3831 | return err; |
| 3832 | } |
| 3833 | |
Maxim Levitsky | 8662b6b | 2010-11-29 04:09:49 +0200 | [diff] [blame] | 3834 | /* Some systems don't setup GUID register on resume from ram */ |
| 3835 | if (!reg_read(ohci, OHCI1394_GUIDLo) && |
| 3836 | !reg_read(ohci, OHCI1394_GUIDHi)) { |
| 3837 | reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); |
| 3838 | reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); |
| 3839 | } |
| 3840 | |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3841 | err = ohci_enable(&ohci->card, NULL, 0); |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3842 | if (err) |
| 3843 | return err; |
| 3844 | |
| 3845 | ohci_resume_iso_dma(ohci); |
Stefan Richter | 693a50b | 2011-01-01 15:17:05 +0100 | [diff] [blame] | 3846 | |
Maxim Levitsky | dd23736 | 2010-11-29 04:09:50 +0200 | [diff] [blame] | 3847 | return 0; |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3848 | } |
| 3849 | #endif |
| 3850 | |
Németh Márton | a67483d | 2010-01-10 13:14:26 +0100 | [diff] [blame] | 3851 | static const struct pci_device_id pci_table[] = { |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3852 | { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_FIREWIRE_OHCI, ~0) }, |
| 3853 | { } |
| 3854 | }; |
| 3855 | |
| 3856 | MODULE_DEVICE_TABLE(pci, pci_table); |
| 3857 | |
| 3858 | static struct pci_driver fw_ohci_pci_driver = { |
| 3859 | .name = ohci_driver_name, |
| 3860 | .id_table = pci_table, |
| 3861 | .probe = pci_probe, |
| 3862 | .remove = pci_remove, |
Kristian Høgsberg | 2aef469 | 2007-05-30 19:06:35 -0400 | [diff] [blame] | 3863 | #ifdef CONFIG_PM |
| 3864 | .resume = pci_resume, |
| 3865 | .suspend = pci_suspend, |
| 3866 | #endif |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3867 | }; |
| 3868 | |
Stephan Gatzka | 7a723c6 | 2013-08-26 20:50:04 +0200 | [diff] [blame] | 3869 | static int __init fw_ohci_init(void) |
| 3870 | { |
Stephan Gatzka | db9ae8f | 2013-08-26 20:50:05 +0200 | [diff] [blame] | 3871 | selfid_workqueue = alloc_workqueue(KBUILD_MODNAME, WQ_MEM_RECLAIM, 0); |
| 3872 | if (!selfid_workqueue) |
| 3873 | return -ENOMEM; |
| 3874 | |
Stephan Gatzka | 7a723c6 | 2013-08-26 20:50:04 +0200 | [diff] [blame] | 3875 | return pci_register_driver(&fw_ohci_pci_driver); |
| 3876 | } |
| 3877 | |
| 3878 | static void __exit fw_ohci_cleanup(void) |
| 3879 | { |
| 3880 | pci_unregister_driver(&fw_ohci_pci_driver); |
Stephan Gatzka | db9ae8f | 2013-08-26 20:50:05 +0200 | [diff] [blame] | 3881 | destroy_workqueue(selfid_workqueue); |
Stephan Gatzka | 7a723c6 | 2013-08-26 20:50:04 +0200 | [diff] [blame] | 3882 | } |
| 3883 | |
| 3884 | module_init(fw_ohci_init); |
| 3885 | module_exit(fw_ohci_cleanup); |
Axel Lin | fe2af11 | 2012-04-03 10:07:01 +0800 | [diff] [blame] | 3886 | |
Kristian Høgsberg | ed56891 | 2006-12-19 19:58:35 -0500 | [diff] [blame] | 3887 | MODULE_AUTHOR("Kristian Hoegsberg <krh@bitplanet.net>"); |
| 3888 | MODULE_DESCRIPTION("Driver for PCI OHCI IEEE1394 controllers"); |
| 3889 | MODULE_LICENSE("GPL"); |
| 3890 | |
Olaf Hering | 1e4c7b0 | 2007-05-05 23:17:13 +0200 | [diff] [blame] | 3891 | /* Provide a module alias so root-on-sbp2 initrds don't break. */ |
Olaf Hering | 1e4c7b0 | 2007-05-05 23:17:13 +0200 | [diff] [blame] | 3892 | MODULE_ALIAS("ohci1394"); |