blob: 9a8773d3b5e437dc9a9d8cedb966246e8df18d34 [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
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Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
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518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
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Marat Dukhan062bee32021-05-27 20:31:07 -0700528 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700529 "src/qs8-vadd/gen/minmax-scalar-x1.c",
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533 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
534 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700535 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/qu8-gemm/2x2-minmax-scalar.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700542 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700544 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700545 "src/qu8-requantization/rndna-scalar-signed64.c",
546 "src/qu8-requantization/rndna-scalar-unsigned32.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -0700548 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700549 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700550 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700551 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700553 "src/x8-lut/scalar.c",
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556 "src/x8-zip/x4-scalar.c",
557 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800558 "src/x32-depthtospace2d-chw2hwc/scalar.c",
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560 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700561 "src/x32-packx/x2-scalar.c",
562 "src/x32-packx/x3-scalar.c",
563 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700564 "src/x32-pad/scalar-float.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700566 "src/x32-unpool/scalar.c",
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Marat Dukhan436ebe62019-12-04 15:10:12 -0800574WASM_UKERNELS = [
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001314 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
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Marat Dukhaned6baaf2020-12-01 15:07:08 -08001318 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07001345 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001356 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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1365 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001370 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
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1372 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
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1375 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
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1378 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
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1380 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07001382 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
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1385 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1386 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
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1388 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1389 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001390 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1391 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1393 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001394 "src/math/roundd-wasmsimd-addsub.c",
1395 "src/math/roundd-wasmsimd-cvt.c",
1396 "src/math/roundne-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-addsub.c",
1398 "src/math/roundu-wasmsimd-cvt.c",
1399 "src/math/roundz-wasmsimd-addsub.c",
1400 "src/math/roundz-wasmsimd-cvt.c",
1401 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1402 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001403 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1405 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1407 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
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Marat Dukhanb5e3d172020-08-06 13:29:53 -07001409 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
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1423 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
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1428 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1429 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001430 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001431 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001432 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1433 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
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1435 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001440 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001441 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001442 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001443 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001444 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001445 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001446 "src/x32-zip/x2-wasmsimd.c",
1447 "src/x32-zip/x3-wasmsimd.c",
1448 "src/x32-zip/x4-wasmsimd.c",
1449 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001450]
1451
Marat Dukhan08c4a432019-10-03 09:29:21 -07001452# ISA-specific micro-kernels
1453NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001454 "src/f32-argmaxpool/4x-neon-c4.c",
1455 "src/f32-argmaxpool/9p8x-neon-c4.c",
1456 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001457 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1458 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001462 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001466 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001467 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001469 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001471 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001473 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1475 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1477 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001479 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1489 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1497 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1510 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001520 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001521 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001522 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1523 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1526 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1530 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1531 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1532 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1536 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001537 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1538 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001539 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1540 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1541 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1542 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1546 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1547 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1548 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1552 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1553 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1554 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001555 "src/f32-ibilinear-chw/gen/neon-p4.c",
1556 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001557 "src/f32-ibilinear/gen/neon-c4.c",
1558 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001560 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001562 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1563 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001565 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1567 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1568 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1570 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1572 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001573 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1574 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001575 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1577 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001578 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1579 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001580 "src/f32-prelu/gen/neon-1x4.c",
1581 "src/f32-prelu/gen/neon-1x8.c",
1582 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001583 "src/f32-prelu/gen/neon-2x4.c",
1584 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001585 "src/f32-prelu/gen/neon-2x16.c",
1586 "src/f32-prelu/gen/neon-4x4.c",
1587 "src/f32-prelu/gen/neon-4x8.c",
1588 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001600 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1612 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001613 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001614 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1616 "src/f32-spmm/gen/4x1-minmax-neon.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1619 "src/f32-spmm/gen/8x1-minmax-neon.c",
1620 "src/f32-spmm/gen/12x1-minmax-neon.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1623 "src/f32-spmm/gen/16x1-minmax-neon.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1626 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001627 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1628 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1630 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001631 "src/f32-vbinary/gen/vmax-neon-x4.c",
1632 "src/f32-vbinary/gen/vmax-neon-x8.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1634 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1635 "src/f32-vbinary/gen/vmin-neon-x4.c",
1636 "src/f32-vbinary/gen/vmin-neon-x8.c",
1637 "src/f32-vbinary/gen/vminc-neon-x4.c",
1638 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001639 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1640 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1642 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1644 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001645 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1646 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1648 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001649 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1650 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1652 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001653 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1654 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1660 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1666 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001667 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1669 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001670 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1671 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001672 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1673 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001674 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1675 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001676 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1677 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1679 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1681 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1683 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1701 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001702 "src/f32-vunary/gen/vabs-neon-x4.c",
1703 "src/f32-vunary/gen/vabs-neon-x8.c",
1704 "src/f32-vunary/gen/vneg-neon-x4.c",
1705 "src/f32-vunary/gen/vneg-neon-x8.c",
1706 "src/f32-vunary/gen/vsqr-neon-x4.c",
1707 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001708 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1709 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/math/roundd-neon-addsub.c",
1711 "src/math/roundd-neon-cvt.c",
1712 "src/math/roundne-neon-addsub.c",
1713 "src/math/roundu-neon-addsub.c",
1714 "src/math/roundu-neon-cvt.c",
1715 "src/math/roundz-neon-addsub.c",
1716 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001717 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1719 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1720 "src/math/sqrt-neon-nr1rsqrts.c",
1721 "src/math/sqrt-neon-nr2rsqrts.c",
1722 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001723 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
1724 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
1725 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
1726 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
1727 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
1728 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
1729 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
1730 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001731 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1732 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1733 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1734 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001735 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1736 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1737 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1738 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001739 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1740 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1741 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1742 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1743 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1744 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1745 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1746 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1747 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1748 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1749 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1750 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1751 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1752 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1753 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1754 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1755 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1756 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1757 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1758 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1759 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1760 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1761 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1762 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1763 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1764 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1765 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1766 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1767 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1768 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1769 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1770 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1771 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1772 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1773 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1774 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1775 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1776 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1777 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1778 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1779 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1780 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1781 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1782 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1783 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1784 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1785 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1786 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1787 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1788 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1789 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1790 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1791 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1792 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1793 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1794 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1795 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1796 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1797 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1798 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1799 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1800 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1801 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1802 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1803 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1804 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1805 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1806 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1807 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1808 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1809 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1810 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1811 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1812 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1813 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1814 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1815 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1816 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1817 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1818 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1819 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1820 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1821 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1822 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1823 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1824 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1825 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1826 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1827 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1828 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1829 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1830 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1831 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1832 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1833 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1834 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1835 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1836 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
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1838 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1839 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1840 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
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1842 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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1846 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
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1848 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1849 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1850 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1851 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1852 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1853 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1854 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1855 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1856 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1857 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1858 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1859 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1860 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1861 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1862 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1863 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1864 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1865 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1866 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1867 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1868 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1869 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1870 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1871 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1872 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1873 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1874 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001875 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001876 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001877 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07001878 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001879 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1880 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1881 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1882 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1883 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1884 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1885 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1886 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001887 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1888 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1889 "src/qu8-dwconv/up8x9-minmax-neon.c",
1890 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1891 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1892 "src/qu8-gemm/4x8-minmax-neon.c",
1893 "src/qu8-gemm/8x8-minmax-neon.c",
1894 "src/qu8-igemm/4x8-minmax-neon.c",
1895 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001896 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001897 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001898 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001899 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001900 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001901 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001902 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001903 "src/x8-zip/x2-neon.c",
1904 "src/x8-zip/x3-neon.c",
1905 "src/x8-zip/x4-neon.c",
1906 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001907 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001908 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001909 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001910 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001911 "src/x32-zip/x2-neon.c",
1912 "src/x32-zip/x3-neon.c",
1913 "src/x32-zip/x4-neon.c",
1914 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001915]
1916
1917NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001918 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1919 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1920 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1921 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1922 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1923 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1924 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1925 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1926 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1927 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1928 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1929 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1930 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1931 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1932 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1933 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1934 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1935 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1936 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1937 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1938 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1939 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1940 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1941 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1942 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1943 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1944 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1945 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1946 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1947 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001948 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1949 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001950 "src/f32-ibilinear/gen/neonfma-c4.c",
1951 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001952 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001953 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001954 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001955 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1956 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001957 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1958 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001959 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1960 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001961 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1962 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001963 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001964 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001965 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001966 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1967 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001968 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001969 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1970 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001971 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001972 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1973 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001974 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1975 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1976 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1977 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1978 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1979 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1980 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1981 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1982 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1984 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1985 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1986 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08001987 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1988 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
1989 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1990 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1991 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
1992 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1993 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1994 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1995 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
1996 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1997 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
1998 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
1999 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002000 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2001 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2002 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2003 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2004 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2005 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2006 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2007 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2008 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2009 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2010 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2011 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002012 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2013 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002014 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2015 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2016 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2017 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2018 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2019 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2020 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2021 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2022 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2023 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2024 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2025 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2026 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2027 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2028 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2029 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2066 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2067 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002068 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2069 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2070 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2071 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2072 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2073 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2074 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2075 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2076 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2077 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2078 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2079 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2080 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2081 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2082 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2083 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2084 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2085 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2086 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2087 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002088 "src/math/exp-neonfma-rr2-lut64-p2.c",
2089 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002090 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2091 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002092 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2093 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2094 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002095 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2096 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2097 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002098 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2099 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2100 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002101 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2102 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2103 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002104 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2105 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2106 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002107 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2108 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2109 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002110 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2111 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2112 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002113 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002114 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002115 "src/math/sqrt-neonfma-nr2fma.c",
2116 "src/math/sqrt-neonfma-nr2fma1adj.c",
2117 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002118]
2119
2120AARCH64_NEONFMA_UKERNELS = [
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Marat Dukhance7a3f82020-05-17 21:46:44 -07002122 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002123 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
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Marat Dukhan56b10cd2020-05-18 09:35:49 -07002125 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002126 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002127 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002128 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002129 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002130 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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2132 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002133 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002134 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002135 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2138 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2139 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002140 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2141 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2142 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002143 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002144 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002145 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2146 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2147 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002148 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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2151 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002152 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002155 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002156 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002157 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002158 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002161 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002169 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002170 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002171 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2172 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2173 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
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2176 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2177 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2178 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2179 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2180 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2181 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2182 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2183 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2184 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2185 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2186 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2187 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2188 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2189 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2190 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002191 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2192 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002193 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2194 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2196 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002197 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2198 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002199 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2200 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002201 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2202 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2203 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2204 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2205 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2206 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
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2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2223 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2224 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002225 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2226 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002227 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002228 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002229 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002230 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002231 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002232 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002233]
2234
Marat Dukhan8853b822020-05-07 12:19:01 -07002235NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002236 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2237 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002238 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2239 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2240 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2241 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2242 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2243 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002244 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002245 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002246 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002247 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002248]
2249
Marat Dukhan08c4a432019-10-03 09:29:21 -07002250AARCH64_NEONFP16ARITH_UKERNELS = [
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2453 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2454 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002455 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2456 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2457 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002458 "src/f32-ibilinear-chw/gen/sse-p4.c",
2459 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002460 "src/f32-ibilinear/gen/sse-c4.c",
2461 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002462 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2463 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2464 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002465 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2466 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2467 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002468 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2469 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2470 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2471 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002472 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2473 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2474 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002475 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2476 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2477 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002478 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002479 "src/f32-prelu/gen/sse-2x4.c",
2480 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002481 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002482 "src/f32-spmm/gen/4x1-minmax-sse.c",
2483 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002484 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002485 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002486 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2487 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2488 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2489 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2490 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2491 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2492 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2493 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002494 "src/f32-vbinary/gen/vmax-sse-x4.c",
2495 "src/f32-vbinary/gen/vmax-sse-x8.c",
2496 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2497 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2498 "src/f32-vbinary/gen/vmin-sse-x4.c",
2499 "src/f32-vbinary/gen/vmin-sse-x8.c",
2500 "src/f32-vbinary/gen/vminc-sse-x4.c",
2501 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002502 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2503 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2504 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2505 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2506 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2507 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2508 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2509 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002510 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2511 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2512 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2513 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002514 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2515 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2516 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2517 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002518 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2519 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002520 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2521 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002522 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2523 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002524 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2525 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002526 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2527 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002528 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2529 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002530 "src/f32-vunary/gen/vabs-sse-x4.c",
2531 "src/f32-vunary/gen/vabs-sse-x8.c",
2532 "src/f32-vunary/gen/vneg-sse-x4.c",
2533 "src/f32-vunary/gen/vneg-sse-x8.c",
2534 "src/f32-vunary/gen/vsqr-sse-x4.c",
2535 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002536 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002537 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002538 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002539 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002540 "src/math/sqrt-sse-hh1mac.c",
2541 "src/math/sqrt-sse-nr1mac.c",
2542 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002543 "src/x32-fill/sse.c",
2544 "src/x32-packx/x4-sse.c",
2545 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002546]
2547
2548SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002549 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002550 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002551 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002552 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2553 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2554 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2555 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2556 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2557 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2558 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2559 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2560 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2561 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2562 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2563 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002564 "src/f32-prelu/gen/sse2-2x4.c",
2565 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002566 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002567 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002568 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002569 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2570 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002571 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002572 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2573 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002574 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002575 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2576 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002577 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002578 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2579 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2580 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2581 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2582 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2583 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2584 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2585 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2586 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2587 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2588 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2589 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002590 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2591 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002592 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2593 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002594 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2595 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2596 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2597 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2598 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2599 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002600 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2601 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2602 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2603 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2604 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2605 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2606 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2607 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2608 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2609 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2610 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2611 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002612 "src/math/exp-sse2-rr2-lut64-p2.c",
2613 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002614 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002615 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002616 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002617 "src/math/roundd-sse2-cvt.c",
2618 "src/math/roundne-sse2-cvt.c",
2619 "src/math/roundu-sse2-cvt.c",
2620 "src/math/roundz-sse2-cvt.c",
2621 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2622 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2623 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2624 "src/math/sigmoid-sse2-rr2-p5-div.c",
2625 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2626 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002627 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002628 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002629 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002630 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002631 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002632 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002633 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002634 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002635 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002636 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002637 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002638 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002639 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002640 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002641 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002642 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002643 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002644 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002645 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002646 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002647 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002648 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002649 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002650 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002651 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002652 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002653 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002654 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002655 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2656 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002657 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2658 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2659 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2660 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2661 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2662 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2663 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2664 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2665 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
2666 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002667 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2668 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2669 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002670 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2671 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2672 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002673 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002674 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002675 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002676 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002677 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002678 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002679 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002680 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002681 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002682 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002683 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002684 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002685 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002686 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002687 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002688 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002689 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002690 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002691 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002692 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002693 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002694 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002695 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002696 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002697 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002698 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002699 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002700 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002701 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002702 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002703 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002704 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002705 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002706 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002707 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002708 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002709 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002710 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002711 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002712 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002713 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002714 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002715 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002716 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002717 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002718 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002719 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002720 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002721 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002722 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002723 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002724 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002725 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002726 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002727 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002728 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002729 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002730 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002731 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002732 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002733 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002734 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002735 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002736 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002737 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002738 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002739 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
2740 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x16.c",
2741 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x24.c",
2742 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07002743 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
2744 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x16.c",
2745 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x24.c",
2746 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002747 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
2748 "src/qu8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002749 "src/qu8-dwconv/up8x9-minmax-sse2.c",
2750 "src/qu8-gavgpool/7p7x-minmax-sse2-c8.c",
2751 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
2752 "src/qu8-gemm/2x4c8-minmax-sse2.c",
2753 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002754 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002755 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002756 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002757 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002758 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002759 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002760 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002761 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002762 "src/x8-zip/x2-sse2.c",
2763 "src/x8-zip/x3-sse2.c",
2764 "src/x8-zip/x4-sse2.c",
2765 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002766 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002767 "src/x32-zip/x2-sse2.c",
2768 "src/x32-zip/x3-sse2.c",
2769 "src/x32-zip/x4-sse2.c",
2770 "src/x32-zip/xm-sse2.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07002771]
2772
2773SSSE3_UKERNELS = [
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Marat Dukhancaf48312021-06-01 20:20:58 -07002784 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-ssse3-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002785 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-ssse3-mul16.c",
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2787 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-ssse3-mul16.c",
2788 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-ssse3-mul16.c",
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Marat Dukhan159688f2020-08-06 10:34:29 -07002790 "src/qs8-gavgpool/gen/7p7x-minmax-ssse3-c8-acc2.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07002793 "src/qs8-gavgpool/gen/7x-minmax-ssse3-c8-acc2.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002802 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002816 "src/qs8-gemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07002823 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002824 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002825 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002826 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002827 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002828 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002829 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002830 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002831 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002832 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002833 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002834 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002835 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002836 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002837 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002838 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002839 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002840 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002841 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002842 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002843 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002844 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002845 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002846 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002847]
2848
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002849SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08002850 "src/f32-prelu/gen/sse41-2x4.c",
2851 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002852 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
2853 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
2854 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
2855 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
2856 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
2857 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
2858 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
2859 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
2860 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
2861 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
2862 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
2863 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002864 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
2865 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002866 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2867 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002868 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
2869 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
2870 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
2871 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
2872 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2873 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002874 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
2875 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
2876 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
2877 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2878 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2879 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2880 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
2881 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
2882 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2883 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2884 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2885 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002886 "src/math/roundd-sse41.c",
2887 "src/math/roundne-sse41.c",
2888 "src/math/roundu-sse41.c",
2889 "src/math/roundz-sse41.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002890 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002891 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002892 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002893 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002894 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002895 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002896 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002897 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002898 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002899 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002900 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002901 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002902 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002903 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002904 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002905 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002906 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002907 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002908 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002909 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002910 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002911 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002912 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002913 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002914 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002915 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002916 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002917 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002918 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2919 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2920 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
2921 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002922 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2923 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2924 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
2925 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
2926 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2927 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2928 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2929 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2930 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2931 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
2932 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2933 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
2934 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2935 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2936 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2937 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2938 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2939 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
2940 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
2941 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002942 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
2943 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
2944 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002945 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
2946 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
2947 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002948 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002949 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002950 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002951 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002952 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002953 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002954 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002955 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002956 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002957 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002958 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002959 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002960 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002961 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002962 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002963 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002964 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002965 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002966 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002967 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002968 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002969 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002970 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002971 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002972 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002973 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002974 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002975 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002976 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002977 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002978 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002979 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002980 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002981 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002982 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002983 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002984 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002985 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002986 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002987 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002988 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002989 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002990 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002991 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002992 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002993 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002994 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002995 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002996 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002997 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002998 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002999 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003000 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003001 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003002 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003003 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003004 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003005 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003006 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003007 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003008 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003009 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003010 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003011 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003012 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003013 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07003014 "src/qs8-requantization/rndnu-sse4.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003015 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3016 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3017 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3018 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003019 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3020 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3021 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3022 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003023 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3024 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3025 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3026 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003027 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3028 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3029 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3030 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003031 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003032 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003033]
3034
Marat Dukhan08c4a432019-10-03 09:29:21 -07003035AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003036 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3037 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003038 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3039 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003040 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3041 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003042 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3043 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3044 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3045 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3046 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3047 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003048 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003049 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3050 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003051 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003052 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003053 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003054 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003055 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3056 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3057 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3058 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3059 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3060 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3061 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3062 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3063 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3064 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3065 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003066 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003067 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3068 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003069 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003070 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003071 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003072 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003073 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3074 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003075 "src/f32-prelu/gen/avx-2x8.c",
3076 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003077 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003078 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3079 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3080 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3081 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3082 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3083 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3084 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3085 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003086 "src/f32-vbinary/gen/vmax-avx-x8.c",
3087 "src/f32-vbinary/gen/vmax-avx-x16.c",
3088 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3089 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3090 "src/f32-vbinary/gen/vmin-avx-x8.c",
3091 "src/f32-vbinary/gen/vmin-avx-x16.c",
3092 "src/f32-vbinary/gen/vminc-avx-x8.c",
3093 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003094 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3095 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3096 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3097 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3098 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3099 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3100 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3101 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003102 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3103 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3104 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3105 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003106 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3107 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3108 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3109 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003110 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3111 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003112 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3113 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3114 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3115 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3116 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3117 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3118 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3119 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3120 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3121 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3122 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3123 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3124 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3125 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3126 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3127 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3128 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3129 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003130 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3131 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003132 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3133 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003134 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3135 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003136 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3137 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003138 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3139 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3140 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3141 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3142 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3143 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003144 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003145 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3146 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3147 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3148 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3149 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3150 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3151 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3152 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3153 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3154 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3155 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3156 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3157 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3158 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3159 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3160 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3161 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3162 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3163 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3164 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003165 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3166 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003167 "src/f32-vunary/gen/vabs-avx-x8.c",
3168 "src/f32-vunary/gen/vabs-avx-x16.c",
3169 "src/f32-vunary/gen/vneg-avx-x8.c",
3170 "src/f32-vunary/gen/vneg-avx-x16.c",
3171 "src/f32-vunary/gen/vsqr-avx-x8.c",
3172 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003173 "src/math/exp-avx-rr2-p5.c",
3174 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3175 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3176 "src/math/expm1minus-avx-rr2-p6.c",
3177 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3178 "src/math/sigmoid-avx-rr2-p5-div.c",
3179 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3180 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003181 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003182 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003183 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003184 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003185 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003186 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003187 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003188 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003189 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003190 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003191 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003192 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003193 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003195 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003196 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003197 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003198 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003199 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003200 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003201 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003202 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003203 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003204 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003205 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003206 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003207 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003208 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003209 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3210 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3211 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3212 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003213 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3214 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3215 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3216 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3217 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3218 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3219 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3220 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3221 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3222 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3223 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3224 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3225 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3226 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3227 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3228 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3229 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3230 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3231 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3232 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003233 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003234 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003235 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003236 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003237 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003238 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003239 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003240 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003241 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003242 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003243 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003244 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003245 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003246 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003247 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003248 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003249 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003250 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003251 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003252 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003253 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003254 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003255 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003256 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003257 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003258 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003259 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003260 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003261 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003262 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003263 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003264 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003265 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003266 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003267 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003268 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003269 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003270 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003271 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003272 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003273 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003274 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003275 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003276 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003277 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003278 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003279 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003280 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003281 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003282 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003283 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003284 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003285 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003286 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003287 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003288 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003289 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003290 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003291 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003292 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003293 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003294 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003295 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003296 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3297 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3298 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3299 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3300 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3301 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3302 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3303 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3304 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3305 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3306 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3307 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3308 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3309 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3310 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3311 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003312]
3313
Marat Dukhan1566fee2020-08-02 21:55:41 -07003314XOP_UKERNELS = [
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003317 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003318 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003319 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003320 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003321 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003323 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003324 "src/qc8-gemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003325 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003326 "src/qc8-gemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003327 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003328 "src/qc8-gemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003329 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003330 "src/qc8-igemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
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Marat Dukhanfc188ed2021-06-03 12:21:22 -07003335 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003336 "src/qc8-igemm/gen/2x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003337 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003338 "src/qc8-igemm/gen/3x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003339 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003340 "src/qc8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003341 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003342 "src/qc8-igemm/gen/4x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003343 "src/qs8-dwconv/gen/up8x9-minmax-fp32-xop-mul32.c",
3344 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-xop-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003345 "src/qs8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3346 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-xop-mul32.c",
3347 "src/qs8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3348 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-xop-mul32.c",
3349 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3350 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3351 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3352 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3353 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3354 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
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Marat Dukhanfda12b82019-11-21 12:27:59 -08003428FMA3_UKERNELS = [
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Marat Dukhan6adff4e2019-10-14 18:32:07 -07003498AVX2_UKERNELS = [
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Marat Dukhan4c4eb002019-12-08 21:27:49 -08003528 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3529 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003530 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003531 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3532 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3533 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003534 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003535 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3536 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3537 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3538 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3539 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3540 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3541 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3542 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3543 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3544 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3545 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3546 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3547 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3548 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3549 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3550 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3551 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3552 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3553 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3554 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3555 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3556 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3557 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3558 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3559 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3560 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3561 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3562 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3563 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3564 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3565 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3566 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3567 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3568 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3569 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3570 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3571 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3572 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3573 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3574 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003575 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3576 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3577 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3578 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3579 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3580 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3581 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3582 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3583 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3584 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3585 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3586 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3587 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3588 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3589 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3590 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3591 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3592 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3593 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3594 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3595 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3596 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3597 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3598 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003599 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3600 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3601 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3602 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3603 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3604 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3605 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3606 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3607 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3608 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3609 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3610 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3611 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3612 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3613 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3614 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3615 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3616 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3617 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3618 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3619 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3620 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3621 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3622 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3623 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3624 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3625 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3626 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3627 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3628 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003629 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3630 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3631 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003632 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3633 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3634 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3635 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003636 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003637 "src/math/extexp-avx2-p5.c",
3638 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3639 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3640 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3641 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3642 "src/math/sigmoid-avx2-rr1-p5-div.c",
3643 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3644 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3645 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3646 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3647 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3648 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3649 "src/math/sigmoid-avx2-rr2-p5-div.c",
3650 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3651 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07003652 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
3653 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
3654 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
3655 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
3656 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
3657 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
3658 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
3659 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
3660 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
3661 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
3662 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
3663 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003664 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3665 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3666 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3667 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3668 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3669 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07003670 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
3671 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
3672 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003673 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003674 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003675 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003676 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003677 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003678 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003679 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3680 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003681 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003682 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003683 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3684 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003685 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003686 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003687 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003688 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003689 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003690 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003691 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3692 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003693 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003694 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003695 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3696 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003697 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003698 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003699 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003700 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003701 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003702 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003703 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003704 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003705 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003706 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003707 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003708 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003709 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003710 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003711 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003712 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003713 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003714 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003715 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3716 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3717 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3718 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3719 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3720 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3721 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3722 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003723]
3724
Marat Dukhan08c4a432019-10-03 09:29:21 -07003725AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003726 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3727 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003728 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3729 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003730 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3731 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003732 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3733 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3734 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3735 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3736 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3737 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003738 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3739 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3740 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3741 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3742 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3743 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003744 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3745 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3746 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3747 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3748 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3749 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003750 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3751 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3752 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3753 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3754 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3755 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003756 "src/f32-prelu/gen/avx512f-2x16.c",
3757 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003758 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3759 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003760 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003761 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003762 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003763 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3764 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003765 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003766 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3767 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3768 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003769 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003770 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3771 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003772 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003773 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003774 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003775 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3776 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003777 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003778 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3779 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3780 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003781 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003782 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3783 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003784 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003785 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003786 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003787 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3788 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003789 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003790 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3791 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3792 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003793 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003794 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003795 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3796 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3797 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3798 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3799 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3800 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3801 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3802 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003803 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3804 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3805 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3806 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3807 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3808 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3809 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3810 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003811 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3812 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3813 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3814 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3815 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3816 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3817 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3818 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003819 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3820 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3821 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3822 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003823 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3824 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3825 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3826 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003827 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3828 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003829 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3830 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3831 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3832 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3833 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3834 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3835 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3836 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3837 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3838 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3839 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3840 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3841 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3842 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3843 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3844 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003845 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3846 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003847 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3848 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003849 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3850 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003851 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3852 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3853 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3854 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3855 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3856 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3857 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3858 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003859 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003860 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3861 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3862 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3863 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3864 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3865 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3866 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3867 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3868 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3869 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3870 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3871 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3872 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3873 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3874 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3875 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3876 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3877 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3878 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3879 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3880 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3881 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3882 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3883 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003884 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3885 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3886 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3887 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3888 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3889 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3890 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3891 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3892 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3893 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3894 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3895 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3896 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3897 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3898 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3899 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3900 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3901 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3902 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3903 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3904 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3905 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3906 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3907 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3908 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3909 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3910 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3911 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3912 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3913 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3914 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3915 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3916 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3917 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3918 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3919 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3920 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3921 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3922 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3923 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3924 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3925 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3926 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3927 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3928 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07003932 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
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Marat Dukhan5020b962020-06-08 13:30:10 -07003940 "src/f32-vunary/gen/vabs-avx512f-x16.c",
3941 "src/f32-vunary/gen/vabs-avx512f-x32.c",
3942 "src/f32-vunary/gen/vneg-avx512f-x16.c",
3943 "src/f32-vunary/gen/vneg-avx512f-x32.c",
3944 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
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Marat Dukhanb7633f22020-11-20 16:34:56 -08003946 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
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3948 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
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3950 "src/math/exp-avx512f-rr2-p5-scalef.c",
3951 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003952 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
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Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003956 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
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Frank Barchard04336c12020-10-22 16:48:55 -07003960 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
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3965 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
3966 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
3967 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
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3969 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
3970 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
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3972 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
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3978 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
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3983
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07003984AVX512SKX_UKERNELS = [
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4018
Frank Barchardbcedc082020-08-17 18:00:51 -07004019WASM32_ASM_UKERNELS = [
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Frank Barchardbcedc082020-08-17 18:00:51 -07004023]
4024
Marat Dukhan08c4a432019-10-03 09:29:21 -07004025AARCH32_ASM_UKERNELS = [
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4041
4042AARCH64_ASM_UKERNELS = [
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4104 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004105 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004106 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004107 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4108 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004109 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4110 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4111 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4112 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4113 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
4114 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004115 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
4116 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4117 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
4118 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004119 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
4120 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004121 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4122 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4123 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4124 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004125 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4126 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004127 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4128 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4129 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4130 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004131 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
4132 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004133 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4134 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004135 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4136 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4137 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004138 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4139 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4140 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4141 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
4142 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4143 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4144 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4145 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004146 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004147 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4148 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004149 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4150 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004151]
4152
Marat Dukhan1b354632020-03-23 12:50:22 -07004153INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004154 "src/xnnpack/argmaxpool.h",
4155 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004156 "src/xnnpack/common.h",
4157 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004158 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004159 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004160 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004161 "src/xnnpack/gavgpool.h",
4162 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004163 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004164 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004165 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004166 "src/xnnpack/lut.h",
4167 "src/xnnpack/math.h",
4168 "src/xnnpack/maxpool.h",
4169 "src/xnnpack/packx.h",
4170 "src/xnnpack/pad.h",
4171 "src/xnnpack/params.h",
4172 "src/xnnpack/pavgpool.h",
4173 "src/xnnpack/ppmm.h",
4174 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004175 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004176 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004177 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004178 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004179 "src/xnnpack/spmm.h",
4180 "src/xnnpack/unpool.h",
4181 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004182 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004183 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004184 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004185 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004186 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004187 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004188 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004189]
4190
4191INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004192 "include/xnnpack.h",
4193 "src/xnnpack/allocator.h",
4194 "src/xnnpack/compute.h",
4195 "src/xnnpack/im2col.h",
4196 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004197 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004198 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004199 "src/xnnpack/operator.h",
4200 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004201 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004202 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004203 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004204 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004205]
4206
Marat Dukhan1b354632020-03-23 12:50:22 -07004207ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004208 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004209]
4210
Marat Dukhan1b354632020-03-23 12:50:22 -07004211MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004212 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004213 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004214]
4215
Marat Dukhan1b354632020-03-23 12:50:22 -07004216MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004217 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004218 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004219 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004220 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004221]
4222
4223OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004224 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004225 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004226]
4227
4228WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004229 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004230 "src/xnnpack/operator.h",
4231 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004232]
4233
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004234LOGGING_COPTS = select({
4235 # No logging in optimized mode
4236 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4237 # Full logging in debug mode
4238 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4239 # Error-only logging in default (fastbuild) mode
4240 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4241})
4242
Marat Dukhan3b59de22020-06-03 20:15:19 -07004243LOGGING_SRCS = select({
4244 # No logging in optimized mode
4245 ":optimized_build": [],
4246 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004247 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004248 "src/operator-strings.c",
4249 "src/subgraph-strings.c",
4250 ],
4251})
4252
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004253LOGGING_HDRS = [
4254 "src/xnnpack/log.h",
4255]
4256
Marat Dukhan08c4a432019-10-03 09:29:21 -07004257xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004258 name = "tables",
4259 srcs = TABLE_SRCS,
4260 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004261 gcc_copts = xnnpack_gcc_std_copts(),
4262 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004263)
4264
4265xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004266 name = "scalar_ukernels",
4267 srcs = SCALAR_UKERNELS,
4268 hdrs = INTERNAL_HDRS,
4269 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004270 gcc_copts = xnnpack_gcc_std_copts(),
4271 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004272 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004273 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004274 "@FP16",
4275 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004276 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004277 ],
4278)
4279
4280xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004281 name = "scalar_ukernels_test_mode",
4282 srcs = SCALAR_UKERNELS,
4283 hdrs = INTERNAL_HDRS,
4284 aarch32_copts = ["-marm"],
4285 copts = [
4286 "-UNDEBUG",
4287 "-DXNN_TEST_MODE=1",
4288 ],
4289 gcc_copts = xnnpack_gcc_std_copts(),
4290 msvc_copts = xnnpack_msvc_std_copts(),
4291 deps = [
4292 ":tables",
4293 "@FP16",
4294 "@FXdiv",
4295 "@pthreadpool",
4296 ],
4297)
4298
4299xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004300 name = "wasm_ukernels",
4301 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004302 gcc_copts = xnnpack_gcc_std_copts(),
4303 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004304 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004305 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004306 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004307 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004308 "@FP16",
4309 "@FXdiv",
4310 "@pthreadpool",
4311 ],
4312)
4313
4314xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004315 name = "wasm_ukernels_test_mode",
4316 hdrs = INTERNAL_HDRS,
4317 copts = [
4318 "-UNDEBUG",
4319 "-DXNN_TEST_MODE=1",
4320 ],
4321 gcc_copts = xnnpack_gcc_std_copts(),
4322 msvc_copts = xnnpack_msvc_std_copts(),
4323 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004324 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004325 deps = [
4326 ":tables",
4327 "@FP16",
4328 "@FXdiv",
4329 "@pthreadpool",
4330 ],
4331)
4332
4333xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004334 name = "neon_ukernels",
4335 hdrs = INTERNAL_HDRS,
4336 aarch32_copts = [
4337 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004338 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004339 "-mfpu=neon",
4340 ],
4341 aarch32_srcs = NEON_UKERNELS,
4342 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004343 gcc_copts = xnnpack_gcc_std_copts(),
4344 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004345 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004346 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004347 "@FP16",
4348 "@pthreadpool",
4349 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004350)
4351
4352xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004353 name = "neon_ukernels_test_mode",
4354 hdrs = INTERNAL_HDRS,
4355 aarch32_copts = [
4356 "-marm",
4357 "-march=armv7-a",
4358 "-mfpu=neon",
4359 ],
4360 aarch32_srcs = NEON_UKERNELS,
4361 aarch64_srcs = NEON_UKERNELS,
4362 copts = [
4363 "-UNDEBUG",
4364 "-DXNN_TEST_MODE=1",
4365 ],
4366 gcc_copts = xnnpack_gcc_std_copts(),
4367 msvc_copts = xnnpack_msvc_std_copts(),
4368 deps = [
4369 ":tables",
4370 "@FP16",
4371 "@pthreadpool",
4372 ],
4373)
4374
4375xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004376 name = "neonfma_ukernels",
4377 hdrs = INTERNAL_HDRS,
4378 aarch32_copts = [
4379 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004380 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004381 "-mfpu=neon-vfpv4",
4382 ],
4383 aarch32_srcs = NEONFMA_UKERNELS,
4384 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004385 apple_aarch32_copts = [
4386 "-mcpu=swift",
4387 "-mtune=generic",
4388 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004389 gcc_copts = xnnpack_gcc_std_copts(),
4390 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004391 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004392 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004393 "@FP16",
4394 "@pthreadpool",
4395 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004396)
4397
4398xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004399 name = "neonfma_ukernels_test_mode",
4400 hdrs = INTERNAL_HDRS,
4401 aarch32_copts = [
4402 "-marm",
4403 "-march=armv7-a",
4404 "-mfpu=neon-vfpv4",
4405 ],
4406 aarch32_srcs = NEONFMA_UKERNELS,
4407 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004408 apple_aarch32_copts = [
4409 "-mcpu=swift",
4410 "-mtune=generic",
4411 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004412 copts = [
4413 "-UNDEBUG",
4414 "-DXNN_TEST_MODE=1",
4415 ],
4416 gcc_copts = xnnpack_gcc_std_copts(),
4417 msvc_copts = xnnpack_msvc_std_copts(),
4418 deps = [
4419 ":tables",
4420 "@FP16",
4421 "@pthreadpool",
4422 ],
4423)
4424
4425xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004426 name = "neonv8_ukernels",
4427 hdrs = INTERNAL_HDRS,
4428 aarch32_copts = [
4429 "-marm",
4430 "-march=armv8-a",
4431 "-mfpu=neon-fp-armv8",
4432 ],
4433 aarch32_srcs = NEONV8_UKERNELS,
4434 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004435 apple_aarch32_copts = [
4436 "-mcpu=cyclone",
4437 "-mtune=generic",
4438 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004439 gcc_copts = xnnpack_gcc_std_copts(),
4440 msvc_copts = xnnpack_msvc_std_copts(),
4441 deps = [
4442 ":tables",
4443 "@FP16",
4444 "@pthreadpool",
4445 ],
4446)
4447
4448xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004449 name = "neonv8_ukernels_test_mode",
4450 hdrs = INTERNAL_HDRS,
4451 aarch32_copts = [
4452 "-marm",
4453 "-march=armv8-a",
4454 "-mfpu=neon-fp-armv8",
4455 ],
4456 aarch32_srcs = NEONV8_UKERNELS,
4457 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004458 apple_aarch32_copts = [
4459 "-mcpu=cyclone",
4460 "-mtune=generic",
4461 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004462 copts = [
4463 "-UNDEBUG",
4464 "-DXNN_TEST_MODE=1",
4465 ],
4466 gcc_copts = xnnpack_gcc_std_copts(),
4467 msvc_copts = xnnpack_msvc_std_copts(),
4468 deps = [
4469 ":tables",
4470 "@FP16",
4471 "@pthreadpool",
4472 ],
4473)
4474
4475xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004476 name = "neonfp16arith_ukernels",
4477 hdrs = INTERNAL_HDRS,
4478 aarch64_copts = ["-march=armv8.2-a+fp16"],
4479 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004480 gcc_copts = xnnpack_gcc_std_copts(),
4481 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004482 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004483 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004484 "@FP16",
4485 "@pthreadpool",
4486 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004487)
4488
4489xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004490 name = "neonfp16arith_ukernels_test_mode",
4491 hdrs = INTERNAL_HDRS,
4492 aarch64_copts = ["-march=armv8.2-a+fp16"],
4493 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4494 copts = [
4495 "-UNDEBUG",
4496 "-DXNN_TEST_MODE=1",
4497 ],
4498 gcc_copts = xnnpack_gcc_std_copts(),
4499 msvc_copts = xnnpack_msvc_std_copts(),
4500 deps = [
4501 ":tables",
4502 "@FP16",
4503 "@pthreadpool",
4504 ],
4505)
4506
4507xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004508 name = "neondot_ukernels",
4509 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004510 aarch32_copts = [
4511 "-marm",
4512 "-march=armv8.2-a+dotprod",
4513 "-mfpu=neon-fp-armv8",
4514 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004515 aarch32_srcs = NEONDOT_UKERNELS,
4516 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4517 aarch64_srcs = NEONDOT_UKERNELS,
4518 gcc_copts = xnnpack_gcc_std_copts(),
4519 msvc_copts = xnnpack_msvc_std_copts(),
4520 deps = [
4521 ":tables",
4522 "@FP16",
4523 "@pthreadpool",
4524 ],
4525)
4526
4527xnnpack_cc_library(
4528 name = "neondot_ukernels_test_mode",
4529 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004530 aarch32_copts = [
4531 "-marm",
4532 "-march=armv8.2-a+dotprod",
4533 "-mfpu=neon-fp-armv8",
4534 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004535 aarch32_srcs = NEONDOT_UKERNELS,
4536 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4537 aarch64_srcs = NEONDOT_UKERNELS,
4538 copts = [
4539 "-UNDEBUG",
4540 "-DXNN_TEST_MODE=1",
4541 ],
4542 gcc_copts = xnnpack_gcc_std_copts(),
4543 msvc_copts = xnnpack_msvc_std_copts(),
4544 deps = [
4545 ":tables",
4546 "@FP16",
4547 "@pthreadpool",
4548 ],
4549)
4550
4551xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004552 name = "sse2_ukernels",
4553 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004554 gcc_copts = xnnpack_gcc_std_copts(),
4555 gcc_x86_copts = ["-msse2"],
4556 msvc_copts = xnnpack_msvc_std_copts(),
4557 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004558 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004559 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004560 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004561 "@FP16",
4562 "@pthreadpool",
4563 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004564)
4565
4566xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004567 name = "sse2_ukernels_test_mode",
4568 hdrs = INTERNAL_HDRS,
4569 copts = [
4570 "-UNDEBUG",
4571 "-DXNN_TEST_MODE=1",
4572 ],
4573 gcc_copts = xnnpack_gcc_std_copts(),
4574 gcc_x86_copts = ["-msse2"],
4575 msvc_copts = xnnpack_msvc_std_copts(),
4576 msvc_x86_32_copts = ["/arch:SSE2"],
4577 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4578 deps = [
4579 ":tables",
4580 "@FP16",
4581 "@pthreadpool",
4582 ],
4583)
4584
4585xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004586 name = "ssse3_ukernels",
4587 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004588 gcc_copts = xnnpack_gcc_std_copts(),
4589 gcc_x86_copts = ["-mssse3"],
4590 msvc_copts = xnnpack_msvc_std_copts(),
4591 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004592 x86_srcs = SSSE3_UKERNELS,
4593 deps = [
4594 ":tables",
4595 "@FP16",
4596 "@pthreadpool",
4597 ],
4598)
4599
4600xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004601 name = "ssse3_ukernels_test_mode",
4602 hdrs = INTERNAL_HDRS,
4603 copts = [
4604 "-UNDEBUG",
4605 "-DXNN_TEST_MODE=1",
4606 ],
4607 gcc_copts = xnnpack_gcc_std_copts(),
4608 gcc_x86_copts = ["-mssse3"],
4609 msvc_copts = xnnpack_msvc_std_copts(),
4610 msvc_x86_32_copts = ["/arch:SSE2"],
4611 x86_srcs = SSSE3_UKERNELS,
4612 deps = [
4613 ":tables",
4614 "@FP16",
4615 "@pthreadpool",
4616 ],
4617)
4618
4619xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004620 name = "sse41_ukernels",
4621 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004622 gcc_copts = xnnpack_gcc_std_copts(),
4623 gcc_x86_copts = ["-msse4.1"],
4624 msvc_copts = xnnpack_msvc_std_copts(),
4625 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004626 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004627 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004628 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004629 "@FP16",
4630 "@pthreadpool",
4631 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004632)
4633
4634xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004635 name = "sse41_ukernels_test_mode",
4636 hdrs = INTERNAL_HDRS,
4637 copts = [
4638 "-UNDEBUG",
4639 "-DXNN_TEST_MODE=1",
4640 ],
4641 gcc_copts = xnnpack_gcc_std_copts(),
4642 gcc_x86_copts = ["-msse4.1"],
4643 msvc_copts = xnnpack_msvc_std_copts(),
4644 msvc_x86_32_copts = ["/arch:SSE2"],
4645 x86_srcs = SSE41_UKERNELS,
4646 deps = [
4647 ":tables",
4648 "@FP16",
4649 "@pthreadpool",
4650 ],
4651)
4652
4653xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004654 name = "avx_ukernels",
4655 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004656 gcc_copts = xnnpack_gcc_std_copts(),
4657 gcc_x86_copts = ["-mavx"],
4658 msvc_copts = xnnpack_msvc_std_copts(),
4659 msvc_x86_32_copts = ["/arch:AVX"],
4660 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004661 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004662 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004663 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004664 "@FP16",
4665 "@pthreadpool",
4666 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004667)
4668
4669xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004670 name = "avx_ukernels_test_mode",
4671 hdrs = INTERNAL_HDRS,
4672 copts = [
4673 "-UNDEBUG",
4674 "-DXNN_TEST_MODE=1",
4675 ],
4676 gcc_copts = xnnpack_gcc_std_copts(),
4677 gcc_x86_copts = ["-mavx"],
4678 msvc_copts = xnnpack_msvc_std_copts(),
4679 msvc_x86_32_copts = ["/arch:AVX"],
4680 msvc_x86_64_copts = ["/arch:AVX"],
4681 x86_srcs = AVX_UKERNELS,
4682 deps = [
4683 ":tables",
4684 "@FP16",
4685 "@pthreadpool",
4686 ],
4687)
4688
4689xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004690 name = "xop_ukernels",
4691 hdrs = INTERNAL_HDRS,
4692 gcc_copts = xnnpack_gcc_std_copts(),
4693 gcc_x86_copts = ["-mxop"],
4694 msvc_copts = xnnpack_msvc_std_copts(),
4695 msvc_x86_32_copts = ["/arch:AVX"],
4696 msvc_x86_64_copts = ["/arch:AVX"],
4697 x86_srcs = XOP_UKERNELS,
4698 deps = [
4699 ":tables",
4700 "@FP16",
4701 "@pthreadpool",
4702 ],
4703)
4704
4705xnnpack_cc_library(
4706 name = "xop_ukernels_test_mode",
4707 hdrs = INTERNAL_HDRS,
4708 copts = [
4709 "-UNDEBUG",
4710 "-DXNN_TEST_MODE=1",
4711 ],
4712 gcc_copts = xnnpack_gcc_std_copts(),
4713 gcc_x86_copts = ["-mxop"],
4714 msvc_copts = xnnpack_msvc_std_copts(),
4715 msvc_x86_32_copts = ["/arch:AVX"],
4716 msvc_x86_64_copts = ["/arch:AVX"],
4717 x86_srcs = XOP_UKERNELS,
4718 deps = [
4719 ":tables",
4720 "@FP16",
4721 "@pthreadpool",
4722 ],
4723)
4724
4725xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004726 name = "fma3_ukernels",
4727 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004728 gcc_copts = xnnpack_gcc_std_copts(),
4729 gcc_x86_copts = ["-mfma"],
4730 msvc_copts = xnnpack_msvc_std_copts(),
4731 msvc_x86_32_copts = ["/arch:AVX"],
4732 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004733 x86_srcs = FMA3_UKERNELS,
4734 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004735 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004736 "@FP16",
4737 "@pthreadpool",
4738 ],
4739)
4740
4741xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004742 name = "fma3_ukernels_test_mode",
4743 hdrs = INTERNAL_HDRS,
4744 copts = [
4745 "-UNDEBUG",
4746 "-DXNN_TEST_MODE=1",
4747 ],
4748 gcc_copts = xnnpack_gcc_std_copts(),
4749 gcc_x86_copts = ["-mfma"],
4750 msvc_copts = xnnpack_msvc_std_copts(),
4751 msvc_x86_32_copts = ["/arch:AVX"],
4752 msvc_x86_64_copts = ["/arch:AVX"],
4753 x86_srcs = FMA3_UKERNELS,
4754 deps = [
4755 ":tables",
4756 "@FP16",
4757 "@pthreadpool",
4758 ],
4759)
4760
4761xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004762 name = "avx2_ukernels",
4763 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004764 gcc_copts = xnnpack_gcc_std_copts(),
4765 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004766 "-mfma",
4767 "-mavx2",
4768 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004769 msvc_copts = xnnpack_msvc_std_copts(),
4770 msvc_x86_32_copts = ["/arch:AVX2"],
4771 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004772 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004773 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004774 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004775 "@FP16",
4776 "@pthreadpool",
4777 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004778)
4779
4780xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004781 name = "avx2_ukernels_test_mode",
4782 hdrs = INTERNAL_HDRS,
4783 copts = [
4784 "-UNDEBUG",
4785 "-DXNN_TEST_MODE=1",
4786 ],
4787 gcc_copts = xnnpack_gcc_std_copts(),
4788 gcc_x86_copts = [
4789 "-mfma",
4790 "-mavx2",
4791 ],
4792 msvc_copts = xnnpack_msvc_std_copts(),
4793 msvc_x86_32_copts = ["/arch:AVX2"],
4794 msvc_x86_64_copts = ["/arch:AVX2"],
4795 x86_srcs = AVX2_UKERNELS,
4796 deps = [
4797 ":tables",
4798 "@FP16",
4799 "@pthreadpool",
4800 ],
4801)
4802
4803xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004804 name = "avx512f_ukernels",
4805 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004806 gcc_copts = xnnpack_gcc_std_copts(),
4807 gcc_x86_copts = ["-mavx512f"],
4808 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4809 msvc_copts = xnnpack_msvc_std_copts(),
4810 msvc_x86_32_copts = ["/arch:AVX512"],
4811 msvc_x86_64_copts = ["/arch:AVX512"],
4812 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004813 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004814 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004815 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004816 "@FP16",
4817 "@pthreadpool",
4818 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004819)
4820
4821xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004822 name = "avx512f_ukernels_test_mode",
4823 hdrs = INTERNAL_HDRS,
4824 copts = [
4825 "-UNDEBUG",
4826 "-DXNN_TEST_MODE=1",
4827 ],
4828 gcc_copts = xnnpack_gcc_std_copts(),
4829 gcc_x86_copts = ["-mavx512f"],
4830 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4831 msvc_copts = xnnpack_msvc_std_copts(),
4832 msvc_x86_32_copts = ["/arch:AVX512"],
4833 msvc_x86_64_copts = ["/arch:AVX512"],
4834 msys_copts = ["-fno-asynchronous-unwind-tables"],
4835 x86_srcs = AVX512F_UKERNELS,
4836 deps = [
4837 ":tables",
4838 "@FP16",
4839 "@pthreadpool",
4840 ],
4841)
4842
4843xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004844 name = "avx512skx_ukernels",
4845 hdrs = INTERNAL_HDRS,
4846 gcc_copts = xnnpack_gcc_std_copts(),
4847 gcc_x86_copts = [
4848 "-mavx512f",
4849 "-mavx512cd",
4850 "-mavx512bw",
4851 "-mavx512dq",
4852 "-mavx512vl",
4853 ],
4854 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4855 msvc_copts = xnnpack_msvc_std_copts(),
4856 msvc_x86_32_copts = ["/arch:AVX512"],
4857 msvc_x86_64_copts = ["/arch:AVX512"],
4858 msys_copts = ["-fno-asynchronous-unwind-tables"],
4859 x86_srcs = AVX512SKX_UKERNELS,
4860 deps = [
4861 ":tables",
4862 "@FP16",
4863 "@pthreadpool",
4864 ],
4865)
4866
4867xnnpack_cc_library(
4868 name = "avx512skx_ukernels_test_mode",
4869 hdrs = INTERNAL_HDRS,
4870 copts = [
4871 "-UNDEBUG",
4872 "-DXNN_TEST_MODE=1",
4873 ],
4874 gcc_copts = xnnpack_gcc_std_copts(),
4875 gcc_x86_copts = [
4876 "-mavx512f",
4877 "-mavx512cd",
4878 "-mavx512bw",
4879 "-mavx512dq",
4880 "-mavx512vl",
4881 ],
4882 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4883 msvc_copts = xnnpack_msvc_std_copts(),
4884 msvc_x86_32_copts = ["/arch:AVX512"],
4885 msvc_x86_64_copts = ["/arch:AVX512"],
4886 msys_copts = ["-fno-asynchronous-unwind-tables"],
4887 x86_srcs = AVX512SKX_UKERNELS,
4888 deps = [
4889 ":tables",
4890 "@FP16",
4891 "@pthreadpool",
4892 ],
4893)
4894
4895xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004896 name = "asm_ukernels",
4897 hdrs = ["src/xnnpack/assembly.h"],
4898 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004899 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004900 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004901 wasm_srcs = WASM32_ASM_UKERNELS,
4902 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004903)
4904
Marat Dukhan3b59de22020-06-03 20:15:19 -07004905xnnpack_cc_library(
4906 name = "logging_utils",
4907 srcs = LOGGING_SRCS,
4908 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4909 copts = LOGGING_COPTS + [
4910 "-Isrc",
4911 "-Iinclude",
4912 ] + select({
4913 ":debug_build": [],
4914 "//conditions:default": xnnpack_min_size_copts(),
4915 }),
4916 gcc_copts = xnnpack_gcc_std_copts(),
4917 msvc_copts = xnnpack_msvc_std_copts(),
4918 visibility = xnnpack_visibility(),
4919 deps = [
4920 "@FP16",
4921 "@clog",
4922 "@pthreadpool",
4923 ],
4924)
4925
Marat Dukhan08c4a432019-10-03 09:29:21 -07004926xnnpack_aggregate_library(
4927 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004928 aarch32_ios_deps = [
4929 ":neon_ukernels",
4930 ":neonfma_ukernels",
4931 ":neonv8_ukernels",
4932 ":asm_ukernels",
4933 ],
4934 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004935 ":neon_ukernels",
4936 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004937 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004938 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004939 ":asm_ukernels",
4940 ],
4941 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004942 ":neon_ukernels",
4943 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004944 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004945 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004946 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004947 ":asm_ukernels",
4948 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004949 generic_deps = [
4950 ":scalar_ukernels",
4951 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004952 wasm_deps = [
4953 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004954 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004955 ],
4956 wasmsimd_deps = [
4957 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07004958 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004959 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004960 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004961 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004962 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004963 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004964 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07004965 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004966 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004967 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004968 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004969 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004970 ],
4971)
4972
Marat Dukhan33fcf782020-05-24 14:27:15 -07004973xnnpack_aggregate_library(
4974 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004975 aarch32_ios_deps = [
4976 ":neon_ukernels_test_mode",
4977 ":neonfma_ukernels_test_mode",
4978 ":neonv8_ukernels_test_mode",
4979 ":asm_ukernels",
4980 ],
4981 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07004982 ":neon_ukernels_test_mode",
4983 ":neonfma_ukernels_test_mode",
4984 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004985 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004986 ":asm_ukernels",
4987 ],
4988 aarch64_deps = [
4989 ":neon_ukernels_test_mode",
4990 ":neonfma_ukernels_test_mode",
4991 ":neonv8_ukernels_test_mode",
4992 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07004993 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07004994 ":asm_ukernels",
4995 ],
4996 generic_deps = [
4997 ":scalar_ukernels_test_mode",
4998 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004999 wasm_deps = [
5000 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005001 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005002 ],
5003 wasmsimd_deps = [
5004 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005005 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005006 ],
5007 x86_deps = [
5008 ":sse2_ukernels_test_mode",
5009 ":ssse3_ukernels_test_mode",
5010 ":sse41_ukernels_test_mode",
5011 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005012 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005013 ":fma3_ukernels_test_mode",
5014 ":avx2_ukernels_test_mode",
5015 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005016 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005017 ],
5018)
5019
Marat Dukhan08c4a432019-10-03 09:29:21 -07005020xnnpack_cc_library(
5021 name = "im2col",
5022 srcs = ["src/im2col.c"],
5023 hdrs = [
5024 "src/xnnpack/common.h",
5025 "src/xnnpack/im2col.h",
5026 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005027 gcc_copts = xnnpack_gcc_std_copts(),
5028 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005029)
5030
5031xnnpack_cc_library(
5032 name = "indirection",
5033 srcs = ["src/indirection.c"],
5034 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005035 gcc_copts = xnnpack_gcc_std_copts(),
5036 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005037 deps = [
5038 "@FP16",
5039 "@FXdiv",
5040 "@pthreadpool",
5041 ],
5042)
5043
5044xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005045 name = "indirection_test_mode",
5046 srcs = ["src/indirection.c"],
5047 hdrs = INTERNAL_HDRS,
5048 copts = [
5049 "-UNDEBUG",
5050 "-DXNN_TEST_MODE=1",
5051 ],
5052 gcc_copts = xnnpack_gcc_std_copts(),
5053 msvc_copts = xnnpack_msvc_std_copts(),
5054 deps = [
5055 "@FP16",
5056 "@FXdiv",
5057 "@pthreadpool",
5058 ],
5059)
5060
5061xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005062 name = "packing",
5063 srcs = ["src/packing.c"],
5064 hdrs = INTERNAL_HDRS,
5065 gcc_copts = xnnpack_gcc_std_copts(),
5066 msvc_copts = xnnpack_msvc_std_copts(),
5067 deps = [
5068 "@FP16",
5069 "@FXdiv",
5070 "@pthreadpool",
5071 ],
5072)
5073
5074xnnpack_cc_library(
5075 name = "packing_test_mode",
5076 srcs = ["src/packing.c"],
5077 hdrs = INTERNAL_HDRS,
5078 copts = [
5079 "-UNDEBUG",
5080 "-DXNN_TEST_MODE=1",
5081 ],
5082 gcc_copts = xnnpack_gcc_std_copts(),
5083 msvc_copts = xnnpack_msvc_std_copts(),
5084 deps = [
5085 "@FP16",
5086 "@FXdiv",
5087 "@pthreadpool",
5088 ],
5089)
5090
5091xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005092 name = "operator_run",
5093 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005094 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005095 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005096 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5097 "//conditions:default": [],
5098 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005099 gcc_copts = xnnpack_gcc_std_copts(),
5100 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005101 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005102 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005103 "@FP16",
5104 "@FXdiv",
5105 "@clog",
5106 "@pthreadpool",
5107 ],
5108)
5109
Chao Mei6ddfc602020-05-13 22:29:36 -07005110xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005111 name = "operator_run_test_mode",
5112 srcs = ["src/operator-run.c"],
5113 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5114 copts = LOGGING_COPTS + [
5115 "-UNDEBUG",
5116 "-DXNN_TEST_MODE=1",
5117 ] + select({
5118 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5119 "//conditions:default": [],
5120 }),
5121 gcc_copts = xnnpack_gcc_std_copts(),
5122 msvc_copts = xnnpack_msvc_std_copts(),
5123 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005124 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005125 "@FP16",
5126 "@FXdiv",
5127 "@clog",
5128 "@pthreadpool",
5129 ],
5130)
5131
5132xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005133 name = "memory_planner",
5134 srcs = ["src/memory-planner.c"],
5135 hdrs = INTERNAL_HDRS,
5136 defines = select({
5137 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5138 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5139 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5140 }),
5141 gcc_copts = xnnpack_gcc_std_copts(),
5142 msvc_copts = xnnpack_msvc_std_copts(),
5143 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005144 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005145 "@pthreadpool",
5146 ],
5147)
5148
Marat Dukhan33fcf782020-05-24 14:27:15 -07005149xnnpack_cc_library(
5150 name = "memory_planner_test_mode",
5151 srcs = ["src/memory-planner.c"],
5152 hdrs = INTERNAL_HDRS,
5153 copts = [
5154 "-UNDEBUG",
5155 "-DXNN_TEST_MODE=1",
5156 ],
5157 defines = select({
5158 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5159 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5160 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5161 }),
5162 gcc_copts = xnnpack_gcc_std_copts(),
5163 msvc_copts = xnnpack_msvc_std_copts(),
5164 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005165 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005166 "@pthreadpool",
5167 ],
5168)
5169
Marat Dukhan08c4a432019-10-03 09:29:21 -07005170cc_library(
5171 name = "enable_assembly",
5172 defines = select({
5173 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5174 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005175 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005176 }),
5177)
5178
Marat Dukhan9de90e02020-06-18 16:04:12 -07005179cc_library(
5180 name = "enable_sparse",
5181 defines = select({
5182 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5183 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005184 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005185 }),
5186)
5187
Marat Dukhancf056b22019-10-07 10:26:29 -07005188xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005189 name = "operators",
5190 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005191 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005192 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005193 ],
5194 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005195 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005196 "-Isrc",
5197 "-Iinclude",
5198 ] + select({
5199 ":debug_build": [],
5200 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005201 }) + select({
5202 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5203 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005204 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005205 gcc_copts = xnnpack_gcc_std_copts(),
5206 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005207 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005208 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005209 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005210 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005211 "@FP16",
5212 "@FXdiv",
5213 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005214 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005215 ],
5216)
5217
Marat Dukhan10a38082020-04-17 03:58:35 -07005218xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005219 name = "operators_test_mode",
5220 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005221 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005222 "src/operator-delete.c",
5223 ],
5224 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5225 copts = LOGGING_COPTS + [
5226 "-Isrc",
5227 "-Iinclude",
5228 "-UNDEBUG",
5229 "-DXNN_TEST_MODE=1",
5230 ] + select({
5231 ":debug_build": [],
5232 "//conditions:default": xnnpack_min_size_copts(),
5233 }) + select({
5234 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5235 "//conditions:default": [],
5236 }),
5237 gcc_copts = xnnpack_gcc_std_copts(),
5238 msvc_copts = xnnpack_msvc_std_copts(),
5239 deps = [
5240 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005241 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005242 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005243 "@FP16",
5244 "@FXdiv",
5245 "@clog",
5246 "@pthreadpool",
5247 ],
5248)
5249
5250xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005251 name = "XNNPACK",
5252 srcs = [
5253 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005254 "src/runtime.c",
5255 "src/subgraph.c",
5256 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005257 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005258 hdrs = ["include/xnnpack.h"],
5259 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005260 "-Isrc",
5261 "-Iinclude",
5262 ] + select({
5263 ":debug_build": [],
5264 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005265 }) + select({
5266 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5267 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005268 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005269 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005270 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005271 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005272 visibility = xnnpack_visibility(),
5273 deps = [
5274 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005275 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005276 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005277 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005278 ":operator_run",
5279 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005280 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005281 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005282 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005283 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005284 ] + select({
5285 ":emscripten": [],
5286 "//conditions:default": ["@cpuinfo"],
5287 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005288)
5289
Marat Dukhan10a38082020-04-17 03:58:35 -07005290xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005291 name = "XNNPACK_test_mode",
5292 srcs = [
5293 "src/init.c",
5294 "src/runtime.c",
5295 "src/subgraph.c",
5296 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005297 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005298 hdrs = ["include/xnnpack.h"],
5299 copts = LOGGING_COPTS + [
5300 "-Isrc",
5301 "-Iinclude",
5302 "-UNDEBUG",
5303 "-DXNN_TEST_MODE=1",
5304 ] + select({
5305 ":debug_build": [],
5306 "//conditions:default": xnnpack_min_size_copts(),
5307 }) + select({
5308 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5309 "//conditions:default": [],
5310 }),
5311 gcc_copts = xnnpack_gcc_std_copts(),
5312 includes = ["include"],
5313 msvc_copts = xnnpack_msvc_std_copts(),
5314 visibility = xnnpack_visibility(),
5315 deps = [
5316 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005317 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005318 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005319 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005320 ":operator_run_test_mode",
5321 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005322 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005323 "@clog",
5324 "@FP16",
5325 "@pthreadpool",
5326 ] + select({
5327 ":emscripten": [],
5328 "//conditions:default": ["@cpuinfo"],
5329 }),
5330)
5331
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005332# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5333# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005334xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005335 name = "xnnpack_for_tflite",
5336 srcs = [
5337 "src/init.c",
5338 "src/runtime.c",
5339 "src/subgraph.c",
5340 "src/tensor.c",
5341 ] + SUBGRAPH_SRCS,
5342 hdrs = ["include/xnnpack.h"],
5343 copts = LOGGING_COPTS + [
5344 "-Isrc",
5345 "-Iinclude",
5346 ] + select({
5347 ":debug_build": [],
5348 "//conditions:default": xnnpack_min_size_copts(),
5349 }) + select({
5350 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5351 "//conditions:default": [],
5352 }),
5353 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005354 "XNN_NO_QU8_OPERATORS",
5355 "XNN_NO_U8_OPERATORS",
5356 "XNN_NO_X8_OPERATORS",
5357 "XNN_NO_F16_OPERATORS",
5358 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005359 ] + select({
5360 ":xnn_enable_qs8_explicit_true": [],
5361 ":xnn_enable_qs8_explicit_false": ["XNN_NO_QS8_OPERATORS"],
5362 "//conditions:default": ["XNN_NO_QS8_OPERATORS"],
5363 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005364 gcc_copts = xnnpack_gcc_std_copts(),
5365 includes = ["include"],
5366 msvc_copts = xnnpack_msvc_std_copts(),
5367 visibility = xnnpack_visibility(),
5368 deps = [
5369 ":enable_assembly",
5370 ":enable_sparse",
5371 ":logging_utils",
5372 ":memory_planner",
5373 ":operator_run",
5374 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005375 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005376 "@clog",
5377 "@FP16",
5378 "@pthreadpool",
5379 ] + select({
5380 ":emscripten": [],
5381 "//conditions:default": ["@cpuinfo"],
5382 }),
5383)
5384
5385# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5386# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5387xnnpack_cc_library(
5388 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005389 srcs = [
5390 "src/init.c",
5391 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005392 hdrs = ["include/xnnpack.h"],
5393 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005394 "-Isrc",
5395 "-Iinclude",
5396 ] + select({
5397 ":debug_build": [],
5398 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005399 }) + select({
5400 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5401 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005402 }),
5403 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005404 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005405 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005406 "XNN_NO_U8_OPERATORS",
5407 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005408 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005409 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005410 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005411 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005412 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005413 visibility = xnnpack_visibility(),
5414 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005415 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005416 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005417 ":operator_run",
5418 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005419 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005420 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005421 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005422 ] + select({
5423 ":emscripten": [],
5424 "//conditions:default": ["@cpuinfo"],
5425 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005426)
5427
Marat Dukhancf056b22019-10-07 10:26:29 -07005428xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005429 name = "bench_utils",
5430 srcs = ["bench/utils.cc"],
5431 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005432 deps = [
5433 "@com_google_benchmark//:benchmark",
5434 "@cpuinfo",
5435 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005436)
5437
Frank Barchard7e955972019-10-11 10:34:25 -07005438######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005439
5440xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005441 name = "qs8_gemm_bench",
5442 srcs = [
5443 "bench/gemm.h",
5444 "bench/qs8-gemm.cc",
5445 "src/xnnpack/AlignedAllocator.h",
5446 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005447 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5448 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005449)
5450
5451xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005452 name = "qs8_requantization_bench",
5453 srcs = [
5454 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005455 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005456 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005457 ] + MICROKERNEL_BENCHMARK_HDRS,
5458 deps = MICROKERNEL_BENCHMARK_DEPS,
5459)
5460
5461xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005462 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005463 srcs = [
5464 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005465 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005466 "src/xnnpack/AlignedAllocator.h",
5467 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005468 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005469 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005470)
5471
5472xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005473 name = "qu8_requantization_bench",
5474 srcs = [
5475 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005476 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005477 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005478 ] + MICROKERNEL_BENCHMARK_HDRS,
5479 deps = MICROKERNEL_BENCHMARK_DEPS,
5480)
5481
5482xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005483 name = "f16_igemm_bench",
5484 srcs = [
5485 "bench/f16-igemm.cc",
5486 "bench/conv.h",
5487 "bench/google/conv.h",
5488 "src/xnnpack/AlignedAllocator.h",
5489 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005490 deps = MICROKERNEL_BENCHMARK_DEPS + [
5491 ":indirection",
5492 ":packing",
5493 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005494)
5495
5496xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005497 name = "f16_gemm_bench",
5498 srcs = [
5499 "bench/f16-gemm.cc",
5500 "bench/gemm.h",
5501 "src/xnnpack/AlignedAllocator.h",
5502 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005503 deps = MICROKERNEL_BENCHMARK_DEPS + [
5504 ":packing",
5505 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005506)
5507
5508xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005509 name = "f16_spmm_bench",
5510 srcs = [
5511 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005512 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005513 "src/xnnpack/AlignedAllocator.h",
5514 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005515 deps = MICROKERNEL_BENCHMARK_DEPS,
5516)
5517
5518xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005519 name = "f16_vrelu_bench",
5520 srcs = [
5521 "bench/f16-vrelu.cc",
5522 "src/xnnpack/AlignedAllocator.h",
5523 ] + MICROKERNEL_BENCHMARK_HDRS,
5524 deps = MICROKERNEL_BENCHMARK_DEPS,
5525)
5526
5527xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005528 name = "f32_igemm_bench",
5529 srcs = [
5530 "bench/f32-igemm.cc",
5531 "bench/conv.h",
5532 "src/xnnpack/AlignedAllocator.h",
5533 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005534 deps = MICROKERNEL_BENCHMARK_DEPS + [
5535 ":indirection",
5536 ":packing",
5537 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005538)
5539
5540xnnpack_benchmark(
5541 name = "f32_conv_hwc_bench",
5542 srcs = [
5543 "bench/f32-conv-hwc.cc",
5544 "bench/dconv.h",
5545 "src/xnnpack/AlignedAllocator.h",
5546 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005547 deps = MICROKERNEL_BENCHMARK_DEPS + [
5548 ":packing",
5549 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005550)
5551
5552xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005553 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005554 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005555 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005556 "bench/dconv.h",
5557 "src/xnnpack/AlignedAllocator.h",
5558 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005559 deps = MICROKERNEL_BENCHMARK_DEPS + [
5560 ":packing",
5561 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005562)
5563
5564xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005565 name = "f16_dwconv_bench",
5566 srcs = [
5567 "bench/f16-dwconv.cc",
5568 "bench/dwconv.h",
5569 "bench/google/dwconv.h",
5570 "src/xnnpack/AlignedAllocator.h",
5571 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005572 deps = MICROKERNEL_BENCHMARK_DEPS + [
5573 ":indirection",
5574 ":packing",
5575 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005576)
5577
5578xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005579 name = "f32_dwconv_bench",
5580 srcs = [
5581 "bench/f32-dwconv.cc",
5582 "bench/dwconv.h",
5583 "src/xnnpack/AlignedAllocator.h",
5584 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005585 deps = MICROKERNEL_BENCHMARK_DEPS + [
5586 ":indirection",
5587 ":packing",
5588 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005589)
5590
5591xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005592 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005593 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005594 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005595 "bench/dwconv.h",
5596 "src/xnnpack/AlignedAllocator.h",
5597 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005598 deps = MICROKERNEL_BENCHMARK_DEPS + [
5599 ":indirection",
5600 ":packing",
5601 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005602)
5603
5604xnnpack_benchmark(
5605 name = "f32_gemm_bench",
5606 srcs = [
5607 "bench/f32-gemm.cc",
5608 "bench/gemm.h",
5609 "src/xnnpack/AlignedAllocator.h",
5610 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005611 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005612 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005613)
5614
5615xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005616 name = "f32_raddexpminusmax_bench",
5617 srcs = [
5618 "bench/f32-raddexpminusmax.cc",
5619 "src/xnnpack/AlignedAllocator.h",
5620 ] + MICROKERNEL_BENCHMARK_HDRS,
5621 deps = MICROKERNEL_BENCHMARK_DEPS,
5622)
5623
5624xnnpack_benchmark(
5625 name = "f32_raddextexp_bench",
5626 srcs = [
5627 "bench/f32-raddextexp.cc",
5628 "src/xnnpack/AlignedAllocator.h",
5629 ] + MICROKERNEL_BENCHMARK_HDRS,
5630 deps = MICROKERNEL_BENCHMARK_DEPS,
5631)
5632
5633xnnpack_benchmark(
5634 name = "f32_raddstoreexpminusmax_bench",
5635 srcs = [
5636 "bench/f32-raddstoreexpminusmax.cc",
5637 "src/xnnpack/AlignedAllocator.h",
5638 ] + MICROKERNEL_BENCHMARK_HDRS,
5639 deps = MICROKERNEL_BENCHMARK_DEPS,
5640)
5641
5642xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005643 name = "f32_rmax_bench",
5644 srcs = [
5645 "bench/f32-rmax.cc",
5646 "src/xnnpack/AlignedAllocator.h",
5647 ] + MICROKERNEL_BENCHMARK_HDRS,
5648 deps = MICROKERNEL_BENCHMARK_DEPS,
5649)
5650
5651xnnpack_benchmark(
5652 name = "f32_spmm_bench",
5653 srcs = [
5654 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005655 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005656 "src/xnnpack/AlignedAllocator.h",
5657 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005658 deps = MICROKERNEL_BENCHMARK_DEPS,
5659)
5660
5661xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005662 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005663 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005664 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005665 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005666 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005667 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005668)
5669
5670xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005671 name = "f32_velu_bench",
5672 srcs = [
5673 "bench/f32-velu.cc",
5674 "src/xnnpack/AlignedAllocator.h",
5675 ] + MICROKERNEL_BENCHMARK_HDRS,
5676 deps = MICROKERNEL_BENCHMARK_DEPS,
5677)
5678
5679xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005680 name = "f32_vhswish_bench",
5681 srcs = [
5682 "bench/f32-vhswish.cc",
5683 "src/xnnpack/AlignedAllocator.h",
5684 ] + MICROKERNEL_BENCHMARK_HDRS,
5685 deps = MICROKERNEL_BENCHMARK_DEPS,
5686)
5687
5688xnnpack_benchmark(
5689 name = "f32_vrelu_bench",
5690 srcs = [
5691 "bench/f32-vrelu.cc",
5692 "src/xnnpack/AlignedAllocator.h",
5693 ] + MICROKERNEL_BENCHMARK_HDRS,
5694 deps = MICROKERNEL_BENCHMARK_DEPS,
5695)
5696
5697xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005698 name = "f32_vscaleexpminusmax_bench",
5699 srcs = [
5700 "bench/f32-vscaleexpminusmax.cc",
5701 "src/xnnpack/AlignedAllocator.h",
5702 ] + MICROKERNEL_BENCHMARK_HDRS,
5703 deps = MICROKERNEL_BENCHMARK_DEPS,
5704)
5705
5706xnnpack_benchmark(
5707 name = "f32_vscaleextexp_bench",
5708 srcs = [
5709 "bench/f32-vscaleextexp.cc",
5710 "src/xnnpack/AlignedAllocator.h",
5711 ] + MICROKERNEL_BENCHMARK_HDRS,
5712 deps = MICROKERNEL_BENCHMARK_DEPS,
5713)
5714
5715xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005716 name = "f32_vsigmoid_bench",
5717 srcs = [
5718 "bench/f32-vsigmoid.cc",
5719 "src/xnnpack/AlignedAllocator.h",
5720 ] + MICROKERNEL_BENCHMARK_HDRS,
5721 deps = MICROKERNEL_BENCHMARK_DEPS,
5722)
5723
5724xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005725 name = "f32_vsqrt_bench",
5726 srcs = [
5727 "bench/f32-vsqrt.cc",
5728 "src/xnnpack/AlignedAllocator.h",
5729 ] + MICROKERNEL_BENCHMARK_HDRS,
5730 deps = MICROKERNEL_BENCHMARK_DEPS,
5731)
5732
5733xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005734 name = "f32_im2col_gemm_bench",
5735 srcs = [
5736 "bench/f32-im2col-gemm.cc",
5737 "bench/conv.h",
5738 "src/xnnpack/AlignedAllocator.h",
5739 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005740 deps = MICROKERNEL_BENCHMARK_DEPS + [
5741 ":im2col",
5742 ":packing",
5743 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005744)
5745
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005746xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005747 name = "rounding_bench",
5748 srcs = [
5749 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005750 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005751 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005752 ] + MICROKERNEL_BENCHMARK_HDRS,
5753 deps = MICROKERNEL_BENCHMARK_DEPS,
5754)
5755
Marat Dukhan08c4a432019-10-03 09:29:21 -07005756########################### Benchmarks for operators ###########################
5757
5758xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005759 name = "average_pooling_bench",
5760 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005761 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005762 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005763 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005764)
5765
5766xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005767 name = "bankers_rounding_bench",
5768 srcs = ["bench/bankers-rounding.cc"],
5769 copts = xnnpack_optional_tflite_copts(),
5770 tags = ["nowin32"],
5771 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5772)
5773
5774xnnpack_benchmark(
5775 name = "ceiling_bench",
5776 srcs = ["bench/ceiling.cc"],
5777 copts = xnnpack_optional_tflite_copts(),
5778 tags = ["nowin32"],
5779 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5780)
5781
5782xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005783 name = "channel_shuffle_bench",
5784 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005785 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005786)
5787
5788xnnpack_benchmark(
5789 name = "convolution_bench",
5790 srcs = ["bench/convolution.cc"],
5791 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005792 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005793 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005794)
5795
5796xnnpack_benchmark(
5797 name = "deconvolution_bench",
5798 srcs = ["bench/deconvolution.cc"],
5799 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005800 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005801 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005802)
5803
5804xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005805 name = "elu_bench",
5806 srcs = ["bench/elu.cc"],
5807 copts = xnnpack_optional_tflite_copts(),
5808 tags = ["nowin32"],
5809 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5810)
5811
5812xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005813 name = "floor_bench",
5814 srcs = ["bench/floor.cc"],
5815 copts = xnnpack_optional_tflite_copts(),
5816 tags = ["nowin32"],
5817 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5818)
5819
5820xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005821 name = "global_average_pooling_bench",
5822 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005823 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005824)
5825
5826xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005827 name = "hardswish_bench",
5828 srcs = ["bench/hardswish.cc"],
5829 copts = xnnpack_optional_tflite_copts(),
5830 tags = ["nowin32"],
5831 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5832)
5833
5834xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005835 name = "max_pooling_bench",
5836 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005837 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005838)
5839
5840xnnpack_benchmark(
5841 name = "sigmoid_bench",
5842 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005843 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005844 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005845 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005846)
5847
5848xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005849 name = "prelu_bench",
5850 srcs = ["bench/prelu.cc"],
5851 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005852 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005853 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005854)
5855
5856xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005857 name = "softmax_bench",
5858 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005859 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005860 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005861 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005862)
5863
Marat Dukhan87727142020-06-24 15:24:10 -07005864xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005865 name = "square_root_bench",
5866 srcs = ["bench/square-root.cc"],
5867 copts = xnnpack_optional_tflite_copts(),
5868 tags = ["nowin32"],
5869 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5870)
5871
5872xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005873 name = "truncation_bench",
5874 srcs = ["bench/truncation.cc"],
5875 deps = OPERATOR_BENCHMARK_DEPS,
5876)
5877
Marat Dukhanc068bb62019-10-04 13:24:39 -07005878############################# End-to-end benchmarks ############################
5879
5880cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005881 name = "fp32_mobilenet_v1",
5882 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005883 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005884 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005885 linkstatic = True,
5886 deps = [
5887 ":XNNPACK",
5888 "@pthreadpool",
5889 ],
5890)
5891
5892cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005893 name = "fp32_sparse_mobilenet_v1",
5894 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5895 hdrs = ["models/models.h"],
5896 copts = xnnpack_std_cxxopts(),
5897 linkstatic = True,
5898 deps = [
5899 ":XNNPACK",
5900 "@pthreadpool",
5901 ],
5902)
5903
5904cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005905 name = "fp16_mobilenet_v1",
5906 srcs = ["models/fp16-mobilenet-v1.cc"],
5907 hdrs = ["models/models.h"],
5908 copts = xnnpack_std_cxxopts(),
5909 linkstatic = True,
5910 deps = [
5911 ":XNNPACK",
5912 "@FP16",
5913 "@pthreadpool",
5914 ],
5915)
5916
5917cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005918 name = "qs8_mobilenet_v1",
5919 srcs = ["models/qs8-mobilenet-v1.cc"],
5920 hdrs = ["models/models.h"],
5921 copts = xnnpack_std_cxxopts(),
5922 linkstatic = True,
5923 deps = [
5924 ":XNNPACK",
5925 "@pthreadpool",
5926 ],
5927)
5928
5929cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07005930 name = "qs8_mobilenet_v2",
5931 srcs = ["models/qs8-mobilenet-v2.cc"],
5932 hdrs = ["models/models.h"],
5933 copts = xnnpack_std_cxxopts(),
5934 linkstatic = True,
5935 deps = [
5936 ":XNNPACK",
5937 "@pthreadpool",
5938 ],
5939)
5940
5941cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005942 name = "qu8_mobilenet_v1",
5943 srcs = ["models/qu8-mobilenet-v1.cc"],
5944 hdrs = ["models/models.h"],
5945 copts = xnnpack_std_cxxopts(),
5946 linkstatic = True,
5947 deps = [
5948 ":XNNPACK",
5949 "@pthreadpool",
5950 ],
5951)
5952
5953cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005954 name = "fp32_mobilenet_v2",
5955 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005956 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005957 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005958 linkstatic = True,
5959 deps = [
5960 ":XNNPACK",
5961 "@pthreadpool",
5962 ],
5963)
5964
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005965cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005966 name = "fp32_sparse_mobilenet_v2",
5967 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
5968 hdrs = ["models/models.h"],
5969 copts = xnnpack_std_cxxopts(),
5970 linkstatic = True,
5971 deps = [
5972 ":XNNPACK",
5973 "@pthreadpool",
5974 ],
5975)
5976
5977cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005978 name = "fp16_mobilenet_v2",
5979 srcs = ["models/fp16-mobilenet-v2.cc"],
5980 hdrs = ["models/models.h"],
5981 copts = xnnpack_std_cxxopts(),
5982 linkstatic = True,
5983 deps = [
5984 ":XNNPACK",
5985 "@FP16",
5986 "@pthreadpool",
5987 ],
5988)
5989
5990cc_library(
5991 name = "fp32_mobilenet_v3_large",
5992 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005993 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005994 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08005995 linkstatic = True,
5996 deps = [
5997 ":XNNPACK",
5998 "@pthreadpool",
5999 ],
6000)
6001
6002cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006003 name = "fp32_sparse_mobilenet_v3_large",
6004 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6005 hdrs = ["models/models.h"],
6006 copts = xnnpack_std_cxxopts(),
6007 linkstatic = True,
6008 deps = [
6009 ":XNNPACK",
6010 "@pthreadpool",
6011 ],
6012)
6013
6014cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006015 name = "fp16_mobilenet_v3_large",
6016 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6017 hdrs = ["models/models.h"],
6018 copts = xnnpack_std_cxxopts(),
6019 linkstatic = True,
6020 deps = [
6021 ":XNNPACK",
6022 "@FP16",
6023 "@pthreadpool",
6024 ],
6025)
6026
6027cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006028 name = "fp32_mobilenet_v3_small",
6029 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006030 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006031 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006032 linkstatic = True,
6033 deps = [
6034 ":XNNPACK",
6035 "@pthreadpool",
6036 ],
6037)
6038
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006039cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006040 name = "fp32_sparse_mobilenet_v3_small",
6041 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6042 hdrs = ["models/models.h"],
6043 copts = xnnpack_std_cxxopts(),
6044 linkstatic = True,
6045 deps = [
6046 ":XNNPACK",
6047 "@pthreadpool",
6048 ],
6049)
6050
6051cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006052 name = "fp16_mobilenet_v3_small",
6053 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6054 hdrs = ["models/models.h"],
6055 copts = xnnpack_std_cxxopts(),
6056 linkstatic = True,
6057 deps = [
6058 ":XNNPACK",
6059 "@FP16",
6060 "@pthreadpool",
6061 ],
6062)
6063
Marat Dukhanc068bb62019-10-04 13:24:39 -07006064xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006065 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006066 srcs = [
6067 "bench/f32-dwconv-e2e.cc",
6068 "bench/end2end.h",
6069 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006070 deps = MICROKERNEL_BENCHMARK_DEPS + [
6071 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006072 ":fp32_mobilenet_v1",
6073 ":fp32_mobilenet_v2",
6074 ":fp32_mobilenet_v3_large",
6075 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006076 ],
6077)
6078
6079xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006080 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006081 srcs = [
6082 "bench/f32-gemm-e2e.cc",
6083 "bench/end2end.h",
6084 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006085 deps = MICROKERNEL_BENCHMARK_DEPS + [
6086 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006087 ":fp32_mobilenet_v1",
6088 ":fp32_mobilenet_v2",
6089 ":fp32_mobilenet_v3_large",
6090 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006091 ],
6092)
6093
6094xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006095 name = "qs8_gemm_e2e_bench",
6096 srcs = [
6097 "bench/qs8-gemm-e2e.cc",
6098 "bench/end2end.h",
6099 ] + MICROKERNEL_BENCHMARK_HDRS,
6100 deps = MICROKERNEL_BENCHMARK_DEPS + [
6101 ":XNNPACK",
6102 ":qs8_mobilenet_v1",
6103 ":qs8_mobilenet_v2",
6104 ],
6105)
6106
6107xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006108 name = "end2end_bench",
6109 srcs = ["bench/end2end.cc"],
6110 deps = [
6111 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006112 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006113 ":fp16_mobilenet_v1",
6114 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006115 ":fp16_mobilenet_v3_large",
6116 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006117 ":fp32_mobilenet_v1",
6118 ":fp32_mobilenet_v2",
6119 ":fp32_mobilenet_v3_large",
6120 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006121 ":fp32_sparse_mobilenet_v1",
6122 ":fp32_sparse_mobilenet_v2",
6123 ":fp32_sparse_mobilenet_v3_large",
6124 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006125 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006126 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006127 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006128 "@pthreadpool",
6129 ],
6130)
6131
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006132#################### Accuracy evaluation for math functions ####################
6133
6134xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006135 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006136 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006137 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006138 "src/xnnpack/AlignedAllocator.h",
6139 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006140 deps = ACCURACY_EVAL_DEPS + [
6141 ":bench_utils",
6142 "@cpuinfo",
6143 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006144)
6145
Marat Dukhan515c9772019-10-17 18:07:57 -07006146xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006147 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006148 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006149 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006150 "src/xnnpack/AlignedAllocator.h",
6151 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006152 deps = ACCURACY_EVAL_DEPS + [
6153 ":bench_utils",
6154 "@cpuinfo",
6155 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006156)
6157
Marat Dukhan98ba4412019-10-23 02:14:28 -07006158xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006159 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006160 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006161 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006162 "src/xnnpack/AlignedAllocator.h",
6163 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006164 deps = ACCURACY_EVAL_DEPS + [
6165 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006166 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006167 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006168)
6169
6170xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006171 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006172 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006173 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006174 "src/xnnpack/AlignedAllocator.h",
6175 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006176 deps = ACCURACY_EVAL_DEPS + [
6177 ":bench_utils",
6178 "@cpuinfo",
6179 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006180)
6181
Marat Dukhanf44f0222020-12-14 11:53:27 -08006182xnnpack_benchmark(
6183 name = "f32_sigmoid_ulp_eval",
6184 srcs = [
6185 "eval/f32-sigmoid-ulp.cc",
6186 "src/xnnpack/AlignedAllocator.h",
6187 ] + ACCURACY_EVAL_HDRS,
6188 deps = ACCURACY_EVAL_DEPS + [
6189 ":bench_utils",
6190 "@cpuinfo",
6191 ],
6192)
6193
6194xnnpack_benchmark(
6195 name = "f32_sqrt_ulp_eval",
6196 srcs = [
6197 "eval/f32-sqrt-ulp.cc",
6198 "src/xnnpack/AlignedAllocator.h",
6199 ] + ACCURACY_EVAL_HDRS,
6200 deps = ACCURACY_EVAL_DEPS + [
6201 ":bench_utils",
6202 "@cpuinfo",
6203 ],
6204)
6205
6206################### Accuracy verification for math functions ##################
6207
6208xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006209 name = "f32_exp_eval",
6210 srcs = [
6211 "eval/f32-exp.cc",
6212 "src/xnnpack/AlignedAllocator.h",
6213 "src/xnnpack/math-stubs.h",
6214 ] + MICROKERNEL_TEST_HDRS,
6215 automatic = False,
6216 deps = MICROKERNEL_TEST_DEPS,
6217)
6218
6219xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006220 name = "f32_expm1minus_eval",
6221 srcs = [
6222 "eval/f32-expm1minus.cc",
6223 "src/xnnpack/AlignedAllocator.h",
6224 "src/xnnpack/math-stubs.h",
6225 ] + MICROKERNEL_TEST_HDRS,
6226 automatic = False,
6227 deps = MICROKERNEL_TEST_DEPS,
6228)
6229
Marat Dukhan8853b822020-05-07 12:19:01 -07006230xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006231 name = "f32_expminus_eval",
6232 srcs = [
6233 "eval/f32-expminus.cc",
6234 "src/xnnpack/AlignedAllocator.h",
6235 "src/xnnpack/math-stubs.h",
6236 ] + MICROKERNEL_TEST_HDRS,
6237 automatic = False,
6238 deps = MICROKERNEL_TEST_DEPS,
6239)
6240
6241xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006242 name = "f32_roundne_eval",
6243 srcs = [
6244 "eval/f32-roundne.cc",
6245 "src/xnnpack/AlignedAllocator.h",
6246 "src/xnnpack/math-stubs.h",
6247 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006248 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006249 deps = MICROKERNEL_TEST_DEPS,
6250)
6251
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006252xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006253 name = "f32_roundd_eval",
6254 srcs = [
6255 "eval/f32-roundd.cc",
6256 "src/xnnpack/AlignedAllocator.h",
6257 "src/xnnpack/math-stubs.h",
6258 ] + MICROKERNEL_TEST_HDRS,
6259 automatic = False,
6260 deps = MICROKERNEL_TEST_DEPS,
6261)
6262
6263xnnpack_unit_test(
6264 name = "f32_roundu_eval",
6265 srcs = [
6266 "eval/f32-roundu.cc",
6267 "src/xnnpack/AlignedAllocator.h",
6268 "src/xnnpack/math-stubs.h",
6269 ] + MICROKERNEL_TEST_HDRS,
6270 automatic = False,
6271 deps = MICROKERNEL_TEST_DEPS,
6272)
6273
6274xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006275 name = "f32_roundz_eval",
6276 srcs = [
6277 "eval/f32-roundz.cc",
6278 "src/xnnpack/AlignedAllocator.h",
6279 "src/xnnpack/math-stubs.h",
6280 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006281 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006282 deps = MICROKERNEL_TEST_DEPS,
6283)
6284
Marat Dukhan08c4a432019-10-03 09:29:21 -07006285######################### Unit tests for micro-kernels #########################
6286
6287xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006288 name = "f16_dwconv_minmax_test",
6289 srcs = [
6290 "test/f16-dwconv-minmax.cc",
6291 "test/dwconv-microkernel-tester.h",
6292 "src/xnnpack/AlignedAllocator.h",
6293 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6294 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6295)
6296
6297xnnpack_unit_test(
6298 name = "f16_gavgpool_minmax_test",
6299 srcs = [
6300 "test/f16-gavgpool-minmax.cc",
6301 "test/gavgpool-microkernel-tester.h",
6302 "src/xnnpack/AlignedAllocator.h",
6303 ] + MICROKERNEL_TEST_HDRS,
6304 deps = MICROKERNEL_TEST_DEPS,
6305)
6306
6307xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006308 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006309 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006310 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006311 "test/gemm-microkernel-tester.h",
6312 "src/xnnpack/AlignedAllocator.h",
6313 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006314 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006315)
6316
6317xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006318 name = "f16_igemm_minmax_test",
6319 srcs = [
6320 "test/f16-igemm-minmax.cc",
6321 "test/gemm-microkernel-tester.h",
6322 "src/xnnpack/AlignedAllocator.h",
6323 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6324 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6325)
6326
6327xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006328 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006329 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006330 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006331 "test/spmm-microkernel-tester.h",
6332 "src/xnnpack/AlignedAllocator.h",
6333 ] + MICROKERNEL_TEST_HDRS,
6334 deps = MICROKERNEL_TEST_DEPS,
6335)
6336
6337xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006338 name = "f16_vadd_minmax_test",
6339 srcs = [
6340 "test/f16-vadd-minmax.cc",
6341 "test/vbinary-microkernel-tester.h",
6342 ] + MICROKERNEL_TEST_HDRS,
6343 deps = MICROKERNEL_TEST_DEPS,
6344)
6345
6346xnnpack_unit_test(
6347 name = "f16_vaddc_minmax_test",
6348 srcs = [
6349 "test/f16-vaddc-minmax.cc",
6350 "test/vbinaryc-microkernel-tester.h",
6351 ] + MICROKERNEL_TEST_HDRS,
6352 deps = MICROKERNEL_TEST_DEPS,
6353)
6354
6355xnnpack_unit_test(
6356 name = "f16_vclamp_test",
6357 srcs = [
6358 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006359 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006360 ] + MICROKERNEL_TEST_HDRS,
6361 deps = MICROKERNEL_TEST_DEPS,
6362)
6363
6364xnnpack_unit_test(
6365 name = "f16_vdiv_minmax_test",
6366 srcs = [
6367 "test/f16-vdiv-minmax.cc",
6368 "test/vbinary-microkernel-tester.h",
6369 ] + MICROKERNEL_TEST_HDRS,
6370 deps = MICROKERNEL_TEST_DEPS,
6371)
6372
6373xnnpack_unit_test(
6374 name = "f16_vdivc_minmax_test",
6375 srcs = [
6376 "test/f16-vdivc-minmax.cc",
6377 "test/vbinaryc-microkernel-tester.h",
6378 ] + MICROKERNEL_TEST_HDRS,
6379 deps = MICROKERNEL_TEST_DEPS,
6380)
6381
6382xnnpack_unit_test(
6383 name = "f16_vrdivc_minmax_test",
6384 srcs = [
6385 "test/f16-vrdivc-minmax.cc",
6386 "test/vbinaryc-microkernel-tester.h",
6387 ] + MICROKERNEL_TEST_HDRS,
6388 deps = MICROKERNEL_TEST_DEPS,
6389)
6390
6391xnnpack_unit_test(
6392 name = "f16_vhswish_test",
6393 srcs = [
6394 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006395 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006396 ] + MICROKERNEL_TEST_HDRS,
6397 deps = MICROKERNEL_TEST_DEPS,
6398)
6399
6400xnnpack_unit_test(
6401 name = "f16_vmax_test",
6402 srcs = [
6403 "test/f16-vmax.cc",
6404 "test/vbinary-microkernel-tester.h",
6405 ] + MICROKERNEL_TEST_HDRS,
6406 deps = MICROKERNEL_TEST_DEPS,
6407)
6408
6409xnnpack_unit_test(
6410 name = "f16_vmaxc_test",
6411 srcs = [
6412 "test/f16-vmaxc.cc",
6413 "test/vbinaryc-microkernel-tester.h",
6414 ] + MICROKERNEL_TEST_HDRS,
6415 deps = MICROKERNEL_TEST_DEPS,
6416)
6417
6418xnnpack_unit_test(
6419 name = "f16_vmin_test",
6420 srcs = [
6421 "test/f16-vmin.cc",
6422 "test/vbinary-microkernel-tester.h",
6423 ] + MICROKERNEL_TEST_HDRS,
6424 deps = MICROKERNEL_TEST_DEPS,
6425)
6426
6427xnnpack_unit_test(
6428 name = "f16_vminc_test",
6429 srcs = [
6430 "test/f16-vminc.cc",
6431 "test/vbinaryc-microkernel-tester.h",
6432 ] + MICROKERNEL_TEST_HDRS,
6433 deps = MICROKERNEL_TEST_DEPS,
6434)
6435
6436xnnpack_unit_test(
6437 name = "f16_vmul_minmax_test",
6438 srcs = [
6439 "test/f16-vmul-minmax.cc",
6440 "test/vbinary-microkernel-tester.h",
6441 ] + MICROKERNEL_TEST_HDRS,
6442 deps = MICROKERNEL_TEST_DEPS,
6443)
6444
6445xnnpack_unit_test(
6446 name = "f16_vmulc_minmax_test",
6447 srcs = [
6448 "test/f16-vmulc-minmax.cc",
6449 "test/vbinaryc-microkernel-tester.h",
6450 ] + MICROKERNEL_TEST_HDRS,
6451 deps = MICROKERNEL_TEST_DEPS,
6452)
6453
6454xnnpack_unit_test(
6455 name = "f16_vmulcaddc_minmax_test",
6456 srcs = [
6457 "test/f16-vmulcaddc-minmax.cc",
6458 "test/vmulcaddc-microkernel-tester.h",
6459 "src/xnnpack/AlignedAllocator.h",
6460 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6461 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6462)
6463
6464xnnpack_unit_test(
6465 name = "f16_vsub_minmax_test",
6466 srcs = [
6467 "test/f16-vsub-minmax.cc",
6468 "test/vbinary-microkernel-tester.h",
6469 ] + MICROKERNEL_TEST_HDRS,
6470 deps = MICROKERNEL_TEST_DEPS,
6471)
6472
6473xnnpack_unit_test(
6474 name = "f16_vsubc_minmax_test",
6475 srcs = [
6476 "test/f16-vsubc-minmax.cc",
6477 "test/vbinaryc-microkernel-tester.h",
6478 ] + MICROKERNEL_TEST_HDRS,
6479 deps = MICROKERNEL_TEST_DEPS,
6480)
6481
6482xnnpack_unit_test(
6483 name = "f16_vrsubc_minmax_test",
6484 srcs = [
6485 "test/f16-vrsubc-minmax.cc",
6486 "test/vbinaryc-microkernel-tester.h",
6487 ] + MICROKERNEL_TEST_HDRS,
6488 deps = MICROKERNEL_TEST_DEPS,
6489)
6490
6491xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006492 name = "f32_argmaxpool_test",
6493 srcs = [
6494 "test/f32-argmaxpool.cc",
6495 "test/argmaxpool-microkernel-tester.h",
6496 "src/xnnpack/AlignedAllocator.h",
6497 ] + MICROKERNEL_TEST_HDRS,
6498 deps = MICROKERNEL_TEST_DEPS,
6499)
6500
6501xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006502 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006503 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006504 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006505 "test/avgpool-microkernel-tester.h",
6506 "src/xnnpack/AlignedAllocator.h",
6507 ] + MICROKERNEL_TEST_HDRS,
6508 deps = MICROKERNEL_TEST_DEPS,
6509)
6510
6511xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006512 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006513 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006514 "test/f32-ibilinear.cc",
6515 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006516 "src/xnnpack/AlignedAllocator.h",
6517 ] + MICROKERNEL_TEST_HDRS,
6518 deps = MICROKERNEL_TEST_DEPS,
6519)
6520
6521xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006522 name = "f32_ibilinear_chw_test",
6523 srcs = [
6524 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006525 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006526 "src/xnnpack/AlignedAllocator.h",
6527 ] + MICROKERNEL_TEST_HDRS,
6528 deps = MICROKERNEL_TEST_DEPS,
6529)
6530
6531xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006532 name = "f32_igemm_test",
6533 srcs = [
6534 "test/f32-igemm.cc",
6535 "test/gemm-microkernel-tester.h",
6536 "src/xnnpack/AlignedAllocator.h",
6537 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006538 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006539)
6540
6541xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006542 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006543 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006544 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006545 "test/gemm-microkernel-tester.h",
6546 "src/xnnpack/AlignedAllocator.h",
6547 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006548 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006549)
6550
6551xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006552 name = "f32_igemm_minmax_test",
6553 srcs = [
6554 "test/f32-igemm-minmax.cc",
6555 "test/gemm-microkernel-tester.h",
6556 "src/xnnpack/AlignedAllocator.h",
6557 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006558 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006559)
6560
6561xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006562 name = "f32_conv_hwc_test",
6563 srcs = [
6564 "test/f32-conv-hwc.cc",
6565 "test/conv-hwc-microkernel-tester.h",
6566 "src/xnnpack/AlignedAllocator.h",
6567 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006568 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006569)
6570
6571xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006572 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006573 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006574 "test/f32-conv-hwc2chw.cc",
6575 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006576 "src/xnnpack/AlignedAllocator.h",
6577 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006578 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006579)
6580
6581xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006582 name = "f32_dwconv_test",
6583 srcs = [
6584 "test/f32-dwconv.cc",
6585 "test/dwconv-microkernel-tester.h",
6586 "src/xnnpack/AlignedAllocator.h",
6587 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006588 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006589)
6590
6591xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006592 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006593 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006594 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006595 "test/dwconv-microkernel-tester.h",
6596 "src/xnnpack/AlignedAllocator.h",
6597 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006598 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006599)
6600
6601xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006602 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006603 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006604 "test/f32-dwconv2d-chw.cc",
6605 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006606 "src/xnnpack/AlignedAllocator.h",
6607 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006608 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006609)
6610
6611xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006612 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006613 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006614 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006615 "test/gavgpool-microkernel-tester.h",
6616 "src/xnnpack/AlignedAllocator.h",
6617 ] + MICROKERNEL_TEST_HDRS,
6618 deps = MICROKERNEL_TEST_DEPS,
6619)
6620
6621xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006622 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006623 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006624 "test/f32-gavgpool-cw.cc",
6625 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006626 "src/xnnpack/AlignedAllocator.h",
6627 ] + MICROKERNEL_TEST_HDRS,
6628 deps = MICROKERNEL_TEST_DEPS,
6629)
6630
6631xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006632 name = "f32_gemm_test",
6633 srcs = [
6634 "test/f32-gemm.cc",
6635 "test/gemm-microkernel-tester.h",
6636 "src/xnnpack/AlignedAllocator.h",
6637 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006638 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006639)
6640
6641xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006642 name = "f32_gemm_relu_test",
6643 srcs = [
6644 "test/f32-gemm-relu.cc",
6645 "test/gemm-microkernel-tester.h",
6646 "src/xnnpack/AlignedAllocator.h",
6647 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006648 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006649)
6650
6651xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006652 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006653 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006654 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006655 "test/gemm-microkernel-tester.h",
6656 "src/xnnpack/AlignedAllocator.h",
6657 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006658 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006659)
6660
6661xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006662 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006663 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006664 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006665 "test/gemm-microkernel-tester.h",
6666 "src/xnnpack/AlignedAllocator.h",
6667 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006668 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006669)
6670
6671xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006672 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006673 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006674 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006675 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006676 ] + MICROKERNEL_TEST_HDRS,
6677 deps = MICROKERNEL_TEST_DEPS,
6678)
6679
6680xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006681 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006682 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006683 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006684 "test/maxpool-microkernel-tester.h",
6685 ] + MICROKERNEL_TEST_HDRS,
6686 deps = MICROKERNEL_TEST_DEPS,
6687)
6688
6689xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006690 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006691 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006692 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006693 "test/avgpool-microkernel-tester.h",
6694 "src/xnnpack/AlignedAllocator.h",
6695 ] + MICROKERNEL_TEST_HDRS,
6696 deps = MICROKERNEL_TEST_DEPS,
6697)
6698
6699xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006700 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006701 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006702 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006703 "test/gemm-microkernel-tester.h",
6704 "src/xnnpack/AlignedAllocator.h",
6705 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006706 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006707)
6708
6709xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006710 name = "f16_prelu_test",
6711 srcs = [
6712 "test/f16-prelu.cc",
6713 "test/prelu-microkernel-tester.h",
6714 "src/xnnpack/AlignedAllocator.h",
6715 ] + MICROKERNEL_TEST_HDRS,
6716 deps = MICROKERNEL_TEST_DEPS,
6717)
6718
6719xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006720 name = "f32_prelu_test",
6721 srcs = [
6722 "test/f32-prelu.cc",
6723 "test/prelu-microkernel-tester.h",
6724 "src/xnnpack/AlignedAllocator.h",
6725 ] + MICROKERNEL_TEST_HDRS,
6726 deps = MICROKERNEL_TEST_DEPS,
6727)
6728
6729xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006730 name = "f32_raddexpminusmax_test",
6731 srcs = [
6732 "test/f32-raddexpminusmax.cc",
6733 "test/raddexpminusmax-microkernel-tester.h",
6734 ] + MICROKERNEL_TEST_HDRS,
6735 deps = MICROKERNEL_TEST_DEPS,
6736)
6737
6738xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006739 name = "f32_raddextexp_test",
6740 srcs = [
6741 "test/f32-raddextexp.cc",
6742 "test/raddextexp-microkernel-tester.h",
6743 ] + MICROKERNEL_TEST_HDRS,
6744 deps = MICROKERNEL_TEST_DEPS,
6745)
6746
6747xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006748 name = "f32_raddstoreexpminusmax_test",
6749 srcs = [
6750 "test/f32-raddstoreexpminusmax.cc",
6751 "test/raddstoreexpminusmax-microkernel-tester.h",
6752 ] + MICROKERNEL_TEST_HDRS,
6753 deps = MICROKERNEL_TEST_DEPS,
6754)
6755
6756xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006757 name = "f32_rmax_test",
6758 srcs = [
6759 "test/f32-rmax.cc",
6760 "test/rmax-microkernel-tester.h",
6761 ] + MICROKERNEL_TEST_HDRS,
6762 deps = MICROKERNEL_TEST_DEPS,
6763)
6764
6765xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006766 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006767 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006768 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006769 "test/spmm-microkernel-tester.h",
6770 "src/xnnpack/AlignedAllocator.h",
6771 ] + MICROKERNEL_TEST_HDRS,
6772 deps = MICROKERNEL_TEST_DEPS,
6773)
6774
6775xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006776 name = "f32_vabs_test",
6777 srcs = [
6778 "test/f32-vabs.cc",
6779 "test/vunary-microkernel-tester.h",
6780 ] + MICROKERNEL_TEST_HDRS,
6781 deps = MICROKERNEL_TEST_DEPS,
6782)
6783
6784xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006785 name = "f32_vadd_test",
6786 srcs = [
6787 "test/f32-vadd.cc",
6788 "test/vbinary-microkernel-tester.h",
6789 ] + MICROKERNEL_TEST_HDRS,
6790 deps = MICROKERNEL_TEST_DEPS,
6791)
6792
6793xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006794 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006795 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006796 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006797 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006798 ] + MICROKERNEL_TEST_HDRS,
6799 deps = MICROKERNEL_TEST_DEPS,
6800)
6801
6802xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006803 name = "f32_vadd_relu_test",
6804 srcs = [
6805 "test/f32-vadd-relu.cc",
6806 "test/vbinary-microkernel-tester.h",
6807 ] + MICROKERNEL_TEST_HDRS,
6808 deps = MICROKERNEL_TEST_DEPS,
6809)
6810
6811xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006812 name = "f32_vaddc_test",
6813 srcs = [
6814 "test/f32-vaddc.cc",
6815 "test/vbinaryc-microkernel-tester.h",
6816 ] + MICROKERNEL_TEST_HDRS,
6817 deps = MICROKERNEL_TEST_DEPS,
6818)
6819
6820xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006821 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006822 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006823 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006824 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006825 ] + MICROKERNEL_TEST_HDRS,
6826 deps = MICROKERNEL_TEST_DEPS,
6827)
6828
6829xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006830 name = "f32_vaddc_relu_test",
6831 srcs = [
6832 "test/f32-vaddc-relu.cc",
6833 "test/vbinaryc-microkernel-tester.h",
6834 ] + MICROKERNEL_TEST_HDRS,
6835 deps = MICROKERNEL_TEST_DEPS,
6836)
6837
6838xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006839 name = "f32_vclamp_test",
6840 srcs = [
6841 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006842 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006843 ] + MICROKERNEL_TEST_HDRS,
6844 deps = MICROKERNEL_TEST_DEPS,
6845)
6846
6847xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006848 name = "f32_vdiv_test",
6849 srcs = [
6850 "test/f32-vdiv.cc",
6851 "test/vbinary-microkernel-tester.h",
6852 ] + MICROKERNEL_TEST_HDRS,
6853 deps = MICROKERNEL_TEST_DEPS,
6854)
6855
6856xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006857 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006858 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006859 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006860 "test/vbinary-microkernel-tester.h",
6861 ] + MICROKERNEL_TEST_HDRS,
6862 deps = MICROKERNEL_TEST_DEPS,
6863)
6864
6865xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006866 name = "f32_vdiv_relu_test",
6867 srcs = [
6868 "test/f32-vdiv-relu.cc",
6869 "test/vbinary-microkernel-tester.h",
6870 ] + MICROKERNEL_TEST_HDRS,
6871 deps = MICROKERNEL_TEST_DEPS,
6872)
6873
6874xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006875 name = "f32_vdivc_test",
6876 srcs = [
6877 "test/f32-vdivc.cc",
6878 "test/vbinaryc-microkernel-tester.h",
6879 ] + MICROKERNEL_TEST_HDRS,
6880 deps = MICROKERNEL_TEST_DEPS,
6881)
6882
6883xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006884 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006885 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006886 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006887 "test/vbinaryc-microkernel-tester.h",
6888 ] + MICROKERNEL_TEST_HDRS,
6889 deps = MICROKERNEL_TEST_DEPS,
6890)
6891
6892xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006893 name = "f32_vdivc_relu_test",
6894 srcs = [
6895 "test/f32-vdivc-relu.cc",
6896 "test/vbinaryc-microkernel-tester.h",
6897 ] + MICROKERNEL_TEST_HDRS,
6898 deps = MICROKERNEL_TEST_DEPS,
6899)
6900
6901xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006902 name = "f32_vrdivc_test",
6903 srcs = [
6904 "test/f32-vrdivc.cc",
6905 "test/vbinaryc-microkernel-tester.h",
6906 ] + MICROKERNEL_TEST_HDRS,
6907 deps = MICROKERNEL_TEST_DEPS,
6908)
6909
6910xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006911 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006912 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006913 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006914 "test/vbinaryc-microkernel-tester.h",
6915 ] + MICROKERNEL_TEST_HDRS,
6916 deps = MICROKERNEL_TEST_DEPS,
6917)
6918
6919xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006920 name = "f32_vrdivc_relu_test",
6921 srcs = [
6922 "test/f32-vrdivc-relu.cc",
6923 "test/vbinaryc-microkernel-tester.h",
6924 ] + MICROKERNEL_TEST_HDRS,
6925 deps = MICROKERNEL_TEST_DEPS,
6926)
6927
6928xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006929 name = "f32_velu_test",
6930 srcs = [
6931 "test/f32-velu.cc",
6932 "test/vunary-microkernel-tester.h",
6933 ] + MICROKERNEL_TEST_HDRS,
6934 deps = MICROKERNEL_TEST_DEPS,
6935)
6936
6937xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08006938 name = "f32_vmax_test",
6939 srcs = [
6940 "test/f32-vmax.cc",
6941 "test/vbinary-microkernel-tester.h",
6942 ] + MICROKERNEL_TEST_HDRS,
6943 deps = MICROKERNEL_TEST_DEPS,
6944)
6945
6946xnnpack_unit_test(
6947 name = "f32_vmaxc_test",
6948 srcs = [
6949 "test/f32-vmaxc.cc",
6950 "test/vbinaryc-microkernel-tester.h",
6951 ] + MICROKERNEL_TEST_HDRS,
6952 deps = MICROKERNEL_TEST_DEPS,
6953)
6954
6955xnnpack_unit_test(
6956 name = "f32_vmin_test",
6957 srcs = [
6958 "test/f32-vmin.cc",
6959 "test/vbinary-microkernel-tester.h",
6960 ] + MICROKERNEL_TEST_HDRS,
6961 deps = MICROKERNEL_TEST_DEPS,
6962)
6963
6964xnnpack_unit_test(
6965 name = "f32_vminc_test",
6966 srcs = [
6967 "test/f32-vminc.cc",
6968 "test/vbinaryc-microkernel-tester.h",
6969 ] + MICROKERNEL_TEST_HDRS,
6970 deps = MICROKERNEL_TEST_DEPS,
6971)
6972
6973xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006974 name = "f32_vmul_test",
6975 srcs = [
6976 "test/f32-vmul.cc",
6977 "test/vbinary-microkernel-tester.h",
6978 ] + MICROKERNEL_TEST_HDRS,
6979 deps = MICROKERNEL_TEST_DEPS,
6980)
6981
6982xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006983 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006984 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006985 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006986 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006987 ] + MICROKERNEL_TEST_HDRS,
6988 deps = MICROKERNEL_TEST_DEPS,
6989)
6990
6991xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006992 name = "f32_vmul_relu_test",
6993 srcs = [
6994 "test/f32-vmul-relu.cc",
6995 "test/vbinary-microkernel-tester.h",
6996 ] + MICROKERNEL_TEST_HDRS,
6997 deps = MICROKERNEL_TEST_DEPS,
6998)
6999
7000xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007001 name = "f32_vmulc_test",
7002 srcs = [
7003 "test/f32-vmulc.cc",
7004 "test/vbinaryc-microkernel-tester.h",
7005 ] + MICROKERNEL_TEST_HDRS,
7006 deps = MICROKERNEL_TEST_DEPS,
7007)
7008
7009xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007010 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007011 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007012 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007013 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007014 ] + MICROKERNEL_TEST_HDRS,
7015 deps = MICROKERNEL_TEST_DEPS,
7016)
7017
7018xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007019 name = "f32_vmulc_relu_test",
7020 srcs = [
7021 "test/f32-vmulc-relu.cc",
7022 "test/vbinaryc-microkernel-tester.h",
7023 ] + MICROKERNEL_TEST_HDRS,
7024 deps = MICROKERNEL_TEST_DEPS,
7025)
7026
7027xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007028 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007029 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007030 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007031 "test/vmulcaddc-microkernel-tester.h",
7032 "src/xnnpack/AlignedAllocator.h",
7033 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007034 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007035)
7036
7037xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007038 name = "f32_vlrelu_test",
7039 srcs = [
7040 "test/f32-vlrelu.cc",
7041 "test/vunary-microkernel-tester.h",
7042 ] + MICROKERNEL_TEST_HDRS,
7043 deps = MICROKERNEL_TEST_DEPS,
7044)
7045
7046xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007047 name = "f32_vneg_test",
7048 srcs = [
7049 "test/f32-vneg.cc",
7050 "test/vunary-microkernel-tester.h",
7051 ] + MICROKERNEL_TEST_HDRS,
7052 deps = MICROKERNEL_TEST_DEPS,
7053)
7054
7055xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007056 name = "f32_vrelu_test",
7057 srcs = [
7058 "test/f32-vrelu.cc",
7059 "test/vunary-microkernel-tester.h",
7060 ] + MICROKERNEL_TEST_HDRS,
7061 deps = MICROKERNEL_TEST_DEPS,
7062)
7063
7064xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007065 name = "f32_vrndne_test",
7066 srcs = [
7067 "test/f32-vrndne.cc",
7068 "test/vunary-microkernel-tester.h",
7069 ] + MICROKERNEL_TEST_HDRS,
7070 deps = MICROKERNEL_TEST_DEPS,
7071)
7072
7073xnnpack_unit_test(
7074 name = "f32_vrndz_test",
7075 srcs = [
7076 "test/f32-vrndz.cc",
7077 "test/vunary-microkernel-tester.h",
7078 ] + MICROKERNEL_TEST_HDRS,
7079 deps = MICROKERNEL_TEST_DEPS,
7080)
7081
7082xnnpack_unit_test(
7083 name = "f32_vrndu_test",
7084 srcs = [
7085 "test/f32-vrndu.cc",
7086 "test/vunary-microkernel-tester.h",
7087 ] + MICROKERNEL_TEST_HDRS,
7088 deps = MICROKERNEL_TEST_DEPS,
7089)
7090
7091xnnpack_unit_test(
7092 name = "f32_vrndd_test",
7093 srcs = [
7094 "test/f32-vrndd.cc",
7095 "test/vunary-microkernel-tester.h",
7096 ] + MICROKERNEL_TEST_HDRS,
7097 deps = MICROKERNEL_TEST_DEPS,
7098)
7099
7100xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007101 name = "f32_vscale_test",
7102 srcs = [
7103 "test/f32-vscale.cc",
7104 "test/vscale-microkernel-tester.h",
7105 ] + MICROKERNEL_TEST_HDRS,
7106 deps = MICROKERNEL_TEST_DEPS,
7107)
7108
7109xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007110 name = "f32_vscaleexpminusmax_test",
7111 srcs = [
7112 "test/f32-vscaleexpminusmax.cc",
7113 "test/vscaleexpminusmax-microkernel-tester.h",
7114 ] + MICROKERNEL_TEST_HDRS,
7115 deps = MICROKERNEL_TEST_DEPS,
7116)
7117
7118xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007119 name = "f32_vscaleextexp_test",
7120 srcs = [
7121 "test/f32-vscaleextexp.cc",
7122 "test/vscaleextexp-microkernel-tester.h",
7123 ] + MICROKERNEL_TEST_HDRS,
7124 deps = MICROKERNEL_TEST_DEPS,
7125)
7126
7127xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007128 name = "f32_vsigmoid_test",
7129 srcs = [
7130 "test/f32-vsigmoid.cc",
7131 "test/vunary-microkernel-tester.h",
7132 ] + MICROKERNEL_TEST_HDRS,
7133 deps = MICROKERNEL_TEST_DEPS,
7134)
7135
7136xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007137 name = "f32_vsqr_test",
7138 srcs = [
7139 "test/f32-vsqr.cc",
7140 "test/vunary-microkernel-tester.h",
7141 ] + MICROKERNEL_TEST_HDRS,
7142 deps = MICROKERNEL_TEST_DEPS,
7143)
7144
7145xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007146 name = "f32_vsqrdiff_test",
7147 srcs = [
7148 "test/f32-vsqrdiff.cc",
7149 "test/vbinary-microkernel-tester.h",
7150 ] + MICROKERNEL_TEST_HDRS,
7151 deps = MICROKERNEL_TEST_DEPS,
7152)
7153
7154xnnpack_unit_test(
7155 name = "f32_vsqrdiffc_test",
7156 srcs = [
7157 "test/f32-vsqrdiffc.cc",
7158 "test/vbinaryc-microkernel-tester.h",
7159 ] + MICROKERNEL_TEST_HDRS,
7160 deps = MICROKERNEL_TEST_DEPS,
7161)
7162
7163xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007164 name = "f32_vsqrt_test",
7165 srcs = [
7166 "test/f32-vsqrt.cc",
7167 "test/vunary-microkernel-tester.h",
7168 ] + MICROKERNEL_TEST_HDRS,
7169 deps = MICROKERNEL_TEST_DEPS,
7170)
7171
7172xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007173 name = "f32_vsub_test",
7174 srcs = [
7175 "test/f32-vsub.cc",
7176 "test/vbinary-microkernel-tester.h",
7177 ] + MICROKERNEL_TEST_HDRS,
7178 deps = MICROKERNEL_TEST_DEPS,
7179)
7180
7181xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007182 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007183 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007184 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007185 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007186 ] + MICROKERNEL_TEST_HDRS,
7187 deps = MICROKERNEL_TEST_DEPS,
7188)
7189
7190xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007191 name = "f32_vsub_relu_test",
7192 srcs = [
7193 "test/f32-vsub-relu.cc",
7194 "test/vbinary-microkernel-tester.h",
7195 ] + MICROKERNEL_TEST_HDRS,
7196 deps = MICROKERNEL_TEST_DEPS,
7197)
7198
7199xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007200 name = "f32_vsubc_test",
7201 srcs = [
7202 "test/f32-vsubc.cc",
7203 "test/vbinaryc-microkernel-tester.h",
7204 ] + MICROKERNEL_TEST_HDRS,
7205 deps = MICROKERNEL_TEST_DEPS,
7206)
7207
7208xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007209 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007210 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007211 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007212 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007213 ] + MICROKERNEL_TEST_HDRS,
7214 deps = MICROKERNEL_TEST_DEPS,
7215)
7216
7217xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007218 name = "f32_vsubc_relu_test",
7219 srcs = [
7220 "test/f32-vsubc-relu.cc",
7221 "test/vbinaryc-microkernel-tester.h",
7222 ] + MICROKERNEL_TEST_HDRS,
7223 deps = MICROKERNEL_TEST_DEPS,
7224)
7225
7226xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007227 name = "f32_vrsubc_test",
7228 srcs = [
7229 "test/f32-vrsubc.cc",
7230 "test/vbinaryc-microkernel-tester.h",
7231 ] + MICROKERNEL_TEST_HDRS,
7232 deps = MICROKERNEL_TEST_DEPS,
7233)
7234
7235xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007236 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007237 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007238 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007239 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007240 ] + MICROKERNEL_TEST_HDRS,
7241 deps = MICROKERNEL_TEST_DEPS,
7242)
7243
7244xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007245 name = "f32_vrsubc_relu_test",
7246 srcs = [
7247 "test/f32-vrsubc-relu.cc",
7248 "test/vbinaryc-microkernel-tester.h",
7249 ] + MICROKERNEL_TEST_HDRS,
7250 deps = MICROKERNEL_TEST_DEPS,
7251)
7252
7253xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007254 name = "qc8_dwconv_minmax_fp32_test",
7255 timeout = "moderate",
7256 srcs = [
7257 "test/qc8-dwconv-minmax-fp32.cc",
7258 "test/dwconv-microkernel-tester.h",
7259 "src/xnnpack/AlignedAllocator.h",
7260 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7261 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7262)
7263
7264xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007265 name = "qc8_gemm_minmax_fp32_test",
7266 timeout = "moderate",
7267 srcs = [
7268 "test/qc8-gemm-minmax-fp32.cc",
7269 "test/gemm-microkernel-tester.h",
7270 "src/xnnpack/AlignedAllocator.h",
7271 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7272 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7273)
7274
7275xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007276 name = "qc8_igemm_minmax_fp32_test",
7277 timeout = "moderate",
7278 srcs = [
7279 "test/qc8-igemm-minmax-fp32.cc",
7280 "test/gemm-microkernel-tester.h",
7281 "src/xnnpack/AlignedAllocator.h",
7282 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7283 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7284)
7285
7286xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007287 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007288 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007289 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007290 "test/dwconv-microkernel-tester.h",
7291 "src/xnnpack/AlignedAllocator.h",
7292 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7293 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7294)
7295
7296xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007297 name = "qs8_dwconv_minmax_fp32_test",
7298 srcs = [
7299 "test/qs8-dwconv-minmax-fp32.cc",
7300 "test/dwconv-microkernel-tester.h",
7301 "src/xnnpack/AlignedAllocator.h",
7302 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7303 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7304)
7305
7306xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007307 name = "qs8_gavgpool_minmax_test",
7308 srcs = [
7309 "test/qs8-gavgpool-minmax.cc",
7310 "test/gavgpool-microkernel-tester.h",
7311 "src/xnnpack/AlignedAllocator.h",
7312 ] + MICROKERNEL_TEST_HDRS,
7313 deps = MICROKERNEL_TEST_DEPS,
7314)
7315
7316xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007317 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007318 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007319 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007320 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007321 "test/gemm-microkernel-tester.h",
7322 "src/xnnpack/AlignedAllocator.h",
7323 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7324 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7325)
7326
7327xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007328 name = "qs8_gemm_minmax_fp32_test",
7329 timeout = "moderate",
7330 srcs = [
7331 "test/qs8-gemm-minmax-fp32.cc",
7332 "test/gemm-microkernel-tester.h",
7333 "src/xnnpack/AlignedAllocator.h",
7334 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7335 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7336)
7337
7338xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007339 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007340 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007341 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007342 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007343 "test/gemm-microkernel-tester.h",
7344 "src/xnnpack/AlignedAllocator.h",
7345 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7346 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7347)
7348
7349xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007350 name = "qs8_igemm_minmax_fp32_test",
7351 timeout = "moderate",
7352 srcs = [
7353 "test/qs8-igemm-minmax-fp32.cc",
7354 "test/gemm-microkernel-tester.h",
7355 "src/xnnpack/AlignedAllocator.h",
7356 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7357 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7358)
7359
7360xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007361 name = "qs8_requantization_test",
7362 srcs = [
7363 "src/xnnpack/requantization-stubs.h",
7364 "test/qs8-requantization.cc",
7365 "test/requantization-tester.h",
7366 ] + MICROKERNEL_TEST_HDRS,
7367 deps = MICROKERNEL_TEST_DEPS,
7368)
7369
7370xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007371 name = "qs8_vadd_minmax_test",
7372 srcs = [
7373 "test/qs8-vadd-minmax.cc",
7374 "test/vadd-microkernel-tester.h",
7375 ] + MICROKERNEL_TEST_HDRS,
7376 deps = MICROKERNEL_TEST_DEPS,
7377)
7378
7379xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007380 name = "qs8_vaddc_minmax_test",
7381 srcs = [
7382 "test/qs8-vaddc-minmax.cc",
7383 "test/vaddc-microkernel-tester.h",
7384 ] + MICROKERNEL_TEST_HDRS,
7385 deps = MICROKERNEL_TEST_DEPS,
7386)
7387
7388xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007389 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007390 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007391 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007392 "test/avgpool-microkernel-tester.h",
7393 "src/xnnpack/AlignedAllocator.h",
7394 ] + MICROKERNEL_TEST_HDRS,
7395 deps = MICROKERNEL_TEST_DEPS,
7396)
7397
7398xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007399 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007400 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007401 "test/qu8-dwconv-minmax.cc",
7402 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007403 "src/xnnpack/AlignedAllocator.h",
7404 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007405 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007406)
7407
7408xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007409 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007410 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007411 "test/qu8-igemm-minmax.cc",
7412 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007413 "src/xnnpack/AlignedAllocator.h",
7414 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007415 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007416)
7417
7418xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007419 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007420 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007421 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007422 "test/gavgpool-microkernel-tester.h",
7423 "src/xnnpack/AlignedAllocator.h",
7424 ] + MICROKERNEL_TEST_HDRS,
7425 deps = MICROKERNEL_TEST_DEPS,
7426)
7427
7428xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007429 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007430 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007431 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007432 "test/gemm-microkernel-tester.h",
7433 "src/xnnpack/AlignedAllocator.h",
7434 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007435 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007436)
7437
7438xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007439 name = "qu8_requantization_test",
7440 srcs = [
7441 "src/xnnpack/requantization-stubs.h",
7442 "test/qu8-requantization.cc",
7443 "test/requantization-tester.h",
7444 ] + MICROKERNEL_TEST_HDRS,
7445 deps = MICROKERNEL_TEST_DEPS,
7446)
7447
7448xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007449 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007450 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007451 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007452 "test/vadd-microkernel-tester.h",
7453 ] + MICROKERNEL_TEST_HDRS,
7454 deps = MICROKERNEL_TEST_DEPS,
7455)
7456
7457xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007458 name = "u8_lut32norm_test",
7459 srcs = [
7460 "test/u8-lut32norm.cc",
7461 "test/lut-norm-microkernel-tester.h",
7462 ] + MICROKERNEL_TEST_HDRS,
7463 deps = MICROKERNEL_TEST_DEPS,
7464)
7465
7466xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007467 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007468 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007469 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007470 "test/maxpool-microkernel-tester.h",
7471 ] + MICROKERNEL_TEST_HDRS,
7472 deps = MICROKERNEL_TEST_DEPS,
7473)
7474
7475xnnpack_unit_test(
7476 name = "u8_rmax_test",
7477 srcs = [
7478 "test/u8-rmax.cc",
7479 "test/rmax-microkernel-tester.h",
7480 ] + MICROKERNEL_TEST_HDRS,
7481 deps = MICROKERNEL_TEST_DEPS,
7482)
7483
7484xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007485 name = "u8_vclamp_test",
7486 srcs = [
7487 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007488 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007489 ] + MICROKERNEL_TEST_HDRS,
7490 deps = MICROKERNEL_TEST_DEPS,
7491)
7492
7493xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007494 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007495 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007496 "test/x32-depthtospace2d-chw2hwc.cc",
7497 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007498 ] + MICROKERNEL_TEST_HDRS,
7499 deps = MICROKERNEL_TEST_DEPS,
7500)
7501
7502xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007503 name = "x32_fill_test",
7504 srcs = [
7505 "test/x32-fill.cc",
7506 "test/fill-microkernel-tester.h",
7507 ] + MICROKERNEL_TEST_HDRS,
7508 deps = MICROKERNEL_TEST_DEPS,
7509)
7510
7511xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007512 name = "x32_packx_test",
7513 srcs = [
7514 "test/x32-packx.cc",
7515 "test/pack-microkernel-tester.h",
7516 "src/xnnpack/AlignedAllocator.h",
7517 ] + MICROKERNEL_TEST_HDRS,
7518 deps = MICROKERNEL_TEST_DEPS,
7519)
7520
7521xnnpack_unit_test(
7522 name = "x32_pad_test",
7523 srcs = [
7524 "test/x32-pad.cc",
7525 "test/pad-microkernel-tester.h",
7526 ] + MICROKERNEL_TEST_HDRS,
7527 deps = MICROKERNEL_TEST_DEPS,
7528)
7529
7530xnnpack_unit_test(
7531 name = "x32_unpool_test",
7532 srcs = [
7533 "test/x32-unpool.cc",
7534 "test/unpool-microkernel-tester.h",
7535 ] + MICROKERNEL_TEST_HDRS,
7536 deps = MICROKERNEL_TEST_DEPS,
7537)
7538
7539xnnpack_unit_test(
7540 name = "x32_zip_test",
7541 srcs = [
7542 "test/x32-zip.cc",
7543 "test/zip-microkernel-tester.h",
7544 ] + MICROKERNEL_TEST_HDRS,
7545 deps = MICROKERNEL_TEST_DEPS,
7546)
7547
7548xnnpack_unit_test(
7549 name = "x8_lut_test",
7550 srcs = [
7551 "test/x8-lut.cc",
7552 "test/lut-microkernel-tester.h",
7553 ] + MICROKERNEL_TEST_HDRS,
7554 deps = MICROKERNEL_TEST_DEPS,
7555)
7556
7557xnnpack_unit_test(
7558 name = "x8_zip_test",
7559 srcs = [
7560 "test/x8-zip.cc",
7561 "test/zip-microkernel-tester.h",
7562 ] + MICROKERNEL_TEST_HDRS,
7563 deps = MICROKERNEL_TEST_DEPS,
7564)
7565
Marat Dukhan20c3b922020-03-10 03:45:06 -07007566########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007567
7568xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007569 name = "operator_size_test",
7570 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007571 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007572)
7573
Marat Dukhan20c3b922020-03-10 03:45:06 -07007574xnnpack_binary(
7575 name = "subgraph_size_test",
7576 srcs = ["test/subgraph-size.c"],
7577 deps = [":XNNPACK"],
7578)
7579
7580########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007581
7582xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007583 name = "abs_nc_test",
7584 srcs = [
7585 "test/abs-nc.cc",
7586 "test/abs-operator-tester.h",
7587 ],
7588 deps = OPERATOR_TEST_DEPS,
7589)
7590
7591xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007592 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007593 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007594 srcs = [
7595 "test/add-nd.cc",
7596 "test/binary-elementwise-operator-tester.h",
7597 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007598 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007599)
7600
7601xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007602 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007603 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007604 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007605 "test/argmax-pooling-operator-tester.h",
7606 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007607 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007608)
7609
7610xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007611 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007612 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007613 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007614 "test/average-pooling-operator-tester.h",
7615 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007616 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007617)
7618
7619xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007620 name = "bankers_rounding_nc_test",
7621 srcs = [
7622 "test/bankers-rounding-nc.cc",
7623 "test/bankers-rounding-operator-tester.h",
7624 ],
7625 deps = OPERATOR_TEST_DEPS,
7626)
7627
7628xnnpack_unit_test(
7629 name = "ceiling_nc_test",
7630 srcs = [
7631 "test/ceiling-nc.cc",
7632 "test/ceiling-operator-tester.h",
7633 ],
7634 deps = OPERATOR_TEST_DEPS,
7635)
7636
7637xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007638 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007639 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007640 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007641 "test/channel-shuffle-operator-tester.h",
7642 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007643 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007644)
7645
7646xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007647 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007648 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007649 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007650 "test/clamp-operator-tester.h",
7651 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007652 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007653)
7654
7655xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007656 name = "constant_pad_nd_test",
7657 srcs = [
7658 "test/constant-pad-nd.cc",
7659 "test/constant-pad-operator-tester.h",
7660 ],
7661 deps = OPERATOR_TEST_DEPS,
7662)
7663
7664xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007665 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007666 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007667 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007668 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007669 "test/convolution-operator-tester.h",
7670 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007671 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007672)
7673
7674xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007675 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007676 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007677 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007678 "test/convolution-nchw.cc",
7679 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007680 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007681 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007682)
7683
7684xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007685 name = "copy_nc_test",
7686 srcs = [
7687 "test/copy-nc.cc",
7688 "test/copy-operator-tester.h",
7689 ],
7690 deps = OPERATOR_TEST_DEPS,
7691)
7692
7693xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007694 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007695 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007696 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007697 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007698 "test/deconvolution-operator-tester.h",
7699 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007700 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007701)
7702
7703xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007704 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007705 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007706 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007707 "test/depth-to-space-operator-tester.h",
7708 ] + OPERATOR_TEST_PARAMS_HDRS,
7709 deps = OPERATOR_TEST_DEPS,
7710)
7711
7712xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007713 name = "depth_to_space_nhwc_test",
7714 srcs = [
7715 "test/depth-to-space-nhwc.cc",
7716 "test/depth-to-space-operator-tester.h",
7717 ] + OPERATOR_TEST_PARAMS_HDRS,
7718 deps = OPERATOR_TEST_DEPS,
7719)
7720
7721xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007722 name = "divide_nd_test",
7723 srcs = [
7724 "test/binary-elementwise-operator-tester.h",
7725 "test/divide-nd.cc",
7726 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007727 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007728)
7729
7730xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007731 name = "elu_nc_test",
7732 srcs = [
7733 "test/elu-nc.cc",
7734 "test/elu-operator-tester.h",
7735 ],
7736 deps = OPERATOR_TEST_DEPS,
7737)
7738
7739xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007740 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007741 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007742 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007743 "test/fully-connected-operator-tester.h",
7744 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007745 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007746)
7747
7748xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007749 name = "floor_nc_test",
7750 srcs = [
7751 "test/floor-nc.cc",
7752 "test/floor-operator-tester.h",
7753 ],
7754 deps = OPERATOR_TEST_DEPS,
7755)
7756
7757xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007758 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007759 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007760 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007761 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007762 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007763 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007764)
7765
7766xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007767 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007768 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007769 "test/global-average-pooling-ncw.cc",
7770 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007771 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007772 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007773)
7774
7775xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007776 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007777 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007778 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007779 "test/hardswish-operator-tester.h",
7780 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007781 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007782)
7783
7784xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007785 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007786 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007787 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007788 "test/leaky-relu-operator-tester.h",
7789 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007790 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007791)
7792
7793xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007794 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007795 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007796 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007797 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007798 "test/max-pooling-operator-tester.h",
7799 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007800 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007801)
7802
7803xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007804 name = "maximum_nd_test",
7805 srcs = [
7806 "test/binary-elementwise-operator-tester.h",
7807 "test/maximum-nd.cc",
7808 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007809 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007810)
7811
7812xnnpack_unit_test(
7813 name = "minimum_nd_test",
7814 srcs = [
7815 "test/binary-elementwise-operator-tester.h",
7816 "test/minimum-nd.cc",
7817 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007818 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007819)
7820
7821xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007822 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007823 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007824 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007825 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007826 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007827 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007828)
7829
7830xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007831 name = "negate_nc_test",
7832 srcs = [
7833 "test/negate-nc.cc",
7834 "test/negate-operator-tester.h",
7835 ],
7836 deps = OPERATOR_TEST_DEPS,
7837)
7838
7839xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007840 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007841 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007842 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007843 "test/prelu-operator-tester.h",
7844 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007845 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007846)
7847
7848xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007849 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007850 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007851 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007852 "test/resize-bilinear-operator-tester.h",
7853 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007854 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007855)
7856
7857xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007858 name = "resize_bilinear_nchw_test",
7859 srcs = [
7860 "test/resize-bilinear-nchw.cc",
7861 "test/resize-bilinear-operator-tester.h",
7862 ] + OPERATOR_TEST_PARAMS_HDRS,
7863 deps = OPERATOR_TEST_DEPS,
7864)
7865
7866xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007867 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007868 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007869 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007870 "test/sigmoid-operator-tester.h",
7871 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007872 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007873)
7874
7875xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007876 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007877 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007878 "test/softmax-nc.cc",
7879 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007880 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007881 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007882)
7883
7884xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007885 name = "square_nc_test",
7886 srcs = [
7887 "test/square-nc.cc",
7888 "test/square-operator-tester.h",
7889 ],
7890 deps = OPERATOR_TEST_DEPS,
7891)
7892
7893xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007894 name = "square_root_nc_test",
7895 srcs = [
7896 "test/square-root-nc.cc",
7897 "test/square-root-operator-tester.h",
7898 ],
7899 deps = OPERATOR_TEST_DEPS,
7900)
7901
7902xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007903 name = "squared_difference_nd_test",
7904 srcs = [
7905 "test/binary-elementwise-operator-tester.h",
7906 "test/squared-difference-nd.cc",
7907 ],
7908 deps = OPERATOR_TEST_DEPS,
7909)
7910
7911xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007912 name = "subtract_nd_test",
7913 srcs = [
7914 "test/binary-elementwise-operator-tester.h",
7915 "test/subtract-nd.cc",
7916 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007917 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007918)
7919
7920xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007921 name = "truncation_nc_test",
7922 srcs = [
7923 "test/truncation-nc.cc",
7924 "test/truncation-operator-tester.h",
7925 ],
7926 deps = OPERATOR_TEST_DEPS,
7927)
7928
7929xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007930 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007931 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007932 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007933 "test/unpooling-operator-tester.h",
7934 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007935 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007936)
7937
Chao Mei6ddfc602020-05-13 22:29:36 -07007938############################### Misc unit tests ###############################
7939
7940xnnpack_unit_test(
7941 name = "memory_planner_test",
7942 srcs = [
7943 "test/memory-planner-test.cc",
7944 ],
7945 deps = [
7946 ":XNNPACK",
7947 ":memory_planner",
7948 ],
7949)
7950
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07007951xnnpack_unit_test(
7952 name = "subgraph_nchw_test",
7953 srcs = [
7954 "src/xnnpack/subgraph.h",
7955 "test/subgraph-nchw.cc",
7956 "test/subgraph-tester.h",
7957 ],
7958 deps = [
7959 ":XNNPACK",
7960 ],
7961)
7962
Marat Dukhan08c4a432019-10-03 09:29:21 -07007963############################# Build configurations #############################
7964
Marat Dukhanb8642352019-10-30 15:43:02 -07007965# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07007966config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07007967 name = "xnn_enable_assembly_explicit_true",
7968 define_values = {"xnn_enable_assembly": "true"},
7969)
7970
7971# Disables usage of assembly kernels.
7972config_setting(
7973 name = "xnn_enable_assembly_explicit_false",
7974 define_values = {"xnn_enable_assembly": "false"},
7975)
7976
Marat Dukhan9de90e02020-06-18 16:04:12 -07007977# Enables usage of sparse inference.
7978config_setting(
7979 name = "xnn_enable_sparse_explicit_true",
7980 define_values = {"xnn_enable_sparse": "true"},
7981)
7982
7983# Disables usage of sparse inference.
7984config_setting(
7985 name = "xnn_enable_sparse_explicit_false",
7986 define_values = {"xnn_enable_sparse": "false"},
7987)
7988
Marat Dukhan05702cf2020-03-26 15:41:33 -07007989# Disables usage of HMP-aware optimizations.
7990config_setting(
7991 name = "xnn_enable_hmp_explicit_false",
7992 define_values = {"xnn_enable_hmp": "false"},
7993)
7994
Chao Mei6ddfc602020-05-13 22:29:36 -07007995# Enable usage of optimized memory allocation
7996config_setting(
7997 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07007998 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07007999)
8000
8001# Disable usage of optimized memory allocation
8002config_setting(
8003 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008004 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008005)
8006
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008007# Enable QS8 inference in TFLite-specific version
8008config_setting(
8009 name = "xnn_enable_qs8_explicit_true",
8010 define_values = {"xnn_enable_qs8": "true"},
8011)
8012
8013# Disable QS8 inference in TFLite-specific version
8014config_setting(
8015 name = "xnn_enable_qs8_explicit_false",
8016 define_values = {"xnn_enable_qs8": "false"},
8017)
8018
Marat Dukhanb8642352019-10-30 15:43:02 -07008019# Builds with -c dbg
8020config_setting(
8021 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008022 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008023 "compilation_mode": "dbg",
8024 },
8025)
8026
8027# Builds with -c opt
8028config_setting(
8029 name = "optimized_build",
8030 values = {
8031 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008032 },
8033)
8034
8035config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008036 name = "linux_k8",
8037 values = {"cpu": "k8"},
8038)
8039
8040config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008041 name = "linux_arm",
8042 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008043)
8044
8045config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008046 name = "linux_armeabi",
8047 values = {"cpu": "armeabi"},
8048)
8049
8050config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008051 name = "linux_armhf",
8052 values = {"cpu": "armhf"},
8053)
8054
8055config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008056 name = "linux_armv7a",
8057 values = {"cpu": "armv7a"},
8058)
8059
8060config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008061 name = "linux_aarch64",
8062 values = {"cpu": "aarch64"},
8063)
8064
8065config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008066 name = "android",
8067 values = {"crosstool_top": "//external:android/crosstool"},
8068)
8069
8070config_setting(
8071 name = "android_armv7",
8072 values = {
8073 "crosstool_top": "//external:android/crosstool",
8074 "cpu": "armeabi-v7a",
8075 },
8076)
8077
8078config_setting(
8079 name = "android_arm64",
8080 values = {
8081 "crosstool_top": "//external:android/crosstool",
8082 "cpu": "arm64-v8a",
8083 },
8084)
8085
8086config_setting(
8087 name = "android_x86",
8088 values = {
8089 "crosstool_top": "//external:android/crosstool",
8090 "cpu": "x86",
8091 },
8092)
8093
8094config_setting(
8095 name = "android_x86_64",
8096 values = {
8097 "crosstool_top": "//external:android/crosstool",
8098 "cpu": "x86_64",
8099 },
8100)
8101
8102config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008103 name = "windows_x86_64",
8104 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008105)
8106
8107config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008108 name = "windows_x86_64_clang",
8109 values = {
8110 "compiler": "clang-cl",
8111 "cpu": "x64_windows",
8112 },
8113)
8114
8115config_setting(
8116 name = "windows_x86_64_mingw",
8117 values = {
8118 "compiler": "mingw-gcc",
8119 "cpu": "x64_windows",
8120 },
8121)
8122
8123config_setting(
8124 name = "windows_x86_64_msys",
8125 values = {
8126 "compiler": "msys-gcc",
8127 "cpu": "x64_windows",
8128 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008129)
8130
8131config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008132 name = "macos_x86_64",
8133 values = {
8134 "apple_platform_type": "macos",
8135 "cpu": "darwin",
8136 },
8137)
8138
8139config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008140 name = "macos_arm64",
8141 values = {
8142 "apple_platform_type": "macos",
8143 "cpu": "darwin_arm64",
8144 },
8145)
8146
8147config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008148 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008149 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008150)
8151
8152config_setting(
8153 name = "emscripten_wasm",
8154 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008155 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008156 "cpu": "wasm",
8157 },
8158)
8159
8160config_setting(
8161 name = "emscripten_wasmsimd",
8162 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008163 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008164 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008165 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008166 },
8167)
8168
8169config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008170 name = "ios_armv7",
8171 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008172 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008173 "cpu": "ios_armv7",
8174 },
8175)
8176
8177config_setting(
8178 name = "ios_arm64",
8179 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008180 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008181 "cpu": "ios_arm64",
8182 },
8183)
8184
8185config_setting(
8186 name = "ios_arm64e",
8187 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008188 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008189 "cpu": "ios_arm64e",
8190 },
8191)
8192
8193config_setting(
8194 name = "ios_x86",
8195 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008196 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008197 "cpu": "ios_i386",
8198 },
8199)
8200
8201config_setting(
8202 name = "ios_x86_64",
8203 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008204 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008205 "cpu": "ios_x86_64",
8206 },
8207)
8208
8209config_setting(
8210 name = "watchos_armv7k",
8211 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008212 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008213 "cpu": "watchos_armv7k",
8214 },
8215)
8216
8217config_setting(
8218 name = "watchos_arm64_32",
8219 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008220 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008221 "cpu": "watchos_arm64_32",
8222 },
8223)
8224
8225config_setting(
8226 name = "watchos_x86",
8227 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008228 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008229 "cpu": "watchos_i386",
8230 },
8231)
8232
8233config_setting(
8234 name = "watchos_x86_64",
8235 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008236 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008237 "cpu": "watchos_x86_64",
8238 },
8239)
8240
8241config_setting(
8242 name = "tvos_arm64",
8243 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008244 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008245 "cpu": "tvos_arm64",
8246 },
8247)
8248
8249config_setting(
8250 name = "tvos_x86_64",
8251 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008252 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008253 "cpu": "tvos_x86_64",
8254 },
8255)