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gerrit-public.fairphone.software / toolchain / llvm-project / 2744d21fb8b1c35b112d777b22697a2bdf919bfe / . / llvm / lib / Target / X86 / X86InstrFragmentsSIMD.td
blob: e0e2864c583dee79264ad013607ada3fc579b637 [file] [log] [blame]
Jia Liue1d61962012-02-19 02:03:36 +0000[diff] [blame]1//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +0000[diff] [blame]7//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]8//===----------------------------------------------------------------------===//
9//
10// This file provides pattern fragments useful for SIMD instructions.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]15// MMX specific DAG Nodes.
16//===----------------------------------------------------------------------===//
17
18// Low word of MMX to GPR.
19def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,
20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
Bruno Cardoso Lopesab9ae872015-02-05 13:23:07 +0000[diff] [blame]21// GPR to low word of MMX.
22def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1,
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]24
25//===----------------------------------------------------------------------===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]26// MMX Pattern Fragments
27//===----------------------------------------------------------------------===//
28
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]29def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>;
Bruno Cardoso Lopes9e1c4c12015-02-23 15:23:14 +0000[diff] [blame]30def load_mvmmx : PatFrag<(ops node:$ptr),
31 (x86mmx (MMX_X86movw2d (load node:$ptr)))>;
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]32def bc_mmx : PatFrag<(ops node:$in), (x86mmx (bitconvert node:$in))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]33
34//===----------------------------------------------------------------------===//
35// SSE specific DAG Nodes.
36//===----------------------------------------------------------------------===//
37
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]38def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]39 SDTCisFP<1>, SDTCisVT<3, i8>,
40 SDTCisVec<1>]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]41
42def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
43def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
Nadav Rotem178250a2012-08-19 13:06:16 +0000[diff] [blame]44
45// Commutative and Associative FMIN and FMAX.
46def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,
47 [SDNPCommutative, SDNPAssociative]>;
48def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,
49 [SDNPCommutative, SDNPAssociative]>;
50
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]51def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
52 [SDNPCommutative, SDNPAssociative]>;
53def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
54 [SDNPCommutative, SDNPAssociative]>;
55def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
56 [SDNPCommutative, SDNPAssociative]>;
Benjamin Kramer5bc180c2013-08-04 12:05:16 +0000[diff] [blame]57def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp,
58 [SDNPCommutative, SDNPAssociative]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]59def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
60def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
Stuart Hastings9f208042011-06-01 04:39:42 +0000[diff] [blame]61def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>;
Duncan Sands0e4fcb82011-09-22 20:15:48 +0000[diff] [blame]62def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
63def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
Craig Topperf984efb2011-11-19 09:02:40 +0000[diff] [blame]64def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
65def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]66def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>;
67def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]68def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
69//def X86cmpsd : SDNode<"X86ISD::FSETCCsd", SDTX86Cmpsd>;
Simon Pilgrimcae7b942015-06-16 21:40:28 +0000[diff] [blame]70def X86cvtdq2pd: SDNode<"X86ISD::CVTDQ2PD",
71 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
72 SDTCisVT<1, v4i32>]>>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000[diff] [blame]73def X86cvtudq2pd: SDNode<"X86ISD::CVTUDQ2PD",
74 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
75 SDTCisVT<1, v4i32>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]76def X86pshufb : SDNode<"X86ISD::PSHUFB",
Craig Topper78349002012-01-25 06:43:11 +0000[diff] [blame]77 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]78 SDTCisSameAs<0,2>]>>;
Chandler Carruth6ba97302015-05-30 03:20:59 +0000[diff] [blame]79def X86psadbw : SDNode<"X86ISD::PSADBW",
80 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
81 SDTCisSameAs<0,2>]>>;
Igor Bregerf3ded812015-08-31 13:09:30 +0000[diff] [blame]82def X86dbpsadbw : SDNode<"X86ISD::DBPSADBW",
83 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisVec<1>,
84 SDTCisSameAs<1,2>, SDTCisInt<3>]>>;
Bruno Cardoso Lopes7ba479d2011-07-13 21:36:47 +0000[diff] [blame]85def X86andnp : SDNode<"X86ISD::ANDNP",
Bruno Cardoso Lopes9613b642011-07-13 21:36:51 +0000[diff] [blame]86 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]87 SDTCisSameAs<0,2>]>>;
Craig Topper81390be2011-11-19 07:33:10 +0000[diff] [blame]88def X86psign : SDNode<"X86ISD::PSIGN",
Craig Topperde6b73b2011-11-19 07:07:26 +0000[diff] [blame]89 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]90 SDTCisSameAs<0,2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]91def X86pextrb : SDNode<"X86ISD::PEXTRB",
92 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
93def X86pextrw : SDNode<"X86ISD::PEXTRW",
94 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
95def X86pinsrb : SDNode<"X86ISD::PINSRB",
96 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
97 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
98def X86pinsrw : SDNode<"X86ISD::PINSRW",
99 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
100 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
Filipe Cabecinhas20352212014-04-21 20:07:29 +0000[diff] [blame]101def X86insertps : SDNode<"X86ISD::INSERTPS",
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]102 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]103 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]104def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
105 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>;
Elena Demikhovsky8d7e56c2012-04-22 09:39:03 +0000[diff] [blame]106
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]107def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
Chris Lattner54e53292010-09-22 00:34:38 +0000[diff] [blame]108 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]109
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]110def X86vzext : SDNode<"X86ISD::VZEXT",
111 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]112 SDTCisInt<0>, SDTCisInt<1>,
113 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]114
115def X86vsext : SDNode<"X86ISD::VSEXT",
116 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]117 SDTCisInt<0>, SDTCisInt<1>,
118 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]119
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]120def SDTVtrunc : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
121 SDTCisInt<0>, SDTCisInt<1>,
122 SDTCisOpSmallerThanOp<0, 1>]>;
123
124def X86vtrunc : SDNode<"X86ISD::VTRUNC", SDTVtrunc>;
125def X86vtruncs : SDNode<"X86ISD::VTRUNCS", SDTVtrunc>;
126def X86vtruncus : SDNode<"X86ISD::VTRUNCUS", SDTVtrunc>;
127
Elena Demikhovskyc5f67262013-12-17 08:33:15 +0000[diff] [blame]128def X86trunc : SDNode<"X86ISD::TRUNC",
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]129 SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>,
130 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]131def X86vfpext : SDNode<"X86ISD::VFPEXT",
132 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]133 SDTCisFP<0>, SDTCisFP<1>,
134 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liaoe999b862012-10-10 16:53:28 +0000[diff] [blame]135def X86vfpround: SDNode<"X86ISD::VFPROUND",
136 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]137 SDTCisFP<0>, SDTCisFP<1>,
138 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]139
Asaf Badouh2744d212015-09-20 14:31:19 +0000[diff] [blame^]140def X86fround: SDNode<"X86ISD::VFPROUND",
141 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisFP<1>,SDTCisFP<2>,
142 SDTCVecEltisVT<0, f32>,
143 SDTCVecEltisVT<1, f64>,
144 SDTCVecEltisVT<2, f64>,
145 SDTCisOpSmallerThanOp<0, 1>]>>;
146def X86froundRnd: SDNode<"X86ISD::VFPROUND",
147 SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisFP<1>,SDTCisFP<2>,
148 SDTCVecEltisVT<0, f32>,
149 SDTCVecEltisVT<1, f64>,
150 SDTCVecEltisVT<2, f64>,
151 SDTCisOpSmallerThanOp<0, 1>,
152 SDTCisInt<3>]>>;
153
154def X86fpext : SDNode<"X86ISD::VFPEXT",
155 SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisFP<1>,SDTCisFP<2>,
156 SDTCVecEltisVT<0, f64>,
157 SDTCVecEltisVT<1, f32>,
158 SDTCVecEltisVT<2, f32>,
159 SDTCisOpSmallerThanOp<1, 0>]>>;
160
161def X86fpextRnd : SDNode<"X86ISD::VFPEXT",
162 SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisFP<1>,SDTCisFP<2>,
163 SDTCVecEltisVT<0, f64>,
164 SDTCVecEltisVT<1, f32>,
165 SDTCVecEltisVT<2, f32>,
166 SDTCisOpSmallerThanOp<1, 0>,
167 SDTCisInt<3>]>>;
168
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]169def X86vshldq : SDNode<"X86ISD::VSHLDQ", SDTIntShiftOp>;
170def X86vshrdq : SDNode<"X86ISD::VSRLDQ", SDTIntShiftOp>;
Craig Topper0b7ad762012-01-22 23:36:02 +0000[diff] [blame]171def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>;
Craig Topperbd4884372012-01-22 22:42:16 +0000[diff] [blame]172def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;
173def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]174
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]175def X86IntCmpMask : SDTypeProfile<1, 2,
176 [SDTCisVec<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>]>;
177def X86pcmpeqm : SDNode<"X86ISD::PCMPEQM", X86IntCmpMask, [SDNPCommutative]>;
178def X86pcmpgtm : SDNode<"X86ISD::PCMPGTM", X86IntCmpMask>;
179
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]180def X86CmpMaskCC :
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000[diff] [blame]181 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,
182 SDTCisVec<1>, SDTCisSameAs<2, 1>,
183 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>]>;
184def X86CmpMaskCCRound :
185 SDTypeProfile<1, 4, [SDTCisVec<0>,SDTCVecEltisVT<0, i1>,
186 SDTCisVec<1>, SDTCisSameAs<2, 1>,
187 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>,
188 SDTCisInt<4>]>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]189def X86CmpMaskCCScalar :
190 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
191
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000[diff] [blame]192def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>;
193def X86cmpmRnd : SDNode<"X86ISD::CMPM_RND", X86CmpMaskCCRound>;
194def X86cmpmu : SDNode<"X86ISD::CMPMU", X86CmpMaskCC>;
195def X86cmpms : SDNode<"X86ISD::FSETCC", X86CmpMaskCCScalar>;
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]196
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]197def X86vshl : SDNode<"X86ISD::VSHL",
198 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
199 SDTCisVec<2>]>>;
200def X86vsrl : SDNode<"X86ISD::VSRL",
201 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
202 SDTCisVec<2>]>>;
203def X86vsra : SDNode<"X86ISD::VSRA",
204 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
205 SDTCisVec<2>]>>;
206
207def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;
208def X86vsrli : SDNode<"X86ISD::VSRLI", SDTIntShiftOp>;
209def X86vsrai : SDNode<"X86ISD::VSRAI", SDTIntShiftOp>;
210
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]211def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]212 SDTCisVec<1>,
213 SDTCisSameAs<2, 1>]>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000[diff] [blame]214def X86addus : SDNode<"X86ISD::ADDUS", SDTIntBinOp>;
Benjamin Kramerb16ccde2012-12-15 16:47:44 +0000[diff] [blame]215def X86subus : SDNode<"X86ISD::SUBUS", SDTIntBinOp>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000[diff] [blame]216def X86adds : SDNode<"X86ISD::ADDS", SDTIntBinOp>;
217def X86subs : SDNode<"X86ISD::SUBS", SDTIntBinOp>;
Asaf Badouhc6f3c822015-07-06 14:03:40 +0000[diff] [blame]218def X86mulhrs : SDNode<"X86ISD::MULHRS" , SDTIntBinOp>;
Asaf Badouh81f03c32015-06-18 12:30:53 +0000[diff] [blame]219def X86avg : SDNode<"X86ISD::AVG" , SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]220def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]221def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
Elena Demikhovsky40864b62013-08-05 08:52:21 +0000[diff] [blame]222def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
Igor Breger5ea0a6812015-08-31 13:30:19 +0000[diff] [blame]223def X86ktest : SDNode<"X86ISD::KTEST", SDTX86CmpPTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]224def X86testm : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]225 SDTCisVec<1>, SDTCisSameAs<2, 1>,
226 SDTCVecEltisVT<0, i1>,
227 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovskya30e4372014-02-05 07:05:03 +0000[diff] [blame]228def X86testnm : SDNode<"X86ISD::TESTNM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]229 SDTCisVec<1>, SDTCisSameAs<2, 1>,
230 SDTCVecEltisVT<0, i1>,
231 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]232def X86select : SDNode<"X86ISD::SELECT" , SDTSelect>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]233
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]234def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
235 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
236 SDTCisSameAs<1,2>]>>;
Benjamin Kramer6d2dff62014-04-26 14:12:19 +0000[diff] [blame]237def X86pmuldq : SDNode<"X86ISD::PMULDQ",
238 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
239 SDTCisSameAs<1,2>]>>;
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]240
Simon Pilgrimd85cae32015-07-06 20:46:41 +0000[diff] [blame]241def X86extrqi : SDNode<"X86ISD::EXTRQI",
242 SDTypeProfile<1, 3, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,
243 SDTCisVT<2, i8>, SDTCisVT<3, i8>]>>;
244def X86insertqi : SDNode<"X86ISD::INSERTQI",
245 SDTypeProfile<1, 4, [SDTCisVT<0, v2i64>, SDTCisSameAs<0,1>,
246 SDTCisSameAs<1,2>, SDTCisVT<3, i8>,
247 SDTCisVT<4, i8>]>>;
248
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]249// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
250// translated into one of the target nodes below during lowering.
251// Note: this is a work in progress...
252def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>;
253def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
254 SDTCisSameAs<0,2>]>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]255def SDTShuff3Op : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
256 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]257
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]258def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
259 SDTCisVec<2>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]260def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>,
261 SDTCisSameAs<0,1>, SDTCisInt<2>]>;
262def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
263 SDTCisSameAs<0,2>, SDTCisInt<3>]>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]264def SDTFPBinOpImmRound: SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCisSameAs<0,1>,
265 SDTCisSameAs<0,2>, SDTCisInt<3>, SDTCisInt<4>]>;
Asaf Badouha5b2e5e2015-07-22 12:00:43 +0000[diff] [blame]266def SDTFPUnaryOpImmRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
267 SDTCisInt<2>, SDTCisInt<3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]268
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]269def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;
270def SDTVBroadcastm : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>]>;
271
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]272def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]273 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]274
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]275def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc.
276 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisInt<3>]>;
277
Asaf Badouh402ebb32015-06-03 13:41:48 +0000[diff] [blame]278def SDTFPUnaryOpRound : SDTypeProfile<1, 2, [ // fsqrt_round, fgetexp_round, etc.
279 SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisInt<2>]>;
280
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]281def SDTFma : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
282 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]283def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
284 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>, SDTCisInt<4>]>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]285def STDFp1SrcRm : SDTypeProfile<1, 2, [SDTCisSameAs<0,1>,
286 SDTCisVec<0>, SDTCisInt<2>]>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]287def STDFp2SrcRm : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
288 SDTCisVec<0>, SDTCisInt<3>]>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000[diff] [blame]289def STDFp3SrcRm : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
290 SDTCisVec<0>, SDTCisInt<3>, SDTCisInt<4>]>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]291
Craig Topper8fb09f02013-01-28 06:48:25 +0000[diff] [blame]292def X86PAlignr : SDNode<"X86ISD::PALIGNR", SDTShuff3OpI>;
Adam Nemet2f10cc62014-08-05 17:22:55 +0000[diff] [blame]293def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
Igor Breger0dcd8bc2015-09-03 09:05:31 +0000[diff] [blame]294
295def X86Abs : SDNode<"X86ISD::ABS", SDTIntUnaryOp>;
296def X86Conflict : SDNode<"X86ISD::CONFLICT", SDTIntUnaryOp>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]297
298def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>;
299def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>;
300def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>;
301
Elena Demikhovsky9e380862015-06-03 10:56:40 +0000[diff] [blame]302def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>;
303def X86Shuf128 : SDNode<"X86ISD::SHUF128", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]304
305def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
306def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;
307def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;
308
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]309def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
310def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
311
312def X86Movlhps : SDNode<"X86ISD::MOVLHPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]313def X86Movlhpd : SDNode<"X86ISD::MOVLHPD", SDTShuff2Op>;
Bruno Cardoso Lopes03e4c352010-08-31 21:15:21 +0000[diff] [blame]314def X86Movhlps : SDNode<"X86ISD::MOVHLPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]315
Bruno Cardoso Lopesb3825212010-09-01 05:08:25 +0000[diff] [blame]316def X86Movlps : SDNode<"X86ISD::MOVLPS", SDTShuff2Op>;
317def X86Movlpd : SDNode<"X86ISD::MOVLPD", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]318
Chandler Carruth8366ceb2014-06-20 01:05:28 +0000[diff] [blame]319def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, SDTCisSameAs<2, 1>]>;
320def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
321def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>;
322
Craig Topper8d4ba192011-12-06 08:21:25 +0000[diff] [blame]323def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;
324def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]325
Igor Bregerf7fd5472015-07-21 07:11:28 +0000[diff] [blame]326def X86vpmaddubsw : SDNode<"X86ISD::VPMADDUBSW" , SDTPack>;
327def X86vpmaddwd : SDNode<"X86ISD::VPMADDWD" , SDTPack>;
328
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]329def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>;
Chandler Carruthed5dfff2014-09-22 22:29:42 +0000[diff] [blame]330def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>;
331def X86VPermv : SDNode<"X86ISD::VPERMV", SDTShuff2Op>;
332def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;
333def X86VPermv3 : SDNode<"X86ISD::VPERMV3", SDTShuff3Op>;
Elena Demikhovskya5d38a32014-01-23 14:27:26 +0000[diff] [blame]334def X86VPermiv3 : SDNode<"X86ISD::VPERMIV3", SDTShuff3Op>;
Bruno Cardoso Lopesb878caa2011-07-21 01:55:47 +0000[diff] [blame]335
Craig Topper0a672ea2011-11-30 07:47:51 +0000[diff] [blame]336def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;
Bruno Cardoso Lopesf15dfe52011-08-12 21:48:26 +0000[diff] [blame]337
Igor Breger1e58e8a2015-09-02 11:18:55 +0000[diff] [blame]338def X86VFixupimm : SDNode<"X86ISD::VFIXUPIMM", SDTFPBinOpImmRound>;
339def X86VRange : SDNode<"X86ISD::VRANGE", SDTFPBinOpImmRound>;
340def X86VReduce : SDNode<"X86ISD::VREDUCE", SDTFPUnaryOpImmRound>;
341def X86VRndScale : SDNode<"X86ISD::VRNDSCALE", SDTFPUnaryOpImmRound>;
342def X86VGetMant : SDNode<"X86ISD::VGETMANT", SDTFPUnaryOpImmRound>;
Asaf Badouh572bbce2015-09-20 08:46:07 +0000[diff] [blame]343def X86Vfpclass : SDNode<"X86ISD::VFPCLASS",
344 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,
345 SDTCisVec<1>, SDTCisInt<2>]>, []>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]346
Elena Demikhovskyad9c3962015-05-18 06:42:57 +0000[diff] [blame]347def X86SubVBroadcast : SDNode<"X86ISD::SUBV_BROADCAST",
348 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
349 SDTCisSubVecOfVec<1, 0>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]350def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>;
Elena Demikhovsky89529742013-09-12 08:55:00 +0000[diff] [blame]351def X86Vinsert : SDNode<"X86ISD::VINSERT", SDTypeProfile<1, 3,
352 [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
Elena Demikhovsky9f423d62014-02-10 07:02:39 +0000[diff] [blame]353def X86Vextract : SDNode<"X86ISD::VEXTRACT", SDTypeProfile<1, 2,
354 [SDTCisVec<1>, SDTCisPtrTy<2>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]355
Elena Demikhovskycd3c1c42012-12-05 09:24:57 +0000[diff] [blame]356def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>;
Chandler Carruth204ad4c2014-09-15 20:09:47 +0000[diff] [blame]357
358def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>;
359
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]360def X86faddRnd : SDNode<"X86ISD::FADD_RND", SDTFPBinOpRound>;
361def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>;
362def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>;
363def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;
Igor Breger4c4cd782015-09-20 09:13:41 +0000[diff] [blame]364def X86fmaxRnd : SDNode<"X86ISD::FMAX_RND", SDTFPBinOpRound>;
365def X86scalef : SDNode<"X86ISD::SCALEF", SDTFPBinOpRound>;
366def X86fminRnd : SDNode<"X86ISD::FMIN_RND", SDTFPBinOpRound>;
367def X86fsqrtRnd : SDNode<"X86ISD::FSQRT_RND", SDTFPUnaryOpRound>;
368def X86fsqrtRnds : SDNode<"X86ISD::FSQRT_RND", STDFp2SrcRm>;
Igor Breger8352a0d2015-07-28 06:53:28 +0000[diff] [blame]369def X86fgetexpRnd : SDNode<"X86ISD::FGETEXP_RND", SDTFPUnaryOpRound>;
370def X86fgetexpRnds : SDNode<"X86ISD::FGETEXP_RND", STDFp2SrcRm>;
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]371
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]372def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;
373def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
374def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFma>;
375def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFma>;
Craig Toppera999c662012-08-29 07:18:25 +0000[diff] [blame]376def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFma>;
377def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFma>;
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]378
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]379def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound>;
380def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound>;
381def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound>;
382def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound>;
383def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound>;
384def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound>;
385
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]386def X86rsqrt28 : SDNode<"X86ISD::RSQRT28", STDFp1SrcRm>;
387def X86rcp28 : SDNode<"X86ISD::RCP28", STDFp1SrcRm>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]388def X86exp2 : SDNode<"X86ISD::EXP2", STDFp1SrcRm>;
389
Igor Breger1e58e8a2015-09-02 11:18:55 +0000[diff] [blame]390def X86rsqrt28s : SDNode<"X86ISD::RSQRT28", STDFp2SrcRm>;
391def X86rcp28s : SDNode<"X86ISD::RCP28", STDFp2SrcRm>;
Asaf Badouha5b2e5e2015-07-22 12:00:43 +0000[diff] [blame]392def X86RndScales : SDNode<"X86ISD::VRNDSCALE", STDFp3SrcRm>;
Igor Breger1e58e8a2015-09-02 11:18:55 +0000[diff] [blame]393def X86Reduces : SDNode<"X86ISD::VREDUCE", STDFp3SrcRm>;
394def X86GetMants : SDNode<"X86ISD::VGETMANT", STDFp3SrcRm>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]395
Craig Topperab47fe42012-08-06 06:22:36 +0000[diff] [blame]396def SDT_PCMPISTRI : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
397 SDTCisVT<2, v16i8>, SDTCisVT<3, v16i8>,
398 SDTCisVT<4, i8>]>;
399def SDT_PCMPESTRI : SDTypeProfile<2, 5, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
400 SDTCisVT<2, v16i8>, SDTCisVT<3, i32>,
401 SDTCisVT<4, v16i8>, SDTCisVT<5, i32>,
402 SDTCisVT<6, i8>]>;
403
404def X86pcmpistri : SDNode<"X86ISD::PCMPISTRI", SDT_PCMPISTRI>;
405def X86pcmpestri : SDNode<"X86ISD::PCMPESTRI", SDT_PCMPESTRI>;
406
Elena Demikhovskyba5ab322015-06-22 11:16:30 +0000[diff] [blame]407def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 1,
408 [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>;
409def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 1,
410 [SDTCisSameAs<0, 1>, SDTCisVec<1>]>, []>;
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]411
Igor Bregerabe4a792015-06-14 12:44:55 +0000[diff] [blame]412def SDTintToFPRound: SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisFP<0>,
413 SDTCisSameAs<0,1>, SDTCisInt<2>, SDTCisInt<3>]>;
414
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000[diff] [blame]415def SDTDoubleToInt: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
416 SDTCisInt<0>, SDTCVecEltisVT<1, f64>]>;
417def SDTFloatToInt: SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
418 SDTCisInt<0>, SDTCVecEltisVT<1, f32>]>;
419
420def SDTDoubleToIntRnd: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
421 SDTCisInt<0>, SDTCVecEltisVT<1, f64>]>;
Asaf Badouh2744d212015-09-20 14:31:19 +0000[diff] [blame^]422def SDTSDoubleToIntRnd: SDTypeProfile<1, 2, [SDTCisInt<0>,SDTCisFP<1>,
423 SDTCVecEltisVT<1, f64>, SDTCisInt<2>]>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000[diff] [blame]424def SDTFloatToIntRnd: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
425 SDTCisInt<0>, SDTCVecEltisVT<1, f32>]>;
Asaf Badouh2744d212015-09-20 14:31:19 +0000[diff] [blame^]426def SDTSFloatToIntRnd: SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisFP<1>,
427 SDTCVecEltisVT<1, f32>, SDTCisInt<2>]>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000[diff] [blame]428def SDTVintToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
429 SDTCisFP<0>, SDTCVecEltisVT<1, i32>,
430 SDTCisInt<2>]>;
431def SDTVlongToFPRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
432 SDTCisFP<0>, SDTCVecEltisVT<1, i64>,
433 SDTCisInt<2>]>;
434
435def SDTVFPToIntRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
436 SDTCisFP<1>, SDTCVecEltisVT<0, i32>,
437 SDTCisInt<2>]>;
438def SDTVFPToLongRound: SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
439 SDTCisFP<1>, SDTCVecEltisVT<0, i64>,
440 SDTCisInt<2>]>;
441
442// Scalar
443def X86SintToFpRnd : SDNode<"X86ISD::SINT_TO_FP_RND", SDTintToFPRound>;
444def X86UintToFpRnd : SDNode<"X86ISD::UINT_TO_FP_RND", SDTintToFPRound>;
445
Asaf Badouh2744d212015-09-20 14:31:19 +0000[diff] [blame^]446def X86cvttss2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTSFloatToIntRnd>;
447def X86cvttss2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTSFloatToIntRnd>;
448def X86cvttsd2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTSDoubleToIntRnd>;
449def X86cvttsd2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTSDoubleToIntRnd>;
Elena Demikhovsky0f370932015-07-13 13:26:20 +0000[diff] [blame]450// Vector with rounding mode
451
452// cvtt fp-to-int staff
453def X86VFpToSintRnd : SDNode<"ISD::FP_TO_SINT", SDTVFPToIntRound>;
454def X86VFpToUintRnd : SDNode<"ISD::FP_TO_UINT", SDTVFPToIntRound>;
455def X86VFpToSlongRnd : SDNode<"ISD::FP_TO_SINT", SDTVFPToLongRound>;
456def X86VFpToUlongRnd : SDNode<"ISD::FP_TO_UINT", SDTVFPToLongRound>;
457
458def X86VSintToFpRnd : SDNode<"ISD::SINT_TO_FP", SDTVintToFPRound>;
459def X86VUintToFpRnd : SDNode<"ISD::UINT_TO_FP", SDTVintToFPRound>;
460def X86VSlongToFpRnd : SDNode<"ISD::SINT_TO_FP", SDTVlongToFPRound>;
461def X86VUlongToFpRnd : SDNode<"ISD::UINT_TO_FP", SDTVlongToFPRound>;
462
463// cvt fp-to-int staff
464def X86cvtps2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTFloatToIntRnd>;
465def X86cvtps2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTFloatToIntRnd>;
466def X86cvtpd2IntRnd : SDNode<"X86ISD::FP_TO_SINT_RND", SDTDoubleToIntRnd>;
467def X86cvtpd2UIntRnd : SDNode<"X86ISD::FP_TO_UINT_RND", SDTDoubleToIntRnd>;
468
469// Vector without rounding mode
470def X86cvtps2Int : SDNode<"X86ISD::FP_TO_SINT_RND", SDTFloatToInt>;
471def X86cvtps2UInt : SDNode<"X86ISD::FP_TO_UINT_RND", SDTFloatToInt>;
472def X86cvtpd2Int : SDNode<"X86ISD::FP_TO_SINT_RND", SDTDoubleToInt>;
473def X86cvtpd2UInt : SDNode<"X86ISD::FP_TO_UINT_RND", SDTDoubleToInt>;
474
475def X86vfpextRnd : SDNode<"X86ISD::VFPEXT",
476 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
477 SDTCisFP<0>, SDTCisFP<1>,
478 SDTCisOpSmallerThanOp<1, 0>,
479 SDTCisInt<2>]>>;
480def X86vfproundRnd: SDNode<"X86ISD::VFPROUND",
481 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
482 SDTCisFP<0>, SDTCisFP<1>,
483 SDTCVecEltisVT<0, f32>,
484 SDTCVecEltisVT<1, f64>,
485 SDTCisInt<2>]>>;
Igor Bregerabe4a792015-06-14 12:44:55 +0000[diff] [blame]486
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]487//===----------------------------------------------------------------------===//
488// SSE Complex Patterns
489//===----------------------------------------------------------------------===//
490
491// These are 'extloads' from a scalar to the low element of a vector, zeroing
492// the top elements. These are used for the SSE 'ss' and 'sd' instruction
493// forms.
494def sse_load_f32 : ComplexPattern<v4f32, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]495 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
496 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]497def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]498 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
499 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]500
501def ssmem : Operand<v4f32> {
502 let PrintMethod = "printf32mem";
503 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]504 let ParserMatchClass = X86Mem32AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]505 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]506}
507def sdmem : Operand<v2f64> {
508 let PrintMethod = "printf64mem";
509 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]510 let ParserMatchClass = X86Mem64AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]511 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]512}
513
514//===----------------------------------------------------------------------===//
515// SSE pattern fragments
516//===----------------------------------------------------------------------===//
517
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]518// 128-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]519// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]520def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>;
521def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]522def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>;
523
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]524// 256-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]525// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]526def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>;
527def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]528def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>;
529
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]530// 512-bit load pattern fragments
531def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>;
532def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>;
Robert Khasanov7ca7df02014-08-04 14:35:15 +0000[diff] [blame]533def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>;
534def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>;
Elena Demikhovsky1f3ed412013-10-22 09:19:28 +0000[diff] [blame]535def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]536def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>;
537
538// 128-/256-/512-bit extload pattern fragments
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]539def extloadv2f32 : PatFrag<(ops node:$ptr), (v2f64 (extloadvf32 node:$ptr))>;
540def extloadv4f32 : PatFrag<(ops node:$ptr), (v4f64 (extloadvf32 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]541def extloadv8f32 : PatFrag<(ops node:$ptr), (v8f64 (extloadvf32 node:$ptr))>;
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]542
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]543// These are needed to match a scalar load that is used in a vector-only
544// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
545// The memory operand is required to be a 128-bit load, so it must be converted
546// from a vector to a scalar.
547def loadf32_128 : PatFrag<(ops node:$ptr),
548 (f32 (vector_extract (loadv4f32 node:$ptr), (iPTR 0)))>;
549def loadf64_128 : PatFrag<(ops node:$ptr),
550 (f64 (vector_extract (loadv2f64 node:$ptr), (iPTR 0)))>;
551
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]552// Like 'store', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]553def alignedstore : PatFrag<(ops node:$val, node:$ptr),
554 (store node:$val, node:$ptr), [{
555 return cast<StoreSDNode>(N)->getAlignment() >= 16;
556}]>;
557
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]558// Like 'store', but always requires 256-bit vector alignment.
559def alignedstore256 : PatFrag<(ops node:$val, node:$ptr),
560 (store node:$val, node:$ptr), [{
561 return cast<StoreSDNode>(N)->getAlignment() >= 32;
562}]>;
563
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]564// Like 'store', but always requires 512-bit vector alignment.
565def alignedstore512 : PatFrag<(ops node:$val, node:$ptr),
566 (store node:$val, node:$ptr), [{
567 return cast<StoreSDNode>(N)->getAlignment() >= 64;
568}]>;
569
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]570// Like 'load', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]571def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
572 return cast<LoadSDNode>(N)->getAlignment() >= 16;
573}]>;
574
Chad Rosiera281afc2012-03-09 02:00:48 +0000[diff] [blame]575// Like 'X86vzload', but always requires 128-bit vector alignment.
576def alignedX86vzload : PatFrag<(ops node:$ptr), (X86vzload node:$ptr), [{
577 return cast<MemSDNode>(N)->getAlignment() >= 16;
578}]>;
579
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]580// Like 'load', but always requires 256-bit vector alignment.
581def alignedload256 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
582 return cast<LoadSDNode>(N)->getAlignment() >= 32;
583}]>;
584
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]585// Like 'load', but always requires 512-bit vector alignment.
586def alignedload512 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
587 return cast<LoadSDNode>(N)->getAlignment() >= 64;
588}]>;
589
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]590def alignedloadfsf32 : PatFrag<(ops node:$ptr),
591 (f32 (alignedload node:$ptr))>;
592def alignedloadfsf64 : PatFrag<(ops node:$ptr),
593 (f64 (alignedload node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]594
595// 128-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]596// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]597def alignedloadv4f32 : PatFrag<(ops node:$ptr),
598 (v4f32 (alignedload node:$ptr))>;
599def alignedloadv2f64 : PatFrag<(ops node:$ptr),
600 (v2f64 (alignedload node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]601def alignedloadv2i64 : PatFrag<(ops node:$ptr),
602 (v2i64 (alignedload node:$ptr))>;
603
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]604// 256-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]605// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]606def alignedloadv8f32 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]607 (v8f32 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]608def alignedloadv4f64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]609 (v4f64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]610def alignedloadv4i64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]611 (v4i64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]612
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]613// 512-bit aligned load pattern fragments
614def alignedloadv16f32 : PatFrag<(ops node:$ptr),
615 (v16f32 (alignedload512 node:$ptr))>;
Elena Demikhovsky3ce8dbb2013-08-18 13:08:57 +0000[diff] [blame]616def alignedloadv16i32 : PatFrag<(ops node:$ptr),
617 (v16i32 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]618def alignedloadv8f64 : PatFrag<(ops node:$ptr),
619 (v8f64 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]620def alignedloadv8i64 : PatFrag<(ops node:$ptr),
621 (v8i64 (alignedload512 node:$ptr))>;
622
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]623// Like 'load', but uses special alignment checks suitable for use in
624// memory operands in most SSE instructions, which are required to
625// be naturally aligned on some targets but not on others. If the subtarget
626// allows unaligned accesses, match any load, though this may require
627// setting a feature bit in the processor (on startup, for example).
628// Opteron 10h and later implement such a feature.
629def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{
Sanjay Patelffd039b2015-02-03 17:13:04 +0000[diff] [blame]630 return Subtarget->hasSSEUnalignedMem()
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]631 || cast<LoadSDNode>(N)->getAlignment() >= 16;
632}]>;
633
634def memopfsf32 : PatFrag<(ops node:$ptr), (f32 (memop node:$ptr))>;
635def memopfsf64 : PatFrag<(ops node:$ptr), (f64 (memop node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]636
637// 128-bit memop pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]638// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]639def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;
640def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]641def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]642
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]643// These are needed to match a scalar memop that is used in a vector-only
644// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
645// The memory operand is required to be a 128-bit load, so it must be converted
646// from a vector to a scalar.
647def memopfsf32_128 : PatFrag<(ops node:$ptr),
648 (f32 (vector_extract (memopv4f32 node:$ptr), (iPTR 0)))>;
649def memopfsf64_128 : PatFrag<(ops node:$ptr),
650 (f64 (vector_extract (memopv2f64 node:$ptr), (iPTR 0)))>;
651
652
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]653// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
654// 16-byte boundary.
655// FIXME: 8 byte alignment for mmx reads is not required
656def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
657 return cast<LoadSDNode>(N)->getAlignment() >= 8;
658}]>;
659
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]660def memopmmx : PatFrag<(ops node:$ptr), (x86mmx (memop64 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]661
Elena Demikhovsky6a1a3572015-06-28 10:53:29 +0000[diff] [blame]662def mgatherv4i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
663 (masked_gather node:$src1, node:$src2, node:$src3) , [{
664 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
665 return (Mgt->getIndex().getValueType() == MVT::v4i32 ||
666 Mgt->getBasePtr().getValueType() == MVT::v4i32);
667 return false;
668}]>;
669
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]670def mgatherv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
671 (masked_gather node:$src1, node:$src2, node:$src3) , [{
672 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
673 return (Mgt->getIndex().getValueType() == MVT::v8i32 ||
674 Mgt->getBasePtr().getValueType() == MVT::v8i32);
675 return false;
676}]>;
677
Elena Demikhovsky6a1a3572015-06-28 10:53:29 +0000[diff] [blame]678def mgatherv2i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
679 (masked_gather node:$src1, node:$src2, node:$src3) , [{
680 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
681 return (Mgt->getIndex().getValueType() == MVT::v2i64 ||
682 Mgt->getBasePtr().getValueType() == MVT::v2i64);
683 return false;
684}]>;
685def mgatherv4i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
686 (masked_gather node:$src1, node:$src2, node:$src3) , [{
687 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
688 return (Mgt->getIndex().getValueType() == MVT::v4i64 ||
689 Mgt->getBasePtr().getValueType() == MVT::v4i64);
690 return false;
691}]>;
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]692def mgatherv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
693 (masked_gather node:$src1, node:$src2, node:$src3) , [{
694 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
695 return (Mgt->getIndex().getValueType() == MVT::v8i64 ||
696 Mgt->getBasePtr().getValueType() == MVT::v8i64);
697 return false;
698}]>;
699def mgatherv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
700 (masked_gather node:$src1, node:$src2, node:$src3) , [{
701 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
702 return (Mgt->getIndex().getValueType() == MVT::v16i32 ||
703 Mgt->getBasePtr().getValueType() == MVT::v16i32);
704 return false;
705}]>;
706
Elena Demikhovsky30bc4ca2015-06-29 12:14:24 +0000[diff] [blame]707def mscatterv2i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
708 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
709 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
710 return (Sc->getIndex().getValueType() == MVT::v2i64 ||
711 Sc->getBasePtr().getValueType() == MVT::v2i64);
712 return false;
713}]>;
714
715def mscatterv4i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
716 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
717 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
718 return (Sc->getIndex().getValueType() == MVT::v4i32 ||
719 Sc->getBasePtr().getValueType() == MVT::v4i32);
720 return false;
721}]>;
722
723def mscatterv4i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
724 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
725 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
726 return (Sc->getIndex().getValueType() == MVT::v4i64 ||
727 Sc->getBasePtr().getValueType() == MVT::v4i64);
728 return false;
729}]>;
730
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]731def mscatterv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
732 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
733 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
734 return (Sc->getIndex().getValueType() == MVT::v8i32 ||
735 Sc->getBasePtr().getValueType() == MVT::v8i32);
736 return false;
737}]>;
738
739def mscatterv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
740 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
741 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
742 return (Sc->getIndex().getValueType() == MVT::v8i64 ||
743 Sc->getBasePtr().getValueType() == MVT::v8i64);
744 return false;
745}]>;
746def mscatterv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
747 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
748 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
749 return (Sc->getIndex().getValueType() == MVT::v16i32 ||
750 Sc->getBasePtr().getValueType() == MVT::v16i32);
751 return false;
752}]>;
753
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]754// 128-bit bitconvert pattern fragments
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]755def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>;
756def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>;
757def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>;
758def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>;
759def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;
760def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;
761
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]762// 256-bit bitconvert pattern fragments
Craig Topper682b8502011-11-02 04:42:13 +0000[diff] [blame]763def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;
764def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]765def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;
Bruno Cardoso Lopes1021b4a2011-07-13 01:15:33 +0000[diff] [blame]766def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;
Elena Demikhovsky3629b4a2014-01-06 08:45:54 +0000[diff] [blame]767def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]768
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]769// 512-bit bitconvert pattern fragments
770def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>;
771def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]772def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;
773def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>;
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]774
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]775def vzmovl_v2i64 : PatFrag<(ops node:$src),
776 (bitconvert (v2i64 (X86vzmovl
777 (v2i64 (scalar_to_vector (loadi64 node:$src))))))>;
778def vzmovl_v4i32 : PatFrag<(ops node:$src),
779 (bitconvert (v4i32 (X86vzmovl
780 (v4i32 (scalar_to_vector (loadi32 node:$src))))))>;
781
782def vzload_v2i64 : PatFrag<(ops node:$src),
783 (bitconvert (v2i64 (X86vzload node:$src)))>;
784
785
786def fp32imm0 : PatLeaf<(f32 fpimm), [{
787 return N->isExactlyValue(+0.0);
788}]>;
789
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]790def I8Imm : SDNodeXForm<imm, [{
791 // Transformation function: get the low 8 bits.
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]792 return getI8Imm((uint8_t)N->getZExtValue(), SDLoc(N));
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]793}]>;
794
795def FROUND_NO_EXC : ImmLeaf<i32, [{ return Imm == 8; }]>;
Adam Nemet50b83f02014-08-14 17:13:26 +0000[diff] [blame]796def FROUND_CURRENT : ImmLeaf<i32, [{
797 return Imm == X86::STATIC_ROUNDING::CUR_DIRECTION;
798}]>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]799
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]800// BYTE_imm - Transform bit immediates into byte immediates.
801def BYTE_imm : SDNodeXForm<imm, [{
802 // Transformation function: imm >> 3
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]803 return getI32Imm(N->getZExtValue() >> 3, SDLoc(N));
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]804}]>;
805
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]806// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index
807// to VEXTRACTF128/VEXTRACTI128 imm.
808def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]809 return getI8Imm(X86::getExtractVEXTRACT128Immediate(N), SDLoc(N));
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]810}]>;
811
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]812// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to
813// VINSERTF128/VINSERTI128 imm.
814def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]815 return getI8Imm(X86::getInsertVINSERT128Immediate(N), SDLoc(N));
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]816}]>;
817
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]818// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index
819// to VEXTRACTF64x4 imm.
820def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]821 return getI8Imm(X86::getExtractVEXTRACT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]822}]>;
823
824// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to
825// VINSERTF64x4 imm.
826def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]827 return getI8Imm(X86::getInsertVINSERT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]828}]>;
829
830def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index),
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]831 (extract_subvector node:$bigvec,
832 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]833 return X86::isVEXTRACT128Index(N);
834}], EXTRACT_get_vextract128_imm>;
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]835
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]836def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]837 node:$index),
838 (insert_subvector node:$bigvec, node:$smallvec,
839 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]840 return X86::isVINSERT128Index(N);
841}], INSERT_get_vinsert128_imm>;
842
843
844def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index),
845 (extract_subvector node:$bigvec,
846 node:$index), [{
847 return X86::isVEXTRACT256Index(N);
848}], EXTRACT_get_vextract256_imm>;
849
850def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
851 node:$index),
852 (insert_subvector node:$bigvec, node:$smallvec,
853 node:$index), [{
854 return X86::isVINSERT256Index(N);
855}], INSERT_get_vinsert256_imm>;
Bruno Cardoso Lopes123dff02011-07-25 23:05:25 +0000[diff] [blame]856
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]857def masked_load_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
858 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]859 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
860 return Load->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]861 return false;
862}]>;
863
864def masked_load_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
865 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]866 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
867 return Load->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]868 return false;
869}]>;
870
871def masked_load_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
872 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]873 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
874 return Load->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]875 return false;
876}]>;
877
878def masked_load_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
879 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]880 return isa<MaskedLoadSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]881}]>;
882
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]883// masked store fragments.
884// X86mstore can't be implemented in core DAG files because some targets
885// doesn't support vector type ( llvm-tblgen will fail)
886def X86mstore : PatFrag<(ops node:$src1, node:$src2, node:$src3),
887 (masked_store node:$src1, node:$src2, node:$src3), [{
888 return !cast<MaskedStoreSDNode>(N)->isTruncatingStore();
889}]>;
890
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]891def masked_store_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]892 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]893 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
894 return Store->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]895 return false;
896}]>;
897
898def masked_store_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]899 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]900 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
901 return Store->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]902 return false;
903}]>;
904
905def masked_store_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]906 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]907 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
908 return Store->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]909 return false;
910}]>;
911
912def masked_store_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]913 (X86mstore node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]914 return isa<MaskedStoreSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]915}]>;
916
Igor Breger074a64e2015-07-24 17:24:15 +0000[diff] [blame]917// masked truncstore fragments
918// X86mtruncstore can't be implemented in core DAG files because some targets
919// doesn't support vector type ( llvm-tblgen will fail)
920def X86mtruncstore : PatFrag<(ops node:$src1, node:$src2, node:$src3),
921 (masked_store node:$src1, node:$src2, node:$src3), [{
922 return cast<MaskedStoreSDNode>(N)->isTruncatingStore();
923}]>;
924def masked_truncstorevi8 :
925 PatFrag<(ops node:$src1, node:$src2, node:$src3),
926 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{
927 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i8;
928}]>;
929def masked_truncstorevi16 :
930 PatFrag<(ops node:$src1, node:$src2, node:$src3),
931 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{
932 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i16;
933}]>;
934def masked_truncstorevi32 :
935 PatFrag<(ops node:$src1, node:$src2, node:$src3),
936 (X86mtruncstore node:$src1, node:$src2, node:$src3), [{
937 return cast<MaskedStoreSDNode>(N)->getMemoryVT().getScalarType() == MVT::i32;
938}]>;