blob: e1c8c301bc5bb34fad60ce3625620a62a7fbd48b [file] [log] [blame]
Frank Barchard1a953052020-11-16 18:44:58 -08001# Copyright 2020 Google LLC
Marat Dukhan08c4a432019-10-03 09:29:21 -07002#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -07009load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -080010
Marat Dukhan08c4a432019-10-03 09:29:21 -070011licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -070015OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -070019 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -070020 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -070023MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -070026 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070027 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -070032ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -070039MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070040 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -070041 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -070042 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -070047OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -070048 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -070049 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -070053OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -070054 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070057 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -070058 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -070059 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
Marat Dukhan13b68f22020-11-12 11:55:19 -080062 "src/operators/depth-to-space-nchw2nhwc.c",
Marat Dukhan0e521172020-11-25 13:10:04 -080063 "src/operators/depth-to-space-nhwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070064 "src/operators/fully-connected-nc.c",
65 "src/operators/global-average-pooling-ncw.c",
66 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070067 "src/operators/leaky-relu-nc.c",
68 "src/operators/max-pooling-nhwc.c",
69 "src/operators/prelu-nc.c",
Artsiom Ablavatski97918102020-10-27 15:52:59 -070070 "src/operators/resize-bilinear-nchw.c",
Marat Dukhane8265432020-04-28 18:42:59 -070071 "src/operators/resize-bilinear-nhwc.c",
72 "src/operators/sigmoid-nc.c",
73 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -070074 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -070075 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -070076]
77
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070078SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -070079 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070080 "src/subgraph/add2.c",
81 "src/subgraph/argmax-pooling-2d.c",
82 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070083 "src/subgraph/bankers-rounding.c",
84 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070085 "src/subgraph/clamp.c",
86 "src/subgraph/convolution-2d.c",
87 "src/subgraph/deconvolution-2d.c",
Artsiom Ablavatskibbe85062020-11-05 14:07:37 -080088 "src/subgraph/depth-to-space.c",
Frank Barchard9cef5ea2020-11-18 14:52:08 -080089 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070090 "src/subgraph/divide.c",
Marat Dukhana1600202020-12-01 22:17:16 -080091 "src/subgraph/elu.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -070092 "src/subgraph/floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -070093 "src/subgraph/fully-connected.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -070094 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070095 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -070096 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -070097 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -070098 "src/subgraph/maximum2.c",
99 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700100 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700101 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700102 "src/subgraph/prelu.c",
103 "src/subgraph/sigmoid.c",
104 "src/subgraph/softmax.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700105 "src/subgraph/square-root.c",
106 "src/subgraph/square.c",
107 "src/subgraph/squared-difference.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700108 "src/subgraph/static-constant-pad.c",
Marat Dukhand27202d2020-07-09 23:43:40 -0700109 "src/subgraph/static-reshape.c",
Marat Dukhanaff24e22020-07-23 01:43:58 -0700110 "src/subgraph/static-resize-bilinear-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700111 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700112 "src/subgraph/unpooling-2d.c",
113]
114
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800115TABLE_SRCS = [
116 "src/tables/exp2-k-over-64.c",
117 "src/tables/exp2-k-over-2048.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800118 "src/tables/exp2minus-k-over-4.c",
119 "src/tables/exp2minus-k-over-8.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800120 "src/tables/exp2minus-k-over-16.c",
Marat Dukhan1f256fc2020-09-24 21:27:14 -0700121 "src/tables/exp2minus-k-over-64.c",
122 "src/tables/exp2minus-k-over-2048.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800123]
124
Marat Dukhan08c4a432019-10-03 09:29:21 -0700125SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800126 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800127 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800128 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700129 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
130 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700131 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700132 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700133 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700134 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700135 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
136 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
137 "src/f32-dwconv/gen/up1x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700138 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700139 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
140 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700142 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700143 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
144 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x4-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700150 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700151 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
152 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
153 "src/f32-dwconv/gen/up2x9-scalar.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700154 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700155 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
156 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
157 "src/f32-dwconv/gen/up2x25-scalar.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700158 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc2.c",
159 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc3.c",
160 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1-acc4.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700161 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-1x1.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700162 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1-acc2.c",
Marat Dukhan91249d22020-10-24 12:02:51 -0700163 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-2x1.c",
164 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-3x1.c",
165 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-4x1.c",
166 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-5x1.c",
167 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-scalar-6x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700168 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc2.c",
169 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc3.c",
170 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700171 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-1x1.c",
Marat Dukhancf5b3c32020-10-25 19:21:10 -0700172 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700173 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-2x1.c",
174 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-3x1.c",
175 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-scalar-4x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700176 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc2.c",
177 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc3.c",
178 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc4.c",
179 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700180 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-1x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700181 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc2.c",
182 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700183 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-2x1.c",
Marat Dukhanc4efb002020-10-25 23:14:47 -0700184 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -0700185 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-scalar-3x1.c",
Marat Dukhan29c0c332020-10-28 22:11:00 -0700186 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc2.c",
187 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc3.c",
188 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc4.c",
189 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1-acc5.c",
190 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-1x1.c",
191 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc2.c",
192 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1-acc3.c",
193 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-2x1.c",
194 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1-acc2.c",
195 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-scalar-3x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700196 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700197 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
198 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700199 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
200 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
201 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700202 "src/f32-gemm/gen/1x4-minmax-scalar.c",
203 "src/f32-gemm/gen/1x4-relu-scalar.c",
204 "src/f32-gemm/gen/1x4-scalar.c",
205 "src/f32-gemm/gen/2x4-minmax-scalar.c",
206 "src/f32-gemm/gen/2x4-relu-scalar.c",
207 "src/f32-gemm/gen/2x4-scalar.c",
208 "src/f32-gemm/gen/4x2-minmax-scalar.c",
209 "src/f32-gemm/gen/4x2-relu-scalar.c",
210 "src/f32-gemm/gen/4x2-scalar.c",
211 "src/f32-gemm/gen/4x4-minmax-scalar.c",
212 "src/f32-gemm/gen/4x4-relu-scalar.c",
213 "src/f32-gemm/gen/4x4-scalar.c",
XNNPACK Team21432672020-10-19 19:58:48 -0700214 "src/f32-ibilinear-chw/gen/scalar-p1.c",
215 "src/f32-ibilinear-chw/gen/scalar-p2.c",
216 "src/f32-ibilinear-chw/gen/scalar-p4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700217 "src/f32-ibilinear/gen/scalar-c1.c",
218 "src/f32-ibilinear/gen/scalar-c2.c",
219 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700220 "src/f32-igemm/gen/1x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700221 "src/f32-igemm/gen/1x4-relu-scalar.c",
222 "src/f32-igemm/gen/1x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700223 "src/f32-igemm/gen/2x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700224 "src/f32-igemm/gen/2x4-relu-scalar.c",
225 "src/f32-igemm/gen/2x4-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700226 "src/f32-igemm/gen/4x2-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700227 "src/f32-igemm/gen/4x2-relu-scalar.c",
228 "src/f32-igemm/gen/4x2-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700229 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700230 "src/f32-igemm/gen/4x4-relu-scalar.c",
231 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700232 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
233 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
234 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700235 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
236 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
237 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
238 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800239 "src/f32-prelu/gen/scalar-2x1.c",
240 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800241 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800242 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700243 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800244 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
245 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700246 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800247 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800248 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700249 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800250 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
251 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700253 "src/f32-rmax/scalar.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700254 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
255 "src/f32-spmm/gen/1x1-minmax-scalar.c",
256 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
257 "src/f32-spmm/gen/2x1-minmax-scalar.c",
258 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
259 "src/f32-spmm/gen/4x1-minmax-scalar.c",
260 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
261 "src/f32-spmm/gen/8x1-minmax-scalar.c",
262 "src/f32-spmm/gen/8x2-minmax-scalar.c",
263 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700264 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
265 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
266 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700267 "src/f32-vbinary/gen/vadd-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700268 "src/f32-vbinary/gen/vadd-relu-scalar-x1.c",
269 "src/f32-vbinary/gen/vadd-relu-scalar-x2.c",
270 "src/f32-vbinary/gen/vadd-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700271 "src/f32-vbinary/gen/vadd-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700272 "src/f32-vbinary/gen/vadd-scalar-x1.c",
273 "src/f32-vbinary/gen/vadd-scalar-x2.c",
274 "src/f32-vbinary/gen/vadd-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700275 "src/f32-vbinary/gen/vadd-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700276 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
277 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
278 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700279 "src/f32-vbinary/gen/vaddc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700280 "src/f32-vbinary/gen/vaddc-relu-scalar-x1.c",
281 "src/f32-vbinary/gen/vaddc-relu-scalar-x2.c",
282 "src/f32-vbinary/gen/vaddc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700283 "src/f32-vbinary/gen/vaddc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700284 "src/f32-vbinary/gen/vaddc-scalar-x1.c",
285 "src/f32-vbinary/gen/vaddc-scalar-x2.c",
286 "src/f32-vbinary/gen/vaddc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700287 "src/f32-vbinary/gen/vaddc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700288 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
289 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
290 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700291 "src/f32-vbinary/gen/vdiv-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700292 "src/f32-vbinary/gen/vdiv-relu-scalar-x1.c",
293 "src/f32-vbinary/gen/vdiv-relu-scalar-x2.c",
294 "src/f32-vbinary/gen/vdiv-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700295 "src/f32-vbinary/gen/vdiv-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700296 "src/f32-vbinary/gen/vdiv-scalar-x1.c",
297 "src/f32-vbinary/gen/vdiv-scalar-x2.c",
298 "src/f32-vbinary/gen/vdiv-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700299 "src/f32-vbinary/gen/vdiv-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700300 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
301 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
302 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700303 "src/f32-vbinary/gen/vdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700304 "src/f32-vbinary/gen/vdivc-relu-scalar-x1.c",
305 "src/f32-vbinary/gen/vdivc-relu-scalar-x2.c",
306 "src/f32-vbinary/gen/vdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700307 "src/f32-vbinary/gen/vdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700308 "src/f32-vbinary/gen/vdivc-scalar-x1.c",
309 "src/f32-vbinary/gen/vdivc-scalar-x2.c",
310 "src/f32-vbinary/gen/vdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700311 "src/f32-vbinary/gen/vdivc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800312 "src/f32-vbinary/gen/vmax-scalar-x1.c",
313 "src/f32-vbinary/gen/vmax-scalar-x2.c",
314 "src/f32-vbinary/gen/vmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700315 "src/f32-vbinary/gen/vmax-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800316 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
317 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
318 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700319 "src/f32-vbinary/gen/vmaxc-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800320 "src/f32-vbinary/gen/vmin-scalar-x1.c",
321 "src/f32-vbinary/gen/vmin-scalar-x2.c",
322 "src/f32-vbinary/gen/vmin-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700323 "src/f32-vbinary/gen/vmin-scalar-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800324 "src/f32-vbinary/gen/vminc-scalar-x1.c",
325 "src/f32-vbinary/gen/vminc-scalar-x2.c",
326 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700327 "src/f32-vbinary/gen/vminc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700328 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
329 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
330 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700331 "src/f32-vbinary/gen/vmul-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700332 "src/f32-vbinary/gen/vmul-relu-scalar-x1.c",
333 "src/f32-vbinary/gen/vmul-relu-scalar-x2.c",
334 "src/f32-vbinary/gen/vmul-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700335 "src/f32-vbinary/gen/vmul-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700336 "src/f32-vbinary/gen/vmul-scalar-x1.c",
337 "src/f32-vbinary/gen/vmul-scalar-x2.c",
338 "src/f32-vbinary/gen/vmul-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700339 "src/f32-vbinary/gen/vmul-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700340 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
341 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
342 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700343 "src/f32-vbinary/gen/vmulc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700344 "src/f32-vbinary/gen/vmulc-relu-scalar-x1.c",
345 "src/f32-vbinary/gen/vmulc-relu-scalar-x2.c",
346 "src/f32-vbinary/gen/vmulc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700347 "src/f32-vbinary/gen/vmulc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700348 "src/f32-vbinary/gen/vmulc-scalar-x1.c",
349 "src/f32-vbinary/gen/vmulc-scalar-x2.c",
350 "src/f32-vbinary/gen/vmulc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700351 "src/f32-vbinary/gen/vmulc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700352 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
353 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
354 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700355 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700356 "src/f32-vbinary/gen/vrdivc-relu-scalar-x1.c",
357 "src/f32-vbinary/gen/vrdivc-relu-scalar-x2.c",
358 "src/f32-vbinary/gen/vrdivc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700359 "src/f32-vbinary/gen/vrdivc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700360 "src/f32-vbinary/gen/vrdivc-scalar-x1.c",
361 "src/f32-vbinary/gen/vrdivc-scalar-x2.c",
362 "src/f32-vbinary/gen/vrdivc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700363 "src/f32-vbinary/gen/vrdivc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700364 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
365 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
366 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700367 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700368 "src/f32-vbinary/gen/vrsubc-relu-scalar-x1.c",
369 "src/f32-vbinary/gen/vrsubc-relu-scalar-x2.c",
370 "src/f32-vbinary/gen/vrsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700371 "src/f32-vbinary/gen/vrsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700372 "src/f32-vbinary/gen/vrsubc-scalar-x1.c",
373 "src/f32-vbinary/gen/vrsubc-scalar-x2.c",
374 "src/f32-vbinary/gen/vrsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700375 "src/f32-vbinary/gen/vrsubc-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700376 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
377 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
378 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700379 "src/f32-vbinary/gen/vsqrdiff-scalar-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700380 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
381 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
382 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700383 "src/f32-vbinary/gen/vsqrdiffc-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700384 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
385 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
386 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700387 "src/f32-vbinary/gen/vsub-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700388 "src/f32-vbinary/gen/vsub-relu-scalar-x1.c",
389 "src/f32-vbinary/gen/vsub-relu-scalar-x2.c",
390 "src/f32-vbinary/gen/vsub-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700391 "src/f32-vbinary/gen/vsub-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700392 "src/f32-vbinary/gen/vsub-scalar-x1.c",
393 "src/f32-vbinary/gen/vsub-scalar-x2.c",
394 "src/f32-vbinary/gen/vsub-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700395 "src/f32-vbinary/gen/vsub-scalar-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700396 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
397 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
398 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700399 "src/f32-vbinary/gen/vsubc-minmax-scalar-x8.c",
Frank Barchard674778d2020-08-08 10:17:25 -0700400 "src/f32-vbinary/gen/vsubc-relu-scalar-x1.c",
401 "src/f32-vbinary/gen/vsubc-relu-scalar-x2.c",
402 "src/f32-vbinary/gen/vsubc-relu-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700403 "src/f32-vbinary/gen/vsubc-relu-scalar-x8.c",
Frank Barchard8e229db2020-07-06 23:31:35 -0700404 "src/f32-vbinary/gen/vsubc-scalar-x1.c",
405 "src/f32-vbinary/gen/vsubc-scalar-x2.c",
406 "src/f32-vbinary/gen/vsubc-scalar-x4.c",
Frank Barchard9c7308f2020-08-31 17:03:01 -0700407 "src/f32-vbinary/gen/vsubc-scalar-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700408 "src/f32-vclamp/gen/vclamp-scalar-x1.c",
409 "src/f32-vclamp/gen/vclamp-scalar-x2.c",
410 "src/f32-vclamp/gen/vclamp-scalar-x4.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -0800411 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x1.c",
412 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x2.c",
413 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x3.c",
414 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x4.c",
415 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x5.c",
416 "src/f32-velu/gen/velu-scalar-rr2-lut16-p3-x6.c",
417 "src/f32-velu/gen/velu-scalar-rr2-p6-x1.c",
418 "src/f32-velu/gen/velu-scalar-rr2-p6-x2.c",
419 "src/f32-velu/gen/velu-scalar-rr2-p6-x3.c",
420 "src/f32-velu/gen/velu-scalar-rr2-p6-x4.c",
421 "src/f32-velu/gen/velu-scalar-rr2-p6-x5.c",
422 "src/f32-velu/gen/velu-scalar-rr2-p6-x6.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700423 "src/f32-vhswish/gen/vhswish-scalar-x1.c",
424 "src/f32-vhswish/gen/vhswish-scalar-x2.c",
425 "src/f32-vhswish/gen/vhswish-scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700426 "src/f32-vlrelu/gen/vlrelu-scalar-x1.c",
427 "src/f32-vlrelu/gen/vlrelu-scalar-x2.c",
428 "src/f32-vlrelu/gen/vlrelu-scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700429 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
430 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
431 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700432 "src/f32-vrelu/gen/vrelu-scalar-x1.c",
433 "src/f32-vrelu/gen/vrelu-scalar-x2.c",
434 "src/f32-vrelu/gen/vrelu-scalar-x4.c",
435 "src/f32-vrelu/gen/vrelu-scalar-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700436 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
437 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
438 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Frank Barchardc9c320e2020-08-07 22:12:46 -0700439 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
440 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
441 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
442 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
443 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
444 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
445 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
446 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
447 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -0700448 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x1.c",
449 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x2.c",
450 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut64-p2-div-x4.c",
451 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x1.c",
452 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x2.c",
453 "src/f32-vsigmoid/gen/vsigmoid-scalar-lut2048-p1-div-x4.c",
454 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x1.c",
455 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x2.c",
456 "src/f32-vsigmoid/gen/vsigmoid-scalar-p5-div-x4.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -0700457 "src/f32-vsqrt/gen/scalar-sqrt-x1.c",
458 "src/f32-vsqrt/gen/scalar-sqrt-x2.c",
459 "src/f32-vsqrt/gen/scalar-sqrt-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700460 "src/f32-vunary/gen/vabs-scalar-x1.c",
461 "src/f32-vunary/gen/vabs-scalar-x2.c",
462 "src/f32-vunary/gen/vabs-scalar-x4.c",
463 "src/f32-vunary/gen/vneg-scalar-x1.c",
464 "src/f32-vunary/gen/vneg-scalar-x2.c",
465 "src/f32-vunary/gen/vneg-scalar-x4.c",
466 "src/f32-vunary/gen/vsqr-scalar-x1.c",
467 "src/f32-vunary/gen/vsqr-scalar-x2.c",
468 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhande390d42020-11-29 19:32:18 -0800469 "src/math/expm1minus-scalar-rr2-lut4-p4.c",
470 "src/math/expm1minus-scalar-rr2-lut8-p3.c",
471 "src/math/expm1minus-scalar-rr2-lut8-p4.c",
Marat Dukhanc60742b2020-11-23 12:33:27 -0800472 "src/math/expm1minus-scalar-rr2-lut16-p3.c",
473 "src/math/expm1minus-scalar-rr2-lut16-p4.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700481 "src/math/roundd-scalar-floor.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700482 "src/math/roundne-scalar-addsub.c",
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Marat Dukhanc9852ba2020-05-13 17:21:29 -0700485 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700486 "src/math/roundu-scalar-ceil.c",
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Marat Dukhan2dbb9442020-05-12 20:43:43 -0700488 "src/math/roundz-scalar-addsub.c",
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Marat Dukhanffbf96a2020-05-14 02:59:08 -0700490 "src/math/roundz-scalar-trunc.c",
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Marat Dukhanf8475d62020-09-17 15:01:43 -0700493 "src/math/sigmoid-scalar-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -0700494 "src/qs8-dwconv/gen/up1x9-minmax-gemmlowp-scalar.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -0700506 "src/qs8-gemm/gen/1x2-minmax-gemmlowp-scalar.c",
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518 "src/qs8-igemm/gen/3x2-minmax-gemmlowp-scalar.c",
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Marat Dukhan2e23d2b2020-07-29 16:01:37 -0700522 "src/qs8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan06716242021-05-26 15:56:39 -0700525 "src/qs8-requantization/rndna-scalar-signed64.c",
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Marat Dukhan062bee32021-05-27 20:31:07 -0700528 "src/qs8-requantization/rndnu-scalar.c",
Marat Dukhand481c282021-05-11 23:48:31 -0700529 "src/qs8-vadd/gen/minmax-scalar-x1.c",
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533 "src/qs8-vaddc/gen/minmax-scalar-x2.c",
534 "src/qs8-vaddc/gen/minmax-scalar-x4.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -0700535 "src/qu8-avgpool/9p8x-minmax-scalar-c1.c",
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Frank Barchard04336c12020-10-22 16:48:55 -0700540 "src/qu8-gemm/2x2-minmax-scalar.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -0700542 "src/qu8-requantization/fp32-scalar-lrintf.c",
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Marat Dukhan9976cd82021-05-24 23:15:45 -0700544 "src/qu8-requantization/gemmlowp-scalar.c",
Marat Dukhan06716242021-05-26 15:56:39 -0700545 "src/qu8-requantization/rndna-scalar-signed64.c",
546 "src/qu8-requantization/rndna-scalar-unsigned32.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -0700548 "src/qu8-vadd/minmax-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700549 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700550 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700551 "src/u8-rmax/scalar.c",
Marat Dukhan6674d692021-05-05 22:27:00 -0700552 "src/u8-vclamp/scalar-x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -0700553 "src/x8-lut/scalar.c",
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556 "src/x8-zip/x4-scalar.c",
557 "src/x8-zip/xm-scalar.c",
Marat Dukhanad71b9a2020-11-20 00:01:51 -0800558 "src/x32-depthtospace2d-chw2hwc/scalar.c",
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560 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700561 "src/x32-packx/x2-scalar.c",
562 "src/x32-packx/x3-scalar.c",
563 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700564 "src/x32-pad/scalar-float.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -0700566 "src/x32-unpool/scalar.c",
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Marat Dukhan436ebe62019-12-04 15:10:12 -0800574WASM_UKERNELS = [
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001314 "src/f32-vclamp/gen/vclamp-wasmsimd-arm-x4.c",
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Marat Dukhaned6baaf2020-12-01 15:07:08 -08001318 "src/f32-velu/gen/velu-wasmsimd-arm-rr2-lut16-p3-x4.c",
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Marat Dukhan19dd91d2020-07-16 11:12:44 -07001345 "src/f32-vlrelu/gen/vlrelu-wasmsimd-bitselect-x4.c",
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Marat Dukhanb82b2cd2020-07-16 02:23:42 -07001356 "src/f32-vrnd/gen/vrndd-wasmsimd-addsub-x4.c",
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1365 "src/f32-vrnd/gen/vrndu-wasmsimd-cvt-x8.c",
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Marat Dukhanb1eec082021-05-05 23:24:55 -07001370 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x4.c",
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1372 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x12.c",
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1375 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-lut64-p2-div-x24.c",
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1378 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x12.c",
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1380 "src/f32-vsigmoid/gen/vsigmoid-wasmsimd-p5-div-x20.c",
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Marat Dukhanf4db2f32020-06-30 10:55:30 -07001382 "src/f32-vsqrt/gen/wasmsimd-sqrt-x4.c",
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1385 "src/f32-vunary/gen/vabs-wasmsimd-x8.c",
1386 "src/f32-vunary/gen/vneg-wasmsimd-x4.c",
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1388 "src/f32-vunary/gen/vsqr-wasmsimd-x4.c",
1389 "src/f32-vunary/gen/vsqr-wasmsimd-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001390 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-andnot.c",
1391 "src/math/expm1minus-wasmsimd-rr2-lut16-p3-max.c",
1392 "src/math/expm1minus-wasmsimd-rr2-p6-andnot.c",
1393 "src/math/expm1minus-wasmsimd-rr2-p6-max.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001394 "src/math/roundd-wasmsimd-addsub.c",
1395 "src/math/roundd-wasmsimd-cvt.c",
1396 "src/math/roundne-wasmsimd-addsub.c",
1397 "src/math/roundu-wasmsimd-addsub.c",
1398 "src/math/roundu-wasmsimd-cvt.c",
1399 "src/math/roundz-wasmsimd-addsub.c",
1400 "src/math/roundz-wasmsimd-cvt.c",
1401 "src/math/sigmoid-wasmsimd-rr2-lut64-p2-div.c",
1402 "src/math/sigmoid-wasmsimd-rr2-p5-div.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001403 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1405 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-wasmsimd-mul16.c",
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1407 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-wasmsimd-mul16.c",
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Marat Dukhanb5e3d172020-08-06 13:29:53 -07001409 "src/qs8-gavgpool/gen/7p7x-minmax-wasmsimd-c8-acc2.c",
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1423 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-wasmsimd.c",
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1428 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld64.c",
1429 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-wasmsimd-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001430 "src/qs8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001431 "src/qs8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan5df27f82020-09-02 23:59:21 -07001432 "src/qs8-vadd/gen/minmax-wasmsimd-x8.c",
1433 "src/qs8-vadd/gen/minmax-wasmsimd-x16.c",
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1435 "src/qs8-vadd/gen/minmax-wasmsimd-x32.c",
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Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001440 "src/qu8-requantization/fp32-wasmsimd.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001441 "src/qu8-requantization/gemmlowp-wasmsimd.c",
Marat Dukhan8ee37012020-07-16 13:17:13 -07001442 "src/x32-fill/wasmsimd.c",
Marat Dukhan66d99e92020-07-16 12:56:21 -07001443 "src/x32-packx/x4-wasmsimd.c",
Marat Dukhan9306ae02020-07-16 15:51:13 -07001444 "src/x32-pad/wasmsimd.c",
Marat Dukhan9d4bfa22020-07-16 19:07:04 -07001445 "src/x32-unpool/wasmsimd.c",
Marat Dukhane3b78762020-07-16 20:02:58 -07001446 "src/x32-zip/x2-wasmsimd.c",
1447 "src/x32-zip/x3-wasmsimd.c",
1448 "src/x32-zip/x4-wasmsimd.c",
1449 "src/x32-zip/xm-wasmsimd.c",
Marat Dukhan290055c2020-06-09 12:24:29 -07001450]
1451
Marat Dukhan08c4a432019-10-03 09:29:21 -07001452# ISA-specific micro-kernels
1453NEON_UKERNELS = [
Marat Dukhanef25c6d2020-07-24 00:59:40 -07001454 "src/f32-argmaxpool/4x-neon-c4.c",
1455 "src/f32-argmaxpool/9p8x-neon-c4.c",
1456 "src/f32-argmaxpool/9x-neon-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001457 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
1458 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001459 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001460 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001461 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001462 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -07001463 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001464 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001465 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07001466 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanc7634882020-12-07 15:11:12 -08001467 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001468 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001469 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001470 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001471 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001472 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001473 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
1474 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
1475 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
1476 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
1477 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -07001478 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001479 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001480 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc2.c",
1481 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc3.c",
1482 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4-acc4.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001483 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001484 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4-acc2.c",
Marat Dukhanc581e482020-10-24 01:28:11 -07001485 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-2x4.c",
1486 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-3x4.c",
1487 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-4x4.c",
1488 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-5x4.c",
1489 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neon-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001490 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc2.c",
1491 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc3.c",
1492 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001493 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07001494 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001495 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-2x4.c",
1496 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-3x4.c",
1497 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neon-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001498 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc2.c",
1499 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc3.c",
1500 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc4.c",
1501 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001502 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001503 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc2.c",
1504 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4-acc3.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001505 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001506 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001507 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07001508 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07001509 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-4x4.c",
1510 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neon-5x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001511 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc2.c",
1512 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc3.c",
1513 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc4.c",
1514 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4-acc5.c",
1515 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-1x4.c",
1516 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc2.c",
1517 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4-acc3.c",
1518 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-2x4.c",
Marat Dukhan30d4b252020-10-29 16:33:22 -07001519 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07001520 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neon-3x4.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07001521 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001522 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
1523 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001524 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001525 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
1526 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001527 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001528 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
1529 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
1530 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
1531 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
1532 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001533 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
1534 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001535 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
1536 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001537 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
1538 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001539 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
1540 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
1541 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
1542 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
1543 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
1544 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
1545 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
1546 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
1547 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
1548 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
1549 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
1550 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
1551 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
1552 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
1553 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
1554 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001555 "src/f32-ibilinear-chw/gen/neon-p4.c",
1556 "src/f32-ibilinear-chw/gen/neon-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001557 "src/f32-ibilinear/gen/neon-c4.c",
1558 "src/f32-ibilinear/gen/neon-c8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001559 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001560 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001561 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001562 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
1563 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001564 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001565 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
1566 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
1567 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
1568 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001569 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
1570 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001571 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
1572 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001573 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
1574 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001575 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
1576 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
1577 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001578 "src/f32-ppmm/gen/4x8-minmax-neon.c",
1579 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001580 "src/f32-prelu/gen/neon-1x4.c",
1581 "src/f32-prelu/gen/neon-1x8.c",
1582 "src/f32-prelu/gen/neon-1x16.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08001583 "src/f32-prelu/gen/neon-2x4.c",
1584 "src/f32-prelu/gen/neon-2x8.c",
Frank Barcharda5316982020-07-23 13:19:28 -07001585 "src/f32-prelu/gen/neon-2x16.c",
1586 "src/f32-prelu/gen/neon-4x4.c",
1587 "src/f32-prelu/gen/neon-4x8.c",
1588 "src/f32-prelu/gen/neon-4x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001589 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001590 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001591 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001592 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
1593 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001594 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001595 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
1596 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001597 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001598 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
1599 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001600 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
1601 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
1602 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
1603 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
1604 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
1605 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
1606 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
1607 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
1608 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
1609 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
1610 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
1611 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
1612 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001613 "src/f32-rmax/neon.c",
Marat Dukhan5b86c432020-12-06 19:15:03 -08001614 "src/f32-spmm/gen/4x1-minmax-neon-pipelined.c",
1615 "src/f32-spmm/gen/4x1-minmax-neon-x2.c",
1616 "src/f32-spmm/gen/4x1-minmax-neon.c",
1617 "src/f32-spmm/gen/8x1-minmax-neon-pipelined.c",
1618 "src/f32-spmm/gen/8x1-minmax-neon-x2.c",
1619 "src/f32-spmm/gen/8x1-minmax-neon.c",
1620 "src/f32-spmm/gen/12x1-minmax-neon.c",
1621 "src/f32-spmm/gen/16x1-minmax-neon-pipelined.c",
1622 "src/f32-spmm/gen/16x1-minmax-neon-x2.c",
1623 "src/f32-spmm/gen/16x1-minmax-neon.c",
1624 "src/f32-spmm/gen/32x1-minmax-neon-pipelined.c",
1625 "src/f32-spmm/gen/32x1-minmax-neon-x2.c",
1626 "src/f32-spmm/gen/32x1-minmax-neon.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001627 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
1628 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
1629 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
1630 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08001631 "src/f32-vbinary/gen/vmax-neon-x4.c",
1632 "src/f32-vbinary/gen/vmax-neon-x8.c",
1633 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
1634 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
1635 "src/f32-vbinary/gen/vmin-neon-x4.c",
1636 "src/f32-vbinary/gen/vmin-neon-x8.c",
1637 "src/f32-vbinary/gen/vminc-neon-x4.c",
1638 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001639 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
1640 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
1641 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
1642 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
1643 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
1644 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07001645 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
1646 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
1647 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
1648 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07001649 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
1650 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
1651 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
1652 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001653 "src/f32-vclamp/gen/vclamp-neon-x4.c",
1654 "src/f32-vclamp/gen/vclamp-neon-x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08001655 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x4.c",
1656 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x8.c",
1657 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x12.c",
1658 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x16.c",
1659 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x20.c",
1660 "src/f32-velu/gen/velu-neon-rr2-lut16-p3-x24.c",
1661 "src/f32-velu/gen/velu-neon-rr2-p6-x4.c",
1662 "src/f32-velu/gen/velu-neon-rr2-p6-x8.c",
1663 "src/f32-velu/gen/velu-neon-rr2-p6-x12.c",
1664 "src/f32-velu/gen/velu-neon-rr2-p6-x16.c",
1665 "src/f32-velu/gen/velu-neon-rr2-p6-x20.c",
1666 "src/f32-velu/gen/velu-neon-rr2-p6-x24.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001667 "src/f32-vhswish/gen/vhswish-neon-x4.c",
1668 "src/f32-vhswish/gen/vhswish-neon-x8.c",
1669 "src/f32-vhswish/gen/vhswish-neon-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07001670 "src/f32-vlrelu/gen/vlrelu-neon-x4.c",
1671 "src/f32-vlrelu/gen/vlrelu-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001672 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
1673 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001674 "src/f32-vrelu/gen/vrelu-neon-x4.c",
1675 "src/f32-vrelu/gen/vrelu-neon-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07001676 "src/f32-vrnd/gen/vrndd-neon-x4.c",
1677 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001678 "src/f32-vrnd/gen/vrndne-neon-x4.c",
1679 "src/f32-vrnd/gen/vrndne-neon-x8.c",
1680 "src/f32-vrnd/gen/vrndu-neon-x4.c",
1681 "src/f32-vrnd/gen/vrndu-neon-x8.c",
1682 "src/f32-vrnd/gen/vrndz-neon-x4.c",
1683 "src/f32-vrnd/gen/vrndz-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07001684 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x4.c",
1685 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x8.c",
1686 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x12.c",
1687 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x16.c",
1688 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x20.c",
1689 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut64-p2-nr2recps-x24.c",
1690 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x4.c",
1691 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x8.c",
1692 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x12.c",
1693 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x16.c",
1694 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x20.c",
1695 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-lut2048-p1-nr2recps-x24.c",
1696 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x4.c",
1697 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x8.c",
1698 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x12.c",
1699 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x16.c",
1700 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x20.c",
1701 "src/f32-vsigmoid/gen/vsigmoid-neon-rr2-p5-nr2recps-x24.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07001702 "src/f32-vunary/gen/vabs-neon-x4.c",
1703 "src/f32-vunary/gen/vabs-neon-x8.c",
1704 "src/f32-vunary/gen/vneg-neon-x4.c",
1705 "src/f32-vunary/gen/vneg-neon-x8.c",
1706 "src/f32-vunary/gen/vsqr-neon-x4.c",
1707 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhande390d42020-11-29 19:32:18 -08001708 "src/math/expm1minus-neon-rr2-lut16-p3.c",
1709 "src/math/expm1minus-neon-rr2-p6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001710 "src/math/roundd-neon-addsub.c",
1711 "src/math/roundd-neon-cvt.c",
1712 "src/math/roundne-neon-addsub.c",
1713 "src/math/roundu-neon-addsub.c",
1714 "src/math/roundu-neon-cvt.c",
1715 "src/math/roundz-neon-addsub.c",
1716 "src/math/roundz-neon-cvt.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001717 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1718 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1719 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
1720 "src/math/sqrt-neon-nr1rsqrts.c",
1721 "src/math/sqrt-neon-nr2rsqrts.c",
1722 "src/math/sqrt-neon-nr3rsqrts.c",
Marat Dukhane1ff2482021-05-24 17:48:47 -07001723 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-neon-mul16.c",
1724 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-neon-mul16.c",
1725 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-neon-mul16.c",
1726 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-neon-mul16.c",
1727 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-neon-mul16.c",
1728 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-neon-mul16.c",
1729 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-neon-mul16.c",
1730 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-neon-mul16.c",
Marat Dukhan281262d2020-08-10 13:23:21 -07001731 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c8-acc2.c",
1732 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c16-acc2.c",
1733 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c24-acc2.c",
1734 "src/qs8-gavgpool/gen/7p7x-minmax-neon-c32-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001735 "src/qs8-gavgpool/gen/7x-minmax-neon-c8-acc2.c",
1736 "src/qs8-gavgpool/gen/7x-minmax-neon-c16-acc2.c",
1737 "src/qs8-gavgpool/gen/7x-minmax-neon-c24-acc2.c",
1738 "src/qs8-gavgpool/gen/7x-minmax-neon-c32-acc2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07001739 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1740 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1741 "src/qs8-gemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1742 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1743 "src/qs8-gemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1744 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1745 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1746 "src/qs8-gemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1747 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1748 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1749 "src/qs8-gemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1750 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1751 "src/qs8-gemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1752 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1753 "src/qs8-gemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1754 "src/qs8-gemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1755 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1756 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1757 "src/qs8-gemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1758 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1759 "src/qs8-gemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1760 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1761 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1762 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1763 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1764 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1765 "src/qs8-gemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1766 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1767 "src/qs8-gemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1768 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1769 "src/qs8-gemm/gen/2x16c8-minmax-gemmlowp-neon-mull-padal.c",
1770 "src/qs8-gemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1771 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1772 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
1773 "src/qs8-gemm/gen/3x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1774 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1775 "src/qs8-gemm/gen/3x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1776 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1777 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-neon-mull-padal.c",
1778 "src/qs8-gemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1779 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1780 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1781 "src/qs8-gemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1782 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1783 "src/qs8-gemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1784 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1785 "src/qs8-gemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1786 "src/qs8-gemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1787 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1788 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1789 "src/qs8-gemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1790 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1791 "src/qs8-gemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1792 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1793 "src/qs8-gemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1794 "src/qs8-gemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1795 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1796 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1797 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1798 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1799 "src/qs8-gemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1800 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1801 "src/qs8-gemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1802 "src/qs8-gemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1803 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1804 "src/qs8-gemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1805 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1806 "src/qs8-gemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
1807 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1808 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mlal-lane.c",
1809 "src/qs8-igemm/gen/1x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1810 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1811 "src/qs8-igemm/gen/1x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1812 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1813 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-neon-mull-padal.c",
1814 "src/qs8-igemm/gen/1x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1815 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1816 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mlal-lane.c",
1817 "src/qs8-igemm/gen/1x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1818 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1819 "src/qs8-igemm/gen/1x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1820 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1821 "src/qs8-igemm/gen/1x16c8-minmax-gemmlowp-neon-mull-padal.c",
1822 "src/qs8-igemm/gen/1x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1823 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1824 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mlal-lane.c",
1825 "src/qs8-igemm/gen/2x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1826 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1827 "src/qs8-igemm/gen/2x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1828 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1829 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-neon-mull-padal.c",
1830 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1831 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1832 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mlal-lane.c",
1833 "src/qs8-igemm/gen/2x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1834 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1835 "src/qs8-igemm/gen/2x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1836 "src/qs8-igemm/gen/2x16c8-minmax-gemmlowp-neon-mlal-padal.c",
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1838 "src/qs8-igemm/gen/2x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1839 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1840 "src/qs8-igemm/gen/3x8-minmax-gemmlowp-neon-mlal-lane.c",
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1842 "src/qs8-igemm/gen/3x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
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1846 "src/qs8-igemm/gen/3x8c16-minmax-gemmlowp-neon-mlal-padal.c",
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1848 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mlal-lane.c",
1849 "src/qs8-igemm/gen/3x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1850 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1851 "src/qs8-igemm/gen/3x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1852 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1853 "src/qs8-igemm/gen/3x16c8-minmax-gemmlowp-neon-mull-padal.c",
1854 "src/qs8-igemm/gen/3x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1855 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1856 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mlal-lane.c",
1857 "src/qs8-igemm/gen/4x8-minmax-gemmlowp-neon-mull-addw-dup.c",
1858 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1859 "src/qs8-igemm/gen/4x8c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1860 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mlal-padal.c",
1861 "src/qs8-igemm/gen/4x8c8-minmax-gemmlowp-neon-mull-padal.c",
1862 "src/qs8-igemm/gen/4x8c16-minmax-gemmlowp-neon-mlal-padal.c",
1863 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1864 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mlal-lane.c",
1865 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-neon-mull-addw-dup.c",
1866 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mlal-padal-dup.c",
1867 "src/qs8-igemm/gen/4x16c2-minmax-gemmlowp-neon-mull-padal-dup.c",
1868 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mlal-padal.c",
1869 "src/qs8-igemm/gen/4x16c8-minmax-gemmlowp-neon-mull-padal.c",
1870 "src/qs8-igemm/gen/4x16c16-minmax-gemmlowp-neon-mlal-padal.c",
1871 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1872 "src/qs8-igemm/gen/6x8-minmax-gemmlowp-neon-mlal-lane.c",
1873 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane-prfm.c",
1874 "src/qs8-igemm/gen/6x16-minmax-gemmlowp-neon-mlal-lane.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07001875 "src/qs8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001876 "src/qs8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001877 "src/qs8-requantization/rndna-neon.c",
Marat Dukhan062bee32021-05-27 20:31:07 -07001878 "src/qs8-requantization/rndnu-neon.c",
Marat Dukhanba7b2792020-09-02 14:26:45 -07001879 "src/qs8-vadd/gen/minmax-neon-ld64-x8.c",
1880 "src/qs8-vadd/gen/minmax-neon-ld64-x16.c",
1881 "src/qs8-vadd/gen/minmax-neon-ld64-x24.c",
1882 "src/qs8-vadd/gen/minmax-neon-ld64-x32.c",
1883 "src/qs8-vaddc/gen/minmax-neon-ld64-x8.c",
1884 "src/qs8-vaddc/gen/minmax-neon-ld64-x16.c",
1885 "src/qs8-vaddc/gen/minmax-neon-ld64-x24.c",
1886 "src/qs8-vaddc/gen/minmax-neon-ld64-x32.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001887 "src/qu8-avgpool/9p8x-minmax-neon-c8.c",
1888 "src/qu8-avgpool/9x-minmax-neon-c8.c",
1889 "src/qu8-dwconv/up8x9-minmax-neon.c",
1890 "src/qu8-gavgpool/7p7x-minmax-neon-c8.c",
1891 "src/qu8-gavgpool/7x-minmax-neon-c8.c",
1892 "src/qu8-gemm/4x8-minmax-neon.c",
1893 "src/qu8-gemm/8x8-minmax-neon.c",
1894 "src/qu8-igemm/4x8-minmax-neon.c",
1895 "src/qu8-igemm/8x8-minmax-neon.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07001896 "src/qu8-requantization/fp32-neon.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07001897 "src/qu8-requantization/gemmlowp-neon.c",
Marat Dukhan06716242021-05-26 15:56:39 -07001898 "src/qu8-requantization/rndna-neon.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07001899 "src/qu8-vadd/minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -07001900 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001901 "src/u8-rmax/neon.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07001902 "src/u8-vclamp/neon-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001903 "src/x8-zip/x2-neon.c",
1904 "src/x8-zip/x3-neon.c",
1905 "src/x8-zip/x4-neon.c",
1906 "src/x8-zip/xm-neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07001907 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001908 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -07001909 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07001910 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001911 "src/x32-zip/x2-neon.c",
1912 "src/x32-zip/x3-neon.c",
1913 "src/x32-zip/x4-neon.c",
1914 "src/x32-zip/xm-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07001915]
1916
1917NEONFMA_UKERNELS = [
Frank Barchard04336c12020-10-22 16:48:55 -07001918 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1919 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1920 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1921 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1922 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1923 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1924 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
1925 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1926 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
1927 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1928 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
1929 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1930 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1931 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1932 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1933 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1934 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1935 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1936 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1937 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1938 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
1939 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1940 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1941 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1942 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1943 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1944 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1945 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1946 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1947 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08001948 "src/f32-ibilinear-chw/gen/neonfma-p4.c",
1949 "src/f32-ibilinear-chw/gen/neonfma-p8.c",
Frank Barchard8247e212021-02-03 18:12:33 -08001950 "src/f32-ibilinear/gen/neonfma-c4.c",
1951 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001952 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001953 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001954 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001955 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1956 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001957 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1958 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001959 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1960 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07001961 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1962 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001963 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001964 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001965 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001966 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1967 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001968 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001969 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1970 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001971 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -08001972 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1973 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07001974 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1975 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1976 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1977 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1978 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1979 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1980 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1981 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1982 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1983 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1984 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1985 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1986 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
Marat Dukhan2fa7a0c2020-12-06 19:09:02 -08001987 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1988 "src/f32-spmm/gen/4x1-minmax-neonfma-x2.c",
1989 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1990 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1991 "src/f32-spmm/gen/8x1-minmax-neonfma-x2.c",
1992 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1993 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1994 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1995 "src/f32-spmm/gen/16x1-minmax-neonfma-x2.c",
1996 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1997 "src/f32-spmm/gen/32x1-minmax-neonfma-pipelined.c",
1998 "src/f32-spmm/gen/32x1-minmax-neonfma-x2.c",
1999 "src/f32-spmm/gen/32x1-minmax-neonfma.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002000 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x4.c",
2001 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x8.c",
2002 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x12.c",
2003 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x16.c",
2004 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x20.c",
2005 "src/f32-velu/gen/velu-neonfma-rr1-lut16-p3-x24.c",
2006 "src/f32-velu/gen/velu-neonfma-rr1-p6-x4.c",
2007 "src/f32-velu/gen/velu-neonfma-rr1-p6-x8.c",
2008 "src/f32-velu/gen/velu-neonfma-rr1-p6-x12.c",
2009 "src/f32-velu/gen/velu-neonfma-rr1-p6-x16.c",
2010 "src/f32-velu/gen/velu-neonfma-rr1-p6-x20.c",
2011 "src/f32-velu/gen/velu-neonfma-rr1-p6-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002012 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
2013 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002014 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
2015 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
2016 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
2017 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
2018 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
2019 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
2020 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x4.c",
2021 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x8.c",
2022 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x12.c",
2023 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x16.c",
2024 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x20.c",
2025 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2fma-x24.c",
2026 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x4.c",
2027 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x8.c",
2028 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x12.c",
2029 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x16.c",
2030 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x20.c",
2031 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-nr2recps-x24.c",
2032 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
2033 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
2034 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
2035 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
2036 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
2037 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
2038 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x4.c",
2039 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x8.c",
2040 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x12.c",
2041 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x16.c",
2042 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x20.c",
2043 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2fma-x24.c",
2044 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x4.c",
2045 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x8.c",
2046 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x12.c",
2047 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x16.c",
2048 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x20.c",
2049 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-nr2recps-x24.c",
2050 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x4.c",
2051 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x8.c",
2052 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x12.c",
2053 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x16.c",
2054 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x20.c",
2055 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr1recps1fma-x24.c",
2056 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x4.c",
2057 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x8.c",
2058 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x12.c",
2059 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x16.c",
2060 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x20.c",
2061 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2fma-x24.c",
2062 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x4.c",
2063 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x8.c",
2064 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x12.c",
2065 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x16.c",
2066 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x20.c",
2067 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-nr2recps-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002068 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x4.c",
2069 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x8.c",
2070 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x12.c",
2071 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x16.c",
2072 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x20.c",
2073 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x24.c",
2074 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x28.c",
2075 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x32.c",
2076 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x36.c",
2077 "src/f32-vsqrt/gen/neonfma-nr1rsqrts1fma1adj-x40.c",
2078 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x4.c",
2079 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x8.c",
2080 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x12.c",
2081 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x16.c",
2082 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x20.c",
2083 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x24.c",
2084 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x28.c",
2085 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x32.c",
2086 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x36.c",
2087 "src/f32-vsqrt/gen/neonfma-nr2fma1adj-x40.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002088 "src/math/exp-neonfma-rr2-lut64-p2.c",
2089 "src/math/exp-neonfma-rr2-p5.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08002090 "src/math/expm1minus-neonfma-rr1-lut16-p3.c",
2091 "src/math/expm1minus-neonfma-rr1-p6.c",
Marat Dukhan9dd119a2020-11-20 18:20:04 -08002092 "src/math/expminus-neonfma-rr2-lut64-p2.c",
2093 "src/math/expminus-neonfma-rr2-lut2048-p1.c",
2094 "src/math/expminus-neonfma-rr2-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002095 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
2096 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
2097 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002098 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
2099 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
2100 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002101 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
2102 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
2103 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002104 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
2105 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
2106 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002107 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
2108 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
2109 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002110 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
2111 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
2112 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002113 "src/math/sqrt-neonfma-nr1fma.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002114 "src/math/sqrt-neonfma-nr1rsqrts1fma1adj.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002115 "src/math/sqrt-neonfma-nr2fma.c",
2116 "src/math/sqrt-neonfma-nr2fma1adj.c",
2117 "src/math/sqrt-neonfma-nr3fma.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002118]
2119
2120AARCH64_NEONFMA_UKERNELS = [
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Marat Dukhance7a3f82020-05-17 21:46:44 -07002122 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002123 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
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Marat Dukhan56b10cd2020-05-18 09:35:49 -07002125 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002126 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002127 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -07002128 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -07002129 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002130 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc2.c",
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2132 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4-acc4.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002133 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-1x4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002134 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4-acc2.c",
Marat Dukhan1268a242020-10-24 00:36:32 -07002135 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-2x4.c",
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2138 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-5x4.c",
2139 "src/f32-dwconv2d-chw/gen/3x3p1-minmax-neonfma-6x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002140 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc2.c",
2141 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc3.c",
2142 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4-acc4.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002143 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-1x4.c",
Marat Dukhan82f0c322020-10-25 19:17:35 -07002144 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002145 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-2x4.c",
2146 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-3x4.c",
2147 "src/f32-dwconv2d-chw/gen/3x3s2p1-minmax-neonfma-4x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002148 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc2.c",
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2151 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4-acc5.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002152 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-1x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002153 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4-acc2.c",
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Frank Barchard35db7d02020-10-26 13:37:34 -07002155 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-2x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002156 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4-acc2.c",
Frank Barchard35db7d02020-10-26 13:37:34 -07002157 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-3x4.c",
Marat Dukhan149f0ea2020-10-26 12:50:33 -07002158 "src/f32-dwconv2d-chw/gen/5x5p2-minmax-neonfma-4x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002161 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-1x4-acc2.c",
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Marat Dukhan30d4b252020-10-29 16:33:22 -07002169 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4-acc2.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07002170 "src/f32-dwconv2d-chw/gen/5x5s2p2-minmax-neonfma-3x4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002171 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
2172 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
2173 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
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2176 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
2177 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2178 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2179 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2180 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2181 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
2182 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2183 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
2184 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
2185 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
2186 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
2187 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
2188 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
2189 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
2190 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002191 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
2192 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002193 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
2194 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002195 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
2196 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002197 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
2198 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002199 "src/f32-spmm/gen/32x2-minmax-neonfma.c",
2200 "src/f32-spmm/gen/32x4-minmax-neonfma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002201 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
2202 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
2203 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
2204 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
2205 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
2206 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002207 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x4.c",
2208 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x8.c",
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2210 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x16.c",
2211 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x20.c",
2212 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut64-p2-div-x24.c",
2213 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x4.c",
2214 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x8.c",
2215 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x12.c",
2216 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x16.c",
2217 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x20.c",
2218 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-lut2048-p1-div-x24.c",
2219 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x4.c",
2220 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x8.c",
2221 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x12.c",
2222 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x16.c",
2223 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x20.c",
2224 "src/f32-vsigmoid/gen/vsigmoid-neonfma-rr1-p5-div-x24.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002225 "src/f32-vsqrt/gen/neon-sqrt-x4.c",
2226 "src/f32-vsqrt/gen/neon-sqrt-x8.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002227 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002228 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002229 "src/math/sigmoid-neonfma-rr1-p5-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002230 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002231 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
Marat Dukhan77221d32020-01-06 10:04:39 -08002232 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002233]
2234
Marat Dukhan8853b822020-05-07 12:19:01 -07002235NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002236 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
2237 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002238 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
2239 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
2240 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
2241 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
2242 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
2243 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002244 "src/math/roundd-neonv8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002245 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002246 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002247 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -07002248]
2249
Marat Dukhan08c4a432019-10-03 09:29:21 -07002250AARCH64_NEONFP16ARITH_UKERNELS = [
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2453 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
2454 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002455 "src/f32-gemm/gen/5x8-minmax-sse-dup.c",
2456 "src/f32-gemm/gen/5x8-minmax-sse-load1.c",
2457 "src/f32-gemm/gen/5x8s4-minmax-sse.c",
Artsiom Ablavatskib3ffd582021-03-31 13:00:08 -07002458 "src/f32-ibilinear-chw/gen/sse-p4.c",
2459 "src/f32-ibilinear-chw/gen/sse-p8.c",
Frank Barchard4a352042021-04-13 15:52:08 -07002460 "src/f32-ibilinear/gen/sse-c4.c",
2461 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002462 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
2463 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
2464 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002465 "src/f32-igemm/gen/3x8-minmax-sse-dup.c",
2466 "src/f32-igemm/gen/3x8-minmax-sse-load1.c",
2467 "src/f32-igemm/gen/3x8s4-minmax-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002468 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
2469 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
2470 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
2471 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002472 "src/f32-igemm/gen/5x8-minmax-sse-dup.c",
2473 "src/f32-igemm/gen/5x8-minmax-sse-load1.c",
2474 "src/f32-igemm/gen/5x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002475 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
2476 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
2477 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07002478 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -07002479 "src/f32-prelu/gen/sse-2x4.c",
2480 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002481 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -07002482 "src/f32-spmm/gen/4x1-minmax-sse.c",
2483 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -07002484 "src/f32-spmm/gen/16x1-minmax-sse.c",
Frank Barchard846c0c62020-10-26 15:01:39 -07002485 "src/f32-spmm/gen/32x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002486 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
2487 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
2488 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
2489 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
2490 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
2491 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
2492 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
2493 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -08002494 "src/f32-vbinary/gen/vmax-sse-x4.c",
2495 "src/f32-vbinary/gen/vmax-sse-x8.c",
2496 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
2497 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
2498 "src/f32-vbinary/gen/vmin-sse-x4.c",
2499 "src/f32-vbinary/gen/vmin-sse-x8.c",
2500 "src/f32-vbinary/gen/vminc-sse-x4.c",
2501 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002502 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
2503 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
2504 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
2505 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
2506 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
2507 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
2508 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
2509 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07002510 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
2511 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
2512 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
2513 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07002514 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
2515 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
2516 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
2517 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002518 "src/f32-vclamp/gen/vclamp-sse-x4.c",
2519 "src/f32-vclamp/gen/vclamp-sse-x8.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002520 "src/f32-vhswish/gen/vhswish-sse-x4.c",
2521 "src/f32-vhswish/gen/vhswish-sse-x8.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002522 "src/f32-vlrelu/gen/vlrelu-sse-x4.c",
2523 "src/f32-vlrelu/gen/vlrelu-sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002524 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
2525 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002526 "src/f32-vrelu/gen/vrelu-sse-x4.c",
2527 "src/f32-vrelu/gen/vrelu-sse-x8.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07002528 "src/f32-vsqrt/gen/sse-sqrt-x4.c",
2529 "src/f32-vsqrt/gen/sse-sqrt-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07002530 "src/f32-vunary/gen/vabs-sse-x4.c",
2531 "src/f32-vunary/gen/vabs-sse-x8.c",
2532 "src/f32-vunary/gen/vneg-sse-x4.c",
2533 "src/f32-vunary/gen/vneg-sse-x8.c",
2534 "src/f32-vunary/gen/vsqr-sse-x4.c",
2535 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002536 "src/math/roundd-sse-addsub.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002537 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -07002538 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -07002539 "src/math/roundz-sse-addsub.c",
Marat Dukhan84000762020-06-29 18:38:43 -07002540 "src/math/sqrt-sse-hh1mac.c",
2541 "src/math/sqrt-sse-nr1mac.c",
2542 "src/math/sqrt-sse-nr2mac.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002543 "src/x32-fill/sse.c",
2544 "src/x32-packx/x4-sse.c",
2545 "src/x32-pad/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002546]
2547
2548SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -08002549 "src/f32-argmaxpool/4x-sse2-c4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002550 "src/f32-argmaxpool/9p8x-sse2-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -08002551 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan802fcae2020-12-11 14:37:25 -08002552 "src/f32-gemm/gen-inc/1x8inc-minmax-sse2-dup.c",
2553 "src/f32-gemm/gen-inc/3x8inc-minmax-sse2-dup.c",
2554 "src/f32-gemm/gen-inc/4x8inc-minmax-sse2-dup.c",
2555 "src/f32-gemm/gen-inc/5x8inc-minmax-sse2-dup.c",
2556 "src/f32-gemm/gen/1x8-minmax-sse2-dup.c",
2557 "src/f32-gemm/gen/3x8-minmax-sse2-dup.c",
2558 "src/f32-gemm/gen/4x8-minmax-sse2-dup.c",
2559 "src/f32-gemm/gen/5x8-minmax-sse2-dup.c",
2560 "src/f32-igemm/gen/1x8-minmax-sse2-dup.c",
2561 "src/f32-igemm/gen/3x8-minmax-sse2-dup.c",
2562 "src/f32-igemm/gen/4x8-minmax-sse2-dup.c",
2563 "src/f32-igemm/gen/5x8-minmax-sse2-dup.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -08002564 "src/f32-prelu/gen/sse2-2x4.c",
2565 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002566 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002567 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002568 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002569 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
2570 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002571 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002572 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
2573 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002574 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -08002575 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
2576 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002577 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002578 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x4.c",
2579 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x8.c",
2580 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x12.c",
2581 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x16.c",
2582 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x20.c",
2583 "src/f32-velu/gen/velu-sse2-rr2-lut16-p3-x24.c",
2584 "src/f32-velu/gen/velu-sse2-rr2-p6-x4.c",
2585 "src/f32-velu/gen/velu-sse2-rr2-p6-x8.c",
2586 "src/f32-velu/gen/velu-sse2-rr2-p6-x12.c",
2587 "src/f32-velu/gen/velu-sse2-rr2-p6-x16.c",
2588 "src/f32-velu/gen/velu-sse2-rr2-p6-x20.c",
2589 "src/f32-velu/gen/velu-sse2-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002590 "src/f32-vlrelu/gen/vlrelu-sse2-x4.c",
2591 "src/f32-vlrelu/gen/vlrelu-sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002592 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
2593 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002594 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
2595 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
2596 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
2597 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
2598 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
2599 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002600 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x4.c",
2601 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x8.c",
2602 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x12.c",
2603 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x16.c",
2604 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x20.c",
2605 "src/f32-vsigmoid/gen/vsigmoid-sse2-lut64-p2-div-x24.c",
2606 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x4.c",
2607 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x8.c",
2608 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x12.c",
2609 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x16.c",
2610 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x20.c",
2611 "src/f32-vsigmoid/gen/vsigmoid-sse2-p5-div-x24.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08002612 "src/math/exp-sse2-rr2-lut64-p2.c",
2613 "src/math/exp-sse2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08002614 "src/math/expm1minus-sse2-rr2-lut16-p3.c",
Marat Dukhana438aca2020-11-20 15:45:01 -08002615 "src/math/expm1minus-sse2-rr2-p6.c",
Frank Barchard3b800452020-11-22 12:12:35 -08002616 "src/math/expminus-sse2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002617 "src/math/roundd-sse2-cvt.c",
2618 "src/math/roundne-sse2-cvt.c",
2619 "src/math/roundu-sse2-cvt.c",
2620 "src/math/roundz-sse2-cvt.c",
2621 "src/math/sigmoid-sse2-rr2-lut64-p2-div.c",
2622 "src/math/sigmoid-sse2-rr2-lut64-p2-nr1.c",
2623 "src/math/sigmoid-sse2-rr2-lut64-p2-nr2.c",
2624 "src/math/sigmoid-sse2-rr2-p5-div.c",
2625 "src/math/sigmoid-sse2-rr2-p5-nr1.c",
2626 "src/math/sigmoid-sse2-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002627 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2628 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2629 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2630 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2631 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2632 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002633 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002634 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002635 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002636 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002637 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002638 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002639 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002640 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002641 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002642 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002643 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002644 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002645 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002646 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002647 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002648 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002649 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002650 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002651 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002652 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002653 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002654 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002655 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002656 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002657 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002658 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002659 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002660 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002661 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse2-mul16.c",
2662 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse2-mul16.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002663 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse2-mul16.c",
2664 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse2-mul16.c",
2665 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse2-mul16.c",
2666 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse2-mul16.c",
2667 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse2-mul16.c",
2668 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse2-mul16.c",
2669 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse2-mul16.c",
2670 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse2-mul16.c",
2671 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse2-mul16.c",
2672 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse2-mul16.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002673 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c8-acc2.c",
2674 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c16-acc2.c",
2675 "src/qs8-gavgpool/gen/7p7x-minmax-sse2-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002676 "src/qs8-gavgpool/gen/7x-minmax-sse2-c8-acc2.c",
2677 "src/qs8-gavgpool/gen/7x-minmax-sse2-c16-acc2.c",
2678 "src/qs8-gavgpool/gen/7x-minmax-sse2-c24-acc2.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002682 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002688 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse2.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002692 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
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Marat Dukhanc46e6712021-06-01 19:00:16 -07002694 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002695 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002697 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002698 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002699 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002700 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002701 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002702 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002703 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002704 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse2-ld64.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002707 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002715 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002716 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002717 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002719 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002720 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002721 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse2-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002722 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002723 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002725 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002727 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002729 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002731 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002733 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002735 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse2-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07002737 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse2-ld128.c",
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Marat Dukhanf62bbdc2020-08-04 13:59:04 -07002742 "src/qs8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002743 "src/qs8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002744 "src/qs8-requantization/rndna-sse2.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07002745 "src/qs8-vadd/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan0270d9f2020-08-11 00:56:46 -07002749 "src/qs8-vaddc/gen/minmax-sse2-mul16-ld64-x8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07002753 "src/qu8-avgpool/9p8x-minmax-sse2-c8.c",
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Marat Dukhan08b7a972020-07-14 18:17:29 -07002755 "src/qu8-dwconv/up8x9-minmax-sse2.c",
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2757 "src/qu8-gavgpool/7x-minmax-sse2-c8.c",
2758 "src/qu8-gemm/2x4c8-minmax-sse2.c",
2759 "src/qu8-gemm/4x4c2-minmax-sse2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002760 "src/qu8-igemm/4x4c2-minmax-sse2.c",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07002761 "src/qu8-requantization/fp32-sse2.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002762 "src/qu8-requantization/gemmlowp-sse2.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002763 "src/qu8-requantization/rndna-sse2.c",
Marat Dukhan08b7a972020-07-14 18:17:29 -07002764 "src/qu8-vadd/minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -07002765 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002766 "src/u8-rmax/sse2.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07002767 "src/u8-vclamp/sse2-x64.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002768 "src/x8-zip/x2-sse2.c",
2769 "src/x8-zip/x3-sse2.c",
2770 "src/x8-zip/x4-sse2.c",
2771 "src/x8-zip/xm-sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -07002772 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002773 "src/x32-zip/x2-sse2.c",
2774 "src/x32-zip/x3-sse2.c",
2775 "src/x32-zip/x4-sse2.c",
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Marat Dukhanfe7acb62020-03-09 19:30:05 -07002777]
2778
2779SSSE3_UKERNELS = [
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Marat Dukhand65d20e2021-05-24 16:59:51 -07002825 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002826 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002827 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002828 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-ssse3.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002829 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002830 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002831 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002832 "src/qs8-igemm/gen/1x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002833 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002834 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002835 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002836 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002837 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002838 "src/qs8-igemm/gen/2x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002839 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002840 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002841 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002842 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002843 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002844 "src/qs8-igemm/gen/3x4c8-minmax-fp32-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002845 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002846 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002847 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002848 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-ssse3-ld128.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002849 "src/qs8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002850 "src/qs8-requantization/rndna-ssse3.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07002851 "src/qu8-requantization/gemmlowp-ssse3.c",
Marat Dukhan06716242021-05-26 15:56:39 -07002852 "src/qu8-requantization/rndna-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07002853]
2854
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08002855SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -08002856 "src/f32-prelu/gen/sse41-2x4.c",
2857 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08002858 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x4.c",
2859 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x8.c",
2860 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x12.c",
2861 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x16.c",
2862 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x20.c",
2863 "src/f32-velu/gen/velu-sse41-rr2-lut16-p3-x24.c",
2864 "src/f32-velu/gen/velu-sse41-rr2-p6-x4.c",
2865 "src/f32-velu/gen/velu-sse41-rr2-p6-x8.c",
2866 "src/f32-velu/gen/velu-sse41-rr2-p6-x12.c",
2867 "src/f32-velu/gen/velu-sse41-rr2-p6-x16.c",
2868 "src/f32-velu/gen/velu-sse41-rr2-p6-x20.c",
2869 "src/f32-velu/gen/velu-sse41-rr2-p6-x24.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07002870 "src/f32-vlrelu/gen/vlrelu-sse41-x4.c",
2871 "src/f32-vlrelu/gen/vlrelu-sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07002872 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
2873 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002874 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
2875 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
2876 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
2877 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
2878 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
2879 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07002880 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x4.c",
2881 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x8.c",
2882 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x12.c",
2883 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x16.c",
2884 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x20.c",
2885 "src/f32-vsigmoid/gen/vsigmoid-sse41-lut64-p2-div-x24.c",
2886 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x4.c",
2887 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x8.c",
2888 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x12.c",
2889 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x16.c",
2890 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x20.c",
2891 "src/f32-vsigmoid/gen/vsigmoid-sse41-p5-div-x24.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002892 "src/math/roundd-sse41.c",
2893 "src/math/roundne-sse41.c",
2894 "src/math/roundu-sse41.c",
2895 "src/math/roundz-sse41.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07002896 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2897 "src/qc8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2898 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2899 "src/qc8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2900 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2901 "src/qc8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2902 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2903 "src/qc8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
2904 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2905 "src/qc8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2906 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2907 "src/qc8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002908 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002909 "src/qc8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002910 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002911 "src/qc8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002912 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002913 "src/qc8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002914 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002915 "src/qc8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002916 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002917 "src/qc8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002918 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002919 "src/qc8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002920 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002921 "src/qc8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002922 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002923 "src/qc8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002924 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002925 "src/qc8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002926 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002927 "src/qc8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002928 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002929 "src/qc8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002930 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002931 "src/qc8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002932 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002933 "src/qc8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07002934 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002935 "src/qc8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07002936 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul16.c",
2937 "src/qs8-dwconv/gen/up8x9-minmax-fp32-sse41-mul32.c",
2938 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul16.c",
2939 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-sse41-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002940 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul16.c",
2941 "src/qs8-dwconv/gen/up8x25-minmax-fp32-sse41-mul32.c",
2942 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul16.c",
2943 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-sse41-mul32.c",
2944 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul16.c",
2945 "src/qs8-dwconv/gen/up16x9-minmax-fp32-sse41-mul32.c",
2946 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul16.c",
2947 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-sse41-mul32.c",
2948 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul16.c",
2949 "src/qs8-dwconv/gen/up16x25-minmax-fp32-sse41-mul32.c",
2950 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul16.c",
2951 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-sse41-mul32.c",
2952 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul16.c",
2953 "src/qs8-dwconv/gen/up24x9-minmax-fp32-sse41-mul32.c",
2954 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul16.c",
2955 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-sse41-mul32.c",
2956 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul16.c",
2957 "src/qs8-dwconv/gen/up24x25-minmax-fp32-sse41-mul32.c",
2958 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul16.c",
2959 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-sse41-mul32.c",
Marat Dukhan159688f2020-08-06 10:34:29 -07002960 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c8-acc2.c",
2961 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c16-acc2.c",
2962 "src/qs8-gavgpool/gen/7p7x-minmax-sse41-c24-acc2.c",
Frank Barchard04336c12020-10-22 16:48:55 -07002963 "src/qs8-gavgpool/gen/7x-minmax-sse41-c8-acc2.c",
2964 "src/qs8-gavgpool/gen/7x-minmax-sse41-c16-acc2.c",
2965 "src/qs8-gavgpool/gen/7x-minmax-sse41-c24-acc2.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002966 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002967 "src/qs8-gemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002968 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002969 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002970 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002971 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002972 "src/qs8-gemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002973 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002974 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002975 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002976 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002977 "src/qs8-gemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002978 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002979 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002980 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002981 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002982 "src/qs8-gemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002983 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002984 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002985 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002986 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002987 "src/qs8-gemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002988 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002989 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002990 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002991 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002992 "src/qs8-gemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002993 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002994 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07002995 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002996 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002997 "src/qs8-gemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07002998 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07002999 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003000 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-sse41.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003001 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003002 "src/qs8-igemm/gen/1x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003003 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003004 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003005 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003006 "src/qs8-igemm/gen/1x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003007 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003008 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003009 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003010 "src/qs8-igemm/gen/2x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003011 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003012 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003013 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003014 "src/qs8-igemm/gen/2x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003015 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003016 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003017 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003018 "src/qs8-igemm/gen/3x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003019 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003020 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003021 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003022 "src/qs8-igemm/gen/3x4c8-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003023 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003024 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003025 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003026 "src/qs8-igemm/gen/4x4c2-minmax-fp32-sse41-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003027 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003028 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-sse41-ld128.c",
Marat Dukhan2e23d2b2020-07-29 16:01:37 -07003029 "src/qs8-requantization/fp32-sse4.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003030 "src/qs8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003031 "src/qs8-requantization/rndna-sse4.c",
Marat Dukhan0d979d52021-06-09 13:21:18 -07003032 "src/qs8-requantization/rndnu-sse4-sra.c",
3033 "src/qs8-requantization/rndnu-sse4-srl.c",
Marat Dukhand9f3ad42020-08-10 12:30:58 -07003034 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x8.c",
3035 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x16.c",
3036 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x24.c",
3037 "src/qs8-vadd/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003038 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x8.c",
3039 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x16.c",
3040 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x24.c",
3041 "src/qs8-vadd/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan0270d9f2020-08-11 00:56:46 -07003042 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x8.c",
3043 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x16.c",
3044 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x24.c",
3045 "src/qs8-vaddc/gen/minmax-sse41-mul16-ld64-x32.c",
Marat Dukhanbb9225e2020-09-06 22:40:56 -07003046 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x8.c",
3047 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x16.c",
3048 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x24.c",
3049 "src/qs8-vaddc/gen/minmax-sse41-mul32-ld32-x32.c",
Marat Dukhan9976cd82021-05-24 23:15:45 -07003050 "src/qu8-requantization/gemmlowp-sse4.c",
Marat Dukhan06716242021-05-26 15:56:39 -07003051 "src/qu8-requantization/rndna-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08003052]
3053
Marat Dukhan08c4a432019-10-03 09:29:21 -07003054AVX_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003055 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
3056 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003057 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
3058 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003059 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
3060 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003061 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
3062 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
3063 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
3064 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
3065 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
3066 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003067 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003068 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
3069 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003070 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003071 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003072 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003073 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003074 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
3075 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
3076 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
3077 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
3078 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
3079 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
3080 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
3081 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
3082 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
3083 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
3084 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003085 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003086 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
3087 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003088 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003089 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003090 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003091 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003092 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
3093 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003094 "src/f32-prelu/gen/avx-2x8.c",
3095 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003096 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003097 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
3098 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
3099 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
3100 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
3101 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
3102 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
3103 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
3104 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003105 "src/f32-vbinary/gen/vmax-avx-x8.c",
3106 "src/f32-vbinary/gen/vmax-avx-x16.c",
3107 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
3108 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
3109 "src/f32-vbinary/gen/vmin-avx-x8.c",
3110 "src/f32-vbinary/gen/vmin-avx-x16.c",
3111 "src/f32-vbinary/gen/vminc-avx-x8.c",
3112 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003113 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
3114 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
3115 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
3116 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
3117 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
3118 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
3119 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
3120 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003121 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
3122 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
3123 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
3124 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003125 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
3126 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
3127 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
3128 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003129 "src/f32-vclamp/gen/vclamp-avx-x8.c",
3130 "src/f32-vclamp/gen/vclamp-avx-x16.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003131 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x8.c",
3132 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x16.c",
3133 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x24.c",
3134 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x32.c",
3135 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x40.c",
3136 "src/f32-velu/gen/velu-avx-rr2-lut4-p4-perm-x48.c",
3137 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x8.c",
3138 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x16.c",
3139 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x24.c",
3140 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x32.c",
3141 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x40.c",
3142 "src/f32-velu/gen/velu-avx-rr2-lut16-p3-x48.c",
3143 "src/f32-velu/gen/velu-avx-rr2-p6-x8.c",
3144 "src/f32-velu/gen/velu-avx-rr2-p6-x16.c",
3145 "src/f32-velu/gen/velu-avx-rr2-p6-x24.c",
3146 "src/f32-velu/gen/velu-avx-rr2-p6-x32.c",
3147 "src/f32-velu/gen/velu-avx-rr2-p6-x40.c",
3148 "src/f32-velu/gen/velu-avx-rr2-p6-x48.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003149 "src/f32-vhswish/gen/vhswish-avx-x8.c",
3150 "src/f32-vhswish/gen/vhswish-avx-x16.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003151 "src/f32-vlrelu/gen/vlrelu-avx-x8.c",
3152 "src/f32-vlrelu/gen/vlrelu-avx-x16.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003153 "src/f32-vrelu/gen/vrelu-avx-x8.c",
3154 "src/f32-vrelu/gen/vrelu-avx-x16.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07003155 "src/f32-vrnd/gen/vrndd-avx-x8.c",
3156 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003157 "src/f32-vrnd/gen/vrndne-avx-x8.c",
3158 "src/f32-vrnd/gen/vrndne-avx-x16.c",
3159 "src/f32-vrnd/gen/vrndu-avx-x8.c",
3160 "src/f32-vrnd/gen/vrndu-avx-x16.c",
3161 "src/f32-vrnd/gen/vrndz-avx-x8.c",
3162 "src/f32-vrnd/gen/vrndz-avx-x16.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003163 "src/f32-vscale/avx-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003164 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x8.c",
3165 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x16.c",
3166 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x24.c",
3167 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x32.c",
3168 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x40.c",
3169 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x48.c",
3170 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x56.c",
3171 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x64.c",
3172 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x72.c",
3173 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-div-x80.c",
3174 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x8.c",
3175 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x16.c",
3176 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x24.c",
3177 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x32.c",
3178 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x40.c",
3179 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x48.c",
3180 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x56.c",
3181 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x64.c",
3182 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x72.c",
3183 "src/f32-vsigmoid/gen/vsigmoid-avx-rr2-p5-nr2-x80.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003184 "src/f32-vsqrt/gen/avx-sqrt-x8.c",
3185 "src/f32-vsqrt/gen/avx-sqrt-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003186 "src/f32-vunary/gen/vabs-avx-x8.c",
3187 "src/f32-vunary/gen/vabs-avx-x16.c",
3188 "src/f32-vunary/gen/vneg-avx-x8.c",
3189 "src/f32-vunary/gen/vneg-avx-x16.c",
3190 "src/f32-vunary/gen/vsqr-avx-x8.c",
3191 "src/f32-vunary/gen/vsqr-avx-x16.c",
Frank Barchard4a352042021-04-13 15:52:08 -07003192 "src/math/exp-avx-rr2-p5.c",
3193 "src/math/expm1minus-avx-rr2-lut4-p4-perm.c",
3194 "src/math/expm1minus-avx-rr2-lut16-p3.c",
3195 "src/math/expm1minus-avx-rr2-p6.c",
3196 "src/math/sigmoid-avx-rr2-lut64-p2-div.c",
3197 "src/math/sigmoid-avx-rr2-p5-div.c",
3198 "src/math/sigmoid-avx-rr2-p5-nr1.c",
3199 "src/math/sigmoid-avx-rr2-p5-nr2.c",
Marat Dukhan98042f22021-06-15 00:43:13 -07003200 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3201 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3202 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3203 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3204 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3205 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3206 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3207 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3208 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3209 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3210 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3211 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003212 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003213 "src/qc8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003214 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003215 "src/qc8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003216 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003217 "src/qc8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003218 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003219 "src/qc8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003220 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003221 "src/qc8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003222 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003223 "src/qc8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003224 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003225 "src/qc8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003226 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003227 "src/qc8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003228 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003229 "src/qc8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003230 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003231 "src/qc8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003232 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003233 "src/qc8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003234 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003235 "src/qc8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003236 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003237 "src/qc8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003238 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003239 "src/qc8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhancaf48312021-06-01 20:20:58 -07003240 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul16.c",
3241 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx-mul32.c",
3242 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul16.c",
3243 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx-mul32.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003244 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul16.c",
3245 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx-mul32.c",
3246 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul16.c",
3247 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx-mul32.c",
3248 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul16.c",
3249 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx-mul32.c",
3250 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul16.c",
3251 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx-mul32.c",
3252 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul16.c",
3253 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx-mul32.c",
3254 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul16.c",
3255 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx-mul32.c",
3256 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul16.c",
3257 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx-mul32.c",
3258 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul16.c",
3259 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx-mul32.c",
3260 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul16.c",
3261 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx-mul32.c",
3262 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul16.c",
3263 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx-mul32.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003264 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003265 "src/qs8-gemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003266 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003267 "src/qs8-gemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003268 "src/qs8-gemm/gen/1x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003269 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003270 "src/qs8-gemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003271 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003272 "src/qs8-gemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003273 "src/qs8-gemm/gen/1x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003274 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003275 "src/qs8-gemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003276 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003277 "src/qs8-gemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003278 "src/qs8-gemm/gen/2x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003279 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003280 "src/qs8-gemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003281 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003282 "src/qs8-gemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003283 "src/qs8-gemm/gen/2x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003284 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003285 "src/qs8-gemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003286 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003287 "src/qs8-gemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003288 "src/qs8-gemm/gen/3x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003289 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003290 "src/qs8-gemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003291 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003292 "src/qs8-gemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003293 "src/qs8-gemm/gen/3x4c8-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003294 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003295 "src/qs8-gemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003296 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003297 "src/qs8-gemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003298 "src/qs8-gemm/gen/4x4c2-xw-minmax-gemmlowp-avx.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003299 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003300 "src/qs8-igemm/gen/1x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003301 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003302 "src/qs8-igemm/gen/1x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003303 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003304 "src/qs8-igemm/gen/1x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003305 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003306 "src/qs8-igemm/gen/1x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003307 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003308 "src/qs8-igemm/gen/2x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003309 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003310 "src/qs8-igemm/gen/2x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003311 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003312 "src/qs8-igemm/gen/2x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003313 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003314 "src/qs8-igemm/gen/2x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003315 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003316 "src/qs8-igemm/gen/3x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003317 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003318 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003319 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003320 "src/qs8-igemm/gen/3x4c8-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003321 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003322 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003323 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003324 "src/qs8-igemm/gen/4x4c2-minmax-fp32-avx-ld128.c",
Marat Dukhanc46e6712021-06-01 19:00:16 -07003325 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003326 "src/qs8-igemm/gen/4x4c2-minmax-gemmlowp-avx-ld128.c",
Marat Dukhane9c4b962021-04-02 16:56:55 -07003327 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x8.c",
3328 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x16.c",
3329 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x24.c",
3330 "src/qs8-vadd/gen/minmax-avx-mul16-ld64-x32.c",
3331 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x8.c",
3332 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x16.c",
3333 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x24.c",
3334 "src/qs8-vadd/gen/minmax-avx-mul32-ld32-x32.c",
3335 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x8.c",
3336 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x16.c",
3337 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x24.c",
3338 "src/qs8-vaddc/gen/minmax-avx-mul16-ld64-x32.c",
3339 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x8.c",
3340 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x16.c",
3341 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x24.c",
3342 "src/qs8-vaddc/gen/minmax-avx-mul32-ld32-x32.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003343]
3344
Marat Dukhan1566fee2020-08-02 21:55:41 -07003345XOP_UKERNELS = [
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3347 "src/qc8-dwconv/gen/up8x25-minmax-fp32-xop-mul32.c",
3348 "src/qc8-dwconv/gen/up16x9-minmax-fp32-xop-mul32.c",
3349 "src/qc8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3350 "src/qc8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3351 "src/qc8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003352 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003353 "src/qc8-gemm/gen/1x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003354 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003355 "src/qc8-gemm/gen/1x4c8-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003356 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld64.c",
Frank Barchard23eb4822021-06-08 15:03:41 -07003357 "src/qc8-gemm/gen/2x4c2-minmax-fp32-xop-ld128.c",
Marat Dukhanfc188ed2021-06-03 12:21:22 -07003358 "src/qc8-gemm/gen/2x4c8-minmax-fp32-xop-ld64.c",
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3386 "src/qs8-dwconv/gen/up16x25-minmax-fp32-xop-mul32.c",
3387 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-xop-mul32.c",
3388 "src/qs8-dwconv/gen/up24x9-minmax-fp32-xop-mul32.c",
3389 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-xop-mul32.c",
3390 "src/qs8-dwconv/gen/up24x25-minmax-fp32-xop-mul32.c",
3391 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-xop-mul32.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003446 "src/qs8-igemm/gen/3x4c2-minmax-gemmlowp-xop-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003448 "src/qs8-igemm/gen/3x4c8-minmax-fp32-xop-ld128.c",
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Frank Barchard23eb4822021-06-08 15:03:41 -07003450 "src/qs8-igemm/gen/3x4c8-minmax-gemmlowp-xop-ld128.c",
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3458 "src/qs8-vadd/gen/minmax-xop-mul32-ld32-x32.c",
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Marat Dukhanfda12b82019-11-21 12:27:59 -08003465FMA3_UKERNELS = [
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3537 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003538 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003539 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003540 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003541 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
3542 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003543 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003544 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
3545 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
3546 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003547 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003548 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
3549 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003550 "src/f32-raddextexp/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003551 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003552 "src/f32-raddextexp/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003553 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
3554 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003555 "src/f32-raddextexp/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003556 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
3557 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
3558 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003559 "src/f32-raddextexp/gen/avx2-p5-x96.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003560 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
3561 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003562 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003563 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003564 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003565 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
3566 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003567 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003568 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
3569 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
3570 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003571 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003572 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x8.c",
3573 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x16.c",
3574 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x24.c",
3575 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x32.c",
3576 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x40.c",
3577 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x48.c",
3578 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x56.c",
3579 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x64.c",
3580 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x72.c",
3581 "src/f32-velu/gen/velu-avx2-rr1-lut4-p4-perm-x80.c",
3582 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x8.c",
3583 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x16.c",
3584 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x24.c",
3585 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x32.c",
3586 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x40.c",
3587 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x48.c",
3588 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x56.c",
3589 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x64.c",
3590 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x72.c",
3591 "src/f32-velu/gen/velu-avx2-rr1-lut8-p4-perm-x80.c",
3592 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x8.c",
3593 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x16.c",
3594 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x24.c",
3595 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x32.c",
3596 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x40.c",
3597 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x48.c",
3598 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x56.c",
3599 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x64.c",
3600 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x72.c",
3601 "src/f32-velu/gen/velu-avx2-rr1-lut16-p3-gather-x80.c",
3602 "src/f32-velu/gen/velu-avx2-rr1-p6-x8.c",
3603 "src/f32-velu/gen/velu-avx2-rr1-p6-x16.c",
3604 "src/f32-velu/gen/velu-avx2-rr1-p6-x24.c",
3605 "src/f32-velu/gen/velu-avx2-rr1-p6-x32.c",
3606 "src/f32-velu/gen/velu-avx2-rr1-p6-x40.c",
3607 "src/f32-velu/gen/velu-avx2-rr1-p6-x48.c",
3608 "src/f32-velu/gen/velu-avx2-rr1-p6-x56.c",
3609 "src/f32-velu/gen/velu-avx2-rr1-p6-x64.c",
3610 "src/f32-velu/gen/velu-avx2-rr1-p6-x72.c",
3611 "src/f32-velu/gen/velu-avx2-rr1-p6-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003612 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
3613 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
3614 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
3615 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
3616 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
3617 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
3618 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
3619 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
3620 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
3621 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
3622 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
3623 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
3624 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
3625 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
3626 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
3627 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
3628 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
3629 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
3630 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
3631 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
3632 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
3633 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
3634 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
3635 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003636 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x8.c",
3637 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x16.c",
3638 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x24.c",
3639 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x32.c",
3640 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x40.c",
3641 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x48.c",
3642 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x56.c",
3643 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x64.c",
3644 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x72.c",
3645 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-div-x80.c",
3646 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x8.c",
3647 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x16.c",
3648 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x24.c",
3649 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x32.c",
3650 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x40.c",
3651 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x48.c",
3652 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x56.c",
3653 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x64.c",
3654 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x72.c",
3655 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr1fma-x80.c",
3656 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x8.c",
3657 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x16.c",
3658 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x24.c",
3659 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x32.c",
3660 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x40.c",
3661 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x48.c",
3662 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x56.c",
3663 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x64.c",
3664 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x72.c",
3665 "src/f32-vsigmoid/gen/vsigmoid-avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003666 "src/math/exp-avx2-rr2-lut8-p3-perm.c",
3667 "src/math/exp-avx2-rr2-lut8-p4-perm.c",
3668 "src/math/exp-avx2-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003669 "src/math/expm1minus-avx2-rr1-lut4-p4-perm.c",
3670 "src/math/expm1minus-avx2-rr1-lut8-p4-perm.c",
3671 "src/math/expm1minus-avx2-rr1-lut16-p3-gather.c",
3672 "src/math/expm1minus-avx2-rr1-p6.c",
Frank Barcharde7223ee2020-12-04 19:04:01 -08003673 "src/math/expminus-avx2-rr2-p5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003674 "src/math/extexp-avx2-p5.c",
3675 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-div.c",
3676 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr1fma.c",
3677 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma.c",
3678 "src/math/sigmoid-avx2-rr1-lut64-p2-gather-nr2fma1adj.c",
3679 "src/math/sigmoid-avx2-rr1-p5-div.c",
3680 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
3681 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
3682 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-div.c",
3683 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr1fma.c",
3684 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma.c",
3685 "src/math/sigmoid-avx2-rr2-lut64-p2-gather-nr2fma1adj.c",
3686 "src/math/sigmoid-avx2-rr2-p5-div.c",
3687 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
3688 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
Marat Dukhan82286892021-06-04 17:27:27 -07003689 "src/qc8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
3690 "src/qc8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
3691 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
3692 "src/qc8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
3693 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
3694 "src/qc8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
3695 "src/qc8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
3696 "src/qc8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
3697 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
3698 "src/qc8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
3699 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
3700 "src/qc8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003701 "src/qc8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
3702 "src/qc8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
3703 "src/qc8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
3704 "src/qc8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
3705 "src/qc8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
3706 "src/qc8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhane06c8132021-06-03 08:59:11 -07003707 "src/qc8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
3708 "src/qc8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
3709 "src/qc8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003710 "src/qs8-dwconv/gen/up8x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003711 "src/qs8-dwconv/gen/up8x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003712 "src/qs8-dwconv/gen/up8x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003713 "src/qs8-dwconv/gen/up8x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003714 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003715 "src/qs8-dwconv/gen/up16x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003716 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul16.c",
3717 "src/qs8-dwconv/gen/up16x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003718 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003719 "src/qs8-dwconv/gen/up16x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003720 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul16.c",
3721 "src/qs8-dwconv/gen/up16x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003722 "src/qs8-dwconv/gen/up24x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003723 "src/qs8-dwconv/gen/up24x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003724 "src/qs8-dwconv/gen/up24x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003725 "src/qs8-dwconv/gen/up24x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003726 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003727 "src/qs8-dwconv/gen/up32x9-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003728 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul16.c",
3729 "src/qs8-dwconv/gen/up32x9-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003730 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul16.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003731 "src/qs8-dwconv/gen/up32x25-minmax-fp32-avx2-mul32.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003732 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul16.c",
3733 "src/qs8-dwconv/gen/up32x25-minmax-gemmlowp-avx2-mul32.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003734 "src/qs8-gemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003735 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003736 "src/qs8-gemm/gen/1x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003737 "src/qs8-gemm/gen/1x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003738 "src/qs8-gemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003739 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003740 "src/qs8-gemm/gen/2x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003741 "src/qs8-gemm/gen/2x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003742 "src/qs8-gemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003743 "src/qs8-gemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan0b043742021-06-02 18:29:11 -07003744 "src/qs8-gemm/gen/3x8c8-xw-minmax-fp32-avx2.c",
Marat Dukhand65d20e2021-05-24 16:59:51 -07003745 "src/qs8-gemm/gen/3x8c8-xw-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003746 "src/qs8-igemm/gen/1x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003747 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003748 "src/qs8-igemm/gen/2x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003749 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhan9b474cf2021-05-25 16:37:48 -07003750 "src/qs8-igemm/gen/3x8c8-minmax-fp32-avx2.c",
Frank Barchardd208bec2021-05-28 11:36:39 -07003751 "src/qs8-igemm/gen/3x8c8-minmax-gemmlowp-avx2.c",
Marat Dukhane6dc0b62020-09-08 23:57:14 -07003752 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x8.c",
3753 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x16.c",
3754 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x24.c",
3755 "src/qs8-vadd/gen/minmax-avx2-mul32-ld64-x32.c",
3756 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x8.c",
3757 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x16.c",
3758 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x24.c",
3759 "src/qs8-vaddc/gen/minmax-avx2-mul32-ld64-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07003760]
3761
Marat Dukhan08c4a432019-10-03 09:29:21 -07003762AVX512F_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -07003763 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
3764 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003765 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
3766 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003767 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
3768 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003769 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
3770 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
3771 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
3772 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
3773 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
3774 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003775 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
3776 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
3777 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
3778 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
3779 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
3780 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003781 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
3782 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
3783 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
3784 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
3785 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
3786 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan1c587112020-04-08 20:04:28 -07003787 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
3788 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
3789 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
3790 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
3791 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
3792 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -07003793 "src/f32-prelu/gen/avx512f-2x16.c",
3794 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003795 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3796 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003797 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003798 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003799 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003800 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3801 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003802 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003803 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3804 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3805 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003806 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003807 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
3808 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003809 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003810 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003811 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003812 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
3813 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003814 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003815 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
3816 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
3817 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003818 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003819 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
3820 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003821 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003822 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003823 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003824 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
3825 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003826 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003827 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
3828 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
3829 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003830 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07003831 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003832 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
3833 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
3834 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
3835 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
3836 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
3837 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
3838 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
3839 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -08003840 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
3841 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
3842 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
3843 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
3844 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
3845 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
3846 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
3847 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003848 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
3849 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
3850 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
3851 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
3852 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
3853 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
3854 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
3855 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -07003856 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
3857 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
3858 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
3859 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -07003860 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
3861 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
3862 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
3863 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003864 "src/f32-vclamp/gen/vclamp-avx512f-x16.c",
3865 "src/f32-vclamp/gen/vclamp-avx512f-x32.c",
Marat Dukhaned6baaf2020-12-01 15:07:08 -08003866 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x16.c",
3867 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x32.c",
3868 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x48.c",
3869 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x64.c",
3870 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x80.c",
3871 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x96.c",
3872 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x112.c",
3873 "src/f32-velu/gen/velu-avx512f-rr1-lut16-p3-perm-x128.c",
3874 "src/f32-velu/gen/velu-avx512f-rr1-p6-x16.c",
3875 "src/f32-velu/gen/velu-avx512f-rr1-p6-x32.c",
3876 "src/f32-velu/gen/velu-avx512f-rr1-p6-x48.c",
3877 "src/f32-velu/gen/velu-avx512f-rr1-p6-x64.c",
3878 "src/f32-velu/gen/velu-avx512f-rr1-p6-x80.c",
3879 "src/f32-velu/gen/velu-avx512f-rr1-p6-x96.c",
3880 "src/f32-velu/gen/velu-avx512f-rr1-p6-x112.c",
3881 "src/f32-velu/gen/velu-avx512f-rr1-p6-x128.c",
Marat Dukhan6674d692021-05-05 22:27:00 -07003882 "src/f32-vhswish/gen/vhswish-avx512f-x16.c",
3883 "src/f32-vhswish/gen/vhswish-avx512f-x32.c",
Marat Dukhan19dd91d2020-07-16 11:12:44 -07003884 "src/f32-vlrelu/gen/vlrelu-avx512f-x16.c",
3885 "src/f32-vlrelu/gen/vlrelu-avx512f-x32.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003886 "src/f32-vrelu/gen/vrelu-avx512f-x16.c",
3887 "src/f32-vrelu/gen/vrelu-avx512f-x32.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003888 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
3889 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
3890 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
3891 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
3892 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
3893 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
3894 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
3895 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
Frank Barchardbeca6522020-10-30 22:34:35 -07003896 "src/f32-vscale/avx512f-x64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -08003897 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
3898 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
3899 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
3900 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
3901 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
3902 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
3903 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
3904 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
3905 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
3906 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
3907 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
3908 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
3909 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
3910 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
3911 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
3912 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
3913 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
3914 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
3915 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
3916 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
3917 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
3918 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
3919 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
3920 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhanb1eec082021-05-05 23:24:55 -07003921 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
3922 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
3923 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
3924 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
3925 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
3926 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
3927 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
3928 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
3929 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
3930 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
3931 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
3932 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
3933 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
3934 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
3935 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
3936 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
3937 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
3938 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
3939 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
3940 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
3941 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
3942 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
3943 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
3944 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
3945 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
3946 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
3947 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
3948 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
3949 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
3950 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
3951 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
3952 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
3953 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
3954 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
3955 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
3956 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
3957 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
3958 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
3959 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
3960 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
3961 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
3962 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
3963 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
3964 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
3965 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
3966 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
3967 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
3968 "src/f32-vsigmoid/gen/vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
Marat Dukhanf4db2f32020-06-30 10:55:30 -07003969 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x16.c",
3970 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x32.c",
3971 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x48.c",
3972 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x64.c",
3973 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x80.c",
3974 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x96.c",
3975 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x112.c",
3976 "src/f32-vsqrt/gen/avx512f-nr1fma1adj-x128.c",
Marat Dukhan5020b962020-06-08 13:30:10 -07003977 "src/f32-vunary/gen/vabs-avx512f-x16.c",
3978 "src/f32-vunary/gen/vabs-avx512f-x32.c",
3979 "src/f32-vunary/gen/vneg-avx512f-x16.c",
3980 "src/f32-vunary/gen/vneg-avx512f-x32.c",
3981 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
3982 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhanb7633f22020-11-20 16:34:56 -08003983 "src/math/exp-avx512f-rr2-lut16-p3-perm-scalef.c",
3984 "src/math/exp-avx512f-rr2-lut16-p3-perm.c",
3985 "src/math/exp-avx512f-rr2-lut32-p2-perm2-scalef.c",
3986 "src/math/exp-avx512f-rr2-lut32-p2-perm2.c",
3987 "src/math/exp-avx512f-rr2-p5-scalef.c",
3988 "src/math/exp-avx512f-rr2-p5.c",
Marat Dukhande390d42020-11-29 19:32:18 -08003989 "src/math/expm1minus-avx512f-rr1-lut16-p3-perm.c",
3990 "src/math/expm1minus-avx512f-rr1-p6.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -07003991 "src/math/extexp-avx512f-p5.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003992 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003993 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003994 "src/math/sigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003995 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
Marat Dukhan6a34c5f2020-09-22 21:44:15 -07003996 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07003997 "src/math/sigmoid-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003998 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-div.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07003999 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
Frank Barchard04336c12020-10-22 16:48:55 -07004000 "src/math/sigmoid-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
4001 "src/math/sigmoid-avx512f-rr1-p5-scalef-div.c",
4002 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma.c",
4003 "src/math/sigmoid-avx512f-rr1-p5-scalef-nr1fma1adj.c",
4004 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-div.c",
4005 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
4006 "src/math/sigmoid-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
4007 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
4008 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
4009 "src/math/sigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
Marat Dukhan36173d22020-10-15 17:14:26 -07004010 "src/math/sigmoid-avx512f-rr2-lut64-p2-gather-scalef-div.c",
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4013 "src/math/sigmoid-avx512f-rr2-p5-scalef-div.c",
4014 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma.c",
4015 "src/math/sigmoid-avx512f-rr2-p5-scalef-nr1fma1adj.c",
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Marat Dukhan08c4a432019-10-03 09:29:21 -07004019]
4020
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004021AVX512SKX_UKERNELS = [
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4059
Frank Barchardbcedc082020-08-17 18:00:51 -07004060WASM32_ASM_UKERNELS = [
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Frank Barchardbcedc082020-08-17 18:00:51 -07004064]
4065
Marat Dukhan08c4a432019-10-03 09:29:21 -07004066AARCH32_ASM_UKERNELS = [
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Marat Dukhan08c4a432019-10-03 09:29:21 -07004081]
4082
4083AARCH64_ASM_UKERNELS = [
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4110 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004111 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004112 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004113 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004114 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004115 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004116 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004117 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004118 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
4119 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004120 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004121 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004122 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004123 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004124 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004125 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004126 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
4127 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004128 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004129 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
4130 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4131 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004132 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
4133 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
4134 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004135 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004136 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004137 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004138 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004139 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4140 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004141 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
4142 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
4143 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
4144 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004145 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004146 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004147 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004148 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
4149 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004150 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
4151 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
4152 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
4153 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
Frank Barchard04336c12020-10-22 16:48:55 -07004154 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004155 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -07004156 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004157 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004158 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004159 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4160 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
4161 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
4162 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Frank Barcharde3491242021-06-11 14:04:57 -07004163 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard79cd5f92021-06-21 17:34:59 -07004164 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
Frank Barchard143a1102021-06-15 09:15:34 -07004165 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-prfm-cortex-a75.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004166 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4167 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4168 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4169 "src/qs8-gemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004170 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4171 "src/qs8-gemm/gen/1x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004172 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4173 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4174 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4175 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004176 "src/qs8-gemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mull-padal.S",
4177 "src/qs8-gemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004178 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4179 "src/qs8-gemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004180 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4181 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld32.S",
4182 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004183 "src/qs8-gemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004184 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4185 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4186 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4187 "src/qs8-igemm/gen/1x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
4188 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-cortex-a53.S",
4189 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm-cortex-a53.S",
4190 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal-prfm.S",
4191 "src/qs8-igemm/gen/2x8c8-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004192 "src/qs8-igemm/gen/2x8c16-minmax-gemmlowp-aarch64-neon-mlal-padal.S",
Marat Dukhand65d20e2021-05-24 16:59:51 -07004193 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-cortex-a53.S",
4194 "src/qs8-igemm/gen/4x16-minmax-gemmlowp-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
Frank Barchardd208bec2021-05-28 11:36:39 -07004195 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-cortex-a55.S",
4196 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld64.S",
Frank Barchard0ae35f22021-06-15 17:34:24 -07004197 "src/qs8-igemm/gen/4x16c4-minmax-gemmlowp-aarch64-neondot-ld128.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004198]
4199
Marat Dukhan1b354632020-03-23 12:50:22 -07004200INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004201 "src/xnnpack/argmaxpool.h",
4202 "src/xnnpack/avgpool.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004203 "src/xnnpack/common.h",
4204 "src/xnnpack/conv.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08004205 "src/xnnpack/depthtospace.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004206 "src/xnnpack/dwconv.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004207 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004208 "src/xnnpack/gavgpool.h",
4209 "src/xnnpack/gemm.h",
Marat Dukhan660fd192020-03-10 04:55:30 -07004210 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004211 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -08004212 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004213 "src/xnnpack/lut.h",
4214 "src/xnnpack/math.h",
4215 "src/xnnpack/maxpool.h",
4216 "src/xnnpack/packx.h",
4217 "src/xnnpack/pad.h",
4218 "src/xnnpack/params.h",
4219 "src/xnnpack/pavgpool.h",
4220 "src/xnnpack/ppmm.h",
4221 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004222 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004223 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004224 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004225 "src/xnnpack/rmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004226 "src/xnnpack/spmm.h",
4227 "src/xnnpack/unpool.h",
4228 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004229 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004230 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -07004231 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -07004232 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07004233 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -08004234 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004235 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -07004236]
4237
4238INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004239 "include/xnnpack.h",
4240 "src/xnnpack/allocator.h",
4241 "src/xnnpack/compute.h",
4242 "src/xnnpack/im2col.h",
4243 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004244 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -07004245 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004246 "src/xnnpack/operator.h",
4247 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004248 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004249 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004250 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -08004251 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004252]
4253
Marat Dukhan1b354632020-03-23 12:50:22 -07004254ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004255 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004256]
4257
Marat Dukhan1b354632020-03-23 12:50:22 -07004258MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004259 "include/xnnpack.h",
Frank Barchard35db7d02020-10-26 13:37:34 -07004260 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004261]
4262
Marat Dukhan1b354632020-03-23 12:50:22 -07004263MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Frank Barchard35db7d02020-10-26 13:37:34 -07004264 "include/xnnpack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004265 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -07004266 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004267 "src/xnnpack/requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004268]
4269
4270OPERATOR_TEST_PARAMS_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004271 "src/xnnpack/common.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004272 "src/xnnpack/params.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004273]
4274
4275WEIGHTS_PACK_HDRS = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004276 "src/xnnpack/compute.h",
Frank Barchard04336c12020-10-22 16:48:55 -07004277 "src/xnnpack/operator.h",
4278 "src/xnnpack/pack.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004279]
4280
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004281LOGGING_COPTS = select({
4282 # No logging in optimized mode
4283 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
4284 # Full logging in debug mode
4285 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
4286 # Error-only logging in default (fastbuild) mode
4287 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
4288})
4289
Marat Dukhan3b59de22020-06-03 20:15:19 -07004290LOGGING_SRCS = select({
4291 # No logging in optimized mode
4292 ":optimized_build": [],
4293 "//conditions:default": [
Marat Dukhanccd3a1d2021-03-29 16:03:12 -07004294 "src/datatype-strings.c",
Marat Dukhan3b59de22020-06-03 20:15:19 -07004295 "src/operator-strings.c",
4296 "src/subgraph-strings.c",
4297 ],
4298})
4299
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07004300LOGGING_HDRS = [
4301 "src/xnnpack/log.h",
4302]
4303
Marat Dukhan08c4a432019-10-03 09:29:21 -07004304xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004305 name = "tables",
4306 srcs = TABLE_SRCS,
4307 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004308 gcc_copts = xnnpack_gcc_std_copts(),
4309 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004310)
4311
4312xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004313 name = "scalar_ukernels",
4314 srcs = SCALAR_UKERNELS,
4315 hdrs = INTERNAL_HDRS,
4316 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -07004317 gcc_copts = xnnpack_gcc_std_copts(),
4318 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07004319 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004320 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004321 "@FP16",
4322 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004323 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004324 ],
4325)
4326
4327xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004328 name = "scalar_ukernels_test_mode",
4329 srcs = SCALAR_UKERNELS,
4330 hdrs = INTERNAL_HDRS,
4331 aarch32_copts = ["-marm"],
4332 copts = [
4333 "-UNDEBUG",
4334 "-DXNN_TEST_MODE=1",
4335 ],
4336 gcc_copts = xnnpack_gcc_std_copts(),
4337 msvc_copts = xnnpack_msvc_std_copts(),
4338 deps = [
4339 ":tables",
4340 "@FP16",
4341 "@FXdiv",
4342 "@pthreadpool",
4343 ],
4344)
4345
4346xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -08004347 name = "wasm_ukernels",
4348 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004349 gcc_copts = xnnpack_gcc_std_copts(),
4350 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -08004351 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1c6e3892020-06-25 23:56:10 -07004352 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -08004353 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004354 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -08004355 "@FP16",
4356 "@FXdiv",
4357 "@pthreadpool",
4358 ],
4359)
4360
4361xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004362 name = "wasm_ukernels_test_mode",
4363 hdrs = INTERNAL_HDRS,
4364 copts = [
4365 "-UNDEBUG",
4366 "-DXNN_TEST_MODE=1",
4367 ],
4368 gcc_copts = xnnpack_gcc_std_copts(),
4369 msvc_copts = xnnpack_msvc_std_copts(),
4370 wasm_srcs = WASM_UKERNELS,
Marat Dukhan0e97d6f2020-06-26 19:35:09 -07004371 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07004372 deps = [
4373 ":tables",
4374 "@FP16",
4375 "@FXdiv",
4376 "@pthreadpool",
4377 ],
4378)
4379
4380xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004381 name = "neon_ukernels",
4382 hdrs = INTERNAL_HDRS,
4383 aarch32_copts = [
4384 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004385 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004386 "-mfpu=neon",
4387 ],
4388 aarch32_srcs = NEON_UKERNELS,
4389 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004390 gcc_copts = xnnpack_gcc_std_copts(),
4391 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004392 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004393 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004394 "@FP16",
4395 "@pthreadpool",
4396 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004397)
4398
4399xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004400 name = "neon_ukernels_test_mode",
4401 hdrs = INTERNAL_HDRS,
4402 aarch32_copts = [
4403 "-marm",
4404 "-march=armv7-a",
4405 "-mfpu=neon",
4406 ],
4407 aarch32_srcs = NEON_UKERNELS,
4408 aarch64_srcs = NEON_UKERNELS,
4409 copts = [
4410 "-UNDEBUG",
4411 "-DXNN_TEST_MODE=1",
4412 ],
4413 gcc_copts = xnnpack_gcc_std_copts(),
4414 msvc_copts = xnnpack_msvc_std_copts(),
4415 deps = [
4416 ":tables",
4417 "@FP16",
4418 "@pthreadpool",
4419 ],
4420)
4421
4422xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004423 name = "neonfma_ukernels",
4424 hdrs = INTERNAL_HDRS,
4425 aarch32_copts = [
4426 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -07004427 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004428 "-mfpu=neon-vfpv4",
4429 ],
4430 aarch32_srcs = NEONFMA_UKERNELS,
4431 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004432 apple_aarch32_copts = [
4433 "-mcpu=swift",
4434 "-mtune=generic",
4435 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004436 gcc_copts = xnnpack_gcc_std_copts(),
4437 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004438 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004439 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004440 "@FP16",
4441 "@pthreadpool",
4442 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004443)
4444
4445xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004446 name = "neonfma_ukernels_test_mode",
4447 hdrs = INTERNAL_HDRS,
4448 aarch32_copts = [
4449 "-marm",
4450 "-march=armv7-a",
4451 "-mfpu=neon-vfpv4",
4452 ],
4453 aarch32_srcs = NEONFMA_UKERNELS,
4454 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004455 apple_aarch32_copts = [
4456 "-mcpu=swift",
4457 "-mtune=generic",
4458 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004459 copts = [
4460 "-UNDEBUG",
4461 "-DXNN_TEST_MODE=1",
4462 ],
4463 gcc_copts = xnnpack_gcc_std_copts(),
4464 msvc_copts = xnnpack_msvc_std_copts(),
4465 deps = [
4466 ":tables",
4467 "@FP16",
4468 "@pthreadpool",
4469 ],
4470)
4471
4472xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -07004473 name = "neonv8_ukernels",
4474 hdrs = INTERNAL_HDRS,
4475 aarch32_copts = [
4476 "-marm",
4477 "-march=armv8-a",
4478 "-mfpu=neon-fp-armv8",
4479 ],
4480 aarch32_srcs = NEONV8_UKERNELS,
4481 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004482 apple_aarch32_copts = [
4483 "-mcpu=cyclone",
4484 "-mtune=generic",
4485 ],
Marat Dukhan8853b822020-05-07 12:19:01 -07004486 gcc_copts = xnnpack_gcc_std_copts(),
4487 msvc_copts = xnnpack_msvc_std_copts(),
4488 deps = [
4489 ":tables",
4490 "@FP16",
4491 "@pthreadpool",
4492 ],
4493)
4494
4495xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004496 name = "neonv8_ukernels_test_mode",
4497 hdrs = INTERNAL_HDRS,
4498 aarch32_copts = [
4499 "-marm",
4500 "-march=armv8-a",
4501 "-mfpu=neon-fp-armv8",
4502 ],
4503 aarch32_srcs = NEONV8_UKERNELS,
4504 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -07004505 apple_aarch32_copts = [
4506 "-mcpu=cyclone",
4507 "-mtune=generic",
4508 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004509 copts = [
4510 "-UNDEBUG",
4511 "-DXNN_TEST_MODE=1",
4512 ],
4513 gcc_copts = xnnpack_gcc_std_copts(),
4514 msvc_copts = xnnpack_msvc_std_copts(),
4515 deps = [
4516 ":tables",
4517 "@FP16",
4518 "@pthreadpool",
4519 ],
4520)
4521
4522xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004523 name = "neonfp16arith_ukernels",
4524 hdrs = INTERNAL_HDRS,
4525 aarch64_copts = ["-march=armv8.2-a+fp16"],
4526 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004527 gcc_copts = xnnpack_gcc_std_copts(),
4528 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -08004529 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004530 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004531 "@FP16",
4532 "@pthreadpool",
4533 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004534)
4535
4536xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004537 name = "neonfp16arith_ukernels_test_mode",
4538 hdrs = INTERNAL_HDRS,
4539 aarch64_copts = ["-march=armv8.2-a+fp16"],
4540 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
4541 copts = [
4542 "-UNDEBUG",
4543 "-DXNN_TEST_MODE=1",
4544 ],
4545 gcc_copts = xnnpack_gcc_std_copts(),
4546 msvc_copts = xnnpack_msvc_std_copts(),
4547 deps = [
4548 ":tables",
4549 "@FP16",
4550 "@pthreadpool",
4551 ],
4552)
4553
4554xnnpack_cc_library(
Benoit Jacoba9644732020-08-13 12:48:55 -07004555 name = "neondot_ukernels",
4556 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004557 aarch32_copts = [
4558 "-marm",
4559 "-march=armv8.2-a+dotprod",
4560 "-mfpu=neon-fp-armv8",
4561 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004562 aarch32_srcs = NEONDOT_UKERNELS,
4563 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4564 aarch64_srcs = NEONDOT_UKERNELS,
4565 gcc_copts = xnnpack_gcc_std_copts(),
4566 msvc_copts = xnnpack_msvc_std_copts(),
4567 deps = [
4568 ":tables",
4569 "@FP16",
4570 "@pthreadpool",
4571 ],
4572)
4573
4574xnnpack_cc_library(
4575 name = "neondot_ukernels_test_mode",
4576 hdrs = INTERNAL_HDRS,
Marat Dukhan799ac752020-08-13 16:08:03 -07004577 aarch32_copts = [
4578 "-marm",
4579 "-march=armv8.2-a+dotprod",
4580 "-mfpu=neon-fp-armv8",
4581 ],
Benoit Jacoba9644732020-08-13 12:48:55 -07004582 aarch32_srcs = NEONDOT_UKERNELS,
4583 aarch64_copts = ["-march=armv8.2-a+dotprod"],
4584 aarch64_srcs = NEONDOT_UKERNELS,
4585 copts = [
4586 "-UNDEBUG",
4587 "-DXNN_TEST_MODE=1",
4588 ],
4589 gcc_copts = xnnpack_gcc_std_copts(),
4590 msvc_copts = xnnpack_msvc_std_copts(),
4591 deps = [
4592 ":tables",
4593 "@FP16",
4594 "@pthreadpool",
4595 ],
4596)
4597
4598xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004599 name = "sse2_ukernels",
4600 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004601 gcc_copts = xnnpack_gcc_std_copts(),
4602 gcc_x86_copts = ["-msse2"],
4603 msvc_copts = xnnpack_msvc_std_copts(),
4604 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004605 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004606 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004607 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004608 "@FP16",
4609 "@pthreadpool",
4610 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004611)
4612
4613xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004614 name = "sse2_ukernels_test_mode",
4615 hdrs = INTERNAL_HDRS,
4616 copts = [
4617 "-UNDEBUG",
4618 "-DXNN_TEST_MODE=1",
4619 ],
4620 gcc_copts = xnnpack_gcc_std_copts(),
4621 gcc_x86_copts = ["-msse2"],
4622 msvc_copts = xnnpack_msvc_std_copts(),
4623 msvc_x86_32_copts = ["/arch:SSE2"],
4624 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
4625 deps = [
4626 ":tables",
4627 "@FP16",
4628 "@pthreadpool",
4629 ],
4630)
4631
4632xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004633 name = "ssse3_ukernels",
4634 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004635 gcc_copts = xnnpack_gcc_std_copts(),
4636 gcc_x86_copts = ["-mssse3"],
4637 msvc_copts = xnnpack_msvc_std_copts(),
4638 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -07004639 x86_srcs = SSSE3_UKERNELS,
4640 deps = [
4641 ":tables",
4642 "@FP16",
4643 "@pthreadpool",
4644 ],
4645)
4646
4647xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004648 name = "ssse3_ukernels_test_mode",
4649 hdrs = INTERNAL_HDRS,
4650 copts = [
4651 "-UNDEBUG",
4652 "-DXNN_TEST_MODE=1",
4653 ],
4654 gcc_copts = xnnpack_gcc_std_copts(),
4655 gcc_x86_copts = ["-mssse3"],
4656 msvc_copts = xnnpack_msvc_std_copts(),
4657 msvc_x86_32_copts = ["/arch:SSE2"],
4658 x86_srcs = SSSE3_UKERNELS,
4659 deps = [
4660 ":tables",
4661 "@FP16",
4662 "@pthreadpool",
4663 ],
4664)
4665
4666xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004667 name = "sse41_ukernels",
4668 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004669 gcc_copts = xnnpack_gcc_std_copts(),
4670 gcc_x86_copts = ["-msse4.1"],
4671 msvc_copts = xnnpack_msvc_std_copts(),
4672 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004673 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004674 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004675 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004676 "@FP16",
4677 "@pthreadpool",
4678 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08004679)
4680
4681xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004682 name = "sse41_ukernels_test_mode",
4683 hdrs = INTERNAL_HDRS,
4684 copts = [
4685 "-UNDEBUG",
4686 "-DXNN_TEST_MODE=1",
4687 ],
4688 gcc_copts = xnnpack_gcc_std_copts(),
4689 gcc_x86_copts = ["-msse4.1"],
4690 msvc_copts = xnnpack_msvc_std_copts(),
4691 msvc_x86_32_copts = ["/arch:SSE2"],
4692 x86_srcs = SSE41_UKERNELS,
4693 deps = [
4694 ":tables",
4695 "@FP16",
4696 "@pthreadpool",
4697 ],
4698)
4699
4700xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004701 name = "avx_ukernels",
4702 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004703 gcc_copts = xnnpack_gcc_std_copts(),
4704 gcc_x86_copts = ["-mavx"],
4705 msvc_copts = xnnpack_msvc_std_copts(),
4706 msvc_x86_32_copts = ["/arch:AVX"],
4707 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004708 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004709 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004710 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004711 "@FP16",
4712 "@pthreadpool",
4713 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004714)
4715
4716xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004717 name = "avx_ukernels_test_mode",
4718 hdrs = INTERNAL_HDRS,
4719 copts = [
4720 "-UNDEBUG",
4721 "-DXNN_TEST_MODE=1",
4722 ],
4723 gcc_copts = xnnpack_gcc_std_copts(),
4724 gcc_x86_copts = ["-mavx"],
4725 msvc_copts = xnnpack_msvc_std_copts(),
4726 msvc_x86_32_copts = ["/arch:AVX"],
4727 msvc_x86_64_copts = ["/arch:AVX"],
4728 x86_srcs = AVX_UKERNELS,
4729 deps = [
4730 ":tables",
4731 "@FP16",
4732 "@pthreadpool",
4733 ],
4734)
4735
4736xnnpack_cc_library(
Marat Dukhan1566fee2020-08-02 21:55:41 -07004737 name = "xop_ukernels",
4738 hdrs = INTERNAL_HDRS,
4739 gcc_copts = xnnpack_gcc_std_copts(),
4740 gcc_x86_copts = ["-mxop"],
4741 msvc_copts = xnnpack_msvc_std_copts(),
4742 msvc_x86_32_copts = ["/arch:AVX"],
4743 msvc_x86_64_copts = ["/arch:AVX"],
4744 x86_srcs = XOP_UKERNELS,
4745 deps = [
4746 ":tables",
4747 "@FP16",
4748 "@pthreadpool",
4749 ],
4750)
4751
4752xnnpack_cc_library(
4753 name = "xop_ukernels_test_mode",
4754 hdrs = INTERNAL_HDRS,
4755 copts = [
4756 "-UNDEBUG",
4757 "-DXNN_TEST_MODE=1",
4758 ],
4759 gcc_copts = xnnpack_gcc_std_copts(),
4760 gcc_x86_copts = ["-mxop"],
4761 msvc_copts = xnnpack_msvc_std_copts(),
4762 msvc_x86_32_copts = ["/arch:AVX"],
4763 msvc_x86_64_copts = ["/arch:AVX"],
4764 x86_srcs = XOP_UKERNELS,
4765 deps = [
4766 ":tables",
4767 "@FP16",
4768 "@pthreadpool",
4769 ],
4770)
4771
4772xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -08004773 name = "fma3_ukernels",
4774 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004775 gcc_copts = xnnpack_gcc_std_copts(),
4776 gcc_x86_copts = ["-mfma"],
4777 msvc_copts = xnnpack_msvc_std_copts(),
4778 msvc_x86_32_copts = ["/arch:AVX"],
4779 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -08004780 x86_srcs = FMA3_UKERNELS,
4781 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004782 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -08004783 "@FP16",
4784 "@pthreadpool",
4785 ],
4786)
4787
4788xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004789 name = "fma3_ukernels_test_mode",
4790 hdrs = INTERNAL_HDRS,
4791 copts = [
4792 "-UNDEBUG",
4793 "-DXNN_TEST_MODE=1",
4794 ],
4795 gcc_copts = xnnpack_gcc_std_copts(),
4796 gcc_x86_copts = ["-mfma"],
4797 msvc_copts = xnnpack_msvc_std_copts(),
4798 msvc_x86_32_copts = ["/arch:AVX"],
4799 msvc_x86_64_copts = ["/arch:AVX"],
4800 x86_srcs = FMA3_UKERNELS,
4801 deps = [
4802 ":tables",
4803 "@FP16",
4804 "@pthreadpool",
4805 ],
4806)
4807
4808xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004809 name = "avx2_ukernels",
4810 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004811 gcc_copts = xnnpack_gcc_std_copts(),
4812 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004813 "-mfma",
4814 "-mavx2",
4815 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07004816 msvc_copts = xnnpack_msvc_std_copts(),
4817 msvc_x86_32_copts = ["/arch:AVX2"],
4818 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004819 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004820 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004821 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004822 "@FP16",
4823 "@pthreadpool",
4824 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07004825)
4826
4827xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004828 name = "avx2_ukernels_test_mode",
4829 hdrs = INTERNAL_HDRS,
4830 copts = [
4831 "-UNDEBUG",
4832 "-DXNN_TEST_MODE=1",
4833 ],
4834 gcc_copts = xnnpack_gcc_std_copts(),
4835 gcc_x86_copts = [
4836 "-mfma",
4837 "-mavx2",
4838 ],
4839 msvc_copts = xnnpack_msvc_std_copts(),
4840 msvc_x86_32_copts = ["/arch:AVX2"],
4841 msvc_x86_64_copts = ["/arch:AVX2"],
4842 x86_srcs = AVX2_UKERNELS,
4843 deps = [
4844 ":tables",
4845 "@FP16",
4846 "@pthreadpool",
4847 ],
4848)
4849
4850xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004851 name = "avx512f_ukernels",
4852 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07004853 gcc_copts = xnnpack_gcc_std_copts(),
4854 gcc_x86_copts = ["-mavx512f"],
4855 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4856 msvc_copts = xnnpack_msvc_std_copts(),
4857 msvc_x86_32_copts = ["/arch:AVX512"],
4858 msvc_x86_64_copts = ["/arch:AVX512"],
4859 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004860 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -08004861 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -08004862 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -08004863 "@FP16",
4864 "@pthreadpool",
4865 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004866)
4867
4868xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07004869 name = "avx512f_ukernels_test_mode",
4870 hdrs = INTERNAL_HDRS,
4871 copts = [
4872 "-UNDEBUG",
4873 "-DXNN_TEST_MODE=1",
4874 ],
4875 gcc_copts = xnnpack_gcc_std_copts(),
4876 gcc_x86_copts = ["-mavx512f"],
4877 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4878 msvc_copts = xnnpack_msvc_std_copts(),
4879 msvc_x86_32_copts = ["/arch:AVX512"],
4880 msvc_x86_64_copts = ["/arch:AVX512"],
4881 msys_copts = ["-fno-asynchronous-unwind-tables"],
4882 x86_srcs = AVX512F_UKERNELS,
4883 deps = [
4884 ":tables",
4885 "@FP16",
4886 "@pthreadpool",
4887 ],
4888)
4889
4890xnnpack_cc_library(
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07004891 name = "avx512skx_ukernels",
4892 hdrs = INTERNAL_HDRS,
4893 gcc_copts = xnnpack_gcc_std_copts(),
4894 gcc_x86_copts = [
4895 "-mavx512f",
4896 "-mavx512cd",
4897 "-mavx512bw",
4898 "-mavx512dq",
4899 "-mavx512vl",
4900 ],
4901 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4902 msvc_copts = xnnpack_msvc_std_copts(),
4903 msvc_x86_32_copts = ["/arch:AVX512"],
4904 msvc_x86_64_copts = ["/arch:AVX512"],
4905 msys_copts = ["-fno-asynchronous-unwind-tables"],
4906 x86_srcs = AVX512SKX_UKERNELS,
4907 deps = [
4908 ":tables",
4909 "@FP16",
4910 "@pthreadpool",
4911 ],
4912)
4913
4914xnnpack_cc_library(
4915 name = "avx512skx_ukernels_test_mode",
4916 hdrs = INTERNAL_HDRS,
4917 copts = [
4918 "-UNDEBUG",
4919 "-DXNN_TEST_MODE=1",
4920 ],
4921 gcc_copts = xnnpack_gcc_std_copts(),
4922 gcc_x86_copts = [
4923 "-mavx512f",
4924 "-mavx512cd",
4925 "-mavx512bw",
4926 "-mavx512dq",
4927 "-mavx512vl",
4928 ],
4929 mingw_copts = ["-fno-asynchronous-unwind-tables"],
4930 msvc_copts = xnnpack_msvc_std_copts(),
4931 msvc_x86_32_copts = ["/arch:AVX512"],
4932 msvc_x86_64_copts = ["/arch:AVX512"],
4933 msys_copts = ["-fno-asynchronous-unwind-tables"],
4934 x86_srcs = AVX512SKX_UKERNELS,
4935 deps = [
4936 ":tables",
4937 "@FP16",
4938 "@pthreadpool",
4939 ],
4940)
4941
4942xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07004943 name = "asm_ukernels",
4944 hdrs = ["src/xnnpack/assembly.h"],
4945 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard31bb45b2020-10-06 00:26:33 -07004946 aarch64_copts = ["-march=armv8.2-a+fp16+dotprod"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07004947 aarch64_srcs = AARCH64_ASM_UKERNELS,
Frank Barchardbcedc082020-08-17 18:00:51 -07004948 wasm_srcs = WASM32_ASM_UKERNELS,
4949 wasmsimd_srcs = WASM32_ASM_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07004950)
4951
Marat Dukhan3b59de22020-06-03 20:15:19 -07004952xnnpack_cc_library(
4953 name = "logging_utils",
4954 srcs = LOGGING_SRCS,
4955 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
4956 copts = LOGGING_COPTS + [
4957 "-Isrc",
4958 "-Iinclude",
4959 ] + select({
4960 ":debug_build": [],
4961 "//conditions:default": xnnpack_min_size_copts(),
4962 }),
4963 gcc_copts = xnnpack_gcc_std_copts(),
4964 msvc_copts = xnnpack_msvc_std_copts(),
4965 visibility = xnnpack_visibility(),
4966 deps = [
4967 "@FP16",
4968 "@clog",
4969 "@pthreadpool",
4970 ],
4971)
4972
Marat Dukhan08c4a432019-10-03 09:29:21 -07004973xnnpack_aggregate_library(
4974 name = "ukernels",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07004975 aarch32_ios_deps = [
4976 ":neon_ukernels",
4977 ":neonfma_ukernels",
4978 ":neonv8_ukernels",
4979 ":asm_ukernels",
4980 ],
4981 aarch32_nonios_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004982 ":neon_ukernels",
4983 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004984 ":neonv8_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004985 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004986 ":asm_ukernels",
4987 ],
4988 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07004989 ":neon_ukernels",
4990 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -07004991 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004992 ":neonfp16arith_ukernels",
Benoit Jacoba9644732020-08-13 12:48:55 -07004993 ":neondot_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07004994 ":asm_ukernels",
4995 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004996 generic_deps = [
4997 ":scalar_ukernels",
4998 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07004999 wasm_deps = [
5000 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005001 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005002 ],
5003 wasmsimd_deps = [
5004 ":wasm_ukernels",
Frank Barchardbcedc082020-08-17 18:00:51 -07005005 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005006 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005007 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005008 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005009 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -08005010 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005011 ":avx_ukernels",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005012 ":xop_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -08005013 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07005014 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005015 ":avx512f_ukernels",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005016 ":avx512skx_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005017 ],
5018)
5019
Marat Dukhan33fcf782020-05-24 14:27:15 -07005020xnnpack_aggregate_library(
5021 name = "ukernels_test_mode",
Marat Dukhan6e8c0ce2021-04-13 14:35:08 -07005022 aarch32_ios_deps = [
5023 ":neon_ukernels_test_mode",
5024 ":neonfma_ukernels_test_mode",
5025 ":neonv8_ukernels_test_mode",
5026 ":asm_ukernels",
5027 ],
5028 aarch32_nonios_deps = [
Marat Dukhan33fcf782020-05-24 14:27:15 -07005029 ":neon_ukernels_test_mode",
5030 ":neonfma_ukernels_test_mode",
5031 ":neonv8_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005032 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005033 ":asm_ukernels",
5034 ],
5035 aarch64_deps = [
5036 ":neon_ukernels_test_mode",
5037 ":neonfma_ukernels_test_mode",
5038 ":neonv8_ukernels_test_mode",
5039 ":neonfp16arith_ukernels_test_mode",
Benoit Jacoba9644732020-08-13 12:48:55 -07005040 ":neondot_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005041 ":asm_ukernels",
5042 ],
5043 generic_deps = [
5044 ":scalar_ukernels_test_mode",
5045 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -07005046 wasm_deps = [
5047 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005048 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005049 ],
5050 wasmsimd_deps = [
5051 ":wasm_ukernels_test_mode",
Frank Barchardbcedc082020-08-17 18:00:51 -07005052 ":asm_ukernels",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005053 ],
5054 x86_deps = [
5055 ":sse2_ukernels_test_mode",
5056 ":ssse3_ukernels_test_mode",
5057 ":sse41_ukernels_test_mode",
5058 ":avx_ukernels_test_mode",
Marat Dukhan1566fee2020-08-02 21:55:41 -07005059 ":xop_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005060 ":fma3_ukernels_test_mode",
5061 ":avx2_ukernels_test_mode",
5062 ":avx512f_ukernels_test_mode",
Marat Dukhanbb00b1d2020-08-10 11:37:23 -07005063 ":avx512skx_ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005064 ],
5065)
5066
Marat Dukhan08c4a432019-10-03 09:29:21 -07005067xnnpack_cc_library(
5068 name = "im2col",
5069 srcs = ["src/im2col.c"],
5070 hdrs = [
5071 "src/xnnpack/common.h",
5072 "src/xnnpack/im2col.h",
5073 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005074 gcc_copts = xnnpack_gcc_std_copts(),
5075 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005076)
5077
5078xnnpack_cc_library(
5079 name = "indirection",
5080 srcs = ["src/indirection.c"],
5081 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005082 gcc_copts = xnnpack_gcc_std_copts(),
5083 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005084 deps = [
5085 "@FP16",
5086 "@FXdiv",
5087 "@pthreadpool",
5088 ],
5089)
5090
5091xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005092 name = "indirection_test_mode",
5093 srcs = ["src/indirection.c"],
5094 hdrs = INTERNAL_HDRS,
5095 copts = [
5096 "-UNDEBUG",
5097 "-DXNN_TEST_MODE=1",
5098 ],
5099 gcc_copts = xnnpack_gcc_std_copts(),
5100 msvc_copts = xnnpack_msvc_std_copts(),
5101 deps = [
5102 "@FP16",
5103 "@FXdiv",
5104 "@pthreadpool",
5105 ],
5106)
5107
5108xnnpack_cc_library(
Marat Dukhanab582382020-07-06 13:32:08 -07005109 name = "packing",
5110 srcs = ["src/packing.c"],
5111 hdrs = INTERNAL_HDRS,
5112 gcc_copts = xnnpack_gcc_std_copts(),
5113 msvc_copts = xnnpack_msvc_std_copts(),
5114 deps = [
5115 "@FP16",
5116 "@FXdiv",
5117 "@pthreadpool",
5118 ],
5119)
5120
5121xnnpack_cc_library(
5122 name = "packing_test_mode",
5123 srcs = ["src/packing.c"],
5124 hdrs = INTERNAL_HDRS,
5125 copts = [
5126 "-UNDEBUG",
5127 "-DXNN_TEST_MODE=1",
5128 ],
5129 gcc_copts = xnnpack_gcc_std_copts(),
5130 msvc_copts = xnnpack_msvc_std_copts(),
5131 deps = [
5132 "@FP16",
5133 "@FXdiv",
5134 "@pthreadpool",
5135 ],
5136)
5137
5138xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005139 name = "operator_run",
5140 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -07005141 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005142 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -07005143 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5144 "//conditions:default": [],
5145 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005146 gcc_copts = xnnpack_gcc_std_copts(),
5147 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005148 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005149 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005150 "@FP16",
5151 "@FXdiv",
5152 "@clog",
5153 "@pthreadpool",
5154 ],
5155)
5156
Chao Mei6ddfc602020-05-13 22:29:36 -07005157xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005158 name = "operator_run_test_mode",
5159 srcs = ["src/operator-run.c"],
5160 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5161 copts = LOGGING_COPTS + [
5162 "-UNDEBUG",
5163 "-DXNN_TEST_MODE=1",
5164 ] + select({
5165 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5166 "//conditions:default": [],
5167 }),
5168 gcc_copts = xnnpack_gcc_std_copts(),
5169 msvc_copts = xnnpack_msvc_std_copts(),
5170 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005171 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005172 "@FP16",
5173 "@FXdiv",
5174 "@clog",
5175 "@pthreadpool",
5176 ],
5177)
5178
5179xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -07005180 name = "memory_planner",
5181 srcs = ["src/memory-planner.c"],
5182 hdrs = INTERNAL_HDRS,
5183 defines = select({
5184 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5185 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5186 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5187 }),
5188 gcc_copts = xnnpack_gcc_std_copts(),
5189 msvc_copts = xnnpack_msvc_std_copts(),
5190 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005191 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005192 "@pthreadpool",
5193 ],
5194)
5195
Marat Dukhan33fcf782020-05-24 14:27:15 -07005196xnnpack_cc_library(
5197 name = "memory_planner_test_mode",
5198 srcs = ["src/memory-planner.c"],
5199 hdrs = INTERNAL_HDRS,
5200 copts = [
5201 "-UNDEBUG",
5202 "-DXNN_TEST_MODE=1",
5203 ],
5204 defines = select({
5205 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
5206 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
5207 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
5208 }),
5209 gcc_copts = xnnpack_gcc_std_copts(),
5210 msvc_copts = xnnpack_msvc_std_copts(),
5211 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -07005212 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005213 "@pthreadpool",
5214 ],
5215)
5216
Marat Dukhan08c4a432019-10-03 09:29:21 -07005217cc_library(
5218 name = "enable_assembly",
5219 defines = select({
5220 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
5221 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -07005222 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005223 }),
5224)
5225
Marat Dukhan9de90e02020-06-18 16:04:12 -07005226cc_library(
5227 name = "enable_sparse",
5228 defines = select({
5229 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
5230 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhanb36582b2020-12-08 11:16:28 -08005231 "//conditions:default": ["XNN_ENABLE_SPARSE=1"],
Marat Dukhan9de90e02020-06-18 16:04:12 -07005232 }),
5233)
5234
Marat Dukhancf056b22019-10-07 10:26:29 -07005235xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005236 name = "operators",
5237 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005238 "src/allocator.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005239 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -07005240 ],
5241 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005242 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005243 "-Isrc",
5244 "-Iinclude",
5245 ] + select({
5246 ":debug_build": [],
5247 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005248 }) + select({
5249 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5250 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005251 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005252 gcc_copts = xnnpack_gcc_std_copts(),
5253 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005254 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -07005255 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005256 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005257 ":packing",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005258 "@FP16",
5259 "@FXdiv",
5260 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005261 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005262 ],
5263)
5264
Marat Dukhan10a38082020-04-17 03:58:35 -07005265xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005266 name = "operators_test_mode",
5267 srcs = OPERATOR_SRCS + [
Marat Dukhan496389f2021-04-07 15:47:12 -07005268 "src/allocator.c",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005269 "src/operator-delete.c",
5270 ],
5271 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
5272 copts = LOGGING_COPTS + [
5273 "-Isrc",
5274 "-Iinclude",
5275 "-UNDEBUG",
5276 "-DXNN_TEST_MODE=1",
5277 ] + select({
5278 ":debug_build": [],
5279 "//conditions:default": xnnpack_min_size_copts(),
5280 }) + select({
5281 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5282 "//conditions:default": [],
5283 }),
5284 gcc_copts = xnnpack_gcc_std_copts(),
5285 msvc_copts = xnnpack_msvc_std_copts(),
5286 deps = [
5287 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005288 ":logging_utils",
Marat Dukhanab582382020-07-06 13:32:08 -07005289 ":packing_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005290 "@FP16",
5291 "@FXdiv",
5292 "@clog",
5293 "@pthreadpool",
5294 ],
5295)
5296
5297xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005298 name = "XNNPACK",
5299 srcs = [
5300 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -08005301 "src/runtime.c",
5302 "src/subgraph.c",
5303 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005304 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005305 hdrs = ["include/xnnpack.h"],
5306 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005307 "-Isrc",
5308 "-Iinclude",
5309 ] + select({
5310 ":debug_build": [],
5311 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005312 }) + select({
5313 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5314 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005315 }),
Marat Dukhan10a38082020-04-17 03:58:35 -07005316 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005317 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005318 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005319 visibility = xnnpack_visibility(),
5320 deps = [
5321 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005322 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005323 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -07005324 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005325 ":operator_run",
5326 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005327 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005328 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -07005329 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005330 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -07005331 ] + select({
5332 ":emscripten": [],
5333 "//conditions:default": ["@cpuinfo"],
5334 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005335)
5336
Marat Dukhan10a38082020-04-17 03:58:35 -07005337xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -07005338 name = "XNNPACK_test_mode",
5339 srcs = [
5340 "src/init.c",
5341 "src/runtime.c",
5342 "src/subgraph.c",
5343 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -07005344 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -07005345 hdrs = ["include/xnnpack.h"],
5346 copts = LOGGING_COPTS + [
5347 "-Isrc",
5348 "-Iinclude",
5349 "-UNDEBUG",
5350 "-DXNN_TEST_MODE=1",
5351 ] + select({
5352 ":debug_build": [],
5353 "//conditions:default": xnnpack_min_size_copts(),
5354 }) + select({
5355 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5356 "//conditions:default": [],
5357 }),
5358 gcc_copts = xnnpack_gcc_std_copts(),
5359 includes = ["include"],
5360 msvc_copts = xnnpack_msvc_std_copts(),
5361 visibility = xnnpack_visibility(),
5362 deps = [
5363 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -07005364 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005365 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005366 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005367 ":operator_run_test_mode",
5368 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005369 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -07005370 "@clog",
5371 "@FP16",
5372 "@pthreadpool",
5373 ] + select({
5374 ":emscripten": [],
5375 "//conditions:default": ["@cpuinfo"],
5376 }),
5377)
5378
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005379# Specialized XNNPACK version for TensorFlow Lite. Excludes operators currently
5380# not used by the TensorFlow Lite XNNPACK delegate to minimize code size.
Marat Dukhanae046f52020-06-15 13:16:14 -07005381xnnpack_cc_library(
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005382 name = "xnnpack_for_tflite",
5383 srcs = [
5384 "src/init.c",
5385 "src/runtime.c",
5386 "src/subgraph.c",
5387 "src/tensor.c",
5388 ] + SUBGRAPH_SRCS,
5389 hdrs = ["include/xnnpack.h"],
5390 copts = LOGGING_COPTS + [
5391 "-Isrc",
5392 "-Iinclude",
5393 ] + select({
5394 ":debug_build": [],
5395 "//conditions:default": xnnpack_min_size_copts(),
5396 }) + select({
5397 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5398 "//conditions:default": [],
5399 }),
5400 defines = [
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005401 "XNN_NO_QU8_OPERATORS",
5402 "XNN_NO_U8_OPERATORS",
5403 "XNN_NO_X8_OPERATORS",
5404 "XNN_NO_F16_OPERATORS",
5405 "XNN_NO_X16_OPERATORS",
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005406 ] + select({
5407 ":xnn_enable_qs8_explicit_true": [],
Marat Dukhan5e353862021-06-15 09:03:25 -07005408 ":xnn_enable_qs8_explicit_false": [
5409 "XNN_NO_QC8_OPERATORS",
5410 "XNN_NO_QS8_OPERATORS",
5411 ],
5412 "//conditions:default": [
5413 "XNN_NO_QC8_OPERATORS",
5414 "XNN_NO_QS8_OPERATORS",
5415 ],
Marat Dukhanb939cdb2021-03-30 18:51:51 -07005416 }),
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005417 gcc_copts = xnnpack_gcc_std_copts(),
5418 includes = ["include"],
5419 msvc_copts = xnnpack_msvc_std_copts(),
5420 visibility = xnnpack_visibility(),
5421 deps = [
5422 ":enable_assembly",
5423 ":enable_sparse",
5424 ":logging_utils",
5425 ":memory_planner",
5426 ":operator_run",
5427 ":operators",
Marat Dukhand09ca262021-03-30 16:17:12 -07005428 ":ukernels",
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07005429 "@clog",
5430 "@FP16",
5431 "@pthreadpool",
5432 ] + select({
5433 ":emscripten": [],
5434 "//conditions:default": ["@cpuinfo"],
5435 }),
5436)
5437
5438# Specialized XNNPACK version for TensorFlow.js. Excludes operators currently
5439# not used by the TensorFlow.js WebAssembly backend to minimize code size.
5440xnnpack_cc_library(
5441 name = "xnnpack_for_tfjs",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005442 srcs = [
5443 "src/init.c",
5444 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005445 hdrs = ["include/xnnpack.h"],
5446 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005447 "-Isrc",
5448 "-Iinclude",
5449 ] + select({
5450 ":debug_build": [],
5451 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -07005452 }) + select({
5453 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
5454 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005455 }),
5456 defines = [
Marat Dukhan16f1e1a2020-08-04 16:38:22 -07005457 "XNN_NO_QS8_OPERATORS",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005458 "XNN_NO_QU8_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005459 "XNN_NO_U8_OPERATORS",
5460 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -08005461 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005462 ],
Marat Dukhan10a38082020-04-17 03:58:35 -07005463 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005464 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -07005465 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005466 visibility = xnnpack_visibility(),
5467 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005468 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005469 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005470 ":operator_run",
5471 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -07005472 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005473 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005474 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -07005475 ] + select({
5476 ":emscripten": [],
5477 "//conditions:default": ["@cpuinfo"],
5478 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005479)
5480
Marat Dukhancf056b22019-10-07 10:26:29 -07005481xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005482 name = "bench_utils",
5483 srcs = ["bench/utils.cc"],
5484 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -08005485 deps = [
5486 "@com_google_benchmark//:benchmark",
5487 "@cpuinfo",
5488 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005489)
5490
Frank Barchard7e955972019-10-11 10:34:25 -07005491######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07005492
5493xnnpack_benchmark(
Marat Dukhan595e1702020-07-31 10:12:52 -07005494 name = "qs8_gemm_bench",
5495 srcs = [
5496 "bench/gemm.h",
5497 "bench/qs8-gemm.cc",
5498 "src/xnnpack/AlignedAllocator.h",
5499 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard31328cb2020-10-12 11:55:18 -07005500 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
5501 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan595e1702020-07-31 10:12:52 -07005502)
5503
5504xnnpack_benchmark(
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005505 name = "qs8_requantization_bench",
5506 srcs = [
5507 "bench/qs8-requantization.cc",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005508 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005509 "src/xnnpack/requantization-stubs.h",
Marat Dukhan56bdd4a2020-08-03 19:47:04 -07005510 ] + MICROKERNEL_BENCHMARK_HDRS,
5511 deps = MICROKERNEL_BENCHMARK_DEPS,
5512)
5513
5514xnnpack_benchmark(
Marat Dukhan08b7a972020-07-14 18:17:29 -07005515 name = "qu8_gemm_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005516 srcs = [
5517 "bench/gemm.h",
Marat Dukhan08b7a972020-07-14 18:17:29 -07005518 "bench/qu8-gemm.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005519 "src/xnnpack/AlignedAllocator.h",
5520 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005521 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005522 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005523)
5524
5525xnnpack_benchmark(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005526 name = "qu8_requantization_bench",
5527 srcs = [
5528 "bench/qu8-requantization.cc",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005529 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005530 "src/xnnpack/requantization-stubs.h",
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07005531 ] + MICROKERNEL_BENCHMARK_HDRS,
5532 deps = MICROKERNEL_BENCHMARK_DEPS,
5533)
5534
5535xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -07005536 name = "f16_igemm_bench",
5537 srcs = [
5538 "bench/f16-igemm.cc",
5539 "bench/conv.h",
5540 "bench/google/conv.h",
5541 "src/xnnpack/AlignedAllocator.h",
5542 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005543 deps = MICROKERNEL_BENCHMARK_DEPS + [
5544 ":indirection",
5545 ":packing",
5546 ],
Frank Barchard40d20fe2020-05-05 00:37:45 -07005547)
5548
5549xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005550 name = "f16_gemm_bench",
5551 srcs = [
5552 "bench/f16-gemm.cc",
5553 "bench/gemm.h",
5554 "src/xnnpack/AlignedAllocator.h",
5555 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005556 deps = MICROKERNEL_BENCHMARK_DEPS + [
5557 ":packing",
5558 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005559)
5560
5561xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005562 name = "f16_spmm_bench",
5563 srcs = [
5564 "bench/f16-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005565 "bench/spmm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005566 "src/xnnpack/AlignedAllocator.h",
5567 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -08005568 deps = MICROKERNEL_BENCHMARK_DEPS,
5569)
5570
5571xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005572 name = "f16_vrelu_bench",
5573 srcs = [
5574 "bench/f16-vrelu.cc",
5575 "src/xnnpack/AlignedAllocator.h",
5576 ] + MICROKERNEL_BENCHMARK_HDRS,
5577 deps = MICROKERNEL_BENCHMARK_DEPS,
5578)
5579
5580xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005581 name = "f32_igemm_bench",
5582 srcs = [
5583 "bench/f32-igemm.cc",
5584 "bench/conv.h",
5585 "src/xnnpack/AlignedAllocator.h",
5586 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005587 deps = MICROKERNEL_BENCHMARK_DEPS + [
5588 ":indirection",
5589 ":packing",
5590 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005591)
5592
5593xnnpack_benchmark(
5594 name = "f32_conv_hwc_bench",
5595 srcs = [
5596 "bench/f32-conv-hwc.cc",
5597 "bench/dconv.h",
5598 "src/xnnpack/AlignedAllocator.h",
5599 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005600 deps = MICROKERNEL_BENCHMARK_DEPS + [
5601 ":packing",
5602 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005603)
5604
5605xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -07005606 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -07005607 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07005608 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -07005609 "bench/dconv.h",
5610 "src/xnnpack/AlignedAllocator.h",
5611 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005612 deps = MICROKERNEL_BENCHMARK_DEPS + [
5613 ":packing",
5614 ],
Erich Elsen563df5f2019-10-23 08:02:21 -07005615)
5616
5617xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -07005618 name = "f16_dwconv_bench",
5619 srcs = [
5620 "bench/f16-dwconv.cc",
5621 "bench/dwconv.h",
5622 "bench/google/dwconv.h",
5623 "src/xnnpack/AlignedAllocator.h",
5624 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005625 deps = MICROKERNEL_BENCHMARK_DEPS + [
5626 ":indirection",
5627 ":packing",
5628 ],
Frank Barchard5a599a62020-06-04 20:12:44 -07005629)
5630
5631xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005632 name = "f32_dwconv_bench",
5633 srcs = [
5634 "bench/f32-dwconv.cc",
5635 "bench/dwconv.h",
5636 "src/xnnpack/AlignedAllocator.h",
5637 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005638 deps = MICROKERNEL_BENCHMARK_DEPS + [
5639 ":indirection",
5640 ":packing",
5641 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005642)
5643
5644xnnpack_benchmark(
Marat Dukhanbf715f92020-10-23 20:17:00 -07005645 name = "f32_dwconv2d_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005646 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07005647 "bench/f32-dwconv2d-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005648 "bench/dwconv.h",
5649 "src/xnnpack/AlignedAllocator.h",
5650 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005651 deps = MICROKERNEL_BENCHMARK_DEPS + [
5652 ":indirection",
5653 ":packing",
5654 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005655)
5656
5657xnnpack_benchmark(
5658 name = "f32_gemm_bench",
5659 srcs = [
5660 "bench/f32-gemm.cc",
5661 "bench/gemm.h",
5662 "src/xnnpack/AlignedAllocator.h",
5663 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005664 copts = xnnpack_optional_ruy_copts(),
Marat Dukhanab582382020-07-06 13:32:08 -07005665 deps = MICROKERNEL_BENCHMARK_DEPS + [":packing"] + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005666)
5667
5668xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005669 name = "f32_raddexpminusmax_bench",
5670 srcs = [
5671 "bench/f32-raddexpminusmax.cc",
5672 "src/xnnpack/AlignedAllocator.h",
5673 ] + MICROKERNEL_BENCHMARK_HDRS,
5674 deps = MICROKERNEL_BENCHMARK_DEPS,
5675)
5676
5677xnnpack_benchmark(
5678 name = "f32_raddextexp_bench",
5679 srcs = [
5680 "bench/f32-raddextexp.cc",
5681 "src/xnnpack/AlignedAllocator.h",
5682 ] + MICROKERNEL_BENCHMARK_HDRS,
5683 deps = MICROKERNEL_BENCHMARK_DEPS,
5684)
5685
5686xnnpack_benchmark(
5687 name = "f32_raddstoreexpminusmax_bench",
5688 srcs = [
5689 "bench/f32-raddstoreexpminusmax.cc",
5690 "src/xnnpack/AlignedAllocator.h",
5691 ] + MICROKERNEL_BENCHMARK_HDRS,
5692 deps = MICROKERNEL_BENCHMARK_DEPS,
5693)
5694
5695xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005696 name = "f32_rmax_bench",
5697 srcs = [
5698 "bench/f32-rmax.cc",
5699 "src/xnnpack/AlignedAllocator.h",
5700 ] + MICROKERNEL_BENCHMARK_HDRS,
5701 deps = MICROKERNEL_BENCHMARK_DEPS,
5702)
5703
5704xnnpack_benchmark(
5705 name = "f32_spmm_bench",
5706 srcs = [
5707 "bench/f32-spmm.cc",
Marat Dukhan1631e3e2020-12-06 19:29:31 -08005708 "bench/spmm.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07005709 "src/xnnpack/AlignedAllocator.h",
5710 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005711 deps = MICROKERNEL_BENCHMARK_DEPS,
5712)
5713
5714xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005715 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005716 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005717 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005718 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -07005719 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -08005720 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -07005721)
5722
5723xnnpack_benchmark(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08005724 name = "f32_velu_bench",
5725 srcs = [
5726 "bench/f32-velu.cc",
5727 "src/xnnpack/AlignedAllocator.h",
5728 ] + MICROKERNEL_BENCHMARK_HDRS,
5729 deps = MICROKERNEL_BENCHMARK_DEPS,
5730)
5731
5732xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005733 name = "f32_vhswish_bench",
5734 srcs = [
5735 "bench/f32-vhswish.cc",
5736 "src/xnnpack/AlignedAllocator.h",
5737 ] + MICROKERNEL_BENCHMARK_HDRS,
5738 deps = MICROKERNEL_BENCHMARK_DEPS,
5739)
5740
5741xnnpack_benchmark(
5742 name = "f32_vrelu_bench",
5743 srcs = [
5744 "bench/f32-vrelu.cc",
5745 "src/xnnpack/AlignedAllocator.h",
5746 ] + MICROKERNEL_BENCHMARK_HDRS,
5747 deps = MICROKERNEL_BENCHMARK_DEPS,
5748)
5749
5750xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -08005751 name = "f32_vscaleexpminusmax_bench",
5752 srcs = [
5753 "bench/f32-vscaleexpminusmax.cc",
5754 "src/xnnpack/AlignedAllocator.h",
5755 ] + MICROKERNEL_BENCHMARK_HDRS,
5756 deps = MICROKERNEL_BENCHMARK_DEPS,
5757)
5758
5759xnnpack_benchmark(
5760 name = "f32_vscaleextexp_bench",
5761 srcs = [
5762 "bench/f32-vscaleextexp.cc",
5763 "src/xnnpack/AlignedAllocator.h",
5764 ] + MICROKERNEL_BENCHMARK_HDRS,
5765 deps = MICROKERNEL_BENCHMARK_DEPS,
5766)
5767
5768xnnpack_benchmark(
Marat Dukhan6674d692021-05-05 22:27:00 -07005769 name = "f32_vsigmoid_bench",
5770 srcs = [
5771 "bench/f32-vsigmoid.cc",
5772 "src/xnnpack/AlignedAllocator.h",
5773 ] + MICROKERNEL_BENCHMARK_HDRS,
5774 deps = MICROKERNEL_BENCHMARK_DEPS,
5775)
5776
5777xnnpack_benchmark(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07005778 name = "f32_vsqrt_bench",
5779 srcs = [
5780 "bench/f32-vsqrt.cc",
5781 "src/xnnpack/AlignedAllocator.h",
5782 ] + MICROKERNEL_BENCHMARK_HDRS,
5783 deps = MICROKERNEL_BENCHMARK_DEPS,
5784)
5785
5786xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005787 name = "f32_im2col_gemm_bench",
5788 srcs = [
5789 "bench/f32-im2col-gemm.cc",
5790 "bench/conv.h",
5791 "src/xnnpack/AlignedAllocator.h",
5792 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07005793 deps = MICROKERNEL_BENCHMARK_DEPS + [
5794 ":im2col",
5795 ":packing",
5796 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -07005797)
5798
Marat Dukhanfe7acb62020-03-09 19:30:05 -07005799xnnpack_benchmark(
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005800 name = "rounding_bench",
5801 srcs = [
5802 "bench/rounding.cc",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005803 "src/xnnpack/AlignedAllocator.h",
Frank Barchard04336c12020-10-22 16:48:55 -07005804 "src/xnnpack/math-stubs.h",
Marat Dukhanffbf96a2020-05-14 02:59:08 -07005805 ] + MICROKERNEL_BENCHMARK_HDRS,
5806 deps = MICROKERNEL_BENCHMARK_DEPS,
5807)
5808
Marat Dukhan08c4a432019-10-03 09:29:21 -07005809########################### Benchmarks for operators ###########################
5810
5811xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005812 name = "average_pooling_bench",
5813 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -07005814 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005815 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005816 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005817)
5818
5819xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005820 name = "bankers_rounding_bench",
5821 srcs = ["bench/bankers-rounding.cc"],
5822 copts = xnnpack_optional_tflite_copts(),
5823 tags = ["nowin32"],
5824 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5825)
5826
5827xnnpack_benchmark(
5828 name = "ceiling_bench",
5829 srcs = ["bench/ceiling.cc"],
5830 copts = xnnpack_optional_tflite_copts(),
5831 tags = ["nowin32"],
5832 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5833)
5834
5835xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005836 name = "channel_shuffle_bench",
5837 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005838 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005839)
5840
5841xnnpack_benchmark(
5842 name = "convolution_bench",
5843 srcs = ["bench/convolution.cc"],
5844 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005845 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005846 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005847)
5848
5849xnnpack_benchmark(
5850 name = "deconvolution_bench",
5851 srcs = ["bench/deconvolution.cc"],
5852 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005853 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005854 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005855)
5856
5857xnnpack_benchmark(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08005858 name = "elu_bench",
5859 srcs = ["bench/elu.cc"],
5860 copts = xnnpack_optional_tflite_copts(),
5861 tags = ["nowin32"],
5862 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5863)
5864
5865xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005866 name = "floor_bench",
5867 srcs = ["bench/floor.cc"],
5868 copts = xnnpack_optional_tflite_copts(),
5869 tags = ["nowin32"],
5870 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5871)
5872
5873xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005874 name = "global_average_pooling_bench",
5875 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005876 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005877)
5878
5879xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -07005880 name = "hardswish_bench",
5881 srcs = ["bench/hardswish.cc"],
5882 copts = xnnpack_optional_tflite_copts(),
5883 tags = ["nowin32"],
5884 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5885)
5886
5887xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -07005888 name = "max_pooling_bench",
5889 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005890 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07005891)
5892
5893xnnpack_benchmark(
5894 name = "sigmoid_bench",
5895 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -08005896 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005897 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005898 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005899)
5900
5901xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -07005902 name = "prelu_bench",
5903 srcs = ["bench/prelu.cc"],
5904 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -07005905 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005906 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -07005907)
5908
5909xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08005910 name = "softmax_bench",
5911 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -08005912 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -07005913 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -07005914 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -07005915)
5916
Marat Dukhan87727142020-06-24 15:24:10 -07005917xnnpack_benchmark(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07005918 name = "square_root_bench",
5919 srcs = ["bench/square-root.cc"],
5920 copts = xnnpack_optional_tflite_copts(),
5921 tags = ["nowin32"],
5922 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
5923)
5924
5925xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -07005926 name = "truncation_bench",
5927 srcs = ["bench/truncation.cc"],
5928 deps = OPERATOR_BENCHMARK_DEPS,
5929)
5930
Marat Dukhanc068bb62019-10-04 13:24:39 -07005931############################# End-to-end benchmarks ############################
5932
5933cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005934 name = "fp32_mobilenet_v1",
5935 srcs = ["models/fp32-mobilenet-v1.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07005936 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08005937 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07005938 linkstatic = True,
5939 deps = [
5940 ":XNNPACK",
5941 "@pthreadpool",
5942 ],
5943)
5944
5945cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08005946 name = "fp32_sparse_mobilenet_v1",
5947 srcs = ["models/fp32-sparse-mobilenet-v1.cc"],
5948 hdrs = ["models/models.h"],
5949 copts = xnnpack_std_cxxopts(),
5950 linkstatic = True,
5951 deps = [
5952 ":XNNPACK",
5953 "@pthreadpool",
5954 ],
5955)
5956
5957cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07005958 name = "fp16_mobilenet_v1",
5959 srcs = ["models/fp16-mobilenet-v1.cc"],
5960 hdrs = ["models/models.h"],
5961 copts = xnnpack_std_cxxopts(),
5962 linkstatic = True,
5963 deps = [
5964 ":XNNPACK",
5965 "@FP16",
5966 "@pthreadpool",
5967 ],
5968)
5969
5970cc_library(
Marat Dukhan0743cdf2020-08-04 18:52:07 -07005971 name = "qs8_mobilenet_v1",
5972 srcs = ["models/qs8-mobilenet-v1.cc"],
5973 hdrs = ["models/models.h"],
5974 copts = xnnpack_std_cxxopts(),
5975 linkstatic = True,
5976 deps = [
5977 ":XNNPACK",
5978 "@pthreadpool",
5979 ],
5980)
5981
5982cc_library(
Marat Dukhan70a96182020-09-03 17:13:58 -07005983 name = "qs8_mobilenet_v2",
5984 srcs = ["models/qs8-mobilenet-v2.cc"],
5985 hdrs = ["models/models.h"],
5986 copts = xnnpack_std_cxxopts(),
5987 linkstatic = True,
5988 deps = [
5989 ":XNNPACK",
5990 "@pthreadpool",
5991 ],
5992)
5993
5994cc_library(
Marat Dukhan12a23bb2021-03-08 08:13:21 -08005995 name = "qu8_mobilenet_v1",
5996 srcs = ["models/qu8-mobilenet-v1.cc"],
5997 hdrs = ["models/models.h"],
5998 copts = xnnpack_std_cxxopts(),
5999 linkstatic = True,
6000 deps = [
6001 ":XNNPACK",
6002 "@pthreadpool",
6003 ],
6004)
6005
6006cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006007 name = "fp32_mobilenet_v2",
6008 srcs = ["models/fp32-mobilenet-v2.cc"],
Marat Dukhanc068bb62019-10-04 13:24:39 -07006009 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006010 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -07006011 linkstatic = True,
6012 deps = [
6013 ":XNNPACK",
6014 "@pthreadpool",
6015 ],
6016)
6017
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006018cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006019 name = "fp32_sparse_mobilenet_v2",
6020 srcs = ["models/fp32-sparse-mobilenet-v2.cc"],
6021 hdrs = ["models/models.h"],
6022 copts = xnnpack_std_cxxopts(),
6023 linkstatic = True,
6024 deps = [
6025 ":XNNPACK",
6026 "@pthreadpool",
6027 ],
6028)
6029
6030cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006031 name = "fp16_mobilenet_v2",
6032 srcs = ["models/fp16-mobilenet-v2.cc"],
6033 hdrs = ["models/models.h"],
6034 copts = xnnpack_std_cxxopts(),
6035 linkstatic = True,
6036 deps = [
6037 ":XNNPACK",
6038 "@FP16",
6039 "@pthreadpool",
6040 ],
6041)
6042
6043cc_library(
6044 name = "fp32_mobilenet_v3_large",
6045 srcs = ["models/fp32-mobilenet-v3-large.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006046 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006047 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006048 linkstatic = True,
6049 deps = [
6050 ":XNNPACK",
6051 "@pthreadpool",
6052 ],
6053)
6054
6055cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006056 name = "fp32_sparse_mobilenet_v3_large",
6057 srcs = ["models/fp32-sparse-mobilenet-v3-large.cc"],
6058 hdrs = ["models/models.h"],
6059 copts = xnnpack_std_cxxopts(),
6060 linkstatic = True,
6061 deps = [
6062 ":XNNPACK",
6063 "@pthreadpool",
6064 ],
6065)
6066
6067cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006068 name = "fp16_mobilenet_v3_large",
6069 srcs = ["models/fp16-mobilenet-v3-large.cc"],
6070 hdrs = ["models/models.h"],
6071 copts = xnnpack_std_cxxopts(),
6072 linkstatic = True,
6073 deps = [
6074 ":XNNPACK",
6075 "@FP16",
6076 "@pthreadpool",
6077 ],
6078)
6079
6080cc_library(
Marat Dukhan270a2c42020-06-26 16:45:52 -07006081 name = "fp32_mobilenet_v3_small",
6082 srcs = ["models/fp32-mobilenet-v3-small.cc"],
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006083 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -08006084 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006085 linkstatic = True,
6086 deps = [
6087 ":XNNPACK",
6088 "@pthreadpool",
6089 ],
6090)
6091
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006092cc_library(
Marat Dukhan4cea2322021-03-09 09:35:36 -08006093 name = "fp32_sparse_mobilenet_v3_small",
6094 srcs = ["models/fp32-sparse-mobilenet-v3-small.cc"],
6095 hdrs = ["models/models.h"],
6096 copts = xnnpack_std_cxxopts(),
6097 linkstatic = True,
6098 deps = [
6099 ":XNNPACK",
6100 "@pthreadpool",
6101 ],
6102)
6103
6104cc_library(
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006105 name = "fp16_mobilenet_v3_small",
6106 srcs = ["models/fp16-mobilenet-v3-small.cc"],
6107 hdrs = ["models/models.h"],
6108 copts = xnnpack_std_cxxopts(),
6109 linkstatic = True,
6110 deps = [
6111 ":XNNPACK",
6112 "@FP16",
6113 "@pthreadpool",
6114 ],
6115)
6116
Marat Dukhanc068bb62019-10-04 13:24:39 -07006117xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -07006118 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006119 srcs = [
6120 "bench/f32-dwconv-e2e.cc",
6121 "bench/end2end.h",
6122 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -07006123 deps = MICROKERNEL_BENCHMARK_DEPS + [
6124 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006125 ":fp32_mobilenet_v1",
6126 ":fp32_mobilenet_v2",
6127 ":fp32_mobilenet_v3_large",
6128 ":fp32_mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -07006129 ],
6130)
6131
6132xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -07006133 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -08006134 srcs = [
6135 "bench/f32-gemm-e2e.cc",
6136 "bench/end2end.h",
6137 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -07006138 deps = MICROKERNEL_BENCHMARK_DEPS + [
6139 ":XNNPACK",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006140 ":fp32_mobilenet_v1",
6141 ":fp32_mobilenet_v2",
6142 ":fp32_mobilenet_v3_large",
6143 ":fp32_mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -07006144 ],
6145)
6146
6147xnnpack_benchmark(
Frank Barcharddc909cb2021-02-08 13:59:31 -08006148 name = "qs8_gemm_e2e_bench",
6149 srcs = [
6150 "bench/qs8-gemm-e2e.cc",
6151 "bench/end2end.h",
6152 ] + MICROKERNEL_BENCHMARK_HDRS,
6153 deps = MICROKERNEL_BENCHMARK_DEPS + [
6154 ":XNNPACK",
6155 ":qs8_mobilenet_v1",
6156 ":qs8_mobilenet_v2",
6157 ],
6158)
6159
6160xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -07006161 name = "end2end_bench",
6162 srcs = ["bench/end2end.cc"],
6163 deps = [
6164 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -07006165 ":bench_utils",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006166 ":fp16_mobilenet_v1",
6167 ":fp16_mobilenet_v2",
Marat Dukhan66f3ccd2020-09-14 16:09:38 -07006168 ":fp16_mobilenet_v3_large",
6169 ":fp16_mobilenet_v3_small",
Marat Dukhan270a2c42020-06-26 16:45:52 -07006170 ":fp32_mobilenet_v1",
6171 ":fp32_mobilenet_v2",
6172 ":fp32_mobilenet_v3_large",
6173 ":fp32_mobilenet_v3_small",
Marat Dukhan4cea2322021-03-09 09:35:36 -08006174 ":fp32_sparse_mobilenet_v1",
6175 ":fp32_sparse_mobilenet_v2",
6176 ":fp32_sparse_mobilenet_v3_large",
6177 ":fp32_sparse_mobilenet_v3_small",
Marat Dukhan0743cdf2020-08-04 18:52:07 -07006178 ":qs8_mobilenet_v1",
Marat Dukhan70a96182020-09-03 17:13:58 -07006179 ":qs8_mobilenet_v2",
Marat Dukhan12a23bb2021-03-08 08:13:21 -08006180 ":qu8_mobilenet_v1",
Marat Dukhanc068bb62019-10-04 13:24:39 -07006181 "@pthreadpool",
6182 ],
6183)
6184
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006185#################### Accuracy evaluation for math functions ####################
6186
6187xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006188 name = "f32_exp_ulp_eval",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006189 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006190 "eval/f32-exp-ulp.cc",
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006191 "src/xnnpack/AlignedAllocator.h",
6192 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006193 deps = ACCURACY_EVAL_DEPS + [
6194 ":bench_utils",
6195 "@cpuinfo",
6196 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -07006197)
6198
Marat Dukhan515c9772019-10-17 18:07:57 -07006199xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006200 name = "f32_expminus_ulp_eval",
Marat Dukhan515c9772019-10-17 18:07:57 -07006201 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006202 "eval/f32-expminus-ulp.cc",
Marat Dukhan515c9772019-10-17 18:07:57 -07006203 "src/xnnpack/AlignedAllocator.h",
6204 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006205 deps = ACCURACY_EVAL_DEPS + [
6206 ":bench_utils",
6207 "@cpuinfo",
6208 ],
Marat Dukhan515c9772019-10-17 18:07:57 -07006209)
6210
Marat Dukhan98ba4412019-10-23 02:14:28 -07006211xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006212 name = "f32_expm1minus_ulp_eval",
Marat Dukhana438aca2020-11-20 15:45:01 -08006213 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006214 "eval/f32-expm1minus-ulp.cc",
Marat Dukhana438aca2020-11-20 15:45:01 -08006215 "src/xnnpack/AlignedAllocator.h",
6216 ] + ACCURACY_EVAL_HDRS,
Marat Dukhande390d42020-11-29 19:32:18 -08006217 deps = ACCURACY_EVAL_DEPS + [
6218 ":bench_utils",
Marat Dukhan3a305212020-12-06 19:24:27 -08006219 "@cpuinfo",
Marat Dukhande390d42020-11-29 19:32:18 -08006220 ],
Marat Dukhana438aca2020-11-20 15:45:01 -08006221)
6222
6223xnnpack_benchmark(
Marat Dukhancf67ec62020-12-14 09:56:37 -08006224 name = "f32_extexp_ulp_eval",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006225 srcs = [
Marat Dukhancf67ec62020-12-14 09:56:37 -08006226 "eval/f32-extexp-ulp.cc",
Marat Dukhan98ba4412019-10-23 02:14:28 -07006227 "src/xnnpack/AlignedAllocator.h",
6228 ] + ACCURACY_EVAL_HDRS,
Marat Dukhan3a305212020-12-06 19:24:27 -08006229 deps = ACCURACY_EVAL_DEPS + [
6230 ":bench_utils",
6231 "@cpuinfo",
6232 ],
Marat Dukhan98ba4412019-10-23 02:14:28 -07006233)
6234
Marat Dukhanf44f0222020-12-14 11:53:27 -08006235xnnpack_benchmark(
6236 name = "f32_sigmoid_ulp_eval",
6237 srcs = [
6238 "eval/f32-sigmoid-ulp.cc",
6239 "src/xnnpack/AlignedAllocator.h",
6240 ] + ACCURACY_EVAL_HDRS,
6241 deps = ACCURACY_EVAL_DEPS + [
6242 ":bench_utils",
6243 "@cpuinfo",
6244 ],
6245)
6246
6247xnnpack_benchmark(
6248 name = "f32_sqrt_ulp_eval",
6249 srcs = [
6250 "eval/f32-sqrt-ulp.cc",
6251 "src/xnnpack/AlignedAllocator.h",
6252 ] + ACCURACY_EVAL_HDRS,
6253 deps = ACCURACY_EVAL_DEPS + [
6254 ":bench_utils",
6255 "@cpuinfo",
6256 ],
6257)
6258
6259################### Accuracy verification for math functions ##################
6260
6261xnnpack_unit_test(
Marat Dukhanf7291fc2020-12-15 11:02:50 -08006262 name = "f32_exp_eval",
6263 srcs = [
6264 "eval/f32-exp.cc",
6265 "src/xnnpack/AlignedAllocator.h",
6266 "src/xnnpack/math-stubs.h",
6267 ] + MICROKERNEL_TEST_HDRS,
6268 automatic = False,
6269 deps = MICROKERNEL_TEST_DEPS,
6270)
6271
6272xnnpack_unit_test(
Marat Dukhanf44f0222020-12-14 11:53:27 -08006273 name = "f32_expm1minus_eval",
6274 srcs = [
6275 "eval/f32-expm1minus.cc",
6276 "src/xnnpack/AlignedAllocator.h",
6277 "src/xnnpack/math-stubs.h",
6278 ] + MICROKERNEL_TEST_HDRS,
6279 automatic = False,
6280 deps = MICROKERNEL_TEST_DEPS,
6281)
6282
Marat Dukhan8853b822020-05-07 12:19:01 -07006283xnnpack_unit_test(
Marat Dukhand28a5a22020-12-14 15:27:22 -08006284 name = "f32_expminus_eval",
6285 srcs = [
6286 "eval/f32-expminus.cc",
6287 "src/xnnpack/AlignedAllocator.h",
6288 "src/xnnpack/math-stubs.h",
6289 ] + MICROKERNEL_TEST_HDRS,
6290 automatic = False,
6291 deps = MICROKERNEL_TEST_DEPS,
6292)
6293
6294xnnpack_unit_test(
Marat Dukhan8853b822020-05-07 12:19:01 -07006295 name = "f32_roundne_eval",
6296 srcs = [
6297 "eval/f32-roundne.cc",
6298 "src/xnnpack/AlignedAllocator.h",
6299 "src/xnnpack/math-stubs.h",
6300 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -07006301 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -07006302 deps = MICROKERNEL_TEST_DEPS,
6303)
6304
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006305xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006306 name = "f32_roundd_eval",
6307 srcs = [
6308 "eval/f32-roundd.cc",
6309 "src/xnnpack/AlignedAllocator.h",
6310 "src/xnnpack/math-stubs.h",
6311 ] + MICROKERNEL_TEST_HDRS,
6312 automatic = False,
6313 deps = MICROKERNEL_TEST_DEPS,
6314)
6315
6316xnnpack_unit_test(
6317 name = "f32_roundu_eval",
6318 srcs = [
6319 "eval/f32-roundu.cc",
6320 "src/xnnpack/AlignedAllocator.h",
6321 "src/xnnpack/math-stubs.h",
6322 ] + MICROKERNEL_TEST_HDRS,
6323 automatic = False,
6324 deps = MICROKERNEL_TEST_DEPS,
6325)
6326
6327xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006328 name = "f32_roundz_eval",
6329 srcs = [
6330 "eval/f32-roundz.cc",
6331 "src/xnnpack/AlignedAllocator.h",
6332 "src/xnnpack/math-stubs.h",
6333 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -07006334 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -07006335 deps = MICROKERNEL_TEST_DEPS,
6336)
6337
Marat Dukhan08c4a432019-10-03 09:29:21 -07006338######################### Unit tests for micro-kernels #########################
6339
6340xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006341 name = "f16_dwconv_minmax_test",
6342 srcs = [
6343 "test/f16-dwconv-minmax.cc",
6344 "test/dwconv-microkernel-tester.h",
6345 "src/xnnpack/AlignedAllocator.h",
6346 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6347 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6348)
6349
6350xnnpack_unit_test(
6351 name = "f16_gavgpool_minmax_test",
6352 srcs = [
6353 "test/f16-gavgpool-minmax.cc",
6354 "test/gavgpool-microkernel-tester.h",
6355 "src/xnnpack/AlignedAllocator.h",
6356 ] + MICROKERNEL_TEST_HDRS,
6357 deps = MICROKERNEL_TEST_DEPS,
6358)
6359
6360xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -07006361 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006362 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -07006363 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006364 "test/gemm-microkernel-tester.h",
6365 "src/xnnpack/AlignedAllocator.h",
6366 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006367 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006368)
6369
6370xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006371 name = "f16_igemm_minmax_test",
6372 srcs = [
6373 "test/f16-igemm-minmax.cc",
6374 "test/gemm-microkernel-tester.h",
6375 "src/xnnpack/AlignedAllocator.h",
6376 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6377 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6378)
6379
6380xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006381 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006382 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006383 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -08006384 "test/spmm-microkernel-tester.h",
6385 "src/xnnpack/AlignedAllocator.h",
6386 ] + MICROKERNEL_TEST_HDRS,
6387 deps = MICROKERNEL_TEST_DEPS,
6388)
6389
6390xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006391 name = "f16_vadd_minmax_test",
6392 srcs = [
6393 "test/f16-vadd-minmax.cc",
6394 "test/vbinary-microkernel-tester.h",
6395 ] + MICROKERNEL_TEST_HDRS,
6396 deps = MICROKERNEL_TEST_DEPS,
6397)
6398
6399xnnpack_unit_test(
6400 name = "f16_vaddc_minmax_test",
6401 srcs = [
6402 "test/f16-vaddc-minmax.cc",
6403 "test/vbinaryc-microkernel-tester.h",
6404 ] + MICROKERNEL_TEST_HDRS,
6405 deps = MICROKERNEL_TEST_DEPS,
6406)
6407
6408xnnpack_unit_test(
6409 name = "f16_vclamp_test",
6410 srcs = [
6411 "test/f16-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006412 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006413 ] + MICROKERNEL_TEST_HDRS,
6414 deps = MICROKERNEL_TEST_DEPS,
6415)
6416
6417xnnpack_unit_test(
6418 name = "f16_vdiv_minmax_test",
6419 srcs = [
6420 "test/f16-vdiv-minmax.cc",
6421 "test/vbinary-microkernel-tester.h",
6422 ] + MICROKERNEL_TEST_HDRS,
6423 deps = MICROKERNEL_TEST_DEPS,
6424)
6425
6426xnnpack_unit_test(
6427 name = "f16_vdivc_minmax_test",
6428 srcs = [
6429 "test/f16-vdivc-minmax.cc",
6430 "test/vbinaryc-microkernel-tester.h",
6431 ] + MICROKERNEL_TEST_HDRS,
6432 deps = MICROKERNEL_TEST_DEPS,
6433)
6434
6435xnnpack_unit_test(
6436 name = "f16_vrdivc_minmax_test",
6437 srcs = [
6438 "test/f16-vrdivc-minmax.cc",
6439 "test/vbinaryc-microkernel-tester.h",
6440 ] + MICROKERNEL_TEST_HDRS,
6441 deps = MICROKERNEL_TEST_DEPS,
6442)
6443
6444xnnpack_unit_test(
6445 name = "f16_vhswish_test",
6446 srcs = [
6447 "test/f16-vhswish.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07006448 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006449 ] + MICROKERNEL_TEST_HDRS,
6450 deps = MICROKERNEL_TEST_DEPS,
6451)
6452
6453xnnpack_unit_test(
6454 name = "f16_vmax_test",
6455 srcs = [
6456 "test/f16-vmax.cc",
6457 "test/vbinary-microkernel-tester.h",
6458 ] + MICROKERNEL_TEST_HDRS,
6459 deps = MICROKERNEL_TEST_DEPS,
6460)
6461
6462xnnpack_unit_test(
6463 name = "f16_vmaxc_test",
6464 srcs = [
6465 "test/f16-vmaxc.cc",
6466 "test/vbinaryc-microkernel-tester.h",
6467 ] + MICROKERNEL_TEST_HDRS,
6468 deps = MICROKERNEL_TEST_DEPS,
6469)
6470
6471xnnpack_unit_test(
6472 name = "f16_vmin_test",
6473 srcs = [
6474 "test/f16-vmin.cc",
6475 "test/vbinary-microkernel-tester.h",
6476 ] + MICROKERNEL_TEST_HDRS,
6477 deps = MICROKERNEL_TEST_DEPS,
6478)
6479
6480xnnpack_unit_test(
6481 name = "f16_vminc_test",
6482 srcs = [
6483 "test/f16-vminc.cc",
6484 "test/vbinaryc-microkernel-tester.h",
6485 ] + MICROKERNEL_TEST_HDRS,
6486 deps = MICROKERNEL_TEST_DEPS,
6487)
6488
6489xnnpack_unit_test(
6490 name = "f16_vmul_minmax_test",
6491 srcs = [
6492 "test/f16-vmul-minmax.cc",
6493 "test/vbinary-microkernel-tester.h",
6494 ] + MICROKERNEL_TEST_HDRS,
6495 deps = MICROKERNEL_TEST_DEPS,
6496)
6497
6498xnnpack_unit_test(
6499 name = "f16_vmulc_minmax_test",
6500 srcs = [
6501 "test/f16-vmulc-minmax.cc",
6502 "test/vbinaryc-microkernel-tester.h",
6503 ] + MICROKERNEL_TEST_HDRS,
6504 deps = MICROKERNEL_TEST_DEPS,
6505)
6506
6507xnnpack_unit_test(
6508 name = "f16_vmulcaddc_minmax_test",
6509 srcs = [
6510 "test/f16-vmulcaddc-minmax.cc",
6511 "test/vmulcaddc-microkernel-tester.h",
6512 "src/xnnpack/AlignedAllocator.h",
6513 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
6514 deps = MICROKERNEL_TEST_DEPS + [":packing"],
6515)
6516
6517xnnpack_unit_test(
6518 name = "f16_vsub_minmax_test",
6519 srcs = [
6520 "test/f16-vsub-minmax.cc",
6521 "test/vbinary-microkernel-tester.h",
6522 ] + MICROKERNEL_TEST_HDRS,
6523 deps = MICROKERNEL_TEST_DEPS,
6524)
6525
6526xnnpack_unit_test(
6527 name = "f16_vsubc_minmax_test",
6528 srcs = [
6529 "test/f16-vsubc-minmax.cc",
6530 "test/vbinaryc-microkernel-tester.h",
6531 ] + MICROKERNEL_TEST_HDRS,
6532 deps = MICROKERNEL_TEST_DEPS,
6533)
6534
6535xnnpack_unit_test(
6536 name = "f16_vrsubc_minmax_test",
6537 srcs = [
6538 "test/f16-vrsubc-minmax.cc",
6539 "test/vbinaryc-microkernel-tester.h",
6540 ] + MICROKERNEL_TEST_HDRS,
6541 deps = MICROKERNEL_TEST_DEPS,
6542)
6543
6544xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006545 name = "f32_argmaxpool_test",
6546 srcs = [
6547 "test/f32-argmaxpool.cc",
6548 "test/argmaxpool-microkernel-tester.h",
6549 "src/xnnpack/AlignedAllocator.h",
6550 ] + MICROKERNEL_TEST_HDRS,
6551 deps = MICROKERNEL_TEST_DEPS,
6552)
6553
6554xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006555 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006556 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006557 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006558 "test/avgpool-microkernel-tester.h",
6559 "src/xnnpack/AlignedAllocator.h",
6560 ] + MICROKERNEL_TEST_HDRS,
6561 deps = MICROKERNEL_TEST_DEPS,
6562)
6563
6564xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -07006565 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006566 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -07006567 "test/f32-ibilinear.cc",
6568 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -08006569 "src/xnnpack/AlignedAllocator.h",
6570 ] + MICROKERNEL_TEST_HDRS,
6571 deps = MICROKERNEL_TEST_DEPS,
6572)
6573
6574xnnpack_unit_test(
XNNPACK Team21432672020-10-19 19:58:48 -07006575 name = "f32_ibilinear_chw_test",
6576 srcs = [
6577 "test/f32-ibilinear-chw.cc",
XNNPACK Team6be46b22020-10-22 23:34:54 -07006578 "test/ibilinear-microkernel-tester.h",
XNNPACK Team21432672020-10-19 19:58:48 -07006579 "src/xnnpack/AlignedAllocator.h",
6580 ] + MICROKERNEL_TEST_HDRS,
6581 deps = MICROKERNEL_TEST_DEPS,
6582)
6583
6584xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006585 name = "f32_igemm_test",
6586 srcs = [
6587 "test/f32-igemm.cc",
6588 "test/gemm-microkernel-tester.h",
6589 "src/xnnpack/AlignedAllocator.h",
6590 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006591 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006592)
6593
6594xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006595 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006596 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -07006597 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006598 "test/gemm-microkernel-tester.h",
6599 "src/xnnpack/AlignedAllocator.h",
6600 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006601 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006602)
6603
6604xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -07006605 name = "f32_igemm_minmax_test",
6606 srcs = [
6607 "test/f32-igemm-minmax.cc",
6608 "test/gemm-microkernel-tester.h",
6609 "src/xnnpack/AlignedAllocator.h",
6610 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006611 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhane207b7b2020-05-28 16:27:42 -07006612)
6613
6614xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006615 name = "f32_conv_hwc_test",
6616 srcs = [
6617 "test/f32-conv-hwc.cc",
6618 "test/conv-hwc-microkernel-tester.h",
6619 "src/xnnpack/AlignedAllocator.h",
6620 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006621 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006622)
6623
6624xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006625 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006626 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006627 "test/f32-conv-hwc2chw.cc",
6628 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006629 "src/xnnpack/AlignedAllocator.h",
6630 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006631 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006632)
6633
6634xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006635 name = "f32_dwconv_test",
6636 srcs = [
6637 "test/f32-dwconv.cc",
6638 "test/dwconv-microkernel-tester.h",
6639 "src/xnnpack/AlignedAllocator.h",
6640 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006641 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006642)
6643
6644xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006645 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006646 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006647 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006648 "test/dwconv-microkernel-tester.h",
6649 "src/xnnpack/AlignedAllocator.h",
6650 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006651 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006652)
6653
6654xnnpack_unit_test(
Marat Dukhanbf715f92020-10-23 20:17:00 -07006655 name = "f32_dwconv2d_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006656 srcs = [
Marat Dukhanbf715f92020-10-23 20:17:00 -07006657 "test/f32-dwconv2d-chw.cc",
6658 "test/dwconv2d-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006659 "src/xnnpack/AlignedAllocator.h",
6660 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006661 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006662)
6663
6664xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006665 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006666 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006667 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006668 "test/gavgpool-microkernel-tester.h",
6669 "src/xnnpack/AlignedAllocator.h",
6670 ] + MICROKERNEL_TEST_HDRS,
6671 deps = MICROKERNEL_TEST_DEPS,
6672)
6673
6674xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -07006675 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006676 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -07006677 "test/f32-gavgpool-cw.cc",
6678 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006679 "src/xnnpack/AlignedAllocator.h",
6680 ] + MICROKERNEL_TEST_HDRS,
6681 deps = MICROKERNEL_TEST_DEPS,
6682)
6683
6684xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -07006685 name = "f32_gemm_test",
6686 srcs = [
6687 "test/f32-gemm.cc",
6688 "test/gemm-microkernel-tester.h",
6689 "src/xnnpack/AlignedAllocator.h",
6690 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006691 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan163a7e62020-04-09 04:19:26 -07006692)
6693
6694xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -07006695 name = "f32_gemm_relu_test",
6696 srcs = [
6697 "test/f32-gemm-relu.cc",
6698 "test/gemm-microkernel-tester.h",
6699 "src/xnnpack/AlignedAllocator.h",
6700 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006701 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan467f6362020-05-22 23:21:55 -07006702)
6703
6704xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006705 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006706 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006707 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006708 "test/gemm-microkernel-tester.h",
6709 "src/xnnpack/AlignedAllocator.h",
6710 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006711 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006712)
6713
6714xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006715 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006716 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006717 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006718 "test/gemm-microkernel-tester.h",
6719 "src/xnnpack/AlignedAllocator.h",
6720 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006721 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006722)
6723
6724xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006725 name = "f32_vhswish_test",
Frank Barchardb1966592020-05-12 13:47:06 -07006726 srcs = [
Marat Dukhan6674d692021-05-05 22:27:00 -07006727 "test/f32-vhswish.cc",
Marat Dukhan949b6e72021-05-13 11:21:06 -07006728 "test/vunary-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006729 ] + MICROKERNEL_TEST_HDRS,
6730 deps = MICROKERNEL_TEST_DEPS,
6731)
6732
6733xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006734 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006735 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006736 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006737 "test/maxpool-microkernel-tester.h",
6738 ] + MICROKERNEL_TEST_HDRS,
6739 deps = MICROKERNEL_TEST_DEPS,
6740)
6741
6742xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07006743 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006744 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07006745 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006746 "test/avgpool-microkernel-tester.h",
6747 "src/xnnpack/AlignedAllocator.h",
6748 ] + MICROKERNEL_TEST_HDRS,
6749 deps = MICROKERNEL_TEST_DEPS,
6750)
6751
6752xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -07006753 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006754 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -07006755 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006756 "test/gemm-microkernel-tester.h",
6757 "src/xnnpack/AlignedAllocator.h",
6758 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07006759 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07006760)
6761
6762xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -07006763 name = "f16_prelu_test",
6764 srcs = [
6765 "test/f16-prelu.cc",
6766 "test/prelu-microkernel-tester.h",
6767 "src/xnnpack/AlignedAllocator.h",
6768 ] + MICROKERNEL_TEST_HDRS,
6769 deps = MICROKERNEL_TEST_DEPS,
6770)
6771
6772xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006773 name = "f32_prelu_test",
6774 srcs = [
6775 "test/f32-prelu.cc",
6776 "test/prelu-microkernel-tester.h",
6777 "src/xnnpack/AlignedAllocator.h",
6778 ] + MICROKERNEL_TEST_HDRS,
6779 deps = MICROKERNEL_TEST_DEPS,
6780)
6781
6782xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006783 name = "f32_raddexpminusmax_test",
6784 srcs = [
6785 "test/f32-raddexpminusmax.cc",
6786 "test/raddexpminusmax-microkernel-tester.h",
6787 ] + MICROKERNEL_TEST_HDRS,
6788 deps = MICROKERNEL_TEST_DEPS,
6789)
6790
6791xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07006792 name = "f32_raddextexp_test",
6793 srcs = [
6794 "test/f32-raddextexp.cc",
6795 "test/raddextexp-microkernel-tester.h",
6796 ] + MICROKERNEL_TEST_HDRS,
6797 deps = MICROKERNEL_TEST_DEPS,
6798)
6799
6800xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07006801 name = "f32_raddstoreexpminusmax_test",
6802 srcs = [
6803 "test/f32-raddstoreexpminusmax.cc",
6804 "test/raddstoreexpminusmax-microkernel-tester.h",
6805 ] + MICROKERNEL_TEST_HDRS,
6806 deps = MICROKERNEL_TEST_DEPS,
6807)
6808
6809xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07006810 name = "f32_rmax_test",
6811 srcs = [
6812 "test/f32-rmax.cc",
6813 "test/rmax-microkernel-tester.h",
6814 ] + MICROKERNEL_TEST_HDRS,
6815 deps = MICROKERNEL_TEST_DEPS,
6816)
6817
6818xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -07006819 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006820 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -07006821 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006822 "test/spmm-microkernel-tester.h",
6823 "src/xnnpack/AlignedAllocator.h",
6824 ] + MICROKERNEL_TEST_HDRS,
6825 deps = MICROKERNEL_TEST_DEPS,
6826)
6827
6828xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07006829 name = "f32_vabs_test",
6830 srcs = [
6831 "test/f32-vabs.cc",
6832 "test/vunary-microkernel-tester.h",
6833 ] + MICROKERNEL_TEST_HDRS,
6834 deps = MICROKERNEL_TEST_DEPS,
6835)
6836
6837xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006838 name = "f32_vadd_test",
6839 srcs = [
6840 "test/f32-vadd.cc",
6841 "test/vbinary-microkernel-tester.h",
6842 ] + MICROKERNEL_TEST_HDRS,
6843 deps = MICROKERNEL_TEST_DEPS,
6844)
6845
6846xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006847 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006848 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006849 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006850 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006851 ] + MICROKERNEL_TEST_HDRS,
6852 deps = MICROKERNEL_TEST_DEPS,
6853)
6854
6855xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006856 name = "f32_vadd_relu_test",
6857 srcs = [
6858 "test/f32-vadd-relu.cc",
6859 "test/vbinary-microkernel-tester.h",
6860 ] + MICROKERNEL_TEST_HDRS,
6861 deps = MICROKERNEL_TEST_DEPS,
6862)
6863
6864xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006865 name = "f32_vaddc_test",
6866 srcs = [
6867 "test/f32-vaddc.cc",
6868 "test/vbinaryc-microkernel-tester.h",
6869 ] + MICROKERNEL_TEST_HDRS,
6870 deps = MICROKERNEL_TEST_DEPS,
6871)
6872
6873xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006874 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08006875 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006876 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08006877 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07006878 ] + MICROKERNEL_TEST_HDRS,
6879 deps = MICROKERNEL_TEST_DEPS,
6880)
6881
6882xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006883 name = "f32_vaddc_relu_test",
6884 srcs = [
6885 "test/f32-vaddc-relu.cc",
6886 "test/vbinaryc-microkernel-tester.h",
6887 ] + MICROKERNEL_TEST_HDRS,
6888 deps = MICROKERNEL_TEST_DEPS,
6889)
6890
6891xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07006892 name = "f32_vclamp_test",
6893 srcs = [
6894 "test/f32-vclamp.cc",
Marat Dukhan60d3f242021-05-13 11:59:02 -07006895 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07006896 ] + MICROKERNEL_TEST_HDRS,
6897 deps = MICROKERNEL_TEST_DEPS,
6898)
6899
6900xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006901 name = "f32_vdiv_test",
6902 srcs = [
6903 "test/f32-vdiv.cc",
6904 "test/vbinary-microkernel-tester.h",
6905 ] + MICROKERNEL_TEST_HDRS,
6906 deps = MICROKERNEL_TEST_DEPS,
6907)
6908
6909xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006910 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006911 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006912 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006913 "test/vbinary-microkernel-tester.h",
6914 ] + MICROKERNEL_TEST_HDRS,
6915 deps = MICROKERNEL_TEST_DEPS,
6916)
6917
6918xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006919 name = "f32_vdiv_relu_test",
6920 srcs = [
6921 "test/f32-vdiv-relu.cc",
6922 "test/vbinary-microkernel-tester.h",
6923 ] + MICROKERNEL_TEST_HDRS,
6924 deps = MICROKERNEL_TEST_DEPS,
6925)
6926
6927xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006928 name = "f32_vdivc_test",
6929 srcs = [
6930 "test/f32-vdivc.cc",
6931 "test/vbinaryc-microkernel-tester.h",
6932 ] + MICROKERNEL_TEST_HDRS,
6933 deps = MICROKERNEL_TEST_DEPS,
6934)
6935
6936xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006937 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006938 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006939 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006940 "test/vbinaryc-microkernel-tester.h",
6941 ] + MICROKERNEL_TEST_HDRS,
6942 deps = MICROKERNEL_TEST_DEPS,
6943)
6944
6945xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006946 name = "f32_vdivc_relu_test",
6947 srcs = [
6948 "test/f32-vdivc-relu.cc",
6949 "test/vbinaryc-microkernel-tester.h",
6950 ] + MICROKERNEL_TEST_HDRS,
6951 deps = MICROKERNEL_TEST_DEPS,
6952)
6953
6954xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07006955 name = "f32_vrdivc_test",
6956 srcs = [
6957 "test/f32-vrdivc.cc",
6958 "test/vbinaryc-microkernel-tester.h",
6959 ] + MICROKERNEL_TEST_HDRS,
6960 deps = MICROKERNEL_TEST_DEPS,
6961)
6962
6963xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006964 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006965 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07006966 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -08006967 "test/vbinaryc-microkernel-tester.h",
6968 ] + MICROKERNEL_TEST_HDRS,
6969 deps = MICROKERNEL_TEST_DEPS,
6970)
6971
6972xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07006973 name = "f32_vrdivc_relu_test",
6974 srcs = [
6975 "test/f32-vrdivc-relu.cc",
6976 "test/vbinaryc-microkernel-tester.h",
6977 ] + MICROKERNEL_TEST_HDRS,
6978 deps = MICROKERNEL_TEST_DEPS,
6979)
6980
6981xnnpack_unit_test(
Marat Dukhaned6baaf2020-12-01 15:07:08 -08006982 name = "f32_velu_test",
6983 srcs = [
6984 "test/f32-velu.cc",
6985 "test/vunary-microkernel-tester.h",
6986 ] + MICROKERNEL_TEST_HDRS,
6987 deps = MICROKERNEL_TEST_DEPS,
6988)
6989
6990xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -08006991 name = "f32_vmax_test",
6992 srcs = [
6993 "test/f32-vmax.cc",
6994 "test/vbinary-microkernel-tester.h",
6995 ] + MICROKERNEL_TEST_HDRS,
6996 deps = MICROKERNEL_TEST_DEPS,
6997)
6998
6999xnnpack_unit_test(
7000 name = "f32_vmaxc_test",
7001 srcs = [
7002 "test/f32-vmaxc.cc",
7003 "test/vbinaryc-microkernel-tester.h",
7004 ] + MICROKERNEL_TEST_HDRS,
7005 deps = MICROKERNEL_TEST_DEPS,
7006)
7007
7008xnnpack_unit_test(
7009 name = "f32_vmin_test",
7010 srcs = [
7011 "test/f32-vmin.cc",
7012 "test/vbinary-microkernel-tester.h",
7013 ] + MICROKERNEL_TEST_HDRS,
7014 deps = MICROKERNEL_TEST_DEPS,
7015)
7016
7017xnnpack_unit_test(
7018 name = "f32_vminc_test",
7019 srcs = [
7020 "test/f32-vminc.cc",
7021 "test/vbinaryc-microkernel-tester.h",
7022 ] + MICROKERNEL_TEST_HDRS,
7023 deps = MICROKERNEL_TEST_DEPS,
7024)
7025
7026xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007027 name = "f32_vmul_test",
7028 srcs = [
7029 "test/f32-vmul.cc",
7030 "test/vbinary-microkernel-tester.h",
7031 ] + MICROKERNEL_TEST_HDRS,
7032 deps = MICROKERNEL_TEST_DEPS,
7033)
7034
7035xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007036 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007037 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007038 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007039 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007040 ] + MICROKERNEL_TEST_HDRS,
7041 deps = MICROKERNEL_TEST_DEPS,
7042)
7043
7044xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007045 name = "f32_vmul_relu_test",
7046 srcs = [
7047 "test/f32-vmul-relu.cc",
7048 "test/vbinary-microkernel-tester.h",
7049 ] + MICROKERNEL_TEST_HDRS,
7050 deps = MICROKERNEL_TEST_DEPS,
7051)
7052
7053xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007054 name = "f32_vmulc_test",
7055 srcs = [
7056 "test/f32-vmulc.cc",
7057 "test/vbinaryc-microkernel-tester.h",
7058 ] + MICROKERNEL_TEST_HDRS,
7059 deps = MICROKERNEL_TEST_DEPS,
7060)
7061
7062xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007063 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007064 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007065 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007066 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007067 ] + MICROKERNEL_TEST_HDRS,
7068 deps = MICROKERNEL_TEST_DEPS,
7069)
7070
7071xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007072 name = "f32_vmulc_relu_test",
7073 srcs = [
7074 "test/f32-vmulc-relu.cc",
7075 "test/vbinaryc-microkernel-tester.h",
7076 ] + MICROKERNEL_TEST_HDRS,
7077 deps = MICROKERNEL_TEST_DEPS,
7078)
7079
7080xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007081 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007082 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007083 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007084 "test/vmulcaddc-microkernel-tester.h",
7085 "src/xnnpack/AlignedAllocator.h",
7086 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007087 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007088)
7089
7090xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -07007091 name = "f32_vlrelu_test",
7092 srcs = [
7093 "test/f32-vlrelu.cc",
7094 "test/vunary-microkernel-tester.h",
7095 ] + MICROKERNEL_TEST_HDRS,
7096 deps = MICROKERNEL_TEST_DEPS,
7097)
7098
7099xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007100 name = "f32_vneg_test",
7101 srcs = [
7102 "test/f32-vneg.cc",
7103 "test/vunary-microkernel-tester.h",
7104 ] + MICROKERNEL_TEST_HDRS,
7105 deps = MICROKERNEL_TEST_DEPS,
7106)
7107
7108xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007109 name = "f32_vrelu_test",
7110 srcs = [
7111 "test/f32-vrelu.cc",
7112 "test/vunary-microkernel-tester.h",
7113 ] + MICROKERNEL_TEST_HDRS,
7114 deps = MICROKERNEL_TEST_DEPS,
7115)
7116
7117xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -07007118 name = "f32_vrndne_test",
7119 srcs = [
7120 "test/f32-vrndne.cc",
7121 "test/vunary-microkernel-tester.h",
7122 ] + MICROKERNEL_TEST_HDRS,
7123 deps = MICROKERNEL_TEST_DEPS,
7124)
7125
7126xnnpack_unit_test(
7127 name = "f32_vrndz_test",
7128 srcs = [
7129 "test/f32-vrndz.cc",
7130 "test/vunary-microkernel-tester.h",
7131 ] + MICROKERNEL_TEST_HDRS,
7132 deps = MICROKERNEL_TEST_DEPS,
7133)
7134
7135xnnpack_unit_test(
7136 name = "f32_vrndu_test",
7137 srcs = [
7138 "test/f32-vrndu.cc",
7139 "test/vunary-microkernel-tester.h",
7140 ] + MICROKERNEL_TEST_HDRS,
7141 deps = MICROKERNEL_TEST_DEPS,
7142)
7143
7144xnnpack_unit_test(
7145 name = "f32_vrndd_test",
7146 srcs = [
7147 "test/f32-vrndd.cc",
7148 "test/vunary-microkernel-tester.h",
7149 ] + MICROKERNEL_TEST_HDRS,
7150 deps = MICROKERNEL_TEST_DEPS,
7151)
7152
7153xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -07007154 name = "f32_vscale_test",
7155 srcs = [
7156 "test/f32-vscale.cc",
7157 "test/vscale-microkernel-tester.h",
7158 ] + MICROKERNEL_TEST_HDRS,
7159 deps = MICROKERNEL_TEST_DEPS,
7160)
7161
7162xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -07007163 name = "f32_vscaleexpminusmax_test",
7164 srcs = [
7165 "test/f32-vscaleexpminusmax.cc",
7166 "test/vscaleexpminusmax-microkernel-tester.h",
7167 ] + MICROKERNEL_TEST_HDRS,
7168 deps = MICROKERNEL_TEST_DEPS,
7169)
7170
7171xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -07007172 name = "f32_vscaleextexp_test",
7173 srcs = [
7174 "test/f32-vscaleextexp.cc",
7175 "test/vscaleextexp-microkernel-tester.h",
7176 ] + MICROKERNEL_TEST_HDRS,
7177 deps = MICROKERNEL_TEST_DEPS,
7178)
7179
7180xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007181 name = "f32_vsigmoid_test",
7182 srcs = [
7183 "test/f32-vsigmoid.cc",
7184 "test/vunary-microkernel-tester.h",
7185 ] + MICROKERNEL_TEST_HDRS,
7186 deps = MICROKERNEL_TEST_DEPS,
7187)
7188
7189xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007190 name = "f32_vsqr_test",
7191 srcs = [
7192 "test/f32-vsqr.cc",
7193 "test/vunary-microkernel-tester.h",
7194 ] + MICROKERNEL_TEST_HDRS,
7195 deps = MICROKERNEL_TEST_DEPS,
7196)
7197
7198xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -07007199 name = "f32_vsqrdiff_test",
7200 srcs = [
7201 "test/f32-vsqrdiff.cc",
7202 "test/vbinary-microkernel-tester.h",
7203 ] + MICROKERNEL_TEST_HDRS,
7204 deps = MICROKERNEL_TEST_DEPS,
7205)
7206
7207xnnpack_unit_test(
7208 name = "f32_vsqrdiffc_test",
7209 srcs = [
7210 "test/f32-vsqrdiffc.cc",
7211 "test/vbinaryc-microkernel-tester.h",
7212 ] + MICROKERNEL_TEST_HDRS,
7213 deps = MICROKERNEL_TEST_DEPS,
7214)
7215
7216xnnpack_unit_test(
Marat Dukhanf4db2f32020-06-30 10:55:30 -07007217 name = "f32_vsqrt_test",
7218 srcs = [
7219 "test/f32-vsqrt.cc",
7220 "test/vunary-microkernel-tester.h",
7221 ] + MICROKERNEL_TEST_HDRS,
7222 deps = MICROKERNEL_TEST_DEPS,
7223)
7224
7225xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007226 name = "f32_vsub_test",
7227 srcs = [
7228 "test/f32-vsub.cc",
7229 "test/vbinary-microkernel-tester.h",
7230 ] + MICROKERNEL_TEST_HDRS,
7231 deps = MICROKERNEL_TEST_DEPS,
7232)
7233
7234xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007235 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -07007236 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007237 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007238 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007239 ] + MICROKERNEL_TEST_HDRS,
7240 deps = MICROKERNEL_TEST_DEPS,
7241)
7242
7243xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007244 name = "f32_vsub_relu_test",
7245 srcs = [
7246 "test/f32-vsub-relu.cc",
7247 "test/vbinary-microkernel-tester.h",
7248 ] + MICROKERNEL_TEST_HDRS,
7249 deps = MICROKERNEL_TEST_DEPS,
7250)
7251
7252xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007253 name = "f32_vsubc_test",
7254 srcs = [
7255 "test/f32-vsubc.cc",
7256 "test/vbinaryc-microkernel-tester.h",
7257 ] + MICROKERNEL_TEST_HDRS,
7258 deps = MICROKERNEL_TEST_DEPS,
7259)
7260
7261xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007262 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007263 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007264 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007265 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007266 ] + MICROKERNEL_TEST_HDRS,
7267 deps = MICROKERNEL_TEST_DEPS,
7268)
7269
7270xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007271 name = "f32_vsubc_relu_test",
7272 srcs = [
7273 "test/f32-vsubc-relu.cc",
7274 "test/vbinaryc-microkernel-tester.h",
7275 ] + MICROKERNEL_TEST_HDRS,
7276 deps = MICROKERNEL_TEST_DEPS,
7277)
7278
7279xnnpack_unit_test(
Frank Barchardd5b9f1c2020-07-01 15:00:19 -07007280 name = "f32_vrsubc_test",
7281 srcs = [
7282 "test/f32-vrsubc.cc",
7283 "test/vbinaryc-microkernel-tester.h",
7284 ] + MICROKERNEL_TEST_HDRS,
7285 deps = MICROKERNEL_TEST_DEPS,
7286)
7287
7288xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007289 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -08007290 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -07007291 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -08007292 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -07007293 ] + MICROKERNEL_TEST_HDRS,
7294 deps = MICROKERNEL_TEST_DEPS,
7295)
7296
7297xnnpack_unit_test(
Frank Barchard674778d2020-08-08 10:17:25 -07007298 name = "f32_vrsubc_relu_test",
7299 srcs = [
7300 "test/f32-vrsubc-relu.cc",
7301 "test/vbinaryc-microkernel-tester.h",
7302 ] + MICROKERNEL_TEST_HDRS,
7303 deps = MICROKERNEL_TEST_DEPS,
7304)
7305
7306xnnpack_unit_test(
Marat Dukhan82286892021-06-04 17:27:27 -07007307 name = "qc8_dwconv_minmax_fp32_test",
7308 timeout = "moderate",
7309 srcs = [
7310 "test/qc8-dwconv-minmax-fp32.cc",
7311 "test/dwconv-microkernel-tester.h",
7312 "src/xnnpack/AlignedAllocator.h",
7313 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7314 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7315)
7316
7317xnnpack_unit_test(
Marat Dukhan0b043742021-06-02 18:29:11 -07007318 name = "qc8_gemm_minmax_fp32_test",
7319 timeout = "moderate",
7320 srcs = [
7321 "test/qc8-gemm-minmax-fp32.cc",
7322 "test/gemm-microkernel-tester.h",
7323 "src/xnnpack/AlignedAllocator.h",
7324 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7325 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7326)
7327
7328xnnpack_unit_test(
Marat Dukhane06c8132021-06-03 08:59:11 -07007329 name = "qc8_igemm_minmax_fp32_test",
7330 timeout = "moderate",
7331 srcs = [
7332 "test/qc8-igemm-minmax-fp32.cc",
7333 "test/gemm-microkernel-tester.h",
7334 "src/xnnpack/AlignedAllocator.h",
7335 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7336 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7337)
7338
7339xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007340 name = "qs8_dwconv_minmax_gemmlowp_test",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007341 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007342 "test/qs8-dwconv-minmax-gemmlowp.cc",
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007343 "test/dwconv-microkernel-tester.h",
7344 "src/xnnpack/AlignedAllocator.h",
7345 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7346 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7347)
7348
7349xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007350 name = "qs8_dwconv_minmax_fp32_test",
7351 srcs = [
7352 "test/qs8-dwconv-minmax-fp32.cc",
7353 "test/dwconv-microkernel-tester.h",
7354 "src/xnnpack/AlignedAllocator.h",
7355 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7356 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7357)
7358
7359xnnpack_unit_test(
Marat Dukhan4ed53f42020-08-06 01:12:55 -07007360 name = "qs8_gavgpool_minmax_test",
7361 srcs = [
7362 "test/qs8-gavgpool-minmax.cc",
7363 "test/gavgpool-microkernel-tester.h",
7364 "src/xnnpack/AlignedAllocator.h",
7365 ] + MICROKERNEL_TEST_HDRS,
7366 deps = MICROKERNEL_TEST_DEPS,
7367)
7368
7369xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007370 name = "qs8_gemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007371 timeout = "moderate",
Marat Dukhan595e1702020-07-31 10:12:52 -07007372 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007373 "test/qs8-gemm-minmax-gemmlowp.cc",
Marat Dukhan595e1702020-07-31 10:12:52 -07007374 "test/gemm-microkernel-tester.h",
7375 "src/xnnpack/AlignedAllocator.h",
7376 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7377 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7378)
7379
7380xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007381 name = "qs8_gemm_minmax_fp32_test",
7382 timeout = "moderate",
7383 srcs = [
7384 "test/qs8-gemm-minmax-fp32.cc",
7385 "test/gemm-microkernel-tester.h",
7386 "src/xnnpack/AlignedAllocator.h",
7387 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7388 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7389)
7390
7391xnnpack_unit_test(
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007392 name = "qs8_igemm_minmax_gemmlowp_test",
Marat Dukhan56fdb252021-05-24 13:44:00 -07007393 timeout = "moderate",
Marat Dukhanf9480682020-07-31 14:50:24 -07007394 srcs = [
Marat Dukhanb07c26a2021-05-24 19:44:51 -07007395 "test/qs8-igemm-minmax-gemmlowp.cc",
Marat Dukhanf9480682020-07-31 14:50:24 -07007396 "test/gemm-microkernel-tester.h",
7397 "src/xnnpack/AlignedAllocator.h",
7398 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7399 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7400)
7401
7402xnnpack_unit_test(
Marat Dukhan9b474cf2021-05-25 16:37:48 -07007403 name = "qs8_igemm_minmax_fp32_test",
7404 timeout = "moderate",
7405 srcs = [
7406 "test/qs8-igemm-minmax-fp32.cc",
7407 "test/gemm-microkernel-tester.h",
7408 "src/xnnpack/AlignedAllocator.h",
7409 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
7410 deps = MICROKERNEL_TEST_DEPS + [":packing"],
7411)
7412
7413xnnpack_unit_test(
Marat Dukhanf9480682020-07-31 14:50:24 -07007414 name = "qs8_requantization_test",
7415 srcs = [
7416 "src/xnnpack/requantization-stubs.h",
7417 "test/qs8-requantization.cc",
7418 "test/requantization-tester.h",
7419 ] + MICROKERNEL_TEST_HDRS,
7420 deps = MICROKERNEL_TEST_DEPS,
7421)
7422
7423xnnpack_unit_test(
Marat Dukhand9f3ad42020-08-10 12:30:58 -07007424 name = "qs8_vadd_minmax_test",
7425 srcs = [
7426 "test/qs8-vadd-minmax.cc",
7427 "test/vadd-microkernel-tester.h",
7428 ] + MICROKERNEL_TEST_HDRS,
7429 deps = MICROKERNEL_TEST_DEPS,
7430)
7431
7432xnnpack_unit_test(
Marat Dukhan0270d9f2020-08-11 00:56:46 -07007433 name = "qs8_vaddc_minmax_test",
7434 srcs = [
7435 "test/qs8-vaddc-minmax.cc",
7436 "test/vaddc-microkernel-tester.h",
7437 ] + MICROKERNEL_TEST_HDRS,
7438 deps = MICROKERNEL_TEST_DEPS,
7439)
7440
7441xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007442 name = "qu8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007443 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007444 "test/qu8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007445 "test/avgpool-microkernel-tester.h",
7446 "src/xnnpack/AlignedAllocator.h",
7447 ] + MICROKERNEL_TEST_HDRS,
7448 deps = MICROKERNEL_TEST_DEPS,
7449)
7450
7451xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007452 name = "qu8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007453 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007454 "test/qu8-dwconv-minmax.cc",
7455 "test/dwconv-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007456 "src/xnnpack/AlignedAllocator.h",
7457 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007458 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007459)
7460
7461xnnpack_unit_test(
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007462 name = "qu8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007463 srcs = [
Marat Dukhanf62bbdc2020-08-04 13:59:04 -07007464 "test/qu8-igemm-minmax.cc",
7465 "test/gemm-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007466 "src/xnnpack/AlignedAllocator.h",
7467 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007468 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007469)
7470
7471xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007472 name = "qu8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007473 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007474 "test/qu8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007475 "test/gavgpool-microkernel-tester.h",
7476 "src/xnnpack/AlignedAllocator.h",
7477 ] + MICROKERNEL_TEST_HDRS,
7478 deps = MICROKERNEL_TEST_DEPS,
7479)
7480
7481xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007482 name = "qu8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007483 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007484 "test/qu8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007485 "test/gemm-microkernel-tester.h",
7486 "src/xnnpack/AlignedAllocator.h",
7487 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
Marat Dukhanab582382020-07-06 13:32:08 -07007488 deps = MICROKERNEL_TEST_DEPS + [":packing"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007489)
7490
7491xnnpack_unit_test(
Marat Dukhan5b69f8b2020-07-24 15:26:48 -07007492 name = "qu8_requantization_test",
7493 srcs = [
7494 "src/xnnpack/requantization-stubs.h",
7495 "test/qu8-requantization.cc",
7496 "test/requantization-tester.h",
7497 ] + MICROKERNEL_TEST_HDRS,
7498 deps = MICROKERNEL_TEST_DEPS,
7499)
7500
7501xnnpack_unit_test(
Marat Dukhan08b7a972020-07-14 18:17:29 -07007502 name = "qu8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007503 srcs = [
Marat Dukhan08b7a972020-07-14 18:17:29 -07007504 "test/qu8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007505 "test/vadd-microkernel-tester.h",
7506 ] + MICROKERNEL_TEST_HDRS,
7507 deps = MICROKERNEL_TEST_DEPS,
7508)
7509
7510xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007511 name = "u8_lut32norm_test",
7512 srcs = [
7513 "test/u8-lut32norm.cc",
7514 "test/lut-norm-microkernel-tester.h",
7515 ] + MICROKERNEL_TEST_HDRS,
7516 deps = MICROKERNEL_TEST_DEPS,
7517)
7518
7519xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -07007520 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007521 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -07007522 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007523 "test/maxpool-microkernel-tester.h",
7524 ] + MICROKERNEL_TEST_HDRS,
7525 deps = MICROKERNEL_TEST_DEPS,
7526)
7527
7528xnnpack_unit_test(
7529 name = "u8_rmax_test",
7530 srcs = [
7531 "test/u8-rmax.cc",
7532 "test/rmax-microkernel-tester.h",
7533 ] + MICROKERNEL_TEST_HDRS,
7534 deps = MICROKERNEL_TEST_DEPS,
7535)
7536
7537xnnpack_unit_test(
Marat Dukhan6674d692021-05-05 22:27:00 -07007538 name = "u8_vclamp_test",
7539 srcs = [
7540 "test/u8-vclamp.cc",
Marat Dukhana6c05162021-05-13 16:52:02 -07007541 "test/vunary-microkernel-tester.h",
Marat Dukhan6674d692021-05-05 22:27:00 -07007542 ] + MICROKERNEL_TEST_HDRS,
7543 deps = MICROKERNEL_TEST_DEPS,
7544)
7545
7546xnnpack_unit_test(
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007547 name = "x32_depthtospace2d_chw2hwc_test",
Yury Kartynnike7841862020-11-04 18:22:18 -08007548 srcs = [
Marat Dukhanad71b9a2020-11-20 00:01:51 -08007549 "test/x32-depthtospace2d-chw2hwc.cc",
7550 "test/depthtospace-microkernel-tester.h",
Yury Kartynnike7841862020-11-04 18:22:18 -08007551 ] + MICROKERNEL_TEST_HDRS,
7552 deps = MICROKERNEL_TEST_DEPS,
7553)
7554
7555xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -07007556 name = "x32_fill_test",
7557 srcs = [
7558 "test/x32-fill.cc",
7559 "test/fill-microkernel-tester.h",
7560 ] + MICROKERNEL_TEST_HDRS,
7561 deps = MICROKERNEL_TEST_DEPS,
7562)
7563
7564xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -07007565 name = "x32_packx_test",
7566 srcs = [
7567 "test/x32-packx.cc",
7568 "test/pack-microkernel-tester.h",
7569 "src/xnnpack/AlignedAllocator.h",
7570 ] + MICROKERNEL_TEST_HDRS,
7571 deps = MICROKERNEL_TEST_DEPS,
7572)
7573
7574xnnpack_unit_test(
7575 name = "x32_pad_test",
7576 srcs = [
7577 "test/x32-pad.cc",
7578 "test/pad-microkernel-tester.h",
7579 ] + MICROKERNEL_TEST_HDRS,
7580 deps = MICROKERNEL_TEST_DEPS,
7581)
7582
7583xnnpack_unit_test(
7584 name = "x32_unpool_test",
7585 srcs = [
7586 "test/x32-unpool.cc",
7587 "test/unpool-microkernel-tester.h",
7588 ] + MICROKERNEL_TEST_HDRS,
7589 deps = MICROKERNEL_TEST_DEPS,
7590)
7591
7592xnnpack_unit_test(
7593 name = "x32_zip_test",
7594 srcs = [
7595 "test/x32-zip.cc",
7596 "test/zip-microkernel-tester.h",
7597 ] + MICROKERNEL_TEST_HDRS,
7598 deps = MICROKERNEL_TEST_DEPS,
7599)
7600
7601xnnpack_unit_test(
7602 name = "x8_lut_test",
7603 srcs = [
7604 "test/x8-lut.cc",
7605 "test/lut-microkernel-tester.h",
7606 ] + MICROKERNEL_TEST_HDRS,
7607 deps = MICROKERNEL_TEST_DEPS,
7608)
7609
7610xnnpack_unit_test(
7611 name = "x8_zip_test",
7612 srcs = [
7613 "test/x8-zip.cc",
7614 "test/zip-microkernel-tester.h",
7615 ] + MICROKERNEL_TEST_HDRS,
7616 deps = MICROKERNEL_TEST_DEPS,
7617)
7618
Marat Dukhan20c3b922020-03-10 03:45:06 -07007619########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007620
7621xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -07007622 name = "operator_size_test",
7623 srcs = ["test/operator-size.c"],
Marat Dukhanf0cb70a2021-03-30 15:45:15 -07007624 deps = [":xnnpack_for_tfjs"],
Marat Dukhan08c4a432019-10-03 09:29:21 -07007625)
7626
Marat Dukhan20c3b922020-03-10 03:45:06 -07007627xnnpack_binary(
7628 name = "subgraph_size_test",
7629 srcs = ["test/subgraph-size.c"],
7630 deps = [":XNNPACK"],
7631)
7632
7633########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -07007634
7635xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007636 name = "abs_nc_test",
7637 srcs = [
7638 "test/abs-nc.cc",
7639 "test/abs-operator-tester.h",
7640 ],
7641 deps = OPERATOR_TEST_DEPS,
7642)
7643
7644xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007645 name = "add_nd_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007646 timeout = "moderate",
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007647 srcs = [
7648 "test/add-nd.cc",
7649 "test/binary-elementwise-operator-tester.h",
7650 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007651 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007652)
7653
7654xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007655 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007656 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007657 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007658 "test/argmax-pooling-operator-tester.h",
7659 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007660 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007661)
7662
7663xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007664 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007665 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007666 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007667 "test/average-pooling-operator-tester.h",
7668 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007669 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007670)
7671
7672xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007673 name = "bankers_rounding_nc_test",
7674 srcs = [
7675 "test/bankers-rounding-nc.cc",
7676 "test/bankers-rounding-operator-tester.h",
7677 ],
7678 deps = OPERATOR_TEST_DEPS,
7679)
7680
7681xnnpack_unit_test(
7682 name = "ceiling_nc_test",
7683 srcs = [
7684 "test/ceiling-nc.cc",
7685 "test/ceiling-operator-tester.h",
7686 ],
7687 deps = OPERATOR_TEST_DEPS,
7688)
7689
7690xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007691 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007692 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007693 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007694 "test/channel-shuffle-operator-tester.h",
7695 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007696 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007697)
7698
7699xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007700 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007701 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007702 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007703 "test/clamp-operator-tester.h",
7704 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007705 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007706)
7707
7708xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -07007709 name = "constant_pad_nd_test",
7710 srcs = [
7711 "test/constant-pad-nd.cc",
7712 "test/constant-pad-operator-tester.h",
7713 ],
7714 deps = OPERATOR_TEST_DEPS,
7715)
7716
7717xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007718 name = "convolution_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007719 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007720 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007721 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007722 "test/convolution-operator-tester.h",
7723 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007724 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007725)
7726
7727xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007728 name = "convolution_nchw_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007729 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007730 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007731 "test/convolution-nchw.cc",
7732 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007733 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007734 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007735)
7736
7737xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -07007738 name = "copy_nc_test",
7739 srcs = [
7740 "test/copy-nc.cc",
7741 "test/copy-operator-tester.h",
7742 ],
7743 deps = OPERATOR_TEST_DEPS,
7744)
7745
7746xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007747 name = "deconvolution_nhwc_test",
Artsiom Ablavatskic1aa2972020-12-08 11:23:34 -08007748 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007749 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007750 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007751 "test/deconvolution-operator-tester.h",
7752 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007753 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007754)
7755
7756xnnpack_unit_test(
Marat Dukhan188d1042020-11-24 23:39:40 -08007757 name = "depth_to_space_nchw2nhwc_test",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007758 srcs = [
Marat Dukhan188d1042020-11-24 23:39:40 -08007759 "test/depth-to-space-nchw2nhwc.cc",
Artsiom Ablavatski0f1dc182020-11-05 19:21:50 -08007760 "test/depth-to-space-operator-tester.h",
7761 ] + OPERATOR_TEST_PARAMS_HDRS,
7762 deps = OPERATOR_TEST_DEPS,
7763)
7764
7765xnnpack_unit_test(
Marat Dukhan0e521172020-11-25 13:10:04 -08007766 name = "depth_to_space_nhwc_test",
7767 srcs = [
7768 "test/depth-to-space-nhwc.cc",
7769 "test/depth-to-space-operator-tester.h",
7770 ] + OPERATOR_TEST_PARAMS_HDRS,
7771 deps = OPERATOR_TEST_DEPS,
7772)
7773
7774xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -08007775 name = "divide_nd_test",
7776 srcs = [
7777 "test/binary-elementwise-operator-tester.h",
7778 "test/divide-nd.cc",
7779 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007780 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -08007781)
7782
7783xnnpack_unit_test(
Marat Dukhanb6bd4bc2020-12-01 17:01:40 -08007784 name = "elu_nc_test",
7785 srcs = [
7786 "test/elu-nc.cc",
7787 "test/elu-operator-tester.h",
7788 ],
7789 deps = OPERATOR_TEST_DEPS,
7790)
7791
7792xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007793 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007794 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007795 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007796 "test/fully-connected-operator-tester.h",
7797 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007798 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007799)
7800
7801xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007802 name = "floor_nc_test",
7803 srcs = [
7804 "test/floor-nc.cc",
7805 "test/floor-operator-tester.h",
7806 ],
7807 deps = OPERATOR_TEST_DEPS,
7808)
7809
7810xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007811 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007812 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007813 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007814 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -07007815 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007816 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007817)
7818
7819xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007820 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007821 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007822 "test/global-average-pooling-ncw.cc",
7823 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007824 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007825 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007826)
7827
7828xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007829 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007830 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007831 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007832 "test/hardswish-operator-tester.h",
7833 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007834 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007835)
7836
7837xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007838 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007839 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007840 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007841 "test/leaky-relu-operator-tester.h",
7842 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007843 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007844)
7845
7846xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007847 name = "max_pooling_nhwc_test",
Artsiom Ablavatski2202c812021-01-22 14:16:43 -08007848 timeout = "moderate",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007849 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007850 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007851 "test/max-pooling-operator-tester.h",
7852 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007853 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007854)
7855
7856xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -08007857 name = "maximum_nd_test",
7858 srcs = [
7859 "test/binary-elementwise-operator-tester.h",
7860 "test/maximum-nd.cc",
7861 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007862 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007863)
7864
7865xnnpack_unit_test(
7866 name = "minimum_nd_test",
7867 srcs = [
7868 "test/binary-elementwise-operator-tester.h",
7869 "test/minimum-nd.cc",
7870 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007871 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -08007872)
7873
7874xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007875 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007876 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -08007877 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -08007878 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -08007879 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007880 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -08007881)
7882
7883xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007884 name = "negate_nc_test",
7885 srcs = [
7886 "test/negate-nc.cc",
7887 "test/negate-operator-tester.h",
7888 ],
7889 deps = OPERATOR_TEST_DEPS,
7890)
7891
7892xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007893 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007894 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007895 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007896 "test/prelu-operator-tester.h",
7897 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007898 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007899)
7900
7901xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007902 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -08007903 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007904 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -08007905 "test/resize-bilinear-operator-tester.h",
7906 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -07007907 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -08007908)
7909
7910xnnpack_unit_test(
Artsiom Ablavatski97918102020-10-27 15:52:59 -07007911 name = "resize_bilinear_nchw_test",
7912 srcs = [
7913 "test/resize-bilinear-nchw.cc",
7914 "test/resize-bilinear-operator-tester.h",
7915 ] + OPERATOR_TEST_PARAMS_HDRS,
7916 deps = OPERATOR_TEST_DEPS,
7917)
7918
7919xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007920 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007921 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007922 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007923 "test/sigmoid-operator-tester.h",
7924 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007925 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007926)
7927
7928xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007929 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007930 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -08007931 "test/softmax-nc.cc",
7932 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007933 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007934 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007935)
7936
7937xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -07007938 name = "square_nc_test",
7939 srcs = [
7940 "test/square-nc.cc",
7941 "test/square-operator-tester.h",
7942 ],
7943 deps = OPERATOR_TEST_DEPS,
7944)
7945
7946xnnpack_unit_test(
Marat Dukhan6804bbd2020-06-30 19:26:11 -07007947 name = "square_root_nc_test",
7948 srcs = [
7949 "test/square-root-nc.cc",
7950 "test/square-root-operator-tester.h",
7951 ],
7952 deps = OPERATOR_TEST_DEPS,
7953)
7954
7955xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -07007956 name = "squared_difference_nd_test",
7957 srcs = [
7958 "test/binary-elementwise-operator-tester.h",
7959 "test/squared-difference-nd.cc",
7960 ],
7961 deps = OPERATOR_TEST_DEPS,
7962)
7963
7964xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007965 name = "subtract_nd_test",
7966 srcs = [
7967 "test/binary-elementwise-operator-tester.h",
7968 "test/subtract-nd.cc",
7969 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007970 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -08007971)
7972
7973xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -07007974 name = "truncation_nc_test",
7975 srcs = [
7976 "test/truncation-nc.cc",
7977 "test/truncation-operator-tester.h",
7978 ],
7979 deps = OPERATOR_TEST_DEPS,
7980)
7981
7982xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -08007983 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007984 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -08007985 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -07007986 "test/unpooling-operator-tester.h",
7987 ],
Marat Dukhan1b354632020-03-23 12:50:22 -07007988 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -07007989)
7990
Chao Mei6ddfc602020-05-13 22:29:36 -07007991############################### Misc unit tests ###############################
7992
7993xnnpack_unit_test(
7994 name = "memory_planner_test",
7995 srcs = [
7996 "test/memory-planner-test.cc",
7997 ],
7998 deps = [
7999 ":XNNPACK",
8000 ":memory_planner",
8001 ],
8002)
8003
XNNPACK Teamab8c4c82020-10-09 08:05:51 -07008004xnnpack_unit_test(
8005 name = "subgraph_nchw_test",
8006 srcs = [
8007 "src/xnnpack/subgraph.h",
8008 "test/subgraph-nchw.cc",
8009 "test/subgraph-tester.h",
8010 ],
8011 deps = [
8012 ":XNNPACK",
8013 ],
8014)
8015
Marat Dukhan08c4a432019-10-03 09:29:21 -07008016############################# Build configurations #############################
8017
Marat Dukhanb8642352019-10-30 15:43:02 -07008018# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -07008019config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008020 name = "xnn_enable_assembly_explicit_true",
8021 define_values = {"xnn_enable_assembly": "true"},
8022)
8023
8024# Disables usage of assembly kernels.
8025config_setting(
8026 name = "xnn_enable_assembly_explicit_false",
8027 define_values = {"xnn_enable_assembly": "false"},
8028)
8029
Marat Dukhan9de90e02020-06-18 16:04:12 -07008030# Enables usage of sparse inference.
8031config_setting(
8032 name = "xnn_enable_sparse_explicit_true",
8033 define_values = {"xnn_enable_sparse": "true"},
8034)
8035
8036# Disables usage of sparse inference.
8037config_setting(
8038 name = "xnn_enable_sparse_explicit_false",
8039 define_values = {"xnn_enable_sparse": "false"},
8040)
8041
Marat Dukhan05702cf2020-03-26 15:41:33 -07008042# Disables usage of HMP-aware optimizations.
8043config_setting(
8044 name = "xnn_enable_hmp_explicit_false",
8045 define_values = {"xnn_enable_hmp": "false"},
8046)
8047
Chao Mei6ddfc602020-05-13 22:29:36 -07008048# Enable usage of optimized memory allocation
8049config_setting(
8050 name = "xnn_enable_memopt_explicit_true",
Marat Dukhan03f46212021-03-30 21:29:49 -07008051 define_values = {"xnn_enable_memopt": "true"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008052)
8053
8054# Disable usage of optimized memory allocation
8055config_setting(
8056 name = "xnn_enable_memopt_explicit_false",
Marat Dukhan03f46212021-03-30 21:29:49 -07008057 define_values = {"xnn_enable_memopt": "false"},
Chao Mei6ddfc602020-05-13 22:29:36 -07008058)
8059
Marat Dukhanb939cdb2021-03-30 18:51:51 -07008060# Enable QS8 inference in TFLite-specific version
8061config_setting(
8062 name = "xnn_enable_qs8_explicit_true",
8063 define_values = {"xnn_enable_qs8": "true"},
8064)
8065
8066# Disable QS8 inference in TFLite-specific version
8067config_setting(
8068 name = "xnn_enable_qs8_explicit_false",
8069 define_values = {"xnn_enable_qs8": "false"},
8070)
8071
Marat Dukhanb8642352019-10-30 15:43:02 -07008072# Builds with -c dbg
8073config_setting(
8074 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008075 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -07008076 "compilation_mode": "dbg",
8077 },
8078)
8079
8080# Builds with -c opt
8081config_setting(
8082 name = "optimized_build",
8083 values = {
8084 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008085 },
8086)
8087
8088config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -07008089 name = "linux_k8",
8090 values = {"cpu": "k8"},
8091)
8092
8093config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008094 name = "linux_arm",
8095 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -07008096)
8097
8098config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -07008099 name = "linux_armeabi",
8100 values = {"cpu": "armeabi"},
8101)
8102
8103config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -07008104 name = "linux_armhf",
8105 values = {"cpu": "armhf"},
8106)
8107
8108config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -07008109 name = "linux_armv7a",
8110 values = {"cpu": "armv7a"},
8111)
8112
8113config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -07008114 name = "linux_aarch64",
8115 values = {"cpu": "aarch64"},
8116)
8117
8118config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008119 name = "android",
8120 values = {"crosstool_top": "//external:android/crosstool"},
8121)
8122
8123config_setting(
8124 name = "android_armv7",
8125 values = {
8126 "crosstool_top": "//external:android/crosstool",
8127 "cpu": "armeabi-v7a",
8128 },
8129)
8130
8131config_setting(
8132 name = "android_arm64",
8133 values = {
8134 "crosstool_top": "//external:android/crosstool",
8135 "cpu": "arm64-v8a",
8136 },
8137)
8138
8139config_setting(
8140 name = "android_x86",
8141 values = {
8142 "crosstool_top": "//external:android/crosstool",
8143 "cpu": "x86",
8144 },
8145)
8146
8147config_setting(
8148 name = "android_x86_64",
8149 values = {
8150 "crosstool_top": "//external:android/crosstool",
8151 "cpu": "x86_64",
8152 },
8153)
8154
8155config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008156 name = "windows_x86_64",
8157 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008158)
8159
8160config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -07008161 name = "windows_x86_64_clang",
8162 values = {
8163 "compiler": "clang-cl",
8164 "cpu": "x64_windows",
8165 },
8166)
8167
8168config_setting(
8169 name = "windows_x86_64_mingw",
8170 values = {
8171 "compiler": "mingw-gcc",
8172 "cpu": "x64_windows",
8173 },
8174)
8175
8176config_setting(
8177 name = "windows_x86_64_msys",
8178 values = {
8179 "compiler": "msys-gcc",
8180 "cpu": "x64_windows",
8181 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -07008182)
8183
8184config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -07008185 name = "macos_x86_64",
8186 values = {
8187 "apple_platform_type": "macos",
8188 "cpu": "darwin",
8189 },
8190)
8191
8192config_setting(
Simon Maurerae33ab82021-03-03 23:38:22 +01008193 name = "macos_arm64",
8194 values = {
8195 "apple_platform_type": "macos",
8196 "cpu": "darwin_arm64",
8197 },
8198)
8199
8200config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -07008201 name = "emscripten",
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008202 values = {"crosstool_top": "@emsdk//emscripten_toolchain:everything"},
Marat Dukhan08c4a432019-10-03 09:29:21 -07008203)
8204
8205config_setting(
8206 name = "emscripten_wasm",
8207 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008208 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008209 "cpu": "wasm",
8210 },
8211)
8212
8213config_setting(
8214 name = "emscripten_wasmsimd",
8215 values = {
XNNPACK Team3bfbdaf2021-03-29 15:26:23 -07008216 "crosstool_top": "@emsdk//emscripten_toolchain:everything",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008217 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -07008218 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -07008219 },
8220)
8221
8222config_setting(
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008223 name = "ios_armv7",
8224 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008225 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008226 "cpu": "ios_armv7",
8227 },
8228)
8229
8230config_setting(
8231 name = "ios_arm64",
8232 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008233 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008234 "cpu": "ios_arm64",
8235 },
8236)
8237
8238config_setting(
8239 name = "ios_arm64e",
8240 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008241 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008242 "cpu": "ios_arm64e",
8243 },
8244)
8245
8246config_setting(
8247 name = "ios_x86",
8248 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008249 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008250 "cpu": "ios_i386",
8251 },
8252)
8253
8254config_setting(
8255 name = "ios_x86_64",
8256 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008257 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008258 "cpu": "ios_x86_64",
8259 },
8260)
8261
8262config_setting(
8263 name = "watchos_armv7k",
8264 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008265 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008266 "cpu": "watchos_armv7k",
8267 },
8268)
8269
8270config_setting(
8271 name = "watchos_arm64_32",
8272 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008273 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008274 "cpu": "watchos_arm64_32",
8275 },
8276)
8277
8278config_setting(
8279 name = "watchos_x86",
8280 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008281 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008282 "cpu": "watchos_i386",
8283 },
8284)
8285
8286config_setting(
8287 name = "watchos_x86_64",
8288 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008289 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008290 "cpu": "watchos_x86_64",
8291 },
8292)
8293
8294config_setting(
8295 name = "tvos_arm64",
8296 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008297 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008298 "cpu": "tvos_arm64",
8299 },
8300)
8301
8302config_setting(
8303 name = "tvos_x86_64",
8304 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -08008305 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -08008306 "cpu": "tvos_x86_64",
8307 },
8308)