Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1 | /* |
| 2 | * drivers/net/ethernet/mellanox/mlxsw/spectrum.c |
Jiri Pirko | 22a6776 | 2017-02-03 10:29:07 +0100 | [diff] [blame] | 3 | * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved. |
| 4 | * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com> |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 5 | * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com> |
| 6 | * Copyright (c) 2015 Elad Raz <eladr@mellanox.com> |
| 7 | * |
| 8 | * Redistribution and use in source and binary forms, with or without |
| 9 | * modification, are permitted provided that the following conditions are met: |
| 10 | * |
| 11 | * 1. Redistributions of source code must retain the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer. |
| 13 | * 2. Redistributions in binary form must reproduce the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer in the |
| 15 | * documentation and/or other materials provided with the distribution. |
| 16 | * 3. Neither the names of the copyright holders nor the names of its |
| 17 | * contributors may be used to endorse or promote products derived from |
| 18 | * this software without specific prior written permission. |
| 19 | * |
| 20 | * Alternatively, this software may be distributed under the terms of the |
| 21 | * GNU General Public License ("GPL") version 2 as published by the Free |
| 22 | * Software Foundation. |
| 23 | * |
| 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
| 28 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 34 | * POSSIBILITY OF SUCH DAMAGE. |
| 35 | */ |
| 36 | |
| 37 | #include <linux/kernel.h> |
| 38 | #include <linux/module.h> |
| 39 | #include <linux/types.h> |
Jiri Pirko | 1d20d23 | 2016-10-27 15:12:59 +0200 | [diff] [blame] | 40 | #include <linux/pci.h> |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 41 | #include <linux/netdevice.h> |
| 42 | #include <linux/etherdevice.h> |
| 43 | #include <linux/ethtool.h> |
| 44 | #include <linux/slab.h> |
| 45 | #include <linux/device.h> |
| 46 | #include <linux/skbuff.h> |
| 47 | #include <linux/if_vlan.h> |
| 48 | #include <linux/if_bridge.h> |
| 49 | #include <linux/workqueue.h> |
| 50 | #include <linux/jiffies.h> |
| 51 | #include <linux/bitops.h> |
Ido Schimmel | 7f71eb4 | 2015-12-15 16:03:37 +0100 | [diff] [blame] | 52 | #include <linux/list.h> |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 53 | #include <linux/notifier.h> |
Ido Schimmel | 90183b9 | 2016-04-06 17:10:08 +0200 | [diff] [blame] | 54 | #include <linux/dcbnl.h> |
Ido Schimmel | 99724c1 | 2016-07-04 08:23:14 +0200 | [diff] [blame] | 55 | #include <linux/inetdevice.h> |
Ido Schimmel | c1f2c6d | 2017-10-08 11:57:55 +0200 | [diff] [blame] | 56 | #include <linux/netlink.h> |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 57 | #include <net/switchdev.h> |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 58 | #include <net/pkt_cls.h> |
| 59 | #include <net/tc_act/tc_mirred.h> |
Jiri Pirko | e732263 | 2016-09-01 10:37:43 +0200 | [diff] [blame] | 60 | #include <net/netevent.h> |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 61 | #include <net/tc_act/tc_sample.h> |
Arkadi Sharshevsky | 5ea1237 | 2017-07-18 10:10:13 +0200 | [diff] [blame] | 62 | #include <net/addrconf.h> |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 63 | |
| 64 | #include "spectrum.h" |
Jiri Pirko | 1d20d23 | 2016-10-27 15:12:59 +0200 | [diff] [blame] | 65 | #include "pci.h" |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 66 | #include "core.h" |
| 67 | #include "reg.h" |
| 68 | #include "port.h" |
| 69 | #include "trap.h" |
| 70 | #include "txheader.h" |
Arkadi Sharshevsky | ff7b0d2 | 2017-03-11 09:42:51 +0100 | [diff] [blame] | 71 | #include "spectrum_cnt.h" |
Arkadi Sharshevsky | 230ead0 | 2017-03-28 17:24:12 +0200 | [diff] [blame] | 72 | #include "spectrum_dpipe.h" |
Yotam Gigi | d3b939b | 2017-09-19 10:00:09 +0200 | [diff] [blame] | 73 | #include "spectrum_acl_flex_actions.h" |
Yotam Gigi | e5e5c88 | 2017-05-23 21:56:27 +0200 | [diff] [blame] | 74 | #include "../mlxfw/mlxfw.h" |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 75 | |
Yotam Gigi | 6b74219 | 2017-05-23 21:56:29 +0200 | [diff] [blame] | 76 | #define MLXSW_FWREV_MAJOR 13 |
Shalom Toledo | 2f53fbd | 2017-11-12 09:01:24 +0100 | [diff] [blame] | 77 | #define MLXSW_FWREV_MINOR 1530 |
| 78 | #define MLXSW_FWREV_SUBMINOR 152 |
Yotam Gigi | 6b74219 | 2017-05-23 21:56:29 +0200 | [diff] [blame] | 79 | |
| 80 | static const struct mlxsw_fw_rev mlxsw_sp_supported_fw_rev = { |
| 81 | .major = MLXSW_FWREV_MAJOR, |
| 82 | .minor = MLXSW_FWREV_MINOR, |
| 83 | .subminor = MLXSW_FWREV_SUBMINOR |
| 84 | }; |
| 85 | |
| 86 | #define MLXSW_SP_FW_FILENAME \ |
Yotam Gigi | a4e1ce2 | 2017-06-04 16:49:58 +0200 | [diff] [blame] | 87 | "mellanox/mlxsw_spectrum-" __stringify(MLXSW_FWREV_MAJOR) \ |
Yotam Gigi | 6b74219 | 2017-05-23 21:56:29 +0200 | [diff] [blame] | 88 | "." __stringify(MLXSW_FWREV_MINOR) \ |
| 89 | "." __stringify(MLXSW_FWREV_SUBMINOR) ".mfa2" |
| 90 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 91 | static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum"; |
| 92 | static const char mlxsw_sp_driver_version[] = "1.0"; |
| 93 | |
| 94 | /* tx_hdr_version |
| 95 | * Tx header version. |
| 96 | * Must be set to 1. |
| 97 | */ |
| 98 | MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4); |
| 99 | |
| 100 | /* tx_hdr_ctl |
| 101 | * Packet control type. |
| 102 | * 0 - Ethernet control (e.g. EMADs, LACP) |
| 103 | * 1 - Ethernet data |
| 104 | */ |
| 105 | MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2); |
| 106 | |
| 107 | /* tx_hdr_proto |
| 108 | * Packet protocol type. Must be set to 1 (Ethernet). |
| 109 | */ |
| 110 | MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3); |
| 111 | |
| 112 | /* tx_hdr_rx_is_router |
| 113 | * Packet is sent from the router. Valid for data packets only. |
| 114 | */ |
| 115 | MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1); |
| 116 | |
| 117 | /* tx_hdr_fid_valid |
| 118 | * Indicates if the 'fid' field is valid and should be used for |
| 119 | * forwarding lookup. Valid for data packets only. |
| 120 | */ |
| 121 | MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1); |
| 122 | |
| 123 | /* tx_hdr_swid |
| 124 | * Switch partition ID. Must be set to 0. |
| 125 | */ |
| 126 | MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3); |
| 127 | |
| 128 | /* tx_hdr_control_tclass |
| 129 | * Indicates if the packet should use the control TClass and not one |
| 130 | * of the data TClasses. |
| 131 | */ |
| 132 | MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1); |
| 133 | |
| 134 | /* tx_hdr_etclass |
| 135 | * Egress TClass to be used on the egress device on the egress port. |
| 136 | */ |
| 137 | MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4); |
| 138 | |
| 139 | /* tx_hdr_port_mid |
| 140 | * Destination local port for unicast packets. |
| 141 | * Destination multicast ID for multicast packets. |
| 142 | * |
| 143 | * Control packets are directed to a specific egress port, while data |
| 144 | * packets are transmitted through the CPU port (0) into the switch partition, |
| 145 | * where forwarding rules are applied. |
| 146 | */ |
| 147 | MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16); |
| 148 | |
| 149 | /* tx_hdr_fid |
| 150 | * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is |
| 151 | * set, otherwise calculated based on the packet's VID using VID to FID mapping. |
| 152 | * Valid for data packets only. |
| 153 | */ |
| 154 | MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16); |
| 155 | |
| 156 | /* tx_hdr_type |
| 157 | * 0 - Data packets |
| 158 | * 6 - Control packets |
| 159 | */ |
| 160 | MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4); |
| 161 | |
Yotam Gigi | e5e5c88 | 2017-05-23 21:56:27 +0200 | [diff] [blame] | 162 | struct mlxsw_sp_mlxfw_dev { |
| 163 | struct mlxfw_dev mlxfw_dev; |
| 164 | struct mlxsw_sp *mlxsw_sp; |
| 165 | }; |
| 166 | |
| 167 | static int mlxsw_sp_component_query(struct mlxfw_dev *mlxfw_dev, |
| 168 | u16 component_index, u32 *p_max_size, |
| 169 | u8 *p_align_bits, u16 *p_max_write_size) |
| 170 | { |
| 171 | struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev = |
| 172 | container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev); |
| 173 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp; |
| 174 | char mcqi_pl[MLXSW_REG_MCQI_LEN]; |
| 175 | int err; |
| 176 | |
| 177 | mlxsw_reg_mcqi_pack(mcqi_pl, component_index); |
| 178 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcqi), mcqi_pl); |
| 179 | if (err) |
| 180 | return err; |
| 181 | mlxsw_reg_mcqi_unpack(mcqi_pl, p_max_size, p_align_bits, |
| 182 | p_max_write_size); |
| 183 | |
| 184 | *p_align_bits = max_t(u8, *p_align_bits, 2); |
| 185 | *p_max_write_size = min_t(u16, *p_max_write_size, |
| 186 | MLXSW_REG_MCDA_MAX_DATA_LEN); |
| 187 | return 0; |
| 188 | } |
| 189 | |
| 190 | static int mlxsw_sp_fsm_lock(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle) |
| 191 | { |
| 192 | struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev = |
| 193 | container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev); |
| 194 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp; |
| 195 | char mcc_pl[MLXSW_REG_MCC_LEN]; |
| 196 | u8 control_state; |
| 197 | int err; |
| 198 | |
| 199 | mlxsw_reg_mcc_pack(mcc_pl, 0, 0, 0, 0); |
| 200 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl); |
| 201 | if (err) |
| 202 | return err; |
| 203 | |
| 204 | mlxsw_reg_mcc_unpack(mcc_pl, fwhandle, NULL, &control_state); |
| 205 | if (control_state != MLXFW_FSM_STATE_IDLE) |
| 206 | return -EBUSY; |
| 207 | |
| 208 | mlxsw_reg_mcc_pack(mcc_pl, |
| 209 | MLXSW_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE, |
| 210 | 0, *fwhandle, 0); |
| 211 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl); |
| 212 | } |
| 213 | |
| 214 | static int mlxsw_sp_fsm_component_update(struct mlxfw_dev *mlxfw_dev, |
| 215 | u32 fwhandle, u16 component_index, |
| 216 | u32 component_size) |
| 217 | { |
| 218 | struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev = |
| 219 | container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev); |
| 220 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp; |
| 221 | char mcc_pl[MLXSW_REG_MCC_LEN]; |
| 222 | |
| 223 | mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_UPDATE_COMPONENT, |
| 224 | component_index, fwhandle, component_size); |
| 225 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl); |
| 226 | } |
| 227 | |
| 228 | static int mlxsw_sp_fsm_block_download(struct mlxfw_dev *mlxfw_dev, |
| 229 | u32 fwhandle, u8 *data, u16 size, |
| 230 | u32 offset) |
| 231 | { |
| 232 | struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev = |
| 233 | container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev); |
| 234 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp; |
| 235 | char mcda_pl[MLXSW_REG_MCDA_LEN]; |
| 236 | |
| 237 | mlxsw_reg_mcda_pack(mcda_pl, fwhandle, offset, size, data); |
| 238 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcda), mcda_pl); |
| 239 | } |
| 240 | |
| 241 | static int mlxsw_sp_fsm_component_verify(struct mlxfw_dev *mlxfw_dev, |
| 242 | u32 fwhandle, u16 component_index) |
| 243 | { |
| 244 | struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev = |
| 245 | container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev); |
| 246 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp; |
| 247 | char mcc_pl[MLXSW_REG_MCC_LEN]; |
| 248 | |
| 249 | mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_VERIFY_COMPONENT, |
| 250 | component_index, fwhandle, 0); |
| 251 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl); |
| 252 | } |
| 253 | |
| 254 | static int mlxsw_sp_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle) |
| 255 | { |
| 256 | struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev = |
| 257 | container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev); |
| 258 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp; |
| 259 | char mcc_pl[MLXSW_REG_MCC_LEN]; |
| 260 | |
| 261 | mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_ACTIVATE, 0, |
| 262 | fwhandle, 0); |
| 263 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl); |
| 264 | } |
| 265 | |
| 266 | static int mlxsw_sp_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle, |
| 267 | enum mlxfw_fsm_state *fsm_state, |
| 268 | enum mlxfw_fsm_state_err *fsm_state_err) |
| 269 | { |
| 270 | struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev = |
| 271 | container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev); |
| 272 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp; |
| 273 | char mcc_pl[MLXSW_REG_MCC_LEN]; |
| 274 | u8 control_state; |
| 275 | u8 error_code; |
| 276 | int err; |
| 277 | |
| 278 | mlxsw_reg_mcc_pack(mcc_pl, 0, 0, fwhandle, 0); |
| 279 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl); |
| 280 | if (err) |
| 281 | return err; |
| 282 | |
| 283 | mlxsw_reg_mcc_unpack(mcc_pl, NULL, &error_code, &control_state); |
| 284 | *fsm_state = control_state; |
| 285 | *fsm_state_err = min_t(enum mlxfw_fsm_state_err, error_code, |
| 286 | MLXFW_FSM_STATE_ERR_MAX); |
| 287 | return 0; |
| 288 | } |
| 289 | |
| 290 | static void mlxsw_sp_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle) |
| 291 | { |
| 292 | struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev = |
| 293 | container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev); |
| 294 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp; |
| 295 | char mcc_pl[MLXSW_REG_MCC_LEN]; |
| 296 | |
| 297 | mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_CANCEL, 0, |
| 298 | fwhandle, 0); |
| 299 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl); |
| 300 | } |
| 301 | |
| 302 | static void mlxsw_sp_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle) |
| 303 | { |
| 304 | struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev = |
| 305 | container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev); |
| 306 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp; |
| 307 | char mcc_pl[MLXSW_REG_MCC_LEN]; |
| 308 | |
| 309 | mlxsw_reg_mcc_pack(mcc_pl, |
| 310 | MLXSW_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE, 0, |
| 311 | fwhandle, 0); |
| 312 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl); |
| 313 | } |
| 314 | |
| 315 | static const struct mlxfw_dev_ops mlxsw_sp_mlxfw_dev_ops = { |
| 316 | .component_query = mlxsw_sp_component_query, |
| 317 | .fsm_lock = mlxsw_sp_fsm_lock, |
| 318 | .fsm_component_update = mlxsw_sp_fsm_component_update, |
| 319 | .fsm_block_download = mlxsw_sp_fsm_block_download, |
| 320 | .fsm_component_verify = mlxsw_sp_fsm_component_verify, |
| 321 | .fsm_activate = mlxsw_sp_fsm_activate, |
| 322 | .fsm_query_state = mlxsw_sp_fsm_query_state, |
| 323 | .fsm_cancel = mlxsw_sp_fsm_cancel, |
| 324 | .fsm_release = mlxsw_sp_fsm_release |
| 325 | }; |
| 326 | |
Yotam Gigi | ce6ef68f | 2017-06-01 16:26:46 +0300 | [diff] [blame] | 327 | static int mlxsw_sp_firmware_flash(struct mlxsw_sp *mlxsw_sp, |
| 328 | const struct firmware *firmware) |
| 329 | { |
| 330 | struct mlxsw_sp_mlxfw_dev mlxsw_sp_mlxfw_dev = { |
| 331 | .mlxfw_dev = { |
| 332 | .ops = &mlxsw_sp_mlxfw_dev_ops, |
| 333 | .psid = mlxsw_sp->bus_info->psid, |
| 334 | .psid_size = strlen(mlxsw_sp->bus_info->psid), |
| 335 | }, |
| 336 | .mlxsw_sp = mlxsw_sp |
| 337 | }; |
| 338 | |
| 339 | return mlxfw_firmware_flash(&mlxsw_sp_mlxfw_dev.mlxfw_dev, firmware); |
| 340 | } |
| 341 | |
Yotam Gigi | 6b74219 | 2017-05-23 21:56:29 +0200 | [diff] [blame] | 342 | static bool mlxsw_sp_fw_rev_ge(const struct mlxsw_fw_rev *a, |
| 343 | const struct mlxsw_fw_rev *b) |
| 344 | { |
| 345 | if (a->major != b->major) |
| 346 | return a->major > b->major; |
| 347 | if (a->minor != b->minor) |
| 348 | return a->minor > b->minor; |
| 349 | return a->subminor >= b->subminor; |
| 350 | } |
| 351 | |
| 352 | static int mlxsw_sp_fw_rev_validate(struct mlxsw_sp *mlxsw_sp) |
| 353 | { |
| 354 | const struct mlxsw_fw_rev *rev = &mlxsw_sp->bus_info->fw_rev; |
Yotam Gigi | 6b74219 | 2017-05-23 21:56:29 +0200 | [diff] [blame] | 355 | const struct firmware *firmware; |
| 356 | int err; |
| 357 | |
| 358 | if (mlxsw_sp_fw_rev_ge(rev, &mlxsw_sp_supported_fw_rev)) |
| 359 | return 0; |
| 360 | |
Ido Schimmel | d016e13 | 2018-01-10 14:56:54 +0100 | [diff] [blame] | 361 | dev_info(mlxsw_sp->bus_info->dev, "The firmware version %d.%d.%d is out of date\n", |
Yotam Gigi | 6b74219 | 2017-05-23 21:56:29 +0200 | [diff] [blame] | 362 | rev->major, rev->minor, rev->subminor); |
| 363 | dev_info(mlxsw_sp->bus_info->dev, "Upgrading firmware using file %s\n", |
| 364 | MLXSW_SP_FW_FILENAME); |
| 365 | |
| 366 | err = request_firmware_direct(&firmware, MLXSW_SP_FW_FILENAME, |
| 367 | mlxsw_sp->bus_info->dev); |
| 368 | if (err) { |
| 369 | dev_err(mlxsw_sp->bus_info->dev, "Could not request firmware file %s\n", |
| 370 | MLXSW_SP_FW_FILENAME); |
| 371 | return err; |
| 372 | } |
| 373 | |
Yotam Gigi | ce6ef68f | 2017-06-01 16:26:46 +0300 | [diff] [blame] | 374 | err = mlxsw_sp_firmware_flash(mlxsw_sp, firmware); |
Yotam Gigi | 6b74219 | 2017-05-23 21:56:29 +0200 | [diff] [blame] | 375 | release_firmware(firmware); |
| 376 | return err; |
| 377 | } |
| 378 | |
Arkadi Sharshevsky | 1abcbcc | 2017-03-11 09:42:53 +0100 | [diff] [blame] | 379 | int mlxsw_sp_flow_counter_get(struct mlxsw_sp *mlxsw_sp, |
| 380 | unsigned int counter_index, u64 *packets, |
| 381 | u64 *bytes) |
| 382 | { |
| 383 | char mgpc_pl[MLXSW_REG_MGPC_LEN]; |
| 384 | int err; |
| 385 | |
| 386 | mlxsw_reg_mgpc_pack(mgpc_pl, counter_index, MLXSW_REG_MGPC_OPCODE_NOP, |
Arkadi Sharshevsky | 6bba7e2 | 2017-08-24 08:40:07 +0200 | [diff] [blame] | 387 | MLXSW_REG_FLOW_COUNTER_SET_TYPE_PACKETS_BYTES); |
Arkadi Sharshevsky | 1abcbcc | 2017-03-11 09:42:53 +0100 | [diff] [blame] | 388 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl); |
| 389 | if (err) |
| 390 | return err; |
Arkadi Sharshevsky | 7cfcbc7 | 2017-08-24 08:40:08 +0200 | [diff] [blame] | 391 | if (packets) |
| 392 | *packets = mlxsw_reg_mgpc_packet_counter_get(mgpc_pl); |
| 393 | if (bytes) |
| 394 | *bytes = mlxsw_reg_mgpc_byte_counter_get(mgpc_pl); |
Arkadi Sharshevsky | 1abcbcc | 2017-03-11 09:42:53 +0100 | [diff] [blame] | 395 | return 0; |
| 396 | } |
| 397 | |
| 398 | static int mlxsw_sp_flow_counter_clear(struct mlxsw_sp *mlxsw_sp, |
| 399 | unsigned int counter_index) |
| 400 | { |
| 401 | char mgpc_pl[MLXSW_REG_MGPC_LEN]; |
| 402 | |
| 403 | mlxsw_reg_mgpc_pack(mgpc_pl, counter_index, MLXSW_REG_MGPC_OPCODE_CLEAR, |
Arkadi Sharshevsky | 6bba7e2 | 2017-08-24 08:40:07 +0200 | [diff] [blame] | 404 | MLXSW_REG_FLOW_COUNTER_SET_TYPE_PACKETS_BYTES); |
Arkadi Sharshevsky | 1abcbcc | 2017-03-11 09:42:53 +0100 | [diff] [blame] | 405 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl); |
| 406 | } |
| 407 | |
| 408 | int mlxsw_sp_flow_counter_alloc(struct mlxsw_sp *mlxsw_sp, |
| 409 | unsigned int *p_counter_index) |
| 410 | { |
| 411 | int err; |
| 412 | |
| 413 | err = mlxsw_sp_counter_alloc(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW, |
| 414 | p_counter_index); |
| 415 | if (err) |
| 416 | return err; |
| 417 | err = mlxsw_sp_flow_counter_clear(mlxsw_sp, *p_counter_index); |
| 418 | if (err) |
| 419 | goto err_counter_clear; |
| 420 | return 0; |
| 421 | |
| 422 | err_counter_clear: |
| 423 | mlxsw_sp_counter_free(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW, |
| 424 | *p_counter_index); |
| 425 | return err; |
| 426 | } |
| 427 | |
| 428 | void mlxsw_sp_flow_counter_free(struct mlxsw_sp *mlxsw_sp, |
| 429 | unsigned int counter_index) |
| 430 | { |
| 431 | mlxsw_sp_counter_free(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW, |
| 432 | counter_index); |
| 433 | } |
| 434 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 435 | static void mlxsw_sp_txhdr_construct(struct sk_buff *skb, |
| 436 | const struct mlxsw_tx_info *tx_info) |
| 437 | { |
| 438 | char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN); |
| 439 | |
| 440 | memset(txhdr, 0, MLXSW_TXHDR_LEN); |
| 441 | |
| 442 | mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1); |
| 443 | mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL); |
| 444 | mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH); |
| 445 | mlxsw_tx_hdr_swid_set(txhdr, 0); |
| 446 | mlxsw_tx_hdr_control_tclass_set(txhdr, 1); |
| 447 | mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port); |
| 448 | mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL); |
| 449 | } |
| 450 | |
Ido Schimmel | fe9ccc7 | 2017-05-16 19:38:31 +0200 | [diff] [blame] | 451 | int mlxsw_sp_port_vid_stp_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid, |
| 452 | u8 state) |
| 453 | { |
| 454 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 455 | enum mlxsw_reg_spms_state spms_state; |
| 456 | char *spms_pl; |
| 457 | int err; |
| 458 | |
| 459 | switch (state) { |
| 460 | case BR_STATE_FORWARDING: |
| 461 | spms_state = MLXSW_REG_SPMS_STATE_FORWARDING; |
| 462 | break; |
| 463 | case BR_STATE_LEARNING: |
| 464 | spms_state = MLXSW_REG_SPMS_STATE_LEARNING; |
| 465 | break; |
| 466 | case BR_STATE_LISTENING: /* fall-through */ |
| 467 | case BR_STATE_DISABLED: /* fall-through */ |
| 468 | case BR_STATE_BLOCKING: |
| 469 | spms_state = MLXSW_REG_SPMS_STATE_DISCARDING; |
| 470 | break; |
| 471 | default: |
| 472 | BUG(); |
| 473 | } |
| 474 | |
| 475 | spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL); |
| 476 | if (!spms_pl) |
| 477 | return -ENOMEM; |
| 478 | mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port); |
| 479 | mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state); |
| 480 | |
| 481 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl); |
| 482 | kfree(spms_pl); |
| 483 | return err; |
| 484 | } |
| 485 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 486 | static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp) |
| 487 | { |
Elad Raz | 5b09074 | 2016-10-28 21:35:46 +0200 | [diff] [blame] | 488 | char spad_pl[MLXSW_REG_SPAD_LEN] = {0}; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 489 | int err; |
| 490 | |
| 491 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl); |
| 492 | if (err) |
| 493 | return err; |
| 494 | mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac); |
| 495 | return 0; |
| 496 | } |
| 497 | |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 498 | static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp) |
| 499 | { |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 500 | int i; |
| 501 | |
Jiri Pirko | c1a3831 | 2016-10-21 16:07:23 +0200 | [diff] [blame] | 502 | if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN)) |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 503 | return -EIO; |
| 504 | |
Jiri Pirko | c1a3831 | 2016-10-21 16:07:23 +0200 | [diff] [blame] | 505 | mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core, |
| 506 | MAX_SPAN); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 507 | mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count, |
| 508 | sizeof(struct mlxsw_sp_span_entry), |
| 509 | GFP_KERNEL); |
| 510 | if (!mlxsw_sp->span.entries) |
| 511 | return -ENOMEM; |
| 512 | |
| 513 | for (i = 0; i < mlxsw_sp->span.entries_count; i++) |
| 514 | INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list); |
| 515 | |
| 516 | return 0; |
| 517 | } |
| 518 | |
| 519 | static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp) |
| 520 | { |
| 521 | int i; |
| 522 | |
| 523 | for (i = 0; i < mlxsw_sp->span.entries_count; i++) { |
| 524 | struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i]; |
| 525 | |
| 526 | WARN_ON_ONCE(!list_empty(&curr->bound_ports_list)); |
| 527 | } |
| 528 | kfree(mlxsw_sp->span.entries); |
| 529 | } |
| 530 | |
| 531 | static struct mlxsw_sp_span_entry * |
| 532 | mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port) |
| 533 | { |
| 534 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; |
| 535 | struct mlxsw_sp_span_entry *span_entry; |
| 536 | char mpat_pl[MLXSW_REG_MPAT_LEN]; |
| 537 | u8 local_port = port->local_port; |
| 538 | int index; |
| 539 | int i; |
| 540 | int err; |
| 541 | |
| 542 | /* find a free entry to use */ |
| 543 | index = -1; |
| 544 | for (i = 0; i < mlxsw_sp->span.entries_count; i++) { |
| 545 | if (!mlxsw_sp->span.entries[i].used) { |
| 546 | index = i; |
| 547 | span_entry = &mlxsw_sp->span.entries[i]; |
| 548 | break; |
| 549 | } |
| 550 | } |
| 551 | if (index < 0) |
| 552 | return NULL; |
| 553 | |
| 554 | /* create a new port analayzer entry for local_port */ |
| 555 | mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true); |
| 556 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); |
| 557 | if (err) |
| 558 | return NULL; |
| 559 | |
| 560 | span_entry->used = true; |
| 561 | span_entry->id = index; |
Yotam Gigi | 2d644d4 | 2016-11-11 16:34:25 +0100 | [diff] [blame] | 562 | span_entry->ref_count = 1; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 563 | span_entry->local_port = local_port; |
| 564 | return span_entry; |
| 565 | } |
| 566 | |
| 567 | static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp, |
| 568 | struct mlxsw_sp_span_entry *span_entry) |
| 569 | { |
| 570 | u8 local_port = span_entry->local_port; |
| 571 | char mpat_pl[MLXSW_REG_MPAT_LEN]; |
| 572 | int pa_id = span_entry->id; |
| 573 | |
| 574 | mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false); |
| 575 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); |
| 576 | span_entry->used = false; |
| 577 | } |
| 578 | |
Ido Schimmel | 1a9234e66 | 2016-09-19 08:29:26 +0200 | [diff] [blame] | 579 | static struct mlxsw_sp_span_entry * |
Yuval Mintz | 6399ebc | 2017-09-12 08:50:53 +0200 | [diff] [blame] | 580 | mlxsw_sp_span_entry_find(struct mlxsw_sp *mlxsw_sp, u8 local_port) |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 581 | { |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 582 | int i; |
| 583 | |
| 584 | for (i = 0; i < mlxsw_sp->span.entries_count; i++) { |
| 585 | struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i]; |
| 586 | |
Yuval Mintz | 6399ebc | 2017-09-12 08:50:53 +0200 | [diff] [blame] | 587 | if (curr->used && curr->local_port == local_port) |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 588 | return curr; |
| 589 | } |
| 590 | return NULL; |
| 591 | } |
| 592 | |
Ido Schimmel | 1a9234e66 | 2016-09-19 08:29:26 +0200 | [diff] [blame] | 593 | static struct mlxsw_sp_span_entry |
| 594 | *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port) |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 595 | { |
| 596 | struct mlxsw_sp_span_entry *span_entry; |
| 597 | |
Yuval Mintz | 6399ebc | 2017-09-12 08:50:53 +0200 | [diff] [blame] | 598 | span_entry = mlxsw_sp_span_entry_find(port->mlxsw_sp, |
| 599 | port->local_port); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 600 | if (span_entry) { |
Yotam Gigi | 2d644d4 | 2016-11-11 16:34:25 +0100 | [diff] [blame] | 601 | /* Already exists, just take a reference */ |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 602 | span_entry->ref_count++; |
| 603 | return span_entry; |
| 604 | } |
| 605 | |
| 606 | return mlxsw_sp_span_entry_create(port); |
| 607 | } |
| 608 | |
| 609 | static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp, |
| 610 | struct mlxsw_sp_span_entry *span_entry) |
| 611 | { |
Yotam Gigi | 2d644d4 | 2016-11-11 16:34:25 +0100 | [diff] [blame] | 612 | WARN_ON(!span_entry->ref_count); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 613 | if (--span_entry->ref_count == 0) |
| 614 | mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry); |
| 615 | return 0; |
| 616 | } |
| 617 | |
| 618 | static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port) |
| 619 | { |
| 620 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; |
| 621 | struct mlxsw_sp_span_inspected_port *p; |
| 622 | int i; |
| 623 | |
| 624 | for (i = 0; i < mlxsw_sp->span.entries_count; i++) { |
| 625 | struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i]; |
| 626 | |
| 627 | list_for_each_entry(p, &curr->bound_ports_list, list) |
| 628 | if (p->local_port == port->local_port && |
| 629 | p->type == MLXSW_SP_SPAN_EGRESS) |
| 630 | return true; |
| 631 | } |
| 632 | |
| 633 | return false; |
| 634 | } |
| 635 | |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 636 | static int mlxsw_sp_span_mtu_to_buffsize(const struct mlxsw_sp *mlxsw_sp, |
| 637 | int mtu) |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 638 | { |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 639 | return mlxsw_sp_bytes_cells(mlxsw_sp, mtu * 5 / 2) + 1; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 640 | } |
| 641 | |
| 642 | static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu) |
| 643 | { |
| 644 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; |
| 645 | char sbib_pl[MLXSW_REG_SBIB_LEN]; |
| 646 | int err; |
| 647 | |
| 648 | /* If port is egress mirrored, the shared buffer size should be |
| 649 | * updated according to the mtu value |
| 650 | */ |
| 651 | if (mlxsw_sp_span_is_egress_mirror(port)) { |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 652 | u32 buffsize = mlxsw_sp_span_mtu_to_buffsize(mlxsw_sp, mtu); |
| 653 | |
| 654 | mlxsw_reg_sbib_pack(sbib_pl, port->local_port, buffsize); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 655 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); |
| 656 | if (err) { |
| 657 | netdev_err(port->dev, "Could not update shared buffer for mirroring\n"); |
| 658 | return err; |
| 659 | } |
| 660 | } |
| 661 | |
| 662 | return 0; |
| 663 | } |
| 664 | |
| 665 | static struct mlxsw_sp_span_inspected_port * |
| 666 | mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port, |
| 667 | struct mlxsw_sp_span_entry *span_entry) |
| 668 | { |
| 669 | struct mlxsw_sp_span_inspected_port *p; |
| 670 | |
| 671 | list_for_each_entry(p, &span_entry->bound_ports_list, list) |
| 672 | if (port->local_port == p->local_port) |
| 673 | return p; |
| 674 | return NULL; |
| 675 | } |
| 676 | |
| 677 | static int |
| 678 | mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port, |
| 679 | struct mlxsw_sp_span_entry *span_entry, |
| 680 | enum mlxsw_sp_span_type type) |
| 681 | { |
| 682 | struct mlxsw_sp_span_inspected_port *inspected_port; |
| 683 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; |
| 684 | char mpar_pl[MLXSW_REG_MPAR_LEN]; |
| 685 | char sbib_pl[MLXSW_REG_SBIB_LEN]; |
| 686 | int pa_id = span_entry->id; |
| 687 | int err; |
| 688 | |
| 689 | /* if it is an egress SPAN, bind a shared buffer to it */ |
| 690 | if (type == MLXSW_SP_SPAN_EGRESS) { |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 691 | u32 buffsize = mlxsw_sp_span_mtu_to_buffsize(mlxsw_sp, |
| 692 | port->dev->mtu); |
| 693 | |
| 694 | mlxsw_reg_sbib_pack(sbib_pl, port->local_port, buffsize); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 695 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); |
| 696 | if (err) { |
| 697 | netdev_err(port->dev, "Could not create shared buffer for mirroring\n"); |
| 698 | return err; |
| 699 | } |
| 700 | } |
| 701 | |
| 702 | /* bind the port to the SPAN entry */ |
Ido Schimmel | 1a9234e66 | 2016-09-19 08:29:26 +0200 | [diff] [blame] | 703 | mlxsw_reg_mpar_pack(mpar_pl, port->local_port, |
| 704 | (enum mlxsw_reg_mpar_i_e) type, true, pa_id); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 705 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl); |
| 706 | if (err) |
| 707 | goto err_mpar_reg_write; |
| 708 | |
| 709 | inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL); |
| 710 | if (!inspected_port) { |
| 711 | err = -ENOMEM; |
| 712 | goto err_inspected_port_alloc; |
| 713 | } |
| 714 | inspected_port->local_port = port->local_port; |
| 715 | inspected_port->type = type; |
| 716 | list_add_tail(&inspected_port->list, &span_entry->bound_ports_list); |
| 717 | |
| 718 | return 0; |
| 719 | |
| 720 | err_mpar_reg_write: |
| 721 | err_inspected_port_alloc: |
| 722 | if (type == MLXSW_SP_SPAN_EGRESS) { |
| 723 | mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0); |
| 724 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); |
| 725 | } |
| 726 | return err; |
| 727 | } |
| 728 | |
| 729 | static void |
| 730 | mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port, |
| 731 | struct mlxsw_sp_span_entry *span_entry, |
| 732 | enum mlxsw_sp_span_type type) |
| 733 | { |
| 734 | struct mlxsw_sp_span_inspected_port *inspected_port; |
| 735 | struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; |
| 736 | char mpar_pl[MLXSW_REG_MPAR_LEN]; |
| 737 | char sbib_pl[MLXSW_REG_SBIB_LEN]; |
| 738 | int pa_id = span_entry->id; |
| 739 | |
| 740 | inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry); |
| 741 | if (!inspected_port) |
| 742 | return; |
| 743 | |
| 744 | /* remove the inspected port */ |
Ido Schimmel | 1a9234e66 | 2016-09-19 08:29:26 +0200 | [diff] [blame] | 745 | mlxsw_reg_mpar_pack(mpar_pl, port->local_port, |
| 746 | (enum mlxsw_reg_mpar_i_e) type, false, pa_id); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 747 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl); |
| 748 | |
| 749 | /* remove the SBIB buffer if it was egress SPAN */ |
| 750 | if (type == MLXSW_SP_SPAN_EGRESS) { |
| 751 | mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0); |
| 752 | mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); |
| 753 | } |
| 754 | |
| 755 | mlxsw_sp_span_entry_put(mlxsw_sp, span_entry); |
| 756 | |
| 757 | list_del(&inspected_port->list); |
| 758 | kfree(inspected_port); |
| 759 | } |
| 760 | |
| 761 | static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from, |
| 762 | struct mlxsw_sp_port *to, |
| 763 | enum mlxsw_sp_span_type type) |
| 764 | { |
| 765 | struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp; |
| 766 | struct mlxsw_sp_span_entry *span_entry; |
| 767 | int err; |
| 768 | |
| 769 | span_entry = mlxsw_sp_span_entry_get(to); |
| 770 | if (!span_entry) |
| 771 | return -ENOENT; |
| 772 | |
| 773 | netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n", |
| 774 | span_entry->id); |
| 775 | |
| 776 | err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type); |
| 777 | if (err) |
| 778 | goto err_port_bind; |
| 779 | |
| 780 | return 0; |
| 781 | |
| 782 | err_port_bind: |
| 783 | mlxsw_sp_span_entry_put(mlxsw_sp, span_entry); |
| 784 | return err; |
| 785 | } |
| 786 | |
| 787 | static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from, |
Yuval Mintz | 6399ebc | 2017-09-12 08:50:53 +0200 | [diff] [blame] | 788 | u8 destination_port, |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 789 | enum mlxsw_sp_span_type type) |
| 790 | { |
| 791 | struct mlxsw_sp_span_entry *span_entry; |
| 792 | |
Yuval Mintz | 6399ebc | 2017-09-12 08:50:53 +0200 | [diff] [blame] | 793 | span_entry = mlxsw_sp_span_entry_find(from->mlxsw_sp, |
| 794 | destination_port); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 795 | if (!span_entry) { |
| 796 | netdev_err(from->dev, "no span entry found\n"); |
| 797 | return; |
| 798 | } |
| 799 | |
| 800 | netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n", |
| 801 | span_entry->id); |
| 802 | mlxsw_sp_span_inspected_port_unbind(from, span_entry, type); |
| 803 | } |
| 804 | |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 805 | static int mlxsw_sp_port_sample_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 806 | bool enable, u32 rate) |
| 807 | { |
| 808 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 809 | char mpsc_pl[MLXSW_REG_MPSC_LEN]; |
| 810 | |
| 811 | mlxsw_reg_mpsc_pack(mpsc_pl, mlxsw_sp_port->local_port, enable, rate); |
| 812 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpsc), mpsc_pl); |
| 813 | } |
| 814 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 815 | static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 816 | bool is_up) |
| 817 | { |
| 818 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 819 | char paos_pl[MLXSW_REG_PAOS_LEN]; |
| 820 | |
| 821 | mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port, |
| 822 | is_up ? MLXSW_PORT_ADMIN_STATUS_UP : |
| 823 | MLXSW_PORT_ADMIN_STATUS_DOWN); |
| 824 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl); |
| 825 | } |
| 826 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 827 | static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 828 | unsigned char *addr) |
| 829 | { |
| 830 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 831 | char ppad_pl[MLXSW_REG_PPAD_LEN]; |
| 832 | |
| 833 | mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port); |
| 834 | mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr); |
| 835 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl); |
| 836 | } |
| 837 | |
| 838 | static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 839 | { |
| 840 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 841 | unsigned char *addr = mlxsw_sp_port->dev->dev_addr; |
| 842 | |
| 843 | ether_addr_copy(addr, mlxsw_sp->base_mac); |
| 844 | addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port; |
| 845 | return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr); |
| 846 | } |
| 847 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 848 | static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu) |
| 849 | { |
| 850 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 851 | char pmtu_pl[MLXSW_REG_PMTU_LEN]; |
| 852 | int max_mtu; |
| 853 | int err; |
| 854 | |
| 855 | mtu += MLXSW_TXHDR_LEN + ETH_HLEN; |
| 856 | mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0); |
| 857 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); |
| 858 | if (err) |
| 859 | return err; |
| 860 | max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl); |
| 861 | |
| 862 | if (mtu > max_mtu) |
| 863 | return -EINVAL; |
| 864 | |
| 865 | mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu); |
| 866 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); |
| 867 | } |
| 868 | |
| 869 | static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid) |
| 870 | { |
| 871 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
Ido Schimmel | 5b15385 | 2017-06-08 08:47:44 +0200 | [diff] [blame] | 872 | char pspa_pl[MLXSW_REG_PSPA_LEN]; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 873 | |
Ido Schimmel | 5b15385 | 2017-06-08 08:47:44 +0200 | [diff] [blame] | 874 | mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sp_port->local_port); |
| 875 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 876 | } |
| 877 | |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 878 | int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port, bool enable) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 879 | { |
| 880 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 881 | char svpe_pl[MLXSW_REG_SVPE_LEN]; |
| 882 | |
| 883 | mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable); |
| 884 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl); |
| 885 | } |
| 886 | |
Ido Schimmel | 7cbc427 | 2017-05-16 19:38:33 +0200 | [diff] [blame] | 887 | int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid, |
| 888 | bool learn_enable) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 889 | { |
| 890 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 891 | char *spvmlr_pl; |
| 892 | int err; |
| 893 | |
| 894 | spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL); |
| 895 | if (!spvmlr_pl) |
| 896 | return -ENOMEM; |
Ido Schimmel | 7cbc427 | 2017-05-16 19:38:33 +0200 | [diff] [blame] | 897 | mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid, |
| 898 | learn_enable); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 899 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl); |
| 900 | kfree(spvmlr_pl); |
| 901 | return err; |
| 902 | } |
| 903 | |
Ido Schimmel | b02eae9 | 2017-05-16 19:38:34 +0200 | [diff] [blame] | 904 | static int __mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 905 | u16 vid) |
| 906 | { |
| 907 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 908 | char spvid_pl[MLXSW_REG_SPVID_LEN]; |
| 909 | |
| 910 | mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid); |
| 911 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl); |
| 912 | } |
| 913 | |
| 914 | static int mlxsw_sp_port_allow_untagged_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 915 | bool allow) |
| 916 | { |
| 917 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 918 | char spaft_pl[MLXSW_REG_SPAFT_LEN]; |
| 919 | |
| 920 | mlxsw_reg_spaft_pack(spaft_pl, mlxsw_sp_port->local_port, allow); |
| 921 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl); |
| 922 | } |
| 923 | |
| 924 | int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid) |
| 925 | { |
| 926 | int err; |
| 927 | |
| 928 | if (!vid) { |
| 929 | err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, false); |
| 930 | if (err) |
| 931 | return err; |
| 932 | } else { |
| 933 | err = __mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid); |
| 934 | if (err) |
| 935 | return err; |
| 936 | err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, true); |
| 937 | if (err) |
| 938 | goto err_port_allow_untagged_set; |
| 939 | } |
| 940 | |
| 941 | mlxsw_sp_port->pvid = vid; |
| 942 | return 0; |
| 943 | |
| 944 | err_port_allow_untagged_set: |
| 945 | __mlxsw_sp_port_pvid_set(mlxsw_sp_port, mlxsw_sp_port->pvid); |
| 946 | return err; |
| 947 | } |
| 948 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 949 | static int |
| 950 | mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port) |
| 951 | { |
| 952 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 953 | char sspr_pl[MLXSW_REG_SSPR_LEN]; |
| 954 | |
| 955 | mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port); |
| 956 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl); |
| 957 | } |
| 958 | |
Ido Schimmel | d664b41 | 2016-06-09 09:51:40 +0200 | [diff] [blame] | 959 | static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp, |
| 960 | u8 local_port, u8 *p_module, |
| 961 | u8 *p_width, u8 *p_lane) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 962 | { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 963 | char pmlp_pl[MLXSW_REG_PMLP_LEN]; |
| 964 | int err; |
| 965 | |
Ido Schimmel | 558c2d5 | 2016-02-26 17:32:29 +0100 | [diff] [blame] | 966 | mlxsw_reg_pmlp_pack(pmlp_pl, local_port); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 967 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); |
| 968 | if (err) |
| 969 | return err; |
Ido Schimmel | 558c2d5 | 2016-02-26 17:32:29 +0100 | [diff] [blame] | 970 | *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0); |
| 971 | *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl); |
Ido Schimmel | 2bf9a58 | 2016-04-05 10:20:04 +0200 | [diff] [blame] | 972 | *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 973 | return 0; |
| 974 | } |
| 975 | |
Ido Schimmel | 2e915e0 | 2017-06-08 08:47:45 +0200 | [diff] [blame] | 976 | static int mlxsw_sp_port_module_map(struct mlxsw_sp_port *mlxsw_sp_port, |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 977 | u8 module, u8 width, u8 lane) |
| 978 | { |
Ido Schimmel | 2e915e0 | 2017-06-08 08:47:45 +0200 | [diff] [blame] | 979 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 980 | char pmlp_pl[MLXSW_REG_PMLP_LEN]; |
| 981 | int i; |
| 982 | |
Ido Schimmel | 2e915e0 | 2017-06-08 08:47:45 +0200 | [diff] [blame] | 983 | mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port); |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 984 | mlxsw_reg_pmlp_width_set(pmlp_pl, width); |
| 985 | for (i = 0; i < width; i++) { |
| 986 | mlxsw_reg_pmlp_module_set(pmlp_pl, i, module); |
| 987 | mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */ |
| 988 | } |
| 989 | |
| 990 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); |
| 991 | } |
| 992 | |
Ido Schimmel | 2e915e0 | 2017-06-08 08:47:45 +0200 | [diff] [blame] | 993 | static int mlxsw_sp_port_module_unmap(struct mlxsw_sp_port *mlxsw_sp_port) |
Ido Schimmel | 3e9b27b | 2016-02-26 17:32:28 +0100 | [diff] [blame] | 994 | { |
Ido Schimmel | 2e915e0 | 2017-06-08 08:47:45 +0200 | [diff] [blame] | 995 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
Ido Schimmel | 3e9b27b | 2016-02-26 17:32:28 +0100 | [diff] [blame] | 996 | char pmlp_pl[MLXSW_REG_PMLP_LEN]; |
| 997 | |
Ido Schimmel | 2e915e0 | 2017-06-08 08:47:45 +0200 | [diff] [blame] | 998 | mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port); |
Ido Schimmel | 3e9b27b | 2016-02-26 17:32:28 +0100 | [diff] [blame] | 999 | mlxsw_reg_pmlp_width_set(pmlp_pl, 0); |
| 1000 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); |
| 1001 | } |
| 1002 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1003 | static int mlxsw_sp_port_open(struct net_device *dev) |
| 1004 | { |
| 1005 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1006 | int err; |
| 1007 | |
| 1008 | err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true); |
| 1009 | if (err) |
| 1010 | return err; |
| 1011 | netif_start_queue(dev); |
| 1012 | return 0; |
| 1013 | } |
| 1014 | |
| 1015 | static int mlxsw_sp_port_stop(struct net_device *dev) |
| 1016 | { |
| 1017 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1018 | |
| 1019 | netif_stop_queue(dev); |
| 1020 | return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false); |
| 1021 | } |
| 1022 | |
| 1023 | static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb, |
| 1024 | struct net_device *dev) |
| 1025 | { |
| 1026 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1027 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 1028 | struct mlxsw_sp_port_pcpu_stats *pcpu_stats; |
| 1029 | const struct mlxsw_tx_info tx_info = { |
| 1030 | .local_port = mlxsw_sp_port->local_port, |
| 1031 | .is_emad = false, |
| 1032 | }; |
| 1033 | u64 len; |
| 1034 | int err; |
| 1035 | |
Jiri Pirko | 307c243 | 2016-04-08 19:11:22 +0200 | [diff] [blame] | 1036 | if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info)) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1037 | return NETDEV_TX_BUSY; |
| 1038 | |
| 1039 | if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) { |
| 1040 | struct sk_buff *skb_orig = skb; |
| 1041 | |
| 1042 | skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN); |
| 1043 | if (!skb) { |
| 1044 | this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped); |
| 1045 | dev_kfree_skb_any(skb_orig); |
| 1046 | return NETDEV_TX_OK; |
| 1047 | } |
Arkadi Sharshevsky | 36bf38d | 2017-01-12 09:10:37 +0100 | [diff] [blame] | 1048 | dev_consume_skb_any(skb_orig); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1049 | } |
| 1050 | |
| 1051 | if (eth_skb_pad(skb)) { |
| 1052 | this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped); |
| 1053 | return NETDEV_TX_OK; |
| 1054 | } |
| 1055 | |
| 1056 | mlxsw_sp_txhdr_construct(skb, &tx_info); |
Nogah Frankel | 63dcdd3 | 2016-06-17 15:09:05 +0200 | [diff] [blame] | 1057 | /* TX header is consumed by HW on the way so we shouldn't count its |
| 1058 | * bytes as being sent. |
| 1059 | */ |
| 1060 | len = skb->len - MLXSW_TXHDR_LEN; |
| 1061 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1062 | /* Due to a race we might fail here because of a full queue. In that |
| 1063 | * unlikely case we simply drop the packet. |
| 1064 | */ |
Jiri Pirko | 307c243 | 2016-04-08 19:11:22 +0200 | [diff] [blame] | 1065 | err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1066 | |
| 1067 | if (!err) { |
| 1068 | pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats); |
| 1069 | u64_stats_update_begin(&pcpu_stats->syncp); |
| 1070 | pcpu_stats->tx_packets++; |
| 1071 | pcpu_stats->tx_bytes += len; |
| 1072 | u64_stats_update_end(&pcpu_stats->syncp); |
| 1073 | } else { |
| 1074 | this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped); |
| 1075 | dev_kfree_skb_any(skb); |
| 1076 | } |
| 1077 | return NETDEV_TX_OK; |
| 1078 | } |
| 1079 | |
Jiri Pirko | c5b9b51 | 2015-12-03 12:12:22 +0100 | [diff] [blame] | 1080 | static void mlxsw_sp_set_rx_mode(struct net_device *dev) |
| 1081 | { |
| 1082 | } |
| 1083 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1084 | static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p) |
| 1085 | { |
| 1086 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1087 | struct sockaddr *addr = p; |
| 1088 | int err; |
| 1089 | |
| 1090 | if (!is_valid_ether_addr(addr->sa_data)) |
| 1091 | return -EADDRNOTAVAIL; |
| 1092 | |
| 1093 | err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data); |
| 1094 | if (err) |
| 1095 | return err; |
| 1096 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
| 1097 | return 0; |
| 1098 | } |
| 1099 | |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 1100 | static u16 mlxsw_sp_pg_buf_threshold_get(const struct mlxsw_sp *mlxsw_sp, |
| 1101 | int mtu) |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1102 | { |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 1103 | return 2 * mlxsw_sp_bytes_cells(mlxsw_sp, mtu); |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1104 | } |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1105 | |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1106 | #define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */ |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 1107 | |
| 1108 | static u16 mlxsw_sp_pfc_delay_get(const struct mlxsw_sp *mlxsw_sp, int mtu, |
| 1109 | u16 delay) |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1110 | { |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 1111 | delay = mlxsw_sp_bytes_cells(mlxsw_sp, DIV_ROUND_UP(delay, |
| 1112 | BITS_PER_BYTE)); |
| 1113 | return MLXSW_SP_CELL_FACTOR * delay + mlxsw_sp_bytes_cells(mlxsw_sp, |
| 1114 | mtu); |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1115 | } |
Ido Schimmel | 9f7ec05 | 2016-04-06 17:10:14 +0200 | [diff] [blame] | 1116 | |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 1117 | /* Maximum delay buffer needed in case of PAUSE frames, in bytes. |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1118 | * Assumes 100m cable and maximum MTU. |
| 1119 | */ |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 1120 | #define MLXSW_SP_PAUSE_DELAY 58752 |
| 1121 | |
| 1122 | static u16 mlxsw_sp_pg_buf_delay_get(const struct mlxsw_sp *mlxsw_sp, int mtu, |
| 1123 | u16 delay, bool pfc, bool pause) |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1124 | { |
| 1125 | if (pfc) |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 1126 | return mlxsw_sp_pfc_delay_get(mlxsw_sp, mtu, delay); |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1127 | else if (pause) |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 1128 | return mlxsw_sp_bytes_cells(mlxsw_sp, MLXSW_SP_PAUSE_DELAY); |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 1129 | else |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1130 | return 0; |
| 1131 | } |
| 1132 | |
| 1133 | static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int index, u16 size, u16 thres, |
| 1134 | bool lossy) |
| 1135 | { |
| 1136 | if (lossy) |
| 1137 | mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, index, size); |
| 1138 | else |
| 1139 | mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, index, size, |
| 1140 | thres); |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1141 | } |
| 1142 | |
| 1143 | int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu, |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 1144 | u8 *prio_tc, bool pause_en, |
| 1145 | struct ieee_pfc *my_pfc) |
Ido Schimmel | ff6551e | 2016-04-06 17:10:03 +0200 | [diff] [blame] | 1146 | { |
| 1147 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 1148 | u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0; |
| 1149 | u16 delay = !!my_pfc ? my_pfc->delay : 0; |
Ido Schimmel | ff6551e | 2016-04-06 17:10:03 +0200 | [diff] [blame] | 1150 | char pbmc_pl[MLXSW_REG_PBMC_LEN]; |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1151 | int i, j, err; |
Ido Schimmel | ff6551e | 2016-04-06 17:10:03 +0200 | [diff] [blame] | 1152 | |
| 1153 | mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0); |
| 1154 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); |
| 1155 | if (err) |
| 1156 | return err; |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1157 | |
| 1158 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 1159 | bool configure = false; |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 1160 | bool pfc = false; |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1161 | bool lossy; |
| 1162 | u16 thres; |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1163 | |
| 1164 | for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) { |
| 1165 | if (prio_tc[j] == i) { |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 1166 | pfc = pfc_en & BIT(j); |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1167 | configure = true; |
| 1168 | break; |
| 1169 | } |
| 1170 | } |
| 1171 | |
| 1172 | if (!configure) |
| 1173 | continue; |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1174 | |
| 1175 | lossy = !(pfc || pause_en); |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 1176 | thres = mlxsw_sp_pg_buf_threshold_get(mlxsw_sp, mtu); |
| 1177 | delay = mlxsw_sp_pg_buf_delay_get(mlxsw_sp, mtu, delay, pfc, |
| 1178 | pause_en); |
Ido Schimmel | f417f04 | 2017-03-24 08:02:50 +0100 | [diff] [blame] | 1179 | mlxsw_sp_pg_buf_pack(pbmc_pl, i, thres + delay, thres, lossy); |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1180 | } |
| 1181 | |
Ido Schimmel | ff6551e | 2016-04-06 17:10:03 +0200 | [diff] [blame] | 1182 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); |
| 1183 | } |
| 1184 | |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1185 | static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, |
Ido Schimmel | 9f7ec05 | 2016-04-06 17:10:14 +0200 | [diff] [blame] | 1186 | int mtu, bool pause_en) |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1187 | { |
| 1188 | u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0}; |
| 1189 | bool dcb_en = !!mlxsw_sp_port->dcb.ets; |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 1190 | struct ieee_pfc *my_pfc; |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1191 | u8 *prio_tc; |
| 1192 | |
| 1193 | prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc; |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 1194 | my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL; |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1195 | |
Ido Schimmel | 9f7ec05 | 2016-04-06 17:10:14 +0200 | [diff] [blame] | 1196 | return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc, |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 1197 | pause_en, my_pfc); |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 1198 | } |
| 1199 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1200 | static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu) |
| 1201 | { |
| 1202 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
Ido Schimmel | 9f7ec05 | 2016-04-06 17:10:14 +0200 | [diff] [blame] | 1203 | bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1204 | int err; |
| 1205 | |
Ido Schimmel | 9f7ec05 | 2016-04-06 17:10:14 +0200 | [diff] [blame] | 1206 | err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1207 | if (err) |
| 1208 | return err; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1209 | err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu); |
| 1210 | if (err) |
| 1211 | goto err_span_port_mtu_update; |
Ido Schimmel | ff6551e | 2016-04-06 17:10:03 +0200 | [diff] [blame] | 1212 | err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu); |
| 1213 | if (err) |
| 1214 | goto err_port_mtu_set; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1215 | dev->mtu = mtu; |
| 1216 | return 0; |
Ido Schimmel | ff6551e | 2016-04-06 17:10:03 +0200 | [diff] [blame] | 1217 | |
| 1218 | err_port_mtu_set: |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1219 | mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu); |
| 1220 | err_span_port_mtu_update: |
Ido Schimmel | 9f7ec05 | 2016-04-06 17:10:14 +0200 | [diff] [blame] | 1221 | mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en); |
Ido Schimmel | ff6551e | 2016-04-06 17:10:03 +0200 | [diff] [blame] | 1222 | return err; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1223 | } |
| 1224 | |
Or Gerlitz | 4bdcc6c | 2016-09-20 08:14:08 +0300 | [diff] [blame] | 1225 | static int |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 1226 | mlxsw_sp_port_get_sw_stats64(const struct net_device *dev, |
| 1227 | struct rtnl_link_stats64 *stats) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1228 | { |
| 1229 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1230 | struct mlxsw_sp_port_pcpu_stats *p; |
| 1231 | u64 rx_packets, rx_bytes, tx_packets, tx_bytes; |
| 1232 | u32 tx_dropped = 0; |
| 1233 | unsigned int start; |
| 1234 | int i; |
| 1235 | |
| 1236 | for_each_possible_cpu(i) { |
| 1237 | p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i); |
| 1238 | do { |
| 1239 | start = u64_stats_fetch_begin_irq(&p->syncp); |
| 1240 | rx_packets = p->rx_packets; |
| 1241 | rx_bytes = p->rx_bytes; |
| 1242 | tx_packets = p->tx_packets; |
| 1243 | tx_bytes = p->tx_bytes; |
| 1244 | } while (u64_stats_fetch_retry_irq(&p->syncp, start)); |
| 1245 | |
| 1246 | stats->rx_packets += rx_packets; |
| 1247 | stats->rx_bytes += rx_bytes; |
| 1248 | stats->tx_packets += tx_packets; |
| 1249 | stats->tx_bytes += tx_bytes; |
| 1250 | /* tx_dropped is u32, updated without syncp protection. */ |
| 1251 | tx_dropped += p->tx_dropped; |
| 1252 | } |
| 1253 | stats->tx_dropped = tx_dropped; |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 1254 | return 0; |
| 1255 | } |
| 1256 | |
Or Gerlitz | 3df5b3c | 2016-11-22 23:09:54 +0200 | [diff] [blame] | 1257 | static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id) |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 1258 | { |
| 1259 | switch (attr_id) { |
| 1260 | case IFLA_OFFLOAD_XSTATS_CPU_HIT: |
| 1261 | return true; |
| 1262 | } |
| 1263 | |
| 1264 | return false; |
| 1265 | } |
| 1266 | |
Or Gerlitz | 4bdcc6c | 2016-09-20 08:14:08 +0300 | [diff] [blame] | 1267 | static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev, |
| 1268 | void *sp) |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 1269 | { |
| 1270 | switch (attr_id) { |
| 1271 | case IFLA_OFFLOAD_XSTATS_CPU_HIT: |
| 1272 | return mlxsw_sp_port_get_sw_stats64(dev, sp); |
| 1273 | } |
| 1274 | |
| 1275 | return -EINVAL; |
| 1276 | } |
| 1277 | |
| 1278 | static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp, |
| 1279 | int prio, char *ppcnt_pl) |
| 1280 | { |
| 1281 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1282 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 1283 | |
| 1284 | mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio); |
| 1285 | return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl); |
| 1286 | } |
| 1287 | |
| 1288 | static int mlxsw_sp_port_get_hw_stats(struct net_device *dev, |
| 1289 | struct rtnl_link_stats64 *stats) |
| 1290 | { |
| 1291 | char ppcnt_pl[MLXSW_REG_PPCNT_LEN]; |
| 1292 | int err; |
| 1293 | |
| 1294 | err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, |
| 1295 | 0, ppcnt_pl); |
| 1296 | if (err) |
| 1297 | goto out; |
| 1298 | |
| 1299 | stats->tx_packets = |
| 1300 | mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl); |
| 1301 | stats->rx_packets = |
| 1302 | mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl); |
| 1303 | stats->tx_bytes = |
| 1304 | mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl); |
| 1305 | stats->rx_bytes = |
| 1306 | mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl); |
| 1307 | stats->multicast = |
| 1308 | mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl); |
| 1309 | |
| 1310 | stats->rx_crc_errors = |
| 1311 | mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl); |
| 1312 | stats->rx_frame_errors = |
| 1313 | mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl); |
| 1314 | |
| 1315 | stats->rx_length_errors = ( |
| 1316 | mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) + |
| 1317 | mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) + |
| 1318 | mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl)); |
| 1319 | |
| 1320 | stats->rx_errors = (stats->rx_crc_errors + |
| 1321 | stats->rx_frame_errors + stats->rx_length_errors); |
| 1322 | |
| 1323 | out: |
| 1324 | return err; |
| 1325 | } |
| 1326 | |
Nogah Frankel | 075ab8a | 2017-11-06 07:23:47 +0100 | [diff] [blame] | 1327 | static void |
| 1328 | mlxsw_sp_port_get_hw_xstats(struct net_device *dev, |
| 1329 | struct mlxsw_sp_port_xstats *xstats) |
| 1330 | { |
| 1331 | char ppcnt_pl[MLXSW_REG_PPCNT_LEN]; |
| 1332 | int err, i; |
| 1333 | |
| 1334 | err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_EXT_CNT, 0, |
| 1335 | ppcnt_pl); |
| 1336 | if (!err) |
| 1337 | xstats->ecn = mlxsw_reg_ppcnt_ecn_marked_get(ppcnt_pl); |
| 1338 | |
| 1339 | for (i = 0; i < TC_MAX_QUEUE; i++) { |
| 1340 | err = mlxsw_sp_port_get_stats_raw(dev, |
| 1341 | MLXSW_REG_PPCNT_TC_CONG_TC, |
| 1342 | i, ppcnt_pl); |
| 1343 | if (!err) |
| 1344 | xstats->wred_drop[i] = |
| 1345 | mlxsw_reg_ppcnt_wred_discard_get(ppcnt_pl); |
| 1346 | |
| 1347 | err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_TC_CNT, |
| 1348 | i, ppcnt_pl); |
| 1349 | if (err) |
| 1350 | continue; |
| 1351 | |
| 1352 | xstats->backlog[i] = |
| 1353 | mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl); |
| 1354 | xstats->tail_drop[i] = |
| 1355 | mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get(ppcnt_pl); |
| 1356 | } |
| 1357 | } |
| 1358 | |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 1359 | static void update_stats_cache(struct work_struct *work) |
| 1360 | { |
| 1361 | struct mlxsw_sp_port *mlxsw_sp_port = |
| 1362 | container_of(work, struct mlxsw_sp_port, |
Nogah Frankel | 9deef43 | 2017-10-26 10:55:32 +0200 | [diff] [blame] | 1363 | periodic_hw_stats.update_dw.work); |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 1364 | |
| 1365 | if (!netif_carrier_ok(mlxsw_sp_port->dev)) |
| 1366 | goto out; |
| 1367 | |
| 1368 | mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev, |
Nogah Frankel | 9deef43 | 2017-10-26 10:55:32 +0200 | [diff] [blame] | 1369 | &mlxsw_sp_port->periodic_hw_stats.stats); |
Nogah Frankel | 075ab8a | 2017-11-06 07:23:47 +0100 | [diff] [blame] | 1370 | mlxsw_sp_port_get_hw_xstats(mlxsw_sp_port->dev, |
| 1371 | &mlxsw_sp_port->periodic_hw_stats.xstats); |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 1372 | |
| 1373 | out: |
Nogah Frankel | 9deef43 | 2017-10-26 10:55:32 +0200 | [diff] [blame] | 1374 | mlxsw_core_schedule_dw(&mlxsw_sp_port->periodic_hw_stats.update_dw, |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 1375 | MLXSW_HW_STATS_UPDATE_TIME); |
| 1376 | } |
| 1377 | |
| 1378 | /* Return the stats from a cache that is updated periodically, |
| 1379 | * as this function might get called in an atomic context. |
| 1380 | */ |
stephen hemminger | bc1f447 | 2017-01-06 19:12:52 -0800 | [diff] [blame] | 1381 | static void |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 1382 | mlxsw_sp_port_get_stats64(struct net_device *dev, |
| 1383 | struct rtnl_link_stats64 *stats) |
| 1384 | { |
| 1385 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1386 | |
Nogah Frankel | 9deef43 | 2017-10-26 10:55:32 +0200 | [diff] [blame] | 1387 | memcpy(stats, &mlxsw_sp_port->periodic_hw_stats.stats, sizeof(*stats)); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1388 | } |
| 1389 | |
Jiri Pirko | 93cd081 | 2017-04-18 16:55:35 +0200 | [diff] [blame] | 1390 | static int __mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 1391 | u16 vid_begin, u16 vid_end, |
| 1392 | bool is_member, bool untagged) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1393 | { |
| 1394 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 1395 | char *spvm_pl; |
| 1396 | int err; |
| 1397 | |
| 1398 | spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL); |
| 1399 | if (!spvm_pl) |
| 1400 | return -ENOMEM; |
| 1401 | |
| 1402 | mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin, |
| 1403 | vid_end, is_member, untagged); |
| 1404 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl); |
| 1405 | kfree(spvm_pl); |
| 1406 | return err; |
| 1407 | } |
| 1408 | |
Jiri Pirko | 93cd081 | 2017-04-18 16:55:35 +0200 | [diff] [blame] | 1409 | int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin, |
| 1410 | u16 vid_end, bool is_member, bool untagged) |
| 1411 | { |
| 1412 | u16 vid, vid_e; |
| 1413 | int err; |
| 1414 | |
| 1415 | for (vid = vid_begin; vid <= vid_end; |
| 1416 | vid += MLXSW_REG_SPVM_REC_MAX_COUNT) { |
| 1417 | vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1), |
| 1418 | vid_end); |
| 1419 | |
| 1420 | err = __mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e, |
| 1421 | is_member, untagged); |
| 1422 | if (err) |
| 1423 | return err; |
| 1424 | } |
| 1425 | |
| 1426 | return 0; |
| 1427 | } |
| 1428 | |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1429 | static void mlxsw_sp_port_vlan_flush(struct mlxsw_sp_port *mlxsw_sp_port) |
Ido Schimmel | 7f71eb4 | 2015-12-15 16:03:37 +0100 | [diff] [blame] | 1430 | { |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1431 | struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan, *tmp; |
Ido Schimmel | 7f71eb4 | 2015-12-15 16:03:37 +0100 | [diff] [blame] | 1432 | |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1433 | list_for_each_entry_safe(mlxsw_sp_port_vlan, tmp, |
| 1434 | &mlxsw_sp_port->vlans_list, list) |
| 1435 | mlxsw_sp_port_vlan_put(mlxsw_sp_port_vlan); |
Ido Schimmel | 7f71eb4 | 2015-12-15 16:03:37 +0100 | [diff] [blame] | 1436 | } |
| 1437 | |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 1438 | static struct mlxsw_sp_port_vlan * |
| 1439 | mlxsw_sp_port_vlan_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid) |
| 1440 | { |
| 1441 | struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan; |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1442 | bool untagged = vid == 1; |
| 1443 | int err; |
| 1444 | |
| 1445 | err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, true, untagged); |
| 1446 | if (err) |
| 1447 | return ERR_PTR(err); |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 1448 | |
| 1449 | mlxsw_sp_port_vlan = kzalloc(sizeof(*mlxsw_sp_port_vlan), GFP_KERNEL); |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1450 | if (!mlxsw_sp_port_vlan) { |
| 1451 | err = -ENOMEM; |
| 1452 | goto err_port_vlan_alloc; |
| 1453 | } |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 1454 | |
| 1455 | mlxsw_sp_port_vlan->mlxsw_sp_port = mlxsw_sp_port; |
| 1456 | mlxsw_sp_port_vlan->vid = vid; |
| 1457 | list_add(&mlxsw_sp_port_vlan->list, &mlxsw_sp_port->vlans_list); |
| 1458 | |
| 1459 | return mlxsw_sp_port_vlan; |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1460 | |
| 1461 | err_port_vlan_alloc: |
| 1462 | mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false); |
| 1463 | return ERR_PTR(err); |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 1464 | } |
| 1465 | |
| 1466 | static void |
| 1467 | mlxsw_sp_port_vlan_destroy(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan) |
| 1468 | { |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1469 | struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp_port_vlan->mlxsw_sp_port; |
| 1470 | u16 vid = mlxsw_sp_port_vlan->vid; |
Ido Schimmel | 7cbecf2 | 2017-05-26 08:37:28 +0200 | [diff] [blame] | 1471 | |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 1472 | list_del(&mlxsw_sp_port_vlan->list); |
| 1473 | kfree(mlxsw_sp_port_vlan); |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1474 | mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false); |
| 1475 | } |
| 1476 | |
| 1477 | struct mlxsw_sp_port_vlan * |
| 1478 | mlxsw_sp_port_vlan_get(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid) |
| 1479 | { |
| 1480 | struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan; |
| 1481 | |
| 1482 | mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, vid); |
| 1483 | if (mlxsw_sp_port_vlan) |
| 1484 | return mlxsw_sp_port_vlan; |
| 1485 | |
| 1486 | return mlxsw_sp_port_vlan_create(mlxsw_sp_port, vid); |
| 1487 | } |
| 1488 | |
| 1489 | void mlxsw_sp_port_vlan_put(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan) |
| 1490 | { |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 1491 | struct mlxsw_sp_fid *fid = mlxsw_sp_port_vlan->fid; |
| 1492 | |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1493 | if (mlxsw_sp_port_vlan->bridge_port) |
| 1494 | mlxsw_sp_port_vlan_bridge_leave(mlxsw_sp_port_vlan); |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 1495 | else if (fid) |
| 1496 | mlxsw_sp_port_vlan_router_leave(mlxsw_sp_port_vlan); |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1497 | |
| 1498 | mlxsw_sp_port_vlan_destroy(mlxsw_sp_port_vlan); |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 1499 | } |
| 1500 | |
Ido Schimmel | 0597848 | 2016-08-17 16:39:30 +0200 | [diff] [blame] | 1501 | static int mlxsw_sp_port_add_vid(struct net_device *dev, |
| 1502 | __be16 __always_unused proto, u16 vid) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1503 | { |
| 1504 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1505 | |
| 1506 | /* VLAN 0 is added to HW filter when device goes up, but it is |
| 1507 | * reserved in our case, so simply return. |
| 1508 | */ |
| 1509 | if (!vid) |
| 1510 | return 0; |
| 1511 | |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1512 | return PTR_ERR_OR_ZERO(mlxsw_sp_port_vlan_get(mlxsw_sp_port, vid)); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1513 | } |
| 1514 | |
Ido Schimmel | 32d863f | 2016-07-02 11:00:10 +0200 | [diff] [blame] | 1515 | static int mlxsw_sp_port_kill_vid(struct net_device *dev, |
| 1516 | __be16 __always_unused proto, u16 vid) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1517 | { |
| 1518 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 1519 | struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1520 | |
| 1521 | /* VLAN 0 is removed from HW filter when device goes down, but |
| 1522 | * it is reserved in our case, so simply return. |
| 1523 | */ |
| 1524 | if (!vid) |
| 1525 | return 0; |
| 1526 | |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 1527 | mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, vid); |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1528 | if (!mlxsw_sp_port_vlan) |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 1529 | return 0; |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 1530 | mlxsw_sp_port_vlan_put(mlxsw_sp_port_vlan); |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 1531 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1532 | return 0; |
| 1533 | } |
| 1534 | |
Ido Schimmel | 2bf9a58 | 2016-04-05 10:20:04 +0200 | [diff] [blame] | 1535 | static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name, |
| 1536 | size_t len) |
| 1537 | { |
| 1538 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
Ido Schimmel | d664b41 | 2016-06-09 09:51:40 +0200 | [diff] [blame] | 1539 | u8 module = mlxsw_sp_port->mapping.module; |
| 1540 | u8 width = mlxsw_sp_port->mapping.width; |
| 1541 | u8 lane = mlxsw_sp_port->mapping.lane; |
Ido Schimmel | 2bf9a58 | 2016-04-05 10:20:04 +0200 | [diff] [blame] | 1542 | int err; |
| 1543 | |
Ido Schimmel | 2bf9a58 | 2016-04-05 10:20:04 +0200 | [diff] [blame] | 1544 | if (!mlxsw_sp_port->split) |
| 1545 | err = snprintf(name, len, "p%d", module + 1); |
| 1546 | else |
| 1547 | err = snprintf(name, len, "p%ds%d", module + 1, |
| 1548 | lane / width); |
| 1549 | |
| 1550 | if (err >= len) |
| 1551 | return -EINVAL; |
| 1552 | |
| 1553 | return 0; |
| 1554 | } |
| 1555 | |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1556 | static struct mlxsw_sp_port_mall_tc_entry * |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1557 | mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port, |
| 1558 | unsigned long cookie) { |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1559 | struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry; |
| 1560 | |
| 1561 | list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list) |
| 1562 | if (mall_tc_entry->cookie == cookie) |
| 1563 | return mall_tc_entry; |
| 1564 | |
| 1565 | return NULL; |
| 1566 | } |
| 1567 | |
| 1568 | static int |
| 1569 | mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port, |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1570 | struct mlxsw_sp_port_mall_mirror_tc_entry *mirror, |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1571 | const struct tc_action *a, |
| 1572 | bool ingress) |
| 1573 | { |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1574 | enum mlxsw_sp_span_type span_type; |
| 1575 | struct mlxsw_sp_port *to_port; |
| 1576 | struct net_device *to_dev; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1577 | |
Cong Wang | 9f8a739 | 2017-12-05 16:17:26 -0800 | [diff] [blame] | 1578 | to_dev = tcf_mirred_dev(a); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1579 | if (!to_dev) { |
| 1580 | netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n"); |
| 1581 | return -EINVAL; |
| 1582 | } |
| 1583 | |
| 1584 | if (!mlxsw_sp_port_dev_check(to_dev)) { |
| 1585 | netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port"); |
Yotam Gigi | e915ac6 | 2017-01-09 11:25:48 +0100 | [diff] [blame] | 1586 | return -EOPNOTSUPP; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1587 | } |
| 1588 | to_port = netdev_priv(to_dev); |
| 1589 | |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1590 | mirror->to_local_port = to_port->local_port; |
| 1591 | mirror->ingress = ingress; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1592 | span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS; |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1593 | return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type); |
| 1594 | } |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1595 | |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1596 | static void |
| 1597 | mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port, |
| 1598 | struct mlxsw_sp_port_mall_mirror_tc_entry *mirror) |
| 1599 | { |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1600 | enum mlxsw_sp_span_type span_type; |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1601 | |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1602 | span_type = mirror->ingress ? |
| 1603 | MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS; |
Yuval Mintz | 6399ebc | 2017-09-12 08:50:53 +0200 | [diff] [blame] | 1604 | mlxsw_sp_span_mirror_remove(mlxsw_sp_port, mirror->to_local_port, |
| 1605 | span_type); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1606 | } |
| 1607 | |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 1608 | static int |
| 1609 | mlxsw_sp_port_add_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port, |
| 1610 | struct tc_cls_matchall_offload *cls, |
| 1611 | const struct tc_action *a, |
| 1612 | bool ingress) |
| 1613 | { |
| 1614 | int err; |
| 1615 | |
| 1616 | if (!mlxsw_sp_port->sample) |
| 1617 | return -EOPNOTSUPP; |
| 1618 | if (rtnl_dereference(mlxsw_sp_port->sample->psample_group)) { |
| 1619 | netdev_err(mlxsw_sp_port->dev, "sample already active\n"); |
| 1620 | return -EEXIST; |
| 1621 | } |
| 1622 | if (tcf_sample_rate(a) > MLXSW_REG_MPSC_RATE_MAX) { |
| 1623 | netdev_err(mlxsw_sp_port->dev, "sample rate not supported\n"); |
| 1624 | return -EOPNOTSUPP; |
| 1625 | } |
| 1626 | |
| 1627 | rcu_assign_pointer(mlxsw_sp_port->sample->psample_group, |
| 1628 | tcf_sample_psample_group(a)); |
| 1629 | mlxsw_sp_port->sample->truncate = tcf_sample_truncate(a); |
| 1630 | mlxsw_sp_port->sample->trunc_size = tcf_sample_trunc_size(a); |
| 1631 | mlxsw_sp_port->sample->rate = tcf_sample_rate(a); |
| 1632 | |
| 1633 | err = mlxsw_sp_port_sample_set(mlxsw_sp_port, true, tcf_sample_rate(a)); |
| 1634 | if (err) |
| 1635 | goto err_port_sample_set; |
| 1636 | return 0; |
| 1637 | |
| 1638 | err_port_sample_set: |
| 1639 | RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL); |
| 1640 | return err; |
| 1641 | } |
| 1642 | |
| 1643 | static void |
| 1644 | mlxsw_sp_port_del_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port) |
| 1645 | { |
| 1646 | if (!mlxsw_sp_port->sample) |
| 1647 | return; |
| 1648 | |
| 1649 | mlxsw_sp_port_sample_set(mlxsw_sp_port, false, 1); |
| 1650 | RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL); |
| 1651 | } |
| 1652 | |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1653 | static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port, |
Jiri Pirko | 9cbf14e | 2017-08-07 10:15:25 +0200 | [diff] [blame] | 1654 | struct tc_cls_matchall_offload *f, |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1655 | bool ingress) |
| 1656 | { |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1657 | struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry; |
Jiri Pirko | 5fd9fc4 | 2017-08-07 10:15:29 +0200 | [diff] [blame] | 1658 | __be16 protocol = f->common.protocol; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1659 | const struct tc_action *a; |
WANG Cong | 22dc13c | 2016-08-13 22:35:00 -0700 | [diff] [blame] | 1660 | LIST_HEAD(actions); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1661 | int err; |
| 1662 | |
Jiri Pirko | 9cbf14e | 2017-08-07 10:15:25 +0200 | [diff] [blame] | 1663 | if (!tcf_exts_has_one_action(f->exts)) { |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1664 | netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n"); |
Yotam Gigi | e915ac6 | 2017-01-09 11:25:48 +0100 | [diff] [blame] | 1665 | return -EOPNOTSUPP; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1666 | } |
| 1667 | |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1668 | mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL); |
| 1669 | if (!mall_tc_entry) |
| 1670 | return -ENOMEM; |
Jiri Pirko | 9cbf14e | 2017-08-07 10:15:25 +0200 | [diff] [blame] | 1671 | mall_tc_entry->cookie = f->cookie; |
Ido Schimmel | 86cb13e | 2016-07-25 13:12:33 +0300 | [diff] [blame] | 1672 | |
Jiri Pirko | 9cbf14e | 2017-08-07 10:15:25 +0200 | [diff] [blame] | 1673 | tcf_exts_to_list(f->exts, &actions); |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1674 | a = list_first_entry(&actions, struct tc_action, list); |
| 1675 | |
| 1676 | if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) { |
| 1677 | struct mlxsw_sp_port_mall_mirror_tc_entry *mirror; |
| 1678 | |
| 1679 | mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR; |
| 1680 | mirror = &mall_tc_entry->mirror; |
| 1681 | err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, |
| 1682 | mirror, a, ingress); |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 1683 | } else if (is_tcf_sample(a) && protocol == htons(ETH_P_ALL)) { |
| 1684 | mall_tc_entry->type = MLXSW_SP_PORT_MALL_SAMPLE; |
Jiri Pirko | 9cbf14e | 2017-08-07 10:15:25 +0200 | [diff] [blame] | 1685 | err = mlxsw_sp_port_add_cls_matchall_sample(mlxsw_sp_port, f, |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 1686 | a, ingress); |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1687 | } else { |
| 1688 | err = -EOPNOTSUPP; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1689 | } |
| 1690 | |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1691 | if (err) |
| 1692 | goto err_add_action; |
| 1693 | |
| 1694 | list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1695 | return 0; |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1696 | |
| 1697 | err_add_action: |
| 1698 | kfree(mall_tc_entry); |
| 1699 | return err; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1700 | } |
| 1701 | |
| 1702 | static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port, |
Jiri Pirko | 9cbf14e | 2017-08-07 10:15:25 +0200 | [diff] [blame] | 1703 | struct tc_cls_matchall_offload *f) |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1704 | { |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1705 | struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1706 | |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1707 | mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port, |
Jiri Pirko | 9cbf14e | 2017-08-07 10:15:25 +0200 | [diff] [blame] | 1708 | f->cookie); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1709 | if (!mall_tc_entry) { |
| 1710 | netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n"); |
| 1711 | return; |
| 1712 | } |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1713 | list_del(&mall_tc_entry->list); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1714 | |
| 1715 | switch (mall_tc_entry->type) { |
| 1716 | case MLXSW_SP_PORT_MALL_MIRROR: |
Yotam Gigi | 65acb5d | 2017-01-09 11:25:46 +0100 | [diff] [blame] | 1717 | mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port, |
| 1718 | &mall_tc_entry->mirror); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1719 | break; |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 1720 | case MLXSW_SP_PORT_MALL_SAMPLE: |
| 1721 | mlxsw_sp_port_del_cls_matchall_sample(mlxsw_sp_port); |
| 1722 | break; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1723 | default: |
| 1724 | WARN_ON(1); |
| 1725 | } |
| 1726 | |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1727 | kfree(mall_tc_entry); |
| 1728 | } |
| 1729 | |
Jiri Pirko | fd33f1d | 2017-08-07 10:15:24 +0200 | [diff] [blame] | 1730 | static int mlxsw_sp_setup_tc_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port, |
Jiri Pirko | eb49cfa | 2017-10-19 15:50:37 +0200 | [diff] [blame] | 1731 | struct tc_cls_matchall_offload *f, |
| 1732 | bool ingress) |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1733 | { |
Jiri Pirko | 5fd9fc4 | 2017-08-07 10:15:29 +0200 | [diff] [blame] | 1734 | if (f->common.chain_index) |
Jiri Pirko | a5fcf8a | 2017-06-06 17:00:16 +0200 | [diff] [blame] | 1735 | return -EOPNOTSUPP; |
| 1736 | |
Jiri Pirko | fd33f1d | 2017-08-07 10:15:24 +0200 | [diff] [blame] | 1737 | switch (f->command) { |
| 1738 | case TC_CLSMATCHALL_REPLACE: |
Jiri Pirko | 5fd9fc4 | 2017-08-07 10:15:29 +0200 | [diff] [blame] | 1739 | return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port, f, |
Jiri Pirko | fd33f1d | 2017-08-07 10:15:24 +0200 | [diff] [blame] | 1740 | ingress); |
| 1741 | case TC_CLSMATCHALL_DESTROY: |
| 1742 | mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port, f); |
| 1743 | return 0; |
| 1744 | default: |
| 1745 | return -EOPNOTSUPP; |
| 1746 | } |
| 1747 | } |
| 1748 | |
| 1749 | static int |
| 1750 | mlxsw_sp_setup_tc_cls_flower(struct mlxsw_sp_port *mlxsw_sp_port, |
Jiri Pirko | eb49cfa | 2017-10-19 15:50:37 +0200 | [diff] [blame] | 1751 | struct tc_cls_flower_offload *f, |
| 1752 | bool ingress) |
Jiri Pirko | fd33f1d | 2017-08-07 10:15:24 +0200 | [diff] [blame] | 1753 | { |
Jiri Pirko | fd33f1d | 2017-08-07 10:15:24 +0200 | [diff] [blame] | 1754 | switch (f->command) { |
| 1755 | case TC_CLSFLOWER_REPLACE: |
Jiri Pirko | 5fd9fc4 | 2017-08-07 10:15:29 +0200 | [diff] [blame] | 1756 | return mlxsw_sp_flower_replace(mlxsw_sp_port, ingress, f); |
Jiri Pirko | fd33f1d | 2017-08-07 10:15:24 +0200 | [diff] [blame] | 1757 | case TC_CLSFLOWER_DESTROY: |
| 1758 | mlxsw_sp_flower_destroy(mlxsw_sp_port, ingress, f); |
| 1759 | return 0; |
| 1760 | case TC_CLSFLOWER_STATS: |
| 1761 | return mlxsw_sp_flower_stats(mlxsw_sp_port, ingress, f); |
| 1762 | default: |
| 1763 | return -EOPNOTSUPP; |
| 1764 | } |
| 1765 | } |
| 1766 | |
Jiri Pirko | eb49cfa | 2017-10-19 15:50:37 +0200 | [diff] [blame] | 1767 | static int mlxsw_sp_setup_tc_block_cb(enum tc_setup_type type, void *type_data, |
| 1768 | void *cb_priv, bool ingress) |
| 1769 | { |
| 1770 | struct mlxsw_sp_port *mlxsw_sp_port = cb_priv; |
| 1771 | |
Jiri Pirko | 44ae12a | 2017-11-01 11:47:39 +0100 | [diff] [blame] | 1772 | if (!tc_can_offload(mlxsw_sp_port->dev)) |
| 1773 | return -EOPNOTSUPP; |
| 1774 | |
Jiri Pirko | eb49cfa | 2017-10-19 15:50:37 +0200 | [diff] [blame] | 1775 | switch (type) { |
| 1776 | case TC_SETUP_CLSMATCHALL: |
| 1777 | return mlxsw_sp_setup_tc_cls_matchall(mlxsw_sp_port, type_data, |
| 1778 | ingress); |
| 1779 | case TC_SETUP_CLSFLOWER: |
| 1780 | return mlxsw_sp_setup_tc_cls_flower(mlxsw_sp_port, type_data, |
| 1781 | ingress); |
| 1782 | default: |
| 1783 | return -EOPNOTSUPP; |
| 1784 | } |
| 1785 | } |
| 1786 | |
| 1787 | static int mlxsw_sp_setup_tc_block_cb_ig(enum tc_setup_type type, |
| 1788 | void *type_data, void *cb_priv) |
| 1789 | { |
| 1790 | return mlxsw_sp_setup_tc_block_cb(type, type_data, cb_priv, true); |
| 1791 | } |
| 1792 | |
| 1793 | static int mlxsw_sp_setup_tc_block_cb_eg(enum tc_setup_type type, |
| 1794 | void *type_data, void *cb_priv) |
| 1795 | { |
| 1796 | return mlxsw_sp_setup_tc_block_cb(type, type_data, cb_priv, false); |
| 1797 | } |
| 1798 | |
| 1799 | static int mlxsw_sp_setup_tc_block(struct mlxsw_sp_port *mlxsw_sp_port, |
| 1800 | struct tc_block_offload *f) |
| 1801 | { |
| 1802 | tc_setup_cb_t *cb; |
| 1803 | |
| 1804 | if (f->binder_type == TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS) |
| 1805 | cb = mlxsw_sp_setup_tc_block_cb_ig; |
| 1806 | else if (f->binder_type == TCF_BLOCK_BINDER_TYPE_CLSACT_EGRESS) |
| 1807 | cb = mlxsw_sp_setup_tc_block_cb_eg; |
| 1808 | else |
| 1809 | return -EOPNOTSUPP; |
| 1810 | |
| 1811 | switch (f->command) { |
| 1812 | case TC_BLOCK_BIND: |
| 1813 | return tcf_block_cb_register(f->block, cb, mlxsw_sp_port, |
| 1814 | mlxsw_sp_port); |
| 1815 | case TC_BLOCK_UNBIND: |
| 1816 | tcf_block_cb_unregister(f->block, cb, mlxsw_sp_port); |
| 1817 | return 0; |
| 1818 | default: |
| 1819 | return -EOPNOTSUPP; |
| 1820 | } |
| 1821 | } |
| 1822 | |
Jiri Pirko | fd33f1d | 2017-08-07 10:15:24 +0200 | [diff] [blame] | 1823 | static int mlxsw_sp_setup_tc(struct net_device *dev, enum tc_setup_type type, |
Jiri Pirko | de4784c | 2017-08-07 10:15:32 +0200 | [diff] [blame] | 1824 | void *type_data) |
Jiri Pirko | fd33f1d | 2017-08-07 10:15:24 +0200 | [diff] [blame] | 1825 | { |
| 1826 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1827 | |
Jiri Pirko | 2572ac5 | 2017-08-07 10:15:17 +0200 | [diff] [blame] | 1828 | switch (type) { |
Jiri Pirko | eb49cfa | 2017-10-19 15:50:37 +0200 | [diff] [blame] | 1829 | case TC_SETUP_BLOCK: |
| 1830 | return mlxsw_sp_setup_tc_block(mlxsw_sp_port, type_data); |
Nogah Frankel | 96f17e0 | 2017-11-06 07:23:45 +0100 | [diff] [blame] | 1831 | case TC_SETUP_QDISC_RED: |
| 1832 | return mlxsw_sp_setup_tc_red(mlxsw_sp_port, type_data); |
Nogah Frankel | 46a3615 | 2018-01-14 12:33:16 +0100 | [diff] [blame] | 1833 | case TC_SETUP_QDISC_PRIO: |
| 1834 | return mlxsw_sp_setup_tc_prio(mlxsw_sp_port, type_data); |
Jiri Pirko | 2572ac5 | 2017-08-07 10:15:17 +0200 | [diff] [blame] | 1835 | default: |
| 1836 | return -EOPNOTSUPP; |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1837 | } |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1838 | } |
| 1839 | |
Jiri Pirko | 9454d93 | 2017-12-06 09:41:12 +0100 | [diff] [blame] | 1840 | |
| 1841 | static int mlxsw_sp_feature_hw_tc(struct net_device *dev, bool enable) |
| 1842 | { |
| 1843 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1844 | |
| 1845 | if (!enable && (mlxsw_sp_port->acl_rule_count || |
| 1846 | !list_empty(&mlxsw_sp_port->mall_tc_list))) { |
| 1847 | netdev_err(dev, "Active offloaded tc filters, can't turn hw_tc_offload off\n"); |
| 1848 | return -EINVAL; |
| 1849 | } |
| 1850 | return 0; |
| 1851 | } |
| 1852 | |
| 1853 | typedef int (*mlxsw_sp_feature_handler)(struct net_device *dev, bool enable); |
| 1854 | |
| 1855 | static int mlxsw_sp_handle_feature(struct net_device *dev, |
| 1856 | netdev_features_t wanted_features, |
| 1857 | netdev_features_t feature, |
| 1858 | mlxsw_sp_feature_handler feature_handler) |
| 1859 | { |
| 1860 | netdev_features_t changes = wanted_features ^ dev->features; |
| 1861 | bool enable = !!(wanted_features & feature); |
| 1862 | int err; |
| 1863 | |
| 1864 | if (!(changes & feature)) |
| 1865 | return 0; |
| 1866 | |
| 1867 | err = feature_handler(dev, enable); |
| 1868 | if (err) { |
| 1869 | netdev_err(dev, "%s feature %pNF failed, err %d\n", |
| 1870 | enable ? "Enable" : "Disable", &feature, err); |
| 1871 | return err; |
| 1872 | } |
| 1873 | |
| 1874 | if (enable) |
| 1875 | dev->features |= feature; |
| 1876 | else |
| 1877 | dev->features &= ~feature; |
| 1878 | |
| 1879 | return 0; |
| 1880 | } |
| 1881 | static int mlxsw_sp_set_features(struct net_device *dev, |
| 1882 | netdev_features_t features) |
| 1883 | { |
| 1884 | return mlxsw_sp_handle_feature(dev, features, NETIF_F_HW_TC, |
| 1885 | mlxsw_sp_feature_hw_tc); |
| 1886 | } |
| 1887 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1888 | static const struct net_device_ops mlxsw_sp_port_netdev_ops = { |
| 1889 | .ndo_open = mlxsw_sp_port_open, |
| 1890 | .ndo_stop = mlxsw_sp_port_stop, |
| 1891 | .ndo_start_xmit = mlxsw_sp_port_xmit, |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 1892 | .ndo_setup_tc = mlxsw_sp_setup_tc, |
Jiri Pirko | c5b9b51 | 2015-12-03 12:12:22 +0100 | [diff] [blame] | 1893 | .ndo_set_rx_mode = mlxsw_sp_set_rx_mode, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1894 | .ndo_set_mac_address = mlxsw_sp_port_set_mac_address, |
| 1895 | .ndo_change_mtu = mlxsw_sp_port_change_mtu, |
| 1896 | .ndo_get_stats64 = mlxsw_sp_port_get_stats64, |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 1897 | .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats, |
| 1898 | .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1899 | .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid, |
| 1900 | .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid, |
Ido Schimmel | 2bf9a58 | 2016-04-05 10:20:04 +0200 | [diff] [blame] | 1901 | .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name, |
Jiri Pirko | 9454d93 | 2017-12-06 09:41:12 +0100 | [diff] [blame] | 1902 | .ndo_set_features = mlxsw_sp_set_features, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1903 | }; |
| 1904 | |
| 1905 | static void mlxsw_sp_port_get_drvinfo(struct net_device *dev, |
| 1906 | struct ethtool_drvinfo *drvinfo) |
| 1907 | { |
| 1908 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1909 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 1910 | |
| 1911 | strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver)); |
| 1912 | strlcpy(drvinfo->version, mlxsw_sp_driver_version, |
| 1913 | sizeof(drvinfo->version)); |
| 1914 | snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), |
| 1915 | "%d.%d.%d", |
| 1916 | mlxsw_sp->bus_info->fw_rev.major, |
| 1917 | mlxsw_sp->bus_info->fw_rev.minor, |
| 1918 | mlxsw_sp->bus_info->fw_rev.subminor); |
| 1919 | strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name, |
| 1920 | sizeof(drvinfo->bus_info)); |
| 1921 | } |
| 1922 | |
Ido Schimmel | 9f7ec05 | 2016-04-06 17:10:14 +0200 | [diff] [blame] | 1923 | static void mlxsw_sp_port_get_pauseparam(struct net_device *dev, |
| 1924 | struct ethtool_pauseparam *pause) |
| 1925 | { |
| 1926 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1927 | |
| 1928 | pause->rx_pause = mlxsw_sp_port->link.rx_pause; |
| 1929 | pause->tx_pause = mlxsw_sp_port->link.tx_pause; |
| 1930 | } |
| 1931 | |
| 1932 | static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 1933 | struct ethtool_pauseparam *pause) |
| 1934 | { |
| 1935 | char pfcc_pl[MLXSW_REG_PFCC_LEN]; |
| 1936 | |
| 1937 | mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port); |
| 1938 | mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause); |
| 1939 | mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause); |
| 1940 | |
| 1941 | return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc), |
| 1942 | pfcc_pl); |
| 1943 | } |
| 1944 | |
| 1945 | static int mlxsw_sp_port_set_pauseparam(struct net_device *dev, |
| 1946 | struct ethtool_pauseparam *pause) |
| 1947 | { |
| 1948 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 1949 | bool pause_en = pause->tx_pause || pause->rx_pause; |
| 1950 | int err; |
| 1951 | |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 1952 | if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) { |
| 1953 | netdev_err(dev, "PFC already enabled on port\n"); |
| 1954 | return -EINVAL; |
| 1955 | } |
| 1956 | |
Ido Schimmel | 9f7ec05 | 2016-04-06 17:10:14 +0200 | [diff] [blame] | 1957 | if (pause->autoneg) { |
| 1958 | netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n"); |
| 1959 | return -EINVAL; |
| 1960 | } |
| 1961 | |
| 1962 | err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en); |
| 1963 | if (err) { |
| 1964 | netdev_err(dev, "Failed to configure port's headroom\n"); |
| 1965 | return err; |
| 1966 | } |
| 1967 | |
| 1968 | err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause); |
| 1969 | if (err) { |
| 1970 | netdev_err(dev, "Failed to set PAUSE parameters\n"); |
| 1971 | goto err_port_pause_configure; |
| 1972 | } |
| 1973 | |
| 1974 | mlxsw_sp_port->link.rx_pause = pause->rx_pause; |
| 1975 | mlxsw_sp_port->link.tx_pause = pause->tx_pause; |
| 1976 | |
| 1977 | return 0; |
| 1978 | |
| 1979 | err_port_pause_configure: |
| 1980 | pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port); |
| 1981 | mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en); |
| 1982 | return err; |
| 1983 | } |
| 1984 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1985 | struct mlxsw_sp_port_hw_stats { |
| 1986 | char str[ETH_GSTRING_LEN]; |
Jiri Pirko | 412791d | 2016-10-21 16:07:19 +0200 | [diff] [blame] | 1987 | u64 (*getter)(const char *payload); |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 1988 | bool cells_bytes; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1989 | }; |
| 1990 | |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 1991 | static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 1992 | { |
| 1993 | .str = "a_frames_transmitted_ok", |
| 1994 | .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get, |
| 1995 | }, |
| 1996 | { |
| 1997 | .str = "a_frames_received_ok", |
| 1998 | .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get, |
| 1999 | }, |
| 2000 | { |
| 2001 | .str = "a_frame_check_sequence_errors", |
| 2002 | .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get, |
| 2003 | }, |
| 2004 | { |
| 2005 | .str = "a_alignment_errors", |
| 2006 | .getter = mlxsw_reg_ppcnt_a_alignment_errors_get, |
| 2007 | }, |
| 2008 | { |
| 2009 | .str = "a_octets_transmitted_ok", |
| 2010 | .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get, |
| 2011 | }, |
| 2012 | { |
| 2013 | .str = "a_octets_received_ok", |
| 2014 | .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get, |
| 2015 | }, |
| 2016 | { |
| 2017 | .str = "a_multicast_frames_xmitted_ok", |
| 2018 | .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get, |
| 2019 | }, |
| 2020 | { |
| 2021 | .str = "a_broadcast_frames_xmitted_ok", |
| 2022 | .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get, |
| 2023 | }, |
| 2024 | { |
| 2025 | .str = "a_multicast_frames_received_ok", |
| 2026 | .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get, |
| 2027 | }, |
| 2028 | { |
| 2029 | .str = "a_broadcast_frames_received_ok", |
| 2030 | .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get, |
| 2031 | }, |
| 2032 | { |
| 2033 | .str = "a_in_range_length_errors", |
| 2034 | .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get, |
| 2035 | }, |
| 2036 | { |
| 2037 | .str = "a_out_of_range_length_field", |
| 2038 | .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get, |
| 2039 | }, |
| 2040 | { |
| 2041 | .str = "a_frame_too_long_errors", |
| 2042 | .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get, |
| 2043 | }, |
| 2044 | { |
| 2045 | .str = "a_symbol_error_during_carrier", |
| 2046 | .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get, |
| 2047 | }, |
| 2048 | { |
| 2049 | .str = "a_mac_control_frames_transmitted", |
| 2050 | .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get, |
| 2051 | }, |
| 2052 | { |
| 2053 | .str = "a_mac_control_frames_received", |
| 2054 | .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get, |
| 2055 | }, |
| 2056 | { |
| 2057 | .str = "a_unsupported_opcodes_received", |
| 2058 | .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get, |
| 2059 | }, |
| 2060 | { |
| 2061 | .str = "a_pause_mac_ctrl_frames_received", |
| 2062 | .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get, |
| 2063 | }, |
| 2064 | { |
| 2065 | .str = "a_pause_mac_ctrl_frames_xmitted", |
| 2066 | .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get, |
| 2067 | }, |
| 2068 | }; |
| 2069 | |
| 2070 | #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats) |
| 2071 | |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2072 | static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = { |
| 2073 | { |
| 2074 | .str = "rx_octets_prio", |
| 2075 | .getter = mlxsw_reg_ppcnt_rx_octets_get, |
| 2076 | }, |
| 2077 | { |
| 2078 | .str = "rx_frames_prio", |
| 2079 | .getter = mlxsw_reg_ppcnt_rx_frames_get, |
| 2080 | }, |
| 2081 | { |
| 2082 | .str = "tx_octets_prio", |
| 2083 | .getter = mlxsw_reg_ppcnt_tx_octets_get, |
| 2084 | }, |
| 2085 | { |
| 2086 | .str = "tx_frames_prio", |
| 2087 | .getter = mlxsw_reg_ppcnt_tx_frames_get, |
| 2088 | }, |
| 2089 | { |
| 2090 | .str = "rx_pause_prio", |
| 2091 | .getter = mlxsw_reg_ppcnt_rx_pause_get, |
| 2092 | }, |
| 2093 | { |
| 2094 | .str = "rx_pause_duration_prio", |
| 2095 | .getter = mlxsw_reg_ppcnt_rx_pause_duration_get, |
| 2096 | }, |
| 2097 | { |
| 2098 | .str = "tx_pause_prio", |
| 2099 | .getter = mlxsw_reg_ppcnt_tx_pause_get, |
| 2100 | }, |
| 2101 | { |
| 2102 | .str = "tx_pause_duration_prio", |
| 2103 | .getter = mlxsw_reg_ppcnt_tx_pause_duration_get, |
| 2104 | }, |
| 2105 | }; |
| 2106 | |
| 2107 | #define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats) |
| 2108 | |
Ido Schimmel | df4750e | 2016-07-19 15:35:54 +0200 | [diff] [blame] | 2109 | static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = { |
| 2110 | { |
| 2111 | .str = "tc_transmit_queue_tc", |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 2112 | .getter = mlxsw_reg_ppcnt_tc_transmit_queue_get, |
| 2113 | .cells_bytes = true, |
Ido Schimmel | df4750e | 2016-07-19 15:35:54 +0200 | [diff] [blame] | 2114 | }, |
| 2115 | { |
| 2116 | .str = "tc_no_buffer_discard_uc_tc", |
| 2117 | .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get, |
| 2118 | }, |
| 2119 | }; |
| 2120 | |
| 2121 | #define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats) |
| 2122 | |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2123 | #define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \ |
Ido Schimmel | df4750e | 2016-07-19 15:35:54 +0200 | [diff] [blame] | 2124 | (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \ |
| 2125 | MLXSW_SP_PORT_HW_TC_STATS_LEN) * \ |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2126 | IEEE_8021QAZ_MAX_TCS) |
| 2127 | |
| 2128 | static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio) |
| 2129 | { |
| 2130 | int i; |
| 2131 | |
| 2132 | for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) { |
| 2133 | snprintf(*p, ETH_GSTRING_LEN, "%s_%d", |
| 2134 | mlxsw_sp_port_hw_prio_stats[i].str, prio); |
| 2135 | *p += ETH_GSTRING_LEN; |
| 2136 | } |
| 2137 | } |
| 2138 | |
Ido Schimmel | df4750e | 2016-07-19 15:35:54 +0200 | [diff] [blame] | 2139 | static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc) |
| 2140 | { |
| 2141 | int i; |
| 2142 | |
| 2143 | for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) { |
| 2144 | snprintf(*p, ETH_GSTRING_LEN, "%s_%d", |
| 2145 | mlxsw_sp_port_hw_tc_stats[i].str, tc); |
| 2146 | *p += ETH_GSTRING_LEN; |
| 2147 | } |
| 2148 | } |
| 2149 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2150 | static void mlxsw_sp_port_get_strings(struct net_device *dev, |
| 2151 | u32 stringset, u8 *data) |
| 2152 | { |
| 2153 | u8 *p = data; |
| 2154 | int i; |
| 2155 | |
| 2156 | switch (stringset) { |
| 2157 | case ETH_SS_STATS: |
| 2158 | for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) { |
| 2159 | memcpy(p, mlxsw_sp_port_hw_stats[i].str, |
| 2160 | ETH_GSTRING_LEN); |
| 2161 | p += ETH_GSTRING_LEN; |
| 2162 | } |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2163 | |
| 2164 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) |
| 2165 | mlxsw_sp_port_get_prio_strings(&p, i); |
| 2166 | |
Ido Schimmel | df4750e | 2016-07-19 15:35:54 +0200 | [diff] [blame] | 2167 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) |
| 2168 | mlxsw_sp_port_get_tc_strings(&p, i); |
| 2169 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2170 | break; |
| 2171 | } |
| 2172 | } |
| 2173 | |
Ido Schimmel | 3a66ee3 | 2015-11-27 13:45:55 +0100 | [diff] [blame] | 2174 | static int mlxsw_sp_port_set_phys_id(struct net_device *dev, |
| 2175 | enum ethtool_phys_id_state state) |
| 2176 | { |
| 2177 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 2178 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 2179 | char mlcr_pl[MLXSW_REG_MLCR_LEN]; |
| 2180 | bool active; |
| 2181 | |
| 2182 | switch (state) { |
| 2183 | case ETHTOOL_ID_ACTIVE: |
| 2184 | active = true; |
| 2185 | break; |
| 2186 | case ETHTOOL_ID_INACTIVE: |
| 2187 | active = false; |
| 2188 | break; |
| 2189 | default: |
| 2190 | return -EOPNOTSUPP; |
| 2191 | } |
| 2192 | |
| 2193 | mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active); |
| 2194 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl); |
| 2195 | } |
| 2196 | |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2197 | static int |
| 2198 | mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats, |
| 2199 | int *p_len, enum mlxsw_reg_ppcnt_grp grp) |
| 2200 | { |
| 2201 | switch (grp) { |
| 2202 | case MLXSW_REG_PPCNT_IEEE_8023_CNT: |
| 2203 | *p_hw_stats = mlxsw_sp_port_hw_stats; |
| 2204 | *p_len = MLXSW_SP_PORT_HW_STATS_LEN; |
| 2205 | break; |
| 2206 | case MLXSW_REG_PPCNT_PRIO_CNT: |
| 2207 | *p_hw_stats = mlxsw_sp_port_hw_prio_stats; |
| 2208 | *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN; |
| 2209 | break; |
Ido Schimmel | df4750e | 2016-07-19 15:35:54 +0200 | [diff] [blame] | 2210 | case MLXSW_REG_PPCNT_TC_CNT: |
| 2211 | *p_hw_stats = mlxsw_sp_port_hw_tc_stats; |
| 2212 | *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN; |
| 2213 | break; |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2214 | default: |
| 2215 | WARN_ON(1); |
Yotam Gigi | e915ac6 | 2017-01-09 11:25:48 +0100 | [diff] [blame] | 2216 | return -EOPNOTSUPP; |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2217 | } |
| 2218 | return 0; |
| 2219 | } |
| 2220 | |
| 2221 | static void __mlxsw_sp_port_get_stats(struct net_device *dev, |
| 2222 | enum mlxsw_reg_ppcnt_grp grp, int prio, |
| 2223 | u64 *data, int data_index) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2224 | { |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 2225 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 2226 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2227 | struct mlxsw_sp_port_hw_stats *hw_stats; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2228 | char ppcnt_pl[MLXSW_REG_PPCNT_LEN]; |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2229 | int i, len; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2230 | int err; |
| 2231 | |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2232 | err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp); |
| 2233 | if (err) |
| 2234 | return; |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 2235 | mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl); |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 2236 | for (i = 0; i < len; i++) { |
Colin Ian King | faac0ff | 2016-09-23 12:02:45 +0100 | [diff] [blame] | 2237 | data[data_index + i] = hw_stats[i].getter(ppcnt_pl); |
Ido Schimmel | 18281f2 | 2017-03-24 08:02:51 +0100 | [diff] [blame] | 2238 | if (!hw_stats[i].cells_bytes) |
| 2239 | continue; |
| 2240 | data[data_index + i] = mlxsw_sp_cells_bytes(mlxsw_sp, |
| 2241 | data[data_index + i]); |
| 2242 | } |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2243 | } |
| 2244 | |
| 2245 | static void mlxsw_sp_port_get_stats(struct net_device *dev, |
| 2246 | struct ethtool_stats *stats, u64 *data) |
| 2247 | { |
| 2248 | int i, data_index = 0; |
| 2249 | |
| 2250 | /* IEEE 802.3 Counters */ |
| 2251 | __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0, |
| 2252 | data, data_index); |
| 2253 | data_index = MLXSW_SP_PORT_HW_STATS_LEN; |
| 2254 | |
| 2255 | /* Per-Priority Counters */ |
| 2256 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 2257 | __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i, |
| 2258 | data, data_index); |
| 2259 | data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN; |
| 2260 | } |
Ido Schimmel | df4750e | 2016-07-19 15:35:54 +0200 | [diff] [blame] | 2261 | |
| 2262 | /* Per-TC Counters */ |
| 2263 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 2264 | __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i, |
| 2265 | data, data_index); |
| 2266 | data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN; |
| 2267 | } |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2268 | } |
| 2269 | |
| 2270 | static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset) |
| 2271 | { |
| 2272 | switch (sset) { |
| 2273 | case ETH_SS_STATS: |
Ido Schimmel | 7ed674b | 2016-07-19 15:35:53 +0200 | [diff] [blame] | 2274 | return MLXSW_SP_PORT_ETHTOOL_STATS_LEN; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2275 | default: |
| 2276 | return -EOPNOTSUPP; |
| 2277 | } |
| 2278 | } |
| 2279 | |
| 2280 | struct mlxsw_sp_port_link_mode { |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2281 | enum ethtool_link_mode_bit_indices mask_ethtool; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2282 | u32 mask; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2283 | u32 speed; |
| 2284 | }; |
| 2285 | |
| 2286 | static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = { |
| 2287 | { |
| 2288 | .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2289 | .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT, |
| 2290 | .speed = SPEED_100, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2291 | }, |
| 2292 | { |
| 2293 | .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII | |
| 2294 | MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2295 | .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, |
| 2296 | .speed = SPEED_1000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2297 | }, |
| 2298 | { |
| 2299 | .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2300 | .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT, |
| 2301 | .speed = SPEED_10000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2302 | }, |
| 2303 | { |
| 2304 | .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 | |
| 2305 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2306 | .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, |
| 2307 | .speed = SPEED_10000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2308 | }, |
| 2309 | { |
| 2310 | .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR | |
| 2311 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR | |
| 2312 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR | |
| 2313 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2314 | .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, |
| 2315 | .speed = SPEED_10000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2316 | }, |
| 2317 | { |
| 2318 | .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2319 | .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT, |
| 2320 | .speed = SPEED_20000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2321 | }, |
| 2322 | { |
| 2323 | .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2324 | .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, |
| 2325 | .speed = SPEED_40000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2326 | }, |
| 2327 | { |
| 2328 | .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2329 | .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, |
| 2330 | .speed = SPEED_40000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2331 | }, |
| 2332 | { |
| 2333 | .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2334 | .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, |
| 2335 | .speed = SPEED_40000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2336 | }, |
| 2337 | { |
| 2338 | .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2339 | .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, |
| 2340 | .speed = SPEED_40000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2341 | }, |
| 2342 | { |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2343 | .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR, |
| 2344 | .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, |
| 2345 | .speed = SPEED_25000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2346 | }, |
| 2347 | { |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2348 | .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR, |
| 2349 | .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, |
| 2350 | .speed = SPEED_25000, |
| 2351 | }, |
| 2352 | { |
| 2353 | .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR, |
| 2354 | .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, |
| 2355 | .speed = SPEED_25000, |
| 2356 | }, |
| 2357 | { |
| 2358 | .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR, |
| 2359 | .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, |
| 2360 | .speed = SPEED_25000, |
| 2361 | }, |
| 2362 | { |
| 2363 | .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2, |
| 2364 | .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, |
| 2365 | .speed = SPEED_50000, |
| 2366 | }, |
| 2367 | { |
| 2368 | .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2, |
| 2369 | .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, |
| 2370 | .speed = SPEED_50000, |
| 2371 | }, |
| 2372 | { |
| 2373 | .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2, |
| 2374 | .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, |
| 2375 | .speed = SPEED_50000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2376 | }, |
| 2377 | { |
| 2378 | .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2379 | .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, |
| 2380 | .speed = SPEED_56000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2381 | }, |
| 2382 | { |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2383 | .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4, |
| 2384 | .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, |
| 2385 | .speed = SPEED_56000, |
| 2386 | }, |
| 2387 | { |
| 2388 | .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4, |
| 2389 | .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, |
| 2390 | .speed = SPEED_56000, |
| 2391 | }, |
| 2392 | { |
| 2393 | .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4, |
| 2394 | .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, |
| 2395 | .speed = SPEED_56000, |
| 2396 | }, |
| 2397 | { |
| 2398 | .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4, |
| 2399 | .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, |
| 2400 | .speed = SPEED_100000, |
| 2401 | }, |
| 2402 | { |
| 2403 | .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4, |
| 2404 | .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, |
| 2405 | .speed = SPEED_100000, |
| 2406 | }, |
| 2407 | { |
| 2408 | .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4, |
| 2409 | .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, |
| 2410 | .speed = SPEED_100000, |
| 2411 | }, |
| 2412 | { |
| 2413 | .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4, |
| 2414 | .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, |
| 2415 | .speed = SPEED_100000, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2416 | }, |
| 2417 | }; |
| 2418 | |
| 2419 | #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode) |
| 2420 | |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2421 | static void |
| 2422 | mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto, |
| 2423 | struct ethtool_link_ksettings *cmd) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2424 | { |
| 2425 | if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR | |
| 2426 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR | |
| 2427 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 | |
| 2428 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 | |
| 2429 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 | |
| 2430 | MLXSW_REG_PTYS_ETH_SPEED_SGMII)) |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2431 | ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2432 | |
| 2433 | if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR | |
| 2434 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 | |
| 2435 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 | |
| 2436 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 | |
| 2437 | MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX)) |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2438 | ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2439 | } |
| 2440 | |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2441 | static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2442 | { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2443 | int i; |
| 2444 | |
| 2445 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { |
| 2446 | if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2447 | __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool, |
| 2448 | mode); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2449 | } |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2450 | } |
| 2451 | |
| 2452 | static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2453 | struct ethtool_link_ksettings *cmd) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2454 | { |
| 2455 | u32 speed = SPEED_UNKNOWN; |
| 2456 | u8 duplex = DUPLEX_UNKNOWN; |
| 2457 | int i; |
| 2458 | |
| 2459 | if (!carrier_ok) |
| 2460 | goto out; |
| 2461 | |
| 2462 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { |
| 2463 | if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) { |
| 2464 | speed = mlxsw_sp_port_link_mode[i].speed; |
| 2465 | duplex = DUPLEX_FULL; |
| 2466 | break; |
| 2467 | } |
| 2468 | } |
| 2469 | out: |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2470 | cmd->base.speed = speed; |
| 2471 | cmd->base.duplex = duplex; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2472 | } |
| 2473 | |
| 2474 | static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto) |
| 2475 | { |
| 2476 | if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR | |
| 2477 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 | |
| 2478 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 | |
| 2479 | MLXSW_REG_PTYS_ETH_SPEED_SGMII)) |
| 2480 | return PORT_FIBRE; |
| 2481 | |
| 2482 | if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR | |
| 2483 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 | |
| 2484 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4)) |
| 2485 | return PORT_DA; |
| 2486 | |
| 2487 | if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR | |
| 2488 | MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 | |
| 2489 | MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 | |
| 2490 | MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4)) |
| 2491 | return PORT_NONE; |
| 2492 | |
| 2493 | return PORT_OTHER; |
| 2494 | } |
| 2495 | |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2496 | static u32 |
| 2497 | mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2498 | { |
| 2499 | u32 ptys_proto = 0; |
| 2500 | int i; |
| 2501 | |
| 2502 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2503 | if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool, |
| 2504 | cmd->link_modes.advertising)) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2505 | ptys_proto |= mlxsw_sp_port_link_mode[i].mask; |
| 2506 | } |
| 2507 | return ptys_proto; |
| 2508 | } |
| 2509 | |
| 2510 | static u32 mlxsw_sp_to_ptys_speed(u32 speed) |
| 2511 | { |
| 2512 | u32 ptys_proto = 0; |
| 2513 | int i; |
| 2514 | |
| 2515 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { |
| 2516 | if (speed == mlxsw_sp_port_link_mode[i].speed) |
| 2517 | ptys_proto |= mlxsw_sp_port_link_mode[i].mask; |
| 2518 | } |
| 2519 | return ptys_proto; |
| 2520 | } |
| 2521 | |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 2522 | static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed) |
| 2523 | { |
| 2524 | u32 ptys_proto = 0; |
| 2525 | int i; |
| 2526 | |
| 2527 | for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { |
| 2528 | if (mlxsw_sp_port_link_mode[i].speed <= upper_speed) |
| 2529 | ptys_proto |= mlxsw_sp_port_link_mode[i].mask; |
| 2530 | } |
| 2531 | return ptys_proto; |
| 2532 | } |
| 2533 | |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2534 | static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap, |
| 2535 | struct ethtool_link_ksettings *cmd) |
| 2536 | { |
| 2537 | ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause); |
| 2538 | ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); |
| 2539 | ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); |
| 2540 | |
| 2541 | mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd); |
| 2542 | mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported); |
| 2543 | } |
| 2544 | |
| 2545 | static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg, |
| 2546 | struct ethtool_link_ksettings *cmd) |
| 2547 | { |
| 2548 | if (!autoneg) |
| 2549 | return; |
| 2550 | |
| 2551 | ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); |
| 2552 | mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising); |
| 2553 | } |
| 2554 | |
| 2555 | static void |
| 2556 | mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status, |
| 2557 | struct ethtool_link_ksettings *cmd) |
| 2558 | { |
| 2559 | if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp) |
| 2560 | return; |
| 2561 | |
| 2562 | ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg); |
| 2563 | mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising); |
| 2564 | } |
| 2565 | |
| 2566 | static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev, |
| 2567 | struct ethtool_link_ksettings *cmd) |
| 2568 | { |
| 2569 | u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp; |
| 2570 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 2571 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 2572 | char ptys_pl[MLXSW_REG_PTYS_LEN]; |
| 2573 | u8 autoneg_status; |
| 2574 | bool autoneg; |
| 2575 | int err; |
| 2576 | |
| 2577 | autoneg = mlxsw_sp_port->link.autoneg; |
Elad Raz | 401c8b4 | 2016-10-28 21:35:52 +0200 | [diff] [blame] | 2578 | mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0); |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2579 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); |
| 2580 | if (err) |
| 2581 | return err; |
Elad Raz | 401c8b4 | 2016-10-28 21:35:52 +0200 | [diff] [blame] | 2582 | mlxsw_reg_ptys_eth_unpack(ptys_pl, ð_proto_cap, ð_proto_admin, |
| 2583 | ð_proto_oper); |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2584 | |
| 2585 | mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd); |
| 2586 | |
| 2587 | mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd); |
| 2588 | |
| 2589 | eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl); |
| 2590 | autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl); |
| 2591 | mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd); |
| 2592 | |
| 2593 | cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE; |
| 2594 | cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper); |
| 2595 | mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper, |
| 2596 | cmd); |
| 2597 | |
| 2598 | return 0; |
| 2599 | } |
| 2600 | |
| 2601 | static int |
| 2602 | mlxsw_sp_port_set_link_ksettings(struct net_device *dev, |
| 2603 | const struct ethtool_link_ksettings *cmd) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2604 | { |
| 2605 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 2606 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 2607 | char ptys_pl[MLXSW_REG_PTYS_LEN]; |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2608 | u32 eth_proto_cap, eth_proto_new; |
Ido Schimmel | 0c83f88 | 2016-09-12 13:26:23 +0200 | [diff] [blame] | 2609 | bool autoneg; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2610 | int err; |
| 2611 | |
Elad Raz | 401c8b4 | 2016-10-28 21:35:52 +0200 | [diff] [blame] | 2612 | mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2613 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2614 | if (err) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2615 | return err; |
Elad Raz | 401c8b4 | 2016-10-28 21:35:52 +0200 | [diff] [blame] | 2616 | mlxsw_reg_ptys_eth_unpack(ptys_pl, ð_proto_cap, NULL, NULL); |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2617 | |
| 2618 | autoneg = cmd->base.autoneg == AUTONEG_ENABLE; |
| 2619 | eth_proto_new = autoneg ? |
| 2620 | mlxsw_sp_to_ptys_advert_link(cmd) : |
| 2621 | mlxsw_sp_to_ptys_speed(cmd->base.speed); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2622 | |
| 2623 | eth_proto_new = eth_proto_new & eth_proto_cap; |
| 2624 | if (!eth_proto_new) { |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2625 | netdev_err(dev, "No supported speed requested\n"); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2626 | return -EINVAL; |
| 2627 | } |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2628 | |
Elad Raz | 401c8b4 | 2016-10-28 21:35:52 +0200 | [diff] [blame] | 2629 | mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, |
| 2630 | eth_proto_new); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2631 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2632 | if (err) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2633 | return err; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2634 | |
Ido Schimmel | 6277d46 | 2016-07-15 11:14:58 +0200 | [diff] [blame] | 2635 | if (!netif_running(dev)) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2636 | return 0; |
| 2637 | |
Ido Schimmel | 0c83f88 | 2016-09-12 13:26:23 +0200 | [diff] [blame] | 2638 | mlxsw_sp_port->link.autoneg = autoneg; |
| 2639 | |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2640 | mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false); |
| 2641 | mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2642 | |
| 2643 | return 0; |
| 2644 | } |
| 2645 | |
Yotam Gigi | ce6ef68f | 2017-06-01 16:26:46 +0300 | [diff] [blame] | 2646 | static int mlxsw_sp_flash_device(struct net_device *dev, |
| 2647 | struct ethtool_flash *flash) |
| 2648 | { |
| 2649 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 2650 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 2651 | const struct firmware *firmware; |
| 2652 | int err; |
| 2653 | |
| 2654 | if (flash->region != ETHTOOL_FLASH_ALL_REGIONS) |
| 2655 | return -EOPNOTSUPP; |
| 2656 | |
| 2657 | dev_hold(dev); |
| 2658 | rtnl_unlock(); |
| 2659 | |
| 2660 | err = request_firmware_direct(&firmware, flash->data, &dev->dev); |
| 2661 | if (err) |
| 2662 | goto out; |
| 2663 | err = mlxsw_sp_firmware_flash(mlxsw_sp, firmware); |
| 2664 | release_firmware(firmware); |
| 2665 | out: |
| 2666 | rtnl_lock(); |
| 2667 | dev_put(dev); |
| 2668 | return err; |
| 2669 | } |
| 2670 | |
Arkadi Sharshevsky | 4400081 | 2017-09-11 09:42:26 +0200 | [diff] [blame] | 2671 | #define MLXSW_SP_I2C_ADDR_LOW 0x50 |
| 2672 | #define MLXSW_SP_I2C_ADDR_HIGH 0x51 |
| 2673 | #define MLXSW_SP_EEPROM_PAGE_LENGTH 256 |
Arkadi Sharshevsky | 2ea1090 | 2017-06-14 09:27:40 +0200 | [diff] [blame] | 2674 | |
| 2675 | static int mlxsw_sp_query_module_eeprom(struct mlxsw_sp_port *mlxsw_sp_port, |
| 2676 | u16 offset, u16 size, void *data, |
| 2677 | unsigned int *p_read_size) |
| 2678 | { |
| 2679 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 2680 | char eeprom_tmp[MLXSW_SP_REG_MCIA_EEPROM_SIZE]; |
| 2681 | char mcia_pl[MLXSW_REG_MCIA_LEN]; |
Arkadi Sharshevsky | 4400081 | 2017-09-11 09:42:26 +0200 | [diff] [blame] | 2682 | u16 i2c_addr; |
Arkadi Sharshevsky | 2ea1090 | 2017-06-14 09:27:40 +0200 | [diff] [blame] | 2683 | int status; |
| 2684 | int err; |
| 2685 | |
| 2686 | size = min_t(u16, size, MLXSW_SP_REG_MCIA_EEPROM_SIZE); |
Arkadi Sharshevsky | 4400081 | 2017-09-11 09:42:26 +0200 | [diff] [blame] | 2687 | |
| 2688 | if (offset < MLXSW_SP_EEPROM_PAGE_LENGTH && |
| 2689 | offset + size > MLXSW_SP_EEPROM_PAGE_LENGTH) |
| 2690 | /* Cross pages read, read until offset 256 in low page */ |
| 2691 | size = MLXSW_SP_EEPROM_PAGE_LENGTH - offset; |
| 2692 | |
| 2693 | i2c_addr = MLXSW_SP_I2C_ADDR_LOW; |
| 2694 | if (offset >= MLXSW_SP_EEPROM_PAGE_LENGTH) { |
| 2695 | i2c_addr = MLXSW_SP_I2C_ADDR_HIGH; |
| 2696 | offset -= MLXSW_SP_EEPROM_PAGE_LENGTH; |
| 2697 | } |
| 2698 | |
Arkadi Sharshevsky | 2ea1090 | 2017-06-14 09:27:40 +0200 | [diff] [blame] | 2699 | mlxsw_reg_mcia_pack(mcia_pl, mlxsw_sp_port->mapping.module, |
Arkadi Sharshevsky | 4400081 | 2017-09-11 09:42:26 +0200 | [diff] [blame] | 2700 | 0, 0, offset, size, i2c_addr); |
Arkadi Sharshevsky | 2ea1090 | 2017-06-14 09:27:40 +0200 | [diff] [blame] | 2701 | |
| 2702 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcia), mcia_pl); |
| 2703 | if (err) |
| 2704 | return err; |
| 2705 | |
| 2706 | status = mlxsw_reg_mcia_status_get(mcia_pl); |
| 2707 | if (status) |
| 2708 | return -EIO; |
| 2709 | |
| 2710 | mlxsw_reg_mcia_eeprom_memcpy_from(mcia_pl, eeprom_tmp); |
| 2711 | memcpy(data, eeprom_tmp, size); |
| 2712 | *p_read_size = size; |
| 2713 | |
| 2714 | return 0; |
| 2715 | } |
| 2716 | |
| 2717 | enum mlxsw_sp_eeprom_module_info_rev_id { |
| 2718 | MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_UNSPC = 0x00, |
| 2719 | MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_8436 = 0x01, |
| 2720 | MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_8636 = 0x03, |
| 2721 | }; |
| 2722 | |
| 2723 | enum mlxsw_sp_eeprom_module_info_id { |
| 2724 | MLXSW_SP_EEPROM_MODULE_INFO_ID_SFP = 0x03, |
| 2725 | MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP = 0x0C, |
| 2726 | MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP_PLUS = 0x0D, |
| 2727 | MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP28 = 0x11, |
| 2728 | }; |
| 2729 | |
| 2730 | enum mlxsw_sp_eeprom_module_info { |
| 2731 | MLXSW_SP_EEPROM_MODULE_INFO_ID, |
| 2732 | MLXSW_SP_EEPROM_MODULE_INFO_REV_ID, |
| 2733 | MLXSW_SP_EEPROM_MODULE_INFO_SIZE, |
| 2734 | }; |
| 2735 | |
| 2736 | static int mlxsw_sp_get_module_info(struct net_device *netdev, |
| 2737 | struct ethtool_modinfo *modinfo) |
| 2738 | { |
| 2739 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(netdev); |
| 2740 | u8 module_info[MLXSW_SP_EEPROM_MODULE_INFO_SIZE]; |
| 2741 | u8 module_rev_id, module_id; |
| 2742 | unsigned int read_size; |
| 2743 | int err; |
| 2744 | |
| 2745 | err = mlxsw_sp_query_module_eeprom(mlxsw_sp_port, 0, |
| 2746 | MLXSW_SP_EEPROM_MODULE_INFO_SIZE, |
| 2747 | module_info, &read_size); |
| 2748 | if (err) |
| 2749 | return err; |
| 2750 | |
| 2751 | if (read_size < MLXSW_SP_EEPROM_MODULE_INFO_SIZE) |
| 2752 | return -EIO; |
| 2753 | |
| 2754 | module_rev_id = module_info[MLXSW_SP_EEPROM_MODULE_INFO_REV_ID]; |
| 2755 | module_id = module_info[MLXSW_SP_EEPROM_MODULE_INFO_ID]; |
| 2756 | |
| 2757 | switch (module_id) { |
| 2758 | case MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP: |
| 2759 | modinfo->type = ETH_MODULE_SFF_8436; |
| 2760 | modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; |
| 2761 | break; |
| 2762 | case MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP_PLUS: |
| 2763 | case MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP28: |
| 2764 | if (module_id == MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP28 || |
| 2765 | module_rev_id >= MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_8636) { |
| 2766 | modinfo->type = ETH_MODULE_SFF_8636; |
| 2767 | modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; |
| 2768 | } else { |
| 2769 | modinfo->type = ETH_MODULE_SFF_8436; |
| 2770 | modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; |
| 2771 | } |
| 2772 | break; |
| 2773 | case MLXSW_SP_EEPROM_MODULE_INFO_ID_SFP: |
| 2774 | modinfo->type = ETH_MODULE_SFF_8472; |
| 2775 | modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; |
| 2776 | break; |
| 2777 | default: |
| 2778 | return -EINVAL; |
| 2779 | } |
| 2780 | |
| 2781 | return 0; |
| 2782 | } |
| 2783 | |
| 2784 | static int mlxsw_sp_get_module_eeprom(struct net_device *netdev, |
| 2785 | struct ethtool_eeprom *ee, |
| 2786 | u8 *data) |
| 2787 | { |
| 2788 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(netdev); |
| 2789 | int offset = ee->offset; |
| 2790 | unsigned int read_size; |
| 2791 | int i = 0; |
| 2792 | int err; |
| 2793 | |
| 2794 | if (!ee->len) |
| 2795 | return -EINVAL; |
| 2796 | |
| 2797 | memset(data, 0, ee->len); |
| 2798 | |
| 2799 | while (i < ee->len) { |
| 2800 | err = mlxsw_sp_query_module_eeprom(mlxsw_sp_port, offset, |
| 2801 | ee->len - i, data + i, |
| 2802 | &read_size); |
| 2803 | if (err) { |
| 2804 | netdev_err(mlxsw_sp_port->dev, "Eeprom query failed\n"); |
| 2805 | return err; |
| 2806 | } |
| 2807 | |
| 2808 | i += read_size; |
| 2809 | offset += read_size; |
| 2810 | } |
| 2811 | |
| 2812 | return 0; |
| 2813 | } |
| 2814 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2815 | static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = { |
| 2816 | .get_drvinfo = mlxsw_sp_port_get_drvinfo, |
| 2817 | .get_link = ethtool_op_get_link, |
Ido Schimmel | 9f7ec05 | 2016-04-06 17:10:14 +0200 | [diff] [blame] | 2818 | .get_pauseparam = mlxsw_sp_port_get_pauseparam, |
| 2819 | .set_pauseparam = mlxsw_sp_port_set_pauseparam, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2820 | .get_strings = mlxsw_sp_port_get_strings, |
Ido Schimmel | 3a66ee3 | 2015-11-27 13:45:55 +0100 | [diff] [blame] | 2821 | .set_phys_id = mlxsw_sp_port_set_phys_id, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2822 | .get_ethtool_stats = mlxsw_sp_port_get_stats, |
| 2823 | .get_sset_count = mlxsw_sp_port_get_sset_count, |
Ido Schimmel | b9d66a3 | 2016-09-12 13:26:27 +0200 | [diff] [blame] | 2824 | .get_link_ksettings = mlxsw_sp_port_get_link_ksettings, |
| 2825 | .set_link_ksettings = mlxsw_sp_port_set_link_ksettings, |
Yotam Gigi | ce6ef68f | 2017-06-01 16:26:46 +0300 | [diff] [blame] | 2826 | .flash_device = mlxsw_sp_flash_device, |
Arkadi Sharshevsky | 2ea1090 | 2017-06-14 09:27:40 +0200 | [diff] [blame] | 2827 | .get_module_info = mlxsw_sp_get_module_info, |
| 2828 | .get_module_eeprom = mlxsw_sp_get_module_eeprom, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2829 | }; |
| 2830 | |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 2831 | static int |
| 2832 | mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width) |
| 2833 | { |
| 2834 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 2835 | u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width; |
| 2836 | char ptys_pl[MLXSW_REG_PTYS_LEN]; |
| 2837 | u32 eth_proto_admin; |
| 2838 | |
| 2839 | eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed); |
Elad Raz | 401c8b4 | 2016-10-28 21:35:52 +0200 | [diff] [blame] | 2840 | mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, |
| 2841 | eth_proto_admin); |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 2842 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); |
| 2843 | } |
| 2844 | |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 2845 | int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 2846 | enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index, |
| 2847 | bool dwrr, u8 dwrr_weight) |
Ido Schimmel | 90183b9 | 2016-04-06 17:10:08 +0200 | [diff] [blame] | 2848 | { |
| 2849 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 2850 | char qeec_pl[MLXSW_REG_QEEC_LEN]; |
| 2851 | |
| 2852 | mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index, |
| 2853 | next_index); |
| 2854 | mlxsw_reg_qeec_de_set(qeec_pl, true); |
| 2855 | mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr); |
| 2856 | mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight); |
| 2857 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); |
| 2858 | } |
| 2859 | |
Ido Schimmel | cc7cf51 | 2016-04-06 17:10:11 +0200 | [diff] [blame] | 2860 | int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 2861 | enum mlxsw_reg_qeec_hr hr, u8 index, |
| 2862 | u8 next_index, u32 maxrate) |
Ido Schimmel | 90183b9 | 2016-04-06 17:10:08 +0200 | [diff] [blame] | 2863 | { |
| 2864 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 2865 | char qeec_pl[MLXSW_REG_QEEC_LEN]; |
| 2866 | |
| 2867 | mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index, |
| 2868 | next_index); |
| 2869 | mlxsw_reg_qeec_mase_set(qeec_pl, true); |
| 2870 | mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate); |
| 2871 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); |
| 2872 | } |
| 2873 | |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 2874 | int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 2875 | u8 switch_prio, u8 tclass) |
Ido Schimmel | 90183b9 | 2016-04-06 17:10:08 +0200 | [diff] [blame] | 2876 | { |
| 2877 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 2878 | char qtct_pl[MLXSW_REG_QTCT_LEN]; |
| 2879 | |
| 2880 | mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio, |
| 2881 | tclass); |
| 2882 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl); |
| 2883 | } |
| 2884 | |
| 2885 | static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 2886 | { |
| 2887 | int err, i; |
| 2888 | |
| 2889 | /* Setup the elements hierarcy, so that each TC is linked to |
| 2890 | * one subgroup, which are all member in the same group. |
| 2891 | */ |
| 2892 | err = mlxsw_sp_port_ets_set(mlxsw_sp_port, |
| 2893 | MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false, |
| 2894 | 0); |
| 2895 | if (err) |
| 2896 | return err; |
| 2897 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 2898 | err = mlxsw_sp_port_ets_set(mlxsw_sp_port, |
| 2899 | MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i, |
| 2900 | 0, false, 0); |
| 2901 | if (err) |
| 2902 | return err; |
| 2903 | } |
| 2904 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 2905 | err = mlxsw_sp_port_ets_set(mlxsw_sp_port, |
| 2906 | MLXSW_REG_QEEC_HIERARCY_TC, i, i, |
| 2907 | false, 0); |
| 2908 | if (err) |
| 2909 | return err; |
| 2910 | } |
| 2911 | |
| 2912 | /* Make sure the max shaper is disabled in all hierarcies that |
| 2913 | * support it. |
| 2914 | */ |
| 2915 | err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, |
| 2916 | MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0, |
| 2917 | MLXSW_REG_QEEC_MAS_DIS); |
| 2918 | if (err) |
| 2919 | return err; |
| 2920 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 2921 | err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, |
| 2922 | MLXSW_REG_QEEC_HIERARCY_SUBGROUP, |
| 2923 | i, 0, |
| 2924 | MLXSW_REG_QEEC_MAS_DIS); |
| 2925 | if (err) |
| 2926 | return err; |
| 2927 | } |
| 2928 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 2929 | err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, |
| 2930 | MLXSW_REG_QEEC_HIERARCY_TC, |
| 2931 | i, i, |
| 2932 | MLXSW_REG_QEEC_MAS_DIS); |
| 2933 | if (err) |
| 2934 | return err; |
| 2935 | } |
| 2936 | |
| 2937 | /* Map all priorities to traffic class 0. */ |
| 2938 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 2939 | err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0); |
| 2940 | if (err) |
| 2941 | return err; |
| 2942 | } |
| 2943 | |
| 2944 | return 0; |
| 2945 | } |
| 2946 | |
Ido Schimmel | 5b15385 | 2017-06-08 08:47:44 +0200 | [diff] [blame] | 2947 | static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port, |
| 2948 | bool split, u8 module, u8 width, u8 lane) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2949 | { |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 2950 | struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2951 | struct mlxsw_sp_port *mlxsw_sp_port; |
| 2952 | struct net_device *dev; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2953 | int err; |
| 2954 | |
Ido Schimmel | 5b15385 | 2017-06-08 08:47:44 +0200 | [diff] [blame] | 2955 | err = mlxsw_core_port_init(mlxsw_sp->core, local_port); |
| 2956 | if (err) { |
| 2957 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n", |
| 2958 | local_port); |
| 2959 | return err; |
| 2960 | } |
| 2961 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2962 | dev = alloc_etherdev(sizeof(struct mlxsw_sp_port)); |
Ido Schimmel | 5b15385 | 2017-06-08 08:47:44 +0200 | [diff] [blame] | 2963 | if (!dev) { |
| 2964 | err = -ENOMEM; |
| 2965 | goto err_alloc_etherdev; |
| 2966 | } |
Jiri Pirko | f20a91f | 2016-10-27 15:13:00 +0200 | [diff] [blame] | 2967 | SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2968 | mlxsw_sp_port = netdev_priv(dev); |
| 2969 | mlxsw_sp_port->dev = dev; |
| 2970 | mlxsw_sp_port->mlxsw_sp = mlxsw_sp; |
| 2971 | mlxsw_sp_port->local_port = local_port; |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 2972 | mlxsw_sp_port->pvid = 1; |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 2973 | mlxsw_sp_port->split = split; |
Ido Schimmel | d664b41 | 2016-06-09 09:51:40 +0200 | [diff] [blame] | 2974 | mlxsw_sp_port->mapping.module = module; |
| 2975 | mlxsw_sp_port->mapping.width = width; |
| 2976 | mlxsw_sp_port->mapping.lane = lane; |
Ido Schimmel | 0c83f88 | 2016-09-12 13:26:23 +0200 | [diff] [blame] | 2977 | mlxsw_sp_port->link.autoneg = 1; |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 2978 | INIT_LIST_HEAD(&mlxsw_sp_port->vlans_list); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 2979 | INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2980 | |
| 2981 | mlxsw_sp_port->pcpu_stats = |
| 2982 | netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats); |
| 2983 | if (!mlxsw_sp_port->pcpu_stats) { |
| 2984 | err = -ENOMEM; |
| 2985 | goto err_alloc_stats; |
| 2986 | } |
| 2987 | |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 2988 | mlxsw_sp_port->sample = kzalloc(sizeof(*mlxsw_sp_port->sample), |
| 2989 | GFP_KERNEL); |
| 2990 | if (!mlxsw_sp_port->sample) { |
| 2991 | err = -ENOMEM; |
| 2992 | goto err_alloc_sample; |
| 2993 | } |
| 2994 | |
Nogah Frankel | 9deef43 | 2017-10-26 10:55:32 +0200 | [diff] [blame] | 2995 | INIT_DELAYED_WORK(&mlxsw_sp_port->periodic_hw_stats.update_dw, |
Nogah Frankel | fc1bbb0 | 2016-09-16 15:05:38 +0200 | [diff] [blame] | 2996 | &update_stats_cache); |
| 2997 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 2998 | dev->netdev_ops = &mlxsw_sp_port_netdev_ops; |
| 2999 | dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops; |
| 3000 | |
Ido Schimmel | 2e915e0 | 2017-06-08 08:47:45 +0200 | [diff] [blame] | 3001 | err = mlxsw_sp_port_module_map(mlxsw_sp_port, module, width, lane); |
Ido Schimmel | 5b15385 | 2017-06-08 08:47:44 +0200 | [diff] [blame] | 3002 | if (err) { |
| 3003 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to map module\n", |
| 3004 | mlxsw_sp_port->local_port); |
| 3005 | goto err_port_module_map; |
| 3006 | } |
| 3007 | |
Ido Schimmel | 3247ff2 | 2016-09-08 08:16:02 +0200 | [diff] [blame] | 3008 | err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0); |
| 3009 | if (err) { |
| 3010 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n", |
| 3011 | mlxsw_sp_port->local_port); |
| 3012 | goto err_port_swid_set; |
| 3013 | } |
| 3014 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3015 | err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port); |
| 3016 | if (err) { |
| 3017 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n", |
| 3018 | mlxsw_sp_port->local_port); |
| 3019 | goto err_dev_addr_init; |
| 3020 | } |
| 3021 | |
| 3022 | netif_carrier_off(dev); |
| 3023 | |
| 3024 | dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG | |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 3025 | NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC; |
| 3026 | dev->hw_features |= NETIF_F_HW_TC; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3027 | |
Jarod Wilson | d894be5 | 2016-10-20 13:55:16 -0400 | [diff] [blame] | 3028 | dev->min_mtu = 0; |
| 3029 | dev->max_mtu = ETH_MAX_MTU; |
| 3030 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3031 | /* Each packet needs to have a Tx header (metadata) on top all other |
| 3032 | * headers. |
| 3033 | */ |
Yotam Gigi | feb7d38 | 2016-10-04 09:46:04 +0200 | [diff] [blame] | 3034 | dev->needed_headroom = MLXSW_TXHDR_LEN; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3035 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3036 | err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port); |
| 3037 | if (err) { |
| 3038 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n", |
| 3039 | mlxsw_sp_port->local_port); |
| 3040 | goto err_port_system_port_mapping_set; |
| 3041 | } |
| 3042 | |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3043 | err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width); |
| 3044 | if (err) { |
| 3045 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n", |
| 3046 | mlxsw_sp_port->local_port); |
| 3047 | goto err_port_speed_by_width_set; |
| 3048 | } |
| 3049 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3050 | err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN); |
| 3051 | if (err) { |
| 3052 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n", |
| 3053 | mlxsw_sp_port->local_port); |
| 3054 | goto err_port_mtu_set; |
| 3055 | } |
| 3056 | |
| 3057 | err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false); |
| 3058 | if (err) |
| 3059 | goto err_port_admin_status_set; |
| 3060 | |
| 3061 | err = mlxsw_sp_port_buffers_init(mlxsw_sp_port); |
| 3062 | if (err) { |
| 3063 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n", |
| 3064 | mlxsw_sp_port->local_port); |
| 3065 | goto err_port_buffers_init; |
| 3066 | } |
| 3067 | |
Ido Schimmel | 90183b9 | 2016-04-06 17:10:08 +0200 | [diff] [blame] | 3068 | err = mlxsw_sp_port_ets_init(mlxsw_sp_port); |
| 3069 | if (err) { |
| 3070 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n", |
| 3071 | mlxsw_sp_port->local_port); |
| 3072 | goto err_port_ets_init; |
| 3073 | } |
| 3074 | |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 3075 | /* ETS and buffers must be initialized before DCB. */ |
| 3076 | err = mlxsw_sp_port_dcb_init(mlxsw_sp_port); |
| 3077 | if (err) { |
| 3078 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n", |
| 3079 | mlxsw_sp_port->local_port); |
| 3080 | goto err_port_dcb_init; |
| 3081 | } |
| 3082 | |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3083 | err = mlxsw_sp_port_fids_init(mlxsw_sp_port); |
Ido Schimmel | 45a4a16 | 2017-05-16 19:38:35 +0200 | [diff] [blame] | 3084 | if (err) { |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3085 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize FIDs\n", |
Ido Schimmel | 45a4a16 | 2017-05-16 19:38:35 +0200 | [diff] [blame] | 3086 | mlxsw_sp_port->local_port); |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3087 | goto err_port_fids_init; |
Ido Schimmel | 45a4a16 | 2017-05-16 19:38:35 +0200 | [diff] [blame] | 3088 | } |
| 3089 | |
Nogah Frankel | 371b437 | 2018-01-10 14:59:57 +0100 | [diff] [blame] | 3090 | err = mlxsw_sp_tc_qdisc_init(mlxsw_sp_port); |
| 3091 | if (err) { |
| 3092 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize TC qdiscs\n", |
| 3093 | mlxsw_sp_port->local_port); |
| 3094 | goto err_port_qdiscs_init; |
| 3095 | } |
| 3096 | |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 3097 | mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_get(mlxsw_sp_port, 1); |
| 3098 | if (IS_ERR(mlxsw_sp_port_vlan)) { |
| 3099 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create VID 1\n", |
Ido Schimmel | 0597848 | 2016-08-17 16:39:30 +0200 | [diff] [blame] | 3100 | mlxsw_sp_port->local_port); |
Wei Yongjun | d86fd11 | 2017-11-06 11:11:28 +0000 | [diff] [blame] | 3101 | err = PTR_ERR(mlxsw_sp_port_vlan); |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 3102 | goto err_port_vlan_get; |
Ido Schimmel | 0597848 | 2016-08-17 16:39:30 +0200 | [diff] [blame] | 3103 | } |
| 3104 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3105 | mlxsw_sp_port_switchdev_init(mlxsw_sp_port); |
Ido Schimmel | 2f25844 | 2016-08-17 16:39:31 +0200 | [diff] [blame] | 3106 | mlxsw_sp->ports[local_port] = mlxsw_sp_port; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3107 | err = register_netdev(dev); |
| 3108 | if (err) { |
| 3109 | dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n", |
| 3110 | mlxsw_sp_port->local_port); |
| 3111 | goto err_register_netdev; |
| 3112 | } |
| 3113 | |
Elad Raz | d808c7e | 2016-10-28 21:35:57 +0200 | [diff] [blame] | 3114 | mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port, |
| 3115 | mlxsw_sp_port, dev, mlxsw_sp_port->split, |
| 3116 | module); |
Nogah Frankel | 9deef43 | 2017-10-26 10:55:32 +0200 | [diff] [blame] | 3117 | mlxsw_core_schedule_dw(&mlxsw_sp_port->periodic_hw_stats.update_dw, 0); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3118 | return 0; |
| 3119 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3120 | err_register_netdev: |
Ido Schimmel | 2f25844 | 2016-08-17 16:39:31 +0200 | [diff] [blame] | 3121 | mlxsw_sp->ports[local_port] = NULL; |
Ido Schimmel | 0583272 | 2016-08-17 16:39:35 +0200 | [diff] [blame] | 3122 | mlxsw_sp_port_switchdev_fini(mlxsw_sp_port); |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 3123 | mlxsw_sp_port_vlan_put(mlxsw_sp_port_vlan); |
| 3124 | err_port_vlan_get: |
Nogah Frankel | 371b437 | 2018-01-10 14:59:57 +0100 | [diff] [blame] | 3125 | mlxsw_sp_tc_qdisc_fini(mlxsw_sp_port); |
| 3126 | err_port_qdiscs_init: |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3127 | mlxsw_sp_port_fids_fini(mlxsw_sp_port); |
| 3128 | err_port_fids_init: |
Ido Schimmel | 4de34eb | 2016-08-04 17:36:22 +0300 | [diff] [blame] | 3129 | mlxsw_sp_port_dcb_fini(mlxsw_sp_port); |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 3130 | err_port_dcb_init: |
Ido Schimmel | 90183b9 | 2016-04-06 17:10:08 +0200 | [diff] [blame] | 3131 | err_port_ets_init: |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3132 | err_port_buffers_init: |
| 3133 | err_port_admin_status_set: |
| 3134 | err_port_mtu_set: |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3135 | err_port_speed_by_width_set: |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3136 | err_port_system_port_mapping_set: |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3137 | err_dev_addr_init: |
Ido Schimmel | 3247ff2 | 2016-09-08 08:16:02 +0200 | [diff] [blame] | 3138 | mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT); |
| 3139 | err_port_swid_set: |
Ido Schimmel | 2e915e0 | 2017-06-08 08:47:45 +0200 | [diff] [blame] | 3140 | mlxsw_sp_port_module_unmap(mlxsw_sp_port); |
Ido Schimmel | 5b15385 | 2017-06-08 08:47:44 +0200 | [diff] [blame] | 3141 | err_port_module_map: |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 3142 | kfree(mlxsw_sp_port->sample); |
| 3143 | err_alloc_sample: |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3144 | free_percpu(mlxsw_sp_port->pcpu_stats); |
| 3145 | err_alloc_stats: |
| 3146 | free_netdev(dev); |
Ido Schimmel | 5b15385 | 2017-06-08 08:47:44 +0200 | [diff] [blame] | 3147 | err_alloc_etherdev: |
Jiri Pirko | 67963a3 | 2016-10-28 21:35:55 +0200 | [diff] [blame] | 3148 | mlxsw_core_port_fini(mlxsw_sp->core, local_port); |
| 3149 | return err; |
| 3150 | } |
| 3151 | |
Ido Schimmel | 5b15385 | 2017-06-08 08:47:44 +0200 | [diff] [blame] | 3152 | static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3153 | { |
| 3154 | struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port]; |
| 3155 | |
Nogah Frankel | 9deef43 | 2017-10-26 10:55:32 +0200 | [diff] [blame] | 3156 | cancel_delayed_work_sync(&mlxsw_sp_port->periodic_hw_stats.update_dw); |
Jiri Pirko | 67963a3 | 2016-10-28 21:35:55 +0200 | [diff] [blame] | 3157 | mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3158 | unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */ |
Ido Schimmel | 2f25844 | 2016-08-17 16:39:31 +0200 | [diff] [blame] | 3159 | mlxsw_sp->ports[local_port] = NULL; |
Ido Schimmel | 0583272 | 2016-08-17 16:39:35 +0200 | [diff] [blame] | 3160 | mlxsw_sp_port_switchdev_fini(mlxsw_sp_port); |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 3161 | mlxsw_sp_port_vlan_flush(mlxsw_sp_port); |
Nogah Frankel | 371b437 | 2018-01-10 14:59:57 +0100 | [diff] [blame] | 3162 | mlxsw_sp_tc_qdisc_fini(mlxsw_sp_port); |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3163 | mlxsw_sp_port_fids_fini(mlxsw_sp_port); |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 3164 | mlxsw_sp_port_dcb_fini(mlxsw_sp_port); |
Ido Schimmel | 3e9b27b | 2016-02-26 17:32:28 +0100 | [diff] [blame] | 3165 | mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT); |
Ido Schimmel | 2e915e0 | 2017-06-08 08:47:45 +0200 | [diff] [blame] | 3166 | mlxsw_sp_port_module_unmap(mlxsw_sp_port); |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 3167 | kfree(mlxsw_sp_port->sample); |
Yotam Gigi | 136f144 | 2017-01-09 11:25:47 +0100 | [diff] [blame] | 3168 | free_percpu(mlxsw_sp_port->pcpu_stats); |
Ido Schimmel | 31a08a5 | 2017-05-26 08:37:26 +0200 | [diff] [blame] | 3169 | WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vlans_list)); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3170 | free_netdev(mlxsw_sp_port->dev); |
Jiri Pirko | 67963a3 | 2016-10-28 21:35:55 +0200 | [diff] [blame] | 3171 | mlxsw_core_port_fini(mlxsw_sp->core, local_port); |
| 3172 | } |
| 3173 | |
Jiri Pirko | f83e210 | 2016-10-28 21:35:49 +0200 | [diff] [blame] | 3174 | static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port) |
| 3175 | { |
| 3176 | return mlxsw_sp->ports[local_port] != NULL; |
| 3177 | } |
| 3178 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3179 | static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp) |
| 3180 | { |
| 3181 | int i; |
| 3182 | |
Ido Schimmel | 5ec2ee7 | 2017-03-24 08:02:48 +0100 | [diff] [blame] | 3183 | for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++) |
Jiri Pirko | f83e210 | 2016-10-28 21:35:49 +0200 | [diff] [blame] | 3184 | if (mlxsw_sp_port_created(mlxsw_sp, i)) |
| 3185 | mlxsw_sp_port_remove(mlxsw_sp, i); |
Ido Schimmel | 5ec2ee7 | 2017-03-24 08:02:48 +0100 | [diff] [blame] | 3186 | kfree(mlxsw_sp->port_to_module); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3187 | kfree(mlxsw_sp->ports); |
| 3188 | } |
| 3189 | |
| 3190 | static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp) |
| 3191 | { |
Ido Schimmel | 5ec2ee7 | 2017-03-24 08:02:48 +0100 | [diff] [blame] | 3192 | unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core); |
Ido Schimmel | d664b41 | 2016-06-09 09:51:40 +0200 | [diff] [blame] | 3193 | u8 module, width, lane; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3194 | size_t alloc_size; |
| 3195 | int i; |
| 3196 | int err; |
| 3197 | |
Ido Schimmel | 5ec2ee7 | 2017-03-24 08:02:48 +0100 | [diff] [blame] | 3198 | alloc_size = sizeof(struct mlxsw_sp_port *) * max_ports; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3199 | mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL); |
| 3200 | if (!mlxsw_sp->ports) |
| 3201 | return -ENOMEM; |
| 3202 | |
Ido Schimmel | bf4e9f2 | 2017-11-21 09:42:21 +0100 | [diff] [blame] | 3203 | mlxsw_sp->port_to_module = kmalloc_array(max_ports, sizeof(int), |
| 3204 | GFP_KERNEL); |
Ido Schimmel | 5ec2ee7 | 2017-03-24 08:02:48 +0100 | [diff] [blame] | 3205 | if (!mlxsw_sp->port_to_module) { |
| 3206 | err = -ENOMEM; |
| 3207 | goto err_port_to_module_alloc; |
| 3208 | } |
| 3209 | |
| 3210 | for (i = 1; i < max_ports; i++) { |
Ido Schimmel | bf4e9f2 | 2017-11-21 09:42:21 +0100 | [diff] [blame] | 3211 | /* Mark as invalid */ |
| 3212 | mlxsw_sp->port_to_module[i] = -1; |
| 3213 | |
Ido Schimmel | 558c2d5 | 2016-02-26 17:32:29 +0100 | [diff] [blame] | 3214 | err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module, |
Ido Schimmel | d664b41 | 2016-06-09 09:51:40 +0200 | [diff] [blame] | 3215 | &width, &lane); |
Ido Schimmel | 558c2d5 | 2016-02-26 17:32:29 +0100 | [diff] [blame] | 3216 | if (err) |
| 3217 | goto err_port_module_info_get; |
| 3218 | if (!width) |
| 3219 | continue; |
| 3220 | mlxsw_sp->port_to_module[i] = module; |
Jiri Pirko | 67963a3 | 2016-10-28 21:35:55 +0200 | [diff] [blame] | 3221 | err = mlxsw_sp_port_create(mlxsw_sp, i, false, |
| 3222 | module, width, lane); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3223 | if (err) |
| 3224 | goto err_port_create; |
| 3225 | } |
| 3226 | return 0; |
| 3227 | |
| 3228 | err_port_create: |
Ido Schimmel | 558c2d5 | 2016-02-26 17:32:29 +0100 | [diff] [blame] | 3229 | err_port_module_info_get: |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3230 | for (i--; i >= 1; i--) |
Jiri Pirko | f83e210 | 2016-10-28 21:35:49 +0200 | [diff] [blame] | 3231 | if (mlxsw_sp_port_created(mlxsw_sp, i)) |
| 3232 | mlxsw_sp_port_remove(mlxsw_sp, i); |
Ido Schimmel | 5ec2ee7 | 2017-03-24 08:02:48 +0100 | [diff] [blame] | 3233 | kfree(mlxsw_sp->port_to_module); |
| 3234 | err_port_to_module_alloc: |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3235 | kfree(mlxsw_sp->ports); |
| 3236 | return err; |
| 3237 | } |
| 3238 | |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3239 | static u8 mlxsw_sp_cluster_base_port_get(u8 local_port) |
| 3240 | { |
| 3241 | u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX; |
| 3242 | |
| 3243 | return local_port - offset; |
| 3244 | } |
| 3245 | |
Ido Schimmel | be94535 | 2016-06-09 09:51:39 +0200 | [diff] [blame] | 3246 | static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port, |
| 3247 | u8 module, unsigned int count) |
| 3248 | { |
| 3249 | u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count; |
| 3250 | int err, i; |
| 3251 | |
| 3252 | for (i = 0; i < count; i++) { |
Ido Schimmel | be94535 | 2016-06-09 09:51:39 +0200 | [diff] [blame] | 3253 | err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true, |
Ido Schimmel | d664b41 | 2016-06-09 09:51:40 +0200 | [diff] [blame] | 3254 | module, width, i * width); |
Ido Schimmel | be94535 | 2016-06-09 09:51:39 +0200 | [diff] [blame] | 3255 | if (err) |
| 3256 | goto err_port_create; |
| 3257 | } |
| 3258 | |
| 3259 | return 0; |
| 3260 | |
| 3261 | err_port_create: |
| 3262 | for (i--; i >= 0; i--) |
Jiri Pirko | f83e210 | 2016-10-28 21:35:49 +0200 | [diff] [blame] | 3263 | if (mlxsw_sp_port_created(mlxsw_sp, base_port + i)) |
| 3264 | mlxsw_sp_port_remove(mlxsw_sp, base_port + i); |
Ido Schimmel | be94535 | 2016-06-09 09:51:39 +0200 | [diff] [blame] | 3265 | return err; |
| 3266 | } |
| 3267 | |
| 3268 | static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp, |
| 3269 | u8 base_port, unsigned int count) |
| 3270 | { |
| 3271 | u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH; |
| 3272 | int i; |
| 3273 | |
| 3274 | /* Split by four means we need to re-create two ports, otherwise |
| 3275 | * only one. |
| 3276 | */ |
| 3277 | count = count / 2; |
| 3278 | |
| 3279 | for (i = 0; i < count; i++) { |
| 3280 | local_port = base_port + i * 2; |
Ido Schimmel | bf4e9f2 | 2017-11-21 09:42:21 +0100 | [diff] [blame] | 3281 | if (mlxsw_sp->port_to_module[local_port] < 0) |
| 3282 | continue; |
Ido Schimmel | be94535 | 2016-06-09 09:51:39 +0200 | [diff] [blame] | 3283 | module = mlxsw_sp->port_to_module[local_port]; |
| 3284 | |
Ido Schimmel | be94535 | 2016-06-09 09:51:39 +0200 | [diff] [blame] | 3285 | mlxsw_sp_port_create(mlxsw_sp, local_port, false, module, |
Ido Schimmel | d664b41 | 2016-06-09 09:51:40 +0200 | [diff] [blame] | 3286 | width, 0); |
Ido Schimmel | be94535 | 2016-06-09 09:51:39 +0200 | [diff] [blame] | 3287 | } |
| 3288 | } |
| 3289 | |
Jiri Pirko | b2f1057 | 2016-04-08 19:11:23 +0200 | [diff] [blame] | 3290 | static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port, |
| 3291 | unsigned int count) |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3292 | { |
Jiri Pirko | b2f1057 | 2016-04-08 19:11:23 +0200 | [diff] [blame] | 3293 | struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3294 | struct mlxsw_sp_port *mlxsw_sp_port; |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3295 | u8 module, cur_width, base_port; |
| 3296 | int i; |
| 3297 | int err; |
| 3298 | |
| 3299 | mlxsw_sp_port = mlxsw_sp->ports[local_port]; |
| 3300 | if (!mlxsw_sp_port) { |
| 3301 | dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n", |
| 3302 | local_port); |
| 3303 | return -EINVAL; |
| 3304 | } |
| 3305 | |
Ido Schimmel | d664b41 | 2016-06-09 09:51:40 +0200 | [diff] [blame] | 3306 | module = mlxsw_sp_port->mapping.module; |
| 3307 | cur_width = mlxsw_sp_port->mapping.width; |
| 3308 | |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3309 | if (count != 2 && count != 4) { |
| 3310 | netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n"); |
| 3311 | return -EINVAL; |
| 3312 | } |
| 3313 | |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3314 | if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) { |
| 3315 | netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n"); |
| 3316 | return -EINVAL; |
| 3317 | } |
| 3318 | |
| 3319 | /* Make sure we have enough slave (even) ports for the split. */ |
| 3320 | if (count == 2) { |
| 3321 | base_port = local_port; |
| 3322 | if (mlxsw_sp->ports[base_port + 1]) { |
| 3323 | netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n"); |
| 3324 | return -EINVAL; |
| 3325 | } |
| 3326 | } else { |
| 3327 | base_port = mlxsw_sp_cluster_base_port_get(local_port); |
| 3328 | if (mlxsw_sp->ports[base_port + 1] || |
| 3329 | mlxsw_sp->ports[base_port + 3]) { |
| 3330 | netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n"); |
| 3331 | return -EINVAL; |
| 3332 | } |
| 3333 | } |
| 3334 | |
| 3335 | for (i = 0; i < count; i++) |
Jiri Pirko | f83e210 | 2016-10-28 21:35:49 +0200 | [diff] [blame] | 3336 | if (mlxsw_sp_port_created(mlxsw_sp, base_port + i)) |
| 3337 | mlxsw_sp_port_remove(mlxsw_sp, base_port + i); |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3338 | |
Ido Schimmel | be94535 | 2016-06-09 09:51:39 +0200 | [diff] [blame] | 3339 | err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count); |
| 3340 | if (err) { |
| 3341 | dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n"); |
| 3342 | goto err_port_split_create; |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3343 | } |
| 3344 | |
| 3345 | return 0; |
| 3346 | |
Ido Schimmel | be94535 | 2016-06-09 09:51:39 +0200 | [diff] [blame] | 3347 | err_port_split_create: |
| 3348 | mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count); |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3349 | return err; |
| 3350 | } |
| 3351 | |
Jiri Pirko | b2f1057 | 2016-04-08 19:11:23 +0200 | [diff] [blame] | 3352 | static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port) |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3353 | { |
Jiri Pirko | b2f1057 | 2016-04-08 19:11:23 +0200 | [diff] [blame] | 3354 | struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3355 | struct mlxsw_sp_port *mlxsw_sp_port; |
Ido Schimmel | d664b41 | 2016-06-09 09:51:40 +0200 | [diff] [blame] | 3356 | u8 cur_width, base_port; |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3357 | unsigned int count; |
| 3358 | int i; |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3359 | |
| 3360 | mlxsw_sp_port = mlxsw_sp->ports[local_port]; |
| 3361 | if (!mlxsw_sp_port) { |
| 3362 | dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n", |
| 3363 | local_port); |
| 3364 | return -EINVAL; |
| 3365 | } |
| 3366 | |
| 3367 | if (!mlxsw_sp_port->split) { |
| 3368 | netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n"); |
| 3369 | return -EINVAL; |
| 3370 | } |
| 3371 | |
Ido Schimmel | d664b41 | 2016-06-09 09:51:40 +0200 | [diff] [blame] | 3372 | cur_width = mlxsw_sp_port->mapping.width; |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3373 | count = cur_width == 1 ? 4 : 2; |
| 3374 | |
| 3375 | base_port = mlxsw_sp_cluster_base_port_get(local_port); |
| 3376 | |
| 3377 | /* Determine which ports to remove. */ |
| 3378 | if (count == 2 && local_port >= base_port + 2) |
| 3379 | base_port = base_port + 2; |
| 3380 | |
| 3381 | for (i = 0; i < count; i++) |
Jiri Pirko | f83e210 | 2016-10-28 21:35:49 +0200 | [diff] [blame] | 3382 | if (mlxsw_sp_port_created(mlxsw_sp, base_port + i)) |
| 3383 | mlxsw_sp_port_remove(mlxsw_sp, base_port + i); |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3384 | |
Ido Schimmel | be94535 | 2016-06-09 09:51:39 +0200 | [diff] [blame] | 3385 | mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count); |
Ido Schimmel | 18f1e70 | 2016-02-26 17:32:31 +0100 | [diff] [blame] | 3386 | |
| 3387 | return 0; |
| 3388 | } |
| 3389 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3390 | static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg, |
| 3391 | char *pude_pl, void *priv) |
| 3392 | { |
| 3393 | struct mlxsw_sp *mlxsw_sp = priv; |
| 3394 | struct mlxsw_sp_port *mlxsw_sp_port; |
| 3395 | enum mlxsw_reg_pude_oper_status status; |
| 3396 | u8 local_port; |
| 3397 | |
| 3398 | local_port = mlxsw_reg_pude_local_port_get(pude_pl); |
| 3399 | mlxsw_sp_port = mlxsw_sp->ports[local_port]; |
Ido Schimmel | bbf2a47 | 2016-07-02 11:00:14 +0200 | [diff] [blame] | 3400 | if (!mlxsw_sp_port) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3401 | return; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3402 | |
| 3403 | status = mlxsw_reg_pude_oper_status_get(pude_pl); |
| 3404 | if (status == MLXSW_PORT_OPER_STATUS_UP) { |
| 3405 | netdev_info(mlxsw_sp_port->dev, "link up\n"); |
| 3406 | netif_carrier_on(mlxsw_sp_port->dev); |
| 3407 | } else { |
| 3408 | netdev_info(mlxsw_sp_port->dev, "link down\n"); |
| 3409 | netif_carrier_off(mlxsw_sp_port->dev); |
| 3410 | } |
| 3411 | } |
| 3412 | |
Nogah Frankel | 14eeda9 | 2016-11-25 10:33:32 +0100 | [diff] [blame] | 3413 | static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb, |
| 3414 | u8 local_port, void *priv) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3415 | { |
| 3416 | struct mlxsw_sp *mlxsw_sp = priv; |
| 3417 | struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port]; |
| 3418 | struct mlxsw_sp_port_pcpu_stats *pcpu_stats; |
| 3419 | |
| 3420 | if (unlikely(!mlxsw_sp_port)) { |
| 3421 | dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n", |
| 3422 | local_port); |
| 3423 | return; |
| 3424 | } |
| 3425 | |
| 3426 | skb->dev = mlxsw_sp_port->dev; |
| 3427 | |
| 3428 | pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats); |
| 3429 | u64_stats_update_begin(&pcpu_stats->syncp); |
| 3430 | pcpu_stats->rx_packets++; |
| 3431 | pcpu_stats->rx_bytes += skb->len; |
| 3432 | u64_stats_update_end(&pcpu_stats->syncp); |
| 3433 | |
| 3434 | skb->protocol = eth_type_trans(skb, skb->dev); |
| 3435 | netif_receive_skb(skb); |
| 3436 | } |
| 3437 | |
Ido Schimmel | 1c6c6d2 | 2016-08-25 18:42:40 +0200 | [diff] [blame] | 3438 | static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port, |
| 3439 | void *priv) |
| 3440 | { |
| 3441 | skb->offload_fwd_mark = 1; |
Nogah Frankel | 14eeda9 | 2016-11-25 10:33:32 +0100 | [diff] [blame] | 3442 | return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv); |
Ido Schimmel | 1c6c6d2 | 2016-08-25 18:42:40 +0200 | [diff] [blame] | 3443 | } |
| 3444 | |
Yotam Gigi | a0040c8 | 2017-10-03 09:58:10 +0200 | [diff] [blame] | 3445 | static void mlxsw_sp_rx_listener_mr_mark_func(struct sk_buff *skb, |
| 3446 | u8 local_port, void *priv) |
| 3447 | { |
| 3448 | skb->offload_mr_fwd_mark = 1; |
| 3449 | skb->offload_fwd_mark = 1; |
| 3450 | return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv); |
| 3451 | } |
| 3452 | |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 3453 | static void mlxsw_sp_rx_listener_sample_func(struct sk_buff *skb, u8 local_port, |
| 3454 | void *priv) |
| 3455 | { |
| 3456 | struct mlxsw_sp *mlxsw_sp = priv; |
| 3457 | struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port]; |
| 3458 | struct psample_group *psample_group; |
| 3459 | u32 size; |
| 3460 | |
| 3461 | if (unlikely(!mlxsw_sp_port)) { |
| 3462 | dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received for non-existent port\n", |
| 3463 | local_port); |
| 3464 | goto out; |
| 3465 | } |
| 3466 | if (unlikely(!mlxsw_sp_port->sample)) { |
| 3467 | dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received on unsupported port\n", |
| 3468 | local_port); |
| 3469 | goto out; |
| 3470 | } |
| 3471 | |
| 3472 | size = mlxsw_sp_port->sample->truncate ? |
| 3473 | mlxsw_sp_port->sample->trunc_size : skb->len; |
| 3474 | |
| 3475 | rcu_read_lock(); |
| 3476 | psample_group = rcu_dereference(mlxsw_sp_port->sample->psample_group); |
| 3477 | if (!psample_group) |
| 3478 | goto out_unlock; |
| 3479 | psample_sample_packet(psample_group, skb, size, |
| 3480 | mlxsw_sp_port->dev->ifindex, 0, |
| 3481 | mlxsw_sp_port->sample->rate); |
| 3482 | out_unlock: |
| 3483 | rcu_read_unlock(); |
| 3484 | out: |
| 3485 | consume_skb(skb); |
| 3486 | } |
| 3487 | |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3488 | #define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \ |
Nogah Frankel | 0fb78a4 | 2016-11-25 10:33:39 +0100 | [diff] [blame] | 3489 | MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \ |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3490 | _is_ctrl, SP_##_trap_group, DISCARD) |
Ido Schimmel | 93393b3 | 2016-08-25 18:42:38 +0200 | [diff] [blame] | 3491 | |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3492 | #define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \ |
Nogah Frankel | 14eeda9 | 2016-11-25 10:33:32 +0100 | [diff] [blame] | 3493 | MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \ |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3494 | _is_ctrl, SP_##_trap_group, DISCARD) |
| 3495 | |
Yotam Gigi | a0040c8 | 2017-10-03 09:58:10 +0200 | [diff] [blame] | 3496 | #define MLXSW_SP_RXL_MR_MARK(_trap_id, _action, _trap_group, _is_ctrl) \ |
| 3497 | MLXSW_RXL(mlxsw_sp_rx_listener_mr_mark_func, _trap_id, _action, \ |
| 3498 | _is_ctrl, SP_##_trap_group, DISCARD) |
| 3499 | |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3500 | #define MLXSW_SP_EVENTL(_func, _trap_id) \ |
| 3501 | MLXSW_EVENTL(_func, _trap_id, SP_EVENT) |
Nogah Frankel | 14eeda9 | 2016-11-25 10:33:32 +0100 | [diff] [blame] | 3502 | |
Nogah Frankel | 4544913 | 2016-11-25 10:33:35 +0100 | [diff] [blame] | 3503 | static const struct mlxsw_listener mlxsw_sp_listener[] = { |
| 3504 | /* Events */ |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3505 | MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE), |
Nogah Frankel | ee4a60d | 2016-11-25 10:33:29 +0100 | [diff] [blame] | 3506 | /* L2 traps */ |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3507 | MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true), |
| 3508 | MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true), |
| 3509 | MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true), |
| 3510 | MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false), |
| 3511 | MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false), |
| 3512 | MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false), |
| 3513 | MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false), |
| 3514 | MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false), |
| 3515 | MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false), |
| 3516 | MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false), |
| 3517 | MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false), |
Jiri Pirko | 9d41acc | 2017-04-18 16:55:38 +0200 | [diff] [blame] | 3518 | MLXSW_SP_RXL_NO_MARK(FID_MISS, TRAP_TO_CPU, IP2ME, false), |
Arkadi Sharshevsky | 588823f | 2017-07-17 14:15:31 +0200 | [diff] [blame] | 3519 | MLXSW_SP_RXL_MARK(IPV6_MLDV12_LISTENER_QUERY, MIRROR_TO_CPU, IPV6_MLD, |
| 3520 | false), |
| 3521 | MLXSW_SP_RXL_NO_MARK(IPV6_MLDV1_LISTENER_REPORT, TRAP_TO_CPU, IPV6_MLD, |
| 3522 | false), |
| 3523 | MLXSW_SP_RXL_NO_MARK(IPV6_MLDV1_LISTENER_DONE, TRAP_TO_CPU, IPV6_MLD, |
| 3524 | false), |
| 3525 | MLXSW_SP_RXL_NO_MARK(IPV6_MLDV2_LISTENER_REPORT, TRAP_TO_CPU, IPV6_MLD, |
| 3526 | false), |
Ido Schimmel | 93393b3 | 2016-08-25 18:42:38 +0200 | [diff] [blame] | 3527 | /* L3 traps */ |
Ido Schimmel | 0fcc484 | 2017-07-17 14:15:29 +0200 | [diff] [blame] | 3528 | MLXSW_SP_RXL_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false), |
| 3529 | MLXSW_SP_RXL_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false), |
| 3530 | MLXSW_SP_RXL_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false), |
Ido Schimmel | 0fcc484 | 2017-07-17 14:15:29 +0200 | [diff] [blame] | 3531 | MLXSW_SP_RXL_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false), |
Arkadi Sharshevsky | 8d54814 | 2017-07-18 10:10:11 +0200 | [diff] [blame] | 3532 | MLXSW_SP_RXL_MARK(IPV6_UNSPECIFIED_ADDRESS, TRAP_TO_CPU, ROUTER_EXP, |
| 3533 | false), |
| 3534 | MLXSW_SP_RXL_MARK(IPV6_LINK_LOCAL_DEST, TRAP_TO_CPU, ROUTER_EXP, false), |
| 3535 | MLXSW_SP_RXL_MARK(IPV6_LINK_LOCAL_SRC, TRAP_TO_CPU, ROUTER_EXP, false), |
| 3536 | MLXSW_SP_RXL_MARK(IPV6_ALL_NODES_LINK, TRAP_TO_CPU, ROUTER_EXP, false), |
| 3537 | MLXSW_SP_RXL_MARK(IPV6_ALL_ROUTERS_LINK, TRAP_TO_CPU, ROUTER_EXP, |
| 3538 | false), |
| 3539 | MLXSW_SP_RXL_MARK(IPV4_OSPF, TRAP_TO_CPU, OSPF, false), |
| 3540 | MLXSW_SP_RXL_MARK(IPV6_OSPF, TRAP_TO_CPU, OSPF, false), |
| 3541 | MLXSW_SP_RXL_MARK(IPV6_DHCP, TRAP_TO_CPU, DHCP, false), |
Ido Schimmel | 0fcc484 | 2017-07-17 14:15:29 +0200 | [diff] [blame] | 3542 | MLXSW_SP_RXL_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false), |
Arkadi Sharshevsky | 8d54814 | 2017-07-18 10:10:11 +0200 | [diff] [blame] | 3543 | MLXSW_SP_RXL_MARK(IPV4_BGP, TRAP_TO_CPU, BGP, false), |
| 3544 | MLXSW_SP_RXL_MARK(IPV6_BGP, TRAP_TO_CPU, BGP, false), |
| 3545 | MLXSW_SP_RXL_MARK(L3_IPV6_ROUTER_SOLICITATION, TRAP_TO_CPU, IPV6_ND, |
| 3546 | false), |
| 3547 | MLXSW_SP_RXL_MARK(L3_IPV6_ROUTER_ADVERTISMENT, TRAP_TO_CPU, IPV6_ND, |
| 3548 | false), |
| 3549 | MLXSW_SP_RXL_MARK(L3_IPV6_NEIGHBOR_SOLICITATION, TRAP_TO_CPU, IPV6_ND, |
| 3550 | false), |
| 3551 | MLXSW_SP_RXL_MARK(L3_IPV6_NEIGHBOR_ADVERTISMENT, TRAP_TO_CPU, IPV6_ND, |
| 3552 | false), |
| 3553 | MLXSW_SP_RXL_MARK(L3_IPV6_REDIRECTION, TRAP_TO_CPU, IPV6_ND, false), |
| 3554 | MLXSW_SP_RXL_MARK(IPV6_MC_LINK_LOCAL_DEST, TRAP_TO_CPU, ROUTER_EXP, |
| 3555 | false), |
| 3556 | MLXSW_SP_RXL_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, HOST_MISS, false), |
| 3557 | MLXSW_SP_RXL_MARK(HOST_MISS_IPV6, TRAP_TO_CPU, HOST_MISS, false), |
Ido Schimmel | 7607dd3 | 2017-07-17 14:15:30 +0200 | [diff] [blame] | 3558 | MLXSW_SP_RXL_MARK(ROUTER_ALERT_IPV4, TRAP_TO_CPU, ROUTER_EXP, false), |
Arkadi Sharshevsky | 8d54814 | 2017-07-18 10:10:11 +0200 | [diff] [blame] | 3559 | MLXSW_SP_RXL_MARK(ROUTER_ALERT_IPV6, TRAP_TO_CPU, ROUTER_EXP, false), |
Petr Machata | 86484de | 2017-09-02 23:49:27 +0200 | [diff] [blame] | 3560 | MLXSW_SP_RXL_MARK(IPIP_DECAP_ERROR, TRAP_TO_CPU, ROUTER_EXP, false), |
Yotam Gigi | 98d0f7b | 2017-01-23 11:07:11 +0100 | [diff] [blame] | 3561 | /* PKT Sample trap */ |
| 3562 | MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU, |
Jiri Pirko | 0db7b38 | 2017-06-06 14:12:05 +0200 | [diff] [blame] | 3563 | false, SP_IP2ME, DISCARD), |
| 3564 | /* ACL trap */ |
| 3565 | MLXSW_SP_RXL_NO_MARK(ACL0, TRAP_TO_CPU, IP2ME, false), |
Yotam Gigi | b48cfc8 | 2017-09-19 10:00:20 +0200 | [diff] [blame] | 3566 | /* Multicast Router Traps */ |
| 3567 | MLXSW_SP_RXL_MARK(IPV4_PIM, TRAP_TO_CPU, PIM, false), |
| 3568 | MLXSW_SP_RXL_MARK(RPF, TRAP_TO_CPU, RPF, false), |
| 3569 | MLXSW_SP_RXL_MARK(ACL1, TRAP_TO_CPU, MULTICAST, false), |
Yotam Gigi | a0040c8 | 2017-10-03 09:58:10 +0200 | [diff] [blame] | 3570 | MLXSW_SP_RXL_MR_MARK(ACL2, TRAP_TO_CPU, MULTICAST, false), |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3571 | }; |
| 3572 | |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3573 | static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core) |
| 3574 | { |
| 3575 | char qpcr_pl[MLXSW_REG_QPCR_LEN]; |
| 3576 | enum mlxsw_reg_qpcr_ir_units ir_units; |
| 3577 | int max_cpu_policers; |
| 3578 | bool is_bytes; |
| 3579 | u8 burst_size; |
| 3580 | u32 rate; |
| 3581 | int i, err; |
| 3582 | |
| 3583 | if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS)) |
| 3584 | return -EIO; |
| 3585 | |
| 3586 | max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS); |
| 3587 | |
| 3588 | ir_units = MLXSW_REG_QPCR_IR_UNITS_M; |
| 3589 | for (i = 0; i < max_cpu_policers; i++) { |
| 3590 | is_bytes = false; |
| 3591 | switch (i) { |
| 3592 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP: |
| 3593 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP: |
| 3594 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP: |
| 3595 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF: |
Yotam Gigi | b48cfc8 | 2017-09-19 10:00:20 +0200 | [diff] [blame] | 3596 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_PIM: |
| 3597 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_RPF: |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3598 | rate = 128; |
| 3599 | burst_size = 7; |
| 3600 | break; |
| 3601 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP: |
Arkadi Sharshevsky | 588823f | 2017-07-17 14:15:31 +0200 | [diff] [blame] | 3602 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_MLD: |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3603 | rate = 16 * 1024; |
| 3604 | burst_size = 10; |
| 3605 | break; |
Arkadi Sharshevsky | 8d54814 | 2017-07-18 10:10:11 +0200 | [diff] [blame] | 3606 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP: |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3607 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP: |
| 3608 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP: |
Arkadi Sharshevsky | 8d54814 | 2017-07-18 10:10:11 +0200 | [diff] [blame] | 3609 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_HOST_MISS: |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3610 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP: |
| 3611 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE: |
Arkadi Sharshevsky | 8d54814 | 2017-07-18 10:10:11 +0200 | [diff] [blame] | 3612 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_ND: |
Yotam Gigi | b48cfc8 | 2017-09-19 10:00:20 +0200 | [diff] [blame] | 3613 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_MULTICAST: |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3614 | rate = 1024; |
| 3615 | burst_size = 7; |
| 3616 | break; |
| 3617 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME: |
| 3618 | is_bytes = true; |
| 3619 | rate = 4 * 1024; |
| 3620 | burst_size = 4; |
| 3621 | break; |
| 3622 | default: |
| 3623 | continue; |
| 3624 | } |
| 3625 | |
| 3626 | mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate, |
| 3627 | burst_size); |
| 3628 | err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl); |
| 3629 | if (err) |
| 3630 | return err; |
| 3631 | } |
| 3632 | |
| 3633 | return 0; |
| 3634 | } |
| 3635 | |
Nogah Frankel | 579c82e | 2016-11-25 10:33:42 +0100 | [diff] [blame] | 3636 | static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3637 | { |
| 3638 | char htgt_pl[MLXSW_REG_HTGT_LEN]; |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3639 | enum mlxsw_reg_htgt_trap_group i; |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3640 | int max_cpu_policers; |
Nogah Frankel | 579c82e | 2016-11-25 10:33:42 +0100 | [diff] [blame] | 3641 | int max_trap_groups; |
| 3642 | u8 priority, tc; |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3643 | u16 policer_id; |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3644 | int err; |
Nogah Frankel | 579c82e | 2016-11-25 10:33:42 +0100 | [diff] [blame] | 3645 | |
| 3646 | if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS)) |
| 3647 | return -EIO; |
| 3648 | |
| 3649 | max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS); |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3650 | max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS); |
Nogah Frankel | 579c82e | 2016-11-25 10:33:42 +0100 | [diff] [blame] | 3651 | |
| 3652 | for (i = 0; i < max_trap_groups; i++) { |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3653 | policer_id = i; |
Nogah Frankel | 579c82e | 2016-11-25 10:33:42 +0100 | [diff] [blame] | 3654 | switch (i) { |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3655 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP: |
| 3656 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP: |
| 3657 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP: |
| 3658 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF: |
Yotam Gigi | b48cfc8 | 2017-09-19 10:00:20 +0200 | [diff] [blame] | 3659 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_PIM: |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3660 | priority = 5; |
| 3661 | tc = 5; |
| 3662 | break; |
Arkadi Sharshevsky | 8d54814 | 2017-07-18 10:10:11 +0200 | [diff] [blame] | 3663 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP: |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3664 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP: |
| 3665 | priority = 4; |
| 3666 | tc = 4; |
| 3667 | break; |
| 3668 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP: |
| 3669 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME: |
Arkadi Sharshevsky | 588823f | 2017-07-17 14:15:31 +0200 | [diff] [blame] | 3670 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_MLD: |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3671 | priority = 3; |
| 3672 | tc = 3; |
| 3673 | break; |
| 3674 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP: |
Arkadi Sharshevsky | 8d54814 | 2017-07-18 10:10:11 +0200 | [diff] [blame] | 3675 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_ND: |
Yotam Gigi | b48cfc8 | 2017-09-19 10:00:20 +0200 | [diff] [blame] | 3676 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_RPF: |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3677 | priority = 2; |
| 3678 | tc = 2; |
| 3679 | break; |
Arkadi Sharshevsky | 8d54814 | 2017-07-18 10:10:11 +0200 | [diff] [blame] | 3680 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_HOST_MISS: |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3681 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP: |
| 3682 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE: |
Yotam Gigi | b48cfc8 | 2017-09-19 10:00:20 +0200 | [diff] [blame] | 3683 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_MULTICAST: |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3684 | priority = 1; |
| 3685 | tc = 1; |
| 3686 | break; |
| 3687 | case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT: |
Nogah Frankel | 579c82e | 2016-11-25 10:33:42 +0100 | [diff] [blame] | 3688 | priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY; |
| 3689 | tc = MLXSW_REG_HTGT_DEFAULT_TC; |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3690 | policer_id = MLXSW_REG_HTGT_INVALID_POLICER; |
Nogah Frankel | 579c82e | 2016-11-25 10:33:42 +0100 | [diff] [blame] | 3691 | break; |
| 3692 | default: |
| 3693 | continue; |
| 3694 | } |
Nogah Frankel | 117b0da | 2016-11-25 10:33:44 +0100 | [diff] [blame] | 3695 | |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3696 | if (max_cpu_policers <= policer_id && |
| 3697 | policer_id != MLXSW_REG_HTGT_INVALID_POLICER) |
| 3698 | return -EIO; |
| 3699 | |
| 3700 | mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc); |
Nogah Frankel | 579c82e | 2016-11-25 10:33:42 +0100 | [diff] [blame] | 3701 | err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl); |
| 3702 | if (err) |
| 3703 | return err; |
| 3704 | } |
| 3705 | |
| 3706 | return 0; |
| 3707 | } |
| 3708 | |
| 3709 | static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp) |
| 3710 | { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3711 | int i; |
| 3712 | int err; |
| 3713 | |
Nogah Frankel | 9148e7c | 2016-11-25 10:33:47 +0100 | [diff] [blame] | 3714 | err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core); |
| 3715 | if (err) |
| 3716 | return err; |
| 3717 | |
Nogah Frankel | 579c82e | 2016-11-25 10:33:42 +0100 | [diff] [blame] | 3718 | err = mlxsw_sp_trap_groups_set(mlxsw_sp->core); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3719 | if (err) |
| 3720 | return err; |
| 3721 | |
Nogah Frankel | 4544913 | 2016-11-25 10:33:35 +0100 | [diff] [blame] | 3722 | for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) { |
Nogah Frankel | 14eeda9 | 2016-11-25 10:33:32 +0100 | [diff] [blame] | 3723 | err = mlxsw_core_trap_register(mlxsw_sp->core, |
Nogah Frankel | 4544913 | 2016-11-25 10:33:35 +0100 | [diff] [blame] | 3724 | &mlxsw_sp_listener[i], |
Nogah Frankel | 14eeda9 | 2016-11-25 10:33:32 +0100 | [diff] [blame] | 3725 | mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3726 | if (err) |
Nogah Frankel | 4544913 | 2016-11-25 10:33:35 +0100 | [diff] [blame] | 3727 | goto err_listener_register; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3728 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3729 | } |
| 3730 | return 0; |
| 3731 | |
Nogah Frankel | 4544913 | 2016-11-25 10:33:35 +0100 | [diff] [blame] | 3732 | err_listener_register: |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3733 | for (i--; i >= 0; i--) { |
Nogah Frankel | 14eeda9 | 2016-11-25 10:33:32 +0100 | [diff] [blame] | 3734 | mlxsw_core_trap_unregister(mlxsw_sp->core, |
Nogah Frankel | 4544913 | 2016-11-25 10:33:35 +0100 | [diff] [blame] | 3735 | &mlxsw_sp_listener[i], |
Nogah Frankel | 14eeda9 | 2016-11-25 10:33:32 +0100 | [diff] [blame] | 3736 | mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3737 | } |
| 3738 | return err; |
| 3739 | } |
| 3740 | |
| 3741 | static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp) |
| 3742 | { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3743 | int i; |
| 3744 | |
Nogah Frankel | 4544913 | 2016-11-25 10:33:35 +0100 | [diff] [blame] | 3745 | for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) { |
Nogah Frankel | 14eeda9 | 2016-11-25 10:33:32 +0100 | [diff] [blame] | 3746 | mlxsw_core_trap_unregister(mlxsw_sp->core, |
Nogah Frankel | 4544913 | 2016-11-25 10:33:35 +0100 | [diff] [blame] | 3747 | &mlxsw_sp_listener[i], |
Nogah Frankel | 14eeda9 | 2016-11-25 10:33:32 +0100 | [diff] [blame] | 3748 | mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3749 | } |
| 3750 | } |
| 3751 | |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 3752 | static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp) |
| 3753 | { |
| 3754 | char slcr_pl[MLXSW_REG_SLCR_LEN]; |
Nogah Frankel | ce0bd2b | 2016-09-20 11:16:50 +0200 | [diff] [blame] | 3755 | int err; |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 3756 | |
| 3757 | mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC | |
| 3758 | MLXSW_REG_SLCR_LAG_HASH_DMAC | |
| 3759 | MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE | |
| 3760 | MLXSW_REG_SLCR_LAG_HASH_VLANID | |
| 3761 | MLXSW_REG_SLCR_LAG_HASH_SIP | |
| 3762 | MLXSW_REG_SLCR_LAG_HASH_DIP | |
| 3763 | MLXSW_REG_SLCR_LAG_HASH_SPORT | |
| 3764 | MLXSW_REG_SLCR_LAG_HASH_DPORT | |
| 3765 | MLXSW_REG_SLCR_LAG_HASH_IPPROTO); |
Nogah Frankel | ce0bd2b | 2016-09-20 11:16:50 +0200 | [diff] [blame] | 3766 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl); |
| 3767 | if (err) |
| 3768 | return err; |
| 3769 | |
Jiri Pirko | c1a3831 | 2016-10-21 16:07:23 +0200 | [diff] [blame] | 3770 | if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) || |
| 3771 | !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS)) |
Nogah Frankel | ce0bd2b | 2016-09-20 11:16:50 +0200 | [diff] [blame] | 3772 | return -EIO; |
| 3773 | |
Jiri Pirko | c1a3831 | 2016-10-21 16:07:23 +0200 | [diff] [blame] | 3774 | mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG), |
Nogah Frankel | ce0bd2b | 2016-09-20 11:16:50 +0200 | [diff] [blame] | 3775 | sizeof(struct mlxsw_sp_upper), |
| 3776 | GFP_KERNEL); |
| 3777 | if (!mlxsw_sp->lags) |
| 3778 | return -ENOMEM; |
| 3779 | |
| 3780 | return 0; |
| 3781 | } |
| 3782 | |
| 3783 | static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp) |
| 3784 | { |
| 3785 | kfree(mlxsw_sp->lags); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 3786 | } |
| 3787 | |
Nogah Frankel | 9d87fce | 2016-11-25 10:33:40 +0100 | [diff] [blame] | 3788 | static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core) |
| 3789 | { |
| 3790 | char htgt_pl[MLXSW_REG_HTGT_LEN]; |
| 3791 | |
Nogah Frankel | 579c82e | 2016-11-25 10:33:42 +0100 | [diff] [blame] | 3792 | mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD, |
| 3793 | MLXSW_REG_HTGT_INVALID_POLICER, |
| 3794 | MLXSW_REG_HTGT_DEFAULT_PRIORITY, |
| 3795 | MLXSW_REG_HTGT_DEFAULT_TC); |
Nogah Frankel | 9d87fce | 2016-11-25 10:33:40 +0100 | [diff] [blame] | 3796 | return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl); |
| 3797 | } |
| 3798 | |
Petr Machata | c30f5d0 | 2017-10-16 16:26:35 +0200 | [diff] [blame] | 3799 | static int mlxsw_sp_netdevice_event(struct notifier_block *unused, |
| 3800 | unsigned long event, void *ptr); |
| 3801 | |
Jiri Pirko | b2f1057 | 2016-04-08 19:11:23 +0200 | [diff] [blame] | 3802 | static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3803 | const struct mlxsw_bus_info *mlxsw_bus_info) |
| 3804 | { |
Jiri Pirko | b2f1057 | 2016-04-08 19:11:23 +0200 | [diff] [blame] | 3805 | struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3806 | int err; |
| 3807 | |
| 3808 | mlxsw_sp->core = mlxsw_core; |
| 3809 | mlxsw_sp->bus_info = mlxsw_bus_info; |
| 3810 | |
Yotam Gigi | 6b74219 | 2017-05-23 21:56:29 +0200 | [diff] [blame] | 3811 | err = mlxsw_sp_fw_rev_validate(mlxsw_sp); |
| 3812 | if (err) { |
| 3813 | dev_err(mlxsw_sp->bus_info->dev, "Could not upgrade firmware\n"); |
| 3814 | return err; |
| 3815 | } |
| 3816 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3817 | err = mlxsw_sp_base_mac_get(mlxsw_sp); |
| 3818 | if (err) { |
| 3819 | dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n"); |
| 3820 | return err; |
| 3821 | } |
| 3822 | |
Ido Schimmel | a875a2e | 2017-10-22 23:11:44 +0200 | [diff] [blame] | 3823 | err = mlxsw_sp_kvdl_init(mlxsw_sp); |
| 3824 | if (err) { |
| 3825 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize KVDL\n"); |
| 3826 | return err; |
| 3827 | } |
| 3828 | |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3829 | err = mlxsw_sp_fids_init(mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3830 | if (err) { |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3831 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize FIDs\n"); |
Ido Schimmel | a875a2e | 2017-10-22 23:11:44 +0200 | [diff] [blame] | 3832 | goto err_fids_init; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3833 | } |
| 3834 | |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3835 | err = mlxsw_sp_traps_init(mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3836 | if (err) { |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3837 | dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n"); |
| 3838 | goto err_traps_init; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3839 | } |
| 3840 | |
| 3841 | err = mlxsw_sp_buffers_init(mlxsw_sp); |
| 3842 | if (err) { |
| 3843 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n"); |
| 3844 | goto err_buffers_init; |
| 3845 | } |
| 3846 | |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 3847 | err = mlxsw_sp_lag_init(mlxsw_sp); |
| 3848 | if (err) { |
| 3849 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n"); |
| 3850 | goto err_lag_init; |
| 3851 | } |
| 3852 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3853 | err = mlxsw_sp_switchdev_init(mlxsw_sp); |
| 3854 | if (err) { |
| 3855 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n"); |
| 3856 | goto err_switchdev_init; |
| 3857 | } |
| 3858 | |
Yotam Gigi | e2b2d35 | 2017-09-19 10:00:08 +0200 | [diff] [blame] | 3859 | err = mlxsw_sp_counter_pool_init(mlxsw_sp); |
| 3860 | if (err) { |
| 3861 | dev_err(mlxsw_sp->bus_info->dev, "Failed to init counter pool\n"); |
| 3862 | goto err_counter_pool_init; |
| 3863 | } |
| 3864 | |
Yotam Gigi | d3b939b | 2017-09-19 10:00:09 +0200 | [diff] [blame] | 3865 | err = mlxsw_sp_afa_init(mlxsw_sp); |
| 3866 | if (err) { |
| 3867 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL actions\n"); |
| 3868 | goto err_afa_init; |
| 3869 | } |
| 3870 | |
Ido Schimmel | 464dce1 | 2016-07-02 11:00:15 +0200 | [diff] [blame] | 3871 | err = mlxsw_sp_router_init(mlxsw_sp); |
| 3872 | if (err) { |
| 3873 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n"); |
| 3874 | goto err_router_init; |
| 3875 | } |
| 3876 | |
Petr Machata | c30f5d0 | 2017-10-16 16:26:35 +0200 | [diff] [blame] | 3877 | /* Initialize netdevice notifier after router is initialized, so that |
| 3878 | * the event handler can use router structures. |
| 3879 | */ |
| 3880 | mlxsw_sp->netdevice_nb.notifier_call = mlxsw_sp_netdevice_event; |
| 3881 | err = register_netdevice_notifier(&mlxsw_sp->netdevice_nb); |
| 3882 | if (err) { |
| 3883 | dev_err(mlxsw_sp->bus_info->dev, "Failed to register netdev notifier\n"); |
| 3884 | goto err_netdev_notifier; |
| 3885 | } |
| 3886 | |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 3887 | err = mlxsw_sp_span_init(mlxsw_sp); |
| 3888 | if (err) { |
| 3889 | dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n"); |
| 3890 | goto err_span_init; |
| 3891 | } |
| 3892 | |
Jiri Pirko | 22a6776 | 2017-02-03 10:29:07 +0100 | [diff] [blame] | 3893 | err = mlxsw_sp_acl_init(mlxsw_sp); |
| 3894 | if (err) { |
| 3895 | dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL\n"); |
| 3896 | goto err_acl_init; |
| 3897 | } |
| 3898 | |
Arkadi Sharshevsky | 230ead0 | 2017-03-28 17:24:12 +0200 | [diff] [blame] | 3899 | err = mlxsw_sp_dpipe_init(mlxsw_sp); |
| 3900 | if (err) { |
| 3901 | dev_err(mlxsw_sp->bus_info->dev, "Failed to init pipeline debug\n"); |
| 3902 | goto err_dpipe_init; |
| 3903 | } |
| 3904 | |
Ido Schimmel | bbf2a47 | 2016-07-02 11:00:14 +0200 | [diff] [blame] | 3905 | err = mlxsw_sp_ports_create(mlxsw_sp); |
| 3906 | if (err) { |
| 3907 | dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n"); |
| 3908 | goto err_ports_create; |
| 3909 | } |
| 3910 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3911 | return 0; |
| 3912 | |
Ido Schimmel | bbf2a47 | 2016-07-02 11:00:14 +0200 | [diff] [blame] | 3913 | err_ports_create: |
Arkadi Sharshevsky | 230ead0 | 2017-03-28 17:24:12 +0200 | [diff] [blame] | 3914 | mlxsw_sp_dpipe_fini(mlxsw_sp); |
| 3915 | err_dpipe_init: |
Jiri Pirko | 22a6776 | 2017-02-03 10:29:07 +0100 | [diff] [blame] | 3916 | mlxsw_sp_acl_fini(mlxsw_sp); |
| 3917 | err_acl_init: |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 3918 | mlxsw_sp_span_fini(mlxsw_sp); |
| 3919 | err_span_init: |
Petr Machata | c30f5d0 | 2017-10-16 16:26:35 +0200 | [diff] [blame] | 3920 | unregister_netdevice_notifier(&mlxsw_sp->netdevice_nb); |
| 3921 | err_netdev_notifier: |
Ido Schimmel | 464dce1 | 2016-07-02 11:00:15 +0200 | [diff] [blame] | 3922 | mlxsw_sp_router_fini(mlxsw_sp); |
| 3923 | err_router_init: |
Yotam Gigi | d3b939b | 2017-09-19 10:00:09 +0200 | [diff] [blame] | 3924 | mlxsw_sp_afa_fini(mlxsw_sp); |
| 3925 | err_afa_init: |
Yotam Gigi | e2b2d35 | 2017-09-19 10:00:08 +0200 | [diff] [blame] | 3926 | mlxsw_sp_counter_pool_fini(mlxsw_sp); |
| 3927 | err_counter_pool_init: |
Ido Schimmel | bbf2a47 | 2016-07-02 11:00:14 +0200 | [diff] [blame] | 3928 | mlxsw_sp_switchdev_fini(mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3929 | err_switchdev_init: |
Nogah Frankel | ce0bd2b | 2016-09-20 11:16:50 +0200 | [diff] [blame] | 3930 | mlxsw_sp_lag_fini(mlxsw_sp); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 3931 | err_lag_init: |
Jiri Pirko | 0f433fa | 2016-04-14 18:19:24 +0200 | [diff] [blame] | 3932 | mlxsw_sp_buffers_fini(mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3933 | err_buffers_init: |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3934 | mlxsw_sp_traps_fini(mlxsw_sp); |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3935 | err_traps_init: |
| 3936 | mlxsw_sp_fids_fini(mlxsw_sp); |
Ido Schimmel | a875a2e | 2017-10-22 23:11:44 +0200 | [diff] [blame] | 3937 | err_fids_init: |
| 3938 | mlxsw_sp_kvdl_fini(mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3939 | return err; |
| 3940 | } |
| 3941 | |
Jiri Pirko | b2f1057 | 2016-04-08 19:11:23 +0200 | [diff] [blame] | 3942 | static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3943 | { |
Jiri Pirko | b2f1057 | 2016-04-08 19:11:23 +0200 | [diff] [blame] | 3944 | struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3945 | |
Ido Schimmel | bbf2a47 | 2016-07-02 11:00:14 +0200 | [diff] [blame] | 3946 | mlxsw_sp_ports_remove(mlxsw_sp); |
Arkadi Sharshevsky | 230ead0 | 2017-03-28 17:24:12 +0200 | [diff] [blame] | 3947 | mlxsw_sp_dpipe_fini(mlxsw_sp); |
Jiri Pirko | 22a6776 | 2017-02-03 10:29:07 +0100 | [diff] [blame] | 3948 | mlxsw_sp_acl_fini(mlxsw_sp); |
Yotam Gigi | 763b4b7 | 2016-07-21 12:03:17 +0200 | [diff] [blame] | 3949 | mlxsw_sp_span_fini(mlxsw_sp); |
Petr Machata | c30f5d0 | 2017-10-16 16:26:35 +0200 | [diff] [blame] | 3950 | unregister_netdevice_notifier(&mlxsw_sp->netdevice_nb); |
Ido Schimmel | 464dce1 | 2016-07-02 11:00:15 +0200 | [diff] [blame] | 3951 | mlxsw_sp_router_fini(mlxsw_sp); |
Yotam Gigi | d3b939b | 2017-09-19 10:00:09 +0200 | [diff] [blame] | 3952 | mlxsw_sp_afa_fini(mlxsw_sp); |
Yotam Gigi | e2b2d35 | 2017-09-19 10:00:08 +0200 | [diff] [blame] | 3953 | mlxsw_sp_counter_pool_fini(mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3954 | mlxsw_sp_switchdev_fini(mlxsw_sp); |
Nogah Frankel | ce0bd2b | 2016-09-20 11:16:50 +0200 | [diff] [blame] | 3955 | mlxsw_sp_lag_fini(mlxsw_sp); |
Jiri Pirko | 5113bfd | 2016-05-06 22:20:59 +0200 | [diff] [blame] | 3956 | mlxsw_sp_buffers_fini(mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3957 | mlxsw_sp_traps_fini(mlxsw_sp); |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3958 | mlxsw_sp_fids_fini(mlxsw_sp); |
Ido Schimmel | a875a2e | 2017-10-22 23:11:44 +0200 | [diff] [blame] | 3959 | mlxsw_sp_kvdl_fini(mlxsw_sp); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3960 | } |
| 3961 | |
Bhumika Goyal | 159fe88 | 2017-08-11 19:10:42 +0530 | [diff] [blame] | 3962 | static const struct mlxsw_config_profile mlxsw_sp_config_profile = { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3963 | .used_max_vepa_channels = 1, |
| 3964 | .max_vepa_channels = 0, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3965 | .used_max_mid = 1, |
Elad Raz | 53ae628 | 2016-01-10 21:06:26 +0100 | [diff] [blame] | 3966 | .max_mid = MLXSW_SP_MID_MAX, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3967 | .used_max_pgt = 1, |
| 3968 | .max_pgt = 0, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3969 | .used_flood_tables = 1, |
| 3970 | .used_flood_mode = 1, |
| 3971 | .flood_mode = 3, |
Nogah Frankel | 71c365b | 2017-02-09 14:54:46 +0100 | [diff] [blame] | 3972 | .max_fid_offset_flood_tables = 3, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3973 | .fid_offset_flood_table_size = VLAN_N_VID - 1, |
Nogah Frankel | 71c365b | 2017-02-09 14:54:46 +0100 | [diff] [blame] | 3974 | .max_fid_flood_tables = 3, |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 3975 | .fid_flood_table_size = MLXSW_SP_FID_8021D_MAX, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3976 | .used_max_ib_mc = 1, |
| 3977 | .max_ib_mc = 0, |
| 3978 | .used_max_pkey = 1, |
| 3979 | .max_pkey = 0, |
Nogah Frankel | 403547d | 2016-09-20 11:16:52 +0200 | [diff] [blame] | 3980 | .used_kvd_split_data = 1, |
| 3981 | .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY, |
Ido Schimmel | f11fbaf | 2017-10-22 23:11:49 +0200 | [diff] [blame] | 3982 | .kvd_hash_single_parts = 59, |
| 3983 | .kvd_hash_double_parts = 41, |
Jiri Pirko | c602242 | 2016-07-05 11:27:46 +0200 | [diff] [blame] | 3984 | .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3985 | .swid_config = { |
| 3986 | { |
| 3987 | .used_type = 1, |
| 3988 | .type = MLXSW_PORT_SWID_TYPE_ETH, |
| 3989 | } |
| 3990 | }, |
Nogah Frankel | 57d316b | 2016-07-21 12:03:09 +0200 | [diff] [blame] | 3991 | .resource_query_enable = 1, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 3992 | }; |
| 3993 | |
Arkadi Sharshevsky | ef3116e | 2018-01-15 08:59:07 +0100 | [diff] [blame] | 3994 | static bool |
| 3995 | mlxsw_sp_resource_kvd_granularity_validate(struct netlink_ext_ack *extack, |
| 3996 | u64 size) |
| 3997 | { |
| 3998 | const struct mlxsw_config_profile *profile; |
| 3999 | |
| 4000 | profile = &mlxsw_sp_config_profile; |
| 4001 | if (size % profile->kvd_hash_granularity) { |
| 4002 | NL_SET_ERR_MSG_MOD(extack, "resource set with wrong granularity"); |
| 4003 | return false; |
| 4004 | } |
| 4005 | return true; |
| 4006 | } |
| 4007 | |
| 4008 | static int |
| 4009 | mlxsw_sp_resource_kvd_size_validate(struct devlink *devlink, u64 size, |
| 4010 | struct netlink_ext_ack *extack) |
| 4011 | { |
| 4012 | NL_SET_ERR_MSG_MOD(extack, "kvd size cannot be changed"); |
| 4013 | return -EINVAL; |
| 4014 | } |
| 4015 | |
| 4016 | static int |
| 4017 | mlxsw_sp_resource_kvd_linear_size_validate(struct devlink *devlink, u64 size, |
| 4018 | struct netlink_ext_ack *extack) |
| 4019 | { |
| 4020 | if (!mlxsw_sp_resource_kvd_granularity_validate(extack, size)) |
| 4021 | return -EINVAL; |
| 4022 | |
| 4023 | return 0; |
| 4024 | } |
| 4025 | |
| 4026 | static int |
| 4027 | mlxsw_sp_resource_kvd_hash_single_size_validate(struct devlink *devlink, u64 size, |
| 4028 | struct netlink_ext_ack *extack) |
| 4029 | { |
| 4030 | struct mlxsw_core *mlxsw_core = devlink_priv(devlink); |
| 4031 | |
| 4032 | if (!mlxsw_sp_resource_kvd_granularity_validate(extack, size)) |
| 4033 | return -EINVAL; |
| 4034 | |
| 4035 | if (size < MLXSW_CORE_RES_GET(mlxsw_core, KVD_SINGLE_MIN_SIZE)) { |
| 4036 | NL_SET_ERR_MSG_MOD(extack, "hash single size is smaller than minimum"); |
| 4037 | return -EINVAL; |
| 4038 | } |
| 4039 | return 0; |
| 4040 | } |
| 4041 | |
| 4042 | static int |
| 4043 | mlxsw_sp_resource_kvd_hash_double_size_validate(struct devlink *devlink, u64 size, |
| 4044 | struct netlink_ext_ack *extack) |
| 4045 | { |
| 4046 | struct mlxsw_core *mlxsw_core = devlink_priv(devlink); |
| 4047 | |
| 4048 | if (!mlxsw_sp_resource_kvd_granularity_validate(extack, size)) |
| 4049 | return -EINVAL; |
| 4050 | |
| 4051 | if (size < MLXSW_CORE_RES_GET(mlxsw_core, KVD_DOUBLE_MIN_SIZE)) { |
| 4052 | NL_SET_ERR_MSG_MOD(extack, "hash double size is smaller than minimum"); |
| 4053 | return -EINVAL; |
| 4054 | } |
| 4055 | return 0; |
| 4056 | } |
| 4057 | |
Arkadi Sharshevsky | afadc26 | 2018-01-15 08:59:09 +0100 | [diff] [blame] | 4058 | static u64 mlxsw_sp_resource_kvd_linear_occ_get(struct devlink *devlink) |
| 4059 | { |
| 4060 | struct mlxsw_core *mlxsw_core = devlink_priv(devlink); |
| 4061 | struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); |
| 4062 | |
| 4063 | return mlxsw_sp_kvdl_occ_get(mlxsw_sp); |
| 4064 | } |
| 4065 | |
Arkadi Sharshevsky | ef3116e | 2018-01-15 08:59:07 +0100 | [diff] [blame] | 4066 | static struct devlink_resource_ops mlxsw_sp_resource_kvd_ops = { |
| 4067 | .size_validate = mlxsw_sp_resource_kvd_size_validate, |
| 4068 | }; |
| 4069 | |
| 4070 | static struct devlink_resource_ops mlxsw_sp_resource_kvd_linear_ops = { |
| 4071 | .size_validate = mlxsw_sp_resource_kvd_linear_size_validate, |
Arkadi Sharshevsky | afadc26 | 2018-01-15 08:59:09 +0100 | [diff] [blame] | 4072 | .occ_get = mlxsw_sp_resource_kvd_linear_occ_get, |
Arkadi Sharshevsky | ef3116e | 2018-01-15 08:59:07 +0100 | [diff] [blame] | 4073 | }; |
| 4074 | |
| 4075 | static struct devlink_resource_ops mlxsw_sp_resource_kvd_hash_single_ops = { |
| 4076 | .size_validate = mlxsw_sp_resource_kvd_hash_single_size_validate, |
| 4077 | }; |
| 4078 | |
| 4079 | static struct devlink_resource_ops mlxsw_sp_resource_kvd_hash_double_ops = { |
| 4080 | .size_validate = mlxsw_sp_resource_kvd_hash_double_size_validate, |
| 4081 | }; |
| 4082 | |
| 4083 | static struct devlink_resource_size_params mlxsw_sp_kvd_size_params; |
| 4084 | static struct devlink_resource_size_params mlxsw_sp_linear_size_params; |
| 4085 | static struct devlink_resource_size_params mlxsw_sp_hash_single_size_params; |
| 4086 | static struct devlink_resource_size_params mlxsw_sp_hash_double_size_params; |
| 4087 | |
| 4088 | static void |
| 4089 | mlxsw_sp_resource_size_params_prepare(struct mlxsw_core *mlxsw_core) |
| 4090 | { |
| 4091 | u32 single_size_min = MLXSW_CORE_RES_GET(mlxsw_core, |
| 4092 | KVD_SINGLE_MIN_SIZE); |
| 4093 | u32 double_size_min = MLXSW_CORE_RES_GET(mlxsw_core, |
| 4094 | KVD_DOUBLE_MIN_SIZE); |
| 4095 | u32 kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE); |
| 4096 | u32 linear_size_min = 0; |
| 4097 | |
| 4098 | /* KVD top resource */ |
| 4099 | mlxsw_sp_kvd_size_params.size_min = kvd_size; |
| 4100 | mlxsw_sp_kvd_size_params.size_max = kvd_size; |
| 4101 | mlxsw_sp_kvd_size_params.size_granularity = MLXSW_SP_KVD_GRANULARITY; |
| 4102 | mlxsw_sp_kvd_size_params.unit = DEVLINK_RESOURCE_UNIT_ENTRY; |
| 4103 | |
| 4104 | /* Linear part init */ |
| 4105 | mlxsw_sp_linear_size_params.size_min = linear_size_min; |
| 4106 | mlxsw_sp_linear_size_params.size_max = kvd_size - single_size_min - |
| 4107 | double_size_min; |
| 4108 | mlxsw_sp_linear_size_params.size_granularity = MLXSW_SP_KVD_GRANULARITY; |
| 4109 | mlxsw_sp_linear_size_params.unit = DEVLINK_RESOURCE_UNIT_ENTRY; |
| 4110 | |
| 4111 | /* Hash double part init */ |
| 4112 | mlxsw_sp_hash_double_size_params.size_min = double_size_min; |
| 4113 | mlxsw_sp_hash_double_size_params.size_max = kvd_size - single_size_min - |
| 4114 | linear_size_min; |
| 4115 | mlxsw_sp_hash_double_size_params.size_granularity = MLXSW_SP_KVD_GRANULARITY; |
| 4116 | mlxsw_sp_hash_double_size_params.unit = DEVLINK_RESOURCE_UNIT_ENTRY; |
| 4117 | |
| 4118 | /* Hash single part init */ |
| 4119 | mlxsw_sp_hash_single_size_params.size_min = single_size_min; |
| 4120 | mlxsw_sp_hash_single_size_params.size_max = kvd_size - double_size_min - |
| 4121 | linear_size_min; |
| 4122 | mlxsw_sp_hash_single_size_params.size_granularity = MLXSW_SP_KVD_GRANULARITY; |
| 4123 | mlxsw_sp_hash_single_size_params.unit = DEVLINK_RESOURCE_UNIT_ENTRY; |
| 4124 | } |
| 4125 | |
| 4126 | static int mlxsw_sp_resources_register(struct mlxsw_core *mlxsw_core) |
| 4127 | { |
| 4128 | struct devlink *devlink = priv_to_devlink(mlxsw_core); |
| 4129 | u32 kvd_size, single_size, double_size, linear_size; |
| 4130 | const struct mlxsw_config_profile *profile; |
| 4131 | int err; |
| 4132 | |
| 4133 | profile = &mlxsw_sp_config_profile; |
| 4134 | if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE)) |
| 4135 | return -EIO; |
| 4136 | |
| 4137 | mlxsw_sp_resource_size_params_prepare(mlxsw_core); |
| 4138 | kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE); |
| 4139 | err = devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD, |
| 4140 | true, kvd_size, |
| 4141 | MLXSW_SP_RESOURCE_KVD, |
| 4142 | DEVLINK_RESOURCE_ID_PARENT_TOP, |
| 4143 | &mlxsw_sp_kvd_size_params, |
| 4144 | &mlxsw_sp_resource_kvd_ops); |
| 4145 | if (err) |
| 4146 | return err; |
| 4147 | |
| 4148 | linear_size = profile->kvd_linear_size; |
| 4149 | err = devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD_LINEAR, |
| 4150 | false, linear_size, |
| 4151 | MLXSW_SP_RESOURCE_KVD_LINEAR, |
| 4152 | MLXSW_SP_RESOURCE_KVD, |
| 4153 | &mlxsw_sp_linear_size_params, |
| 4154 | &mlxsw_sp_resource_kvd_linear_ops); |
| 4155 | if (err) |
| 4156 | return err; |
| 4157 | |
| 4158 | double_size = kvd_size - linear_size; |
| 4159 | double_size *= profile->kvd_hash_double_parts; |
| 4160 | double_size /= profile->kvd_hash_double_parts + |
| 4161 | profile->kvd_hash_single_parts; |
| 4162 | double_size = rounddown(double_size, profile->kvd_hash_granularity); |
| 4163 | err = devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD_HASH_DOUBLE, |
| 4164 | false, double_size, |
| 4165 | MLXSW_SP_RESOURCE_KVD_HASH_DOUBLE, |
| 4166 | MLXSW_SP_RESOURCE_KVD, |
| 4167 | &mlxsw_sp_hash_double_size_params, |
| 4168 | &mlxsw_sp_resource_kvd_hash_double_ops); |
| 4169 | if (err) |
| 4170 | return err; |
| 4171 | |
| 4172 | single_size = kvd_size - double_size - linear_size; |
| 4173 | err = devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD_HASH_SINGLE, |
| 4174 | false, single_size, |
| 4175 | MLXSW_SP_RESOURCE_KVD_HASH_SINGLE, |
| 4176 | MLXSW_SP_RESOURCE_KVD, |
| 4177 | &mlxsw_sp_hash_single_size_params, |
| 4178 | &mlxsw_sp_resource_kvd_hash_single_ops); |
| 4179 | if (err) |
| 4180 | return err; |
| 4181 | |
| 4182 | return 0; |
| 4183 | } |
| 4184 | |
Arkadi Sharshevsky | e21d21c | 2018-01-15 08:59:10 +0100 | [diff] [blame^] | 4185 | static int mlxsw_sp_kvd_sizes_get(struct mlxsw_core *mlxsw_core, |
| 4186 | const struct mlxsw_config_profile *profile, |
| 4187 | u64 *p_single_size, u64 *p_double_size, |
| 4188 | u64 *p_linear_size) |
| 4189 | { |
| 4190 | struct devlink *devlink = priv_to_devlink(mlxsw_core); |
| 4191 | u32 double_size; |
| 4192 | int err; |
| 4193 | |
| 4194 | if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SINGLE_MIN_SIZE) || |
| 4195 | !MLXSW_CORE_RES_VALID(mlxsw_core, KVD_DOUBLE_MIN_SIZE) || |
| 4196 | !profile->used_kvd_split_data) |
| 4197 | return -EIO; |
| 4198 | |
| 4199 | /* The hash part is what left of the kvd without the |
| 4200 | * linear part. It is split to the single size and |
| 4201 | * double size by the parts ratio from the profile. |
| 4202 | * Both sizes must be a multiplications of the |
| 4203 | * granularity from the profile. In case the user |
| 4204 | * provided the sizes they are obtained via devlink. |
| 4205 | */ |
| 4206 | err = devlink_resource_size_get(devlink, |
| 4207 | MLXSW_SP_RESOURCE_KVD_LINEAR, |
| 4208 | p_linear_size); |
| 4209 | if (err) |
| 4210 | *p_linear_size = profile->kvd_linear_size; |
| 4211 | |
| 4212 | err = devlink_resource_size_get(devlink, |
| 4213 | MLXSW_SP_RESOURCE_KVD_HASH_DOUBLE, |
| 4214 | p_double_size); |
| 4215 | if (err) { |
| 4216 | double_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) - |
| 4217 | *p_linear_size; |
| 4218 | double_size *= profile->kvd_hash_double_parts; |
| 4219 | double_size /= profile->kvd_hash_double_parts + |
| 4220 | profile->kvd_hash_single_parts; |
| 4221 | *p_double_size = rounddown(double_size, |
| 4222 | profile->kvd_hash_granularity); |
| 4223 | } |
| 4224 | |
| 4225 | err = devlink_resource_size_get(devlink, |
| 4226 | MLXSW_SP_RESOURCE_KVD_HASH_SINGLE, |
| 4227 | p_single_size); |
| 4228 | if (err) |
| 4229 | *p_single_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) - |
| 4230 | *p_double_size - *p_linear_size; |
| 4231 | |
| 4232 | /* Check results are legal. */ |
| 4233 | if (*p_single_size < MLXSW_CORE_RES_GET(mlxsw_core, KVD_SINGLE_MIN_SIZE) || |
| 4234 | *p_double_size < MLXSW_CORE_RES_GET(mlxsw_core, KVD_DOUBLE_MIN_SIZE) || |
| 4235 | MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) < *p_linear_size) |
| 4236 | return -EIO; |
| 4237 | |
| 4238 | return 0; |
| 4239 | } |
| 4240 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4241 | static struct mlxsw_driver mlxsw_sp_driver = { |
Jiri Pirko | 1d20d23 | 2016-10-27 15:12:59 +0200 | [diff] [blame] | 4242 | .kind = mlxsw_sp_driver_name, |
Jiri Pirko | 2d0ed39 | 2016-04-14 18:19:30 +0200 | [diff] [blame] | 4243 | .priv_size = sizeof(struct mlxsw_sp), |
| 4244 | .init = mlxsw_sp_init, |
| 4245 | .fini = mlxsw_sp_fini, |
Nogah Frankel | 9d87fce | 2016-11-25 10:33:40 +0100 | [diff] [blame] | 4246 | .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set, |
Jiri Pirko | 2d0ed39 | 2016-04-14 18:19:30 +0200 | [diff] [blame] | 4247 | .port_split = mlxsw_sp_port_split, |
| 4248 | .port_unsplit = mlxsw_sp_port_unsplit, |
| 4249 | .sb_pool_get = mlxsw_sp_sb_pool_get, |
| 4250 | .sb_pool_set = mlxsw_sp_sb_pool_set, |
| 4251 | .sb_port_pool_get = mlxsw_sp_sb_port_pool_get, |
| 4252 | .sb_port_pool_set = mlxsw_sp_sb_port_pool_set, |
| 4253 | .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get, |
| 4254 | .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set, |
| 4255 | .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot, |
| 4256 | .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear, |
| 4257 | .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get, |
| 4258 | .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get, |
| 4259 | .txhdr_construct = mlxsw_sp_txhdr_construct, |
Arkadi Sharshevsky | ef3116e | 2018-01-15 08:59:07 +0100 | [diff] [blame] | 4260 | .resources_register = mlxsw_sp_resources_register, |
Arkadi Sharshevsky | e21d21c | 2018-01-15 08:59:10 +0100 | [diff] [blame^] | 4261 | .kvd_sizes_get = mlxsw_sp_kvd_sizes_get, |
Jiri Pirko | 2d0ed39 | 2016-04-14 18:19:30 +0200 | [diff] [blame] | 4262 | .txhdr_len = MLXSW_TXHDR_LEN, |
| 4263 | .profile = &mlxsw_sp_config_profile, |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4264 | }; |
| 4265 | |
Jiri Pirko | 22a6776 | 2017-02-03 10:29:07 +0100 | [diff] [blame] | 4266 | bool mlxsw_sp_port_dev_check(const struct net_device *dev) |
Jiri Pirko | 7ce856a | 2016-07-04 08:23:12 +0200 | [diff] [blame] | 4267 | { |
| 4268 | return dev->netdev_ops == &mlxsw_sp_port_netdev_ops; |
| 4269 | } |
| 4270 | |
Jiri Pirko | 1182e53 | 2017-03-06 21:25:20 +0100 | [diff] [blame] | 4271 | static int mlxsw_sp_lower_dev_walk(struct net_device *lower_dev, void *data) |
David Ahern | dd82364 | 2016-10-17 19:15:49 -0700 | [diff] [blame] | 4272 | { |
Jiri Pirko | 1182e53 | 2017-03-06 21:25:20 +0100 | [diff] [blame] | 4273 | struct mlxsw_sp_port **p_mlxsw_sp_port = data; |
David Ahern | dd82364 | 2016-10-17 19:15:49 -0700 | [diff] [blame] | 4274 | int ret = 0; |
| 4275 | |
| 4276 | if (mlxsw_sp_port_dev_check(lower_dev)) { |
Jiri Pirko | 1182e53 | 2017-03-06 21:25:20 +0100 | [diff] [blame] | 4277 | *p_mlxsw_sp_port = netdev_priv(lower_dev); |
David Ahern | dd82364 | 2016-10-17 19:15:49 -0700 | [diff] [blame] | 4278 | ret = 1; |
| 4279 | } |
| 4280 | |
| 4281 | return ret; |
| 4282 | } |
| 4283 | |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 4284 | struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev) |
Jiri Pirko | 7ce856a | 2016-07-04 08:23:12 +0200 | [diff] [blame] | 4285 | { |
Jiri Pirko | 1182e53 | 2017-03-06 21:25:20 +0100 | [diff] [blame] | 4286 | struct mlxsw_sp_port *mlxsw_sp_port; |
Jiri Pirko | 7ce856a | 2016-07-04 08:23:12 +0200 | [diff] [blame] | 4287 | |
| 4288 | if (mlxsw_sp_port_dev_check(dev)) |
| 4289 | return netdev_priv(dev); |
| 4290 | |
Jiri Pirko | 1182e53 | 2017-03-06 21:25:20 +0100 | [diff] [blame] | 4291 | mlxsw_sp_port = NULL; |
| 4292 | netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &mlxsw_sp_port); |
David Ahern | dd82364 | 2016-10-17 19:15:49 -0700 | [diff] [blame] | 4293 | |
Jiri Pirko | 1182e53 | 2017-03-06 21:25:20 +0100 | [diff] [blame] | 4294 | return mlxsw_sp_port; |
Jiri Pirko | 7ce856a | 2016-07-04 08:23:12 +0200 | [diff] [blame] | 4295 | } |
| 4296 | |
Ido Schimmel | 4724ba56 | 2017-03-10 08:53:39 +0100 | [diff] [blame] | 4297 | struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev) |
Jiri Pirko | 7ce856a | 2016-07-04 08:23:12 +0200 | [diff] [blame] | 4298 | { |
| 4299 | struct mlxsw_sp_port *mlxsw_sp_port; |
| 4300 | |
| 4301 | mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev); |
| 4302 | return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL; |
| 4303 | } |
| 4304 | |
Arkadi Sharshevsky | af061378 | 2017-06-08 08:44:20 +0200 | [diff] [blame] | 4305 | struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev) |
Jiri Pirko | 7ce856a | 2016-07-04 08:23:12 +0200 | [diff] [blame] | 4306 | { |
Jiri Pirko | 1182e53 | 2017-03-06 21:25:20 +0100 | [diff] [blame] | 4307 | struct mlxsw_sp_port *mlxsw_sp_port; |
Jiri Pirko | 7ce856a | 2016-07-04 08:23:12 +0200 | [diff] [blame] | 4308 | |
| 4309 | if (mlxsw_sp_port_dev_check(dev)) |
| 4310 | return netdev_priv(dev); |
| 4311 | |
Jiri Pirko | 1182e53 | 2017-03-06 21:25:20 +0100 | [diff] [blame] | 4312 | mlxsw_sp_port = NULL; |
| 4313 | netdev_walk_all_lower_dev_rcu(dev, mlxsw_sp_lower_dev_walk, |
| 4314 | &mlxsw_sp_port); |
David Ahern | dd82364 | 2016-10-17 19:15:49 -0700 | [diff] [blame] | 4315 | |
Jiri Pirko | 1182e53 | 2017-03-06 21:25:20 +0100 | [diff] [blame] | 4316 | return mlxsw_sp_port; |
Jiri Pirko | 7ce856a | 2016-07-04 08:23:12 +0200 | [diff] [blame] | 4317 | } |
| 4318 | |
| 4319 | struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev) |
| 4320 | { |
| 4321 | struct mlxsw_sp_port *mlxsw_sp_port; |
| 4322 | |
| 4323 | rcu_read_lock(); |
| 4324 | mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev); |
| 4325 | if (mlxsw_sp_port) |
| 4326 | dev_hold(mlxsw_sp_port->dev); |
| 4327 | rcu_read_unlock(); |
| 4328 | return mlxsw_sp_port; |
| 4329 | } |
| 4330 | |
| 4331 | void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port) |
| 4332 | { |
| 4333 | dev_put(mlxsw_sp_port->dev); |
| 4334 | } |
| 4335 | |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4336 | static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id) |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4337 | { |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4338 | char sldr_pl[MLXSW_REG_SLDR_LEN]; |
| 4339 | |
| 4340 | mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id); |
| 4341 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); |
| 4342 | } |
| 4343 | |
| 4344 | static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id) |
| 4345 | { |
| 4346 | char sldr_pl[MLXSW_REG_SLDR_LEN]; |
| 4347 | |
| 4348 | mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id); |
| 4349 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); |
| 4350 | } |
| 4351 | |
| 4352 | static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4353 | u16 lag_id, u8 port_index) |
| 4354 | { |
| 4355 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 4356 | char slcor_pl[MLXSW_REG_SLCOR_LEN]; |
| 4357 | |
| 4358 | mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port, |
| 4359 | lag_id, port_index); |
| 4360 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); |
| 4361 | } |
| 4362 | |
| 4363 | static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4364 | u16 lag_id) |
| 4365 | { |
| 4366 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 4367 | char slcor_pl[MLXSW_REG_SLCOR_LEN]; |
| 4368 | |
| 4369 | mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port, |
| 4370 | lag_id); |
| 4371 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); |
| 4372 | } |
| 4373 | |
| 4374 | static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4375 | u16 lag_id) |
| 4376 | { |
| 4377 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 4378 | char slcor_pl[MLXSW_REG_SLCOR_LEN]; |
| 4379 | |
| 4380 | mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port, |
| 4381 | lag_id); |
| 4382 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); |
| 4383 | } |
| 4384 | |
| 4385 | static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4386 | u16 lag_id) |
| 4387 | { |
| 4388 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 4389 | char slcor_pl[MLXSW_REG_SLCOR_LEN]; |
| 4390 | |
| 4391 | mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port, |
| 4392 | lag_id); |
| 4393 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); |
| 4394 | } |
| 4395 | |
| 4396 | static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp, |
| 4397 | struct net_device *lag_dev, |
| 4398 | u16 *p_lag_id) |
| 4399 | { |
| 4400 | struct mlxsw_sp_upper *lag; |
| 4401 | int free_lag_id = -1; |
Jiri Pirko | c1a3831 | 2016-10-21 16:07:23 +0200 | [diff] [blame] | 4402 | u64 max_lag; |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4403 | int i; |
| 4404 | |
Jiri Pirko | c1a3831 | 2016-10-21 16:07:23 +0200 | [diff] [blame] | 4405 | max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG); |
| 4406 | for (i = 0; i < max_lag; i++) { |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4407 | lag = mlxsw_sp_lag_get(mlxsw_sp, i); |
| 4408 | if (lag->ref_count) { |
| 4409 | if (lag->dev == lag_dev) { |
| 4410 | *p_lag_id = i; |
| 4411 | return 0; |
| 4412 | } |
| 4413 | } else if (free_lag_id < 0) { |
| 4414 | free_lag_id = i; |
| 4415 | } |
| 4416 | } |
| 4417 | if (free_lag_id < 0) |
| 4418 | return -EBUSY; |
| 4419 | *p_lag_id = free_lag_id; |
| 4420 | return 0; |
| 4421 | } |
| 4422 | |
| 4423 | static bool |
| 4424 | mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp, |
| 4425 | struct net_device *lag_dev, |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4426 | struct netdev_lag_upper_info *lag_upper_info, |
| 4427 | struct netlink_ext_ack *extack) |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4428 | { |
| 4429 | u16 lag_id; |
| 4430 | |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4431 | if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0) { |
| 4432 | NL_SET_ERR_MSG(extack, |
| 4433 | "spectrum: Exceeded number of supported LAG devices"); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4434 | return false; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4435 | } |
| 4436 | if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH) { |
| 4437 | NL_SET_ERR_MSG(extack, |
| 4438 | "spectrum: LAG device using unsupported Tx type"); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4439 | return false; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4440 | } |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4441 | return true; |
| 4442 | } |
| 4443 | |
| 4444 | static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp, |
| 4445 | u16 lag_id, u8 *p_port_index) |
| 4446 | { |
Jiri Pirko | c1a3831 | 2016-10-21 16:07:23 +0200 | [diff] [blame] | 4447 | u64 max_lag_members; |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4448 | int i; |
| 4449 | |
Jiri Pirko | c1a3831 | 2016-10-21 16:07:23 +0200 | [diff] [blame] | 4450 | max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core, |
| 4451 | MAX_LAG_MEMBERS); |
| 4452 | for (i = 0; i < max_lag_members; i++) { |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4453 | if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) { |
| 4454 | *p_port_index = i; |
| 4455 | return 0; |
| 4456 | } |
| 4457 | } |
| 4458 | return -EBUSY; |
| 4459 | } |
| 4460 | |
| 4461 | static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4462 | struct net_device *lag_dev) |
| 4463 | { |
| 4464 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 4465 | struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan; |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4466 | struct mlxsw_sp_upper *lag; |
| 4467 | u16 lag_id; |
| 4468 | u8 port_index; |
| 4469 | int err; |
| 4470 | |
| 4471 | err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id); |
| 4472 | if (err) |
| 4473 | return err; |
| 4474 | lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id); |
| 4475 | if (!lag->ref_count) { |
| 4476 | err = mlxsw_sp_lag_create(mlxsw_sp, lag_id); |
| 4477 | if (err) |
| 4478 | return err; |
| 4479 | lag->dev = lag_dev; |
| 4480 | } |
| 4481 | |
| 4482 | err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index); |
| 4483 | if (err) |
| 4484 | return err; |
| 4485 | err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index); |
| 4486 | if (err) |
| 4487 | goto err_col_port_add; |
| 4488 | err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id); |
| 4489 | if (err) |
| 4490 | goto err_col_port_enable; |
| 4491 | |
| 4492 | mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index, |
| 4493 | mlxsw_sp_port->local_port); |
| 4494 | mlxsw_sp_port->lag_id = lag_id; |
| 4495 | mlxsw_sp_port->lagged = 1; |
| 4496 | lag->ref_count++; |
Ido Schimmel | 86bf95b | 2016-07-02 11:00:11 +0200 | [diff] [blame] | 4497 | |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 4498 | /* Port is no longer usable as a router interface */ |
| 4499 | mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, 1); |
| 4500 | if (mlxsw_sp_port_vlan->fid) |
Ido Schimmel | a110748 | 2017-05-26 08:37:39 +0200 | [diff] [blame] | 4501 | mlxsw_sp_port_vlan_router_leave(mlxsw_sp_port_vlan); |
Ido Schimmel | 86bf95b | 2016-07-02 11:00:11 +0200 | [diff] [blame] | 4502 | |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4503 | return 0; |
| 4504 | |
Ido Schimmel | 51554db | 2016-05-06 22:18:39 +0200 | [diff] [blame] | 4505 | err_col_port_enable: |
| 4506 | mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4507 | err_col_port_add: |
| 4508 | if (!lag->ref_count) |
| 4509 | mlxsw_sp_lag_destroy(mlxsw_sp, lag_id); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4510 | return err; |
| 4511 | } |
| 4512 | |
Ido Schimmel | 82e6db0 | 2016-06-20 23:04:04 +0200 | [diff] [blame] | 4513 | static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4514 | struct net_device *lag_dev) |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4515 | { |
| 4516 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4517 | u16 lag_id = mlxsw_sp_port->lag_id; |
Ido Schimmel | 1c80075 | 2016-06-20 23:04:20 +0200 | [diff] [blame] | 4518 | struct mlxsw_sp_upper *lag; |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4519 | |
| 4520 | if (!mlxsw_sp_port->lagged) |
Ido Schimmel | 82e6db0 | 2016-06-20 23:04:04 +0200 | [diff] [blame] | 4521 | return; |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4522 | lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id); |
| 4523 | WARN_ON(lag->ref_count == 0); |
| 4524 | |
Ido Schimmel | 82e6db0 | 2016-06-20 23:04:04 +0200 | [diff] [blame] | 4525 | mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id); |
| 4526 | mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4527 | |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 4528 | /* Any VLANs configured on the port are no longer valid */ |
| 4529 | mlxsw_sp_port_vlan_flush(mlxsw_sp_port); |
Ido Schimmel | 4dc236c | 2016-01-27 15:20:16 +0100 | [diff] [blame] | 4530 | |
Ido Schimmel | fe3f6d1 | 2016-06-20 23:04:19 +0200 | [diff] [blame] | 4531 | if (lag->ref_count == 1) |
Ido Schimmel | 82e6db0 | 2016-06-20 23:04:04 +0200 | [diff] [blame] | 4532 | mlxsw_sp_lag_destroy(mlxsw_sp, lag_id); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4533 | |
| 4534 | mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id, |
| 4535 | mlxsw_sp_port->local_port); |
| 4536 | mlxsw_sp_port->lagged = 0; |
| 4537 | lag->ref_count--; |
Ido Schimmel | 86bf95b | 2016-07-02 11:00:11 +0200 | [diff] [blame] | 4538 | |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 4539 | mlxsw_sp_port_vlan_get(mlxsw_sp_port, 1); |
| 4540 | /* Make sure untagged frames are allowed to ingress */ |
| 4541 | mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4542 | } |
| 4543 | |
Jiri Pirko | 7458120 | 2015-12-03 12:12:30 +0100 | [diff] [blame] | 4544 | static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4545 | u16 lag_id) |
| 4546 | { |
| 4547 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 4548 | char sldr_pl[MLXSW_REG_SLDR_LEN]; |
| 4549 | |
| 4550 | mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id, |
| 4551 | mlxsw_sp_port->local_port); |
| 4552 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); |
| 4553 | } |
| 4554 | |
| 4555 | static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4556 | u16 lag_id) |
| 4557 | { |
| 4558 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 4559 | char sldr_pl[MLXSW_REG_SLDR_LEN]; |
| 4560 | |
| 4561 | mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id, |
| 4562 | mlxsw_sp_port->local_port); |
| 4563 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); |
| 4564 | } |
| 4565 | |
| 4566 | static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4567 | bool lag_tx_enabled) |
| 4568 | { |
| 4569 | if (lag_tx_enabled) |
| 4570 | return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port, |
| 4571 | mlxsw_sp_port->lag_id); |
| 4572 | else |
| 4573 | return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port, |
| 4574 | mlxsw_sp_port->lag_id); |
| 4575 | } |
| 4576 | |
| 4577 | static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4578 | struct netdev_lag_lower_state_info *info) |
| 4579 | { |
| 4580 | return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled); |
| 4581 | } |
| 4582 | |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4583 | static int mlxsw_sp_port_stp_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 4584 | bool enable) |
| 4585 | { |
| 4586 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 4587 | enum mlxsw_reg_spms_state spms_state; |
| 4588 | char *spms_pl; |
| 4589 | u16 vid; |
| 4590 | int err; |
| 4591 | |
| 4592 | spms_state = enable ? MLXSW_REG_SPMS_STATE_FORWARDING : |
| 4593 | MLXSW_REG_SPMS_STATE_DISCARDING; |
| 4594 | |
| 4595 | spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL); |
| 4596 | if (!spms_pl) |
| 4597 | return -ENOMEM; |
| 4598 | mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port); |
| 4599 | |
| 4600 | for (vid = 0; vid < VLAN_N_VID; vid++) |
| 4601 | mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state); |
| 4602 | |
| 4603 | err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl); |
| 4604 | kfree(spms_pl); |
| 4605 | return err; |
| 4606 | } |
| 4607 | |
| 4608 | static int mlxsw_sp_port_ovs_join(struct mlxsw_sp_port *mlxsw_sp_port) |
| 4609 | { |
Yuval Mintz | fccff08 | 2017-12-15 08:44:21 +0100 | [diff] [blame] | 4610 | u16 vid = 1; |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4611 | int err; |
| 4612 | |
Ido Schimmel | 4aafc36 | 2017-05-26 08:37:25 +0200 | [diff] [blame] | 4613 | err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true); |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4614 | if (err) |
| 4615 | return err; |
Ido Schimmel | 4aafc36 | 2017-05-26 08:37:25 +0200 | [diff] [blame] | 4616 | err = mlxsw_sp_port_stp_set(mlxsw_sp_port, true); |
| 4617 | if (err) |
| 4618 | goto err_port_stp_set; |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4619 | err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, 2, VLAN_N_VID - 1, |
| 4620 | true, false); |
| 4621 | if (err) |
| 4622 | goto err_port_vlan_set; |
Yuval Mintz | fccff08 | 2017-12-15 08:44:21 +0100 | [diff] [blame] | 4623 | |
| 4624 | for (; vid <= VLAN_N_VID - 1; vid++) { |
| 4625 | err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, |
| 4626 | vid, false); |
| 4627 | if (err) |
| 4628 | goto err_vid_learning_set; |
| 4629 | } |
| 4630 | |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4631 | return 0; |
| 4632 | |
Yuval Mintz | fccff08 | 2017-12-15 08:44:21 +0100 | [diff] [blame] | 4633 | err_vid_learning_set: |
| 4634 | for (vid--; vid >= 1; vid--) |
| 4635 | mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, true); |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4636 | err_port_vlan_set: |
| 4637 | mlxsw_sp_port_stp_set(mlxsw_sp_port, false); |
Ido Schimmel | 4aafc36 | 2017-05-26 08:37:25 +0200 | [diff] [blame] | 4638 | err_port_stp_set: |
| 4639 | mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false); |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4640 | return err; |
| 4641 | } |
| 4642 | |
| 4643 | static void mlxsw_sp_port_ovs_leave(struct mlxsw_sp_port *mlxsw_sp_port) |
| 4644 | { |
Yuval Mintz | fccff08 | 2017-12-15 08:44:21 +0100 | [diff] [blame] | 4645 | u16 vid; |
| 4646 | |
| 4647 | for (vid = VLAN_N_VID - 1; vid >= 1; vid--) |
| 4648 | mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, |
| 4649 | vid, true); |
| 4650 | |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4651 | mlxsw_sp_port_vlan_set(mlxsw_sp_port, 2, VLAN_N_VID - 1, |
| 4652 | false, false); |
| 4653 | mlxsw_sp_port_stp_set(mlxsw_sp_port, false); |
Ido Schimmel | 4aafc36 | 2017-05-26 08:37:25 +0200 | [diff] [blame] | 4654 | mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false); |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4655 | } |
| 4656 | |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4657 | static int mlxsw_sp_netdevice_port_upper_event(struct net_device *lower_dev, |
| 4658 | struct net_device *dev, |
Jiri Pirko | 7458120 | 2015-12-03 12:12:30 +0100 | [diff] [blame] | 4659 | unsigned long event, void *ptr) |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4660 | { |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4661 | struct netdev_notifier_changeupper_info *info; |
| 4662 | struct mlxsw_sp_port *mlxsw_sp_port; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4663 | struct netlink_ext_ack *extack; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4664 | struct net_device *upper_dev; |
| 4665 | struct mlxsw_sp *mlxsw_sp; |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4666 | int err = 0; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4667 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4668 | mlxsw_sp_port = netdev_priv(dev); |
| 4669 | mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 4670 | info = ptr; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4671 | extack = netdev_notifier_info_to_extack(&info->info); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4672 | |
| 4673 | switch (event) { |
| 4674 | case NETDEV_PRECHANGEUPPER: |
| 4675 | upper_dev = info->upper_dev; |
Ido Schimmel | 59fe9b3 | 2016-06-20 23:04:00 +0200 | [diff] [blame] | 4676 | if (!is_vlan_dev(upper_dev) && |
| 4677 | !netif_is_lag_master(upper_dev) && |
Ido Schimmel | 7179eb5 | 2017-03-16 09:08:18 +0100 | [diff] [blame] | 4678 | !netif_is_bridge_master(upper_dev) && |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4679 | !netif_is_ovs_master(upper_dev)) { |
| 4680 | NL_SET_ERR_MSG(extack, |
| 4681 | "spectrum: Unknown upper device type"); |
Ido Schimmel | 59fe9b3 | 2016-06-20 23:04:00 +0200 | [diff] [blame] | 4682 | return -EINVAL; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4683 | } |
Ido Schimmel | 6ec4390 | 2016-06-20 23:04:01 +0200 | [diff] [blame] | 4684 | if (!info->linking) |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4685 | break; |
Ido Schimmel | 90045fc | 2017-12-25 09:05:33 +0100 | [diff] [blame] | 4686 | if (netdev_has_any_upper_dev(upper_dev) && |
| 4687 | (!netif_is_bridge_master(upper_dev) || |
| 4688 | !mlxsw_sp_bridge_device_is_offloaded(mlxsw_sp, |
| 4689 | upper_dev))) { |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4690 | NL_SET_ERR_MSG(extack, |
| 4691 | "spectrum: Enslaving a port to a device that already has an upper device is not supported"); |
Ido Schimmel | 25cc72a | 2017-09-01 10:52:31 +0200 | [diff] [blame] | 4692 | return -EINVAL; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4693 | } |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4694 | if (netif_is_lag_master(upper_dev) && |
| 4695 | !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev, |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4696 | info->upper_info, extack)) |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4697 | return -EINVAL; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4698 | if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev)) { |
| 4699 | NL_SET_ERR_MSG(extack, |
| 4700 | "spectrum: Master device is a LAG master and this device has a VLAN"); |
Ido Schimmel | 6ec4390 | 2016-06-20 23:04:01 +0200 | [diff] [blame] | 4701 | return -EINVAL; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4702 | } |
Ido Schimmel | 6ec4390 | 2016-06-20 23:04:01 +0200 | [diff] [blame] | 4703 | if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) && |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4704 | !netif_is_lag_master(vlan_dev_real_dev(upper_dev))) { |
| 4705 | NL_SET_ERR_MSG(extack, |
| 4706 | "spectrum: Can not put a VLAN on a LAG port"); |
Ido Schimmel | 6ec4390 | 2016-06-20 23:04:01 +0200 | [diff] [blame] | 4707 | return -EINVAL; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4708 | } |
| 4709 | if (netif_is_ovs_master(upper_dev) && vlan_uses_dev(dev)) { |
| 4710 | NL_SET_ERR_MSG(extack, |
| 4711 | "spectrum: Master device is an OVS master and this device has a VLAN"); |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4712 | return -EINVAL; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4713 | } |
| 4714 | if (netif_is_ovs_port(dev) && is_vlan_dev(upper_dev)) { |
| 4715 | NL_SET_ERR_MSG(extack, |
| 4716 | "spectrum: Can not put a VLAN on an OVS port"); |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4717 | return -EINVAL; |
David Ahern | e58376e | 2017-10-04 17:48:51 -0700 | [diff] [blame] | 4718 | } |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4719 | break; |
| 4720 | case NETDEV_CHANGEUPPER: |
| 4721 | upper_dev = info->upper_dev; |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 4722 | if (netif_is_bridge_master(upper_dev)) { |
Ido Schimmel | 7117a57 | 2016-06-20 23:04:06 +0200 | [diff] [blame] | 4723 | if (info->linking) |
| 4724 | err = mlxsw_sp_port_bridge_join(mlxsw_sp_port, |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4725 | lower_dev, |
Ido Schimmel | 9b63ef88 | 2017-10-08 11:57:56 +0200 | [diff] [blame] | 4726 | upper_dev, |
| 4727 | extack); |
Ido Schimmel | 7117a57 | 2016-06-20 23:04:06 +0200 | [diff] [blame] | 4728 | else |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4729 | mlxsw_sp_port_bridge_leave(mlxsw_sp_port, |
| 4730 | lower_dev, |
| 4731 | upper_dev); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4732 | } else if (netif_is_lag_master(upper_dev)) { |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4733 | if (info->linking) |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4734 | err = mlxsw_sp_port_lag_join(mlxsw_sp_port, |
| 4735 | upper_dev); |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4736 | else |
Ido Schimmel | 82e6db0 | 2016-06-20 23:04:04 +0200 | [diff] [blame] | 4737 | mlxsw_sp_port_lag_leave(mlxsw_sp_port, |
| 4738 | upper_dev); |
Jiri Pirko | 2b94e58 | 2017-04-18 16:55:37 +0200 | [diff] [blame] | 4739 | } else if (netif_is_ovs_master(upper_dev)) { |
| 4740 | if (info->linking) |
| 4741 | err = mlxsw_sp_port_ovs_join(mlxsw_sp_port); |
| 4742 | else |
| 4743 | mlxsw_sp_port_ovs_leave(mlxsw_sp_port); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4744 | } |
| 4745 | break; |
| 4746 | } |
| 4747 | |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4748 | return err; |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4749 | } |
| 4750 | |
Jiri Pirko | 7458120 | 2015-12-03 12:12:30 +0100 | [diff] [blame] | 4751 | static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev, |
| 4752 | unsigned long event, void *ptr) |
| 4753 | { |
| 4754 | struct netdev_notifier_changelowerstate_info *info; |
| 4755 | struct mlxsw_sp_port *mlxsw_sp_port; |
| 4756 | int err; |
| 4757 | |
| 4758 | mlxsw_sp_port = netdev_priv(dev); |
| 4759 | info = ptr; |
| 4760 | |
| 4761 | switch (event) { |
| 4762 | case NETDEV_CHANGELOWERSTATE: |
| 4763 | if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) { |
| 4764 | err = mlxsw_sp_port_lag_changed(mlxsw_sp_port, |
| 4765 | info->lower_state_info); |
| 4766 | if (err) |
| 4767 | netdev_err(dev, "Failed to reflect link aggregation lower state change\n"); |
| 4768 | } |
| 4769 | break; |
| 4770 | } |
| 4771 | |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4772 | return 0; |
Jiri Pirko | 7458120 | 2015-12-03 12:12:30 +0100 | [diff] [blame] | 4773 | } |
| 4774 | |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4775 | static int mlxsw_sp_netdevice_port_event(struct net_device *lower_dev, |
| 4776 | struct net_device *port_dev, |
Jiri Pirko | 7458120 | 2015-12-03 12:12:30 +0100 | [diff] [blame] | 4777 | unsigned long event, void *ptr) |
| 4778 | { |
| 4779 | switch (event) { |
| 4780 | case NETDEV_PRECHANGEUPPER: |
| 4781 | case NETDEV_CHANGEUPPER: |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4782 | return mlxsw_sp_netdevice_port_upper_event(lower_dev, port_dev, |
| 4783 | event, ptr); |
Jiri Pirko | 7458120 | 2015-12-03 12:12:30 +0100 | [diff] [blame] | 4784 | case NETDEV_CHANGELOWERSTATE: |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4785 | return mlxsw_sp_netdevice_port_lower_event(port_dev, event, |
| 4786 | ptr); |
Jiri Pirko | 7458120 | 2015-12-03 12:12:30 +0100 | [diff] [blame] | 4787 | } |
| 4788 | |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4789 | return 0; |
Jiri Pirko | 7458120 | 2015-12-03 12:12:30 +0100 | [diff] [blame] | 4790 | } |
| 4791 | |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4792 | static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev, |
| 4793 | unsigned long event, void *ptr) |
| 4794 | { |
| 4795 | struct net_device *dev; |
| 4796 | struct list_head *iter; |
| 4797 | int ret; |
| 4798 | |
| 4799 | netdev_for_each_lower_dev(lag_dev, dev, iter) { |
| 4800 | if (mlxsw_sp_port_dev_check(dev)) { |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4801 | ret = mlxsw_sp_netdevice_port_event(lag_dev, dev, event, |
| 4802 | ptr); |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4803 | if (ret) |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4804 | return ret; |
| 4805 | } |
| 4806 | } |
| 4807 | |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4808 | return 0; |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4809 | } |
| 4810 | |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4811 | static int mlxsw_sp_netdevice_port_vlan_event(struct net_device *vlan_dev, |
| 4812 | struct net_device *dev, |
| 4813 | unsigned long event, void *ptr, |
| 4814 | u16 vid) |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4815 | { |
| 4816 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
Ido Schimmel | 90045fc | 2017-12-25 09:05:33 +0100 | [diff] [blame] | 4817 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4818 | struct netdev_notifier_changeupper_info *info = ptr; |
Ido Schimmel | c1f2c6d | 2017-10-08 11:57:55 +0200 | [diff] [blame] | 4819 | struct netlink_ext_ack *extack; |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4820 | struct net_device *upper_dev; |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4821 | int err = 0; |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4822 | |
Ido Schimmel | c1f2c6d | 2017-10-08 11:57:55 +0200 | [diff] [blame] | 4823 | extack = netdev_notifier_info_to_extack(&info->info); |
| 4824 | |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4825 | switch (event) { |
| 4826 | case NETDEV_PRECHANGEUPPER: |
| 4827 | upper_dev = info->upper_dev; |
Ido Schimmel | c1f2c6d | 2017-10-08 11:57:55 +0200 | [diff] [blame] | 4828 | if (!netif_is_bridge_master(upper_dev)) { |
| 4829 | NL_SET_ERR_MSG(extack, "spectrum: VLAN devices only support bridge and VRF uppers"); |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4830 | return -EINVAL; |
Ido Schimmel | c1f2c6d | 2017-10-08 11:57:55 +0200 | [diff] [blame] | 4831 | } |
Ido Schimmel | 25cc72a | 2017-09-01 10:52:31 +0200 | [diff] [blame] | 4832 | if (!info->linking) |
| 4833 | break; |
Ido Schimmel | 90045fc | 2017-12-25 09:05:33 +0100 | [diff] [blame] | 4834 | if (netdev_has_any_upper_dev(upper_dev) && |
| 4835 | (!netif_is_bridge_master(upper_dev) || |
| 4836 | !mlxsw_sp_bridge_device_is_offloaded(mlxsw_sp, |
| 4837 | upper_dev))) { |
Ido Schimmel | c1f2c6d | 2017-10-08 11:57:55 +0200 | [diff] [blame] | 4838 | NL_SET_ERR_MSG(extack, "spectrum: Enslaving a port to a device that already has an upper device is not supported"); |
Ido Schimmel | 25cc72a | 2017-09-01 10:52:31 +0200 | [diff] [blame] | 4839 | return -EINVAL; |
Ido Schimmel | c1f2c6d | 2017-10-08 11:57:55 +0200 | [diff] [blame] | 4840 | } |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4841 | break; |
| 4842 | case NETDEV_CHANGEUPPER: |
| 4843 | upper_dev = info->upper_dev; |
Ido Schimmel | 1f88061 | 2017-03-10 08:53:35 +0100 | [diff] [blame] | 4844 | if (netif_is_bridge_master(upper_dev)) { |
| 4845 | if (info->linking) |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 4846 | err = mlxsw_sp_port_bridge_join(mlxsw_sp_port, |
| 4847 | vlan_dev, |
Ido Schimmel | 9b63ef88 | 2017-10-08 11:57:56 +0200 | [diff] [blame] | 4848 | upper_dev, |
| 4849 | extack); |
Ido Schimmel | 1f88061 | 2017-03-10 08:53:35 +0100 | [diff] [blame] | 4850 | else |
Ido Schimmel | c57529e | 2017-05-26 08:37:31 +0200 | [diff] [blame] | 4851 | mlxsw_sp_port_bridge_leave(mlxsw_sp_port, |
| 4852 | vlan_dev, |
| 4853 | upper_dev); |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4854 | } else { |
Ido Schimmel | 1f88061 | 2017-03-10 08:53:35 +0100 | [diff] [blame] | 4855 | err = -EINVAL; |
| 4856 | WARN_ON(1); |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4857 | } |
Ido Schimmel | 1f88061 | 2017-03-10 08:53:35 +0100 | [diff] [blame] | 4858 | break; |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4859 | } |
| 4860 | |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4861 | return err; |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4862 | } |
| 4863 | |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4864 | static int mlxsw_sp_netdevice_lag_port_vlan_event(struct net_device *vlan_dev, |
| 4865 | struct net_device *lag_dev, |
| 4866 | unsigned long event, |
| 4867 | void *ptr, u16 vid) |
Ido Schimmel | 272c447 | 2015-12-15 16:03:47 +0100 | [diff] [blame] | 4868 | { |
| 4869 | struct net_device *dev; |
| 4870 | struct list_head *iter; |
| 4871 | int ret; |
| 4872 | |
| 4873 | netdev_for_each_lower_dev(lag_dev, dev, iter) { |
| 4874 | if (mlxsw_sp_port_dev_check(dev)) { |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4875 | ret = mlxsw_sp_netdevice_port_vlan_event(vlan_dev, dev, |
| 4876 | event, ptr, |
| 4877 | vid); |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4878 | if (ret) |
Ido Schimmel | 272c447 | 2015-12-15 16:03:47 +0100 | [diff] [blame] | 4879 | return ret; |
| 4880 | } |
| 4881 | } |
| 4882 | |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4883 | return 0; |
Ido Schimmel | 272c447 | 2015-12-15 16:03:47 +0100 | [diff] [blame] | 4884 | } |
| 4885 | |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4886 | static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev, |
| 4887 | unsigned long event, void *ptr) |
| 4888 | { |
| 4889 | struct net_device *real_dev = vlan_dev_real_dev(vlan_dev); |
| 4890 | u16 vid = vlan_dev_vlan_id(vlan_dev); |
| 4891 | |
Ido Schimmel | 272c447 | 2015-12-15 16:03:47 +0100 | [diff] [blame] | 4892 | if (mlxsw_sp_port_dev_check(real_dev)) |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4893 | return mlxsw_sp_netdevice_port_vlan_event(vlan_dev, real_dev, |
| 4894 | event, ptr, vid); |
Ido Schimmel | 272c447 | 2015-12-15 16:03:47 +0100 | [diff] [blame] | 4895 | else if (netif_is_lag_master(real_dev)) |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4896 | return mlxsw_sp_netdevice_lag_port_vlan_event(vlan_dev, |
| 4897 | real_dev, event, |
| 4898 | ptr, vid); |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4899 | |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4900 | return 0; |
Ido Schimmel | 26f0e7f | 2015-12-15 16:03:44 +0100 | [diff] [blame] | 4901 | } |
| 4902 | |
Ido Schimmel | b1e4552 | 2017-04-30 19:47:14 +0300 | [diff] [blame] | 4903 | static bool mlxsw_sp_is_vrf_event(unsigned long event, void *ptr) |
| 4904 | { |
| 4905 | struct netdev_notifier_changeupper_info *info = ptr; |
| 4906 | |
| 4907 | if (event != NETDEV_PRECHANGEUPPER && event != NETDEV_CHANGEUPPER) |
| 4908 | return false; |
| 4909 | return netif_is_l3_master(info->upper_dev); |
| 4910 | } |
| 4911 | |
Petr Machata | 0063587 | 2017-10-16 16:26:37 +0200 | [diff] [blame] | 4912 | static int mlxsw_sp_netdevice_event(struct notifier_block *nb, |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4913 | unsigned long event, void *ptr) |
| 4914 | { |
| 4915 | struct net_device *dev = netdev_notifier_info_to_dev(ptr); |
Petr Machata | 0063587 | 2017-10-16 16:26:37 +0200 | [diff] [blame] | 4916 | struct mlxsw_sp *mlxsw_sp; |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4917 | int err = 0; |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4918 | |
Petr Machata | 0063587 | 2017-10-16 16:26:37 +0200 | [diff] [blame] | 4919 | mlxsw_sp = container_of(nb, struct mlxsw_sp, netdevice_nb); |
Petr Machata | 796ec77 | 2017-11-03 10:03:29 +0100 | [diff] [blame] | 4920 | if (mlxsw_sp_netdev_is_ipip_ol(mlxsw_sp, dev)) |
| 4921 | err = mlxsw_sp_netdevice_ipip_ol_event(mlxsw_sp, dev, |
| 4922 | event, ptr); |
Petr Machata | 61481f2 | 2017-11-03 10:03:41 +0100 | [diff] [blame] | 4923 | else if (mlxsw_sp_netdev_is_ipip_ul(mlxsw_sp, dev)) |
| 4924 | err = mlxsw_sp_netdevice_ipip_ul_event(mlxsw_sp, dev, |
| 4925 | event, ptr); |
Petr Machata | 0063587 | 2017-10-16 16:26:37 +0200 | [diff] [blame] | 4926 | else if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU) |
Ido Schimmel | 6e095fd | 2016-07-04 08:23:13 +0200 | [diff] [blame] | 4927 | err = mlxsw_sp_netdevice_router_port_event(dev); |
Ido Schimmel | b1e4552 | 2017-04-30 19:47:14 +0300 | [diff] [blame] | 4928 | else if (mlxsw_sp_is_vrf_event(event, ptr)) |
| 4929 | err = mlxsw_sp_netdevice_vrf_event(dev, event, ptr); |
Ido Schimmel | 6e095fd | 2016-07-04 08:23:13 +0200 | [diff] [blame] | 4930 | else if (mlxsw_sp_port_dev_check(dev)) |
Ido Schimmel | f0cebd8 | 2017-05-26 08:37:29 +0200 | [diff] [blame] | 4931 | err = mlxsw_sp_netdevice_port_event(dev, dev, event, ptr); |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4932 | else if (netif_is_lag_master(dev)) |
| 4933 | err = mlxsw_sp_netdevice_lag_event(dev, event, ptr); |
| 4934 | else if (is_vlan_dev(dev)) |
| 4935 | err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4936 | |
Ido Schimmel | 80bedf1 | 2016-06-20 23:03:59 +0200 | [diff] [blame] | 4937 | return notifier_from_errno(err); |
Jiri Pirko | 0d65fc1 | 2015-12-03 12:12:28 +0100 | [diff] [blame] | 4938 | } |
| 4939 | |
David Ahern | 89d5dd2 | 2017-10-18 09:56:55 -0700 | [diff] [blame] | 4940 | static struct notifier_block mlxsw_sp_inetaddr_valid_nb __read_mostly = { |
| 4941 | .notifier_call = mlxsw_sp_inetaddr_valid_event, |
| 4942 | }; |
| 4943 | |
Ido Schimmel | 99724c1 | 2016-07-04 08:23:14 +0200 | [diff] [blame] | 4944 | static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = { |
| 4945 | .notifier_call = mlxsw_sp_inetaddr_event, |
David Ahern | 89d5dd2 | 2017-10-18 09:56:55 -0700 | [diff] [blame] | 4946 | }; |
| 4947 | |
| 4948 | static struct notifier_block mlxsw_sp_inet6addr_valid_nb __read_mostly = { |
| 4949 | .notifier_call = mlxsw_sp_inet6addr_valid_event, |
Ido Schimmel | 99724c1 | 2016-07-04 08:23:14 +0200 | [diff] [blame] | 4950 | }; |
| 4951 | |
Arkadi Sharshevsky | 5ea1237 | 2017-07-18 10:10:13 +0200 | [diff] [blame] | 4952 | static struct notifier_block mlxsw_sp_inet6addr_nb __read_mostly = { |
| 4953 | .notifier_call = mlxsw_sp_inet6addr_event, |
| 4954 | }; |
| 4955 | |
Jiri Pirko | 1d20d23 | 2016-10-27 15:12:59 +0200 | [diff] [blame] | 4956 | static const struct pci_device_id mlxsw_sp_pci_id_table[] = { |
| 4957 | {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0}, |
| 4958 | {0, }, |
| 4959 | }; |
| 4960 | |
| 4961 | static struct pci_driver mlxsw_sp_pci_driver = { |
| 4962 | .name = mlxsw_sp_driver_name, |
| 4963 | .id_table = mlxsw_sp_pci_id_table, |
| 4964 | }; |
| 4965 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4966 | static int __init mlxsw_sp_module_init(void) |
| 4967 | { |
| 4968 | int err; |
| 4969 | |
David Ahern | 89d5dd2 | 2017-10-18 09:56:55 -0700 | [diff] [blame] | 4970 | register_inetaddr_validator_notifier(&mlxsw_sp_inetaddr_valid_nb); |
Ido Schimmel | 99724c1 | 2016-07-04 08:23:14 +0200 | [diff] [blame] | 4971 | register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb); |
David Ahern | 89d5dd2 | 2017-10-18 09:56:55 -0700 | [diff] [blame] | 4972 | register_inet6addr_validator_notifier(&mlxsw_sp_inet6addr_valid_nb); |
Arkadi Sharshevsky | 5ea1237 | 2017-07-18 10:10:13 +0200 | [diff] [blame] | 4973 | register_inet6addr_notifier(&mlxsw_sp_inet6addr_nb); |
Jiri Pirko | e732263 | 2016-09-01 10:37:43 +0200 | [diff] [blame] | 4974 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4975 | err = mlxsw_core_driver_register(&mlxsw_sp_driver); |
| 4976 | if (err) |
| 4977 | goto err_core_driver_register; |
Jiri Pirko | 1d20d23 | 2016-10-27 15:12:59 +0200 | [diff] [blame] | 4978 | |
| 4979 | err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver); |
| 4980 | if (err) |
| 4981 | goto err_pci_driver_register; |
| 4982 | |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4983 | return 0; |
| 4984 | |
Jiri Pirko | 1d20d23 | 2016-10-27 15:12:59 +0200 | [diff] [blame] | 4985 | err_pci_driver_register: |
| 4986 | mlxsw_core_driver_unregister(&mlxsw_sp_driver); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4987 | err_core_driver_register: |
Arkadi Sharshevsky | 5ea1237 | 2017-07-18 10:10:13 +0200 | [diff] [blame] | 4988 | unregister_inet6addr_notifier(&mlxsw_sp_inet6addr_nb); |
David Ahern | 89d5dd2 | 2017-10-18 09:56:55 -0700 | [diff] [blame] | 4989 | unregister_inet6addr_validator_notifier(&mlxsw_sp_inet6addr_valid_nb); |
Jiri Pirko | de7d629 | 2016-09-01 10:37:42 +0200 | [diff] [blame] | 4990 | unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb); |
David Ahern | 89d5dd2 | 2017-10-18 09:56:55 -0700 | [diff] [blame] | 4991 | unregister_inetaddr_validator_notifier(&mlxsw_sp_inetaddr_valid_nb); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4992 | return err; |
| 4993 | } |
| 4994 | |
| 4995 | static void __exit mlxsw_sp_module_exit(void) |
| 4996 | { |
Jiri Pirko | 1d20d23 | 2016-10-27 15:12:59 +0200 | [diff] [blame] | 4997 | mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 4998 | mlxsw_core_driver_unregister(&mlxsw_sp_driver); |
Arkadi Sharshevsky | 5ea1237 | 2017-07-18 10:10:13 +0200 | [diff] [blame] | 4999 | unregister_inet6addr_notifier(&mlxsw_sp_inet6addr_nb); |
David Ahern | 89d5dd2 | 2017-10-18 09:56:55 -0700 | [diff] [blame] | 5000 | unregister_inet6addr_validator_notifier(&mlxsw_sp_inet6addr_valid_nb); |
Ido Schimmel | 99724c1 | 2016-07-04 08:23:14 +0200 | [diff] [blame] | 5001 | unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb); |
David Ahern | 89d5dd2 | 2017-10-18 09:56:55 -0700 | [diff] [blame] | 5002 | unregister_inetaddr_validator_notifier(&mlxsw_sp_inetaddr_valid_nb); |
Jiri Pirko | 56ade8f | 2015-10-16 14:01:37 +0200 | [diff] [blame] | 5003 | } |
| 5004 | |
| 5005 | module_init(mlxsw_sp_module_init); |
| 5006 | module_exit(mlxsw_sp_module_exit); |
| 5007 | |
| 5008 | MODULE_LICENSE("Dual BSD/GPL"); |
| 5009 | MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>"); |
| 5010 | MODULE_DESCRIPTION("Mellanox Spectrum driver"); |
Jiri Pirko | 1d20d23 | 2016-10-27 15:12:59 +0200 | [diff] [blame] | 5011 | MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table); |
Yotam Gigi | 6b74219 | 2017-05-23 21:56:29 +0200 | [diff] [blame] | 5012 | MODULE_FIRMWARE(MLXSW_SP_FW_FILENAME); |